--- linux-xilinx-6.8.0.orig/.editorconfig +++ linux-xilinx-6.8.0/.editorconfig @@ -5,7 +5,6 @@ [{*.{awk,c,dts,dtsi,dtso,h,mk,s,S},Kconfig,Makefile,Makefile.*}] charset = utf-8 end_of_line = lf -trim_trailing_whitespace = true insert_final_newline = true indent_style = tab indent_size = 8 @@ -13,7 +12,6 @@ [*.{json,py,rs}] charset = utf-8 end_of_line = lf -trim_trailing_whitespace = true insert_final_newline = true indent_style = space indent_size = 4 @@ -26,7 +24,6 @@ [*.yaml] charset = utf-8 end_of_line = lf -trim_trailing_whitespace = unset insert_final_newline = true indent_style = space indent_size = 2 --- linux-xilinx-6.8.0.orig/.github/pull_request_template.md +++ linux-xilinx-6.8.0/.github/pull_request_template.md @@ -0,0 +1,3 @@ +Please do not submit a Pull Request via github. Our project makes use of +mailing lists for patch submission and review. For more details please see +https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18842172/Create+and+Submit+a+Patch --- linux-xilinx-6.8.0.orig/Documentation/ABI/stable/sysfs-block +++ linux-xilinx-6.8.0/Documentation/ABI/stable/sysfs-block @@ -101,6 +101,16 @@ devices that support receiving integrity metadata. +What: /sys/block//partscan +Date: May 2024 +Contact: Christoph Hellwig +Description: + The /sys/block//partscan files reports if partition + scanning is enabled for the disk. It returns "1" if partition + scanning is enabled, or "0" if not. The value type is a 32-bit + unsigned integer, but only "0" and "1" are valid values. + + What: /sys/block///alignment_offset Date: April 2009 Contact: Martin K. Petersen --- linux-xilinx-6.8.0.orig/Documentation/ABI/stable/sysfs-driver-firmware-zynqmp +++ linux-xilinx-6.8.0/Documentation/ABI/stable/sysfs-driver-firmware-zynqmp @@ -254,3 +254,16 @@ The expected result is 500. Users: Xilinx + +What: /sys/devices/platform/firmware\:zynqmp-firmware/last_reset_reason +Date: Nov 2023 +KernelVersion: 6.7 +Contact: "Ronak Jain" +Description: + This sysfs interface allows to get last reset reason. + + Usage: + Get last reset reason + # cat /sys/devices/platform/firmware\:zynqmp-firmware/last_reset_reason + +Users: Xilinx --- linux-xilinx-6.8.0.orig/Documentation/ABI/testing/debugfs-driver-qat +++ linux-xilinx-6.8.0/Documentation/ABI/testing/debugfs-driver-qat @@ -81,3 +81,29 @@ : Number of Compress and Verify (CnV) errors and type of the last CnV error detected by Acceleration Engine N. + +What: /sys/kernel/debug/qat__/heartbeat/inject_error +Date: March 2024 +KernelVersion: 6.8 +Contact: qat-linux@intel.com +Description: (WO) Write to inject an error that simulates an heartbeat + failure. This is to be used for testing purposes. + + After writing this file, the driver stops arbitration on a + random engine and disables the fetching of heartbeat counters. + If a workload is running on the device, a job submitted to the + accelerator might not get a response and a read of the + `heartbeat/status` attribute might report -1, i.e. device + unresponsive. + The error is unrecoverable thus the device must be restarted to + restore its functionality. + + This attribute is available only when the kernel is built with + CONFIG_CRYPTO_DEV_QAT_ERROR_INJECTION=y. + + A write of 1 enables error injection. + + The following example shows how to enable error injection:: + + # cd /sys/kernel/debug/qat__ + # echo 1 > heartbeat/inject_error --- linux-xilinx-6.8.0.orig/Documentation/ABI/testing/ima_policy +++ linux-xilinx-6.8.0/Documentation/ABI/testing/ima_policy @@ -26,7 +26,7 @@ [uid=] [euid=] [gid=] [egid=] [fowner=] [fgroup=]] lsm: [[subj_user=] [subj_role=] [subj_type=] - [obj_user=] [obj_role=] [obj_type=]] + [obj_user=] [obj_role=] [obj_type=] [lsm=]] option: [digest_type=] [template=] [permit_directio] [appraise_type=] [appraise_flag=] [appraise_algos=] [keyrings=] @@ -138,6 +138,12 @@ measure subj_user=_ func=FILE_CHECK mask=MAY_READ + It is possible to explicitly specify which security + module a rule applies to using lsm=. If the security + module specified is not active on the system the rule + will be rejected. If lsm= is not specified the first + security module registered on the system will be assumed. + Example of measure rules using alternate PCRs:: measure func=KEXEC_KERNEL_CHECK pcr=4 --- linux-xilinx-6.8.0.orig/Documentation/ABI/testing/sysfs-bus-iio-filter-admv8818 +++ linux-xilinx-6.8.0/Documentation/ABI/testing/sysfs-bus-iio-filter-admv8818 @@ -3,7 +3,7 @@ Contact: linux-iio@vger.kernel.org Description: Reading this returns the valid values that can be written to the - on_altvoltage0_mode attribute: + filter_mode attribute: - auto -> Adjust bandpass filter to track changes in input clock rate. - manual -> disable/unregister the clock rate notifier / input clock tracking. --- linux-xilinx-6.8.0.orig/Documentation/ABI/testing/sysfs-bus-pci +++ linux-xilinx-6.8.0/Documentation/ABI/testing/sysfs-bus-pci @@ -163,6 +163,17 @@ will be present in sysfs. Writing 1 to this file will perform reset. +What: /sys/bus/pci/devices/.../reset_subordinate +Date: October 2024 +Contact: linux-pci@vger.kernel.org +Description: + This is visible only for bridge devices. If you want to reset + all devices attached through the subordinate bus of a specific + bridge device, writing 1 to this will try to do it. This will + affect all devices attached to the system through this bridge + similiar to writing 1 to their individual "reset" file, so use + with caution. + What: /sys/bus/pci/devices/.../vpd Date: February 2008 Contact: Ben Hutchings --- linux-xilinx-6.8.0.orig/Documentation/ABI/testing/sysfs-bus-platform-onboard-usb-dev +++ linux-xilinx-6.8.0/Documentation/ABI/testing/sysfs-bus-platform-onboard-usb-dev @@ -0,0 +1,9 @@ +What: /sys/bus/platform/devices//always_powered_in_suspend +Date: June 2022 +KernelVersion: 5.20 +Contact: Matthias Kaehlcke + linux-usb@vger.kernel.org +Description: + (RW) Controls whether the USB hub remains always powered + during system suspend or not. This attribute is not + available for non-hub devices. --- linux-xilinx-6.8.0.orig/Documentation/ABI/testing/sysfs-class-fpga-bridge +++ linux-xilinx-6.8.0/Documentation/ABI/testing/sysfs-class-fpga-bridge @@ -9,3 +9,12 @@ KernelVersion: 4.5 Contact: Alan Tull Description: Show bridge state as "enabled" or "disabled" + +What: /sys/class/fpga_bridge//set +Date: January 2017 +KernelVersion: 4.9 +Contact: Michal Simek +Description: Manual set bridge state (0-disable, !0 enable). + Enabling this option requires that the module is + compiled with #define DEBUG which is enabled by default + when CONFIG_DEBUG_KERNEL is setup. --- linux-xilinx-6.8.0.orig/Documentation/ABI/testing/sysfs-devices-system-cpu +++ linux-xilinx-6.8.0/Documentation/ABI/testing/sysfs-devices-system-cpu @@ -516,6 +516,7 @@ /sys/devices/system/cpu/vulnerabilities/mds /sys/devices/system/cpu/vulnerabilities/meltdown /sys/devices/system/cpu/vulnerabilities/mmio_stale_data + /sys/devices/system/cpu/vulnerabilities/reg_file_data_sampling /sys/devices/system/cpu/vulnerabilities/retbleed /sys/devices/system/cpu/vulnerabilities/spec_store_bypass /sys/devices/system/cpu/vulnerabilities/spectre_v1 @@ -561,7 +562,8 @@ ================ ========================================= If control status is "forceoff" or "notsupported" writes - are rejected. + are rejected. Note that enabling SMT on PowerPC skips + offline cores. What: /sys/devices/system/cpu/cpuX/power/energy_perf_bias Date: March 2019 --- linux-xilinx-6.8.0.orig/Documentation/ABI/testing/sysfs-driver-qat +++ linux-xilinx-6.8.0/Documentation/ABI/testing/sysfs-driver-qat @@ -141,3 +141,23 @@ 64 This attribute is only available for qat_4xxx devices. + +What: /sys/bus/pci/devices//qat/auto_reset +Date: March 2024 +KernelVersion: 6.8 +Contact: qat-linux@intel.com +Description: (RW) Reports the current state of the autoreset feature + for a QAT device + + Write to the attribute to enable or disable device auto reset. + + Device auto reset is disabled by default. + + The values are: + + * 1/Yy/on: auto reset enabled. If the device encounters an + unrecoverable error, it will be reset automatically. + * 0/Nn/off: auto reset disabled. If the device encounters an + unrecoverable error, it will not be reset. + + This attribute is only available for qat_4xxx devices. --- linux-xilinx-6.8.0.orig/Documentation/ABI/testing/sysfs-driver-xilsem-edac +++ linux-xilinx-6.8.0/Documentation/ABI/testing/sysfs-driver-xilsem-edac @@ -0,0 +1,104 @@ +What: /sys/devices/system/edac/versal_xilsem/xsem_scan_control +Date: Jan, 2023 +Contact: rama.devi.veggalam@amd.com +Description: + It is a read/write file. + Writing to this file causes the software to initiate a + request to the firmware for doing requested scan operation in + Configuration RAM (CRAM) or NPI of Versal devices. User needs + to provide scan operation id (init, start, stop) details. + The scan operation id values are as given below: + 1 - Initialize the scan + 2 - Start CRAM scan + 3 - Stop CRAM scan + 5 - Start NPI scan + 6 - Stop NPI scan + 7 - Inject NPI error in first descriptor + + When read, it shows the current scan status with error code. + The format is <0x1030 | operation Id> . + The different error codes are as given below: + ========== ===== + Error Code Cause + ========== ===== + 0x0 Scan operation success + 0x1 Failure in NPI scan + 0x80 Calibration timeout + 0x2000 Internal error + 0x500000 CRAM initialization not yet done + 0x600000 Start scan failed + 0x700000 Stop scan failed + 0xF00000 Active CRC/UE error + 0x1000000 ECC/CRC error detected during calibration + ========== ===== + +What: /sys/devices/system/edac/versal_xilsem/xsem_cram_injecterr +Date: Jan, 2023 +Contact: rama.devi.veggalam@amd.com +Description: + It is a read/write file. + Writing to this file causes the software to initiate a + request to the firmware for doing error injection in + Configuration RAM (CRAM) of Versal devices. User needs + to provide the location details of CRAM + (frame, qword, bit number, row number) to inject the error. + When read, it shows the current error injection status. The + format is
. + Example: 0x10304 0 + The different error codes are as given below: + ========== ===== + Error Code Cause + ========== ===== + 0x0 Error injection success + 0x2000 Internal NULL pointer error + 0x500000 CRAM initialization not yet done + 0x800000 Invalid row + 0x900000 Invalid qword + 0xA00000 Invalid bit + 0xB00000 Invalid frame address + 0xC00000 Unexpected bits flipped + 0xD00000 Masked bit + 0xE00000 Invalid block type + 0xF00000 Active CRC/UE error in CRAM + ========== ===== + +What: /sys/devices/system/edac/versal_xilsem/xsem_cram_framecc_read +Date: Jan, 2023 +Contact: rama.devi.veggalam@amd.com +Description: + It is a read/write file. + Writing to this file causes the software to initiate a + request to the firmware for reading frame ECC values in + Configuration RAM (CRAM) of Versal devices. User needs + to provide the location details of CRAM + (frame, row number) to read the ECC values. + When read, it shows the ECC values for the requested frame. + The format is
+ Example: 0 0x1030A 0x363B1A 0x8A0200 + +What: /sys/devices/system/edac/versal_xilsem/xsem_read_config +Date: Jan, 2023 +Contact: rama.devi.veggalam@amd.com +Description: + It is a read/write file. + Writing to this file causes the software to initiate a + request to the firmware for reading Xilsem configuration. + When read, it shows the CRAM and NPI scan configuration. + The format is
+ Example: 0 0x1030A 0x26 0x5016 + +What: /sys/devices/system/edac/versal_xilsem/xsem_read_status +Date: Jan, 2023 +Contact: rama.devi.veggalam@amd.com +Description: + It is a read/write file. + Writing to this file causes the software to initiate a + request read the Xilsem status. User needs to provide + the module id for status. The module id values are as given below: + 1 - CRAM scan + 2 - NPI scan + When read, it shows the status of the requested module. + For CRAM: + Example: 0x10005 0 + For NPI: + Example: 0xA01 0x10 0x1 --- linux-xilinx-6.8.0.orig/Documentation/ABI/testing/sysfs-fs-f2fs +++ linux-xilinx-6.8.0/Documentation/ABI/testing/sysfs-fs-f2fs @@ -311,10 +311,13 @@ GC approach and turns SSR mode on. gc urgent low(2): lowers the bar of checking I/O idling in order to process outstanding discard commands and GC a - little bit aggressively. uses cost benefit GC approach. + little bit aggressively. always uses cost benefit GC approach, + and will override age-threshold GC approach if ATGC is enabled + at the same time. gc urgent mid(3): does GC forcibly in a period of given gc_urgent_sleep_time and executes a mid level of I/O idling check. - uses cost benefit GC approach. + always uses cost benefit GC approach, and will override + age-threshold GC approach if ATGC is enabled at the same time. What: /sys/fs/f2fs//gc_urgent_sleep_time Date: August 2017 @@ -761,3 +764,25 @@ Contact: "Chao Yu" Description: It controls to enable/disable IO aware feature for background discard. By default, the value is 1 which indicates IO aware is on. + +What: /sys/fs/f2fs//blkzone_alloc_policy +Date: July 2024 +Contact: "Yuanhong Liao" +Description: The zone UFS we are currently using consists of two parts: + conventional zones and sequential zones. It can be used to control which part + to prioritize for writes, with a default value of 0. + + ======================== ========================================= + value description + blkzone_alloc_policy = 0 Prioritize writing to sequential zones + blkzone_alloc_policy = 1 Only allow writing to sequential zones + blkzone_alloc_policy = 2 Prioritize writing to conventional zones + ======================== ========================================= + +What: /sys/fs/f2fs//migration_window_granularity +Date: September 2024 +Contact: "Daeho Jeong" +Description: Controls migration window granularity of garbage collection on large + section. it can control the scanning window granularity for GC migration + in a unit of segment, while migration_granularity controls the number + of segments which can be migrated at the same turn. --- linux-xilinx-6.8.0.orig/Documentation/ABI/testing/sysfs-fs-xfs +++ linux-xilinx-6.8.0/Documentation/ABI/testing/sysfs-fs-xfs @@ -1,7 +1,7 @@ What: /sys/fs/xfs//log/log_head_lsn Date: July 2014 KernelVersion: 3.17 -Contact: xfs@oss.sgi.com +Contact: linux-xfs@vger.kernel.org Description: The log sequence number (LSN) of the current head of the log. The LSN is exported in "cycle:basic block" format. @@ -10,7 +10,7 @@ What: /sys/fs/xfs//log/log_tail_lsn Date: July 2014 KernelVersion: 3.17 -Contact: xfs@oss.sgi.com +Contact: linux-xfs@vger.kernel.org Description: The log sequence number (LSN) of the current tail of the log. The LSN is exported in "cycle:basic block" format. @@ -18,7 +18,7 @@ What: /sys/fs/xfs//log/reserve_grant_head Date: July 2014 KernelVersion: 3.17 -Contact: xfs@oss.sgi.com +Contact: linux-xfs@vger.kernel.org Description: The current state of the log reserve grant head. It represents the total log reservation of all currently @@ -29,7 +29,7 @@ What: /sys/fs/xfs//log/write_grant_head Date: July 2014 KernelVersion: 3.17 -Contact: xfs@oss.sgi.com +Contact: linux-xfs@vger.kernel.org Description: The current state of the log write grant head. It represents the total log reservation of all currently --- linux-xilinx-6.8.0.orig/Documentation/Makefile +++ linux-xilinx-6.8.0/Documentation/Makefile @@ -111,8 +111,10 @@ $(YNL_RST_DIR)/%.rst: $(YNL_YAML_DIR)/%.yaml $(YNL_TOOL) $(Q)$(YNL_TOOL) -i $< -o $@ -htmldocs: $(YNL_INDEX) - @$(srctree)/scripts/sphinx-pre-install --version-check +htmldocs texinfodocs latexdocs epubdocs xmldocs: $(YNL_INDEX) + +htmldocs: + @$(srctree)/scripts/sphinx-pre-install --version-check --no-virtualenv @+$(foreach var,$(SPHINXDIRS),$(call loop_cmd,sphinx,html,$(var),,$(var))) # If Rust support is available and .config exists, add rustdoc generated contents. --- linux-xilinx-6.8.0.orig/Documentation/RCU/stallwarn.rst +++ linux-xilinx-6.8.0/Documentation/RCU/stallwarn.rst @@ -249,7 +249,7 @@ interrupts during the current stalled grace period. The "idle=" portion of the message prints the dyntick-idle state. -The hex number before the first "/" is the low-order 12 bits of the +The hex number before the first "/" is the low-order 16 bits of the dynticks counter, which will have an even-numbered value if the CPU is in dyntick-idle mode and an odd-numbered value otherwise. The hex number between the two "/"s is the value of the nesting, which will be --- linux-xilinx-6.8.0.orig/Documentation/accel/qaic/aic080.rst +++ linux-xilinx-6.8.0/Documentation/accel/qaic/aic080.rst @@ -0,0 +1,14 @@ +.. SPDX-License-Identifier: GPL-2.0-only + +=============================== + Qualcomm Cloud AI 80 (AIC080) +=============================== + +Overview +======== + +The Qualcomm Cloud AI 80/AIC080 family of products are a derivative of AIC100. +The number of NSPs and clock rates are reduced to fit within resource +constrained solutions. The PCIe Product ID is 0xa080. + +As a derivative product, all AIC100 documentation applies. --- linux-xilinx-6.8.0.orig/Documentation/accel/qaic/index.rst +++ linux-xilinx-6.8.0/Documentation/accel/qaic/index.rst @@ -10,4 +10,5 @@ .. toctree:: qaic + aic080 aic100 --- linux-xilinx-6.8.0.orig/Documentation/admin-guide/blockdev/zram.rst +++ linux-xilinx-6.8.0/Documentation/admin-guide/blockdev/zram.rst @@ -47,6 +47,8 @@ -ENOMEM zram was not able to allocate enough memory to fulfil your needs. -EINVAL invalid input has been provided. +-EAGAIN re-try operation later (e.g. when attempting to run recompress + and writeback simultaneously). ======== ============================================================= If you use 'echo', the returned value is set by the 'echo' utility, --- linux-xilinx-6.8.0.orig/Documentation/admin-guide/cgroup-v2.rst +++ linux-xilinx-6.8.0/Documentation/admin-guide/cgroup-v2.rst @@ -1694,9 +1694,10 @@ entries fault back in or are written out to disk. memory.zswap.writeback - A read-write single value file. The default value is "1". The - initial value of the root cgroup is 1, and when a new cgroup is - created, it inherits the current value of its parent. + A read-write single value file. The default value is "1". + Note that this setting is hierarchical, i.e. the writeback would be + implicitly disabled for child cgroups if the upper hierarchy + does so. When this is set to 0, all swapping attempts to swapping devices are disabled. This included both zswap writebacks, and swapping due @@ -2320,8 +2321,12 @@ is always a subset of it. Users can manually set it to a value that is different from - "cpuset.cpus". The only constraint in setting it is that the - list of CPUs must be exclusive with respect to its sibling. + "cpuset.cpus". One constraint in setting it is that the list of + CPUs must be exclusive with respect to "cpuset.cpus.exclusive" + of its sibling. If "cpuset.cpus.exclusive" of a sibling cgroup + isn't set, its "cpuset.cpus" value, if set, cannot be a subset + of it to leave at least one CPU available when the exclusive + CPUs are taken away. For a parent cgroup, any one of its exclusive CPUs can only be distributed to at most one of its child cgroups. Having an --- linux-xilinx-6.8.0.orig/Documentation/admin-guide/cifs/usage.rst +++ linux-xilinx-6.8.0/Documentation/admin-guide/cifs/usage.rst @@ -723,40 +723,26 @@ ======================= ======================================================= SecurityFlags Flags which control security negotiation and also packet signing. Authentication (may/must) - flags (e.g. for NTLM and/or NTLMv2) may be combined with + flags (e.g. for NTLMv2) may be combined with the signing flags. Specifying two different password hashing mechanisms (as "must use") on the other hand does not make much sense. Default flags are:: - 0x07007 + 0x00C5 - (NTLM, NTLMv2 and packet signing allowed). The maximum - allowable flags if you want to allow mounts to servers - using weaker password hashes is 0x37037 (lanman, - plaintext, ntlm, ntlmv2, signing allowed). Some - SecurityFlags require the corresponding menuconfig - options to be enabled. Enabling plaintext - authentication currently requires also enabling - lanman authentication in the security flags - because the cifs module only supports sending - laintext passwords using the older lanman dialect - form of the session setup SMB. (e.g. for authentication - using plain text passwords, set the SecurityFlags - to 0x30030):: + (NTLMv2 and packet signing allowed). Some SecurityFlags + may require enabling a corresponding menuconfig option. may use packet signing 0x00001 must use packet signing 0x01001 - may use NTLM (most common password hash) 0x00002 - must use NTLM 0x02002 may use NTLMv2 0x00004 must use NTLMv2 0x04004 - may use Kerberos security 0x00008 - must use Kerberos 0x08008 - may use lanman (weak) password hash 0x00010 - must use lanman password hash 0x10010 - may use plaintext passwords 0x00020 - must use plaintext passwords 0x20020 - (reserved for future packet encryption) 0x00040 + may use Kerberos security (krb5) 0x00008 + must use Kerberos 0x08008 + may use NTLMSSP 0x00080 + must use NTLMSSP 0x80080 + seal (packet encryption) 0x00040 + must seal 0x40040 cifsFYI If set to non-zero value, additional debug information will be logged to the system error log. This field --- linux-xilinx-6.8.0.orig/Documentation/admin-guide/gpio/gpio-aggregator.rst +++ linux-xilinx-6.8.0/Documentation/admin-guide/gpio/gpio-aggregator.rst @@ -69,6 +69,113 @@ $ echo gpio-aggregator.0 > delete_device +Aggregating GPIOs using Configfs +-------------------------------- + +**Group:** ``/config/gpio-aggregator`` + + This is the root directory of the gpio-aggregator configfs tree. + +**Group:** ``/config/gpio-aggregator/`` + + This directory represents a GPIO aggregator device. You can assign any + name to ```` (e.g. ``agg0``), except names starting with + ``_sysfs`` prefix, which are reserved for auto-generated configfs + entries corresponding to devices created via Sysfs. + +**Attribute:** ``/config/gpio-aggregator//live`` + + The ``live`` attribute allows to trigger the actual creation of the device + once it's fully configured. Accepted values are: + + * ``1``, ``yes``, ``true`` : enable the virtual device + * ``0``, ``no``, ``false`` : disable the virtual device + +**Attribute:** ``/config/gpio-aggregator//dev_name`` + + The read-only ``dev_name`` attribute exposes the name of the device as it + will appear in the system on the platform bus (e.g. ``gpio-aggregator.0``). + This is useful for identifying a character device for the newly created + aggregator. If it's ``gpio-aggregator.0``, + ``/sys/devices/platform/gpio-aggregator.0/gpiochipX`` path tells you that the + GPIO device id is ``X``. + +You must create subdirectories for each virtual line you want to +instantiate, named exactly as ``line0``, ``line1``, ..., ``lineY``, when +you want to instantiate ``Y+1`` (Y >= 0) lines. Configure all lines before +activating the device by setting ``live`` to 1. + +**Group:** ``/config/gpio-aggregator///`` + + This directory represents a GPIO line to include in the aggregator. + +**Attribute:** ``/config/gpio-aggregator///key`` + +**Attribute:** ``/config/gpio-aggregator///offset`` + + The default values after creating the ```` directory are: + + * ``key`` : + * ``offset`` : -1 + + ``key`` must always be explicitly configured, while ``offset`` depends. + Two configuration patterns exist for each ````: + + (a). For lookup by GPIO line name: + + * Set ``key`` to the line name. + * Ensure ``offset`` remains -1 (the default). + + (b). For lookup by GPIO chip name and the line offset within the chip: + + * Set ``key`` to the chip name. + * Set ``offset`` to the line offset (0 <= ``offset`` < 65535). + +**Attribute:** ``/config/gpio-aggregator///name`` + + The ``name`` attribute sets a custom name for lineY. If left unset, the + line will remain unnamed. + +Once the configuration is done, the ``'live'`` attribute must be set to 1 +in order to instantiate the aggregator device. It can be set back to 0 to +destroy the virtual device. The module will synchronously wait for the new +aggregator device to be successfully probed and if this doesn't happen, writing +to ``'live'`` will result in an error. This is a different behaviour from the +case when you create it using sysfs ``new_device`` interface. + +.. note:: + + For aggregators created via Sysfs, the configfs entries are + auto-generated and appear as ``/config/gpio-aggregator/_sysfs./``. You + cannot add or remove line directories with mkdir(2)/rmdir(2). To modify + lines, you must use the "delete_device" interface to tear down the + existing device and reconfigure it from scratch. However, you can still + toggle the aggregator with the ``live`` attribute and adjust the + ``key``, ``offset``, and ``name`` attributes for each line when ``live`` + is set to 0 by hand (i.e. it's not waiting for deferred probe). + +Sample configuration commands +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +.. code-block:: sh + + # Create a directory for an aggregator device + $ mkdir /sys/kernel/config/gpio-aggregator/agg0 + + # Configure each line + $ mkdir /sys/kernel/config/gpio-aggregator/agg0/line0 + $ echo gpiochip0 > /sys/kernel/config/gpio-aggregator/agg0/line0/key + $ echo 6 > /sys/kernel/config/gpio-aggregator/agg0/line0/offset + $ echo test0 > /sys/kernel/config/gpio-aggregator/agg0/line0/name + $ mkdir /sys/kernel/config/gpio-aggregator/agg0/line1 + $ echo gpiochip0 > /sys/kernel/config/gpio-aggregator/agg0/line1/key + $ echo 7 > /sys/kernel/config/gpio-aggregator/agg0/line1/offset + $ echo test1 > /sys/kernel/config/gpio-aggregator/agg0/line1/name + + # Activate the aggregator device + $ echo 1 > /sys/kernel/config/gpio-aggregator/agg0/live + + Generic GPIO Driver ------------------- --- linux-xilinx-6.8.0.orig/Documentation/admin-guide/hw-vuln/core-scheduling.rst +++ linux-xilinx-6.8.0/Documentation/admin-guide/hw-vuln/core-scheduling.rst @@ -67,8 +67,8 @@ will be performed for all tasks in the task group of ``pid``. arg5: - userspace pointer to an unsigned long for storing the cookie returned by - ``PR_SCHED_CORE_GET`` command. Should be 0 for all other commands. + userspace pointer to an unsigned long long for storing the cookie returned + by ``PR_SCHED_CORE_GET`` command. Should be 0 for all other commands. In order for a process to push a cookie to, or pull a cookie from a process, it is required to have the ptrace access mode: `PTRACE_MODE_READ_REALCREDS` to the --- linux-xilinx-6.8.0.orig/Documentation/admin-guide/hw-vuln/index.rst +++ linux-xilinx-6.8.0/Documentation/admin-guide/hw-vuln/index.rst @@ -21,3 +21,4 @@ cross-thread-rsb srso gather_data_sampling + reg-file-data-sampling --- linux-xilinx-6.8.0.orig/Documentation/admin-guide/hw-vuln/reg-file-data-sampling.rst +++ linux-xilinx-6.8.0/Documentation/admin-guide/hw-vuln/reg-file-data-sampling.rst @@ -0,0 +1,104 @@ +================================== +Register File Data Sampling (RFDS) +================================== + +Register File Data Sampling (RFDS) is a microarchitectural vulnerability that +only affects Intel Atom parts(also branded as E-cores). RFDS may allow +a malicious actor to infer data values previously used in floating point +registers, vector registers, or integer registers. RFDS does not provide the +ability to choose which data is inferred. CVE-2023-28746 is assigned to RFDS. + +Affected Processors +=================== +Below is the list of affected Intel processors [#f1]_: + + =================== ============ + Common name Family_Model + =================== ============ + ATOM_GOLDMONT 06_5CH + ATOM_GOLDMONT_D 06_5FH + ATOM_GOLDMONT_PLUS 06_7AH + ATOM_TREMONT_D 06_86H + ATOM_TREMONT 06_96H + ALDERLAKE 06_97H + ALDERLAKE_L 06_9AH + ATOM_TREMONT_L 06_9CH + RAPTORLAKE 06_B7H + RAPTORLAKE_P 06_BAH + ATOM_GRACEMONT 06_BEH + RAPTORLAKE_S 06_BFH + =================== ============ + +As an exception to this table, Intel Xeon E family parts ALDERLAKE(06_97H) and +RAPTORLAKE(06_B7H) codenamed Catlow are not affected. They are reported as +vulnerable in Linux because they share the same family/model with an affected +part. Unlike their affected counterparts, they do not enumerate RFDS_CLEAR or +CPUID.HYBRID. This information could be used to distinguish between the +affected and unaffected parts, but it is deemed not worth adding complexity as +the reporting is fixed automatically when these parts enumerate RFDS_NO. + +Mitigation +========== +Intel released a microcode update that enables software to clear sensitive +information using the VERW instruction. Like MDS, RFDS deploys the same +mitigation strategy to force the CPU to clear the affected buffers before an +attacker can extract the secrets. This is achieved by using the otherwise +unused and obsolete VERW instruction in combination with a microcode update. +The microcode clears the affected CPU buffers when the VERW instruction is +executed. + +Mitigation points +----------------- +VERW is executed by the kernel before returning to user space, and by KVM +before VMentry. None of the affected cores support SMT, so VERW is not required +at C-state transitions. + +New bits in IA32_ARCH_CAPABILITIES +---------------------------------- +Newer processors and microcode update on existing affected processors added new +bits to IA32_ARCH_CAPABILITIES MSR. These bits can be used to enumerate +vulnerability and mitigation capability: + +- Bit 27 - RFDS_NO - When set, processor is not affected by RFDS. +- Bit 28 - RFDS_CLEAR - When set, processor is affected by RFDS, and has the + microcode that clears the affected buffers on VERW execution. + +Mitigation control on the kernel command line +--------------------------------------------- +The kernel command line allows to control RFDS mitigation at boot time with the +parameter "reg_file_data_sampling=". The valid arguments are: + + ========== ================================================================= + on If the CPU is vulnerable, enable mitigation; CPU buffer clearing + on exit to userspace and before entering a VM. + off Disables mitigation. + ========== ================================================================= + +Mitigation default is selected by CONFIG_MITIGATION_RFDS. + +Mitigation status information +----------------------------- +The Linux kernel provides a sysfs interface to enumerate the current +vulnerability status of the system: whether the system is vulnerable, and +which mitigations are active. The relevant sysfs file is: + + /sys/devices/system/cpu/vulnerabilities/reg_file_data_sampling + +The possible values in this file are: + + .. list-table:: + + * - 'Not affected' + - The processor is not vulnerable + * - 'Vulnerable' + - The processor is vulnerable, but no mitigation enabled + * - 'Vulnerable: No microcode' + - The processor is vulnerable but microcode is not updated. + * - 'Mitigation: Clear Register File' + - The processor is vulnerable and the CPU buffer clearing mitigation is + enabled. + +References +---------- +.. [#f1] Affected Processors + https://www.intel.com/content/www/us/en/developer/topic-technology/software-security-guidance/processors-affected-consolidated-product-cpu-model.html --- linux-xilinx-6.8.0.orig/Documentation/admin-guide/hw-vuln/spectre.rst +++ linux-xilinx-6.8.0/Documentation/admin-guide/hw-vuln/spectre.rst @@ -138,11 +138,10 @@ the BHB might be shared across privilege levels even in the presence of Enhanced IBRS. -Currently the only known real-world BHB attack vector is via -unprivileged eBPF. Therefore, it's highly recommended to not enable -unprivileged eBPF, especially when eIBRS is used (without retpolines). -For a full mitigation against BHB attacks, it's recommended to use -retpolines (or eIBRS combined with retpolines). +Previously the only known real-world BHB attack vector was via unprivileged +eBPF. Further research has found attacks that don't require unprivileged eBPF. +For a full mitigation against BHB attacks it is recommended to set BHI_DIS_S or +use the BHB clearing sequence. Attack scenarios ---------------- @@ -430,6 +429,23 @@ 'PBRSB-eIBRS: Not affected' CPU is not affected by PBRSB =========================== ======================================================= + - Branch History Injection (BHI) protection status: + +.. list-table:: + + * - BHI: Not affected + - System is not affected + * - BHI: Retpoline + - System is protected by retpoline + * - BHI: BHI_DIS_S + - System is protected by BHI_DIS_S + * - BHI: SW loop, KVM SW loop + - System is protected by software clearing sequence + * - BHI: Vulnerable + - System is vulnerable to BHI + * - BHI: Vulnerable, KVM: SW loop + - System is vulnerable; KVM is protected by software clearing sequence + Full mitigation might require a microcode update from the CPU vendor. When the necessary microcode is not available, the kernel will report vulnerability. @@ -484,7 +500,11 @@ Systems which support enhanced IBRS (eIBRS) enable IBRS protection once at boot, by setting the IBRS bit, and they're automatically protected against - Spectre v2 variant attacks. + some Spectre v2 variant attacks. The BHB can still influence the choice of + indirect branch predictor entry, and although branch predictor entries are + isolated between modes when eIBRS is enabled, the BHB itself is not isolated + between modes. Systems which support BHI_DIS_S will set it to protect against + BHI attacks. On Intel's enhanced IBRS systems, this includes cross-thread branch target injections on SMT systems (STIBP). In other words, Intel eIBRS enables @@ -638,6 +658,18 @@ spectre_v2=off. Spectre variant 1 mitigations cannot be disabled. + spectre_bhi= + + [X86] Control mitigation of Branch History Injection + (BHI) vulnerability. This setting affects the deployment + of the HW BHI control and the SW BHB clearing sequence. + + on + (default) Enable the HW or SW mitigation as + needed. + off + Disable the mitigation. + For spectre_v2_user see Documentation/admin-guide/kernel-parameters.txt Mitigation selection guide --- linux-xilinx-6.8.0.orig/Documentation/admin-guide/kernel-parameters.txt +++ linux-xilinx-6.8.0/Documentation/admin-guide/kernel-parameters.txt @@ -679,12 +679,6 @@ loops can be debugged more effectively on production systems. - clocksource.max_cswd_read_retries= [KNL] - Number of clocksource_watchdog() retries due to - external delays before the clock will be marked - unstable. Defaults to two retries, that is, - three attempts to read the clock under test. - clocksource.verify_n_cpus= [KNL] Limit the number of CPUs checked for clocksources marked with CLOCK_SOURCE_VERIFY_PERCPU that @@ -848,6 +842,10 @@ Format: ,,,[,] + cpufreq_driver= [X86] Allow only the named cpu frequency scaling driver + to register. Example: cpufreq_driver=powernow-k8 + Format: { none | STRING } + cpuidle.off=1 [CPU_IDLE] disable the cpuidle sub-system @@ -1150,6 +1148,26 @@ The filter can be disabled or changed to another driver later using sysfs. + reg_file_data_sampling= + [X86] Controls mitigation for Register File Data + Sampling (RFDS) vulnerability. RFDS is a CPU + vulnerability which may allow userspace to infer + kernel data values previously stored in floating point + registers, vector registers, or integer registers. + RFDS only affects Intel Atom processors. + + on: Turns ON the mitigation. + off: Turns OFF the mitigation. + + This parameter overrides the compile time default set + by CONFIG_MITIGATION_RFDS. Mitigation cannot be + disabled when other VERW based mitigations (like MDS) + are enabled. In order to disable RFDS mitigation all + VERW based mitigations need to be disabled. + + For details see: + Documentation/admin-guide/hw-vuln/reg-file-data-sampling.rst + driver_async_probe= [KNL] List of driver names to be probed asynchronously. * matches with all driver names. If * is specified, the @@ -3320,9 +3338,7 @@ mem_encrypt= [X86-64] AMD Secure Memory Encryption (SME) control Valid arguments: on, off - Default (depends on kernel configuration option): - on (CONFIG_AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT=y) - off (CONFIG_AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT=n) + Default: off mem_encrypt=on: Activate SME mem_encrypt=off: Do not activate SME @@ -3381,6 +3397,9 @@ arch-independent options, each of which is an aggregation of existing arch-specific options. + Note, "mitigations" is supported if and only if the + kernel was built with CPU_MITIGATIONS=y. + off Disable all optional CPU mitigations. This improves system performance, but it may also @@ -3398,8 +3417,10 @@ nospectre_bhb [ARM64] nospectre_v1 [X86,PPC] nospectre_v2 [X86,PPC,S390,ARM64] + reg_file_data_sampling=off [X86] retbleed=off [X86] spec_store_bypass_disable=off [X86,PPC] + spectre_bhi=off [X86] spectre_v2_user=off [X86] srbds=off [X86,INTEL] ssbd=force-off [ARM64] @@ -4370,6 +4391,12 @@ nomsi [MSI] If the PCI_MSI kernel config parameter is enabled, this kernel boot option can be used to disable the use of MSI interrupts system-wide. + clearmsi [X86] Clears MSI/MSI-X enable bits early in boot + time in order to avoid issues like adapters + screaming irqs and preventing boot progress. + Also, it enforces the PCI Local Bus spec + rule that those bits should be 0 in system reset + events (useful for kexec/kdump cases). noioapicquirk [APIC] Disable all boot interrupt quirks. Safety option to keep boot IRQs enabled. This should never be necessary. @@ -4539,6 +4566,38 @@ bridges without forcing it upstream. Note: this removes isolation between devices and may put more devices in an IOMMU group. + config_acs= + Format: + @[; ...] + Specify one or more PCI devices (in the format + specified above) optionally prepended with flags + and separated by semicolons. The respective + capabilities will be enabled, disabled or + unchanged based on what is specified in + flags. + + ACS Flags is defined as follows: + bit-0 : ACS Source Validation + bit-1 : ACS Translation Blocking + bit-2 : ACS P2P Request Redirect + bit-3 : ACS P2P Completion Redirect + bit-4 : ACS Upstream Forwarding + bit-5 : ACS P2P Egress Control + bit-6 : ACS Direct Translated P2P + Each bit can be marked as: + '0' – force disabled + '1' – force enabled + 'x' – unchanged + For example, + pci=config_acs=10x + would configure all devices that support + ACS to enable P2P Request Redirect, disable + Translation Blocking, and leave Source + Validation unchanged from whatever power-up + or firmware set it to. + + Note: this may remove isolation between devices + and may put more devices in an IOMMU group. force_floating [S390] Force usage of floating interrupts. nomio [S390] Do not use MIO instructions. norid [S390] ignore the RID field and force use of @@ -4665,7 +4724,9 @@ none - Limited to cond_resched() calls voluntary - Limited to cond_resched() and might_sleep() calls full - Any section that isn't explicitly preempt disabled - can be preempted anytime. + can be preempted anytime. Tasks will also yield + contended spinlocks (if the critical section isn't + explicitly preempt disabled beyond the lock itself). print-fatal-signals= [KNL] debug: print fatal signals @@ -4705,6 +4766,16 @@ printk.time= Show timing data prefixed to each printk message line Format: (1/Y/y=enable, 0/N/n=disable) + proc_mem.force_override= [KNL] + Format: {always | ptrace | never} + Traditionally /proc/pid/mem allows memory permissions to be + overridden without restrictions. This option may be set to + restrict that. Can be one of: + - 'always': traditional behavior always allows mem overrides. + - 'ptrace': only allow mem overrides for active ptracers. + - 'never': never allow mem overrides. + If not specified, default is the CONFIG_PROC_MEM_* choice. + processor.max_cstate= [HW,ACPI] Limit processor to maximum C-state max_cstate=9 overrides any DMI blacklist limit. @@ -4715,11 +4786,9 @@ profile= [KNL] Enable kernel profiling via /proc/profile Format: [,] - Param: : "schedule", "sleep", or "kvm" + Param: : "schedule" or "kvm" [defaults to kernel profiling] Param: "schedule" - profile schedule points. - Param: "sleep" - profile D-state sleeping (millisecs). - Requires CONFIG_SCHEDSTATS Param: "kvm" - profile VM exits. Param: - step/bucket size as a power of 2 for statistical time based profiling. @@ -5034,6 +5103,11 @@ this kernel boot parameter, forcibly setting it to zero. + rcutree.enable_rcu_lazy= [KNL] + To save power, batch RCU callbacks and flush after + delay, memory pressure or callback list growing too + big. + rcuscale.gp_async= [KNL] Measure performance of asynchronous grace-period primitives such as call_rcu(). @@ -6012,6 +6086,15 @@ sonypi.*= [HW] Sony Programmable I/O Control Device driver See Documentation/admin-guide/laptops/sonypi.rst + spectre_bhi= [X86] Control mitigation of Branch History Injection + (BHI) vulnerability. This setting affects the + deployment of the HW BHI control and the SW BHB + clearing sequence. + + on - (default) Enable the HW or SW mitigation + as needed. + off - Disable the mitigation. + spectre_v2= [X86] Control mitigation of Spectre variant 2 (indirect branch speculation) vulnerability. The default operation protects the kernel from --- linux-xilinx-6.8.0.orig/Documentation/admin-guide/media/building.rst +++ linux-xilinx-6.8.0/Documentation/admin-guide/media/building.rst @@ -15,7 +15,7 @@ you should use the main media development tree ``master`` branch: - https://git.linuxtv.org/media_tree.git/ + https://git.linuxtv.org/media.git/ In this case, you may find some useful information at the `LinuxTv wiki pages `_: --- linux-xilinx-6.8.0.orig/Documentation/admin-guide/media/saa7134.rst +++ linux-xilinx-6.8.0/Documentation/admin-guide/media/saa7134.rst @@ -67,7 +67,7 @@ Please mail to linux-media AT vger.kernel.org unified diffs against the linux media git tree: - https://git.linuxtv.org/media_tree.git/ + https://git.linuxtv.org/media.git/ This is done by committing a patch at a clone of the git tree and submitting the patch using ``git send-email``. Don't forget to --- linux-xilinx-6.8.0.orig/Documentation/admin-guide/mm/damon/usage.rst +++ linux-xilinx-6.8.0/Documentation/admin-guide/mm/damon/usage.rst @@ -450,7 +450,7 @@ # # further filter out all cgroups except one at '/having_care_already' echo memcg > 1/type echo /having_care_already > 1/memcg_path - echo N > 1/matching + echo Y > 1/matching Note that ``anon`` and ``memcg`` filters are currently supported only when ``paddr`` :ref:`implementation ` is being used. --- linux-xilinx-6.8.0.orig/Documentation/admin-guide/mm/transhuge.rst +++ linux-xilinx-6.8.0/Documentation/admin-guide/mm/transhuge.rst @@ -202,12 +202,11 @@ cat /sys/kernel/mm/transparent_hugepage/hpage_pmd_size -khugepaged will be automatically started when one or more hugepage -sizes are enabled (either by directly setting "always" or "madvise", -or by setting "inherit" while the top-level enabled is set to "always" -or "madvise"), and it'll be automatically shutdown when the last -hugepage size is disabled (either by directly setting "never", or by -setting "inherit" while the top-level enabled is set to "never"). +khugepaged will be automatically started when PMD-sized THP is enabled +(either of the per-size anon control or the top-level control are set +to "always" or "madvise"), and it'll be automatically shutdown when +PMD-sized THP is disabled (when both the per-size anon control and the +top-level control are "never") Khugepaged controls ------------------- --- linux-xilinx-6.8.0.orig/Documentation/admin-guide/sysctl/net.rst +++ linux-xilinx-6.8.0/Documentation/admin-guide/sysctl/net.rst @@ -206,6 +206,11 @@ Default: 0 (off) +mem_pcpu_rsv +------------ + +Per-cpu reserved forward alloc cache size in page units. Default 1MB per CPU. + rmem_default ------------ --- linux-xilinx-6.8.0.orig/Documentation/arch/arm64/elf_hwcaps.rst +++ linux-xilinx-6.8.0/Documentation/arch/arm64/elf_hwcaps.rst @@ -174,22 +174,28 @@ Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0010. HWCAP2_SVE2 - Functionality implied by ID_AA64ZFR0_EL1.SVEver == 0b0001. + Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and + ID_AA64ZFR0_EL1.SVEver == 0b0001. HWCAP2_SVEAES - Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0001. + Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and + ID_AA64ZFR0_EL1.AES == 0b0001. HWCAP2_SVEPMULL - Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0010. + Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and + ID_AA64ZFR0_EL1.AES == 0b0010. HWCAP2_SVEBITPERM - Functionality implied by ID_AA64ZFR0_EL1.BitPerm == 0b0001. + Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and + ID_AA64ZFR0_EL1.BitPerm == 0b0001. HWCAP2_SVESHA3 - Functionality implied by ID_AA64ZFR0_EL1.SHA3 == 0b0001. + Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and + ID_AA64ZFR0_EL1.SHA3 == 0b0001. HWCAP2_SVESM4 - Functionality implied by ID_AA64ZFR0_EL1.SM4 == 0b0001. + Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and + ID_AA64ZFR0_EL1.SM4 == 0b0001. HWCAP2_FLAGM2 Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0010. @@ -198,16 +204,20 @@ Functionality implied by ID_AA64ISAR1_EL1.FRINTTS == 0b0001. HWCAP2_SVEI8MM - Functionality implied by ID_AA64ZFR0_EL1.I8MM == 0b0001. + Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and + ID_AA64ZFR0_EL1.I8MM == 0b0001. HWCAP2_SVEF32MM - Functionality implied by ID_AA64ZFR0_EL1.F32MM == 0b0001. + Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and + ID_AA64ZFR0_EL1.F32MM == 0b0001. HWCAP2_SVEF64MM - Functionality implied by ID_AA64ZFR0_EL1.F64MM == 0b0001. + Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and + ID_AA64ZFR0_EL1.F64MM == 0b0001. HWCAP2_SVEBF16 - Functionality implied by ID_AA64ZFR0_EL1.BF16 == 0b0001. + Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and + ID_AA64ZFR0_EL1.BF16 == 0b0001. HWCAP2_I8MM Functionality implied by ID_AA64ISAR1_EL1.I8MM == 0b0001. @@ -273,7 +283,8 @@ Functionality implied by ID_AA64ISAR1_EL1.BF16 == 0b0010. HWCAP2_SVE_EBF16 - Functionality implied by ID_AA64ZFR0_EL1.BF16 == 0b0010. + Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and + ID_AA64ZFR0_EL1.BF16 == 0b0010. HWCAP2_CSSC Functionality implied by ID_AA64ISAR2_EL1.CSSC == 0b0001. @@ -282,7 +293,8 @@ Functionality implied by ID_AA64ISAR2_EL1.RPRFM == 0b0001. HWCAP2_SVE2P1 - Functionality implied by ID_AA64ZFR0_EL1.SVEver == 0b0010. + Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and + ID_AA64ZFR0_EL1.SVEver == 0b0010. HWCAP2_SME2 Functionality implied by ID_AA64SMFR0_EL1.SMEver == 0b0001. @@ -309,7 +321,8 @@ Functionality implied by ID_AA64ISAR2_EL1.BC == 0b0001. HWCAP2_SVE_B16B16 - Functionality implied by ID_AA64ZFR0_EL1.B16B16 == 0b0001. + Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and + ID_AA64ZFR0_EL1.B16B16 == 0b0001. HWCAP2_LRCPC3 Functionality implied by ID_AA64ISAR1_EL1.LRCPC == 0b0011. --- linux-xilinx-6.8.0.orig/Documentation/arch/arm64/silicon-errata.rst +++ linux-xilinx-6.8.0/Documentation/arch/arm64/silicon-errata.rst @@ -54,6 +54,8 @@ +----------------+-----------------+-----------------+-----------------------------+ | Ampere | AmpereOne | AC03_CPU_38 | AMPERE_ERRATUM_AC03_CPU_38 | +----------------+-----------------+-----------------+-----------------------------+ +| Ampere | AmpereOne AC04 | AC04_CPU_10 | AMPERE_ERRATUM_AC03_CPU_38 | ++----------------+-----------------+-----------------+-----------------------------+ +----------------+-----------------+-----------------+-----------------------------+ | ARM | Cortex-A510 | #2457168 | ARM64_ERRATUM_2457168 | +----------------+-----------------+-----------------+-----------------------------+ @@ -123,22 +125,50 @@ +----------------+-----------------+-----------------+-----------------------------+ | ARM | Cortex-A77 | #1491015 | N/A | +----------------+-----------------+-----------------+-----------------------------+ +| ARM | Cortex-A76 | #3324349 | ARM64_ERRATUM_3194386 | ++----------------+-----------------+-----------------+-----------------------------+ | ARM | Cortex-A77 | #1508412 | ARM64_ERRATUM_1508412 | +----------------+-----------------+-----------------+-----------------------------+ +| ARM | Cortex-A77 | #3324348 | ARM64_ERRATUM_3194386 | ++----------------+-----------------+-----------------+-----------------------------+ +| ARM | Cortex-A78 | #3324344 | ARM64_ERRATUM_3194386 | ++----------------+-----------------+-----------------+-----------------------------+ +| ARM | Cortex-A78C | #3324346,3324347| ARM64_ERRATUM_3194386 | ++----------------+-----------------+-----------------+-----------------------------+ | ARM | Cortex-A710 | #2119858 | ARM64_ERRATUM_2119858 | +----------------+-----------------+-----------------+-----------------------------+ | ARM | Cortex-A710 | #2054223 | ARM64_ERRATUM_2054223 | +----------------+-----------------+-----------------+-----------------------------+ | ARM | Cortex-A710 | #2224489 | ARM64_ERRATUM_2224489 | +----------------+-----------------+-----------------+-----------------------------+ +| ARM | Cortex-A710 | #3324338 | ARM64_ERRATUM_3194386 | ++----------------+-----------------+-----------------+-----------------------------+ | ARM | Cortex-A715 | #2645198 | ARM64_ERRATUM_2645198 | +----------------+-----------------+-----------------+-----------------------------+ | ARM | Cortex-X1 | #1502854 | N/A | +----------------+-----------------+-----------------+-----------------------------+ +| ARM | Cortex-A715 | #3456084 | ARM64_ERRATUM_3194386 | ++----------------+-----------------+-----------------+-----------------------------+ +| ARM | Cortex-A720 | #3456091 | ARM64_ERRATUM_3194386 | ++----------------+-----------------+-----------------+-----------------------------+ +| ARM | Cortex-A725 | #3456106 | ARM64_ERRATUM_3194386 | ++----------------+-----------------+-----------------+-----------------------------+ +| ARM | Cortex-X1 | #3324344 | ARM64_ERRATUM_3194386 | ++----------------+-----------------+-----------------+-----------------------------+ +| ARM | Cortex-X1C | #3324346 | ARM64_ERRATUM_3194386 | ++----------------+-----------------+-----------------+-----------------------------+ | ARM | Cortex-X2 | #2119858 | ARM64_ERRATUM_2119858 | +----------------+-----------------+-----------------+-----------------------------+ | ARM | Cortex-X2 | #2224489 | ARM64_ERRATUM_2224489 | +----------------+-----------------+-----------------+-----------------------------+ +| ARM | Cortex-X2 | #3324338 | ARM64_ERRATUM_3194386 | ++----------------+-----------------+-----------------+-----------------------------+ +| ARM | Cortex-X3 | #3324335 | ARM64_ERRATUM_3194386 | ++----------------+-----------------+-----------------+-----------------------------+ +| ARM | Cortex-X4 | #3194386 | ARM64_ERRATUM_3194386 | ++----------------+-----------------+-----------------+-----------------------------+ +| ARM | Cortex-X925 | #3324334 | ARM64_ERRATUM_3194386 | ++----------------+-----------------+-----------------+-----------------------------+ | ARM | Neoverse-N1 | #1188873,1418040| ARM64_ERRATUM_1418040 | +----------------+-----------------+-----------------+-----------------------------+ | ARM | Neoverse-N1 | #1349291 | N/A | @@ -147,6 +177,8 @@ +----------------+-----------------+-----------------+-----------------------------+ | ARM | Neoverse-N1 | #1542419 | ARM64_ERRATUM_1542419 | +----------------+-----------------+-----------------+-----------------------------+ +| ARM | Neoverse-N1 | #3324349 | ARM64_ERRATUM_3194386 | ++----------------+-----------------+-----------------+-----------------------------+ | ARM | Neoverse-N2 | #2139208 | ARM64_ERRATUM_2139208 | +----------------+-----------------+-----------------+-----------------------------+ | ARM | Neoverse-N2 | #2067961 | ARM64_ERRATUM_2067961 | @@ -155,6 +187,16 @@ +----------------+-----------------+-----------------+-----------------------------+ | ARM | Neoverse-V1 | #1619801 | N/A | +----------------+-----------------+-----------------+-----------------------------+ +| ARM | Neoverse-N2 | #3324339 | ARM64_ERRATUM_3194386 | ++----------------+-----------------+-----------------+-----------------------------+ +| ARM | Neoverse-N3 | #3456111 | ARM64_ERRATUM_3194386 | ++----------------+-----------------+-----------------+-----------------------------+ +| ARM | Neoverse-V1 | #3324341 | ARM64_ERRATUM_3194386 | ++----------------+-----------------+-----------------+-----------------------------+ +| ARM | Neoverse-V2 | #3324336 | ARM64_ERRATUM_3194386 | ++----------------+-----------------+-----------------+-----------------------------+ +| ARM | Neoverse-V3 | #3312417 | ARM64_ERRATUM_3194386 | ++----------------+-----------------+-----------------+-----------------------------+ | ARM | MMU-500 | #841119,826419 | N/A | +----------------+-----------------+-----------------+-----------------------------+ | ARM | MMU-600 | #1076982,1209401| N/A | @@ -212,8 +254,11 @@ +----------------+-----------------+-----------------+-----------------------------+ | Hisilicon | Hip08 SMMU PMCG | #162001800 | N/A | +----------------+-----------------+-----------------+-----------------------------+ -| Hisilicon | Hip08 SMMU PMCG | #162001900 | N/A | -| | Hip09 SMMU PMCG | | | +| Hisilicon | Hip{08,09,09A,10| #162001900 | N/A | +| | ,10C,11} | | | +| | SMMU PMCG | | | ++----------------+-----------------+-----------------+-----------------------------+ +| Hisilicon | Hip09 | #162100801 | HISILICON_ERRATUM_162100801 | +----------------+-----------------+-----------------+-----------------------------+ +----------------+-----------------+-----------------+-----------------------------+ | Qualcomm Tech. | Kryo/Falkor v1 | E1003 | QCOM_FALKOR_ERRATUM_1003 | @@ -250,3 +295,5 @@ +----------------+-----------------+-----------------+-----------------------------+ | Microsoft | Azure Cobalt 100| #2253138 | ARM64_ERRATUM_2253138 | +----------------+-----------------+-----------------+-----------------------------+ +| Microsoft | Azure Cobalt 100| #3324339 | ARM64_ERRATUM_3194386 | ++----------------+-----------------+-----------------+-----------------------------+ --- linux-xilinx-6.8.0.orig/Documentation/arch/powerpc/kvm-nested.rst +++ linux-xilinx-6.8.0/Documentation/arch/powerpc/kvm-nested.rst @@ -546,7 +546,9 @@ +--------+-------+----+--------+----------------------------------+ | 0x1052 | 0x08 | RW | T | CTRL | +--------+-------+----+--------+----------------------------------+ -| 0x1053-| | | | Reserved | +| 0x1053 | 0x08 | RW | T | DPDES | ++--------+-------+----+--------+----------------------------------+ +| 0x1054-| | | | Reserved | | 0x1FFF | | | | | +--------+-------+----+--------+----------------------------------+ | 0x2000 | 0x04 | RW | T | CR | --- linux-xilinx-6.8.0.orig/Documentation/arch/x86/amd-memory-encryption.rst +++ linux-xilinx-6.8.0/Documentation/arch/x86/amd-memory-encryption.rst @@ -87,14 +87,14 @@ kernel is non-zero). SME can also be enabled and activated in the BIOS. If SME is enabled and -activated in the BIOS, then all memory accesses will be encrypted and it will -not be necessary to activate the Linux memory encryption support. If the BIOS -merely enables SME (sets bit 23 of the MSR_AMD64_SYSCFG), then Linux can activate -memory encryption by default (CONFIG_AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT=y) or -by supplying mem_encrypt=on on the kernel command line. However, if BIOS does -not enable SME, then Linux will not be able to activate memory encryption, even -if configured to do so by default or the mem_encrypt=on command line parameter -is specified. +activated in the BIOS, then all memory accesses will be encrypted and it +will not be necessary to activate the Linux memory encryption support. + +If the BIOS merely enables SME (sets bit 23 of the MSR_AMD64_SYSCFG), +then memory encryption can be enabled by supplying mem_encrypt=on on the +kernel command line. However, if BIOS does not enable SME, then Linux +will not be able to activate memory encryption, even if configured to do +so by default or the mem_encrypt=on command line parameter is specified. Secure Nested Paging (SNP) ========================== --- linux-xilinx-6.8.0.orig/Documentation/arch/x86/boot.rst +++ linux-xilinx-6.8.0/Documentation/arch/x86/boot.rst @@ -895,10 +895,19 @@ The kernel runtime start address is determined by the following algorithm:: - if (relocatable_kernel) - runtime_start = align_up(load_address, kernel_alignment) - else - runtime_start = pref_address + if (relocatable_kernel) { + if (load_address < pref_address) + load_address = pref_address; + runtime_start = align_up(load_address, kernel_alignment); + } else { + runtime_start = pref_address; + } + +Hence the necessary memory window location and size can be estimated by +a boot loader as:: + + memory_window_start = runtime_start; + memory_window_size = init_size; ============ =============== Field name: handover_offset --- linux-xilinx-6.8.0.orig/Documentation/bpf/map_lpm_trie.rst +++ linux-xilinx-6.8.0/Documentation/bpf/map_lpm_trie.rst @@ -17,7 +17,7 @@ LPM tries may be created with a maximum prefix length that is a multiple of 8, in the range from 8 to 2048. The key used for lookup and update -operations is a ``struct bpf_lpm_trie_key``, extended by +operations is a ``struct bpf_lpm_trie_key_u8``, extended by ``max_prefixlen/8`` bytes. - For IPv4 addresses the data length is 4 bytes --- linux-xilinx-6.8.0.orig/Documentation/cdrom/cdrom-standard.rst +++ linux-xilinx-6.8.0/Documentation/cdrom/cdrom-standard.rst @@ -217,7 +217,7 @@ int (*media_changed)(struct cdrom_device_info *, int); int (*tray_move)(struct cdrom_device_info *, int); int (*lock_door)(struct cdrom_device_info *, int); - int (*select_speed)(struct cdrom_device_info *, int); + int (*select_speed)(struct cdrom_device_info *, unsigned long); int (*get_last_session) (struct cdrom_device_info *, struct cdrom_multisession *); int (*get_mcn)(struct cdrom_device_info *, struct cdrom_mcn *); @@ -396,7 +396,7 @@ :: - int select_speed(struct cdrom_device_info *cdi, int speed) + int select_speed(struct cdrom_device_info *cdi, unsigned long speed) Some CD-ROM drives are capable of changing their head-speed. There are several reasons for changing the speed of a CD-ROM drive. Badly --- linux-xilinx-6.8.0.orig/Documentation/cgroups/namespace.txt +++ linux-xilinx-6.8.0/Documentation/cgroups/namespace.txt @@ -0,0 +1,142 @@ + CGroup Namespaces + +CGroup Namespace provides a mechanism to virtualize the view of the +/proc//cgroup file. The CLONE_NEWCGROUP clone-flag can be used with +clone() and unshare() syscalls to create a new cgroup namespace. +The process running inside the cgroup namespace will have its /proc//cgroup +output restricted to cgroupns-root. cgroupns-root is the cgroup of the process +at the time of creation of the cgroup namespace. + +Prior to CGroup Namespace, the /proc//cgroup file used to show complete +path of the cgroup of a process. In a container setup (where a set of cgroups +and namespaces are intended to isolate processes), the /proc//cgroup file +may leak potential system level information to the isolated processes. + +For Example: + $ cat /proc/self/cgroup + 0:cpuset,cpu,cpuacct,memory,devices,freezer,hugetlb:/batchjobs/container_id1 + +The path '/batchjobs/container_id1' can generally be considered as system-data +and its desirable to not expose it to the isolated process. + +CGroup Namespaces can be used to restrict visibility of this path. +For Example: + # Before creating cgroup namespace + $ ls -l /proc/self/ns/cgroup + lrwxrwxrwx 1 root root 0 2014-07-15 10:37 /proc/self/ns/cgroup -> cgroup:[4026531835] + $ cat /proc/self/cgroup + 0:cpuset,cpu,cpuacct,memory,devices,freezer,hugetlb:/batchjobs/container_id1 + + # unshare(CLONE_NEWCGROUP) and exec /bin/bash + $ ~/unshare -c + [ns]$ ls -l /proc/self/ns/cgroup + lrwxrwxrwx 1 root root 0 2014-07-15 10:35 /proc/self/ns/cgroup -> cgroup:[4026532183] + # From within new cgroupns, process sees that its in the root cgroup + [ns]$ cat /proc/self/cgroup + 0:cpuset,cpu,cpuacct,memory,devices,freezer,hugetlb:/ + + # From global cgroupns: + $ cat /proc//cgroup + 0:cpuset,cpu,cpuacct,memory,devices,freezer,hugetlb:/batchjobs/container_id1 + + # Unshare cgroupns along with userns and mountns + # Following calls unshare(CLONE_NEWCGROUP|CLONE_NEWUSER|CLONE_NEWNS), then + # sets up uid/gid map and execs /bin/bash + $ ~/unshare -c -u -m + # Originally, we were in /batchjobs/container_id1 cgroup. Mount our own cgroup + # hierarchy. + [ns]$ mount -t cgroup cgroup /tmp/cgroup + [ns]$ ls -l /tmp/cgroup + total 0 + -r--r--r-- 1 root root 0 2014-10-13 09:32 cgroup.controllers + -r--r--r-- 1 root root 0 2014-10-13 09:32 cgroup.populated + -rw-r--r-- 1 root root 0 2014-10-13 09:25 cgroup.procs + -rw-r--r-- 1 root root 0 2014-10-13 09:32 cgroup.subtree_control + +The cgroupns-root (/batchjobs/container_id1 in above example) becomes the +filesystem root for the namespace specific cgroupfs mount. + +The virtualization of /proc/self/cgroup file combined with restricting +the view of cgroup hierarchy by namespace-private cgroupfs mount +should provide a completely isolated cgroup view inside the container. + +In its current form, the cgroup namespaces patcheset provides following +behavior: + +(1) The 'cgroupns-root' for a cgroup namespace is the cgroup in which + the process calling unshare is running. + For ex. if a process in /batchjobs/container_id1 cgroup calls unshare, + cgroup /batchjobs/container_id1 becomes the cgroupns-root. + For the init_cgroup_ns, this is the real root ('/') cgroup + (identified in code as cgrp_dfl_root.cgrp). + +(2) The cgroupns-root cgroup does not change even if the namespace + creator process later moves to a different cgroup. + $ ~/unshare -c # unshare cgroupns in some cgroup + [ns]$ cat /proc/self/cgroup + 0:cpuset,cpu,cpuacct,memory,devices,freezer,hugetlb:/ + [ns]$ mkdir sub_cgrp_1 + [ns]$ echo 0 > sub_cgrp_1/cgroup.procs + [ns]$ cat /proc/self/cgroup + 0:cpuset,cpu,cpuacct,memory,devices,freezer,hugetlb:/sub_cgrp_1 + +(3) Each process gets its CGROUPNS specific view of /proc//cgroup +(a) Processes running inside the cgroup namespace will be able to see + cgroup paths (in /proc/self/cgroup) only inside their root cgroup + [ns]$ sleep 100000 & # From within unshared cgroupns + [1] 7353 + [ns]$ echo 7353 > sub_cgrp_1/cgroup.procs + [ns]$ cat /proc/7353/cgroup + 0:cpuset,cpu,cpuacct,memory,devices,freezer,hugetlb:/sub_cgrp_1 + +(b) From global cgroupns, the real cgroup path will be visible: + $ cat /proc/7353/cgroup + 0:cpuset,cpu,cpuacct,memory,devices,freezer,hugetlb:/batchjobs/container_id1/sub_cgrp_1 + +(c) From a sibling cgroupns (cgroupns root-ed at a different cgroup), cgroup + path relative to its own cgroupns-root will be shown: + # ns2's cgroupns-root is at '/batchjobs/container_id2' + [ns2]$ cat /proc/7353/cgroup + 0:cpuset,cpu,cpuacct,memory,devices,freezer,hugetlb:/../container_id2/sub_cgrp_1 + + Note that the relative path always starts with '/' to indicate that its + relative to the cgroupns-root of the caller. + +(4) Processes inside a cgroupns can move in-and-out of the cgroupns-root + (if they have proper access to external cgroups). + # From inside cgroupns (with cgroupns-root at /batchjobs/container_id1), and + # assuming that the global hierarchy is still accessible inside cgroupns: + $ cat /proc/7353/cgroup + 0:cpuset,cpu,cpuacct,memory,devices,freezer,hugetlb:/sub_cgrp_1 + $ echo 7353 > batchjobs/container_id2/cgroup.procs + $ cat /proc/7353/cgroup + 0:cpuset,cpu,cpuacct,memory,devices,freezer,hugetlb:/../container_id2 + + Note that this kind of setup is not encouraged. A task inside cgroupns + should only be exposed to its own cgroupns hierarchy. Otherwise it makes + the virtualization of /proc//cgroup less useful. + +(5) Setns to another cgroup namespace is allowed when: + (a) the process has CAP_SYS_ADMIN in its current userns + (b) the process has CAP_SYS_ADMIN in the target cgroupns' userns + No implicit cgroup changes happen with attaching to another cgroupns. It + is expected that the somone moves the attaching process under the target + cgroupns-root. + +(6) When some thread from a multi-threaded process unshares its + cgroup-namespace, the new cgroupns gets applied to the entire process (all + the threads). For the unified-hierarchy this is expected as it only allows + process-level containerization. For the legacy hierarchies this may be + unexpected. So all the threads in the process will have the same cgroup. + +(7) The cgroup namespace is alive as long as there is atleast 1 + process inside it. When the last process exits, the cgroup + namespace is destroyed. The cgroupns-root and the actual cgroups + remain though. + +(8) Namespace specific cgroup hierarchy can be mounted by a process running + inside cgroupns: + $ mount -t cgroup -o __DEVEL__sane_behavior cgroup $MOUNT_POINT + + This will mount the unified cgroup hierarchy with cgroupns-root as the + filesystem root. The process needs CAP_SYS_ADMIN in its userns and mntns. --- linux-xilinx-6.8.0.orig/Documentation/conf.py +++ linux-xilinx-6.8.0/Documentation/conf.py @@ -75,6 +75,8 @@ "__rcu", "__user", "__force", + "__counted_by_le", + "__counted_by_be", # include/linux/compiler_attributes.h: "__alias", @@ -346,9 +348,9 @@ html_static_path = ['sphinx-static'] # If true, Docutils "smart quotes" will be used to convert quotes and dashes -# to typographically correct entities. This will convert "--" to "—", -# which is not always what we want, so disable it. -smartquotes = False +# to typographically correct entities. However, conversion of "--" to "—" +# is not always what we want, so enable only quotes. +smartquotes_action = 'q' # Custom sidebar templates, maps document names to template names. # Note that the RTD theme ignores this --- linux-xilinx-6.8.0.orig/Documentation/dev-tools/kselftest.rst +++ linux-xilinx-6.8.0/Documentation/dev-tools/kselftest.rst @@ -255,9 +255,21 @@ TEST_PROGS_EXTENDED, TEST_GEN_PROGS_EXTENDED mean it is the executable which is not tested by default. + TEST_FILES, TEST_GEN_FILES mean it is the file which is used by test. + TEST_INCLUDES is similar to TEST_FILES, it lists files which should be + included when exporting or installing the tests, with the following + differences: + + * symlinks to files in other directories are preserved + * the part of paths below tools/testing/selftests/ is preserved when + copying the files to the output directory + + TEST_INCLUDES is meant to list dependencies located in other directories of + the selftests hierarchy. + * First use the headers inside the kernel source and/or git repo, and then the system headers. Headers for the kernel release as opposed to headers installed by the distro on the system should be the primary focus to be able --- linux-xilinx-6.8.0.orig/Documentation/dev-tools/ubsan.rst +++ linux-xilinx-6.8.0/Documentation/dev-tools/ubsan.rst @@ -49,34 +49,22 @@ Usage ----- -To enable UBSAN configure kernel with:: +To enable UBSAN, configure the kernel with:: - CONFIG_UBSAN=y + CONFIG_UBSAN=y -and to check the entire kernel:: - - CONFIG_UBSAN_SANITIZE_ALL=y - -To enable instrumentation for specific files or directories, add a line -similar to the following to the respective kernel Makefile: - -- For a single file (e.g. main.o):: - - UBSAN_SANITIZE_main.o := y - -- For all files in one directory:: - - UBSAN_SANITIZE := y - -To exclude files from being instrumented even if -``CONFIG_UBSAN_SANITIZE_ALL=y``, use:: +To exclude files from being instrumented use:: UBSAN_SANITIZE_main.o := n -and:: +and to exclude all targets in one directory use:: UBSAN_SANITIZE := n +When disabled for all targets, specific files can be enabled using:: + + UBSAN_SANITIZE_main.o := y + Detection of unaligned accesses controlled through the separate option - CONFIG_UBSAN_ALIGNMENT. It's off by default on architectures that support unaligned accesses (CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y). One could --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/arm/zynq/zynq-efuse.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/arm/zynq/zynq-efuse.txt @@ -0,0 +1,15 @@ +Device tree bindings for Zynq's eFuse Controller + +The Zynq eFuse controller provides the access to the chip efuses which contain +information about device DNA, security settings and also device status. + +Required properties: + compatible: Compatibility string. Must be "xlnx,zynq-efuse". + reg: Specify the base and size of the EFUSE controller registers + in the memory map. E.g.: reg = <0xf800d000 0x20>; + +Example: +efuse: efuse@f800d000 { + compatible = "xlnx,zynq-efuse"; + reg = <0xf800d000 0x20>; +}; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/cache/qcom,llcc.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/cache/qcom,llcc.yaml @@ -38,11 +38,11 @@ reg: minItems: 2 - maxItems: 9 + maxItems: 10 reg-names: minItems: 2 - maxItems: 9 + maxItems: 10 interrupts: maxItems: 1 @@ -66,7 +66,6 @@ compatible: contains: enum: - - qcom,qdu1000-llcc - qcom,sc7180-llcc - qcom,sm6350-llcc then: @@ -104,8 +103,39 @@ compatible: contains: enum: + - qcom,qdu1000-llcc - qcom,sc8180x-llcc - qcom,sc8280xp-llcc + then: + properties: + reg: + items: + - description: LLCC0 base register region + - description: LLCC1 base register region + - description: LLCC2 base register region + - description: LLCC3 base register region + - description: LLCC4 base register region + - description: LLCC5 base register region + - description: LLCC6 base register region + - description: LLCC7 base register region + - description: LLCC broadcast base register region + reg-names: + items: + - const: llcc0_base + - const: llcc1_base + - const: llcc2_base + - const: llcc3_base + - const: llcc4_base + - const: llcc5_base + - const: llcc6_base + - const: llcc7_base + - const: llcc_broadcast_base + + - if: + properties: + compatible: + contains: + enum: - qcom,x1e80100-llcc then: properties: @@ -120,6 +150,7 @@ - description: LLCC6 base register region - description: LLCC7 base register region - description: LLCC broadcast base register region + - description: LLCC broadcast AND register region reg-names: items: - const: llcc0_base @@ -131,6 +162,7 @@ - const: llcc6_base - const: llcc7_base - const: llcc_broadcast_base + - const: llcc_broadcast_and_base - if: properties: --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/clock/adi,axi-clkgen.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/clock/adi,axi-clkgen.yaml @@ -26,9 +26,21 @@ description: Specifies the reference clock(s) from which the output frequency is derived. This must either reference one clock if only the first clock - input is connected or two if both clock inputs are connected. - minItems: 1 - maxItems: 2 + input is connected or two if both clock inputs are connected. The last + clock is the AXI bus clock that needs to be enabled so we can access the + core registers. + minItems: 2 + maxItems: 3 + + clock-names: + oneOf: + - items: + - const: clkin1 + - const: s_axi_aclk + - items: + - const: clkin1 + - const: clkin2 + - const: s_axi_aclk '#clock-cells': const: 0 @@ -40,6 +52,7 @@ - compatible - reg - clocks + - clock-names - '#clock-cells' additionalProperties: false @@ -50,5 +63,6 @@ compatible = "adi,axi-clkgen-2.00.a"; #clock-cells = <0>; reg = <0xff000000 0x1000>; - clocks = <&osc 1>; + clocks = <&osc 1>, <&clkc 15>; + clock-names = "clkin1", "s_axi_aclk"; }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/clock/idt,idt8t49n24x.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/clock/idt,idt8t49n24x.txt @@ -0,0 +1,156 @@ +Binding for IDT 8T49N24x Universal Frequency Translator + +The 8T49N241 has one fractional-feedback PLL that can be used as a +jitter attenuator and frequency translator. It is equipped with one +integer and three fractional output dividers, allowing the generation +of up to four different output frequencies, ranging from 8kHz to 1GHz. +These frequencies are completely independent of each other, the input +reference frequencies and the crystal reference frequency. The device +places virtually no constraints on input to output frequency conversion, +supporting all FEC rates, including the new revision of ITU-T +Recommendation G.709 (2009), most with 0ppm conversion error. +The outputs may select among LVPECL, LVDS, HCSL or LVCMOS output levels. + +The driver can read a full register map from the DT, and will use that +register map to initialize the attached part (via I2C) when the system +boots. Any configuration not supported by the common clock framework +must be done via the full register map, including optimized settings. + +The 8T49N241 accepts up to two differential or single-ended input clocks +and a fundamental-mode crystal input. The internal PLL can lock to either +of the input reference clocks or just to the crystal to behave as a +frequency synthesizer. The PLL can use the second input for redundant +backup of the primary input reference, but in this case, both input clock +references must be related in frequency. + +All outputs are currently assumed to be LVDS, unless overridden in the +full register map in the DT. + +==I2C device node== + +Required properties: +- compatible: shall be one of "idt,idt8t49n241" +- reg: i2c device address, shall be one of 0x7C, 0x6C, 0x7D, 0x6D, + 0x7E, 0x6E, 0x7F, 0x6F. +- #clock-cells: From common clock bindings: Shall be 1. + +- clocks: from common clock binding; input clock handle. Required. +- clock-names: from common clock binding; clock input names, shall be + one of "input-clk0", "input-clk1", "input-xtal". Required. + +==Mapping between clock specifier and physical pins== + +When referencing the provided clock in the DT using phandle and +clock specifier, the following mapping applies: + +8T49N241: + 0 -- Q0 + 1 -- Q1 + 2 -- Q2 + 3 -- Q3 + +==Example== + +/* Example1: 25MHz input clock (via CLK0) */ + +ref25: ref25m { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; +}; + +i2c-master-node { + + /* IDT 8T49N241 i2c universal frequency translator */ + i2c241: clock-generator@6a { + compatible = "idt,idt8t49n241"; + reg = <0x6c>; + #clock-cells = <1>; + + /* Connect input-clk0 to 25MHz reference */ + clocks = <&ref25m>; + clock-names = "input-clk0"; + }; +}; + +/* Consumer referencing the 8T49N241 pin Q1 */ +consumer { + ... + clocks = <&i2c241 1>; + ... +} + +/* Example2: 40MHz xtal frequency, specify all settings */ + +ref40: ref40m { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <40000000>; +}; + +i2c-master-node { + + /* IDT 8T49N241 i2c universal frequency translator */ + i2c241: clock-generator@6a { + compatible = "idt,idt8t49n241"; + reg = <0x6c>; + #clock-cells = <1>; + + /* Connect input-xtal to 40MHz reference */ + clocks = <&ref40m>; + clock-names = "input-xtal"; + + settings=[ +09 50 00 60 67 C5 6C FF 03 00 30 00 00 01 00 00 +01 07 00 00 07 00 00 77 6D 06 00 00 00 00 00 FF +FF FF FF 00 3F 00 2A 00 16 33 33 00 01 00 00 D0 +00 00 00 00 00 00 00 00 00 04 00 00 00 02 00 00 +00 00 00 00 00 00 00 17 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 D7 0A 2B 20 00 00 00 0B +00 00 00 00 00 00 00 00 00 00 27 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +C3 00 08 01 00 00 00 00 00 00 00 00 00 30 00 00 +00 0A 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 85 00 00 9C 01 D4 02 71 07 00 00 00 +00 83 00 10 02 08 8C +]; + }; +}; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/clock/imx93-clock.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/clock/imx93-clock.yaml @@ -16,6 +16,7 @@ properties: compatible: enum: + - fsl,imx91-ccm - fsl,imx93-ccm reg: --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/clock/renesas,proxo.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/clock/renesas,proxo.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/renesas,proxo.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas ProXO Oscillator + +maintainers: + - Alex Helms + +description: + Renesas ProXO is a family of programmable ultra-low phase noise + quartz-based oscillators. + +properties: + '#clock-cells': + const: 0 + + compatible: + enum: + - renesas,proxo-xp + + reg: + maxItems: 1 + + renesas,crystal-frequency: + description: Internal crystal frequency, default is 50000000 (50MHz) + $ref: /schemas/types.yaml#/definitions/uint32 + +required: + - '#clock-cells' + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + proxo: clock-controller@55 { + compatible = "renesas,proxo-xp"; + reg = <0x55>; + #clock-cells = <0>; + }; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/clock/silabs,si5324.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/clock/silabs,si5324.txt @@ -0,0 +1,78 @@ +Binding for Silicon Labs si5324, si5328 and si5319 programmable +I2C clock generator. + +Reference +This binding uses the common clock binding[1]. +The si5324 is programmable i2c low-bandwidth, jitter-attenuating, precision +clock multiplier with up to 2 output clocks. The internal structure can be +found in [2]. +The internal pin structure of si5328 and si5319 can be found in [3]. + +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt +[2] Si5324 Data Sheet + http://www.silabs.com/Support%20Documents/TechnicalDocs/Si5324.pdf +[3] Si53xx Reference Manual + http://www.silabs.com/Support%20Documents/TechnicalDocs/ + Si53xxReferenceManual.pdf + +==I2C device node== + +Required properties: +- compatible: should be one of + "silabs,si5324" + "silabs,si5319" + "silabs,si5328" +- reg: i2c device address. +- #clock-cells: from common clock binding; shall be set to 1. +- clocks: from common clock binding; list of parent clock + handles, clock name should be one of + "xtal" + "clkin1" + "clkin2" +- #address-cells: shall be set to 1. +- #size-cells: shall be set to 0. + +Optional properties: +- silabs,pll-source: pair of (number, source) for each pll. Allows + to overwrite clock source of pll. + +==Child nodes== + +Each of the clock outputs can be overwritten individually by +using a child node to the I2C device node. If a child node for a clock +output is not set, the eeprom configuration is not overwritten. + +Required child node properties: +- reg: number of clock output. +- clock-frequency: default output frequency at power on + +Optional child node properties: +- silabs,drive-strength: output drive strength in mA, shall be one of {2,4,6,8}. + +Example: +Following example describes the ZCU102 board with hdmi design which +uses si5319 as clock generator. XTAL is hard-wired on the board to act +as input clock with a frequency of 114.285MHz. + +refhdmi: refhdmi { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <114285000>; +}; + +/* Si5319 i2c clock generator */ +si5319: clock-generator@68 { + status = "okay"; + compatible = "silabs,si5319"; + reg = <0x68>; + #address-cells = <1>; + #size-cells = <0>; + #clock-cells = <1>; + clocks = <&refhdmi>; + clock-names = "xtal"; + + clk0 { + reg = <0>; + clock-frequency = <27000000>; + }; +}; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/clock/xlnx,vcu.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/clock/xlnx,vcu.txt @@ -0,0 +1,33 @@ +LogicoreIP designed compatible with Xilinx ZYNQ family. +------------------------------------------------------- + +General concept +--------------- + +LogicoreIP design to provide the isolation between processing system +and programmable logic. Also provides the list of register set to configure +the frequency. + +Required properties: +- compatible: shall be one of: + "xlnx,vcu" + "xlnx,vcu-logicoreip-1.0" +- reg : The base offset and size of the VCU_PL_SLCR register space. +- clocks: phandle for aclk and pll_ref clocksource +- clock-names: The identification string, "aclk", is always required for + the axi clock. "pll_ref" is required for pll. + +Optional properties: +- reset-gpios : The GPIO used to reset the VCU, if available. Need use this + reset gpio when in design 'vcu_resetn' is driven by gpio. See + Documentation/devicetree/bindings/gpio/gpio.txt for details. + +Example: + + xlnx_vcu: vcu@a0040000 { + compatible = "xlnx,vcu-logicoreip-1.0"; + reg = <0x0 0xa0040000 0x0 0x1000>; + reset-gpios = <&gpio 0x4e GPIO_ACTIVE_HIGH>;t + clocks = <&si570_1>, <&clkc 71>; + clock-names = "pll_ref", "aclk"; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml @@ -10,6 +10,8 @@ - Kalyani Akula - Michal Simek +deprecated: true + description: | The ZynqMP AES-GCM hardened cryptographic accelerator is used to encrypt or decrypt the data with provided key and initialization vector. --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/crypto/zynqmp-rsa.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/crypto/zynqmp-rsa.txt @@ -0,0 +1,12 @@ +Xilinx ZynqMP RSA hw acceleration support + +The zynqmp PS-RSA hw accelerator is used to encrypt/decrypt +the given user data. + +Required properties: +- compatible: should contain "xlnx,zynqmp-rsa" (deprecated) + +Example: + xlnx_rsa: zynqmp_rsa { + compatible = "xlnx,zynqmp-rsa"; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/display/bridge/adi,adv7533.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/display/bridge/adi,adv7533.yaml @@ -90,7 +90,7 @@ adi,dsi-lanes: description: Number of DSI data lanes connected to the DSI host. $ref: /schemas/types.yaml#/definitions/uint32 - enum: [ 1, 2, 3, 4 ] + enum: [ 2, 3, 4 ] "#sound-dai-cells": const: 0 --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml @@ -127,6 +127,7 @@ - qcom,dsi-phy-20nm - qcom,dsi-phy-28nm-8226 - qcom,dsi-phy-28nm-hpm + - qcom,dsi-phy-28nm-hpm-fam-b - qcom,dsi-phy-28nm-lp - qcom,hdmi-phy-8084 - qcom,hdmi-phy-8660 --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/display/msm/qcom,sm8150-mdss.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/display/msm/qcom,sm8150-mdss.yaml @@ -53,6 +53,15 @@ compatible: const: qcom,sm8150-dpu + "^displayport-controller@[0-9a-f]+$": + type: object + additionalProperties: true + + properties: + compatible: + contains: + const: qcom,sm8150-dp + "^dsi@[0-9a-f]+$": type: object additionalProperties: true --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/display/xlnx/bridge.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/display/xlnx/bridge.txt @@ -0,0 +1,29 @@ +Xilinx DRM bridge +----------------- + +The Xilinx DRM provides the interface layer called Xilinx bridge to bridge +multiple components with a series of functions. It models a simple +unidirectional communication, single client -> single bridge. The client +is not limited to DRM compatible drivers, but can be any subsystem driver, +but the client driver should call the bridge functions explicitly. + +Provider +-------- + +The bridge provider should assign a corresponding of_node to struct xlnx_bridge. +For example, if its own node is used, + + provider_node: provider_node { + }; + + bridge.of_node = provider_device->of_node; + +Client +------ + +The bridge client should have a phandle to the bridge device node. The bridge +device node should be passed to get a bridge instance, + + client_node { + xlnx,bridge = <&provider_node>; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/display/xlnx/xlnx,dp-tx.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/display/xlnx/xlnx,dp-tx.yaml @@ -0,0 +1,225 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/xlnx/xlnx,dp-tx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx DisplayPort Transmitter Subsystem + +maintainers: + - Rajesh Gugulothu + +description: | + The Xilinx DisplayPort Tx Subsystem contains several subcores to implement + a DisplayPort Transmitter and outputs video data using DisplayPort protocol. + For more details, please refer to PG199 at + https://www.xilinx.com/support/documentation/ip_documentation/dp_tx_subsystem/v2_1/pg199-displayport-tx-subsystem.pdf + +properties: + compatible: + enum: + - xlnx,v-dp-txss-3.0 + - xlnx,v-dp-txss-3.1 + + reg: + maxItems: 2 + description: DisplayPort Transmitter Subsystem registers + + reg-names: + items: + - const: dp_base + - const: gt_quad_base + + interrupts: + minItems: 1 + maxItems: 4 + + interrupt-names: + description: Only dptxss_dp_irq is mandatory. Others are optional. + dptxss_timer_irq will be present when HDCP 1x or 2x is selected. + dptxss_hdcp_irq will be present when HDCP 1x is selected. + dptxss_hdcp22_cipher_irq will be present when HDCP 2x is selected. + items: + - const: dptxss_dp_irq + - const: dptxss_timer_irq + - const: dptxss_hdcp_irq + - const: dptxss_hdcp22_cipher_irq + + clocks: + description: List of clock specifiers + items: + - description: AXI Lite clock + - description: Video clock + + clock-names: + items: + - const: s_axi_aclk + - const: tx_vid_clk + + phys: + description: This denotes phandles for phy lanes registered + for DP protocol.DisplayPort always require 4 lanes + + phy-names: + items: + - const: dp-phy0 + - const: dp-phy1 + - const: dp-phy2 + - const: dp-phy3 + + xlnx,vtc-offset: + description: This denotes register offset address of VTC sub-core of + DisplayPort Transmitter Subsystem. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + + xlnx,max-lanes: + description: Max number of lanes that IP configured with. + Possible values are 1, 2, 4. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [1, 2, 4] + + xlnx,max-link-rate: + description: | + Max link rate that IP configured with.Possible values are as below - + 162000 - 1.6 Gb/s + 270000 - 2.7 Gb/s + 540000 - 5.4 Gb/s + 810000 - 8.1 Gb/s + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [162000, 270000, 540000, 810000] + + xlnx,bpc: + description: | + Max BPC value that IP configured with. For example if IP is configured + with 10 BPC means it supports (6, 8, 10) up to 10bpc. + Possible values are 6, 8, 10, 12, 16. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [6, 8, 10, 12, 16] + + xlnx,audio-channels: + description: | + This denotes number of audio channels enabled in the IP + configuration. Possible values are 2, 3, 4, 5, 6, 7, 8. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [2, 3, 4, 5, 6, 7, 8] + + xlnx,hdcp22-enable: + type: boolean + description: | + Present when HDCP2.2 is present in design. + + xlnx,hdcp-enable: + type: boolean + description: | + Present when HDCP1.4 is present in design. + + xlnx,versal-gt: + type: boolean + description: | + Boolean property present when versal GT is present in design. + + xlnx,xilinx-vfmc: + description: phandle of xilinx video FMC node + $ref: /schemas/types.yaml#/definitions/phandle + + ports: + type: object + + properties: + port@0: + type: object + description: | + Output / source port node, endpoint describing modules + connected the DisplayPort transmitter + + properties: + reg: + const: 0 + + endpoint: + type: object + + properties: + + remote-endpoint: true + + required: + - remote-endpoint + + additionalProperties: false + + additionalProperties: false + +required: + - compatible + - reg + - reg-names + - interrupts + - clocks + - clock-names + - xlnx,max-link-rate + - xlnx,bpc + - xlnx,max-lanes + - phy-names + - phys + - ports + +additionalProperties: false + +if: + properties: + compatible: + contains: + const: xlnx,v-dp-txss-3.1 + +then: + required: + - xlnx,vtc-offset + +examples: + - | + bus { + #address-cells = <2>; + #size-cells = <2>; + + v_dp_txss1@a0100000 { + compatible = "xlnx,v-dp-txss-3.1"; + reg = <0x0 0xa0100000 0x0 0x40000>, <0x0 0xa4080000 0x0 0x10000>; + reg-names = "dp_base", "gt_quad_base"; + clock-names = "s_axi_aclk", "tx_vid_clk"; + clocks = <&zynqmp_clk 71>, <&si570_1>; + interrupt-names = "dptxss_dp_irq", "dptxss_timer_irq", "dptxss_hdcp_irq", + "dptxss_hdcp22_cipher_irq"; + interrupts = <0 92 4>, <0 108 4>, <0 111 4>, <0 109 4>; + xlnx,vtc-offset = <0x8000>; + xlnx,max-lanes = <4>; + xlnx,max-link-rate = <810000>; + xlnx,bpc = <8>; + xlnx,audio-channels = <2>; + xlnx,hdcp22-enable; + xlnx,hdcp-enable; + xlnx,versal-gt; + xlnx,xilinx-vfmc = <&xfmc>; + phy-names = "dp-phy0", "dp-phy1", "dp-phy2", "dp-phy3"; + phys = <&vphy_lane0 0 1 1 0>, <&vphy_lane1 0 1 1 0>, + <&vphy_lane2 0 1 1 0>, <&vphy_lane3 0 1 1 0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dp_transmitter: endpoint { + remote-endpoint = <&display_controller>; + }; + }; + }; + }; + }; +... --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/display/xlnx/xlnx,dsi.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/display/xlnx/xlnx,dsi.txt @@ -0,0 +1,74 @@ +Device-Tree bindings for Xilinx MIPI DSI Tx IP core + +The IP core supports transmission of video data in MIPI DSI protocol. + +Required properties: + - compatible: Should be "xlnx,dsi". + + - reg: Base address and size of the IP core. + + - xlnx,dsi-datatype: Color format. The value should be one of "MIPI_DSI_FMT_RGB888", + "MIPI_DSI_FMT_RGB666", "MIPI_DSI_FMT_RGB666_PACKED" or "MIPI_DSI_FMT_RGB565". + + - simple_panel: The subnode for connected panel. This represents the + DSI peripheral connected to the DSI host node. Please refer to + Documentation/devicetree/bindings/display/mipi-dsi-bus.txt. The + simple-panel driver has auo,b101uan01 panel timing parameters added along + with other existing panels. DSI driver derive the required Tx IP controller + timing values from the panel timing parameters. + + - port: Logical block can be used / connected independently with + external device. In the display controller port nodes, topology + for entire pipeline should be described using the DT bindings defined in + Documentation/devicetree/bindings/graph.txt. + + - xlnx,dsi-num-lanes: Possible number of DSI lanes for the Tx controller. + The values should be 1, 2, 3 or 4. Based on xlnx,dsi-num-lanes and + line rate for the MIPI D-PHY core in Mbps, the AXI4-stream received by + Xilinx MIPI DSI Tx IP core adds markers as per DSI protocol and the packet + thus framed is convered to serial data by MIPI D-PHY core. Please refer + Xilinx pg238 for more details. This value should be equal to the number + of lanes supported by the connected DSI panel. Panel has to support this + value or has to be programmed to the same value that DSI Tx controller is + configured to. + + - clocks: List of phandles to Video and 200Mhz DPHY clocks. + + - clock-names: Must contain "s_axis_aclk" and "dphy_clk_200M" in same order as + clocks listed in clocks property. + +Required simple_panel properties: + - compatible: Value should be one of the panel names in + Documentation/devicetree/bindings/display/panel/. e.g. "auo,b101uan01". + For available panel compatible strings, please refer to bindings in + Documentation/devicetree/bindings/display/panel/ + +Optional properties: + - xlnx,vpss: vpss phandle + This handle is required only when VPSS is connected to DSI as bridge. + - xlnx,dsi-cmd-mode: denotes command mode enable. + +Example: + +#include + mipi_dsi_tx_subsystem@80000000 { + compatible = "xlnx,dsi"; + reg = <0x0 0x80000000 0x0 0x10000>; + xlnx,dsi-num-lanes = <4>; + xlnx,dsi-data-type = ; + #address-cells = <1>; + #size-cells = <0>; + xlnx,vpss = <&v_proc_ss_0>; + clock-names = "dphy_clk_200M", "s_axis_aclk"; + clocks = <&misc_clk_0>, <&misc_clk_1>; + encoder_dsi_port: port@0 { + reg = <0>; + dsi_encoder: endpoint { + remote-endpoint = <&xyz_port>; + }; + }; + simple_panel: simple-panel@0 { + compatible = "auo,b101uan01"; + reg = <0>; + }; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/display/xlnx/xlnx,mixer.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/display/xlnx/xlnx,mixer.txt @@ -0,0 +1,211 @@ +Device-Tree bindings for Xilinx Video Mixer IP core + +The IP core provides a flexible video processing block for alpha blending +and compositing multiple video and/or graphics layers. +Support for up to sixteen layers based on IP version, with an optional logo +layer, using a combination of video inputs from either frame buffer or +streaming video cores (through AXI4-Stream interfaces) is provided. +The Video Mixer always has one streaming input layer, known as master layer. + +Required properties: + - compatible: Must contain atleast one of + "xlnx,mixer-5.0" (MIXER 5.0 version) + "xlnx,mixer-4.0" (MIXER 4.0 version) + "xlnx,mixer-3.0" (MIXER 3.0 version) + - reg: Base address and size of the IP core. + - interrupts: Interrupt number. + - interrupts-parent: phandle for interrupt controller. + - reset-gpio: gpio to reset the mixer IP + - xlnx,enable-csc-coefficient-register: denotes colorimetry + coefficients can be programmed, valid for mixer 5.0 version only. + - xlnx,dma-addr-width: dma address width, valid values are 32 and 64 + - xlnx,bpc: bits per component for mixer + - xlnx,ppc: pixel per clock for mixer + - xlnx,num-layers: Total number of layers (excluding logo) + Value ranges from 1-9 for compatible string xlnx,mixer-3.0 and + Value ranges from 1-17 for comptaible string xlnx,mixer-4.0 and above + - layer_[x]: node for [x] layer + - xlnx,layer-id: layer identifier number + - xlnx,vformat: video format for layer. See list of supported formats below. + - xlnx,layer-max-width: max layer width, mandatory for master layer + for overlay layers if scaling is alowed then this is mandatory otherwise + not required for overlay layers. Valid range is 64 to 8192 + - xlnx,layer-max-height: max layer height, mandatory for master layer + Not required for overlay layers. Valid range is 64 to 4320 + - xlnx,layer-primary: denotes the primary layer, should be mentioned in node + of layer which is expected to be constructing the primary plane + +Optional properties: + - dmas: dma attach to layer, mandatory for master layer + for rest other layers its optional + - dma-names: Should be "dma0", for more details on DMA identifier string + refer Documentation/devicetree/bindings/dma/dma.txt + - xlnx,layer-streaming: denotes layer can be streaming, + mandatory for master layer. Streaming layers need external dma, where + as non streaming layers read directly from memory. + - xlnx,layer-alpha: denotes layer can do alpha compositing + - xlnx,layer-scale: denotes layer can be scale to 2x and 4x + - xlnx,logo-layer: denotes logo layer is enable + - logo: logo layer + - xlnx,bridge: phandle to bridge node. + This handle is required only when VTC is connected as bridge. + - memory-region: phandle to /reserved-memory node. + If memory is reserved for special use by mixer then this node + can be used to refer and use from this reserved memory region. + +Supported Formats: + Mixer IP Format Driver supported Format String + BGR888 "RG24" + RGB888 "BG24" + XBGR2101010 "XB30" + XRGB8888 "XR24" + RGBA8888 "RA24" + ABGR8888 "AB24" + ARGB8888 "AR24" + XBGR8888 "XB24" + YUYV "YUYV" + UYVY "UYVY" + AYUV "AYUV" + NV12 "NV12" + NV16 "NV16" + Y8 "GREY" + Y10 "Y10 " (Note: Space included) + XVUY2101010 "XV30" + VUY888 "VU24" + XVUY8888 "XV24" + XV15 "XV15" + XV20 "XV20" +Note : Format strings are case sensitive. + +Example: + v_mix_0: v_mix@80100000 { + compatible = "xlnx,mixer-3.0"; + interrupt-parent = <&gic>; + interrupts = <0 93 4>; + reg = <0x0 0x80100000 0x0 0x80000>; + + xlnx,dma-addr-width=<32>; + reset-gpios = <&gpio 1 1>; + + xlnx,bpc = <8>; + xlnx,ppc = <2>; + xlnx,num-layers = <8>; + xlnx,logo-layer; + xlnx,bridge = <&v_tc_0>; + + mixer_port: mixer_port@0 { + reg = <0>; + mixer_crtc: endpoint { + remote-endpoint = <&sdi_encoder>; + }; + }; + xv_mix_master: layer_0 { + xlnx,layer-id = <0>; + xlnx,vformat = "YUYV"; + xlnx,layer-max-width = <4096>; + xlnx,layer-height = <2160>; + dmas = <&axi_vdma_0 0>; + dma-names = "dma0"; + xlnx,layer-streaming; + xlnx,layer-primary; + }; + xv_mix_overlay_1: layer_1 { + xlnx,layer-id = <1>; + xlnx,vformat = "NV16"; + xlnx,layer-alpha; + xlnx,layer-scale; + xlnx,layer-max-width=<1920>; + }; + xv_mix_overlay_2: layer_2 { + xlnx,layer-id = <2>; + xlnx,vformat = "YUYV"; + xlnx,layer-alpha; + xlnx,layer-scale; + xlnx,layer-max-width=<1920>; + }; + xv_mix_overlay_3: layer_3 { + xlnx,layer-id = <3>; + xlnx,vformat = "AYUV"; + xlnx,layer-alpha; + xlnx,layer-scale; + xlnx,layer-max-width=<1920>; + }; + xv_mix_overlay_4: layer_4 { + xlnx,layer-id = <4>; + xlnx,vformat = "GREY"; + dmas = <&scaler_v_frmbuf_rd_0 0>; + dma-names = "dma0"; + xlnx,layer-streaming; + xlnx,layer-alpha; + xlnx,layer-scale; + xlnx,layer-max-width=<1920>; + }; + xv_mix_overlay_5: layer_5 { + xlnx,layer-id = <5>; + xlnx,vformat = "AB24"; + xlnx,layer-alpha; + xlnx,layer-scale; + xlnx,layer-max-width=<1920>; + }; + xv_mix_overlay_6: layer_6 { + xlnx,layer-id = <6>; + xlnx,vformat = "XB24"; + xlnx,layer-alpha; + xlnx,layer-scale; + xlnx,layer-max-width=<1920>; + }; + xv_mix_overlay_7: layer_7 { + xlnx,layer-id = <7>; + xlnx,vformat = "BG24"; + xlnx,layer-alpha; + xlnx,layer-scale; + xlnx,layer-max-width=<1920>; + }; + xv_mix_logo: logo { + xlnx,layer-id = <8>; + xlnx,logo-height = <64>; + xlnx,logo-width = <64>; + }; + }; +Example using reserved memory: +Reserving from 32bit Shared CMA pool of 512MiB using System RAM: +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +/ { + reserved-memory { + #address-cells = <0x2>; + #size-cells = <0x2>; + ranges; + psmem_multimedia: multimedia_cma_mem_region { + compatible = "shared-dma-pool"; + reg = <0x00 0x40000000 0x00 0x20000000>; + reusable; + }; + }; +}; +... + v_mix_0: v_mix@80100000 { + /* ... */ + memory-region = <&psmem_multimedia>; + }; + +Reserving from 64bit Shared DMA pool of 1792 MiB using external PL based +DDR memory: +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +/ { + reserved-memory { + #address-cells = <0x2>; + #size-cells = <0x2>; + ranges; + plmem_multimedia: multimedia_dma_mem_region { + compatible = "shared-dma-pool"; + no-map; + reg = <0x48 0x0 0x0 0x70000000>; + }; + }; + +}; +... + v_mix_0: v_mix@80100000 { + /* ... */ + memory-region = <&plmem_multimedia>; + } --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/display/xlnx/xlnx,pl-disp.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/display/xlnx/xlnx,pl-disp.txt @@ -0,0 +1,41 @@ +Xilinx PL Display driver +------------------------ + +Pl_Display is a logical device to provide completeness to xilinx display +pipeline. This is a software driver for providing drm components crtc +and plane for various IPs using xilinx display pipelines. + +A linear pipeline with multiple blocks: +DMA --> PL_Display --> SDI + +Required properties: + +- compatible: Must be "xlnx,pl-disp" +- dmas: dma attach to pipeline +- dma-names: names for dma +- xlnx,vformat: video format for layer +- port: Logical block can be used / connected independently with + external device. In the display controller port nodes, topology + for entire pipeline should be described using the DT bindings defined in + Documentation/devicetree/bindings/graph.txt. +- reg: Base address and size of device + +Optional properties: + - xlnx,bridge: bridge phandle + This handle is required only when VTC is connected as bridge. + +Example: + + drm-pl-disp-drv { + compatible = "xlnx,pl-disp"; + dmas = <&axi_vdma_0 0>; + dma-names = "dma0"; + xlnx,vformat = "YUYV"; + xlnx,bridge = <&v_tc_0>; + pl_disp_port@0 { + reg = <0>; + endpoint { + remote-endpoint = <&sdi_port>; + }; + }; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/display/xlnx/xlnx,sdi-tx.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/display/xlnx/xlnx,sdi-tx.txt @@ -0,0 +1,63 @@ +Device-Tree bindings for Xilinx SDI Tx subsystem + +The IP core supports transmission of video data in SDI Tx protocol + +Required properties: + - compatible: Should be "xlnx,sdi-tx". + - interrupts: Interrupt number. + - interrupts-parent: phandle for interrupt controller. + - reg: Base address and size of the IP core. + - port: Logical block can be used / connected independently with + external device. In the display controller port nodes, topology + for entire pipeline should be described using the DT bindings defined in + Documentation/devicetree/bindings/graph.txt. + Minimum one port is required. At max, 2 ports are present. + The reg index for AXI4 stream port is 0 and for ancillary data is 1. + - clocks: List of phandles to AXI Lite, Video and SDI Tx Clock + - clock-names: Must contain "s_axi_aclk", "video_in_clk" and "sdi_tx_clk" + in same order as clocks listed in clocks property. + - phy-reset-gpio: Specifier for a gpio that asserts GT phy + +Optional properties: + - xlnx,vpss: vpss phandle + This handle is required only when VPSS is connected to SDI as bridge. + - xlnx,tx-insert-c-str-st352: Insert ST352 payload in Chroma stream. + - interrupt-names: Should be "sdi_tx_irq". This is only required when + multiple interrupts are connected in the hardware design. + - xlnx,qpll1enabled: boolean property present when the QPLL1 drives GT clock + absent with QPLL0 drives GT clock +- xlnx,picxo_enabled: boolean property present when PICXO is present in design + +Example: + + sdi_tx_subsystem@80000000 { + compatible = "xlnx,sdi-tx"; + reg = <0x0 0x80000000 0x0 0x10000>; + interrupt-parent = <&gic>; + interrupts = <0 90 4>; + interrupt-names = "sdi_tx_irq"; + #address-cells = <1>; + #size-cells = <0>; + xlnx,vpss = <&v_proc_ss_0>; + clock-names = "s_axi_aclk", "video_in_clk", "sdi_tx_clk"; + clocks = <&misc_clk_0>, <&misc_clk_1>, <&misc_clk_2>; + phy-reset-gpio = <&axi_gpio_0 0 0 0>; + xlnx,qpll1enabled; + ports { + #address-cells = <1>; + #size-cells = <0>; + encoder_sdi_port: port@0 { + reg = <0>; + sdi_encoder: endpoint { + remote-endpoint = <&pl_disp_crtc>; + }; + }; + + sdi_audio_port: port@1 { + reg = <1>; + sdi_audio_sink_port: endpoint { + remote-endpoint = <&sditx_audio_embed_src_port>; + }; + }; + }; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/display/xlnx/xlnx,v-hdmi-txss1.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/display/xlnx/xlnx,v-hdmi-txss1.yaml @@ -0,0 +1,204 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/xlnx/xlnx,v-hdmi-txss1.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx HDMI Transmitter Subsystem + +maintainers: + - Venkateshwar Rao Gannavarapu + +description: | + The Xilinx HDMI Tx Subsystem contains several subcores to implement + a HDMI Transmitter and outputs video data using HDMI protocol. + For more details refer to PG350 Xilinx HDMI-2.1 Tx Subsystem. + +properties: + compatible: + items: + - enum: + - xlnx,v-hdmi-txss1-1.1 + - xlnx,v-hdmi-txss1-1.2 + + reg: + maxItems: 1 + + interrupts: + minItems: 1 + maxItems: 4 + + interrupt-names: + description: Only hdmitx interrupt is mandatory. Others are optional. + hdcp14 and hdcp14timer will be present when HDCP 1x + is selected. + hdcp22timer will be present when HDCP 2x is selected. + items: + - const: hdmitx + - const: hdcp14 + - const: hdcp14timer + - const: hdcp22timer + + clocks: + description: List of clock specifiers + items: + - description: AXI Lite CPU clock + - description: Link clock + - description: Video clock + - description: Fixed Rate Link clock + - description: AXI4-Stream Video clock + + clock-names: + items: + - const: s_axi_cpu_aclk + - const: link_clk + - const: video_clk + - const: frl_clk + - const: s_axis_video_aclk + + phys: + description: This denotes phandles for phy lanes registered + for HDMI protocol. HDMI always require 4 lanes + + phy-names: + items: + - const: hdmi-phy0 + - const: hdmi-phy1 + - const: hdmi-phy2 + - const: hdmi-phy3 + + xlnx,input-pixels-per-clock: + description: Configurable samples per clock. + Possible values are 4, 8. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [4, 8] + + xlnx,max-bits-per-component: + description: | + Max BPC value that IP configured with. For example if IP is configured + with 12 BPC means it supports (8, 10, 12) up to 12bpc. + Possible values are 8, 10, 12, 16. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [8, 10, 12, 16] + + xlnx,vid-interface: + description: Supported video interface. + Possible values are 0 for AXI4-Stream, + 1 for Native and 2 for Native-IDE interface. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [0, 1, 2] + + xlnx,max-frl-rate: + description: Maximum FRL Rate. + Possible values are 0 for TMDS mode, + 1 to 6 for FRL mode of operation. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [0, 1, 2, 3, 4, 5, 6] + + xlnx,include-hdcp-1-4: + type: boolean + $ref: /schemas/types.yaml#/definitions/flag + description: | + Present when HDCP1.4 is present in design. + + xlnx,include-hdcp-2-2: + type: boolean + $ref: /schemas/types.yaml#/definitions/flag + description: | + Present when HDCP2.2 is present in design. + + xlnx,hdcp1x-keymgmt: + description: + A phandle to a syscon device, used to access + hdcp1x keymgmt registers. + $ref: /schemas/types.yaml#/definitions/phandle + + ports: + type: object + + properties: + port@0: + type: object + description: | + Output / source port node, endpoint describing modules + connected the HDMI transmitter + + properties: + reg: + const: 0 + + endpoint: + type: object + + properties: + + remote-endpoint: true + + required: + - remote-endpoint + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - phys + - phy-names + - xlnx,input-pixels-per-clock + - xlnx,max-bits-per-component + - xlnx,vid-interface + - xlnx,max-frl-rate + - ports + +additionalProperties: false + +dependencies: + xlnx,include-hdcp-1-4: [ 'xlnx,hdcp1x-keymgmt' ] + xlnx,hdcp1x-keymgmt: [ 'xlnx,include-hdcp-1-4' ] + +examples: + - | + #include + + v_hdmi_txss1@80020000 { + compatible = "xlnx,v-hdmi-txss1-1.1"; + reg = <0x80020000 0x20000>; + interrupt-names = "hdmitx", "hdcp14", "hdcp14timer", + "hdcp22timer"; + interrupts = , , + , ; + clock-names = "s_axi_cpu_aclk", "link_clk", "video_clk", "frl_clk", "s_axis_video_aclk"; + clocks = <&zynqmp_clk 71>, <&misc_clk_1>, <&misc_clk_3>, <&misc_clk_4>, <&misc_clk_5>; + xlnx,input-pixels-per-clock = <4>; + xlnx,max-bits-per-component = <0x8>; + xlnx,vid-interface = <0>; + xlnx,max-frl-rate = <0x6>; + xlnx,include-hdcp-1-4; + xlnx,include-hdcp-2-2; + xlnx,hdcp1x-keymgmt = <&hdcp_keymngmt_blk_0>; + phy-names = "hdmi-phy0", "hdmi-phy1", "hdmi-phy2", "hdmi-phy3"; + phys = <&hdmiphy_lane0 0 1 1 1>, <&hdmiphy_lane1 0 1 1 1>, + <&hdmiphy_lane2 0 1 1 1>, <&hdmiphy_lane3 0 1 1 1>; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + hdmi_encoder: endpoint { + remote-endpoint = <&dmaengine_crtc>; + }; + }; + }; + }; + + hdcp_keymngmt_blk_0: hdcp_keymngmt_blk@80030000 { + compatible = "xlnx,hdcp-keymngmt-blk-1.0", "syscon"; + reg = <0x80030000 0x10000>; + }; +... --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/display/xlnx/xlnx,vpss-csc.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/display/xlnx/xlnx,vpss-csc.txt @@ -0,0 +1,35 @@ +Xllinx VPSS Color Space Converter +----------------------------------------- +The Xilinx VPSS Color Space Converter is a Video IP that supports +color space conversion from RGB to YUV 444/422/420 and vice versa. + +Required properties: + +- compatible: Must be "xlnx,vpss-csc". + +- reg: Physical base address and length of registers set for the device. + +- xlnx,video-width: This property qualifies the video format with sample + width expressed as a number of bits per pixel component. Supported video + width values are 8/10/12/16. + +-reset-gpios: GPIO specifier to assert/de-assert the reset line. + +- clocks: phandle to IP clock. + +- xlnx,max-width: Maximum number of pixels in a line. + Valid range from 64 to 8192. + +- xlnx,max-height: Maximum number of lines in a frame. + Valid range from 64 to 4320. + +Example: + csc@a0040000 { + compatible = "xlnx,vpss-csc"; + reg = <0x0 0xa0040000 0x0 0x10000>; + reset-gpios = <&gpio 0x0 GPIO_ACTIVE_LOW>; + xlnx,video-width = <8>; + clocks = <&misc_clk_0>; + xlnx,max-width = <3840>; + xlnx,max-height = <2160>; + } --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/display/xlnx/xlnx,vpss-scaler.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/display/xlnx/xlnx,vpss-scaler.txt @@ -0,0 +1,50 @@ +Xilinx VPSS Scaler +------------------ +The Xilinx VPSS Scaler is a Video IP that supports up scaling, +down scaling and no scaling functionailty. This supports custom +resolution values between 0 to 4096. + +Required properties: + +- compatible: Must be "xlnx,vpss-scaler-2.2" or "xlnx,vpss-scaler". + +- reg: Physical base address and length of registers set for the device. + +- xlnx,num-hori-taps: The number of horizontal taps for scaling filter + supported tap values are 2/4/6/8/10/12. + +- xlnx,num-vert-taps: The number of vertical taps for scaling filter + supported tap values are 2/4/6/8/10/12. + + A value of 2 represents bilinear filters. A value of 4 represents bicubic. + Values 6, 8, 10, 12 represent polyphase filters. + +- xlnx,pix-per-clk : The pixels per clock property of the IP. + supported values are 1 and 2. + +- reset-gpios: GPIO specifier to assert/de-assert the reset line. + +- clocks: List of phandles to AXI Lite and Video clock + +- clock-names: Must contain "aclk_ctrl" and "aclk_axis" in same order as clocks + listed in clocks property. + +- xlnx,max-width: Maximum number of pixels in a line. + Valid range from 64 to 8192. + +- xlnx,max-height: Maximum number of lines in a frame. + Valid range from 64 to 4320. + +Example: + scaler@a0040000 { + compatible = "xlnx,vpss-scaler"; + reg = <0x0 0xa0000000 0x0 0x40000>; + reset-gpios = <&gpio 0x0 GPIO_ACTIVE_LOW>; + xlnx,num-hori-taps = <8>; + xlnx,num-vert-taps = <8>; + xlnx,pix-per-clk = <2>; + clock-names = "aclk_ctrl", "aclk_axis"; + clocks = <&misc_clk_0>, <&misc_clk_1>; + xlnx,max-width = <3840>; + xlnx,max-height = <2160>; + } --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/display/xlnx/xlnx,vtc.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/display/xlnx/xlnx,vtc.txt @@ -0,0 +1,32 @@ +Device-Tree bindings for Xilinx Video Timing Controller(VTC) + +Xilinx VTC is a general purpose video timing generator and detector. +The input side of this core automatically detects horizontal and +vertical synchronization, pulses, polarity, blanking timing and active pixels. +While on the output, it generates the horizontal and vertical blanking and +synchronization pulses used with a standard video system including support +for programmable pulse polarity. + +The core is commonly used with Video in to AXI4-Stream core to detect the +format and timing of incoming video data or with AXI4-Stream to Video out core +to generate outgoing video timing for downstream sinks like a video monitor. + +For details please refer to +https://www.xilinx.com/support/documentation/ip_documentation/v_tc/v6_1/pg016_v_tc.pdf + +Required properties: + - compatible: value should be "xlnx,bridge-v-tc-6.1" + - reg: base address and size of the VTC IP + - xlnx,pixels-per-clock: Pixels per clock of the stream. Can be 1, 2 or 4. + - clocks: List of phandles for AXI Lite and Video Clock + - clock-names: Must contain "s_axi_aclk" and "clk" in same order as clocks listed + in clocks property. + +Example: + v_tc_0: v_tc@80030000 { + compatible = "xlnx,bridge-v-tc-6.1"; + reg = <0x0 0x80030000 0x0 0x10000>; + xlnx,pixels-per-clock = <2>; + clock-names = "s_axi_aclk", "clk"; + clocks = <&misc_clk_0>, <&misc_clk_1>; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.txt @@ -0,0 +1,82 @@ +Xilinx ZynqMP DisplayPort subsystem +----------------------------------- + +Required properties: + +- compatible: Must be "xlnx,zynqmp-dpsub-1.7". + +- reg: Physical base address and length of the registers set for the device. +- reg-names: Must be "dp", "blend", "av_buf", and "aud" to map logical register + partitions. + +- interrupts: Interrupt number. +- interrupts-parent: phandle for interrupt controller. + +- clocks: phandles for axi, audio, non-live video, and live video clocks. + axi clock is required. Audio clock is optional. If not present, audio will + be disabled. One of non-live or live video clock should be present. +- clock-names: The identification strings are required. "aclk" for axi clock. + "dp_aud_clk" for audio clock. "dp_vtc_pixel_clk_in" for non-live video clock. + "dp_live_video_in_clk" for live video clock (clock from programmable logic). + +- phys: phandles for phy specifier. The number of lanes is configurable + between 1 and 2. The number of phandles should be 1 or 2. +- phy-names: The identifier strings. "dp-phy" followed by index, 0 or 1. + For single lane, only "dp-phy0" is required. For dual lane, both "dp-phy0" + and "dp-phy1" are required where "dp-phy0" is the primary lane. + +- power-domains: phandle for the corresponding power domain + +- vid-layer, gfx-layer: Required to represent available layers + +Required layer properties + +- dmas: phandles for DMA channels as defined in + Documentation/devicetree/bindings/dma/dma.txt. +- dma-names: The identifier strings are required. "gfx0" for graphics layer + dma channel. "vid" followed by index (0 - 2) for video layer dma channels. + +Optional child node + +- The driver populates any child device node in this node. This can be used, + for example, to populate the sound device from the DisplayPort subsystem + driver. + +Example: + zynqmp-display-subsystem@fd4a0000 { + compatible = "xlnx,zynqmp-dpsub-1.7"; + reg = <0x0 0xfd4a0000 0x0 0x1000>, + <0x0 0xfd4aa000 0x0 0x1000>, + <0x0 0xfd4ab000 0x0 0x1000>, + <0x0 0xfd4ac000 0x0 0x1000>; + reg-names = "dp", "blend", "av_buf", "aud"; + interrupts = <0 119 4>; + interrupt-parent = <&gic>; + + clock-names = "dp_apb_clk", "dp_aud_clk", "dp_live_video_in_clk"; + clocks = <&dp_aclk>, <&clkc 17>, <&si570_1>; + + phys = <&lane1>, <&lane0>; + phy-names = "dp-phy0", "dp-phy1"; + + power-domains = <&pd_dp>; + + vid-layer { + dma-names = "vid0", "vid1", "vid2"; + dmas = <&xlnx_dpdma 0>, + <&xlnx_dpdma 1>, + <&xlnx_dpdma 2>; + }; + + gfx-layer { + dma-names = "gfx0"; + dmas = <&xlnx_dpdma 3>; + }; + + dma-names = "vid0", "vid1", "vid2", "gfx0"; + dmas = <&xlnx_dpdma 0>, + <&xlnx_dpdma 1>, + <&xlnx_dpdma 2>, + <&xlnx_dpdma 3>; + }; +}; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.yaml @@ -49,13 +49,18 @@ const: xlnx,zynqmp-dpsub-1.7 reg: - maxItems: 4 + maxItems: 3 reg-names: items: - const: dp - const: blend - const: av_buf - - const: aud + + xlnx,dpaud-reg: + description: + A phandle to a syscon device, used to access + dp audio cfg registers. + $ref: /schemas/types.yaml#/definitions/phandle interrupts: maxItems: 1 @@ -160,6 +165,7 @@ - compatible - reg - reg-names + - xlnx,dpaud-reg - interrupts - clocks - clock-names @@ -182,9 +188,9 @@ compatible = "xlnx,zynqmp-dpsub-1.7"; reg = <0xfd4a0000 0x1000>, <0xfd4aa000 0x1000>, - <0xfd4ab000 0x1000>, - <0xfd4ac000 0x1000>; - reg-names = "dp", "blend", "av_buf", "aud"; + <0xfd4ab000 0x1000>; + reg-names = "dp", "blend", "av_buf"; + xlnx,dpaud-reg = <&dp_aud>; interrupts = <0 119 4>; interrupt-parent = <&gic>; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/dma/fsl,edma.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/dma/fsl,edma.yaml @@ -47,8 +47,8 @@ - 3 dma-channels: - minItems: 1 - maxItems: 64 + minimum: 1 + maximum: 64 clocks: minItems: 1 --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/dma/xilinx/xilinx_frmbuf.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/dma/xilinx/xilinx_frmbuf.txt @@ -0,0 +1,128 @@ +The Xilinx framebuffer DMA engine supports two soft IP blocks: one IP +block is used for reading video frame data from memory (FB Read) to the device +and the other IP block is used for writing video frame data from the device +to memory (FB Write). Both the FB Read/Write IP blocks are aware of the +format of the data being written to or read from memory including RGB and +YUV in packed, planar, and semi-planar formats. Because the FB Read/Write +is format aware, only one buffer pointer is needed by the IP blocks even +when planar or semi-planar format are used. + +FB Read Required propertie(s): +- compatible : Should be "xlnx,axi-frmbuf-rd-v2.1" or + "xlnx,axi-frmbuf-rd-v2.2". Older string + "xlnx,axi-frmbuf-rd-v2" is now deprecated. + +Note: Compatible string "xlnx,axi-frmbuf-rd" and the hardware it +represented is no longer supported. + +FB Write Required propertie(s): +- compatible : Should be "xlnx,axi-frmbuf-wr-v2.1" or + "xlnx,axi-frmbuf-wr-v2.2". Older string + "xlnx,axi-frmbuf-wr-v2" is now deprecated. + +Note: Compatible string "xlnx,axi-frmbuf-wr" and the hardware it +represented is no longer supported. + +Required Properties Common to both FB Read and FB Write: +- #dma-cells : should be 1 +- interrupt-parent : Interrupt controller the interrupt is routed through +- interrupts : Should contain DMA channel interrupt +- reset-gpios : Should contain GPIO reset phandle +- reg : Memory map for module access +- xlnx,dma-addr-width : Size of dma address pointer in IP (either 32 or 64) +- xlnx,vid-formats : A list of strings indicating what video memory + formats the IP has been configured to support. + See VIDEO FORMATS table below and examples. + +Required Properties Common to both FB Read and FB Write for v2.1: +- xlnx,pixels-per-clock : Pixels per clock set in IP (1, 2, 4 or 8) +- clocks: Reference to the AXI Streaming clock feeding the AP_CLK +- clock-names: Must have "ap_clk" +- xlnx,max-height : Maximum number of lines. + Valid range from 64 to 8640. +- xlnx,max-width : Maximum number of pixels in a line. + Valid range from 64 to 15360. + +Optional Properties Common to both FB Read and FB Write for v2.1: +- xlnx,dma-align : DMA alignment required in bytes. + If absent then dma alignment is calculated as + pixels per clock * 8. + If present it should be power of 2 and at least + pixels per clock * 8. + Minimum is 8, 16, 32 when pixels-per-clock is + 1, 2 or 4. +- xlnx,fid : Field ID enabled for interlaced video support. + Can be absent for progressive video. + +VIDEO FORMATS +The following table describes the legal string values to be used for +the xlnx,vid-formats property. To the left is the string value and the +two columns to the right describe how this is mapped to an equivalent V4L2 +and DRM fourcc code---respectively---by the driver. + +IP FORMAT DTS String V4L2 Fourcc DRM Fourcc +-------------|----------------|----------------------|--------------------- +RGB8 bgr888 V4L2_PIX_FMT_RGB24 DRM_FORMAT_BGR888 +BGR8 rgb888 V4L2_PIX_FMT_BGR24 DRM_FORMAT_RGB888 +RGBX8 xbgr8888 V4L2_PIX_FMT_BGRX32 DRM_FORMAT_XBGR8888 +RGBA8 abgr8888 DRM_FORMAT_ABGR8888 +BGRA8 argb8888 DRM_FORMAT_ARGB8888 +BGRX8 xrgb8888 V4L2_PIX_FMT_XBGR32 DRM_FORMAT_XRGB8888 +RGBX10 xbgr2101010 V4L2_PIX_FMT_XBGR30 DRM_FORMAT_XBGR2101010 +RGBX12 xbgr2121212 V4L2_PIX_FMT_XBGR40 +RGBX16 rgb16 V4L2_PIX_FMT_BGR40 +YUV8 vuy888 V4L2_PIX_FMT_VUY24 DRM_FORMAT_VUY888 +YUVX8 xvuy8888 V4L2_PIX_FMT_XVUY32 DRM_FORMAT_XVUY8888 +Y_U_V8 y_u_v8 V4L2_PIX_FMT_YUV444P DRM_FORMAT_YUV444 +Y_U_V8 y_u_v8 V4L2_PIX_FMT_YUV444M DRM_FORMAT_YUV444 +Y_U_V10 y_u_v10 V4L2_PIX_FMT_X403 DRM_FORMAT_X403 +YUYV8 yuyv V4L2_PIX_FMT_YUYV DRM_FORMAT_YUYV +UYVY8 uyvy V4L2_PIX_FMT_UYVY DRM_FORMAT_UYVY +YUVA8 avuy8888 DRM_FORMAT_AVUY +YUVX10 yuvx2101010 V4L2_PIX_FMT_XVUY10 DRM_FORMAT_XVUY2101010 +Y8 y8 V4L2_PIX_FMT_GREY DRM_FORMAT_Y8 +Y10 y10 V4L2_PIX_FMT_XY10 DRM_FORMAT_Y10 +Y_UV8 nv16 V4L2_PIX_FMT_NV16 DRM_FORMAT_NV16 +Y_UV8 nv16 V4L2_PIX_FMT_NV16M DRM_FORMAT_NV16 +Y_UV8_420 nv12 V4L2_PIX_FMT_NV12 DRM_FORMAT_NV12 +Y_UV8_420 nv12 V4L2_PIX_FMT_NV12M DRM_FORMAT_NV12 +Y_UV10 xv20 V4L2_PIX_FMT_XV20M DRM_FORMAT_XV20 +Y_UV10 xv20 V4L2_PIX_FMT_XV20 +Y_UV10_420 xv15 V4L2_PIX_FMT_XV15M DRM_FORMAT_XV15 +Y_UV10_420 xv15 V4L2_PIX_FMT_XV20 + +Examples: + +FB Read Example: +++++++++ +v_frmbuf_rd_0: v_frmbuf_rd@80000000 { + #dma-cells = <1>; + compatible = "xlnx,axi-frmbuf-rd-v2.1"; + interrupt-parent = <&gic>; + interrupts = <0 92 4>; + reset-gpios = <&gpio 80 1>; + reg = <0x0 0x80000000 0x0 0x10000>; + xlnx,dma-addr-width = <32>; + xlnx,vid-formats = "bgr888","xbgr8888"; + xlnx,pixels-per-clock = <1>; + xlnx,dma-align = <8>; + clocks = <&vid_stream_clk>; + clock-names = "ap_clk" +}; + +FB Write Example: +++++++++ +v_frmbuf_wr_0: v_frmbuf_wr@80000000 { + #dma-cells = <1>; + compatible = "xlnx,axi-frmbuf-wr-v2.1"; + interrupt-parent = <&gic>; + interrupts = <0 92 4>; + reset-gpios = <&gpio 80 1>; + reg = <0x0 0x80000000 0x0 0x10000>; + xlnx,dma-addr-width = <64>; + xlnx,vid-formats = "bgr888","yuyv","nv16","nv12"; + xlnx,pixels-per-clock = <2>; + xlnx,dma-align = <16>; + clocks = <&vid_stream_clk>; + clock-names = "ap_clk" +}; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/dma/xilinx/xlnx,axi-dma-test.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/dma/xilinx/xlnx,axi-dma-test.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/xilinx/xlnx,axi-dma-test.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx AXI DMA Test client + +maintainers: + - Radhey Shyam Pandey + - Harini Katakam + +properties: + compatible: + const: xlnx,axi-dma-test-1.00.a + + dmas: + description: + A list of <[DMA device phandle] [Channel ID]> pairs, + where Channel ID is '0' for write/tx and '1' for read/rx + channel. + maxItems: 2 + + dma-names: + items: + - const: axidma0 + - const: axidma1 + +required: + - compatible + - dmas + - dma-names + +unevaluatedProperties: false + +examples: + - | + dmatest_0: dmatest { + compatible ="xlnx,axi-dma-test-1.00.a"; + dmas = <&axi_dma_0 0 &axi_dma_0 1>; + dma-names = "axidma0", "axidma1"; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/dma/xilinx/xlnx,axi-vdma-test.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/dma/xilinx/xlnx,axi-vdma-test.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/xilinx/xlnx,axi-vdma-test.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx Video DMA Test client + +maintainers: + - Radhey Shyam Pandey + - Harini Katakam + +properties: + compatible: + const: xlnx,axi-vdma-test-1.00.a + + dmas: + description: + A list of <[DMA device phandle] [Channel ID]> pairs, + where Channel ID is '0' for write/tx and '1' for read/rx + channel. + maxItems: 2 + + dma-names: + items: + - const: vdma0 + - const: vdma1 + + xlnx,num-fstores: + description: + Should be the number of framebuffers as configured in + VDMA device node. + $ref: /schemas/types.yaml#/definitions/uint32 + +required: + - compatible + - dmas + - dma-names + - xlnx,num-fstores + +unevaluatedProperties: false + +examples: + - | + vdmatest_0: vdmatest { + compatible ="xlnx,axi-vdma-test-1.00.a"; + dmas = <&axi_vdma_0 0 &axi_vdma_0 1>; + dma-names = "vdma0", "vdma1"; + xlnx,num-fstores = <0x8>; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml @@ -24,7 +24,9 @@ const: 1 compatible: - const: xlnx,zynqmp-dma-1.0 + enum: + - amd,versal2-dma-1.0 + - xlnx,zynqmp-dma-1.0 reg: description: memory map for gdma/adma module access --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/edac/xlnx,versal-xilsem-edac.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/edac/xlnx,versal-xilsem-edac.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/edac/xlnx,versal-xilsem-edac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx Versal Xilsem EDAC driver + +maintainers: + - Rama Devi Veggalam + +description: | + Xilinx Versal Soft Error Mitigation (XilSEM) is part of the + Platform Loader and Manager (PLM) which is loaded into and runs on the + Platform Management Controller (PMC). XilSEM is responsible for detecting + and optionally correcting soft errors in Configuration Memory of Versal. + Whenever an error is detected, be it correctable or uncorrectable, XilSEM + notifies the errors to user application. + This driver is responsible for handling error events received from XilSEM + on PLM. + +properties: + compatible: + items: + - enum: + - xlnx,versal-xilsem-edac + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + edac@f2014050 { + compatible = "xlnx,versal-xilsem-edac"; + reg = <0xf2014050 0xc4>; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/eeprom/at24.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/eeprom/at24.yaml @@ -69,14 +69,10 @@ - items: pattern: c32$ - items: - pattern: c32d-wl$ - - items: pattern: cs32$ - items: pattern: c64$ - items: - pattern: c64d-wl$ - - items: pattern: cs64$ - items: pattern: c128$ @@ -136,6 +132,7 @@ - renesas,r1ex24128 - samsung,s524ad0xd1 - const: atmel,24c128 + - pattern: '^atmel,24c(32|64)d-wl$' # Actual vendor is st label: description: Descriptive name of the EEPROM. --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml @@ -26,6 +26,12 @@ - description: For implementations complying for Versal. const: xlnx,versal-firmware + - description: For implementations complying for Versal NET. + items: + - enum: + - xlnx,versal-net-firmware + - const: xlnx,versal-firmware + method: description: | The method of calling the PM-API firmware layer. @@ -41,7 +47,44 @@ "#power-domain-cells": const: 1 - versal_fpga: + gpio: + $ref: /schemas/gpio/xlnx,zynqmp-gpio-modepin.yaml# + description: The gpio node describes connect to PS_MODE pins via firmware + interface. + type: object + + soc-nvmem: + $ref: /schemas/nvmem/xlnx,zynqmp-nvmem.yaml# + description: The ZynqMP MPSoC provides access to the hardware related data + like SOC revision, IDCODE and specific purpose efuses. + type: object + + pcap: + $ref: /schemas/fpga/xlnx,zynqmp-pcap-fpga.yaml + description: The ZynqMP SoC uses the PCAP (Processor Configuration Port) to + configure the Programmable Logic (PL). The configuration uses the + firmware interface. + type: object + + pinctrl: + $ref: /schemas/pinctrl/xlnx,zynqmp-pinctrl.yaml# + description: The pinctrl node provides access to pinconfig and pincontrol + functionality available in firmware. + type: object + + power-management: + $ref: /schemas/power/reset/xlnx,zynqmp-power.yaml# + description: The zynqmp-power node describes the power management + configurations. It will control remote suspend/shutdown interfaces. + type: object + + reset-controller: + $ref: /schemas/reset/xlnx,zynqmp-reset.yaml# + description: The reset-controller node describes connection to the reset + functionality via firmware interface. + type: object + + versal-fpga: $ref: /schemas/fpga/xlnx,versal-fpga.yaml# description: Compatible of the FPGA device. type: object @@ -52,6 +95,7 @@ used to encrypt or decrypt the data with provided key and initialization vector. type: object + deprecated: true clock-controller: $ref: /schemas/clock/xlnx,versal-clk.yaml# @@ -73,7 +117,38 @@ firmware { zynqmp_firmware: zynqmp-firmware { #power-domain-cells = <1>; + soc-nvmem { + compatible = "xlnx,zynqmp-nvmem-fw"; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + soc_revision: soc-revision@0 { + reg = <0x0 0x4>; + }; + }; + }; + gpio { + compatible = "xlnx,zynqmp-gpio-modepin"; + gpio-controller; + #gpio-cells = <2>; + }; + pcap { + compatible = "xlnx,zynqmp-pcap-fpga"; }; + pinctrl { + compatible = "xlnx,zynqmp-pinctrl"; + }; + power-management { + compatible = "xlnx,zynqmp-power"; + interrupts = <0 35 4>; + }; + reset-controller { + compatible = "xlnx,zynqmp-reset"; + #reset-cells = <1>; + }; + }; }; sata { @@ -84,7 +159,7 @@ compatible = "xlnx,versal-firmware"; method = "smc"; - versal_fpga: versal_fpga { + versal_fpga: versal-fpga { compatible = "xlnx,versal-fpga"; }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/fpga/fpga-region.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/fpga/fpga-region.yaml @@ -0,0 +1,358 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fpga/fpga-region.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: FPGA Region + +maintainers: + - Michal Simek + +description: | + CONTENTS + - Introduction + - Terminology + - Sequence + - FPGA Region + - Supported Use Models + - Constraints + + + Introduction + ============ + + FPGA Regions represent FPGA's and partial reconfiguration regions of FPGA's in + the Device Tree. FPGA Regions provide a way to program FPGAs under device tree + control. + + The documentation hits some of the high points of FPGA usage and + attempts to include terminology used by both major FPGA manufacturers. This + document isn't a replacement for any manufacturers specifications for FPGA + usage. + + + Terminology + =========== + + Full Reconfiguration + * The entire FPGA is programmed. + + Partial Reconfiguration (PR) + * A section of an FPGA is reprogrammed while the rest of the FPGA is not + affected. + * Not all FPGA's support PR. + + Partial Reconfiguration Region (PRR) + * Also called a "reconfigurable partition" + * A PRR is a specific section of an FPGA reserved for reconfiguration. + * A base (or static) FPGA image may create a set of PRR's that later may + be independently reprogrammed many times. + * The size and specific location of each PRR is fixed. + * The connections at the edge of each PRR are fixed. The image that is loaded + into a PRR must fit and must use a subset of the region's connections. + * The busses within the FPGA are split such that each region gets its own + branch that may be gated independently. + + Persona + * Also called a "partial bit stream" + * An FPGA image that is designed to be loaded into a PRR. There may be + any number of personas designed to fit into a PRR, but only one at a time + may be loaded. + * A persona may create more regions. + + FPGA Bridge + * FPGA Bridges gate bus signals between a host and FPGA. + * FPGA Bridges should be disabled while the FPGA is being programmed to + prevent spurious signals on the cpu bus and to the soft logic. + * FPGA bridges may be actual hardware or soft logic on an FPGA. + * During Full Reconfiguration, hardware bridges between the host and FPGA + will be disabled. + * During Partial Reconfiguration of a specific region, that region's bridge + will be used to gate the busses. Traffic to other regions is not affected. + * In some implementations, the FPGA Manager transparently handles gating the + buses, eliminating the need to show the hardware FPGA bridges in the + device tree. + * An FPGA image may create a set of reprogrammable regions, each having its + own bridge and its own split of the busses in the FPGA. + + FPGA Manager + * An FPGA Manager is a hardware block that programs an FPGA under the control + of a host processor. + + Base Image + * Also called the "static image" + * An FPGA image that is designed to do full reconfiguration of the FPGA. + * A base image may set up a set of partial reconfiguration regions that may + later be reprogrammed. + + ---------------- ---------------------------------- + | Host CPU | | FPGA | + | | | | + | ----| | ----------- -------- | + | | H | | |==>| Bridge0 |<==>| PRR0 | | + | | W | | | ----------- -------- | + | | | | | | + | | B |<=====>|<==| ----------- -------- | + | | R | | |==>| Bridge1 |<==>| PRR1 | | + | | I | | | ----------- -------- | + | | D | | | | + | | G | | | ----------- -------- | + | | E | | |==>| Bridge2 |<==>| PRR2 | | + | ----| | ----------- -------- | + | | | | + ---------------- ---------------------------------- + + Figure 1: An FPGA set up with a base image that created three regions. Each + region (PRR0-2) gets its own split of the busses that is independently gated by + a soft logic bridge (Bridge0-2) in the FPGA. The contents of each PRR can be + reprogrammed independently while the rest of the system continues to function. + + + Sequence + ======== + + When a DT overlay that targets an FPGA Region is applied, the FPGA Region will + do the following: + + 1. Disable appropriate FPGA bridges. + 2. Program the FPGA using the FPGA manager. + 3. Enable the FPGA bridges. + 4. The Device Tree overlay is accepted into the live tree. + 5. Child devices are populated. + + When the overlay is removed, the child nodes will be removed and the FPGA Region + will disable the bridges. + + + FPGA Region + =========== + + FPGA Regions represent FPGA's and FPGA PR regions in the device tree. An FPGA + Region brings together the elements needed to program on a running system and + add the child devices: + + * FPGA Manager + * FPGA Bridges + * image-specific information needed to the programming. + * child nodes + + The intended use is that a Device Tree overlay (DTO) can be used to reprogram an + FPGA while an operating system is running. + + An FPGA Region that exists in the live Device Tree reflects the current state. + If the live tree shows a "firmware-name" property or child nodes under an FPGA + Region, the FPGA already has been programmed. A DTO that targets an FPGA Region + and adds the "firmware-name" property is taken as a request to reprogram the + FPGA. After reprogramming is successful, the overlay is accepted into the live + tree. + + The base FPGA Region in the device tree represents the FPGA and supports full + reconfiguration. It must include a phandle to an FPGA Manager. The base + FPGA region will be the child of one of the hardware bridges (the bridge that + allows register access) between the cpu and the FPGA. If there are more than + one bridge to control during FPGA programming, the region will also contain a + list of phandles to the additional hardware FPGA Bridges. + + For partial reconfiguration (PR), each PR region will have an FPGA Region. + These FPGA regions are children of FPGA bridges which are then children of the + base FPGA region. The "Full Reconfiguration to add PRR's" example below shows + this. + + If an FPGA Region does not specify an FPGA Manager, it will inherit the FPGA + Manager specified by its ancestor FPGA Region. This supports both the case + where the same FPGA Manager is used for all of an FPGA as well the case where + a different FPGA Manager is used for each region. + + FPGA Regions do not inherit their ancestor FPGA regions' bridges. This prevents + shutting down bridges that are upstream from the other active regions while one + region is getting reconfigured (see Figure 1 above). During PR, the FPGA's + hardware bridges remain enabled. The PR regions' bridges will be FPGA bridges + within the static image of the FPGA. + + + Supported Use Models + ==================== + + In all cases the live DT must have the FPGA Manager, FPGA Bridges (if any), and + a FPGA Region. The target of the Device Tree Overlay is the FPGA Region. Some + uses are specific to an FPGA device. + + * No FPGA Bridges + In this case, the FPGA Manager which programs the FPGA also handles the + bridges behind the scenes. No FPGA Bridge devices are needed for full + reconfiguration. + + * Full reconfiguration with hardware bridges + In this case, there are hardware bridges between the processor and FPGA that + need to be controlled during full reconfiguration. Before the overlay is + applied, the live DT must include the FPGA Manager, FPGA Bridges, and a + FPGA Region. The FPGA Region is the child of the bridge that allows + register access to the FPGA. Additional bridges may be listed in a + fpga-bridges property in the FPGA region or in the device tree overlay. + + * Partial reconfiguration with bridges in the FPGA + In this case, the FPGA will have one or more PRR's that may be programmed + separately while the rest of the FPGA can remain active. To manage this, + bridges need to exist in the FPGA that can gate the buses going to each FPGA + region while the buses are enabled for other sections. Before any partial + reconfiguration can be done, a base FPGA image must be loaded which includes + PRR's with FPGA bridges. The device tree should have an FPGA region for each + PRR. + + Constraints + =========== + + It is beyond the scope of this document to fully describe all the FPGA design + constraints required to make partial reconfiguration work[1] [2] [3], but a few + deserve quick mention. + + A persona must have boundary connections that line up with those of the partition + or region it is designed to go into. + + During programming, transactions through those connections must be stopped and + the connections must be held at a fixed logic level. This can be achieved by + FPGA Bridges that exist on the FPGA fabric prior to the partial reconfiguration. + + -- + [1] www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/ug/ug_partrecon.pdf + [2] tspace.library.utoronto.ca/bitstream/1807/67932/1/Byma_Stuart_A_201411_MAS_thesis.pdf + [3] https://www.xilinx.com/support/documentation/sw_manuals/xilinx14_1/ug702.pdf + +properties: + $nodename: + pattern: "^fpga-region(@.*|-([0-9]|[1-9][0-9]+))?$" + + compatible: + const: fpga-region + + reg: + maxItems: 1 + + ranges: true + "#address-cells": true + "#size-cells": true + + config-complete-timeout-us: + description: + The maximum time in microseconds time for the FPGA to go to operating + mode after the region has been programmed. + + encrypted-fpga-config: + type: boolean + description: + Set if the bitstream is encrypted. + + external-fpga-config: + type: boolean + description: + Set if the FPGA has already been configured prior to OS boot up. + + firmware-name: + maxItems: 1 + description: + Should contain the name of an FPGA image file located on the firmware + search path. If this property shows up in a live device tree it indicates + that the FPGA has already been programmed with this image. + If this property is in an overlay targeting an FPGA region, it is + a request to program the FPGA with that image. + + fpga-bridges: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + Should contain a list of phandles to FPGA Bridges that must be + controlled during FPGA programming along with the parent FPGA bridge. + This property is optional if the FPGA Manager handles the bridges. + If the fpga-region is the child of an fpga-bridge, the list should not + contain the parent bridge. + + fpga-mgr: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Should contain a phandle to an FPGA Manager. Child FPGA Regions + inherit this property from their ancestor regions. An fpga-mgr property + in a region will override any inherited FPGA manager. + + partial-fpga-config: + type: boolean + description: + Set if partial reconfiguration is to be done, otherwise full + reconfiguration is done. + + region-freeze-timeout-us: + description: + The maximum time in microseconds to wait for bridges to successfully + become disabled before the region has been programmed. + + region-unfreeze-timeout-us: + description: + The maximum time in microseconds to wait for bridges to successfully + become enabled after the region has been programmed. + +required: + - compatible + - fpga-mgr + +additionalProperties: + type: object + +examples: + - | + /* + * Full Reconfiguration without Bridges with DT overlay + */ + fpga_region0: fpga-region@0 { + compatible = "fpga-region"; + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + fpga-mgr = <&fpga_mgr0>; + ranges = <0x10000000 0x20000000 0x10000000>; + + /* DT Overlay contains: &fpga_region0 */ + firmware-name = "zynq-gpio.bin"; + gpio@40000000 { + compatible = "xlnx,xps-gpio-1.00.a"; + reg = <0x40000000 0x10000>; + gpio-controller; + #gpio-cells = <2>; + }; + }; + + - | + /* + * Partial reconfiguration with bridge + */ + fpga_region1: fpga-region@0 { + compatible = "fpga-region"; + reg = <0 0>; + ranges; + #address-cells = <1>; + #size-cells = <1>; + fpga-mgr = <&fpga_mgr1>; + fpga-bridges = <&fpga_bridge1>; + partial-fpga-config; + + /* DT Overlay contains: &fpga_region1 */ + firmware-name = "zynq-gpio-partial.bin"; + clk: clock { + compatible = "fixed-factor-clock"; + clocks = <&parentclk>; + #clock-cells = <0>; + clock-div = <2>; + clock-mult = <1>; + }; + axi { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + gpio@40000000 { + compatible = "xlnx,xps-gpio-1.00.a"; + reg = <0x40000000 0x10000>; + #gpio-cells = <2>; + gpio-controller; + clocks = <&clk>; + }; + }; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/fpga/xlnx,afi-fpga.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/fpga/xlnx,afi-fpga.txt @@ -0,0 +1,67 @@ +Xilinx ZynqMp AFI interface Manager + +The Zynq UltraScale+ MPSoC Processing System core provides access from PL +masters to PS internal peripherals, and memory through AXI FIFO interface +(AFI) interfaces. + +Required properties: +-compatible: Should contain "xlnx,afi-fpga" +-config-afi: Pairs of + +The possible values of regid and values are + regid: Regids of the register to be written possible values + 0- AFIFM0_RDCTRL + 1- AFIFM0_WRCTRL + 2- AFIFM1_RDCTRL + 3- AFIFM1_WRCTRL + 4- AFIFM2_RDCTRL + 5- AFIFM2_WRCTRL + 6- AFIFM3_RDCTRL + 7- AFIFM3_WRCTRL + 8- AFIFM4_RDCTRL + 9- AFIFM4_WRCTRL + 10- AFIFM5_RDCTRL + 11- AFIFM5_WRCTRL + 12- AFIFM6_RDCTRL + 13- AFIFM6_WRCTRL + 14- AFIFS + 15- AFIFS_SS2 +- value: Array of values to be written. + for FM0_RDCTRL(0) the valid values-fabric width 2: 32-bit,1 : 64-bit ,0: 128-bit enabled + for FM0_WRCTRL(1) the valid values-fabric width 2: 32-bit,1 : 64-bit ,0: 128-bit enabled + for FM1_RDCTRL(2) the valid values-fabric width 2: 32-bit,1 : 64-bit ,0: 128-bit enabled + for FM1_WRCTRL(3) the valid values-fabric width 2: 32-bit,1 : 64-bit ,0: 128-bit enabled + for FM2_RDCTRL(4) the valid values-fabric width 2: 32-bit,1 : 64-bit ,0: 128-bit enabled + for FM2_WRCTRL(5) the valid values-fabric width 2: 32-bit,1 : 64-bit ,0: 128-bit enabled + for FM3_RDCTRL(6) the valid values-fabric width 2: 32-bit,1 : 64-bit ,0: 128-bit enabled + for FM3_WRCTRL(7) the valid values-fabric width 2: 32-bit,1 : 64-bit ,0: 128-bit enabled + for FM4_RDCTRL(8) the valid values-fabric width 2: 32-bit,1 : 64-bit ,0: 128-bit enabled + for FM4_WRCTRL(9) the valid values-fabric width 2: 32-bit,1 : 64-bit ,0: 128-bit enabled + for FM5_RDCTRL(10) the valid values-fabric width 2: 32-bit,1 : 64-bit ,0: 128-bit enabled + for FM5_WRCTRL(11) the valid values-fabric width 2: 32-bit,1 : 64-bit ,0: 128-bit enabled + for FM6_RDCTRL(12) the valid values-fabric width 2: 32-bit,1 : 64-bit ,0: 128-bit enabled + for FM6_WRCTRL(13) the valid values-fabric width 2: 32-bit,1 : 64-bit ,0: 128-bit enabled + for AFI_FA(14) + dw_ss1_sel bits (11:10) + dw_ss0_sel bits (9:8) + 0x0: 32-bit AXI data width), + 0x1: 64-bit AXI data width, + 0x2: 128-bit AXI data + All other bits are 0 write ignored. + + for AFI_FA(15) selects for ss2AXI data width valid values + 0x000: 32-bit AXI data width), + 0x100: 64-bit AXI data width, + 0x200: 128-bit AXI data + +Optional properties: +- resets : Phandle and reset specifier for the ps-pl reset. + See ../reset/reset.txt for details. + +Example: +afi0: afi0 { + compatible = "xlnx,afi-fpga"; + config-afi = <0 2>, <1 1>, <2 1>; + resets = <&zynqmp_reset 116>, <&zynqmp_reset 117>, + <&zynqmp_reset 118>, <&zynqmp_reset 119>; +}; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml @@ -26,7 +26,7 @@ examples: - | - versal_fpga: versal_fpga { + versal_fpga: versal-fpga { compatible = "xlnx,versal-fpga"; }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/fpga/xlnx,zynq-afi-fpga.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/fpga/xlnx,zynq-afi-fpga.txt @@ -0,0 +1,19 @@ +Xilinx Zynq AFI interface Manager + +The Zynq Processing System core provides access from PL masters to PS +internal peripherals, and memory through AXI FIFO interface +(AFI) interfaces. + +Required properties: +-compatible: Should contain "xlnx,zynq-afi-fpga" +-reg: Physical base address and size of the controller's register area. +-xlnx,afi-buswidth : Size of the afi bus width. + 0: 64-bit AXI data width, + 1: 32-bit AXI data width, + +Example: +afi0: afi0 { + compatible = "xlnx,zynq-afi-fpga"; + reg = <0xf8008000 0x1000>; + xlnx,afi-buswidth = <1>; +}; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/hwmon/tps544.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/hwmon/tps544.txt @@ -0,0 +1,14 @@ +TPS544B25 power regulator + +This power regulator driver supports voltage read/write and +current calibration and readback. + +Required properties: +- compatible: should be "ti,tps544" +- reg: I2C slave address + +Example: +tps544@24 { + compatible = "ti,tps544"; + reg = <0x24>; +}; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/i2c/atmel,at91sam-i2c.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/i2c/atmel,at91sam-i2c.yaml @@ -75,7 +75,7 @@ - clocks allOf: - - $ref: i2c-controller.yaml + - $ref: /schemas/i2c/i2c-controller.yaml# - if: properties: compatible: --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/i2c/google,cros-ec-i2c-tunnel.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/i2c/google,cros-ec-i2c-tunnel.yaml @@ -21,7 +21,7 @@ google,cros-ec-spi or google,cros-ec-i2c. allOf: - - $ref: i2c-controller.yaml# + - $ref: /schemas/i2c/i2c-controller.yaml# properties: compatible: --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml @@ -28,6 +28,9 @@ reg: maxItems: 1 + clocks: + maxItems: 1 + dmas: maxItems: 1 @@ -39,12 +42,16 @@ $ref: /schemas/types.yaml#/definitions/phandle description: A reference to a the actual ADC to which this FPGA ADC interfaces to. + deprecated: true + + '#io-backend-cells': + const: 0 required: - compatible - dmas - reg - - adi,adc-dev + - clocks additionalProperties: false @@ -55,7 +62,7 @@ reg = <0x44a00000 0x10000>; dmas = <&rx_dma 0>; dma-names = "rx"; - - adi,adc-dev = <&spi_adc>; + clocks = <&axi_clk>; + #io-backend-cells = <0>; }; ... --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/iio/adc/ti,ina260.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/iio/adc/ti,ina260.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,ina260.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments INA260 power monitor + +maintainers: + - Shubhrajyoti Datta + +description: | + The INA260 is a digital-output, current, power and voltage monitor + with an I2C and SMBUS compatible interface with an integrated shunt + resistor. It features up to 16 programmable addresses on I2C compatible + interface. Datasheet - https://www.ti.com/lit/ds/symlink/ina260.pdf?ts=1608607288391 + +properties: + compatible: + enum: + - ti,ina260 + + reg: + description: | + The 7-bits long I2c address of the device + + "#io-channel-cells": + const: 1 + + interrupts: + description: | + IRQ line for the device + + label: + description: | + A symbolic name for the device + +required: + - compatible + - reg + - "#io-channel-cells" + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + ina260@40 { + compatible = "ti,ina260"; + reg = <0x40>; + #io-channel-cells = <1>; + }; + }; +... --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/iio/adc/xlnx,versal-sysmon.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/iio/adc/xlnx,versal-sysmon.yaml @@ -0,0 +1,159 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2019 - 2020 Xilinx Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/xlnx,versal-sysmon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx Versal Sysmon Linux Driver + +maintainers: + - Salih Erim + +description: | + Sysmon Driver uses Linux IIO framework which was used to abstract the supply + voltages and temperatures across the chip as Voltage and Temperature + Channels in the framework. Since there are only 160 supply voltage registers + and 184 measurement points, there is no constant mapping of supply voltage + registers and the measurement points. User has to select the voltages to + monitor in design tool. Depending on the selection, a voltage supply gets + mapped to one of the supply registers. So, this mapping information is + provided to the driver via a device tree. Depending on the number of supplies + enabled in the design, the device tree will contain the information of name + of the supply enabled and the supply register it maps to. + +properties: + compatible: + items: + - enum: + - xlnx,versal-sysmon + + reg: + description: Sysmon Registers + maxItems: 1 + + interrupts: + description: interrupt line for Sysmon + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + '#io-channel-cells': + const: 0 + + xlnx,numchannels: + $ref: /schemas/types.yaml#/definitions/uint8 + description: | + Number of supply channels enabled in the design. + Possible values 0 - 160. Based on this value, child supply nodes will + be created + + xlnx,nodeid: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + PLM specified sysmon node id. + + xlnx,hbm: + description: | + Exists if node refers to a HBM SLR. + type: boolean + +patternProperties: + "^supply@([0-9]{1,2}|1[0-5][0-9])$": + type: object + description: | + Represents the supplies configured in the design. + + properties: + reg: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 159 + description: + The supply number associated with the voltage. + + xlnx,name: + $ref: /schemas/types.yaml#/definitions/string + description: + Name of the supply enabled + + xlnx,bipolar: + $ref: /schemas/types.yaml#/definitions/flag + description: + If the supply has a bipolar type and the output will be signed + + required: + - reg + - xlnx,name + + additionalProperties: false + +required: + - compatible + - reg + - xlnx,numchannels + +additionalProperties: false + +examples: + - | + #include + bus { + #address-cells = <2>; + #size-cells = <2>; + + sysmon@f1270000 { + compatible = "xlnx,versal-sysmon"; + reg = <0 0xf1270000 0 0x4000>; + interrupts = <0 0x90 0x4>; + xlnx,numchannels = /bits/8 <8>; + xlnx,nodeid = ; + #address-cells = <1>; + #size-cells = <0>; + supply@0 { + reg = <0>; + xlnx,name = "vccint"; + }; + + supply@31 { + reg = <31>; + xlnx,name = "vccsoc"; + }; + + supply@32 { + reg = <32>; + xlnx,bipolar; + xlnx,name = "vccram"; + }; + + supply@63 { + reg = <63>; + xlnx,bipolar; + xlnx,name = "vccaux"; + }; + + supply@64 { + reg = <64>; + xlnx,name = "vccbram"; + }; + + supply@95 { + reg = <95>; + xlnx,name = "gt_avaux"; + }; + + supply@96 { + reg = <96>; + xlnx,name = "gt_vccaux"; + }; + + supply@159 { + reg = <159>; + xlnx,name = "vccint_ir"; + }; + }; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml @@ -26,7 +26,7 @@ maxItems: 1 spi-max-frequency: - maximum: 30000000 + maximum: 66000000 reset-gpios: maxItems: 1 --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/iio/health/maxim,max30102.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/iio/health/maxim,max30102.yaml @@ -42,7 +42,7 @@ properties: compatible: contains: - const: maxim,max30100 + const: maxim,max30102 then: properties: maxim,green-led-current-microamp: false --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/iio/magnetometer/asahi-kasei,ak8975.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/iio/magnetometer/asahi-kasei,ak8975.yaml @@ -23,7 +23,6 @@ - ak8963 - ak09911 - ak09912 - - ak09916 deprecated: true reg: --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/interrupt-controller/xilinx,intc.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/interrupt-controller/xilinx,intc.txt @@ -0,0 +1,56 @@ +Xilinx Interrupt Controller + +The controller is a soft IP core that is configured at build time for the +number of interrupts and the type of each interrupt. These details cannot +be changed at run time. + +Required properties: + +- compatible : should be "xlnx,xps-intc-1.00.a" +- reg : Specifies base physical address and size of the registers. +- interrupt-controller : Identifies the node as an interrupt controller +- #interrupt-cells : Specifies the number of cells needed to encode an + interrupt source. The value shall be a minimum of 1. + The Xilinx device trees typically use 2 but the 2nd value + is not used. +- xlnx,kind-of-intr : A 32 bit value specifying the interrupt type for each + possible interrupt (1 = edge, 0 = level). The interrupt + type typically comes in thru the device tree node of + the interrupt generating device, but in this case + the interrupt type is determined by the interrupt + controller based on how it was implemented. +- xlnx,num-intr-inputs: Specifies the number of interrupts supported + by the specific implementation of the controller (1-32). + +Optional properties: +- interrupt-parent : Specifies an interrupt controller from which it is + chained (cascaded). +- interrupts : Specifies the interrupt of the parent controller from which + it is chained. + +Example: + +axi_intc_0: interrupt-controller@41800000 { + #interrupt-cells = <2>; + compatible = "xlnx,xps-intc-1.00.a"; + interrupt-controller; + reg = <0x41800000 0x10000>; + xlnx,kind-of-intr = <0x1>; + xlnx,num-intr-inputs = <0x1>; +}; + +Chained Example: + +The interrupt is chained to hardware interrupt 61 (29 + 32) of the GIC +for Zynq. + +axi_intc_0: interrupt-controller@41800000 { + #interrupt-cells = <2>; + compatible = "xlnx,xps-intc-1.00.a"; + interrupt-controller; + interrupt-parent = <&ps7_scugic_0>; + interrupts = <0 29 4>; + reg = <0x41800000 0x10000>; + xlnx,kind-of-intr = <0x1>; + xlnx,num-intr-inputs = <0x1>; +}; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/iommu/arm,smmu.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/iommu/arm,smmu.yaml @@ -484,7 +484,12 @@ - if: properties: compatible: - const: qcom,sm8450-smmu-500 + items: + - const: qcom,sm8450-smmu-500 + - const: qcom,adreno-smmu + - const: qcom,smmu-500 + - const: arm,mmu-500 + then: properties: clock-names: @@ -508,7 +513,11 @@ - if: properties: compatible: - const: qcom,sm8550-smmu-500 + items: + - const: qcom,sm8550-smmu-500 + - const: qcom,adreno-smmu + - const: qcom,smmu-500 + - const: arm,mmu-500 then: properties: clock-names: --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml @@ -27,7 +27,7 @@ description: | For multicolor LED support this property should be defined as either LED_COLOR_ID_RGB or LED_COLOR_ID_MULTI which can be found in - include/linux/leds/common.h. + include/dt-bindings/leds/common.h. enum: [ 8, 9 ] required: --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/media/i2c/onnn,ap1302.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/media/i2c/onnn,ap1302.yaml @@ -0,0 +1,202 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/onnn,ap1302.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ON Semiconductor AP1302 Advanced Image Coprocessor + +maintainers: + - Laurent Pinchart + - Anil Kumar M + +description: |- + The AP1302 is a standalone ISP for ON Semiconductor sensors. It interfaces to + up to two RAW CMOS sensors over MIPI CSI-2 connections, processes the two + video streams and outputs YUV frames to the host over a MIPI CSI-2 interface. + Frames are output side by side or on two virtual channels. + + The sensors must be identical. They are connected to the AP1302 on dedicated + I2C buses, and are controlled by the AP1302 firmware. They are not accessible + from the host. + +properties: + compatible: + const: onnn,ap1302 + + reg: + description: I2C device address. + maxItems: 1 + + clocks: + description: Reference to the CLK clock. + maxItems: 1 + + reset-gpios: + description: Reference to the GPIO connected to the RST pin (active low). + maxItems: 1 + + standby-gpios: + description: + Reference to the GPIO connected to the STANDBY pin (active high). + maxItems: 1 + + port: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: MIPI CSI-2 output interface to the host. + + properties: + endpoint: + $ref: /schemas/graph.yaml#/$defs/endpoint-base + unevaluatedProperties: false + + properties: + clock-noncontinuous: + type: boolean + + data-lanes: + oneOf: + - items: + - const: 1 + - items: + - const: 1 + - const: 2 + - items: + - const: 1 + - const: 2 + - const: 3 + - const: 4 + + required: + - data-lanes + + sensors: + type: object + description: List of connected sensors + + properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + onnn,model: + $ref: /schemas/types.yaml#/definitions/string + description: | + Model of the connected sensors. Must be a valid compatible string. + + If no sensor is connected, this property must no be specified, and + the AP1302 can be used with it's internal test pattern generator. + + patternProperties: + "^sensor@[01]": + type: object + description: | + Sensors connected to the first and second input, with one node per + sensor. + + properties: + reg: + description: AP1302 input port number + maxItems: 1 + + patternProperties: + ".*-supply": + description: Power supplies for the sensor + + required: + - reg + + additionalProperties: false + + required: + - "#address-cells" + - "#size-cells" + + # How can we express that onnn,model requires one sensor object to be set ? + + additionalProperties: false + +required: + - compatible + - reg + - clocks + - port + - sensors + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + camera@3c { + compatible = "onnn,ap1302"; + reg = <0x3c>; + + clocks = <&clk24mhz>; + + reset-gpios = <&pio 102 GPIO_ACTIVE_LOW>; + standby-gpios = <&pio 40 GPIO_ACTIVE_HIGH>; + + port { + isp1_out: endpoint { + remote-endpoint = <&seninf_in1>; + data-lanes = <1 2 3 4>; + }; + }; + + sensors { + #address-cells = <1>; + #size-cells = <0>; + + onnn,model = "onnn,ar0144"; + + sensor@0 { + reg = <0>; + + vdd-supply = <&mt6358_vcamd_reg>; + vaa-supply = <&mt6358_vcama1_reg>; + vddio-supply = <®_1p8v_ext>; + }; + }; + }; + }; + + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + camera@3c { + compatible = "onnn,ap1302"; + reg = <0x3c>; + + clocks = <&topckgen 0>; + + reset-gpios = <&pio 102 GPIO_ACTIVE_LOW>; + standby-gpios = <&pio 40 GPIO_ACTIVE_HIGH>; + + port { + isp2_out: endpoint { + remote-endpoint = <&seninf_in1>; + data-lanes = <1 2>; + }; + }; + + sensors { + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; + +... --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/media/i2c/ovti,ov2680.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/media/i2c/ovti,ov2680.yaml @@ -37,15 +37,15 @@ active low. maxItems: 1 - dovdd-supply: + DOVDD-supply: description: Definition of the regulator used as interface power supply. - avdd-supply: + AVDD-supply: description: Definition of the regulator used as analog power supply. - dvdd-supply: + DVDD-supply: description: Definition of the regulator used as digital power supply. @@ -59,9 +59,9 @@ - reg - clocks - clock-names - - dovdd-supply - - avdd-supply - - dvdd-supply + - DOVDD-supply + - AVDD-supply + - DVDD-supply - reset-gpios - port @@ -82,9 +82,9 @@ clock-names = "xvclk"; reset-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; - dovdd-supply = <&sw2_reg>; - dvdd-supply = <&sw2_reg>; - avdd-supply = <®_peri_3p15v>; + DOVDD-supply = <&sw2_reg>; + DVDD-supply = <&sw2_reg>; + AVDD-supply = <®_peri_3p15v>; port { ov2680_to_mipi: endpoint { --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/media/i2c/techwell,tw9900.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/media/i2c/techwell,tw9900.yaml @@ -36,7 +36,7 @@ properties: port@0: - $ref: /schemas/graph.yaml#/$defs/port-base + $ref: /schemas/graph.yaml#/properties/port description: Analog input port properties: --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/media/xilinx/xlnx,axis-broadcaster.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/media/xilinx/xlnx,axis-broadcaster.yaml @@ -0,0 +1,179 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/xilinx/xlnx,axis-broadcaster.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx AXI4-Stream Broadcaster + +maintainers: + - Ronak Shah + +description: | + The AXI4-Stream Broadcaster provides a solution for replicating a single + inbound AXI4-Stream interface into multiple outbound AXI4-Stream interfaces. + Support for up to 16 outbound AXI4-Stream interfaces is provided. + For more details, Please refer to PG085 AXI4-Stream Infrastructure IP Suite. + +properties: + compatible: + items: + - enum: + - xlnx,axis-broadcaster-1.1 + + # See ./video-interfaces.txt for details + ports: + type: object + + properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + port@0: + type: object + description: | + Input/sink port node, describing module connected to the + input of AXI4-Stream Broadcaster. + + properties: + reg: + description: | + Input/sink port number. + const: 0 + + endpoint: + type: object + + properties: + remote-endpoint: true + + required: + - remote-endpoint + + additionalProperties: false + + required: + - reg + - endpoint + + additionalProperties: false + + patternProperties: + "^port@([1-9]|1[0-6])$": + type: object + description: | + Output/source port node, describing module connected to the + output of AXI4-Stream Broadcaster. + + properties: + reg: + description: | + Output/source port number. It can have min 2 ports and + max 16 ports, numbered from 1 to 16. + items: + minimum: 1 + maximum: 16 + + endpoint: + type: object + + properties: + remote-endpoint: true + + required: + - remote-endpoint + + additionalProperties: false + + required: + - reg + - endpoint + + additionalProperties: false + + required: + - "#address-cells" + - "#size-cells" + - port@0 + - port@1 + - port@2 + + additionalProperties: false + +required: + - compatible + - ports + +additionalProperties: false + +examples: + - | + axis_broadcaster_0 { + compatible = "xlnx,axis-broadcaster-1.1"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + /* Sink port */ + reg = <0>; + axis_broad_0_in: endpoint { + remote-endpoint = <&v_proc_ss_out>; + }; + }; + port@1 { + /* Source port */ + reg = <1>; + axis_broad_0_out1: endpoint { + remote-endpoint = <&v_frmbuf_wr_0_in>; + }; + }; + port@2 { + /* Source port */ + reg = <2>; + axis_broad_0_out2: endpoint { + remote-endpoint = <&v_frmbuf_wr_1_in>; + }; + }; + port@3 { + /* Source port */ + reg = <3>; + axis_broad_0_out3: endpoint { + remote-endpoint = <&v_frmbuf_wr_2_in>; + }; + }; + port@4 { + /* Source port */ + reg = <4>; + axis_broad_0_out4: endpoint { + remote-endpoint = <&v_frmbuf_wr_3_in>; + }; + }; + port@5 { + /* Source port */ + reg = <5>; + axis_broad_0_out5: endpoint { + remote-endpoint = <&v_frmbuf_wr_4_in>; + }; + }; + port@6 { + /* Source port */ + reg = <6>; + axis_broad_0_out6: endpoint { + remote-endpoint = <&v_frmbuf_wr_5_in>; + }; + }; + port@7 { + /* Source port */ + reg = <7>; + axis_broad_0_out7: endpoint { + remote-endpoint = <&v_frmbuf_wr_6_in>; + }; + }; + }; + }; +... --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/media/xilinx/xlnx,axis-subsetconv.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/media/xilinx/xlnx,axis-subsetconv.yaml @@ -0,0 +1,133 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/xilinx/xlnx,axis-subsetconv.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx Subset Converter + +maintainers: + - Anil Kumar Mamidala + - Karthikeyan T + +description: | + This subset converter driver is for the Xilinx subset converter + IP which is a non-memory mapped IP used for converting formats. + The format conversion of source pad and sink pad in the pipeline + done by subset converter IP will be mapped in this driver. + +properties: + compatible: + items: + - enum: + - xlnx,axis-subsetconv-1.1 + + # See ./video-interfaces.txt for details + ports: + type: object + + properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + port@0: + type: object + description: | + Input/sink port node, describing module connected to the + input of AXI4-Stream Subset Converter. + + properties: + reg: + description: | + Input/sink port number. + const: 0 + + endpoint: + type: object + + properties: + remote-endpoint: true + + required: + - remote-endpoint + + additionalProperties: false + + required: + - reg + - endpoint + + additionalProperties: false + + patternProperties: + "port@1": + type: object + description: | + Output/source port node, describing module connected to the + output. + + properties: + reg: + description: | + Output/source port number. + + endpoint: + type: object + + properties: + remote-endpoint: true + + required: + - remote-endpoint + + additionalProperties: false + + required: + - reg + - endpoint + + additionalProperties: false + + required: + - "#address-cells" + - "#size-cells" + - port@0 + - port@1 + + additionalProperties: false + +required: + - compatible + - ports + +additionalProperties: false + +examples: + - | + axis_subsetconv_0 { + compatible = "xlnx,axis-subsetconv-1.1"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + /* Sink port */ + reg = <0>; + subset_conv_in: endpoint { + remote-endpoint = <&isp_csiss_out>; + }; + }; + port@1 { + /* Source port */ + reg = <1>; + subset_conv_out: endpoint { + remote-endpoint = <&isp_vcap_csi_in>; + }; + }; + }; + }; +... --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/media/xilinx/xlnx,csi2rxss.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/media/xilinx/xlnx,csi2rxss.yaml @@ -50,6 +50,7 @@ Packets other than this data type (except for RAW8 and User defined data types) will be filtered out. Possible values are as below - + 0x18 - YUV4208B 0x1e - YUV4228B 0x1f - YUV42210B 0x20 - RGB444 @@ -67,6 +68,7 @@ 0x2f - RAW20 $ref: /schemas/types.yaml#/definitions/uint32 oneOf: + - const: 0x18 - minimum: 0x1e maximum: 0x24 - minimum: 0x28 --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/media/xilinx/xlnx,isppipeline.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/media/xilinx/xlnx,isppipeline.yaml @@ -0,0 +1,271 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/xilinx/xlnx,isppipeline.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx Video ISP Pipeline IP + +maintainers: + - Kaushal Kumar + - Venkat Praveen Kancharlapalli + - Mounik Katikala + +description: | + The Xilinx Video ISP pipeline IP is used to interface to a bayer video source. + It is a pipeline of image processing functions, such as black level correction, bad pixel correction, + gain control, auto-white balance, gamma correction etc., processing the raw video from the sensor. + Gamma_lut array values are computed using compute_gamma function whose link is mentioned below: + https://github.com/Xilinx/Vitis_Libraries/blob/de67b58ca9c7f4a76411103c0ecf9d467731b476/vision/L1/examples/isppipeline/xf_isp_tb.cpp#L313 + Link to product guide for ISP pipeline is mentioned below: + https://docs.amd.com/r/en-US/Vitis_Libraries/vision/index.html + +properties: + compatible: + enum: + - xlnx,isppipeline-1.0 + - xlnx,isppipeline-2.0 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + description: Reference to the AXI Streaming clock. + + clock-names: + items: + - const: ap_clk + + xlnx,max-height: + $ref: /schemas/types.yaml#/definitions/uint16 + description: Maximum number of lines. + minimum: 64 + maximum: 4320 + + xlnx,max-width: + $ref: /schemas/types.yaml#/definitions/uint16 + description: Maximum number of pixels in a line. + minimum: 64 + maximum: 8192 + + xlnx,rgain: + $ref: /schemas/types.yaml#/definitions/uint16 + description: To configure gain value for the red channel. + minimum: 0 + maximum: 65535 + + xlnx,bgain: + $ref: /schemas/types.yaml#/definitions/uint16 + description: To configure gain value for the blue channel. + minimum: 0 + maximum: 65535 + + xlnx,pawb: + $ref: /schemas/types.yaml#/definitions/uint16 + description: | + It is used in calculating the threshold value, which is used in gray world + white balance method to compute average pixel values below the threshold value. + minimum: 0 + maximum: 65535 + + xlnx,mode-reg: + type: boolean + description: Flag to enable/disable AWB algorithm + + reset-gpios: + maxItems: 1 + description: Specifier for GPIO that asserts ISP pipeline IP. Use GPIO_ACTIVE_LOW on ap_rst_n. + + ports: + type: object + + properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + port@0: + type: object + description: | + Input/sink port node, describing module connected to the + input of ISP pipeline IP. + + properties: + reg: + description: | + Input/sink port number. + const: 0 + + endpoint: + type: object + + properties: + remote-endpoint: true + + required: + - remote-endpoint + + additionalProperties: false + + xlnx,video-width: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Width of the video data in bits + enum: [8, 10, 12, 16] + default: 10 + + required: + - reg + - endpoint + + additionalProperties: false + + "port@1": + type: object + description: | + Output/source port node, describing module connected to the + output. + + properties: + reg: + description: | + Output/source port number. + const: 1 + + endpoint: + type: object + + properties: + remote-endpoint: true + + required: + - remote-endpoint + + additionalProperties: false + + xlnx,video-width: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Width of the video data in bits + enum: [8, 10, 12, 16] + default: 8 + + required: + - reg + - endpoint + + additionalProperties: false + + required: + - "#address-cells" + - "#size-cells" + - port@0 + - port@1 + + additionalProperties: false + +required: + - compatible + - reg + - clocks + - reset-gpios + - ports + +additionalProperties: false + +allOf: + - if: + properties: + compatible: + contains: + const: xlnx,isppipeline-1.0 + then: + required: + - xlnx,max-height + - xlnx,max-width + - xlnx,rgain + - xlnx,bgain + - xlnx,pawb + - xlnx,mode-reg + + - if: + properties: + compatible: + contains: + const: xlnx,isppipeline-2.0 + then: + properties: + ports: + properties: + port@0: + required: + - xlnx,video-width + port@1: + required: + - xlnx,video-width + +examples: + - | + ISPPipeline0: ISPPipeline@a40c0000 { + compatible = "xlnx,isppipeline-1.0"; + reg = <0xa40c0000 0x10000>; + clocks = <&misc_clk_0>; + clock-names = "ap_clk"; + reset-gpios = <&gpio 87 1>; + xlnx,max-width = /bits/ 16 <3840>; + xlnx,max-height = /bits/ 16 <2160>; + xlnx,rgain = /bits/ 16 <128>; + xlnx,bgain = /bits/ 16 <210>; + xlnx,pawb = /bits/ 16 <350>; + xlnx,mode-reg; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + /* Sink port */ + reg = <0>; + isppipeline0_in: endpoint { + remote-endpoint = <&isp_csiss_out>; + }; + }; + port@1 { + /* Source port */ + reg = <1>; + isppipeline0_out: endpoint { + remote-endpoint = <&isp_vcap_csi_in>; + }; + }; + }; + }; + + - | + ISPPipeline1: ISPPipeline@a40f0000 { + compatible = "xlnx,isppipeline-2.0"; + reg = <0xa40f0000 0x10000>; + clocks = <&misc_clk_0>; + reset-gpios = <&gpio0 27 1>; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + /* Sink port */ + reg = <0>; + xlnx,video-width = <10>; + isppipeline1_in: endpoint { + remote-endpoint = <&isp_csiss_out>; + }; + }; + + port@1 { + /* Source port */ + reg = <1>; + xlnx,video-width = <8>; + isppipeline1_out: endpoint { + remote-endpoint = <&isp_vcap_csi_in>; + }; + }; + }; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/media/xilinx/xlnx,mem2mem.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/media/xilinx/xlnx,mem2mem.txt @@ -0,0 +1,25 @@ +Xilinx Video IP MEM2MEM Pipeline (XVIM2M) +---------------------------------------- + +Xilinx video IP mem2mem pipeline processes DMA transfers to achieve memory +copy from one physical memory to other. The data is copied by employing two +DMA transfers memory to device and device to memory transactions one after +the other. The DT node of the XVIM2M represents as a top level node of the +pipeline and defines mappings between DMAs. + +Required properties: + +- compatible: Must be "xlnx,mem2mem". + +- dmas, dma-names: List of two DMA specifier and identifier strings (as + defined in Documentation/devicetree/bindings/dma/dma.txt) per port. + Identifier string of one DMA channel should be "tx" and other should be + "rx". + +Example: + + video_m2m { + compatible = "xlnx,mem2mem"; + dmas = <&dma_1 0>, <&dma_2 0>; + dma-names = "tx", "rx"; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/media/xilinx/xlnx,sdirxss.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/media/xilinx/xlnx,sdirxss.txt @@ -0,0 +1,77 @@ + +Xilinx SDI Receiver Subsystem +------------------------------ + +The Xilinx SDI Rx Subsystem is used to capture SDI Video in upto 12G mode. +It outputs the video as an AXI4 Stream video data in YUV 422 10bpc mode. +The subsystem consists of the SDI Rx IP whose SDI native output is connected +to a SDI to Native conversion Bridge. The output of the Native bridge is +connected to a Native to AXI4S Bridge which generates the AXI4 Stream of +YUV422 or YUV420 10 bpc in dual pixel per clock. + +Required properties: + +- compatible: Must contain "xlnx,v-smpte-uhdsdi-rx-ss" + +- reg: Physical base address and length of the registers set for the device. + +- interrupts: Contains the interrupt line number. + +- interrupt-parent: phandle to interrupt controller. + +- xlnx,include-edh: Whether the EDH processor is enabled in design or not. + +- xlnx,line-rate: The maximum mode supported by the design. + +- clocks: Input clock specifier. Refer to common clock bindings. + +- clock-names: List of input clocks. + Required elements: "s_axi_aclk", "sdi_rx_clk", "video_out_clk" + +- port: Video port, using the DT bindings defined in ../video-interfaces.txt. + The SDI Rx subsystem has one port configured as output port. + +- xlnx,video-format, xlnx,video-width: Video format and width, as defined in + video.txt. Please note that the video format is fixed to either YUV422 or YUV420 + and the video-width is 10. + +Optional properties: + +- reset_gt-gpios: contains GPIO reset phandle for FMC init done pin in GT. + This pin is active low. +- picxo_reset-gpios: contains GPIO reset phandle for PICXO done pin for PICXO module. + This pin is active high. +- xlnx,bpp: This denotes the bit depth as 10 or 12 based on IP configuration. + The default value is 10 for backward compatibility. + +Example: + v_smpte_uhdsdi_rx_ss: v_smpte_uhdsdi_rx_ss@80000000 { + compatible = "xlnx,v-smpte-uhdsdi-rx-ss"; + interrupt-parent = <&gic>; + interrupts = <0 89 4>; + reg = <0x0 0x80000000 0x0 0x10000>; + xlnx,include-axilite = "true"; + xlnx,include-edh = "true"; + xlnx,include-vid-over-axi = "true"; + xlnx,line-rate = "12G_SDI_8DS"; + clocks = <&clk_1>, <&si570_1>, <&clk_2>; + clock-names = "s_axi_aclk", "sdi_rx_clk", "video_out_clk"; + reset_gt-gpios = <&axi_gpio_0 0 0 GPIO_ACTIVE_LOW>; + picxo_reset-gpios = <&axi_gpio_0 2 0 GPIO_ACTIVE_HIGH>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + xlnx,video-format = ; + xlnx,video-width = <10>; + + sdirx_out: endpoint { + remote-endpoint = <&vcap_sdirx_in>; + }; + }; + }; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/media/xilinx/xlnx,v-axi4s-switch.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/media/xilinx/xlnx,v-axi4s-switch.txt @@ -0,0 +1,141 @@ +Xilinx AXI4-Stream Switch +------------------------------- + +The AXI4-Stream Switch provides configurable routing between masters and slaves. +It supports up to 16 masters/sources and 16 slaves/sinks and two routing options. +There is atleast one slave/sink port and two master/source ports. + +The two routing options available are TDEST routing and control register routing. +The TDEST based routing uses design parameters and hence there no software control. +Each port is mapped as a pad and has its own format specified. + +Control register routing introduces an AXI4-Lite interface to configure the +routing table. There is one register for each of the master interfaces to +control each of the selectors. This routing mode requires that there is +precisely only one path between master and slave. When attempting to map the +same slave interface to multiple master interfaces, only the lowest master +interface is able to access the slave interface. +Here only the slave/sink ports have formats as master/source ports will inherit +the corresponding slave ports formats. A routing table is maintained in this case. + +Please refer to PG085 AXI4-Stream Infrastructure IP Suite v2.2 for more details. + +Required properties: + + - compatible: Must be "xlnx,axis-switch-1.1". + - xlnx,routing-mode: Can be 0 (TDEST routing) or 1 (Control reg routing) + - xlnx,num-si-slots: Number of slave / input ports. Min 1 Max 16 . + - xlnx,num-mi-slots: Number of master / output ports. Min 1 Max 16. + - ports: Video ports, using the DT bindings defined in ../video-interfaces.txt. + - clocks: Reference to the AXI Streaming clock feeding the ACLK and + AXI4 Lite control interface clock when control routing is enabled. + - clock-names: Must have "aclk". + +Optional properties: + - reg: Physical base address and length of the registers set for the device. + This is required only if xlnx,routing-mode is 1. + - clocks: Reference to AXI4 Lite control interface clock when routing-mode is 1. + - clock-names: "s_axi_ctl_clk" clock for AXI4 Lite interface when routing-mode is 1. + +Example: + +For TDEST routing, from 1 slave port to 4 master ports + + axis_switch_0: axis_switch@0 { + compatible = "xlnx,axis-switch-1.1"; + xlnx,routing-mode = <0x0>; + xlnx,num-si-slots = <0x1>; + xlnx,num-mi-slots = <0x4>; + clocks = <&vid_stream_clk>; + clock-names = "aclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + switch_in0: endpoint { + remote-endpoint = <&csirxss_out>; + }; + }; + port@1 { + reg = <1>; + switch_out0: endpoint { + remote-endpoint = <&vcap_csirxss0_in>; + }; + }; + port@2 { + reg = <2>; + switch_out1: endpoint { + remote-endpoint = <&vcap_csirxss1_in>; + }; + }; + port@3 { + reg = <3>; + switch_out2: endpoint { + remote-endpoint = <&vcap_csirxss2_in>; + }; + }; + port@4 { + reg = <4>; + switch_out3: endpoint { + remote-endpoint = <&vcap_csirxss3_in>; + }; + }; + }; + + }; + +For Control reg based routing, from 2 slave ports to 4 master ports + + axis_switch_0: axis_switch@a0050000 { + compatible = "xlnx,axis-switch-1.1"; + reg = <0x0 0xa0050000 0x0 0x1000>; + xlnx,routing-mode = <0x1>; + xlnx,num-si-slots = <0x2>; + xlnx,num-mi-slots = <0x4>; + clocks = <&vid_stream_clk>, <&misc_clk_0>; + clock-names = "aclk", "s_axi_ctl_clk; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + switch_in0: endpoint { + remote-endpoint = <&csirxss_out>; + }; + }; + port@1 { + reg = <1>; + switch_in1: endpoint { + remote-endpoint = <&tpg_out>; + }; + }; + port@2 { + reg = <2>; + switch_out0: endpoint { + remote-endpoint = <&vcap_csirxss0_in>; + }; + }; + port@3 { + reg = <3>; + switch_out1: endpoint { + remote-endpoint = <&vcap_csirxss1_in>; + }; + }; + port@4 { + reg = <4>; + switch_out2: endpoint { + remote-endpoint = <&vcap_csirxss2_in>; + }; + }; + port@5 { + reg = <5>; + switch_out3: endpoint { + remote-endpoint = <&vcap_csirxss3_in>; + }; + }; + }; + + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/media/xilinx/xlnx,v-cfa.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/media/xilinx/xlnx,v-cfa.txt @@ -0,0 +1,58 @@ +Xilinx Color Filter Array (CFA) +------------------------------- + +Required properties: + +- compatible: Must be "xlnx,v-cfa-7.0". + +- reg: Physical base address and length of the registers set for the device. + +- clocks: Reference to the video core clock. + +- ports: Video ports, using the DT bindings defined in ../video-interfaces.txt. + The cfa has an input port (0) and an output port (1). + +Required port properties: + +- xlnx,video-format: Must be SENSOR_MONO for the input port (0), and RBG for + the output port (1). + +- xlnx,video-width: Video width as defined in video.txt + +- xlnx, cfa-pattern: Must be one of "rggb", "grbg", "gbrg", and "bggr" for the + input port (0). Must not be specified for the output port (1). + +Example: + + cfa_0: cfa@400b0000 { + compatible = "xlnx,v-cfa-7.0"; + reg = <0x400b0000 0x10000>; + clocks = <&clkc 15>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + xlnx,video-format = ; + xlnx,video-width = <8>; + xlnx,cfa-pattern = "rggb"; + + cfa0_in: endpoint { + remote-endpoint = <&spc0_out>; + }; + }; + port@1 { + reg = <1>; + + xlnx,video-format = ; + xlnx,video-width = <8>; + + cfa0_out: endpoint { + remote-endpoint = <&ccm0_in>; + }; + }; + }; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/media/xilinx/xlnx,v-cresample.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/media/xilinx/xlnx,v-cresample.txt @@ -0,0 +1,54 @@ +Xilinx Chroma Resampler (CRESAMPLE) +----------------------------------- + +Required properties: + +- compatible: Must be "xlnx,v-cresample-4.0". + +- reg: Physical base address and length of the registers set for the device. + +- clocks: Reference to the video core clock. + +- ports: Video ports, using the DT bindings defined in ../video-interfaces.txt. + The cresample as han input port (0) and an output port (1). + +Required port properties: + +- xlnx,video-format: Must be one of YUV_444, YUV_422 or YUV_420 for the input + port (0), and one of YUV_422 or YUV_420 for the output port (1). + +- xlnx,video-width: Video width as defined in video.txt + +Example: + + cresample_0: cresample@40120000 { + compatible = "xlnx,v-cresample-4.0"; + reg = <0x40120000 0x10000>; + clocks = <&clkc 15>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + xlnx,video-format = ; + xlnx,video-width = <8>; + + cresample0_in: endpoint { + remote-endpoint = <&rgb2yuv0_out>; + }; + }; + port@1 { + reg = <1>; + + xlnx,video-format = ; + xlnx,video-width = <8>; + + cresample0_out: endpoint { + remote-endpoint = <&scaler0_in>; + }; + }; + }; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/media/xilinx/xlnx,v-demosaic.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/media/xilinx/xlnx,v-demosaic.txt @@ -0,0 +1,62 @@ +Xilinx Video Demosaic IP +----------------------------- +The Xilinx Video Demosaic IP is used to interface to a Bayer video source. + +The driver set default Sink Pad media bus format to RGGB. +The IP and driver only support RGB as its Source Pad media format. + +Required properties: + +- compatible: Must be "xlnx,v-demosaic". + +- reg: Physical base address and length of the registers set for the device. + +- clocks: Reference to the AXI Streaming clock feeding the Demosaic ap_clk. + +- xlnx,max-height: Maximum number of lines. Valid range is 64 to 4320. + +- xlnx,max-width: Maximum number of pixels in a line. Valid range is 64 to 8192. + +- reset-gpios: Specifier for GPIO that asserts Demosaic IP (AP_RST_N) reset. + +- ports: Video ports, using the DT bindings defined in ../video-interfaces.txt. + +Required port properties: + +- reg: This value represents the media pad of the V4L2 sub-device. + A Sink Pad is represented by reg = <0> + A Source Pad is represented by reg = <1> + +- xlnx,video-width: Video width as defined in video.txt + +Example: + demosaic_1: demosaic@a00b0000 { + compatible = "xlnx,v-demosaic"; + reg = <0x0 0xa00b0000 0x0 0x10000>; + clocks = <&vid_stream_clk>; + reset-gpios = <&gpio 87 1>; + xlnx,max-width = <3840>; + xlnx,max-height = <2160>; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + xlnx,video-width = <8>; + + demosaic_in: endpoint { + remote-endpoint = <&tpg_out>; + }; + }; + + port@1 { + reg = <1>; + xlnx,video-width = <8>; + + demosaic_out: endpoint { + remote-endpoint = <&gamma_in>; + }; + }; + }; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/media/xilinx/xlnx,v-dprxss.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/media/xilinx/xlnx,v-dprxss.yaml @@ -0,0 +1,210 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/xilinx/xlnx,v-dprxss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx DisplayPort Receiver Subsystem + +maintainers: + - Rajesh Gugulothu + +description: | + The DisplayPort subsystem is a full feature, hierarchically packaged + subsystem with a DisplayPort sink(RX). DP RX subsystem can capture + video data in different formats at different resolutions. + For more details, please refer to PG233 at + https://www.xilinx.com/support/documentation/ip_documentation/dp_rx_subsystem/v2_1/pg233-displayport-rx-subsystem.pdf + +properties: + compatible: + items: + - enum: + - xlnx,v-dp-rxss-3.1 + - xlnx,v-dp-rxss-3.0 + - const: xlnx,v-dp-rxss-3.0 + + interrupt-names: + items: + - const: dprxss_dp_irq + + reg: + minItems: 1 + items: + - description: DisplayPort Receiver Subsystem registers + - description: EDID IP block registers + + reg-names: + items: + - const: dp_base + - const: edid_base + + interrupts: + maxItems: 1 + + clocks: + description: List of clock specifiers + items: + - description: AXI Lite clock + - description: Link clock + - description: Video clock + + clock-names: + items: + - const: s_axi_aclk + - const: rx_lnk_clk + - const: rx_vid_clk + + phys: + description: This denotes phandles for phy lanes registered for DP + protocol. Number of phy lanes registered are depends on + the xlnx,lane-count property. + + phy-names: + items: + - const: dp-phy0 + - const: dp-phy1 + - const: dp-phy2 + - const: dp-phy3 + + xlnx,link-rate: + description: | + Max link rate that IP configured with.Possible values are as below - + 0x6 - 1.62 Gb/s + 0xa - 2.7 Gb/s + 0x14 - 5.4 Gb/s + 0x1e - 8.1 Gb/s + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [0x6, 0xa, 0x14, 0x1e] + + xlnx,lane-count: + description: Max number of lanes that IP configured with. + Possible values are 1, 2, 4. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [1, 2, 4] + + xlnx,bpc: + description: | + Max BPC value that IP configured with. For example if IP is + configured + with 10 BPC means it supports (6, 8, 10) up to 10bpc. + Possible values are 6, 8, 10, 12, 16. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [6, 8, 10, 12, 16] + + xlnx,hdcp22-enable: + description: | + This denotes hdcp22 protocol is enabled in the IP. + $ref: /schemas/types.yaml#/definitions/uint32 + + xlnx,hdcp-enable: + description: | + This denotes hdcp1.4 protocol is enabled in the IP. + $ref: /schemas/types.yaml#/definitions/uint32 + + xlnx,audio-enable: + description: | + This denotes audio support has been enabled in the IP. + $ref: /schemas/types.yaml#/definitions/uint32 + + xlnx,audio-channels: + description: | + This denotes number of audio channels enabled in the IP + configuration. Possible values are 2, 3, 4, 5, 6, 7, 8. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [2, 3, 4, 5, 6, 7, 8] + + xlnx,hdcp1x-keymgmt: + description: + A phandle to a syscon device, used to access + hdcp1x keymgmt registers. + $ref: /schemas/types.yaml#/definitions/phandle + + ports: + type: object + + properties: + port@0: + type: object + description: | + Output / source port node, endpoint describing modules + connected the DisplayPort receiver + + properties: + reg: + const: 0 + + endpoint: + type: object + + properties: + + remote-endpoint: true + + required: + - remote-endpoint + + additionalProperties: false + + additionalProperties: false + +required: + - clock-names + - clocks + - compatible + - interrupts + - reg + - reg-names + - xlnx,link-rate + - xlnx,bpc + - xlnx,lane-count + - phy-names + - phys + - ports + +additionalProperties: false + +examples: + - | + v_dp_rxss1@a0040000 { + clock-names = "s_axi_aclk", "rx_lnk_clk", "rx_vid_clk" ; + clocks = <&zynqmp_clk 71>, <&zynqmp_clk 72>, <&misc_clk_1>; + compatible = "xlnx,v-dp-rxss-3.1", "xlnx,v-dp-rxss-3.0"; + interrupt-names = "dprxss_dp_irq"; + interrupt-parent = <&gic>; + interrupts = <0 89 4>; + reg = <0xa0040000 0x40000>, <0xa0010000 0x1000>; + reg-names = "dp_base", "edid_base"; + xlnx,link-rate = <0x1e>; + xlnx,audio-enable = <1>; + xlnx,audio-channels = <2>; + xlnx,bpc = <10>; + xlnx,hdcp22-enable = <1>; + xlnx,hdcp-enable = <1>; + xlnx,hdcp1x-keymgmt = <&hdcp_keymngmt_blk_0>; + xlnx,lane-count = <4>; + phy-names = "dp-phy0", "dp-phy1", "dp-phy2", "dp-phy3"; + phys = <&vphy_lane0 0 1 1 0>, <&vphy_lane1 0 1 1 0>, + <&vphy_lane2 0 1 1 0>, <&vphy_lane3 0 1 1 0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dp_rxss_out: endpoint { + remote-endpoint = <&remap0_in>; + }; + }; + }; + }; + hdcp_keymngmt_blk_0: hdcp_keymngmt_blk@a00c0000 { + compatible = "xlnx,hdcp-keymngmt-blk-1.0", "syscon"; + reg = <0xa00c0000 0x10000>; + }; +... --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/media/xilinx/xlnx,v-gamma-lut.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/media/xilinx/xlnx,v-gamma-lut.txt @@ -0,0 +1,63 @@ +Xilinx Video Gamma Correction IP +----------------------------------- +The Xilinx Video Gamma Correction IP is used to provide RGB gamma correction. +The IP provides a look up table for each R,G and B components. + +Required properties: + +- compatible: Must be "xlnx,v-gamma-lut". + +- reg: Physical base address and length of the registers set for the device. + +- clocks: Reference to the clock that drives the ap_clk + signal of Video Gamma Lookup. + +- xlnx,max-height: Maximum number of lines. Valid range is 64 to 4320. + +- xlnx,max-width: Maximum number of pixels in a line. Valid range is 64 to 8192. + +- reset-gpios: Specifier for a GPIO that asserts Gamma IP (AP_RST_N) reset + +- ports: Video ports, using the DT bindings defined in ../video-interfaces.txt. + The Gamma LUT IP has an input port (0) and an output port (1). + + +Required port properties: +- reg: This value represents the media pad of the V4L2 sub-device. + A Sink Pad is represented by reg = <0> + A Source Pad is represented by reg = <1> + +- xlnx,video-width: Video width as defined in video.txt. Can be either 8 or 10. + +Example: + + gamma_lut_1: gamma_lut_1@0xa0080000 { + compatible = "xlnx,v-gamma-lut"; + reg = <0x0 0xa0080000 0x0 0x10000>; + clocks = <&vid_stream_clk>; + reset-gpios = <&gpio 83 1>; + xlnx,max-height = <2160>; + xlnx,max-width = <3840>; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + xlnx,video-width = <8>; + + gamma_in: endpoint { + remote-endpoint = <&demosaic_out>; + }; + }; + + port@1 { + reg = <1>; + xlnx,video-width = <8>; + + gamma_out: endpoint { + remote-endpoint = <&csc_in>; + }; + }; + }; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/media/xilinx/xlnx,v-hdmi-rxss1.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/media/xilinx/xlnx,v-hdmi-rxss1.yaml @@ -0,0 +1,247 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/xilinx/xlnx,v-hdmi-rxss1.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx HDMI 2.1 Receiver Subsystem + +maintainers: + - Vishal Sagar + +description: | + The Xilinx HDMI 2.1 Receiver Subsystem is a feature rich soft IP incorporating + all the necesssary logic to properly interface with PHY layer and provides HDMI + decoding functionality. The subsystem is a hierarchical IP that bundles a + collection of HDMI 2.1 Rx-related IP sub-cores and outputs them as a single IP. + The subsystem receives the captured TMDS data from the PHY layer. It then + extracts the video and audio streams from the HDMI stream and converts it to + video and audio streams. + For more details refer to PG 351 Xilinx HDMI 2.1 Rx Subsystem. + +properties: + compatible: + items: + - enum: + - xlnx,v-hdmi-rxss1-1.1 + - xlnx,v-hdmi-rxss1-1.2 + + reg: + maxItems: 1 + + interrupts: + maxItems: 5 + + interrupt-names: + description: Only irq is mandatory. Others are optional. + hdcp14_irq and hdcp14_timer_irq will be present when HDCP 1x is selected. + hdcp22_irq and hdcp22_timer_irq will be present when HDCP 2x is selected. + items: + - const: hdcp14_irq + - const: hdcp14_timer_irq + - const: hdcp22_irq + - const: hdcp22_timer_irq + - const: irq + + clocks: + items: + - description: Clock for AXI4-Lite control interface + - description: Fixed FRL Link clock + - description: AXI4-Stream clock + + clock-names: + items: + - const: s_axi_cpu_aclk + - const: frl_clk + - const: s_axis_video_aclk + + xlnx,edid-ram-size: + description: | + This is size of EDID in BRAM. + The possible values are 256, 512, 1024 or 4096. + This property has to be specified as '/bits/ 16' value. + $ref: /schemas/types.yaml#/definitions/uint16 + enum: [ 256, 512, 1024, 4096 ] + + xlnx,input-pixels-per-clock: + description: | + Number of pixels per clock on Video Interface. + This property has to be specified as '/bits/ 8' value. + $ref: /schemas/types.yaml#/definitions/uint8 + enum: [ 4, 8 ] + + xlnx,max-bits-per-component: + description: | + Maximum bits per component. + This property has to be specified as '/bits/ 8' value. + $ref: /schemas/types.yaml#/definitions/uint8 + enum: [ 8, 10, 12, 16 ] + + xlnx,max-frl-rate: + description: | + Maximum FRL rate. + This property has to be specified as '/bits/ 8' value. + $ref: /schemas/types.yaml#/definitions/uint8 + enum: [ 4, 5, 6 ] + + xlnx,frl-clk-freq-khz: + description: | + FRL clock frequency in KHz + $ref: /schemas/types.yaml#/definitions/uint32 + + xlnx,vid-clk-freq-khz: + description: | + Video clock frequency in KHz + $ref: /schemas/types.yaml#/definitions/uint32 + + xlnx,include-hdcp: + type: boolean + $ref: /schemas/types.yaml#/definitions/flag + description: | + Present when HDCP1x or HDCP2x is enabled. + + xlnx,include-hdcp-1-4: + type: boolean + $ref: /schemas/types.yaml#/definitions/flag + description: | + Present when HDCP1x is enabled. + + xlnx,include-hdcp-2-2: + type: boolean + $ref: /schemas/types.yaml#/definitions/flag + description: | + Present when HDCP2x is enabled. + + xlnx,hdcp1x-keymgmt: + description: | + A phandle to a syscon device, used to access + HDCP1x keymgmt registers. + $ref: /schemas/types.yaml#/definitions/phandle + + phys: + description: | + This denotes phandles for phy lanes registered for HDMI protocol. + + phy-names: + items: + - const: hdmi-phy0 + - const: hdmi-phy1 + - const: hdmi-phy2 + - const: hdmi-phy3 + + ports: + type: object + + properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + port@0: + type: object + description: | + Sink port node with one endpoint connected to a hdmi-connector node. + properties: + reg: + const: 0 + endpoint: + type: object + properties: + remote-endpoint: true + required: + - remote-endpoint + additionalProperties: false + additionalProperties: false + + port@1: + type: object + description: | + Source port node with one endpoint. + properties: + reg: + const: 1 + endpoint: + type: object + properties: + remote-endpoint: true + required: + - remote-endpoint + additionalProperties: false + additionalProperties: false + + required: + - "#address-cells" + - "#size-cells" + - port@0 + - port@1 + + additionalProperties: false + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - xlnx,edid-ram-size + - xlnx,max-bits-per-component + - xlnx,max-frl-rate + - xlnx,frl-clk-freq-khz + - xlnx,vid-clk-freq-khz + - xlnx,input-pixels-per-clock + - phys + - phy-names + - ports + +additionalProperties: false + +examples: + - | + v_hdmi_rxss1: v_hdmi_rxss1@80000000 { + compatible = "xlnx,v-hdmi-rxss1-1.1"; + reg = <0x80000000 0x10000>; + clock-names = "s_axi_cpu_aclk", "frl_clk", "s_axis_video_aclk"; + clocks = <&zynqmp_clk 71>, <&misc_clk_4>, <&misc_clk_5>; + interrupt-parent = <&gic>; + interrupt-names = "hdcp14_irq", "hdcp14_timer_irq", "hdcp22_irq", "hdcp22_timer_irq", "irq"; + interrupts = <0 106 4>, <0 107 4>, <0 110 4>, <0 111 4>, <0 91 4>; + xlnx,edid-ram-size = /bits/ 16 <0x100>; + xlnx,input-pixels-per-clock = /bits/ 8 <0x8>; + xlnx,max-bits-per-component = /bits/ 8 <0xa>; + xlnx,max-frl-rate = /bits/ 8 <0x6>; + xlnx,frl-clk-freq-khz = <449955>; + xlnx,vid-clk-freq-khz = <400000>; + xlnx,include-hdcp; + xlnx,include-hdcp-1-4; + xlnx,include-hdcp-2-2; + xlnx,hdcp1x-keymgmt = <&hdcp_keymngmt_blk_1>; + phy-names = "hdmi-phy0", "hdmi-phy1", "hdmi-phy2", "hdmi-phy3"; + phys = <&hdmiphy1_lane0 0 1 1 0>, + <&hdmiphy1_lane1 0 1 1 0>, + <&hdmiphy1_lane2 0 1 1 0>, + <&hdmiphy1_lane3 0 1 1 0>; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + hdmi_rx_in: endpoint { + remote-endpoint = <&hdmi_connector_out>; + }; + }; + port@1 { + reg = <1>; + hdmi_rx_out: endpoint { + remote-endpoint = <&vpss_in>; + }; + }; + }; + }; + hdcp_keymngmt_blk_1: hdcp_keymngmt_blk@80040000 { + compatible = "xlnx,hdcp-keymngmt-blk-1.0", "syscon"; + reg = <0x80040000 0x10000>; + }; +... --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/media/xilinx/xlnx,v-hls.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/media/xilinx/xlnx,v-hls.txt @@ -0,0 +1,64 @@ +Xilinx High-Level Synthesis Core (HLS) +-------------------------------------- + +High-Level Synthesis cores are synthesized from a high-level function +description developed by the user. As such their functions vary widely, but +they all share a set of common characteristics that allow them to be described +by common bindings. + + +Required properties: + +- compatible: This property must contain "xlnx,v-hls" to indicate that the + core is compatible with the generic Xilinx HLS DT bindings. It can also + contain a more specific string to identify the HLS core implementation. The + value of those implementation-specific strings is out of scope for these DT + bindings. + +- reg: Physical base address and length of the registers sets for the device. + The HLS core has two registers sets, the first one contains the core + standard registers and the second one contains the custom user registers. + +- clocks: Reference to the video core clock. + +- ports: Video ports, using the DT bindings defined in ../video-interfaces.txt. + The HLS core has one input port (0) and one output port (1). + +Required port properties: + +- xlnx,video-format: Video format as defined in video.txt. +- xlnx,video-width: Video width as defined in video.txt. + +Example: + + hls_0: hls@43c00000 { + compatible = "xlnx,v-hls-sobel", "xlnx,v-hls"; + reg = <0x43c00000 0x24>, <0x43c00024 0xa0>; + clocks = <&clkc 15>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + xlnx,video-format = ; + xlnx,video-width = <8>; + + hls0_in: endpoint { + remote-endpoint = <&vdma_out>; + }; + }; + port@1 { + reg = <1>; + + xlnx,video-format = ; + xlnx,video-width = <8>; + + hls0_out: endpoint { + remote-endpoint = <&vdma_in>; + }; + }; + }; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/media/xilinx/xlnx,v-multi-scaler.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/media/xilinx/xlnx,v-multi-scaler.txt @@ -0,0 +1,95 @@ +Xilinx mem2mem Multi Video Scaler (XM2MSC) +----------------------------------------- + +Required propertie(s): +- compatible : Should be "xlnx,v-multi-scaler-v1.0" +- clocks : Input clock specifier. Refer to common clk bindings. +- interrupt-parent : Interrupt controller the interrupt is routed through +- interrupts : Should contain MultiScaler interrupt +- reset-gpios : Should contain GPIO reset phandle +- reg : Physical base address and + length of the registers set for the device. +- xlnx,max-chan : Maximum number of supported scaling channels (1 - 8) +- xlnx,max-width : Maximum number of supported column/width (64 - 3840) +- xlnx,max-height : Maximum number of supported row/height (64 - 2160) +- xlnx,dma-addr-width : dma address width (either 32 or 64) +- xlnx,pixels-per-clock : pixels per clock set in IP (1, 2 or 4) +- xlnx,vid-formats : A list of strings indicating what video memory + formats the IP has been configured to support. + See VIDEO FORMATS table below and examples. +- xlnx,num-taps : The number of filter taps for scaling (6, 8, 10, 12) + +VIDEO FORMATS +The following table describes the legal string values to be used for +the xlnx,vid-formats property. To the left is the string value and the +column to the right describes the format. + +IP FORMAT DTS String Description +-------------|----------------|--------------------- +RGB8 bgr888 Packed RGB, 8 bits per component. + Every RGB pixel in memory is represented with + 24 bits. +RGBX8 xbgr8888 Packed RGB, 8 bits per component. Every RGB + pixel in memory is represented with 32 bits. + Bits[31:24] do not contain pixel information. +BGRX8 xrgb8888 Packed BGR, 8 bits per component. Every BGR + pixel in memory is represented with 32 bits. + Bits[31:24] do not contain pixel information. +RGBX10 xbgr2101010 Packed RGB, 10 bits per component. Every RGB + pixel is represented with 32 bits. Bits[31:30] + do not contain any pixel information. +YUV8 vuy888 Packed YUV 4:4:4, 8 bits per component. Every + YUV 4:4:4 pixel in memory is represented with + 24 bits. +YUVX8 xvuy8888 Packed YUV 4:4:4, 8 bits per component. + Every YUV 4:4:4 pixel in memory is represented + with 32 bits. Bits[31:24] do not contain pixel + information. +YUYV8 yuyv Packed YUV 4:2:2, 8 bits per component. Every + two YUV 4:2:2 pixels in memory are represented + with 32 bits. +UYVY8 uyvy Packed YUV 4:2:2, 8 bits per component. + Every two YUV 4:2:2 pixels in memory are + represented with 32 bits. +YUVX10 yuvx2101010 Packed YUV 4:4:4, 10 bits per component. + Every YUV 4:4:4 pixel is represented with 32 bits. + Bits[31:30] do not contain any pixel information. +Y8 y8 Packed Luma-Only, 8 bits per component. Every + luma-only pixel in memory is represented with + 8 bits. Y8 is presented as YUV 4:4:4 on the + AXI4-Stream interface. +Y10 y10 Packed Luma-Only, 10 bits per component. Every + three luma-only pixels in memory is represented + with 32 bits. Y10 is presented as YUV 4:4:4 on + the AXI4-Stream interface. +Y_UV8 nv16 Semi-planar YUV 4:2:2 with 8 bits per component. + Y and UV stored in separate planes. +Y_UV8_420 nv12 Semi-planar YUV 4:2:0 with 8 bits per component. + Y and UV stored in separate planes. +Y_UV10 xv20 Semi-planar YUV 4:2:2 with 10 bits per component. + Every 3 pixels is represented with 32 bits. + Bits[31:30] do not contain any pixel information. + Y and UV stored in separate planes. +Y_UV10_420 xv15 Semi-planar YUV 4:2:0 with 10 bits per component. + Every 3 pixels is represented with 32 bits. + Bits[31:30] do not contain any pixel information. + Y and UV stored in separate planes. + +Example + +v_multi_scaler_0: v_multi_scaler@a0000000 {\ + clocks = <&clk 71>; + compatible = "xlnx,v-multi-scaler-v1.0"; + interrupt-names = "interrupt"; + interrupt-parent = <&gic>; + interrupts = <0 89 4>; + reg = <0x0 0xa0000000 0x0 0x10000>; + xlnx,vid-formats = "bgr888","vuy888"; + reset-gpios = <&gpio 78 1>; + xlnx,max-chan = <0x01>; + xlnx,dma-addr-width = <0x20>; + xlnx,pixels-per-clock = /bits/ 8 <2>; + xlnx,max-width = <3840>; + xlnx,max-height = <2160>; + xlnx,num-taps = <6>; +}; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/media/xilinx/xlnx,v-remapper.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/media/xilinx/xlnx,v-remapper.txt @@ -0,0 +1,61 @@ +Xilinx Video Remapper +--------------------- + +The IP core remaps input pixel components to produce an output pixel with +less, more or the same number of components as the input pixel. + +Required properties: + +- compatible: Must be "xlnx,v-remapper". + +- clocks: Reference to the video core clock. + +- xlnx,video-width: Video pixel component width, as defined in video.txt. + +- #xlnx,s-components: Number of components per pixel at the input port + (between 1 and 4 inclusive). + +- #xlnx,m-components: Number of components per pixel at the output port + (between 1 and 4 inclusive). + +- xlnx,component-maps: Remapping configuration represented as an array of + integers. The array contains one entry per output component, in the low to + high order. Each entry corresponds to the zero-based position of the + corresponding input component, or the value 4 to drive a constant value on + the output component. For example, to remap RGB to BGR use <2 1 0>, and to + remap RBG to xRGB use <1 0 2 4>. + +- ports: Video ports, using the DT bindings defined in ../video-interfaces.txt. + The remapper as an input port (0) and and output port (1). + +Example: RBG to xRGB remapper + + remapper_0: remapper { + compatible = "xlnx,v-remapper"; + + clocks = <&clkc 15>; + + xlnx,video-width = <8>; + + #xlnx,s-components = <3>; + #xlnx,m-components = <4>; + xlnx,component-maps = <1 0 2 4>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + remap0_in: endpoint { + remote-endpoint = <&tpg0_out>; + }; + }; + port@1 { + reg = <1>; + remap0_out: endpoint { + remote-endpoint = <&sobel0_in>; + }; + }; + }; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/media/xilinx/xlnx,v-rgb2yuv.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/media/xilinx/xlnx,v-rgb2yuv.txt @@ -0,0 +1,54 @@ +Xilinx RGB to YUV (RGB2YUV) +--------------------------- + +Required properties: + +- compatible: Must be "xlnx,v-rgb2yuv-7.1". + +- reg: Physical base address and length of the registers set for the device. + +- clocks: Reference to the video core clock. + +- ports: Video ports, using the DT bindings defined in ../video-interfaces.txt. + The rgb2yuv has an input port (0) and an output port (1). + +Required port properties: + +- xlnx,video-format: Must be RBG for the input port (0) and YUV_444 for the + output port (1). + +- xlnx,video-width: Video width as defined in video.txt + +Example: + + rgb2yuv_0: rgb2yuv@40100000 { + compatible = "xlnx,v-rgb2yuv-7.1"; + reg = <0x40100000 0x10000>; + clocks = <&clkc 15>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + xlnx,video-format = ; + xlnx,video-width = <8>; + + rgb2yuv0_in: endpoint { + remote-endpoint = <&gamma0_out>; + }; + }; + port@1 { + reg = <1>; + + xlnx,video-format = ; + xlnx,video-width = <8>; + + rgb2yuv0_out: endpoint { + remote-endpoint = <&cresample0_in>; + }; + }; + }; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/media/xilinx/xlnx,v-scaler.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/media/xilinx/xlnx,v-scaler.txt @@ -0,0 +1,75 @@ +Xilinx Scaler (SCALER) +------------------------------------ + +Required properties: + +- compatible: Must be "xlnx,v-scaler-8.1". + +- reg: Physical base address and length of the registers set for the device. + +- clocks: Reference to the video core clock. + +- xlnx,num-hori-taps, xlnx,num-vert-taps: The number of horizontal and vertical + taps for scaling filter(range: 2 - 12). + +- xlnx,max-num-phases: The maximum number of phases for scaling filter + (range: 2 - 64). + +- ports: Video ports, using the DT bindings defined in ../video-interfaces.txt. + The scaler has an input port (0) and an output port (1). + +Optional properties: + +- xlnx,separate-yc-coef: When set, this boolean property specifies that + the hardware uses separate coefficients for the luma and chroma filters. + Otherwise a single set of coefficients is shared for both. + +- xlnx,separate-hv-coef: When set, this boolean property specifies that + the hardware uses separate coefficients for the horizontal and vertical + filters. Otherwise a single set of coefficients is shared for both. + +Required port properties: + +- xlnx,video-format: Must be one of RBG, YUV_422, YUV_422 or YUV_420 for + both input port (0) and output port (1). The two formats must be identical. + +- xlnx,video-width: Video width as defined in video.txt + +Example: + + scaler_0: scaler@43c30000 { + compatible = "xlnx,v-scaler-8.1"; + reg = <0x43c30000 0x10000>; + clocks = <&clkc 15>; + + xlnx,num-hori-taps = <12>; + xlnx,num-vert-taps = <12>; + xlnx,max-num-phases = <4>; + xlnx,separate-hv-coef; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + xlnx,video-format = ; + xlnx,video-width = <8>; + + scaler0_in: endpoint { + remote-endpoint = <&cresample0_out>; + }; + }; + port@1 { + reg = <1>; + + xlnx,video-format = ; + xlnx,video-width = <8>; + + scaler0_out: endpoint { + remote-endpoint = <&vcap0_in>; + }; + }; + }; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/media/xilinx/xlnx,v-scd.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/media/xilinx/xlnx,v-scd.txt @@ -0,0 +1,164 @@ +Xilinx Scene Change Detection IP (SCD) +-------------------------------------- + +The Xilinx Scene Change Detection IP contains two blocks: one IP block is used +for reading video frame data from memory to the device and the other IP block +is used for determining whether there is a scene change between current and the +previous frame. The IP supports YUV planar and semi-planar formats. IP only +needs luma frame to determine the scene change event. The IP supports memory +based model, which means that it will accept a dma buffer address and perform +MEM2DEV transfer followed by statistical based image processing and give the +data back to application if scene change detection is present or not. + +Another version of scene change detection IP which supports streaming model, +which means that IP can be inserted in a capture pipeline. For example, +"hdmirx -> streaming-scd -> fb_wr" is a typical capture pipeline where +streaming SCD can be embedded. The IP accespts the AXI video data and perform +histogram based statistical analysis to detect scene change. The IP supports +single channel. + +Required properties: + +- compatible: Should be "xlnx,v-scd" + +- reg: Physical base address and length of the registers set for the device + +- clocks: Reference to the video core clock. + +- reset-gpios: Specifier for a GPIO that assert SCD (AP_RST_N) reset. + +- xlnx,memory-based: This is to differentiate between memory based and + streaming based IP. The value is 1 for memory based and 0 for streaming + based IPs. + +- xlnx,numstreams: Maximum active streams IP can support is 8 and this is based + on the design. + +- xlnx,addrwidth: Size of dma address pointer in IP (either 32 or 64) + +- subdev: Each channel will have its own subdev node. Each subdev will have its + sink port. + +- port: Video port, using the DT bindings defined in ../video-interfaces.txt. + +Example: + +1. Memory based device tree + +The following example shows how the device tree would look like for a memory +based design where 8 streams are enabled. + + scd: scenechange@a0100000 { + compatible = "xlnx,v-scd"; + reg = <0x0 0xa0100000 0x0 0x1fff>; + clocks = <&misc_clk_0>; + interrupt-parent = <&gic>; + interrupts = <0 90 4>; + reset-gpios = <&gpio 94 1>; + + xlnx,memory-based; + xlnx,numstreams = <8>; + xlnx,addrwidth = <0x20>; + + #address-cells = <1>; + #size-cells = <0>; + #dma-cells = <1>; + + subdev@0 { + port@0 { + reg = <0>; + scd_in0: endpoint { + remote-endpoint = <&vcap0_out0>; + }; + }; + }; + subdev@1 { + port@0 { + reg = <0>; + scd_in1: endpoint { + remote-endpoint = <&vcap0_out1>; + }; + }; + }; + subdev@2 { + port@0 { + reg = <0>; + scd_in2: endpoint { + remote-endpoint = <&vcap0_out2>; + }; + }; + }; + subdev@3 { + port@0 { + reg = <0>; + scd_in3: endpoint { + remote-endpoint = <&vcap0_out3>; + }; + }; + }; + subdev@4 { + port@0 { + reg = <0>; + scd_in4: endpoint { + remote-endpoint = <&vcap0_out4>; + }; + }; + }; + subdev@5 { + port@0 { + reg = <0>; + scd_in5: endpoint { + remote-endpoint = <&vcap0_out5>; + }; + }; + }; + subdev@6 { + port@0 { + reg = <0>; + scd_in6: endpoint { + remote-endpoint = <&vcap0_out6>; + }; + }; + }; + subdev@7 { + port@0 { + reg = <0>; + scd_in7: endpoint { + remote-endpoint = <&vcap0_out7>; + }; + }; + }; + }; + +2. Streaming based device tree + +The following example shows how the device tree would look like for a streaming +based design. + + scd: scenechange@a0280000 { + compatible = "xlnx,v-scd"; + reg = <0x0 0xa0280000 0x0 0x1fff>; + clocks = <&clk 72>; + interrupt-parent = <&gic>; + interrupts = <0 111 4>; + reset-gpios = <&gpio 100 1>; + #address-cells = <1>; + #size-cells = <0>; + xlnx,numstreams = <1>; + + scd { + port@0 { + reg = <0x0>; + scd_in0: endpoint { + remote-endpoint = <&vpss_scaler_out>; + }; + }; + + port@1 { + reg = <0x1>; + scd_out0: endpoint { + remote-endpoint = <&vcap_hdmi_in_1>; + }; + }; + }; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/media/xilinx/xlnx,v-switch.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/media/xilinx/xlnx,v-switch.txt @@ -0,0 +1,55 @@ +Xilinx Video Switch +------------------- + +Required properties: + + - compatible: Must be "xlnx,v-switch-1.0". + + - reg: Physical base address and length of the registers set for the device. + + - clocks: Reference to the video core clock. + + - #xlnx,inputs: Number of input ports + - #xlnx,outputs: Number of outputs ports + + - ports: Video ports, using the DT bindings defined in ../video-interfaces.txt. + +Example: + + switch: switch@43c10000 { + compatible = "xlnx,v-switch-1.0"; + reg = <0x43c10000 0x10000>; + clocks = <&clkc 15>; + + #xlnx,inputs = <2>; + #xlnx,outputs = <2>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + switch_in0: endpoint { + remote-endpoint = <&tpg_out>; + }; + }; + port@1 { + reg = <1>; + switch_in1: endpoint { + remote-endpoint = <&cresample0_out>; + }; + }; + port@2 { + reg = <2>; + switch_out0: endpoint { + remote-endpoint = <&scaler0_in>; + }; + }; + port@3 { + reg = <3>; + switch_out1: endpoint { + remote-endpoint = <&vcap0_in1>; + }; + }; + }; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/media/xilinx/xlnx,v-tpg.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/media/xilinx/xlnx,v-tpg.txt @@ -6,7 +6,8 @@ - compatible: Must contain at least one of "xlnx,v-tpg-5.0" (TPG version 5.0) - "xlnx,v-tpg-6.0" (TPG version 6.0) + "xlnx,v-tpg-7.0" (TPG version 7.0) + "xlnx,v-tpg-8.0" (TPG version 8.0) TPG versions backward-compatible with previous versions should list all compatible versions in the newer to older order. @@ -23,6 +24,8 @@ Optional properties: +- xlnx,ppc: Pixels per clock. Valid values are 1, 2, 4 or 8. + - xlnx,vtc: A phandle referencing the Video Timing Controller that generates video timings for the TPG test patterns. @@ -30,16 +33,26 @@ input. The GPIO active level corresponds to the selection of VTC-generated video timings. +- reset-gpios: Specifier for a GPIO that assert TPG (AP_RST_N) reset. + This property is mandatory for TPG v7.0 and above. + +- xlnx,max-height: Maximum number of lines. + This property is mandatory for TPG v8.0. Value ranges from 64 to 7760. + +- xlnx,max-width: Maximum number of pixels in a line. + This property is mandatory for TPG v8.0. Value ranges from 64 to 10328. + The xlnx,vtc and timing-gpios properties are mandatory when the TPG is synthesized with two ports and forbidden when synthesized with one port. Example: tpg_0: tpg@40050000 { - compatible = "xlnx,v-tpg-6.0", "xlnx,v-tpg-5.0"; + compatible = "xlnx,v-tpg-5.0"; reg = <0x40050000 0x10000>; clocks = <&clkc 15>; + xlnx,ppc = <2>; xlnx,vtc = <&vtc_3>; timing-gpios = <&ps7_gpio_0 55 GPIO_ACTIVE_LOW>; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/media/xilinx/xlnx,v-vpss-csc.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/media/xilinx/xlnx,v-vpss-csc.txt @@ -0,0 +1,67 @@ +Xilinx VPSS Color Space Converter (CSC) +----------------------------------------- +The Xilinx VPSS Color Space Converter (CSC) is a Video IP that supports +color space conversion from RGB or YUV(444, 422, 420)input to RGB or +YUV(444, 422, 420) output. + +Required properties: + +- compatible: Must be "xlnx,v-vpss-csc". + +- reg: Physical base address and length of the registers set for the device. + +- clocks: Reference to the clock that drives the ap_clk signal. + +- xlnx,max-height: Maximum number of lines. + Valid range from 64 to 4320. + +- xlnx,max-width: Maximum number of pixels in a line. + Valid range from 64 to 8192. + +- reset-gpios: Specifier for a GPIO that assert VPSS CSC (AP_RST_N) reset. + +- ports: Video ports, using the DT bindings defined in ../video-interfaces.txt. + The scaler has an input port (0) and an output port (1). + +Required port properties: + +- xlnx,video-format: Must be XVIP_VF_RBG, XVIP_VF_YUV_444 or XVIP_VF_YUV_422 + for input port (0) and XVIP_VF_RBG, XVIP_VF_YUV_444 or XVIP_VF_YUV_422 + for output port (1). See for more details. + +- xlnx,video-width: Video width as defined in video.txt. Must be either 8 or 10. + +Example: + csc_1:csc@a0040000 { + compatible = "xlnx,v-vpss-csc"; + reg = <0x0 0xa0040000 0x0 0x10000>; + clocks = <&vid_stream_clk>; + reset-gpios = <&gpio 84 1>; + xlnx,max-width = <3840>; + xlnx,max-height = <2160>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + /* Sink Pad */ + port@0 { + reg = <0>; + xlnx,video-format = ; + xlnx,video-width = <8>; + + csc_in: endpoint { + remote-endpoint = <&gamma_out>; + }; + }; + /* Source Pad */ + port@1 { + reg = <1>; + xlnx,video-format = ; + xlnx,video-width = <8>; + + csc_out: endpoint { + remote-endpoint = <&scalar_in>; + }; + }; + }; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/media/xilinx/xlnx,v-vpss-scaler.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/media/xilinx/xlnx,v-vpss-scaler.txt @@ -0,0 +1,93 @@ + Xilinx VPSS Scaler +------------------------ + +Required properties: + +- compatible: Must be "xlnx,v-vpss-scaler-2.2" or "xlnx,v-vpss-scaler-1.0". + The older string "xlnx,v-vpss-scaler" will be deprecated. + +- reg: Physical base address and length of the registers set for the device. + +- clocks: Reference to the AXI Streaming clock feeding the VPSS Scaler AP_CLK + and AXI4 Lite control interface clock. + +- clock-names: Must contain "aclk_axis" and "aclk_ctrl" in the same order as + clocks listed in clocks property. + +- xlnx,num-hori-taps, xlnx,num-vert-taps: The number of horizontal and vertical + taps for scaling filter(range: 2,4,6,8,10,12). + + A value of 2 represents bilinear filters. A value of 4 represents bicubic. + Values 6,8,10,12 represent polyphase filters. + +- xlnx,pix-per-clk : The pixels per clock property of the IP + +- reset-gpios: Specifier for a GPIO that assert for VPSS Scaler reset. + This property is mandatory for the Scaler + +- xlnx,max-height: Maximum number of lines. + Valid range from 64 to 4320. + +- xlnx,max-width: Maximum number of pixels in a line. + Valid range from 64 to 8192. + +- ports: Video ports, using the DT bindings defined in ../video-interfaces.txt. + The scaler has an input port (0) and an output port (1). + +Required port properties: + +- xlnx,video-format: Must be one of XVIP_VF_RBG or XVIP_VF_YUV_422 for + input port (0) and must be XVIP_VF_RBG or XVIP_VF_YUV_422 or for + the output port (1). + See for more details. + +- reg: This value represents the media pad of the V4L2 sub-device. + A Sink Pad is represented by reg = <0> + A Source Pad is represented by reg = <1> + +- xlnx,video-width: Video width as defined in video.txt + +Example: + + scaler_1:scaler@a0000000 { + compatible = "xlnx,v-vpss-scaler-1.0"; + reg = <0x0 0xa0000000 0x0 0x40000>; + clocks = <&vid_stream_clk>, <&misc_clk_2>; + clock-names = "aclk_axis", "aclk_ctrl"; + xlnx,num-hori-taps = <8>; + xlnx,num-vert-taps = <8>; + xlnx,pix-per-clk = <2>; + reset-gpios = <&gpio 87 1>; + xlnx,max-width = <3840>; + xlnx,max-height = <2160>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + /* Sink Pad */ + reg = <0>; + + xlnx,video-format = ; + xlnx,video-width = <8>; + + scaler_in: endpoint { + remote-endpoint = <&csc_out>; + }; + }; + + port@1 { + /* Source Pad */ + reg = <1>; + + xlnx,video-format = ; + xlnx,video-width = <8>; + + scaler_out: endpoint { + remote-endpoint = <&vcap_tpg_in>; + }; + }; + }; + + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/media/xilinx/xlnx,video.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/media/xilinx/xlnx,video.txt @@ -21,6 +21,18 @@ - ports: Video port, using the DT bindings defined in ../video-interfaces.txt. +Optional properties: +- memory-region : phandle to /reserved-memory node. + If memory is reserved for special use by DMAs then this node + can be used to refer and use from this reserved memory region. + +- xlnx,atomic_streamon: This property is useful for the scenario where some of + the upstream entities are being shared with multiple video devices (dma + engines) in the same media pipeline. When set, all entities belonging to + the media pipeline will get enabled even when any one of the dma engine + present in the media pipeline start streaming, otherwise the entities + get enabled only when all dma engines start streaming. + Required port properties: - direction: should be either "input" or "output" depending on the direction @@ -53,3 +65,46 @@ }; }; }; + +Example using reserved memory: +Reserving from 32bit Shared CMA pool of 512MiB using System RAM: +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +/ { + reserved-memory { + #address-cells = <0x2>; + #size-cells = <0x2>; + ranges; + psmem_multimedia: multimedia_cma_mem_region { + compatible = "shared-dma-pool"; + reg = <0x00 0x40000000 0x00 0x20000000>; + reusable; + }; + }; +}; +... + video_cap { + /* ... */ + memory-region = <&psmem_multimedia>; + }; + + +Reserving from 64bit Shared DMA pool of 1792 MiB using external PL based +DDR memory: +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +/ { + reserved-memory { + #address-cells = <0x2>; + #size-cells = <0x2>; + ranges; + plmem_multimedia: multimedia_dma_mem_region { + compatible = "shared-dma-pool"; + no-map; + reg = <0x48 0x0 0x0 0x70000000>; + }; + }; +}; +... + video_cap { + /* ... */ + memory-region = <&plmem_multimedia>; + } --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/mfd/rohm,bd71815-pmic.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/mfd/rohm,bd71815-pmic.yaml @@ -50,15 +50,15 @@ minimum: 0 maximum: 1 - rohm,charger-sense-resistor-ohms: - minimum: 10000000 - maximum: 50000000 + rohm,charger-sense-resistor-micro-ohms: + minimum: 10000 + maximum: 50000 description: | - BD71827 and BD71828 have SAR ADC for measuring charging currents. - External sense resistor (RSENSE in data sheet) should be used. If - something other but 30MOhm resistor is used the resistance value - should be given here in Ohms. - default: 30000000 + BD71815 has SAR ADC for measuring charging currents. External sense + resistor (RSENSE in data sheet) should be used. If something other + but a 30 mOhm resistor is used the resistance value should be given + here in micro Ohms. + default: 30000 regulators: $ref: ../regulator/rohm,bd71815-regulator.yaml @@ -67,7 +67,7 @@ gpio-reserved-ranges: description: | - Usage of BD71828 GPIO pins can be changed via OTP. This property can be + Usage of BD71815 GPIO pins can be changed via OTP. This property can be used to mark the pins which should not be configured for GPIO. Please see the ../gpio/gpio.txt for more information. @@ -113,7 +113,7 @@ gpio-controller; #gpio-cells = <2>; - rohm,charger-sense-resistor-ohms = <10000000>; + rohm,charger-sense-resistor-micro-ohms = <10000>; regulators { buck1: buck1 { --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/mfd/syscon.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -73,6 +73,8 @@ - rockchip,rv1126-qos - starfive,jh7100-sysmain - ti,am654-dss-oldi-io-ctrl + - xlnx,zynqmp-dpaud-setting + - xlnx,hdcp-keymngmt-blk-1.0 - const: syscon --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/misc/xlnx,dpu.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/misc/xlnx,dpu.yaml @@ -0,0 +1,91 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/misc/xlnx,dpu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx Deep learning Processing Unit (DPU) Vivado Flow + +maintainers: + - Ye Yang + +description: |+ + The DPUCZDX8G is the deep learning processing unit (DPU) designed to + support the Zynq UltraScale+ MPSoC and MicroBlaze. It is a configurable + computation engine optimized for convolutional neural networks. + + The driver supports up to 4 DPU cores with 40-bit addressing and 1 + softmax core with 32-bit addressing, depending on how the user config + the IP in Vivado TRD Flow. + + For more details refer to PG338 "DPUCZDX8G for Zynq UltraScale+ MPSoCs" + (https://www.xilinx.com/content/dam/xilinx/support/documentation/ip_documentation/dpu/v3_4/pg338-dpu.pdf) + +properties: + compatible: + enum: + - xlnx,dpuczdx8g-3.4 + - xlnx,dpuczdx8g-4.0 + - xlnx,dpuczdx8g-4.1 + + reg: + maxItems: 1 + + clocks: + description: List of clock specifiers. + items: + - description: AXI Lite clock + - description: dsp clock, used for DSP blocks in the DPUCZDX8G. The frequency is twice that of dpu clock + - description: dpu clock, used for DPUCZDX8G general logic + + clock-names: + items: + - const: s_axi_aclk + - const: dpu_2x_clk + - const: m_axi_dpu_aclk + + interrupts: + description: One interrupt per available DPU core(up to 4) or 1 softmax core + minItems: 1 + maxItems: 5 + + interrupt-names: + minItems: 1 + maxItems: 5 + items: + pattern: "^(dpu[0-3]|sfm)_interrupt$" + +required: + - compatible + - reg + - interrupts + - interrupt-names + +additionalProperties: false + +examples: + # Example for ZynqMP (2 DPU and 1 SOFTMAX) + - | + #include + + dpuczdx8g@8f000000 { + compatible = "xlnx,dpuczdx8g-3.4"; + reg = <0x8f000000 0x1000000>; + interrupt-parent = <&gic>; + interrupts = , + , + ; + interrupt-names = "dpu0_interrupt", "dpu1_interrupt", "sfm_interrupt"; + clocks = <&zynqmp_clk 71>, <&misc_clk_0>, <&misc_clk_1>; + clock-names = "s_axi_aclk", "dpu_2x_clk", "m_axi_dpu_aclk"; + }; + + # Example for Microblaze (1 DPU) + - | + dpuczdx8g@1000000 { + compatible = "xlnx,dpuczdx8g-3.4"; + reg = <0x01000000 0x1000000>; + interrupt-parent = <µblaze_0_axi_intc>; + interrupts = <8 2>; + interrupt-names = "dpu0_interrupt"; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/misc/xlnx,sd-fec.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/misc/xlnx,sd-fec.yaml @@ -0,0 +1,140 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/misc/xlnx,sd-fec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx SDFEC(16nm) IP + +maintainers: + - Cvetic, Dragan + - Erim, Salih + +description: + The Soft Decision Forward Error Correction (SDFEC) Engine is a Hard IP block + which provides high-throughput LDPC and Turbo Code implementations. + The LDPC decode & encode functionality is capable of covering a range of + customer specified Quasi-cyclic (QC) codes. The Turbo decode functionality + principally covers codes used by LTE. The FEC Engine offers significant + power and area savings versus implementations done in the FPGA fabric. + +properties: + compatible: + const: xlnx,sd-fec-1.1 + + reg: + maxItems: 1 + + clocks: + minItems: 2 + maxItems: 8 + additionalItems: true + items: + - description: Main processing clock for processing core + - description: AXI4-Lite memory-mapped slave interface clock + - description: Control input AXI4-Stream Slave interface clock + - description: DIN AXI4-Stream Slave interface clock + - description: Status output AXI4-Stream Master interface clock + - description: DOUT AXI4-Stream Master interface clock + - description: DIN_WORDS AXI4-Stream Slave interface clock + - description: DOUT_WORDS AXI4-Stream Master interface clock + + clock-names: + allOf: + - minItems: 2 + maxItems: 8 + additionalItems: true + items: + - const: core_clk + - const: s_axi_aclk + - items: + enum: + - core_clk + - s_axi_aclk + - s_axis_ctrl_aclk + - s_axis_din_aclk + - m_axis_status_aclk + - m_axis_dout_aclk + - s_axis_din_words_aclk + - m_axis_dout_words_aclk + + interrupts: + maxItems: 1 + + xlnx,sdfec-code: + description: + The SD-FEC integrated block supports Low Density Parity Check (LDPC) + decoding and encoding and Turbo code decoding. The LDPC codes used are + highly configurable, and the specific code used can be specified on + a codeword-by-codeword basis. The Turbo code decoding is required by LTE + standard. + $ref: /schemas/types.yaml#/definitions/string + items: + enum: [ ldpc, turbo ] + + xlnx,sdfec-din-width: + description: + Configures the DIN AXI stream where a value of 1 + configures a width of "1x128b", 2 a width of "2x128b" and 4 configures a width + of "4x128b". + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 1, 2, 4 ] + + xlnx,sdfec-din-words: + description: + A value 0 indicates that the DIN_WORDS interface is + driven with a fixed value and is not present on the device, a value of 1 + configures the DIN_WORDS to be block based, while a value of 2 configures the + DIN_WORDS input to be supplied for each AXI transaction. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 0, 1, 2 ] + + xlnx,sdfec-dout-width: + description: + Configures the DOUT AXI stream where a value of 1 configures a width of "1x128b", + 2 a width of "2x128b" and 4 configures a width of "4x128b". + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 1, 2, 4 ] + + xlnx,sdfec-dout-words: + description: + A value 0 indicates that the DOUT_WORDS interface is + driven with a fixed value and is not present on the device, a value of 1 + configures the DOUT_WORDS to be block based, while a value of 2 configures the + DOUT_WORDS input to be supplied for each AXI transaction. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 0, 1, 2 ] + +required: + - compatible + - reg + - clocks + - clock-names + - xlnx,sdfec-code + - xlnx,sdfec-din-width + - xlnx,sdfec-din-words + - xlnx,sdfec-dout-width + - xlnx,sdfec-dout-words + +additionalProperties: false + +examples: + - | + #include + + sd-fec@a0040000 { + compatible = "xlnx,sd-fec-1.1"; + reg = <0xa0040000 0x40000>; + clocks = <&misc_clk_2>, <&misc_clk_0>, <&misc_clk_1>, <&misc_clk_1>, + <&misc_clk_1>, <&misc_clk_1>; + clock-names = "core_clk", "s_axi_aclk", "s_axis_ctrl_aclk", + "s_axis_din_aclk", "m_axis_status_aclk", + "m_axis_dout_aclk"; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH>; + xlnx,sdfec-code = "ldpc"; + xlnx,sdfec-din-width = <2>; + xlnx,sdfec-din-words = <0>; + xlnx,sdfec-dout-width = <1>; + xlnx,sdfec-dout-words = <0>; + }; + --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/mmc/mmc-controller.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/mmc/mmc-controller.yaml @@ -25,7 +25,7 @@ "#address-cells": const: 1 description: | - The cell is the slot ID if a function subnode is used. + The cell is the SDIO function number if a function subnode is used. "#size-cells": const: 0 --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/net/can/xilinx,can.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/net/can/xilinx,can.yaml @@ -5,7 +5,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: - Xilinx Axi CAN/Zynq CANPS controller + Xilinx CAN and CANFD controller maintainers: - Appana Durga Kedareswara rao @@ -49,6 +49,10 @@ resets: maxItems: 1 + xlnx,has-ecc: + $ref: /schemas/types.yaml#/definitions/flag + description: CAN TX_OL, TX_TL and RX FIFOs have ECC support(AXI CAN) + required: - compatible - reg @@ -137,6 +141,7 @@ interrupts = ; tx-fifo-depth = <0x40>; rx-fifo-depth = <0x40>; + xlnx,has-ecc; }; - | --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/net/fsl,fec.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/net/fsl,fec.yaml @@ -183,6 +183,13 @@ description: Register bits of stop mode control, the format is <&gpr req_gpr req_bit>. + fsl,pps-channel: + $ref: /schemas/types.yaml#/definitions/uint32 + default: 0 + description: + Specifies to which timer instance the PPS signal is routed. + enum: [0, 1, 2, 3] + mdio: $ref: mdio.yaml# unevaluatedProperties: false --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/net/mediatek,net.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/net/mediatek,net.yaml @@ -337,8 +337,8 @@ minItems: 4 clocks: - minItems: 34 - maxItems: 34 + minItems: 24 + maxItems: 24 clock-names: items: @@ -351,18 +351,6 @@ - const: ethwarp_wocpu1 - const: ethwarp_wocpu0 - const: esw - - const: netsys0 - - const: netsys1 - - const: sgmii_tx250m - - const: sgmii_rx250m - - const: sgmii2_tx250m - - const: sgmii2_rx250m - - const: top_usxgmii0_sel - - const: top_usxgmii1_sel - - const: top_sgm0_sel - - const: top_sgm1_sel - - const: top_xfi_phy0_xtal_sel - - const: top_xfi_phy1_xtal_sel - const: top_eth_gmii_sel - const: top_eth_refck_50m_sel - const: top_eth_sys_200m_sel @@ -375,16 +363,10 @@ - const: top_netsys_sync_250m_sel - const: top_netsys_ppefb_250m_sel - const: top_netsys_warp_sel - - const: wocpu1 - - const: wocpu0 - const: xgp1 - const: xgp2 - const: xgp3 - mediatek,sgmiisys: - minItems: 2 - maxItems: 2 - patternProperties: "^mac@[0-1]$": type: object --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/net/xilinx-phy.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/net/xilinx-phy.txt @@ -0,0 +1,15 @@ +Xilinx PCS/PMA PHY bindings + +Required properties: + - reg - The ID number for the phy, usually a small integer + +Optional properties: + - xlnx,phy-type - Describes type 1000BaseX (set to 0x5) or + SGMII (set to 0x4) + +Example: + + ethernet-phy@9 { + reg = <9>; + xlnx,phy-type = <0x5>; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml @@ -4,29 +4,69 @@ $id: http://devicetree.org/schemas/net/xlnx,axi-ethernet.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: AXI 1G/2.5G Ethernet Subsystem +title: XILINX AXI Ethernet Subsystem description: | - Also called AXI 1G/2.5G Ethernet Subsystem, the xilinx axi ethernet IP core - provides connectivity to an external ethernet PHY supporting different - interfaces: MII, GMII, RGMII, SGMII, 1000BaseX. It also includes two - segments of memory for buffering TX and RX, as well as the capability of - offloading TX/RX checksum calculation off the processor. + Following MAC configurations are supported- + a) AXI 1G/2.5G Ethernet Subsystem. + b) 10G/25G High Speed Ethernet Subsystem. + c) 10 Gigabit Ethernet Subsystem. + d) USXGMII Ethernet Subsystem. + e) MRMAC Ethernet Subsystem. + f) 1G/10G/25G Switching Ethernet Subsystem. + g) DCMAC Ethernet Subsystem. + + AXI 1G/2.5G Ethernet Subsystem- also called AXI 1G/2.5G Ethernet Subsystem, + the xilinx axi ethernet IP core provides connectivity to an external ethernet + PHY supporting different interfaces: MII, GMII, RGMII, SGMII, 1000BaseX. + It also includes two segments of memory for buffering TX and RX, as well as + the capability of offloading TX/RX checksum calculation off the processor. Management configuration is done through the AXI interface, while payload is sent and received through means of an AXI DMA controller. This driver includes the DMA driver code, so this driver is incompatible with AXI DMA driver. + 10G/25G High Speed Ethernet Subsystem implements the 25G Ethernet Media + Access Controller (MAC) with a Physical Coding Sublayer (PCS) as specified + by the 25G Ethernet Consortium. Legacy operation at 10 Gb/s is supported. + + The 10G Ethernet subsystem provides 10 Gb/s Ethernet MAC, Physical Coding + Sublayer (PCS) and Physical Medium Attachment (PMA) transmit and receive + functionality over an AXI4-Stream interface. + + The Universal Serial 10GE Media Independent Interface (USXGMII) ethernet + subsystem implements an Ethernet Media Access Controller (MAC) with a + mechanism to carry a single port of 10M, 100M, 1G, 2.5G, 5G or 10GE over an + IEEE 802.3 Clause 49 BASE-R physical coding sublayer/physical layer (PCS/PHY). + + MRMAC is a hardened Ethernet IP on Versal supporting multiple rates from + 10G to 100G which can be used with a soft DMA controller. + + The Xilinx 1G/10G/25G Switching Ethernet Subsystem contains integrated MAC + and PCS and it supports runtime switchable speeds among 1G,10G & 25G + + 600G Channelized Multirate Ethernet Subsystem (DCMAC Subsystem) is hardened + Ethernet IP that can be configured for up to six ports with independent MAC + and PHY functions at the IEEE Standard MAC Rates from 100GE to 400GE + and an overall maximum bandwidth of 600 Gbps. + maintainers: - Radhey Shyam Pandey properties: compatible: enum: - - xlnx,axi-ethernet-1.00.a - - xlnx,axi-ethernet-1.01.a - - xlnx,axi-ethernet-2.01.a + - xlnx,axi-ethernet-1.00.a # AXI 1G Ethernet Subsystem. + - xlnx,axi-ethernet-1.01.a # AXI 1G Ethernet Subsystem. + - xlnx,axi-ethernet-2.01.a # AXI 1G Ethernet Subsystem. + - xlnx,axi-2_5-gig-ethernet-1.0 # AXI 2.5G Ethernet Subsystem. + - xlnx,ten-gig-eth-mac # 10 Gigabit Ethernet Subsystem. + - xlnx,xxv-ethernet-1.0 # 10G/25G High Speed Ethernet Subsystem. + - xlnx,xxv-usxgmii-ethernet-1.0 # USXGMII Ethernet Subsystem. + - xlnx,mrmac-ethernet-1.0 # MRMAC Ethernet Subsystem. + - xlnx,ethernet-1-10-25g-2.7 # 1G/10G/25G Switching Ethernet Subsystem. + - xlnx,dcmac-2.4 # DCMAC Ethernet Subsystem. reg: description: @@ -34,7 +74,9 @@ and length of the AXI DMA controller IO space, unless axistream-connected is specified, in which case the reg attribute of the node referenced by it is used. - maxItems: 2 + Address and length of Ethernet Offload Engine IO space. + minItems: 1 + maxItems: 3 interrupts: items: @@ -60,7 +102,7 @@ - gmii - rgmii - sgmii - - 1000BaseX + - 1000base-x xlnx,phy-type: description: @@ -87,8 +129,9 @@ xlnx,switch-x-sgmii: type: boolean description: - Indicate the Ethernet core is configured to support both 1000BaseX and - SGMII modes. If set, the phy-mode should be set to match the mode + Indicate that Ethernet core supports either 1000BaseX <-> SGMII modes + switching in 1G MAC or 2500BaseX <-> SGMII modes switching for + AXI 2.5G MAC. If set, the phy-mode should be set to match the mode selected on core reset (i.e. by the basex_or_sgmii core input line). clocks: @@ -136,19 +179,235 @@ minItems: 2 maxItems: 32 + dma-coherent: true + + xlnx,eth-hasnobuf: + type: boolean + description: Used when 1G MAC is configured in non-processor mode. + + xlnx,usxgmii-rate: + $ref: /schemas/types.yaml#/definitions/uint32 + description: USXGMII PHY speed + + xlnx,rxtsfifo: + $ref: /schemas/types.yaml#/definitions/phandle + description: Configures the axi fifo for receive timestamping. + + axififo-connected: + $ref: /schemas/types.yaml#/definitions/phandle + description: Configures the axi fifo for transmit timestamping. + + ptp-hardware-clock: + $ref: /schemas/types.yaml#/definitions/phandle + description: Indicate the xilinx PTP device node to read PTP clock + index(/dev/ptp0 etc). This property is for MRMAC and 10G/25G. + + xlnx,mrmac-rate: + $ref: /schemas/types.yaml#/definitions/uint32 + description: MRMAC rate in Mbps. + deprecated: true + + xlnx,gtlane: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Indicate the GT reset and speed control lane for the + the current MRMAC lane. + + xlnx,gtpll: + $ref: /schemas/types.yaml#/definitions/phandle + description: Handle to AXI GPIO instance for GT PLL mask control. + This is required to control the common PLL mask bits. + + xlnx,gtctrl: + $ref: /schemas/types.yaml#/definitions/phandle + description: Handle to AXI GPIO instance for GT speed and reset + control for each MRMAC lane. + + xlnx,phcindex: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Indicate the index of the physical hardware clock + to be used as per PTP clock connected to the given + MRMAC lane. + deprecated: true + + xlnx,runtime-switch: + $ref: /schemas/types.yaml#/definitions/string + description: Indicates speed switching capability of 1G/10G/25G + ethernet IP. Can be either "1G / 10G", which is the default switching + capability if this property is not present or "1G / 10G / 25G". + + max-speed: true + + gt_ctrl-gpios: + description: Phandle and specifier for GT control GPIO used to + configure GT. + + gt_rx_dpath-gpios: + description: Phandle and specifier for the GPIO used to + reset GT Rx datapath. + + gt_tx_dpath-gpios: + description: Phandle and specifier for the GPIO used to + reset GT Tx datapath. + + gt_tx_rst_done-gpios: + description: Phandle and specifier for the GPIO used to + get GT Tx reset status. + + gt_rx_rst_done-gpios: + description: Phandle and specifier for the GPIO used to + get GT Rx reset status. + + gt_rsts-gpios: + description: Phandle and specifier for the GPIO used to + reset Tx and Rx serdes. + + reg-names: + oneOf: + - items: + - const: mac + - const: dma + - const: eoe + - items: + - enum: + - mac + - enum: + - dma + - eoe + - items: + - const: mac + + xlnx,has-hw-offload: + type: boolean + description: Used when Ethernet Offload is connected to existing Ethernet IP. + + xlnx,tx-hw-offload: + description: + Segmentation offload. 0 for disabling segmentation offload, + 1 for checksum offload and 2 for both checksum and UDP segmentation offload. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2] + + xlnx,rx-hw-offload: + description: + Receive offload. 0 for disabling receive offload, + 1 for checksum offload and 2 for both checksum and UDP receive offload. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2] + required: - compatible - interrupts - reg - xlnx,rxmem - - phy-handle allOf: - $ref: /schemas/net/ethernet-controller.yaml# + - if: + properties: + compatible: + contains: + enum: + - xlnx,xxv-usxgmii-ethernet-1.0 + + then: + properties: + xlnx,usxgmii-rate: + enum: [10, 100, 1000, 2500, 5000, 10000] + + - if: + properties: + compatible: + contains: + enum: + - xlnx,mrmac-ethernet-1.0 + + then: + properties: + max-speed: + enum: [10000, 25000] + + xlnx,gtlane: + enum: [0, 1, 2, 3] + + xlnx,phcindex: + enum: [0, 1, 2, 3] + + required: + - max-speed + - xlnx,gtlane + - xlnx,gtpll + - xlnx,gtctrl + + - if: + properties: + compatible: + contains: + enum: + - xlnx,ethernet-1-10-25g-2.7 + + then: + properties: + xlnx,runtime-switch: + enum: + - 1G / 10G + - 1G / 10G / 25G + + - if: + properties: + compatible: + contains: + enum: + - xlnx,axi-ethernet-1.00.a + - xlnx,axi-ethernet-1.01.a + - xlnx,axi-ethernet-2.01.a + - xlnx,axi-2_5-gig-ethernet-1.0 + then: + required: + - phy-handle + + - if: + properties: + compatible: + contains: + enum: + - xlnx,dcmac-2.4 + then: + properties: + max-speed: + enum: [100000, 200000, 400000] + + gt_ctrl-gpios: + maxItems: 32 + + gt_rx_dpath-gpios: + maxItems: 23 + + gt_tx_dpath-gpios: + maxItems: 23 + + gt_tx_rst_done-gpios: + maxItems: 24 + + gt_rx_rst_done-gpios: + maxItems: 24 + + gt_rsts-gpios: + maxItems: 14 + + required: + - max-speed + - gt_ctrl-gpios + - gt_rx_dpath-gpios + - gt_tx_dpath-gpios + - gt_tx_rst_done-gpios + - gt_rx_rst_done-gpios + - gt_rsts-gpios + additionalProperties: false examples: +# 1) AXI 1G/2.5G Ethernet Subsystem + AXIDMA without "axistream-connected" property - | axi_ethernet_eth: ethernet@40c00000 { compatible = "xlnx,axi-ethernet-1.00.a"; @@ -174,6 +433,7 @@ }; }; +# 2) AXI 1G/2.5G Ethernet Subsystem + AXIDMA with "axistream-connected" property - | axi_ethernet_eth1: ethernet@40000000 { compatible = "xlnx,axi-ethernet-1.00.a"; @@ -181,7 +441,7 @@ clock-names = "s_axi_lite_clk", "axis_clk", "ref_clk", "mgt_clk"; clocks = <&axi_clk>, <&axi_clk>, <&pl_enet_ref_clk>, <&mgt_clk>; phy-mode = "mii"; - reg = <0x00 0x40000000 0x00 0x40000>; + reg = <0x40000000 0x40000>; xlnx,rxcsum = <0x2>; xlnx,rxmem = <0x800>; xlnx,txcsum = <0x2>; @@ -195,5 +455,121 @@ device_type = "ethernet-phy"; reg = <1>; }; + }; + }; + +# 3) #Example for MRMAC Ethernet subsystem + - | + gt_pll: gpio@a4000000 { + reg = <0xa4000000 0x10000>; + + }; + + gt_ctrl: gpio@a4010000 { + reg = <0xa4010000 0x40000>; + + }; + + mrmac: ethernet@80000000 { + axistream-connected = <&dma>; + compatible = "xlnx,mrmac-ethernet-1.0"; + reg = <0xa4090000 0x1000>; + interrupt-parent = <&gic>; + interrupts = <0 91 4>; + max-speed = <10000>; + xlnx,gtpll = <>_pll>; + xlnx,gtctrl = <>_ctrl>; + xlnx,gtlane = <0x0>; + xlnx,rxmem = <0x8000>; + ptp-hardware-clock = <&ptp_device>; + + }; + +# 4) #Example for DCMAC Ethernet subsystem + - | + gpio1: gpio@a4130000 { + compatible = "xlnx,xps-gpio-1.00.a"; + reg = <0xa4130000 0x10000>; + #gpio-cells = <0x2>; + gpio-controller; + }; + + gpio2: gpio@a4150000 { + compatible = "xlnx,xps-gpio-1.00.a"; + reg = <0xa4150000 0x10000>; + #gpio-cells = <0x2>; + gpio-controller; + }; + + gpio3: gpio@a4140000 { + compatible = "xlnx,xps-gpio-1.00.a"; + reg = <0xa4140000 0x10000>; + #gpio-cells = <0x2>; + gpio-controller; + }; + + dcmac: ethernet@a4000000 { + axistream-connected = <&dma>; + compatible = "xlnx,dcmac-2.4"; + reg = <0xa4000000 0x100000>; + interrupt-parent = <&gic>; + interrupts = <0x0 0x5c 0x4 0x0 0x5d 0x4>; + xlnx,rxmem = <0x8000>; + max-speed = <100000>; + + gt_ctrl-gpios = <&gpio1 0 0>, <&gpio1 1 0>, <&gpio1 2 0>, <&gpio1 3 0>, <&gpio1 4 0>, <&gpio1 5 0>, + <&gpio1 6 0>, <&gpio1 7 0>, <&gpio1 8 0>, <&gpio1 9 0>, <&gpio1 10 0>, <&gpio1 11 0>, <&gpio1 12 0>, + <&gpio1 13 0>, <&gpio1 14 0>, <&gpio1 15 0>, <&gpio1 16 0>, <&gpio1 17 0>, <&gpio1 18 0>, + <&gpio1 19 0>, <&gpio1 20 0>, <&gpio1 21 0>, <&gpio1 22 0>, <&gpio1 23 0>, <&gpio1 24 0>, + <&gpio1 25 0>, <&gpio1 26 0>, <&gpio1 27 0>, <&gpio1 28 0>, <&gpio1 29 0>, <&gpio1 30 0>, + <&gpio1 31 0>; + + gt_rx_dpath-gpios = <&gpio2 0 0>, <&gpio2 1 0>, <&gpio2 2 0>, <&gpio2 3 0>, <&gpio2 4 0>, + <&gpio2 5 0>, <&gpio2 6 0>, <&gpio2 7 0>, <&gpio2 8 0>, <&gpio2 9 0>, <&gpio2 10 0>, <&gpio2 11 0>, + <&gpio2 12 0>, <&gpio2 13 0>, <&gpio2 14 0>, <&gpio2 15 0>, <&gpio2 16 0>, <&gpio2 17 0>, + <&gpio2 18 0>, <&gpio2 19 0>, <&gpio2 20 0>, <&gpio2 21 0>, <&gpio2 22 0>; + + gt_tx_dpath-gpios = <&gpio2 0 0>, <&gpio2 1 0>, <&gpio2 2 0>, <&gpio2 3 0>, <&gpio2 4 0>, + <&gpio2 5 0>, <&gpio2 6 0>, <&gpio2 7 0>, <&gpio2 8 0>, <&gpio2 9 0>, <&gpio2 10 0>, <&gpio2 11 0>, + <&gpio2 12 0>, <&gpio2 13 0>, <&gpio2 14 0>, <&gpio2 15 0>, <&gpio2 16 0>, <&gpio2 17 0>, + <&gpio2 18 0>, <&gpio2 19 0>, <&gpio2 20 0>, <&gpio2 21 0>, <&gpio2 22 0>; + + gt_tx_rst_done-gpios = <&gpio3 0 0>, <&gpio3 1 0>, <&gpio3 2 0>, <&gpio3 3 0>, <&gpio3 4 0>, + <&gpio3 5 0>, <&gpio3 6 0>, <&gpio3 7 0>, <&gpio3 8 0>, <&gpio3 9 0>, <&gpio3 10 0>, + <&gpio3 11 0>, <&gpio3 12 0>, <&gpio3 13 0>, <&gpio3 14 0>, <&gpio3 15 0>, <&gpio3 16 0>, + <&gpio3 17 0>, <&gpio3 18 0>, <&gpio3 19 0>, <&gpio3 20 0>, <&gpio3 21 0>, <&gpio3 22 0>, + <&gpio3 23 0>; + + gt_rx_rst_done-gpios = <&gpio3 24 0>, <&gpio3 25 0>, <&gpio3 26 0>, <&gpio3 27 0>, + <&gpio3 28 0>, <&gpio3 29 0>, <&gpio3 30 0>, <&gpio3 31 0>, <&gpio3 32 0>, <&gpio3 33 0>, + <&gpio3 34 0>, <&gpio3 35 0>, <&gpio3 36 0>, <&gpio3 37 0>, <&gpio3 38 0>, <&gpio3 39 0>, + <&gpio3 40 0>, <&gpio3 41 0>, <&gpio3 42 0>, <&gpio3 43 0>, <&gpio3 44 0>, <&gpio3 45 0>, + <&gpio3 46 0>, <&gpio3 47 0>; + + gt_rsts-gpios = <&gpio3 0 0>, <&gpio3 1 0>, <&gpio3 2 0>, <&gpio3 3 0>, <&gpio3 4 0>, <&gpio3 5 0>, + <&gpio3 6 0>, <&gpio3 7 0>, <&gpio3 8 0>, <&gpio3 9 0>, <&gpio3 10 0>, <&gpio3 11 0>, <&gpio3 12 0>, + <&gpio3 13 0>; + }; + +# 5) #Example for Ethernet Offload Engine + - | + axi_ethernet_eoe: ethernet@80020000 { + compatible = "xlnx,axi-ethernet-1.00.a"; + interrupts = <0>; + clock-names = "s_axi_lite_clk", "axis_clk", "ref_clk", "mgt_clk"; + clocks = <&axi_clk>, <&axi_clk>, <&pl_enet_ref_clk>, <&mgt_clk>; + phy-mode = "mii"; + reg = <0x80020000 0x10000>,<0x80008000 0x8000>; + reg-names = "mac", "eoe"; + phy-handle = <&phy2>; + xlnx,rxmem = <0x800>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + phy2: ethernet-phy@1 { + device_type = "ethernet-phy"; + reg = <1>; + }; }; }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/net/xlnx,emaclite.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/net/xlnx,emaclite.yaml @@ -29,6 +29,9 @@ interrupts: maxItems: 1 + clocks: + maxItems: 1 + phy-handle: true local-mac-address: true --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/net/xlnx,gmii-to-rgmii.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/net/xlnx,gmii-to-rgmii.yaml @@ -31,6 +31,13 @@ phy-handle: $ref: ethernet-controller.yaml#/properties/phy-handle + clocks: + maxItems: 1 + + clock-names: + const: clkin + description: 200/375 MHz free-running clock is used as a input clock. + required: - compatible - reg @@ -51,5 +58,7 @@ compatible = "xlnx,gmii-to-rgmii-1.0"; reg = <8>; phy-handle = <&phy>; + clocks = <&dummy>; + clock-names = "clkin"; }; }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/nvmem/xlnx,versal-sec-cfg.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/nvmem/xlnx,versal-sec-cfg.yaml @@ -0,0 +1,84 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/nvmem/xlnx,versal-sec-cfg.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx Secure Configuration driver + +description: | + The versal_sec_cfg node provides access to the BBRAM keys, + BBRAM user data and volatile user keys by using the firmware interface. + +maintainers: + - Harsha + +allOf: + - $ref: nvmem.yaml# + +properties: + compatible: + const: xlnx,versal-sec-cfg + + +unevaluatedProperties: false + +examples: + - | + versal-sec-cfg { + compatible = "xlnx,versal-sec-cfg"; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + bbram_zeroize: bbram-zeroize@4 { + reg = <0x4 0x4>; + }; + + bbram_key: bbram-key@10 { + reg = <0x10 0x20>; + }; + + bbram_usr: bbram-usr@30 { + reg = <0x30 0x4>; + }; + + bbram_lock: bbram-lock@48 { + reg = <0x48 0x4>; + }; + + user_key0: user-key@110 { + reg = <0x110 0x20>; + }; + + user_key1: user-key@130 { + reg = <0x130 0x20>; + }; + + user_key2: user-key@150 { + reg = <0x150 0x20>; + }; + + user_key3: user-key@170 { + reg = <0x170 0x20>; + }; + + user_key4: user-key@190 { + reg = <0x190 0x20>; + }; + + user_key5: user-key@1b0 { + reg = <0x1b0 0x20>; + }; + + user_key6: user-key@1d0 { + reg = <0x1d0 0x20>; + }; + + user_key7: user-key@1f0 { + reg = <0x1f0 0x20>; + }; + }; + }; + --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.yaml @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/nvmem/xlnx,zynqmp-nvmem.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Zynq UltraScale+ MPSoC Non Volatile Memory interface + +description: | + The ZynqMP MPSoC provides access to the hardware related data + like SOC revision, IDCODE and specific purpose efuses. + +maintainers: + - Kalyani Akula + - Praveen Teja Kundanala + +allOf: + - $ref: nvmem.yaml# + +properties: + compatible: + const: xlnx,zynqmp-nvmem-fw + +required: + - compatible + +unevaluatedProperties: false + +examples: + - | + nvmem-firmware { + compatible = "xlnx,zynqmp-nvmem-fw"; + #address-cells = <1>; + #size-cells = <1>; + + /* Data cells */ + soc_revision: soc-revision@0 { + reg = <0x0 0x4>; + }; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/pci/rcar-pci-host.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/pci/rcar-pci-host.yaml @@ -77,6 +77,9 @@ vpcie12v-supply: description: The 12v regulator to use for PCIe. + iommu-map: true + iommu-map-mask: true + required: - compatible - reg --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie.yaml @@ -37,6 +37,7 @@ description: This property is needed if using 24MHz OSC for RC's PHY. ep-gpios: + maxItems: 1 description: pre-reset GPIO vpcie12v-supply: --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml @@ -17,6 +17,7 @@ enum: - xlnx,versal-cpm-host-1.00 - xlnx,versal-cpm5-host + - xlnx,versal-cpm5-host1 reg: items: --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml @@ -14,10 +14,21 @@ properties: compatible: - const: xlnx,xdma-host-3.00 + enum: + - xlnx,xdma-host-3.00 + - xlnx,qdma-host-3.00 reg: - maxItems: 1 + items: + - description: configuration region and XDMA bridge register. + - description: QDMA bridge register. + minItems: 1 + + reg-names: + items: + - const: cfg + - const: breg + minItems: 1 ranges: maxItems: 2 @@ -76,6 +87,27 @@ - "#interrupt-cells" - interrupt-controller +if: + properties: + compatible: + contains: + enum: + - xlnx,qdma-host-3.00 +then: + properties: + reg: + minItems: 2 + reg-names: + minItems: 2 + required: + - reg-names +else: + properties: + reg: + maxItems: 1 + reg-names: + maxItems: 1 + unevaluatedProperties: false examples: --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/perf/xilinx-apm.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/perf/xilinx-apm.yaml @@ -0,0 +1,137 @@ +# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/perf/xilinx-apm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx Axi Performance Monitor + +maintainers: + - Shubhrajyoti Datta + +properties: + compatible: + items: + - enum: + - xlnx,axi-perf-monitor + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + interrupts: + maxItems: 1 + + xlnx,enable-profile: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [0, 1] + description: + Enables the profile mode. + maxItems: 1 + + xlnx,enable-trace: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [0, 1] + description: + Enables trace mode. + maxItems: 1 + + xlnx,num-monitor-slots: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - minimum: 1 + - maximum: 8 + description: + Number of monitor slots. + + xlnx,enable-event-count: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [0, 1] + description: + Enable event count. + + xlnx,enable-event-log: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [0, 1] + description: + Enable event log. + + xlnx,have-sampled-metric-cnt: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + description: + Sampled metric counters enabled in APM. + + xlnx,metric-count-width: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [32, 64] + description: + Metric Counter width. + + xlnx,metric-count-scale: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [1, 2, 4, 8] + description: + Metric Counter scale factor. + + xlnx,num-of-counters: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + description: + Number of counters in APM. + + xlnx,metrics-sample-count-width: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [32, 64] + description: + Sampled metric counter width. + + xlnx,global-count-width: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [32, 64] + description: + Global Clock counter width. + + xlnx,id-filter-32bit: + description: APM is in 32-bit mode. + type: boolean + +required: + - compatible + - reg + - clocks + - interrupts + +additionalProperties: false + +examples: + - | + apm@44a00000 { + compatible = "xlnx,axi-perf-monitor"; + interrupt-parent = <&axi_intc_1>; + interrupts = <1 2>; + reg = <0x44a00000 0x1000>; + clocks = <&clkc 15>; + xlnx,enable-profile = <0>; + xlnx,enable-trace = <0>; + xlnx,num-monitor-slots = <4>; + xlnx,enable-event-count = <1>; + xlnx,enable-event-log = <1>; + xlnx,have-sampled-metric-cnt = <1>; + xlnx,num-of-counters = <8>; + xlnx,metric-count-width = <32>; + xlnx,metrics-sample-count-width = <32>; + xlnx,global-count-width = <32>; + xlnx,metric-count-scale = <1>; + xlnx,id-filter-32bit; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml @@ -73,7 +73,6 @@ - reg - clocks - clock-names - - power-domains - resets - reset-names - vdda-phy-supply @@ -134,6 +133,21 @@ clock-names: maxItems: 1 + - if: + properties: + compatible: + contains: + enum: + - qcom,msm8996-qmp-ufs-phy + - qcom,msm8998-qmp-ufs-phy + then: + properties: + power-domains: + false + else: + required: + - power-domains + additionalProperties: false examples: --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml @@ -15,9 +15,6 @@ properties: compatible: oneOf: - - enum: - - qcom,sc8180x-usb-hs-phy - - qcom,usb-snps-femto-v2-phy - items: - enum: - qcom,sa8775p-usb-hs-phy @@ -26,6 +23,7 @@ - items: - enum: - qcom,sc7280-usb-hs-phy + - qcom,sc8180x-usb-hs-phy - qcom,sdx55-usb-hs-phy - qcom,sdx65-usb-hs-phy - qcom,sm6375-usb-hs-phy --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/phy/xlnx,gt-quad-base.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/phy/xlnx,gt-quad-base.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/xlnx,gt-quad-base.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx DP GTQUAD PHY + +maintainers: + - Jagadeesh Banisetti + +description: | + The Xilinx DP GTQUAD PHY Controller core is designed for enabling + connectivity with Xilinx DP RX and TX with xilinx versal devices. + +properties: + compatible: + items: + - enum: + - xlnx,gt-quad-base-1.1 + + reg: + maxItems: 1 + + clocks: + description: List of clock specifiers + items: + - description: AXI Lite clock + + "#phy-cells": + const: 0 + +required: + - clocks + - compatible + - reg + - '#phy-cells' + +additionalProperties: false + +examples: + - | + gt_quad_base: gt_qb@a4080000 { + clocks = <&misc_clk_0>; + compatible = "xlnx,gt-quad-base-1.1"; + reg = <0xa4080000 0x10000>; + #phy-cells = <0>; + }; +... --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/phy/xlnx,v-hmdi-phy1.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/phy/xlnx,v-hmdi-phy1.yaml @@ -0,0 +1,304 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/xlnx,v-hmdi-phy1.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx HDMI PHY + +maintainers: + - Rajesh Gugulothu + +description: | + The Xilinx HDMI PHY Controller core is designed for enabling plug-and-play + connectivity with Xilinx HDMI 2.1 technology MAC transmit or receive + subsystems. The interface between the video MAC and PHY layers are + standardized to enable ease of use in accessing shared transceiver resource. + +properties: + compatible: + items: + - enum: + - xlnx,v-hdmi-phy1-1.0 + - xlnx,v-hdmi-gt-controller-1.0 + + reg: + maxItems: 1 + + rxch4-sel-gpios: + maxItems: 1 + description: | + Select HDMI 2.1 PHY Rx channel as data or clock based on FRL or TMDS mode. + This property is required only for the boards which has external FMC + card on it. Polarity of this GPIO is GPIO_ACTIVE_LOW + + interrupts: + maxItems: 1 + + clocks: + description: List of clock specifiers + items: + - description: AXI Lite clock + - description: DRP clock + + clock-names: + items: + - const: axi4lite_aclk + - const: drpclk + + xlnx,transceiver-type: + description: | + Gigabit transceiver type that IP configured with.Possible values are as + below - + 5 - GTHE4 + 6 - GTYE4 + 7 - GTYE5 + 8 - GTYP + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [5, 6, 7, 8] + + xlnx,tx-no-of-channels: + description: Max number of channels that Tx configured with. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [1, 2, 4] + + xlnx,rx-no-of-channels: + description: Max number of channels that Rx configured with. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [1, 2, 4] + + xlnx,rx-protocol: + description: Protocol type that Tx is configured with. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1 + maximum: 3 + + xlnx,tx-protocol: + description: Protocol type that Rx is configured with. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1 + maximum: 3 + + xlnx,nidru: + description: nidru present in the IP or not. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [0, 1] + + xlnx,tx-refclk-sel: + description: Available reference clocks for Tx PLL clock selection + multiplexer. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 6 + + xlnx,rx-refclk-sel: + description: Available reference clocks for Rx PLL clock selection + multiplexer. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 6 + + xlnx,tx-frl-refclk-sel: + description: Available reference clocks for Tx PLL FRL(fixed rate link) + clock selection multiplexer. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1 + maximum: 7 + + xlnx,rx-frl-refclk-sel: + description: Available reference clocks for Rx PLL FRL(fixed rate link) + clock selection multiplexer. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 6 + + xlnx,tx-pll-selection: + description: Available reference clocks used to driver Tx datapath. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 6 + + xlnx,rx-pll-selection: + description: Available reference clocks used to driver Rx datapath. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 6 + + xlnx,nidru-refclk-sel: + description: Available reference clocks for NI-DRU(non-integer data rate + unit) clock selection multiplexer. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1 + maximum: 7 + + xlnx,transceiver-width: + description: Transceiver width that IP is configured with. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [2, 4] + + xlnx,gt-direction: + description: | + Gigabit transceiver direction that IP configured with. Possible values + are as below + 1 - SIMPLE_TX + 2 - SIMPLE_RX + 3 - DUPLEX + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [1, 2, 3] + + xlnx,input-pixels-per-clock: + description: | + Input number of pixel per clock that IP configured with. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [1, 2, 4, 8] + + xlnx,use-gt-ch4-hdmi: + description: | + use 4th GT channel as tx TMDS clock. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [0, 1] + + xlnx,rx-max-gt-line-rate: + description: | + Maxmimum Rx GT linerate that IP is configured with. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [3, 6, 8, 10, 12] + + xlnx,tx-max-gt-line-rate: + description: | + Maxmimum Tx GT linerate that IP is configured with. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [3, 6, 8, 10, 12] + + xlnx,rx-clk-primitive: + description: | + Rx clock primitive type that IP is configured with. Possible values + are as below. + 0 - MMCM + 1 - PLL + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [0, 1] + + xlnx,tx-clk-primitive: + description: | + Tx clock primitive type that IP is configured with. Possible values + are as below. + 0 - MMCM + 1 - PLL + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [0, 1] + + "#phy-cells": + const: 0 + +required: + - clock-names + - clocks + - compatible + - interrupts + - reg + - xlnx,transceiver-type + - xlnx,tx-no-of-channels + - xlnx,rx-no-of-channels + - xlnx,tx-refclk-sel + - xlnx,rx-refclk-sel + - xlnx,tx-frl-refclk-sel + - xlnx,rx-frl-refclk-sel + - xlnx,tx-pll-selection + - xlnx,rx-pll-selection + - xlnx,nidru-refclk-sel + - xlnx,transceiver-width + - xlnx,input-pixels-per-clock + - xlnx,use-gt-ch4-hdmi + - xlnx,rx-max-gt-line-rate + - xlnx,tx-max-gt-line-rate + - '#phy-cells' + +additionalProperties: false + +if: + properties: + compatible: + contains: + const: xlnx,v-hdmi-gt-controller-1.0 + +then: + required: + - xlnx,gt-direction + +examples: + - | + v_hdmi_phy1@80040000 { + clock-names = "axi4lite_aclk", "drpclk"; + clocks = <&zynqmp_clk 71>, <&zynqmp_clk 71>; + compatible = "xlnx,v-hdmi-phy1-1.0"; + interrupt-parent = <&gic>; + interrupts = <0 89 4>; + reg = <0x80040000 0x10000>; + rxch4-sel-gpios = <&foo_gpio 18 1>; + xlnx,transceiver-type = <5>; + xlnx,tx-no-of-channels = <4>; + xlnx,rx-no-of-channels = <4>; + xlnx,rx-protocol = <2>; + xlnx,tx-protocol = <2>; + xlnx,tx-refclk-sel = <2>; + xlnx,rx-refclk-sel = <0>; + xlnx,tx-frl-refclk-sel = <2>; + xlnx,rx-frl-refclk-sel = <0>; + xlnx,tx-pll-selection = <6>; + xlnx,rx-pll-selection = <0>; + xlnx,nidru = <1>; + xlnx,nidru-refclk-sel = <4>; + xlnx,transceiver-width = <4>; + xlnx,input-pixels-per-clock = <4>; + xlnx,use-gt-ch4-hdmi = <1>; + xlnx,rx-max-gt-line-rate = <0xc>; + xlnx,tx-max-gt-line-rate = <0xc>; + xlnx,rx-clk-primitive = <0x0>; + xlnx,tx-clk-primitive = <0x0>; + #phy-cells = <0>; + }; + v_hdmi_gt@80050000 { + clock-names = "axi4lite_aclk", "drpclk"; + clocks = <&zynqmp_clk 71>, <&zynqmp_clk 71>; + compatible = "xlnx,v-hdmi-gt-controller-1.0"; + interrupt-parent = <&gic>; + interrupts = <0 89 4>; + reg = <0x80050000 0x10000>; + rxch4-sel-gpios = <&foo_gpio1 18 1>; + xlnx,transceiver-type = <5>; + xlnx,tx-no-of-channels = <4>; + xlnx,rx-no-of-channels = <4>; + xlnx,rx-protocol = <2>; + xlnx,tx-protocol = <2>; + xlnx,tx-refclk-sel = <2>; + xlnx,rx-refclk-sel = <0>; + xlnx,tx-frl-refclk-sel = <2>; + xlnx,rx-frl-refclk-sel = <0>; + xlnx,tx-pll-selection = <6>; + xlnx,rx-pll-selection = <0>; + xlnx,nidru = <1>; + xlnx,nidru-refclk-sel = <4>; + xlnx,transceiver-width = <4>; + xlnx,gt-direction = <3>; + xlnx,input-pixels-per-clock = <4>; + xlnx,use-gt-ch4-hdmi = <1>; + xlnx,rx-max-gt-line-rate = <0xc>; + xlnx,tx-max-gt-line-rate = <0xc>; + xlnx,rx-clk-primitive = <0x0>; + xlnx,tx-clk-primitive = <0x0>; + #phy-cells = <0>; + }; +... --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml @@ -97,7 +97,8 @@ then: properties: groups: - enum: [emmc, emmc_rst] + items: + enum: [emmc, emmc_rst] - if: properties: function: @@ -105,8 +106,9 @@ then: properties: groups: - enum: [esw, esw_p0_p1, esw_p2_p3_p4, rgmii_via_esw, - rgmii_via_gmac1, rgmii_via_gmac2, mdc_mdio] + items: + enum: [esw, esw_p0_p1, esw_p2_p3_p4, rgmii_via_esw, + rgmii_via_gmac1, rgmii_via_gmac2, mdc_mdio] - if: properties: function: @@ -123,10 +125,11 @@ then: properties: groups: - enum: [i2s_in_mclk_bclk_ws, i2s1_in_data, i2s2_in_data, - i2s3_in_data, i2s4_in_data, i2s_out_mclk_bclk_ws, - i2s1_out_data, i2s2_out_data, i2s3_out_data, - i2s4_out_data] + items: + enum: [i2s_in_mclk_bclk_ws, i2s1_in_data, i2s2_in_data, + i2s3_in_data, i2s4_in_data, i2s_out_mclk_bclk_ws, + i2s1_out_data, i2s2_out_data, i2s3_out_data, + i2s4_out_data] - if: properties: function: @@ -159,10 +162,11 @@ then: properties: groups: - enum: [pcie0_0_waken, pcie0_1_waken, pcie1_0_waken, - pcie0_0_clkreq, pcie0_1_clkreq, pcie1_0_clkreq, - pcie0_pad_perst, pcie1_pad_perst, pcie_pereset, - pcie_wake, pcie_clkreq] + items: + enum: [pcie0_0_waken, pcie0_1_waken, pcie1_0_waken, + pcie0_0_clkreq, pcie0_1_clkreq, pcie1_0_clkreq, + pcie0_pad_perst, pcie1_pad_perst, pcie_pereset, + pcie_wake, pcie_clkreq] - if: properties: function: @@ -178,11 +182,12 @@ then: properties: groups: - enum: [pwm_ch1_0, pwm_ch1_1, pwm_ch1_2, pwm_ch2_0, pwm_ch2_1, - pwm_ch2_2, pwm_ch3_0, pwm_ch3_1, pwm_ch3_2, pwm_ch4_0, - pwm_ch4_1, pwm_ch4_2, pwm_ch4_3, pwm_ch5_0, pwm_ch5_1, - pwm_ch5_2, pwm_ch6_0, pwm_ch6_1, pwm_ch6_2, pwm_ch6_3, - pwm_ch7_0, pwm_0, pwm_1] + items: + enum: [pwm_ch1_0, pwm_ch1_1, pwm_ch1_2, pwm_ch2_0, pwm_ch2_1, + pwm_ch2_2, pwm_ch3_0, pwm_ch3_1, pwm_ch3_2, pwm_ch4_0, + pwm_ch4_1, pwm_ch4_2, pwm_ch4_3, pwm_ch5_0, pwm_ch5_1, + pwm_ch5_2, pwm_ch6_0, pwm_ch6_1, pwm_ch6_2, pwm_ch6_3, + pwm_ch7_0, pwm_0, pwm_1] - if: properties: function: @@ -260,33 +265,34 @@ pins: description: An array of strings. Each string contains the name of a pin. - enum: [GPIO_A, I2S1_IN, I2S1_OUT, I2S_BCLK, I2S_WS, I2S_MCLK, TXD0, - RXD0, SPI_WP, SPI_HOLD, SPI_CLK, SPI_MOSI, SPI_MISO, SPI_CS, - I2C_SDA, I2C_SCL, I2S2_IN, I2S3_IN, I2S4_IN, I2S2_OUT, - I2S3_OUT, I2S4_OUT, GPIO_B, MDC, MDIO, G2_TXD0, G2_TXD1, - G2_TXD2, G2_TXD3, G2_TXEN, G2_TXC, G2_RXD0, G2_RXD1, G2_RXD2, - G2_RXD3, G2_RXDV, G2_RXC, NCEB, NWEB, NREB, NDL4, NDL5, NDL6, - NDL7, NRB, NCLE, NALE, NDL0, NDL1, NDL2, NDL3, MDI_TP_P0, - MDI_TN_P0, MDI_RP_P0, MDI_RN_P0, MDI_TP_P1, MDI_TN_P1, - MDI_RP_P1, MDI_RN_P1, MDI_RP_P2, MDI_RN_P2, MDI_TP_P2, - MDI_TN_P2, MDI_TP_P3, MDI_TN_P3, MDI_RP_P3, MDI_RN_P3, - MDI_RP_P4, MDI_RN_P4, MDI_TP_P4, MDI_TN_P4, PMIC_SCL, - PMIC_SDA, SPIC1_CLK, SPIC1_MOSI, SPIC1_MISO, SPIC1_CS, - GPIO_D, WATCHDOG, RTS3_N, CTS3_N, TXD3, RXD3, PERST0_N, - PERST1_N, WLED_N, EPHY_LED0_N, AUXIN0, AUXIN1, AUXIN2, - AUXIN3, TXD4, RXD4, RTS4_N, CST4_N, PWM1, PWM2, PWM3, PWM4, - PWM5, PWM6, PWM7, GPIO_E, TOP_5G_CLK, TOP_5G_DATA, - WF0_5G_HB0, WF0_5G_HB1, WF0_5G_HB2, WF0_5G_HB3, WF0_5G_HB4, - WF0_5G_HB5, WF0_5G_HB6, XO_REQ, TOP_RST_N, SYS_WATCHDOG, - EPHY_LED0_N_JTDO, EPHY_LED1_N_JTDI, EPHY_LED2_N_JTMS, - EPHY_LED3_N_JTCLK, EPHY_LED4_N_JTRST_N, WF2G_LED_N, - WF5G_LED_N, GPIO_9, GPIO_10, GPIO_11, GPIO_12, UART1_TXD, - UART1_RXD, UART1_CTS, UART1_RTS, UART2_TXD, UART2_RXD, - UART2_CTS, UART2_RTS, SMI_MDC, SMI_MDIO, PCIE_PERESET_N, - PWM_0, GPIO_0, GPIO_1, GPIO_2, GPIO_3, GPIO_4, GPIO_5, - GPIO_6, GPIO_7, GPIO_8, UART0_TXD, UART0_RXD, TOP_2G_CLK, - TOP_2G_DATA, WF0_2G_HB0, WF0_2G_HB1, WF0_2G_HB2, WF0_2G_HB3, - WF0_2G_HB4, WF0_2G_HB5, WF0_2G_HB6] + items: + enum: [GPIO_A, I2S1_IN, I2S1_OUT, I2S_BCLK, I2S_WS, I2S_MCLK, TXD0, + RXD0, SPI_WP, SPI_HOLD, SPI_CLK, SPI_MOSI, SPI_MISO, SPI_CS, + I2C_SDA, I2C_SCL, I2S2_IN, I2S3_IN, I2S4_IN, I2S2_OUT, + I2S3_OUT, I2S4_OUT, GPIO_B, MDC, MDIO, G2_TXD0, G2_TXD1, + G2_TXD2, G2_TXD3, G2_TXEN, G2_TXC, G2_RXD0, G2_RXD1, G2_RXD2, + G2_RXD3, G2_RXDV, G2_RXC, NCEB, NWEB, NREB, NDL4, NDL5, NDL6, + NDL7, NRB, NCLE, NALE, NDL0, NDL1, NDL2, NDL3, MDI_TP_P0, + MDI_TN_P0, MDI_RP_P0, MDI_RN_P0, MDI_TP_P1, MDI_TN_P1, + MDI_RP_P1, MDI_RN_P1, MDI_RP_P2, MDI_RN_P2, MDI_TP_P2, + MDI_TN_P2, MDI_TP_P3, MDI_TN_P3, MDI_RP_P3, MDI_RN_P3, + MDI_RP_P4, MDI_RN_P4, MDI_TP_P4, MDI_TN_P4, PMIC_SCL, + PMIC_SDA, SPIC1_CLK, SPIC1_MOSI, SPIC1_MISO, SPIC1_CS, + GPIO_D, WATCHDOG, RTS3_N, CTS3_N, TXD3, RXD3, PERST0_N, + PERST1_N, WLED_N, EPHY_LED0_N, AUXIN0, AUXIN1, AUXIN2, + AUXIN3, TXD4, RXD4, RTS4_N, CST4_N, PWM1, PWM2, PWM3, PWM4, + PWM5, PWM6, PWM7, GPIO_E, TOP_5G_CLK, TOP_5G_DATA, + WF0_5G_HB0, WF0_5G_HB1, WF0_5G_HB2, WF0_5G_HB3, WF0_5G_HB4, + WF0_5G_HB5, WF0_5G_HB6, XO_REQ, TOP_RST_N, SYS_WATCHDOG, + EPHY_LED0_N_JTDO, EPHY_LED1_N_JTDI, EPHY_LED2_N_JTMS, + EPHY_LED3_N_JTCLK, EPHY_LED4_N_JTRST_N, WF2G_LED_N, + WF5G_LED_N, GPIO_9, GPIO_10, GPIO_11, GPIO_12, UART1_TXD, + UART1_RXD, UART1_CTS, UART1_RTS, UART2_TXD, UART2_RXD, + UART2_CTS, UART2_RTS, SMI_MDC, SMI_MDIO, PCIE_PERESET_N, + PWM_0, GPIO_0, GPIO_1, GPIO_2, GPIO_3, GPIO_4, GPIO_5, + GPIO_6, GPIO_7, GPIO_8, UART0_TXD, UART0_RXD, TOP_2G_CLK, + TOP_2G_DATA, WF0_2G_HB0, WF0_2G_HB1, WF0_2G_HB2, WF0_2G_HB3, + WF0_2G_HB4, WF0_2G_HB5, WF0_2G_HB6] bias-disable: true --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/pinctrl/qcom,sm4450-tlmm.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/pinctrl/qcom,sm4450-tlmm.yaml @@ -72,40 +72,24 @@ description: Specify the alternative function to be configured for the specified pins. - enum: [ gpio, atest_char, atest_char0, atest_char1, atest_char2, - atest_char3, atest_usb0, atest_usb00, atest_usb01, atest_usb02, - atest_usb03, audio_ref, cam_mclk, cci_async, cci_i2c, - cci_timer0, cci_timer1, cci_timer2, cci_timer3, cci_timer4, - cmu_rng0, cmu_rng1, cmu_rng2, cmu_rng3, coex_uart1, cri_trng, - cri_trng0, cri_trng1, dbg_out, ddr_bist, ddr_pxi0, ddr_pxi1, - dp0_hot, gcc_gp1, gcc_gp2, gcc_gp3, host2wlan_sol, ibi_i3c, - jitter_bist, mdp_vsync, mdp_vsync0, mdp_vsync1, mdp_vsync2, - mdp_vsync3, mi2s0_data0, mi2s0_data1, mi2s0_sck, mi2s0_ws, - mi2s2_data0, mi2s2_data1, mi2s2_sck, mi2s2_ws, mi2s_mclk0, - mi2s_mclk1, nav_gpio0, nav_gpio1, nav_gpio2, pcie0_clk, - phase_flag0, phase_flag1, phase_flag10, phase_flag11, - phase_flag12, phase_flag13, phase_flag14, phase_flag15, - phase_flag16, phase_flag17, phase_flag18, phase_flag19, - phase_flag2, phase_flag20, phase_flag21, phase_flag22, - phase_flag23, phase_flag24, phase_flag25, phase_flag26, - phase_flag27, phase_flag28, phase_flag29, phase_flag3, - phase_flag30, phase_flag31, phase_flag4, phase_flag5, - phase_flag6, phase_flag7, phase_flag8, phase_flag9, - pll_bist, pll_clk, prng_rosc0, prng_rosc1, prng_rosc2, - prng_rosc3, qdss_cti, qdss_gpio, qdss_gpio0, qdss_gpio1, - qdss_gpio10, qdss_gpio11, qdss_gpio12, qdss_gpio13, qdss_gpio14, - qdss_gpio15, qdss_gpio2, qdss_gpio3, qdss_gpio4, qdss_gpio5, - qdss_gpio6, qdss_gpio7, qdss_gpio8, qdss_gpio9, qlink0_enable, - qlink0_request, qlink0_wmss, qlink1_enable, qlink1_request, - qlink1_wmss, qlink2_enable, qlink2_request, qlink2_wmss, - qup0_se0, qup0_se1, qup0_se2, qup0_se3, qup0_se4, qup0_se5, - qup0_se6, qup0_se7, qup1_se0, qup1_se1, qup1_se2, qup1_se3, - qup1_se4, qup1_se5, qup1_se6, sd_write, tb_trig, tgu_ch0, - tgu_ch1, tgu_ch2, tgu_ch3, tmess_prng0, tmess_prng1, - tmess_prng2, tmess_prng3, tsense_pwm1, tsense_pwm2, uim0_clk, - uim0_data, uim0_present, uim0_reset, uim1_clk, uim1_data, - uim1_present, uim1_reset, usb0_hs, usb0_phy, vfr_0, vfr_1, - vsense_trigger ] + enum: [ gpio, atest_char, atest_usb0, audio_ref_clk, cam_mclk, + cci_async_in0, cci_i2c, cci, cmu_rng, coex_uart1_rx, + coex_uart1_tx, cri_trng, dbg_out_clk, ddr_bist, + ddr_pxi0_test, ddr_pxi1_test, gcc_gp1_clk, gcc_gp2_clk, + gcc_gp3_clk, host2wlan_sol, ibi_i3c_qup0, ibi_i3c_qup1, + jitter_bist_ref, mdp_vsync0_out, mdp_vsync1_out, + mdp_vsync2_out, mdp_vsync3_out, mdp_vsync, nav, + pcie0_clk_req, phase_flag, pll_bist_sync, pll_clk_aux, + prng_rosc, qdss_cti_trig0, qdss_cti_trig1, qdss_gpio, + qlink0_enable, qlink0_request, qlink0_wmss_reset, + qup0_se0, qup0_se1, qup0_se2, qup0_se3, qup0_se4, + qup1_se0, qup1_se1, qup1_se2, qup1_se2_l2, qup1_se3, + qup1_se4, sd_write_protect, tb_trig_sdc1, tb_trig_sdc2, + tgu_ch0_trigout, tgu_ch1_trigout, tgu_ch2_trigout, + tgu_ch3_trigout, tmess_prng, tsense_pwm1_out, + tsense_pwm2_out, uim0, uim1, usb0_hs_ac, usb0_phy_ps, + vfr_0_mira, vfr_0_mirb, vfr_1, vsense_trigger_mirnat, + wlan1_adc_dtest0, wlan1_adc_dtest1 ] required: - pins --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml @@ -91,14 +91,17 @@ - if: properties: compatible: - # Match without "contains", to skip newer variants which are still - # compatible with samsung,exynos7-wakeup-eint - enum: - - samsung,s5pv210-wakeup-eint - - samsung,exynos4210-wakeup-eint - - samsung,exynos5433-wakeup-eint - - samsung,exynos7-wakeup-eint - - samsung,exynos7885-wakeup-eint + oneOf: + # Match without "contains", to skip newer variants which are still + # compatible with samsung,exynos7-wakeup-eint + - enum: + - samsung,exynos4210-wakeup-eint + - samsung,exynos7-wakeup-eint + - samsung,s5pv210-wakeup-eint + - contains: + enum: + - samsung,exynos5433-wakeup-eint + - samsung,exynos7885-wakeup-eint then: properties: interrupts: --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml @@ -47,187 +47,208 @@ List of groups to select (either this or "pins" must be specified), available groups for this subnode. items: - enum: [ethernet0_0_grp, ethernet1_0_grp, ethernet2_0_grp, - ethernet3_0_grp, gemtsu0_0_grp, gemtsu0_1_grp, - gemtsu0_2_grp, mdio0_0_grp, mdio1_0_grp, - mdio1_1_grp, mdio2_0_grp, mdio3_0_grp, - qspi0_0_grp, qspi_ss_0_grp, qspi_fbclk_0_grp, - spi0_0_grp, spi0_ss_0_grp, spi0_ss_1_grp, - spi0_ss_2_grp, spi0_1_grp, spi0_ss_3_grp, - spi0_ss_4_grp, spi0_ss_5_grp, spi0_2_grp, - spi0_ss_6_grp, spi0_ss_7_grp, spi0_ss_8_grp, - spi0_3_grp, spi0_ss_9_grp, spi0_ss_10_grp, - spi0_ss_11_grp, spi0_4_grp, spi0_ss_12_grp, - spi0_ss_13_grp, spi0_ss_14_grp, spi0_5_grp, - spi0_ss_15_grp, spi0_ss_16_grp, spi0_ss_17_grp, - spi1_0_grp, spi1_ss_0_grp, spi1_ss_1_grp, - spi1_ss_2_grp, spi1_1_grp, spi1_ss_3_grp, - spi1_ss_4_grp, spi1_ss_5_grp, spi1_2_grp, - spi1_ss_6_grp, spi1_ss_7_grp, spi1_ss_8_grp, - spi1_3_grp, spi1_ss_9_grp, spi1_ss_10_grp, - spi1_ss_11_grp, spi1_4_grp, spi1_ss_12_grp, - spi1_ss_13_grp, spi1_ss_14_grp, spi1_5_grp, - spi1_ss_15_grp, spi1_ss_16_grp, spi1_ss_17_grp, - sdio0_0_grp, sdio0_1_grp, sdio0_2_grp, - sdio0_3_grp, sdio0_4_grp, sdio0_5_grp, - sdio0_6_grp, sdio0_7_grp, sdio0_8_grp, - sdio0_9_grp, sdio0_10_grp, sdio0_11_grp, - sdio0_12_grp, sdio0_13_grp, sdio0_14_grp, - sdio0_15_grp, sdio0_16_grp, sdio0_17_grp, - sdio0_18_grp, sdio0_19_grp, sdio0_20_grp, - sdio0_21_grp, sdio0_22_grp, sdio0_23_grp, - sdio0_24_grp, sdio0_25_grp, sdio0_26_grp, - sdio0_27_grp, sdio0_28_grp, sdio0_29_grp, - sdio0_30_grp, sdio0_31_grp, sdio0_32_grp, - sdio0_pc_0_grp, sdio0_cd_0_grp, sdio0_wp_0_grp, - sdio0_pc_1_grp, sdio0_cd_1_grp, sdio0_wp_1_grp, - sdio0_pc_2_grp, sdio0_cd_2_grp, sdio0_wp_2_grp, - sdio1_0_grp, sdio1_1_grp, sdio1_2_grp, - sdio1_3_grp, sdio1_4_grp, sdio1_5_grp, - sdio1_6_grp, sdio1_7_grp, sdio1_8_grp, - sdio1_9_grp, sdio1_10_grp, sdio1_11_grp, - sdio1_12_grp, sdio1_13_grp, sdio1_14_grp, - sdio1_15_grp, sdio1_pc_0_grp, sdio1_cd_0_grp, - sdio1_wp_0_grp, sdio1_pc_1_grp, sdio1_cd_1_grp, - sdio1_wp_1_grp, nand0_0_grp, nand0_ce_0_grp, - nand0_rb_0_grp, nand0_dqs_0_grp, nand0_ce_1_grp, - nand0_rb_1_grp, nand0_dqs_1_grp, can0_0_grp, - can0_1_grp, can0_2_grp, can0_3_grp, - can0_4_grp, can0_5_grp, can0_6_grp, - can0_7_grp, can0_8_grp, can0_9_grp, - can0_10_grp, can0_11_grp, can0_12_grp, - can0_13_grp, can0_14_grp, can0_15_grp, - can0_16_grp, can0_17_grp, can0_18_grp, - can1_0_grp, can1_1_grp, can1_2_grp, - can1_3_grp, can1_4_grp, can1_5_grp, - can1_6_grp, can1_7_grp, can1_8_grp, - can1_9_grp, can1_10_grp, can1_11_grp, - can1_12_grp, can1_13_grp, can1_14_grp, - can1_15_grp, can1_16_grp, can1_17_grp, - can1_18_grp, can1_19_grp, uart0_0_grp, - uart0_1_grp, uart0_2_grp, uart0_3_grp, - uart0_4_grp, uart0_5_grp, uart0_6_grp, - uart0_7_grp, uart0_8_grp, uart0_9_grp, - uart0_10_grp, uart0_11_grp, uart0_12_grp, - uart0_13_grp, uart0_14_grp, uart0_15_grp, - uart0_16_grp, uart0_17_grp, uart0_18_grp, - uart1_0_grp, uart1_1_grp, uart1_2_grp, - uart1_3_grp, uart1_4_grp, uart1_5_grp, - uart1_6_grp, uart1_7_grp, uart1_8_grp, - uart1_9_grp, uart1_10_grp, uart1_11_grp, - uart1_12_grp, uart1_13_grp, uart1_14_grp, - uart1_15_grp, uart1_16_grp, uart1_17_grp, - uart1_18_grp, i2c0_0_grp, i2c0_1_grp, - i2c0_2_grp, i2c0_3_grp, i2c0_4_grp, - i2c0_5_grp, i2c0_6_grp, i2c0_7_grp, - i2c0_8_grp, i2c0_9_grp, i2c0_10_grp, - i2c0_11_grp, i2c0_12_grp, i2c0_13_grp, - i2c0_14_grp, i2c0_15_grp, i2c0_16_grp, - i2c0_17_grp, i2c0_18_grp, i2c1_0_grp, - i2c1_1_grp, i2c1_2_grp, i2c1_3_grp, - i2c1_4_grp, i2c1_5_grp, i2c1_6_grp, - i2c1_7_grp, i2c1_8_grp, i2c1_9_grp, - i2c1_10_grp, i2c1_11_grp, i2c1_12_grp, - i2c1_13_grp, i2c1_14_grp, i2c1_15_grp, - i2c1_16_grp, i2c1_17_grp, i2c1_18_grp, - i2c1_19_grp, ttc0_clk_0_grp, ttc0_wav_0_grp, - ttc0_clk_1_grp, ttc0_wav_1_grp, ttc0_clk_2_grp, - ttc0_wav_2_grp, ttc0_clk_3_grp, ttc0_wav_3_grp, - ttc0_clk_4_grp, ttc0_wav_4_grp, ttc0_clk_5_grp, - ttc0_wav_5_grp, ttc0_clk_6_grp, ttc0_wav_6_grp, - ttc0_clk_7_grp, ttc0_wav_7_grp, ttc0_clk_8_grp, - ttc0_wav_8_grp, ttc1_clk_0_grp, ttc1_wav_0_grp, - ttc1_clk_1_grp, ttc1_wav_1_grp, ttc1_clk_2_grp, - ttc1_wav_2_grp, ttc1_clk_3_grp, ttc1_wav_3_grp, - ttc1_clk_4_grp, ttc1_wav_4_grp, ttc1_clk_5_grp, - ttc1_wav_5_grp, ttc1_clk_6_grp, ttc1_wav_6_grp, - ttc1_clk_7_grp, ttc1_wav_7_grp, ttc1_clk_8_grp, - ttc1_wav_8_grp, ttc2_clk_0_grp, ttc2_wav_0_grp, - ttc2_clk_1_grp, ttc2_wav_1_grp, ttc2_clk_2_grp, - ttc2_wav_2_grp, ttc2_clk_3_grp, ttc2_wav_3_grp, - ttc2_clk_4_grp, ttc2_wav_4_grp, ttc2_clk_5_grp, - ttc2_wav_5_grp, ttc2_clk_6_grp, ttc2_wav_6_grp, - ttc2_clk_7_grp, ttc2_wav_7_grp, ttc2_clk_8_grp, - ttc2_wav_8_grp, ttc3_clk_0_grp, ttc3_wav_0_grp, - ttc3_clk_1_grp, ttc3_wav_1_grp, ttc3_clk_2_grp, - ttc3_wav_2_grp, ttc3_clk_3_grp, ttc3_wav_3_grp, - ttc3_clk_4_grp, ttc3_wav_4_grp, ttc3_clk_5_grp, - ttc3_wav_5_grp, ttc3_clk_6_grp, ttc3_wav_6_grp, - ttc3_clk_7_grp, ttc3_wav_7_grp, ttc3_clk_8_grp, - ttc3_wav_8_grp, swdt0_clk_0_grp, swdt0_rst_0_grp, - swdt0_clk_1_grp, swdt0_rst_1_grp, swdt0_clk_2_grp, - swdt0_rst_2_grp, swdt0_clk_3_grp, swdt0_rst_3_grp, - swdt0_clk_4_grp, swdt0_rst_4_grp, swdt0_clk_5_grp, - swdt0_rst_5_grp, swdt0_clk_6_grp, swdt0_rst_6_grp, - swdt0_clk_7_grp, swdt0_rst_7_grp, swdt0_clk_8_grp, - swdt0_rst_8_grp, swdt0_clk_9_grp, swdt0_rst_9_grp, - swdt0_clk_10_grp, swdt0_rst_10_grp, swdt0_clk_11_grp, - swdt0_rst_11_grp, swdt0_clk_12_grp, swdt0_rst_12_grp, - swdt1_clk_0_grp, swdt1_rst_0_grp, swdt1_clk_1_grp, - swdt1_rst_1_grp, swdt1_clk_2_grp, swdt1_rst_2_grp, - swdt1_clk_3_grp, swdt1_rst_3_grp, swdt1_clk_4_grp, - swdt1_rst_4_grp, swdt1_clk_5_grp, swdt1_rst_5_grp, - swdt1_clk_6_grp, swdt1_rst_6_grp, swdt1_clk_7_grp, - swdt1_rst_7_grp, swdt1_clk_8_grp, swdt1_rst_8_grp, - swdt1_clk_9_grp, swdt1_rst_9_grp, swdt1_clk_10_grp, - swdt1_rst_10_grp, swdt1_clk_11_grp, swdt1_rst_11_grp, - swdt1_clk_12_grp, swdt1_rst_12_grp, gpio0_0_grp, - gpio0_1_grp, gpio0_2_grp, gpio0_3_grp, - gpio0_4_grp, gpio0_5_grp, gpio0_6_grp, - gpio0_7_grp, gpio0_8_grp, gpio0_9_grp, - gpio0_10_grp, gpio0_11_grp, gpio0_12_grp, - gpio0_13_grp, gpio0_14_grp, gpio0_15_grp, - gpio0_16_grp, gpio0_17_grp, gpio0_18_grp, - gpio0_19_grp, gpio0_20_grp, gpio0_21_grp, - gpio0_22_grp, gpio0_23_grp, gpio0_24_grp, - gpio0_25_grp, gpio0_26_grp, gpio0_27_grp, - gpio0_28_grp, gpio0_29_grp, gpio0_30_grp, - gpio0_31_grp, gpio0_32_grp, gpio0_33_grp, - gpio0_34_grp, gpio0_35_grp, gpio0_36_grp, - gpio0_37_grp, gpio0_38_grp, gpio0_39_grp, - gpio0_40_grp, gpio0_41_grp, gpio0_42_grp, - gpio0_43_grp, gpio0_44_grp, gpio0_45_grp, - gpio0_46_grp, gpio0_47_grp, gpio0_48_grp, - gpio0_49_grp, gpio0_50_grp, gpio0_51_grp, - gpio0_52_grp, gpio0_53_grp, gpio0_54_grp, - gpio0_55_grp, gpio0_56_grp, gpio0_57_grp, - gpio0_58_grp, gpio0_59_grp, gpio0_60_grp, - gpio0_61_grp, gpio0_62_grp, gpio0_63_grp, - gpio0_64_grp, gpio0_65_grp, gpio0_66_grp, - gpio0_67_grp, gpio0_68_grp, gpio0_69_grp, - gpio0_70_grp, gpio0_71_grp, gpio0_72_grp, - gpio0_73_grp, gpio0_74_grp, gpio0_75_grp, - gpio0_76_grp, gpio0_77_grp, usb0_0_grp, - usb1_0_grp, pmu0_0_grp, pmu0_1_grp, - pmu0_2_grp, pmu0_3_grp, pmu0_4_grp, - pmu0_5_grp, pmu0_6_grp, pmu0_7_grp, - pmu0_8_grp, pmu0_9_grp, pmu0_10_grp, - pmu0_11_grp, pcie0_0_grp, pcie0_1_grp, - pcie0_2_grp, pcie0_3_grp, pcie0_4_grp, - pcie0_5_grp, pcie0_6_grp, pcie0_7_grp, - csu0_0_grp, csu0_1_grp, csu0_2_grp, - csu0_3_grp, csu0_4_grp, csu0_5_grp, - csu0_6_grp, csu0_7_grp, csu0_8_grp, - csu0_9_grp, csu0_10_grp, csu0_11_grp, - dpaux0_0_grp, dpaux0_1_grp, dpaux0_2_grp, - dpaux0_3_grp, pjtag0_0_grp, pjtag0_1_grp, - pjtag0_2_grp, pjtag0_3_grp, pjtag0_4_grp, - pjtag0_5_grp, trace0_0_grp, trace0_clk_0_grp, - trace0_1_grp, trace0_clk_1_grp, trace0_2_grp, - trace0_clk_2_grp, testscan0_0_grp] + allOf: + - if: + properties: + compatible: + contains: + const: xlnx,zynqmp-pinctrl + then: + enum: [ethernet0_0_grp, ethernet1_0_grp, ethernet2_0_grp, + ethernet3_0_grp, gemtsu0_0_grp, gemtsu0_1_grp, + gemtsu0_2_grp, mdio0_0_grp, mdio1_0_grp, + mdio1_1_grp, mdio2_0_grp, mdio3_0_grp, + qspi0_0_grp, qspi_ss_0_grp, qspi_fbclk_0_grp, + spi0_0_grp, spi0_ss_0_grp, spi0_ss_1_grp, + spi0_ss_2_grp, spi0_1_grp, spi0_ss_3_grp, + spi0_ss_4_grp, spi0_ss_5_grp, spi0_2_grp, + spi0_ss_6_grp, spi0_ss_7_grp, spi0_ss_8_grp, + spi0_3_grp, spi0_ss_9_grp, spi0_ss_10_grp, + spi0_ss_11_grp, spi0_4_grp, spi0_ss_12_grp, + spi0_ss_13_grp, spi0_ss_14_grp, spi0_5_grp, + spi0_ss_15_grp, spi0_ss_16_grp, spi0_ss_17_grp, + spi1_0_grp, spi1_ss_0_grp, spi1_ss_1_grp, + spi1_ss_2_grp, spi1_1_grp, spi1_ss_3_grp, + spi1_ss_4_grp, spi1_ss_5_grp, spi1_2_grp, + spi1_ss_6_grp, spi1_ss_7_grp, spi1_ss_8_grp, + spi1_3_grp, spi1_ss_9_grp, spi1_ss_10_grp, + spi1_ss_11_grp, spi1_4_grp, spi1_ss_12_grp, + spi1_ss_13_grp, spi1_ss_14_grp, spi1_5_grp, + spi1_ss_15_grp, spi1_ss_16_grp, spi1_ss_17_grp, + sdio0_0_grp, sdio0_1_grp, sdio0_2_grp, + sdio0_3_grp, sdio0_4_grp, sdio0_5_grp, + sdio0_6_grp, sdio0_7_grp, sdio0_8_grp, + sdio0_9_grp, sdio0_10_grp, sdio0_11_grp, + sdio0_12_grp, sdio0_13_grp, sdio0_14_grp, + sdio0_15_grp, sdio0_16_grp, sdio0_17_grp, + sdio0_18_grp, sdio0_19_grp, sdio0_20_grp, + sdio0_21_grp, sdio0_22_grp, sdio0_23_grp, + sdio0_24_grp, sdio0_25_grp, sdio0_26_grp, + sdio0_27_grp, sdio0_28_grp, sdio0_29_grp, + sdio0_30_grp, sdio0_31_grp, sdio0_32_grp, + sdio0_pc_0_grp, sdio0_cd_0_grp, sdio0_wp_0_grp, + sdio0_pc_1_grp, sdio0_cd_1_grp, sdio0_wp_1_grp, + sdio0_pc_2_grp, sdio0_cd_2_grp, sdio0_wp_2_grp, + sdio1_0_grp, sdio1_1_grp, sdio1_2_grp, + sdio1_3_grp, sdio1_4_grp, sdio1_5_grp, + sdio1_6_grp, sdio1_7_grp, sdio1_8_grp, + sdio1_9_grp, sdio1_10_grp, sdio1_11_grp, + sdio1_12_grp, sdio1_13_grp, sdio1_14_grp, + sdio1_15_grp, sdio1_pc_0_grp, sdio1_cd_0_grp, + sdio1_wp_0_grp, sdio1_pc_1_grp, sdio1_cd_1_grp, + sdio1_wp_1_grp, nand0_0_grp, nand0_ce_0_grp, + nand0_rb_0_grp, nand0_dqs_0_grp, nand0_ce_1_grp, + nand0_rb_1_grp, nand0_dqs_1_grp, can0_0_grp, + can0_1_grp, can0_2_grp, can0_3_grp, + can0_4_grp, can0_5_grp, can0_6_grp, + can0_7_grp, can0_8_grp, can0_9_grp, + can0_10_grp, can0_11_grp, can0_12_grp, + can0_13_grp, can0_14_grp, can0_15_grp, + can0_16_grp, can0_17_grp, can0_18_grp, + can1_0_grp, can1_1_grp, can1_2_grp, + can1_3_grp, can1_4_grp, can1_5_grp, + can1_6_grp, can1_7_grp, can1_8_grp, + can1_9_grp, can1_10_grp, can1_11_grp, + can1_12_grp, can1_13_grp, can1_14_grp, + can1_15_grp, can1_16_grp, can1_17_grp, + can1_18_grp, can1_19_grp, uart0_0_grp, + uart0_1_grp, uart0_2_grp, uart0_3_grp, + uart0_4_grp, uart0_5_grp, uart0_6_grp, + uart0_7_grp, uart0_8_grp, uart0_9_grp, + uart0_10_grp, uart0_11_grp, uart0_12_grp, + uart0_13_grp, uart0_14_grp, uart0_15_grp, + uart0_16_grp, uart0_17_grp, uart0_18_grp, + uart1_0_grp, uart1_1_grp, uart1_2_grp, + uart1_3_grp, uart1_4_grp, uart1_5_grp, + uart1_6_grp, uart1_7_grp, uart1_8_grp, + uart1_9_grp, uart1_10_grp, uart1_11_grp, + uart1_12_grp, uart1_13_grp, uart1_14_grp, + uart1_15_grp, uart1_16_grp, uart1_17_grp, + uart1_18_grp, i2c0_0_grp, i2c0_1_grp, + i2c0_2_grp, i2c0_3_grp, i2c0_4_grp, + i2c0_5_grp, i2c0_6_grp, i2c0_7_grp, + i2c0_8_grp, i2c0_9_grp, i2c0_10_grp, + i2c0_11_grp, i2c0_12_grp, i2c0_13_grp, + i2c0_14_grp, i2c0_15_grp, i2c0_16_grp, + i2c0_17_grp, i2c0_18_grp, i2c1_0_grp, + i2c1_1_grp, i2c1_2_grp, i2c1_3_grp, + i2c1_4_grp, i2c1_5_grp, i2c1_6_grp, + i2c1_7_grp, i2c1_8_grp, i2c1_9_grp, + i2c1_10_grp, i2c1_11_grp, i2c1_12_grp, + i2c1_13_grp, i2c1_14_grp, i2c1_15_grp, + i2c1_16_grp, i2c1_17_grp, i2c1_18_grp, + i2c1_19_grp, ttc0_clk_0_grp, ttc0_wav_0_grp, + ttc0_clk_1_grp, ttc0_wav_1_grp, ttc0_clk_2_grp, + ttc0_wav_2_grp, ttc0_clk_3_grp, ttc0_wav_3_grp, + ttc0_clk_4_grp, ttc0_wav_4_grp, ttc0_clk_5_grp, + ttc0_wav_5_grp, ttc0_clk_6_grp, ttc0_wav_6_grp, + ttc0_clk_7_grp, ttc0_wav_7_grp, ttc0_clk_8_grp, + ttc0_wav_8_grp, ttc1_clk_0_grp, ttc1_wav_0_grp, + ttc1_clk_1_grp, ttc1_wav_1_grp, ttc1_clk_2_grp, + ttc1_wav_2_grp, ttc1_clk_3_grp, ttc1_wav_3_grp, + ttc1_clk_4_grp, ttc1_wav_4_grp, ttc1_clk_5_grp, + ttc1_wav_5_grp, ttc1_clk_6_grp, ttc1_wav_6_grp, + ttc1_clk_7_grp, ttc1_wav_7_grp, ttc1_clk_8_grp, + ttc1_wav_8_grp, ttc2_clk_0_grp, ttc2_wav_0_grp, + ttc2_clk_1_grp, ttc2_wav_1_grp, ttc2_clk_2_grp, + ttc2_wav_2_grp, ttc2_clk_3_grp, ttc2_wav_3_grp, + ttc2_clk_4_grp, ttc2_wav_4_grp, ttc2_clk_5_grp, + ttc2_wav_5_grp, ttc2_clk_6_grp, ttc2_wav_6_grp, + ttc2_clk_7_grp, ttc2_wav_7_grp, ttc2_clk_8_grp, + ttc2_wav_8_grp, ttc3_clk_0_grp, ttc3_wav_0_grp, + ttc3_clk_1_grp, ttc3_wav_1_grp, ttc3_clk_2_grp, + ttc3_wav_2_grp, ttc3_clk_3_grp, ttc3_wav_3_grp, + ttc3_clk_4_grp, ttc3_wav_4_grp, ttc3_clk_5_grp, + ttc3_wav_5_grp, ttc3_clk_6_grp, ttc3_wav_6_grp, + ttc3_clk_7_grp, ttc3_wav_7_grp, ttc3_clk_8_grp, + ttc3_wav_8_grp, swdt0_clk_0_grp, swdt0_rst_0_grp, + swdt0_clk_1_grp, swdt0_rst_1_grp, swdt0_clk_2_grp, + swdt0_rst_2_grp, swdt0_clk_3_grp, swdt0_rst_3_grp, + swdt0_clk_4_grp, swdt0_rst_4_grp, swdt0_clk_5_grp, + swdt0_rst_5_grp, swdt0_clk_6_grp, swdt0_rst_6_grp, + swdt0_clk_7_grp, swdt0_rst_7_grp, swdt0_clk_8_grp, + swdt0_rst_8_grp, swdt0_clk_9_grp, swdt0_rst_9_grp, + swdt0_clk_10_grp, swdt0_rst_10_grp, swdt0_clk_11_grp, + swdt0_rst_11_grp, swdt0_clk_12_grp, swdt0_rst_12_grp, + swdt1_clk_0_grp, swdt1_rst_0_grp, swdt1_clk_1_grp, + swdt1_rst_1_grp, swdt1_clk_2_grp, swdt1_rst_2_grp, + swdt1_clk_3_grp, swdt1_rst_3_grp, swdt1_clk_4_grp, + swdt1_rst_4_grp, swdt1_clk_5_grp, swdt1_rst_5_grp, + swdt1_clk_6_grp, swdt1_rst_6_grp, swdt1_clk_7_grp, + swdt1_rst_7_grp, swdt1_clk_8_grp, swdt1_rst_8_grp, + swdt1_clk_9_grp, swdt1_rst_9_grp, swdt1_clk_10_grp, + swdt1_rst_10_grp, swdt1_clk_11_grp, swdt1_rst_11_grp, + swdt1_clk_12_grp, swdt1_rst_12_grp, gpio0_0_grp, + gpio0_1_grp, gpio0_2_grp, gpio0_3_grp, + gpio0_4_grp, gpio0_5_grp, gpio0_6_grp, + gpio0_7_grp, gpio0_8_grp, gpio0_9_grp, + gpio0_10_grp, gpio0_11_grp, gpio0_12_grp, + gpio0_13_grp, gpio0_14_grp, gpio0_15_grp, + gpio0_16_grp, gpio0_17_grp, gpio0_18_grp, + gpio0_19_grp, gpio0_20_grp, gpio0_21_grp, + gpio0_22_grp, gpio0_23_grp, gpio0_24_grp, + gpio0_25_grp, gpio0_26_grp, gpio0_27_grp, + gpio0_28_grp, gpio0_29_grp, gpio0_30_grp, + gpio0_31_grp, gpio0_32_grp, gpio0_33_grp, + gpio0_34_grp, gpio0_35_grp, gpio0_36_grp, + gpio0_37_grp, gpio0_38_grp, gpio0_39_grp, + gpio0_40_grp, gpio0_41_grp, gpio0_42_grp, + gpio0_43_grp, gpio0_44_grp, gpio0_45_grp, + gpio0_46_grp, gpio0_47_grp, gpio0_48_grp, + gpio0_49_grp, gpio0_50_grp, gpio0_51_grp, + gpio0_52_grp, gpio0_53_grp, gpio0_54_grp, + gpio0_55_grp, gpio0_56_grp, gpio0_57_grp, + gpio0_58_grp, gpio0_59_grp, gpio0_60_grp, + gpio0_61_grp, gpio0_62_grp, gpio0_63_grp, + gpio0_64_grp, gpio0_65_grp, gpio0_66_grp, + gpio0_67_grp, gpio0_68_grp, gpio0_69_grp, + gpio0_70_grp, gpio0_71_grp, gpio0_72_grp, + gpio0_73_grp, gpio0_74_grp, gpio0_75_grp, + gpio0_76_grp, gpio0_77_grp, usb0_0_grp, + usb1_0_grp, pmu0_0_grp, pmu0_1_grp, + pmu0_2_grp, pmu0_3_grp, pmu0_4_grp, + pmu0_5_grp, pmu0_6_grp, pmu0_7_grp, + pmu0_8_grp, pmu0_9_grp, pmu0_10_grp, + pmu0_11_grp, pcie0_0_grp, pcie0_1_grp, + pcie0_2_grp, pcie0_3_grp, pcie0_4_grp, + pcie0_5_grp, pcie0_6_grp, pcie0_7_grp, + csu0_0_grp, csu0_1_grp, csu0_2_grp, + csu0_3_grp, csu0_4_grp, csu0_5_grp, + csu0_6_grp, csu0_7_grp, csu0_8_grp, + csu0_9_grp, csu0_10_grp, csu0_11_grp, + dpaux0_0_grp, dpaux0_1_grp, dpaux0_2_grp, + dpaux0_3_grp, pjtag0_0_grp, pjtag0_1_grp, + pjtag0_2_grp, pjtag0_3_grp, pjtag0_4_grp, + pjtag0_5_grp, trace0_0_grp, trace0_clk_0_grp, + trace0_1_grp, trace0_clk_1_grp, trace0_2_grp, + trace0_clk_2_grp, testscan0_0_grp] + else: + enum: [sd1_0_grp, sd1_1_grp, sd1_2_grp, sd1_3_grp, sd1_4_grp, sd1_5_grp, + sd1_6_grp, sd1_7_grp, sd1_8_grp, sd1_9_grp, sd1_10_grp, sd1_11_grp, + sd1_12_grp, sd1_13_grp, sd1_14_grp, sd1_15_grp, sd1_pc_0_grp, + sd1_cd_0_grp, sd1_wp_0_grp, sd1_pc_1_grp, sd1_cd_1_grp, sd1_wp_1_grp] maxItems: 78 function: description: Specify the alternative function to be configured for the given pin groups. - enum: [ethernet0, ethernet1, ethernet2, ethernet3, gemtsu0, usb0, usb1, mdio0, - mdio1, mdio2, mdio3, qspi0, qspi_fbclk, qspi_ss, spi0, spi1, spi0_ss, - spi1_ss, sdio0, sdio0_pc, sdio0_wp, sdio0_cd, sdio1, sdio1_pc, sdio1_wp, - sdio1_cd, nand0, nand0_ce, nand0_rb, nand0_dqs, can0, can1, uart0, uart1, - i2c0, i2c1, ttc0_clk, ttc0_wav, ttc1_clk, ttc1_wav, ttc2_clk, ttc2_wav, - ttc3_clk, ttc3_wav, swdt0_clk, swdt0_rst, swdt1_clk, swdt1_rst, gpio0, pmu0, - pcie0, csu0, dpaux0, pjtag0, trace0, trace0_clk, testscan0] + allOf: + - if: + properties: + compatible: + contains: + const: xlnx,zynqmp-pinctrl + then: + enum: [ethernet0, ethernet1, ethernet2, ethernet3, gemtsu0, usb0, usb1, mdio0, + mdio1, mdio2, mdio3, qspi0, qspi_fbclk, qspi_ss, spi0, spi1, spi0_ss, + spi1_ss, sdio0, sdio0_pc, sdio0_wp, sdio0_cd, sdio1, sdio1_pc, sdio1_wp, + sdio1_cd, nand0, nand0_ce, nand0_rb, nand0_dqs, can0, can1, uart0, uart1, + i2c0, i2c1, ttc0_clk, ttc0_wav, ttc1_clk, ttc1_wav, ttc2_clk, ttc2_wav, + ttc3_clk, ttc3_wav, swdt0_clk, swdt0_rst, swdt1_clk, swdt1_rst, gpio0, pmu0, + pcie0, csu0, dpaux0, pjtag0, trace0, trace0_clk, testscan0] + else: + enum: [sd1, sd1_pc, sd1_wp, sd1_cd] required: - groups @@ -251,7 +272,16 @@ description: List of pin names to select in this subnode. items: - pattern: '^MIO([0-9]|[1-6][0-9]|7[0-7])$' + allOf: + - if: + properties: + compatible: + contains: + const: xlnx,zynqmp-pinctrl + then: + pattern: '^MIO([0-9]|[1-6][0-9]|7[0-7])$' + else: + pattern: '^((LPD|PMC)_)?MIO([0-9]|[1-6][0-9]|7[0-7])$' maxItems: 78 bias-pull-up: true --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/ptp/ptp-xilinx.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/ptp/ptp-xilinx.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ptp/ptp-xilinx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx 1588 PTP timer-syncer + +maintainers: + - Harini Katakam + +description: | + Xilinx 1588 PTP timer-syncer IP provides precision timing functionality + along with capability for time and fine adjustment. This IP is provided + for use with Xilinx Ethernet MAC with HW timestamping capability. + +properties: + compatible: + enum: + - xlnx,timer-syncer-1588-1.0 # Deprecated + - xlnx,timer-syncer-1588-2.0 + - xlnx,timer-syncer-1588-3.0 + + reg: + description: | + Offset and length of the register set for the device. + + xlnx,has-timer-syncer: + type: boolean + description: | + Describes the timerIP modes. Supported modes are system timer, + system and port timer mode. If property is present then its + a system timer mode else system and port timer mode. + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + ptp_timer@80000000 { + compatible = "xlnx,timer-syncer-1588-2.0"; + reg = <0x80000000 0x10000>; + xlnx,has-timer-syncer; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/regulator/mt6315-regulator.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/regulator/mt6315-regulator.yaml @@ -31,10 +31,6 @@ $ref: regulator.yaml# unevaluatedProperties: false - properties: - regulator-compatible: - pattern: "^vbuck[1-4]$" - additionalProperties: false required: @@ -52,7 +48,6 @@ regulators { vbuck1 { - regulator-compatible = "vbuck1"; regulator-min-microvolt = <300000>; regulator-max-microvolt = <1193750>; regulator-enable-ramp-delay = <256>; @@ -60,7 +55,6 @@ }; vbuck3 { - regulator-compatible = "vbuck3"; regulator-min-microvolt = <300000>; regulator-max-microvolt = <1193750>; regulator-enable-ramp-delay = <256>; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml @@ -22,7 +22,7 @@ Each sub-node is identified using the node's name, with valid values listed for each of the pmics below. - For mp5496, s1, s2 + For mp5496, s1, s2, l2, l5 For pm2250, s1, s2, s3, s4, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22 --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/remoteproc/xilinx,zynqmp-r5-remoteproc.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/remoteproc/xilinx,zynqmp-r5-remoteproc.yaml @@ -0,0 +1,216 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/xilinx,zynqmp-r5-remoteproc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx R5 remote processor controller + +description: + This document defines the binding for the remoteproc component that loads and + boots firmwares on the Xilinx Zynqmp and Versal family chipsets. + + Note that the Linux has global addressing view of the R5-related memory (TCM) + so the absolute address ranges are provided in TCM reg's. + +maintainers: + - Ben Levinsky + +properties: + $nodename: + pattern: "^r5[f|2]ss(@.*)?" + + compatible: + enum: + - xlnx,zynqmp-r5-remoteproc + - xlnx,versal-r5-remoteproc + - xlnx,versal-net-r52-remoteproc + + reg: + items: + - description: Address and Size of Xilinx RPU Configuration register + + "#address-cells": + const: 2 + + "#size-cells": + const: 2 + + ranges: true + +# Optional properties: +# -------------------- + xlnx,cluster-mode: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + description: | + Configuration Mode for the Dual R5F cores within the R5F cluster. + Should be either a value of 0 (LockStep mode) or 1 (Split mode), + default is LockStep mode if omitted. + +# R5F Processor Child Nodes: +# ========================== + +patternProperties: + "^r5[f|2]_[a-f0-9]+$": + type: object + description: | + The R5F Sub-System device node should define one or two R5F child nodes, + each node representing a Xilinx instantiation of the Arm Cortex R5F core. + There should be one or two child nodes if the R5F is in Split mode and + one child node if the R5F is in Lockstep mode. + + In Split mode each R5F core has two associated TCM Banks. R5_0 has + TCM Banks 0A and 0B and R5_1 has TCM Banks 1A and 1B. + + In Lockstep mode only one R5F child node should be defined. This one + child has access to TCM Banks 0A, 0B, 1A and 1B and any of the four can + be included in the child R5F's sram property. + + This also supports arm-cortexr52 clusters on Versal-net platform with + the same runtime modes. + + The example below shows Split mode with two child nodes. + + properties: + compatible: + enum: + - xilinx,r5f + - xilinx,r52 + +# The following properties are mandatory for R5F Core0 in both LockStep and Split +# modes, and are mandatory for R5F Core1 _only_ in Split mode. + + memory-region: + description: | + Phandles to the memory nodes to be associated with the + The reserved memory nodes should be carveout nodes, and + should be defined with a "no-map" property as per the bindings in + Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt + minItems: 1 + maxItems: 6 + items: + - description: Region used for dynamic DMA allocations like vrings and + vring buffers + - description: region reserved for firmware image sections + additionalItems: true + + power-domain: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Power node ID that is used to uniquely identify the RPU for Xilinx + Power Management. + +# Optional properties: +# -------------------- +# The following properties are optional properties for each of the R5F cores: + + mboxes: + description: | + Standard property to specify a mailbox + This property is required only if the rpmsg/virtio functionality + is used + + Refer to the zynqmp-ipi-mailbox documentation for client usage of this + property + maxItems: 1 + + mbox-names: + description: | + Refer to the zynqmp-ipi-mailbox documentation for client usage of this + property + items: + - const: tx + - const: rx + + sram: + $ref: /schemas/types.yaml#/definitions/phandle-array + minItems: 1 + maxItems: 4 + items: + maxItems: 1 + description: | + Phandles to one or more reserved on-chip SRAM regions. The regions + should be defined as child nodes of the respective SRAM node, and + should be defined as per the generic bindings in, + Documentation/devicetree/bindings/sram/sram.yaml + + xlnx,rsc-tbl: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: Phandle of carveout + - description: The location of the resource table. It is expected + that the address is within the carveout. If not, then + the resource table physical address will not be stored + and attach will not work. + description: | + Reference to the carveout that has the resource table. The second + argument is the address within the carveout where the resource table + is located. + + required: + - compatible + - power-domain + + unevaluatedProperties: false + +required: + - reg + - compatible + - "#address-cells" + - "#size-cells" + - ranges + +allOf: + - if: + properties: + compatible: + enum: + - xilinx,r5f + then: + required: + - sram + +additionalProperties: false + +examples: + - | + / { + compatible = "xlnx,zynqmp-zcu102-rev1.0", "xlnx,zynqmp-zcu102", "xlnx,zynqmp"; + #address-cells = <2>; + #size-cells = <2>; + model = "ZynqMP ZCU102 "; + + r5fss@ff9a0000 { + compatible = "xlnx,zynqmp-r5-remoteproc"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + reg = <0x0 0xff9a0000 0x0 0x10000>; + xlnx,cluster-mode = <0>; + + r5f_0 { + compatible = "xilinx,r5f"; + memory-region = <&elf_load0>, + <&rpu0vdev0vring0>, + <&rpu0vdev0vring1>, + <&rpu0vdev0buffer>; + sram = <&tcm_0a>, <&tcm_0b>; + power-domain = <0x7>; + xlnx,rsc-tbl = <&rproc_0_reserved 0x3ed20000>; + }; + r5f_1 { + compatible = "xilinx,r5f"; + memory-region = <&elf_load1>, + <&rpu1vdev0vring0>, + <&rpu1vdev0vring1>, + <&rpu1vdev0buffer>; + sram = <&tcm_1a>, <&tcm_1b>; + power-domain = <0x8>; + }; + + }; + }; + +... --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml @@ -18,11 +18,26 @@ properties: compatible: - const: xlnx,zynqmp-r5fss + enum: + - xlnx,zynqmp-r5fss + - xlnx,versal-r5fss + - xlnx,versal-net-r52fss + + "#address-cells": + const: 2 + + "#size-cells": + const: 2 + + ranges: + description: | + Standard ranges definition providing address translations for + local R5F TCM address spaces to bus addresses. xlnx,cluster-mode: $ref: /schemas/types.yaml#/definitions/uint32 enum: [0, 1, 2] + default: 1 description: | The RPU MPCore can operate in split mode (Dual-processor performance), Safety lock-step mode(Both RPU cores execute the same code in lock-step, @@ -36,8 +51,16 @@ 1: lockstep mode (default) 2: single cpu mode + xlnx,tcm-mode: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + description: | + Configure RPU TCM + 0: split mode + 1: lockstep mode + patternProperties: - "^r5f-[a-f0-9]+$": + "^r(.*)@[0-9a-f]+$": type: object description: | The RPU is located in the Low Power Domain of the Processor Subsystem. @@ -52,10 +75,22 @@ properties: compatible: - const: xlnx,zynqmp-r5f + enum: + - xlnx,zynqmp-r5f + - xlnx,versal-r5f + - xlnx,versal-net-r52f + + reg: + minItems: 1 + maxItems: 4 + + reg-names: + minItems: 1 + maxItems: 4 power-domains: - maxItems: 1 + minItems: 2 + maxItems: 5 mboxes: minItems: 1 @@ -101,35 +136,235 @@ required: - compatible + - reg + - reg-names - power-domains - unevaluatedProperties: false - required: - compatible + - "#address-cells" + - "#size-cells" + - ranges + +allOf: + - if: + properties: + compatible: + contains: + enum: + - xlnx,versal-net-r52fss + then: + properties: + xlnx,tcm-mode: false + + patternProperties: + "^r52f@[0-9a-f]+$": + type: object + + properties: + reg: + minItems: 1 + items: + - description: ATCM internal memory + - description: BTCM internal memory + - description: CTCM internal memory + + reg-names: + minItems: 1 + items: + - const: atcm0 + - const: btcm0 + - const: ctcm0 + + power-domains: + minItems: 2 + items: + - description: RPU core power domain + - description: ATCM power domain + - description: BTCM power domain + - description: CTCM power domain + + - if: + properties: + compatible: + contains: + enum: + - xlnx,zynqmp-r5fss + - xlnx,versal-r5fss + then: + if: + properties: + xlnx,cluster-mode: + enum: [1, 2] + then: + properties: + xlnx,tcm-mode: + enum: [1] + + patternProperties: + "^r5f@[0-9a-f]+$": + type: object + + properties: + reg: + minItems: 1 + items: + - description: ATCM internal memory + - description: BTCM internal memory + - description: extra ATCM memory in lockstep mode + - description: extra BTCM memory in lockstep mode + + reg-names: + minItems: 1 + items: + - const: atcm0 + - const: btcm0 + - const: atcm1 + - const: btcm1 + + power-domains: + minItems: 2 + items: + - description: RPU core power domain + - description: ATCM power domain + - description: BTCM power domain + - description: second ATCM power domain + - description: second BTCM power domain + + required: + - xlnx,tcm-mode + + else: + properties: + xlnx,tcm-mode: + enum: [0] + + patternProperties: + "^r5f@[0-9a-f]+$": + type: object + + properties: + reg: + minItems: 1 + items: + - description: ATCM internal memory + - description: BTCM internal memory + + reg-names: + minItems: 1 + items: + - const: atcm0 + - const: btcm0 + + power-domains: + minItems: 2 + items: + - description: RPU core power domain + - description: ATCM power domain + - description: BTCM power domain + + required: + - xlnx,tcm-mode additionalProperties: false examples: - | - remoteproc { - compatible = "xlnx,zynqmp-r5fss"; - xlnx,cluster-mode = <1>; - - r5f-0 { - compatible = "xlnx,zynqmp-r5f"; - power-domains = <&zynqmp_firmware 0x7>; - memory-region = <&rproc_0_fw_image>, <&rpu0vdev0buffer>, <&rpu0vdev0vring0>, <&rpu0vdev0vring1>; - mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>; - mbox-names = "tx", "rx"; + #include + + // Split mode configuration + soc { + #address-cells = <2>; + #size-cells = <2>; + + remoteproc@ffe00000 { + compatible = "xlnx,zynqmp-r5fss"; + xlnx,cluster-mode = <0>; + xlnx,tcm-mode = <0>; + + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x10000>, + <0x0 0x20000 0x0 0xffe20000 0x0 0x10000>, + <0x1 0x0 0x0 0xffe90000 0x0 0x10000>, + <0x1 0x20000 0x0 0xffeb0000 0x0 0x10000>; + + r5f@0 { + compatible = "xlnx,zynqmp-r5f"; + reg = <0x0 0x0 0x0 0x10000>, <0x0 0x20000 0x0 0x10000>; + reg-names = "atcm0", "btcm0"; + power-domains = <&zynqmp_firmware PD_RPU_0>, + <&zynqmp_firmware PD_R5_0_ATCM>, + <&zynqmp_firmware PD_R5_0_BTCM>; + memory-region = <&rproc_0_fw_image>, <&rpu0vdev0buffer>, + <&rpu0vdev0vring0>, <&rpu0vdev0vring1>; + mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>; + mbox-names = "tx", "rx"; + }; + + r5f@1 { + compatible = "xlnx,zynqmp-r5f"; + reg = <0x1 0x0 0x0 0x10000>, <0x1 0x20000 0x0 0x10000>; + reg-names = "atcm0", "btcm0"; + power-domains = <&zynqmp_firmware PD_RPU_1>, + <&zynqmp_firmware PD_R5_1_ATCM>, + <&zynqmp_firmware PD_R5_1_BTCM>; + memory-region = <&rproc_1_fw_image>, <&rpu1vdev0buffer>, + <&rpu1vdev0vring0>, <&rpu1vdev0vring1>; + mboxes = <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>; + mbox-names = "tx", "rx"; + }; }; + }; - r5f-1 { - compatible = "xlnx,zynqmp-r5f"; - power-domains = <&zynqmp_firmware 0x8>; - memory-region = <&rproc_1_fw_image>, <&rpu1vdev0buffer>, <&rpu1vdev0vring0>, <&rpu1vdev0vring1>; - mboxes = <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>; - mbox-names = "tx", "rx"; + - | + //Lockstep configuration + soc { + #address-cells = <2>; + #size-cells = <2>; + + remoteproc@ffe00000 { + compatible = "xlnx,zynqmp-r5fss"; + xlnx,cluster-mode = <1>; + xlnx,tcm-mode = <1>; + + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x10000>, + <0x0 0x20000 0x0 0xffe20000 0x0 0x10000>, + <0x0 0x10000 0x0 0xffe10000 0x0 0x10000>, + <0x0 0x30000 0x0 0xffe30000 0x0 0x10000>; + + r5f@0 { + compatible = "xlnx,zynqmp-r5f"; + reg = <0x0 0x0 0x0 0x10000>, + <0x0 0x20000 0x0 0x10000>, + <0x0 0x10000 0x0 0x10000>, + <0x0 0x30000 0x0 0x10000>; + reg-names = "atcm0", "btcm0", "atcm1", "btcm1"; + power-domains = <&zynqmp_firmware PD_RPU_0>, + <&zynqmp_firmware PD_R5_0_ATCM>, + <&zynqmp_firmware PD_R5_0_BTCM>, + <&zynqmp_firmware PD_R5_1_ATCM>, + <&zynqmp_firmware PD_R5_1_BTCM>; + memory-region = <&rproc_0_fw_image>, <&rpu0vdev0buffer>, + <&rpu0vdev0vring0>, <&rpu0vdev0vring1>; + mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>; + mbox-names = "tx", "rx"; + }; + + r5f@1 { + compatible = "xlnx,zynqmp-r5f"; + reg = <0x1 0x0 0x0 0x10000>, <0x1 0x20000 0x0 0x10000>; + reg-names = "atcm0", "btcm0"; + power-domains = <&zynqmp_firmware PD_RPU_1>, + <&zynqmp_firmware PD_R5_1_ATCM>, + <&zynqmp_firmware PD_R5_1_BTCM>; + memory-region = <&rproc_1_fw_image>, <&rpu1vdev0buffer>, + <&rpu1vdev0vring0>, <&rpu1vdev0vring1>; + mboxes = <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>; + mbox-names = "tx", "rx"; + }; }; }; ... --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/serial/cdns,uart.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/serial/cdns,uart.yaml @@ -46,6 +46,9 @@ power-domains: maxItems: 1 + resets: + maxItems: 1 + required: - compatible - reg @@ -55,6 +58,7 @@ allOf: - $ref: serial.yaml# + - $ref: rs485.yaml# - if: properties: compatible: --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/serial/rs485.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/serial/rs485.yaml @@ -18,16 +18,15 @@ description: prop-encoded-array $ref: /schemas/types.yaml#/definitions/uint32-array items: - items: - - description: Delay between rts signal and beginning of data sent in - milliseconds. It corresponds to the delay before sending data. - default: 0 - maximum: 100 - - description: Delay between end of data sent and rts signal in milliseconds. - It corresponds to the delay after sending data and actual release - of the line. - default: 0 - maximum: 100 + - description: Delay between rts signal and beginning of data sent in + milliseconds. It corresponds to the delay before sending data. + default: 0 + maximum: 100 + - description: Delay between end of data sent and rts signal in milliseconds. + It corresponds to the delay after sending data and actual release + of the line. + default: 0 + maximum: 100 rs485-rts-active-high: description: drive RTS high when sending (this is the default). --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.yaml @@ -15,6 +15,7 @@ enum: - xlnx,xps-uartlite-1.00.a - xlnx,opb-uartlite-1.00.b + - xlnx,axi-uartlite-rs485 reg: maxItems: 1 --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/soc/rockchip/grf.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/soc/rockchip/grf.yaml @@ -165,6 +165,7 @@ unevaluatedProperties: false pcie-phy: + type: object description: Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml @@ -10,7 +10,7 @@ - Michal Simek description: | - Xilinx boards with Zynq-7000 SOC or Zynq UltraScale+ MPSoC + Xilinx boards with Zynq-7000 SOC or Zynq UltraScale+ MPSoC or Versal or Versal NET properties: $nodename: @@ -63,7 +63,10 @@ - description: Xilinx evaluation board zcu1275 items: - - const: xlnx,zynqmp-zcu1275-revA + - enum: + - xlnx,zynqmp-zcu1275-revA + - xlnx,zynqmp-zcu1275-revB + - xlnx,zynqmp-zcu1275-rev1.0 - const: xlnx,zynqmp-zcu1275 - const: xlnx,zynqmp @@ -81,6 +84,14 @@ - const: xlnx,zynqmp-zcu100 - const: xlnx,zynqmp + - description: Xilinx ZynqMP based System Controller + items: + - enum: + - xlnx,zynqmp-sc-revB + - xlnx,zynqmp-sc-revC + - const: xlnx,zynqmp-sc + - const: xlnx,zynqmp + - description: Xilinx evaluation board zcu102 items: - enum: @@ -116,6 +127,29 @@ - const: xlnx,zynqmp-zcu111 - const: xlnx,zynqmp + - description: Xilinx evaluation board zcu208 + items: + - enum: + - xlnx,zynqmp-zcu208-revA + - xlnx,zynqmp-zcu208-rev1.0 + - const: xlnx,zynqmp-zcu208 + - const: xlnx,zynqmp + + - description: Xilinx evaluation board zcu216 + items: + - enum: + - xlnx,zynqmp-zcu216-revA + - xlnx,zynqmp-zcu216-rev1.0 + - const: xlnx,zynqmp-zcu216 + - const: xlnx,zynqmp + + - description: Xilinx evaluation board zcu1285 + items: + - enum: + - xlnx,zynqmp-zcu1285-revA + - xlnx,zynqmp-zcu1285-rev1.0 + - const: xlnx,zynqmp-zcu1285 + - description: Xilinx Kria SOMs items: - const: xlnx,zynqmp-sm-k26-rev1 @@ -132,6 +166,46 @@ - const: xlnx,zynqmp-smk-k26 - const: xlnx,zynqmp + - description: Xilinx Versal NET b2197 (Tenzing2) + items: + - const: xlnx,versal-net-vn-p-b2197-00-revA + - const: xlnx,versal-net-vn-p-b2197-00 + - const: xlnx,versal-net + + - description: Xilinx Kria SOM KV260 revA/Y/Z + minItems: 3 + items: + enum: + - xlnx,zynqmp-sk-kv260-revA + - xlnx,zynqmp-sk-kv260-revY + - xlnx,zynqmp-sk-kv260-revZ + - xlnx,zynqmp-sk-kv260 + - xlnx,zynqmp + allOf: + - contains: + const: xlnx,zynqmp-sk-kv260-revA + - contains: + const: xlnx,zynqmp-sk-kv260 + - contains: + const: xlnx,zynqmp + + - description: Xilinx Kria SOM KV260 rev2/1/B + minItems: 3 + items: + enum: + - xlnx,zynqmp-sk-kv260-rev2 + - xlnx,zynqmp-sk-kv260-rev1 + - xlnx,zynqmp-sk-kv260-revB + - xlnx,zynqmp-sk-kv260 + - xlnx,zynqmp + allOf: + - contains: + const: xlnx,zynqmp-sk-kv260-revB + - contains: + const: xlnx,zynqmp-sk-kv260 + - contains: + const: xlnx,zynqmp + - description: AMD MicroBlaze V (QEMU) items: - const: qemu,mbv --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/soc/xilinx/xlnx,ai-engine.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/soc/xilinx/xlnx,ai-engine.yaml @@ -0,0 +1,199 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/xilinx/xlnx,ai-engine.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx AI Engine + +maintainers: + - Wendy Liang + +description: |+ + The Xilinx AI Engine is a tile processor with many cores (up to 400) that + can run in parallel. The data routing between cores is configured through + internal switches, and shim tiles interface with external interconnect, such + as memory or PL. One AI engine device can have multiple apertures, each + has its own address space and interrupt. At runtime application can create + multiple partitions within an aperture which are groups of columns of AI + engine tiles. Each AI engine partition is the minimum resetable unit for an + AI engine application. + +properties: + compatible: + enum: + - xlnx,ai-engine-v2.0 + - xlnx,ai-engine-v1.0 # deprecated + + reg: + deprecated: true + description: | + Physical base address and length of the device registers. + The AI engine address space assigned to Linux is defined by Xilinx + platform design tool. + + '#address-cells': + enum: [2] + description: | + size of cell to describe AI engine range of tiles address. + It is the location of the starting tile of the range. + As the AI engine tiles are 2D array, the location of a tile + is presented as (column, row), the address cell is 2. + + '#size-cells': + enum: [2] + description: | + size of cell to describe AI engine range of tiles size. + As the AI engine tiles are 2D array, the size cell is 2. + + interrupts: + deprecated: true + maxItems: 3 + + interrupt-names: + deprecated: true + description: | + Should be "interrupt1", "interrupt2" or "interrupt3". + + ranges: true + + xlnx,aie-gen: + $ref: /schemas/types.yaml#/definitions/uint8 + description: | + hardware generation of AI engine device. E.g. the current values supported + are 1 and 2, it will be presented as <0x1> or <0x2> + + xlnx,shim-rows: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: | + start row and the number of rows of SHIM tiles of the AI engine device + + xlnx,core-rows: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: | + start row and the number of rows of core tiles of the AI engine device + + xlnx,mem-rows: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: | + start row and the number of rows of memory tiles of the AI engine device + +required: + - compatible + - '#address-cells' + - '#size-cells' + - ranges + - power-domains + - xlnx,aie-gen + - xlnx,shim-rows + - xlnx,core-rows + - xlnx,mem-rows + +patternProperties: + "^aperture@[0-9]+$": + type: object + description: | + AI engine aperture which is a group of column based tiles of the + AI engine device. Each AI engine apertures isolated from the + other AI engine apertures. An AI engine aperture is defined by + Xilinx platform design tools. + + properties: + reg: + description: | + Physical base address and length of the aperture registers. + The AI engine address space assigned to Linux is defined by Xilinx + platform design tool. + + xlnx,columns: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + It describes the location of the aperture. It specifies the start + column and the number of columns. E.g. an aperture starts from + column 0 and there are 50 columns, it will be presented as <0 50>. + + interrupts: + maxItems: 3 + + interrupt-names: + description: | + Should be "interrupt1", "interrupt2" or "interrupt3". + + xlnx,node-id: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + AI engine aperture node ID, which is defined by Xilinx platform design + tool to identify the AI engine aperture in the firmware. + + required: + - reg + - xlnx,columns + - xlnx,node-id + + "^partition[0-9]@[0-9]+$": + deprecated: true + type: object + description: | + AI engine partition which is a group of column based tiles of the AI + engine device. Each AI engine partition is isolated from the other + AI engine partitions. An AI engine partition is defined by Xilinx + platform design tools. + AI engine partition driver will create a FPGA bridge when probes the + AI engine partition. The AI engine SHIM row of the partition is the + bridge to connect AI engine partition, FPGA and PS. + + properties: + reg: + description: | + It describes the group of tiles of the AI engine partition. It needs + to include the SHIM row. The format is defined by the parent AI engine + device node's '#address-cells' and '#size-cells' properties. e.g. a v1 + AI engine device has 2D tiles array, the first row is SHIM row. A + partition which has 50 columns and 8 rows of core tiles and 1 row of + SHIM tiles will be presented as <0 0 50 9>. + + label: + maxItems: 1 + + xlnx,partition-id: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + AI engine partition ID, which is defined by Xilinx platform design + tool to identify the AI engine partition in the system. + + required: + - reg + - xlnx,partition-id + +additionalProperties: true + +examples: + - | + #include + bus { + #address-cells = <2>; + #size-cells = <2>; + ai_engine: ai-engine { + compatible = "xlnx,ai-engine-v2.0"; + xlnx,aie-gen = /bits/ 8 <0x1>; + xlnx,shim-rows = /bits/ 8 <0 1>; + xlnx,core-rows = /bits/ 8 <1 8>; + xlnx,mem-rows = /bits/ 8 <0 0>; + power-domains = <&versal_firmware PM_DEV_AI>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + aperture0: aperture@0 { + /* 50 columns and 8 core tile rows + 1 SHIM row */ + reg = <0x200 0x0 0x1 0x0>; + xlnx,columns = <0 50>; + xlnx,node-id = <1>; + interrupt-parent = <&gic>; + interrupts = <0x0 0x94 0x4>, + <0x0 0x95 0x4>, + <0x0 0x96 0x4>; + interrupt-names = "interrupt1", "interrupt2", "interrupt3"; + }; + }; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/soc/xilinx/xlnx,ai_engine.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/soc/xilinx/xlnx,ai_engine.txt @@ -0,0 +1,28 @@ +Xilinx AI Engine +---------------- + +The Xilinx AI Engine is a tile processor with many cores (up to 400) that +can run in parallel. The data routing between cores is configured through +internal switches, and shim tiles interface with external interconnect, such +as memory or PL. + +Required properties: + +- compatible: Must be "xlnx,ai_engine". +- reg: Physical base address and length of the registers set for the device. +- interrupt-parent: the phandle to the interrupt controller. +- interrupts: the interrupt numbers. +- interrupt-names: Should be "interrupt0", "interrupt1", "interrupt2" or + "interrupt3". + +Example: + + ai_engine@20000000000 { + compatible = "xlnx,ai_engine"; + reg = <0x200 0x0 0x1 0x0>; + interrupt-parent = <&gic>; + interrupts = <0x0 0x94 0x1>, + <0x0 0x95 0x1>, + <0x0 0x96 0x1>; + interrupt-names = "interrupt1", "interrupt2", "interrupt3"; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.yaml @@ -102,21 +102,21 @@ default: 2 interrupts: - anyOf: - - minItems: 1 - items: - - description: TX interrupt - - description: RX interrupt - - items: - - description: common/combined interrupt + minItems: 1 + maxItems: 2 interrupt-names: oneOf: - - minItems: 1 + - description: TX interrupt + const: tx + - description: RX interrupt + const: rx + - description: TX and RX interrupts items: - const: tx - const: rx - - const: common + - description: Common/combined interrupt + const: common fck_parent: $ref: /schemas/types.yaml#/definitions/string --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/sound/mt6359.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/sound/mt6359.yaml @@ -23,8 +23,8 @@ Indicates how many data pins are used to transmit two channels of PDM signal. 0 means two wires, 1 means one wire. Default value is 0. enum: - - 0 # one wire - - 1 # two wires + - 0 # two wires + - 1 # one wire mediatek,mic-type-0: $ref: /schemas/types.yaml#/definitions/uint32 @@ -53,9 +53,9 @@ examples: - | - mt6359codec: mt6359codec { - mediatek,dmic-mode = <0>; - mediatek,mic-type-0 = <2>; + mt6359codec: audio-codec { + mediatek,dmic-mode = <0>; + mediatek,mic-type-0 = <2>; }; ... --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/sound/rt5645.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/sound/rt5645.txt @@ -20,6 +20,11 @@ a GPIO spec for the external headphone detect pin. If jd-mode = 0, we will get the JD status by getting the value of hp-detect-gpios. +- cbj-sleeve-gpios: + a GPIO spec to control the external combo jack circuit to tie the sleeve/ring2 + contacts to the ground or floating. It could avoid some electric noise from the + active speaker jacks. + - realtek,in2-differential Boolean. Indicate MIC2 input are differential, rather than single-ended. @@ -68,6 +73,7 @@ compatible = "realtek,rt5650"; reg = <0x1a>; hp-detect-gpios = <&gpio 19 0>; + cbj-sleeve-gpios = <&gpio 20 0>; interrupt-parent = <&gpio>; interrupts = <7 IRQ_TYPE_EDGE_FALLING>; realtek,dmic-en = "true"; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/sound/xlnx,audio-formatter.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/sound/xlnx,audio-formatter.txt @@ -1,6 +1,6 @@ Device-Tree bindings for Xilinx PL audio formatter -The IP core supports DMA, data formatting(AES<->PCM conversion) +The IP core supports DMA, data formatting(packing, conversion) of audio samples. Required properties: @@ -13,8 +13,21 @@ - interrupts-parent: Phandle for interrupt controller. - interrupts: List of Interrupt numbers. - reg: Base address and size of the IP core instance. + - xlnx,tx: connected audio sink node. + Should be one of below supported nodes: + 1. HDMI video Tx output + 2. I2S transmitter + 3. UHDSDI audio embed + Only those nodes were supported in sound card driver + + - xlnx,rx: connected audio source node. + Should be one of below supported nodes: + 1. HDMI video Rx input + 2. I2S receiver + 3. UHDSDI audio extract + Only those nodes were supported in sound card driver - clock-names: List of input clocks. - Required elements: "s_axi_lite_aclk", "aud_mclk" + Required elements: "s_axi_lite_aclk", "m_axis_mm2s_aclk", "aud_mclk", "s_axis_s2mm_aclk" - clocks: Input clock specifier. Refer to common clock bindings. Example: @@ -24,6 +37,8 @@ interrupt-parent = <&gic>; interrupts = <0 104 4>, <0 105 4>; reg = <0x0 0x80010000 0x0 0x1000>; - clock-names = "s_axi_lite_aclk", "aud_mclk"; - clocks = <&clk 71>, <&clk_wiz_1 0>; + xlnx,tx = <&i2s_transmitter>; + xlnx,rx = <&i2s_receiver>; + clock-names = "s_axi_lite_aclk", "m_axis_mm2s_aclk", "aud_mclk", "s_axis_s2mm_aclk"; + clocks = <&clk 71>, <&audio_ss_0_clk_wiz_0 0>, <&audio_ss_0_clk_wiz_0 0>, <&clk 71>; }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/sound/xlnx,dp-snd-card.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/sound/xlnx,dp-snd-card.txt @@ -0,0 +1,17 @@ +Device-Tree bindings for Xilinx ZynqMP DisplayPort Audio Card + +The card driver integrates codec and pcm components and represents as a single +audio device. + +Required properties: + - compatible: Should be "xlnx,dp-snd-card". + - xlnx,dp-snd-pcm: phandle(s) to the ZynqMP DP PCM node. + - xlnx,dp-snd-codec: phandle to the ZynqMP DP card node. + +Example: + + xlnx_dp_snd_card: dp_snd_card { + compatible = "xlnx,dp-snd-card"; + xlnx,dp-snd-pcm = <&xlnx_dp_snd_pcm0>, <&xlnx_dp_snd_pcm1>; + xlnx,dp-snd-codec = <&xlnx_dp_snd_codec0>; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/sound/xlnx,dp-snd-codec.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/sound/xlnx,dp-snd-codec.txt @@ -0,0 +1,18 @@ +Device-Tree bindings for Xilinx ZynqMP DisplayPort Codec + +The codec driver handles the audio clock and format management. + +Required properties: + - compatible: Should be "xlnx,dp-snd-codec". + - clocks: The phandle for the audio clock. The audio clock should be + configured to the correct audio clock rate, which should be one of + (44100 * 512) or (48000 * 512). + - clock-names: The identification string should be "aud_clk". + +Example: + + xlnx_dp_snd_codec0: dp_snd_codec0 { + compatible = "xlnx,dp-snd-codec"; + clocks = <&dp_aud_clk>; + clock-names = "aud_clk"; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/sound/xlnx,dp-snd-pcm.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/sound/xlnx,dp-snd-pcm.txt @@ -0,0 +1,18 @@ +Device-Tree bindings for Xilinx ZynqMP DisplayPort PCM + +The DPDMA driver of ZynqMP DisplayPort subsystem is based on DMA engine, +and the DP PCM driver is based on snd dmaengine helpers. + +Required properties: + - compatible: Should be "xlnx,dp-snd-pcm" or "xlnx,dp-snd-pcm0" or "xlnx,dp-snd-pcm1". + - dmas: the phandle list of DMA specifiers. The dma channel ID should be one + of 4 for audio0 channel or 5 for audio1 channel. + - dma-names: the indentifier strings for DMAs. The value should be "tx". + +Example: + + xlnx_dp_snd_pcm0: dp_snd_pcm0 { + compatible = "xlnx,dp-snd-pcm0"; + dmas = <&xlnx_dpdma 4>; + dma-names = "tx"; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/sound/xlnx,i2s.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/sound/xlnx,i2s.txt @@ -11,18 +11,31 @@ - xlnx,dwidth: sample data width. Can be any of 16, 24. - xlnx,num-channels: Number of I2S streams. Can be any of 1, 2, 3, 4. supported channels = 2 * xlnx,num-channels + - xlnx,snd-pcm: reference to audio formatter block + - clock-names: List of input clocks. + Required elements for I2S Tx: "s_axi_ctrl_aclk", "aud_mclk", "s_axis_aud_aclk". + Required elements for I2S Rx: "s_axi_ctrl_aclk", "aud_mclk", "m_axis_aud_aclk". + - clocks: Input clock specifier. Refer to common clock bindings. Example: i2s_receiver@a0080000 { compatible = "xlnx,i2s-receiver-1.0"; + clock-names = "s_axi_ctrl_aclk", "aud_mclk", "m_axis_aud_aclk"; + clocks = <&clk 71>, <&audio_ss_0_clk_wiz_0 0>, <&clk 71>; reg = <0x0 0xa0080000 0x0 0x10000>; xlnx,dwidth = <0x18>; xlnx,num-channels = <1>; + xlnx,snd-pcm = <&audio_ss_0_audio_formatter_0>; }; i2s_transmitter@a0090000 { compatible = "xlnx,i2s-transmitter-1.0"; + clock-names = "s_axi_ctrl_aclk", "aud_mclk", "s_axis_aud_aclk"; + clocks = <&clk 71>, <&audio_ss_0_clk_wiz_0 0>, <&audio_ss_0_clk_wiz_0 0>; reg = <0x0 0xa0090000 0x0 0x10000>; xlnx,dwidth = <0x18>; xlnx,num-channels = <1>; + xlnx,snd-pcm = <&audio_ss_0_audio_formatter_0>; }; + Documentation of "audio_ss_0_audio_formatter_0" node is located + at Documentation/devicetree/bindings/sound/xlnx,audio-formatter.txt --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/sound/xlnx,spdif.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/sound/xlnx,spdif.txt @@ -1,28 +1,27 @@ -Device-Tree bindings for Xilinx SPDIF IP +Device-Tree bindings for Xilinx SPDIF PL IP -The IP supports playback and capture of SPDIF audio +The IP supports SPDIF based playback and capture audio Required properties: - compatible: "xlnx,spdif-2.0" - clock-names: List of input clocks. - Required elements: "s_axi_aclk", "aud_clk_i" + Required elements for SPDIF Tx: "aud_clk_i", "s_axi_aclk", "s_axis_aclk". + Required elements for SPDIF Rx: "aud_clk_i", "s_axi_aclk", "m_axis_aclk". - clocks: Input clock specifier. Refer to common clock bindings. - reg: Base address and address length of the IP core instance. - interrupts-parent: Phandle for interrupt controller. - interrupts: List of Interrupt numbers. - - xlnx,spdif-mode: 0 :- receiver mode - 1 :- transmitter mode - - xlnx,aud_clk_i: input audio clock value. + - xlnx,spdif-mode: 0 :- receiver mode ; 1 :- transmitter mode + - xlnx,snd-pcm: phandle to audio formatter node -Example: +Example - SPDIF Rx: spdif_0: spdif@80010000 { - clock-names = "aud_clk_i", "s_axi_aclk"; - clocks = <&misc_clk_0>, <&clk 71>; + clock-names = "aud_clk_i", "s_axi_aclk", "m_axis_aclk"; + clocks = <&si570_1>, <&clk 71>, <&clk 71>; compatible = "xlnx,spdif-2.0"; - interrupt-names = "spdif_interrupt"; interrupt-parent = <&gic>; interrupts = <0 91 4>; reg = <0x0 0x80010000 0x0 0x10000>; xlnx,spdif-mode = <1>; - xlnx,aud_clk_i = <49152913>; + xlnx,snd-pcm = <&audio_formatter_0>; }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/sound/xlnx,v-uhdsdi-audio.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/sound/xlnx,v-uhdsdi-audio.txt @@ -0,0 +1,60 @@ +Device-Tree bindings for Xilinx SDI audio + +The IP core supports embed/extract of audio in SDI Tx and Rx +protocol respectively. Reference to PG: +https://www.xilinx.com/support/documentation/ip_documentation/v_uhdsdi_audio/v1_0/pg309-v-uhdsdi-audio.pdf + +Required properties: + - compatible: Should be one of: + "xlnx,v-uhdsdi-audio-2.0" + "xlnx,v-uhdsdi-audio-1.0" + Note: v1.0 (xlnx,v-uhdsdi-audio-1.0) is deprecated + and driver no longer supports it. Mandatory to upgrade to v2.0 + - interrupts: Interrupt number. + - interrupts-parent: phandle for interrupt controller. + - reg: Base address and size of the IP core instance. + - xlnx,snd-pcm: reference to audio formatter block + - clock-names: List of input clocks. + Required elements for SDI Embed: "s_axi_aclk", "s_axis_clk", "sdi_embed_clk". + Required elements for SDI Extract: "s_axi_aclk", "sdi_extract_clk", "m_axis_clk". + - clocks: Input clock specifier. Refer to common clock bindings. + +SDI embed contains a output port to remote endpoint of SDI video Tx node. +This pipeline should be described using the DT bindings defined in +Documentation/devicetree/bindings/graph.txt + +Example: + + audio_ss_0_v_uhdsdi_audio_extract_0: v_uhdsdi_audio@80080000 { + compatible = "xlnx,v-uhdsdi-audio-2.0"; + clock-names = "s_axi_aclk", "sdi_extract_clk", "m_axis_clk"; + clocks = <&misc_clk_0>, <&misc_clk_1>, <&misc_clk_0>; + interrupt-names = "interrupt"; + interrupt-parent = <&gic>; + interrupts = <0 106 4>; + reg = <0x0 0x80080000 0x0 0x10000>; + xlnx,snd-pcm = <&audio_ss_0_audio_formatter_0>; + }; + + audio_ss_0_v_uhdsdi_audio_embed_0: v_uhdsdi_audio@80090000 { + compatible = "xlnx,v-uhdsdi-audio-2.0"; + clock-names = "s_axi_aclk", "s_axis_clk", "sdi_embed_clk"; + clocks = <&misc_clk_0>, <&misc_clk_0>, <&misc_clk_1>; + interrupt-names = "interrupt"; + interrupt-parent = <&gic>; + interrupts = <0 107 4>; + reg = <0x0 0x80090000 0x0 0x10000>; + xlnx,snd-pcm = <&audio_ss_0_audio_formatter_0>; + sdi_av_port: port@0 { + reg = <0>; + sditx_audio_embed_src: endpoint { + remote-endpoint = <&sdi_audio_sink_port>; + }; + }; + }; + + Node 'v_smpte_uhdsdi_tx_ss' is documented in SDI Tx video bindings, + located at Documentation/devicetree/bindings/display/xlnx/xlnx,sdi-tx.txt. + + Node 'audio_ss_0_audio_formatter_0' node is documented + at Documentation/devicetree/bindings/sound/xlnx,audio-formatter.txt --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/spi/spi-controller.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/spi/spi-controller.yaml @@ -161,4 +161,12 @@ reg = <2>, <3>; stacked-memories = /bits/ 64 <0x10000000 0x10000000>; }; + + flash@5 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <50000000>; + reg = <5>; + multi-die; + }; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml @@ -15,12 +15,19 @@ properties: compatible: - enum: - - nxp,imx8dxl-fspi - - nxp,imx8mm-fspi - - nxp,imx8mp-fspi - - nxp,imx8qxp-fspi - - nxp,lx2160a-fspi + oneOf: + - enum: + - nxp,imx8dxl-fspi + - nxp,imx8mm-fspi + - nxp,imx8mp-fspi + - nxp,imx8qxp-fspi + - nxp,imx8ulp-fspi + - nxp,lx2160a-fspi + - items: + - enum: + - nxp,imx93-fspi + - nxp,imx95-fspi + - const: nxp,imx8mm-fspi reg: items: --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml @@ -118,6 +118,11 @@ Only for STM32H7, (Master Inter-Data Idleness) minimum time delay in nanoseconds inserted between two consecutive data frames. + multi-die: + $ref: /schemas/types.yaml#/definitions/flag + description: + The device consists of multiple memory die. + # The controller specific properties go here. allOf: - $ref: arm,pl022-peripheral-props.yaml# --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml @@ -37,6 +37,12 @@ power-domains: maxItems: 1 + has-io-mode: + $ref: /schemas/types.yaml#/definitions/flag + description: + Describes the controller operating mode. + If exists controller will operate in IO + mode else DMA mode. required: - compatible @@ -62,5 +68,6 @@ interrupt-parent = <&gic>; reg = <0x0 0xff0f0000 0x0 0x1000>, <0x0 0xc0000000 0x0 0x8000000>; + has-io-mode; }; }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/spmi/hisilicon,hisi-spmi-controller.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/spmi/hisilicon,hisi-spmi-controller.yaml @@ -14,7 +14,7 @@ It is a MIPI System Power Management (SPMI) controller. The PMIC part is provided by - ./Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml. + Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml. allOf: - $ref: spmi.yaml# @@ -48,7 +48,7 @@ PMIC properties, which are specific to the used SPMI PMIC device(s). When used in combination with HiSilicon 6421v600, the properties are documented at - drivers/staging/hikey9xx/hisilicon,hi6421-spmi-pmic.yaml. + Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml unevaluatedProperties: false --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/staging/net/xilinx-tsn-ethernet.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/staging/net/xilinx-tsn-ethernet.txt @@ -0,0 +1,54 @@ +Xilinx TSN (time sensitive networking) TEMAC axi ethernet driver (xilinx_axienet) +----------------------------------------------------------------------- + +Required properties: +- compatible : Should be "xlnx,tsn-ethernet-1.00.a". +- reg : Physical base address and size of the TSN registers map. +- interrupts : Property with a value describing the interrupt + number. +- interrupts-names : Property denotes the interrupt names. +- interrupt-parent : Must be core interrupt controller. +- phy-handle : See ethernet.txt file [1]. +- local-mac-address : See ethernet.txt file [1]. +- phy-mode : see ethernet.txt file [1]. + +Optional properties: +- xlnx,tsn : Denotes a ethernet with TSN capabilities. +- xlnx,tsn-slave : Denotes a TSN slave port. +- xlnx,txcsum : Tx checksum mode (Full, Partial and None). +- xlnx,rxcsum : Rx checksum mode (Full, Partial and None). +- xlnx,phy-type : Xilinx phy device type. See xilinx-phy.txt [2]. +- xlnx,eth-hasnobuf : Used when 1G MAC is configured in non-processor mode. +- xlnx,num-queue : Number of queue supported in current design, range is + 2 to 5 and default value is 5. +- xlnx,num-tc : Number of traffic class supported in current design, + range is 2,3 and default value is 3. It denotes + the traffic classes based on VLAN-PCP value. +- xlnx,qbv-addr : Denotes mac scheduler physical base address. +- xlnx,qbv-size : Denotes mac scheduler address space size. + +[1] Documentation/devicetree/bindings/net/ethernet.txt +[2] Documentation/devicetree/bindings/net/xilinx-phy.txt + +Example: + + tsn_emac_0: tsn_mac@80040000 { + compatible = "xlnx,tsn-ethernet-1.00.a"; + interrupt-parent = <&gic>; + interrupts = <0 104 4 0 106 4 0 91 4 0 110 4>; + interrupt-names = "interrupt_ptp_rx_1", "interrupt_ptp_tx_1", "mac_irq_1", "interrupt_ptp_timer"; + local-mac-address = [ 00 0A 35 00 01 0e ]; + phy-mode = "rgmii"; + reg = <0x0 0x80040000 0x0 0x14000>; + tsn,endpoint = <&tsn_ep>; + xlnx,tsn; + xlnx,tsn-slave; + xlnx,phy-type = <0x3>; + xlnx,eth-hasnobuf; + xlnx,num-queue = <0x2>; + xlnx,num-tc = <0x3>; + xlnx,qbv-addr = <0x80054000>; + xlnx,qbv-size = <0x2000>; + xlnx,txsum = <0>; + xlnx,rxsum = <0>; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/staging/net/xilinx_tsn.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/staging/net/xilinx_tsn.txt @@ -0,0 +1,17 @@ +Xilinx TSN (time sensitive networking) IP driver (xilinx_tsn_ip) +----------------------------------------------------------------------- + +Required properties: +- compatible : Should be one of "xlnx,tsn-endpoint-ethernet-mac-1.0", + "xlnx,tsn-endpoint-ethernet-mac-2.0" for TSN. +- reg : Physical base address and size of the TSN registers map. +- ranges : Specifies child address ranges of TSN IP subsystem including + TEMACs, endpoint and switch. Leave this property as empty + because parent node has the same mapping as all the child nodes. +Example: + + tsn_endpoint_ip_0: tsn_endpoint_ip_0 { + compatible = "xlnx,tsn-endpoint-ethernet-mac-2.0"; + reg = <0x0 0x80040000 0x0 0x40000>; + ranges; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/staging/net/xilinx_tsn_ep.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/staging/net/xilinx_tsn_ep.txt @@ -0,0 +1,54 @@ +Xilinx TSN (time sensitive networking) EndPoint Driver (xilinx_tsn_ep) +------------------------------------------------------------------------------- + +Required properties: +- compatible : Should be "xlnx,tsn-ep" +- reg : Physical base address and size of the TSN Endpoint + registers map +- interrupts : Property with a value describing the interrupt +- interrupts-names : Property denotes the interrupt names. +- interrupt-parent : Must be core interrupt controller. + +Optional properties: +- xlnx,num-tc : Number of traffic class supported in current design, + range is 2,3 and default value is 3. It denotes + the traffic classes based on VLAN-PCP value. +- xlnx,channel-ids : Queue Identifier associated with the MCDMA Channel, range + is Tx: "1 to 2" and Rx: "2 to 5", default value is "1 to 5". +- xlnx,eth-hasnobuf : Used when 1G MAC is configured in non processor mode. +- axistream-connected-rx : Reference to another node which contains the + resources for the MCDMA controller used by + this device. The MCDMA related resources + (registers and interrupts) will be used from + this node. + +Optional TADMA properties: +- xlnx,num-buffers-per-stream : Number of TADMA buffers per stream in design. Default is 64. +- xlnx,num-streams : Number of streams. Default is 8. +- xlnx,num-fetch-entries : Maximum number of entries that can be programmed to be + fetched by TADMA. Default is 8. +- axistream-connected-tx : Reference to another node which contains the + resources for the TADMA controller used by + this device. The TADMA-related resources + (registers and interrupts) will be used from + this node. + +Optional MCDMA properties: +- xlnx,num-mm2s-channels : Number of MM2S(read) channels in MCDMA +- xlnx,num-s2mm-channels : Number of S2MM(write) channels in MCDMA + +[1] Documentation/devicetree/bindings/net/ethernet.txt + +Example: + + tsn_ep: tsn_ep@80056000 { + compatible = "xlnx,tsn-ep"; + reg = <0x0 0x80056000 0x0 0xA000>; + xlnx,num-tc = <0x3>; + interrupt-names = "tsn_ep_scheduler_irq"; + interrupt-parent = <&gic>; + interrupts = <0 111 4>; + local-mac-address = [00 0A 35 00 01 10]; + xlnx,channel-ids = "1","2","3","4","5"; + xlnx,eth-hasnobuf ; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/staging/net/xilinx_tsn_ep_ex.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/staging/net/xilinx_tsn_ep_ex.txt @@ -0,0 +1,31 @@ +Xilinx TSN (time sensitive networking) Extended EndPoint Driver (xilinx_tsn_ep_ex) +------------------------------------------------------------------------------- + +Required properties: +- compatible : Should be "xlnx,tsn-ex-ep" +- reg : Physical base address and size of the TSN Endpoint + registers map +- local-mac-address : See ethernet.txt [1]. + +Optional properties: +- packet-switch : set to 1 when packet switching on ex-ep is + enabled in the design. + This property deprecated. + To identify the packet switching feature is enabled + or not in the design, please use the + xlnx, packet-switch property from the switch node + instead of packet-switch property. +- tsn,endpoint : This is a handle to the endpoint node. + The necessary ep resource details are obtained + from this reference. + +[1] Documentation/devicetree/bindings/net/ethernet.txt + +Example: + + tsn_ep_ex: tsn_ep_ex@80056000 { + compatible = "xlnx,tsn-ex-ep"; + reg = <0x0 0x80056000 0x0 0xA000>; + local-mac-address = [00 0A 35 00 01 20]; + tsn,endpoint = <&tsn_ep>; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/staging/net/xilinx_tsn_switch.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/staging/net/xilinx_tsn_switch.txt @@ -0,0 +1,27 @@ +Xilinx TSN (time sensitive networking) Switch Driver (xilinx_tsn_switch) +----------------------------------------------------------------------------- + +Required properties: +- compatible : Should be "xlnx,tsn-switch" +- reg : Physical base address and size of the TSN registers map. +- xlnx,num-ports : Number of network ports in subsystems. For ex., for an + EP + Switch system to two TEMACs, this value should be 3 + (ep, temac1 and temac 2). + +Optional properties: +- xlnx,num-tc : Number of traffic class supported in current design, + range is 2,3 and default value is 3. It denotes + the traffic classes based on VLAN-PCP value. +- xlnx,has-hwaddr-learning : Denotes hardware address learning support +- xlnx,has-inband-mgmt-tag : Denotes inband management support +- xlnx,packet-switch : Denotes packet switching support. + +Example: + + epswitch: tsn_switch@80078000 { + compatible = "xlnx,tsn-switch"; + reg = <0x0 0x80078000 0x0 0x4000>; + xlnx,num-tc = <0x3>; + xlnx,has-hwaddr-learning ; + xlnx,has-inband-mgmt-tag ; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/thermal/loongson,ls2k-thermal.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/thermal/loongson,ls2k-thermal.yaml @@ -18,13 +18,15 @@ oneOf: - enum: - loongson,ls2k1000-thermal + - loongson,ls2k2000-thermal - items: - enum: - - loongson,ls2k2000-thermal + - loongson,ls2k0500-thermal - const: loongson,ls2k1000-thermal reg: - maxItems: 1 + minItems: 1 + maxItems: 2 interrupts: maxItems: 1 @@ -38,6 +40,24 @@ - interrupts - '#thermal-sensor-cells' +if: + properties: + compatible: + contains: + enum: + - loongson,ls2k2000-thermal + +then: + properties: + reg: + minItems: 2 + maxItems: 2 + +else: + properties: + reg: + maxItems: 1 + unevaluatedProperties: false examples: --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/thermal/thermal-zones.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/thermal/thermal-zones.yaml @@ -49,7 +49,10 @@ to take when the temperature crosses those thresholds. patternProperties: - "^[a-zA-Z][a-zA-Z0-9\\-]{1,12}-thermal$": + # Node name is limited in size due to Linux kernel requirements - 19 + # characters in total (see THERMAL_NAME_LENGTH, including terminating NUL + # byte): + "^[a-zA-Z][a-zA-Z0-9\\-]{1,10}-thermal$": type: object description: Each thermal zone node contains information about how frequently it --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/thermal/xlnx,versal-thermal.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/thermal/xlnx,versal-thermal.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2024 Advanced Micro Devices Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/xlnx,versal-thermal.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx Versal Thermal + +maintainers: + - Salih Erim + +description: + Versal Thermal uses Versal Sysmon hardware for temperature reading + It works as sensor interface to be defined in thermal zones. + IIO binding channel through Sysmon required to use as temperature + sensor. It uses sysmon-temp-channel mapped in the Sysmon driver. + name to expose temperature information. + Exposed temperature value is converted to millicelcius scale. + +properties: + compatible: + const: xlnx,versal-thermal + + '#thermal-sensor-cells': + const: 0 + + io-channels: + maxItems: 1 + + io-channel-names: + const: sysmon-temp-channel + +required: + - compatible + - '#thermal-sensor-cells' + - io-channels + - io-channel-names + +additionalProperties: false + +examples: + - | + versal-thermal-sensor { + compatible = "xlnx,versal-thermal"; + #thermal-sensor-cells = <0>; + io-channels = <&sysmon0>; + io-channel-names = "sysmon-temp-channel"; + }; +... --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/timer/cdns,ttc.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/timer/cdns,ttc.yaml @@ -32,12 +32,23 @@ description: | Bit width of the timer, necessary if not 16. + "#pwm-cells": + const: 3 + required: - compatible - reg - - interrupts - clocks +allOf: + - if: + not: + required: + - "#pwm-cells" + then: + required: + - interrupts + additionalProperties: false examples: @@ -50,3 +61,12 @@ clocks = <&cpu_clk 3>; timer-width = <32>; }; + + - | + pwm: pwm@f8002000 { + compatible = "cdns,ttc"; + reg = <0xf8002000 0x1000>; + clocks = <&cpu_clk 3>; + timer-width = <32>; + #pwm-cells = <3>; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/ufs/amd,versal2-ufs.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/ufs/amd,versal2-ufs.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ufs/amd,versal2-ufs.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: AMD Versal Gen 2 UFS Host Controller + +maintainers: + - Sai Krishna Potthuri + +allOf: + - $ref: ufs-common.yaml + +properties: + compatible: + const: amd,versal2-ufs + + reg: + maxItems: 1 + + clocks: + maxItems: 3 + + clock-names: + items: + - const: core_clk + - const: phy_clk + - const: ref_clk + + resets: + minItems: 2 + maxItems: 2 + + reset-names: + items: + - const: ufshc-rst + - const: ufsphy-rst + +required: + - compatible + - reg + - clocks + - clock-names + - resets + - reset-names + +unevaluatedProperties: false + +examples: + - | + #include + ufs@f10b0000 { + compatible = "amd,versal2-ufs"; + reg = <0xf10b0000 0x1000>; + interrupts = ; + clocks = <&ufs_core_clk>, <&ufs_phy_clk>, <&ufs_ref_clk>; + clock-names = "core_clk", "phy_clk", "ref_clk"; + freq-table-hz = <0 0>, <0 0>, <0 0>; + resets = <&scmi_reset 4>, <&scmi_reset 35>; + reset-names = "ufshc-rst", "ufsphy-rst"; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/usb/microchip,usb2244.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/usb/microchip,usb2244.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/microchip,usb2244.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip USB2244 Ultra Fast USB-SD Controller + +description: + Microchip’s USB224x is a USB 2.0 compliant, Hi-Speed bulk only mass + storage class peripheral controller intended for reading and writing + to popular flash media from the xDPicture Card™, Memory Stick® (MS), + Secure Digital (SD), and MultiMediaCard™ (MMC) families. + + USB224x is a flash media card reader solution fully compliant with the + USB 2.0 specification + +maintainers: + - Piyush Mehta + +properties: + compatible: + const: microchip,usb2244 + + reset-gpios: + maxItems: 1 + description: + The phandle and specifier for the GPIO that controls the RESET line of + flash media controller. + +required: + - compatible + +additionalProperties: false + +examples: + - | + #include + + usb { + compatible = "microchip,usb2244"; + reset-gpios = <&gpio 2 GPIO_ACTIVE_LOW>; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/usb/snps,dwc3.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/usb/snps,dwc3.yaml @@ -366,6 +366,13 @@ minimum: 1 maximum: 16 + snps,xhci-reset-on-resume: + description: + When set, xhci host will reset the host controller on resume from + suspend. Some controllers might lose power during suspend, so host + require re-initialization. + type: boolean + snps,rx-thr-num-pkt-prd: description: Periodic ESS RX packet threshold count (host mode only). Set this and --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/usb/ulpi-phy.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/usb/ulpi-phy.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/ulpi-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ULPI PHY- Generic platform + +maintainers: + - Piyush Mehta + +properties: + compatible: + const: ulpi-phy + + reg: + maxItems: 1 + + '#phy-cells': + const: 0 + + external-drv-vbus: + description: + If present, configure ulpi-phy external supply to drive 5V on VBus. + type: boolean + + view-port: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Address to read and write PHY registers with explicit control of + the address and data using the usb.VIEWPORT register. + +required: + - compatible + - reg + - view-port + +additionalProperties: false + +examples: + - | + phy0@e0002000 { + compatible = "ulpi-phy"; + #phy-cells = <0x00>; + reg = <0xe0002000 0x1000>; + view-port = <0x170>; + external-drv-vbus; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/usb/usb-xhci.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/usb/usb-xhci.yaml @@ -21,6 +21,13 @@ description: Determines if platform is USB3 LPM capable type: boolean + snps,xhci-reset-on-resume: + description: + When set, xhci host will reset the host controller on resume from + suspend. Some controllers might lose power during suspend, so host + require re-initialization. + type: boolean + quirk-broken-port-ped: description: Set if the controller has broken port disable mechanism type: boolean --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -957,6 +957,8 @@ description: National Semiconductor "^nec,.*": description: NEC LCD Technologies, Ltd. + "^neofidelity,.*": + description: Neofidelity Inc. "^neonode,.*": description: Neonode Inc. "^netgear,.*": --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/xlnx,ctrl-fb.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/xlnx,ctrl-fb.txt @@ -0,0 +1,22 @@ +The Xilinx framebuffer DMA engine supports two soft IP blocks: one IP +block is used for reading video frame data from memory (FB Read) to the device +and the other IP block is used for writing video frame data from the device +to memory (FB Write). Both the FB Read/Write IP blocks are aware of the +format of the data being written to or read from memory including RGB and +YUV in packed, planar, and semi-planar formats. Because the FB Read/Write +is format aware, only one buffer pointer is needed by the IP blocks even +when planar or semi-planar format are used. + +Required properties: + - compatible: Should be "xlnx,ctrl-fbwr-1.0" for framebuffer Write OR + "xlnx,ctrl-fbrd-1.0" for framebuffer Read. + - reg: Base address and size of the IP core. + - reset-gpios: gpio to reset the framebuffer IP + +Example: + + fbwr@0xa0000000 { + compatible = "xlnx,ctrl-fbwr-1.0"; + reg = <0x0 0xa0000000 0x0 0x10000>; + reset-gpios = <&gpio 82 1>; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/bindings/xlnx,ctrl-vpss.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/bindings/xlnx,ctrl-vpss.txt @@ -0,0 +1,21 @@ +The Xilinx VPSS Scaler is a Video IP that supports up scaling, down scaling and +no scaling functionailty along with color space conversion. This supports custom +resolution values between 0 to 4096. + +Required properties: + +- compatible: Must be "xlnx,ctrl-xvpss-1.0". +- reg: Base address and size of the IP core. +- reset-gpios: gpio to reset the framebuffer IP +- xlnx,vpss-taps: number of taps +- xlnx,vpss-ppc: pixels per clock + +Example: + + ctrlvpss: vpss@0xa0200000 { + compatible = "xlnx,ctrl-xvpss-1.0"; + reg = <0x0 0xa0200000 0x0 0x30000>; + reset-gpios = <&gpio 80 1>; + xlnx,vpss-taps = <6>; + xlnx,vpss-ppc = <2>; + }; --- linux-xilinx-6.8.0.orig/Documentation/devicetree/configfs-overlays.txt +++ linux-xilinx-6.8.0/Documentation/devicetree/configfs-overlays.txt @@ -0,0 +1,31 @@ +Howto use the configfs overlay interface. + +A device-tree configfs entry is created in /config/device-tree/overlays +and and it is manipulated using standard file system I/O. +Note that this is a debug level interface, for use by developers and +not necessarily something accessed by normal users due to the +security implications of having direct access to the kernel's device tree. + +* To create an overlay you mkdir the directory: + + # mkdir /config/device-tree/overlays/foo + +* Either you echo the overlay firmware file to the path property file. + + # echo foo.dtbo >/config/device-tree/overlays/foo/path + +* Or you cat the contents of the overlay to the dtbo file + + # cat foo.dtbo >/config/device-tree/overlays/foo/dtbo + +The overlay file will be applied, and devices will be created/destroyed +as required. + +To remove it simply rmdir the directory. + + # rmdir /config/device-tree/overlays/foo + +The rationalle of the dual interface (firmware & direct copy) is that each is +better suited to different use patterns. The firmware interface is what's +intended to be used by hardware managers in the kernel, while the copy interface +make sense for developers (since it avoids problems with namespaces). --- linux-xilinx-6.8.0.orig/Documentation/driver-api/crypto/iaa/iaa-crypto.rst +++ linux-xilinx-6.8.0/Documentation/driver-api/crypto/iaa/iaa-crypto.rst @@ -270,7 +270,7 @@ echo async_irq > /sys/bus/dsa/drivers/crypto/sync_mode Async mode without interrupts (caller must poll) can be enabled by - writing 'async' to it:: + writing 'async' to it (please see Caveat):: echo async > /sys/bus/dsa/drivers/crypto/sync_mode @@ -281,6 +281,13 @@ The default mode is 'sync'. + Caveat: since the only mechanism that iaa_crypto currently implements + for async polling without interrupts is via the 'sync' mode as + described earlier, writing 'async' to + '/sys/bus/dsa/drivers/crypto/sync_mode' will internally enable the + 'sync' mode. This is to ensure correct iaa_crypto behavior until true + async polling without interrupts is enabled in iaa_crypto. + .. _iaa_default_config: IAA Default Configuration --- linux-xilinx-6.8.0.orig/Documentation/driver-api/dpll.rst +++ linux-xilinx-6.8.0/Documentation/driver-api/dpll.rst @@ -214,6 +214,27 @@ divided with ``DPLL_PIN_PHASE_OFFSET_DIVIDER`` to get integer part and modulo divided to get fractional part. +Embedded SYNC +============= + +Device may provide ability to use Embedded SYNC feature. It allows +to embed additional SYNC signal into the base frequency of a pin - a one +special pulse of base frequency signal every time SYNC signal pulse +happens. The user can configure the frequency of Embedded SYNC. +The Embedded SYNC capability is always related to a given base frequency +and HW capabilities. The user is provided a range of Embedded SYNC +frequencies supported, depending on current base frequency configured for +the pin. + + ========================================= ================================= + ``DPLL_A_PIN_ESYNC_FREQUENCY`` current Embedded SYNC frequency + ``DPLL_A_PIN_ESYNC_FREQUENCY_SUPPORTED`` nest available Embedded SYNC + frequency ranges + ``DPLL_A_PIN_FREQUENCY_MIN`` attr minimum value of frequency + ``DPLL_A_PIN_FREQUENCY_MAX`` attr maximum value of frequency + ``DPLL_A_PIN_ESYNC_PULSE`` pulse type of Embedded SYNC + ========================================= ================================= + Configuration commands group ============================ --- linux-xilinx-6.8.0.orig/Documentation/driver-api/fpga/fpga-bridge.rst +++ linux-xilinx-6.8.0/Documentation/driver-api/fpga/fpga-bridge.rst @@ -6,9 +6,12 @@ * struct fpga_bridge - The FPGA Bridge structure * struct fpga_bridge_ops - Low level Bridge driver ops -* fpga_bridge_register() - Create and register a bridge +* __fpga_bridge_register() - Create and register a bridge * fpga_bridge_unregister() - Unregister a bridge +The helper macro ``fpga_bridge_register()`` automatically sets +the module that registers the FPGA bridge as the owner. + .. kernel-doc:: include/linux/fpga/fpga-bridge.h :functions: fpga_bridge @@ -16,7 +19,7 @@ :functions: fpga_bridge_ops .. kernel-doc:: drivers/fpga/fpga-bridge.c - :functions: fpga_bridge_register + :functions: __fpga_bridge_register .. kernel-doc:: drivers/fpga/fpga-bridge.c :functions: fpga_bridge_unregister --- linux-xilinx-6.8.0.orig/Documentation/driver-api/fpga/fpga-mgr.rst +++ linux-xilinx-6.8.0/Documentation/driver-api/fpga/fpga-mgr.rst @@ -24,7 +24,8 @@ -------------------------------- To add another FPGA manager, write a driver that implements a set of ops. The -probe function calls fpga_mgr_register() or fpga_mgr_register_full(), such as:: +probe function calls ``fpga_mgr_register()`` or ``fpga_mgr_register_full()``, +such as:: static const struct fpga_manager_ops socfpga_fpga_ops = { .write_init = socfpga_fpga_ops_configure_init, @@ -69,10 +70,11 @@ } Alternatively, the probe function could call one of the resource managed -register functions, devm_fpga_mgr_register() or devm_fpga_mgr_register_full(). -When these functions are used, the parameter syntax is the same, but the call -to fpga_mgr_unregister() should be removed. In the above example, the -socfpga_fpga_remove() function would not be required. +register functions, ``devm_fpga_mgr_register()`` or +``devm_fpga_mgr_register_full()``. When these functions are used, the +parameter syntax is the same, but the call to ``fpga_mgr_unregister()`` should be +removed. In the above example, the ``socfpga_fpga_remove()`` function would not be +required. The ops will implement whatever device specific register writes are needed to do the programming sequence for this particular FPGA. These ops return 0 for @@ -125,15 +127,19 @@ * struct fpga_manager - the FPGA manager struct * struct fpga_manager_ops - Low level FPGA manager driver ops * struct fpga_manager_info - Parameter structure for fpga_mgr_register_full() -* fpga_mgr_register_full() - Create and register an FPGA manager using the +* __fpga_mgr_register_full() - Create and register an FPGA manager using the fpga_mgr_info structure to provide the full flexibility of options -* fpga_mgr_register() - Create and register an FPGA manager using standard +* __fpga_mgr_register() - Create and register an FPGA manager using standard arguments -* devm_fpga_mgr_register_full() - Resource managed version of - fpga_mgr_register_full() -* devm_fpga_mgr_register() - Resource managed version of fpga_mgr_register() +* __devm_fpga_mgr_register_full() - Resource managed version of + __fpga_mgr_register_full() +* __devm_fpga_mgr_register() - Resource managed version of __fpga_mgr_register() * fpga_mgr_unregister() - Unregister an FPGA manager +Helper macros ``fpga_mgr_register_full()``, ``fpga_mgr_register()``, +``devm_fpga_mgr_register_full()``, and ``devm_fpga_mgr_register()`` are available +to ease the registration. + .. kernel-doc:: include/linux/fpga/fpga-mgr.h :functions: fpga_mgr_states @@ -147,16 +153,16 @@ :functions: fpga_manager_info .. kernel-doc:: drivers/fpga/fpga-mgr.c - :functions: fpga_mgr_register_full + :functions: __fpga_mgr_register_full .. kernel-doc:: drivers/fpga/fpga-mgr.c - :functions: fpga_mgr_register + :functions: __fpga_mgr_register .. kernel-doc:: drivers/fpga/fpga-mgr.c - :functions: devm_fpga_mgr_register_full + :functions: __devm_fpga_mgr_register_full .. kernel-doc:: drivers/fpga/fpga-mgr.c - :functions: devm_fpga_mgr_register + :functions: __devm_fpga_mgr_register .. kernel-doc:: drivers/fpga/fpga-mgr.c :functions: fpga_mgr_unregister --- linux-xilinx-6.8.0.orig/Documentation/driver-api/fpga/fpga-region.rst +++ linux-xilinx-6.8.0/Documentation/driver-api/fpga/fpga-region.rst @@ -46,13 +46,16 @@ ---------------------------- * struct fpga_region - The FPGA region struct -* struct fpga_region_info - Parameter structure for fpga_region_register_full() -* fpga_region_register_full() - Create and register an FPGA region using the +* struct fpga_region_info - Parameter structure for __fpga_region_register_full() +* __fpga_region_register_full() - Create and register an FPGA region using the fpga_region_info structure to provide the full flexibility of options -* fpga_region_register() - Create and register an FPGA region using standard +* __fpga_region_register() - Create and register an FPGA region using standard arguments * fpga_region_unregister() - Unregister an FPGA region +Helper macros ``fpga_region_register()`` and ``fpga_region_register_full()`` +automatically set the module that registers the FPGA region as the owner. + The FPGA region's probe function will need to get a reference to the FPGA Manager it will be using to do the programming. This usually would happen during the region's probe function. @@ -82,10 +85,10 @@ :functions: fpga_region_info .. kernel-doc:: drivers/fpga/fpga-region.c - :functions: fpga_region_register_full + :functions: __fpga_region_register_full .. kernel-doc:: drivers/fpga/fpga-region.c - :functions: fpga_region_register + :functions: __fpga_region_register .. kernel-doc:: drivers/fpga/fpga-region.c :functions: fpga_region_unregister --- linux-xilinx-6.8.0.orig/Documentation/driver-api/ipmi.rst +++ linux-xilinx-6.8.0/Documentation/driver-api/ipmi.rst @@ -540,7 +540,7 @@ alerts_broken The addresses are normal I2C addresses. The adapter is the string -name of the adapter, as shown in /sys/class/i2c-adapter/i2c-/name. +name of the adapter, as shown in /sys/bus/i2c/devices/i2c-/name. It is *NOT* i2c- itself. Also, the comparison is done ignoring spaces, so if the name is "This is an I2C chip" you can say adapter_name=ThisisanI2cchip. This is because it's hard to pass in --- linux-xilinx-6.8.0.orig/Documentation/driver-api/soundwire/stream.rst +++ linux-xilinx-6.8.0/Documentation/driver-api/soundwire/stream.rst @@ -324,12 +324,12 @@ int sdw_stream_add_master(struct sdw_bus * bus, struct sdw_stream_config * stream_config, - struct sdw_ports_config * ports_config, + const struct sdw_ports_config * ports_config, struct sdw_stream_runtime * stream); int sdw_stream_add_slave(struct sdw_slave * slave, struct sdw_stream_config * stream_config, - struct sdw_ports_config * ports_config, + const struct sdw_ports_config * ports_config, struct sdw_stream_runtime * stream); --- linux-xilinx-6.8.0.orig/Documentation/filesystems/f2fs.rst +++ linux-xilinx-6.8.0/Documentation/filesystems/f2fs.rst @@ -126,9 +126,7 @@ discard/nodiscard Enable/disable real-time discard in f2fs, if discard is enabled, f2fs will issue discard/TRIM commands when a segment is cleaned. -no_heap Disable heap-style segment allocation which finds free - segments for data from the beginning of main area, while - for node from the end of main area. +heap/no_heap Deprecated. nouser_xattr Disable Extended User Attributes. Note: xattr is enabled by default if CONFIG_F2FS_FS_XATTR is selected. noacl Disable POSIX Access Control List. Note: acl is enabled @@ -228,8 +226,6 @@ option for more randomness. Please, use these options for your experiments and we strongly recommend to re-format the filesystem after using these options. -io_bits=%u Set the bit size of write IO requests. It should be set - with "mode=lfs". usrquota Enable plain user disk quota accounting. grpquota Enable plain group disk quota accounting. prjquota Enable plain project quota accounting. --- linux-xilinx-6.8.0.orig/Documentation/filesystems/mount_api.rst +++ linux-xilinx-6.8.0/Documentation/filesystems/mount_api.rst @@ -645,6 +645,8 @@ fs_param_is_blockdev Blockdev path * Needs lookup fs_param_is_path Path * Needs lookup fs_param_is_fd File descriptor result->int_32 + fs_param_is_uid User ID (u32) result->uid + fs_param_is_gid Group ID (u32) result->gid ======================= ======================= ===================== Note that if the value is of fs_param_is_bool type, fs_parse() will try @@ -678,6 +680,8 @@ fsparam_bdev() fs_param_is_blockdev fsparam_path() fs_param_is_path fsparam_fd() fs_param_is_fd + fsparam_uid() fs_param_is_uid + fsparam_gid() fs_param_is_gid ======================= =============================================== all of which take two arguments, name string and option number - for @@ -766,7 +770,8 @@ * :: - bool fs_validate_description(const struct fs_parameter_description *desc); + bool fs_validate_description(const char *name, + const struct fs_parameter_description *desc); This performs some validation checks on a parameter description. It returns true if the description is good and false if it is not. It will @@ -784,8 +789,9 @@ option number (which it returns). If successful, and if the parameter type indicates the result is a - boolean, integer or enum type, the value is converted by this function and - the result stored in result->{boolean,int_32,uint_32,uint_64}. + boolean, integer, enum, uid, or gid type, the value is converted by this + function and the result stored in + result->{boolean,int_32,uint_32,uint_64,uid,gid}. If a match isn't initially made, the key is prefixed with "no" and no value is present then an attempt will be made to look up the key with the --- linux-xilinx-6.8.0.orig/Documentation/gpu/drm-kms-helpers.rst +++ linux-xilinx-6.8.0/Documentation/gpu/drm-kms-helpers.rst @@ -224,6 +224,9 @@ .. kernel-doc:: drivers/gpu/drm/drm_panel_orientation_quirks.c :export: +.. kernel-doc:: drivers/gpu/drm/drm_panel_backlight_quirks.c + :export: + Panel Self Refresh Helper Reference =================================== --- linux-xilinx-6.8.0.orig/Documentation/hwmon/corsair-psu.rst +++ linux-xilinx-6.8.0/Documentation/hwmon/corsair-psu.rst @@ -15,11 +15,11 @@ Corsair HX850i - Corsair HX1000i (Series 2022 and 2023) + Corsair HX1000i (Legacy and Series 2023) - Corsair HX1200i + Corsair HX1200i (Legacy and Series 2023) - Corsair HX1500i (Series 2022 and 2023) + Corsair HX1500i (Legacy and Series 2023) Corsair RM550i --- linux-xilinx-6.8.0.orig/Documentation/i2c/busses/i2c-i801.rst +++ linux-xilinx-6.8.0/Documentation/i2c/busses/i2c-i801.rst @@ -48,6 +48,8 @@ * Intel Raptor Lake (PCH) * Intel Meteor Lake (SOC and PCH) * Intel Birch Stream (SOC) + * Intel Arrow Lake (SOC) + * Intel Panther Lake (SOC) Datasheets: Publicly available at the Intel website --- linux-xilinx-6.8.0.orig/Documentation/kbuild/modules.rst +++ linux-xilinx-6.8.0/Documentation/kbuild/modules.rst @@ -128,7 +128,7 @@ modules_install Install the external module(s). The default location is - /lib/modules//extra/, but a prefix may + /lib/modules//updates/, but a prefix may be added with INSTALL_MOD_PATH (discussed in section 5). clean @@ -417,7 +417,7 @@ And external modules are installed in: - /lib/modules/$(KERNELRELEASE)/extra/ + /lib/modules/$(KERNELRELEASE)/updates/ 5.1 INSTALL_MOD_PATH -------------------- @@ -438,10 +438,10 @@ ------------------- External modules are by default installed to a directory under - /lib/modules/$(KERNELRELEASE)/extra/, but you may wish to + /lib/modules/$(KERNELRELEASE)/updates/, but you may wish to locate modules for a specific functionality in a separate directory. For this purpose, use INSTALL_MOD_DIR to specify an - alternative name to "extra.":: + alternative name to "updates.":: $ make INSTALL_MOD_DIR=gandalf -C $KDIR \ M=$PWD modules_install --- linux-xilinx-6.8.0.orig/Documentation/locking/hwspinlock.rst +++ linux-xilinx-6.8.0/Documentation/locking/hwspinlock.rst @@ -87,6 +87,17 @@ :: + int hwspin_lock_bust(struct hwspinlock *hwlock, unsigned int id); + +After verifying the owner of the hwspinlock, release a previously acquired +hwspinlock; returns 0 on success, or an appropriate error code on failure +(e.g. -EOPNOTSUPP if the bust operation is not defined for the specific +hwspinlock). + +Should be called from a process context (might sleep). + +:: + int hwspin_lock_timeout(struct hwspinlock *hwlock, unsigned int timeout); Lock a previously-assigned hwspinlock with a timeout limit (specified in --- linux-xilinx-6.8.0.orig/Documentation/locking/seqlock.rst +++ linux-xilinx-6.8.0/Documentation/locking/seqlock.rst @@ -153,7 +153,7 @@ from interruption by readers. This is typically the case when the read side can be invoked from NMI handlers. -Check `raw_write_seqcount_latch()` for more information. +Check `write_seqcount_latch()` for more information. .. _seqlock_t: --- linux-xilinx-6.8.0.orig/Documentation/misc-devices/xilinx_sdfec.rst +++ linux-xilinx-6.8.0/Documentation/misc-devices/xilinx_sdfec.rst @@ -29,7 +29,7 @@ - Does not support shared LDPC code table wraparound The device tree entry is described in: -`linux-xlnx/Documentation/devicetree/bindings/misc/xlnx,sd-fec.txt `_ +`linux-xlnx/Documentation/devicetree/bindings/misc/xlnx,sd-fec.yaml `_ Modes of Operation --- linux-xilinx-6.8.0.orig/Documentation/mm/arch_pgtable_helpers.rst +++ linux-xilinx-6.8.0/Documentation/mm/arch_pgtable_helpers.rst @@ -140,7 +140,8 @@ +---------------------------+--------------------------------------------------+ | pmd_swp_clear_soft_dirty | Clears a soft dirty swapped PMD | +---------------------------+--------------------------------------------------+ -| pmd_mkinvalid | Invalidates a mapped PMD [1] | +| pmd_mkinvalid | Invalidates a present PMD; do not call for | +| | non-present PMD [1] | +---------------------------+--------------------------------------------------+ | pmd_set_huge | Creates a PMD huge mapping | +---------------------------+--------------------------------------------------+ @@ -196,7 +197,8 @@ +---------------------------+--------------------------------------------------+ | pud_mkdevmap | Creates a ZONE_DEVICE mapped PUD | +---------------------------+--------------------------------------------------+ -| pud_mkinvalid | Invalidates a mapped PUD [1] | +| pud_mkinvalid | Invalidates a present PUD; do not call for | +| | non-present PUD [1] | +---------------------------+--------------------------------------------------+ | pud_set_huge | Creates a PUD huge mapping | +---------------------------+--------------------------------------------------+ --- linux-xilinx-6.8.0.orig/Documentation/mm/page_table_check.rst +++ linux-xilinx-6.8.0/Documentation/mm/page_table_check.rst @@ -14,7 +14,7 @@ accessible from the userspace by getting their page table entries (PTEs PMDs etc.) added into the table. -In case of detected corruption, the kernel is crashed. There is a small +In case of most detected corruption, the kernel is crashed. There is a small performance and memory overhead associated with the page table check. Therefore, it is disabled by default, but can be optionally enabled on systems where the extra hardening outweighs the performance costs. Also, because page table check @@ -22,6 +22,13 @@ by crashing kernel at the time wrong mapping occurs instead of later which is often the case with memory corruptions bugs. +It can also be used to do page table entry checks over various flags, dump +warnings when illegal combinations of entry flags are detected. Currently, +userfaultfd is the only user of such to sanity check wr-protect bit against +any writable flags. Illegal flag combinations will not directly cause data +corruption in this case immediately, but that will cause read-only data to +be writable, leading to corrupt when the page content is later modified. + Double mapping detection logic ============================== --- linux-xilinx-6.8.0.orig/Documentation/netlink/specs/devlink.yaml +++ linux-xilinx-6.8.0/Documentation/netlink/specs/devlink.yaml @@ -290,7 +290,7 @@ enum: eswitch-mode - name: eswitch-inline-mode - type: u16 + type: u8 enum: eswitch-inline-mode - name: dpipe-tables --- linux-xilinx-6.8.0.orig/Documentation/netlink/specs/dpll.yaml +++ linux-xilinx-6.8.0/Documentation/netlink/specs/dpll.yaml @@ -274,6 +274,7 @@ - name: capabilities type: u32 + enum: pin-capabilities - name: parent-device type: nest @@ -306,6 +307,26 @@ Value is in PPM (parts per million). This may be implemented for example for pin of type PIN_TYPE_SYNCE_ETH_PORT. + - + name: esync-frequency + type: u64 + doc: | + Frequency of Embedded SYNC signal. If provided, the pin is configured + with a SYNC signal embedded into its base clock frequency. + - + name: esync-frequency-supported + type: nest + multi-attr: true + nested-attributes: frequency-range + doc: | + If provided a pin is capable of embedding a SYNC signal (within given + range) into its base frequency signal. + - + name: esync-pulse + type: u32 + doc: | + A ratio of high to low state of a SYNC signal pulse embedded + into base clock frequency. Value is in percents. - name: pin-parent-device subset-of: pin @@ -469,6 +490,9 @@ - phase-adjust-max - phase-adjust - fractional-frequency-offset + - esync-frequency + - esync-frequency-supported + - esync-pulse dump: request: @@ -495,6 +519,7 @@ - parent-device - parent-pin - phase-adjust + - esync-frequency - name: pin-create-ntf doc: Notification about pin appearing --- linux-xilinx-6.8.0.orig/Documentation/netlink/specs/ethtool.yaml +++ linux-xilinx-6.8.0/Documentation/netlink/specs/ethtool.yaml @@ -64,7 +64,12 @@ name: bits type: nest nested-attributes: bitset-bits - + - + name: value + type: binary + - + name: mask + type: binary - name: string attributes: @@ -1594,6 +1599,7 @@ request: attributes: - header + - context reply: attributes: - header @@ -1602,7 +1608,6 @@ - indir - hkey - input_xfrm - dump: *rss-get-op - name: plca-get-cfg doc: Get PLCA params. --- linux-xilinx-6.8.0.orig/Documentation/netlink/specs/mptcp_pm.yaml +++ linux-xilinx-6.8.0/Documentation/netlink/specs/mptcp_pm.yaml @@ -109,7 +109,6 @@ - name: port type: u16 - byte-order: big-endian - name: flags type: u32 @@ -294,7 +293,6 @@ doc: Get endpoint information attribute-set: endpoint dont-validate: [ strict ] - flags: [ uns-admin-perm ] do: &get-addr-attrs request: attributes: --- linux-xilinx-6.8.0.orig/Documentation/netlink/specs/rt_link.yaml +++ linux-xilinx-6.8.0/Documentation/netlink/specs/rt_link.yaml @@ -1144,6 +1144,12 @@ - name: mcast-querier-state type: binary + - + name: fdb-n-learned + type: u32 + - + name: fdb-max-learned + type: u32 - name: linkinfo-brport-attrs name-prefix: ifla-brport- --- linux-xilinx-6.8.0.orig/Documentation/networking/device_drivers/wwan/t7xx.rst +++ linux-xilinx-6.8.0/Documentation/networking/device_drivers/wwan/t7xx.rst @@ -39,6 +39,34 @@ - open the AT control channel using a UART tool or a special user tool +Sysfs +===== +The driver provides sysfs interfaces to userspace. + +t7xx_mode +--------- +The sysfs interface provides userspace with access to the device mode, this interface +supports read and write operations. + +Device mode: + +- ``unknown`` represents that device in unknown status +- ``ready`` represents that device in ready status +- ``reset`` represents that device in reset status +- ``fastboot_switching`` represents that device in fastboot switching status +- ``fastboot_download`` represents that device in fastboot download status +- ``fastboot_dump`` represents that device in fastboot dump status + +Read from userspace to get the current device mode. + +:: + $ cat /sys/bus/pci/devices/${bdf}/t7xx_mode + +Write from userspace to set the device mode. + +:: + $ echo fastboot_switching > /sys/bus/pci/devices/${bdf}/t7xx_mode + Management application development ================================== The driver and userspace interfaces are described below. The MBIM protocol is @@ -97,6 +125,20 @@ The userspace end of the control port is a /dev/wwan0at0 character device. Application shall use this interface to issue AT commands. +fastboot port userspace ABI +--------------------------- + +/dev/wwan0fastboot0 character device +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +The driver exposes a fastboot protocol interface by implementing +fastboot WWAN Port. The userspace end of the fastboot channel pipe is a +/dev/wwan0fastboot0 character device. Application shall use this interface for +fastboot protocol communication. + +Please note that driver needs to be reloaded to export /dev/wwan0fastboot0 +port, because device needs a cold reset after enter ``fastboot_switching`` +mode. + The MediaTek's T700 modem supports the 3GPP TS 27.007 [4] specification. References @@ -118,3 +160,7 @@ [4] *Specification # 27.007 - 3GPP* - https://www.3gpp.org/DynaReport/27007.htm + +[5] *fastboot "a mechanism for communicating with bootloaders"* + +- https://android.googlesource.com/platform/system/core/+/refs/heads/main/fastboot/README.md --- linux-xilinx-6.8.0.orig/Documentation/networking/ethtool-netlink.rst +++ linux-xilinx-6.8.0/Documentation/networking/ethtool-netlink.rst @@ -1771,6 +1771,7 @@ ===================================== ====== ========================== ``ETHTOOL_A_RSS_HEADER`` nested reply header + ``ETHTOOL_A_RSS_CONTEXT`` u32 context number ``ETHTOOL_A_RSS_HFUNC`` u32 RSS hash func ``ETHTOOL_A_RSS_INDIR`` binary Indir table bytes ``ETHTOOL_A_RSS_HKEY`` binary Hash key bytes --- linux-xilinx-6.8.0.orig/Documentation/networking/j1939.rst +++ linux-xilinx-6.8.0/Documentation/networking/j1939.rst @@ -121,7 +121,7 @@ On the other hand, when using PDU1 format, the PS-field contains a so-called Destination Address, which is _not_ part of the PGN. When communicating a PGN -from user space to kernel (or vice versa) and PDU2 format is used, the PS-field +from user space to kernel (or vice versa) and PDU1 format is used, the PS-field of the PGN shall be set to zero. The Destination Address shall be set elsewhere. --- linux-xilinx-6.8.0.orig/Documentation/networking/net_cachelines/net_device.rst +++ linux-xilinx-6.8.0/Documentation/networking/net_cachelines/net_device.rst @@ -13,7 +13,7 @@ unsigned_long mem_end unsigned_long mem_start unsigned_long base_addr -unsigned_long state +unsigned_long state read_mostly read_mostly netif_running(dev) struct_list_head dev_list struct_list_head napi_list struct_list_head unreg_list @@ -98,7 +98,7 @@ unsigned_int real_num_rx_queues - read_mostly get_rps_cpu struct_bpf_prog* xdp_prog - read_mostly netif_elide_gro() unsigned_long gro_flush_timeout - read_mostly napi_complete_done -int napi_defer_hard_irqs - read_mostly napi_complete_done +u32 napi_defer_hard_irqs - read_mostly napi_complete_done unsigned_int gro_max_size - read_mostly skb_gro_receive unsigned_int gro_ipv4_max_size - read_mostly skb_gro_receive rx_handler_func_t* rx_handler read_mostly - __netif_receive_skb_core --- linux-xilinx-6.8.0.orig/Documentation/networking/sfp-phylink.rst +++ linux-xilinx-6.8.0/Documentation/networking/sfp-phylink.rst @@ -207,6 +207,11 @@ capabilities for ``interface`` to determine the allowable ethtool link modes. + The :c:func:`validate` method should mask the supplied supported mask, + and ``state->advertising`` with the supported ethtool link modes. + These are the new ethtool link modes, so bitmask operations must be + used. For an example, see ``drivers/net/ethernet/marvell/mvneta.c``. + The :c:func:`mac_link_state` method is used to read the link state from the MAC, and report back the settings that the MAC is currently using. This is particularly important for in-band negotiation --- linux-xilinx-6.8.0.orig/Documentation/networking/strparser.rst +++ linux-xilinx-6.8.0/Documentation/networking/strparser.rst @@ -112,7 +112,7 @@ Callbacks ========= -There are six callbacks: +There are seven callbacks: :: @@ -184,6 +184,13 @@ :: + int (*read_sock)(struct strparser *strp, read_descriptor_t *desc, + sk_read_actor_t recv_actor); + + The read_sock callback is used by strparser instead of + sock->ops->read_sock, if provided. + :: + int (*read_sock_done)(struct strparser *strp, int err); read_sock_done is called when the stream parser is done reading --- linux-xilinx-6.8.0.orig/Documentation/networking/xsk-tx-metadata.rst +++ linux-xilinx-6.8.0/Documentation/networking/xsk-tx-metadata.rst @@ -11,12 +11,16 @@ General Design ============== -The headroom for the metadata is reserved via ``tx_metadata_len`` in -``struct xdp_umem_reg``. The metadata length is therefore the same for -every socket that shares the same umem. The metadata layout is a fixed UAPI, -refer to ``union xsk_tx_metadata`` in ``include/uapi/linux/if_xdp.h``. -Thus, generally, the ``tx_metadata_len`` field above should contain -``sizeof(union xsk_tx_metadata)``. +The headroom for the metadata is reserved via ``tx_metadata_len`` and +``XDP_UMEM_TX_METADATA_LEN`` flag in ``struct xdp_umem_reg``. The metadata +length is therefore the same for every socket that shares the same umem. +The metadata layout is a fixed UAPI, refer to ``union xsk_tx_metadata`` in +``include/uapi/linux/if_xdp.h``. Thus, generally, the ``tx_metadata_len`` +field above should contain ``sizeof(union xsk_tx_metadata)``. + +Note that in the original implementation the ``XDP_UMEM_TX_METADATA_LEN`` +flag was not required. Applications might attempt to create a umem +with a flag first and if it fails, do another attempt without a flag. The headroom and the metadata itself should be located right before ``xdp_desc->addr`` in the umem frame. Within a frame, the metadata --- linux-xilinx-6.8.0.orig/Documentation/power/runtime_pm.rst +++ linux-xilinx-6.8.0/Documentation/power/runtime_pm.rst @@ -347,7 +347,9 @@ `int pm_runtime_resume_and_get(struct device *dev);` - run pm_runtime_resume(dev) and if successful, increment the device's - usage counter; return the result of pm_runtime_resume + usage counter; returns 0 on success (whether or not the device's + runtime PM status was already 'active') or the error code from + pm_runtime_resume() on failure. `int pm_request_idle(struct device *dev);` - submit a request to execute the subsystem-level idle callback for the @@ -396,10 +398,9 @@ nonzero, increment the counter and return 1; otherwise return 0 without changing the counter - `int pm_runtime_get_if_active(struct device *dev, bool ign_usage_count);` + `int pm_runtime_get_if_active(struct device *dev);` - return -EINVAL if 'power.disable_depth' is nonzero; otherwise, if the - runtime PM status is RPM_ACTIVE, and either ign_usage_count is true - or the device's usage_count is non-zero, increment the counter and + runtime PM status is RPM_ACTIVE, increment the counter and return 1; otherwise return 0 without changing the counter `void pm_runtime_put_noidle(struct device *dev);` --- linux-xilinx-6.8.0.orig/Documentation/process/changes.rst +++ linux-xilinx-6.8.0/Documentation/process/changes.rst @@ -31,7 +31,7 @@ ====================== =============== ======================================== GNU C 5.1 gcc --version Clang/LLVM (optional) 11.0.0 clang --version -Rust (optional) 1.74.1 rustc --version +Rust (optional) 1.75.0 rustc --version bindgen (optional) 0.65.1 bindgen --version GNU make 3.82 make --version bash 4.2 bash --version --- linux-xilinx-6.8.0.orig/Documentation/sphinx/cdomain.py +++ linux-xilinx-6.8.0/Documentation/sphinx/cdomain.py @@ -37,12 +37,29 @@ import sphinx from sphinx import addnodes -from sphinx.domains.c import c_funcptr_sig_re, c_sig_re from sphinx.domains.c import CObject as Base_CObject from sphinx.domains.c import CDomain as Base_CDomain from itertools import chain import re +# fixes https://github.com/sphinx-doc/sphinx/commit/0f49e30c51b5cc5055cda5b4b294c2dd9d1df573#r38750737 + +# pylint: disable=invalid-name +c_sig_re = re.compile( + r'''^([^(]*?) # return type + ([\w:.]+) \s* # thing name (colon allowed for C++) + (?: \((.*)\) )? # optionally arguments + (\s+const)? $ # const specifier + ''', re.VERBOSE) + +c_funcptr_sig_re = re.compile( + r'''^([^(]+?) # return type + (\( [^()]+ \)) \s* # name in parentheses + \( (.*) \) # arguments + (\s+const)? $ # const specifier + ''', re.VERBOSE) +# pylint: enable=invalid-name + __version__ = '1.1' # Get Sphinx version --- linux-xilinx-6.8.0.orig/Documentation/sphinx/kernel_include.py +++ linux-xilinx-6.8.0/Documentation/sphinx/kernel_include.py @@ -97,7 +97,6 @@ # HINT: this is the only line I had to change / commented out: #path = utils.relative_path(None, path) - path = nodes.reprunicode(path) encoding = self.options.get( 'encoding', self.state.document.settings.input_encoding) e_handler=self.state.document.settings.input_encoding_error_handler --- linux-xilinx-6.8.0.orig/Documentation/sphinx/kerneldoc.py +++ linux-xilinx-6.8.0/Documentation/sphinx/kerneldoc.py @@ -61,9 +61,9 @@ env = self.state.document.settings.env cmd = [env.config.kerneldoc_bin, '-rst', '-enable-lineno'] - # Pass the version string to kernel-doc, as it needs to use a different - # dialect, depending what the C domain supports for each specific - # Sphinx versions + # Pass the version string to kernel-doc, as it needs to use a different + # dialect, depending what the C domain supports for each specific + # Sphinx versions cmd += ['-sphinx-version', sphinx.__version__] filename = env.config.kerneldoc_srctree + '/' + self.arguments[0] --- linux-xilinx-6.8.0.orig/Documentation/userspace-api/media/mediactl/media-types.rst +++ linux-xilinx-6.8.0/Documentation/userspace-api/media/mediactl/media-types.rst @@ -375,12 +375,11 @@ are origins of links. * - ``MEDIA_PAD_FL_MUST_CONNECT`` - - If this flag is set and the pad is linked to any other pad, then - at least one of those links must be enabled for the entity to be - able to stream. There could be temporary reasons (e.g. device - configuration dependent) for the pad to need enabled links even - when this flag isn't set; the absence of the flag doesn't imply - there is none. + - If this flag is set, then for this pad to be able to stream, it must + be connected by at least one enabled link. There could be temporary + reasons (e.g. device configuration dependent) for the pad to need + enabled links even when this flag isn't set; the absence of the flag + doesn't imply there is none. One and only one of ``MEDIA_PAD_FL_SINK`` and ``MEDIA_PAD_FL_SOURCE`` --- linux-xilinx-6.8.0.orig/Documentation/userspace-api/media/v4l/biblio.rst +++ linux-xilinx-6.8.0/Documentation/userspace-api/media/v4l/biblio.rst @@ -436,3 +436,13 @@ :title: AV1 Bitstream & Decoding Process Specification :author: Peter de Rivaz, Argon Design Ltd, Jack Haughton, Argon Design Ltd + +.. _itu2100: + +ITU BT.2100 +=========== + + +:title: ITU-R Recommendation BT.2100-2 (07/2018) "Image parameter values for high dynamic range television for use in production and international programme exchange" + +:author: International Telecommunication Union (http://www.itu.int) --- linux-xilinx-6.8.0.orig/Documentation/userspace-api/media/v4l/colorspaces-defs.rst +++ linux-xilinx-6.8.0/Documentation/userspace-api/media/v4l/colorspaces-defs.rst @@ -99,6 +99,8 @@ - Use the DCI-P3 transfer function. * - ``V4L2_XFER_FUNC_SMPTE2084`` - Use the SMPTE 2084 transfer function. See :ref:`xf-smpte-2084`. + * - ``V4L2_XFER_FUNC_HLG`` + - Use the Hybrid Log Gamma(HLG) transfer function. See :ref:`xf-hlg`. --- linux-xilinx-6.8.0.orig/Documentation/userspace-api/media/v4l/colorspaces-details.rst +++ linux-xilinx-6.8.0/Documentation/userspace-api/media/v4l/colorspaces-details.rst @@ -773,3 +773,34 @@ There are better methods, see e.g. :ref:`colimg` for more in-depth information about this. + + +.. _xf-hlg: + +Transfer Function HLG (V4L2_XFER_FUNC_HLG) +======================================================= + +The :ref:`itu2100` defines the transfer function used. + +Constants: + +.. math:: + a = 0.17883277 + + b = 1 - 4 * a = 0.28466892 + + c = 0.5 - a * \ln (4 * a) = 0.55991073 + +Transfer function: + +.. math:: + + E' = \begin{cases}\sqrt(3 * E) & 0 \leq E \leq \frac{1}{12} + \\ a * \ln(12 * E - b) + c & \frac{1}{12} \le E \leq 1\end{cases} + +Inverse Transfer function: + +.. math:: + + x' =\begin{cases}x^{2} / 3 & 0 \leq x \leq \frac{1}{12} + \\(exp((x - c) / a) + b) / 12 & \frac{1}{12} \le x \leq 1\end{cases} --- linux-xilinx-6.8.0.orig/Documentation/userspace-api/media/v4l/subdev-formats.rst +++ linux-xilinx-6.8.0/Documentation/userspace-api/media/v4l/subdev-formats.rst @@ -1860,6 +1860,43 @@ - b\ :sub:`2` - b\ :sub:`1` - b\ :sub:`0` + * .. _MEDIA-BUS-FMT-RBG101010-1X30: + + - MEDIA_BUS_FMT_RBG101010_1X30 + - 0x1100 + - + - 0 + - 0 + - r\ :sub:`9` + - r\ :sub:`8` + - r\ :sub:`7` + - r\ :sub:`6` + - r\ :sub:`5` + - r\ :sub:`4` + - r\ :sub:`3` + - r\ :sub:`2` + - r\ :sub:`1` + - r\ :sub:`0` + - b\ :sub:`9` + - b\ :sub:`8` + - b\ :sub:`7` + - b\ :sub:`6` + - b\ :sub:`5` + - b\ :sub:`4` + - b\ :sub:`3` + - b\ :sub:`2` + - b\ :sub:`1` + - b\ :sub:`0` + - g\ :sub:`9` + - g\ :sub:`8` + - g\ :sub:`7` + - g\ :sub:`6` + - g\ :sub:`5` + - g\ :sub:`4` + - g\ :sub:`3` + - g\ :sub:`2` + - g\ :sub:`1` + - g\ :sub:`0` .. raw:: latex @@ -2049,6 +2086,47 @@ - b\ :sub:`2` - b\ :sub:`1` - b\ :sub:`0` + * .. _MEDIA-BUS-FMT-RBG121212-1X36: + + - MEDIA_BUS_FMT_RBG121212_1X36 + - 0x1101 + - + - r\ :sub:`11` + - r\ :sub:`10` + - r\ :sub:`9` + - r\ :sub:`8` + - r\ :sub:`7` + - r\ :sub:`6` + - r\ :sub:`5` + - r\ :sub:`4` + - r\ :sub:`3` + - r\ :sub:`2` + - r\ :sub:`1` + - r\ :sub:`0` + - b\ :sub:`11` + - b\ :sub:`10` + - b\ :sub:`9` + - b\ :sub:`8` + - b\ :sub:`7` + - b\ :sub:`6` + - b\ :sub:`5` + - b\ :sub:`4` + - b\ :sub:`3` + - b\ :sub:`2` + - b\ :sub:`1` + - b\ :sub:`0` + - g\ :sub:`11` + - g\ :sub:`10` + - g\ :sub:`9` + - g\ :sub:`8` + - g\ :sub:`7` + - g\ :sub:`6` + - g\ :sub:`5` + - g\ :sub:`4` + - g\ :sub:`3` + - g\ :sub:`2` + - g\ :sub:`1` + - g\ :sub:`0` .. raw:: latex @@ -2218,6 +2296,78 @@ - b\ :sub:`2` - b\ :sub:`1` - b\ :sub:`0` + * .. _MEDIA-BUS-FMT-RBG161616-1X48: + + - MEDIA_BUS_FMT_RBG161616_1X48 + - 0x1102 + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - r\ :sub:`15` + - r\ :sub:`14` + - r\ :sub:`13` + - r\ :sub:`12` + - r\ :sub:`11` + - r\ :sub:`10` + - r\ :sub:`9` + - r\ :sub:`8` + - r\ :sub:`7` + - r\ :sub:`6` + - r\ :sub:`5` + - r\ :sub:`4` + - r\ :sub:`3` + - r\ :sub:`2` + - r\ :sub:`1` + - r\ :sub:`0` + * - + - + - + - b\ :sub:`15` + - b\ :sub:`14` + - b\ :sub:`13` + - b\ :sub:`12` + - b\ :sub:`11` + - b\ :sub:`10` + - b\ :sub:`9` + - b\ :sub:`8` + - b\ :sub:`7` + - b\ :sub:`6` + - b\ :sub:`5` + - b\ :sub:`4` + - b\ :sub:`3` + - b\ :sub:`2` + - b\ :sub:`1` + - b\ :sub:`0` + - g\ :sub:`15` + - g\ :sub:`14` + - g\ :sub:`13` + - g\ :sub:`12` + - g\ :sub:`11` + - g\ :sub:`10` + - g\ :sub:`9` + - g\ :sub:`8` + - g\ :sub:`7` + - g\ :sub:`6` + - g\ :sub:`5` + - g\ :sub:`4` + - g\ :sub:`3` + - g\ :sub:`2` + - g\ :sub:`1` + - g\ :sub:`0` .. raw:: latex @@ -5598,6 +5748,148 @@ - u\ :sub:`2` - u\ :sub:`1` - u\ :sub:`0` + * .. _MEDIA-BUS-FMT-VYYUYY10_4X20: + + - MEDIA_BUS_FMT_VYYUYY10_4X20 + - 0x2101 + - + - + - + - + - + - + - + - + - + - + - + - + - + - u\ :sub:`9` + - u\ :sub:`8` + - u\ :sub:`7` + - u\ :sub:`6` + - u\ :sub:`5` + - u\ :sub:`4` + - u\ :sub:`3` + - u\ :sub:`2` + - u\ :sub:`1` + - u\ :sub:`0` + - y\ :sub:`9` + - y\ :sub:`8` + - y\ :sub:`7` + - y\ :sub:`6` + - y\ :sub:`5` + - y\ :sub:`4` + - y\ :sub:`3` + - y\ :sub:`2` + - y\ :sub:`1` + - y\ :sub:`0` + * - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - v\ :sub:`9` + - v\ :sub:`8` + - v\ :sub:`7` + - v\ :sub:`6` + - v\ :sub:`5` + - v\ :sub:`4` + - v\ :sub:`3` + - v\ :sub:`2` + - v\ :sub:`1` + - v\ :sub:`0` + - y\ :sub:`9` + - y\ :sub:`8` + - y\ :sub:`7` + - y\ :sub:`6` + - y\ :sub:`5` + - y\ :sub:`4` + - y\ :sub:`3` + - y\ :sub:`2` + - y\ :sub:`1` + - y\ :sub:`0` + * - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - y\ :sub:`9` + - y\ :sub:`8` + - y\ :sub:`7` + - y\ :sub:`6` + - y\ :sub:`5` + - y\ :sub:`4` + - y\ :sub:`3` + - y\ :sub:`2` + - y\ :sub:`1` + - y\ :sub:`0` + * - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - y\ :sub:`9` + - y\ :sub:`8` + - y\ :sub:`7` + - y\ :sub:`6` + - y\ :sub:`5` + - y\ :sub:`4` + - y\ :sub:`3` + - y\ :sub:`2` + - y\ :sub:`1` + - y\ :sub:`0` * .. _MEDIA-BUS-FMT-Y12-1X12: - MEDIA_BUS_FMT_Y12_1X12 @@ -7429,6 +7721,185 @@ - u\ :sub:`2` - u\ :sub:`1` - u\ :sub:`0` + * .. _MEDIA-BUS-FMT-UYYVYY12-4X24: + + - MEDIA_BUS_FMT_UYYVYY12_4X24 + - 0x2103 + - + - + - + - + - + - + - + - + - + - u\ :sub:`11` + - u\ :sub:`10` + - u\ :sub:`9` + - u\ :sub:`8` + - u\ :sub:`7` + - u\ :sub:`6` + - u\ :sub:`5` + - u\ :sub:`4` + - u\ :sub:`3` + - u\ :sub:`2` + - u\ :sub:`1` + - u\ :sub:`0` + - y\ :sub:`11` + - y\ :sub:`10` + - y\ :sub:`9` + - y\ :sub:`8` + - y\ :sub:`7` + - y\ :sub:`6` + - y\ :sub:`5` + - y\ :sub:`4` + - y\ :sub:`3` + - y\ :sub:`2` + - y\ :sub:`1` + - y\ :sub:`0` + * - + - + - + - + - + - + - + - + - + - + - + - v\ :sub:`11` + - v\ :sub:`10` + - v\ :sub:`9` + - v\ :sub:`8` + - v\ :sub:`7` + - v\ :sub:`6` + - v\ :sub:`5` + - v\ :sub:`4` + - v\ :sub:`3` + - v\ :sub:`2` + - v\ :sub:`1` + - v\ :sub:`0` + - y\ :sub:`11` + - y\ :sub:`10` + - y\ :sub:`9` + - y\ :sub:`8` + - y\ :sub:`7` + - y\ :sub:`6` + - y\ :sub:`5` + - y\ :sub:`4` + - y\ :sub:`3` + - y\ :sub:`2` + - y\ :sub:`1` + - y\ :sub:`0` + * - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - y\ :sub:`11` + - y\ :sub:`10` + - y\ :sub:`9` + - y\ :sub:`8` + - y\ :sub:`7` + - y\ :sub:`6` + - y\ :sub:`5` + - y\ :sub:`4` + - y\ :sub:`3` + - y\ :sub:`2` + - y\ :sub:`1` + - y\ :sub:`0` + * - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - y\ :sub:`11` + - y\ :sub:`10` + - y\ :sub:`9` + - y\ :sub:`8` + - y\ :sub:`7` + - y\ :sub:`6` + - y\ :sub:`5` + - y\ :sub:`4` + - y\ :sub:`3` + - y\ :sub:`2` + - y\ :sub:`1` + - y\ :sub:`0` + * .. _MEDIA-BUS-FMT-VYYUYY8-1X24: + + - MEDIA_BUS_FMT_VYYUYY8_1X24 + - 0x2100 + - + - + - + - + - + - + - + - + - + - v\ :sub:`3` + - v\ :sub:`2` + - v\ :sub:`1` + - v\ :sub:`0` + - y\ :sub:`7` + - y\ :sub:`6` + - y\ :sub:`5` + - y\ :sub:`4` + - y\ :sub:`3` + - y\ :sub:`2` + - y\ :sub:`1` + - y\ :sub:`0` + - u\ :sub:`3` + - u\ :sub:`2` + - u\ :sub:`1` + - u\ :sub:`0` + - y\ :sub:`7` + - y\ :sub:`6` + - y\ :sub:`5` + - y\ :sub:`4` + - y\ :sub:`3` + - y\ :sub:`2` + - y\ :sub:`1` + - y\ :sub:`0` * .. _MEDIA-BUS-FMT-YUV10-1X30: - MEDIA_BUS_FMT_YUV10_1X30 @@ -7466,6 +7937,43 @@ - v\ :sub:`2` - v\ :sub:`1` - v\ :sub:`0` + * .. _MEDIA-BUS-FMT-VUY10-1X30: + + - MEDIA_BUS_FMT_VUY10_1X30 + - 0x2102 + - + - + - + - v\ :sub:`9` + - v\ :sub:`8` + - v\ :sub:`7` + - v\ :sub:`6` + - v\ :sub:`5` + - v\ :sub:`4` + - v\ :sub:`3` + - v\ :sub:`2` + - v\ :sub:`1` + - v\ :sub:`0` + - u\ :sub:`9` + - u\ :sub:`8` + - u\ :sub:`7` + - u\ :sub:`6` + - u\ :sub:`5` + - u\ :sub:`4` + - u\ :sub:`3` + - u\ :sub:`2` + - u\ :sub:`1` + - u\ :sub:`0` + - y\ :sub:`9` + - y\ :sub:`8` + - y\ :sub:`7` + - y\ :sub:`6` + - y\ :sub:`5` + - y\ :sub:`4` + - y\ :sub:`3` + - y\ :sub:`2` + - y\ :sub:`1` + - y\ :sub:`0` * .. _MEDIA-BUS-FMT-UYYVYY10-0-5X30: - MEDIA_BUS_FMT_UYYVYY10_0_5X30 @@ -7575,6 +8083,220 @@ - v\ :sub:`2` - v\ :sub:`1` - v\ :sub:`0` + * .. _MEDIA-BUS-FMT-UYYVYY16-4X32: + + - MEDIA_BUS_FMT_UYYVYY16_4X32 + - 0x2106 + - + - u\ :sub:`15` + - u\ :sub:`14` + - u\ :sub:`13` + - u\ :sub:`12` + - u\ :sub:`11` + - u\ :sub:`10` + - u\ :sub:`9` + - u\ :sub:`8` + - u\ :sub:`7` + - u\ :sub:`6` + - u\ :sub:`5` + - u\ :sub:`4` + - u\ :sub:`3` + - u\ :sub:`2` + - u\ :sub:`1` + - u\ :sub:`0` + - y\ :sub:`15` + - y\ :sub:`14` + - y\ :sub:`13` + - y\ :sub:`12` + - y\ :sub:`11` + - y\ :sub:`10` + - y\ :sub:`9` + - y\ :sub:`8` + - y\ :sub:`7` + - y\ :sub:`6` + - y\ :sub:`5` + - y\ :sub:`4` + - y\ :sub:`3` + - y\ :sub:`2` + - y\ :sub:`1` + - y\ :sub:`0` + * - + - + - + - v\ :sub:`15` + - v\ :sub:`14` + - v\ :sub:`13` + - v\ :sub:`12` + - v\ :sub:`11` + - v\ :sub:`10` + - v\ :sub:`9` + - v\ :sub:`8` + - v\ :sub:`7` + - v\ :sub:`6` + - v\ :sub:`5` + - v\ :sub:`4` + - v\ :sub:`3` + - v\ :sub:`2` + - v\ :sub:`1` + - v\ :sub:`0` + - y\ :sub:`15` + - y\ :sub:`14` + - y\ :sub:`13` + - y\ :sub:`12` + - y\ :sub:`11` + - y\ :sub:`10` + - y\ :sub:`9` + - y\ :sub:`8` + - y\ :sub:`7` + - y\ :sub:`6` + - y\ :sub:`5` + - y\ :sub:`4` + - y\ :sub:`3` + - y\ :sub:`2` + - y\ :sub:`1` + - y\ :sub:`0` + * - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - y\ :sub:`15` + - y\ :sub:`14` + - y\ :sub:`13` + - y\ :sub:`12` + - y\ :sub:`11` + - y\ :sub:`10` + - y\ :sub:`9` + - y\ :sub:`8` + - y\ :sub:`7` + - y\ :sub:`6` + - y\ :sub:`5` + - y\ :sub:`4` + - y\ :sub:`3` + - y\ :sub:`2` + - y\ :sub:`1` + - y\ :sub:`0` + * - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - y\ :sub:`15` + - y\ :sub:`14` + - y\ :sub:`13` + - y\ :sub:`12` + - y\ :sub:`11` + - y\ :sub:`10` + - y\ :sub:`9` + - y\ :sub:`8` + - y\ :sub:`7` + - y\ :sub:`6` + - y\ :sub:`5` + - y\ :sub:`4` + - y\ :sub:`3` + - y\ :sub:`2` + - y\ :sub:`1` + - y\ :sub:`0` + * .. _MEDIA-BUS-FMT-UYVY16-2X32: + + - MEDIA_BUS_FMT_UYVY16_2X32 + - 0x2108 + - + - u\ :sub:`15` + - u\ :sub:`14` + - u\ :sub:`13` + - u\ :sub:`12` + - u\ :sub:`11` + - u\ :sub:`10` + - u\ :sub:`9` + - u\ :sub:`8` + - u\ :sub:`7` + - u\ :sub:`6` + - u\ :sub:`5` + - u\ :sub:`4` + - u\ :sub:`3` + - u\ :sub:`2` + - u\ :sub:`1` + - u\ :sub:`0` + - y\ :sub:`15` + - y\ :sub:`14` + - y\ :sub:`13` + - y\ :sub:`12` + - y\ :sub:`11` + - y\ :sub:`10` + - y\ :sub:`9` + - y\ :sub:`8` + - y\ :sub:`7` + - y\ :sub:`6` + - y\ :sub:`5` + - y\ :sub:`4` + - y\ :sub:`3` + - y\ :sub:`2` + - y\ :sub:`1` + - y\ :sub:`0` + * - + - + - + - v\ :sub:`15` + - v\ :sub:`14` + - v\ :sub:`13` + - v\ :sub:`12` + - v\ :sub:`11` + - v\ :sub:`10` + - v\ :sub:`9` + - v\ :sub:`8` + - v\ :sub:`7` + - v\ :sub:`6` + - v\ :sub:`5` + - v\ :sub:`4` + - v\ :sub:`3` + - v\ :sub:`2` + - v\ :sub:`1` + - v\ :sub:`0` + - y\ :sub:`15` + - y\ :sub:`14` + - y\ :sub:`13` + - y\ :sub:`12` + - y\ :sub:`11` + - y\ :sub:`10` + - y\ :sub:`9` + - y\ :sub:`8` + - y\ :sub:`7` + - y\ :sub:`6` + - y\ :sub:`5` + - y\ :sub:`4` + - y\ :sub:`3` + - y\ :sub:`2` + - y\ :sub:`1` + - y\ :sub:`0` .. raw:: latex @@ -7763,6 +8485,47 @@ - v\ :sub:`2` - v\ :sub:`1` - v\ :sub:`0` + * .. _MEDIA-BUS-FMT-VUY12-1X36: + + - MEDIA_BUS_FMT_VUY12_1X36 + - 0x2104 + - + - v\ :sub:`11` + - v\ :sub:`10` + - v\ :sub:`9` + - v\ :sub:`8` + - v\ :sub:`7` + - v\ :sub:`6` + - v\ :sub:`5` + - v\ :sub:`4` + - v\ :sub:`3` + - v\ :sub:`2` + - v\ :sub:`1` + - v\ :sub:`0` + - u\ :sub:`11` + - u\ :sub:`10` + - u\ :sub:`9` + - u\ :sub:`8` + - u\ :sub:`7` + - u\ :sub:`6` + - u\ :sub:`5` + - u\ :sub:`4` + - u\ :sub:`3` + - u\ :sub:`2` + - u\ :sub:`1` + - u\ :sub:`0` + - y\ :sub:`11` + - y\ :sub:`10` + - y\ :sub:`9` + - y\ :sub:`8` + - y\ :sub:`7` + - y\ :sub:`6` + - y\ :sub:`5` + - y\ :sub:`4` + - y\ :sub:`3` + - y\ :sub:`2` + - y\ :sub:`1` + - y\ :sub:`0` .. raw:: latex @@ -7933,6 +8696,78 @@ - v\ :sub:`2` - v\ :sub:`1` - v\ :sub:`0` + * .. _MEDIA-BUS-FMT-VUY16-1X48: + + - MEDIA_BUS_FMT_VUY16_1X48 + - 0x2107 + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - v\ :sub:`15` + - v\ :sub:`14` + - v\ :sub:`13` + - v\ :sub:`12` + - v\ :sub:`11` + - v\ :sub:`10` + - v\ :sub:`9` + - v\ :sub:`8` + - v\ :sub:`7` + - v\ :sub:`6` + - v\ :sub:`5` + - v\ :sub:`4` + - v\ :sub:`3` + - v\ :sub:`2` + - v\ :sub:`1` + - v\ :sub:`0` + * - + - + - + - u\ :sub:`15` + - u\ :sub:`14` + - u\ :sub:`13` + - u\ :sub:`12` + - u\ :sub:`11` + - u\ :sub:`10` + - u\ :sub:`9` + - u\ :sub:`8` + - u\ :sub:`7` + - u\ :sub:`6` + - u\ :sub:`5` + - u\ :sub:`4` + - u\ :sub:`3` + - u\ :sub:`2` + - u\ :sub:`1` + - u\ :sub:`0` + - y\ :sub:`15` + - y\ :sub:`14` + - y\ :sub:`13` + - y\ :sub:`12` + - y\ :sub:`11` + - y\ :sub:`10` + - y\ :sub:`8` + - y\ :sub:`8` + - y\ :sub:`7` + - y\ :sub:`6` + - y\ :sub:`5` + - y\ :sub:`4` + - y\ :sub:`3` + - y\ :sub:`2` + - y\ :sub:`1` + - y\ :sub:`0` * .. _MEDIA-BUS-FMT-UYYVYY16-0-5X48: - MEDIA_BUS_FMT_UYYVYY16_0_5X48 --- linux-xilinx-6.8.0.orig/Documentation/userspace-api/media/v4l/vidioc-queryctrl.rst +++ linux-xilinx-6.8.0/Documentation/userspace-api/media/v4l/vidioc-queryctrl.rst @@ -471,6 +471,12 @@ - n/a - A struct :c:type:`v4l2_ctrl_h264_decode_params`, containing H264 decode parameters for stateless video decoders. + * - ``V4L2_CTRL_TYPE_HDR`` + - n/a + - n/a + - n/a + - A struct :c:type:`v4l2_metadata_hdr`, containing HDR + metadata. * - ``V4L2_CTRL_TYPE_FWHT_PARAMS`` - n/a - n/a --- linux-xilinx-6.8.0.orig/Documentation/userspace-api/media/videodev2.h.rst.exceptions +++ linux-xilinx-6.8.0/Documentation/userspace-api/media/videodev2.h.rst.exceptions @@ -82,6 +82,7 @@ replace symbol V4L2_XFER_FUNC_SMPTE2084 :c:type:`v4l2_xfer_func` replace symbol V4L2_XFER_FUNC_SMPTE240M :c:type:`v4l2_xfer_func` replace symbol V4L2_XFER_FUNC_SRGB :c:type:`v4l2_xfer_func` +replace symbol V4L2_XFER_FUNC_HLG :c:type:`v4l2_xfer_func` replace symbol V4L2_XFER_FUNC_LAST :c:type:`v4l2_xfer_func` # Documented enum v4l2_ycbcr_encoding --- linux-xilinx-6.8.0.orig/Documentation/virt/kvm/api.rst +++ linux-xilinx-6.8.0/Documentation/virt/kvm/api.rst @@ -1403,6 +1403,12 @@ was a load or a store, instruction abort if it was an instruction fetch) is injected in the guest. +S390: +^^^^^ + +Returns -EINVAL if the VM has the KVM_VM_S390_UCONTROL flag set. +Returns -EINVAL if called on a protected VM. + 4.36 KVM_SET_TSS_ADDR --------------------- @@ -2439,8 +2445,11 @@ PPC KVM_REG_PPC_PSSCR 64 PPC KVM_REG_PPC_DEC_EXPIRY 64 PPC KVM_REG_PPC_PTCR 64 + PPC KVM_REG_PPC_HASHKEYR 64 + PPC KVM_REG_PPC_HASHPKEYR 64 PPC KVM_REG_PPC_DAWR1 64 PPC KVM_REG_PPC_DAWRX1 64 + PPC KVM_REG_PPC_DEXCR 64 PPC KVM_REG_PPC_TM_GPR0 64 ... PPC KVM_REG_PPC_TM_GPR31 64 @@ -6244,6 +6253,12 @@ is '0' for all gfns. Userspace can control whether memory is shared/private by toggling KVM_MEMORY_ATTRIBUTE_PRIVATE via KVM_SET_MEMORY_ATTRIBUTES as needed. +S390: +^^^^^ + +Returns -EINVAL if the VM has the KVM_VM_S390_UCONTROL flag set. +Returns -EINVAL if called on a protected VM. + 4.141 KVM_SET_MEMORY_ATTRIBUTES ------------------------------- --- linux-xilinx-6.8.0.orig/Documentation/virt/kvm/locking.rst +++ linux-xilinx-6.8.0/Documentation/virt/kvm/locking.rst @@ -9,7 +9,7 @@ The acquisition orders for mutexes are as follows: -- cpus_read_lock() is taken outside kvm_lock +- cpus_read_lock() is taken outside kvm_lock and kvm_usage_lock - kvm->lock is taken outside vcpu->mutex @@ -24,6 +24,13 @@ are taken on the waiting side when modifying memslots, so MMU notifiers must not take either kvm->slots_lock or kvm->slots_arch_lock. +cpus_read_lock() vs kvm_lock: + +- Taking cpus_read_lock() outside of kvm_lock is problematic, despite that + being the official ordering, as it is quite easy to unknowingly trigger + cpus_read_lock() while holding kvm_lock. Use caution when walking vm_list, + e.g. avoid complex operations when possible. + For SRCU: - ``synchronize_srcu(&kvm->srcu)`` is called inside critical sections @@ -227,10 +234,17 @@ :Type: mutex :Arch: any :Protects: - vm_list - - kvm_usage_count + +``kvm_usage_lock`` +^^^^^^^^^^^^^^^^^^ + +:Type: mutex +:Arch: any +:Protects: - kvm_usage_count - hardware virtualization enable/disable -:Comment: KVM also disables CPU hotplug via cpus_read_lock() during - enable/disable. +:Comment: Exists because using kvm_lock leads to deadlock (see earlier comment + on cpus_read_lock() vs kvm_lock). Note, KVM also disables CPU hotplug via + cpus_read_lock() when enabling/disabling virtualization. ``kvm->mn_invalidate_lock`` ^^^^^^^^^^^^^^^^^^^^^^^^^^^ @@ -290,11 +304,12 @@ wakeup. ``vendor_module_lock`` -^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +^^^^^^^^^^^^^^^^^^^^^^ :Type: mutex :Arch: x86 :Protects: loading a vendor module (kvm_amd or kvm_intel) -:Comment: Exists because using kvm_lock leads to deadlock. cpu_hotplug_lock is - taken outside of kvm_lock, e.g. in KVM's CPU online/offline callbacks, and - many operations need to take cpu_hotplug_lock when loading a vendor module, - e.g. updating static calls. +:Comment: Exists because using kvm_lock leads to deadlock. kvm_lock is taken + in notifiers, e.g. __kvmclock_cpufreq_notifier(), that may be invoked while + cpu_hotplug_lock is held, e.g. from cpufreq_boost_trigger_state(), and many + operations need to take cpu_hotplug_lock when loading a vendor module, e.g. + updating static calls. --- linux-xilinx-6.8.0.orig/Kbuild +++ linux-xilinx-6.8.0/Kbuild @@ -97,3 +97,4 @@ obj-$(CONFIG_NET) += net/ obj-y += virt/ obj-y += $(ARCH_DRIVERS) +obj-y += ubuntu/ --- linux-xilinx-6.8.0.orig/Kconfig +++ linux-xilinx-6.8.0/Kconfig @@ -19,6 +19,8 @@ source "drivers/Kconfig" +source "ubuntu/Kconfig" + source "fs/Kconfig" source "security/Kconfig" --- linux-xilinx-6.8.0.orig/MAINTAINERS +++ linux-xilinx-6.8.0/MAINTAINERS @@ -190,6 +190,18 @@ F: Documentation/devicetree/bindings/power/supply/*ab8500* F: drivers/power/supply/*ab8500* +AAEON DEVICE DRIVER WITH WMI INTERFACE +M: Edward Lin +M: Kunyang Fan +M: Frank Hsieh +M: Jacob Wu +S: Supported +F: drivers/gpio/gpio-aaeon.c +F: drivers/hwmon/hwmon-aaeon.c +F: drivers/leds/leds-aaeon.c +F: drivers/mfd/mfd-aaeon.c +F: drivers/watchdog/wdt_aaeon.c + ABI/API L: linux-api@vger.kernel.org F: include/linux/syscalls.h @@ -1054,7 +1066,6 @@ S: Supported F: Documentation/admin-guide/pm/amd-pstate.rst F: drivers/cpufreq/amd-pstate* -F: include/linux/amd-pstate.h F: tools/power/x86/amd_pstate_tracer/amd_pstate_trace.py AMD PTDMA DRIVER @@ -4896,6 +4907,15 @@ F: Documentation/hwmon/powerz.rst F: drivers/hwmon/powerz.c +CHAR and MISC XILINX AI ENGINE DRIVER +M: Gregory Williams +M: Govindarajulu Varadarajan +S: Maintained +F: Documentation/devicetree/bindings/soc/xilinx/xlnx,ai-engine.yaml +F: drivers/misc/xilinx-ai-engine/ +F: include/linux/xlnx-ai-engine.h +F: include/uapi/linux/xlnx-ai-engine.h + CHECKPATCH M: Andy Whitcroft M: Joe Perches @@ -10389,6 +10409,14 @@ S: Maintained F: drivers/media/rc/iguanair.c +IIO BACKEND FRAMEWORK +M: Nuno Sa +R: Olivier Moysan +L: linux-iio@vger.kernel.org +S: Maintained +F: drivers/iio/industrialio-backend.c +F: include/linux/iio/backend.h + IIO DIGITAL POTENTIOMETER DAC M: Peter Rosin L: linux-iio@vger.kernel.org @@ -10510,6 +10538,14 @@ F: drivers/hwmon/ina2xx.c F: include/linux/platform_data/ina2xx.h +INA260 POWER MONITOR DRIVER +M: Shubhrajyoti Datta +R: Raviteja Narayanam +R: Michal Simek +S: Maintained +F: drivers/iio/adc/ina260-adc.c +F: Documentation/devicetree/bindings/iio/adc/ti,ina260.yaml + INDEX OF FURTHER KERNEL DOCUMENTATION M: Carlos Bilbao S: Maintained @@ -12192,6 +12228,12 @@ W: http://legousb.sourceforge.net/ F: drivers/usb/misc/legousbtower.c +LENOVO WMI HOTKEY UTILITIES DRIVER +M: Jackie Dong +L: platform-driver-x86@vger.kernel.org +S: Maintained +F: drivers/platform/x86/lenovo-wmi-hotkey-utilities.c + LETSKETCH HID TABLET DRIVER M: Hans de Goede L: linux-input@vger.kernel.org @@ -14048,7 +14090,7 @@ M: "Paul E. McKenney" L: linux-kernel@vger.kernel.org S: Supported -F: arch/powerpc/include/asm/membarrier.h +F: arch/*/include/asm/membarrier.h F: include/uapi/linux/membarrier.h F: kernel/sched/membarrier.c @@ -16320,8 +16362,8 @@ M: Matthias Kaehlcke L: linux-usb@vger.kernel.org S: Maintained -F: Documentation/ABI/testing/sysfs-bus-platform-onboard-usb-hub -F: drivers/usb/misc/onboard_usb_hub.c +F: Documentation/ABI/testing/sysfs-bus-platform-onboard-usb-dev +F: drivers/usb/misc/onboard_usb_dev.c ONENAND FLASH DRIVER M: Kyungmin Park @@ -18750,6 +18792,12 @@ F: Documentation/devicetree/bindings/clock/renesas,versaclock7.yaml F: drivers/clk/clk-versaclock7.c +RENESAS PROXO CLOCK DRIVER +M: Alex Helms +S: Maintained +F: Documentation/devicetree/bindings/clock/renesas,proxo.yaml +F: drivers/clk/clk-proxo.c + RENESAS X9250 DIGITAL POTENTIOMETERS DRIVER M: Herve Codina L: linux-iio@vger.kernel.org @@ -24128,6 +24176,14 @@ F: Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml F: drivers/net/ethernet/xilinx/xilinx_axienet* +XILINX MEDIA AXIS SWITCH DRIVER +M: Anil kumar M +M: Karthikeyan T +L: git@xilinx.com +S: Maintained +F: Documentation/devicetree/bindings/media/xilinx/xlnx,axis-subsetconv.yaml +F: drivers/media/platform/xilinx/xilinx-axis-subsetconv.c + XILINX CAN DRIVER M: Appana Durga Kedareswara rao R: Naga Sureshkumar Relli @@ -24136,6 +24192,11 @@ F: Documentation/devicetree/bindings/net/can/xilinx,can.yaml F: drivers/net/can/xilinx_can.c +XILINX ECDSA DRIVER +M: Harsha +S: Maintained +F: drivers/crypto/xilinx/xilinx-ecdsa.c + XILINX EVENT MANAGEMENT DRIVER M: Abhyuday Godhasara S: Maintained @@ -24167,13 +24228,44 @@ M: Derek Kiernan M: Dragan Cvetic S: Maintained -F: Documentation/devicetree/bindings/misc/xlnx,sd-fec.txt +F: Documentation/devicetree/bindings/misc/xlnx,sd-fec.yaml F: Documentation/misc-devices/xilinx_sdfec.rst F: drivers/misc/Kconfig F: drivers/misc/Makefile F: drivers/misc/xilinx_sdfec.c F: include/uapi/misc/xilinx_sdfec.h +XILINX PUF driver +M: Kundanala Praveen Teja +R: Michal Simek +S: Maintained +F: drivers/misc/xilinx_puf.c +F: include/uapi/misc/xilinx_puf.h + +XILINX VERSAL SYSMON DRIVER +M: Salih Erim +R: Dragan Cvetic +L: git@xilinx.com +S: Maintained +F: Documentation/devicetree/bindings/iio/adc/xlnx,versal-sysmon.yaml +F: drivers/iio/adc/versal-sysmon.c +F: drivers/iio/adc/versal-sysmon.h +F: include/linux/iio/adc/versal-sysmon-events.h + +XILINX VERSAL SECURE CONFIGURATION DRIVER +M: Harsha +R: Michal Simek +S: Maintained +F: Documentation/devicetree/bindings/nvmem/xlnx,versal-sec-cfg.yaml +F: drivers/nvmem/xlnx_secure_config.c + +XILINX VERSAL THERMAL DRIVER +M: Salih Erim +R: Dragan Cvetic +S: Maintained +F: Documentation/devicetree/bindings/thermal/xlnx,versal-thermal.yaml +F: drivers/thermal/versal_thermal.c + XILINX UARTLITE SERIAL DRIVER M: Peter Korsgaard L: linux-serial@vger.kernel.org @@ -24245,6 +24337,12 @@ S: Maintained F: drivers/crypto/xilinx/zynqmp-sha.c +XILINX VERSAL XILSEM EDAC DRIVER +M: Rama Devi Veggalam +S: Maintained +F: Documentation/devicetree/bindings/edac/xlnx,versal-xilsem-edac.yaml +F: drivers/edac/xilinx_xilsem_edac.c + XILLYBUS DRIVER M: Eli Billauer L: linux-kernel@vger.kernel.org --- linux-xilinx-6.8.0.orig/Makefile +++ linux-xilinx-6.8.0/Makefile @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 VERSION = 6 PATCHLEVEL = 8 -SUBLEVEL = 0 +SUBLEVEL = 12 EXTRAVERSION = NAME = Hurr durr I'ma ninja sloth @@ -515,7 +515,7 @@ KBZIP2 = bzip2 KLZOP = lzop LZMA = lzma -LZ4 = lz4c +LZ4 = lz4 XZ = xz ZSTD = zstd @@ -549,6 +549,9 @@ -I$(objtree)/include \ $(USERINCLUDE) +# UBUNTU: Include our third party driver stuff too +LINUXINCLUDE += -I$(srctree)/ubuntu/include + KBUILD_AFLAGS := -D__ASSEMBLY__ -fno-PIE KBUILD_CFLAGS := @@ -943,7 +946,6 @@ ifdef CONFIG_LTO_CLANG ifdef CONFIG_LTO_CLANG_THIN CC_FLAGS_LTO := -flto=thin -fsplit-lto-unit -KBUILD_LDFLAGS += --thinlto-cache-dir=$(extmod_prefix).thinlto-cache else CC_FLAGS_LTO := -flto endif @@ -1052,8 +1054,8 @@ endif # Align the bit size of userspace programs with the kernel -KBUILD_USERCFLAGS += $(filter -m32 -m64 --target=%, $(KBUILD_CFLAGS)) -KBUILD_USERLDFLAGS += $(filter -m32 -m64 --target=%, $(KBUILD_CFLAGS)) +KBUILD_USERCFLAGS += $(filter -m32 -m64 --target=%, $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS)) +KBUILD_USERLDFLAGS += $(filter -m32 -m64 --target=%, $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS)) # make the checker run with the right architecture CHECKFLAGS += --arch=$(ARCH) @@ -1278,8 +1280,9 @@ quiet_cmd_headers_install = INSTALL $(INSTALL_HDR_PATH)/include cmd_headers_install = \ mkdir -p $(INSTALL_HDR_PATH); \ - rsync -mrl --include='*/' --include='*\.h' --exclude='*' \ - usr/include $(INSTALL_HDR_PATH) + find usr/include -type f -name '*.h' -print0 | \ + tar -czf - --null --no-recursion --no-wildcards-match-slash -T- | \ + tar -xzf - --strip-components=1 -C $(INSTALL_HDR_PATH) PHONY += headers_install headers_install: headers @@ -1294,6 +1297,7 @@ $(if $(filter um, $(SRCARCH)), $(error Headers not exportable for UML)) $(Q)$(MAKE) $(hdr-inst)=include/uapi $(Q)$(MAKE) $(hdr-inst)=arch/$(SRCARCH)/include/uapi + $(Q)$(MAKE) $(hdr-inst)=ubuntu/include dst=include oldheaders= ifdef CONFIG_HEADERS_INSTALL prepare: headers @@ -1346,18 +1350,13 @@ $(Q)$(MAKE) -sC $(srctree)/tools/bpf/resolve_btfids O=$(resolve_btfids_O) clean endif -# Clear a bunch of variables before executing the submake -ifeq ($(quiet),silent_) -tools_silent=s -endif - tools/: FORCE $(Q)mkdir -p $(objtree)/tools - $(Q)$(MAKE) LDFLAGS= MAKEFLAGS="$(tools_silent) $(filter --j% -j,$(MAKEFLAGS))" O=$(abspath $(objtree)) subdir=tools -C $(srctree)/tools/ + $(Q)$(MAKE) LDFLAGS= O=$(abspath $(objtree)) subdir=tools -C $(srctree)/tools/ tools/%: FORCE $(Q)mkdir -p $(objtree)/tools - $(Q)$(MAKE) LDFLAGS= MAKEFLAGS="$(tools_silent) $(filter --j% -j,$(MAKEFLAGS))" O=$(abspath $(objtree)) subdir=tools -C $(srctree)/tools/ $* + $(Q)$(MAKE) LDFLAGS= O=$(abspath $(objtree)) subdir=tools -C $(srctree)/tools/ $* # --------------------------------------------------------------------------- # Kernel selftest @@ -1479,13 +1478,13 @@ # Directories & files removed with 'make clean' CLEAN_FILES += vmlinux.symvers modules-only.symvers \ modules.builtin modules.builtin.modinfo modules.nsdeps \ - compile_commands.json .thinlto-cache rust/test \ + compile_commands.json rust/test \ rust-project.json .vmlinux.objs .vmlinux.export.c # Directories & files removed with 'make mrproper' MRPROPER_FILES += include/config include/generated \ arch/$(SRCARCH)/include/generated .objdiff \ - debian snap tar-install \ + snap tar-install \ .config .config.old .version \ Module.symvers \ certs/signing_key.pem \ @@ -1785,7 +1784,7 @@ clean-dirs := $(KBUILD_EXTMOD) clean: rm-files := $(KBUILD_EXTMOD)/Module.symvers $(KBUILD_EXTMOD)/modules.nsdeps \ - $(KBUILD_EXTMOD)/compile_commands.json $(KBUILD_EXTMOD)/.thinlto-cache + $(KBUILD_EXTMOD)/compile_commands.json PHONY += prepare # now expand this into a simple variable to reduce the cost of shell evaluations --- linux-xilinx-6.8.0.orig/Ubuntu.md +++ linux-xilinx-6.8.0/Ubuntu.md @@ -0,0 +1,8 @@ +Name: linux-xilinx +Version: 6.8.0 +Series: 24.04 (noble) +Description: + This is the source code for the Ubuntu linux kernel for the 24.04 series. This + source tree is used to produce the flavours: xilinx. + This kernel is configured to support the widest range of desktop, laptop and + server configurations. --- linux-xilinx-6.8.0.orig/arch/Kconfig +++ linux-xilinx-6.8.0/arch/Kconfig @@ -9,6 +9,14 @@ # source "arch/$(SRCARCH)/Kconfig" +config ARCH_CONFIGURES_CPU_MITIGATIONS + bool + +if !ARCH_CONFIGURES_CPU_MITIGATIONS +config CPU_MITIGATIONS + def_bool y +endif + menu "General architecture-dependent options" config ARCH_HAS_SUBPAGE_FAULTS --- linux-xilinx-6.8.0.orig/arch/alpha/include/uapi/asm/ptrace.h +++ linux-xilinx-6.8.0/arch/alpha/include/uapi/asm/ptrace.h @@ -42,6 +42,8 @@ unsigned long trap_a0; unsigned long trap_a1; unsigned long trap_a2; +/* This makes the stack 16-byte aligned as GCC expects */ + unsigned long __pad0; /* These are saved by PAL-code: */ unsigned long ps; unsigned long pc; --- linux-xilinx-6.8.0.orig/arch/alpha/kernel/asm-offsets.c +++ linux-xilinx-6.8.0/arch/alpha/kernel/asm-offsets.c @@ -34,7 +34,9 @@ DEFINE(CRED_EGID, offsetof(struct cred, egid)); BLANK(); + DEFINE(SP_OFF, offsetof(struct pt_regs, ps)); DEFINE(SIZEOF_PT_REGS, sizeof(struct pt_regs)); + DEFINE(SWITCH_STACK_SIZE, sizeof(struct switch_stack)); DEFINE(PT_PTRACED, PT_PTRACED); DEFINE(CLONE_VM, CLONE_VM); DEFINE(CLONE_UNTRACED, CLONE_UNTRACED); --- linux-xilinx-6.8.0.orig/arch/alpha/kernel/entry.S +++ linux-xilinx-6.8.0/arch/alpha/kernel/entry.S @@ -15,10 +15,6 @@ .set noat .cfi_sections .debug_frame -/* Stack offsets. */ -#define SP_OFF 184 -#define SWITCH_STACK_SIZE 64 - .macro CFI_START_OSF_FRAME func .align 4 .globl \func @@ -198,8 +194,8 @@ CFI_START_OSF_FRAME entMM SAVE_ALL /* save $9 - $15 so the inline exception code can manipulate them. */ - subq $sp, 56, $sp - .cfi_adjust_cfa_offset 56 + subq $sp, 64, $sp + .cfi_adjust_cfa_offset 64 stq $9, 0($sp) stq $10, 8($sp) stq $11, 16($sp) @@ -214,7 +210,7 @@ .cfi_rel_offset $13, 32 .cfi_rel_offset $14, 40 .cfi_rel_offset $15, 48 - addq $sp, 56, $19 + addq $sp, 64, $19 /* handle the fault */ lda $8, 0x3fff bic $sp, $8, $8 @@ -227,7 +223,7 @@ ldq $13, 32($sp) ldq $14, 40($sp) ldq $15, 48($sp) - addq $sp, 56, $sp + addq $sp, 64, $sp .cfi_restore $9 .cfi_restore $10 .cfi_restore $11 @@ -235,7 +231,7 @@ .cfi_restore $13 .cfi_restore $14 .cfi_restore $15 - .cfi_adjust_cfa_offset -56 + .cfi_adjust_cfa_offset -64 /* finish up the syscall as normal. */ br ret_from_sys_call CFI_END_OSF_FRAME entMM @@ -382,8 +378,8 @@ .cfi_restore $0 .cfi_adjust_cfa_offset -256 SAVE_ALL /* setup normal kernel stack */ - lda $sp, -56($sp) - .cfi_adjust_cfa_offset 56 + lda $sp, -64($sp) + .cfi_adjust_cfa_offset 64 stq $9, 0($sp) stq $10, 8($sp) stq $11, 16($sp) @@ -399,7 +395,7 @@ .cfi_rel_offset $14, 40 .cfi_rel_offset $15, 48 lda $8, 0x3fff - addq $sp, 56, $19 + addq $sp, 64, $19 bic $sp, $8, $8 jsr $26, do_entUnaUser ldq $9, 0($sp) @@ -409,7 +405,7 @@ ldq $13, 32($sp) ldq $14, 40($sp) ldq $15, 48($sp) - lda $sp, 56($sp) + lda $sp, 64($sp) .cfi_restore $9 .cfi_restore $10 .cfi_restore $11 @@ -417,7 +413,7 @@ .cfi_restore $13 .cfi_restore $14 .cfi_restore $15 - .cfi_adjust_cfa_offset -56 + .cfi_adjust_cfa_offset -64 br ret_from_sys_call CFI_END_OSF_FRAME entUna --- linux-xilinx-6.8.0.orig/arch/alpha/kernel/traps.c +++ linux-xilinx-6.8.0/arch/alpha/kernel/traps.c @@ -708,7 +708,7 @@ static int unauser_reg_offsets[32] = { R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), R(r8), /* r9 ... r15 are stored in front of regs. */ - -56, -48, -40, -32, -24, -16, -8, + -64, -56, -48, -40, -32, -24, -16, /* padding at -8 */ R(r16), R(r17), R(r18), R(r19), R(r20), R(r21), R(r22), R(r23), R(r24), R(r25), R(r26), R(r27), R(r28), R(gp), --- linux-xilinx-6.8.0.orig/arch/alpha/mm/fault.c +++ linux-xilinx-6.8.0/arch/alpha/mm/fault.c @@ -78,8 +78,8 @@ /* Macro for exception fixup code to access integer registers. */ #define dpf_reg(r) \ - (((unsigned long *)regs)[(r) <= 8 ? (r) : (r) <= 15 ? (r)-16 : \ - (r) <= 18 ? (r)+10 : (r)-10]) + (((unsigned long *)regs)[(r) <= 8 ? (r) : (r) <= 15 ? (r)-17 : \ + (r) <= 18 ? (r)+11 : (r)-10]) asmlinkage void do_page_fault(unsigned long address, unsigned long mmcsr, --- linux-xilinx-6.8.0.orig/arch/arc/Kconfig +++ linux-xilinx-6.8.0/arch/arc/Kconfig @@ -292,7 +292,6 @@ config ARC_PAGE_SIZE_4K bool "4KB" - depends on ARC_MMU_V3 || ARC_MMU_V4 endchoice @@ -469,7 +468,8 @@ config ARC_HAS_PAE40 bool "Support for the 40-bit Physical Address Extension" - depends on ISA_ARCV2 + depends on MMU_V4 + depends on !ARC_PAGE_SIZE_4K select HIGHMEM select PHYS_ADDR_T_64BIT help --- linux-xilinx-6.8.0.orig/arch/arc/Makefile +++ linux-xilinx-6.8.0/arch/arc/Makefile @@ -6,7 +6,7 @@ KBUILD_DEFCONFIG := haps_hs_smp_defconfig ifeq ($(CROSS_COMPILE),) -CROSS_COMPILE := $(call cc-cross-prefix, arc-linux- arceb-linux-) +CROSS_COMPILE := $(call cc-cross-prefix, arc-linux- arceb-linux- arc-linux-gnu-) endif cflags-y += -fno-common -pipe -fno-builtin -mmedium-calls -D__linux__ --- linux-xilinx-6.8.0.orig/arch/arc/boot/dts/hsdk.dts +++ linux-xilinx-6.8.0/arch/arc/boot/dts/hsdk.dts @@ -205,7 +205,6 @@ }; gmac: ethernet@8000 { - #interrupt-cells = <1>; compatible = "snps,dwmac"; reg = <0x8000 0x2000>; interrupts = <10>; --- linux-xilinx-6.8.0.orig/arch/arc/kernel/devtree.c +++ linux-xilinx-6.8.0/arch/arc/kernel/devtree.c @@ -62,7 +62,7 @@ const struct machine_desc *mdesc; unsigned long dt_root; - if (!early_init_dt_scan(dt)) + if (!early_init_dt_scan(dt, __pa(dt))) return NULL; mdesc = of_flat_dt_match_machine(NULL, arch_get_next_mach); --- linux-xilinx-6.8.0.orig/arch/arm/Kconfig +++ linux-xilinx-6.8.0/arch/arm/Kconfig @@ -29,7 +29,7 @@ select ARCH_HAVE_NMI_SAFE_CMPXCHG if CPU_V7 || CPU_V7M || CPU_V6K select ARCH_HAS_GCOV_PROFILE_ALL select ARCH_KEEP_MEMBLOCK - select ARCH_HAS_UBSAN_SANITIZE_ALL + select ARCH_HAS_UBSAN select ARCH_MIGHT_HAVE_PC_PARPORT select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT if CPU_V7 @@ -503,8 +503,8 @@ config IWMMXT bool "Enable iWMMXt support" - depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 || CPU_PJ4B - default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4 || CPU_PJ4B + depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK + default y if PXA27x || PXA3xx || ARCH_MMP help Enable support for iWMMXt context switching at run time if running on a CPU that supports it. --- linux-xilinx-6.8.0.orig/arch/arm/Makefile +++ linux-xilinx-6.8.0/arch/arm/Makefile @@ -59,6 +59,9 @@ # KBUILD_CFLAGS += $(call cc-option,-fno-ipa-sra) +# Need -msoft-float for gcc 11 for the below instruction set selection +KBUILD_CFLAGS += -msoft-float + # This selects which instruction set is used. arch-$(CONFIG_CPU_32v7M) :=-march=armv7-m arch-$(CONFIG_CPU_32v7) :=-march=armv7-a @@ -141,7 +144,7 @@ # Need -Uarm for gcc < 3.x KBUILD_CPPFLAGS +=$(cpp-y) -KBUILD_CFLAGS +=$(CFLAGS_ABI) $(CFLAGS_ISA) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm +KBUILD_CFLAGS +=$(CFLAGS_ABI) $(CFLAGS_ISA) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -Uarm KBUILD_AFLAGS +=$(CFLAGS_ABI) $(AFLAGS_ISA) -Wa,$(arch-y) $(tune-y) -include asm/unified.h -msoft-float CHECKFLAGS += -D__arm__ --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/allwinner/Makefile +++ linux-xilinx-6.8.0/arch/arm/boot/dts/allwinner/Makefile @@ -260,68 +260,6 @@ sun8i-v3s-licheepi-zero.dtb \ sun8i-v3s-licheepi-zero-dock.dtb \ sun8i-v40-bananapi-m2-berry.dtb -dtb-$(CONFIG_MACH_SUN8I) += \ - sun8i-a23-evb.dtb \ - sun8i-a23-gt90h-v4.dtb \ - sun8i-a23-inet86dz.dtb \ - sun8i-a23-ippo-q8h-v5.dtb \ - sun8i-a23-ippo-q8h-v1.2.dtb \ - sun8i-a23-polaroid-mid2407pxe03.dtb \ - sun8i-a23-polaroid-mid2809pxe04.dtb \ - sun8i-a23-q8-tablet.dtb \ - sun8i-a33-et-q8-v1.6.dtb \ - sun8i-a33-ga10h-v1.1.dtb \ - sun8i-a33-inet-d978-rev2.dtb \ - sun8i-a33-ippo-q8h-v1.2.dtb \ - sun8i-a33-olinuxino.dtb \ - sun8i-a33-q8-tablet.dtb \ - sun8i-a33-sinlinx-sina33.dtb \ - sun8i-a83t-allwinner-h8homlet-v2.dtb \ - sun8i-a83t-bananapi-m3.dtb \ - sun8i-a83t-cubietruck-plus.dtb \ - sun8i-a83t-tbs-a711.dtb \ - sun8i-h2-plus-bananapi-m2-zero.dtb \ - sun8i-h2-plus-libretech-all-h3-cc.dtb \ - sun8i-h2-plus-orangepi-r1.dtb \ - sun8i-h2-plus-orangepi-zero.dtb \ - sun8i-h3-bananapi-m2-plus.dtb \ - sun8i-h3-bananapi-m2-plus-v1.2.dtb \ - sun8i-h3-beelink-x2.dtb \ - sun8i-h3-libretech-all-h3-cc.dtb \ - sun8i-h3-mapleboard-mp130.dtb \ - sun8i-h3-nanopi-duo2.dtb \ - sun8i-h3-nanopi-m1.dtb\ - \ - sun8i-h3-nanopi-m1-plus.dtb \ - sun8i-h3-nanopi-neo.dtb \ - sun8i-h3-nanopi-neo-air.dtb \ - sun8i-h3-nanopi-r1.dtb \ - sun8i-h3-orangepi-2.dtb \ - sun8i-h3-orangepi-lite.dtb \ - sun8i-h3-orangepi-one.dtb \ - sun8i-h3-orangepi-pc.dtb \ - sun8i-h3-orangepi-pc-plus.dtb \ - sun8i-h3-orangepi-plus.dtb \ - sun8i-h3-orangepi-plus2e.dtb \ - sun8i-h3-orangepi-zero-plus2.dtb \ - sun8i-h3-rervision-dvk.dtb \ - sun8i-h3-zeropi.dtb \ - sun8i-h3-emlid-neutis-n5h3-devboard.dtb \ - sun8i-r16-bananapi-m2m.dtb \ - sun8i-r16-nintendo-nes-classic.dtb \ - sun8i-r16-nintendo-super-nes-classic.dtb \ - sun8i-r16-parrot.dtb \ - sun8i-r40-bananapi-m2-ultra.dtb \ - sun8i-r40-oka40i-c.dtb \ - sun8i-s3-elimo-initium.dtb \ - sun8i-s3-lichee-zero-plus.dtb \ - sun8i-s3-pinecube.dtb \ - sun8i-t113s-mangopi-mq-r-t113.dtb \ - sun8i-t3-cqa3t-bv3.dtb \ - sun8i-v3-sl631-imx179.dtb \ - sun8i-v3s-licheepi-zero.dtb \ - sun8i-v3s-licheepi-zero-dock.dtb \ - sun8i-v40-bananapi-m2-berry.dtb dtb-$(CONFIG_MACH_SUN9I) += \ sun9i-a80-optimus.dtb \ sun9i-a80-cubieboard4.dtb --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/allwinner/sun9i-a80-cubieboard4.dts +++ linux-xilinx-6.8.0/arch/arm/boot/dts/allwinner/sun9i-a80-cubieboard4.dts @@ -280,8 +280,8 @@ reg_dcdc5: dcdc5 { regulator-always-on; - regulator-min-microvolt = <1425000>; - regulator-max-microvolt = <1575000>; + regulator-min-microvolt = <1450000>; + regulator-max-microvolt = <1550000>; regulator-name = "vcc-dram"; }; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/arm/arm-realview-pb1176.dts +++ linux-xilinx-6.8.0/arch/arm/boot/dts/arm/arm-realview-pb1176.dts @@ -451,7 +451,7 @@ /* Direct-mapped development chip ROM */ pb1176_rom@10200000 { - compatible = "direct-mapped"; + compatible = "mtd-rom"; reg = <0x10200000 0x4000>; bank-width = <1>; }; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts +++ linux-xilinx-6.8.0/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts @@ -284,12 +284,12 @@ &i2c11 { status = "okay"; power-sensor@10 { - compatible = "adi, adm1272"; + compatible = "adi,adm1272"; reg = <0x10>; }; power-sensor@12 { - compatible = "adi, adm1272"; + compatible = "adi,adm1272"; reg = <0x12>; }; @@ -454,22 +454,20 @@ }; pwm@20{ - compatible = "max31790"; + compatible = "maxim,max31790"; reg = <0x20>; - #address-cells = <1>; - #size-cells = <0>; }; gpio@22{ compatible = "ti,tca6424"; reg = <0x22>; + gpio-controller; + #gpio-cells = <2>; }; pwm@23{ - compatible = "max31790"; + compatible = "maxim,max31790"; reg = <0x23>; - #address-cells = <1>; - #size-cells = <0>; }; adc@33 { @@ -504,22 +502,20 @@ }; pwm@20{ - compatible = "max31790"; + compatible = "maxim,max31790"; reg = <0x20>; - #address-cells = <1>; - #size-cells = <0>; }; gpio@22{ compatible = "ti,tca6424"; reg = <0x22>; + gpio-controller; + #gpio-cells = <2>; }; pwm@23{ - compatible = "max31790"; + compatible = "maxim,max31790"; reg = <0x23>; - #address-cells = <1>; - #size-cells = <0>; }; adc@33 { --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/broadcom/bcm2837-rpi-cm3-io3.dts +++ linux-xilinx-6.8.0/arch/arm/boot/dts/broadcom/bcm2837-rpi-cm3-io3.dts @@ -77,7 +77,7 @@ }; &hdmi { - hpd-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>; + hpd-gpios = <&expgpio 0 GPIO_ACTIVE_LOW>; power-domains = <&power RPI_POWER_DOMAIN_HDMI>; status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi +++ linux-xilinx-6.8.0/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi @@ -440,7 +440,7 @@ clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>; clock-names = "stmmaceth", "ptp_ref"; resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>; - reset-names = "stmmaceth", "ahb"; + reset-names = "stmmaceth", "stmmaceth-ocp"; snps,axi-config = <&socfpga_axi_setup>; status = "disabled"; }; @@ -460,7 +460,7 @@ clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>; clock-names = "stmmaceth", "ptp_ref"; resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>; - reset-names = "stmmaceth", "ahb"; + reset-names = "stmmaceth", "stmmaceth-ocp"; snps,axi-config = <&socfpga_axi_setup>; status = "disabled"; }; @@ -480,7 +480,7 @@ clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>; clock-names = "stmmaceth", "ptp_ref"; resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>; - reset-names = "stmmaceth", "ahb"; + reset-names = "stmmaceth", "stmmaceth-ocp"; snps,axi-config = <&socfpga_axi_setup>; status = "disabled"; }; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/marvell/mmp2-brownstone.dts +++ linux-xilinx-6.8.0/arch/arm/boot/dts/marvell/mmp2-brownstone.dts @@ -28,7 +28,7 @@ &twsi1 { status = "okay"; pmic: max8925@3c { - compatible = "maxium,max8925"; + compatible = "maxim,max8925"; reg = <0x3c>; interrupts = <1>; interrupt-parent = <&intcmux4>; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/mediatek/mt7623.dtsi +++ linux-xilinx-6.8.0/arch/arm/boot/dts/mediatek/mt7623.dtsi @@ -308,7 +308,7 @@ clock-names = "spi", "wrap"; }; - cir: cir@10013000 { + cir: ir-receiver@10013000 { compatible = "mediatek,mt7623-cir"; reg = <0 0x10013000 0 0x1000>; interrupts = ; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts +++ linux-xilinx-6.8.0/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts @@ -197,6 +197,7 @@ &sdmmc0 { bus-width = <4>; + no-1-8-v; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sdmmc0_default>; status = "okay"; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/microchip/at91-sama5d29_curiosity.dts +++ linux-xilinx-6.8.0/arch/arm/boot/dts/microchip/at91-sama5d29_curiosity.dts @@ -501,6 +501,7 @@ &sdmmc0 { bus-width = <4>; + no-1-8-v; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sdmmc0_default>; disable-wp; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts +++ linux-xilinx-6.8.0/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts @@ -293,7 +293,7 @@ regulator-state-standby { regulator-on-in-suspend; - regulator-suspend-voltage = <1150000>; + regulator-suspend-microvolt = <1150000>; regulator-mode = <4>; }; @@ -314,7 +314,7 @@ regulator-state-standby { regulator-on-in-suspend; - regulator-suspend-voltage = <1050000>; + regulator-suspend-microvolt = <1050000>; regulator-mode = <4>; }; @@ -331,7 +331,7 @@ regulator-always-on; regulator-state-standby { - regulator-suspend-voltage = <1800000>; + regulator-suspend-microvolt = <1800000>; regulator-on-in-suspend; }; @@ -346,7 +346,7 @@ regulator-max-microvolt = <3700000>; regulator-state-standby { - regulator-suspend-voltage = <1800000>; + regulator-suspend-microvolt = <1800000>; regulator-on-in-suspend; }; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/microchip/sam9x60.dtsi +++ linux-xilinx-6.8.0/arch/arm/boot/dts/microchip/sam9x60.dtsi @@ -186,6 +186,7 @@ dma-names = "tx", "rx"; clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; clock-names = "usart"; + atmel,usart-mode = ; atmel,use-dma-rx; atmel,use-dma-tx; atmel,fifo-size = <16>; @@ -384,6 +385,7 @@ dma-names = "tx", "rx"; clocks = <&pmc PMC_TYPE_PERIPHERAL 32>; clock-names = "usart"; + atmel,usart-mode = ; atmel,use-dma-rx; atmel,use-dma-tx; atmel,fifo-size = <16>; @@ -433,6 +435,7 @@ dma-names = "tx", "rx"; clocks = <&pmc PMC_TYPE_PERIPHERAL 33>; clock-names = "usart"; + atmel,usart-mode = ; atmel,use-dma-rx; atmel,use-dma-tx; atmel,fifo-size = <16>; @@ -590,6 +593,7 @@ dma-names = "tx", "rx"; clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; clock-names = "usart"; + atmel,usart-mode = ; atmel,use-dma-rx; atmel,use-dma-tx; atmel,fifo-size = <16>; @@ -639,6 +643,7 @@ dma-names = "tx", "rx"; clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; clock-names = "usart"; + atmel,usart-mode = ; atmel,use-dma-rx; atmel,use-dma-tx; atmel,fifo-size = <16>; @@ -688,6 +693,7 @@ dma-names = "tx", "rx"; clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; clock-names = "usart"; + atmel,usart-mode = ; atmel,use-dma-rx; atmel,use-dma-tx; atmel,fifo-size = <16>; @@ -737,6 +743,7 @@ dma-names = "tx", "rx"; clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; clock-names = "usart"; + atmel,usart-mode = ; atmel,use-dma-rx; atmel,use-dma-tx; atmel,fifo-size = <16>; @@ -805,6 +812,7 @@ dma-names = "tx", "rx"; clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; clock-names = "usart"; + atmel,usart-mode = ; atmel,use-dma-rx; atmel,use-dma-tx; atmel,fifo-size = <16>; @@ -873,6 +881,7 @@ dma-names = "tx", "rx"; clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; clock-names = "usart"; + atmel,usart-mode = ; atmel,use-dma-rx; atmel,use-dma-tx; atmel,fifo-size = <16>; @@ -941,6 +950,7 @@ dma-names = "tx", "rx"; clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; clock-names = "usart"; + atmel,usart-mode = ; atmel,use-dma-rx; atmel,use-dma-tx; atmel,fifo-size = <16>; @@ -1064,6 +1074,7 @@ dma-names = "tx", "rx"; clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; clock-names = "usart"; + atmel,usart-mode = ; atmel,use-dma-rx; atmel,use-dma-tx; atmel,fifo-size = <16>; @@ -1113,6 +1124,7 @@ dma-names = "tx", "rx"; clocks = <&pmc PMC_TYPE_PERIPHERAL 16>; clock-names = "usart"; + atmel,usart-mode = ; atmel,use-dma-rx; atmel,use-dma-tx; atmel,fifo-size = <16>; @@ -1312,7 +1324,7 @@ compatible = "microchip,sam9x60-rtt", "atmel,at91sam9260-rtt"; reg = <0xfffffe20 0x20>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&clk32k 0>; + clocks = <&clk32k 1>; }; pit: timer@fffffe40 { @@ -1338,7 +1350,7 @@ compatible = "microchip,sam9x60-rtc", "atmel,at91sam9x5-rtc"; reg = <0xfffffea8 0x100>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&clk32k 0>; + clocks = <&clk32k 1>; }; watchdog: watchdog@ffffff80 { --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/microchip/sama7g5.dtsi +++ linux-xilinx-6.8.0/arch/arm/boot/dts/microchip/sama7g5.dtsi @@ -272,7 +272,7 @@ compatible = "microchip,sama7g5-rtt", "microchip,sam9x60-rtt", "atmel,at91sam9260-rtt"; reg = <0xe001d020 0x30>; interrupts = ; - clocks = <&clk32k 0>; + clocks = <&clk32k 1>; }; clk32k: clock-controller@e001d050 { --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi +++ linux-xilinx-6.8.0/arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi @@ -117,17 +117,9 @@ #address-cells = <1>; #size-cells = <0>; - phy_port2: phy@1 { - reg = <1>; - }; - - phy_port3: phy@2 { - reg = <2>; - }; - switch@10 { compatible = "qca,qca8334"; - reg = <10>; + reg = <0x10>; reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; switch_ports: ports { @@ -149,15 +141,30 @@ eth2: port@2 { reg = <2>; label = "eth2"; + phy-mode = "internal"; phy-handle = <&phy_port2>; }; eth1: port@3 { reg = <3>; label = "eth1"; + phy-mode = "internal"; phy-handle = <&phy_port3>; }; }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port2: ethernet-phy@1 { + reg = <1>; + }; + + phy_port3: ethernet-phy@2 { + reg = <2>; + }; + }; }; }; }; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/nxp/imx/imx6dl-yapp43-common.dtsi +++ linux-xilinx-6.8.0/arch/arm/boot/dts/nxp/imx/imx6dl-yapp43-common.dtsi @@ -274,24 +274,24 @@ led@0 { chan-name = "R"; - led-cur = /bits/ 8 <0x20>; - max-cur = /bits/ 8 <0x60>; + led-cur = /bits/ 8 <0x6e>; + max-cur = /bits/ 8 <0xc8>; reg = <0>; color = ; }; led@1 { chan-name = "G"; - led-cur = /bits/ 8 <0x20>; - max-cur = /bits/ 8 <0x60>; + led-cur = /bits/ 8 <0xbe>; + max-cur = /bits/ 8 <0xc8>; reg = <1>; color = ; }; led@2 { chan-name = "B"; - led-cur = /bits/ 8 <0x20>; - max-cur = /bits/ 8 <0x60>; + led-cur = /bits/ 8 <0xbe>; + max-cur = /bits/ 8 <0xc8>; reg = <2>; color = ; }; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/nxp/imx/imx6q-kontron-samx6i.dtsi +++ linux-xilinx-6.8.0/arch/arm/boot/dts/nxp/imx/imx6q-kontron-samx6i.dtsi @@ -5,31 +5,8 @@ #include "imx6q.dtsi" #include "imx6qdl-kontron-samx6i.dtsi" -#include / { model = "Kontron SMARC sAMX6i Quad/Dual"; compatible = "kontron,imx6q-samx6i", "fsl,imx6q"; }; - -/* Quad/Dual SoMs have 3 chip-select signals */ -&ecspi4 { - cs-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>, - <&gpio3 29 GPIO_ACTIVE_LOW>, - <&gpio3 25 GPIO_ACTIVE_LOW>; -}; - -&pinctrl_ecspi4 { - fsl,pins = < - MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1 - MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1 - MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1 - - /* SPI4_IMX_CS2# - connected to internal flash */ - MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x1b0b0 - /* SPI4_IMX_CS0# - connected to SMARC SPI0_CS0# */ - MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0 - /* SPI4_CS3# - connected to SMARC SPI0_CS1# */ - MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x1b0b0 - >; -}; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi +++ linux-xilinx-6.8.0/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi @@ -244,7 +244,8 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi4>; cs-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>, - <&gpio3 29 GPIO_ACTIVE_LOW>; + <&gpio3 29 GPIO_ACTIVE_LOW>, + <&gpio3 25 GPIO_ACTIVE_LOW>; status = "okay"; /* default boot source: workaround #1 for errata ERR006282 */ @@ -259,7 +260,7 @@ &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; - phy-mode = "rgmii"; + phy-connection-type = "rgmii-id"; phy-handle = <ðphy>; mdio { @@ -269,7 +270,7 @@ ethphy: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <1>; - reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; + reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; reset-assert-us = <1000>; }; }; @@ -464,6 +465,8 @@ MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x1b0b0 /* SPI_IMX_CS0# - connected to SMARC SPI0_CS0# */ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0 + /* SPI4_CS3# - connected to SMARC SPI0_CS1# */ + MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x1b0b0 >; }; @@ -516,7 +519,7 @@ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 - MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0 /* RST_GBE0_PHY# */ + MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 /* RST_GBE0_PHY# */ >; }; @@ -729,7 +732,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcie>; wake-up-gpio = <&gpio6 18 GPIO_ACTIVE_HIGH>; - reset-gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>; + reset-gpio = <&gpio3 13 GPIO_ACTIVE_LOW>; }; /* LCD_BKLT_PWM */ @@ -817,5 +820,6 @@ /* CPLD is feeded by watchdog (hardwired) */ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_wdog1>; + fsl,ext-reset-output; status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts +++ linux-xilinx-6.8.0/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts @@ -366,7 +366,7 @@ }; pinctrl_tsc: tscgrp { - fsl,pin = < + fsl,pins = < MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0 MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0 MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0 --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-common.dtsi +++ linux-xilinx-6.8.0/arch/arm/boot/dts/nxp/imx/imx6ull-tarragon-common.dtsi @@ -805,6 +805,7 @@ &pinctrl_usb_pwr>; dr_mode = "host"; power-active-high; + over-current-active-low; disable-over-current; status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi +++ linux-xilinx-6.8.0/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi @@ -132,6 +132,7 @@ lm75a: temperature-sensor@48 { compatible = "national,lm75a"; reg = <0x48>; + vs-supply = <&vgen4_reg>; }; /* NXP SE97BTP with temperature sensor + eeprom, TQMa7x 02xx */ --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/nxp/imx/imx7d-zii-rmu2.dts +++ linux-xilinx-6.8.0/arch/arm/boot/dts/nxp/imx/imx7d-zii-rmu2.dts @@ -350,7 +350,7 @@ &iomuxc_lpsr { pinctrl_enet1_phy_interrupt: enet1phyinterruptgrp { - fsl,phy = < + fsl,pins = < MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x08 >; }; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/nxp/imx/imx7s-warp.dts +++ linux-xilinx-6.8.0/arch/arm/boot/dts/nxp/imx/imx7s-warp.dts @@ -210,6 +210,7 @@ remote-endpoint = <&mipi_from_sensor>; clock-lanes = <0>; data-lanes = <1>; + link-frequencies = /bits/ 64 <330000000>; }; }; }; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/nxp/imx/imxrt1050.dtsi +++ linux-xilinx-6.8.0/arch/arm/boot/dts/nxp/imx/imxrt1050.dtsi @@ -87,7 +87,7 @@ reg = <0x402c0000 0x4000>; interrupts = <110>; clocks = <&clks IMXRT1050_CLK_IPG_PDOF>, - <&clks IMXRT1050_CLK_OSC>, + <&clks IMXRT1050_CLK_AHB_PODF>, <&clks IMXRT1050_CLK_USDHC1>; clock-names = "ipg", "ahb", "per"; bus-width = <4>; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-common.dtsi +++ linux-xilinx-6.8.0/arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-common.dtsi @@ -287,6 +287,10 @@ status = "okay"; }; +&smbb { + status = "okay"; +}; + &usb { extcon = <&smbb>; dr_mode = "peripheral"; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi +++ linux-xilinx-6.8.0/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi @@ -1234,7 +1234,7 @@ qfprom: qfprom@fc4bc000 { compatible = "qcom,msm8974-qfprom", "qcom,qfprom"; - reg = <0xfc4bc000 0x1000>; + reg = <0xfc4bc000 0x2100>; #address-cells = <1>; #size-cells = <1>; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/renesas/r7s72100-genmai.dts +++ linux-xilinx-6.8.0/arch/arm/boot/dts/renesas/r7s72100-genmai.dts @@ -53,7 +53,7 @@ partition@4000000 { label = "user1"; - reg = <0x04000000 0x40000000>; + reg = <0x04000000 0x04000000>; }; }; }; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/renesas/r8a73a4-ape6evm.dts +++ linux-xilinx-6.8.0/arch/arm/boot/dts/renesas/r8a73a4-ape6evm.dts @@ -209,6 +209,18 @@ status = "okay"; }; +&extal1_clk { + clock-frequency = <26000000>; +}; + +&extal2_clk { + clock-frequency = <48000000>; +}; + +&extalr_clk { + clock-frequency = <32768>; +}; + &pfc { scifa0_pins: scifa0 { groups = "scifa0_data"; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/renesas/r8a73a4.dtsi +++ linux-xilinx-6.8.0/arch/arm/boot/dts/renesas/r8a73a4.dtsi @@ -450,17 +450,20 @@ extalr_clk: extalr { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <32768>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; }; extal1_clk: extal1 { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <25000000>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; }; extal2_clk: extal2 { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <48000000>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; }; fsiack_clk: fsiack { compatible = "fixed-clock"; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/rockchip/rk3036-kylin.dts +++ linux-xilinx-6.8.0/arch/arm/boot/dts/rockchip/rk3036-kylin.dts @@ -325,8 +325,8 @@ &i2c2 { status = "okay"; - rt5616: rt5616@1b { - compatible = "rt5616"; + rt5616: audio-codec@1b { + compatible = "realtek,rt5616"; reg = <0x1b>; clocks = <&cru SCLK_I2S_OUT>; clock-names = "mclk"; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/rockchip/rk3036.dtsi +++ linux-xilinx-6.8.0/arch/arm/boot/dts/rockchip/rk3036.dtsi @@ -384,12 +384,13 @@ }; }; - acodec: acodec-ana@20030000 { - compatible = "rk3036-codec"; + acodec: audio-codec@20030000 { + compatible = "rockchip,rk3036-codec"; reg = <0x20030000 0x4000>; - rockchip,grf = <&grf>; clock-names = "acodec_pclk"; clocks = <&cru PCLK_ACODEC>; + rockchip,grf = <&grf>; + #sound-dai-cells = <0>; status = "disabled"; }; @@ -399,7 +400,6 @@ interrupts = ; clocks = <&cru PCLK_HDMI>; clock-names = "pclk"; - rockchip,grf = <&grf>; pinctrl-names = "default"; pinctrl-0 = <&hdmi_ctl>; status = "disabled"; @@ -552,11 +552,11 @@ }; spi: spi@20074000 { - compatible = "rockchip,rockchip-spi"; + compatible = "rockchip,rk3036-spi"; reg = <0x20074000 0x1000>; interrupts = ; - clocks = <&cru PCLK_SPI>, <&cru SCLK_SPI>; - clock-names = "apb-pclk","spi_pclk"; + clocks = <&cru SCLK_SPI>, <&cru PCLK_SPI>; + clock-names = "spiclk", "apb_pclk"; dmas = <&pdma 8>, <&pdma 9>; dma-names = "tx", "rx"; pinctrl-names = "default"; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/rockchip/rk3066a.dtsi +++ linux-xilinx-6.8.0/arch/arm/boot/dts/rockchip/rk3066a.dtsi @@ -128,6 +128,7 @@ pinctrl-0 = <&hdmii2c_xfer>, <&hdmi_hpd>; power-domains = <&power RK3066_PD_VIO>; rockchip,grf = <&grf>; + #sound-dai-cells = <0>; status = "disabled"; ports { --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/rockchip/rk322x.dtsi +++ linux-xilinx-6.8.0/arch/arm/boot/dts/rockchip/rk322x.dtsi @@ -736,14 +736,20 @@ status = "disabled"; ports { - hdmi_in: port { - #address-cells = <1>; - #size-cells = <0>; - hdmi_in_vop: endpoint@0 { - reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + hdmi_in: port@0 { + reg = <0>; + + hdmi_in_vop: endpoint { remote-endpoint = <&vop_out_hdmi>; }; }; + + hdmi_out: port@1 { + reg = <1>; + }; }; }; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/rockchip/rk3288.dtsi +++ linux-xilinx-6.8.0/arch/arm/boot/dts/rockchip/rk3288.dtsi @@ -1240,27 +1240,37 @@ compatible = "rockchip,rk3288-dw-hdmi"; reg = <0x0 0xff980000 0x0 0x20000>; reg-io-width = <4>; - #sound-dai-cells = <0>; - rockchip,grf = <&grf>; interrupts = ; clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>, <&cru SCLK_HDMI_CEC>; clock-names = "iahb", "isfr", "cec"; power-domains = <&power RK3288_PD_VIO>; + rockchip,grf = <&grf>; + #sound-dai-cells = <0>; status = "disabled"; ports { - hdmi_in: port { + #address-cells = <1>; + #size-cells = <0>; + + hdmi_in: port@0 { + reg = <0>; #address-cells = <1>; #size-cells = <0>; + hdmi_in_vopb: endpoint@0 { reg = <0>; remote-endpoint = <&vopb_out_hdmi>; }; + hdmi_in_vopl: endpoint@1 { reg = <1>; remote-endpoint = <&vopl_out_hdmi>; }; }; + + hdmi_out: port@1 { + reg = <1>; + }; }; }; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/samsung/exynos4210-smdkv310.dts +++ linux-xilinx-6.8.0/arch/arm/boot/dts/samsung/exynos4210-smdkv310.dts @@ -88,7 +88,7 @@ &keypad { samsung,keypad-num-rows = <2>; samsung,keypad-num-columns = <8>; - linux,keypad-no-autorepeat; + linux,input-no-autorepeat; wakeup-source; pinctrl-names = "default"; pinctrl-0 = <&keypad_rows &keypad_cols>; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/samsung/exynos4412-origen.dts +++ linux-xilinx-6.8.0/arch/arm/boot/dts/samsung/exynos4412-origen.dts @@ -453,7 +453,7 @@ &keypad { samsung,keypad-num-rows = <3>; samsung,keypad-num-columns = <2>; - linux,keypad-no-autorepeat; + linux,input-no-autorepeat; wakeup-source; pinctrl-0 = <&keypad_rows &keypad_cols>; pinctrl-names = "default"; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/samsung/exynos4412-smdk4412.dts +++ linux-xilinx-6.8.0/arch/arm/boot/dts/samsung/exynos4412-smdk4412.dts @@ -69,7 +69,7 @@ &keypad { samsung,keypad-num-rows = <3>; samsung,keypad-num-columns = <8>; - linux,keypad-no-autorepeat; + linux,input-no-autorepeat; wakeup-source; pinctrl-0 = <&keypad_rows &keypad_cols>; pinctrl-names = "default"; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/st/stm32mp151.dtsi +++ linux-xilinx-6.8.0/arch/arm/boot/dts/st/stm32mp151.dtsi @@ -50,6 +50,7 @@ , ; interrupt-parent = <&intc>; + arm,no-tick-in-suspend; }; clocks { @@ -1164,7 +1165,7 @@ reg = <0x4c001000 0x400>; st,proc-id = <0>; interrupts-extended = - <&exti 61 1>, + <&exti 61 IRQ_TYPE_LEVEL_HIGH>, <&intc GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "rx", "tx"; clocks = <&rcc IPCC>; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/st/stm32mp15xx-dhcom-drc02.dtsi +++ linux-xilinx-6.8.0/arch/arm/boot/dts/st/stm32mp15xx-dhcom-drc02.dtsi @@ -6,18 +6,6 @@ #include #include -/ { - aliases { - serial0 = &uart4; - serial1 = &usart3; - serial2 = &uart8; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - &adc { status = "disabled"; }; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi +++ linux-xilinx-6.8.0/arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi @@ -7,16 +7,6 @@ #include / { - aliases { - serial0 = &uart4; - serial1 = &usart3; - serial2 = &uart8; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - clk_ext_audio_codec: clock-codec { compatible = "fixed-clock"; #clock-cells = <0>; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/st/stm32mp15xx-dhcom-picoitx.dtsi +++ linux-xilinx-6.8.0/arch/arm/boot/dts/st/stm32mp15xx-dhcom-picoitx.dtsi @@ -7,16 +7,6 @@ #include / { - aliases { - serial0 = &uart4; - serial1 = &usart3; - serial2 = &uart8; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - led { compatible = "gpio-leds"; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi +++ linux-xilinx-6.8.0/arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi @@ -14,6 +14,13 @@ ethernet1 = &ksz8851; rtc0 = &hwrtc; rtc1 = &rtc; + serial0 = &uart4; + serial1 = &uart8; + serial2 = &usart3; + }; + + chosen { + stdout-path = "serial0:115200n8"; }; memory@c0000000 { --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/ti/omap/dra7-l4.dtsi +++ linux-xilinx-6.8.0/arch/arm/boot/dts/ti/omap/dra7-l4.dtsi @@ -12,6 +12,7 @@ ranges = <0x00000000 0x4a000000 0x100000>, /* segment 0 */ <0x00100000 0x4a100000 0x100000>, /* segment 1 */ <0x00200000 0x4a200000 0x100000>; /* segment 2 */ + dma-ranges; segment@0 { /* 0x4a000000 */ compatible = "simple-pm-bus"; @@ -557,6 +558,7 @@ <0x0007e000 0x0017e000 0x001000>, /* ap 124 */ <0x00059000 0x00159000 0x001000>, /* ap 125 */ <0x0005a000 0x0015a000 0x001000>; /* ap 126 */ + dma-ranges; target-module@2000 { /* 0x4a102000, ap 27 3c.0 */ compatible = "ti,sysc"; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/ti/omap/omap3-gta04.dtsi +++ linux-xilinx-6.8.0/arch/arm/boot/dts/ti/omap/omap3-gta04.dtsi @@ -446,6 +446,7 @@ pinctrl-names = "default"; pinctrl-0 = < &hsusb2_2_pins + &mcspi3hog_pins >; hsusb2_2_pins: hsusb2-2-pins { @@ -459,6 +460,15 @@ >; }; + mcspi3hog_pins: mcspi3hog-pins { + pinctrl-single,pins = < + OMAP3630_CORE2_IOPAD(0x25dc, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* etk_d0 */ + OMAP3630_CORE2_IOPAD(0x25de, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* etk_d1 */ + OMAP3630_CORE2_IOPAD(0x25e0, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* etk_d2 */ + OMAP3630_CORE2_IOPAD(0x25e2, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* etk_d3 */ + >; + }; + spi_gpio_pins: spi-gpio-pinmux-pins { pinctrl-single,pins = < OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE4) /* clk */ --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/ti/omap/omap3-n900.dts +++ linux-xilinx-6.8.0/arch/arm/boot/dts/ti/omap/omap3-n900.dts @@ -781,7 +781,7 @@ mount-matrix = "-1", "0", "0", "0", "1", "0", - "0", "0", "1"; + "0", "0", "-1"; }; cam1: camera@3e { --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/ti/omap/omap36xx.dtsi +++ linux-xilinx-6.8.0/arch/arm/boot/dts/ti/omap/omap36xx.dtsi @@ -72,6 +72,7 @@ <1375000 1375000 1375000>; /* only on am/dm37x with speed-binned bit set */ opp-supported-hw = <0xffffffff 2>; + turbo-mode; }; }; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/xilinx/zynq-7000.dtsi +++ linux-xilinx-6.8.0/arch/arm/boot/dts/xilinx/zynq-7000.dtsi @@ -1,6 +1,9 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2011 - 2014 Xilinx + * Xilinx Zynq 7000 DTSI + * Describes the hardware common to all Zynq 7000-based boards. + * + * Copyright (C) 2011 - 2015 Xilinx */ / { @@ -8,6 +11,13 @@ #size-cells = <1>; compatible = "xlnx,zynq-7000"; + options { + u-boot { + compatible = "u-boot,config"; + bootscr-address = /bits/ 64 <0x3000000>; + }; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -34,7 +44,7 @@ }; }; - fpga_full: fpga-full { + fpga_full: fpga-region { compatible = "fpga-region"; fpga-mgr = <&devcfg>; #address-cells = <1>; @@ -93,6 +103,7 @@ }; amba: axi { + bootph-all; compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; @@ -190,6 +201,17 @@ reg = <0xf8006000 0x1000>; }; + ocm: sram@fffc0000 { + compatible = "mmio-sram"; + reg = <0xfffc0000 0x10000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xfffc0000 0x10000>; + ocm-sram@0 { + reg = <0x0 0x10000>; + }; + }; + uart0: serial@e0000000 { compatible = "xlnx,xuartps", "cdns,uart-r1p8"; status = "disabled"; @@ -277,13 +299,18 @@ 0x2 0x0 0xe4000000 0x2000000>; /* SRAM/NOR CS1 region */ #address-cells = <2>; #size-cells = <1>; + interrupt-parent = <&intc>; + interrupts = <0 18 4>; nfc0: nand-controller@0,0 { compatible = "arm,pl353-nand-r2p1"; reg = <0 0 0x1000000>; status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; + }; + nor0: flash@1,0 { + status = "disabled"; + compatible = "cfi-flash"; + reg = <1 0 0x2000000>; }; }; @@ -308,15 +335,17 @@ }; slcr: slcr@f8000000 { + bootph-all; #address-cells = <1>; #size-cells = <1>; compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd"; reg = <0xF8000000 0x1000>; ranges; clkc: clkc@100 { + bootph-all; #clock-cells = <1>; compatible = "xlnx,ps7-clkc"; - fclk-enable = <0>; + fclk-enable = <0xf>; clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci", "lqspi", "smc", "pcap", "gem0", "gem1", @@ -368,11 +397,16 @@ reg = <0xf8007000 0x100>; interrupt-parent = <&intc>; interrupts = <0 8 4>; - clocks = <&clkc 12>; - clock-names = "ref_clk"; + clocks = <&clkc 12>, <&clkc 15>, <&clkc 16>, <&clkc 17>, <&clkc 18>; + clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3"; syscon = <&slcr>; }; + efuse: efuse@f800d000 { + compatible = "xlnx,zynq-efuse"; + reg = <0xf800d000 0x20>; + }; + global_timer: timer@f8f00200 { compatible = "arm,cortex-a9-global-timer"; reg = <0xf8f00200 0x20>; @@ -398,6 +432,7 @@ }; scutimer: timer@f8f00600 { + bootph-all; interrupt-parent = <&intc>; interrupts = <1 13 0x301>; compatible = "arm,cortex-a9-twd-timer"; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/xilinx/zynq-cc108.dts +++ linux-xilinx-6.8.0/arch/arm/boot/dts/xilinx/zynq-cc108.dts @@ -18,6 +18,7 @@ aliases { ethernet0 = &gem0; serial0 = &uart0; + spi0 = &qspi; }; chosen { @@ -48,7 +49,44 @@ ethernet_phy: ethernet-phy@1 { reg = <1>; - device_type = "ethernet-phy"; + }; +}; + +&qspi { + status = "okay"; + num-cs = <1>; + flash@0 { /* 16 MB */ + compatible = "n25q128a11", "jedec,spi-nor"; + reg = <0x0>; + spi-max-frequency = <50000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "qspi-fsbl-uboot-bs"; + reg = <0x0 0x400000>; /* 4MB */ + }; + partition@400000 { + label = "qspi-linux"; + reg = <0x400000 0x400000>; /* 4MB */ + }; + partition@800000 { + label = "qspi-rootfs"; + reg = <0x800000 0x400000>; /* 4MB */ + }; + partition@c00000 { + label = "qspi-devicetree"; + reg = <0xc00000 0x100000>; /* 1MB */ + }; + partition@d00000 { + label = "qspi-scratch"; + reg = <0xd00000 0x200000>; /* 2MB */ + }; + partition@f00000 { + label = "qspi-uboot-env"; + reg = <0xf00000 0x100000>; /* 1MB */ + }; }; }; @@ -59,6 +97,7 @@ }; &uart0 { + bootph-all; status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/xilinx/zynq-ebaz4205.dts +++ linux-xilinx-6.8.0/arch/arm/boot/dts/xilinx/zynq-ebaz4205.dts @@ -50,6 +50,8 @@ &nfc0 { status = "okay"; + #address-cells = <1>; + #size-cells = <0>; nand@0 { reg = <0>; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/xilinx/zynq-parallella.dts +++ linux-xilinx-6.8.0/arch/arm/boot/dts/xilinx/zynq-parallella.dts @@ -46,7 +46,6 @@ compatible = "ethernet-phy-id0141.0e90", "ethernet-phy-ieee802.3-c22"; reg = <0>; - device_type = "ethernet-phy"; marvell,reg-init = <0x3 0x10 0xff00 0x1e>, <0x3 0x11 0xfff0 0xa>; }; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/xilinx/zynq-zc702.dts +++ linux-xilinx-6.8.0/arch/arm/boot/dts/xilinx/zynq-zc702.dts @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2011 - 2014 Xilinx + * Copyright (C) 2011 - 2015 Xilinx * Copyright (C) 2012 National Instruments Corp. */ /dts-v1/; @@ -15,7 +15,11 @@ ethernet0 = &gem0; i2c0 = &i2c0; serial0 = &uart1; + spi0 = &qspi; mmc0 = &sdhci0; + usb0 = &usb0; + nvmem0 = &eeprom; + rtc0 = &rtc; }; memory@0 { @@ -57,22 +61,12 @@ }; }; - usb_phy0: phy0 { - compatible = "usb-nop-xceiv"; + usb_phy0: phy0@e0002000 { + compatible = "ulpi-phy"; #phy-cells = <0>; - }; -}; - -&amba { - ocm: sram@fffc0000 { - compatible = "mmio-sram"; - reg = <0xfffc0000 0x10000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0xfffc0000 0x10000>; - ocm-sram@0 { - reg = <0x0 0x10000>; - }; + reg = <0xe0002000 0x1000>; + view-port = <0x0170>; + drv-vbus; }; }; @@ -92,10 +86,11 @@ phy-handle = <ðernet_phy>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gem0_default>; + phy-reset-gpio = <&gpio0 11 0>; + phy-reset-active-low; ethernet_phy: ethernet-phy@7 { reg = <7>; - device_type = "ethernet-phy"; }; }; @@ -152,7 +147,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <2>; - eeprom@54 { + eeprom: eeprom@54 { compatible = "atmel,24c08"; reg = <0x54>; }; @@ -174,7 +169,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <4>; - rtc@51 { + rtc: rtc@51 { compatible = "nxp,pcf8563"; reg = <0x51>; }; @@ -210,7 +205,7 @@ conf { groups = "can0_9_grp"; slew-rate = <0>; - io-standard = <1>; + power-source = <1>; }; conf-rx { @@ -233,7 +228,7 @@ conf { groups = "ethernet0_0_grp"; slew-rate = <0>; - io-standard = <4>; + power-source = <4>; }; conf-rx { @@ -256,7 +251,7 @@ conf-mdio { groups = "mdio0_0_grp"; slew-rate = <0>; - io-standard = <1>; + power-source = <1>; bias-disable; }; }; @@ -274,7 +269,7 @@ "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp", "gpio0_13_grp", "gpio0_14_grp"; slew-rate = <0>; - io-standard = <1>; + power-source = <1>; }; conf-pull-up { @@ -298,11 +293,11 @@ groups = "i2c0_10_grp"; bias-pull-up; slew-rate = <0>; - io-standard = <1>; + power-source = <1>; }; }; - pinctrl_i2c0_gpio: i2c0-gpio { + pinctrl_i2c0_gpio: i2c0-gpio-grp { mux { groups = "gpio0_50_grp", "gpio0_51_grp"; function = "gpio0"; @@ -311,7 +306,7 @@ conf { groups = "gpio0_50_grp", "gpio0_51_grp"; slew-rate = <0>; - io-standard = <1>; + power-source = <1>; }; }; @@ -324,7 +319,7 @@ conf { groups = "sdio0_2_grp"; slew-rate = <0>; - io-standard = <1>; + power-source = <1>; bias-disable; }; @@ -338,7 +333,7 @@ bias-high-impedance; bias-pull-up; slew-rate = <0>; - io-standard = <1>; + power-source = <1>; }; mux-wp { @@ -351,7 +346,7 @@ bias-high-impedance; bias-pull-up; slew-rate = <0>; - io-standard = <1>; + power-source = <1>; }; }; @@ -364,7 +359,7 @@ conf { groups = "uart1_10_grp"; slew-rate = <0>; - io-standard = <1>; + power-source = <1>; }; conf-rx { @@ -387,7 +382,7 @@ conf { groups = "usb0_0_grp"; slew-rate = <0>; - io-standard = <1>; + power-source = <1>; }; conf-rx { @@ -403,13 +398,53 @@ }; }; +&qspi { + bootph-all; + status = "okay"; + num-cs = <1>; + flash@0 { + compatible = "n25q128a11", "jedec,spi-nor"; + reg = <0x0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + spi-max-frequency = <50000000>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "qspi-fsbl-uboot"; + reg = <0x0 0x100000>; + }; + partition@100000 { + label = "qspi-linux"; + reg = <0x100000 0x500000>; + }; + partition@600000 { + label = "qspi-device-tree"; + reg = <0x600000 0x20000>; + }; + partition@620000 { + label = "qspi-rootfs"; + reg = <0x620000 0x5e0000>; + }; + partition@c00000 { + label = "qspi-bitstream"; + reg = <0xc00000 0x400000>; + }; + }; + }; +}; + &sdhci0 { + bootph-all; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sdhci0_default>; }; &uart1 { + bootph-all; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1_default>; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/xilinx/zynq-zc706.dts +++ linux-xilinx-6.8.0/arch/arm/boot/dts/xilinx/zynq-zc706.dts @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2011 - 2014 Xilinx + * Copyright (C) 2011 - 2015 Xilinx * Copyright (C) 2012 National Instruments Corp. */ /dts-v1/; @@ -14,7 +14,10 @@ ethernet0 = &gem0; i2c0 = &i2c0; serial0 = &uart1; + spi0 = &qspi; mmc0 = &sdhci0; + nvmem0 = &eeprom; + rtc0 = &rtc; }; memory@0 { @@ -27,9 +30,12 @@ stdout-path = "serial0:115200n8"; }; - usb_phy0: phy0 { - compatible = "usb-nop-xceiv"; + usb_phy0: phy0@e0002000 { + compatible = "ulpi-phy"; #phy-cells = <0>; + reg = <0xe0002000 0x1000>; + view-port = <0x0170>; + drv-vbus; }; }; @@ -46,7 +52,6 @@ ethernet_phy: ethernet-phy@7 { reg = <7>; - device_type = "ethernet-phy"; }; }; @@ -100,7 +105,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <2>; - eeprom@54 { + eeprom: eeprom@54 { compatible = "atmel,24c08"; reg = <0x54>; }; @@ -122,7 +127,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <4>; - rtc@51 { + rtc: rtc@51 { compatible = "nxp,pcf8563"; reg = <0x51>; }; @@ -150,7 +155,7 @@ conf { groups = "ethernet0_0_grp"; slew-rate = <0>; - io-standard = <4>; + power-source = <4>; }; conf-rx { @@ -173,7 +178,7 @@ conf-mdio { groups = "mdio0_0_grp"; slew-rate = <0>; - io-standard = <1>; + power-source = <1>; bias-disable; }; }; @@ -187,7 +192,7 @@ conf { groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp"; slew-rate = <0>; - io-standard = <1>; + power-source = <1>; }; conf-pull-up { @@ -211,7 +216,7 @@ groups = "i2c0_10_grp"; bias-pull-up; slew-rate = <0>; - io-standard = <1>; + power-source = <1>; }; }; @@ -224,7 +229,7 @@ conf { groups = "sdio0_2_grp"; slew-rate = <0>; - io-standard = <1>; + power-source = <1>; bias-disable; }; @@ -238,7 +243,7 @@ bias-high-impedance; bias-pull-up; slew-rate = <0>; - io-standard = <1>; + power-source = <1>; }; mux-wp { @@ -251,7 +256,7 @@ bias-high-impedance; bias-pull-up; slew-rate = <0>; - io-standard = <1>; + power-source = <1>; }; }; @@ -264,7 +269,7 @@ conf { groups = "uart1_10_grp"; slew-rate = <0>; - io-standard = <1>; + power-source = <1>; }; conf-rx { @@ -287,7 +292,7 @@ conf { groups = "usb0_0_grp"; slew-rate = <0>; - io-standard = <1>; + power-source = <1>; }; conf-rx { @@ -303,13 +308,54 @@ }; }; +&qspi { + bootph-all; + status = "okay"; + num-cs = <2>; + flash@0 { + compatible = "n25q128a11", "jedec,spi-nor"; + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x1000000 0x1000000>; /* 16MB */ + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + spi-max-frequency = <50000000>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "qspi-fsbl-uboot"; + reg = <0x0 0x100000>; + }; + partition@100000 { + label = "qspi-linux"; + reg = <0x100000 0x500000>; + }; + partition@600000 { + label = "qspi-device-tree"; + reg = <0x600000 0x20000>; + }; + partition@620000 { + label = "qspi-rootfs"; + reg = <0x620000 0x5e0000>; + }; + partition@c00000 { + label = "qspi-bitstream"; + reg = <0xc00000 0x400000>; + }; + }; + }; +}; + &sdhci0 { + bootph-all; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sdhci0_default>; }; &uart1 { + bootph-all; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1_default>; @@ -322,3 +368,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb0_default>; }; + +&watchdog0 { + reset-on-timeout; +}; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/xilinx/zynq-zc770-xm010.dts +++ linux-xilinx-6.8.0/arch/arm/boot/dts/xilinx/zynq-zc770-xm010.dts @@ -15,6 +15,7 @@ ethernet0 = &gem0; i2c0 = &i2c0; serial0 = &uart1; + spi0 = &qspi; spi1 = &spi1; }; @@ -45,7 +46,6 @@ ethernet_phy: ethernet-phy@7 { reg = <7>; - device_type = "ethernet-phy"; }; }; @@ -57,7 +57,43 @@ compatible = "atmel,24c02"; reg = <0x52>; }; +}; +&qspi { + status = "okay"; + num-cs = <1>; + flash@0 { + compatible = "n25q128a11", "jedec,spi-nor"; + reg = <0x0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + spi-max-frequency = <50000000>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "qspi-fsbl-uboot"; + reg = <0x0 0x100000>; + }; + partition@100000 { + label = "qspi-linux"; + reg = <0x100000 0x500000>; + }; + partition@600000 { + label = "qspi-device-tree"; + reg = <0x600000 0x20000>; + }; + partition@620000 { + label = "qspi-rootfs"; + reg = <0x620000 0x5e0000>; + }; + partition@c00000 { + label = "qspi-bitstream"; + reg = <0xc00000 0x400000>; + }; + }; + }; }; &sdhci0 { @@ -85,6 +121,7 @@ }; &uart1 { + bootph-all; status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/xilinx/zynq-zc770-xm011.dts +++ linux-xilinx-6.8.0/arch/arm/boot/dts/xilinx/zynq-zc770-xm011.dts @@ -47,6 +47,36 @@ }; }; +&nfc0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + nand@0 { + reg = <0>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "nand-fsbl-uboot"; + reg = <0x0 0x1000000>; + }; + partition@1000000 { + label = "nand-linux"; + reg = <0x1000000 0x2000000>; + }; + partition@3000000 { + label = "nand-rootfs"; + reg = <0x3000000 0x200000>; + }; + }; + }; +}; + +&smcc { + status = "okay"; +}; + &spi0 { status = "okay"; num-cs = <4>; @@ -54,6 +84,7 @@ }; &uart1 { + bootph-all; status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/xilinx/zynq-zc770-xm012.dts +++ linux-xilinx-6.8.0/arch/arm/boot/dts/xilinx/zynq-zc770-xm012.dts @@ -53,6 +53,40 @@ }; }; +&nor0 { + status = "okay"; + bank-width = <1>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "nor-fsbl-uboot"; + reg = <0x0 0x100000>; + }; + partition@100000 { + label = "nor-linux"; + reg = <0x100000 0x500000>; + }; + partition@600000 { + label = "nor-device-tree"; + reg = <0x600000 0x20000>; + }; + partition@620000 { + label = "nor-rootfs"; + reg = <0x620000 0x5e0000>; + }; + partition@c00000 { + label = "nor-bitstream"; + reg = <0xc00000 0x400000>; + }; + }; +}; + +&smcc { + status = "okay"; +}; + &spi1 { status = "okay"; num-cs = <4>; @@ -60,5 +94,6 @@ }; &uart1 { + bootph-all; status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/xilinx/zynq-zc770-xm013.dts +++ linux-xilinx-6.8.0/arch/arm/boot/dts/xilinx/zynq-zc770-xm013.dts @@ -15,6 +15,7 @@ ethernet0 = &gem1; i2c0 = &i2c1; serial0 = &uart0; + spi0 = &qspi; spi1 = &spi0; }; @@ -40,7 +41,6 @@ ethernet_phy: ethernet-phy@7 { reg = <7>; - device_type = "ethernet-phy"; }; }; @@ -58,6 +58,44 @@ }; }; +&qspi { + status = "okay"; + num-cs = <2>; + flash@0 { + compatible = "n25q128a11", "jedec,spi-nor"; + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x1000000 0x1000000>; /* 16MB */ + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + spi-max-frequency = <50000000>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "qspi-fsbl-uboot"; + reg = <0x0 0x100000>; + }; + partition@100000 { + label = "qspi-linux"; + reg = <0x100000 0x500000>; + }; + partition@600000 { + label = "qspi-device-tree"; + reg = <0x600000 0x20000>; + }; + partition@620000 { + label = "qspi-rootfs"; + reg = <0x620000 0x5e0000>; + }; + partition@c00000 { + label = "qspi-bitstream"; + reg = <0xc00000 0x400000>; + }; + }; + }; +}; + &spi0 { status = "okay"; num-cs = <4>; @@ -73,5 +111,6 @@ }; &uart0 { + bootph-all; status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/xilinx/zynq-zed.dts +++ linux-xilinx-6.8.0/arch/arm/boot/dts/xilinx/zynq-zed.dts @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2011 - 2014 Xilinx + * Copyright (C) 2011 - 2015 Xilinx * Copyright (C) 2012 National Instruments Corp. */ /dts-v1/; @@ -13,6 +13,7 @@ aliases { ethernet0 = &gem0; serial0 = &uart1; + spi0 = &qspi; mmc0 = &sdhci0; }; @@ -26,9 +27,12 @@ stdout-path = "serial0:115200n8"; }; - usb_phy0: phy0 { - compatible = "usb-nop-xceiv"; + usb_phy0: phy0@e0002000 { + compatible = "ulpi-phy"; #phy-cells = <0>; + reg = <0xe0002000 0x1000>; + view-port = <0x0170>; + drv-vbus; }; }; @@ -43,15 +47,55 @@ ethernet_phy: ethernet-phy@0 { reg = <0>; - device_type = "ethernet-phy"; + }; +}; + +&qspi { + bootph-all; + status = "okay"; + num-cs = <1>; + flash@0 { + compatible = "spansion,s25fl256s1", "jedec,spi-nor"; + reg = <0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + spi-max-frequency = <50000000>; + m25p,fast-read; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "qspi-fsbl-uboot"; + reg = <0x0 0x100000>; + }; + partition@100000 { + label = "qspi-linux"; + reg = <0x100000 0x500000>; + }; + partition@600000 { + label = "qspi-device-tree"; + reg = <0x600000 0x20000>; + }; + partition@620000 { + label = "qspi-rootfs"; + reg = <0x620000 0x5e0000>; + }; + partition@c00000 { + label = "qspi-bitstream"; + reg = <0xc00000 0x400000>; + }; + }; }; }; &sdhci0 { + bootph-all; status = "okay"; }; &uart1 { + bootph-all; status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/xilinx/zynq-zybo-z7.dts +++ linux-xilinx-6.8.0/arch/arm/boot/dts/xilinx/zynq-zybo-z7.dts @@ -49,7 +49,6 @@ ethernet_phy: ethernet-phy@0 { reg = <0>; - device_type = "ethernet-phy"; }; }; --- linux-xilinx-6.8.0.orig/arch/arm/boot/dts/xilinx/zynq-zybo.dts +++ linux-xilinx-6.8.0/arch/arm/boot/dts/xilinx/zynq-zybo.dts @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2011 - 2014 Xilinx + * Copyright (C) 2011 - 2015 Xilinx * Copyright (C) 2012 National Instruments Corp. */ /dts-v1/; @@ -13,6 +13,7 @@ aliases { ethernet0 = &gem0; serial0 = &uart1; + spi0 = &qspi; mmc0 = &sdhci0; }; @@ -44,15 +45,21 @@ ethernet_phy: ethernet-phy@0 { reg = <0>; - device_type = "ethernet-phy"; }; }; +&qspi { + bootph-all; + status = "okay"; +}; + &sdhci0 { + bootph-all; status = "okay"; }; &uart1 { + bootph-all; status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm/configs/sunxi_defconfig +++ linux-xilinx-6.8.0/arch/arm/configs/sunxi_defconfig @@ -110,6 +110,7 @@ CONFIG_DRM_PANEL_SIMPLE=y CONFIG_DRM_PANEL_EDP=y CONFIG_DRM_SIMPLE_BRIDGE=y +CONFIG_DRM_DW_HDMI=y CONFIG_DRM_LIMA=y CONFIG_FB_SIMPLE=y CONFIG_BACKLIGHT_CLASS_DEVICE=y --- linux-xilinx-6.8.0.orig/arch/arm/configs/xilinx_zynq_defconfig +++ linux-xilinx-6.8.0/arch/arm/configs/xilinx_zynq_defconfig @@ -0,0 +1,229 @@ +CONFIG_LOCALVERSION="-xilinx" +CONFIG_SYSVIPC=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_PREEMPT=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_CGROUPS=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_EXPERT=y +# CONFIG_BUG is not set +CONFIG_PERF_EVENTS=y +CONFIG_ARCH_VEXPRESS=y +CONFIG_ARCH_ZYNQ=y +CONFIG_PL310_ERRATA_588369=y +CONFIG_PL310_ERRATA_727915=y +CONFIG_PL310_ERRATA_769419=y +CONFIG_ARM_ERRATA_754322=y +CONFIG_ARM_ERRATA_754327=y +CONFIG_ARM_ERRATA_764369=y +CONFIG_ARM_ERRATA_775420=y +CONFIG_SMP=y +CONFIG_SCHED_MC=y +CONFIG_SCHED_SMT=y +CONFIG_BIG_LITTLE=y +CONFIG_BL_SWITCHER=y +CONFIG_HIGHMEM=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_IDLE=y +CONFIG_ARM_ZYNQ_CPUIDLE=y +CONFIG_VFP=y +CONFIG_NEON=y +# CONFIG_GCC_PLUGINS is not set +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +# CONFIG_COMPACTION is not set +CONFIG_CMA=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +CONFIG_NET_IPIP=m +CONFIG_SYN_COOKIES=y +CONFIG_BRIDGE=m +CONFIG_VLAN_8021Q=m +CONFIG_CAN=y +CONFIG_PCI=y +CONFIG_PCI_MSI=y +CONFIG_PCIE_XILINX=y +CONFIG_UEVENT_HELPER=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_CONNECTOR=y +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_CFI=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_OF=y +CONFIG_MTD_RAW_NAND=y +CONFIG_MTD_NAND_PL35X=y +CONFIG_MTD_SPI_NOR=y +# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set +CONFIG_OF_OVERLAY=y +CONFIG_OF_CONFIGFS=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=16384 +CONFIG_EEPROM_AT24=y +CONFIG_EEPROM_AT25=y +CONFIG_SCSI=y +CONFIG_BLK_DEV_SD=y +CONFIG_CHR_DEV_SG=y +# CONFIG_BLK_DEV_BSG is not set +CONFIG_NETDEVICES=y +CONFIG_MACB=y +# CONFIG_NET_VENDOR_CIRRUS is not set +# CONFIG_NET_VENDOR_FARADAY is not set +CONFIG_E1000E=y +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +CONFIG_R8169=y +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_STMICRO is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +CONFIG_XILINX_EMACLITE=y +CONFIG_XILINX_AXI_EMAC=y +CONFIG_MARVELL_PHY=y +CONFIG_VITESSE_PHY=y +CONFIG_CAN_XILINXCAN=y +CONFIG_MDIO_BITBANG=y +CONFIG_INPUT_SPARSEKMAP=y +CONFIG_INPUT_EVDEV=y +CONFIG_KEYBOARD_GPIO=y +CONFIG_KEYBOARD_GPIO_POLLED=y +# CONFIG_LEGACY_PTYS is not set +CONFIG_SERIAL_XILINX_PS_UART=y +CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y +# CONFIG_HW_RANDOM is not set +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_PCA954x=y +CONFIG_I2C_CADENCE=y +CONFIG_SPI=y +CONFIG_SPI_CADENCE=y +CONFIG_SPI_XILINX=y +CONFIG_SPI_ZYNQ_QSPI=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_XILINX=y +CONFIG_GPIO_ZYNQ=y +CONFIG_PMBUS=y +CONFIG_SENSORS_UCD9000=y +CONFIG_SENSORS_UCD9200=y +CONFIG_THERMAL=y +CONFIG_CPU_THERMAL=y +CONFIG_WATCHDOG=y +CONFIG_XILINX_WATCHDOG=y +CONFIG_CADENCE_WATCHDOG=y +CONFIG_REGULATOR=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_VIDEO_XILINX=y +CONFIG_VIDEO_XILINX_CFA=y +CONFIG_VIDEO_XILINX_CRESAMPLE=y +CONFIG_VIDEO_XILINX_REMAPPER=y +CONFIG_VIDEO_XILINX_RGB2YUV=y +CONFIG_VIDEO_XILINX_SCALER=y +CONFIG_VIDEO_XILINX_SWITCH=y +CONFIG_VIDEO_XILINX_TPG=y +CONFIG_VIDEO_ADV7604=y +CONFIG_DRM=y +CONFIG_DRM_XLNX=y +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_SOC=y +CONFIG_SND_SOC_ADI=y +CONFIG_SND_SOC_ADI_AXI_I2S=y +CONFIG_SND_SOC_ADI_AXI_SPDIF=y +CONFIG_HID_MICROSOFT=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +# CONFIG_USB_EHCI_TT_NEWSCHED is not set +CONFIG_USB_STORAGE=y +CONFIG_USB_CHIPIDEA=y +CONFIG_USB_CHIPIDEA_UDC=y +CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_NOP_USB_XCEIV=y +CONFIG_USB_ULPI=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_XILINX=y +CONFIG_USB_CONFIGFS=m +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +CONFIG_USB_ZERO=m +CONFIG_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_OF_ARASAN=y +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_ONESHOT=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +CONFIG_LEDS_TRIGGER_CPU=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y +CONFIG_LEDS_TRIGGER_TRANSIENT=y +CONFIG_LEDS_TRIGGER_CAMERA=y +CONFIG_EDAC=y +CONFIG_EDAC_SYNOPSYS=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_PCF8563=y +CONFIG_DMADEVICES=y +CONFIG_PL330_DMA=y +CONFIG_XILINX_DMA=y +CONFIG_UIO=y +CONFIG_UIO_PDRV_GENIRQ=y +CONFIG_UIO_XILINX_APM=y +CONFIG_COMMON_CLK_SI570=y +CONFIG_REMOTEPROC=y +CONFIG_ZYNQ_REMOTEPROC=m +CONFIG_MEMORY=y +CONFIG_IIO=y +CONFIG_XILINX_XADC=y +CONFIG_XILINX_INTC=y +CONFIG_RAS=y +CONFIG_FPGA=y +CONFIG_FPGA_MGR_ZYNQ_FPGA=y +CONFIG_FPGA_MGR_ZYNQ_AFI_FPGA=y +CONFIG_FPGA_BRIDGE=y +CONFIG_XILINX_PR_DECOUPLER=y +CONFIG_FPGA_REGION=y +CONFIG_OF_FPGA_REGION=y +CONFIG_EXT3_FS=y +# CONFIG_DNOTIFY is not set +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_TMPFS=y +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_SUMMARY=y +CONFIG_NFS_FS=y +CONFIG_ROOT_NFS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_DMA_CMA=y +CONFIG_RCU_CPU_STALL_TIMEOUT=60 +# CONFIG_FTRACE is not set --- linux-xilinx-6.8.0.orig/arch/arm/crypto/aes-ce-glue.c +++ linux-xilinx-6.8.0/arch/arm/crypto/aes-ce-glue.c @@ -711,7 +711,7 @@ algname = aes_algs[i].base.cra_name + 2; drvname = aes_algs[i].base.cra_driver_name + 2; basename = aes_algs[i].base.cra_driver_name; - simd = simd_skcipher_create_compat(algname, drvname, basename); + simd = simd_skcipher_create_compat(aes_algs + i, algname, drvname, basename); err = PTR_ERR(simd); if (IS_ERR(simd)) goto unregister_simds; --- linux-xilinx-6.8.0.orig/arch/arm/crypto/aes-neonbs-glue.c +++ linux-xilinx-6.8.0/arch/arm/crypto/aes-neonbs-glue.c @@ -539,7 +539,7 @@ algname = aes_algs[i].base.cra_name + 2; drvname = aes_algs[i].base.cra_driver_name + 2; basename = aes_algs[i].base.cra_driver_name; - simd = simd_skcipher_create_compat(algname, drvname, basename); + simd = simd_skcipher_create_compat(aes_algs + i, algname, drvname, basename); err = PTR_ERR(simd); if (IS_ERR(simd)) goto unregister_simds; --- linux-xilinx-6.8.0.orig/arch/arm/crypto/sha256_glue.c +++ linux-xilinx-6.8.0/arch/arm/crypto/sha256_glue.c @@ -24,8 +24,8 @@ #include "sha256_glue.h" -asmlinkage void sha256_block_data_order(u32 *digest, const void *data, - unsigned int num_blks); +asmlinkage void sha256_block_data_order(struct sha256_state *state, + const u8 *data, int num_blks); int crypto_sha256_arm_update(struct shash_desc *desc, const u8 *data, unsigned int len) @@ -33,23 +33,20 @@ /* make sure casting to sha256_block_fn() is safe */ BUILD_BUG_ON(offsetof(struct sha256_state, state) != 0); - return sha256_base_do_update(desc, data, len, - (sha256_block_fn *)sha256_block_data_order); + return sha256_base_do_update(desc, data, len, sha256_block_data_order); } EXPORT_SYMBOL(crypto_sha256_arm_update); static int crypto_sha256_arm_final(struct shash_desc *desc, u8 *out) { - sha256_base_do_finalize(desc, - (sha256_block_fn *)sha256_block_data_order); + sha256_base_do_finalize(desc, sha256_block_data_order); return sha256_base_finish(desc, out); } int crypto_sha256_arm_finup(struct shash_desc *desc, const u8 *data, unsigned int len, u8 *out) { - sha256_base_do_update(desc, data, len, - (sha256_block_fn *)sha256_block_data_order); + sha256_base_do_update(desc, data, len, sha256_block_data_order); return crypto_sha256_arm_final(desc, out); } EXPORT_SYMBOL(crypto_sha256_arm_finup); --- linux-xilinx-6.8.0.orig/arch/arm/crypto/sha512-glue.c +++ linux-xilinx-6.8.0/arch/arm/crypto/sha512-glue.c @@ -25,27 +25,25 @@ MODULE_ALIAS_CRYPTO("sha384-arm"); MODULE_ALIAS_CRYPTO("sha512-arm"); -asmlinkage void sha512_block_data_order(u64 *state, u8 const *src, int blocks); +asmlinkage void sha512_block_data_order(struct sha512_state *state, + u8 const *src, int blocks); int sha512_arm_update(struct shash_desc *desc, const u8 *data, unsigned int len) { - return sha512_base_do_update(desc, data, len, - (sha512_block_fn *)sha512_block_data_order); + return sha512_base_do_update(desc, data, len, sha512_block_data_order); } static int sha512_arm_final(struct shash_desc *desc, u8 *out) { - sha512_base_do_finalize(desc, - (sha512_block_fn *)sha512_block_data_order); + sha512_base_do_finalize(desc, sha512_block_data_order); return sha512_base_finish(desc, out); } int sha512_arm_finup(struct shash_desc *desc, const u8 *data, unsigned int len, u8 *out) { - sha512_base_do_update(desc, data, len, - (sha512_block_fn *)sha512_block_data_order); + sha512_base_do_update(desc, data, len, sha512_block_data_order); return sha512_arm_final(desc, out); } --- linux-xilinx-6.8.0.orig/arch/arm/include/asm/mman.h +++ linux-xilinx-6.8.0/arch/arm/include/asm/mman.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __ASM_MMAN_H__ +#define __ASM_MMAN_H__ + +#include +#include + +static inline bool arch_memory_deny_write_exec_supported(void) +{ + return cpu_architecture() >= CPU_ARCH_ARMv6; +} +#define arch_memory_deny_write_exec_supported arch_memory_deny_write_exec_supported + +#endif /* __ASM_MMAN_H__ */ --- linux-xilinx-6.8.0.orig/arch/arm/kernel/Makefile +++ linux-xilinx-6.8.0/arch/arm/kernel/Makefile @@ -75,8 +75,6 @@ obj-$(CONFIG_CPU_XSCALE) += xscale-cp0.o obj-$(CONFIG_CPU_XSC3) += xscale-cp0.o obj-$(CONFIG_CPU_MOHAWK) += xscale-cp0.o -obj-$(CONFIG_CPU_PJ4) += pj4-cp0.o -obj-$(CONFIG_CPU_PJ4B) += pj4-cp0.o obj-$(CONFIG_IWMMXT) += iwmmxt.o obj-$(CONFIG_PERF_EVENTS) += perf_regs.o perf_callchain.o obj-$(CONFIG_HW_PERF_EVENTS) += perf_event_xscale.o perf_event_v6.o \ --- linux-xilinx-6.8.0.orig/arch/arm/kernel/devtree.c +++ linux-xilinx-6.8.0/arch/arm/kernel/devtree.c @@ -200,7 +200,7 @@ mdesc_best = &__mach_desc_GENERIC_DT; - if (!dt_virt || !early_init_dt_verify(dt_virt)) + if (!dt_virt || !early_init_dt_verify(dt_virt, __pa(dt_virt))) return NULL; mdesc = of_flat_dt_match_machine(mdesc_best, arch_get_next_mach); --- linux-xilinx-6.8.0.orig/arch/arm/kernel/entry-armv.S +++ linux-xilinx-6.8.0/arch/arm/kernel/entry-armv.S @@ -25,6 +25,7 @@ #include #include #include +#include #include "entry-header.S" #include @@ -555,6 +556,13 @@ @ entries covering the vmalloc region. @ ldr r2, [ip] +#ifdef CONFIG_KASAN_VMALLOC + @ Also dummy read from the KASAN shadow memory for the new stack if we + @ are using KASAN + mov_l r2, KASAN_SHADOW_OFFSET + add r2, r2, ip, lsr #KASAN_SHADOW_SCALE_SHIFT + ldr r2, [r2] +#endif #endif @ When CONFIG_THREAD_INFO_IN_TASK=n, the update of SP itself is what --- linux-xilinx-6.8.0.orig/arch/arm/kernel/head.S +++ linux-xilinx-6.8.0/arch/arm/kernel/head.S @@ -252,18 +252,23 @@ */ add r0, r4, #KERNEL_OFFSET >> (SECTION_SHIFT - PMD_ENTRY_ORDER) ldr r6, =(_end - 1) + + /* For XIP, kernel_sec_start/kernel_sec_end are currently in RO memory */ +#ifndef CONFIG_XIP_KERNEL adr_l r5, kernel_sec_start @ _pa(kernel_sec_start) #if defined CONFIG_CPU_ENDIAN_BE8 || defined CONFIG_CPU_ENDIAN_BE32 str r8, [r5, #4] @ Save physical start of kernel (BE) #else str r8, [r5] @ Save physical start of kernel (LE) #endif +#endif orr r3, r8, r7 @ Add the MMU flags add r6, r4, r6, lsr #(SECTION_SHIFT - PMD_ENTRY_ORDER) 1: str r3, [r0], #1 << PMD_ENTRY_ORDER add r3, r3, #1 << SECTION_SHIFT cmp r0, r6 bls 1b +#ifndef CONFIG_XIP_KERNEL eor r3, r3, r7 @ Remove the MMU flags adr_l r5, kernel_sec_end @ _pa(kernel_sec_end) #if defined CONFIG_CPU_ENDIAN_BE8 || defined CONFIG_CPU_ENDIAN_BE32 @@ -271,8 +276,7 @@ #else str r3, [r5] @ Save physical end of kernel (LE) #endif - -#ifdef CONFIG_XIP_KERNEL +#else /* * Map the kernel image separately as it is not located in RAM. */ @@ -407,7 +411,11 @@ /* * Use the page tables supplied from __cpu_up. */ +#ifdef CONFIG_XIP_KERNEL + ldr r3, =(secondary_data + PLAT_PHYS_OFFSET - PAGE_OFFSET) +#else adr_l r3, secondary_data +#endif mov_l r12, __secondary_switched ldrd r4, r5, [r3, #0] @ get secondary_data.pgdir ARM_BE8(eor r4, r4, r5) @ Swap r5 and r4 in BE: --- linux-xilinx-6.8.0.orig/arch/arm/kernel/iwmmxt.S +++ linux-xilinx-6.8.0/arch/arm/kernel/iwmmxt.S @@ -18,18 +18,6 @@ #include #include "iwmmxt.h" -#if defined(CONFIG_CPU_PJ4) || defined(CONFIG_CPU_PJ4B) -#define PJ4(code...) code -#define XSC(code...) -#elif defined(CONFIG_CPU_MOHAWK) || \ - defined(CONFIG_CPU_XSC3) || \ - defined(CONFIG_CPU_XSCALE) -#define PJ4(code...) -#define XSC(code...) code -#else -#error "Unsupported iWMMXt architecture" -#endif - #define MMX_WR0 (0x00) #define MMX_WR1 (0x08) #define MMX_WR2 (0x10) @@ -81,17 +69,13 @@ ENTRY(iwmmxt_task_enable) inc_preempt_count r10, r3 - XSC(mrc p15, 0, r2, c15, c1, 0) - PJ4(mrc p15, 0, r2, c1, c0, 2) + mrc p15, 0, r2, c15, c1, 0 @ CP0 and CP1 accessible? - XSC(tst r2, #0x3) - PJ4(tst r2, #0xf) + tst r2, #0x3 bne 4f @ if so no business here @ enable access to CP0 and CP1 - XSC(orr r2, r2, #0x3) - XSC(mcr p15, 0, r2, c15, c1, 0) - PJ4(orr r2, r2, #0xf) - PJ4(mcr p15, 0, r2, c1, c0, 2) + orr r2, r2, #0x3 + mcr p15, 0, r2, c15, c1, 0 ldr r3, =concan_owner ldr r2, [r0, #S_PC] @ current task pc value @@ -218,12 +202,9 @@ bne 1f @ no: quit @ enable access to CP0 and CP1 - XSC(mrc p15, 0, r4, c15, c1, 0) - XSC(orr r4, r4, #0x3) - XSC(mcr p15, 0, r4, c15, c1, 0) - PJ4(mrc p15, 0, r4, c1, c0, 2) - PJ4(orr r4, r4, #0xf) - PJ4(mcr p15, 0, r4, c1, c0, 2) + mrc p15, 0, r4, c15, c1, 0 + orr r4, r4, #0x3 + mcr p15, 0, r4, c15, c1, 0 mov r0, #0 @ nothing to load str r0, [r3] @ no more current owner @@ -232,10 +213,8 @@ bl concan_save @ disable access to CP0 and CP1 - XSC(bic r4, r4, #0x3) - XSC(mcr p15, 0, r4, c15, c1, 0) - PJ4(bic r4, r4, #0xf) - PJ4(mcr p15, 0, r4, c1, c0, 2) + bic r4, r4, #0x3 + mcr p15, 0, r4, c15, c1, 0 mrc p15, 0, r2, c2, c0, 0 mov r2, r2 @ cpwait @@ -330,11 +309,9 @@ */ ENTRY(iwmmxt_task_switch) - XSC(mrc p15, 0, r1, c15, c1, 0) - PJ4(mrc p15, 0, r1, c1, c0, 2) + mrc p15, 0, r1, c15, c1, 0 @ CP0 and CP1 accessible? - XSC(tst r1, #0x3) - PJ4(tst r1, #0xf) + tst r1, #0x3 bne 1f @ yes: block them for next task ldr r2, =concan_owner @@ -344,10 +321,8 @@ retne lr @ no: leave Concan disabled 1: @ flip Concan access - XSC(eor r1, r1, #0x3) - XSC(mcr p15, 0, r1, c15, c1, 0) - PJ4(eor r1, r1, #0xf) - PJ4(mcr p15, 0, r1, c1, c0, 2) + eor r1, r1, #0x3 + mcr p15, 0, r1, c15, c1, 0 mrc p15, 0, r1, c2, c0, 0 sub pc, lr, r1, lsr #32 @ cpwait and return --- linux-xilinx-6.8.0.orig/arch/arm/kernel/perf_callchain.c +++ linux-xilinx-6.8.0/arch/arm/kernel/perf_callchain.c @@ -85,8 +85,7 @@ callchain_trace(void *data, unsigned long pc) { struct perf_callchain_entry_ctx *entry = data; - perf_callchain_store(entry, pc); - return true; + return perf_callchain_store(entry, pc) == 0; } void --- linux-xilinx-6.8.0.orig/arch/arm/kernel/psci_smp.c +++ linux-xilinx-6.8.0/arch/arm/kernel/psci_smp.c @@ -45,8 +45,15 @@ static int psci_boot_secondary(unsigned int cpu, struct task_struct *idle) { if (psci_ops.cpu_on) +#ifdef CONFIG_XIP_KERNEL + return psci_ops.cpu_on(cpu_logical_map(cpu), + ((phys_addr_t)(&secondary_startup) + - XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR) + + CONFIG_XIP_PHYS_ADDR)); +#else return psci_ops.cpu_on(cpu_logical_map(cpu), virt_to_idmap(&secondary_startup)); +#endif return -ENODEV; } --- linux-xilinx-6.8.0.orig/arch/arm/kernel/sleep.S +++ linux-xilinx-6.8.0/arch/arm/kernel/sleep.S @@ -127,6 +127,10 @@ instr_sync #endif bl cpu_init @ restore the und/abt/irq banked regs +#if defined(CONFIG_KASAN) && defined(CONFIG_KASAN_STACK) + mov r0, sp + bl kasan_unpoison_task_stack_below +#endif mov r0, #0 @ return zero on success ldmfd sp!, {r4 - r11, pc} ENDPROC(cpu_resume_after_mmu) --- linux-xilinx-6.8.0.orig/arch/arm/kernel/traps.c +++ linux-xilinx-6.8.0/arch/arm/kernel/traps.c @@ -569,6 +569,7 @@ static inline int __do_cache_op(unsigned long start, unsigned long end) { + unsigned int ua_flags; int ret; do { @@ -577,7 +578,9 @@ if (fatal_signal_pending(current)) return 0; + ua_flags = uaccess_save_and_enable(); ret = flush_icache_user_range(start, start + chunk); + uaccess_restore(ua_flags); if (ret) return ret; --- linux-xilinx-6.8.0.orig/arch/arm/mach-at91/pm.c +++ linux-xilinx-6.8.0/arch/arm/mach-at91/pm.c @@ -591,7 +591,21 @@ return 0; } -static void at91_pm_switch_ba_to_vbat(void) +/** + * at91_pm_switch_ba_to_auto() - Configure Backup Unit Power Switch + * to automatic/hardware mode. + * + * The Backup Unit Power Switch can be managed either by software or hardware. + * Enabling hardware mode allows the automatic transition of power between + * VDDANA (or VDDIN33) and VDDBU (or VBAT, respectively), based on the + * availability of these power sources. + * + * If the Backup Unit Power Switch is already in automatic mode, no action is + * required. If it is in software-controlled mode, it is switched to automatic + * mode to enhance safety and eliminate the need for toggling between power + * sources. + */ +static void at91_pm_switch_ba_to_auto(void) { unsigned int offset = offsetof(struct at91_pm_sfrbu_regs, pswbu); unsigned int val; @@ -602,24 +616,19 @@ val = readl(soc_pm.data.sfrbu + offset); - /* Already on VBAT. */ - if (!(val & soc_pm.sfrbu_regs.pswbu.state)) + /* Already on auto/hardware. */ + if (!(val & soc_pm.sfrbu_regs.pswbu.ctrl)) return; - val &= ~soc_pm.sfrbu_regs.pswbu.softsw; - val |= soc_pm.sfrbu_regs.pswbu.key | soc_pm.sfrbu_regs.pswbu.ctrl; + val &= ~soc_pm.sfrbu_regs.pswbu.ctrl; + val |= soc_pm.sfrbu_regs.pswbu.key; writel(val, soc_pm.data.sfrbu + offset); - - /* Wait for update. */ - val = readl(soc_pm.data.sfrbu + offset); - while (val & soc_pm.sfrbu_regs.pswbu.state) - val = readl(soc_pm.data.sfrbu + offset); } static void at91_pm_suspend(suspend_state_t state) { if (soc_pm.data.mode == AT91_PM_BACKUP) { - at91_pm_switch_ba_to_vbat(); + at91_pm_switch_ba_to_auto(); cpu_suspend(0, at91_suspend_finish); --- linux-xilinx-6.8.0.orig/arch/arm/mach-davinci/pm.c +++ linux-xilinx-6.8.0/arch/arm/mach-davinci/pm.c @@ -61,7 +61,7 @@ /* Configure sleep count in deep sleep register */ val = __raw_readl(pm_config.deepsleep_reg); - val &= ~DEEPSLEEP_SLEEPCOUNT_MASK, + val &= ~DEEPSLEEP_SLEEPCOUNT_MASK; val |= pm_config.sleepcount; __raw_writel(val, pm_config.deepsleep_reg); --- linux-xilinx-6.8.0.orig/arch/arm/mach-ep93xx/clock.c +++ linux-xilinx-6.8.0/arch/arm/mach-ep93xx/clock.c @@ -359,7 +359,7 @@ u32 val = __raw_readl(psc->reg); u8 index = (val & psc->mask) >> psc->shift; - if (index > psc->num_div) + if (index >= psc->num_div) return 0; return DIV_ROUND_UP_ULL(parent_rate, psc->div[index]); --- linux-xilinx-6.8.0.orig/arch/arm/mach-omap1/board-nokia770.c +++ linux-xilinx-6.8.0/arch/arm/mach-omap1/board-nokia770.c @@ -289,7 +289,7 @@ GPIO_LOOKUP("gpio-0-15", 15, "ads7846_irq", GPIO_ACTIVE_HIGH), /* GPIO used for retu IRQ */ - GPIO_LOOKUP("gpio-48-63", 15, "retu_irq", + GPIO_LOOKUP("gpio-48-63", 14, "retu_irq", GPIO_ACTIVE_HIGH), /* GPIO used for tahvo IRQ */ GPIO_LOOKUP("gpio-32-47", 8, "tahvo_irq", --- linux-xilinx-6.8.0.orig/arch/arm/mach-omap2/board-n8x0.c +++ linux-xilinx-6.8.0/arch/arm/mach-omap2/board-n8x0.c @@ -79,10 +79,8 @@ static struct gpiod_lookup_table tusb_gpio_table = { .dev_id = "musb-tusb", .table = { - GPIO_LOOKUP("gpio-0-15", 0, "enable", - GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("gpio-48-63", 10, "int", - GPIO_ACTIVE_HIGH), + GPIO_LOOKUP("gpio-0-31", 0, "enable", GPIO_ACTIVE_HIGH), + GPIO_LOOKUP("gpio-32-63", 26, "int", GPIO_ACTIVE_HIGH), { } }, }; @@ -140,12 +138,11 @@ static int slot2_cover_open; static struct device *mmc_device; -static struct gpiod_lookup_table nokia8xx_mmc_gpio_table = { +static struct gpiod_lookup_table nokia800_mmc_gpio_table = { .dev_id = "mmci-omap.0", .table = { /* Slot switch, GPIO 96 */ - GPIO_LOOKUP("gpio-80-111", 16, - "switch", GPIO_ACTIVE_HIGH), + GPIO_LOOKUP("gpio-96-127", 0, "switch", GPIO_ACTIVE_HIGH), { } }, }; @@ -153,12 +150,12 @@ static struct gpiod_lookup_table nokia810_mmc_gpio_table = { .dev_id = "mmci-omap.0", .table = { + /* Slot switch, GPIO 96 */ + GPIO_LOOKUP("gpio-96-127", 0, "switch", GPIO_ACTIVE_HIGH), /* Slot index 1, VSD power, GPIO 23 */ - GPIO_LOOKUP_IDX("gpio-16-31", 7, - "vsd", 1, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("gpio-0-31", 23, "vsd", 1, GPIO_ACTIVE_HIGH), /* Slot index 1, VIO power, GPIO 9 */ - GPIO_LOOKUP_IDX("gpio-0-15", 9, - "vio", 1, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("gpio-0-31", 9, "vio", 1, GPIO_ACTIVE_HIGH), { } }, }; @@ -415,8 +412,6 @@ static void __init n8x0_mmc_init(void) { - gpiod_add_lookup_table(&nokia8xx_mmc_gpio_table); - if (board_is_n810()) { mmc1_data.slots[0].name = "external"; @@ -429,6 +424,8 @@ mmc1_data.slots[1].name = "internal"; mmc1_data.slots[1].ban_openended = 1; gpiod_add_lookup_table(&nokia810_mmc_gpio_table); + } else { + gpiod_add_lookup_table(&nokia800_mmc_gpio_table); } mmc1_data.nr_slots = 2; --- linux-xilinx-6.8.0.orig/arch/arm/mach-pxa/spitz.c +++ linux-xilinx-6.8.0/arch/arm/mach-pxa/spitz.c @@ -520,10 +520,8 @@ static struct gpiod_lookup_table spitz_lcdcon_gpio_table = { .dev_id = "spi2.1", .table = { - GPIO_LOOKUP("gpio-pxa", SPITZ_GPIO_BACKLIGHT_CONT, - "BL_CONT", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("gpio-pxa", SPITZ_GPIO_BACKLIGHT_ON, - "BL_ON", GPIO_ACTIVE_HIGH), + GPIO_LOOKUP("sharp-scoop.1", 6, "BL_CONT", GPIO_ACTIVE_LOW), + GPIO_LOOKUP("sharp-scoop.1", 7, "BL_ON", GPIO_ACTIVE_HIGH), { }, }, }; @@ -531,10 +529,8 @@ static struct gpiod_lookup_table akita_lcdcon_gpio_table = { .dev_id = "spi2.1", .table = { - GPIO_LOOKUP("gpio-pxa", AKITA_GPIO_BACKLIGHT_CONT, - "BL_CONT", GPIO_ACTIVE_LOW), - GPIO_LOOKUP("gpio-pxa", AKITA_GPIO_BACKLIGHT_ON, - "BL_ON", GPIO_ACTIVE_HIGH), + GPIO_LOOKUP("i2c-max7310", 3, "BL_ON", GPIO_ACTIVE_HIGH), + GPIO_LOOKUP("i2c-max7310", 4, "BL_CONT", GPIO_ACTIVE_LOW), { }, }, }; @@ -941,12 +937,9 @@ static struct gpiod_lookup_table spitz_audio_gpio_table = { .dev_id = "spitz-audio", .table = { - GPIO_LOOKUP("sharp-scoop.0", SPITZ_GPIO_MUTE_L - SPITZ_SCP_GPIO_BASE, - "mute-l", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("sharp-scoop.0", SPITZ_GPIO_MUTE_R - SPITZ_SCP_GPIO_BASE, - "mute-r", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("sharp-scoop.1", SPITZ_GPIO_MIC_BIAS - SPITZ_SCP2_GPIO_BASE, - "mic", GPIO_ACTIVE_HIGH), + GPIO_LOOKUP("sharp-scoop.0", 3, "mute-l", GPIO_ACTIVE_HIGH), + GPIO_LOOKUP("sharp-scoop.0", 4, "mute-r", GPIO_ACTIVE_HIGH), + GPIO_LOOKUP("sharp-scoop.1", 8, "mic", GPIO_ACTIVE_HIGH), { }, }, }; @@ -954,12 +947,9 @@ static struct gpiod_lookup_table akita_audio_gpio_table = { .dev_id = "spitz-audio", .table = { - GPIO_LOOKUP("sharp-scoop.0", SPITZ_GPIO_MUTE_L - SPITZ_SCP_GPIO_BASE, - "mute-l", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("sharp-scoop.0", SPITZ_GPIO_MUTE_R - SPITZ_SCP_GPIO_BASE, - "mute-r", GPIO_ACTIVE_HIGH), - GPIO_LOOKUP("i2c-max7310", AKITA_GPIO_MIC_BIAS - AKITA_IOEXP_GPIO_BASE, - "mic", GPIO_ACTIVE_HIGH), + GPIO_LOOKUP("sharp-scoop.0", 3, "mute-l", GPIO_ACTIVE_HIGH), + GPIO_LOOKUP("sharp-scoop.0", 4, "mute-r", GPIO_ACTIVE_HIGH), + GPIO_LOOKUP("i2c-max7310", 2, "mic", GPIO_ACTIVE_HIGH), { }, }, }; --- linux-xilinx-6.8.0.orig/arch/arm/mach-versatile/platsmp-realview.c +++ linux-xilinx-6.8.0/arch/arm/mach-versatile/platsmp-realview.c @@ -70,6 +70,7 @@ return; } map = syscon_node_to_regmap(np); + of_node_put(np); if (IS_ERR(map)) { pr_err("PLATSMP: No syscon regmap\n"); return; --- linux-xilinx-6.8.0.orig/arch/arm/mach-zynq/Makefile +++ linux-xilinx-6.8.0/arch/arm/mach-zynq/Makefile @@ -4,5 +4,5 @@ # # Common support -obj-y := common.o slcr.o pm.o +obj-y := common.o efuse.o slcr.o pm.o obj-$(CONFIG_SMP) += headsmp.o platsmp.o --- linux-xilinx-6.8.0.orig/arch/arm/mach-zynq/common.c +++ linux-xilinx-6.8.0/arch/arm/mach-zynq/common.c @@ -176,6 +176,7 @@ static void __init zynq_irq_init(void) { + zynq_early_efuse_init(); zynq_early_slcr_init(); irqchip_init(); } --- linux-xilinx-6.8.0.orig/arch/arm/mach-zynq/common.h +++ linux-xilinx-6.8.0/arch/arm/mach-zynq/common.h @@ -17,6 +17,9 @@ extern void zynq_slcr_cpu_state_write(int cpu, bool die); extern u32 zynq_slcr_get_device_id(void); +extern bool zynq_efuse_cpu_state(int cpu); +extern int zynq_early_efuse_init(void); + #ifdef CONFIG_SMP extern char zynq_secondary_trampoline; extern char zynq_secondary_trampoline_jump; --- linux-xilinx-6.8.0.orig/arch/arm/mach-zynq/efuse.c +++ linux-xilinx-6.8.0/arch/arm/mach-zynq/efuse.c @@ -0,0 +1,78 @@ +/* + * Xilinx EFUSE driver + * + * Copyright (c) 2016 Xilinx Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include +#include +#include "common.h" + +#define EFUSE_STATUS_OFFSET 0x10 + +/* 0 means cpu1 is working, 1 means cpu1 is broken */ +#define EFUSE_STATUS_CPU_BIT BIT(7) + +void __iomem *zynq_efuse_base; + +/** + * zynq_efuse_cpu_state - Read/write cpu state + * @cpu: cpu number + * + * Return: true if cpu is running, false if cpu is broken + */ +bool zynq_efuse_cpu_state(int cpu) +{ + u32 state; + + if (!cpu) + return true; + + if (!zynq_efuse_base) + return true; + + state = readl(zynq_efuse_base + EFUSE_STATUS_OFFSET); + state &= EFUSE_STATUS_CPU_BIT; + + if (!state) + return true; + + return false; +} + +/** + * zynq_early_efuse_init - Early efuse init function + * + * Return: 0 on success, negative errno otherwise. + * + * Called very early during boot from platform code. + */ +int __init zynq_early_efuse_init(void) +{ + struct device_node *np; + + np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-efuse"); + if (!np) { + pr_err("%s: no efuse node found\n", __func__); + return -1; + } + + zynq_efuse_base = of_iomap(np, 0); + if (!zynq_efuse_base) { + pr_err("%s: Unable to map I/O memory\n", __func__); + return -1; + } + + np->data = (__force void *)zynq_efuse_base; + + pr_info("%s mapped to %p\n", np->name, zynq_efuse_base); + + of_node_put(np); + + return 0; +} --- linux-xilinx-6.8.0.orig/arch/arm/mach-zynq/platsmp.c +++ linux-xilinx-6.8.0/arch/arm/mach-zynq/platsmp.c @@ -83,6 +83,9 @@ static int zynq_boot_secondary(unsigned int cpu, struct task_struct *idle) { + if (!zynq_efuse_cpu_state(cpu)) + return -1; + return zynq_cpun_start(__pa_symbol(secondary_startup_arm), cpu); } --- linux-xilinx-6.8.0.orig/arch/arm/mach-zynq/slcr.c +++ linux-xilinx-6.8.0/arch/arm/mach-zynq/slcr.c @@ -10,7 +10,6 @@ #include #include #include -#include #include "common.h" /* register offsets */ --- linux-xilinx-6.8.0.orig/arch/arm/mm/flush.c +++ linux-xilinx-6.8.0/arch/arm/mm/flush.c @@ -296,6 +296,9 @@ return; folio = page_folio(pfn_to_page(pfn)); + if (folio_test_reserved(folio)) + return; + if (cache_is_vipt_aliasing()) mapping = folio_flush_mapping(folio); else --- linux-xilinx-6.8.0.orig/arch/arm/mm/idmap.c +++ linux-xilinx-6.8.0/arch/arm/mm/idmap.c @@ -84,8 +84,15 @@ unsigned long addr, end; unsigned long next; +#ifdef CONFIG_XIP_KERNEL + addr = (phys_addr_t)(text_start) - XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR) + + CONFIG_XIP_PHYS_ADDR; + end = (phys_addr_t)(text_end) - XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR) + + CONFIG_XIP_PHYS_ADDR; +#else addr = virt_to_idmap(text_start); end = virt_to_idmap(text_end); +#endif pr_info("Setting up static identity map for 0x%lx - 0x%lx\n", addr, end); prot |= PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AF; --- linux-xilinx-6.8.0.orig/arch/arm/mm/ioremap.c +++ linux-xilinx-6.8.0/arch/arm/mm/ioremap.c @@ -23,6 +23,7 @@ */ #include #include +#include #include #include #include @@ -115,16 +116,40 @@ } EXPORT_SYMBOL(ioremap_page); +#ifdef CONFIG_KASAN +static unsigned long arm_kasan_mem_to_shadow(unsigned long addr) +{ + return (unsigned long)kasan_mem_to_shadow((void *)addr); +} +#else +static unsigned long arm_kasan_mem_to_shadow(unsigned long addr) +{ + return 0; +} +#endif + +static void memcpy_pgd(struct mm_struct *mm, unsigned long start, + unsigned long end) +{ + end = ALIGN(end, PGDIR_SIZE); + memcpy(pgd_offset(mm, start), pgd_offset_k(start), + sizeof(pgd_t) * (pgd_index(end) - pgd_index(start))); +} + void __check_vmalloc_seq(struct mm_struct *mm) { int seq; do { - seq = atomic_read(&init_mm.context.vmalloc_seq); - memcpy(pgd_offset(mm, VMALLOC_START), - pgd_offset_k(VMALLOC_START), - sizeof(pgd_t) * (pgd_index(VMALLOC_END) - - pgd_index(VMALLOC_START))); + seq = atomic_read_acquire(&init_mm.context.vmalloc_seq); + memcpy_pgd(mm, VMALLOC_START, VMALLOC_END); + if (IS_ENABLED(CONFIG_KASAN_VMALLOC)) { + unsigned long start = + arm_kasan_mem_to_shadow(VMALLOC_START); + unsigned long end = + arm_kasan_mem_to_shadow(VMALLOC_END); + memcpy_pgd(mm, start, end); + } /* * Use a store-release so that other CPUs that observe the * counter's new value are guaranteed to see the results of the --- linux-xilinx-6.8.0.orig/arch/arm/mm/mmu.c +++ linux-xilinx-6.8.0/arch/arm/mm/mmu.c @@ -1403,18 +1403,6 @@ } /* - * Map the kernel if it is XIP. - * It is always first in the modulearea. - */ -#ifdef CONFIG_XIP_KERNEL - map.pfn = __phys_to_pfn(CONFIG_XIP_PHYS_ADDR & SECTION_MASK); - map.virtual = MODULES_VADDR; - map.length = ((unsigned long)_exiprom - map.virtual + ~SECTION_MASK) & SECTION_MASK; - map.type = MT_ROM; - create_mapping(&map); -#endif - - /* * Map the cache flushing regions. */ #ifdef FLUSH_BASE @@ -1603,12 +1591,27 @@ * This will only persist until we turn on proper memory management later on * and we remap the whole kernel with page granularity. */ +#ifdef CONFIG_XIP_KERNEL + phys_addr_t kernel_nx_start = kernel_sec_start; +#else phys_addr_t kernel_x_start = kernel_sec_start; phys_addr_t kernel_x_end = round_up(__pa(__init_end), SECTION_SIZE); phys_addr_t kernel_nx_start = kernel_x_end; +#endif phys_addr_t kernel_nx_end = kernel_sec_end; struct map_desc map; + /* + * Map the kernel if it is XIP. + * It is always first in the modulearea. + */ +#ifdef CONFIG_XIP_KERNEL + map.pfn = __phys_to_pfn(CONFIG_XIP_PHYS_ADDR & SECTION_MASK); + map.virtual = MODULES_VADDR; + map.length = ((unsigned long)_exiprom - map.virtual + ~SECTION_MASK) & SECTION_MASK; + map.type = MT_ROM; + create_mapping(&map); +#else map.pfn = __phys_to_pfn(kernel_x_start); map.virtual = __phys_to_virt(kernel_x_start); map.length = kernel_x_end - kernel_x_start; @@ -1618,7 +1621,7 @@ /* If the nx part is small it may end up covered by the tail of the RWX section */ if (kernel_x_end == kernel_nx_end) return; - +#endif map.pfn = __phys_to_pfn(kernel_nx_start); map.virtual = __phys_to_virt(kernel_nx_start); map.length = kernel_nx_end - kernel_nx_start; @@ -1763,6 +1766,11 @@ { void *zero_page; +#ifdef CONFIG_XIP_KERNEL + /* Store the kernel RW RAM region start/end in these variables */ + kernel_sec_start = CONFIG_PHYS_OFFSET & SECTION_MASK; + kernel_sec_end = round_up(__pa(_end), SECTION_SIZE); +#endif pr_debug("physical kernel sections: 0x%08llx-0x%08llx\n", kernel_sec_start, kernel_sec_end); --- linux-xilinx-6.8.0.orig/arch/arm/mm/proc-v7.S +++ linux-xilinx-6.8.0/arch/arm/mm/proc-v7.S @@ -93,7 +93,7 @@ ret lr ENDPROC(cpu_v7_dcache_clean_area) -#ifdef CONFIG_ARM_PSCI +#if defined(CONFIG_ARM_PSCI) && defined(CONFIG_HARDEN_BRANCH_PREDICTOR) .arch_extension sec ENTRY(cpu_v7_smc_switch_mm) stmfd sp!, {r0 - r3} --- linux-xilinx-6.8.0.orig/arch/arm/net/bpf_jit_32.c +++ linux-xilinx-6.8.0/arch/arm/net/bpf_jit_32.c @@ -871,16 +871,11 @@ } /* dst = src (4 bytes)*/ -static inline void emit_a32_mov_r(const s8 dst, const s8 src, const u8 off, - struct jit_ctx *ctx) { +static inline void emit_a32_mov_r(const s8 dst, const s8 src, struct jit_ctx *ctx) { const s8 *tmp = bpf2a32[TMP_REG_1]; s8 rt; rt = arm_bpf_get_reg32(src, tmp[0], ctx); - if (off && off != 32) { - emit(ARM_LSL_I(rt, rt, 32 - off), ctx); - emit(ARM_ASR_I(rt, rt, 32 - off), ctx); - } arm_bpf_put_reg32(dst, rt, ctx); } @@ -889,15 +884,15 @@ const s8 src[], struct jit_ctx *ctx) { if (!is64) { - emit_a32_mov_r(dst_lo, src_lo, 0, ctx); + emit_a32_mov_r(dst_lo, src_lo, ctx); if (!ctx->prog->aux->verifier_zext) /* Zero out high 4 bytes */ emit_a32_mov_i(dst_hi, 0, ctx); } else if (__LINUX_ARM_ARCH__ < 6 && ctx->cpu_architecture < CPU_ARCH_ARMv5TE) { /* complete 8 byte move */ - emit_a32_mov_r(dst_lo, src_lo, 0, ctx); - emit_a32_mov_r(dst_hi, src_hi, 0, ctx); + emit_a32_mov_r(dst_lo, src_lo, ctx); + emit_a32_mov_r(dst_hi, src_hi, ctx); } else if (is_stacked(src_lo) && is_stacked(dst_lo)) { const u8 *tmp = bpf2a32[TMP_REG_1]; @@ -917,17 +912,52 @@ static inline void emit_a32_movsx_r64(const bool is64, const u8 off, const s8 dst[], const s8 src[], struct jit_ctx *ctx) { const s8 *tmp = bpf2a32[TMP_REG_1]; - const s8 *rt; + s8 rs; + s8 rd; - rt = arm_bpf_get_reg64(dst, tmp, ctx); + if (is_stacked(dst_lo)) + rd = tmp[1]; + else + rd = dst_lo; + rs = arm_bpf_get_reg32(src_lo, rd, ctx); + /* rs may be one of src[1], dst[1], or tmp[1] */ + + /* Sign extend rs if needed. If off == 32, lower 32-bits of src are moved to dst and sign + * extension only happens in the upper 64 bits. + */ + if (off != 32) { + /* Sign extend rs into rd */ + emit(ARM_LSL_I(rd, rs, 32 - off), ctx); + emit(ARM_ASR_I(rd, rd, 32 - off), ctx); + } else { + rd = rs; + } + + /* Write rd to dst_lo + * + * Optimization: + * Assume: + * 1. dst == src and stacked. + * 2. off == 32 + * + * In this case src_lo was loaded into rd(tmp[1]) but rd was not sign extended as off==32. + * So, we don't need to write rd back to dst_lo as they have the same value. + * This saves us one str instruction. + */ + if (dst_lo != src_lo || off != 32) + arm_bpf_put_reg32(dst_lo, rd, ctx); - emit_a32_mov_r(dst_lo, src_lo, off, ctx); if (!is64) { if (!ctx->prog->aux->verifier_zext) /* Zero out high 4 bytes */ emit_a32_mov_i(dst_hi, 0, ctx); } else { - emit(ARM_ASR_I(rt[0], rt[1], 31), ctx); + if (is_stacked(dst_hi)) { + emit(ARM_ASR_I(tmp[0], rd, 31), ctx); + arm_bpf_put_reg32(dst_hi, tmp[0], ctx); + } else { + emit(ARM_ASR_I(dst_hi, rd, 31), ctx); + } } } @@ -2222,28 +2252,21 @@ /* If building the body of the JITed code fails somehow, * we fall back to the interpretation. */ - if (build_body(&ctx) < 0) { - image_ptr = NULL; - bpf_jit_binary_free(header); - prog = orig_prog; - goto out_imms; - } + if (build_body(&ctx) < 0) + goto out_free; build_epilogue(&ctx); /* 3.) Extra pass to validate JITed Code */ - if (validate_code(&ctx)) { - image_ptr = NULL; - bpf_jit_binary_free(header); - prog = orig_prog; - goto out_imms; - } + if (validate_code(&ctx)) + goto out_free; flush_icache_range((u32)header, (u32)(ctx.target + ctx.idx)); if (bpf_jit_enable > 1) /* there are 2 passes here */ bpf_jit_dump(prog->len, image_size, 2, ctx.target); - bpf_jit_binary_lock_ro(header); + if (bpf_jit_binary_lock_ro(header)) + goto out_free; prog->bpf_func = (void *)ctx.target; prog->jited = 1; prog->jited_len = image_size; @@ -2260,5 +2283,11 @@ bpf_jit_prog_release_other(prog, prog == orig_prog ? tmp : orig_prog); return prog; + +out_free: + image_ptr = NULL; + bpf_jit_binary_free(header); + prog = orig_prog; + goto out_imms; } --- linux-xilinx-6.8.0.orig/arch/arm/vfp/vfpinstr.h +++ linux-xilinx-6.8.0/arch/arm/vfp/vfpinstr.h @@ -64,33 +64,37 @@ #ifdef CONFIG_AS_VFP_VMRS_FPINST -#define fmrx(_vfp_) ({ \ - u32 __v; \ - asm(".fpu vfpv2\n" \ - "vmrs %0, " #_vfp_ \ - : "=r" (__v) : : "cc"); \ - __v; \ - }) - -#define fmxr(_vfp_,_var_) \ - asm(".fpu vfpv2\n" \ - "vmsr " #_vfp_ ", %0" \ - : : "r" (_var_) : "cc") +#define fmrx(_vfp_) ({ \ + u32 __v; \ + asm volatile (".fpu vfpv2\n" \ + "vmrs %0, " #_vfp_ \ + : "=r" (__v) : : "cc"); \ + __v; \ +}) + +#define fmxr(_vfp_, _var_) ({ \ + asm volatile (".fpu vfpv2\n" \ + "vmsr " #_vfp_ ", %0" \ + : : "r" (_var_) : "cc"); \ +}) #else #define vfpreg(_vfp_) #_vfp_ -#define fmrx(_vfp_) ({ \ - u32 __v; \ - asm("mrc p10, 7, %0, " vfpreg(_vfp_) ", cr0, 0 @ fmrx %0, " #_vfp_ \ - : "=r" (__v) : : "cc"); \ - __v; \ - }) - -#define fmxr(_vfp_,_var_) \ - asm("mcr p10, 7, %0, " vfpreg(_vfp_) ", cr0, 0 @ fmxr " #_vfp_ ", %0" \ - : : "r" (_var_) : "cc") +#define fmrx(_vfp_) ({ \ + u32 __v; \ + asm volatile ("mrc p10, 7, %0, " vfpreg(_vfp_) "," \ + "cr0, 0 @ fmrx %0, " #_vfp_ \ + : "=r" (__v) : : "cc"); \ + __v; \ +}) + +#define fmxr(_vfp_, _var_) ({ \ + asm volatile ("mcr p10, 7, %0, " vfpreg(_vfp_) "," \ + "cr0, 0 @ fmxr " #_vfp_ ", %0" \ + : : "r" (_var_) : "cc"); \ +}) #endif --- linux-xilinx-6.8.0.orig/arch/arm64/Kconfig +++ linux-xilinx-6.8.0/arch/arm64/Kconfig @@ -107,7 +107,7 @@ select ARCH_WANT_LD_ORPHAN_WARN select ARCH_WANTS_NO_INSTR select ARCH_WANTS_THP_SWAP if ARM64_4K_PAGES - select ARCH_HAS_UBSAN_SANITIZE_ALL + select ARCH_HAS_UBSAN select ARM_AMBA select ARM_ARCH_TIMER select ARM_GIC @@ -193,12 +193,13 @@ select HAVE_DMA_CONTIGUOUS select HAVE_DYNAMIC_FTRACE select HAVE_DYNAMIC_FTRACE_WITH_ARGS \ - if $(cc-option,-fpatchable-function-entry=2) + if (GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS || \ + CLANG_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS) select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS \ if DYNAMIC_FTRACE_WITH_ARGS && DYNAMIC_FTRACE_WITH_CALL_OPS select HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS \ if (DYNAMIC_FTRACE_WITH_ARGS && !CFI_CLANG && \ - !CC_OPTIMIZE_FOR_SIZE) + (CC_IS_CLANG || !CC_OPTIMIZE_FOR_SIZE)) select FTRACE_MCOUNT_USE_PATCHABLE_FUNCTION_ENTRY \ if DYNAMIC_FTRACE_WITH_ARGS select HAVE_SAMPLE_FTRACE_DIRECT @@ -264,12 +265,10 @@ def_bool CC_IS_CLANG # https://github.com/ClangBuiltLinux/linux/issues/1507 depends on AS_IS_GNU || (AS_IS_LLVM && (LD_IS_LLD || LD_VERSION >= 23600)) - select HAVE_DYNAMIC_FTRACE_WITH_ARGS config GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS def_bool CC_IS_GCC depends on $(cc-option,-fpatchable-function-entry=2) - select HAVE_DYNAMIC_FTRACE_WITH_ARGS config 64BIT def_bool y @@ -422,7 +421,7 @@ default y help This option adds an alternative code sequence to work around Ampere - erratum AC03_CPU_38 on AmpereOne. + errata AC03_CPU_38 and AC04_CPU_10 on AmpereOne. The affected design reports FEAT_HAFDBS as not implemented in ID_AA64MMFR1_EL1.HAFDBS, but (V)TCR_ELx.{HA,HD} are not RES0 @@ -1070,6 +1069,46 @@ If unsure, say Y. +config ARM64_ERRATUM_3194386 + bool "Cortex-*/Neoverse-*: workaround for MSR SSBS not self-synchronizing" + default y + help + This option adds the workaround for the following errata: + + * ARM Cortex-A76 erratum 3324349 + * ARM Cortex-A77 erratum 3324348 + * ARM Cortex-A78 erratum 3324344 + * ARM Cortex-A78C erratum 3324346 + * ARM Cortex-A78C erratum 3324347 + * ARM Cortex-A710 erratam 3324338 + * ARM Cortex-A715 errartum 3456084 + * ARM Cortex-A720 erratum 3456091 + * ARM Cortex-A725 erratum 3456106 + * ARM Cortex-X1 erratum 3324344 + * ARM Cortex-X1C erratum 3324346 + * ARM Cortex-X2 erratum 3324338 + * ARM Cortex-X3 erratum 3324335 + * ARM Cortex-X4 erratum 3194386 + * ARM Cortex-X925 erratum 3324334 + * ARM Neoverse-N1 erratum 3324349 + * ARM Neoverse N2 erratum 3324339 + * ARM Neoverse-N3 erratum 3456111 + * ARM Neoverse-V1 erratum 3324341 + * ARM Neoverse V2 erratum 3324336 + * ARM Neoverse-V3 erratum 3312417 + + On affected cores "MSR SSBS, #0" instructions may not affect + subsequent speculative instructions, which may permit unexepected + speculative store bypassing. + + Work around this problem by placing a Speculation Barrier (SB) or + Instruction Synchronization Barrier (ISB) after kernel changes to + SSBS. The presence of the SSBS special-purpose register is hidden + from hwcaps and EL0 reads of ID_AA64PFR1_EL1, such that userspace + will use the PR_SPEC_STORE_BYPASS prctl to change SSBS. + + If unsure, say Y. + config CAVIUM_ERRATUM_22375 bool "Cavium erratum 22375, 24313" default y @@ -1178,6 +1217,17 @@ If unsure, say Y. +config HISILICON_ERRATUM_162100801 + bool "Hip09 162100801 erratum support" + default y + help + When enabling GICv4.1 in hip09, VMAPP will fail to clear some caches + during unmapping operation, which will cause some vSGIs lost. + To fix the issue, invalidate related vPE cache through GICR_INVALLR + after VMOVP. + + If unsure, say Y. + config QCOM_FALKOR_ERRATUM_1003 bool "Falkor E1003: Incorrect translation due to ASID change" default y @@ -1550,7 +1600,7 @@ # 64K | 29 | 16 | 13 | 13 | config ARCH_FORCE_MAX_ORDER int - default "13" if ARM64_64K_PAGES + default "13" if ARM64_64K_PAGES || (ARCH_THUNDER && ARM64_4K_PAGES) default "11" if ARM64_16K_PAGES default "10" help @@ -2133,6 +2183,7 @@ bool "ARM Scalable Matrix Extension support" default y depends on ARM64_SVE + depends on BROKEN help The Scalable Matrix Extension (SME) is an extension to the AArch64 execution state which utilises a substantial subset of the SVE --- linux-xilinx-6.8.0.orig/arch/arm64/Makefile +++ linux-xilinx-6.8.0/arch/arm64/Makefile @@ -10,7 +10,7 @@ # # Copyright (C) 1995-2001 by Russell King -LDFLAGS_vmlinux :=--no-undefined -X +LDFLAGS_vmlinux :=--no-undefined -X --pic-veneer ifeq ($(CONFIG_RELOCATABLE), y) # Pass --no-apply-dynamic-relocs to restore pre-binutils-2.27 behaviour --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts @@ -390,6 +390,8 @@ &tcon0 { pinctrl-names = "default"; pinctrl-0 = <&lcd_rgb666_pins>; + assigned-clocks = <&ccu CLK_TCON0>; + assigned-clock-parents = <&ccu CLK_PLL_VIDEO0_2X>; status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi @@ -202,6 +202,9 @@ interrupts = <7 5 IRQ_TYPE_EDGE_RISING>; /* PH5 */ vdd-supply = <®_dldo1>; vddio-supply = <®_dldo1>; + mount-matrix = "0", "1", "0", + "-1", "0", "0", + "0", "0", "1"; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts @@ -369,6 +369,8 @@ &tcon0 { pinctrl-names = "default"; pinctrl-0 = <&lcd_rgb666_pins>; + assigned-clocks = <&ccu CLK_TCON0>; + assigned-clock-parents = <&ccu CLK_PLL_VIDEO0_2X>; status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -410,6 +410,8 @@ clock-names = "ahb", "tcon-ch0"; clock-output-names = "tcon-data-clock"; #clock-cells = <0>; + assigned-clocks = <&ccu CLK_TCON0>; + assigned-clock-parents = <&ccu CLK_PLL_MIPI>; resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>; reset-names = "lcd", "lvds"; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts @@ -291,6 +291,8 @@ }; &spdif { + pinctrl-names = "default"; + pinctrl-0 = <&spdif_tx_pin>; status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi @@ -166,6 +166,8 @@ }; &spdif { + pinctrl-names = "default"; + pinctrl-0 = <&spdif_tx_pin>; status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi @@ -406,6 +406,7 @@ function = "spi1"; }; + /omit-if-no-ref/ spdif_tx_pin: spdif-tx-pin { pins = "PH7"; function = "spdif"; @@ -655,10 +656,8 @@ clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>; clock-names = "apb", "spdif"; resets = <&ccu RST_BUS_SPDIF>; - dmas = <&dma 2>; - dma-names = "tx"; - pinctrl-names = "default"; - pinctrl-0 = <&spdif_tx_pin>; + dmas = <&dma 2>, <&dma 2>; + dma-names = "rx", "tx"; status = "disabled"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi @@ -215,6 +215,11 @@ #sound-dai-cells = <0>; status = "disabled"; + assigned-clocks = <&clkc CLKID_HDMI_SEL>, + <&clkc CLKID_HDMI>; + assigned-clock-parents = <&xtal>, <0>; + assigned-clock-rates = <0>, <24000000>; + /* VPU VENC Input */ hdmi_tx_venc_port: port@0 { reg = <0>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/amlogic/meson-g12.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/amlogic/meson-g12.dtsi @@ -363,6 +363,10 @@ power-domains = <&pwrc PWRC_G12A_ETH_ID>; }; +&hdmi_tx { + power-domains = <&pwrc PWRC_G12A_VPU_ID>; +}; + &vpu { power-domains = <&pwrc PWRC_G12A_VPU_ID>; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -311,10 +311,16 @@ <&reset RESET_HDMI_SYSTEM_RESET>, <&reset RESET_HDMI_TX>; reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy"; - clocks = <&clkc CLKID_HDMI_PCLK>, - <&clkc CLKID_CLK81>, + clocks = <&clkc CLKID_HDMI>, + <&clkc CLKID_HDMI_PCLK>, <&clkc CLKID_GCLK_VENCI_INT0>; clock-names = "isfr", "iahb", "venci"; + power-domains = <&pwrc PWRC_GXBB_VPU_ID>; + + assigned-clocks = <&clkc CLKID_HDMI_SEL>, + <&clkc CLKID_HDMI>; + assigned-clock-parents = <&xtal>, <0>; + assigned-clock-rates = <0>, <24000000>; }; &sysctrl { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi @@ -323,10 +323,16 @@ <&reset RESET_HDMI_SYSTEM_RESET>, <&reset RESET_HDMI_TX>; reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy"; - clocks = <&clkc CLKID_HDMI_PCLK>, - <&clkc CLKID_CLK81>, + clocks = <&clkc CLKID_HDMI>, + <&clkc CLKID_HDMI_PCLK>, <&clkc CLKID_GCLK_VENCI_INT0>; clock-names = "isfr", "iahb", "venci"; + power-domains = <&pwrc PWRC_GXBB_VPU_ID>; + + assigned-clocks = <&clkc CLKID_HDMI_SEL>, + <&clkc CLKID_HDMI>; + assigned-clock-parents = <&xtal>, <0>; + assigned-clock-rates = <0>, <24000000>; }; &sysctrl { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/amlogic/meson-s4.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/amlogic/meson-s4.dtsi @@ -65,10 +65,15 @@ #clock-cells = <0>; }; - pwrc: power-controller { - compatible = "amlogic,meson-s4-pwrc"; - #power-domain-cells = <1>; - status = "okay"; + firmware { + sm: secure-monitor { + compatible = "amlogic,meson-gxbb-sm"; + + pwrc: power-controller { + compatible = "amlogic,meson-s4-pwrc"; + #power-domain-cells = <1>; + }; + }; }; soc { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi @@ -339,7 +339,7 @@ }; spdifin: audio-controller@400 { - compatible = "amlogic,g12a-spdifin", + compatible = "amlogic,sm1-spdifin", "amlogic,axg-spdifin"; reg = <0x0 0x400 0x0 0x30>; #sound-dai-cells = <0>; @@ -353,7 +353,7 @@ }; spdifout_a: audio-controller@480 { - compatible = "amlogic,g12a-spdifout", + compatible = "amlogic,sm1-spdifout", "amlogic,axg-spdifout"; reg = <0x0 0x480 0x0 0x50>; #sound-dai-cells = <0>; @@ -518,6 +518,10 @@ "amlogic,meson-gpio-intc"; }; +&hdmi_tx { + power-domains = <&pwrc PWRC_SM1_VPU_ID>; +}; + &pcie { power-domains = <&pwrc PWRC_SM1_PCIE_ID>; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi @@ -227,9 +227,6 @@ brcm,num-gphy = <5>; brcm,num-rgmii-ports = <2>; - #address-cells = <1>; - #size-cells = <0>; - ports: ports { #address-cells = <1>; #size-cells = <0>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte.dts @@ -32,7 +32,7 @@ device_type = "memory"; reg = <0x0 0x80000000 0x3da00000>, <0x0 0xc0000000 0x40000000>, - <0x8 0x80000000 0x40000000>; + <0x8 0x80000000 0x80000000>; }; gpio-keys { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi @@ -41,7 +41,7 @@ interrupts = ; fsl,usbphy = <&usbphy1>; fsl,usbmisc = <&usbmisc1 0>; - clocks = <&usb2_lpcg 0>; + clocks = <&usb2_lpcg IMX_LPCG_CLK_6>; ahb-burst-config = <0x0>; tx-burst-size-dword = <0x10>; rx-burst-size-dword = <0x10>; @@ -58,7 +58,7 @@ usbphy1: usbphy@5b100000 { compatible = "fsl,imx7ulp-usbphy"; reg = <0x5b100000 0x1000>; - clocks = <&usb2_lpcg 1>; + clocks = <&usb2_lpcg IMX_LPCG_CLK_7>; power-domains = <&pd IMX_SC_R_USB_0_PHY>; status = "disabled"; }; @@ -67,8 +67,8 @@ interrupts = ; reg = <0x5b010000 0x10000>; clocks = <&sdhc0_lpcg IMX_LPCG_CLK_4>, - <&sdhc0_lpcg IMX_LPCG_CLK_0>, - <&sdhc0_lpcg IMX_LPCG_CLK_5>; + <&sdhc0_lpcg IMX_LPCG_CLK_5>, + <&sdhc0_lpcg IMX_LPCG_CLK_0>; clock-names = "ipg", "ahb", "per"; power-domains = <&pd IMX_SC_R_SDHC_0>; status = "disabled"; @@ -78,8 +78,8 @@ interrupts = ; reg = <0x5b020000 0x10000>; clocks = <&sdhc1_lpcg IMX_LPCG_CLK_4>, - <&sdhc1_lpcg IMX_LPCG_CLK_0>, - <&sdhc1_lpcg IMX_LPCG_CLK_5>; + <&sdhc1_lpcg IMX_LPCG_CLK_5>, + <&sdhc1_lpcg IMX_LPCG_CLK_0>; clock-names = "ipg", "ahb", "per"; power-domains = <&pd IMX_SC_R_SDHC_1>; fsl,tuning-start-tap = <20>; @@ -91,8 +91,8 @@ interrupts = ; reg = <0x5b030000 0x10000>; clocks = <&sdhc2_lpcg IMX_LPCG_CLK_4>, - <&sdhc2_lpcg IMX_LPCG_CLK_0>, - <&sdhc2_lpcg IMX_LPCG_CLK_5>; + <&sdhc2_lpcg IMX_LPCG_CLK_5>, + <&sdhc2_lpcg IMX_LPCG_CLK_0>; clock-names = "ipg", "ahb", "per"; power-domains = <&pd IMX_SC_R_SDHC_2>; status = "disabled"; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi @@ -27,8 +27,8 @@ #size-cells = <0>; interrupts = ; interrupt-parent = <&gic>; - clocks = <&spi0_lpcg 0>, - <&spi0_lpcg 1>; + clocks = <&spi0_lpcg IMX_LPCG_CLK_0>, + <&spi0_lpcg IMX_LPCG_CLK_4>; clock-names = "per", "ipg"; assigned-clocks = <&clk IMX_SC_R_SPI_0 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <60000000>; @@ -43,8 +43,8 @@ #size-cells = <0>; interrupts = ; interrupt-parent = <&gic>; - clocks = <&spi1_lpcg 0>, - <&spi1_lpcg 1>; + clocks = <&spi1_lpcg IMX_LPCG_CLK_0>, + <&spi1_lpcg IMX_LPCG_CLK_4>; clock-names = "per", "ipg"; assigned-clocks = <&clk IMX_SC_R_SPI_1 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <60000000>; @@ -59,8 +59,8 @@ #size-cells = <0>; interrupts = ; interrupt-parent = <&gic>; - clocks = <&spi2_lpcg 0>, - <&spi2_lpcg 1>; + clocks = <&spi2_lpcg IMX_LPCG_CLK_0>, + <&spi2_lpcg IMX_LPCG_CLK_4>; clock-names = "per", "ipg"; assigned-clocks = <&clk IMX_SC_R_SPI_2 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <60000000>; @@ -75,8 +75,8 @@ #size-cells = <0>; interrupts = ; interrupt-parent = <&gic>; - clocks = <&spi3_lpcg 0>, - <&spi3_lpcg 1>; + clocks = <&spi3_lpcg IMX_LPCG_CLK_0>, + <&spi3_lpcg IMX_LPCG_CLK_4>; clock-names = "per", "ipg"; assigned-clocks = <&clk IMX_SC_R_SPI_3 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <60000000>; @@ -144,8 +144,8 @@ compatible = "fsl,imx8qxp-pwm", "fsl,imx27-pwm"; reg = <0x5a190000 0x1000>; interrupts = ; - clocks = <&adma_pwm_lpcg 1>, - <&adma_pwm_lpcg 0>; + clocks = <&adma_pwm_lpcg IMX_LPCG_CLK_4>, + <&adma_pwm_lpcg IMX_LPCG_CLK_0>; clock-names = "ipg", "per"; assigned-clocks = <&clk IMX_SC_R_LCD_0_PWM_0 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <24000000>; @@ -377,8 +377,8 @@ reg = <0x5a880000 0x10000>; interrupts = ; interrupt-parent = <&gic>; - clocks = <&adc0_lpcg 0>, - <&adc0_lpcg 1>; + clocks = <&adc0_lpcg IMX_LPCG_CLK_0>, + <&adc0_lpcg IMX_LPCG_CLK_4>; clock-names = "per", "ipg"; assigned-clocks = <&clk IMX_SC_R_ADC_0 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <24000000>; @@ -392,8 +392,8 @@ reg = <0x5a890000 0x10000>; interrupts = ; interrupt-parent = <&gic>; - clocks = <&adc1_lpcg 0>, - <&adc1_lpcg 1>; + clocks = <&adc1_lpcg IMX_LPCG_CLK_0>, + <&adc1_lpcg IMX_LPCG_CLK_4>; clock-names = "per", "ipg"; assigned-clocks = <&clk IMX_SC_R_ADC_1 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <24000000>; @@ -406,8 +406,8 @@ reg = <0x5a8d0000 0x10000>; interrupts = ; interrupt-parent = <&gic>; - clocks = <&can0_lpcg 1>, - <&can0_lpcg 0>; + clocks = <&can0_lpcg IMX_LPCG_CLK_4>, + <&can0_lpcg IMX_LPCG_CLK_0>; clock-names = "ipg", "per"; assigned-clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <40000000>; @@ -427,8 +427,8 @@ * CAN1 shares CAN0's clock and to enable CAN0's clock it * has to be powered on. */ - clocks = <&can0_lpcg 1>, - <&can0_lpcg 0>; + clocks = <&can0_lpcg IMX_LPCG_CLK_4>, + <&can0_lpcg IMX_LPCG_CLK_0>; clock-names = "ipg", "per"; assigned-clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <40000000>; @@ -448,8 +448,8 @@ * CAN2 shares CAN0's clock and to enable CAN0's clock it * has to be powered on. */ - clocks = <&can0_lpcg 1>, - <&can0_lpcg 0>; + clocks = <&can0_lpcg IMX_LPCG_CLK_4>, + <&can0_lpcg IMX_LPCG_CLK_0>; clock-names = "ipg", "per"; assigned-clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <40000000>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi @@ -25,8 +25,8 @@ compatible = "fsl,imx27-pwm"; reg = <0x5d000000 0x10000>; clock-names = "ipg", "per"; - clocks = <&pwm0_lpcg 4>, - <&pwm0_lpcg 1>; + clocks = <&pwm0_lpcg IMX_LPCG_CLK_6>, + <&pwm0_lpcg IMX_LPCG_CLK_1>; assigned-clocks = <&clk IMX_SC_R_PWM_0 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <24000000>; #pwm-cells = <3>; @@ -38,8 +38,8 @@ compatible = "fsl,imx27-pwm"; reg = <0x5d010000 0x10000>; clock-names = "ipg", "per"; - clocks = <&pwm1_lpcg 4>, - <&pwm1_lpcg 1>; + clocks = <&pwm1_lpcg IMX_LPCG_CLK_6>, + <&pwm1_lpcg IMX_LPCG_CLK_1>; assigned-clocks = <&clk IMX_SC_R_PWM_1 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <24000000>; #pwm-cells = <3>; @@ -51,8 +51,8 @@ compatible = "fsl,imx27-pwm"; reg = <0x5d020000 0x10000>; clock-names = "ipg", "per"; - clocks = <&pwm2_lpcg 4>, - <&pwm2_lpcg 1>; + clocks = <&pwm2_lpcg IMX_LPCG_CLK_6>, + <&pwm2_lpcg IMX_LPCG_CLK_1>; assigned-clocks = <&clk IMX_SC_R_PWM_2 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <24000000>; #pwm-cells = <3>; @@ -64,8 +64,8 @@ compatible = "fsl,imx27-pwm"; reg = <0x5d030000 0x10000>; clock-names = "ipg", "per"; - clocks = <&pwm3_lpcg 4>, - <&pwm3_lpcg 1>; + clocks = <&pwm3_lpcg IMX_LPCG_CLK_6>, + <&pwm3_lpcg IMX_LPCG_CLK_1>; assigned-clocks = <&clk IMX_SC_R_PWM_3 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <24000000>; #pwm-cells = <3>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi @@ -15,7 +15,7 @@ mu_m0: mailbox@2d000000 { compatible = "fsl,imx6sx-mu"; reg = <0x2d000000 0x20000>; - interrupts = ; + interrupts = ; #mbox-cells = <2>; power-domains = <&pd IMX_SC_R_VPU_MU_0>; status = "disabled"; @@ -24,7 +24,7 @@ mu1_m0: mailbox@2d020000 { compatible = "fsl,imx6sx-mu"; reg = <0x2d020000 0x20000>; - interrupts = ; + interrupts = ; #mbox-cells = <2>; power-domains = <&pd IMX_SC_R_VPU_MU_1>; status = "disabled"; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts @@ -294,8 +294,8 @@ pinctrl_i2c4: i2c4grp { fsl,pins = < - MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 - MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 + MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x40000083 + MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x40000083 >; }; @@ -313,19 +313,19 @@ pinctrl_uart1: uart1grp { fsl,pins = < - MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX 0x140 - MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX 0x140 - MX8MM_IOMUXC_SAI2_RXD0_UART1_DCE_RTS_B 0x140 - MX8MM_IOMUXC_SAI2_TXFS_UART1_DCE_CTS_B 0x140 + MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX 0x0 + MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX 0x0 + MX8MM_IOMUXC_SAI2_RXD0_UART1_DCE_RTS_B 0x0 + MX8MM_IOMUXC_SAI2_TXFS_UART1_DCE_CTS_B 0x0 >; }; pinctrl_uart2: uart2grp { fsl,pins = < - MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0x140 - MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX 0x140 - MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 0x140 - MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B 0x140 + MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0x0 + MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX 0x0 + MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 0x0 + MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B 0x0 >; }; @@ -337,40 +337,40 @@ pinctrl_usdhc2: usdhc2grp { fsl,pins = < - MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x90 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 - MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019 - MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 + MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x19 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xd0 >; }; pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { fsl,pins = < - MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x94 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 - MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019 - MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 + MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x19 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xd0 >; }; pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { fsl,pins = < - MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x96 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 - MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019 - MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 + MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x19 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xd0 >; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts @@ -279,8 +279,8 @@ pinctrl_i2c4: i2c4grp { fsl,pins = < - MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 - MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 + MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x40000083 + MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x40000083 >; }; @@ -292,19 +292,19 @@ pinctrl_uart1: uart1grp { fsl,pins = < - MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX 0x140 - MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX 0x140 - MX8MM_IOMUXC_SAI2_RXD0_UART1_DCE_RTS_B 0x140 - MX8MM_IOMUXC_SAI2_TXFS_UART1_DCE_CTS_B 0x140 + MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX 0x0 + MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX 0x0 + MX8MM_IOMUXC_SAI2_RXD0_UART1_DCE_RTS_B 0x0 + MX8MM_IOMUXC_SAI2_TXFS_UART1_DCE_CTS_B 0x0 >; }; pinctrl_uart2: uart2grp { fsl,pins = < - MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0x140 - MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX 0x140 - MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 0x140 - MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B 0x140 + MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0x0 + MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX 0x0 + MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 0x0 + MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B 0x0 >; }; @@ -316,40 +316,40 @@ pinctrl_usdhc2: usdhc2grp { fsl,pins = < - MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x90 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 - MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019 - MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 + MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x19 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xd0 >; }; pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { fsl,pins = < - MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x94 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 - MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019 - MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 + MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x19 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xd0 >; }; pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { fsl,pins = < - MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x96 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 - MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019 - MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 + MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x19 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xd0 >; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/freescale/imx8mm-kontron-osm-s.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/freescale/imx8mm-kontron-osm-s.dtsi @@ -210,7 +210,7 @@ reg = <0x52>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_rtc>; - interrupts-extended = <&gpio4 1 IRQ_TYPE_LEVEL_HIGH>; + interrupts-extended = <&gpio4 1 IRQ_TYPE_LEVEL_LOW>; trickle-diode-disable; }; }; @@ -252,8 +252,8 @@ pinctrl_i2c1: i2c1grp { fsl,pins = < - MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 - MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 + MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x40000083 + MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x40000083 >; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/freescale/imx8mm-kontron-sl.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/freescale/imx8mm-kontron-sl.dtsi @@ -237,8 +237,8 @@ pinctrl_i2c1: i2c1grp { fsl,pins = < - MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 - MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 + MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x40000083 + MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x40000083 >; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi @@ -47,17 +47,6 @@ gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>; status = "okay"; }; - - reg_usb_otg1_vbus: regulator-usb-otg1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_reg_usb1_en>; - compatible = "regulator-fixed"; - regulator-name = "usb_otg1_vbus"; - gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; }; /* off-board header */ @@ -144,9 +133,10 @@ }; &usbotg1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg1>; dr_mode = "otg"; over-current-active-low; - vbus-supply = <®_usb_otg1_vbus>; status = "okay"; }; @@ -204,14 +194,6 @@ >; }; - pinctrl_reg_usb1_en: regusb1grp { - fsl,pins = < - MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x41 - MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x141 - MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x41 - >; - }; - pinctrl_spi2: spi2grp { fsl,pins = < MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6 @@ -234,4 +216,11 @@ MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140 >; }; + + pinctrl_usbotg1: usbotg1grp { + fsl,pins = < + MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x141 + MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x41 + >; + }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi @@ -6,6 +6,7 @@ #include #include #include "imx8mm.dtsi" +#include "imx8mm-overdrive.dtsi" / { chosen { @@ -145,7 +146,7 @@ regulator-max-microvolt = <3300000>; regulator-min-microvolt = <3300000>; regulator-name = "+V3.3_SD"; - startup-delay-us = <2000>; + startup-delay-us = <20000>; }; reserved-memory { @@ -929,7 +930,7 @@ /* Verdin GPIO_9_DSI (pulled-up as active-low) */ pinctrl_gpio_9_dsi: gpio9dsigrp { fsl,pins = - ; /* SODIMM 17 */ + ; /* SODIMM 17 */ }; /* Verdin GPIO_10_DSI (pulled-up as active-low) */ --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts @@ -211,13 +211,12 @@ simple-audio-card,cpu { sound-dai = <&sai3>; + frame-master; + bitclock-master; }; simple-audio-card,codec { sound-dai = <&wm8962>; - clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>; - frame-master; - bitclock-master; }; }; }; @@ -499,10 +498,9 @@ &sai3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sai3>; - assigned-clocks = <&clk IMX8MP_CLK_SAI3>, - <&clk IMX8MP_AUDIO_PLL2> ; - assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>; - assigned-clock-rates = <12288000>, <361267200>; + assigned-clocks = <&clk IMX8MP_CLK_SAI3>; + assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>; + assigned-clock-rates = <12288000>; fsl,sai-mclk-direction-output; status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts @@ -121,7 +121,7 @@ flash@0 { /* W25Q128JVEI */ compatible = "jedec,spi-nor"; reg = <0>; - spi-max-frequency = <100000000>; /* Up to 133 MHz */ + spi-max-frequency = <40000000>; spi-tx-bus-width = <1>; spi-rx-bus-width = <1>; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi @@ -254,7 +254,7 @@ <&clk IMX8MP_CLK_CLKOUT2>, <&clk IMX8MP_AUDIO_PLL2_OUT>; assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>; - assigned-clock-rates = <13000000>, <13000000>, <156000000>; + assigned-clock-rates = <13000000>, <13000000>, <208000000>; reset-gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>; status = "disabled"; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/freescale/imx8mp-evk.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/freescale/imx8mp-evk.dts @@ -23,7 +23,7 @@ port { hdmi_connector_in: endpoint { - remote-endpoint = <&adv7533_out>; + remote-endpoint = <&adv7535_out>; }; }; }; @@ -107,6 +107,13 @@ enable-active-high; }; + reg_vext_3v3: regulator-vext-3v3 { + compatible = "regulator-fixed"; + regulator-name = "VEXT_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + sound { compatible = "simple-audio-card"; simple-audio-card,name = "wm8960-audio"; @@ -364,7 +371,7 @@ regulator-always-on; }; - BUCK5 { + reg_buck5: BUCK5 { regulator-name = "BUCK5"; regulator-min-microvolt = <1650000>; regulator-max-microvolt = <1950000>; @@ -415,14 +422,16 @@ hdmi@3d { compatible = "adi,adv7535"; - reg = <0x3d>, <0x3c>, <0x3e>, <0x3f>; - reg-names = "main", "cec", "edid", "packet"; + reg = <0x3d>; + interrupt-parent = <&gpio1>; + interrupts = <9 IRQ_TYPE_EDGE_FALLING>; adi,dsi-lanes = <4>; - adi,input-depth = <8>; - adi,input-colorspace = "rgb"; - adi,input-clock = "1x"; - adi,input-style = <1>; - adi,input-justification = "evenly"; + avdd-supply = <®_buck5>; + dvdd-supply = <®_buck5>; + pvdd-supply = <®_buck5>; + a2vdd-supply = <®_buck5>; + v3p3-supply = <®_vext_3v3>; + v1p2-supply = <®_buck5>; ports { #address-cells = <1>; @@ -431,7 +440,7 @@ port@0 { reg = <0>; - adv7533_in: endpoint { + adv7535_in: endpoint { remote-endpoint = <&dsi_out>; }; }; @@ -439,7 +448,7 @@ port@1 { reg = <1>; - adv7533_out: endpoint { + adv7535_out: endpoint { remote-endpoint = <&hdmi_connector_in>; }; }; @@ -524,7 +533,7 @@ reg = <1>; dsi_out: endpoint { - remote-endpoint = <&adv7533_in>; + remote-endpoint = <&adv7535_in>; data-lanes = <1 2 3 4>; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi @@ -14,6 +14,7 @@ pinctrl-0 = <&pinctrl_usbcon1>; type = "micro"; label = "otg"; + vbus-supply = <®_usb1_vbus>; id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; port { @@ -183,7 +184,6 @@ }; &usb3_phy0 { - vbus-supply = <®_usb1_vbus>; status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi @@ -14,6 +14,7 @@ pinctrl-0 = <&pinctrl_usbcon1>; type = "micro"; label = "otg"; + vbus-supply = <®_usb1_vbus>; id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; port { @@ -182,7 +183,7 @@ bluetooth { compatible = "brcm,bcm4330-bt"; - shutdown-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; + shutdown-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; }; }; @@ -202,7 +203,6 @@ }; &usb3_phy0 { - vbus-supply = <®_usb1_vbus>; status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi @@ -151,7 +151,7 @@ regulator-max-microvolt = <3300000>; regulator-min-microvolt = <3300000>; regulator-name = "+V3.3_SD"; - startup-delay-us = <2000>; + startup-delay-us = <20000>; }; reserved-memory { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -789,6 +789,23 @@ reg = ; }; + pgc_mlmix: power-domain@4 { + #power-domain-cells = <0>; + reg = ; + clocks = <&clk IMX8MP_CLK_ML_AXI>, + <&clk IMX8MP_CLK_ML_AHB>, + <&clk IMX8MP_CLK_NPU_ROOT>; + assigned-clocks = <&clk IMX8MP_CLK_ML_CORE>, + <&clk IMX8MP_CLK_ML_AXI>, + <&clk IMX8MP_CLK_ML_AHB>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>, + <&clk IMX8MP_SYS_PLL1_800M>, + <&clk IMX8MP_SYS_PLL1_800M>; + assigned-clock-rates = <800000000>, + <800000000>, + <300000000>; + }; + pgc_audio: power-domain@5 { #power-domain-cells = <0>; reg = ; @@ -821,6 +838,12 @@ assigned-clock-rates = <800000000>, <400000000>; }; + pgc_vpumix: power-domain@8 { + #power-domain-cells = <0>; + reg = ; + clocks = <&clk IMX8MP_CLK_VPU_ROOT>; + }; + pgc_gpu3d: power-domain@9 { #power-domain-cells = <0>; reg = ; @@ -836,69 +859,64 @@ <&clk IMX8MP_CLK_MEDIA_APB_ROOT>; }; - pgc_mipi_phy2: power-domain@16 { + pgc_vpu_g1: power-domain@11 { #power-domain-cells = <0>; - reg = ; + power-domains = <&pgc_vpumix>; + reg = ; + clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>; }; - pgc_hsiomix: power-domain@17 { + pgc_vpu_g2: power-domain@12 { #power-domain-cells = <0>; - reg = ; - clocks = <&clk IMX8MP_CLK_HSIO_AXI>, - <&clk IMX8MP_CLK_HSIO_ROOT>; - assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>; - assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>; - assigned-clock-rates = <500000000>; + power-domains = <&pgc_vpumix>; + reg = ; + clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>; + }; - pgc_ispdwp: power-domain@18 { + pgc_vpu_vc8000e: power-domain@13 { #power-domain-cells = <0>; - reg = ; - clocks = <&clk IMX8MP_CLK_MEDIA_ISP_ROOT>; + power-domains = <&pgc_vpumix>; + reg = ; + clocks = <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>; }; - pgc_vpumix: power-domain@19 { + pgc_hdmimix: power-domain@14 { #power-domain-cells = <0>; - reg = ; - clocks = <&clk IMX8MP_CLK_VPU_ROOT>; + reg = ; + clocks = <&clk IMX8MP_CLK_HDMI_ROOT>, + <&clk IMX8MP_CLK_HDMI_APB>; + assigned-clocks = <&clk IMX8MP_CLK_HDMI_AXI>, + <&clk IMX8MP_CLK_HDMI_APB>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>, + <&clk IMX8MP_SYS_PLL1_133M>; + assigned-clock-rates = <500000000>, <133000000>; }; - pgc_vpu_g1: power-domain@20 { + pgc_hdmi_phy: power-domain@15 { #power-domain-cells = <0>; - power-domains = <&pgc_vpumix>; - reg = ; - clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>; + reg = ; }; - pgc_vpu_g2: power-domain@21 { + pgc_mipi_phy2: power-domain@16 { #power-domain-cells = <0>; - power-domains = <&pgc_vpumix>; - reg = ; - clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>; + reg = ; }; - pgc_vpu_vc8000e: power-domain@22 { + pgc_hsiomix: power-domain@17 { #power-domain-cells = <0>; - power-domains = <&pgc_vpumix>; - reg = ; - clocks = <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>; + reg = ; + clocks = <&clk IMX8MP_CLK_HSIO_AXI>, + <&clk IMX8MP_CLK_HSIO_ROOT>; + assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>; + assigned-clock-rates = <500000000>; }; - pgc_mlmix: power-domain@24 { + pgc_ispdwp: power-domain@18 { #power-domain-cells = <0>; - reg = ; - clocks = <&clk IMX8MP_CLK_ML_AXI>, - <&clk IMX8MP_CLK_ML_AHB>, - <&clk IMX8MP_CLK_NPU_ROOT>; - assigned-clocks = <&clk IMX8MP_CLK_ML_CORE>, - <&clk IMX8MP_CLK_ML_AXI>, - <&clk IMX8MP_CLK_ML_AHB>; - assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>, - <&clk IMX8MP_SYS_PLL1_800M>, - <&clk IMX8MP_SYS_PLL1_800M>; - assigned-clock-rates = <800000000>, - <800000000>, - <300000000>; + reg = ; + clocks = <&clk IMX8MP_CLK_MEDIA_ISP_ROOT>; }; }; }; @@ -1243,7 +1261,7 @@ compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc"; reg = <0x30b40000 0x10000>; interrupts = ; - clocks = <&clk IMX8MP_CLK_DUMMY>, + clocks = <&clk IMX8MP_CLK_IPG_ROOT>, <&clk IMX8MP_CLK_NAND_USDHC_BUS>, <&clk IMX8MP_CLK_USDHC1_ROOT>; clock-names = "ipg", "ahb", "per"; @@ -1257,7 +1275,7 @@ compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc"; reg = <0x30b50000 0x10000>; interrupts = ; - clocks = <&clk IMX8MP_CLK_DUMMY>, + clocks = <&clk IMX8MP_CLK_IPG_ROOT>, <&clk IMX8MP_CLK_NAND_USDHC_BUS>, <&clk IMX8MP_CLK_USDHC2_ROOT>; clock-names = "ipg", "ahb", "per"; @@ -1271,7 +1289,7 @@ compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc"; reg = <0x30b60000 0x10000>; interrupts = ; - clocks = <&clk IMX8MP_CLK_DUMMY>, + clocks = <&clk IMX8MP_CLK_IPG_ROOT>, <&clk IMX8MP_CLK_NAND_USDHC_BUS>, <&clk IMX8MP_CLK_USDHC3_ROOT>; clock-names = "ipg", "ahb", "per"; @@ -1885,6 +1903,27 @@ #power-domain-cells = <1>; #clock-cells = <0>; }; + + hdmi_blk_ctrl: blk-ctrl@32fc0000 { + compatible = "fsl,imx8mp-hdmi-blk-ctrl", "syscon"; + reg = <0x32fc0000 0x1000>; + clocks = <&clk IMX8MP_CLK_HDMI_APB>, + <&clk IMX8MP_CLK_HDMI_ROOT>, + <&clk IMX8MP_CLK_HDMI_REF_266M>, + <&clk IMX8MP_CLK_HDMI_24M>, + <&clk IMX8MP_CLK_HDMI_FDCC_TST>; + clock-names = "apb", "axi", "ref_266m", "ref_24m", "fdcc"; + power-domains = <&pgc_hdmimix>, <&pgc_hdmimix>, + <&pgc_hdmimix>, <&pgc_hdmimix>, + <&pgc_hdmimix>, <&pgc_hdmimix>, + <&pgc_hdmimix>, <&pgc_hdmi_phy>, + <&pgc_hdmimix>, <&pgc_hdmimix>; + power-domain-names = "bus", "irqsteer", "lcdif", + "pai", "pvi", "trng", + "hdmi-tx", "hdmi-tx-phy", + "hdcp", "hrv"; + #power-domain-cells = <1>; + }; }; pcie: pcie@33800000 { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/freescale/imx8qm-mek.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/freescale/imx8qm-mek.dts @@ -36,7 +36,7 @@ regulator-name = "SD1_SPWR"; regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; - gpio = <&lsio_gpio4 19 GPIO_ACTIVE_HIGH>; + gpio = <&lsio_gpio4 7 GPIO_ACTIVE_HIGH>; enable-active-high; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi @@ -96,15 +96,30 @@ status = "okay"; }; +/* It is eDMA1 in 8QM RM, but 8QXP it is eDMA3 */ &edma3 { + reg = <0x5a9f0000 0x210000>; + dma-channels = <10>; + interrupts = , + , + , + , + , + , + , + , + , + ; power-domains = <&pd IMX_SC_R_DMA_1_CH0>, - <&pd IMX_SC_R_DMA_1_CH1>, - <&pd IMX_SC_R_DMA_1_CH2>, - <&pd IMX_SC_R_DMA_1_CH3>, - <&pd IMX_SC_R_DMA_1_CH4>, - <&pd IMX_SC_R_DMA_1_CH5>, - <&pd IMX_SC_R_DMA_1_CH6>, - <&pd IMX_SC_R_DMA_1_CH7>; + <&pd IMX_SC_R_DMA_1_CH1>, + <&pd IMX_SC_R_DMA_1_CH2>, + <&pd IMX_SC_R_DMA_1_CH3>, + <&pd IMX_SC_R_DMA_1_CH4>, + <&pd IMX_SC_R_DMA_1_CH5>, + <&pd IMX_SC_R_DMA_1_CH6>, + <&pd IMX_SC_R_DMA_1_CH7>, + <&pd IMX_SC_R_DMA_1_CH8>, + <&pd IMX_SC_R_DMA_1_CH9>; }; &flexcan1 { @@ -112,15 +127,15 @@ }; &flexcan2 { - clocks = <&can1_lpcg 1>, - <&can1_lpcg 0>; + clocks = <&can1_lpcg IMX_LPCG_CLK_4>, + <&can1_lpcg IMX_LPCG_CLK_0>; assigned-clocks = <&clk IMX_SC_R_CAN_1 IMX_SC_PM_CLK_PER>; fsl,clk-source = /bits/ 8 <1>; }; &flexcan3 { - clocks = <&can2_lpcg 1>, - <&can2_lpcg 0>; + clocks = <&can2_lpcg IMX_LPCG_CLK_4>, + <&can2_lpcg IMX_LPCG_CLK_0>; assigned-clocks = <&clk IMX_SC_R_CAN_2 IMX_SC_PM_CLK_PER>; fsl,clk-source = /bits/ 8 <1>; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/freescale/imx8qxp-ss-vpu.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/freescale/imx8qxp-ss-vpu.dtsi @@ -5,6 +5,14 @@ * Author: Alexander Stein */ +&mu_m0 { + interrupts = ; +}; + +&mu1_m0 { + interrupts = ; +}; + &vpu_core0 { reg = <0x2d040000 0x10000>; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/freescale/imx8ulp.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/freescale/imx8ulp.dtsi @@ -352,7 +352,7 @@ }; flexspi2: spi@29810000 { - compatible = "nxp,imx8mm-fspi"; + compatible = "nxp,imx8ulp-fspi"; reg = <0x29810000 0x10000>, <0x60000000 0x10000000>; reg-names = "fspi_base", "fspi_mmap"; #address-cells = <1>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts @@ -175,7 +175,6 @@ vmmc-supply = <®_usdhc2_vmmc>; bus-width = <4>; status = "okay"; - no-sdio; no-mmc; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla.dts @@ -438,7 +438,7 @@ pinctrl-0 = <&pinctrl_usdhc2_hs>, <&pinctrl_usdhc2_gpio>; pinctrl-1 = <&pinctrl_usdhc2_uhs>, <&pinctrl_usdhc2_gpio>; pinctrl-2 = <&pinctrl_usdhc2_uhs>, <&pinctrl_usdhc2_gpio>; - cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>; + cd-gpios = <&gpio3 0 GPIO_ACTIVE_LOW>; vmmc-supply = <®_usdhc2_vmmc>; bus-width = <4>; no-sdio; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/freescale/imx93-tqma9352.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/freescale/imx93-tqma9352.dtsi @@ -19,7 +19,7 @@ linux,cma { compatible = "shared-dma-pool"; reusable; - alloc-ranges = <0 0x60000000 0 0x40000000>; + alloc-ranges = <0 0x80000000 0 0x40000000>; size = <0 0x10000000>; linux,cma-default; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/freescale/imx93.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/freescale/imx93.dtsi @@ -841,7 +841,7 @@ reg-names = "ram", "regs", "rxfifo", "txfifo"; interrupts = , ; - clocks = <&clk IMX93_CLK_BUS_WAKEUP>, + clocks = <&clk IMX93_CLK_SPDIF_IPG>, <&clk IMX93_CLK_SPDIF_GATE>, <&clk IMX93_CLK_DUMMY>, <&clk IMX93_CLK_AUD_XCVR_GATE>; @@ -1030,6 +1030,8 @@ fsl,num-tx-queues = <3>; fsl,num-rx-queues = <3>; fsl,stop-mode = <&wakeupmix_gpr 0x0c 1>; + nvmem-cells = <ð_mac1>; + nvmem-cell-names = "mac-address"; status = "disabled"; }; @@ -1051,7 +1053,9 @@ <&clk IMX93_CLK_SYS_PLL_PFD0_DIV2>; assigned-clock-rates = <100000000>, <250000000>; intf_mode = <&wakeupmix_gpr 0x28>; - snps,clk-csr = <0>; + snps,clk-csr = <6>; + nvmem-cells = <ð_mac2>; + nvmem-cell-names = "mac-address"; status = "disabled"; }; @@ -1136,6 +1140,15 @@ reg = <0x47510000 0x10000>; #address-cells = <1>; #size-cells = <1>; + + eth_mac1: mac-address@4ec { + reg = <0x4ec 0x6>; + }; + + eth_mac2: mac-address@4f2 { + reg = <0x4f2 0x6>; + }; + }; s4muap: mailbox@47520000 { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi @@ -58,7 +58,7 @@ gic: interrupt-controller@f1001000 { compatible = "arm,gic-400"; reg = <0x0 0xf1001000 0x0 0x1000>, /* GICD */ - <0x0 0xf1002000 0x0 0x100>; /* GICC */ + <0x0 0xf1002000 0x0 0x2000>; /* GICC */ #address-cells = <0>; #interrupt-cells = <3>; interrupt-controller; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/marvell/armada-37xx.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/marvell/armada-37xx.dtsi @@ -431,14 +431,14 @@ crypto: crypto@90000 { compatible = "inside-secure,safexcel-eip97ies"; reg = <0x90000 0x20000>; - interrupts = , - , + interrupts = , , , , - ; - interrupt-names = "mem", "ring0", "ring1", - "ring2", "ring3", "eip"; + , + ; + interrupt-names = "ring0", "ring1", "ring2", + "ring3", "eip", "mem"; clocks = <&nb_periph_clk 15>; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi @@ -511,14 +511,14 @@ CP11X_LABEL(crypto): crypto@800000 { compatible = "inside-secure,safexcel-eip197b"; reg = <0x800000 0x200000>; - interrupts = <87 IRQ_TYPE_LEVEL_HIGH>, - <88 IRQ_TYPE_LEVEL_HIGH>, + interrupts = <88 IRQ_TYPE_LEVEL_HIGH>, <89 IRQ_TYPE_LEVEL_HIGH>, <90 IRQ_TYPE_LEVEL_HIGH>, <91 IRQ_TYPE_LEVEL_HIGH>, - <92 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "mem", "ring0", "ring1", - "ring2", "ring3", "eip"; + <92 IRQ_TYPE_LEVEL_HIGH>, + <87 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "ring0", "ring1", "ring2", "ring3", + "eip", "mem"; clock-names = "core", "reg"; clocks = <&CP11X_LABEL(clk) 1 26>, <&CP11X_LABEL(clk) 1 17>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt2712-evb.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt2712-evb.dts @@ -129,7 +129,7 @@ }; &pio { - eth_default: eth_default { + eth_default: eth-default-pins { tx_pins { pinmux = , , @@ -156,7 +156,7 @@ }; }; - eth_sleep: eth_sleep { + eth_sleep: eth-sleep-pins { tx_pins { pinmux = , , @@ -182,14 +182,14 @@ }; }; - usb0_id_pins_float: usb0_iddig { + usb0_id_pins_float: usb0-iddig-pins { pins_iddig { pinmux = ; bias-pull-up; }; }; - usb1_id_pins_float: usb1_iddig { + usb1_id_pins_float: usb1-iddig-pins { pins_iddig { pinmux = ; bias-pull-up; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt2712e.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt2712e.dtsi @@ -249,10 +249,11 @@ #clock-cells = <1>; }; - infracfg: syscon@10001000 { + infracfg: clock-controller@10001000 { compatible = "mediatek,mt2712-infracfg", "syscon"; reg = <0 0x10001000 0 0x1000>; #clock-cells = <1>; + #reset-cells = <1>; }; pericfg: syscon@10003000 { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt6357.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt6357.dtsi @@ -10,6 +10,11 @@ mt6357_pmic: pmic { compatible = "mediatek,mt6357"; + pmic_adc: adc { + compatible = "mediatek,mt6357-auxadc"; + #io-channel-cells = <1>; + }; + regulators { mt6357_vproc_reg: buck-vproc { regulator-name = "vproc"; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt6358.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt6358.dtsi @@ -10,12 +10,17 @@ interrupt-controller; #interrupt-cells = <2>; - mt6358codec: mt6358codec { + pmic_adc: adc { + compatible = "mediatek,mt6358-auxadc"; + #io-channel-cells = <1>; + }; + + mt6358codec: audio-codec { compatible = "mediatek,mt6358-sound"; mediatek,dmic-mode = <0>; /* two-wires */ }; - mt6358regulator: mt6358regulator { + mt6358regulator: regulators { compatible = "mediatek,mt6358-regulator"; mt6358_vdram1_reg: buck_vdram1 { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt6359.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt6359.dtsi @@ -9,6 +9,11 @@ interrupt-controller; #interrupt-cells = <2>; + pmic_adc: adc { + compatible = "mediatek,mt6359-auxadc"; + #io-channel-cells = <1>; + }; + mt6359codec: mt6359codec { }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts @@ -75,6 +75,7 @@ memory@40000000 { reg = <0 0x40000000 0 0x40000000>; + device_type = "memory"; }; reg_1p8v: regulator-1p8v { @@ -316,8 +317,8 @@ /* eMMC is shared pin with parallel NAND */ emmc_pins_default: emmc-pins-default { mux { - function = "emmc", "emmc_rst"; - groups = "emmc"; + function = "emmc"; + groups = "emmc", "emmc_rst"; }; /* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7", --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts @@ -57,6 +57,7 @@ memory@40000000 { reg = <0 0x40000000 0 0x20000000>; + device_type = "memory"; }; reg_1p8v: regulator-1p8v { @@ -243,8 +244,8 @@ /* eMMC is shared pin with parallel NAND */ emmc_pins_default: emmc-pins-default { mux { - function = "emmc", "emmc_rst"; - groups = "emmc"; + function = "emmc"; + groups = "emmc", "emmc_rst"; }; /* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7", --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt7622.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt7622.dtsi @@ -252,7 +252,7 @@ clock-names = "hif_sel"; }; - cir: cir@10009000 { + cir: ir-receiver@10009000 { compatible = "mediatek,mt7622-cir"; reg = <0 0x10009000 0 0x1000>; interrupts = ; @@ -283,16 +283,14 @@ }; }; - apmixedsys: apmixedsys@10209000 { - compatible = "mediatek,mt7622-apmixedsys", - "syscon"; + apmixedsys: clock-controller@10209000 { + compatible = "mediatek,mt7622-apmixedsys"; reg = <0 0x10209000 0 0x1000>; #clock-cells = <1>; }; - topckgen: topckgen@10210000 { - compatible = "mediatek,mt7622-topckgen", - "syscon"; + topckgen: clock-controller@10210000 { + compatible = "mediatek,mt7622-topckgen"; reg = <0 0x10210000 0 0x1000>; #clock-cells = <1>; }; @@ -515,7 +513,6 @@ <&pericfg CLK_PERI_AUXADC_PD>; clock-names = "therm", "auxadc"; resets = <&pericfg MT7622_PERI_THERM_SW_RST>; - reset-names = "therm"; mediatek,auxadc = <&auxadc>; mediatek,apmixedsys = <&apmixedsys>; nvmem-cells = <&thermal_calibration>; @@ -734,9 +731,8 @@ power-domains = <&scpsys MT7622_POWER_DOMAIN_WB>; }; - ssusbsys: ssusbsys@1a000000 { - compatible = "mediatek,mt7622-ssusbsys", - "syscon"; + ssusbsys: clock-controller@1a000000 { + compatible = "mediatek,mt7622-ssusbsys"; reg = <0 0x1a000000 0 0x1000>; #clock-cells = <1>; #reset-cells = <1>; @@ -793,9 +789,8 @@ }; }; - pciesys: pciesys@1a100800 { - compatible = "mediatek,mt7622-pciesys", - "syscon"; + pciesys: clock-controller@1a100800 { + compatible = "mediatek,mt7622-pciesys"; reg = <0 0x1a100800 0 0x1000>; #clock-cells = <1>; #reset-cells = <1>; @@ -921,12 +916,13 @@ }; }; - hifsys: syscon@1af00000 { - compatible = "mediatek,mt7622-hifsys", "syscon"; + hifsys: clock-controller@1af00000 { + compatible = "mediatek,mt7622-hifsys"; reg = <0 0x1af00000 0 0x70>; + #clock-cells = <1>; }; - ethsys: syscon@1b000000 { + ethsys: clock-controller@1b000000 { compatible = "mediatek,mt7622-ethsys", "syscon"; reg = <0 0x1b000000 0 0x1000>; @@ -966,9 +962,7 @@ }; eth: ethernet@1b100000 { - compatible = "mediatek,mt7622-eth", - "mediatek,mt2701-eth", - "syscon"; + compatible = "mediatek,mt7622-eth"; reg = <0 0x1b100000 0 0x20000>; interrupts = , , --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts @@ -43,7 +43,7 @@ #cooling-cells = <2>; /* cooling level (0, 1, 2) - pwm inverted */ cooling-levels = <255 96 0>; - pwms = <&pwm 0 10000 0>; + pwms = <&pwm 0 10000>; status = "okay"; }; @@ -146,19 +146,19 @@ &cpu_thermal { cooling-maps { - cpu-active-high { + map-cpu-active-high { /* active: set fan to cooling level 2 */ cooling-device = <&fan 2 2>; trip = <&cpu_trip_active_high>; }; - cpu-active-med { + map-cpu-active-med { /* active: set fan to cooling level 1 */ cooling-device = <&fan 1 1>; trip = <&cpu_trip_active_med>; }; - cpu-active-low { + map-cpu-active-low { /* active: set fan to cooling level 0 */ cooling-device = <&fan 0 0>; trip = <&cpu_trip_active_low>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts @@ -237,12 +237,13 @@ pinctrl-0 = <&spi_flash_pins>; cs-gpios = <0>, <0>; status = "okay"; - spi_nand: spi_nand@0 { + + spi_nand: flash@0 { compatible = "spi-nand"; reg = <0>; spi-max-frequency = <10000000>; - spi-tx-buswidth = <4>; - spi-rx-buswidth = <4>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt7986a.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt7986a.dtsi @@ -16,49 +16,49 @@ #address-cells = <2>; #size-cells = <2>; - clk40m: oscillator-40m { - compatible = "fixed-clock"; - clock-frequency = <40000000>; - #clock-cells = <0>; - clock-output-names = "clkxtal"; - }; - cpus { #address-cells = <1>; #size-cells = <0>; cpu0: cpu@0 { - device_type = "cpu"; compatible = "arm,cortex-a53"; - enable-method = "psci"; reg = <0x0>; + device_type = "cpu"; + enable-method = "psci"; #cooling-cells = <2>; }; cpu1: cpu@1 { - device_type = "cpu"; compatible = "arm,cortex-a53"; - enable-method = "psci"; reg = <0x1>; + device_type = "cpu"; + enable-method = "psci"; #cooling-cells = <2>; }; cpu2: cpu@2 { - device_type = "cpu"; compatible = "arm,cortex-a53"; - enable-method = "psci"; reg = <0x2>; + device_type = "cpu"; + enable-method = "psci"; #cooling-cells = <2>; }; cpu3: cpu@3 { - device_type = "cpu"; - enable-method = "psci"; compatible = "arm,cortex-a53"; reg = <0x3>; + device_type = "cpu"; + enable-method = "psci"; #cooling-cells = <2>; }; }; + clk40m: oscillator-40m { + compatible = "fixed-clock"; + clock-frequency = <40000000>; + #clock-cells = <0>; + clock-output-names = "clkxtal"; + }; + psci { compatible = "arm,psci-0.2"; method = "smc"; @@ -121,38 +121,30 @@ }; - timer { - compatible = "arm,armv8-timer"; - interrupt-parent = <&gic>; - interrupts = , - , - , - ; - }; - soc { - #address-cells = <2>; - #size-cells = <2>; compatible = "simple-bus"; ranges; + #address-cells = <2>; + #size-cells = <2>; gic: interrupt-controller@c000000 { compatible = "arm,gic-v3"; - #interrupt-cells = <3>; - interrupt-parent = <&gic>; - interrupt-controller; reg = <0 0x0c000000 0 0x10000>, /* GICD */ <0 0x0c080000 0 0x80000>, /* GICR */ <0 0x0c400000 0 0x2000>, /* GICC */ <0 0x0c410000 0 0x1000>, /* GICH */ <0 0x0c420000 0 0x2000>; /* GICV */ + interrupt-parent = <&gic>; interrupts = ; + interrupt-controller; + #interrupt-cells = <3>; }; infracfg: infracfg@10001000 { compatible = "mediatek,mt7986-infracfg", "syscon"; reg = <0 0x10001000 0 0x1000>; #clock-cells = <1>; + #reset-cells = <1>; }; wed_pcie: wed-pcie@10003000 { @@ -202,6 +194,19 @@ #interrupt-cells = <2>; }; + pwm: pwm@10048000 { + compatible = "mediatek,mt7986-pwm"; + reg = <0 0x10048000 0 0x1000>; + #pwm-cells = <2>; + interrupts = ; + clocks = <&topckgen CLK_TOP_PWM_SEL>, + <&infracfg CLK_INFRA_PWM_STA>, + <&infracfg CLK_INFRA_PWM1_CK>, + <&infracfg CLK_INFRA_PWM2_CK>; + clock-names = "top", "main", "pwm1", "pwm2"; + status = "disabled"; + }; + sgmiisys0: syscon@10060000 { compatible = "mediatek,mt7986-sgmiisys_0", "syscon"; @@ -234,26 +239,11 @@ ; interrupt-names = "ring0", "ring1", "ring2", "ring3"; clocks = <&infracfg CLK_INFRA_EIP97_CK>; - clock-names = "infra_eip97_ck"; assigned-clocks = <&topckgen CLK_TOP_EIP_B_SEL>; assigned-clock-parents = <&apmixedsys CLK_APMIXED_NET2PLL>; status = "disabled"; }; - pwm: pwm@10048000 { - compatible = "mediatek,mt7986-pwm"; - reg = <0 0x10048000 0 0x1000>; - #clock-cells = <1>; - #pwm-cells = <2>; - interrupts = ; - clocks = <&topckgen CLK_TOP_PWM_SEL>, - <&infracfg CLK_INFRA_PWM_STA>, - <&infracfg CLK_INFRA_PWM1_CK>, - <&infracfg CLK_INFRA_PWM2_CK>; - clock-names = "top", "main", "pwm1", "pwm2"; - status = "disabled"; - }; - uart0: serial@11002000 { compatible = "mediatek,mt7986-uart", "mediatek,mt6577-uart"; @@ -311,9 +301,9 @@ spi0: spi@1100a000 { compatible = "mediatek,mt7986-spi-ipm", "mediatek,spi-ipm"; + reg = <0 0x1100a000 0 0x100>; #address-cells = <1>; #size-cells = <0>; - reg = <0 0x1100a000 0 0x100>; interrupts = ; clocks = <&topckgen CLK_TOP_MPLL_D2>, <&topckgen CLK_TOP_SPI_SEL>, @@ -325,9 +315,9 @@ spi1: spi@1100b000 { compatible = "mediatek,mt7986-spi-ipm", "mediatek,spi-ipm"; + reg = <0 0x1100b000 0 0x100>; #address-cells = <1>; #size-cells = <0>; - reg = <0 0x1100b000 0 0x100>; interrupts = ; clocks = <&topckgen CLK_TOP_MPLL_D2>, <&topckgen CLK_TOP_SPIM_MST_SEL>, @@ -337,6 +327,20 @@ status = "disabled"; }; + thermal: thermal@1100c800 { + compatible = "mediatek,mt7986-thermal"; + reg = <0 0x1100c800 0 0x800>; + interrupts = ; + clocks = <&infracfg CLK_INFRA_THERM_CK>, + <&infracfg CLK_INFRA_ADC_26M_CK>; + clock-names = "therm", "auxadc"; + nvmem-cells = <&thermal_calibration>; + nvmem-cell-names = "calibration-data"; + #thermal-sensor-cells = <1>; + mediatek,auxadc = <&auxadc>; + mediatek,apmixedsys = <&apmixedsys>; + }; + auxadc: adc@1100d000 { compatible = "mediatek,mt7986-auxadc"; reg = <0 0x1100d000 0 0x1000>; @@ -388,39 +392,23 @@ status = "disabled"; }; - thermal: thermal@1100c800 { - #thermal-sensor-cells = <1>; - compatible = "mediatek,mt7986-thermal"; - reg = <0 0x1100c800 0 0x800>; - interrupts = ; - clocks = <&infracfg CLK_INFRA_THERM_CK>, - <&infracfg CLK_INFRA_ADC_26M_CK>, - <&infracfg CLK_INFRA_ADC_FRC_CK>; - clock-names = "therm", "auxadc", "adc_32k"; - mediatek,auxadc = <&auxadc>; - mediatek,apmixedsys = <&apmixedsys>; - nvmem-cells = <&thermal_calibration>; - nvmem-cell-names = "calibration-data"; - }; - pcie: pcie@11280000 { compatible = "mediatek,mt7986-pcie", "mediatek,mt8192-pcie"; + reg = <0x00 0x11280000 0x00 0x4000>; + reg-names = "pcie-mac"; + ranges = <0x82000000 0x00 0x20000000 0x00 + 0x20000000 0x00 0x10000000>; device_type = "pci"; #address-cells = <3>; #size-cells = <2>; - reg = <0x00 0x11280000 0x00 0x4000>; - reg-names = "pcie-mac"; interrupts = ; bus-range = <0x00 0xff>; - ranges = <0x82000000 0x00 0x20000000 0x00 - 0x20000000 0x00 0x10000000>; clocks = <&infracfg CLK_INFRA_IPCIE_PIPE_CK>, <&infracfg CLK_INFRA_IPCIE_CK>, <&infracfg CLK_INFRA_IPCIER_CK>, <&infracfg CLK_INFRA_IPCIEB_CK>; clock-names = "pl_250m", "tl_26m", "peri_26m", "top_133m"; - status = "disabled"; phys = <&pcie_port PHY_TYPE_PCIE>; phy-names = "pcie-phy"; @@ -431,6 +419,8 @@ <0 0 0 2 &pcie_intc 1>, <0 0 0 3 &pcie_intc 2>, <0 0 0 4 &pcie_intc 3>; + status = "disabled"; + pcie_intc: interrupt-controller { #address-cells = <0>; #interrupt-cells = <1>; @@ -441,9 +431,9 @@ pcie_phy: t-phy { compatible = "mediatek,mt7986-tphy", "mediatek,generic-tphy-v2"; + ranges; #address-cells = <2>; #size-cells = <2>; - ranges; status = "disabled"; pcie_port: pcie-phy@11c00000 { @@ -468,9 +458,9 @@ usb_phy: t-phy@11e10000 { compatible = "mediatek,mt7986-tphy", "mediatek,generic-tphy-v2"; + ranges = <0 0 0x11e10000 0x1700>; #address-cells = <1>; #size-cells = <1>; - ranges = <0 0 0x11e10000 0x1700>; status = "disabled"; u2port0: usb-phy@0 { @@ -498,8 +488,6 @@ }; ethsys: syscon@15000000 { - #address-cells = <1>; - #size-cells = <1>; compatible = "mediatek,mt7986-ethsys", "syscon"; reg = <0 0x15000000 0 0x1000>; @@ -533,20 +521,6 @@ mediatek,wo-ccif = <&wo_ccif1>; }; - wo_ccif0: syscon@151a5000 { - compatible = "mediatek,mt7986-wo-ccif", "syscon"; - reg = <0 0x151a5000 0 0x1000>; - interrupt-parent = <&gic>; - interrupts = ; - }; - - wo_ccif1: syscon@151ad000 { - compatible = "mediatek,mt7986-wo-ccif", "syscon"; - reg = <0 0x151ad000 0 0x1000>; - interrupt-parent = <&gic>; - interrupts = ; - }; - eth: ethernet@15100000 { compatible = "mediatek,mt7986-eth"; reg = <0 0x15100000 0 0x80000>; @@ -579,26 +553,39 @@ <&topckgen CLK_TOP_SGM_325M_SEL>; assigned-clock-parents = <&apmixedsys CLK_APMIXED_NET2PLL>, <&apmixedsys CLK_APMIXED_SGMPLL>; + #address-cells = <1>; + #size-cells = <0>; mediatek,ethsys = <ðsys>; mediatek,sgmiisys = <&sgmiisys0>, <&sgmiisys1>; mediatek,wed-pcie = <&wed_pcie>; mediatek,wed = <&wed0>, <&wed1>; - #reset-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; status = "disabled"; }; + wo_ccif0: syscon@151a5000 { + compatible = "mediatek,mt7986-wo-ccif", "syscon"; + reg = <0 0x151a5000 0 0x1000>; + interrupt-parent = <&gic>; + interrupts = ; + }; + + wo_ccif1: syscon@151ad000 { + compatible = "mediatek,mt7986-wo-ccif", "syscon"; + reg = <0 0x151ad000 0 0x1000>; + interrupt-parent = <&gic>; + interrupts = ; + }; + wifi: wifi@18000000 { compatible = "mediatek,mt7986-wmac"; + reg = <0 0x18000000 0 0x1000000>, + <0 0x10003000 0 0x1000>, + <0 0x11d10000 0 0x1000>; resets = <&watchdog MT7986_TOPRGU_CONSYS_SW_RST>; reset-names = "consys"; clocks = <&topckgen CLK_TOP_CONN_MCUSYS_SEL>, <&topckgen CLK_TOP_AP2CNN_HOST_SEL>; clock-names = "mcu", "ap2conn"; - reg = <0 0x18000000 0 0x1000000>, - <0 0x10003000 0 0x1000>, - <0 0x11d10000 0 0x1000>; interrupts = , , , @@ -646,4 +633,13 @@ }; }; }; + + timer { + compatible = "arm,armv8-timer"; + interrupt-parent = <&gic>; + interrupts = , + , + , + ; + }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts @@ -152,12 +152,13 @@ pinctrl-0 = <&spi_flash_pins>; cs-gpios = <0>, <0>; status = "okay"; - spi_nand: spi_nand@0 { + + spi_nand: flash@0 { compatible = "spi-nand"; reg = <0>; spi-max-frequency = <10000000>; - spi-tx-buswidth = <4>; - spi-rx-buswidth = <4>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dtsi @@ -40,6 +40,14 @@ interrupts-extended = <&pio 117 IRQ_TYPE_LEVEL_LOW>; reg = <0x2c>; hid-descr-addr = <0x0020>; + /* + * The trackpad needs a post-power-on delay of 100ms, + * but at time of writing, the power supply for it on + * this board is always on. The delay is therefore not + * added to avoid impacting the readiness of the + * trackpad. + */ + vdd-supply = <&mt6397_vgp6_reg>; wakeup-source; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi @@ -931,7 +931,7 @@ interrupt-controller; #interrupt-cells = <2>; - clock: mt6397clock { + clock: clocks { compatible = "mediatek,mt6397-clk"; #clock-cells = <1>; }; @@ -942,11 +942,10 @@ #gpio-cells = <2>; }; - regulator: mt6397regulator { + regulators { compatible = "mediatek,mt6397-regulator"; mt6397_vpca15_reg: buck_vpca15 { - regulator-compatible = "buck_vpca15"; regulator-name = "vpca15"; regulator-min-microvolt = < 700000>; regulator-max-microvolt = <1350000>; @@ -956,7 +955,6 @@ }; mt6397_vpca7_reg: buck_vpca7 { - regulator-compatible = "buck_vpca7"; regulator-name = "vpca7"; regulator-min-microvolt = < 700000>; regulator-max-microvolt = <1350000>; @@ -966,7 +964,6 @@ }; mt6397_vsramca15_reg: buck_vsramca15 { - regulator-compatible = "buck_vsramca15"; regulator-name = "vsramca15"; regulator-min-microvolt = < 700000>; regulator-max-microvolt = <1350000>; @@ -975,7 +972,6 @@ }; mt6397_vsramca7_reg: buck_vsramca7 { - regulator-compatible = "buck_vsramca7"; regulator-name = "vsramca7"; regulator-min-microvolt = < 700000>; regulator-max-microvolt = <1350000>; @@ -984,7 +980,6 @@ }; mt6397_vcore_reg: buck_vcore { - regulator-compatible = "buck_vcore"; regulator-name = "vcore"; regulator-min-microvolt = < 700000>; regulator-max-microvolt = <1350000>; @@ -993,7 +988,6 @@ }; mt6397_vgpu_reg: buck_vgpu { - regulator-compatible = "buck_vgpu"; regulator-name = "vgpu"; regulator-min-microvolt = < 700000>; regulator-max-microvolt = <1350000>; @@ -1002,7 +996,6 @@ }; mt6397_vdrm_reg: buck_vdrm { - regulator-compatible = "buck_vdrm"; regulator-name = "vdrm"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1400000>; @@ -1011,7 +1004,6 @@ }; mt6397_vio18_reg: buck_vio18 { - regulator-compatible = "buck_vio18"; regulator-name = "vio18"; regulator-min-microvolt = <1620000>; regulator-max-microvolt = <1980000>; @@ -1020,18 +1012,15 @@ }; mt6397_vtcxo_reg: ldo_vtcxo { - regulator-compatible = "ldo_vtcxo"; regulator-name = "vtcxo"; regulator-always-on; }; mt6397_va28_reg: ldo_va28 { - regulator-compatible = "ldo_va28"; regulator-name = "va28"; }; mt6397_vcama_reg: ldo_vcama { - regulator-compatible = "ldo_vcama"; regulator-name = "vcama"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; @@ -1039,18 +1028,15 @@ }; mt6397_vio28_reg: ldo_vio28 { - regulator-compatible = "ldo_vio28"; regulator-name = "vio28"; regulator-always-on; }; mt6397_vusb_reg: ldo_vusb { - regulator-compatible = "ldo_vusb"; regulator-name = "vusb"; }; mt6397_vmc_reg: ldo_vmc { - regulator-compatible = "ldo_vmc"; regulator-name = "vmc"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; @@ -1058,7 +1044,6 @@ }; mt6397_vmch_reg: ldo_vmch { - regulator-compatible = "ldo_vmch"; regulator-name = "vmch"; regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3300000>; @@ -1066,7 +1051,6 @@ }; mt6397_vemc_3v3_reg: ldo_vemc3v3 { - regulator-compatible = "ldo_vemc3v3"; regulator-name = "vemc_3v3"; regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3300000>; @@ -1074,7 +1058,6 @@ }; mt6397_vgp1_reg: ldo_vgp1 { - regulator-compatible = "ldo_vgp1"; regulator-name = "vcamd"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; @@ -1082,7 +1065,6 @@ }; mt6397_vgp2_reg: ldo_vgp2 { - regulator-compatible = "ldo_vgp2"; regulator-name = "vcamio"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; @@ -1090,7 +1072,6 @@ }; mt6397_vgp3_reg: ldo_vgp3 { - regulator-compatible = "ldo_vgp3"; regulator-name = "vcamaf"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; @@ -1098,7 +1079,6 @@ }; mt6397_vgp4_reg: ldo_vgp4 { - regulator-compatible = "ldo_vgp4"; regulator-name = "vgp4"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <3300000>; @@ -1106,7 +1086,6 @@ }; mt6397_vgp5_reg: ldo_vgp5 { - regulator-compatible = "ldo_vgp5"; regulator-name = "vgp5"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <3000000>; @@ -1114,7 +1093,6 @@ }; mt6397_vgp6_reg: ldo_vgp6 { - regulator-compatible = "ldo_vgp6"; regulator-name = "vgp6"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; @@ -1123,7 +1101,6 @@ }; mt6397_vibr_reg: ldo_vibr { - regulator-compatible = "ldo_vibr"; regulator-name = "vibr"; regulator-min-microvolt = <1300000>; regulator-max-microvolt = <3300000>; @@ -1131,7 +1108,7 @@ }; }; - rtc: mt6397rtc { + rtc: rtc { compatible = "mediatek,mt6397-rtc"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8173-evb.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8173-evb.dts @@ -307,11 +307,10 @@ interrupt-controller; #interrupt-cells = <2>; - mt6397regulator: mt6397regulator { + regulators { compatible = "mediatek,mt6397-regulator"; mt6397_vpca15_reg: buck_vpca15 { - regulator-compatible = "buck_vpca15"; regulator-name = "vpca15"; regulator-min-microvolt = < 700000>; regulator-max-microvolt = <1350000>; @@ -320,7 +319,6 @@ }; mt6397_vpca7_reg: buck_vpca7 { - regulator-compatible = "buck_vpca7"; regulator-name = "vpca7"; regulator-min-microvolt = < 700000>; regulator-max-microvolt = <1350000>; @@ -329,7 +327,6 @@ }; mt6397_vsramca15_reg: buck_vsramca15 { - regulator-compatible = "buck_vsramca15"; regulator-name = "vsramca15"; regulator-min-microvolt = < 700000>; regulator-max-microvolt = <1350000>; @@ -338,7 +335,6 @@ }; mt6397_vsramca7_reg: buck_vsramca7 { - regulator-compatible = "buck_vsramca7"; regulator-name = "vsramca7"; regulator-min-microvolt = < 700000>; regulator-max-microvolt = <1350000>; @@ -347,7 +343,6 @@ }; mt6397_vcore_reg: buck_vcore { - regulator-compatible = "buck_vcore"; regulator-name = "vcore"; regulator-min-microvolt = < 700000>; regulator-max-microvolt = <1350000>; @@ -356,7 +351,6 @@ }; mt6397_vgpu_reg: buck_vgpu { - regulator-compatible = "buck_vgpu"; regulator-name = "vgpu"; regulator-min-microvolt = < 700000>; regulator-max-microvolt = <1350000>; @@ -365,7 +359,6 @@ }; mt6397_vdrm_reg: buck_vdrm { - regulator-compatible = "buck_vdrm"; regulator-name = "vdrm"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1400000>; @@ -374,7 +367,6 @@ }; mt6397_vio18_reg: buck_vio18 { - regulator-compatible = "buck_vio18"; regulator-name = "vio18"; regulator-min-microvolt = <1620000>; regulator-max-microvolt = <1980000>; @@ -383,19 +375,16 @@ }; mt6397_vtcxo_reg: ldo_vtcxo { - regulator-compatible = "ldo_vtcxo"; regulator-name = "vtcxo"; regulator-always-on; }; mt6397_va28_reg: ldo_va28 { - regulator-compatible = "ldo_va28"; regulator-name = "va28"; regulator-always-on; }; mt6397_vcama_reg: ldo_vcama { - regulator-compatible = "ldo_vcama"; regulator-name = "vcama"; regulator-min-microvolt = <1500000>; regulator-max-microvolt = <2800000>; @@ -403,18 +392,15 @@ }; mt6397_vio28_reg: ldo_vio28 { - regulator-compatible = "ldo_vio28"; regulator-name = "vio28"; regulator-always-on; }; mt6397_vusb_reg: ldo_vusb { - regulator-compatible = "ldo_vusb"; regulator-name = "vusb"; }; mt6397_vmc_reg: ldo_vmc { - regulator-compatible = "ldo_vmc"; regulator-name = "vmc"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; @@ -422,7 +408,6 @@ }; mt6397_vmch_reg: ldo_vmch { - regulator-compatible = "ldo_vmch"; regulator-name = "vmch"; regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3300000>; @@ -430,7 +415,6 @@ }; mt6397_vemc_3v3_reg: ldo_vemc3v3 { - regulator-compatible = "ldo_vemc3v3"; regulator-name = "vemc_3v3"; regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3300000>; @@ -438,7 +422,6 @@ }; mt6397_vgp1_reg: ldo_vgp1 { - regulator-compatible = "ldo_vgp1"; regulator-name = "vcamd"; regulator-min-microvolt = <1220000>; regulator-max-microvolt = <3300000>; @@ -446,7 +429,6 @@ }; mt6397_vgp2_reg: ldo_vgp2 { - regulator-compatible = "ldo_vgp2"; regulator-name = "vcamio"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <3300000>; @@ -454,7 +436,6 @@ }; mt6397_vgp3_reg: ldo_vgp3 { - regulator-compatible = "ldo_vgp3"; regulator-name = "vcamaf"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <3300000>; @@ -462,7 +443,6 @@ }; mt6397_vgp4_reg: ldo_vgp4 { - regulator-compatible = "ldo_vgp4"; regulator-name = "vgp4"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <3300000>; @@ -470,7 +450,6 @@ }; mt6397_vgp5_reg: ldo_vgp5 { - regulator-compatible = "ldo_vgp5"; regulator-name = "vgp5"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <3000000>; @@ -478,7 +457,6 @@ }; mt6397_vgp6_reg: ldo_vgp6 { - regulator-compatible = "ldo_vgp6"; regulator-name = "vgp6"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <3300000>; @@ -486,7 +464,6 @@ }; mt6397_vibr_reg: ldo_vibr { - regulator-compatible = "ldo_vibr"; regulator-name = "vibr"; regulator-min-microvolt = <1300000>; regulator-max-microvolt = <3300000>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8183-kukui-audio-da7219.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8183-kukui-audio-da7219.dtsi @@ -27,7 +27,7 @@ dlg,btn-cfg = <50>; dlg,mic-det-thr = <500>; dlg,jack-ins-deb = <20>; - dlg,jack-det-rate = "32ms_64ms"; + dlg,jack-det-rate = "32_64"; dlg,jack-rem-deb = <1>; dlg,a-d-btn-thr = <0xa>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-burnet.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-burnet.dts @@ -30,3 +30,6 @@ }; }; +&i2c2 { + i2c-scl-internal-delay-ns = <4100>; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-cozmo.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-cozmo.dts @@ -17,6 +17,8 @@ }; &i2c2 { + i2c-scl-internal-delay-ns = <25000>; + trackpad@2c { compatible = "hid-over-i2c"; reg = <0x2c>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts @@ -26,7 +26,14 @@ hid-descr-addr = <0x0001>; }; +&mt6358codec { + mediatek,dmic-mode = <1>; /* one-wire */ +}; + &qca_wifi { qcom,ath10k-calibration-variant = "GO_DAMU"; }; +&i2c2 { + i2c-scl-internal-delay-ns = <20000>; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel.dtsi @@ -25,3 +25,6 @@ }; }; +&i2c2 { + i2c-scl-internal-delay-ns = <21500>; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-kenzo.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-kenzo.dts @@ -11,3 +11,18 @@ model = "Google kenzo sku17 board"; compatible = "google,juniper-sku17", "google,juniper", "mediatek,mt8183"; }; + +&i2c0 { + touchscreen@40 { + compatible = "hid-over-i2c"; + reg = <0x40>; + + pinctrl-names = "default"; + pinctrl-0 = <&touchscreen_pins>; + + interrupts-extended = <&pio 155 IRQ_TYPE_LEVEL_LOW>; + + post-power-on-delay-ms = <70>; + hid-descr-addr = <0x0001>; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-pico6.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-pico6.dts @@ -17,7 +17,7 @@ pinctrl-names = "default"; pinctrl-0 = <&bt_pins_wakeup>; - wobt { + event-wobt { label = "Wake on BT"; gpios = <&pio 42 GPIO_ACTIVE_HIGH>; linux,code = ; @@ -47,10 +47,8 @@ }; }; -&wifi_wakeup { - wowlan { - gpios = <&pio 113 GPIO_ACTIVE_LOW>; - }; +&wifi_wakeup_event { + gpios = <&pio 113 GPIO_ACTIVE_LOW>; }; &wifi_pwrseq { @@ -82,7 +80,8 @@ }; &mmc1 { - bt_reset: bt-reset { + bluetooth@2 { + reg = <2>; compatible = "mediatek,mt7921s-bluetooth"; pinctrl-names = "default"; pinctrl-0 = <&bt_pins_reset>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-willow.dtsi @@ -6,6 +6,21 @@ /dts-v1/; #include "mt8183-kukui-jacuzzi.dtsi" +&i2c0 { + touchscreen@40 { + compatible = "hid-over-i2c"; + reg = <0x40>; + + pinctrl-names = "default"; + pinctrl-0 = <&touchscreen_pins>; + + interrupts-extended = <&pio 155 IRQ_TYPE_LEVEL_LOW>; + + post-power-on-delay-ms = <70>; + hid-descr-addr = <0x0001>; + }; +}; + &i2c2 { trackpad@2c { compatible = "hid-over-i2c"; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi @@ -8,35 +8,37 @@ #include / { - pp1200_mipibrdg: pp1200-mipibrdg { + pp1000_mipibrdg: pp1000-mipibrdg { compatible = "regulator-fixed"; - regulator-name = "pp1200_mipibrdg"; + regulator-name = "pp1000_mipibrdg"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; pinctrl-names = "default"; - pinctrl-0 = <&pp1200_mipibrdg_en>; + pinctrl-0 = <&pp1000_mipibrdg_en>; enable-active-high; regulator-boot-on; gpio = <&pio 54 GPIO_ACTIVE_HIGH>; + vin-supply = <&pp1800_alw>; }; pp1800_mipibrdg: pp1800-mipibrdg { compatible = "regulator-fixed"; regulator-name = "pp1800_mipibrdg"; pinctrl-names = "default"; - pinctrl-0 = <&pp1800_lcd_en>; + pinctrl-0 = <&pp1800_mipibrdg_en>; enable-active-high; regulator-boot-on; gpio = <&pio 36 GPIO_ACTIVE_HIGH>; + vin-supply = <&pp1800_alw>; }; pp3300_panel: pp3300-panel { compatible = "regulator-fixed"; regulator-name = "pp3300_panel"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; pinctrl-names = "default"; pinctrl-0 = <&pp3300_panel_pins>; @@ -44,18 +46,20 @@ regulator-boot-on; gpio = <&pio 35 GPIO_ACTIVE_HIGH>; + vin-supply = <&pp3300_alw>; }; - vddio_mipibrdg: vddio-mipibrdg { + pp3300_mipibrdg: pp3300-mipibrdg { compatible = "regulator-fixed"; - regulator-name = "vddio_mipibrdg"; + regulator-name = "pp3300_mipibrdg"; pinctrl-names = "default"; - pinctrl-0 = <&vddio_mipibrdg_en>; + pinctrl-0 = <&pp3300_mipibrdg_en>; enable-active-high; regulator-boot-on; gpio = <&pio 37 GPIO_ACTIVE_HIGH>; + vin-supply = <&pp3300_alw>; }; volume_buttons: volume-buttons { @@ -151,25 +155,28 @@ pinctrl-0 = <&anx7625_pins>; enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>; reset-gpios = <&pio 73 GPIO_ACTIVE_HIGH>; - vdd10-supply = <&pp1200_mipibrdg>; + vdd10-supply = <&pp1000_mipibrdg>; vdd18-supply = <&pp1800_mipibrdg>; - vdd33-supply = <&vddio_mipibrdg>; + vdd33-supply = <&pp3300_mipibrdg>; - #address-cells = <1>; - #size-cells = <0>; - port@0 { - reg = <0>; + ports { + #address-cells = <1>; + #size-cells = <0>; - anx7625_in: endpoint { - remote-endpoint = <&dsi_out>; + port@0 { + reg = <0>; + + anx7625_in: endpoint { + remote-endpoint = <&dsi_out>; + }; }; - }; - port@1 { - reg = <1>; + port@1 { + reg = <1>; - anx7625_out: endpoint { - remote-endpoint = <&panel_in>; + anx7625_out: endpoint { + remote-endpoint = <&panel_in>; + }; }; }; @@ -393,14 +400,14 @@ "", ""; - pp1200_mipibrdg_en: pp1200-mipibrdg-en { + pp1000_mipibrdg_en: pp1000-mipibrdg-en { pins1 { pinmux = ; output-low; }; }; - pp1800_lcd_en: pp1800-lcd-en { + pp1800_mipibrdg_en: pp1800-mipibrdg-en { pins1 { pinmux = ; output-low; @@ -462,7 +469,7 @@ }; }; - vddio_mipibrdg_en: vddio-mipibrdg-en { + pp3300_mipibrdg_en: pp3300-mipibrdg-en { pins1 { pinmux = ; output-low; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi @@ -92,9 +92,9 @@ clock-frequency = <400000>; vbus-supply = <&mt6358_vcn18_reg>; - eeprom@54 { + eeprom@50 { compatible = "atmel,24c32"; - reg = <0x54>; + reg = <0x50>; pagesize = <32>; vcc-supply = <&mt6358_vcn18_reg>; }; @@ -360,6 +360,10 @@ }; &cros_ec { + cbas { + compatible = "google,cros-cbas"; + }; + keyboard-controller { compatible = "google,cros-ec-keyb-switches"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi @@ -79,9 +79,9 @@ clock-frequency = <400000>; vbus-supply = <&mt6358_vcn18_reg>; - eeprom@54 { + eeprom@50 { compatible = "atmel,24c64"; - reg = <0x54>; + reg = <0x50>; pagesize = <32>; vcc-supply = <&mt6358_vcn18_reg>; }; @@ -339,6 +339,10 @@ }; &cros_ec { + cbas { + compatible = "google,cros-cbas"; + }; + keyboard-controller { compatible = "google,cros-ec-keyb-switches"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi @@ -88,9 +88,9 @@ clock-frequency = <400000>; vbus-supply = <&mt6358_vcn18_reg>; - eeprom@54 { + eeprom@50 { compatible = "atmel,24c32"; - reg = <0x54>; + reg = <0x50>; pagesize = <32>; vcc-supply = <&mt6358_vcn18_reg>; }; @@ -343,6 +343,10 @@ }; &cros_ec { + cbas { + compatible = "google,cros-cbas"; + }; + keyboard-controller { compatible = "google,cros-ec-keyb-switches"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi @@ -152,7 +152,7 @@ pinctrl-names = "default"; pinctrl-0 = <&wifi_pins_wakeup>; - button-wowlan { + wifi_wakeup_event: event-wowlan { label = "Wake on WiFi"; gpios = <&pio 113 GPIO_ACTIVE_HIGH>; linux,code = ; @@ -433,7 +433,6 @@ }; &mt6358_vgpu_reg { - regulator-min-microvolt = <625000>; regulator-max-microvolt = <900000>; regulator-coupled-with = <&mt6358_vsram_gpu_reg>; @@ -804,7 +803,6 @@ }; pins-rts { pinmux = ; - output-enable; }; pins-cts { pinmux = ; @@ -823,7 +821,6 @@ }; pins-rts { pinmux = ; - output-enable; }; pins-cts { pinmux = ; @@ -937,10 +934,6 @@ google,usb-port-id = <0>; }; - cbas { - compatible = "google,cros-cbas"; - }; - typec { compatible = "google,cros-ec-typec"; #address-cells = <1>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts @@ -63,6 +63,18 @@ pulldown-ohm = <0>; io-channels = <&auxadc 0>; }; + + connector { + compatible = "hdmi-connector"; + label = "hdmi"; + type = "d"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi_connector_out>; + }; + }; + }; }; &auxadc { @@ -120,6 +132,43 @@ pinctrl-0 = <&i2c6_pins>; status = "okay"; clock-frequency = <100000>; + #address-cells = <1>; + #size-cells = <0>; + + it66121hdmitx: hdmitx@4c { + compatible = "ite,it66121"; + reg = <0x4c>; + pinctrl-names = "default"; + pinctrl-0 = <&ite_pins>; + reset-gpios = <&pio 160 GPIO_ACTIVE_LOW>; + interrupt-parent = <&pio>; + interrupts = <4 IRQ_TYPE_LEVEL_LOW>; + vcn33-supply = <&mt6358_vcn33_reg>; + vcn18-supply = <&mt6358_vcn18_reg>; + vrf12-supply = <&mt6358_vrf12_reg>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + it66121_in: endpoint { + bus-width = <12>; + remote-endpoint = <&dpi_out>; + }; + }; + + port@1 { + reg = <1>; + + hdmi_connector_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; + }; + }; + }; }; &keyboard { @@ -368,6 +417,67 @@ input-enable; }; }; + + ite_pins: ite-pins { + pins-irq { + pinmux = ; + input-enable; + bias-pull-up; + }; + + pins-rst { + pinmux = ; + output-high; + }; + }; + + dpi_func_pins: dpi-func-pins { + pins-dpi { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + }; + + dpi_idle_pins: dpi-idle-pins { + pins-idle { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + }; }; &pmic { @@ -418,6 +528,15 @@ status = "okay"; }; -&dsi0 { - status = "disabled"; +&dpi0 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&dpi_func_pins>; + pinctrl-1 = <&dpi_idle_pins>; + status = "okay"; + + port { + dpi_out: endpoint { + remote-endpoint = <&it66121_in>; + }; + }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -1026,7 +1026,8 @@ }; keyboard: keyboard@10010000 { - compatible = "mediatek,mt6779-keypad"; + compatible = "mediatek,mt8183-keypad", + "mediatek,mt6779-keypad"; reg = <0 0x10010000 0 0x1000>; interrupts = ; clocks = <&clk26m>; @@ -1628,6 +1629,7 @@ compatible = "mediatek,mt8183-mfgcfg", "syscon"; reg = <0 0x13000000 0 0x1000>; #clock-cells = <1>; + power-domains = <&spm MT8183_POWER_DOMAIN_MFG_ASYNC>; }; gpu: gpu@13040000 { @@ -1826,6 +1828,23 @@ resets = <&mmsys MT8183_MMSYS_SW0_RST_B_DISP_DSI0>; phys = <&mipi_tx0>; phy-names = "dphy"; + status = "disabled"; + }; + + dpi0: dpi@14015000 { + compatible = "mediatek,mt8183-dpi"; + reg = <0 0x14015000 0 0x1000>; + interrupts = ; + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; + clocks = <&mmsys CLK_MM_DPI_IF>, + <&mmsys CLK_MM_DPI_MM>, + <&apmixedsys CLK_APMIXED_TVDPLL>; + clock-names = "pixel", "engine", "pll"; + status = "disabled"; + + port { + dpi_out: endpoint { }; + }; }; mutex: mutex@14016000 { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8186.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8186.dtsi @@ -731,7 +731,7 @@ opp-900000000-3 { opp-hz = /bits/ 64 <900000000>; opp-microvolt = <850000>; - opp-supported-hw = <0x8>; + opp-supported-hw = <0xcf>; }; opp-900000000-4 { @@ -743,13 +743,13 @@ opp-900000000-5 { opp-hz = /bits/ 64 <900000000>; opp-microvolt = <825000>; - opp-supported-hw = <0x30>; + opp-supported-hw = <0x20>; }; opp-950000000-3 { opp-hz = /bits/ 64 <950000000>; opp-microvolt = <900000>; - opp-supported-hw = <0x8>; + opp-supported-hw = <0xcf>; }; opp-950000000-4 { @@ -761,13 +761,13 @@ opp-950000000-5 { opp-hz = /bits/ 64 <950000000>; opp-microvolt = <850000>; - opp-supported-hw = <0x30>; + opp-supported-hw = <0x20>; }; opp-1000000000-3 { opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <950000>; - opp-supported-hw = <0x8>; + opp-supported-hw = <0xcf>; }; opp-1000000000-4 { @@ -779,7 +779,7 @@ opp-1000000000-5 { opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <875000>; - opp-supported-hw = <0x30>; + opp-supported-hw = <0x20>; }; }; @@ -931,11 +931,17 @@ power-domain@MT8186_POWER_DOMAIN_SSUSB { reg = ; + clocks = <&topckgen CLK_TOP_USB_TOP>, + <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_REF>; + clock-names = "sys_ck", "ref_ck"; #power-domain-cells = <0>; }; power-domain@MT8186_POWER_DOMAIN_SSUSB_P1 { reg = ; + clocks = <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_SYS>, + <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_REF>; + clock-names = "sys_ck", "ref_ck"; #power-domain-cells = <0>; }; @@ -1061,7 +1067,7 @@ reg = ; clocks = <&topckgen CLK_TOP_VENC>, <&vencsys CLK_VENC_CKE1_VENC>; - clock-names = "venc0", "larb"; + clock-names = "venc0", "subsys-larb"; mediatek,infracfg = <&infracfg_ao>; #power-domain-cells = <0>; }; @@ -1530,14 +1536,17 @@ clocks = <&topckgen CLK_TOP_USB_TOP>, <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_REF>, <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_HCLK>, - <&infracfg_ao CLK_INFRA_AO_ICUSB>; - clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck"; + <&infracfg_ao CLK_INFRA_AO_ICUSB>, + <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_XHCI>; + clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck"; interrupts = ; phys = <&u2port0 PHY_TYPE_USB2>; power-domains = <&spm MT8186_POWER_DOMAIN_SSUSB>; #address-cells = <2>; #size-cells = <2>; ranges; + wakeup-source; + mediatek,syscon-wakeup = <&pericfg 0x420 2>; status = "disabled"; usb_host0: usb@11200000 { @@ -1551,8 +1560,6 @@ <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_XHCI>; clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck"; interrupts = ; - mediatek,syscon-wakeup = <&pericfg 0x420 2>; - wakeup-source; status = "disabled"; }; }; @@ -1595,14 +1602,17 @@ clocks = <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_SYS>, <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_REF>, <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_HCLK>, - <&clk26m>; - clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck"; + <&clk26m>, + <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_XHCI>; + clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck"; interrupts = ; phys = <&u2port1 PHY_TYPE_USB2>, <&u3port1 PHY_TYPE_USB3>; power-domains = <&spm MT8186_POWER_DOMAIN_SSUSB_P1>; #address-cells = <2>; #size-cells = <2>; ranges; + wakeup-source; + mediatek,syscon-wakeup = <&pericfg 0x424 2>; status = "disabled"; usb_host1: usb@11280000 { @@ -1616,8 +1626,6 @@ <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_XHCI>; clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck","xhci_ck"; interrupts = ; - mediatek,syscon-wakeup = <&pericfg 0x424 2>; - wakeup-source; status = "disabled"; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8188.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8188.dtsi @@ -773,7 +773,6 @@ <&clk26m>; clock-names = "ref", "da_ref"; #phy-cells = <1>; - status = "disabled"; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -147,6 +147,7 @@ regulator-boot-on; gpio = <&pio 127 GPIO_ACTIVE_HIGH>; vin-supply = <&pp3300_g>; + off-on-delay-us = <500000>; }; /* separately switched 3.3V power rail */ @@ -1336,10 +1337,6 @@ #address-cells = <1>; #size-cells = <0>; - base_detection: cbas { - compatible = "google,cros-cbas"; - }; - cros_ec_pwm: pwm { compatible = "google,cros-ec-pwm"; #pwm-cells = <1>; @@ -1422,9 +1419,8 @@ regulators { mt6315_6_vbuck1: vbuck1 { - regulator-compatible = "vbuck1"; regulator-name = "Vbcpu"; - regulator-min-microvolt = <300000>; + regulator-min-microvolt = <400000>; regulator-max-microvolt = <1193750>; regulator-enable-ramp-delay = <256>; regulator-allowed-modes = <0 1 2>; @@ -1432,9 +1428,8 @@ }; mt6315_6_vbuck3: vbuck3 { - regulator-compatible = "vbuck3"; regulator-name = "Vlcpu"; - regulator-min-microvolt = <300000>; + regulator-min-microvolt = <400000>; regulator-max-microvolt = <1193750>; regulator-enable-ramp-delay = <256>; regulator-allowed-modes = <0 1 2>; @@ -1449,9 +1444,8 @@ regulators { mt6315_7_vbuck1: vbuck1 { - regulator-compatible = "vbuck1"; regulator-name = "Vgpu"; - regulator-min-microvolt = <606250>; + regulator-min-microvolt = <400000>; regulator-max-microvolt = <800000>; regulator-enable-ramp-delay = <256>; regulator-allowed-modes = <0 1 2>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -1456,6 +1456,7 @@ reg = <0 0x14001000 0 0x1000>; interrupts = ; clocks = <&mmsys CLK_MM_DISP_MUTEX0>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 0x1000>; mediatek,gce-events = , ; power-domains = <&spm MT8192_POWER_DOMAIN_DISP>; @@ -1814,7 +1815,7 @@ mediatek,scp = <&scp>; power-domains = <&spm MT8192_POWER_DOMAIN_VENC>; clocks = <&vencsys CLK_VENC_SET1_VENC>; - clock-names = "venc-set1"; + clock-names = "venc_sel"; assigned-clocks = <&topckgen CLK_TOP_VENC_SEL>; assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>; }; @@ -2225,7 +2226,7 @@ }; }; - gpu0-thermal { + gpu-thermal { polling-delay = <1000>; polling-delay-passive = <250>; thermal-sensors = <&lvts_ap MT8192_AP_GPU0>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts @@ -23,3 +23,7 @@ &ts_10 { status = "okay"; }; + +&watchdog { + /delete-property/ mediatek,disable-extrst; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dts @@ -43,3 +43,7 @@ &ts_10 { status = "okay"; }; + +&watchdog { + /delete-property/ mediatek,disable-extrst; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r3.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r3.dts @@ -44,3 +44,7 @@ &ts_10 { status = "okay"; }; + +&watchdog { + /delete-property/ mediatek,disable-extrst; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -264,6 +264,38 @@ status = "okay"; }; +&cpu0 { + cpu-supply = <&mt6359_vcore_buck_reg>; +}; + +&cpu1 { + cpu-supply = <&mt6359_vcore_buck_reg>; +}; + +&cpu2 { + cpu-supply = <&mt6359_vcore_buck_reg>; +}; + +&cpu3 { + cpu-supply = <&mt6359_vcore_buck_reg>; +}; + +&cpu4 { + cpu-supply = <&mt6315_6_vbuck1>; +}; + +&cpu5 { + cpu-supply = <&mt6315_6_vbuck1>; +}; + +&cpu6 { + cpu-supply = <&mt6315_6_vbuck1>; +}; + +&cpu7 { + cpu-supply = <&mt6315_6_vbuck1>; +}; + &dp_intf0 { status = "okay"; @@ -1211,9 +1243,8 @@ regulators { mt6315_6_vbuck1: vbuck1 { - regulator-compatible = "vbuck1"; regulator-name = "Vbcpu"; - regulator-min-microvolt = <300000>; + regulator-min-microvolt = <400000>; regulator-max-microvolt = <1193750>; regulator-enable-ramp-delay = <256>; regulator-ramp-delay = <6250>; @@ -1229,9 +1260,8 @@ regulators { mt6315_7_vbuck1: vbuck1 { - regulator-compatible = "vbuck1"; regulator-name = "Vgpu"; - regulator-min-microvolt = <625000>; + regulator-min-microvolt = <400000>; regulator-max-microvolt = <1193750>; regulator-enable-ramp-delay = <256>; regulator-ramp-delay = <6250>; @@ -1305,6 +1335,7 @@ rx-fifo-depth = <3072>; vusb33-supply = <&mt6359_vusb_ldo_reg>; vbus-supply = <&usb_vbus>; + mediatek,u3p-dis-msk = <1>; }; &xhci2 { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8195-demo.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8195-demo.dts @@ -137,7 +137,6 @@ richtek,vinovp-microvolt = <14500000>; otg_vbus_regulator: usb-otg-vbus-regulator { - regulator-compatible = "usb-otg-vbus"; regulator-name = "usb-otg-vbus"; regulator-min-microvolt = <4425000>; regulator-max-microvolt = <5825000>; @@ -149,7 +148,6 @@ LDO_VIN3-supply = <&mt6360_buck2>; mt6360_buck1: buck1 { - regulator-compatible = "BUCK1"; regulator-name = "mt6360,buck1"; regulator-min-microvolt = <300000>; regulator-max-microvolt = <1300000>; @@ -160,7 +158,6 @@ }; mt6360_buck2: buck2 { - regulator-compatible = "BUCK2"; regulator-name = "mt6360,buck2"; regulator-min-microvolt = <300000>; regulator-max-microvolt = <1300000>; @@ -171,7 +168,6 @@ }; mt6360_ldo1: ldo1 { - regulator-compatible = "LDO1"; regulator-name = "mt6360,ldo1"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <3600000>; @@ -180,7 +176,6 @@ }; mt6360_ldo2: ldo2 { - regulator-compatible = "LDO2"; regulator-name = "mt6360,ldo2"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <3600000>; @@ -189,7 +184,6 @@ }; mt6360_ldo3: ldo3 { - regulator-compatible = "LDO3"; regulator-name = "mt6360,ldo3"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <3600000>; @@ -198,7 +192,6 @@ }; mt6360_ldo5: ldo5 { - regulator-compatible = "LDO5"; regulator-name = "mt6360,ldo5"; regulator-min-microvolt = <2700000>; regulator-max-microvolt = <3600000>; @@ -207,7 +200,6 @@ }; mt6360_ldo6: ldo6 { - regulator-compatible = "LDO6"; regulator-name = "mt6360,ldo6"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <2100000>; @@ -216,7 +208,6 @@ }; mt6360_ldo7: ldo7 { - regulator-compatible = "LDO7"; regulator-name = "mt6360,ldo7"; regulator-min-microvolt = <500000>; regulator-max-microvolt = <2100000>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -487,7 +487,7 @@ }; infracfg_ao: syscon@10001000 { - compatible = "mediatek,mt8195-infracfg_ao", "syscon", "simple-mfd"; + compatible = "mediatek,mt8195-infracfg_ao", "syscon"; reg = <0 0x10001000 0 0x1000>; #clock-cells = <1>; #reset-cells = <1>; @@ -1584,9 +1584,6 @@ phy-names = "pcie-phy"; power-domains = <&spm MT8195_POWER_DOMAIN_PCIE_MAC_P1>; - resets = <&infracfg_ao MT8195_INFRA_RST2_PCIE_P1_SWRST>; - reset-names = "mac"; - #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0 0 0 1 &pcie_intc1 0>, @@ -1998,6 +1995,7 @@ compatible = "mediatek,mt8195-vppsys0", "syscon"; reg = <0 0x14000000 0 0x1000>; #clock-cells = <1>; + mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0 0x1000>; }; dma-controller@14001000 { @@ -2221,6 +2219,7 @@ compatible = "mediatek,mt8195-vppsys1", "syscon"; reg = <0 0x14f00000 0 0x1000>; #clock-cells = <1>; + mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0 0x1000>; }; mutex@14f01000 { @@ -3050,6 +3049,7 @@ reg = <0 0x1c01a000 0 0x1000>; mboxes = <&gce0 0 CMDQ_THR_PRIO_4>; #clock-cells = <1>; + mediatek,gce-client-reg = <&gce0 SUBSYS_1c01XXXX 0xa000 0x1000>; }; @@ -3104,7 +3104,7 @@ }; ovl0: ovl@1c000000 { - compatible = "mediatek,mt8195-disp-ovl", "mediatek,mt8183-disp-ovl"; + compatible = "mediatek,mt8195-disp-ovl"; reg = <0 0x1c000000 0 0x1000>; interrupts = ; power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS0>; @@ -3218,10 +3218,10 @@ compatible = "mediatek,mt8195-dp-intf"; reg = <0 0x1c015000 0 0x1000>; interrupts = ; - clocks = <&vdosys0 CLK_VDO0_DP_INTF0>, - <&vdosys0 CLK_VDO0_DP_INTF0_DP_INTF>, + clocks = <&vdosys0 CLK_VDO0_DP_INTF0_DP_INTF>, + <&vdosys0 CLK_VDO0_DP_INTF0>, <&apmixedsys CLK_APMIXED_TVDPLL1>; - clock-names = "engine", "pixel", "pll"; + clock-names = "pixel", "engine", "pll"; status = "disabled"; }; @@ -3231,6 +3231,7 @@ interrupts = ; power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS0>; clocks = <&vdosys0 CLK_VDO0_DISP_MUTEX0>; + mediatek,gce-client-reg = <&gce0 SUBSYS_1c01XXXX 0x6000 0x1000>; mediatek,gce-events = ; }; @@ -3296,11 +3297,10 @@ mutex1: mutex@1c101000 { compatible = "mediatek,mt8195-disp-mutex"; reg = <0 0x1c101000 0 0x1000>; - reg-names = "vdo1_mutex"; interrupts = ; power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>; clocks = <&vdosys1 CLK_VDO1_DISP_MUTEX>; - clock-names = "vdo1_mutex"; + mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x1000 0x1000>; mediatek,gce-events = ; }; @@ -3486,10 +3486,10 @@ reg = <0 0x1c113000 0 0x1000>; interrupts = ; power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>; - clocks = <&vdosys1 CLK_VDO1_DP_INTF0_MM>, - <&vdosys1 CLK_VDO1_DPINTF>, + clocks = <&vdosys1 CLK_VDO1_DPINTF>, + <&vdosys1 CLK_VDO1_DP_INTF0_MM>, <&apmixedsys CLK_APMIXED_TVDPLL2>; - clock-names = "engine", "pixel", "pll"; + clock-names = "pixel", "engine", "pll"; status = "disabled"; }; @@ -3845,7 +3845,7 @@ }; }; - gpu0-thermal { + gpu-thermal { polling-delay = <1000>; polling-delay-passive = <250>; thermal-sensors = <&lvts_ap MT8195_AP_GPU0>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -448,7 +448,8 @@ }; keypad: keypad@10010000 { - compatible = "mediatek,mt6779-keypad"; + compatible = "mediatek,mt8365-keypad", + "mediatek,mt6779-keypad"; reg = <0 0x10010000 0 0x1000>; wakeup-source; interrupts = ; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts @@ -187,7 +187,7 @@ compatible = "snps,dwmac-mdio"; #address-cells = <1>; #size-cells = <0>; - eth_phy0: eth-phy0@1 { + eth_phy0: ethernet-phy@1 { compatible = "ethernet-phy-id001c.c916"; reg = <0x1>; }; @@ -820,7 +820,6 @@ regulators { mt6315_6_vbuck1: vbuck1 { - regulator-compatible = "vbuck1"; regulator-name = "Vbcpu"; regulator-min-microvolt = <300000>; regulator-max-microvolt = <1193750>; @@ -837,7 +836,6 @@ regulators { mt6315_7_vbuck1: vbuck1 { - regulator-compatible = "vbuck1"; regulator-name = "Vgpu"; regulator-min-microvolt = <300000>; regulator-max-microvolt = <1193750>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/mt8516.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/mt8516.dtsi @@ -144,10 +144,10 @@ #size-cells = <2>; ranges; - /* 128 KiB reserved for ARM Trusted Firmware (BL31) */ + /* 192 KiB reserved for ARM Trusted Firmware (BL31) */ bl31_secmon_reserved: secmon@43000000 { no-map; - reg = <0 0x43000000 0 0x20000>; + reg = <0 0x43000000 0 0x30000>; }; }; @@ -206,7 +206,7 @@ compatible = "mediatek,mt8516-wdt", "mediatek,mt6589-wdt"; reg = <0 0x10007000 0 0x1000>; - interrupts = ; + interrupts = ; #reset-cells = <1>; }; @@ -268,7 +268,7 @@ interrupt-parent = <&gic>; interrupt-controller; reg = <0 0x10310000 0 0x1000>, - <0 0x10320000 0 0x1000>, + <0 0x1032f000 0 0x2000>, <0 0x10340000 0 0x2000>, <0 0x10360000 0 0x2000>; interrupts = , <0 0x11000180 0 0x80>; interrupts = ; + clock-div = <2>; clocks = <&topckgen CLK_TOP_I2C0>, <&topckgen CLK_TOP_APDMA>; clock-names = "main", "dma"; @@ -358,6 +359,7 @@ reg = <0 0x1100a000 0 0x90>, <0 0x11000200 0 0x80>; interrupts = ; + clock-div = <2>; clocks = <&topckgen CLK_TOP_I2C1>, <&topckgen CLK_TOP_APDMA>; clock-names = "main", "dma"; @@ -372,6 +374,7 @@ reg = <0 0x1100b000 0 0x90>, <0 0x11000280 0 0x80>; interrupts = ; + clock-div = <2>; clocks = <&topckgen CLK_TOP_I2C2>, <&topckgen CLK_TOP_APDMA>; clock-names = "main", "dma"; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/mediatek/pumpkin-common.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/mediatek/pumpkin-common.dtsi @@ -47,7 +47,6 @@ }; &i2c0 { - clock-div = <2>; pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins_a>; status = "okay"; @@ -156,7 +155,6 @@ }; &i2c2 { - clock-div = <2>; pinctrl-names = "default"; pinctrl-0 = <&i2c2_pins_a>; status = "okay"; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts @@ -9,8 +9,8 @@ compatible = "nvidia,norrin", "nvidia,tegra132", "nvidia,tegra124"; aliases { - rtc0 = "/i2c@7000d000/as3722@40"; - rtc1 = "/rtc@7000e000"; + rtc0 = &as3722; + rtc1 = &tegra_rtc; serial0 = &uarta; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/nvidia/tegra132.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/nvidia/tegra132.dtsi @@ -572,7 +572,7 @@ status = "disabled"; }; - rtc@7000e000 { + tegra_rtc: rtc@7000e000 { compatible = "nvidia,tegra124-rtc", "nvidia,tegra20-rtc"; reg = <0x0 0x7000e000 0x0 0x100>; interrupts = ; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/nvidia/tegra234-p3701-0008.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/nvidia/tegra234-p3701-0008.dtsi @@ -44,39 +44,6 @@ status = "okay"; }; - i2c@c250000 { - power-sensor@41 { - compatible = "ti,ina3221"; - reg = <0x41>; - #address-cells = <1>; - #size-cells = <0>; - - input@0 { - reg = <0x0>; - label = "CVB_ATX_12V"; - shunt-resistor-micro-ohms = <2000>; - }; - - input@1 { - reg = <0x1>; - label = "CVB_ATX_3V3"; - shunt-resistor-micro-ohms = <2000>; - }; - - input@2 { - reg = <0x2>; - label = "CVB_ATX_5V"; - shunt-resistor-micro-ohms = <2000>; - }; - }; - - power-sensor@44 { - compatible = "ti,ina219"; - reg = <0x44>; - shunt-resistor = <2000>; - }; - }; - rtc@c2a0000 { status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/nvidia/tegra234-p3740-0002.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/nvidia/tegra234-p3740-0002.dtsi @@ -183,6 +183,39 @@ phy-names = "usb2-0", "usb2-1", "usb2-2", "usb2-3", "usb3-0", "usb3-1", "usb3-2"; }; + + i2c@c250000 { + power-sensor@41 { + compatible = "ti,ina3221"; + reg = <0x41>; + #address-cells = <1>; + #size-cells = <0>; + + input@0 { + reg = <0x0>; + label = "CVB_ATX_12V"; + shunt-resistor-micro-ohms = <2000>; + }; + + input@1 { + reg = <0x1>; + label = "CVB_ATX_3V3"; + shunt-resistor-micro-ohms = <2000>; + }; + + input@2 { + reg = <0x2>; + label = "CVB_ATX_5V"; + shunt-resistor-micro-ohms = <2000>; + }; + }; + + power-sensor@44 { + compatible = "ti,ina219"; + reg = <0x44>; + shunt-resistor = <2000>; + }; + }; }; vdd_3v3_dp: regulator-vdd-3v3-dp { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/nvidia/tegra234.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/nvidia/tegra234.dtsi @@ -1711,7 +1711,7 @@ compatible = "nvidia,tegra234-sce-fabric"; reg = <0x0 0xb600000 0x0 0x40000>; interrupts = ; - status = "okay"; + status = "disabled"; }; rce-fabric@be00000 { @@ -1796,7 +1796,7 @@ assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>; resets = <&bpmp TEGRA234_RESET_SPI2>; reset-names = "spi"; - dmas = <&gpcdma 19>, <&gpcdma 19>; + dmas = <&gpcdma 16>, <&gpcdma 16>; dma-names = "rx", "tx"; dma-coherent; status = "disabled"; @@ -1891,7 +1891,7 @@ }; dce-fabric@de00000 { - compatible = "nvidia,tegra234-sce-fabric"; + compatible = "nvidia,tegra234-dce-fabric"; reg = <0x0 0xde00000 0x0 0x40000>; interrupts = ; status = "okay"; @@ -1914,6 +1914,8 @@ #redistributor-regions = <1>; #interrupt-cells = <3>; interrupt-controller; + + #address-cells = <0>; }; smmu_iso: iommu@10000000 { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/Makefile +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/Makefile @@ -185,6 +185,9 @@ dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r2.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r3.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-db845c.dtb + +sdm845-db845c-navigation-mezzanine-dtbs := sdm845-db845c.dtb sdm845-db845c-navigation-mezzanine.dtbo + dtb-$(CONFIG_ARCH_QCOM) += sdm845-db845c-navigation-mezzanine.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-lg-judyln.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-lg-judyp.dtb --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -642,6 +642,7 @@ clocks = <&xo>; clock-names = "ref"; tx-fifo-resize; + snps,parkmode-disable-ss-quirk; snps,is-utmi-l1-suspend; snps,hird-threshold = /bits/ 8 <0x0>; snps,dis_u2_susphy_quirk; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -638,6 +638,7 @@ interrupts = ; phys = <&qusb_phy_0>, <&ssphy_0>; phy-names = "usb2-phy", "usb3-phy"; + snps,parkmode-disable-ss-quirk; snps,is-utmi-l1-suspend; snps,hird-threshold = /bits/ 8 <0x0>; snps,dis_u2_susphy_quirk; @@ -680,6 +681,7 @@ interrupts = ; phys = <&qusb_phy_1>, <&ssphy_1>; phy-names = "usb2-phy", "usb3-phy"; + snps,parkmode-disable-ss-quirk; snps,is-utmi-l1-suspend; snps,hird-threshold = /bits/ 8 <0x0>; snps,dis_u2_susphy_quirk; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -125,7 +125,7 @@ sleep_clk: sleep-clk { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <32768>; + clock-frequency = <32764>; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/msm8939.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/msm8939.dtsi @@ -34,7 +34,7 @@ sleep_clk: sleep-clk { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <32768>; + clock-frequency = <32764>; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/msm8994.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/msm8994.dtsi @@ -34,7 +34,7 @@ sleep_clk: sleep-clk { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <32768>; + clock-frequency = <32764>; clock-output-names = "sleep_clk"; }; }; @@ -437,6 +437,15 @@ #size-cells = <1>; ranges; + interrupts = , + , + , + ; + interrupt-names = "pwr_event", + "qusb2_phy", + "hs_phy_irq", + "ss_phy_irq"; + clocks = <&gcc GCC_USB30_MASTER_CLK>, <&gcc GCC_SYS_NOC_USB3_AXI_CLK>, <&gcc GCC_USB30_SLEEP_CLK>, --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi @@ -405,7 +405,6 @@ &hsusb_phy1 { status = "okay"; - extcon = <&typec>; vdda-pll-supply = <&vreg_l12a_1p8>; vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts @@ -64,7 +64,7 @@ }; led@1 { - reg = <0>; + reg = <1>; chan-name = "button-backlight1"; led-cur = /bits/ 8 <0x32>; max-cur = /bits/ 8 <0xc8>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -2072,7 +2072,7 @@ <&gcc GCC_UFS_RX_SYMBOL_0_CLK>; freq-table-hz = <100000000 200000000>, - <0 0>, + <100000000 200000000>, <0 0>, <0 0>, <0 0>, @@ -3025,9 +3025,14 @@ #size-cells = <1>; ranges; - interrupts = , + interrupts = , + , + , ; - interrupt-names = "hs_phy_irq", "ss_phy_irq"; + interrupt-names = "pwr_event", + "qusb2_phy", + "hs_phy_irq", + "ss_phy_irq"; clocks = <&gcc GCC_SYS_NOC_USB3_AXI_CLK>, <&gcc GCC_USB30_MASTER_CLK>, @@ -3061,6 +3066,7 @@ snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; snps,is-utmi-l1-suspend; + snps,parkmode-disable-ss-quirk; tx-fifo-resize; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -1575,7 +1575,6 @@ * SoC VDDMX RPM Power Domain in the Adreno driver. */ power-domains = <&gpucc GPU_GX_GDSC>; - status = "disabled"; }; gpucc: clock-controller@5065000 { @@ -2146,6 +2145,7 @@ interrupts = ; snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; + snps,parkmode-disable-ss-quirk; phys = <&qusb2phy>, <&usb3phy>; phy-names = "usb2-phy", "usb3-phy"; snps,has-lpm-erratum; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/pm4125.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/pm4125.dtsi @@ -0,0 +1,63 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (c) 2023, Linaro Ltd + */ + +#include +#include +#include +#include + +&spmi_bus { + pmic@0 { + compatible = "qcom,pm2250", "qcom,spmi-pmic"; + reg = <0x0 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pon@800 { + compatible = "qcom,pm8916-pon"; + reg = <0x800>; + + pm4125_pwrkey: pwrkey { + compatible = "qcom,pm8941-pwrkey"; + interrupts-extended = <&spmi_bus 0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>; + linux,code = ; + debounce = <15625>; + bias-pull-up; + }; + + pm4125_resin: resin { + compatible = "qcom,pm8941-resin"; + interrupts-extended = <&spmi_bus 0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>; + debounce = <15625>; + bias-pull-up; + status = "disabled"; + }; + }; + + rtc@6000 { + compatible = "qcom,pm8941-rtc"; + reg = <0x6000>, <0x6100>; + reg-names = "rtc", "alarm"; + interrupts-extended = <&spmi_bus 0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>; + }; + + pm4125_gpios: gpio@c000 { + compatible = "qcom,pm2250-gpio", "qcom,spmi-gpio"; + reg = <0xc000>; + gpio-controller; + gpio-ranges = <&pm4125_gpios 0 0 10>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmic@1 { + compatible = "qcom,pm2250", "qcom,spmi-pmic"; + reg = <0x1 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/pm6150.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/pm6150.dtsi @@ -13,7 +13,7 @@ thermal-zones { pm6150_thermal: pm6150-thermal { polling-delay-passive = <100>; - polling-delay = <0>; + thermal-sensors = <&pm6150_temp>; trips { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/pm6150l.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/pm6150l.dtsi @@ -10,9 +10,6 @@ / { thermal-zones { pm6150l-thermal { - polling-delay-passive = <0>; - polling-delay = <0>; - thermal-sensors = <&pm6150l_temp>; trips { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/qcm2290.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/qcm2290.dtsi @@ -442,6 +442,11 @@ #hwlock-cells = <1>; }; + tcsr_regs: syscon@3c0000 { + compatible = "qcom,qcm2290-tcsr", "syscon"; + reg = <0x0 0x003c0000 0x0 0x40000>; + }; + tlmm: pinctrl@500000 { compatible = "qcom,qcm2290-tlmm"; reg = <0x0 0x00500000 0x0 0x300000>; @@ -690,6 +695,8 @@ #phy-cells = <0>; + qcom,tcsr-reg = <&tcsr_regs 0xb244>; + status = "disabled"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts @@ -82,6 +82,11 @@ no-map; }; + removed_mem: removed@c0000000 { + reg = <0x0 0xc0000000 0x0 0x5100000>; + no-map; + }; + rmtfs_mem: memory@f8500000 { compatible = "qcom,rmtfs-mem"; reg = <0x0 0xf8500000 0x0 0x600000>; @@ -822,7 +827,6 @@ }; &uart5 { - compatible = "qcom,geni-debug-uart"; status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/qcm6490-idp.dts @@ -5,6 +5,7 @@ /dts-v1/; +#include #include #include "sc7280.dtsi" #include "pm7325.dtsi" @@ -123,8 +124,8 @@ vph_pwr: vph-pwr-regulator { compatible = "regulator-fixed"; regulator-name = "vph_pwr"; - regulator-min-microvolt = <2500000>; - regulator-max-microvolt = <4350000>; + regulator-min-microvolt = <3700000>; + regulator-max-microvolt = <3700000>; }; }; @@ -415,6 +416,33 @@ }; }; +&pm8350c_pwm { + status = "okay"; + + multi-led { + color = ; + function = LED_FUNCTION_STATUS; + + #address-cells = <1>; + #size-cells = <0>; + + led@1 { + reg = <1>; + color = ; + }; + + led@2 { + reg = <2>; + color = ; + }; + + led@3 { + reg = <3>; + color = ; + }; + }; +}; + &qupv3_id_0 { status = "okay"; }; @@ -436,7 +464,6 @@ }; &uart5 { - compatible = "qcom,geni-debug-uart"; status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi @@ -62,7 +62,7 @@ vddrf-supply = <&vreg_l1_1p3>; vddch0-supply = <&vdd_ch0_3p3>; - local-bd-address = [ 02 00 00 00 5a ad ]; + local-bd-address = [ 00 00 00 00 00 00 ]; max-speed = <3200000>; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -28,7 +28,7 @@ sleep_clk: sleep-clk { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <32768>; + clock-frequency = <32764>; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts @@ -124,8 +124,8 @@ vph_pwr: vph-pwr-regulator { compatible = "regulator-fixed"; regulator-name = "vph_pwr"; - regulator-min-microvolt = <2500000>; - regulator-max-microvolt = <4350000>; + regulator-min-microvolt = <3700000>; + regulator-max-microvolt = <3700000>; }; }; @@ -413,6 +413,23 @@ }; }; +&gcc { + protected-clocks = , + , + , + , + , + , + , + , + , + , + , + , + , + ; +}; + &qupv3_id_0 { status = "okay"; }; @@ -423,7 +440,6 @@ }; &uart5 { - compatible = "qcom,geni-debug-uart"; status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/qdu1000-idp.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/qdu1000-idp.dts @@ -31,7 +31,7 @@ sleep_clk: sleep-clk { compatible = "fixed-clock"; - clock-frequency = <32000>; + clock-frequency = <32764>; #clock-cells = <0>; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/qdu1000.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/qdu1000.dtsi @@ -1459,11 +1459,40 @@ system-cache-controller@19200000 { compatible = "qcom,qdu1000-llcc"; - reg = <0 0x19200000 0 0xd80000>, + reg = <0 0x19200000 0 0x80000>, + <0 0x19300000 0 0x80000>, + <0 0x19600000 0 0x80000>, + <0 0x19700000 0 0x80000>, + <0 0x19a00000 0 0x80000>, + <0 0x19b00000 0 0x80000>, + <0 0x19e00000 0 0x80000>, + <0 0x19f00000 0 0x80000>, <0 0x1a200000 0 0x80000>; reg-names = "llcc0_base", + "llcc1_base", + "llcc2_base", + "llcc3_base", + "llcc4_base", + "llcc5_base", + "llcc6_base", + "llcc7_base", "llcc_broadcast_base"; interrupts = ; + + nvmem-cells = <&multi_chan_ddr>; + nvmem-cell-names = "multi-chan-ddr"; + }; + + sec_qfprom: efuse@221c8000 { + compatible = "qcom,qdu1000-sec-qfprom", "qcom,sec-qfprom"; + reg = <0 0x221c8000 0 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + + multi_chan_ddr: multi-chan-ddr@12b { + reg = <0x12b 0x1>; + bits = <0 2>; + }; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts @@ -7,7 +7,7 @@ #include #include "qcm2290.dtsi" -#include "pm2250.dtsi" +#include "pm4125.dtsi" / { model = "Qualcomm Technologies, Inc. Robotics RB1"; @@ -59,6 +59,17 @@ }; }; + i2c2_gpio: i2c { + compatible = "i2c-gpio"; + + sda-gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>; + scl-gpios = <&tlmm 7 GPIO_ACTIVE_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + }; + leds { compatible = "gpio-leds"; @@ -177,11 +188,29 @@ }; }; +&CPU_PD0 { + /delete-property/ power-domains; +}; + +&CPU_PD1 { + /delete-property/ power-domains; +}; + +&CPU_PD2 { + /delete-property/ power-domains; +}; + +&CPU_PD3 { + /delete-property/ power-domains; +}; + +/delete-node/ &CLUSTER_PD; + &gpi_dma0 { status = "okay"; }; -&i2c2 { +&i2c2_gpio { clock-frequency = <400000>; status = "okay"; @@ -226,7 +255,7 @@ }; &mdss_dsi0 { - vdda-supply = <&pm2250_l5>; + vdda-supply = <&pm4125_l5>; status = "okay"; }; @@ -239,7 +268,7 @@ status = "okay"; }; -&pm2250_resin { +&pm4125_resin { linux,code = ; status = "okay"; }; @@ -263,23 +292,23 @@ compatible = "qcom,rpm-pm2250-regulators"; vdd_s3-supply = <&vph_pwr>; vdd_s4-supply = <&vph_pwr>; - vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12-supply = <&pm2250_s3>; + vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12-supply = <&pm4125_s3>; vdd_l4_l17_l18_l19_l20_l21_l22-supply = <&vph_pwr>; - vdd_l13_l14_l15_l16-supply = <&pm2250_s4>; + vdd_l13_l14_l15_l16-supply = <&pm4125_s4>; /* * S1 - VDD_APC * S2 - VDD_CX */ - pm2250_s3: s3 { + pm4125_s3: s3 { /* 0.4V-1.6625V -> 1.3V (Power tree requirements) */ regulator-min-microvolt = <1352000>; regulator-max-microvolt = <1352000>; regulator-boot-on; }; - pm2250_s4: s4 { + pm4125_s4: s4 { /* 1.2V-2.35V -> 2.05V (Power tree requirements) */ regulator-min-microvolt = <2072000>; regulator-max-microvolt = <2072000>; @@ -288,7 +317,7 @@ /* L1 - VDD_MX */ - pm2250_l2: l2 { + pm4125_l2: l2 { /* LPDDR4X VDD2 */ regulator-min-microvolt = <1136000>; regulator-max-microvolt = <1136000>; @@ -296,7 +325,7 @@ regulator-boot-on; }; - pm2250_l3: l3 { + pm4125_l3: l3 { /* LPDDR4X VDDQ */ regulator-min-microvolt = <616000>; regulator-max-microvolt = <616000>; @@ -304,14 +333,14 @@ regulator-boot-on; }; - pm2250_l4: l4 { + pm4125_l4: l4 { /* max = 3.05V -> max = 2.7 to disable 3V signaling (SDHCI2) */ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <2700000>; regulator-allow-set-load; }; - pm2250_l5: l5 { + pm4125_l5: l5 { /* CSI/DSI */ regulator-min-microvolt = <1232000>; regulator-max-microvolt = <1232000>; @@ -319,7 +348,7 @@ regulator-boot-on; }; - pm2250_l6: l6 { + pm4125_l6: l6 { /* DRAM PLL */ regulator-min-microvolt = <928000>; regulator-max-microvolt = <928000>; @@ -327,7 +356,7 @@ regulator-boot-on; }; - pm2250_l7: l7 { + pm4125_l7: l7 { /* Wi-Fi CX/MX */ regulator-min-microvolt = <664000>; regulator-max-microvolt = <664000>; @@ -338,20 +367,20 @@ * L9 - VDD_LPI_MX */ - pm2250_l10: l10 { + pm4125_l10: l10 { /* Wi-Fi RFA */ regulator-min-microvolt = <1304000>; regulator-max-microvolt = <1304000>; }; - pm2250_l11: l11 { + pm4125_l11: l11 { /* GPS RF1 */ regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-boot-on; }; - pm2250_l12: l12 { + pm4125_l12: l12 { /* USB PHYs */ regulator-min-microvolt = <928000>; regulator-max-microvolt = <928000>; @@ -359,7 +388,7 @@ regulator-boot-on; }; - pm2250_l13: l13 { + pm4125_l13: l13 { /* USB/QFPROM/PLLs */ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; @@ -367,7 +396,7 @@ regulator-boot-on; }; - pm2250_l14: l14 { + pm4125_l14: l14 { /* SDHCI1 VQMMC */ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; @@ -376,7 +405,7 @@ regulator-always-on; }; - pm2250_l15: l15 { + pm4125_l15: l15 { /* WCD/DSI/BT VDDIO */ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; @@ -385,38 +414,38 @@ regulator-boot-on; }; - pm2250_l16: l16 { + pm4125_l16: l16 { /* GPS RF2 */ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-boot-on; }; - pm2250_l17: l17 { + pm4125_l17: l17 { regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; }; - pm2250_l18: l18 { + pm4125_l18: l18 { /* VDD_PXn */ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; - pm2250_l19: l19 { + pm4125_l19: l19 { /* VDD_PXn */ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; - pm2250_l20: l20 { + pm4125_l20: l20 { /* SDHCI1 VMMC */ regulator-min-microvolt = <2400000>; regulator-max-microvolt = <3600000>; regulator-allow-set-load; }; - pm2250_l21: l21 { + pm4125_l21: l21 { /* SDHCI2 VMMC */ regulator-min-microvolt = <2960000>; regulator-max-microvolt = <3300000>; @@ -424,7 +453,7 @@ regulator-boot-on; }; - pm2250_l22: l22 { + pm4125_l22: l22 { /* Wi-Fi */ regulator-min-microvolt = <3312000>; regulator-max-microvolt = <3312000>; @@ -433,8 +462,8 @@ }; &sdhc_1 { - vmmc-supply = <&pm2250_l20>; - vqmmc-supply = <&pm2250_l14>; + vmmc-supply = <&pm4125_l20>; + vqmmc-supply = <&pm4125_l14>; pinctrl-0 = <&sdc1_state_on>; pinctrl-1 = <&sdc1_state_off>; pinctrl-names = "default", "sleep"; @@ -446,8 +475,8 @@ }; &sdhc_2 { - vmmc-supply = <&pm2250_l21>; - vqmmc-supply = <&pm2250_l4>; + vmmc-supply = <&pm4125_l21>; + vqmmc-supply = <&pm4125_l4>; cd-gpios = <&tlmm 88 GPIO_ACTIVE_LOW>; pinctrl-0 = <&sdc2_state_on &sd_det_in_on>; pinctrl-1 = <&sdc2_state_off &sd_det_in_off>; @@ -518,8 +547,8 @@ }; &usb_qmpphy { - vdda-phy-supply = <&pm2250_l12>; - vdda-pll-supply = <&pm2250_l13>; + vdda-phy-supply = <&pm4125_l12>; + vdda-pll-supply = <&pm4125_l13>; status = "okay"; }; @@ -528,17 +557,17 @@ }; &usb_hsphy { - vdd-supply = <&pm2250_l12>; - vdda-pll-supply = <&pm2250_l13>; - vdda-phy-dpdm-supply = <&pm2250_l21>; + vdd-supply = <&pm4125_l12>; + vdda-pll-supply = <&pm4125_l13>; + vdda-phy-dpdm-supply = <&pm4125_l21>; status = "okay"; }; &wifi { - vdd-0.8-cx-mx-supply = <&pm2250_l7>; - vdd-1.8-xo-supply = <&pm2250_l13>; - vdd-1.3-rfa-supply = <&pm2250_l10>; - vdd-3.3-ch0-supply = <&pm2250_l22>; + vdd-0.8-cx-mx-supply = <&pm4125_l7>; + vdd-1.8-xo-supply = <&pm4125_l13>; + vdd-1.3-rfa-supply = <&pm4125_l10>; + vdd-3.3-ch0-supply = <&pm4125_l22>; qcom,ath10k-calibration-variant = "Thundercomm_RB1"; status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts @@ -58,6 +58,17 @@ }; }; + i2c2_gpio: i2c { + compatible = "i2c-gpio"; + + sda-gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>; + scl-gpios = <&tlmm 7 GPIO_ACTIVE_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + }; + leds { compatible = "gpio-leds"; @@ -188,7 +199,7 @@ }; }; -&i2c2 { +&i2c2_gpio { clock-frequency = <400000>; status = "okay"; @@ -361,6 +372,8 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-allow-set-load; + regulator-always-on; + regulator-boot-on; }; vreg_l10a_1p8: l10 { @@ -490,7 +503,7 @@ }; &sleep_clk { - clock-frequency = <32000>; + clock-frequency = <32764>; }; &tlmm { @@ -607,10 +620,6 @@ status = "okay"; }; -&usb_dwc3 { - maximum-speed = "super-speed"; -}; - &usb_hsphy { vdd-supply = <&vreg_l4a_0p9>; vdda-pll-supply = <&vreg_l12a_1p8>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/qru1000-idp.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/qru1000-idp.dts @@ -31,7 +31,7 @@ sleep_clk: sleep-clk { compatible = "fixed-clock"; - clock-frequency = <32000>; + clock-frequency = <32764>; #clock-cells = <0>; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sa8155p-adp.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sa8155p-adp.dts @@ -367,6 +367,16 @@ }; }; +&pmm8155au_1_gpios { + pmm8155au_1_sdc2_cd: sdc2-cd-default-state { + pins = "gpio4"; + function = "normal"; + input-enable; + bias-pull-up; + power-source = <0>; + }; +}; + &qupv3_id_1 { status = "okay"; }; @@ -384,10 +394,10 @@ &sdhc_2 { status = "okay"; - cd-gpios = <&tlmm 4 GPIO_ACTIVE_LOW>; + cd-gpios = <&pmm8155au_1_gpios 4 GPIO_ACTIVE_LOW>; pinctrl-names = "default", "sleep"; - pinctrl-0 = <&sdc2_on>; - pinctrl-1 = <&sdc2_off>; + pinctrl-0 = <&sdc2_on &pmm8155au_1_sdc2_cd>; + pinctrl-1 = <&sdc2_off &pmm8155au_1_sdc2_cd>; vqmmc-supply = <&vreg_l13c_2p96>; /* IO line power */ vmmc-supply = <&vreg_l17a_2p96>; /* Card power line */ bus-width = <4>; @@ -505,13 +515,6 @@ bias-pull-up; /* pull up */ drive-strength = <16>; /* 16 MA */ }; - - sd-cd-pins { - pins = "gpio96"; - function = "gpio"; - bias-pull-up; /* pull up */ - drive-strength = <2>; /* 2 MA */ - }; }; sdc2_off: sdc2-off-state { @@ -532,13 +535,6 @@ bias-pull-up; /* pull up */ drive-strength = <2>; /* 2 MA */ }; - - sd-cd-pins { - pins = "gpio96"; - function = "gpio"; - bias-pull-up; /* pull up */ - drive-strength = <2>; /* 2 MA */ - }; }; usb2phy_ac_en1_default: usb2phy-ac-en1-default-state { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sa8540p.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sa8540p.dtsi @@ -168,6 +168,9 @@ }; &gpucc { + /* SA8295P and SA8540P doesn't provide gfx.lvl */ + /delete-property/ power-domains; + status = "disabled"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sa8775p-ride.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sa8775p-ride.dts @@ -5,835 +5,43 @@ /dts-v1/; -#include -#include - -#include "sa8775p.dtsi" -#include "sa8775p-pmics.dtsi" +#include "sa8775p-ride.dtsi" / { model = "Qualcomm SA8775P Ride"; compatible = "qcom,sa8775p-ride", "qcom,sa8775p"; - - aliases { - ethernet0 = ðernet0; - ethernet1 = ðernet1; - i2c11 = &i2c11; - i2c18 = &i2c18; - serial0 = &uart10; - serial1 = &uart12; - serial2 = &uart17; - spi16 = &spi16; - ufshc1 = &ufs_mem_hc; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - -&apps_rsc { - regulators-0 { - compatible = "qcom,pmm8654au-rpmh-regulators"; - qcom,pmic-id = "a"; - - vreg_s4a: smps4 { - regulator-name = "vreg_s4a"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1816000>; - regulator-initial-mode = ; - }; - - vreg_s5a: smps5 { - regulator-name = "vreg_s5a"; - regulator-min-microvolt = <1850000>; - regulator-max-microvolt = <1996000>; - regulator-initial-mode = ; - }; - - vreg_s9a: smps9 { - regulator-name = "vreg_s9a"; - regulator-min-microvolt = <535000>; - regulator-max-microvolt = <1120000>; - regulator-initial-mode = ; - }; - - vreg_l4a: ldo4 { - regulator-name = "vreg_l4a"; - regulator-min-microvolt = <788000>; - regulator-max-microvolt = <1050000>; - regulator-initial-mode = ; - regulator-allow-set-load; - regulator-allowed-modes = ; - }; - - vreg_l5a: ldo5 { - regulator-name = "vreg_l5a"; - regulator-min-microvolt = <870000>; - regulator-max-microvolt = <950000>; - regulator-initial-mode = ; - regulator-allow-set-load; - regulator-allowed-modes = ; - }; - - vreg_l6a: ldo6 { - regulator-name = "vreg_l6a"; - regulator-min-microvolt = <870000>; - regulator-max-microvolt = <970000>; - regulator-initial-mode = ; - regulator-allow-set-load; - regulator-allowed-modes = ; - }; - - vreg_l7a: ldo7 { - regulator-name = "vreg_l7a"; - regulator-min-microvolt = <720000>; - regulator-max-microvolt = <950000>; - regulator-initial-mode = ; - regulator-allow-set-load; - regulator-allowed-modes = ; - }; - - vreg_l8a: ldo8 { - regulator-name = "vreg_l8a"; - regulator-min-microvolt = <2504000>; - regulator-max-microvolt = <3300000>; - regulator-initial-mode = ; - regulator-allow-set-load; - regulator-allowed-modes = ; - }; - - vreg_l9a: ldo9 { - regulator-name = "vreg_l9a"; - regulator-min-microvolt = <2970000>; - regulator-max-microvolt = <3544000>; - regulator-initial-mode = ; - regulator-allow-set-load; - regulator-allowed-modes = ; - }; - }; - - regulators-1 { - compatible = "qcom,pmm8654au-rpmh-regulators"; - qcom,pmic-id = "c"; - - vreg_l1c: ldo1 { - regulator-name = "vreg_l1c"; - regulator-min-microvolt = <1140000>; - regulator-max-microvolt = <1260000>; - regulator-initial-mode = ; - regulator-allow-set-load; - regulator-allowed-modes = ; - }; - - vreg_l2c: ldo2 { - regulator-name = "vreg_l2c"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1100000>; - regulator-initial-mode = ; - regulator-allow-set-load; - regulator-allowed-modes = ; - }; - - vreg_l3c: ldo3 { - regulator-name = "vreg_l3c"; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1300000>; - regulator-initial-mode = ; - regulator-allow-set-load; - regulator-allowed-modes = ; - }; - - vreg_l4c: ldo4 { - regulator-name = "vreg_l4c"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-initial-mode = ; - /* - * FIXME: This should have regulator-allow-set-load but - * we're getting an over-current fault from the PMIC - * when switching to LPM. - */ - }; - - vreg_l5c: ldo5 { - regulator-name = "vreg_l5c"; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1300000>; - regulator-initial-mode = ; - regulator-allow-set-load; - regulator-allowed-modes = ; - }; - - vreg_l6c: ldo6 { - regulator-name = "vreg_l6c"; - regulator-min-microvolt = <1620000>; - regulator-max-microvolt = <1980000>; - regulator-initial-mode = ; - regulator-allow-set-load; - regulator-allowed-modes = ; - }; - - vreg_l7c: ldo7 { - regulator-name = "vreg_l7c"; - regulator-min-microvolt = <1620000>; - regulator-max-microvolt = <2000000>; - regulator-initial-mode = ; - regulator-allow-set-load; - regulator-allowed-modes = ; - }; - - vreg_l8c: ldo8 { - regulator-name = "vreg_l8c"; - regulator-min-microvolt = <2400000>; - regulator-max-microvolt = <3300000>; - regulator-initial-mode = ; - regulator-allow-set-load; - regulator-allowed-modes = ; - }; - - vreg_l9c: ldo9 { - regulator-name = "vreg_l9c"; - regulator-min-microvolt = <1650000>; - regulator-max-microvolt = <2700000>; - regulator-initial-mode = ; - regulator-allow-set-load; - regulator-allowed-modes = ; - }; - }; - - regulators-2 { - compatible = "qcom,pmm8654au-rpmh-regulators"; - qcom,pmic-id = "e"; - - vreg_s4e: smps4 { - regulator-name = "vreg_s4e"; - regulator-min-microvolt = <970000>; - regulator-max-microvolt = <1520000>; - regulator-initial-mode = ; - }; - - vreg_s7e: smps7 { - regulator-name = "vreg_s7e"; - regulator-min-microvolt = <1010000>; - regulator-max-microvolt = <1170000>; - regulator-initial-mode = ; - }; - - vreg_s9e: smps9 { - regulator-name = "vreg_s9e"; - regulator-min-microvolt = <300000>; - regulator-max-microvolt = <570000>; - regulator-initial-mode = ; - }; - - vreg_l6e: ldo6 { - regulator-name = "vreg_l6e"; - regulator-min-microvolt = <1280000>; - regulator-max-microvolt = <1450000>; - regulator-initial-mode = ; - regulator-allow-set-load; - regulator-allowed-modes = ; - }; - - vreg_l8e: ldo8 { - regulator-name = "vreg_l8e"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1950000>; - regulator-initial-mode = ; - regulator-allow-set-load; - regulator-allowed-modes = ; - }; - }; }; ðernet0 { phy-mode = "sgmii"; - phy-handle = <&sgmii_phy0>; - - pinctrl-0 = <ðernet0_default>; - pinctrl-names = "default"; - - snps,mtl-rx-config = <&mtl_rx_setup>; - snps,mtl-tx-config = <&mtl_tx_setup>; - snps,ps-speed = <1000>; - - status = "okay"; - - mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - - sgmii_phy0: phy@8 { - compatible = "ethernet-phy-id0141.0dd4"; - reg = <0x8>; - device_type = "ethernet-phy"; - interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>; - reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>; - reset-assert-us = <11000>; - reset-deassert-us = <70000>; - }; - - sgmii_phy1: phy@a { - compatible = "ethernet-phy-id0141.0dd4"; - reg = <0xa>; - device_type = "ethernet-phy"; - interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>; - reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>; - reset-assert-us = <11000>; - reset-deassert-us = <70000>; - }; - }; - - mtl_rx_setup: rx-queues-config { - snps,rx-queues-to-use = <4>; - snps,rx-sched-sp; - - queue0 { - snps,dcb-algorithm; - snps,map-to-dma-channel = <0x0>; - snps,route-up; - snps,priority = <0x1>; - }; - - queue1 { - snps,dcb-algorithm; - snps,map-to-dma-channel = <0x1>; - snps,route-ptp; - }; - - queue2 { - snps,avb-algorithm; - snps,map-to-dma-channel = <0x2>; - snps,route-avcp; - }; - - queue3 { - snps,avb-algorithm; - snps,map-to-dma-channel = <0x3>; - snps,priority = <0xc>; - }; - }; - - mtl_tx_setup: tx-queues-config { - snps,tx-queues-to-use = <4>; - snps,tx-sched-sp; - - queue0 { - snps,dcb-algorithm; - }; - - queue1 { - snps,dcb-algorithm; - }; - - queue2 { - snps,avb-algorithm; - snps,send_slope = <0x1000>; - snps,idle_slope = <0x1000>; - snps,high_credit = <0x3e800>; - snps,low_credit = <0xffc18000>; - }; - - queue3 { - snps,avb-algorithm; - snps,send_slope = <0x1000>; - snps,idle_slope = <0x1000>; - snps,high_credit = <0x3e800>; - snps,low_credit = <0xffc18000>; - }; - }; }; ðernet1 { phy-mode = "sgmii"; - phy-handle = <&sgmii_phy1>; - - snps,mtl-rx-config = <&mtl_rx_setup1>; - snps,mtl-tx-config = <&mtl_tx_setup1>; - snps,ps-speed = <1000>; - - status = "okay"; - - mtl_rx_setup1: rx-queues-config { - snps,rx-queues-to-use = <4>; - snps,rx-sched-sp; - - queue0 { - snps,dcb-algorithm; - snps,map-to-dma-channel = <0x0>; - snps,route-up; - snps,priority = <0x1>; - }; - - queue1 { - snps,dcb-algorithm; - snps,map-to-dma-channel = <0x1>; - snps,route-ptp; - }; - - queue2 { - snps,avb-algorithm; - snps,map-to-dma-channel = <0x2>; - snps,route-avcp; - }; - - queue3 { - snps,avb-algorithm; - snps,map-to-dma-channel = <0x3>; - snps,priority = <0xc>; - }; - }; - - mtl_tx_setup1: tx-queues-config { - snps,tx-queues-to-use = <4>; - snps,tx-sched-sp; - - queue0 { - snps,dcb-algorithm; - }; - - queue1 { - snps,dcb-algorithm; - }; - - queue2 { - snps,avb-algorithm; - snps,send_slope = <0x1000>; - snps,idle_slope = <0x1000>; - snps,high_credit = <0x3e800>; - snps,low_credit = <0xffc18000>; - }; - - queue3 { - snps,avb-algorithm; - snps,send_slope = <0x1000>; - snps,idle_slope = <0x1000>; - snps,high_credit = <0x3e800>; - snps,low_credit = <0xffc18000>; - }; - }; -}; - -&i2c11 { - clock-frequency = <400000>; - pinctrl-0 = <&qup_i2c11_default>; - pinctrl-names = "default"; - status = "okay"; }; -&i2c18 { - clock-frequency = <400000>; - pinctrl-0 = <&qup_i2c18_default>; - pinctrl-names = "default"; - status = "okay"; -}; - -&pmm8654au_0_gpios { - gpio-line-names = "DS_EN", - "POFF_COMPLETE", - "UFS0_VER_ID", - "FAST_POFF", - "DBU1_PON_DONE", - "AOSS_SLEEP", - "CAM_DES0_EN", - "CAM_DES1_EN", - "CAM_DES2_EN", - "CAM_DES3_EN", - "UEFI", - "ANALOG_PON_OPT"; -}; - -&pmm8654au_0_pon_resin { - linux,code = ; - status = "okay"; -}; - -&pmm8654au_1_gpios { - gpio-line-names = "PMIC_C_ID0", - "PMIC_C_ID1", - "UFS1_VER_ID", - "IPA_PWR", - "", - "WLAN_DBU4_EN", - "WLAN_EN", - "BT_EN", - "USB2_PWR_EN", - "USB2_FAULT"; - - usb2_en_state: usb2-en-state { - pins = "gpio9"; - function = "normal"; - output-high; - power-source = <0>; - }; -}; - -&pmm8654au_2_gpios { - gpio-line-names = "PMIC_E_ID0", - "PMIC_E_ID1", - "USB0_PWR_EN", - "USB0_FAULT", - "SENSOR_IRQ_1", - "SENSOR_IRQ_2", - "SENSOR_RST", - "SGMIIO0_RST", - "SGMIIO1_RST", - "USB1_PWR_ENABLE", - "USB1_FAULT", - "VMON_SPX8"; - - usb0_en_state: usb0-en-state { - pins = "gpio3"; - function = "normal"; - output-high; - power-source = <0>; +&mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + sgmii_phy0: phy@8 { + compatible = "ethernet-phy-id0141.0dd4"; + reg = <0x8>; + device_type = "ethernet-phy"; + interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>; + reset-assert-us = <11000>; + reset-deassert-us = <70000>; + }; + + sgmii_phy1: phy@a { + compatible = "ethernet-phy-id0141.0dd4"; + reg = <0xa>; + device_type = "ethernet-phy"; + interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>; + reset-assert-us = <11000>; + reset-deassert-us = <70000>; }; - - usb1_en_state: usb1-en-state { - pins = "gpio10"; - function = "normal"; - output-high; - power-source = <0>; - }; -}; - -&pmm8654au_3_gpios { - gpio-line-names = "PMIC_G_ID0", - "PMIC_G_ID1", - "GNSS_RST", - "GNSS_EN", - "GNSS_BOOT_MODE"; -}; - -&qupv3_id_1 { - status = "okay"; -}; - -&qupv3_id_2 { - status = "okay"; -}; - -&serdes0 { - phy-supply = <&vreg_l5a>; - status = "okay"; -}; - -&serdes1 { - phy-supply = <&vreg_l5a>; - status = "okay"; -}; - -&sleep_clk { - clock-frequency = <32764>; -}; - -&spi16 { - pinctrl-0 = <&qup_spi16_default>; - pinctrl-names = "default"; - status = "okay"; -}; - -&tlmm { - ethernet0_default: ethernet0-default-state { - ethernet0_mdc: ethernet0-mdc-pins { - pins = "gpio8"; - function = "emac0_mdc"; - drive-strength = <16>; - bias-pull-up; - }; - - ethernet0_mdio: ethernet0-mdio-pins { - pins = "gpio9"; - function = "emac0_mdio"; - drive-strength = <16>; - bias-pull-up; - }; - }; - - qup_uart10_default: qup-uart10-state { - pins = "gpio46", "gpio47"; - function = "qup1_se3"; - }; - - qup_spi16_default: qup-spi16-state { - pins = "gpio86", "gpio87", "gpio88", "gpio89"; - function = "qup2_se2"; - drive-strength = <6>; - bias-disable; - }; - - qup_i2c11_default: qup-i2c11-state { - pins = "gpio48", "gpio49"; - function = "qup1_se4"; - drive-strength = <2>; - bias-pull-up; - }; - - qup_i2c18_default: qup-i2c18-state { - pins = "gpio95", "gpio96"; - function = "qup2_se4"; - drive-strength = <2>; - bias-pull-up; - }; - - qup_uart12_default: qup-uart12-state { - qup_uart12_cts: qup-uart12-cts-pins { - pins = "gpio52"; - function = "qup1_se5"; - bias-disable; - }; - - qup_uart12_rts: qup-uart12-rts-pins { - pins = "gpio53"; - function = "qup1_se5"; - bias-pull-down; - }; - - qup_uart12_tx: qup-uart12-tx-pins { - pins = "gpio54"; - function = "qup1_se5"; - bias-pull-up; - }; - - qup_uart12_rx: qup-uart12-rx-pins { - pins = "gpio55"; - function = "qup1_se5"; - bias-pull-down; - }; - }; - - qup_uart17_default: qup-uart17-state { - qup_uart17_cts: qup-uart17-cts-pins { - pins = "gpio91"; - function = "qup2_se3"; - bias-disable; - }; - - qup_uart17_rts: qup0-uart17-rts-pins { - pins = "gpio92"; - function = "qup2_se3"; - bias-pull-down; - }; - - qup_uart17_tx: qup0-uart17-tx-pins { - pins = "gpio93"; - function = "qup2_se3"; - bias-pull-up; - }; - - qup_uart17_rx: qup0-uart17-rx-pins { - pins = "gpio94"; - function = "qup2_se3"; - bias-pull-down; - }; - }; - - pcie0_default_state: pcie0-default-state { - perst-pins { - pins = "gpio2"; - function = "gpio"; - drive-strength = <2>; - bias-pull-down; - }; - - clkreq-pins { - pins = "gpio1"; - function = "pcie0_clkreq"; - drive-strength = <2>; - bias-pull-up; - }; - - wake-pins { - pins = "gpio0"; - function = "gpio"; - drive-strength = <2>; - bias-pull-up; - }; - }; - - pcie1_default_state: pcie1-default-state { - perst-pins { - pins = "gpio4"; - function = "gpio"; - drive-strength = <2>; - bias-pull-down; - }; - - clkreq-pins { - pins = "gpio3"; - function = "pcie1_clkreq"; - drive-strength = <2>; - bias-pull-up; - }; - - wake-pins { - pins = "gpio5"; - function = "gpio"; - drive-strength = <2>; - bias-pull-up; - }; - }; -}; - -&pcie0 { - perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; - wake-gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; - - pinctrl-names = "default"; - pinctrl-0 = <&pcie0_default_state>; - - status = "okay"; -}; - -&pcie1 { - perst-gpios = <&tlmm 4 GPIO_ACTIVE_LOW>; - wake-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>; - - pinctrl-names = "default"; - pinctrl-0 = <&pcie1_default_state>; - - status = "okay"; -}; - -&pcie0_phy { - vdda-phy-supply = <&vreg_l5a>; - vdda-pll-supply = <&vreg_l1c>; - - status = "okay"; -}; - -&pcie1_phy { - vdda-phy-supply = <&vreg_l5a>; - vdda-pll-supply = <&vreg_l1c>; - - status = "okay"; -}; - -&uart10 { - compatible = "qcom,geni-debug-uart"; - pinctrl-0 = <&qup_uart10_default>; - pinctrl-names = "default"; - status = "okay"; -}; - -&uart12 { - pinctrl-0 = <&qup_uart12_default>; - pinctrl-names = "default"; - status = "okay"; -}; - -&uart17 { - pinctrl-0 = <&qup_uart17_default>; - pinctrl-names = "default"; - status = "okay"; -}; - -&ufs_mem_hc { - reset-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>; - vcc-supply = <&vreg_l8a>; - vcc-max-microamp = <1100000>; - vccq-supply = <&vreg_l4c>; - vccq-max-microamp = <1200000>; - - status = "okay"; -}; - -&ufs_mem_phy { - vdda-phy-supply = <&vreg_l4a>; - vdda-pll-supply = <&vreg_l1c>; - - status = "okay"; -}; - -&usb_0 { - pinctrl-names = "default"; - pinctrl-0 = <&usb0_en_state>; - - status = "okay"; -}; - -&usb_0_dwc3 { - dr_mode = "peripheral"; -}; - -&usb_0_hsphy { - vdda-pll-supply = <&vreg_l7a>; - vdda18-supply = <&vreg_l6c>; - vdda33-supply = <&vreg_l9a>; - - status = "okay"; -}; - -&usb_0_qmpphy { - vdda-phy-supply = <&vreg_l1c>; - vdda-pll-supply = <&vreg_l7a>; - - status = "okay"; -}; - -&usb_1 { - pinctrl-names = "default"; - pinctrl-0 = <&usb1_en_state>; - - status = "okay"; -}; - -&usb_1_dwc3 { - dr_mode = "host"; -}; - -&usb_1_hsphy { - vdda-pll-supply = <&vreg_l7a>; - vdda18-supply = <&vreg_l6c>; - vdda33-supply = <&vreg_l9a>; - - status = "okay"; -}; - -&usb_1_qmpphy { - vdda-phy-supply = <&vreg_l1c>; - vdda-pll-supply = <&vreg_l7a>; - - status = "okay"; -}; - -&usb_2 { - pinctrl-names = "default"; - pinctrl-0 = <&usb2_en_state>; - - status = "okay"; -}; - -&usb_2_dwc3 { - dr_mode = "host"; -}; - -&usb_2_hsphy { - vdda-pll-supply = <&vreg_l7a>; - vdda18-supply = <&vreg_l6c>; - vdda33-supply = <&vreg_l9a>; - - status = "okay"; -}; - -&xo_board_clk { - clock-frequency = <38400000>; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi @@ -0,0 +1,814 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023, Linaro Limited + */ + +/dts-v1/; + +#include +#include + +#include "sa8775p.dtsi" +#include "sa8775p-pmics.dtsi" + +/ { + aliases { + ethernet0 = ðernet0; + ethernet1 = ðernet1; + i2c11 = &i2c11; + i2c18 = &i2c18; + serial0 = &uart10; + serial1 = &uart12; + serial2 = &uart17; + spi16 = &spi16; + ufshc1 = &ufs_mem_hc; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&apps_rsc { + regulators-0 { + compatible = "qcom,pmm8654au-rpmh-regulators"; + qcom,pmic-id = "a"; + + vreg_s4a: smps4 { + regulator-name = "vreg_s4a"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1816000>; + regulator-initial-mode = ; + }; + + vreg_s5a: smps5 { + regulator-name = "vreg_s5a"; + regulator-min-microvolt = <1850000>; + regulator-max-microvolt = <1996000>; + regulator-initial-mode = ; + }; + + vreg_s9a: smps9 { + regulator-name = "vreg_s9a"; + regulator-min-microvolt = <535000>; + regulator-max-microvolt = <1120000>; + regulator-initial-mode = ; + }; + + vreg_l4a: ldo4 { + regulator-name = "vreg_l4a"; + regulator-min-microvolt = <788000>; + regulator-max-microvolt = <1050000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l5a: ldo5 { + regulator-name = "vreg_l5a"; + regulator-min-microvolt = <870000>; + regulator-max-microvolt = <950000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l6a: ldo6 { + regulator-name = "vreg_l6a"; + regulator-min-microvolt = <870000>; + regulator-max-microvolt = <970000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l7a: ldo7 { + regulator-name = "vreg_l7a"; + regulator-min-microvolt = <720000>; + regulator-max-microvolt = <950000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l8a: ldo8 { + regulator-name = "vreg_l8a"; + regulator-min-microvolt = <2504000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l9a: ldo9 { + regulator-name = "vreg_l9a"; + regulator-min-microvolt = <2970000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + }; + + regulators-1 { + compatible = "qcom,pmm8654au-rpmh-regulators"; + qcom,pmic-id = "c"; + + vreg_l1c: ldo1 { + regulator-name = "vreg_l1c"; + regulator-min-microvolt = <1140000>; + regulator-max-microvolt = <1260000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l2c: ldo2 { + regulator-name = "vreg_l2c"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1100000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l3c: ldo3 { + regulator-name = "vreg_l3c"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1300000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l4c: ldo4 { + regulator-name = "vreg_l4c"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = ; + /* + * FIXME: This should have regulator-allow-set-load but + * we're getting an over-current fault from the PMIC + * when switching to LPM. + */ + }; + + vreg_l5c: ldo5 { + regulator-name = "vreg_l5c"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1300000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l6c: ldo6 { + regulator-name = "vreg_l6c"; + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <1980000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l7c: ldo7 { + regulator-name = "vreg_l7c"; + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l8c: ldo8 { + regulator-name = "vreg_l8c"; + regulator-min-microvolt = <2400000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l9c: ldo9 { + regulator-name = "vreg_l9c"; + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <2700000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + }; + + regulators-2 { + compatible = "qcom,pmm8654au-rpmh-regulators"; + qcom,pmic-id = "e"; + + vreg_s4e: smps4 { + regulator-name = "vreg_s4e"; + regulator-min-microvolt = <970000>; + regulator-max-microvolt = <1520000>; + regulator-initial-mode = ; + }; + + vreg_s7e: smps7 { + regulator-name = "vreg_s7e"; + regulator-min-microvolt = <1010000>; + regulator-max-microvolt = <1170000>; + regulator-initial-mode = ; + }; + + vreg_s9e: smps9 { + regulator-name = "vreg_s9e"; + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <570000>; + regulator-initial-mode = ; + }; + + vreg_l6e: ldo6 { + regulator-name = "vreg_l6e"; + regulator-min-microvolt = <1280000>; + regulator-max-microvolt = <1450000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l8e: ldo8 { + regulator-name = "vreg_l8e"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1950000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + }; +}; + +ðernet0 { + phy-handle = <&sgmii_phy0>; + + pinctrl-0 = <ðernet0_default>; + pinctrl-names = "default"; + + snps,mtl-rx-config = <&mtl_rx_setup>; + snps,mtl-tx-config = <&mtl_tx_setup>; + snps,ps-speed = <1000>; + + status = "okay"; + + mdio: mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + }; + + mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use = <4>; + snps,rx-sched-sp; + + queue0 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x0>; + snps,route-up; + snps,priority = <0x1>; + }; + + queue1 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x1>; + snps,route-ptp; + }; + + queue2 { + snps,avb-algorithm; + snps,map-to-dma-channel = <0x2>; + snps,route-avcp; + }; + + queue3 { + snps,avb-algorithm; + snps,map-to-dma-channel = <0x3>; + snps,priority = <0xc>; + }; + }; + + mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use = <4>; + snps,tx-sched-sp; + + queue0 { + snps,dcb-algorithm; + }; + + queue1 { + snps,dcb-algorithm; + }; + + queue2 { + snps,avb-algorithm; + snps,send_slope = <0x1000>; + snps,idle_slope = <0x1000>; + snps,high_credit = <0x3e800>; + snps,low_credit = <0xffc18000>; + }; + + queue3 { + snps,avb-algorithm; + snps,send_slope = <0x1000>; + snps,idle_slope = <0x1000>; + snps,high_credit = <0x3e800>; + snps,low_credit = <0xffc18000>; + }; + }; +}; + +ðernet1 { + phy-handle = <&sgmii_phy1>; + + snps,mtl-rx-config = <&mtl_rx_setup1>; + snps,mtl-tx-config = <&mtl_tx_setup1>; + snps,ps-speed = <1000>; + + status = "okay"; + + mtl_rx_setup1: rx-queues-config { + snps,rx-queues-to-use = <4>; + snps,rx-sched-sp; + + queue0 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x0>; + snps,route-up; + snps,priority = <0x1>; + }; + + queue1 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x1>; + snps,route-ptp; + }; + + queue2 { + snps,avb-algorithm; + snps,map-to-dma-channel = <0x2>; + snps,route-avcp; + }; + + queue3 { + snps,avb-algorithm; + snps,map-to-dma-channel = <0x3>; + snps,priority = <0xc>; + }; + }; + + mtl_tx_setup1: tx-queues-config { + snps,tx-queues-to-use = <4>; + snps,tx-sched-sp; + + queue0 { + snps,dcb-algorithm; + }; + + queue1 { + snps,dcb-algorithm; + }; + + queue2 { + snps,avb-algorithm; + snps,send_slope = <0x1000>; + snps,idle_slope = <0x1000>; + snps,high_credit = <0x3e800>; + snps,low_credit = <0xffc18000>; + }; + + queue3 { + snps,avb-algorithm; + snps,send_slope = <0x1000>; + snps,idle_slope = <0x1000>; + snps,high_credit = <0x3e800>; + snps,low_credit = <0xffc18000>; + }; + }; +}; + +&i2c11 { + clock-frequency = <400000>; + pinctrl-0 = <&qup_i2c11_default>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2c18 { + clock-frequency = <400000>; + pinctrl-0 = <&qup_i2c18_default>; + pinctrl-names = "default"; + status = "okay"; +}; + +&pmm8654au_0_gpios { + gpio-line-names = "DS_EN", + "POFF_COMPLETE", + "UFS0_VER_ID", + "FAST_POFF", + "DBU1_PON_DONE", + "AOSS_SLEEP", + "CAM_DES0_EN", + "CAM_DES1_EN", + "CAM_DES2_EN", + "CAM_DES3_EN", + "UEFI", + "ANALOG_PON_OPT"; +}; + +&pmm8654au_0_pon_resin { + linux,code = ; + status = "okay"; +}; + +&pmm8654au_1_gpios { + gpio-line-names = "PMIC_C_ID0", + "PMIC_C_ID1", + "UFS1_VER_ID", + "IPA_PWR", + "", + "WLAN_DBU4_EN", + "WLAN_EN", + "BT_EN", + "USB2_PWR_EN", + "USB2_FAULT"; + + usb2_en_state: usb2-en-state { + pins = "gpio9"; + function = "normal"; + output-high; + power-source = <0>; + }; +}; + +&pmm8654au_2_gpios { + gpio-line-names = "PMIC_E_ID0", + "PMIC_E_ID1", + "USB0_PWR_EN", + "USB0_FAULT", + "SENSOR_IRQ_1", + "SENSOR_IRQ_2", + "SENSOR_RST", + "SGMIIO0_RST", + "SGMIIO1_RST", + "USB1_PWR_ENABLE", + "USB1_FAULT", + "VMON_SPX8"; + + usb0_en_state: usb0-en-state { + pins = "gpio3"; + function = "normal"; + output-high; + power-source = <0>; + }; + + usb1_en_state: usb1-en-state { + pins = "gpio10"; + function = "normal"; + output-high; + power-source = <0>; + }; +}; + +&pmm8654au_3_gpios { + gpio-line-names = "PMIC_G_ID0", + "PMIC_G_ID1", + "GNSS_RST", + "GNSS_EN", + "GNSS_BOOT_MODE"; +}; + +&qupv3_id_1 { + status = "okay"; +}; + +&qupv3_id_2 { + status = "okay"; +}; + +&serdes0 { + phy-supply = <&vreg_l5a>; + status = "okay"; +}; + +&serdes1 { + phy-supply = <&vreg_l5a>; + status = "okay"; +}; + +&sleep_clk { + clock-frequency = <32000>; +}; + +&spi16 { + pinctrl-0 = <&qup_spi16_default>; + pinctrl-names = "default"; + status = "okay"; +}; + +&tlmm { + ethernet0_default: ethernet0-default-state { + ethernet0_mdc: ethernet0-mdc-pins { + pins = "gpio8"; + function = "emac0_mdc"; + drive-strength = <16>; + bias-pull-up; + }; + + ethernet0_mdio: ethernet0-mdio-pins { + pins = "gpio9"; + function = "emac0_mdio"; + drive-strength = <16>; + bias-pull-up; + }; + }; + + qup_uart10_default: qup-uart10-state { + pins = "gpio46", "gpio47"; + function = "qup1_se3"; + }; + + qup_spi16_default: qup-spi16-state { + pins = "gpio86", "gpio87", "gpio88", "gpio89"; + function = "qup2_se2"; + drive-strength = <6>; + bias-disable; + }; + + qup_i2c11_default: qup-i2c11-state { + pins = "gpio48", "gpio49"; + function = "qup1_se4"; + drive-strength = <2>; + bias-pull-up; + }; + + qup_i2c18_default: qup-i2c18-state { + pins = "gpio95", "gpio96"; + function = "qup2_se4"; + drive-strength = <2>; + bias-pull-up; + }; + + qup_uart12_default: qup-uart12-state { + qup_uart12_cts: qup-uart12-cts-pins { + pins = "gpio52"; + function = "qup1_se5"; + bias-disable; + }; + + qup_uart12_rts: qup-uart12-rts-pins { + pins = "gpio53"; + function = "qup1_se5"; + bias-pull-down; + }; + + qup_uart12_tx: qup-uart12-tx-pins { + pins = "gpio54"; + function = "qup1_se5"; + bias-pull-up; + }; + + qup_uart12_rx: qup-uart12-rx-pins { + pins = "gpio55"; + function = "qup1_se5"; + bias-pull-down; + }; + }; + + qup_uart17_default: qup-uart17-state { + qup_uart17_cts: qup-uart17-cts-pins { + pins = "gpio91"; + function = "qup2_se3"; + bias-disable; + }; + + qup_uart17_rts: qup0-uart17-rts-pins { + pins = "gpio92"; + function = "qup2_se3"; + bias-pull-down; + }; + + qup_uart17_tx: qup0-uart17-tx-pins { + pins = "gpio93"; + function = "qup2_se3"; + bias-pull-up; + }; + + qup_uart17_rx: qup0-uart17-rx-pins { + pins = "gpio94"; + function = "qup2_se3"; + bias-pull-down; + }; + }; + + pcie0_default_state: pcie0-default-state { + perst-pins { + pins = "gpio2"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + clkreq-pins { + pins = "gpio1"; + function = "pcie0_clkreq"; + drive-strength = <2>; + bias-pull-up; + }; + + wake-pins { + pins = "gpio0"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + pcie1_default_state: pcie1-default-state { + perst-pins { + pins = "gpio4"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + clkreq-pins { + pins = "gpio3"; + function = "pcie1_clkreq"; + drive-strength = <2>; + bias-pull-up; + }; + + wake-pins { + pins = "gpio5"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; +}; + +&pcie0 { + perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; + + pinctrl-names = "default"; + pinctrl-0 = <&pcie0_default_state>; + + status = "okay"; +}; + +&pcie1 { + perst-gpios = <&tlmm 4 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>; + + pinctrl-names = "default"; + pinctrl-0 = <&pcie1_default_state>; + + status = "okay"; +}; + +&pcie0_phy { + vdda-phy-supply = <&vreg_l5a>; + vdda-pll-supply = <&vreg_l1c>; + + status = "okay"; +}; + +&pcie1_phy { + vdda-phy-supply = <&vreg_l5a>; + vdda-pll-supply = <&vreg_l1c>; + + status = "okay"; +}; + +&uart10 { + compatible = "qcom,geni-debug-uart"; + pinctrl-0 = <&qup_uart10_default>; + pinctrl-names = "default"; + status = "okay"; +}; + +&uart12 { + pinctrl-0 = <&qup_uart12_default>; + pinctrl-names = "default"; + status = "okay"; +}; + +&uart17 { + pinctrl-0 = <&qup_uart17_default>; + pinctrl-names = "default"; + status = "okay"; +}; + +&ufs_mem_hc { + reset-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>; + vcc-supply = <&vreg_l8a>; + vcc-max-microamp = <1100000>; + vccq-supply = <&vreg_l4c>; + vccq-max-microamp = <1200000>; + + status = "okay"; +}; + +&ufs_mem_phy { + vdda-phy-supply = <&vreg_l4a>; + vdda-pll-supply = <&vreg_l1c>; + + status = "okay"; +}; + +&usb_0 { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_en_state>; + + status = "okay"; +}; + +&usb_0_dwc3 { + dr_mode = "peripheral"; +}; + +&usb_0_hsphy { + vdda-pll-supply = <&vreg_l7a>; + vdda18-supply = <&vreg_l6c>; + vdda33-supply = <&vreg_l9a>; + + status = "okay"; +}; + +&usb_0_qmpphy { + vdda-phy-supply = <&vreg_l1c>; + vdda-pll-supply = <&vreg_l7a>; + + status = "okay"; +}; + +&usb_1 { + pinctrl-names = "default"; + pinctrl-0 = <&usb1_en_state>; + + status = "okay"; +}; + +&usb_1_dwc3 { + dr_mode = "host"; +}; + +&usb_1_hsphy { + vdda-pll-supply = <&vreg_l7a>; + vdda18-supply = <&vreg_l6c>; + vdda33-supply = <&vreg_l9a>; + + status = "okay"; +}; + +&usb_1_qmpphy { + vdda-phy-supply = <&vreg_l1c>; + vdda-pll-supply = <&vreg_l7a>; + + status = "okay"; +}; + +&usb_2 { + pinctrl-names = "default"; + pinctrl-0 = <&usb2_en_state>; + + status = "okay"; +}; + +&usb_2_dwc3 { + dr_mode = "host"; +}; + +&usb_2_hsphy { + vdda-pll-supply = <&vreg_l7a>; + vdda18-supply = <&vreg_l6c>; + vdda33-supply = <&vreg_l9a>; + + status = "okay"; +}; + +&xo_board_clk { + clock-frequency = <38400000>; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -2013,6 +2013,7 @@ reg = <0x0 0x15000000 0x0 0x100000>; #iommu-cells = <2>; #global-interrupts = <2>; + dma-coherent; interrupts = , , @@ -2151,6 +2152,7 @@ reg = <0x0 0x15200000 0x0 0x80000>; #iommu-cells = <2>; #global-interrupts = <2>; + dma-coherent; interrupts = , , @@ -2412,6 +2414,7 @@ phy-names = "serdes"; iommus = <&apps_smmu 0x140 0xf>; + dma-coherent; snps,tso; snps,pbl = <32>; @@ -2445,6 +2448,7 @@ phy-names = "serdes"; iommus = <&apps_smmu 0x120 0xf>; + dma-coherent; snps,tso; snps,pbl = <32>; @@ -3512,7 +3516,7 @@ interrupts = , , , - ; + ; }; pcie0: pcie@1c00000 { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sc7180-firmware-tfa.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sc7180-firmware-tfa.dtsi @@ -6,82 +6,82 @@ * by Qualcomm firmware. */ -&CPU0 { +&cpu0 { /delete-property/ power-domains; /delete-property/ power-domain-names; - cpu-idle-states = <&LITTLE_CPU_SLEEP_0 - &LITTLE_CPU_SLEEP_1 - &CLUSTER_SLEEP_0>; + cpu-idle-states = <&little_cpu_sleep_0 + &little_cpu_sleep_1 + &cluster_sleep_0>; }; -&CPU1 { +&cpu1 { /delete-property/ power-domains; /delete-property/ power-domain-names; - cpu-idle-states = <&LITTLE_CPU_SLEEP_0 - &LITTLE_CPU_SLEEP_1 - &CLUSTER_SLEEP_0>; + cpu-idle-states = <&little_cpu_sleep_0 + &little_cpu_sleep_1 + &cluster_sleep_0>; }; -&CPU2 { +&cpu2 { /delete-property/ power-domains; /delete-property/ power-domain-names; - cpu-idle-states = <&LITTLE_CPU_SLEEP_0 - &LITTLE_CPU_SLEEP_1 - &CLUSTER_SLEEP_0>; + cpu-idle-states = <&little_cpu_sleep_0 + &little_cpu_sleep_1 + &cluster_sleep_0>; }; -&CPU3 { +&cpu3 { /delete-property/ power-domains; /delete-property/ power-domain-names; - cpu-idle-states = <&LITTLE_CPU_SLEEP_0 - &LITTLE_CPU_SLEEP_1 - &CLUSTER_SLEEP_0>; + cpu-idle-states = <&little_cpu_sleep_0 + &little_cpu_sleep_1 + &cluster_sleep_0>; }; -&CPU4 { +&cpu4 { /delete-property/ power-domains; /delete-property/ power-domain-names; - cpu-idle-states = <&LITTLE_CPU_SLEEP_0 - &LITTLE_CPU_SLEEP_1 - &CLUSTER_SLEEP_0>; + cpu-idle-states = <&little_cpu_sleep_0 + &little_cpu_sleep_1 + &cluster_sleep_0>; }; -&CPU5 { +&cpu5 { /delete-property/ power-domains; /delete-property/ power-domain-names; - cpu-idle-states = <&LITTLE_CPU_SLEEP_0 - &LITTLE_CPU_SLEEP_1 - &CLUSTER_SLEEP_0>; + cpu-idle-states = <&little_cpu_sleep_0 + &little_cpu_sleep_1 + &cluster_sleep_0>; }; -&CPU6 { +&cpu6 { /delete-property/ power-domains; /delete-property/ power-domain-names; - cpu-idle-states = <&BIG_CPU_SLEEP_0 - &BIG_CPU_SLEEP_1 - &CLUSTER_SLEEP_0>; + cpu-idle-states = <&big_cpu_sleep_0 + &big_cpu_sleep_1 + &cluster_sleep_0>; }; -&CPU7 { +&cpu7 { /delete-property/ power-domains; /delete-property/ power-domain-names; - cpu-idle-states = <&BIG_CPU_SLEEP_0 - &BIG_CPU_SLEEP_1 - &CLUSTER_SLEEP_0>; + cpu-idle-states = <&big_cpu_sleep_0 + &big_cpu_sleep_1 + &cluster_sleep_0>; }; /delete-node/ &domain_idle_states; &idle_states { - CLUSTER_SLEEP_0: cluster-sleep-0 { + cluster_sleep_0: cluster-sleep-0 { compatible = "arm,idle-state"; idle-state-name = "cluster-power-down"; arm,psci-suspend-param = <0x40003444>; @@ -92,15 +92,15 @@ }; }; -/delete-node/ &CPU_PD0; -/delete-node/ &CPU_PD1; -/delete-node/ &CPU_PD2; -/delete-node/ &CPU_PD3; -/delete-node/ &CPU_PD4; -/delete-node/ &CPU_PD5; -/delete-node/ &CPU_PD6; -/delete-node/ &CPU_PD7; -/delete-node/ &CLUSTER_PD; +/delete-node/ &cpu_pd0; +/delete-node/ &cpu_pd1; +/delete-node/ &cpu_pd2; +/delete-node/ &cpu_pd3; +/delete-node/ &cpu_pd4; +/delete-node/ &cpu_pd5; +/delete-node/ &cpu_pd6; +/delete-node/ &cpu_pd7; +/delete-node/ &cluster_pd; &apps_rsc { /delete-property/ power-domains; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi @@ -25,7 +25,6 @@ thermal-zones { skin_temp_thermal: skin-temp-thermal { polling-delay-passive = <250>; - polling-delay = <0>; thermal-sensors = <&pm6150_adc_tm 1>; sustainable-power = <965>; @@ -53,14 +52,14 @@ cooling-maps { map0 { trip = <&skin_temp_alert0>; - cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; map1 { trip = <&skin_temp_alert1>; - cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi @@ -45,7 +45,6 @@ thermal-zones { skin_temp_thermal: skin-temp-thermal { polling-delay-passive = <250>; - polling-delay = <0>; thermal-sensors = <&pm6150_adc_tm 1>; sustainable-power = <965>; @@ -73,14 +72,14 @@ cooling-maps { map0 { trip = <&skin_temp_alert0>; - cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; map1 { trip = <&skin_temp_alert1>; - cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1-kb.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1-kb.dts @@ -12,6 +12,6 @@ compatible = "google,lazor-rev1-sku2", "google,lazor-rev2-sku2", "qcom,sc7180"; }; -&keyboard_backlight { +&pwmleds { status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1-lte.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r1-lte.dts @@ -17,6 +17,6 @@ status = "okay"; }; -&keyboard_backlight { +&pwmleds { status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r10-kb.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r10-kb.dts @@ -18,6 +18,6 @@ compatible = "google,lazor-sku2", "qcom,sc7180"; }; -&keyboard_backlight { +&pwmleds { status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r10-lte.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r10-lte.dts @@ -22,6 +22,6 @@ status = "okay"; }; -&keyboard_backlight { +&pwmleds { status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3-kb.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3-kb.dts @@ -21,6 +21,6 @@ "qcom,sc7180"; }; -&keyboard_backlight { +&pwmleds { status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3-lte.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r3-lte.dts @@ -25,6 +25,6 @@ status = "okay"; }; -&keyboard_backlight { +&pwmleds { status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r9-kb.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r9-kb.dts @@ -18,6 +18,6 @@ compatible = "google,lazor-rev9-sku2", "qcom,sc7180"; }; -&keyboard_backlight { +&pwmleds { status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r9-lte.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor-r9-lte.dts @@ -22,6 +22,6 @@ status = "okay"; }; -&keyboard_backlight { +&pwmleds { status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi @@ -13,14 +13,11 @@ / { thermal-zones { - 5v-choke-thermal { - polling-delay-passive = <0>; - polling-delay = <250>; - + choke-5v-thermal { thermal-sensors = <&pm6150_adc_tm 1>; trips { - 5v-choke-crit { + choke-5v-crit { temperature = <125000>; hysteresis = <1000>; type = "critical"; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sc7180-trogdor-quackingstick.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sc7180-trogdor-quackingstick.dtsi @@ -86,6 +86,7 @@ pinctrl-names = "default"; pinctrl-0 = <&lcd_rst>; avdd-supply = <&ppvar_lcd>; + avee-supply = <&ppvar_lcd>; pp1800-supply = <&v1p8_disp>; pp3300-supply = <&pp3300_dx_edp>; backlight = <&backlight>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sc7180-trogdor-wormdingler.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sc7180-trogdor-wormdingler.dtsi @@ -50,7 +50,6 @@ thermal-zones { skin_temp_thermal: skin-temp-thermal { polling-delay-passive = <250>; - polling-delay = <0>; thermal-sensors = <&pm6150_adc_tm 1>; sustainable-power = <574>; @@ -78,14 +77,14 @@ cooling-maps { map0 { trip = <&skin_temp_alert0>; - cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; map1 { trip = <&skin_temp_alert1>; - cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi @@ -21,9 +21,6 @@ / { thermal-zones { charger_thermal: charger-thermal { - polling-delay-passive = <0>; - polling-delay = <0>; - thermal-sensors = <&pm6150_adc_tm 0>; trips { @@ -359,10 +356,11 @@ #sound-dai-cells = <0>; }; - pwmleds { + pwmleds: pwmleds { compatible = "pwm-leds"; + status = "disabled"; + keyboard_backlight: led-0 { - status = "disabled"; label = "cros_ec::kbd_backlight"; function = LED_FUNCTION_KBD_BACKLIGHT; pwms = <&cros_ec_pwm 0>; @@ -943,6 +941,8 @@ vddrf-supply = <&pp1300_l2c>; vddch0-supply = <&pp3300_l10c>; max-speed = <3200000>; + + qcom,local-bd-address-broken; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -77,28 +77,28 @@ #address-cells = <2>; #size-cells = <0>; - CPU0: cpu@0 { + cpu0: cpu@0 { device_type = "cpu"; compatible = "qcom,kryo468"; reg = <0x0 0x0>; clocks = <&cpufreq_hw 0>; enable-method = "psci"; - power-domains = <&CPU_PD0>; + power-domains = <&cpu_pd0>; power-domain-names = "psci"; capacity-dmips-mhz = <415>; dynamic-power-coefficient = <137>; operating-points-v2 = <&cpu0_opp_table>; interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>, <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; - next-level-cache = <&L2_0>; + next-level-cache = <&l2_0>; #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 0>; - L2_0: l2-cache { + l2_0: l2-cache { compatible = "cache"; cache-level = <2>; cache-unified; - next-level-cache = <&L3_0>; - L3_0: l3-cache { + next-level-cache = <&l3_0>; + l3_0: l3-cache { compatible = "cache"; cache-level = <3>; cache-unified; @@ -106,206 +106,206 @@ }; }; - CPU1: cpu@100 { + cpu1: cpu@100 { device_type = "cpu"; compatible = "qcom,kryo468"; reg = <0x0 0x100>; clocks = <&cpufreq_hw 0>; enable-method = "psci"; - power-domains = <&CPU_PD1>; + power-domains = <&cpu_pd1>; power-domain-names = "psci"; capacity-dmips-mhz = <415>; dynamic-power-coefficient = <137>; - next-level-cache = <&L2_100>; + next-level-cache = <&l2_100>; operating-points-v2 = <&cpu0_opp_table>; interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>, <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 0>; - L2_100: l2-cache { + l2_100: l2-cache { compatible = "cache"; cache-level = <2>; cache-unified; - next-level-cache = <&L3_0>; + next-level-cache = <&l3_0>; }; }; - CPU2: cpu@200 { + cpu2: cpu@200 { device_type = "cpu"; compatible = "qcom,kryo468"; reg = <0x0 0x200>; clocks = <&cpufreq_hw 0>; enable-method = "psci"; - power-domains = <&CPU_PD2>; + power-domains = <&cpu_pd2>; power-domain-names = "psci"; capacity-dmips-mhz = <415>; dynamic-power-coefficient = <137>; - next-level-cache = <&L2_200>; + next-level-cache = <&l2_200>; operating-points-v2 = <&cpu0_opp_table>; interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>, <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 0>; - L2_200: l2-cache { + l2_200: l2-cache { compatible = "cache"; cache-level = <2>; cache-unified; - next-level-cache = <&L3_0>; + next-level-cache = <&l3_0>; }; }; - CPU3: cpu@300 { + cpu3: cpu@300 { device_type = "cpu"; compatible = "qcom,kryo468"; reg = <0x0 0x300>; clocks = <&cpufreq_hw 0>; enable-method = "psci"; - power-domains = <&CPU_PD3>; + power-domains = <&cpu_pd3>; power-domain-names = "psci"; capacity-dmips-mhz = <415>; dynamic-power-coefficient = <137>; - next-level-cache = <&L2_300>; + next-level-cache = <&l2_300>; operating-points-v2 = <&cpu0_opp_table>; interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>, <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 0>; - L2_300: l2-cache { + l2_300: l2-cache { compatible = "cache"; cache-level = <2>; cache-unified; - next-level-cache = <&L3_0>; + next-level-cache = <&l3_0>; }; }; - CPU4: cpu@400 { + cpu4: cpu@400 { device_type = "cpu"; compatible = "qcom,kryo468"; reg = <0x0 0x400>; clocks = <&cpufreq_hw 0>; enable-method = "psci"; - power-domains = <&CPU_PD4>; + power-domains = <&cpu_pd4>; power-domain-names = "psci"; capacity-dmips-mhz = <415>; dynamic-power-coefficient = <137>; - next-level-cache = <&L2_400>; + next-level-cache = <&l2_400>; operating-points-v2 = <&cpu0_opp_table>; interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>, <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 0>; - L2_400: l2-cache { + l2_400: l2-cache { compatible = "cache"; cache-level = <2>; cache-unified; - next-level-cache = <&L3_0>; + next-level-cache = <&l3_0>; }; }; - CPU5: cpu@500 { + cpu5: cpu@500 { device_type = "cpu"; compatible = "qcom,kryo468"; reg = <0x0 0x500>; clocks = <&cpufreq_hw 0>; enable-method = "psci"; - power-domains = <&CPU_PD5>; + power-domains = <&cpu_pd5>; power-domain-names = "psci"; capacity-dmips-mhz = <415>; dynamic-power-coefficient = <137>; - next-level-cache = <&L2_500>; + next-level-cache = <&l2_500>; operating-points-v2 = <&cpu0_opp_table>; interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>, <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 0>; - L2_500: l2-cache { + l2_500: l2-cache { compatible = "cache"; cache-level = <2>; cache-unified; - next-level-cache = <&L3_0>; + next-level-cache = <&l3_0>; }; }; - CPU6: cpu@600 { + cpu6: cpu@600 { device_type = "cpu"; compatible = "qcom,kryo468"; reg = <0x0 0x600>; clocks = <&cpufreq_hw 1>; enable-method = "psci"; - power-domains = <&CPU_PD6>; + power-domains = <&cpu_pd6>; power-domain-names = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <480>; - next-level-cache = <&L2_600>; + next-level-cache = <&l2_600>; operating-points-v2 = <&cpu6_opp_table>; interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>, <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 1>; - L2_600: l2-cache { + l2_600: l2-cache { compatible = "cache"; cache-level = <2>; cache-unified; - next-level-cache = <&L3_0>; + next-level-cache = <&l3_0>; }; }; - CPU7: cpu@700 { + cpu7: cpu@700 { device_type = "cpu"; compatible = "qcom,kryo468"; reg = <0x0 0x700>; clocks = <&cpufreq_hw 1>; enable-method = "psci"; - power-domains = <&CPU_PD7>; + power-domains = <&cpu_pd7>; power-domain-names = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <480>; - next-level-cache = <&L2_700>; + next-level-cache = <&l2_700>; operating-points-v2 = <&cpu6_opp_table>; interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>, <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 1>; - L2_700: l2-cache { + l2_700: l2-cache { compatible = "cache"; cache-level = <2>; cache-unified; - next-level-cache = <&L3_0>; + next-level-cache = <&l3_0>; }; }; cpu-map { cluster0 { core0 { - cpu = <&CPU0>; + cpu = <&cpu0>; }; core1 { - cpu = <&CPU1>; + cpu = <&cpu1>; }; core2 { - cpu = <&CPU2>; + cpu = <&cpu2>; }; core3 { - cpu = <&CPU3>; + cpu = <&cpu3>; }; core4 { - cpu = <&CPU4>; + cpu = <&cpu4>; }; core5 { - cpu = <&CPU5>; + cpu = <&cpu5>; }; core6 { - cpu = <&CPU6>; + cpu = <&cpu6>; }; core7 { - cpu = <&CPU7>; + cpu = <&cpu7>; }; }; }; @@ -313,7 +313,7 @@ idle_states: idle-states { entry-method = "psci"; - LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 { + little_cpu_sleep_0: cpu-sleep-0-0 { compatible = "arm,idle-state"; idle-state-name = "little-power-down"; arm,psci-suspend-param = <0x40000003>; @@ -323,7 +323,7 @@ local-timer-stop; }; - LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 { + little_cpu_sleep_1: cpu-sleep-0-1 { compatible = "arm,idle-state"; idle-state-name = "little-rail-power-down"; arm,psci-suspend-param = <0x40000004>; @@ -333,7 +333,7 @@ local-timer-stop; }; - BIG_CPU_SLEEP_0: cpu-sleep-1-0 { + big_cpu_sleep_0: cpu-sleep-1-0 { compatible = "arm,idle-state"; idle-state-name = "big-power-down"; arm,psci-suspend-param = <0x40000003>; @@ -343,7 +343,7 @@ local-timer-stop; }; - BIG_CPU_SLEEP_1: cpu-sleep-1-1 { + big_cpu_sleep_1: cpu-sleep-1-1 { compatible = "arm,idle-state"; idle-state-name = "big-rail-power-down"; arm,psci-suspend-param = <0x40000004>; @@ -355,7 +355,7 @@ }; domain_idle_states: domain-idle-states { - CLUSTER_SLEEP_PC: cluster-sleep-0 { + cluster_sleep_pc: cluster-sleep-0 { compatible = "domain-idle-state"; idle-state-name = "cluster-l3-power-collapse"; arm,psci-suspend-param = <0x41000044>; @@ -364,7 +364,7 @@ min-residency-us = <6118>; }; - CLUSTER_SLEEP_CX_RET: cluster-sleep-1 { + cluster_sleep_cx_ret: cluster-sleep-1 { compatible = "domain-idle-state"; idle-state-name = "cluster-cx-retention"; arm,psci-suspend-param = <0x41001244>; @@ -373,7 +373,7 @@ min-residency-us = <8467>; }; - CLUSTER_AOSS_SLEEP: cluster-sleep-2 { + cluster_aoss_sleep: cluster-sleep-2 { compatible = "domain-idle-state"; idle-state-name = "cluster-power-down"; arm,psci-suspend-param = <0x4100b244>; @@ -583,59 +583,59 @@ compatible = "arm,psci-1.0"; method = "smc"; - CPU_PD0: cpu0 { + cpu_pd0: power-domain-cpu0 { #power-domain-cells = <0>; - power-domains = <&CLUSTER_PD>; - domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>; + power-domains = <&cluster_pd>; + domain-idle-states = <&little_cpu_sleep_0 &little_cpu_sleep_1>; }; - CPU_PD1: cpu1 { + cpu_pd1: power-domain-cpu1 { #power-domain-cells = <0>; - power-domains = <&CLUSTER_PD>; - domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>; + power-domains = <&cluster_pd>; + domain-idle-states = <&little_cpu_sleep_0 &little_cpu_sleep_1>; }; - CPU_PD2: cpu2 { + cpu_pd2: power-domain-cpu2 { #power-domain-cells = <0>; - power-domains = <&CLUSTER_PD>; - domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>; + power-domains = <&cluster_pd>; + domain-idle-states = <&little_cpu_sleep_0 &little_cpu_sleep_1>; }; - CPU_PD3: cpu3 { + cpu_pd3: power-domain-cpu3 { #power-domain-cells = <0>; - power-domains = <&CLUSTER_PD>; - domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>; + power-domains = <&cluster_pd>; + domain-idle-states = <&little_cpu_sleep_0 &little_cpu_sleep_1>; }; - CPU_PD4: cpu4 { + cpu_pd4: power-domain-cpu4 { #power-domain-cells = <0>; - power-domains = <&CLUSTER_PD>; - domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>; + power-domains = <&cluster_pd>; + domain-idle-states = <&little_cpu_sleep_0 &little_cpu_sleep_1>; }; - CPU_PD5: cpu5 { + cpu_pd5: power-domain-cpu5 { #power-domain-cells = <0>; - power-domains = <&CLUSTER_PD>; - domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>; + power-domains = <&cluster_pd>; + domain-idle-states = <&little_cpu_sleep_0 &little_cpu_sleep_1>; }; - CPU_PD6: cpu6 { + cpu_pd6: power-domain-cpu6 { #power-domain-cells = <0>; - power-domains = <&CLUSTER_PD>; - domain-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>; + power-domains = <&cluster_pd>; + domain-idle-states = <&big_cpu_sleep_0 &big_cpu_sleep_1>; }; - CPU_PD7: cpu7 { + cpu_pd7: power-domain-cpu7 { #power-domain-cells = <0>; - power-domains = <&CLUSTER_PD>; - domain-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>; + power-domains = <&cluster_pd>; + domain-idle-states = <&big_cpu_sleep_0 &big_cpu_sleep_1>; }; - CLUSTER_PD: cpu-cluster0 { + cluster_pd: power-domain-cluster { #power-domain-cells = <0>; - domain-idle-states = <&CLUSTER_SLEEP_PC - &CLUSTER_SLEEP_CX_RET - &CLUSTER_AOSS_SLEEP>; + domain-idle-states = <&cluster_sleep_pc + &cluster_sleep_cx_ret + &cluster_aoss_sleep>; }; }; @@ -2473,7 +2473,7 @@ compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0 0x07040000 0 0x1000>; - cpu = <&CPU0>; + cpu = <&cpu0>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; @@ -2493,7 +2493,7 @@ compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0 0x07140000 0 0x1000>; - cpu = <&CPU1>; + cpu = <&cpu1>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; @@ -2513,7 +2513,7 @@ compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0 0x07240000 0 0x1000>; - cpu = <&CPU2>; + cpu = <&cpu2>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; @@ -2533,7 +2533,7 @@ compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0 0x07340000 0 0x1000>; - cpu = <&CPU3>; + cpu = <&cpu3>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; @@ -2553,7 +2553,7 @@ compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0 0x07440000 0 0x1000>; - cpu = <&CPU4>; + cpu = <&cpu4>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; @@ -2573,7 +2573,7 @@ compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0 0x07540000 0 0x1000>; - cpu = <&CPU5>; + cpu = <&cpu5>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; @@ -2593,7 +2593,7 @@ compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0 0x07640000 0 0x1000>; - cpu = <&CPU6>; + cpu = <&cpu6>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; @@ -2613,7 +2613,7 @@ compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0 0x07740000 0 0x1000>; - cpu = <&CPU7>; + cpu = <&cpu7>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; @@ -2989,6 +2989,7 @@ iommus = <&apps_smmu 0x540 0>; snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; + snps,parkmode-disable-ss-quirk; phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; maximum-speed = "super-speed"; @@ -3656,7 +3657,7 @@ , , ; - power-domains = <&CLUSTER_PD>; + power-domains = <&cluster_pd>; rpmhcc: clock-controller { compatible = "qcom,sc7180-rpmh-clk"; @@ -3958,7 +3959,6 @@ thermal-zones { cpu0_thermal: cpu0-thermal { polling-delay-passive = <250>; - polling-delay = <0>; thermal-sensors = <&tsens0 1>; sustainable-power = <1052>; @@ -3986,28 +3986,27 @@ cooling-maps { map0 { trip = <&cpu0_alert0>; - cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; map1 { trip = <&cpu0_alert1>; - cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; }; }; cpu1_thermal: cpu1-thermal { polling-delay-passive = <250>; - polling-delay = <0>; thermal-sensors = <&tsens0 2>; sustainable-power = <1052>; @@ -4035,28 +4034,27 @@ cooling-maps { map0 { trip = <&cpu1_alert0>; - cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; map1 { trip = <&cpu1_alert1>; - cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; }; }; cpu2_thermal: cpu2-thermal { polling-delay-passive = <250>; - polling-delay = <0>; thermal-sensors = <&tsens0 3>; sustainable-power = <1052>; @@ -4084,28 +4082,27 @@ cooling-maps { map0 { trip = <&cpu2_alert0>; - cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; map1 { trip = <&cpu2_alert1>; - cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; }; }; cpu3_thermal: cpu3-thermal { polling-delay-passive = <250>; - polling-delay = <0>; thermal-sensors = <&tsens0 4>; sustainable-power = <1052>; @@ -4133,28 +4130,27 @@ cooling-maps { map0 { trip = <&cpu3_alert0>; - cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; map1 { trip = <&cpu3_alert1>; - cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; }; }; cpu4_thermal: cpu4-thermal { polling-delay-passive = <250>; - polling-delay = <0>; thermal-sensors = <&tsens0 5>; sustainable-power = <1052>; @@ -4182,28 +4178,27 @@ cooling-maps { map0 { trip = <&cpu4_alert0>; - cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; map1 { trip = <&cpu4_alert1>; - cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; }; }; cpu5_thermal: cpu5-thermal { polling-delay-passive = <250>; - polling-delay = <0>; thermal-sensors = <&tsens0 6>; sustainable-power = <1052>; @@ -4231,28 +4226,27 @@ cooling-maps { map0 { trip = <&cpu5_alert0>; - cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; map1 { trip = <&cpu5_alert1>; - cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; }; }; cpu6_thermal: cpu6-thermal { polling-delay-passive = <250>; - polling-delay = <0>; thermal-sensors = <&tsens0 9>; sustainable-power = <1425>; @@ -4280,20 +4274,19 @@ cooling-maps { map0 { trip = <&cpu6_alert0>; - cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; map1 { trip = <&cpu6_alert1>; - cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; }; }; cpu7_thermal: cpu7-thermal { polling-delay-passive = <250>; - polling-delay = <0>; thermal-sensors = <&tsens0 10>; sustainable-power = <1425>; @@ -4321,20 +4314,19 @@ cooling-maps { map0 { trip = <&cpu7_alert0>; - cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; map1 { trip = <&cpu7_alert1>; - cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; }; }; cpu8_thermal: cpu8-thermal { polling-delay-passive = <250>; - polling-delay = <0>; thermal-sensors = <&tsens0 11>; sustainable-power = <1425>; @@ -4362,20 +4354,19 @@ cooling-maps { map0 { trip = <&cpu8_alert0>; - cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; map1 { trip = <&cpu8_alert1>; - cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; }; }; cpu9_thermal: cpu9-thermal { polling-delay-passive = <250>; - polling-delay = <0>; thermal-sensors = <&tsens0 12>; sustainable-power = <1425>; @@ -4403,20 +4394,19 @@ cooling-maps { map0 { trip = <&cpu9_alert0>; - cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; map1 { trip = <&cpu9_alert1>; - cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; }; }; aoss0-thermal { polling-delay-passive = <250>; - polling-delay = <0>; thermal-sensors = <&tsens0 0>; @@ -4437,7 +4427,6 @@ cpuss0-thermal { polling-delay-passive = <250>; - polling-delay = <0>; thermal-sensors = <&tsens0 7>; @@ -4457,7 +4446,6 @@ cpuss1-thermal { polling-delay-passive = <250>; - polling-delay = <0>; thermal-sensors = <&tsens0 8>; @@ -4477,7 +4465,6 @@ gpuss0-thermal { polling-delay-passive = <250>; - polling-delay = <0>; thermal-sensors = <&tsens0 13>; @@ -4505,7 +4492,6 @@ gpuss1-thermal { polling-delay-passive = <250>; - polling-delay = <0>; thermal-sensors = <&tsens0 14>; @@ -4533,7 +4519,6 @@ aoss1-thermal { polling-delay-passive = <250>; - polling-delay = <0>; thermal-sensors = <&tsens1 0>; @@ -4554,7 +4539,6 @@ cwlan-thermal { polling-delay-passive = <250>; - polling-delay = <0>; thermal-sensors = <&tsens1 1>; @@ -4575,7 +4559,6 @@ audio-thermal { polling-delay-passive = <250>; - polling-delay = <0>; thermal-sensors = <&tsens1 2>; @@ -4596,7 +4579,6 @@ ddr-thermal { polling-delay-passive = <250>; - polling-delay = <0>; thermal-sensors = <&tsens1 3>; @@ -4617,7 +4599,6 @@ q6-hvx-thermal { polling-delay-passive = <250>; - polling-delay = <0>; thermal-sensors = <&tsens1 4>; @@ -4638,7 +4619,6 @@ camera-thermal { polling-delay-passive = <250>; - polling-delay = <0>; thermal-sensors = <&tsens1 5>; @@ -4659,7 +4639,6 @@ mdm-core-thermal { polling-delay-passive = <250>; - polling-delay = <0>; thermal-sensors = <&tsens1 6>; @@ -4680,7 +4659,6 @@ mdm-dsp-thermal { polling-delay-passive = <250>; - polling-delay = <0>; thermal-sensors = <&tsens1 7>; @@ -4701,7 +4679,6 @@ npu-thermal { polling-delay-passive = <250>; - polling-delay = <0>; thermal-sensors = <&tsens1 8>; @@ -4722,7 +4699,6 @@ video-thermal { polling-delay-passive = <250>; - polling-delay = <0>; thermal-sensors = <&tsens1 9>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi @@ -495,7 +495,6 @@ }; &uart5 { - compatible = "qcom,geni-debug-uart"; status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi @@ -427,7 +427,6 @@ }; uart_dbg: &uart5 { - compatible = "qcom,geni-debug-uart"; status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -82,7 +82,7 @@ sleep_clk: sleep-clk { compatible = "fixed-clock"; - clock-frequency = <32000>; + clock-frequency = <32764>; #clock-cells = <0>; }; }; @@ -1410,12 +1410,12 @@ }; uart5: serial@994000 { - compatible = "qcom,geni-uart"; + compatible = "qcom,geni-debug-uart"; reg = <0 0x00994000 0 0x4000>; clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; clock-names = "se"; pinctrl-names = "default"; - pinctrl-0 = <&qup_uart5_cts>, <&qup_uart5_rts>, <&qup_uart5_tx>, <&qup_uart5_rx>; + pinctrl-0 = <&qup_uart5_tx>, <&qup_uart5_rx>; interrupts = ; power-domains = <&rpmhpd SC7280_CX>; operating-points-v2 = <&qup_opp_table>; @@ -2178,8 +2178,16 @@ ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>, <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>; - interrupts = ; - interrupt-names = "msi"; + interrupts = , + , + , + , + , + , + , + ; + interrupt-names = "msi0", "msi1", "msi2", "msi3", + "msi4", "msi5", "msi6", "msi7"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH>, @@ -2345,6 +2353,8 @@ <&apps_smmu 0x4e6 0x0011>; qcom,ee = <0>; qcom,controlled-remotely; + num-channels = <16>; + qcom,num-ees = <4>; }; crypto: crypto@1dfa000 { @@ -3640,7 +3650,7 @@ compatible = "qcom,sc7280-adsp-pas"; reg = <0 0x03700000 0 0x100>; - interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, + interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>, <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, @@ -3877,7 +3887,7 @@ compatible = "qcom,sc7280-cdsp-pas"; reg = <0 0x0a300000 0 0x10000>; - interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>, + interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>, <&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, <&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, @@ -4062,6 +4072,7 @@ iommus = <&apps_smmu 0xe0 0x0>; snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; + snps,parkmode-disable-ss-quirk; phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; maximum-speed = "super-speed"; @@ -5298,16 +5309,6 @@ function = "qup04"; }; - qup_uart5_cts: qup-uart5-cts-state { - pins = "gpio20"; - function = "qup05"; - }; - - qup_uart5_rts: qup-uart5-rts-state { - pins = "gpio21"; - function = "qup05"; - }; - qup_uart5_tx: qup-uart5-tx-state { pins = "gpio22"; function = "qup05"; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sc8180x.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sc8180x.dtsi @@ -290,7 +290,7 @@ BIG_CPU_SLEEP_0: cpu-sleep-1-0 { compatible = "arm,idle-state"; arm,psci-suspend-param = <0x40000004>; - entry-latency-us = <241>; + entry-latency-us = <2411>; exit-latency-us = <1461>; min-residency-us = <4488>; local-timer-stop; @@ -298,7 +298,15 @@ }; domain-idle-states { - CLUSTER_SLEEP_0: cluster-sleep-0 { + CLUSTER_SLEEP_APSS_OFF: cluster-sleep-0 { + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x41000044>; + entry-latency-us = <3300>; + exit-latency-us = <3300>; + min-residency-us = <6000>; + }; + + CLUSTER_SLEEP_AOSS_SLEEP: cluster-sleep-1 { compatible = "domain-idle-state"; arm,psci-suspend-param = <0x4100a344>; entry-latency-us = <3263>; @@ -582,7 +590,7 @@ CLUSTER_PD: power-domain-cpu-cluster0 { #power-domain-cells = <0>; - domain-idle-states = <&CLUSTER_SLEEP_0>; + domain-idle-states = <&CLUSTER_SLEEP_APSS_OFF &CLUSTER_SLEEP_AOSS_SLEEP>; }; }; @@ -782,6 +790,7 @@ clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk"; + power-domains = <&rpmhpd SC8180X_CX>; }; qupv3_id_0: geniqup@8c0000 { @@ -1843,7 +1852,7 @@ power-domains = <&gcc PCIE_3_GDSC>; interconnects = <&aggre2_noc MASTER_PCIE_3 0 &mc_virt SLAVE_EBI_CH0 0>, - <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_PCIE_0 0>; + <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_PCIE_3 0>; interconnect-names = "pcie-mem", "cpu-pcie"; phys = <&pcie3_phy>; @@ -1941,7 +1950,7 @@ power-domains = <&gcc PCIE_1_GDSC>; interconnects = <&aggre2_noc MASTER_PCIE_1 0 &mc_virt SLAVE_EBI_CH0 0>, - <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_PCIE_0 0>; + <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_PCIE_1 0>; interconnect-names = "pcie-mem", "cpu-pcie"; phys = <&pcie1_phy>; @@ -2039,7 +2048,7 @@ power-domains = <&gcc PCIE_2_GDSC>; interconnects = <&aggre2_noc MASTER_PCIE_2 0 &mc_virt SLAVE_EBI_CH0 0>, - <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_PCIE_0 0>; + <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_PCIE_2 0>; interconnect-names = "pcie-mem", "cpu-pcie"; phys = <&pcie2_phy>; @@ -2138,6 +2147,8 @@ resets = <&ufs_mem_hc 0>; reset-names = "ufsphy"; + power-domains = <&gcc UFS_PHY_GDSC>; + #phy-cells = <0>; status = "disabled"; @@ -2539,11 +2550,14 @@ system-cache-controller@9200000 { compatible = "qcom,sc8180x-llcc"; - reg = <0 0x09200000 0 0x50000>, <0 0x09280000 0 0x50000>, - <0 0x09300000 0 0x50000>, <0 0x09380000 0 0x50000>, - <0 0x09600000 0 0x50000>; + reg = <0 0x09200000 0 0x58000>, <0 0x09280000 0 0x58000>, + <0 0x09300000 0 0x58000>, <0 0x09380000 0 0x58000>, + <0 0x09400000 0 0x58000>, <0 0x09480000 0 0x58000>, + <0 0x09500000 0 0x58000>, <0 0x09580000 0 0x58000>, + <0 0x09600000 0 0x58000>; reg-names = "llcc0_base", "llcc1_base", "llcc2_base", - "llcc3_base", "llcc_broadcast_base"; + "llcc3_base", "llcc4_base", "llcc5_base", + "llcc6_base", "llcc7_base", "llcc_broadcast_base"; interrupts = ; }; @@ -2632,7 +2646,7 @@ resets = <&gcc GCC_USB30_SEC_BCR>; power-domains = <&gcc USB30_SEC_GDSC>; interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, - <&pdc 7 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 40 IRQ_TYPE_LEVEL_HIGH>, <&pdc 10 IRQ_TYPE_EDGE_BOTH>, <&pdc 11 IRQ_TYPE_EDGE_BOTH>; interrupt-names = "hs_phy_irq", "ss_phy_irq", @@ -2692,9 +2706,15 @@ interrupt-controller; #interrupt-cells = <1>; - interconnects = <&mmss_noc MASTER_MDP_PORT0 0 &mc_virt SLAVE_EBI_CH0 0>, - <&mmss_noc MASTER_MDP_PORT1 0 &mc_virt SLAVE_EBI_CH0 0>; - interconnect-names = "mdp0-mem", "mdp1-mem"; + interconnects = <&mmss_noc MASTER_MDP_PORT0 QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>, + <&mmss_noc MASTER_MDP_PORT1 QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>, + <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ALWAYS + &config_noc SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ALWAYS>; + interconnect-names = "mdp0-mem", + "mdp1-mem", + "cpu-cfg"; iommus = <&apps_smmu 0x800 0x420>; @@ -2723,10 +2743,8 @@ "rot", "lut"; - assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>, - <&dispcc DISP_CC_MDSS_VSYNC_CLK>; - assigned-clock-rates = <460000000>, - <19200000>; + assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>; + assigned-clock-rates = <19200000>; operating-points-v2 = <&mdp_opp_table>; power-domains = <&rpmhpd SC8180X_MMCX>; @@ -3184,7 +3202,7 @@ <&dispcc DISP_CC_MDSS_AHB_CLK>; clock-names = "aux", "cfg_ahb"; - power-domains = <&dispcc MDSS_GDSC>; + power-domains = <&rpmhpd SC8180X_MX>; #clock-cells = <1>; #phy-cells = <0>; @@ -3210,6 +3228,7 @@ "edp_phy_pll_link_clk", "edp_phy_pll_vco_div_clk"; power-domains = <&rpmhpd SC8180X_MMCX>; + required-opps = <&rpmhpd_opp_low_svs>; #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; @@ -3248,7 +3267,7 @@ aoss_qmp: power-controller@c300000 { compatible = "qcom,sc8180x-aoss-qmp", "qcom,aoss-qmp"; - reg = <0x0 0x0c300000 0x0 0x100000>; + reg = <0x0 0x0c300000 0x0 0x400>; interrupts = ; mboxes = <&apss_shared 0>; @@ -3613,7 +3632,7 @@ }; cpufreq_hw: cpufreq@18323000 { - compatible = "qcom,cpufreq-hw"; + compatible = "qcom,sc8180x-cpufreq-hw", "qcom,cpufreq-hw"; reg = <0 0x18323000 0 0x1400>, <0 0x18325800 0 0x1400>; reg-names = "freq-domain0", "freq-domain1"; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -299,7 +299,7 @@ thermal-zones { skin-temp-thermal { polling-delay-passive = <250>; - polling-delay = <0>; + thermal-sensors = <&pmk8280_adc_tm 5>; trips { @@ -416,6 +416,13 @@ regulator-always-on; }; + vreg_l1b: ldo1 { + regulator-name = "vreg_l1b"; + regulator-min-microvolt = <912000>; + regulator-max-microvolt = <912000>; + regulator-initial-mode = ; + }; + vreg_l3b: ldo3 { regulator-name = "vreg_l3b"; regulator-min-microvolt = <1200000>; @@ -466,6 +473,13 @@ regulator-initial-mode = ; }; + vreg_l8c: ldo8 { + regulator-name = "vreg_l8c"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + vreg_l12c: ldo12 { regulator-name = "vreg_l12c"; regulator-min-microvolt = <1800000>; @@ -499,6 +513,13 @@ vdd-l6-l9-l10-supply = <&vreg_s12b>; vdd-l8-supply = <&vreg_s12b>; + vreg_l2d: ldo2 { + regulator-name = "vreg_l2d"; + regulator-min-microvolt = <3072000>; + regulator-max-microvolt = <3072000>; + regulator-initial-mode = ; + }; + vreg_l3d: ldo3 { regulator-name = "vreg_l3d"; regulator-min-microvolt = <1200000>; @@ -527,12 +548,26 @@ regulator-initial-mode = ; }; + vreg_l8d: ldo8 { + regulator-name = "vreg_l8d"; + regulator-min-microvolt = <912000>; + regulator-max-microvolt = <912000>; + regulator-initial-mode = ; + }; + vreg_l9d: ldo9 { regulator-name = "vreg_l9d"; regulator-min-microvolt = <912000>; regulator-max-microvolt = <912000>; regulator-initial-mode = ; }; + + vreg_l10d: ldo10 { + regulator-name = "vreg_l10d"; + regulator-min-microvolt = <912000>; + regulator-max-microvolt = <912000>; + regulator-initial-mode = ; + }; }; }; @@ -620,15 +655,16 @@ status = "okay"; - /* FIXME: verify */ touchscreen@10 { - compatible = "hid-over-i2c"; + compatible = "elan,ekth5015m", "elan,ekth6915"; reg = <0x10>; - hid-descr-addr = <0x1>; interrupts-extended = <&tlmm 175 IRQ_TYPE_LEVEL_LOW>; - vdd-supply = <&vreg_misc_3p3>; - vddl-supply = <&vreg_s10b>; + reset-gpios = <&tlmm 99 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + no-reset-on-power-off; + + vcc33-supply = <&vreg_misc_3p3>; + vccio-supply = <&vreg_misc_3p3>; pinctrl-names = "default"; pinctrl-0 = <&ts0_default>; @@ -1203,6 +1239,60 @@ remote-endpoint = <&pmic_glink_con1_hs>; }; +&usb_2 { + status = "okay"; +}; + +&usb_2_dwc3 { + dr_mode = "host"; +}; + +&usb_2_hsphy0 { + vdda-pll-supply = <&vreg_l1b>; + vdda18-supply = <&vreg_l1c>; + vdda33-supply = <&vreg_l7d>; + + status = "okay"; +}; + +&usb_2_hsphy1 { + vdda-pll-supply = <&vreg_l8d>; + vdda18-supply = <&vreg_l1c>; + vdda33-supply = <&vreg_l7d>; + + status = "okay"; +}; + +&usb_2_hsphy2 { + vdda-pll-supply = <&vreg_l10d>; + vdda18-supply = <&vreg_l8c>; + vdda33-supply = <&vreg_l2d>; + + status = "okay"; +}; + +&usb_2_hsphy3 { + vdda-pll-supply = <&vreg_l10d>; + vdda18-supply = <&vreg_l8c>; + vdda33-supply = <&vreg_l2d>; + + status = "okay"; +}; + +&usb_2_qmpphy0 { + vdda-phy-supply = <&vreg_l1b>; + vdda-pll-supply = <&vreg_l4d>; + + status = "okay"; +}; + +&usb_2_qmpphy1 { + vdda-phy-supply = <&vreg_l8d>; + vdda-pll-supply = <&vreg_l4d>; + + status = "okay"; +}; + &vamacro { pinctrl-0 = <&dmic01_default>, <&dmic02_default>; pinctrl-names = "default"; @@ -1452,8 +1542,8 @@ reset-n-pins { pins = "gpio99"; function = "gpio"; - output-high; - drive-strength = <16>; + drive-strength = <2>; + bias-disable; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi @@ -11,7 +11,7 @@ thermal-zones { pm8280_1_thermal: pm8280-1-thermal { polling-delay-passive = <100>; - polling-delay = <0>; + thermal-sensors = <&pm8280_1_temp_alarm>; trips { @@ -31,7 +31,7 @@ pm8280_2_thermal: pm8280-2-thermal { polling-delay-passive = <100>; - polling-delay = <0>; + thermal-sensors = <&pm8280_2_temp_alarm>; trips { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -1774,6 +1774,7 @@ reset-names = "pci"; power-domains = <&gcc PCIE_4_GDSC>; + required-opps = <&rpmhpd_opp_nom>; phys = <&pcie4_phy>; phy-names = "pciephy"; @@ -1798,6 +1799,7 @@ assigned-clock-rates = <100000000>; power-domains = <&gcc PCIE_4_GDSC>; + required-opps = <&rpmhpd_opp_nom>; resets = <&gcc GCC_PCIE_4_PHY_BCR>; reset-names = "phy"; @@ -1872,6 +1874,7 @@ reset-names = "pci"; power-domains = <&gcc PCIE_3B_GDSC>; + required-opps = <&rpmhpd_opp_nom>; phys = <&pcie3b_phy>; phy-names = "pciephy"; @@ -1896,6 +1899,7 @@ assigned-clock-rates = <100000000>; power-domains = <&gcc PCIE_3B_GDSC>; + required-opps = <&rpmhpd_opp_nom>; resets = <&gcc GCC_PCIE_3B_PHY_BCR>; reset-names = "phy"; @@ -1970,6 +1974,7 @@ reset-names = "pci"; power-domains = <&gcc PCIE_3A_GDSC>; + required-opps = <&rpmhpd_opp_nom>; phys = <&pcie3a_phy>; phy-names = "pciephy"; @@ -1995,6 +2000,7 @@ assigned-clock-rates = <100000000>; power-domains = <&gcc PCIE_3A_GDSC>; + required-opps = <&rpmhpd_opp_nom>; resets = <&gcc GCC_PCIE_3A_PHY_BCR>; reset-names = "phy"; @@ -2071,6 +2077,7 @@ reset-names = "pci"; power-domains = <&gcc PCIE_2B_GDSC>; + required-opps = <&rpmhpd_opp_nom>; phys = <&pcie2b_phy>; phy-names = "pciephy"; @@ -2095,6 +2102,7 @@ assigned-clock-rates = <100000000>; power-domains = <&gcc PCIE_2B_GDSC>; + required-opps = <&rpmhpd_opp_nom>; resets = <&gcc GCC_PCIE_2B_PHY_BCR>; reset-names = "phy"; @@ -2169,6 +2177,7 @@ reset-names = "pci"; power-domains = <&gcc PCIE_2A_GDSC>; + required-opps = <&rpmhpd_opp_nom>; phys = <&pcie2a_phy>; phy-names = "pciephy"; @@ -2194,6 +2203,7 @@ assigned-clock-rates = <100000000>; power-domains = <&gcc PCIE_2A_GDSC>; + required-opps = <&rpmhpd_opp_nom>; resets = <&gcc GCC_PCIE_2A_PHY_BCR>; reset-names = "phy"; @@ -2633,9 +2643,9 @@ remoteproc_adsp: remoteproc@3000000 { compatible = "qcom,sc8280xp-adsp-pas"; - reg = <0 0x03000000 0 0x100>; + reg = <0 0x03000000 0 0x10000>; - interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, + interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>, <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, @@ -3331,6 +3341,88 @@ interrupts = ; }; + usb_2: usb@a4f8800 { + compatible = "qcom,sc8280xp-dwc3-mp", "qcom,dwc3"; + reg = <0 0x0a4f8800 0 0x400>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + clocks = <&gcc GCC_CFG_NOC_USB3_MP_AXI_CLK>, + <&gcc GCC_USB30_MP_MASTER_CLK>, + <&gcc GCC_AGGRE_USB3_MP_AXI_CLK>, + <&gcc GCC_USB30_MP_SLEEP_CLK>, + <&gcc GCC_USB30_MP_MOCK_UTMI_CLK>, + <&gcc GCC_AGGRE_USB_NOC_AXI_CLK>, + <&gcc GCC_AGGRE_USB_NOC_NORTH_AXI_CLK>, + <&gcc GCC_AGGRE_USB_NOC_SOUTH_AXI_CLK>, + <&gcc GCC_SYS_NOC_USB_AXI_CLK>; + clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi", + "noc_aggr", "noc_aggr_north", "noc_aggr_south", "noc_sys"; + + assigned-clocks = <&gcc GCC_USB30_MP_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_MP_MASTER_CLK>; + assigned-clock-rates = <19200000>, <200000000>; + + interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 857 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 860 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 859 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 127 IRQ_TYPE_EDGE_BOTH>, + <&pdc 126 IRQ_TYPE_EDGE_BOTH>, + <&pdc 129 IRQ_TYPE_EDGE_BOTH>, + <&pdc 128 IRQ_TYPE_EDGE_BOTH>, + <&pdc 131 IRQ_TYPE_EDGE_BOTH>, + <&pdc 130 IRQ_TYPE_EDGE_BOTH>, + <&pdc 133 IRQ_TYPE_EDGE_BOTH>, + <&pdc 132 IRQ_TYPE_EDGE_BOTH>, + <&pdc 16 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; + + interrupt-names = "pwr_event_1", "pwr_event_2", + "pwr_event_3", "pwr_event_4", + "hs_phy_1", "hs_phy_2", + "hs_phy_3", "hs_phy_4", + "dp_hs_phy_1", "dm_hs_phy_1", + "dp_hs_phy_2", "dm_hs_phy_2", + "dp_hs_phy_3", "dm_hs_phy_3", + "dp_hs_phy_4", "dm_hs_phy_4", + "ss_phy_1", "ss_phy_2"; + + power-domains = <&gcc USB30_MP_GDSC>; + required-opps = <&rpmhpd_opp_nom>; + + resets = <&gcc GCC_USB30_MP_BCR>; + + interconnects = <&aggre1_noc MASTER_USB3_MP 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_MP 0>; + interconnect-names = "usb-ddr", "apps-usb"; + + wakeup-source; + + status = "disabled"; + + usb_2_dwc3: usb@a400000 { + compatible = "snps,dwc3"; + reg = <0 0x0a400000 0 0xcd00>; + interrupts = ; + iommus = <&apps_smmu 0x800 0x0>; + phys = <&usb_2_hsphy0>, <&usb_2_qmpphy0>, + <&usb_2_hsphy1>, <&usb_2_qmpphy1>, + <&usb_2_hsphy2>, + <&usb_2_hsphy3>; + phy-names = "usb2-0", "usb3-0", + "usb2-1", "usb3-1", + "usb2-2", + "usb2-3"; + dr_mode = "host"; + }; + }; + usb_0: usb@a6f8800 { compatible = "qcom,sc8280xp-dwc3", "qcom,dwc3"; reg = <0 0x0a6f8800 0 0x400>; @@ -4405,9 +4497,9 @@ remoteproc_nsp0: remoteproc@1b300000 { compatible = "qcom,sc8280xp-nsp0-pas"; - reg = <0 0x1b300000 0 0x100>; + reg = <0 0x1b300000 0 0x10000>; - interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>, + interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>, <&smp2p_nsp0_in 0 IRQ_TYPE_EDGE_RISING>, <&smp2p_nsp0_in 1 IRQ_TYPE_EDGE_RISING>, <&smp2p_nsp0_in 2 IRQ_TYPE_EDGE_RISING>, @@ -4536,9 +4628,9 @@ remoteproc_nsp1: remoteproc@21300000 { compatible = "qcom,sc8280xp-nsp1-pas"; - reg = <0 0x21300000 0 0x100>; + reg = <0 0x21300000 0 0x10000>; - interrupts-extended = <&intc GIC_SPI 887 IRQ_TYPE_LEVEL_HIGH>, + interrupts-extended = <&intc GIC_SPI 887 IRQ_TYPE_EDGE_RISING>, <&smp2p_nsp1_in 0 IRQ_TYPE_EDGE_RISING>, <&smp2p_nsp1_in 1 IRQ_TYPE_EDGE_RISING>, <&smp2p_nsp1_in 2 IRQ_TYPE_EDGE_RISING>, @@ -5079,7 +5171,6 @@ thermal-zones { cpu0-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens0 1>; @@ -5094,7 +5185,6 @@ cpu1-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens0 2>; @@ -5109,7 +5199,6 @@ cpu2-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens0 3>; @@ -5124,7 +5213,6 @@ cpu3-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens0 4>; @@ -5139,7 +5227,6 @@ cpu4-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens0 5>; @@ -5154,7 +5241,6 @@ cpu5-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens0 6>; @@ -5169,7 +5255,6 @@ cpu6-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens0 7>; @@ -5184,7 +5269,6 @@ cpu7-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens0 8>; @@ -5199,7 +5283,6 @@ cluster0-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens0 9>; @@ -5214,7 +5297,6 @@ mem-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; thermal-sensors = <&tsens1 15>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -1296,6 +1296,7 @@ interrupts = ; snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; + snps,parkmode-disable-ss-quirk; /* * SDM630 technically supports USB3 but I --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso @@ -0,0 +1,70 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2022, Linaro Ltd. + */ + +/dts-v1/; +/plugin/; + +#include +#include + +&camss { + vdda-phy-supply = <&vreg_l1a_0p875>; + vdda-pll-supply = <&vreg_l26a_1p2>; + + status = "okay"; + + ports { + port@0 { + csiphy0_ep: endpoint { + data-lanes = <0 1 2 3>; + remote-endpoint = <&ov8856_ep>; + }; + }; + }; +}; + +&cci { + status = "okay"; +}; + +&cci_i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + camera@10 { + compatible = "ovti,ov8856"; + reg = <0x10>; + + /* CAM0_RST_N */ + reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&cam0_default>; + + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "xvclk"; + clock-frequency = <19200000>; + + /* + * The &vreg_s4a_1p8 trace is powered on as a, + * so it is represented by a fixed regulator. + * + * The 2.8V vdda-supply and 1.2V vddd-supply regulators + * both have to be enabled through the power management + * gpios. + */ + dovdd-supply = <&vreg_lvs1a_1p8>; + avdd-supply = <&cam0_avdd_2v8>; + dvdd-supply = <&cam0_dvdd_1v2>; + + port { + ov8856_ep: endpoint { + link-frequencies = /bits/ 64 + <360000000 180000000>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&csiphy0_ep>; + }; + }; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sdm845-db845c.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sdm845-db845c.dts @@ -580,7 +580,7 @@ &pcie0 { status = "okay"; perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>; - enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>; + wake-gpios = <&tlmm 134 GPIO_ACTIVE_HIGH>; vddpe-3v3-supply = <&pcie0_3p3v_dual>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi @@ -508,13 +508,13 @@ }; &q6afedai { - qi2s@22 { - reg = <22>; + dai@22 { + reg = ; qcom,sd-lines = <1>; }; - qi2s@23 { - reg = <23>; + dai@23 { + reg = ; qcom,sd-lines = <0>; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2644,6 +2644,8 @@ clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; + power-domains = <&gcc UFS_PHY_GDSC>; + resets = <&ufs_mem_hc 0>; reset-names = "ufsphy"; @@ -3366,8 +3368,8 @@ qcom,qmp = <&aoss_qmp>; - power-domains = <&rpmhpd SDM845_CX>, - <&rpmhpd SDM845_MX>; + power-domains = <&rpmhpd SDM845_LCX>, + <&rpmhpd SDM845_LMX>; power-domain-names = "lcx", "lmx"; memory-region = <&slpi_mem>; @@ -4080,6 +4082,7 @@ iommus = <&apps_smmu 0x740 0>; snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; + snps,parkmode-disable-ss-quirk; phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; }; @@ -4131,6 +4134,7 @@ iommus = <&apps_smmu 0x760 0>; snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; + snps,parkmode-disable-ss-quirk; phys = <&usb_2_hsphy>, <&usb_2_qmpphy>; phy-names = "usb2-phy", "usb3-phy"; }; @@ -4242,16 +4246,16 @@ "vfe1", "vfe_lite"; - interrupts = , - , - , - , - , - , - , - , - , - ; + interrupts = , + , + , + , + , + , + , + , + , + ; interrupt-names = "csid0", "csid1", "csid2", --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts @@ -494,6 +494,7 @@ &ipa { qcom,gsi-loader = "self"; memory-region = <&ipa_fw_mem>; + firmware-name = "qcom/sdm850/LENOVO/81JL/ipa_fws.elf"; status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sdx75.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sdx75.dtsi @@ -31,7 +31,7 @@ sleep_clk: sleep-clk { compatible = "fixed-clock"; - clock-frequency = <32000>; + clock-frequency = <32764>; #clock-cells = <0>; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sm4450.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sm4450.dtsi @@ -26,7 +26,7 @@ sleep_clk: sleep-clk { compatible = "fixed-clock"; - clock-frequency = <32000>; + clock-frequency = <32764>; #clock-cells = <0>; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -614,6 +614,11 @@ #hwlock-cells = <1>; }; + tcsr_regs: syscon@3c0000 { + compatible = "qcom,sm6115-tcsr", "syscon"; + reg = <0x0 0x003c0000 0x0 0x40000>; + }; + tlmm: pinctrl@500000 { compatible = "qcom,sm6115-tlmm"; reg = <0x0 0x00500000 0x0 0x400000>, @@ -879,6 +884,8 @@ #phy-cells = <0>; + qcom,tcsr-reg = <&tcsr_regs 0xb244>; + status = "disabled"; }; @@ -1061,6 +1068,7 @@ power-domains = <&rpmpd SM6115_VDDCX>; operating-points-v2 = <&sdhc1_opp_table>; + iommus = <&apps_smmu 0x00c0 0x0>; interconnects = <&system_noc MASTER_SDCC_1 RPM_ALWAYS_TAG &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>, <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG @@ -1197,6 +1205,8 @@ clocks = <&gcc GCC_UFS_CLKREF_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; clock-names = "ref", "ref_aux"; + power-domains = <&gcc GCC_UFS_PHY_GDSC>; + resets = <&ufs_mem_hc 0>; reset-names = "ufsphy"; @@ -1603,7 +1613,6 @@ interconnect-names = "usb-ddr", "apps-usb"; - qcom,select-utmi-as-pipe-clk; status = "disabled"; usb_dwc3: usb@4e00000 { @@ -1961,7 +1970,7 @@ remoteproc_mpss: remoteproc@6080000 { compatible = "qcom,sm6115-mpss-pas"; - reg = <0x0 0x06080000 0x0 0x100>; + reg = <0x0 0x06080000 0x0 0x10000>; interrupts-extended = <&intc GIC_SPI 307 IRQ_TYPE_EDGE_RISING>, <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, @@ -2604,9 +2613,9 @@ }; }; - remoteproc_adsp: remoteproc@ab00000 { + remoteproc_adsp: remoteproc@a400000 { compatible = "qcom,sm6115-adsp-pas"; - reg = <0x0 0x0ab00000 0x0 0x100>; + reg = <0x0 0x0a400000 0x0 0x4040>; interrupts-extended = <&intc GIC_SPI 282 IRQ_TYPE_EDGE_RISING>, <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, @@ -2678,7 +2687,7 @@ remoteproc_cdsp: remoteproc@b300000 { compatible = "qcom,sm6115-cdsp-pas"; - reg = <0x0 0x0b300000 0x0 0x100000>; + reg = <0x0 0x0b300000 0x0 0x4040>; interrupts-extended = <&intc GIC_SPI 265 IRQ_TYPE_EDGE_RISING>, <&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sm6125.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sm6125.dtsi @@ -28,7 +28,7 @@ sleep_clk: sleep-clk { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <32000>; + clock-frequency = <32764>; clock-output-names = "sleep_clk"; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -935,7 +935,7 @@ power-domains = <&rpmhpd SM6350_CX>; operating-points-v2 = <&qup_opp_table>; interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>, - <&aggre1_noc MASTER_QUP_0 0 &clk_virt SLAVE_EBI_CH0 0>; + <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_0 0>; interconnect-names = "qup-core", "qup-config"; status = "disabled"; }; @@ -1194,6 +1194,8 @@ clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; + power-domains = <&gcc UFS_PHY_GDSC>; + resets = <&ufs_mem_hc 0>; reset-names = "ufsphy"; @@ -1247,9 +1249,9 @@ adsp: remoteproc@3000000 { compatible = "qcom,sm6350-adsp-pas"; - reg = <0 0x03000000 0 0x100>; + reg = <0x0 0x03000000 0x0 0x10000>; - interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, + interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>, <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, @@ -1287,6 +1289,7 @@ compatible = "qcom,fastrpc"; qcom,glink-channels = "fastrpcglink-apps-dsp"; label = "adsp"; + qcom,non-secure-domain; #address-cells = <1>; #size-cells = <0>; @@ -1338,43 +1341,43 @@ opp-850000000 { opp-hz = /bits/ 64 <850000000>; opp-level = ; - opp-supported-hw = <0x02>; + opp-supported-hw = <0x03>; }; opp-800000000 { opp-hz = /bits/ 64 <800000000>; opp-level = ; - opp-supported-hw = <0x04>; + opp-supported-hw = <0x07>; }; opp-650000000 { opp-hz = /bits/ 64 <650000000>; opp-level = ; - opp-supported-hw = <0x08>; + opp-supported-hw = <0x0f>; }; opp-565000000 { opp-hz = /bits/ 64 <565000000>; opp-level = ; - opp-supported-hw = <0x10>; + opp-supported-hw = <0x1f>; }; opp-430000000 { opp-hz = /bits/ 64 <430000000>; opp-level = ; - opp-supported-hw = <0xff>; + opp-supported-hw = <0x1f>; }; opp-355000000 { opp-hz = /bits/ 64 <355000000>; opp-level = ; - opp-supported-hw = <0xff>; + opp-supported-hw = <0x1f>; }; opp-253000000 { opp-hz = /bits/ 64 <253000000>; opp-level = ; - opp-supported-hw = <0xff>; + opp-supported-hw = <0x1f>; }; }; }; @@ -1467,7 +1470,7 @@ mpss: remoteproc@4080000 { compatible = "qcom,sm6350-mpss-pas"; - reg = <0x0 0x04080000 0x0 0x4040>; + reg = <0x0 0x04080000 0x0 0x10000>; interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_EDGE_RISING>, <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, @@ -1509,7 +1512,7 @@ compatible = "qcom,sm6350-cdsp-pas"; reg = <0 0x08300000 0 0x10000>; - interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>, + interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>, <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>, <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>, <&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>, @@ -1547,6 +1550,7 @@ compatible = "qcom,fastrpc"; qcom,glink-channels = "fastrpcglink-apps-dsp"; label = "cdsp"; + qcom,non-secure-domain; #address-cells = <1>; #size-cells = <0>; @@ -1854,6 +1858,7 @@ snps,dis_enblslpm_quirk; snps,has-lpm-erratum; snps,hird-threshold = /bits/ 8 <0x10>; + snps,parkmode-disable-ss-quirk; phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sm6375.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sm6375.dtsi @@ -29,7 +29,7 @@ sleep_clk: sleep-clk { compatible = "fixed-clock"; - clock-frequency = <32000>; + clock-frequency = <32764>; #clock-cells = <0>; }; }; @@ -1514,9 +1514,9 @@ #power-domain-cells = <1>; }; - remoteproc_mss: remoteproc@6000000 { + remoteproc_mss: remoteproc@6080000 { compatible = "qcom,sm6375-mpss-pas"; - reg = <0 0x06000000 0 0x4040>; + reg = <0x0 0x06080000 0x0 0x10000>; interrupts-extended = <&intc GIC_SPI 307 IRQ_TYPE_EDGE_RISING>, <&smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING>, @@ -1557,9 +1557,9 @@ remoteproc_adsp: remoteproc@a400000 { compatible = "qcom,sm6375-adsp-pas"; - reg = <0 0x0a400000 0 0x100>; + reg = <0 0x0a400000 0 0x10000>; - interrupts-extended = <&intc GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, + interrupts-extended = <&intc GIC_SPI 282 IRQ_TYPE_EDGE_RISING>, <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, @@ -1593,9 +1593,9 @@ }; }; - remoteproc_cdsp: remoteproc@b000000 { + remoteproc_cdsp: remoteproc@b300000 { compatible = "qcom,sm6375-cdsp-pas"; - reg = <0x0 0x0b000000 0x0 0x100000>; + reg = <0x0 0x0b300000 0x0 0x10000>; interrupts-extended = <&intc GIC_SPI 265 IRQ_TYPE_EDGE_RISING>, <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>, --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sm7125.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sm7125.dtsi @@ -6,11 +6,11 @@ #include "sc7180.dtsi" /* SM7125 uses Kryo 465 instead of Kryo 468 */ -&CPU0 { compatible = "qcom,kryo465"; }; -&CPU1 { compatible = "qcom,kryo465"; }; -&CPU2 { compatible = "qcom,kryo465"; }; -&CPU3 { compatible = "qcom,kryo465"; }; -&CPU4 { compatible = "qcom,kryo465"; }; -&CPU5 { compatible = "qcom,kryo465"; }; -&CPU6 { compatible = "qcom,kryo465"; }; -&CPU7 { compatible = "qcom,kryo465"; }; +&cpu0 { compatible = "qcom,kryo465"; }; +&cpu1 { compatible = "qcom,kryo465"; }; +&cpu2 { compatible = "qcom,kryo465"; }; +&cpu3 { compatible = "qcom,kryo465"; }; +&cpu4 { compatible = "qcom,kryo465"; }; +&cpu5 { compatible = "qcom,kryo465"; }; +&cpu6 { compatible = "qcom,kryo465"; }; +&cpu7 { compatible = "qcom,kryo465"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts @@ -31,7 +31,7 @@ chassis-type = "handset"; /* required for bootloader to select correct board */ - qcom,msm-id = <434 0x10000>, <459 0x10000>; + qcom,msm-id = <459 0x10000>; qcom,board-id = <8 32>; aliases { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sm8150-microsoft-surface-duo.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sm8150-microsoft-surface-duo.dts @@ -376,8 +376,8 @@ pinctrl-0 = <&da7280_intr_default>; dlg,actuator-type = "LRA"; - dlg,dlg,const-op-mode = <1>; - dlg,dlg,periodic-op-mode = <1>; + dlg,const-op-mode = <1>; + dlg,periodic-op-mode = <1>; dlg,nom-microvolt = <2000000>; dlg,abs-max-microvolt = <2000000>; dlg,imax-microamp = <129000>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -1879,7 +1879,7 @@ phy-names = "pciephy"; perst-gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>; - enable-gpio = <&tlmm 37 GPIO_ACTIVE_HIGH>; + wake-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pcie0_default_state>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -86,7 +86,7 @@ sleep_clk: sleep-clk { compatible = "fixed-clock"; - clock-frequency = <32768>; + clock-frequency = <32764>; #clock-cells = <0>; }; }; @@ -2514,6 +2514,8 @@ resets = <&ufs_mem_hc 0>; reset-names = "ufsphy"; + power-domains = <&gcc UFS_PHY_GDSC>; + #phy-cells = <0>; status = "disabled"; @@ -3025,7 +3027,7 @@ compatible = "qcom,sm8250-slpi-pas"; reg = <0 0x05c00000 0 0x4000>; - interrupts-extended = <&pdc 9 IRQ_TYPE_LEVEL_HIGH>, + interrupts-extended = <&pdc 9 IRQ_TYPE_EDGE_RISING>, <&smp2p_slpi_in 0 IRQ_TYPE_EDGE_RISING>, <&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>, <&smp2p_slpi_in 2 IRQ_TYPE_EDGE_RISING>, @@ -3729,7 +3731,7 @@ compatible = "qcom,sm8250-cdsp-pas"; reg = <0 0x08300000 0 0x10000>; - interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>, + interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>, <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>, <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>, <&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>, @@ -4409,20 +4411,20 @@ "vfe_lite0", "vfe_lite1"; - interrupts = , - , - , - , - , - , - , - , - , - , - , - , - , - ; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + ; interrupt-names = "csiphy0", "csiphy1", "csiphy2", @@ -5887,7 +5889,7 @@ compatible = "qcom,sm8250-adsp-pas"; reg = <0 0x17300000 0 0x100>; - interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, + interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>, <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -41,7 +41,7 @@ sleep_clk: sleep-clk { compatible = "fixed-clock"; - clock-frequency = <32000>; + clock-frequency = <32764>; #clock-cells = <0>; }; }; @@ -1731,6 +1731,8 @@ clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; + power-domains = <&gcc UFS_PHY_GDSC>; + resets = <&ufs_mem_hc 0>; reset-names = "ufsphy"; @@ -1816,6 +1818,142 @@ reg = <0x0 0x1fc0000 0x0 0x30000>; }; + adsp: remoteproc@3000000 { + compatible = "qcom,sm8350-adsp-pas"; + reg = <0x0 0x03000000 0x0 0x10000>; + + interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack"; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + power-domains = <&rpmhpd RPMHPD_LCX>, + <&rpmhpd RPMHPD_LMX>; + power-domain-names = "lcx", "lmx"; + + memory-region = <&pil_adsp_mem>; + + qcom,qmp = <&aoss_qmp>; + + qcom,smem-states = <&smp2p_adsp_out 0>; + qcom,smem-state-names = "stop"; + + status = "disabled"; + + glink-edge { + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP>; + + label = "lpass"; + qcom,remote-pid = <2>; + + apr { + compatible = "qcom,apr-v2"; + qcom,glink-channels = "apr_audio_svc"; + qcom,domain = ; + #address-cells = <1>; + #size-cells = <0>; + + service@3 { + reg = ; + compatible = "qcom,q6core"; + qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; + }; + + q6afe: service@4 { + compatible = "qcom,q6afe"; + reg = ; + qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; + + q6afedai: dais { + compatible = "qcom,q6afe-dais"; + #address-cells = <1>; + #size-cells = <0>; + #sound-dai-cells = <1>; + }; + + q6afecc: clock-controller { + compatible = "qcom,q6afe-clocks"; + #clock-cells = <2>; + }; + }; + + q6asm: service@7 { + compatible = "qcom,q6asm"; + reg = ; + qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; + + q6asmdai: dais { + compatible = "qcom,q6asm-dais"; + #address-cells = <1>; + #size-cells = <0>; + #sound-dai-cells = <1>; + iommus = <&apps_smmu 0x1801 0x0>; + + dai@0 { + reg = <0>; + }; + + dai@1 { + reg = <1>; + }; + + dai@2 { + reg = <2>; + }; + }; + }; + + q6adm: service@8 { + compatible = "qcom,q6adm"; + reg = ; + qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; + + q6routing: routing { + compatible = "qcom,q6adm-routing"; + #sound-dai-cells = <0>; + }; + }; + }; + + fastrpc { + compatible = "qcom,fastrpc"; + qcom,glink-channels = "fastrpcglink-apps-dsp"; + label = "adsp"; + qcom,non-secure-domain; + #address-cells = <1>; + #size-cells = <0>; + + compute-cb@3 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <3>; + iommus = <&apps_smmu 0x1803 0x0>; + }; + + compute-cb@4 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <4>; + iommus = <&apps_smmu 0x1804 0x0>; + }; + + compute-cb@5 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <5>; + iommus = <&apps_smmu 0x1805 0x0>; + }; + }; + }; + }; + lpass_tlmm: pinctrl@33c0000 { compatible = "qcom,sm8350-lpass-lpi-pinctrl"; reg = <0 0x033c0000 0 0x20000>, @@ -2017,7 +2155,7 @@ mpss: remoteproc@4080000 { compatible = "qcom,sm8350-mpss-pas"; - reg = <0x0 0x04080000 0x0 0x4040>; + reg = <0x0 0x04080000 0x0 0x10000>; interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>, <&smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING>, @@ -2289,6 +2427,115 @@ qcom,bcm-voters = <&apps_bcm_voter>; }; + cdsp: remoteproc@a300000 { + compatible = "qcom,sm8350-cdsp-pas"; + reg = <0x0 0x0a300000 0x0 0x10000>; + + interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>, + <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>, + <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>, + <&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>, + <&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack"; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + power-domains = <&rpmhpd RPMHPD_CX>, + <&rpmhpd RPMHPD_MXC>; + power-domain-names = "cx", "mxc"; + + interconnects = <&compute_noc MASTER_CDSP_PROC 0 &mc_virt SLAVE_EBI1 0>; + + memory-region = <&pil_cdsp_mem>; + + qcom,qmp = <&aoss_qmp>; + + qcom,smem-states = <&smp2p_cdsp_out 0>; + qcom,smem-state-names = "stop"; + + status = "disabled"; + + glink-edge { + interrupts-extended = <&ipcc IPCC_CLIENT_CDSP + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_CDSP + IPCC_MPROC_SIGNAL_GLINK_QMP>; + + label = "cdsp"; + qcom,remote-pid = <5>; + + fastrpc { + compatible = "qcom,fastrpc"; + qcom,glink-channels = "fastrpcglink-apps-dsp"; + label = "cdsp"; + qcom,non-secure-domain; + #address-cells = <1>; + #size-cells = <0>; + + compute-cb@1 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <1>; + iommus = <&apps_smmu 0x2161 0x0400>, + <&apps_smmu 0x1181 0x0420>; + }; + + compute-cb@2 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <2>; + iommus = <&apps_smmu 0x2162 0x0400>, + <&apps_smmu 0x1182 0x0420>; + }; + + compute-cb@3 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <3>; + iommus = <&apps_smmu 0x2163 0x0400>, + <&apps_smmu 0x1183 0x0420>; + }; + + compute-cb@4 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <4>; + iommus = <&apps_smmu 0x2164 0x0400>, + <&apps_smmu 0x1184 0x0420>; + }; + + compute-cb@5 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <5>; + iommus = <&apps_smmu 0x2165 0x0400>, + <&apps_smmu 0x1185 0x0420>; + }; + + compute-cb@6 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <6>; + iommus = <&apps_smmu 0x2166 0x0400>, + <&apps_smmu 0x1186 0x0420>; + }; + + compute-cb@7 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <7>; + iommus = <&apps_smmu 0x2167 0x0400>, + <&apps_smmu 0x1187 0x0420>; + }; + + compute-cb@8 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <8>; + iommus = <&apps_smmu 0x2168 0x0400>, + <&apps_smmu 0x1188 0x0420>; + }; + + /* note: secure cb9 in downstream */ + }; + }; + }; + usb_1: usb@a6f8800 { compatible = "qcom,sm8350-dwc3", "qcom,dwc3"; reg = <0 0x0a6f8800 0 0x400>; @@ -3194,142 +3441,6 @@ ; }; - adsp: remoteproc@17300000 { - compatible = "qcom,sm8350-adsp-pas"; - reg = <0 0x17300000 0 0x100>; - - interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>, - <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, - <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, - <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, - <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "wdog", "fatal", "ready", - "handover", "stop-ack"; - - clocks = <&rpmhcc RPMH_CXO_CLK>; - clock-names = "xo"; - - power-domains = <&rpmhpd RPMHPD_LCX>, - <&rpmhpd RPMHPD_LMX>; - power-domain-names = "lcx", "lmx"; - - memory-region = <&pil_adsp_mem>; - - qcom,qmp = <&aoss_qmp>; - - qcom,smem-states = <&smp2p_adsp_out 0>; - qcom,smem-state-names = "stop"; - - status = "disabled"; - - glink-edge { - interrupts-extended = <&ipcc IPCC_CLIENT_LPASS - IPCC_MPROC_SIGNAL_GLINK_QMP - IRQ_TYPE_EDGE_RISING>; - mboxes = <&ipcc IPCC_CLIENT_LPASS - IPCC_MPROC_SIGNAL_GLINK_QMP>; - - label = "lpass"; - qcom,remote-pid = <2>; - - apr { - compatible = "qcom,apr-v2"; - qcom,glink-channels = "apr_audio_svc"; - qcom,domain = ; - #address-cells = <1>; - #size-cells = <0>; - - service@3 { - reg = ; - compatible = "qcom,q6core"; - qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; - }; - - q6afe: service@4 { - compatible = "qcom,q6afe"; - reg = ; - qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; - - q6afedai: dais { - compatible = "qcom,q6afe-dais"; - #address-cells = <1>; - #size-cells = <0>; - #sound-dai-cells = <1>; - }; - - q6afecc: clock-controller { - compatible = "qcom,q6afe-clocks"; - #clock-cells = <2>; - }; - }; - - q6asm: service@7 { - compatible = "qcom,q6asm"; - reg = ; - qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; - - q6asmdai: dais { - compatible = "qcom,q6asm-dais"; - #address-cells = <1>; - #size-cells = <0>; - #sound-dai-cells = <1>; - iommus = <&apps_smmu 0x1801 0x0>; - - dai@0 { - reg = <0>; - }; - - dai@1 { - reg = <1>; - }; - - dai@2 { - reg = <2>; - }; - }; - }; - - q6adm: service@8 { - compatible = "qcom,q6adm"; - reg = ; - qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; - - q6routing: routing { - compatible = "qcom,q6adm-routing"; - #sound-dai-cells = <0>; - }; - }; - }; - - fastrpc { - compatible = "qcom,fastrpc"; - qcom,glink-channels = "fastrpcglink-apps-dsp"; - label = "adsp"; - qcom,non-secure-domain; - #address-cells = <1>; - #size-cells = <0>; - - compute-cb@3 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <3>; - iommus = <&apps_smmu 0x1803 0x0>; - }; - - compute-cb@4 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <4>; - iommus = <&apps_smmu 0x1804 0x0>; - }; - - compute-cb@5 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <5>; - iommus = <&apps_smmu 0x1805 0x0>; - }; - }; - }; - }; - intc: interrupt-controller@17a00000 { compatible = "arm,gic-v3"; #interrupt-cells = <3>; @@ -3498,115 +3609,6 @@ #freq-domain-cells = <1>; #clock-cells = <1>; }; - - cdsp: remoteproc@98900000 { - compatible = "qcom,sm8350-cdsp-pas"; - reg = <0 0x98900000 0 0x1400000>; - - interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>, - <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>, - <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>, - <&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>, - <&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "wdog", "fatal", "ready", - "handover", "stop-ack"; - - clocks = <&rpmhcc RPMH_CXO_CLK>; - clock-names = "xo"; - - power-domains = <&rpmhpd RPMHPD_CX>, - <&rpmhpd RPMHPD_MXC>; - power-domain-names = "cx", "mxc"; - - interconnects = <&compute_noc MASTER_CDSP_PROC 0 &mc_virt SLAVE_EBI1 0>; - - memory-region = <&pil_cdsp_mem>; - - qcom,qmp = <&aoss_qmp>; - - qcom,smem-states = <&smp2p_cdsp_out 0>; - qcom,smem-state-names = "stop"; - - status = "disabled"; - - glink-edge { - interrupts-extended = <&ipcc IPCC_CLIENT_CDSP - IPCC_MPROC_SIGNAL_GLINK_QMP - IRQ_TYPE_EDGE_RISING>; - mboxes = <&ipcc IPCC_CLIENT_CDSP - IPCC_MPROC_SIGNAL_GLINK_QMP>; - - label = "cdsp"; - qcom,remote-pid = <5>; - - fastrpc { - compatible = "qcom,fastrpc"; - qcom,glink-channels = "fastrpcglink-apps-dsp"; - label = "cdsp"; - qcom,non-secure-domain; - #address-cells = <1>; - #size-cells = <0>; - - compute-cb@1 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <1>; - iommus = <&apps_smmu 0x2161 0x0400>, - <&apps_smmu 0x1181 0x0420>; - }; - - compute-cb@2 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <2>; - iommus = <&apps_smmu 0x2162 0x0400>, - <&apps_smmu 0x1182 0x0420>; - }; - - compute-cb@3 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <3>; - iommus = <&apps_smmu 0x2163 0x0400>, - <&apps_smmu 0x1183 0x0420>; - }; - - compute-cb@4 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <4>; - iommus = <&apps_smmu 0x2164 0x0400>, - <&apps_smmu 0x1184 0x0420>; - }; - - compute-cb@5 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <5>; - iommus = <&apps_smmu 0x2165 0x0400>, - <&apps_smmu 0x1185 0x0420>; - }; - - compute-cb@6 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <6>; - iommus = <&apps_smmu 0x2166 0x0400>, - <&apps_smmu 0x1186 0x0420>; - }; - - compute-cb@7 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <7>; - iommus = <&apps_smmu 0x2167 0x0400>, - <&apps_smmu 0x1187 0x0420>; - }; - - compute-cb@8 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <8>; - iommus = <&apps_smmu 0x2168 0x0400>, - <&apps_smmu 0x1188 0x0420>; - }; - - /* note: secure cb9 in downstream */ - }; - }; - }; }; thermal_zones: thermal-zones { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sm8450-hdk.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sm8450-hdk.dts @@ -938,8 +938,8 @@ "TX DMIC3", "MIC BIAS1", "TX SWR_INPUT0", "ADC1_OUTPUT", "TX SWR_INPUT1", "ADC2_OUTPUT", - "TX SWR_INPUT2", "ADC3_OUTPUT", - "TX SWR_INPUT3", "ADC4_OUTPUT"; + "TX SWR_INPUT0", "ADC3_OUTPUT", + "TX SWR_INPUT1", "ADC4_OUTPUT"; wcd-playback-dai-link { link-name = "WCD Playback"; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -43,7 +43,7 @@ sleep_clk: sleep-clk { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <32000>; + clock-frequency = <32764>; }; }; @@ -1028,6 +1028,12 @@ pinctrl-names = "default"; pinctrl-0 = <&qup_uart20_default>; interrupts = ; + interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS + &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>, + <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS + &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>; + interconnect-names = "qup-core", + "qup-config"; status = "disabled"; }; @@ -1420,6 +1426,12 @@ pinctrl-names = "default"; pinctrl-0 = <&qup_uart7_tx>, <&qup_uart7_rx>; interrupts = ; + interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS + &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>, + <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS + &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>; + interconnect-names = "qup-core", + "qup-config"; status = "disabled"; }; }; @@ -1765,12 +1777,8 @@ ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>, <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>; - /* - * MSIs for BDF (1:0.0) only works with Device ID 0x5980. - * Hence, the IDs are swapped. - */ - msi-map = <0x0 &gic_its 0x5981 0x1>, - <0x100 &gic_its 0x5980 0x1>; + msi-map = <0x0 &gic_its 0x5980 0x1>, + <0x100 &gic_its 0x5981 0x1>; msi-map-mask = <0xff00>; interrupts = ; interrupt-names = "msi"; @@ -1874,12 +1882,8 @@ ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>, <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>; - /* - * MSIs for BDF (1:0.0) only works with Device ID 0x5a00. - * Hence, the IDs are swapped. - */ - msi-map = <0x0 &gic_its 0x5a01 0x1>, - <0x100 &gic_its 0x5a00 0x1>; + msi-map = <0x0 &gic_its 0x5a00 0x1>, + <0x100 &gic_its 0x5a01 0x1>; msi-map-mask = <0xff00>; interrupts = ; interrupt-names = "msi"; @@ -2322,6 +2326,7 @@ compatible = "qcom,fastrpc"; qcom,glink-channels = "fastrpcglink-apps-dsp"; label = "sdsp"; + qcom,non-secure-domain; #address-cells = <1>; #size-cells = <0>; @@ -2347,6 +2352,112 @@ }; }; + remoteproc_adsp: remoteproc@3000000 { + compatible = "qcom,sm8450-adsp-pas"; + reg = <0x0 0x03000000 0x0 0x10000>; + + interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack"; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + power-domains = <&rpmhpd RPMHPD_LCX>, + <&rpmhpd RPMHPD_LMX>; + power-domain-names = "lcx", "lmx"; + + memory-region = <&adsp_mem>; + + qcom,qmp = <&aoss_qmp>; + + qcom,smem-states = <&smp2p_adsp_out 0>; + qcom,smem-state-names = "stop"; + + status = "disabled"; + + remoteproc_adsp_glink: glink-edge { + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP>; + + label = "lpass"; + qcom,remote-pid = <2>; + + gpr { + compatible = "qcom,gpr"; + qcom,glink-channels = "adsp_apps"; + qcom,domain = ; + qcom,intents = <512 20>; + #address-cells = <1>; + #size-cells = <0>; + + q6apm: service@1 { + compatible = "qcom,q6apm"; + reg = ; + #sound-dai-cells = <0>; + qcom,protection-domain = "avs/audio", + "msm/adsp/audio_pd"; + + q6apmdai: dais { + compatible = "qcom,q6apm-dais"; + iommus = <&apps_smmu 0x1801 0x0>; + }; + + q6apmbedai: bedais { + compatible = "qcom,q6apm-lpass-dais"; + #sound-dai-cells = <1>; + }; + }; + + q6prm: service@2 { + compatible = "qcom,q6prm"; + reg = ; + qcom,protection-domain = "avs/audio", + "msm/adsp/audio_pd"; + + q6prmcc: clock-controller { + compatible = "qcom,q6prm-lpass-clocks"; + #clock-cells = <2>; + }; + }; + }; + + fastrpc { + compatible = "qcom,fastrpc"; + qcom,glink-channels = "fastrpcglink-apps-dsp"; + label = "adsp"; + qcom,non-secure-domain; + #address-cells = <1>; + #size-cells = <0>; + + compute-cb@3 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <3>; + iommus = <&apps_smmu 0x1803 0x0>; + }; + + compute-cb@4 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <4>; + iommus = <&apps_smmu 0x1804 0x0>; + }; + + compute-cb@5 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <5>; + iommus = <&apps_smmu 0x1805 0x0>; + }; + }; + }; + }; + wsa2macro: codec@31e0000 { compatible = "qcom,sm8450-lpass-wsa-macro"; reg = <0 0x031e0000 0 0x1000>; @@ -2543,114 +2654,9 @@ status = "disabled"; }; - remoteproc_adsp: remoteproc@30000000 { - compatible = "qcom,sm8450-adsp-pas"; - reg = <0 0x30000000 0 0x100>; - - interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>, - <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, - <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, - <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, - <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "wdog", "fatal", "ready", - "handover", "stop-ack"; - - clocks = <&rpmhcc RPMH_CXO_CLK>; - clock-names = "xo"; - - power-domains = <&rpmhpd RPMHPD_LCX>, - <&rpmhpd RPMHPD_LMX>; - power-domain-names = "lcx", "lmx"; - - memory-region = <&adsp_mem>; - - qcom,qmp = <&aoss_qmp>; - - qcom,smem-states = <&smp2p_adsp_out 0>; - qcom,smem-state-names = "stop"; - - status = "disabled"; - - remoteproc_adsp_glink: glink-edge { - interrupts-extended = <&ipcc IPCC_CLIENT_LPASS - IPCC_MPROC_SIGNAL_GLINK_QMP - IRQ_TYPE_EDGE_RISING>; - mboxes = <&ipcc IPCC_CLIENT_LPASS - IPCC_MPROC_SIGNAL_GLINK_QMP>; - - label = "lpass"; - qcom,remote-pid = <2>; - - gpr { - compatible = "qcom,gpr"; - qcom,glink-channels = "adsp_apps"; - qcom,domain = ; - qcom,intents = <512 20>; - #address-cells = <1>; - #size-cells = <0>; - - q6apm: service@1 { - compatible = "qcom,q6apm"; - reg = ; - #sound-dai-cells = <0>; - qcom,protection-domain = "avs/audio", - "msm/adsp/audio_pd"; - - q6apmdai: dais { - compatible = "qcom,q6apm-dais"; - iommus = <&apps_smmu 0x1801 0x0>; - }; - - q6apmbedai: bedais { - compatible = "qcom,q6apm-lpass-dais"; - #sound-dai-cells = <1>; - }; - }; - - q6prm: service@2 { - compatible = "qcom,q6prm"; - reg = ; - qcom,protection-domain = "avs/audio", - "msm/adsp/audio_pd"; - - q6prmcc: clock-controller { - compatible = "qcom,q6prm-lpass-clocks"; - #clock-cells = <2>; - }; - }; - }; - - fastrpc { - compatible = "qcom,fastrpc"; - qcom,glink-channels = "fastrpcglink-apps-dsp"; - label = "adsp"; - #address-cells = <1>; - #size-cells = <0>; - - compute-cb@3 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <3>; - iommus = <&apps_smmu 0x1803 0x0>; - }; - - compute-cb@4 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <4>; - iommus = <&apps_smmu 0x1804 0x0>; - }; - - compute-cb@5 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <5>; - iommus = <&apps_smmu 0x1805 0x0>; - }; - }; - }; - }; - remoteproc_cdsp: remoteproc@32300000 { compatible = "qcom,sm8450-cdsp-pas"; - reg = <0 0x32300000 0 0x1400000>; + reg = <0 0x32300000 0 0x10000>; interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>, <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>, @@ -2690,6 +2696,7 @@ compatible = "qcom,fastrpc"; qcom,glink-channels = "fastrpcglink-apps-dsp"; label = "cdsp"; + qcom,non-secure-domain; #address-cells = <1>; #size-cells = <0>; @@ -2756,7 +2763,7 @@ remoteproc_mpss: remoteproc@4080000 { compatible = "qcom,sm8450-mpss-pas"; - reg = <0x0 0x04080000 0x0 0x4040>; + reg = <0x0 0x04080000 0x0 0x10000>; interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>, <&smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING>, @@ -4373,6 +4380,8 @@ <&gcc GCC_UFS_PHY_PHY_AUX_CLK>, <&gcc GCC_UFS_0_CLKREF_EN>; + power-domains = <&gcc UFS_PHY_GDSC>; + resets = <&ufs_mem_hc 0>; reset-names = "ufsphy"; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sm8550-mtp.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sm8550-mtp.dts @@ -823,7 +823,7 @@ }; &sleep_clk { - clock-frequency = <32000>; + clock-frequency = <32764>; }; &swr0 { @@ -874,7 +874,7 @@ wcd_tx: codec@0,3 { compatible = "sdw20217010d00"; reg = <0 3>; - qcom,tx-port-mapping = <1 1 2 3>; + qcom,tx-port-mapping = <2 2 3 4>; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sm8550-qrd.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sm8550-qrd.dts @@ -927,7 +927,7 @@ }; &sleep_clk { - clock-frequency = <32000>; + clock-frequency = <32764>; }; &swr0 { @@ -978,7 +978,7 @@ wcd_tx: codec@0,3 { compatible = "sdw20217010d00"; reg = <0 3>; - qcom,tx-port-mapping = <1 1 2 3>; + qcom,tx-port-mapping = <2 2 3 4>; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -2213,7 +2213,7 @@ remoteproc_mpss: remoteproc@4080000 { compatible = "qcom,sm8550-mpss-pas"; - reg = <0x0 0x04080000 0x0 0x4040>; + reg = <0x0 0x04080000 0x0 0x10000>; interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>, <&smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING>, @@ -2253,6 +2253,137 @@ }; }; + remoteproc_adsp: remoteproc@6800000 { + compatible = "qcom,sm8550-adsp-pas"; + reg = <0x0 0x06800000 0x0 0x10000>; + + interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack"; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + power-domains = <&rpmhpd RPMHPD_LCX>, + <&rpmhpd RPMHPD_LMX>; + power-domain-names = "lcx", "lmx"; + + interconnects = <&lpass_lpicx_noc MASTER_LPASS_PROC 0 &mc_virt SLAVE_EBI1 0>; + + memory-region = <&adspslpi_mem>, <&q6_adsp_dtb_mem>; + + qcom,qmp = <&aoss_qmp>; + + qcom,smem-states = <&smp2p_adsp_out 0>; + qcom,smem-state-names = "stop"; + + status = "disabled"; + + remoteproc_adsp_glink: glink-edge { + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP>; + + label = "lpass"; + qcom,remote-pid = <2>; + + fastrpc { + compatible = "qcom,fastrpc"; + qcom,glink-channels = "fastrpcglink-apps-dsp"; + label = "adsp"; + qcom,non-secure-domain; + #address-cells = <1>; + #size-cells = <0>; + + compute-cb@3 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <3>; + iommus = <&apps_smmu 0x1003 0x80>, + <&apps_smmu 0x1063 0x0>; + dma-coherent; + }; + + compute-cb@4 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <4>; + iommus = <&apps_smmu 0x1004 0x80>, + <&apps_smmu 0x1064 0x0>; + dma-coherent; + }; + + compute-cb@5 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <5>; + iommus = <&apps_smmu 0x1005 0x80>, + <&apps_smmu 0x1065 0x0>; + dma-coherent; + }; + + compute-cb@6 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <6>; + iommus = <&apps_smmu 0x1006 0x80>, + <&apps_smmu 0x1066 0x0>; + dma-coherent; + }; + + compute-cb@7 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <7>; + iommus = <&apps_smmu 0x1007 0x80>, + <&apps_smmu 0x1067 0x0>; + dma-coherent; + }; + }; + + gpr { + compatible = "qcom,gpr"; + qcom,glink-channels = "adsp_apps"; + qcom,domain = ; + qcom,intents = <512 20>; + #address-cells = <1>; + #size-cells = <0>; + + q6apm: service@1 { + compatible = "qcom,q6apm"; + reg = ; + #sound-dai-cells = <0>; + qcom,protection-domain = "avs/audio", + "msm/adsp/audio_pd"; + + q6apmdai: dais { + compatible = "qcom,q6apm-dais"; + iommus = <&apps_smmu 0x1001 0x80>, + <&apps_smmu 0x1061 0x0>; + }; + + q6apmbedai: bedais { + compatible = "qcom,q6apm-lpass-dais"; + #sound-dai-cells = <1>; + }; + }; + + q6prm: service@2 { + compatible = "qcom,q6prm"; + reg = ; + qcom,protection-domain = "avs/audio", + "msm/adsp/audio_pd"; + + q6prmcc: clock-controller { + compatible = "qcom,q6prm-lpass-clocks"; + #clock-cells = <2>; + }; + }; + }; + }; + }; + lpass_wsa2macro: codec@6aa0000 { compatible = "qcom,sm8550-lpass-wsa-macro"; reg = <0 0x06aa0000 0 0x1000>; @@ -2679,9 +2810,8 @@ power-domains = <&dispcc MDSS_GDSC>; - interconnects = <&mmss_noc MASTER_MDP 0 &gem_noc SLAVE_LLCC 0>, - <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>; - interconnect-names = "mdp0-mem", "mdp1-mem"; + interconnects = <&mmss_noc MASTER_MDP 0 &mc_virt SLAVE_EBI1 0>; + interconnect-names = "mdp0-mem"; iommus = <&apps_smmu 0x1c00 0x2>; @@ -3248,7 +3378,7 @@ spmi_bus: spmi@c400000 { compatible = "qcom,spmi-pmic-arb"; reg = <0 0x0c400000 0 0x3000>, - <0 0x0c500000 0 0x4000000>, + <0 0x0c500000 0 0x400000>, <0 0x0c440000 0 0x80000>, <0 0x0c4c0000 0 0x20000>, <0 0x0c42d000 0 0x4000>; @@ -4202,131 +4332,6 @@ interrupts = ; }; - remoteproc_adsp: remoteproc@30000000 { - compatible = "qcom,sm8550-adsp-pas"; - reg = <0x0 0x30000000 0x0 0x100>; - - interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>, - <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, - <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, - <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, - <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "wdog", "fatal", "ready", - "handover", "stop-ack"; - - clocks = <&rpmhcc RPMH_CXO_CLK>; - clock-names = "xo"; - - power-domains = <&rpmhpd RPMHPD_LCX>, - <&rpmhpd RPMHPD_LMX>; - power-domain-names = "lcx", "lmx"; - - interconnects = <&lpass_lpicx_noc MASTER_LPASS_PROC 0 &mc_virt SLAVE_EBI1 0>; - - memory-region = <&adspslpi_mem>, <&q6_adsp_dtb_mem>; - - qcom,qmp = <&aoss_qmp>; - - qcom,smem-states = <&smp2p_adsp_out 0>; - qcom,smem-state-names = "stop"; - - status = "disabled"; - - remoteproc_adsp_glink: glink-edge { - interrupts-extended = <&ipcc IPCC_CLIENT_LPASS - IPCC_MPROC_SIGNAL_GLINK_QMP - IRQ_TYPE_EDGE_RISING>; - mboxes = <&ipcc IPCC_CLIENT_LPASS - IPCC_MPROC_SIGNAL_GLINK_QMP>; - - label = "lpass"; - qcom,remote-pid = <2>; - - fastrpc { - compatible = "qcom,fastrpc"; - qcom,glink-channels = "fastrpcglink-apps-dsp"; - label = "adsp"; - #address-cells = <1>; - #size-cells = <0>; - - compute-cb@3 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <3>; - iommus = <&apps_smmu 0x1003 0x80>, - <&apps_smmu 0x1063 0x0>; - }; - - compute-cb@4 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <4>; - iommus = <&apps_smmu 0x1004 0x80>, - <&apps_smmu 0x1064 0x0>; - }; - - compute-cb@5 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <5>; - iommus = <&apps_smmu 0x1005 0x80>, - <&apps_smmu 0x1065 0x0>; - }; - - compute-cb@6 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <6>; - iommus = <&apps_smmu 0x1006 0x80>, - <&apps_smmu 0x1066 0x0>; - }; - - compute-cb@7 { - compatible = "qcom,fastrpc-compute-cb"; - reg = <7>; - iommus = <&apps_smmu 0x1007 0x80>, - <&apps_smmu 0x1067 0x0>; - }; - }; - - gpr { - compatible = "qcom,gpr"; - qcom,glink-channels = "adsp_apps"; - qcom,domain = ; - qcom,intents = <512 20>; - #address-cells = <1>; - #size-cells = <0>; - - q6apm: service@1 { - compatible = "qcom,q6apm"; - reg = ; - #sound-dai-cells = <0>; - qcom,protection-domain = "avs/audio", - "msm/adsp/audio_pd"; - - q6apmdai: dais { - compatible = "qcom,q6apm-dais"; - iommus = <&apps_smmu 0x1001 0x80>, - <&apps_smmu 0x1061 0x0>; - }; - - q6apmbedai: bedais { - compatible = "qcom,q6apm-lpass-dais"; - #sound-dai-cells = <1>; - }; - }; - - q6prm: service@2 { - compatible = "qcom,q6prm"; - reg = ; - qcom,protection-domain = "avs/audio", - "msm/adsp/audio_pd"; - - q6prmcc: clock-controller { - compatible = "qcom,q6prm-lpass-clocks"; - #clock-cells = <2>; - }; - }; - }; - }; - }; - nsp_noc: interconnect@320c0000 { compatible = "qcom,sm8550-nsp-noc"; reg = <0 0x320c0000 0 0xe080>; @@ -4336,7 +4341,7 @@ remoteproc_cdsp: remoteproc@32300000 { compatible = "qcom,sm8550-cdsp-pas"; - reg = <0x0 0x32300000 0x0 0x1400000>; + reg = <0x0 0x32300000 0x0 0x10000>; interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>, <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>, @@ -4379,6 +4384,7 @@ compatible = "qcom,fastrpc"; qcom,glink-channels = "fastrpcglink-apps-dsp"; label = "cdsp"; + qcom,non-secure-domain; #address-cells = <1>; #size-cells = <0>; @@ -4388,6 +4394,7 @@ iommus = <&apps_smmu 0x1961 0x0>, <&apps_smmu 0x0c01 0x20>, <&apps_smmu 0x19c1 0x10>; + dma-coherent; }; compute-cb@2 { @@ -4396,6 +4403,7 @@ iommus = <&apps_smmu 0x1962 0x0>, <&apps_smmu 0x0c02 0x20>, <&apps_smmu 0x19c2 0x10>; + dma-coherent; }; compute-cb@3 { @@ -4404,6 +4412,7 @@ iommus = <&apps_smmu 0x1963 0x0>, <&apps_smmu 0x0c03 0x20>, <&apps_smmu 0x19c3 0x10>; + dma-coherent; }; compute-cb@4 { @@ -4412,6 +4421,7 @@ iommus = <&apps_smmu 0x1964 0x0>, <&apps_smmu 0x0c04 0x20>, <&apps_smmu 0x19c4 0x10>; + dma-coherent; }; compute-cb@5 { @@ -4420,6 +4430,7 @@ iommus = <&apps_smmu 0x1965 0x0>, <&apps_smmu 0x0c05 0x20>, <&apps_smmu 0x19c5 0x10>; + dma-coherent; }; compute-cb@6 { @@ -4428,6 +4439,7 @@ iommus = <&apps_smmu 0x1966 0x0>, <&apps_smmu 0x0c06 0x20>, <&apps_smmu 0x19c6 0x10>; + dma-coherent; }; compute-cb@7 { @@ -4436,6 +4448,7 @@ iommus = <&apps_smmu 0x1967 0x0>, <&apps_smmu 0x0c07 0x20>, <&apps_smmu 0x19c7 0x10>; + dma-coherent; }; compute-cb@8 { @@ -4444,6 +4457,7 @@ iommus = <&apps_smmu 0x1968 0x0>, <&apps_smmu 0x0c08 0x20>, <&apps_smmu 0x19c8 0x10>; + dma-coherent; }; /* note: secure cb9 in downstream */ --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sm8650-mtp.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sm8650-mtp.dts @@ -587,7 +587,7 @@ }; &sleep_clk { - clock-frequency = <32000>; + clock-frequency = <32764>; }; &swr0 { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sm8650-qrd.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sm8650-qrd.dts @@ -630,7 +630,7 @@ }; &sleep_clk { - clock-frequency = <32000>; + clock-frequency = <32764>; }; &spi4 { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -2448,10 +2448,12 @@ compatible = "qcom,sm8650-qmp-ufs-phy"; reg = <0 0x01d80000 0 0x2000>; - clocks = <&tcsr TCSR_UFS_CLKREF_EN>, - <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_UFS_PHY_PHY_AUX_CLK>, + <&tcsr TCSR_UFS_CLKREF_EN>; clock-names = "ref", - "ref_aux"; + "ref_aux", + "qref"; resets = <&ufs_mem_hc 0>; reset-names = "ufsphy"; @@ -2600,7 +2602,7 @@ remoteproc_mpss: remoteproc@4080000 { compatible = "qcom,sm8650-mpss-pas"; - reg = <0 0x04080000 0 0x4040>; + reg = <0x0 0x04080000 0x0 0x10000>; interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>, <&smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING>, @@ -3078,11 +3080,8 @@ resets = <&dispcc DISP_CC_MDSS_CORE_BCR>; interconnects = <&mmss_noc MASTER_MDP QCOM_ICC_TAG_ALWAYS - &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS>, - <&mc_virt MASTER_LLCC QCOM_ICC_TAG_ALWAYS &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; - interconnect-names = "mdp0-mem", - "mdp1-mem"; + interconnect-names = "mdp0-mem"; power-domains = <&dispcc MDSS_GDSC>; @@ -3703,7 +3702,7 @@ spmi_bus: spmi@c400000 { compatible = "qcom,spmi-pmic-arb"; reg = <0 0x0c400000 0 0x3000>, - <0 0x0c500000 0 0x4000000>, + <0 0x0c500000 0 0x400000>, <0 0x0c440000 0 0x80000>, <0 0x0c4c0000 0 0x20000>, <0 0x0c42d000 0 0x4000>; @@ -4897,7 +4896,7 @@ remoteproc_cdsp: remoteproc@32300000 { compatible = "qcom,sm8650-cdsp-pas"; - reg = <0 0x32300000 0 0x1400000>; + reg = <0x0 0x32300000 0x0 0x10000>; interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>, <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>, --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/x1e80100-crd.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/x1e80100-crd.dts @@ -22,6 +22,15 @@ stdout-path = "serial0:115200n8"; }; + reserved-memory { + linux,cma { + compatible = "shared-dma-pool"; + size = <0x0 0x8000000>; + reusable; + linux,cma-default; + }; + }; + vph_pwr: vph-pwr-regulator { compatible = "regulator-fixed"; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts @@ -21,6 +21,15 @@ stdout-path = "serial0:115200n8"; }; + reserved-memory { + linux,cma { + compatible = "shared-dma-pool"; + size = <0x0 0x8000000>; + reusable; + linux,cma-default; + }; + }; + vph_pwr: vph-pwr-regulator { compatible = "regulator-fixed"; @@ -243,7 +252,7 @@ qcom,pmic-id = "e"; vdd-l2-supply = <&vreg_s1f_0p7>; - vdd-l3-supply = <&vph_pwr>; + vdd-l3-supply = <&vreg_s5j_1p2>; vreg_l2e_0p8: ldo2 { regulator-name = "vreg_l2e_0p8"; @@ -349,7 +358,7 @@ qcom,pmic-id = "j"; vdd-l1-supply = <&vreg_s1f_0p7>; - vdd-l2-supply = <&vph_pwr>; + vdd-l2-supply = <&vreg_s5j_1p2>; vdd-l3-supply = <&vreg_s1f_0p7>; vdd-s5-supply = <&vph_pwr>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/qcom/x1e80100.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/qcom/x1e80100.dtsi @@ -30,7 +30,7 @@ sleep_clk: sleep-clk { compatible = "fixed-clock"; - clock-frequency = <32000>; + clock-frequency = <32764>; #clock-cells = <0>; }; @@ -271,14 +271,14 @@ idle-state-name = "ret"; arm,psci-suspend-param = <0x00000004>; entry-latency-us = <180>; - exit-latency-us = <320>; - min-residency-us = <1000>; + exit-latency-us = <500>; + min-residency-us = <600>; }; }; domain-idle-states { CLUSTER_CL4: cluster-sleep-0 { - compatible = "arm,idle-state"; + compatible = "domain-idle-state"; idle-state-name = "l2-ret"; arm,psci-suspend-param = <0x01000044>; entry-latency-us = <350>; @@ -287,11 +287,11 @@ }; CLUSTER_CL5: cluster-sleep-1 { - compatible = "arm,idle-state"; + compatible = "domain-idle-state"; idle-state-name = "ret-pll-off"; arm,psci-suspend-param = <0x01000054>; entry-latency-us = <2200>; - exit-latency-us = <2500>; + exit-latency-us = <4000>; min-residency-us = <7000>; }; }; @@ -3284,7 +3284,7 @@ intc: interrupt-controller@17000000 { compatible = "arm,gic-v3"; reg = <0 0x17000000 0 0x10000>, /* GICD */ - <0 0x17080000 0 0x480000>; /* GICR * 12 */ + <0 0x17080000 0 0x300000>; /* GICR * 12 */ interrupts = ; @@ -3315,7 +3315,6 @@ <0 0x17510000 0 0x10000>, <0 0x17520000 0 0x10000>; reg-names = "drv-0", "drv-1", "drv-2"; - qcom,drv-count = <3>; interrupts = , , --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/renesas/hihope-rev2.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/renesas/hihope-rev2.dtsi @@ -69,9 +69,6 @@ status = "okay"; - /* Single DAI */ - #sound-dai-cells = <0>; - rsnd_port: port { rsnd_endpoint: endpoint { remote-endpoint = <&dw_hdmi0_snd_in>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/renesas/hihope-rev4.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/renesas/hihope-rev4.dtsi @@ -84,9 +84,6 @@ pinctrl-names = "default"; status = "okay"; - /* Single DAI */ - #sound-dai-cells = <0>; - /* audio_clkout0/1/2/3 */ #clock-cells = <1>; clock-frequency = <12288000 11289600>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/renesas/r8a779a0.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/renesas/r8a779a0.dtsi @@ -658,7 +658,7 @@ avb0: ethernet@e6800000 { compatible = "renesas,etheravb-r8a779a0", "renesas,etheravb-rcar-gen4"; - reg = <0 0xe6800000 0 0x800>; + reg = <0 0xe6800000 0 0x1000>; interrupts = , , , @@ -706,7 +706,7 @@ avb1: ethernet@e6810000 { compatible = "renesas,etheravb-r8a779a0", "renesas,etheravb-rcar-gen4"; - reg = <0 0xe6810000 0 0x800>; + reg = <0 0xe6810000 0 0x1000>; interrupts = , , , @@ -2910,6 +2910,9 @@ interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, - <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", + "hyp-virt"; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/renesas/r8a779f0.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/renesas/r8a779f0.dtsi @@ -1315,7 +1315,10 @@ interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, - <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", + "hyp-virt"; }; ufs30_clk: ufs30-clk { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/renesas/r8a779g0.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/renesas/r8a779g0.dtsi @@ -161,11 +161,6 @@ }; }; - psci { - compatible = "arm,psci-1.0", "arm,psci-0.2"; - method = "smc"; - }; - extal_clk: extal { compatible = "fixed-clock"; #clock-cells = <0>; @@ -185,13 +180,24 @@ interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; }; - /* External SCIF clock - to be overridden by boards that provide it */ + psci { + compatible = "arm,psci-1.0", "arm,psci-0.2"; + method = "smc"; + }; + + /* External SCIF clocks - to be overridden by boards that provide them */ scif_clk: scif { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <0>; }; + scif_clk2: scif2 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + soc: soc { compatible = "simple-bus"; interrupt-parent = <&gic>; @@ -681,7 +687,7 @@ interrupts = ; clocks = <&cpg CPG_MOD 516>, <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, - <&scif_clk>; + <&scif_clk2>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x35>, <&dmac0 0x34>, <&dmac1 0x35>, <&dmac1 0x34>; @@ -761,7 +767,7 @@ avb0: ethernet@e6800000 { compatible = "renesas,etheravb-r8a779g0", "renesas,etheravb-rcar-gen4"; - reg = <0 0xe6800000 0 0x800>; + reg = <0 0xe6800000 0 0x1000>; interrupts = , , , @@ -808,7 +814,7 @@ avb1: ethernet@e6810000 { compatible = "renesas,etheravb-r8a779g0", "renesas,etheravb-rcar-gen4"; - reg = <0 0xe6810000 0 0x800>; + reg = <0 0xe6810000 0 0x1000>; interrupts = , , , @@ -1057,7 +1063,7 @@ interrupts = ; clocks = <&cpg CPG_MOD 705>, <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, - <&scif_clk>; + <&scif_clk2>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x59>, <&dmac0 0x58>, <&dmac1 0x59>, <&dmac1 0x58>; @@ -1777,6 +1783,37 @@ }; }; + mmc0: mmc@ee140000 { + compatible = "renesas,sdhi-r8a779g0", + "renesas,rcar-gen4-sdhi"; + reg = <0 0xee140000 0 0x2000>; + interrupts = ; + clocks = <&cpg CPG_MOD 706>, + <&cpg CPG_CORE R8A779G0_CLK_SD0H>; + clock-names = "core", "clkh"; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + resets = <&cpg 706>; + max-frequency = <200000000>; + iommus = <&ipmmu_ds0 32>; + status = "disabled"; + }; + + rpc: spi@ee200000 { + compatible = "renesas,r8a779g0-rpc-if", + "renesas,rcar-gen4-rpc-if"; + reg = <0 0xee200000 0 0x200>, + <0 0x08000000 0 0x04000000>, + <0 0xee208000 0 0x100>; + reg-names = "regs", "dirmap", "wbuf"; + interrupts = ; + clocks = <&cpg CPG_MOD 629>; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + resets = <&cpg 629>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + ipmmu_rt0: iommu@ee480000 { compatible = "renesas,ipmmu-r8a779g0", "renesas,rcar-gen4-ipmmu-vmsa"; @@ -1886,37 +1923,6 @@ #iommu-cells = <1>; }; - mmc0: mmc@ee140000 { - compatible = "renesas,sdhi-r8a779g0", - "renesas,rcar-gen4-sdhi"; - reg = <0 0xee140000 0 0x2000>; - interrupts = ; - clocks = <&cpg CPG_MOD 706>, - <&cpg CPG_CORE R8A779G0_CLK_SD0H>; - clock-names = "core", "clkh"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 706>; - max-frequency = <200000000>; - iommus = <&ipmmu_ds0 32>; - status = "disabled"; - }; - - rpc: spi@ee200000 { - compatible = "renesas,r8a779g0-rpc-if", - "renesas,rcar-gen4-rpc-if"; - reg = <0 0xee200000 0 0x200>, - <0 0x08000000 0 0x04000000>, - <0 0xee208000 0 0x100>; - reg-names = "regs", "dirmap", "wbuf"; - interrupts = ; - clocks = <&cpg CPG_MOD 629>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 629>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - gic: interrupt-controller@f1000000 { compatible = "arm,gic-v3"; #interrupt-cells = <3>; @@ -2344,6 +2350,9 @@ interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, - <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", + "hyp-virt"; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi @@ -50,7 +50,10 @@ interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, - <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", + "hyp-virt"; }; }; @@ -109,7 +112,13 @@ , , , - ; + , + , + , + , + , + , + ; interrupt-names = "nmi", "irq0", "irq1", "irq2", "irq3", "irq4", "irq5", "irq6", "irq7", @@ -121,7 +130,9 @@ "tint20", "tint21", "tint22", "tint23", "tint24", "tint25", "tint26", "tint27", "tint28", "tint29", "tint30", "tint31", - "bus-err"; + "bus-err", "ec7tie1-0", "ec7tie2-0", + "ec7tiovf-0", "ec7tie1-1", "ec7tie2-1", + "ec7tiovf-1"; clocks = <&cpg CPG_MOD R9A07G043_IA55_CLK>, <&cpg CPG_MOD R9A07G043_IA55_PCLK>; clock-names = "clk", "pclk"; @@ -134,8 +145,8 @@ #interrupt-cells = <3>; #address-cells = <0>; interrupt-controller; - reg = <0x0 0x11900000 0 0x40000>, - <0x0 0x11940000 0 0x60000>; + reg = <0x0 0x11900000 0 0x20000>, + <0x0 0x11940000 0 0x40000>; interrupts = ; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/renesas/r9a07g044.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/renesas/r9a07g044.dtsi @@ -905,7 +905,27 @@ , , , - ; + , + , + , + , + , + , + , + ; + interrupt-names = "nmi", "irq0", "irq1", "irq2", "irq3", + "irq4", "irq5", "irq6", "irq7", + "tint0", "tint1", "tint2", "tint3", + "tint4", "tint5", "tint6", "tint7", + "tint8", "tint9", "tint10", "tint11", + "tint12", "tint13", "tint14", "tint15", + "tint16", "tint17", "tint18", "tint19", + "tint20", "tint21", "tint22", "tint23", + "tint24", "tint25", "tint26", "tint27", + "tint28", "tint29", "tint30", "tint31", + "bus-err", "ec7tie1-0", "ec7tie2-0", + "ec7tiovf-0", "ec7tie1-1", "ec7tie2-1", + "ec7tiovf-1"; clocks = <&cpg CPG_MOD R9A07G044_IA55_CLK>, <&cpg CPG_MOD R9A07G044_IA55_PCLK>; clock-names = "clk", "pclk"; @@ -977,8 +997,8 @@ #interrupt-cells = <3>; #address-cells = <0>; interrupt-controller; - reg = <0x0 0x11900000 0 0x40000>, - <0x0 0x11940000 0 0x60000>; + reg = <0x0 0x11900000 0 0x20000>, + <0x0 0x11940000 0 0x40000>; interrupts = ; }; @@ -1268,6 +1288,9 @@ interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, - <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", + "hyp-virt"; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/renesas/r9a07g054.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/renesas/r9a07g054.dtsi @@ -912,7 +912,27 @@ , , , - ; + , + , + , + , + , + , + , + ; + interrupt-names = "nmi", "irq0", "irq1", "irq2", "irq3", + "irq4", "irq5", "irq6", "irq7", + "tint0", "tint1", "tint2", "tint3", + "tint4", "tint5", "tint6", "tint7", + "tint8", "tint9", "tint10", "tint11", + "tint12", "tint13", "tint14", "tint15", + "tint16", "tint17", "tint18", "tint19", + "tint20", "tint21", "tint22", "tint23", + "tint24", "tint25", "tint26", "tint27", + "tint28", "tint29", "tint30", "tint31", + "bus-err", "ec7tie1-0", "ec7tie2-0", + "ec7tiovf-0", "ec7tie1-1", "ec7tie2-1", + "ec7tiovf-1"; clocks = <&cpg CPG_MOD R9A07G054_IA55_CLK>, <&cpg CPG_MOD R9A07G054_IA55_PCLK>; clock-names = "clk", "pclk"; @@ -984,8 +1004,8 @@ #interrupt-cells = <3>; #address-cells = <0>; interrupt-controller; - reg = <0x0 0x11900000 0 0x40000>, - <0x0 0x11940000 0 0x60000>; + reg = <0x0 0x11900000 0 0x20000>, + <0x0 0x11940000 0 0x40000>; interrupts = ; }; @@ -1275,6 +1295,9 @@ interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, - <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", + "hyp-virt"; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/renesas/r9a08g045.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/renesas/r9a08g045.dtsi @@ -152,7 +152,10 @@ , , , - ; + , + , + , + ; interrupt-names = "nmi", "irq0", "irq1", "irq2", "irq3", "irq4", "irq5", "irq6", "irq7", @@ -164,7 +167,8 @@ "tint20", "tint21", "tint22", "tint23", "tint24", "tint25", "tint26", "tint27", "tint28", "tint29", "tint30", "tint31", - "bus-err"; + "bus-err", "ec7tie1-0", "ec7tie2-0", + "ec7tiovf-0"; clocks = <&cpg CPG_MOD R9A08G045_IA55_CLK>, <&cpg CPG_MOD R9A08G045_IA55_PCLK>; clock-names = "clk", "pclk"; @@ -260,8 +264,8 @@ #interrupt-cells = <3>; #address-cells = <0>; interrupt-controller; - reg = <0x0 0x12400000 0 0x40000>, - <0x0 0x12440000 0 0x60000>; + reg = <0x0 0x12400000 0 0x20000>, + <0x0 0x12440000 0 0x40000>; interrupts = ; }; }; @@ -271,6 +275,9 @@ interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, - <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", + "hyp-virt"; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi @@ -41,11 +41,6 @@ #endif }; - chosen { - bootargs = "ignore_loglevel"; - stdout-path = "serial0:115200n8"; - }; - memory@48000000 { device_type = "memory"; /* First 128MB is reserved for secure area. */ @@ -193,12 +188,14 @@ #endif &pinctrl { +#if SW_CONFIG3 == SW_ON eth0-phy-irq-hog { gpio-hog; gpios = ; input; line-name = "eth0-phy-irq"; }; +#endif eth0_pins: eth0 { txc { @@ -234,12 +231,14 @@ }; }; +#if SW_CONFIG3 == SW_ON eth1-phy-irq-hog { gpio-hog; gpios = ; input; line-name = "eth1-phy-irq"; }; +#endif eth1_pins: eth1 { txc { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi @@ -10,10 +10,15 @@ / { aliases { - serial0 = &scif0; + serial3 = &scif0; mmc1 = &sdhi1; }; + chosen { + bootargs = "ignore_loglevel"; + stdout-path = "serial3:115200n8"; + }; + vcc_sdhi1: regulator-vcc-sdhi1 { compatible = "regulator-fixed"; regulator-name = "SDHI1 Vcc"; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/Makefile +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/Makefile @@ -18,6 +18,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c-plus.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s-plus.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus-lts.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts @@ -226,7 +226,6 @@ }; &uart5 { - pinctrl-0 = <&uart5_xfer>; status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi @@ -66,7 +66,6 @@ bus-width = <8>; cap-mmc-highspeed; mmc-hs200-1_8v; - supports-emmc; mmc-pwrseq = <&emmc_pwrseq>; non-removable; vmmc-supply = <&vcc_3v3>; @@ -368,6 +367,12 @@ status = "okay"; }; +&uart5 { + /delete-property/ dmas; + /delete-property/ dma-names; + pinctrl-0 = <&uart5_xfer>; +}; + /* Mule UCAN */ &usb_host0_ehci { status = "okay"; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3308-roc-cc.dts @@ -36,14 +36,14 @@ power_led: led-0 { label = "firefly:red:power"; - linux,default-trigger = "ir-power-click"; + linux,default-trigger = "default-on"; default-state = "on"; gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; }; user_led: led-1 { label = "firefly:blue:user"; - linux,default-trigger = "ir-user-click"; + linux,default-trigger = "rc-feedback"; default-state = "off"; gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts @@ -5,6 +5,8 @@ */ /dts-v1/; + +#include #include "rk3308.dtsi" / { @@ -15,6 +17,7 @@ ethernet0 = &gmac; mmc0 = &emmc; mmc1 = &sdmmc; + mmc2 = &sdio; }; chosen { @@ -24,17 +27,21 @@ leds { compatible = "gpio-leds"; pinctrl-names = "default"; - pinctrl-0 = <&green_led_gio>, <&heartbeat_led_gpio>; + pinctrl-0 = <&green_led>, <&heartbeat_led>; green-led { + color = ; default-state = "on"; + function = LED_FUNCTION_POWER; gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; label = "rockpis:green:power"; linux,default-trigger = "default-on"; }; blue-led { + color = ; default-state = "on"; + function = LED_FUNCTION_HEARTBEAT; gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; label = "rockpis:blue:user"; linux,default-trigger = "heartbeat"; @@ -126,21 +133,37 @@ }; &emmc { - bus-width = <4>; cap-mmc-highspeed; - mmc-hs200-1_8v; + cap-sd-highspeed; + no-sdio; non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>; vmmc-supply = <&vcc_io>; status = "okay"; }; &gmac { clock_in_out = "output"; + phy-handle = <&rtl8201f>; phy-supply = <&vcc_io>; - snps,reset-gpio = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 50000 50000>; status = "okay"; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + rtl8201f: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&mac_rst>; + reset-assert-us = <20000>; + reset-deassert-us = <50000>; + reset-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; + }; + }; }; &gpio0 { @@ -213,12 +236,32 @@ pinctrl-names = "default"; pinctrl-0 = <&rtc_32k>; + bluetooth { + bt_reg_on: bt-reg-on { + rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bt_wake_host: bt-wake-host { + rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + host_wake_bt: host-wake-bt { + rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + gmac { + mac_rst: mac-rst { + rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + leds { - green_led_gio: green-led-gpio { + green_led: green-led { rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; }; - heartbeat_led_gpio: heartbeat-led-gpio { + heartbeat_led: heartbeat-led { rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; }; }; @@ -256,15 +299,31 @@ cap-sd-highspeed; cap-sdio-irq; keep-power-in-suspend; - max-frequency = <1000000>; + max-frequency = <100000000>; mmc-pwrseq = <&sdio_pwrseq>; + no-mmc; + no-sd; non-removable; - sd-uhs-sdr104; + sd-uhs-sdr50; + vmmc-supply = <&vcc_io>; + vqmmc-supply = <&vcc_1v8>; status = "okay"; + + rtl8723ds: wifi@1 { + reg = <1>; + interrupt-parent = <&gpio0>; + interrupts = ; + interrupt-names = "host-wake"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_host_wake>; + }; }; &sdmmc { + cap-mmc-highspeed; cap-sd-highspeed; + disable-wp; + vmmc-supply = <&vcc_io>; status = "okay"; }; @@ -283,16 +342,22 @@ }; &uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_xfer>; status = "okay"; }; &uart4 { + uart-has-rtscts; status = "okay"; bluetooth { - compatible = "realtek,rtl8723bs-bt"; - device-wake-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; + compatible = "realtek,rtl8723ds-bt"; + device-wake-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; + enable-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; host-wake-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&bt_reg_on &bt_wake_host &host_wake_bt>; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * (C) Copyright 2018 FriendlyElec Computer Tech. Co., Ltd. + * (http://www.friendlyarm.com) + * + * (C) Copyright 2016 Rockchip Electronics Co., Ltd + */ + +/dts-v1/; +#include "rk3328-nanopi-r2s.dts" + +/ { + compatible = "friendlyarm,nanopi-r2s-plus", "rockchip,rk3328"; + model = "FriendlyElec NanoPi R2S Plus"; + + aliases { + mmc1 = &emmc; + }; +}; + +&emmc { + bus-width = <8>; + cap-mmc-highspeed; + disable-wp; + mmc-hs200-1_8v; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; + status = "okay"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts @@ -15,9 +15,11 @@ }; &gmac2io { + /delete-property/ tx_delay; + /delete-property/ rx_delay; + phy-handle = <&yt8531c>; - tx_delay = <0x19>; - rx_delay = <0x05>; + phy-mode = "rgmii-id"; mdio { /delete-node/ ethernet-phy@1; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts @@ -241,8 +241,8 @@ rk805: pmic@18 { compatible = "rockchip,rk805"; reg = <0x18>; - interrupt-parent = <&gpio2>; - interrupts = <6 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent = <&gpio0>; + interrupts = <2 IRQ_TYPE_LEVEL_LOW>; #clock-cells = <1>; clock-output-names = "xin32k", "rk805-clkout2"; gpio-controller; @@ -387,7 +387,7 @@ pmic { pmic_int_l: pmic-int-l { - rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -306,6 +306,7 @@ power-domain@RK3328_PD_HEVC { reg = ; + clocks = <&cru SCLK_VENC_CORE>; #power-domain-cells = <0>; }; power-domain@RK3328_PD_VIDEO { @@ -727,8 +728,7 @@ compatible = "rockchip,rk3328-dw-hdmi"; reg = <0x0 0xff3c0000 0x0 0x20000>; reg-io-width = <4>; - interrupts = , - ; + interrupts = ; clocks = <&cru PCLK_HDMI>, <&cru SCLK_HDMI_SFC>, <&cru SCLK_RTC32K>; @@ -744,11 +744,20 @@ status = "disabled"; ports { - hdmi_in: port { + #address-cells = <1>; + #size-cells = <0>; + + hdmi_in: port@0 { + reg = <0>; + hdmi_in_vop: endpoint { remote-endpoint = <&vop_out_hdmi>; }; }; + + hdmi_out: port@1 { + reg = <1>; + }; }; }; @@ -814,8 +823,8 @@ <0>, <24000000>, <24000000>, <24000000>, <15000000>, <15000000>, - <100000000>, <100000000>, - <100000000>, <100000000>, + <300000000>, <100000000>, + <400000000>, <100000000>, <50000000>, <100000000>, <100000000>, <100000000>, <50000000>, <50000000>, --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi @@ -61,7 +61,6 @@ fan: fan@18 { compatible = "ti,amc6821"; reg = <0x18>; - #cooling-cells = <2>; }; rtc_twi: rtc@6f { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -793,6 +793,7 @@ dma-names = "tx"; pinctrl-names = "default"; pinctrl-0 = <&spdif_tx>; + #sound-dai-cells = <0>; status = "disabled"; }; @@ -804,6 +805,7 @@ clocks = <&cru SCLK_I2S_2CH>, <&cru HCLK_I2S_2CH>; dmas = <&dmac_bus 6>, <&dmac_bus 7>; dma-names = "tx", "rx"; + #sound-dai-cells = <0>; status = "disabled"; }; @@ -817,6 +819,7 @@ dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&i2s_8ch_bus>; + #sound-dai-cells = <0>; status = "disabled"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3399-eaidk-610.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3399-eaidk-610.dts @@ -542,7 +542,7 @@ status = "okay"; rt5651: audio-codec@1a { - compatible = "rockchip,rt5651"; + compatible = "realtek,rt5651"; reg = <0x1a>; clocks = <&cru SCLK_I2S_8CH_OUT>; clock-names = "mclk"; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi @@ -450,7 +450,7 @@ dlg,btn-cfg = <50>; dlg,mic-det-thr = <500>; dlg,jack-ins-deb = <20>; - dlg,jack-det-rate = "32ms_64ms"; + dlg,jack-det-rate = "32_64"; dlg,jack-rem-deb = <1>; dlg,a-d-btn-thr = <0xa>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts @@ -32,12 +32,12 @@ backlight: edp-backlight { compatible = "pwm-backlight"; power-supply = <&vcc_12v>; - pwms = <&pwm0 0 740740 0>; + pwms = <&pwm0 0 125000 0>; }; bat: battery { compatible = "simple-battery"; - charge-full-design-microamp-hours = <9800000>; + charge-full-design-microamp-hours = <10000000>; voltage-max-design-microvolt = <4350000>; voltage-min-design-microvolt = <3000000>; }; @@ -779,7 +779,6 @@ }; &pcie0 { - bus-scan-delay-ms = <1000>; ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; num-lanes = <4>; pinctrl-names = "default"; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts @@ -138,7 +138,6 @@ regulator-max-microvolt = <1800000>; vin-supply = <&vcc3v3_sys>; gpio = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; }; /* MIPI DSI panel 2.8v supply */ @@ -150,7 +149,6 @@ regulator-max-microvolt = <2800000>; vin-supply = <&vcc3v3_sys>; gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi @@ -134,6 +134,22 @@ }; }; +&gpio3 { + /* + * The Qseven BIOS_DISABLE signal on the RK3399-Q7 keeps the on-module + * eMMC and SPI flash powered-down initially (in fact it keeps the + * reset signal asserted). BIOS_DISABLE_OVERRIDE pin allows to override + * that signal so that eMMC and SPI can be used regardless of the state + * of the signal. + */ + bios-disable-override-hog { + gpios = ; + gpio-hog; + line-name = "bios_disable_override"; + output-high; + }; +}; + &gmac { assigned-clocks = <&cru SCLK_RMII_SRC>; assigned-clock-parents = <&clkin_gmac>; @@ -146,7 +162,7 @@ snps,reset-active-low; snps,reset-delays-us = <0 10000 50000>; tx_delay = <0x10>; - rx_delay = <0x10>; + rx_delay = <0x23>; status = "okay"; }; @@ -389,6 +405,7 @@ &i2s0 { pinctrl-0 = <&i2s0_2ch_bus>; + pinctrl-1 = <&i2s0_2ch_bus_bclk_off>; rockchip,playback-channels = <2>; rockchip,capture-channels = <2>; status = "okay"; @@ -397,8 +414,8 @@ /* * As Q7 does not specify neither a global nor a RX clock for I2S these * signals are not used. Furthermore I2S0_LRCK_RX is used as GPIO. - * Therefore we have to redefine the i2s0_2ch_bus definition to prevent - * conflicts. + * Therefore we have to redefine the i2s0_2ch_bus and i2s0_2ch_bus_bclk_off + * definitions to prevent conflicts. */ &i2s0_2ch_bus { rockchip,pins = @@ -408,6 +425,14 @@ <3 RK_PD7 1 &pcfg_pull_none>; }; +&i2s0_2ch_bus_bclk_off { + rockchip,pins = + <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>, + <3 RK_PD2 1 &pcfg_pull_none>, + <3 RK_PD3 1 &pcfg_pull_none>, + <3 RK_PD7 1 &pcfg_pull_none>; +}; + &io_domains { status = "okay"; bt656-supply = <&vcc_1v8>; @@ -416,16 +441,27 @@ gpio1830-supply = <&vcc_1v8>; }; -&pmu_io_domains { - status = "okay"; - pmu1830-supply = <&vcc_1v8>; -}; - -&pwm2 { - status = "okay"; +&pcie_clkreqn_cpm { + rockchip,pins = + <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>; }; &pinctrl { + pinctrl-names = "default"; + pinctrl-0 = <&q7_thermal_pin &bios_disable_override_hog_pin>; + + gpios { + bios_disable_override_hog_pin: bios-disable-override-hog-pin { + rockchip,pins = + <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + q7_thermal_pin: q7-thermal-pin { + rockchip,pins = + <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + i2c8 { i2c8_xfer_a: i2c8-xfer { rockchip,pins = @@ -458,11 +494,20 @@ usb3 { usb3_id: usb3-id { rockchip,pins = - <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; }; }; }; +&pmu_io_domains { + status = "okay"; + pmu1830-supply = <&vcc_1v8>; +}; + +&pwm2 { + status = "okay"; +}; + &sdhci { /* * Signal integrity isn't great at 200MHz but 100MHz has proven stable --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi @@ -577,7 +577,7 @@ bluetooth { compatible = "brcm,bcm43438-bt"; clocks = <&rk808 1>; - clock-names = "ext_clock"; + clock-names = "txco"; device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts @@ -163,7 +163,7 @@ status = "okay"; rt5651: rt5651@1a { - compatible = "rockchip,rt5651"; + compatible = "realtek,rt5651"; reg = <0x1a>; clocks = <&cru SCLK_I2S_8CH_OUT>; clock-names = "mclk"; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1956,6 +1956,7 @@ hdmi: hdmi@ff940000 { compatible = "rockchip,rk3399-dw-hdmi"; reg = <0x0 0xff940000 0x0 0x20000>; + reg-io-width = <4>; interrupts = ; clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_SFR>, @@ -1964,13 +1965,16 @@ <&cru PLL_VPLL>; clock-names = "iahb", "isfr", "cec", "grf", "ref"; power-domains = <&power RK3399_PD_HDCP>; - reg-io-width = <4>; rockchip,grf = <&grf>; #sound-dai-cells = <0>; status = "disabled"; ports { - hdmi_in: port { + #address-cells = <1>; + #size-cells = <0>; + + hdmi_in: port@0 { + reg = <0>; #address-cells = <1>; #size-cells = <0>; @@ -1983,6 +1987,10 @@ remote-endpoint = <&vopl_out_hdmi>; }; }; + + hdmi_out: port@1 { + reg = <1>; + }; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts @@ -92,7 +92,7 @@ }; &i2c2 { - pintctrl-names = "default"; + pinctrl-names = "default"; pinctrl-0 = <&i2c2m1_xfer>; status = "okay"; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353v.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353v.dts @@ -79,7 +79,7 @@ }; &i2c2 { - pintctrl-names = "default"; + pinctrl-names = "default"; pinctrl-0 = <&i2c2m1_xfer>; status = "okay"; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3566-box-demo.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3566-box-demo.dts @@ -449,9 +449,9 @@ bluetooth { compatible = "brcm,bcm43438-bt"; clocks = <&pmucru CLK_RTC_32K>; - clock-names = "ext_clock"; - device-wake-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; - host-wake-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; + clock-names = "txco"; + device-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; + host-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts @@ -508,7 +508,6 @@ non-removable; pinctrl-names = "default"; pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>; - supports-emmc; status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3566-pinenote.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3566-pinenote.dtsi @@ -683,11 +683,11 @@ compatible = "brcm,bcm43438-bt"; clocks = <&rk817 1>; clock-names = "lpo"; - device-wake-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>; - host-wake-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>; - reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>; + device-wakeup-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>; + host-wakeup-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>; pinctrl-0 = <&bt_enable_h>, <&bt_host_wake_l>, <&bt_wake_h>; pinctrl-names = "default"; + shutdown-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; vbat-supply = <&vcc_wl>; vddio-supply = <&vcca_1v8_pmu>; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts @@ -289,7 +289,7 @@ regulator-name = "vdd_gpu"; regulator-always-on; regulator-boot-on; - regulator-min-microvolt = <900000>; + regulator-min-microvolt = <500000>; regulator-max-microvolt = <1350000>; regulator-ramp-delay = <6001>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3.dtsi @@ -402,9 +402,9 @@ clock-names = "lpo"; device-wakeup-gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>; host-wakeup-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>; - reset-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_LOW>; pinctrl-names = "default"; pinctrl-0 = <&bt_host_wake_h &bt_reg_on_h &bt_wake_host_h>; + shutdown-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; vbat-supply = <&vcc_3v3>; vddio-supply = <&vcc_1v8>; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3566-roc-pc.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3566-roc-pc.dts @@ -269,7 +269,7 @@ vcc9-supply = <&vcc3v3_sys>; codec { - mic-in-differential; + rockchip,mic-in-differential; }; regulators { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts @@ -416,6 +416,8 @@ vccio_sd: LDO_REG5 { regulator-name = "vccio_sd"; + regulator-always-on; + regulator-boot-on; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; @@ -525,9 +527,9 @@ #address-cells = <1>; #size-cells = <0>; - switch@0 { + switch@1f { compatible = "mediatek,mt7531"; - reg = <0>; + reg = <0x1f>; ports { #address-cells = <1>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts @@ -475,7 +475,7 @@ }; codec { - mic-in-differential; + rockchip,mic-in-differential; }; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dts @@ -11,6 +11,10 @@ }; }; +&pmu_io_domains { + vccio3-supply = <&vccio_sd>; +}; + &sdmmc0 { bus-width = <4>; cap-mmc-highspeed; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi @@ -39,9 +39,9 @@ }; }; - dc_12v: dc-12v-regulator { + vcc12v_dcin: vcc12v-dcin-regulator { compatible = "regulator-fixed"; - regulator-name = "dc_12v"; + regulator-name = "vcc12v_dcin"; regulator-always-on; regulator-boot-on; regulator-min-microvolt = <12000000>; @@ -65,7 +65,7 @@ regulator-boot-on; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; - vin-supply = <&dc_12v>; + vin-supply = <&vcc12v_dcin>; }; vcc5v0_sys: vcc5v0-sys-regulator { @@ -75,16 +75,7 @@ regulator-boot-on; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; - vin-supply = <&dc_12v>; - }; - - vcc5v0_usb_host: vcc5v0-usb-host-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb_host"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; + vin-supply = <&vcc12v_dcin>; }; vcc5v0_usb_otg: vcc5v0-usb-otg-regulator { @@ -94,8 +85,9 @@ pinctrl-names = "default"; pinctrl-0 = <&vcc5v0_usb_otg_en>; regulator-name = "vcc5v0_usb_otg"; - regulator-always-on; - regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v0_sys>; }; }; @@ -123,6 +115,10 @@ cpu-supply = <&vdd_cpu>; }; +&display_subsystem { + status = "disabled"; +}; + &gpu { mali-supply = <&vdd_gpu>; status = "okay"; @@ -405,8 +401,8 @@ &pmu_io_domains { pmuio1-supply = <&vcc3v3_pmu>; pmuio2-supply = <&vcc3v3_pmu>; - vccio1-supply = <&vccio_acodec>; - vccio3-supply = <&vccio_sd>; + vccio1-supply = <&vcc_3v3>; + vccio2-supply = <&vcc_1v8>; vccio4-supply = <&vcc_1v8>; vccio5-supply = <&vcc_3v3>; vccio6-supply = <&vcc_1v8>; @@ -429,28 +425,12 @@ status = "okay"; }; -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - &usb_host0_xhci { dr_mode = "host"; extcon = <&usb2phy0>; status = "okay"; }; -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - &usb_host1_xhci { status = "okay"; }; @@ -460,7 +440,7 @@ }; &usb2phy0_host { - phy-supply = <&vcc5v0_usb_host>; + phy-supply = <&vcc5v0_sys>; status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r68s.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r68s.dts @@ -39,7 +39,7 @@ &gmac0_rx_bus2 &gmac0_rgmii_clk &gmac0_rgmii_bus>; - snps,reset-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_LOW>; + snps,reset-gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; snps,reset-active-low; /* Reset time is 15ms, 50ms for rtl8211f */ snps,reset-delays-us = <0 15000 50000>; @@ -61,7 +61,7 @@ &gmac1m1_rx_bus2 &gmac1m1_rgmii_clk &gmac1m1_rgmii_bus>; - snps,reset-gpio = <&gpio0 RK_PB1 GPIO_ACTIVE_LOW>; + snps,reset-gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>; snps,reset-active-low; /* Reset time is 15ms, 50ms for rtl8211f */ snps,reset-delays-us = <0 15000 50000>; @@ -71,18 +71,18 @@ }; &mdio0 { - rgmii_phy0: ethernet-phy@0 { + rgmii_phy0: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0>; + reg = <0x1>; pinctrl-0 = <ð_phy0_reset_pin>; pinctrl-names = "default"; }; }; &mdio1 { - rgmii_phy1: ethernet-phy@0 { + rgmii_phy1: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0>; + reg = <0x1>; pinctrl-0 = <ð_phy1_reset_pin>; pinctrl-names = "default"; }; @@ -102,6 +102,10 @@ }; }; +&pmu_io_domains { + vccio3-supply = <&vcc_3v3>; +}; + &sdhci { bus-width = <8>; max-frequency = <200000000>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3568-lubancat-2.dts @@ -590,7 +590,6 @@ non-removable; pinctrl-names = "default"; pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>; - supports-emmc; status = "okay"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts @@ -13,7 +13,7 @@ / { model = "Hardkernel ODROID-M1"; - compatible = "rockchip,rk3568-odroid-m1", "rockchip,rk3568"; + compatible = "hardkernel,odroid-m1", "rockchip,rk3568"; aliases { ethernet0 = &gmac0; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3568-roc-pc.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3568-roc-pc.dts @@ -272,7 +272,6 @@ regulator-name = "vdd_logic"; regulator-always-on; regulator-boot-on; - regulator-init-microvolt = <900000>; regulator-initial-mode = <0x2>; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1350000>; @@ -285,7 +284,6 @@ vdd_gpu: DCDC_REG2 { regulator-name = "vdd_gpu"; - regulator-init-microvolt = <900000>; regulator-initial-mode = <0x2>; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1350000>; @@ -309,7 +307,6 @@ vdd_npu: DCDC_REG4 { regulator-name = "vdd_npu"; - regulator-init-microvolt = <900000>; regulator-initial-mode = <0x2>; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1350000>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts @@ -531,10 +531,6 @@ }; }; }; - - codec { - mic-in-differential; - }; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3568.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3568.dtsi @@ -223,6 +223,7 @@ assigned-clocks = <&pmucru CLK_PCIEPHY0_REF>; assigned-clock-rates = <100000000>; resets = <&cru SRST_PIPEPHY0>; + reset-names = "phy"; rockchip,pipe-grf = <&pipegrf>; rockchip,pipe-phy-grf = <&pipe_phy_grf0>; #phy-cells = <1>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -597,6 +597,7 @@ compatible = "rockchip,rk3568-vpu"; reg = <0x0 0xfdea0000 0x0 0x800>; interrupts = ; + interrupt-names = "vdpu"; clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; clock-names = "aclk", "hclk"; iommus = <&vdpu_mmu>; @@ -748,6 +749,7 @@ clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; clock-names = "aclk", "iface"; #iommu-cells = <0>; + power-domains = <&power RK3568_PD_VO>; status = "disabled"; }; @@ -1123,7 +1125,7 @@ dmas = <&dmac1 4>, <&dmac1 5>; dma-names = "tx", "rx"; resets = <&cru SRST_M_I2S2_2CH>; - reset-names = "m"; + reset-names = "tx-m"; rockchip,grf = <&grf>; pinctrl-names = "default"; pinctrl-0 = <&i2s2m0_sclktx @@ -1711,6 +1713,7 @@ assigned-clocks = <&pmucru CLK_PCIEPHY1_REF>; assigned-clock-rates = <100000000>; resets = <&cru SRST_PIPEPHY1>; + reset-names = "phy"; rockchip,pipe-grf = <&pipegrf>; rockchip,pipe-phy-grf = <&pipe_phy_grf1>; #phy-cells = <1>; @@ -1727,6 +1730,7 @@ assigned-clocks = <&pmucru CLK_PCIEPHY2_REF>; assigned-clock-rates = <100000000>; resets = <&cru SRST_PIPEPHY2>; + reset-names = "phy"; rockchip,pipe-grf = <&pipegrf>; rockchip,pipe-phy-grf = <&pipe_phy_grf2>; #phy-cells = <1>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi @@ -216,9 +216,9 @@ pinctrl-0 = <&i2c7m0_xfer>; status = "okay"; - es8316: audio-codec@11 { + es8316: audio-codec@10 { compatible = "everest,es8316"; - reg = <0x11>; + reg = <0x10>; assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; assigned-clock-rates = <12288000>; clocks = <&cru I2S0_8CH_MCLKOUT>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts @@ -486,6 +486,7 @@ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, <&rk806_dvs2_null>, <&rk806_dvs3_null>; spi-max-frequency = <1000000>; + system-power-controller; vcc1-supply = <&vcc5v0_sys>; vcc2-supply = <&vcc5v0_sys>; @@ -507,7 +508,7 @@ #gpio-cells = <2>; rk806_dvs1_null: dvs1-null-pins { - pins = "gpio_pwrctrl2"; + pins = "gpio_pwrctrl1"; function = "pin_fun0"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi @@ -297,6 +297,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, <&rk806_dvs2_null>, <&rk806_dvs3_null>; + system-power-controller; vcc1-supply = <&vcc5v0_sys>; vcc2-supply = <&vcc5v0_sys>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts @@ -283,9 +283,9 @@ pinctrl-0 = <&i2c7m0_xfer>; status = "okay"; - es8316: audio-codec@11 { + es8316: audio-codec@10 { compatible = "everest,es8316"; - reg = <0x11>; + reg = <0x10>; assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; assigned-clock-rates = <12288000>; clocks = <&cru I2S0_8CH_MCLKOUT>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts @@ -62,7 +62,7 @@ sound { compatible = "audio-graph-card"; - label = "rockchip,es8388-codec"; + label = "rockchip,es8388"; widgets = "Microphone", "Mic Jack", "Headphone", "Headphones"; routing = "LINPUT2", "Mic Jack", --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts @@ -70,7 +70,6 @@ vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator { compatible = "regulator-fixed"; - enable-active-low; gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_LOW>; regulator-name = "vcc_3v3_sd_s0"; regulator-boot-on; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts @@ -394,6 +394,7 @@ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, <&rk806_dvs2_null>, <&rk806_dvs3_null>; spi-max-frequency = <1000000>; + system-power-controller; vcc1-supply = <&vcc5v0_sys>; vcc2-supply = <&vcc5v0_sys>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -1704,7 +1704,6 @@ dmas = <&dmac1 0>, <&dmac1 1>; dma-names = "tx", "rx"; power-domains = <&power RK3588_PD_AUDIO>; - rockchip,trcm-sync-tx-only; pinctrl-names = "default"; pinctrl-0 = <&i2s2m1_lrck &i2s2m1_sclk @@ -1725,7 +1724,6 @@ dmas = <&dmac1 2>, <&dmac1 3>; dma-names = "tx", "rx"; power-domains = <&power RK3588_PD_AUDIO>; - rockchip,trcm-sync-tx-only; pinctrl-names = "default"; pinctrl-0 = <&i2s3_lrck &i2s3_sclk @@ -2221,9 +2219,9 @@ rockchip,hw-tshut-temp = <120000>; rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */ rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */ - pinctrl-0 = <&tsadc_gpio_func>; - pinctrl-1 = <&tsadc_shut>; - pinctrl-names = "gpio", "otpout"; + pinctrl-0 = <&tsadc_shut_org>; + pinctrl-1 = <&tsadc_gpio_func>; + pinctrl-names = "default", "sleep"; #thermal-sensor-cells = <1>; status = "disabled"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/ti/Makefile +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/ti/Makefile @@ -57,6 +57,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am654-gp-evm.dtb dtb-$(CONFIG_ARCH_K3) += k3-am654-evm.dtb dtb-$(CONFIG_ARCH_K3) += k3-am654-idk.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am654-base-board-rocktech-rk101-panel.dtbo # Boards with J7200 SoC k3-j7200-evm-dtbs := k3-j7200-common-proc-board.dtb k3-j7200-evm-quad-port-eth-exp.dtbo --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/ti/k3-am62-main.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/ti/k3-am62-main.dtsi @@ -23,7 +23,6 @@ interrupt-controller; reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */ <0x00 0x01880000 0x00 0xc0000>, /* GICR */ - <0x00 0x01880000 0x00 0xc0000>, /* GICR */ <0x01 0x00000000 0x00 0x2000>, /* GICC */ <0x01 0x00010000 0x00 0x1000>, /* GICH */ <0x01 0x00020000 0x00 0x2000>; /* GICV */ @@ -142,8 +141,8 @@ compatible = "ti,am64-dmss-pktdma"; reg = <0x00 0x485c0000 0x00 0x100>, <0x00 0x4a800000 0x00 0x20000>, - <0x00 0x4aa00000 0x00 0x40000>, - <0x00 0x4b800000 0x00 0x400000>, + <0x00 0x4aa00000 0x00 0x20000>, + <0x00 0x4b800000 0x00 0x200000>, <0x00 0x485e0000 0x00 0x10000>, <0x00 0x484a0000 0x00 0x2000>, <0x00 0x484c0000 0x00 0x2000>, @@ -640,6 +639,8 @@ interrupt-names = "host", "peripheral"; maximum-speed = "high-speed"; dr_mode = "otg"; + snps,usb2-gadget-lpm-disable; + snps,usb2-lpm-disable; }; }; @@ -663,6 +664,8 @@ interrupt-names = "host", "peripheral"; maximum-speed = "high-speed"; dr_mode = "otg"; + snps,usb2-gadget-lpm-disable; + snps,usb2-lpm-disable; }; }; @@ -779,9 +782,10 @@ <0x00 0x30207000 0x00 0x1000>, /* ovr1 */ <0x00 0x30208000 0x00 0x1000>, /* ovr2 */ <0x00 0x3020a000 0x00 0x1000>, /* vp1: Used for OLDI */ - <0x00 0x3020b000 0x00 0x1000>; /* vp2: Used as DPI Out */ + <0x00 0x3020b000 0x00 0x1000>, /* vp2: Used as DPI Out */ + <0x00 0x30201000 0x00 0x1000>; /* common1 */ reg-names = "common", "vidl1", "vid", - "ovr1", "ovr2", "vp1", "vp2"; + "ovr1", "ovr2", "vp1", "vp2", "common1"; power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 186 6>, <&dss_vp1_clk>, --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi @@ -60,7 +60,7 @@ memory@80000000 { device_type = "memory"; - reg = <0x00000000 0x80000000 0x00000000 0x40000000>; /* 1G RAM */ + reg = <0x00000000 0x80000000 0x00000000 0x80000000>; /* 2G RAM */ }; opp-table { @@ -134,7 +134,7 @@ regulator-max-microvolt = <3300000>; regulator-min-microvolt = <3300000>; regulator-name = "+V3.3_SD"; - startup-delay-us = <2000>; + startup-delay-us = <20000>; }; reg_sdhc1_vqmmc: regulator-sdhci1-vqmmc { @@ -1322,8 +1322,6 @@ 0 0 0 0 >; tdm-slots = <2>; - rx-num-evt = <32>; - tx-num-evt = <32>; #sound-dai-cells = <0>; status = "disabled"; }; @@ -1340,8 +1338,6 @@ 0 0 0 0 >; tdm-slots = <2>; - rx-num-evt = <32>; - tx-num-evt = <32>; #sound-dai-cells = <0>; status = "disabled"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts @@ -935,6 +935,4 @@ 0 0 0 0 0 0 0 0 >; - tx-num-evt = <32>; - rx-num-evt = <32>; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -18,7 +18,6 @@ compatible = "arm,gic-v3"; reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */ <0x00 0x01880000 0x00 0xc0000>, /* GICR */ - <0x00 0x01880000 0x00 0xc0000>, /* GICR */ <0x01 0x00000000 0x00 0x2000>, /* GICC */ <0x01 0x00010000 0x00 0x1000>, /* GICH */ <0x01 0x00020000 0x00 0x2000>; /* GICV */ @@ -121,8 +120,8 @@ compatible = "ti,am64-dmss-pktdma"; reg = <0x00 0x485c0000 0x00 0x100>, <0x00 0x4a800000 0x00 0x20000>, - <0x00 0x4aa00000 0x00 0x40000>, - <0x00 0x4b800000 0x00 0x400000>, + <0x00 0x4aa00000 0x00 0x20000>, + <0x00 0x4b800000 0x00 0x200000>, <0x00 0x485e0000 0x00 0x10000>, <0x00 0x484a0000 0x00 0x2000>, <0x00 0x484c0000 0x00 0x2000>, --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts @@ -580,6 +580,4 @@ 0 0 0 0 0 0 0 0 >; - tx-num-evt = <32>; - rx-num-evt = <32>; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi @@ -123,8 +123,8 @@ compatible = "ti,am64-dmss-pktdma"; reg = <0x00 0x485c0000 0x00 0x100>, <0x00 0x4a800000 0x00 0x20000>, - <0x00 0x4aa00000 0x00 0x40000>, - <0x00 0x4b800000 0x00 0x400000>, + <0x00 0x4aa00000 0x00 0x20000>, + <0x00 0x4b800000 0x00 0x200000>, <0x00 0x485e0000 0x00 0x10000>, <0x00 0x484a0000 0x00 0x2000>, <0x00 0x484c0000 0x00 0x2000>, --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/ti/k3-am62p-mcu.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/ti/k3-am62p-mcu.dtsi @@ -187,6 +187,8 @@ ranges = <0x79000000 0x00 0x79000000 0x8000>, <0x79020000 0x00 0x79020000 0x8000>; power-domains = <&k3_pds 7 TI_SCI_PD_EXCLUSIVE>; + status = "disabled"; + mcu_r5fss0_core0: r5f@79000000 { compatible = "ti,am62-r5f"; reg = <0x79000000 0x00008000>, --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi @@ -78,6 +78,7 @@ ranges = <0x78000000 0x00 0x78000000 0x8000>, <0x78100000 0x00 0x78100000 0x8000>; power-domains = <&k3_pds 119 TI_SCI_PD_EXCLUSIVE>; + status = "disabled"; wkup_r5fss0_core0: r5f@78000000 { compatible = "ti,am62-r5f"; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/ti/k3-am62p.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/ti/k3-am62p.dtsi @@ -71,7 +71,7 @@ <0x00 0x43600000 0x00 0x43600000 0x00 0x00010000>, /* SA3 sproxy data */ <0x00 0x44043000 0x00 0x44043000 0x00 0x00000fe0>, /* TI SCI DEBUG */ <0x00 0x44860000 0x00 0x44860000 0x00 0x00040000>, /* SA3 sproxy config */ - <0x00 0x48000000 0x00 0x48000000 0x00 0x06400000>, /* DMSS */ + <0x00 0x48000000 0x00 0x48000000 0x00 0x06408000>, /* DMSS */ <0x00 0x60000000 0x00 0x60000000 0x00 0x08000000>, /* FSS0 DAT1 */ <0x00 0x70000000 0x00 0x70000000 0x00 0x00010000>, /* OCSRAM */ <0x01 0x00000000 0x01 0x00000000 0x00 0x00310000>, /* A53 PERIPHBASE */ --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts @@ -205,7 +205,7 @@ pinctrl-single,pins = < AM62PX_IOPAD(0x0090, PIN_INPUT, 2) /* (U24) GPMC0_BE0n_CLE.MCASP1_ACLKX */ AM62PX_IOPAD(0x0098, PIN_INPUT, 2) /* (AA24) GPMC0_WAIT0.MCASP1_AFSX */ - AM62PX_IOPAD(0x008c, PIN_INPUT, 2) /* (T25) GPMC0_WEn.MCASP1_AXR0 */ + AM62PX_IOPAD(0x008c, PIN_OUTPUT, 2) /* (T25) GPMC0_WEn.MCASP1_AXR0 */ AM62PX_IOPAD(0x0084, PIN_INPUT, 2) /* (R25) GPMC0_ADVn_ALE.MCASP1_AXR2 */ >; }; @@ -445,6 +445,10 @@ }; &cpsw3g_mdio { + pinctrl-names = "default"; + pinctrl-0 = <&main_mdio1_pins_default>; + status = "okay"; + cpsw3g_phy0: ethernet-phy@0 { reg = <0>; ti,rx-internal-delay = ; @@ -476,8 +480,6 @@ 0 0 0 0 0 0 0 0 >; - tx-num-evt = <32>; - rx-num-evt = <32>; }; &fss { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi @@ -504,8 +504,6 @@ 0 0 0 0 0 0 0 0 >; - tx-num-evt = <32>; - rx-num-evt = <32>; }; &dss { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -633,6 +633,9 @@ ti,otap-del-sel-mmc-hs = <0x0>; ti,otap-del-sel-ddr52 = <0x6>; ti,otap-del-sel-hs200 = <0x7>; + ti,itap-del-sel-legacy = <0x10>; + ti,itap-del-sel-mmc-hs = <0xa>; + ti,itap-del-sel-ddr52 = <0x3>; status = "disabled"; }; @@ -645,12 +648,16 @@ clock-names = "clk_ahb", "clk_xin"; ti,trm-icp = <0x2>; ti,otap-del-sel-legacy = <0x0>; - ti,otap-del-sel-sd-hs = <0xf>; + ti,otap-del-sel-sd-hs = <0x0>; ti,otap-del-sel-sdr12 = <0xf>; ti,otap-del-sel-sdr25 = <0xf>; ti,otap-del-sel-sdr50 = <0xc>; ti,otap-del-sel-sdr104 = <0x6>; ti,otap-del-sel-ddr50 = <0x9>; + ti,itap-del-sel-legacy = <0x0>; + ti,itap-del-sel-sd-hs = <0x0>; + ti,itap-del-sel-sdr12 = <0x0>; + ti,itap-del-sel-sdr25 = <0x0>; ti,clkbuf-sel = <0x7>; status = "disabled"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -1019,9 +1019,10 @@ <0x0 0x04a07000 0x0 0x1000>, /* ovr1 */ <0x0 0x04a08000 0x0 0x1000>, /* ovr2 */ <0x0 0x04a0a000 0x0 0x1000>, /* vp1 */ - <0x0 0x04a0b000 0x0 0x1000>; /* vp2 */ + <0x0 0x04a0b000 0x0 0x1000>, /* vp2 */ + <0x0 0x04a01000 0x0 0x1000>; /* common1 */ reg-names = "common", "vidl1", "vid", - "ovr1", "ovr2", "vp1", "vp2"; + "ovr1", "ovr2", "vp1", "vp2", "common1"; ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/ti/k3-am654-idk.dtso +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/ti/k3-am654-idk.dtso @@ -58,9 +58,7 @@ <&main_udmap 0xc107>, /* egress slice 1 */ <&main_udmap 0x4100>, /* ingress slice 0 */ - <&main_udmap 0x4101>, /* ingress slice 1 */ - <&main_udmap 0x4102>, /* mgmnt rsp slice 0 */ - <&main_udmap 0x4103>; /* mgmnt rsp slice 1 */ + <&main_udmap 0x4101>; /* ingress slice 1 */ dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3", "tx1-0", "tx1-1", "tx1-2", "tx1-3", "rx0", "rx1"; @@ -126,9 +124,7 @@ <&main_udmap 0xc207>, /* egress slice 1 */ <&main_udmap 0x4200>, /* ingress slice 0 */ - <&main_udmap 0x4201>, /* ingress slice 1 */ - <&main_udmap 0x4202>, /* mgmnt rsp slice 0 */ - <&main_udmap 0x4203>; /* mgmnt rsp slice 1 */ + <&main_udmap 0x4201>; /* ingress slice 1 */ dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3", "tx1-0", "tx1-1", "tx1-2", "tx1-3", "rx0", "rx1"; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/ti/k3-am69-sk.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/ti/k3-am69-sk.dts @@ -646,7 +646,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pmic_irq_pins_default>; interrupt-parent = <&wkup_gpio0>; - interrupts = <39 IRQ_TYPE_EDGE_FALLING>; + interrupts = <83 IRQ_TYPE_EDGE_FALLING>; gpio-controller; #gpio-cells = <2>; ti,primary-pmic; @@ -918,13 +918,9 @@ pinctrl-names = "default"; pinctrl-0 = <&dss_vout0_pins_default>; assigned-clocks = <&k3_clks 218 2>, - <&k3_clks 218 5>, - <&k3_clks 218 14>, - <&k3_clks 218 18>; + <&k3_clks 218 5>; assigned-clock-parents = <&k3_clks 218 3>, - <&k3_clks 218 7>, - <&k3_clks 218 16>, - <&k3_clks 218 22>; + <&k3_clks 218 7>; }; &serdes_wiz4 { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts @@ -91,24 +91,25 @@ }; &wkup_pmx0 { +}; + +&wkup_pmx2 { mcu_uart0_pins_default: mcu-uart0-default-pins { pinctrl-single,pins = < - J721E_WKUP_IOPAD(0xf4, PIN_INPUT, 0) /* (D20) MCU_UART0_RXD */ - J721E_WKUP_IOPAD(0xf0, PIN_OUTPUT, 0) /* (D19) MCU_UART0_TXD */ - J721E_WKUP_IOPAD(0xf8, PIN_INPUT, 0) /* (E20) MCU_UART0_CTSn */ - J721E_WKUP_IOPAD(0xfc, PIN_OUTPUT, 0) /* (E21) MCU_UART0_RTSn */ + J721E_WKUP_IOPAD(0x90, PIN_INPUT, 0) /* (E20) MCU_UART0_CTSn */ + J721E_WKUP_IOPAD(0x94, PIN_OUTPUT, 0) /* (E21) MCU_UART0_RTSn */ + J721E_WKUP_IOPAD(0x8c, PIN_INPUT, 0) /* (D20) MCU_UART0_RXD */ + J721E_WKUP_IOPAD(0x88, PIN_OUTPUT, 0) /* (D19) MCU_UART0_TXD */ >; }; wkup_uart0_pins_default: wkup-uart0-default-pins { pinctrl-single,pins = < - J721E_WKUP_IOPAD(0xb0, PIN_INPUT, 0) /* (B14) WKUP_UART0_RXD */ - J721E_WKUP_IOPAD(0xb4, PIN_OUTPUT, 0) /* (A14) WKUP_UART0_TXD */ + J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (B14) WKUP_UART0_RXD */ + J721E_WKUP_IOPAD(0x4c, PIN_OUTPUT, 0) /* (A14) WKUP_UART0_TXD */ >; }; -}; -&wkup_pmx2 { mcu_cpsw_pins_default: mcu-cpsw-default-pins { pinctrl-single,pins = < J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_RGMII1_TX_CTL */ @@ -191,7 +192,7 @@ }; }; -&main_pmx1 { +&main_pmx2 { main_usbss0_pins_default: main-usbss0-default-pins { pinctrl-single,pins = < J721E_IOPAD(0x04, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */ @@ -210,7 +211,6 @@ status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mcu_uart0_pins_default>; - clock-frequency = <96000000>; }; &main_uart0 { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -399,7 +399,7 @@ /* TIMERIO pad input CTRLMMR_TIMER*_CTRL registers */ main_timerio_input: pinctrl@104200 { - compatible = "pinctrl-single"; + compatible = "ti,j7200-padconf", "pinctrl-single"; reg = <0x0 0x104200 0x0 0x50>; #pinctrl-cells = <1>; pinctrl-single,register-width = <32>; @@ -408,7 +408,7 @@ /* TIMERIO pad output CTCTRLMMR_TIMERIO*_CTRL registers */ main_timerio_output: pinctrl@104280 { - compatible = "pinctrl-single"; + compatible = "ti,j7200-padconf", "pinctrl-single"; reg = <0x0 0x104280 0x0 0x20>; #pinctrl-cells = <1>; pinctrl-single,register-width = <32>; @@ -416,7 +416,7 @@ }; main_pmx0: pinctrl@11c000 { - compatible = "pinctrl-single"; + compatible = "ti,j7200-padconf", "pinctrl-single"; /* Proxy 0 addressing */ reg = <0x00 0x11c000 0x00 0x10c>; #pinctrl-cells = <1>; @@ -424,10 +424,28 @@ pinctrl-single,function-mask = <0xffffffff>; }; - main_pmx1: pinctrl@11c11c { - compatible = "pinctrl-single"; + main_pmx1: pinctrl@11c110 { + compatible = "ti,j7200-padconf", "pinctrl-single"; /* Proxy 0 addressing */ - reg = <0x00 0x11c11c 0x00 0xc>; + reg = <0x00 0x11c110 0x00 0x004>; + #pinctrl-cells = <1>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0xffffffff>; + }; + + main_pmx2: pinctrl@11c11c { + compatible = "ti,j7200-padconf", "pinctrl-single"; + /* Proxy 0 addressing */ + reg = <0x00 0x11c11c 0x00 0x00c>; + #pinctrl-cells = <1>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0xffffffff>; + }; + + main_pmx3: pinctrl@11c164 { + compatible = "ti,j7200-padconf", "pinctrl-single"; + /* Proxy 0 addressing */ + reg = <0x00 0x11c164 0x00 0x008>; #pinctrl-cells = <1>; pinctrl-single,register-width = <32>; pinctrl-single,function-mask = <0xffffffff>; @@ -902,7 +920,7 @@ #address-cells = <1>; #size-cells = <0>; power-domains = <&k3_pds 266 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 266 1>; + clocks = <&k3_clks 266 4>; status = "disabled"; }; @@ -913,7 +931,7 @@ #address-cells = <1>; #size-cells = <0>; power-domains = <&k3_pds 267 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 267 1>; + clocks = <&k3_clks 267 4>; status = "disabled"; }; @@ -924,7 +942,7 @@ #address-cells = <1>; #size-cells = <0>; power-domains = <&k3_pds 268 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 268 1>; + clocks = <&k3_clks 268 4>; status = "disabled"; }; @@ -935,7 +953,7 @@ #address-cells = <1>; #size-cells = <0>; power-domains = <&k3_pds 269 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 269 1>; + clocks = <&k3_clks 269 4>; status = "disabled"; }; @@ -946,7 +964,7 @@ #address-cells = <1>; #size-cells = <0>; power-domains = <&k3_pds 270 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 270 1>; + clocks = <&k3_clks 270 2>; status = "disabled"; }; @@ -957,7 +975,7 @@ #address-cells = <1>; #size-cells = <0>; power-domains = <&k3_pds 271 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 271 1>; + clocks = <&k3_clks 271 4>; status = "disabled"; }; @@ -968,7 +986,7 @@ #address-cells = <1>; #size-cells = <0>; power-domains = <&k3_pds 272 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 272 1>; + clocks = <&k3_clks 272 4>; status = "disabled"; }; @@ -979,7 +997,7 @@ #address-cells = <1>; #size-cells = <0>; power-domains = <&k3_pds 273 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 273 1>; + clocks = <&k3_clks 273 4>; status = "disabled"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi @@ -192,7 +192,7 @@ /* MCU_TIMERIO pad input CTRLMMR_MCU_TIMER*_CTRL registers */ mcu_timerio_input: pinctrl@40f04200 { - compatible = "pinctrl-single"; + compatible = "ti,j7200-padconf", "pinctrl-single"; reg = <0x0 0x40f04200 0x0 0x28>; #pinctrl-cells = <1>; pinctrl-single,register-width = <32>; @@ -202,7 +202,7 @@ /* MCU_TIMERIO pad output CTRLMMR_MCU_TIMERIO*_CTRL registers */ mcu_timerio_output: pinctrl@40f04280 { - compatible = "pinctrl-single"; + compatible = "ti,j7200-padconf", "pinctrl-single"; reg = <0x0 0x40f04280 0x0 0x28>; #pinctrl-cells = <1>; pinctrl-single,register-width = <32>; @@ -211,7 +211,7 @@ }; wkup_pmx0: pinctrl@4301c000 { - compatible = "pinctrl-single"; + compatible = "ti,j7200-padconf", "pinctrl-single"; /* Proxy 0 addressing */ reg = <0x00 0x4301c000 0x00 0x34>; #pinctrl-cells = <1>; @@ -220,7 +220,7 @@ }; wkup_pmx1: pinctrl@4301c038 { - compatible = "pinctrl-single"; + compatible = "ti,j7200-padconf", "pinctrl-single"; /* Proxy 0 addressing */ reg = <0x00 0x4301c038 0x00 0x8>; #pinctrl-cells = <1>; @@ -229,7 +229,7 @@ }; wkup_pmx2: pinctrl@4301c068 { - compatible = "pinctrl-single"; + compatible = "ti,j7200-padconf", "pinctrl-single"; /* Proxy 0 addressing */ reg = <0x00 0x4301c068 0x00 0xec>; #pinctrl-cells = <1>; @@ -238,7 +238,7 @@ }; wkup_pmx3: pinctrl@4301c174 { - compatible = "pinctrl-single"; + compatible = "ti,j7200-padconf", "pinctrl-single"; /* Proxy 0 addressing */ reg = <0x00 0x4301c174 0x00 0x20>; #pinctrl-cells = <1>; @@ -492,7 +492,7 @@ #address-cells = <1>; #size-cells = <0>; power-domains = <&k3_pds 274 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 274 0>; + clocks = <&k3_clks 274 4>; status = "disabled"; }; @@ -503,7 +503,7 @@ #address-cells = <1>; #size-cells = <0>; power-domains = <&k3_pds 275 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 275 0>; + clocks = <&k3_clks 275 4>; status = "disabled"; }; @@ -514,7 +514,7 @@ #address-cells = <1>; #size-cells = <0>; power-domains = <&k3_pds 276 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 276 0>; + clocks = <&k3_clks 276 2>; status = "disabled"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts @@ -123,7 +123,7 @@ no-map; }; - c66_1_dma_memory_region: c66-dma-memory@a6000000 { + c66_0_dma_memory_region: c66-dma-memory@a6000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa6000000 0x00 0x100000>; no-map; @@ -135,7 +135,7 @@ no-map; }; - c66_0_dma_memory_region: c66-dma-memory@a7000000 { + c66_1_dma_memory_region: c66-dma-memory@a7000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa7000000 0x00 0x100000>; no-map; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi @@ -353,9 +353,9 @@ hbmc_mux: mux-controller@47000004 { compatible = "reg-mux"; - reg = <0x00 0x47000004 0x00 0x2>; + reg = <0x00 0x47000004 0x00 0x4>; #mux-control-cells = <1>; - mux-reg-masks = <0x4 0x2>; /* HBMC select */ + mux-reg-masks = <0x0 0x2>; /* HBMC select */ }; hbmc: hyperbus@47034000 { @@ -648,7 +648,7 @@ #address-cells = <1>; #size-cells = <0>; power-domains = <&k3_pds 274 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 274 0>; + clocks = <&k3_clks 274 1>; status = "disabled"; }; @@ -659,7 +659,7 @@ #address-cells = <1>; #size-cells = <0>; power-domains = <&k3_pds 275 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 275 0>; + clocks = <&k3_clks 275 1>; status = "disabled"; }; @@ -670,7 +670,7 @@ #address-cells = <1>; #size-cells = <0>; power-domains = <&k3_pds 276 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 276 0>; + clocks = <&k3_clks 276 1>; status = "disabled"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/ti/k3-j721e-sk.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/ti/k3-j721e-sk.dts @@ -119,7 +119,7 @@ no-map; }; - c66_1_dma_memory_region: c66-dma-memory@a6000000 { + c66_0_dma_memory_region: c66-dma-memory@a6000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa6000000 0x00 0x100000>; no-map; @@ -131,7 +131,7 @@ no-map; }; - c66_0_dma_memory_region: c66-dma-memory@a7000000 { + c66_1_dma_memory_region: c66-dma-memory@a7000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa7000000 0x00 0x100000>; no-map; @@ -574,7 +574,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pmic_irq_pins_default>; interrupt-parent = <&wkup_gpio0>; - interrupts = <9 IRQ_TYPE_EDGE_FALLING>; + interrupts = <7 IRQ_TYPE_EDGE_FALLING>; gpio-controller; #gpio-cells = <2>; ti,primary-pmic; @@ -651,7 +651,7 @@ reg = <0x4c>; system-power-controller; interrupt-parent = <&wkup_gpio0>; - interrupts = <9 IRQ_TYPE_EDGE_FALLING>; + interrupts = <7 IRQ_TYPE_EDGE_FALLING>; gpio-controller; #gpio-cells = <2>; buck1234-supply = <&vsys_3v3>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts @@ -190,8 +190,6 @@ &wkup_pmx2 { wkup_uart0_pins_default: wkup-uart0-default-pins { pinctrl-single,pins = < - J721S2_WKUP_IOPAD(0x070, PIN_INPUT, 0) /* (E25) WKUP_GPIO0_6.WKUP_UART0_CTSn */ - J721S2_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (F28) WKUP_GPIO0_7.WKUP_UART0_RTSn */ J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (D28) WKUP_UART0_RXD */ J721S2_WKUP_IOPAD(0x04c, PIN_OUTPUT, 0) /* (D27) WKUP_UART0_TXD */ >; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi @@ -1591,7 +1591,7 @@ #address-cells = <1>; #size-cells = <0>; power-domains = <&k3_pds 339 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 339 1>; + clocks = <&k3_clks 339 2>; status = "disabled"; }; @@ -1602,7 +1602,7 @@ #address-cells = <1>; #size-cells = <0>; power-domains = <&k3_pds 340 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 340 1>; + clocks = <&k3_clks 340 2>; status = "disabled"; }; @@ -1613,7 +1613,7 @@ #address-cells = <1>; #size-cells = <0>; power-domains = <&k3_pds 341 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 341 1>; + clocks = <&k3_clks 341 2>; status = "disabled"; }; @@ -1624,7 +1624,7 @@ #address-cells = <1>; #size-cells = <0>; power-domains = <&k3_pds 342 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 342 1>; + clocks = <&k3_clks 342 2>; status = "disabled"; }; @@ -1635,7 +1635,7 @@ #address-cells = <1>; #size-cells = <0>; power-domains = <&k3_pds 343 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 343 1>; + clocks = <&k3_clks 343 2>; status = "disabled"; }; @@ -1646,7 +1646,7 @@ #address-cells = <1>; #size-cells = <0>; power-domains = <&k3_pds 344 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 344 1>; + clocks = <&k3_clks 344 2>; status = "disabled"; }; @@ -1657,7 +1657,7 @@ #address-cells = <1>; #size-cells = <0>; power-domains = <&k3_pds 345 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 345 1>; + clocks = <&k3_clks 345 2>; status = "disabled"; }; @@ -1668,7 +1668,7 @@ #address-cells = <1>; #size-cells = <0>; power-domains = <&k3_pds 346 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 346 1>; + clocks = <&k3_clks 346 2>; status = "disabled"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi @@ -423,7 +423,7 @@ #address-cells = <1>; #size-cells = <0>; power-domains = <&k3_pds 347 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 347 0>; + clocks = <&k3_clks 347 2>; status = "disabled"; }; @@ -434,7 +434,7 @@ #address-cells = <1>; #size-cells = <0>; power-domains = <&k3_pds 348 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 348 0>; + clocks = <&k3_clks 348 2>; status = "disabled"; }; @@ -445,7 +445,7 @@ #address-cells = <1>; #size-cells = <0>; power-domains = <&k3_pds 349 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 349 0>; + clocks = <&k3_clks 349 2>; status = "disabled"; }; @@ -663,7 +663,7 @@ compatible = "ti,j7200-vtm"; reg = <0x00 0x42040000 0x0 0x350>, <0x00 0x42050000 0x0 0x350>; - power-domains = <&k3_pds 154 TI_SCI_PD_SHARED>; + power-domains = <&k3_pds 180 TI_SCI_PD_SHARED>; #thermal-sensor-cells = <1>; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts @@ -335,8 +335,6 @@ wkup_uart0_pins_default: wkup-uart0-default-pins { bootph-all; pinctrl-single,pins = < - J721S2_WKUP_IOPAD(0x070, PIN_INPUT, 0) /* (L37) WKUP_GPIO0_6.WKUP_UART0_CTSn */ - J721S2_WKUP_IOPAD(0x074, PIN_INPUT, 0) /* (L36) WKUP_GPIO0_7.WKUP_UART0_RTSn */ J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (K35) WKUP_UART0_RXD */ J721S2_WKUP_IOPAD(0x04c, PIN_INPUT, 0) /* (K34) WKUP_UART0_TXD */ >; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi @@ -52,12 +52,12 @@ compatible = "reg-mux"; reg = <0x00004080 0x30>; #mux-control-cells = <1>; - mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */ - <0x4088 0x3>, <0x408c 0x3>, /* SERDES0 lane2/3 select */ - <0x4090 0x3>, <0x4094 0x3>, /* SERDES1 lane0/1 select */ - <0x4098 0x3>, <0x409c 0x3>, /* SERDES1 lane2/3 select */ - <0x40a0 0x3>, <0x40a4 0x3>, /* SERDES2 lane0/1 select */ - <0x40a8 0x3>, <0x40ac 0x3>; /* SERDES2 lane2/3 select */ + mux-reg-masks = <0x0 0x3>, <0x4 0x3>, /* SERDES0 lane0/1 select */ + <0x8 0x3>, <0xc 0x3>, /* SERDES0 lane2/3 select */ + <0x10 0x3>, <0x14 0x3>, /* SERDES1 lane0/1 select */ + <0x18 0x3>, <0x1c 0x3>, /* SERDES1 lane2/3 select */ + <0x20 0x3>, <0x24 0x3>, /* SERDES2 lane0/1 select */ + <0x28 0x3>, <0x2c 0x3>; /* SERDES2 lane2/3 select */ idle-states = , , , --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi @@ -628,7 +628,7 @@ compatible = "ti,j7200-vtm"; reg = <0x00 0x42040000 0x00 0x350>, <0x00 0x42050000 0x00 0x350>; - power-domains = <&k3_pds 154 TI_SCI_PD_SHARED>; + power-domains = <&k3_pds 243 TI_SCI_PD_SHARED>; #thermal-sensor-cells = <1>; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/Makefile +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/Makefile @@ -17,9 +17,66 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu106-revA.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu111-revA.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu1275-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu1275-revB.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu1285-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-a2197-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-dlc21-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-e-a2197-00-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-e-a2197-00-revB.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-g-a2197-00-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-m-a2197-01-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-m-a2197-02-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-m-a2197-03-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-p-a2197-00-revA-x-prc-01-revA.dtbo +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-p-a2197-00-revA-x-prc-02-revA.dtbo +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-p-a2197-00-revA-x-prc-03-revA.dtbo +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-p-a2197-00-revA-x-prc-04-revA.dtbo +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-p-a2197-00-revA-x-prc-05-revA.dtbo +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-p-a2197-00-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sc-revB.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sc-revC.dtb + +zynqmp-p-a2197-00-revA-x-prc-01-revA-dtbs := zynqmp-p-a2197-00-revA.dtb zynqmp-p-a2197-00-revA-x-prc-01-revA.dtbo +zynqmp-p-a2197-00-revA-x-prc-02-revA-dtbs := zynqmp-p-a2197-00-revA.dtb zynqmp-p-a2197-00-revA-x-prc-02-revA.dtbo +zynqmp-p-a2197-00-revA-x-prc-03-revA-dtbs := zynqmp-p-a2197-00-revA.dtb zynqmp-p-a2197-00-revA-x-prc-03-revA.dtbo +zynqmp-p-a2197-00-revA-x-prc-04-revA-dtbs := zynqmp-p-a2197-00-revA.dtb zynqmp-p-a2197-00-revA-x-prc-04-revA.dtbo +zynqmp-p-a2197-00-revA-x-prc-05-revA-dtbs := zynqmp-p-a2197-00-revA.dtb zynqmp-p-a2197-00-revA-x-prc-05-revA.dtbo +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-p-a2197-00-revA-x-prc-01-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-p-a2197-00-revA-x-prc-02-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-p-a2197-00-revA-x-prc-03-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-p-a2197-00-revA-x-prc-04-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-p-a2197-00-revA-x-prc-05-revA.dtb + +zynqmp-sc-vek280-revA-dtbs := zynqmp-sc-revB.dtb zynqmp-sc-vek280-revA.dtbo +zynqmp-sc-vek280-revB-dtbs := zynqmp-sc-revC.dtb zynqmp-sc-vek280-revB.dtbo +zynqmp-sc-vhk158-revA-dtbs := zynqmp-sc-revB.dtb zynqmp-sc-vhk158-revA.dtbo +zynqmp-sc-vpk120-revB-dtbs := zynqmp-sc-revB.dtb zynqmp-sc-vpk120-revB.dtbo +zynqmp-sc-vpk180-revA-dtbs := zynqmp-sc-revB.dtb zynqmp-sc-vpk180-revA.dtbo +zynqmp-sc-vpk180-revB-dtbs := zynqmp-sc-revB.dtb zynqmp-sc-vpk180-revB.dtbo +zynqmp-sc-vn-p-b2197-00-revA-dtbs := zynqmp-sc-revB.dtb zynqmp-sc-vn-p-b2197-00-revA.dtbo +zynqmp-sc-vm-p-m1369-00-revA-dtbs := zynqmp-sc-revB.dtb zynqmp-sc-vm-p-m1369-00-revA.dtbo + +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sc-vek280-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sc-vek280-revB.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sc-vhk158-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sc-vpk120-revB.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sc-vpk180-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sc-vpk180-revB.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sc-vn-p-b2197-00-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sc-vm-p-m1369-00-revA.dtb + +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-vp-x-a2785-00-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-vpk120-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu208-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu216-revA.dtb + +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu670-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu670-revB.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k26-revA.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k26-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k24-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k24-revA.dtb zynqmp-sm-k26-revA-sck-kv-g-revA-dtbs := zynqmp-sm-k26-revA.dtb zynqmp-sck-kv-g-revA.dtbo dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k26-revA-sck-kv-g-revA.dtb @@ -29,3 +86,88 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k26-revA-sck-kv-g-revA.dtb zynqmp-smk-k26-revA-sck-kv-g-revB-dtbs := zynqmp-smk-k26-revA.dtb zynqmp-sck-kv-g-revB.dtbo dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k26-revA-sck-kv-g-revB.dtb +zynqmp-sm-k26-revA-sck-kr-g-revB-dtbs := zynqmp-sm-k26-revA.dtb zynqmp-sck-kr-g-revB.dtbo +zynqmp-smk-k26-revA-sck-kr-g-revA-dtbs := zynqmp-smk-k26-revA.dtb zynqmp-sck-kr-g-revA.dtbo +zynqmp-smk-k26-revA-sck-kr-g-revB-dtbs := zynqmp-smk-k26-revA.dtb zynqmp-sck-kr-g-revB.dtbo + +zynqmp-sm-k24-revA-sck-kd-g-revA-dtbs := zynqmp-sm-k24-revA.dtb zynqmp-sck-kd-g-revA.dtbo +zynqmp-smk-k24-revA-sck-kd-g-revA-dtbs := zynqmp-smk-k24-revA.dtb zynqmp-sck-kd-g-revA.dtbo +zynqmp-sm-k24-revA-sck-kv-g-revB-dtbs := zynqmp-sm-k24-revA.dtb zynqmp-sck-kv-g-revB.dtbo +zynqmp-smk-k24-revA-sck-kv-g-revB-dtbs := zynqmp-smk-k24-revA.dtb zynqmp-sck-kv-g-revB.dtbo +zynqmp-sm-k26-revA-sck-kr-g-revA-dtbs := zynqmp-sm-k26-revA.dtb zynqmp-sck-kr-g-revA.dtbo + +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k26-revA-sck-kv-g-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k26-revA-sck-kv-g-revB.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k26-revA-sck-kv-g-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k26-revA-sck-kv-g-revB.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k26-revA-sck-kr-g-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k26-revA-sck-kr-g-revB.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k26-revA-sck-kr-g-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k26-revA-sck-kr-g-revB.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k24-revA-sck-kd-g-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k24-revA-sck-kd-g-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k24-revA-sck-kv-g-revB.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k24-revA-sck-kv-g-revB.dtb + +# Versal boards +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-emb-plus-ve2302-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-v350-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vek280-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vek280-revB.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vc-p-a2197-00-revA-x-prc-01-revA-ospi.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vc-p-a2197-00-revA-x-prc-01-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vc-p-a2197-00-revA-x-prc-02-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vc-p-a2197-00-revA-x-prc-03-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vc-p-a2197-00-revA-x-prc-04-revA-ospi.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vc-p-a2197-00-revA-x-prc-04-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vc-p-a2197-00-revA-x-prc-05-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vc-p-a2197-00-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vck190-rev1.1-x-ebm-01-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vck190-rev1.1-x-ebm-02-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vck190-rev1.1-x-ebm-03-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vck190-rev1.1.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vck190-revA-x-ebm-01-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vck190-revA-x-ebm-02-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vck190-revA-x-ebm-03-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vck190-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vck5000-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vmk180-rev1.1-x-ebm-01-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vmk180-rev1.1-x-ebm-02-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vmk180-rev1.1-x-ebm-03-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vmk180-rev1.1.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vmk180-revA-x-ebm-01-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vmk180-revA-x-ebm-02-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vmk180-revA-x-ebm-03-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vmk180-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vp-x-a2785-00-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vhk158-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vpk120-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vpk120-revB.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vpk180-revA.dtb + +versal-vck190-revB-x-ebm-01-revA-dtbs := versal-vck190-revA.dtb versal-x-ebm-01-revA.dtbo +versal-vck190-revB-x-ebm-02-revA-dtbs := versal-vck190-revA.dtb versal-x-ebm-02-revA.dtbo +versal-vck190-revB-x-ebm-03-revA-dtbs := versal-vck190-revA.dtb versal-x-ebm-03-revA.dtbo + +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vck190-revB-x-ebm-01-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vck190-revB-x-ebm-02-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-vck190-revB-x-ebm-03-revA.dtb + +# Versal NET platforms +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-net-vn-p-b2197-00-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-net-vn-x-b2197-01-revA.dtb + +versal-net-vn-p-b2197-00-revA-x-prc-07-revA-dtbs := versal-net-vn-p-b2197-00-revA.dtb x-prc-07-revA.dtbo +versal-net-vn-p-b2197-00-revA-x-prc-07-i3c-revA-dtbs := versal-net-vn-p-b2197-00-revA.dtb x-prc-07-i3c-revA.dtbo +versal-net-vn-p-b2197-00-revA-x-prc-08-revA-dtbs := versal-net-vn-p-b2197-00-revA.dtb x-prc-08-revA.dtbo +versal-net-vn-p-b2197-00-revA-x-prc-09-revA-dtbs := versal-net-vn-p-b2197-00-revA.dtb x-prc-09-revA.dtbo +versal-net-vn-p-b2197-00-revA-x-prc-09-i3c-revA-dtbs := versal-net-vn-p-b2197-00-revA.dtb x-prc-09-i3c-revA.dtbo + +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-net-vn-p-b2197-00-revA-x-prc-07-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-net-vn-p-b2197-00-revA-x-prc-07-i3c-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-net-vn-p-b2197-00-revA-x-prc-08-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-net-vn-p-b2197-00-revA-x-prc-09-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += versal-net-vn-p-b2197-00-revA-x-prc-09-i3c-revA.dtb + +# Make sure that symbols are compiled in for device trees that are not overlayed +DTC_FLAGS += -@ --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-clk.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-clk.dtsi @@ -0,0 +1,327 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal with PM + * + * (C) Copyright 2017 - 2022, Xilinx, Inc. + * + * Michal Simek + */ + +#include +#include +#include +#include + +/ { + pl_alt_ref_clk: pl_alt_ref_clk { + bootph-all; + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <33333333>; + }; + + ref_clk: ref_clk { + bootph-all; + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <33333333>; + }; + + can0_clk: can0_clk { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&versal_clk CAN0_REF>; + clock-div = <2>; + clock-mult = <1>; + }; + + can1_clk: can1_clk { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&versal_clk CAN1_REF>; + clock-div = <2>; + clock-mult = <1>; + }; + + firmware { + versal_firmware: versal-firmware { + compatible = "xlnx,versal-firmware"; + interrupt-parent = <&gic>; + bootph-all; + method = "smc"; + #power-domain-cells = <1>; + + versal_clk: clock-controller { + bootph-all; + #clock-cells = <1>; + compatible = "xlnx,versal-clk"; + clocks = <&ref_clk>, <&pl_alt_ref_clk>; + clock-names = "ref_clk", "pl_alt_ref_clk"; + }; + + zynqmp_power: zynqmp-power { + compatible = "xlnx,zynqmp-power"; + }; + + versal_reset: reset-controller { + compatible = "xlnx,versal-reset"; + #reset-cells = <1>; + }; + + pinctrl0: pinctrl { + compatible = "xlnx,versal-pinctrl"; + }; + + versal_sec_cfg: versal-sec-cfg { + compatible = "xlnx,versal-sec-cfg"; + #address-cells = <1>; + #size-cells = <1>; + + bbram_zeroize: bbram-zeroize@4 { + reg = <0x04 0x4>; + }; + + bbram_key: bbram-key@10 { + reg = <0x10 0x20>; + }; + + bbram_usr: bbram-usr@30 { + reg = <0x30 0x4>; + }; + + bbram_lock: bbram-lock@48 { + reg = <0x48 0x4>; + }; + + user_key0: user-key@110 { + reg = <0x110 0x20>; + }; + + user_key1: user-key@130 { + reg = <0x130 0x20>; + }; + + user_key2: user-key@150 { + reg = <0x150 0x20>; + }; + + user_key3: user-key@170 { + reg = <0x170 0x20>; + }; + + user_key4: user-key@190 { + reg = <0x190 0x20>; + }; + + user_key5: user-key@1b0 { + reg = <0x1b0 0x20>; + }; + + user_key6: user-key@1d0 { + reg = <0x1d0 0x20>; + }; + + user_key7: user-key@1f0 { + reg = <0x1f0 0x20>; + }; + }; + }; + }; +}; + +&cpu0 { + clocks = <&versal_clk ACPU>; +}; + +&can0 { + clocks = <&can0_clk>, <&versal_clk LPD_LSBUS>; + power-domains = <&versal_firmware PM_DEV_CAN_FD_0>; +}; + +&can1 { + clocks = <&can1_clk>, <&versal_clk LPD_LSBUS>; + power-domains = <&versal_firmware PM_DEV_CAN_FD_1>; +}; + +&gem0 { + clocks = <&versal_clk LPD_LSBUS>, + <&versal_clk GEM0_REF>, <&versal_clk GEM0_TX>, + <&versal_clk GEM0_RX>, <&versal_clk GEM_TSU>; + power-domains = <&versal_firmware PM_DEV_GEM_0>; +}; + +&gem1 { + clocks = <&versal_clk LPD_LSBUS>, + <&versal_clk GEM1_REF>, <&versal_clk GEM1_TX>, + <&versal_clk GEM1_RX>, <&versal_clk GEM_TSU>; + power-domains = <&versal_firmware PM_DEV_GEM_1>; +}; + +&gpio0 { + clocks = <&versal_clk LPD_LSBUS>; + power-domains = <&versal_firmware PM_DEV_GPIO>; +}; + +&gpio1 { + clocks = <&versal_clk PMC_LSBUS_REF>; + power-domains = <&versal_firmware PM_DEV_GPIO_PMC>; +}; + +&i2c0 { + clocks = <&versal_clk I2C0_REF>; + power-domains = <&versal_firmware PM_DEV_I2C_0>; +}; + +&i2c1 { + clocks = <&versal_clk I2C1_REF>; + power-domains = <&versal_firmware PM_DEV_I2C_1>; +}; + +&i2c2 { + clocks = <&versal_clk I2C_REF>; + power-domains = <&versal_firmware PM_DEV_I2C_PMC>; +}; + +&lpd_dma_chan0 { + clocks = <&versal_clk ADMA>, <&versal_clk LPD_LSBUS>; + power-domains = <&versal_firmware PM_DEV_ADMA_0>; +}; + +&lpd_dma_chan1 { + clocks = <&versal_clk ADMA>, <&versal_clk LPD_LSBUS>; + power-domains = <&versal_firmware PM_DEV_ADMA_1>; +}; + +&lpd_dma_chan2 { + clocks = <&versal_clk ADMA>, <&versal_clk LPD_LSBUS>; + power-domains = <&versal_firmware PM_DEV_ADMA_2>; +}; + +&lpd_dma_chan3 { + clocks = <&versal_clk ADMA>, <&versal_clk LPD_LSBUS>; + power-domains = <&versal_firmware PM_DEV_ADMA_3>; +}; + +&lpd_dma_chan4 { + clocks = <&versal_clk ADMA>, <&versal_clk LPD_LSBUS>; + power-domains = <&versal_firmware PM_DEV_ADMA_4>; +}; + +&lpd_dma_chan5 { + clocks = <&versal_clk ADMA>, <&versal_clk LPD_LSBUS>; + power-domains = <&versal_firmware PM_DEV_ADMA_5>; +}; + +&lpd_dma_chan6 { + clocks = <&versal_clk ADMA>, <&versal_clk LPD_LSBUS>; + power-domains = <&versal_firmware PM_DEV_ADMA_6>; +}; + +&lpd_dma_chan7 { + clocks = <&versal_clk ADMA>, <&versal_clk LPD_LSBUS>; + power-domains = <&versal_firmware PM_DEV_ADMA_7>; +}; + +&qspi { + clocks = <&versal_clk QSPI_REF>, <&versal_clk LPD_LSBUS>; + power-domains = <&versal_firmware PM_DEV_QSPI>; +}; + +&ospi { + clocks = <&versal_clk OSPI_REF>; + power-domains = <&versal_firmware PM_DEV_OSPI>; + reset-names = "qspi"; + resets = <&versal_reset VERSAL_RST_OSPI>; +}; + +&rtc { + power-domains = <&versal_firmware PM_DEV_RTC>; +}; + +&serial0 { + clocks = <&versal_clk UART0_REF>, <&versal_clk LPD_LSBUS>; + power-domains = <&versal_firmware PM_DEV_UART_0>; +}; + +&serial1 { + clocks = <&versal_clk UART1_REF>, <&versal_clk LPD_LSBUS>; + power-domains = <&versal_firmware PM_DEV_UART_1>; +}; + +&sdhci0 { + clocks = <&versal_clk SDIO0_REF>, <&versal_clk LPD_LSBUS>, + <&versal_clk SD_DLL_REF>; + power-domains = <&versal_firmware PM_DEV_SDIO_0>; +}; + +&sdhci1 { + clocks = <&versal_clk SDIO1_REF>, <&versal_clk LPD_LSBUS>, + <&versal_clk SD_DLL_REF>; + power-domains = <&versal_firmware PM_DEV_SDIO_1>; +}; + +&spi0 { + clocks = <&versal_clk SPI0_REF>, <&versal_clk LPD_LSBUS>; + power-domains = <&versal_firmware PM_DEV_SPI_0>; +}; + +&spi1 { + clocks = <&versal_clk SPI1_REF>, <&versal_clk LPD_LSBUS>; + power-domains = <&versal_firmware PM_DEV_SPI_1>; +}; + +&ttc0 { + clocks = <&versal_clk TTC0>, <&versal_clk LPD_LSBUS>; + power-domains = <&versal_firmware PM_DEV_TTC_0>; +}; + +&ttc1 { + clocks = <&versal_clk TTC1>, <&versal_clk LPD_LSBUS>; + power-domains = <&versal_firmware PM_DEV_TTC_1>; +}; + +&ttc2 { + clocks = <&versal_clk TTC2>, <&versal_clk LPD_LSBUS>; + power-domains = <&versal_firmware PM_DEV_TTC_2>; +}; + +&ttc3 { + clocks = <&versal_clk TTC3>, <&versal_clk LPD_LSBUS>; + power-domains = <&versal_firmware PM_DEV_TTC_3>; +}; + +&usb0 { + clocks = <&versal_clk USB0_BUS_REF>, <&versal_clk USB3_DUAL_REF>; + power-domains = <&versal_firmware PM_DEV_USB_0>; + resets = <&versal_reset VERSAL_RST_USB_0>; +}; + +&dwc3_0 { + clocks = <&versal_clk USB0_BUS_REF>; +}; + +&watchdog { + clocks = <&versal_clk FPD_LSBUS>; + power-domains = <&versal_firmware PM_DEV_SWDT_FPD>; +}; + +&watchdog1 { + clocks = <&versal_clk LPD_LSBUS>; + power-domains = <&versal_firmware PM_DEV_SWDT_LPD>; +}; + +&sysmon0 { + xlnx,nodeid = ; +}; + +&sysmon1 { + xlnx,nodeid = ; +}; + +&sysmon2 { + xlnx,nodeid = ; +}; + +&sysmon3 { + xlnx,nodeid = ; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-emb-plus-ve2302-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-emb-plus-ve2302-revA.dts @@ -0,0 +1,66 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal Embedded+ VE2302 revA + * + * (C) Copyright 2023 - 2024, Advanced Micro Devices, Inc + * + * Michal Simek + */ + +#include +#include "versal.dtsi" +#include "versal-clk.dtsi" + +/ { + compatible = "xlnx,versal-emb-plus-ve2302-revA", + "xlnx,versal-emb-plus-ve2302", + "xlnx,versal"; + model = "Xilinx Versal Embedded+ VE2302 revA"; + + memory: memory@0 { + device_type = "memory"; + reg = <0 0 0 0x80000000>, <0x8 0x0 0x1 0x80000000>; /* 8GB */ + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial0:115200"; + }; + + aliases { + serial0 = &serial0; + serial1 = &serial1; + i2c0 = &i2c0; + }; + + /* For extension board */ + onewire { + compatible = "w1-gpio"; + gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>; + }; +}; + +&serial1 { /* PMC_MIO20/21 */ + status = "okay"; +}; + +&i2c0 { /* PS_MIO 10/11 - to Ryzen */ + status = "okay"; +}; + +&gpio0 { + status = "okay"; + gpio-line-names = "GPIO_LED2", "GPIO_LED3", "GPIO_LED4", "", "1WIRE", /* 0 - 4 */ + "", "FUSA", "", "EGPIO", "AGPIO", /* 5 - 9 */ + "I2C0_SCL", "I2C0_SDA", "", "", "", /* 10 - 14 */ + "", "", "", "", "", /* 15 - 19 */ + "", "", "", "", "3V3_MON_N", /* 20 - 24 */ + "3V3_MON_P", /* 25, MIO end and EMIO start */ + "", "", "", /* 26 - 29 */ + "", "", "", "", "", /* 30 - 34 */ + "", "", "", "", "", /* 35 - 39 */ + "", "", "", "", "", /* 40 - 44 */ + "", "", "", "", "", /* 45 - 49 */ + "", "", "", "", "", /* 50 - 54 */ + "", "", ""; /* 55 - 57 */ +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-net-clk-ccf.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-net-clk-ccf.dtsi @@ -0,0 +1,419 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal with PM + * + * Copyright (C) 2022, Xilinx, Inc. + * Copyright (C) 2022 - 2024, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +#include +#include +#include + +/ { + ref_clk: ref_clk { + bootph-all; + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <33333333>; + }; + + can0_clk: can0-clk { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&versal_net_clk CAN0_REF_2X>; + clock-div = <2>; + clock-mult = <1>; + }; + + can1_clk: can1-clk { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&versal_net_clk CAN1_REF_2X>; + clock-div = <2>; + clock-mult = <1>; + }; + + firmware { + versal_net_firmware: versal-net-firmware { + compatible = "xlnx,versal-net-firmware", "xlnx,versal-firmware"; + bootph-all; + method = "smc"; + #power-domain-cells = <1>; + + versal_net_reset: reset-controller { + compatible = "xlnx,versal-net-reset"; + #reset-cells = <1>; + }; + + versal_net_clk: clock-controller { + bootph-all; + #clock-cells = <1>; + compatible = "xlnx,versal-net-clk", "xlnx,versal-clk"; + clocks = <&ref_clk>, <&ref_clk>; + clock-names = "ref_clk", "pl_alt_ref_clk"; + }; + + versal_net_power: zynqmp-power { /* untested */ + compatible = "xlnx,zynqmp-power"; + interrupt-parent = <&gic>; + interrupts = <0 57 4>; + mboxes = <&ipi_mailbox_pmu1 0>, + <&ipi_mailbox_pmu1 1>; + mbox-names = "tx", "rx"; + }; + + versal_sec_cfg: versal-sec-cfg { /* untested */ + compatible = "xlnx,versal-sec-cfg"; + #address-cells = <1>; + #size-cells = <1>; + + bbram_zeroize: bbram-zeroize@4 { + reg = <0x04 0x4>; + }; + + bbram_key: bbram-key@10 { + reg = <0x10 0x20>; + }; + + bbram_usr: bbram-usr@30 { + reg = <0x30 0x4>; + }; + + bbram_lock: bbram-lock@48 { + reg = <0x48 0x4>; + }; + + user_key0: user-key@110 { + reg = <0x110 0x20>; + }; + + user_key1: user-key@130 { + reg = <0x130 0x20>; + }; + + user_key2: user-key@150 { + reg = <0x150 0x20>; + }; + + user_key3: user-key@170 { + reg = <0x170 0x20>; + }; + + user_key4: user-key@190 { + reg = <0x190 0x20>; + }; + + user_key5: user-key@1b0 { + reg = <0x1b0 0x20>; + }; + + user_key6: user-key@1d0 { + reg = <0x1d0 0x20>; + }; + + user_key7: user-key@1f0 { + reg = <0x1f0 0x20>; + }; + }; + }; + }; + + zynqmp-ipi { + compatible = "xlnx,zynqmp-ipi-mailbox"; + interrupt-parent = <&gic>; + interrupts = <0 57 4>; + xlnx,ipi-id = <2>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ipi_mailbox_pmu1: mailbox@eb3f0440 { + reg = <0 0xeb3f0440 0 0x20>, + <0 0xeb3f0460 0 0x20>, + <0 0xeb3f0280 0 0x20>, + <0 0xeb3f02a0 0 0x20>; + reg-names = "local_request_region", "local_response_region", + "remote_request_region", "remote_response_region"; + #mbox-cells = <1>; + xlnx,ipi-id = <1>; + }; + }; +}; + +&cpu0 { + clocks = <&versal_net_clk ACPU_0>; +}; + +&cpu100 { + clocks = <&versal_net_clk ACPU_0>; +}; + +&cpu200 { + clocks = <&versal_net_clk ACPU_0>; +}; + +&cpu300 { + clocks = <&versal_net_clk ACPU_0>; +}; + +&cpu10000 { + clocks = <&versal_net_clk ACPU_1>; +}; + +&cpu10100 { + clocks = <&versal_net_clk ACPU_1>; +}; + +&cpu10200 { + clocks = <&versal_net_clk ACPU_1>; +}; + +&cpu10300 { + clocks = <&versal_net_clk ACPU_1>; +}; + +&cpu20000 { + clocks = <&versal_net_clk ACPU_2>; +}; + +&cpu20100 { + clocks = <&versal_net_clk ACPU_2>; +}; + +&cpu20200 { + clocks = <&versal_net_clk ACPU_2>; +}; + +&cpu20300 { + clocks = <&versal_net_clk ACPU_2>; +}; + +&cpu30000 { + clocks = <&versal_net_clk ACPU_3>; +}; + +&cpu30100 { + clocks = <&versal_net_clk ACPU_3>; +}; + +&cpu30200 { + clocks = <&versal_net_clk ACPU_3>; +}; + +&cpu30300 { + clocks = <&versal_net_clk ACPU_3>; +}; + +&can0 { + clocks = <&versal_net_clk CAN0_REF_2X>, <&versal_net_clk LPD_LSBUS>; + power-domains = <&versal_net_firmware PM_DEV_CAN_FD_0>; +}; + +&can1 { + clocks = <&versal_net_clk CAN1_REF_2X>, <&versal_net_clk LPD_LSBUS>; + power-domains = <&versal_net_firmware PM_DEV_CAN_FD_1>; +}; + +&gem0 { + clocks = <&versal_net_clk LPD_LSBUS>, + <&versal_net_clk GEM0_REF>, <&versal_net_clk GEM0_TX>, + <&versal_net_clk GEM0_RX>, <&versal_net_clk GEM_TSU>; + power-domains = <&versal_net_firmware PM_DEV_GEM_0>; +}; + +&gem1 { + clocks = <&versal_net_clk LPD_LSBUS>, + <&versal_net_clk GEM1_REF>, <&versal_net_clk GEM1_TX>, + <&versal_net_clk GEM1_RX>, <&versal_net_clk GEM_TSU>; + power-domains = <&versal_net_firmware PM_DEV_GEM_1>; +}; + +&gpio0 { + clocks = <&versal_net_clk LPD_LSBUS>; + power-domains = <&versal_net_firmware PM_DEV_GPIO>; +}; + +&gpio1 { + clocks = <&versal_net_clk PMC_LSBUS_REF>; + power-domains = <&versal_net_firmware PM_DEV_GPIO_PMC>; +}; + +&i2c0 { + clocks = <&versal_net_clk I3C0_REF>; + power-domains = <&versal_net_firmware PM_DEV_I2C_0>; +}; + +&i2c1 { + clocks = <&versal_net_clk I3C1_REF>; + power-domains = <&versal_net_firmware PM_DEV_I2C_1>; +}; + +&i3c0 { + clocks = <&versal_net_clk I3C0_REF>; + power-domains = <&versal_net_firmware PM_DEV_I2C_0>; +}; + +&i3c1 { + clocks = <&versal_net_clk I3C1_REF>; + power-domains = <&versal_net_firmware PM_DEV_I2C_1>; +}; + +&adma0 { + clocks = <&versal_net_clk ADMA>, <&versal_net_clk LPD_LSBUS>; + power-domains = <&versal_net_firmware PM_DEV_ADMA_0>; +}; + +&adma1 { + clocks = <&versal_net_clk ADMA>, <&versal_net_clk LPD_LSBUS>; + power-domains = <&versal_net_firmware PM_DEV_ADMA_1>; +}; + +&adma2 { + clocks = <&versal_net_clk ADMA>, <&versal_net_clk LPD_LSBUS>; + power-domains = <&versal_net_firmware PM_DEV_ADMA_2>; +}; + +&adma3 { + clocks = <&versal_net_clk ADMA>, <&versal_net_clk LPD_LSBUS>; + power-domains = <&versal_net_firmware PM_DEV_ADMA_3>; +}; + +&adma4 { + clocks = <&versal_net_clk ADMA>, <&versal_net_clk LPD_LSBUS>; + power-domains = <&versal_net_firmware PM_DEV_ADMA_4>; +}; + +&adma5 { + clocks = <&versal_net_clk ADMA>, <&versal_net_clk LPD_LSBUS>; + power-domains = <&versal_net_firmware PM_DEV_ADMA_5>; +}; + +&adma6 { + clocks = <&versal_net_clk ADMA>, <&versal_net_clk LPD_LSBUS>; + power-domains = <&versal_net_firmware PM_DEV_ADMA_6>; +}; + +&adma7 { + clocks = <&versal_net_clk ADMA>, <&versal_net_clk LPD_LSBUS>; + power-domains = <&versal_net_firmware PM_DEV_ADMA_7>; +}; + +&qspi { + clocks = <&versal_net_clk QSPI_REF>, <&versal_net_clk LPD_LSBUS>; + power-domains = <&versal_net_firmware PM_DEV_QSPI>; +}; + +&ospi { + clocks = <&versal_net_clk OSPI_REF>; + power-domains = <&versal_net_firmware PM_DEV_OSPI>; + resets = <&versal_net_reset VERSAL_RST_OSPI>; +}; + +&rtc { + power-domains = <&versal_net_firmware PM_DEV_RTC>; +}; + +&serial0 { + clocks = <&versal_net_clk UART0_REF>, <&versal_net_clk LPD_LSBUS>; + power-domains = <&versal_net_firmware PM_DEV_UART_0>; +}; + +&serial1 { + clocks = <&versal_net_clk UART1_REF>, <&versal_net_clk LPD_LSBUS>; + power-domains = <&versal_net_firmware PM_DEV_UART_1>; +}; + +&sdhci0 { + clocks = <&versal_net_clk SDIO0_REF>, <&versal_net_clk LPD_LSBUS>, + <&versal_net_clk SD_DLL_REF>; + power-domains = <&versal_net_firmware PM_DEV_SDIO_0>; +}; + +&sdhci1 { + clocks = <&versal_net_clk SDIO1_REF>, <&versal_net_clk LPD_LSBUS>, + <&versal_net_clk SD_DLL_REF>; + power-domains = <&versal_net_firmware PM_DEV_SDIO_1>; +}; + +&spi0 { + clocks = <&versal_net_clk SPI0_REF>, <&versal_net_clk LPD_LSBUS>; + power-domains = <&versal_net_firmware PM_DEV_SPI_0>; +}; + +&spi1 { + clocks = <&versal_net_clk SPI1_REF>, <&versal_net_clk LPD_LSBUS>; + power-domains = <&versal_net_firmware PM_DEV_SPI_1>; +}; + +&ttc0 { + clocks = <&versal_net_clk TTC0>, <&versal_net_clk LPD_LSBUS>; + power-domains = <&versal_net_firmware PM_DEV_TTC_0>; +}; + +&ttc1 { + clocks = <&versal_net_clk TTC1>, <&versal_net_clk LPD_LSBUS>; + power-domains = <&versal_net_firmware PM_DEV_TTC_1>; +}; + +&ttc2 { + clocks = <&versal_net_clk TTC2>, <&versal_net_clk LPD_LSBUS>; + power-domains = <&versal_net_firmware PM_DEV_TTC_2>; +}; + +&ttc3 { + clocks = <&versal_net_clk TTC3>, <&versal_net_clk LPD_LSBUS>; + power-domains = <&versal_net_firmware PM_DEV_TTC_3>; +}; + +&usb0 { + clocks = <&versal_net_clk USB0_BUS_REF>, <&versal_net_clk USB0_BUS_REF>; + power-domains = <&versal_net_firmware PM_DEV_USB_0>; + resets = <&versal_net_reset VERSAL_RST_USB_0>; +}; + +&dwc3_0 { + clocks = <&versal_net_clk USB0_BUS_REF>; +}; + +&usb1 { + clocks = <&versal_net_clk USB1_BUS_REF>, <&versal_net_clk USB1_BUS_REF>; + power-domains = <&versal_net_firmware PM_DEV_USB_1>; + resets = <&versal_net_reset VERSAL_RST_USB_1>; +}; + +&dwc3_1 { + clocks = <&versal_net_clk USB1_BUS_REF>; +}; + +&wwdt0 { + clocks = <&versal_net_clk FPD_WWDT0>; + power-domains = <&versal_net_firmware PM_DEV_FPD_SWDT_0>; +}; + +&wwdt1 { + clocks = <&versal_net_clk FPD_WWDT1>; + power-domains = <&versal_net_firmware PM_DEV_FPD_SWDT_1>; +}; + +&wwdt2 { + clocks = <&versal_net_clk FPD_WWDT2>; + power-domains = <&versal_net_firmware PM_DEV_FPD_SWDT_2>; +}; + +&wwdt3 { + clocks = <&versal_net_clk FPD_WWDT3>; + power-domains = <&versal_net_firmware PM_DEV_FPD_SWDT_3>; +}; + +&lpd_wwdt0 { + clocks = <&versal_net_clk LPD_WWDT0>; + power-domains = <&versal_net_firmware PM_DEV_LPD_SWDT_0>; +}; + +&lpd_wwdt1 { + clocks = <&versal_net_clk LPD_WWDT1>; + power-domains = <&versal_net_firmware PM_DEV_LPD_SWDT_1>; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-net-clk.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-net-clk.dtsi @@ -0,0 +1,240 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal NET fixed clock + * + * (C) Copyright 2022, Xilinx, Inc. + * + * Michal Simek + */ + +#include + +/ { + clk60: clk60 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <60000000>; + }; + + clk100: clk100 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + }; + + clk125: clk125 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + }; + + clk150: clk150 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <150000000>; + }; + + clk160: clk160 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <160000000>; + }; + + clk200: clk200 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + + clk250: clk250 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <250000000>; + }; + + clk300: clk300 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <300000000>; + }; + + clk450: clk450 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <450000000>; + }; + + clk1200: clk1200 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <1200000000>; + }; + + firmware { + versal_net_firmware: versal-net-firmware { + compatible = "xlnx,versal-net-firmware", "xlnx,versal-firmware"; + bootph-all; + method = "smc"; + + versal_net_reset: reset-controller { + compatible = "xlnx,versal-net-reset"; + #reset-cells = <1>; + }; + }; + }; +}; + +&adma0 { + clocks = <&clk450>, <&clk450>; +}; + +&adma1 { + clocks = <&clk450>, <&clk450>; +}; + +&adma2 { + clocks = <&clk450>, <&clk450>; +}; + +&adma3 { + clocks = <&clk450>, <&clk450>; +}; + +&adma4 { + clocks = <&clk450>, <&clk450>; +}; + +&adma5 { + clocks = <&clk450>, <&clk450>; +}; + +&adma6 { + clocks = <&clk450>, <&clk450>; +}; + +&adma7 { + clocks = <&clk450>, <&clk450>; +}; + +&can0 { + clocks = <&clk160>, <&clk160>; +}; + +&can1 { + clocks = <&clk160>, <&clk160>; +}; + +&gem0 { + clocks = <&clk125>, <&clk125>, <&clk125>, <&clk125>, <&clk250>; +}; + +&gem1 { + clocks = <&clk125>, <&clk125>, <&clk125>, <&clk125>, <&clk250>; +}; + +&gpio0 { + clocks = <&clk100>; +}; + +&gpio1 { + clocks = <&clk100>; +}; + +&i2c0 { + clocks = <&clk100>; +}; + +&i2c1 { + clocks = <&clk100>; +}; + +&i3c0 { + clocks = <&clk100>; +}; + +&i3c1 { + clocks = <&clk100>; +}; + +&ospi { + clocks = <&clk200>; + resets = <&versal_net_reset VERSAL_RST_OSPI>; +}; + +&qspi { + clocks = <&clk300>, <&clk300>; +}; + +&rtc { + /* Nothing */ +}; + +&sdhci0 { + clocks = <&clk200>, <&clk200>, <&clk1200>; +}; + +&sdhci1 { + clocks = <&clk200>, <&clk200>, <&clk1200>; +}; + +&serial0 { + clocks = <&clk100>, <&clk100>; + clock = <1000000>; +}; + +&serial1 { + clocks = <&clk100>, <&clk100>; + clock = <100000000>; +}; + +&spi0 { + clocks = <&clk200>, <&clk200>; +}; + +&spi1 { + clocks = <&clk200>, <&clk200>; +}; + +&ttc0 { + clocks = <&clk150>; +}; + +&usb0 { + clocks = <&clk60>, <&clk60>; +}; + +&dwc3_0 { + /* Nothing */ +}; + +&usb1 { + clocks = <&clk60>, <&clk60>; +}; + +&dwc3_1 { + /* Nothing */ +}; + +&wwdt0 { + clocks = <&clk150>; +}; + +&wwdt1 { + clocks = <&clk150>; +}; + +&wwdt2 { + clocks = <&clk150>; +}; + +&wwdt3 { + clocks = <&clk150>; +}; + +&lpd_wwdt0 { + clocks = <&clk150>; +}; + +&lpd_wwdt1 { + clocks = <&clk150>; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-net-vn-p-b2197-00-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-net-vn-p-b2197-00-revA.dts @@ -0,0 +1,103 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP VN-P-B2197-00 (Tenzing2) + * + * (C) Copyright 2022, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +#include "versal-net.dtsi" +#include "versal-net-clk-ccf.dtsi" + +/ { + compatible = "xlnx,versal-net-vn-p-b2197-00-revA", + "xlnx,versal-net-vn-p-b2197-00", "xlnx,versal-net"; + + memory: memory@0 { + reg = <0 0 0 0x80000000>; + device_type = "memory"; + }; + + chosen { + bootargs = "earlycon=pl011,mmio32,0xf1920000 console=ttyAMA0,115200n8 root=/dev/ram0 rw"; + stdout-path = "serial0:115200n8"; + }; + +/* aliases { + nvmem0 = &eeprom0; + nvmem1 = &eeprom1; + }; */ +}; + +&i2c0 { + /* Access via J70/J71 or J82/J83 */ + clock-frequency = <100000>; +}; + +&i2c1 { + /* Access via J70/J71 or J82/J83 */ + /* By default this bus should have eeprom for board identification at 0x54 */ + /* SE/X-PRC card identification is also on this bus at 0x52 */ + clock-frequency = <100000>; +}; + +&adma0 { + status = "okay"; +}; + +&adma1 { + status = "okay"; +}; + +&adma2 { + status = "okay"; +}; + +&adma3 { + status = "okay"; +}; + +&adma4 { + status = "okay"; +}; + +&adma5 { + status = "okay"; +}; + +&adma6 { + status = "okay"; +}; + +&adma7 { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&rtc { + status = "okay"; +}; + +&sysmon0 { + status = "okay"; +}; + +&wwdt0 { + status = "okay"; +}; + +&wwdt1 { + status = "okay"; +}; + +&wwdt2 { + status = "okay"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-net-vn-x-b2197-01-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-net-vn-x-b2197-01-revA.dts @@ -0,0 +1,193 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal Net VNX board revA + * + * (C) Copyright 2022, Xilinx, Inc. + * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +/dts-v1/; + +#include "versal-net.dtsi" +#include "versal-net-clk-ccf.dtsi" +#include +#include + +/ { + compatible = "xlnx,versal-net-vnx-revA", "xlnx,versal-net-vnx", "xlnx,versal-net"; + model = "Xilinx Versal NET VNX revA"; + dma-coherent; + + memory: memory@0 { + reg = <0 0 0 0x80000000>; + device_type = "memory"; + }; + + memory_hi: memory@800000000 { + reg = <8 0 3 0x80000000>; + device_type = "memory"; + }; + + memory_hi2: memory@50000000000 { + reg = <0x500 0 4 0>; + device_type = "memory"; + }; + + chosen { + bootargs = "console=ttyAMA1,115200n8"; + stdout-path = "serial1:115200n8"; + }; + + cdx { + compatible = "xlnx,versal-net-cdx"; + status = "okay"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + dma-ranges = <0 0 0 0 0x10000 0>; + iommu-map = <0x0 &smmu 0x0 0xfffff>; + msi-map = <0x0 &its 0x0 0xffff>; + xlnx,rproc = <&remoteproc_r52>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + rsc_tbl_carveout: rproc@bbf14000 { + reg = <0 0xbbf14000 0 0x1000>; + no-map; + }; + rpu0vdev0vring0: rpu0vdev0vring0@bbf15000 { + reg = <0 0xbbf15000 0 0x1000>; + no-map; + }; + rpu0vdev0vring1: rpu0vdev0vring1@bbf16000 { + reg = <0 0xbbf16000 0 0x1000>; + no-map; + }; + rpu0vdev0buffer: rpu0vdev0buffer@bbf17000 { + reg = <0 0xbbf17000 0 0xD000>; + no-map; + }; + reserve_others: reserveothers@0 { + reg = <0 0x0 0 0x1c200000>; + no-map; + }; + pdi_update: pdiupdate@1c200000 { + reg = <0 0x1c200000 0 0x6000000>; + no-map; + }; + reserve_optee_atf: reserveopteeatf@22200000 { + reg = <0 0x22200000 0 0x4100000>; + no-map; + }; + }; + + zynqmp_ipi1_nobuf { + compatible = "xlnx,versal-ipi-mailbox"; + reg = <0x00 0xeb3b0000 0x00 0x1ff>; + reg-names = "ctrl"; + status = "okay"; + interrupts = <0 64 4>; + xlnx,ipi-id = <10>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + ipi_mailbox_rpu0: mailbox@eb3b1000 { + #mbox-cells = <1>; + xlnx,ipi-id = <11>; + reg = <0 0xeb3b1000 0 0x1000>; + reg-names = "ctrl"; + }; + }; + + r52ss@ff9a0000 { + compatible = "xlnx,versal-net-r52-remoteproc"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + reg = <0 0xff9a0000 0 0x10000>; + xlnx,cluster-mode = <1>; + remoteproc_r52: r52_0 { + compatible = "xilinx,r52"; + memory-region = <&rsc_tbl_carveout>, <&rpu0vdev0buffer>, + <&rpu0vdev0vring0>, <&rpu0vdev0vring1>; + power-domain = <&versal_net_firmware PM_DEV_RPU_A_0>; + mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>; + mbox-names = "tx", "rx"; + xlnx,rsc-tbl = <&rsc_tbl_carveout 0xbbf14000>; + }; + }; +}; + +&gem1 { + status = "okay"; + iommus = <&smmu 0x235>; + phy-handle = <&phy>; + phy-mode = "rmii"; + mdio { + #address-cells = <1>; + #size-cells = <0>; + phy: ethernet-phy@4 { + reg = <4>; + }; + }; +}; + +&ospi { + num-cs = <2>; + iommus = <&smmu 0x245>; + reset-names = "qspi"; + #address-cells = <1>; + #size-cells = <0>; + reset-names = "qspi"; + mt35xu02g: flash@0 { + compatible = "micron,m25p80", "jedec,spi-nor"; + reg = <0>, <1>; + stacked-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */ + #address-cells = <1>; + #size-cells = <1>; + cdns,read-delay = <0>; + cdns,tshsl-ns = <0>; + cdns,tsd2d-ns = <0>; + cdns,tchsh-ns = <1>; + cdns,tslch-ns = <1>; + spi-tx-bus-width = <8>; + spi-rx-bus-width = <8>; + spi-max-frequency = <20000000>; + broken-flash-reset; + reset-gpios = <&gpio1 0xc GPIO_ACTIVE_LOW>; + }; +}; + +&usb1 { + iommus = <&smmu 0x232>; +}; + +&sdhci1 { + status = "okay"; + iommus = <&smmu 0x243>; + non-removable; + disable-wp; + no-sd; + no-sdio; + cap-mmc-hw-reset; + bus-width = <8>; + no-1-8-v; +}; + +&serial1 { + status = "okay"; + skip-init; +}; + +&smmu { + status = "okay"; +}; + +&versal_fpga { + dma-noncoherent; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-net.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-net.dtsi @@ -0,0 +1,818 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal NET + * + * Copyright (C) 2022, Xilinx, Inc. + * Copyright (C) 2022 - 2023, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +/dts-v1/; + +/ { + compatible = "xlnx,versal-net"; + model = "Xilinx Versal NET"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&gic>; + + options { + u-boot { + compatible = "u-boot,config"; + bootscr-address = /bits/ 64 <0x20000000>; + }; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu100>; + }; + core2 { + cpu = <&cpu200>; + }; + core3 { + cpu = <&cpu300>; + }; + }; + + cluster1 { + core0 { + cpu = <&cpu10000>; + }; + + core1 { + cpu = <&cpu10100>; + }; + + core2 { + cpu = <&cpu10200>; + }; + + core3 { + cpu = <&cpu10300>; + }; + }; + cluster2 { + core0 { + cpu = <&cpu20000>; + }; + + core1 { + cpu = <&cpu20100>; + }; + + core2 { + cpu = <&cpu20200>; + }; + + core3 { + cpu = <&cpu20300>; + }; + }; + cluster3 { + core0 { + cpu = <&cpu30000>; + }; + + core1 { + cpu = <&cpu30100>; + }; + + core2 { + cpu = <&cpu30200>; + }; + + core3 { + cpu = <&cpu30300>; + }; + }; + + }; + + cpu0: cpu@0 { + compatible = "arm,cortex-a78"; + device_type = "cpu"; + enable-method = "psci"; + reg = <0>; + operating-points-v2 = <&cpu_opp_table>; + cpu-idle-states = <&CPU_SLEEP_0>; + }; + cpu100: cpu@100 { + compatible = "arm,cortex-a78"; + device_type = "cpu"; + enable-method = "psci"; + reg = <0x100>; + operating-points-v2 = <&cpu_opp_table>; + cpu-idle-states = <&CPU_SLEEP_0>; + }; + cpu200: cpu@200 { + compatible = "arm,cortex-a78"; + device_type = "cpu"; + enable-method = "psci"; + reg = <0x200>; + operating-points-v2 = <&cpu_opp_table>; + cpu-idle-states = <&CPU_SLEEP_0>; + }; + cpu300: cpu@300 { + compatible = "arm,cortex-a78"; + device_type = "cpu"; + enable-method = "psci"; + reg = <0x300>; + operating-points-v2 = <&cpu_opp_table>; + cpu-idle-states = <&CPU_SLEEP_0>; + }; + cpu10000: cpu@10000 { + compatible = "arm,cortex-a78"; + device_type = "cpu"; + enable-method = "psci"; + reg = <0x10000>; + operating-points-v2 = <&cpu_opp_table>; + cpu-idle-states = <&CPU_SLEEP_0>; + }; + cpu10100: cpu@10100 { + compatible = "arm,cortex-a78"; + device_type = "cpu"; + enable-method = "psci"; + reg = <0x10100>; + operating-points-v2 = <&cpu_opp_table>; + cpu-idle-states = <&CPU_SLEEP_0>; + }; + cpu10200: cpu@10200 { + compatible = "arm,cortex-a78"; + device_type = "cpu"; + enable-method = "psci"; + reg = <0x10200>; + operating-points-v2 = <&cpu_opp_table>; + cpu-idle-states = <&CPU_SLEEP_0>; + }; + cpu10300: cpu@10300 { + compatible = "arm,cortex-a78"; + device_type = "cpu"; + enable-method = "psci"; + reg = <0x10300>; + operating-points-v2 = <&cpu_opp_table>; + cpu-idle-states = <&CPU_SLEEP_0>; + }; + cpu20000: cpu@20000 { + compatible = "arm,cortex-a78"; + device_type = "cpu"; + enable-method = "psci"; + reg = <0x20000>; + operating-points-v2 = <&cpu_opp_table>; + cpu-idle-states = <&CPU_SLEEP_0>; + }; + cpu20100: cpu@20100 { + compatible = "arm,cortex-a78"; + device_type = "cpu"; + enable-method = "psci"; + reg = <0x20100>; + operating-points-v2 = <&cpu_opp_table>; + cpu-idle-states = <&CPU_SLEEP_0>; + }; + cpu20200: cpu@20200 { + compatible = "arm,cortex-a78"; + device_type = "cpu"; + enable-method = "psci"; + reg = <0x20200>; + operating-points-v2 = <&cpu_opp_table>; + cpu-idle-states = <&CPU_SLEEP_0>; + }; + cpu20300: cpu@20300 { + compatible = "arm,cortex-a78"; + device_type = "cpu"; + enable-method = "psci"; + reg = <0x20300>; + operating-points-v2 = <&cpu_opp_table>; + cpu-idle-states = <&CPU_SLEEP_0>; + }; + cpu30000: cpu@30000 { + compatible = "arm,cortex-a78"; + device_type = "cpu"; + enable-method = "psci"; + reg = <0x30000>; + operating-points-v2 = <&cpu_opp_table>; + cpu-idle-states = <&CPU_SLEEP_0>; + }; + cpu30100: cpu@30100 { + compatible = "arm,cortex-a78"; + device_type = "cpu"; + enable-method = "psci"; + reg = <0x30100>; + operating-points-v2 = <&cpu_opp_table>; + cpu-idle-states = <&CPU_SLEEP_0>; + }; + cpu30200: cpu@30200 { + compatible = "arm,cortex-a78"; + device_type = "cpu"; + enable-method = "psci"; + reg = <0x30200>; + operating-points-v2 = <&cpu_opp_table>; + cpu-idle-states = <&CPU_SLEEP_0>; + }; + cpu30300: cpu@30300 { + compatible = "arm,cortex-a78"; + device_type = "cpu"; + enable-method = "psci"; + reg = <0x30300>; + operating-points-v2 = <&cpu_opp_table>; + cpu-idle-states = <&CPU_SLEEP_0>; + }; + idle-states { + entry-method = "psci"; + + CPU_SLEEP_0: cpu-sleep-0 { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x40000000>; + local-timer-stop; + entry-latency-us = <300>; + exit-latency-us = <600>; + min-residency-us = <10000>; + }; + }; + }; + + cpu_opp_table: opp-table { + compatible = "operating-points-v2"; + opp-1066000000 { + opp-hz = /bits/ 64 <1066000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <500000>; + }; + opp-1866000000 { + opp-hz = /bits/ 64 <1866000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <500000>; + }; + opp-1900000000 { + opp-hz = /bits/ 64 <1900000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <500000>; + }; + opp-1999000000 { + opp-hz = /bits/ 64 <1999000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <500000>; + }; + opp-2050000000 { + opp-hz = /bits/ 64 <2050000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <500000>; + }; + opp-2100000000 { + opp-hz = /bits/ 64 <2100000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <500000>; + }; + opp-2200000000 { + opp-hz = /bits/ 64 <2200000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <500000>; + }; + opp-2400000000 { + opp-hz = /bits/ 64 <2400000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <500000>; + }; + }; + + aliases { + serial0 = &serial0; + serial1 = &serial1; + serial2 = &dcc; + mmc0 = &sdhci0; + mmc1 = &sdhci1; + i2c0 = &i2c0; + i2c1 = &i2c1; + rtc = &rtc; + usb0 = &usb0; + usb1 = &usb1; + spi0 = &ospi; + spi1 = &qspi; + }; + + dcc: dcc { + compatible = "arm,dcc"; + status = "disabled"; + bootph-all; + }; + + firmware { + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + }; + + fpga: fpga-region { + compatible = "fpga-region"; + fpga-mgr = <&versal_fpga>; + #address-cells = <2>; + #size-cells = <2>; + }; + + timer: timer { + compatible = "arm,armv8-timer"; + interrupts = <1 13 4>, <1 14 4>, <1 11 4>, <1 10 4>; /* FIXME 3rd cell */ + }; + + versal_fpga: versal-fpga { + compatible = "xlnx,versal-fpga"; + }; + + sensor0: versal-thermal-sensor { + compatible = "xlnx,versal-thermal"; + #thermal-sensor-cells = <0>; + io-channels = <&sysmon0>; + io-channel-names = "sysmon-temp-channel"; + }; + + thermal-zones { + versal_thermal: versal-thermal { + polling-delay-passive = <250>; /* milliseconds */ + polling-delay = <1000>; /* milliseconds */ + thermal-sensors = <&sensor0>; + + trips { + temp_alert: temp-alert { + temperature = <70000>; /* millicelsius */ + hysteresis = <0>; /* millicelsius */ + type = "passive"; + }; + + ot_crit: ot-crit { + temperature = <125000>; /* millicelsius */ + hysteresis = <0>; /* millicelsius */ + type = "critical"; + }; + }; + + cooling-maps { + }; + }; + }; + + amba: axi { + compatible = "simple-bus"; + bootph-all; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + adma0: dma-controller@ebd00000 { + compatible = "xlnx,zynqmp-dma-1.0"; + status = "disabled"; + reg = <0 0xebd00000 0 0x1000>; + interrupts = <0 72 4>; + clock-names = "clk_main", "clk_apb"; + /* iommus = <&smmu 0x210>; */ + #dma-cells = <1>; + xlnx,bus-width = <64>; + }; + + adma1: dma-controller@ebd10000 { + compatible = "xlnx,zynqmp-dma-1.0"; + status = "disabled"; + reg = <0 0xebd10000 0 0x1000>; + interrupts = <0 73 4>; + clock-names = "clk_main", "clk_apb"; + /* iommus = <&smmu 0x212>; */ + #dma-cells = <1>; + xlnx,bus-width = <64>; + }; + + adma2: dma-controller@ebd20000 { + compatible = "xlnx,zynqmp-dma-1.0"; + status = "disabled"; + reg = <0 0xebd20000 0 0x1000>; + interrupts = <0 74 4>; + clock-names = "clk_main", "clk_apb"; + /* iommus = <&smmu 0x214>; */ + #dma-cells = <1>; + xlnx,bus-width = <64>; + }; + + adma3: dma-controller@ebd30000 { + compatible = "xlnx,zynqmp-dma-1.0"; + status = "disabled"; + reg = <0 0xebd30000 0 0x1000>; + interrupts = <0 75 4>; + clock-names = "clk_main", "clk_apb"; + /* iommus = <&smmu 0x216>; */ + #dma-cells = <1>; + xlnx,bus-width = <64>; + }; + + adma4: dma-controller@ebd40000 { + compatible = "xlnx,zynqmp-dma-1.0"; + status = "disabled"; + reg = <0 0xebd40000 0 0x1000>; + interrupts = <0 76 4>; + clock-names = "clk_main", "clk_apb"; + /* iommus = <&smmu 0x218>; */ + #dma-cells = <1>; + xlnx,bus-width = <64>; + }; + + adma5: dma-controller@ebd50000 { + compatible = "xlnx,zynqmp-dma-1.0"; + status = "disabled"; + reg = <0 0xebd50000 0 0x1000>; + interrupts = <0 77 4>; + clock-names = "clk_main", "clk_apb"; + /* iommus = <&smmu 0x21A>; */ + #dma-cells = <1>; + xlnx,bus-width = <64>; + }; + + adma6: dma-controller@ebd60000 { + compatible = "xlnx,zynqmp-dma-1.0"; + status = "disabled"; + reg = <0 0xebd60000 0 0x1000>; + interrupts = <0 78 4>; + clock-names = "clk_main", "clk_apb"; + /* iommus = <&smmu 0x21C>; */ + #dma-cells = <1>; + xlnx,bus-width = <64>; + }; + + adma7: dma-controller@ebd70000 { + compatible = "xlnx,zynqmp-dma-1.0"; + status = "disabled"; + reg = <0 0xebd70000 0 0x1000>; + interrupts = <0 79 4>; + clock-names = "clk_main", "clk_apb"; + /* iommus = <&smmu 0x21E>; */ + #dma-cells = <1>; + xlnx,bus-width = <64>; + }; + + can0: can@f1980000 { + compatible = "xlnx,canfd-2.0"; + status = "disabled"; + reg = <0 0xf1980000 0 0x6000>; + interrupts = <0 27 4>; + clock-names = "can_clk", "s_axi_aclk"; + rx-fifo-depth = <64>; + tx-mailbox-count = <32>; + }; + + can1: can@f1990000 { + compatible = "xlnx,canfd-2.0"; + status = "disabled"; + reg = <0 0xf1990000 0 0x6000>; + interrupts = <0 28 4>; + clock-names = "can_clk", "s_axi_aclk"; + rx-fifo-depth = <64>; + tx-mailbox-count = <32>; + }; + + gem0: ethernet@f19e0000 { + compatible = "xlnx,versal-gem", "cdns,gem"; + status = "disabled"; + reg = <0 0xf19e0000 0 0x1000>; + interrupts = <0 39 4>, <0 39 4>; + clock-names = "pclk", "hclk", "tx_clk", "rx_clk", + "tsu_clk"; + /* iommus = <&smmu 0x234>; */ + }; + + gem1: ethernet@f19f0000 { + compatible = "xlnx,versal-gem", "cdns,gem"; + status = "disabled"; + reg = <0 0xf19f0000 0 0x1000>; + interrupts = <0 41 4>, <0 41 4>; + clock-names = "pclk", "hclk", "tx_clk", "rx_clk", + "tsu_clk"; + /* iommus = <&smmu 0x235>; */ + }; + + gic: interrupt-controller@e2000000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + reg = <0 0xe2000000 0 0x10000>, + <0 0xe2060000 0 0x200000>; + interrupt-controller; + interrupts = <1 9 4>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + its: msi-controller@e2040000 { + compatible = "arm,gic-v3-its"; + msi-controller; + #msi-cells = <1>; + reg = <0 0xe2040000 0 0x20000>; + }; + }; + + gpio0: gpio@f19d0000 { + compatible = "xlnx,versal-gpio-1.0"; + status = "disabled"; + reg = <0 0xf19d0000 0 0x1000>; + interrupts = <0 20 4>; + #gpio-cells = <2>; + gpio-controller; + #interrupt-cells = <2>; + interrupt-controller; + }; + + gpio1: gpio@f1020000 { + compatible = "xlnx,pmc-gpio-1.0"; + status = "disabled"; + reg = <0 0xf1020000 0 0x1000>; + interrupts = <0 180 4>; + #gpio-cells = <2>; + gpio-controller; + #interrupt-cells = <2>; + interrupt-controller; + }; + + i2c0: i2c@f1940000 { + compatible = "cdns,i2c-r1p14"; + status = "disabled"; + reg = <0 0xf1940000 0 0x1000>; + interrupts = <0 21 4>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c1: i2c@f1950000 { + compatible = "cdns,i2c-r1p14"; + status = "disabled"; + reg = <0 0xf1950000 0 0x1000>; + interrupts = <0 22 4>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i3c0: i3c@f1948000 { + compatible = "snps,dw-i3c-master-1.00a"; + status = "disabled"; + reg = <0 0xf1948000 0 0x1000>; + #address-cells = <3>; + #size-cells = <0>; + interrupts = <0 21 4>; + }; + + i3c1: i3c@f1958000 { + compatible = "snps,dw-i3c-master-1.00a"; + status = "disabled"; + reg = <0 0xf1958000 0 0x1000>; + #address-cells = <3>; + #size-cells = <0>; + interrupts = <0 22 4>; + }; + + ospi: spi@f1010000 { + compatible = "xlnx,versal-ospi-1.0", "cdns,qspi-nor"; + status = "disabled"; + reg = <0 0xf1010000 0 0x10000>, + <0 0xc0000000 0 0x20000000>; + interrupts = <0 182 4>; + /* iommus = <&smmu 0x245>; */ + cdns,fifo-depth = <256>; + cdns,fifo-width = <4>; + cdns,is-dma = <1>; /* u-boot specific */ + /* cdns,is-stig-pgm = <1>; - unused - checking with Sai */ + cdns,trigger-address = <0xc0000000>; + }; + + qspi: spi@f1030000 { + compatible = "xlnx,versal-qspi-1.0"; + status = "disabled"; + reg = <0 0xf1030000 0 0x1000>; /* missing one more reg range - checking with Sai */ + interrupts = <0 183 4>; + clock-names = "ref_clk", "pclk"; + /* iommus = <&smmu 0x244>; */ + }; + + rtc: rtc@f12a0000 { + compatible = "xlnx,zynqmp-rtc"; + status = "disabled"; + reg = <0 0xf12a0000 0 0x100>; + interrupts = <0 200 4>, <0 201 4>; + interrupt-names = "alarm", "sec"; + calibration = <0x8000>; + }; + + sdhci0: mmc@f1040000 { + compatible = "xlnx,versal-8.9a", "arasan,sdhci-8.9a"; + status = "disabled"; + reg = <0 0xf1040000 0 0x10000>; + interrupts = <0 184 4>; + clock-names = "clk_xin", "clk_ahb", "gate"; + /* iommus = <&smmu 0x242>; */ + #clock-cells = <1>; + clock-output-names = "clk_out_sd0", "clk_in_sd0"; + }; + + sdhci1: mmc@f1050000 { + compatible = "xlnx,versal-net-emmc"; + status = "disabled"; + reg = <0 0xf1050000 0 0x10000>; + interrupts = <0 186 4>; + clock-names = "clk_xin", "clk_ahb", "gate"; + /* iommus = <&smmu 0x243>; */ + #clock-cells = <1>; + clock-output-names = "clk_out_sd1", "clk_in_sd1"; + }; + + serial0: serial@f1920000 { + bootph-all; + compatible = "arm,pl011", "arm,primecell"; + status = "disabled"; + reg = <0 0xf1920000 0 0x1000>; + interrupts = <0 25 4>; + reg-io-width = <4>; + clock-names = "uartclk", "apb_pclk"; + }; + + serial1: serial@f1930000 { + bootph-all; + compatible = "arm,pl011", "arm,primecell"; + status = "disabled"; + reg = <0 0xf1930000 0 0x1000>; + interrupts = <0 26 4>; + reg-io-width = <4>; + clock-names = "uartclk", "apb_pclk"; + }; + + smmu: iommu@ec000000 { + compatible = "arm,smmu-v3"; + status = "disabled"; + reg = <0 0xec000000 0 0x40000>; + #iommu-cells = <1>; + interrupt-names = "combined"; + interrupts = <0 169 4>; + dma-coherent; + }; + + spi0: spi@f1960000 { + compatible = "cdns,spi-r1p6"; + status = "disabled"; + interrupts = <0 23 4>; + reg = <0 0xf1960000 0 0x1000>; + clock-names = "ref_clk", "pclk"; + }; + + spi1: spi@f1970000 { + compatible = "cdns,spi-r1p6"; + status = "disabled"; + interrupts = <0 24 4>; + reg = <0 0xf1970000 0 0x1000>; + clock-names = "ref_clk", "pclk"; + }; + + sysmon0: sysmon@f1270000 { + compatible = "xlnx,versal-sysmon"; + status = "disabled"; + #io-channel-cells = <0>; + reg = <0x0 0xf1270000 0x0 0x4000>; + interrupts = <0 202 4>; + xlnx,numchannels = /bits/8 <0>; + }; + + ttc0: timer@f1dc0000 { + compatible = "cdns,ttc"; + status = "disabled"; + interrupts = <0 43 4>, <0 44 4>, <0 45 4>; + timer-width = <32>; + reg = <0x0 0xf1dc0000 0x0 0x1000>; + }; + + ttc1: timer@f1dd0000 { + compatible = "cdns,ttc"; + status = "disabled"; + interrupts = <0 46 4>, <0 47 4>, <0 48 4>; + timer-width = <32>; + reg = <0x0 0xf1dd0000 0x0 0x1000>; + }; + + ttc2: timer@f1de0000 { + compatible = "cdns,ttc"; + status = "disabled"; + interrupts = <0 49 4>, <0 50 4>, <0 51 4>; + timer-width = <32>; + reg = <0x0 0xf1de0000 0x0 0x1000>; + }; + + ttc3: timer@f1df0000 { + compatible = "cdns,ttc"; + status = "disabled"; + interrupts = <0 52 4>, <0 53 4>, <0 54 4>; + timer-width = <32>; + reg = <0x0 0xf1df0000 0x0 0x1000>; + }; + + usb0: usb@f1e00000 { + compatible = "xlnx,versal-dwc3"; + status = "disabled"; + reg = <0 0xf1e00000 0 0x100>; + clock-names = "bus_clk", "ref_clk"; + ranges; + #address-cells = <2>; + #size-cells = <2>; + + dwc3_0: usb@f1b00000 { + compatible = "snps,dwc3"; + status = "disabled"; + reg = <0 0xf1b00000 0 0x10000>; + interrupt-names = "host", "peripheral", "otg", "wakeup"; + interrupts = <0 29 4>, <0 29 4>, <0 33 4>, <0 98 4>; + /* iommus = <&smmu 0x230>; */ + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + snps,quirk-frame-length-adjustment = <0x20>; + dr_mode = "peripheral"; + maximum-speed = "high-speed"; + snps,usb3_lpm_capable; + clock-names = "ref"; + /* phy-names = "usb3-phy";- checking with Pyiush */ + }; + }; + + usb1: usb@f1e10000 { + compatible = "xlnx,versal-dwc3"; + status = "disabled"; + reg = <0x0 0xf1e10000 0x0 0x100>; + clock-names = "bus_clk", "ref_clk"; + ranges; + #address-cells = <2>; + #size-cells = <2>; + + dwc3_1: usb@f1c00000 { + compatible = "snps,dwc3"; + status = "disabled"; + reg = <0x0 0xf1c00000 0x0 0x10000>; + interrupt-names = "host", "peripheral", "otg", "wakeup"; + interrupts = <0 34 4>, <0 34 4>, <0 38 4>, <0 99 4>; + /* iommus = <&smmu 0x232>; */ + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + snps,quirk-frame-length-adjustment = <0x20>; + dr_mode = "host"; + maximum-speed = "high-speed"; + snps,usb3_lpm_capable; + clock-names = "ref"; + /* phy-names = "usb3-phy"; - checking with Pyiush */ + }; + }; + + wwdt0: watchdog@ecc10000 { + compatible = "xlnx,versal-wwdt"; + status = "disabled"; + reg = <0 0xecc10000 0 0x10000>; + timeout-sec = <30>; + }; + + wwdt1: watchdog@ecd10000 { + compatible = "xlnx,versal-wwdt"; + status = "disabled"; + reg = <0 0xecd10000 0 0x10000>; + timeout-sec = <30>; + }; + + wwdt2: watchdog@ece10000 { + compatible = "xlnx,versal-wwdt"; + status = "disabled"; + reg = <0 0xece10000 0 0x10000>; + timeout-sec = <30>; + }; + + wwdt3: watchdog@ecf10000 { + compatible = "xlnx,versal-wwdt"; + status = "disabled"; + reg = <0 0xecf10000 0 0x10000>; + timeout-sec = <30>; + }; + + lpd_wwdt0: watchdog@ea420000 { + compatible = "xlnx,versal-wwdt"; + status = "disabled"; + reg = <0 0xea420000 0 0x10000>; + timeout-sec = <30>; + }; + + lpd_wwdt1: watchdog@ea430000 { + compatible = "xlnx,versal-wwdt"; + status = "disabled"; + reg = <0 0xea430000 0 0x10000>; + timeout-sec = <30>; + }; + + xilsem_edac: edac@f2014050 { + compatible = "xlnx,versal-xilsem-edac"; + status = "disabled"; + reg = <0x0 0xf2014050 0x0 0xc4>; + }; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-v350-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-v350-revA.dts @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal v350 revA + * + * (C) Copyright 2019, Xilinx, Inc. + * + * Michal Simek + */ + +#include "versal.dtsi" +#include "versal-clk.dtsi" +#include + +/ { + compatible = "xlnx,versal-v350-revA", "xlnx,versal"; + model = "Xilinx Versal v350 board revA"; + + chosen { + bootargs = "console=ttyAMA0 earlycon=pl011,mmio32,0xFF010000,115200n8"; + stdout-path = "serial0:115200"; + }; + + aliases { + serial0 = &serial0; + serial1 = &serial1; + serial2 = &dcc; + spi0 = &ospi; + }; + + memory: memory@0 { + device_type = "memory"; /* 16GB total via MC0/1/2/3 */ + reg = <0 0 0 0x80000000>; /* 2GB here */ + /* <0x8 0x0 0x3 0x80000000> */ /* 12GB - enable it later */ + }; +}; + +&ospi { + status = "okay"; + bus-num = <2>; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + + flash@0 { + compatible = "mt35xu02g", "micron,m25p80", "jedec,spi-nor"; + reg = <0>; + #address-cells = <0x1>; + #size-cells = <0x1>; + cdns,read-delay = <0x0>; + cdns,tshsl-ns = <0x0>; + cdns,tsd2d-ns = <0x0>; + cdns,tchsh-ns = <0x1>; + cdns,tslch-ns = <0x1>; + spi-tx-bus-width = <8>; + spi-rx-bus-width = <8>; + spi-max-frequency = <20000000>; + no-wp; + reset-gpios = <&gpio1 0xc GPIO_ACTIVE_LOW>; + partition@0 { + label = "spi0-flash0"; + reg = <0x0 0x8000000>; + }; + }; +}; + +&dcc { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&serial0 { + status = "okay"; +}; + +&serial1 { + status = "disabled"; /* communication with MSP432 */ +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vc-p-a2197-00-revA-x-prc-01-revA-ospi.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vc-p-a2197-00-revA-x-prc-01-revA-ospi.dts @@ -0,0 +1,91 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal X-PRC-01 revA (SE1) + * + * (C) Copyright 2019, Xilinx, Inc. + * + * Michal Simek + */ + +#include "versal-vc-p-a2197-00-revA-x-prc-01-revA.dts" +#include + +/ { + compatible = "xlnx,versal-vc-p-a2197-00-revA-x-prc-01-revA", + "xlnx,versal-vc-p-a2197-00-revA", + "xlnx,versal-vc-p-a2197-00", + "xlnx,versal-vc-p-a2197", "xlnx,versal"; + model = "Xilinx Versal A2197 Processor board revA - x-prc-01 revA OSPI"; + + aliases { + spi0 = &ospi; + }; +}; + +/* Mutually exclusive */ +&ospi { + status = "okay"; /* U97 MT35XU02G */ + bus-num = <2>; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + reset-names = "qspi"; + resets = <&versal_reset VERSAL_RST_OSPI>; + + flash@0 { + compatible = "mt35xu02g", "micron,m25p80", "jedec,spi-nor"; + reg = <0>; + #address-cells = <0x1>; + #size-cells = <0x1>; + cdns,read-delay = <0x0>; + cdns,tshsl-ns = <0x0>; + cdns,tsd2d-ns = <0x0>; + cdns,tchsh-ns = <0x1>; + cdns,tslch-ns = <0x1>; + spi-tx-bus-width = <8>; + spi-rx-bus-width = <8>; + spi-max-frequency = <20000000>; + no-wp; + reset-gpios = <&gpio1 0xc GPIO_ACTIVE_LOW>; + partition@0 { + label = "spi0-flash0"; + reg = <0x0 0x8000000>; + }; + }; +}; + +&qspi { + status = "disabled"; +}; + +&lpd_dma_chan0 { + status = "okay"; +}; + +&lpd_dma_chan1 { + status = "okay"; +}; + +&lpd_dma_chan2 { + status = "okay"; +}; + +&lpd_dma_chan3 { + status = "okay"; +}; + +&lpd_dma_chan4 { + status = "okay"; +}; + +&lpd_dma_chan5 { + status = "okay"; +}; + +&lpd_dma_chan6 { + status = "okay"; +}; + +&lpd_dma_chan7 { + status = "okay"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vc-p-a2197-00-revA-x-prc-01-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vc-p-a2197-00-revA-x-prc-01-revA.dts @@ -0,0 +1,164 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal X-PRC-01 revA (SE1) + * + * (C) Copyright 2019, Xilinx, Inc. + * + * Michal Simek + */ + +#include "versal-vc-p-a2197-00-revA.dts" + +/ { + compatible = "xlnx,versal-vc-p-a2197-00-revA-x-prc-01-revA", + "xlnx,versal-vc-p-a2197-00-revA", + "xlnx,versal-vc-p-a2197-00", + "xlnx,versal-vc-p-a2197", "xlnx,versal"; + model = "Xilinx Versal A2197 Processor board revA - x-prc-01 revA QSPI"; + + chosen { + bootargs = "console=ttyAMA0 earlycon=pl011,mmio32,0xFF000000,115200n8"; + stdout-path = "serial0:115200"; + }; + + aliases { + serial0 = &serial0; + ethernet0 = &gem0; + ethernet1 = &gem1; + i2c0 = &i2c1; + mmc0 = &sdhci1; + spi0 = &qspi; + usb0 = &usb0; + rtc0 = &rtc; + }; +}; + +&can0 { + status = "okay"; +}; + +&can1 { + status = "okay"; +}; + +&qspi { + status = "okay"; /* u93 and u92 */ + num-cs = <2>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + + flash@0 { + compatible = "m25p80", "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */ + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + spi-max-frequency = <35000000>; + partition@0 { + label = "spi0-flash0"; + reg = <0x0 0x8000000>; + }; + }; +}; + +&sdhci1 { /* U104 */ + status = "okay"; + xlnx,mio-bank = <1>; +}; + +&serial0 { + status = "okay"; +}; + +&gem0 { + status = "okay"; + phy-handle = <&phy1>; /* u128 */ + phy-mode = "rgmii-id"; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + phy1: phy@1 { + #phy-cells = <1>; + compatible = "ethernet-phy-id2000.a231"; + reg = <1>; + ti,rx-internal-delay = <0xb>; + ti,tx-internal-delay = <0xa>; + ti,fifo-depth = <1>; + ti,dp83867-rxctrl-strap-quirk; + }; + phy2: phy@2 { + #phy-cells = <1>; + compatible = "ethernet-phy-id2000.a231"; + reg = <2>; + ti,rx-internal-delay = <0xb>; + ti,tx-internal-delay = <0xa>; + ti,fifo-depth = <1>; + ti,dp83867-rxctrl-strap-quirk; + }; + }; +}; + +&gem1 { + status = "okay"; + phy-handle = <&phy2>; /* u134 */ + phy-mode = "rgmii-id"; +}; + +&i2c1 { + status = "okay"; + clock-frequency = <400000>; + eeprom_versal: eeprom@51 { /* U116 */ + compatible = "st,24c128", "atmel,24c128"; + reg = <0x51>; + }; + + /* FIXME - U117 and U118 */ +}; + +&usb0 { + status = "okay"; +}; + +&dwc3_0 { /* USB 2.0 host - U99 */ + status = "okay"; + dr_mode = "host"; + maximum-speed = "high-speed"; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + snps,usb3_lpm_capable; + phy-names = "usb3-phy"; +}; + +&lpd_dma_chan0 { + status = "okay"; +}; + +&lpd_dma_chan1 { + status = "okay"; +}; + +&lpd_dma_chan2 { + status = "okay"; +}; + +&lpd_dma_chan3 { + status = "okay"; +}; + +&lpd_dma_chan4 { + status = "okay"; +}; + +&lpd_dma_chan5 { + status = "okay"; +}; + +&lpd_dma_chan6 { + status = "okay"; +}; + +&lpd_dma_chan7 { + status = "okay"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vc-p-a2197-00-revA-x-prc-02-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vc-p-a2197-00-revA-x-prc-02-revA.dts @@ -0,0 +1,135 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal X-PRC-02 revA (SE2) + * + * (C) Copyright 2019, Xilinx, Inc. + * + * Michal Simek + */ + +#include "versal-vc-p-a2197-00-revA.dts" + +/ { + compatible = "xlnx,versal-vc-p-a2197-00-revA-x-prc-02-revA", + "xlnx,versal-vc-p-a2197-00-revA", + "xlnx,versal-vc-p-a2197-00", + "xlnx,versal-vc-p-a2197", "xlnx,versal"; + model = "Xilinx Versal A2197 Processor board revA - x-prc-02 revA"; + + chosen { + bootargs = "console=ttyAMA0 earlycon=pl011,mmio32,0xFF000000,115200n8"; + stdout-path = "serial0:115200"; + }; + + aliases { + serial0 = &serial0; + ethernet0 = &gem0; + i2c0 = &i2c1; + mmc0 = &sdhci0; + mmc1 = &sdhci1; + spi0 = &spi0; + spi1 = &spi1; + usb0 = &usb0; + }; +}; + +&serial0 { + status = "okay"; +}; + +&gem0 { + status = "okay"; + phy-handle = <&phy0>; /* u9 */ + phy-mode = "rgmii-id"; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + phy0: phy@1 { /* Marvell 88E1512; U9 */ + reg = <1>; + }; + }; +}; + +&sdhci0 { + status = "okay"; + xlnx,mio-bank = <1>; +}; + +&sdhci1 { /* U1A */ + status = "okay"; + non-removable; + disable-wp; + no-sd; + no-sdio; + cap-mmc-hw-reset; + bus-width = <8>; + xlnx,mio-bank = <0>; +}; + +&usb0 { + status = "okay"; +}; + +&dwc3_0 { /* U4 */ + status = "okay"; + dr_mode = "peripheral"; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + maximum-speed = "high-speed"; +}; + +&i2c0 { + status = "okay"; + clock-frequency = <400000>; + /* U12 Catalyst EEPROM - AT24 should be equivalent */ + eeprom_versal: eeprom@51 { + compatible = "atmel,24c128"; + reg = <0x51>; + }; + + /* FIXME - U13 and U15 */ +}; + +&can0 { + status = "okay"; +}; + +&can1 { + status = "okay"; +}; + +&spi0 { + status = "okay"; + num-cs = <1>; + + flash@0 { /* U18 */ + #address-cells = <1>; + #size-cells = <1>; + compatible = "sst,sst25vf016b", "m25p80", "jedec,spi-nor"; + spi-max-frequency = <25000000>; + reg = <0>; + + partition@0 { + label = "spi0-flash0"; + reg = <0x0 0x200000>; + }; + }; +}; + +&spi1 { + status = "okay"; + num-cs = <3>; /* FIXME - check SPI1_SS0-2_B */ + + flash@0 { /* U19 */ + #address-cells = <1>; + #size-cells = <1>; + compatible = "sst,sst26vf016b", "m25p80", "jedec,spi-nor"; + spi-max-frequency = <25000000>; + reg = <0>; + + partition@0 { + label = "spi1-flash0"; + reg = <0x0 0x200000>; + }; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vc-p-a2197-00-revA-x-prc-03-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vc-p-a2197-00-revA-x-prc-03-revA.dts @@ -0,0 +1,114 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal X-PRC-03 revA (SE3) + * + * (C) Copyright 2019, Xilinx, Inc. + * + * Michal Simek + */ + +#include "versal-vc-p-a2197-00-revA.dts" + +/ { + compatible = "xlnx,versal-vc-p-a2197-00-revA-x-prc-03-revA", + "xlnx,versal-vc-p-a2197-00-revA", + "xlnx,versal-vc-p-a2197-00", + "xlnx,versal-vc-p-a2197", "xlnx,versal"; + model = "Xilinx Versal A2197 Processor board revA - x-prc-03 revA"; + + chosen { + bootargs = "console=ttyAMA0 earlycon=pl011,mmio32,0xFF000000,115200n8"; + stdout-path = "serial0:115200"; + }; + + aliases { + can0 = &can0; + can1 = &can1; + i2c0 = &i2c1; + mmc0 = &sdhci0; + mmc1 = &sdhci1; + serial0 = &serial0; + spi0 = &qspi; + spi1 = &spi0; + }; +}; + +/* SMAP via cc108 */ + +&can0 { + status = "okay"; +}; + +&can1 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + clock-frequency = <400000>; + /* Must be enabled via J90/J91 */ + eeprom_versal: eeprom@51 { /* U2 - 128kb RM24C128DS */ + compatible = "atmel,24c128"; + reg = <0x51>; + }; +}; + +&qspi { + status = "okay"; /* u7 */ + num-cs = <2>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "m25p80", "jedec,spi-nor"; /* 64Mb */ + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */ + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + spi-max-frequency = <108000000>; + partition@0 { + label = "spi0-flash0"; + reg = <0x0 0x800000>; + }; + }; +}; + +&serial0 { + status = "okay"; +}; + +&sdhci0 { /* J99 MIO28 - MIO33 */ + status = "okay"; + xlnx,mio-bank = <1>; /* FIXME */ +}; + +&sdhci1 { /* EMMC IS21ES08G 200MHz MIO40 - MIO49 */ + status = "okay"; + non-removable; + disable-wp; + no-sd; + no-sdio; + cap-mmc-hw-reset; + bus-width = <8>; + xlnx,mio-bank = <0>; /* FIXME */ +}; + +&spi0 { + status = "okay"; + num-cs = <1>; + + flash@0 { /* U6 - IS25LQ032B - 16Mb */ + #address-cells = <1>; + #size-cells = <1>; + compatible = "issi,is25lq032b", "m25p80", "jedec,spi-nor"; + spi-max-frequency = <104000000>; + reg = <0>; + + partition@0 { + label = "spi0-flash0"; + reg = <0 0x200000>; + }; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vc-p-a2197-00-revA-x-prc-04-revA-ospi.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vc-p-a2197-00-revA-x-prc-04-revA-ospi.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal X-PRC-04 revA (SE4) + * + * (C) Copyright 2019, Xilinx, Inc. + * + * Michal Simek + */ + +#include "versal-vc-p-a2197-00-revA-x-prc-04-revA.dts" + +/ { + chosen { + bootargs = "console=ttyAMA0 earlycon=pl011,mmio32,0xFF000000,115200n8"; + stdout-path = "serial0:115200"; + }; + + aliases { + spi0 = &ospi; + }; +}; + +/* Mutually exclusive with qspi */ +&ospi { + status = "okay"; /* U163/U97 MT35XU02G */ +}; + +&qspi { + status = "disabled"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vc-p-a2197-00-revA-x-prc-04-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vc-p-a2197-00-revA-x-prc-04-revA.dts @@ -0,0 +1,142 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal X-PRC-04 revA (SE4) + * + * (C) Copyright 2019, Xilinx, Inc. + * + * Michal Simek + */ + +#include "versal-vc-p-a2197-00-revA.dts" + +/ { + compatible = "xlnx,versal-vc-p-a2197-00-revA-x-prc-04-revA", + "xlnx,versal-vc-p-a2197-00-revA", + "xlnx,versal-vc-p-a2197-00", + "xlnx,versal-vc-p-a2197", "xlnx,versal"; + model = "Xilinx Versal A2197 Processor board revA - x-prc-04 revA"; + + chosen { + bootargs = "console=ttyAMA0 earlycon=pl011,mmio32,0xFF000000,115200n8"; + stdout-path = "serial0:115200"; + }; + + aliases { + serial0 = &serial0; + serial1 = &serial1; + ethernet1 = &gem1; + i2c0 = &i2c0; + i2c1 = &i2c1; + mmc0 = &sdhci1; + spi0 = &qspi; + spi1 = &spi0; + usb0 = &usb0; + }; +}; + +&gem1 { + status = "okay"; + phy-handle = <&phy1>; /* u175 */ + phy-mode = "rgmii-id"; /* RTL8211DN */ + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + phy1: phy@1 { + reg = <2>; + }; + }; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + clock-frequency = <400000>; + eeprom_versal: eeprom@51 { /* U153 */ + compatible = "st,24c128", "atmel,24c128"; + reg = <0x51>; + }; +}; + +&i2c1 { + status = "okay"; + clock-frequency = <400000>; + eeprom: eeprom@51 { /* U155 */ + compatible = "st,24c128", "atmel,24c128"; + reg = <0x51>; + }; +}; + +&qspi { + status = "okay"; /* u93 and u92 and u161 and u160 */ + num-cs = <2>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "m25p80", "jedec,spi-nor"; /* 512MB */ + reg = <0>, <1>; + stacked-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */ + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + spi-max-frequency = <108000000>; + partition@0 { + label = "spi0-flash0"; + reg = <0x0 0x20000000>; + }; + }; +}; + +&sdhci1 { /* J3 MIO26, MIO29 - MIO33 */ + status = "okay"; + disable-wp; + xlnx,mio-bank = <1>; /* FIXME */ +}; + +&serial0 { /* MIO35 - MIO37 */ + status = "okay"; +}; + +&serial1 { /* MIO4 - MIO7 RS232 */ + status = "okay"; +}; + +&spi0 { + status = "okay"; + num-cs = <1>; + + flash@0 { /* U171 - IS25LP016B - 16Mb */ + #address-cells = <1>; + #size-cells = <1>; + compatible = "issi,is25lp016b", "m25p80", "jedec,spi-nor"; + spi-max-frequency = <104000000>; + reg = <0>; + + partition@0 { + label = "spi0-flash0"; + reg = <0 0x200000>; + }; + }; +}; + +&usb0 { + status = "okay"; +}; + +&dwc3_0 { /* USB 2.0 host - U99 */ + status = "okay"; + dr_mode = "host"; + maximum-speed = "high-speed"; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + snps,usb3_lpm_capable; + phy-names = "usb3-phy"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vc-p-a2197-00-revA-x-prc-05-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vc-p-a2197-00-revA-x-prc-05-revA.dts @@ -0,0 +1,131 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal X-PRC-05 revA (SE5) + * + * (C) Copyright 2019, Xilinx, Inc. + * + * Michal Simek + */ + +#include "versal-vc-p-a2197-00-revA.dts" +#include + +/ { + compatible = "xlnx,versal-vc-p-a2197-00-revA-x-prc-05-revA", + "xlnx,versal-vc-p-a2197-00-revA", + "xlnx,versal-vc-p-a2197-00", + "xlnx,versal-vc-p-a2197", "xlnx,versal"; + model = "Xilinx Versal A2197 Processor board revA - x-prc-05 revA"; + + chosen { + bootargs = "console=ttyAMA0 earlycon=pl011,mmio32,0xFF000000,115200n8"; + stdout-path = "serial0:115200"; + }; + + aliases { + serial0 = &serial0; + ethernet0 = &gem0; + ethernet1 = &gem1; + i2c0 = &i2c0; + mmc0 = &sdhci0; + mmc1 = &sdhci1; + spi0 = &qspi; + usb0 = &usb0; + }; +}; + +&gem0 { + status = "okay"; + phy-handle = <&phy1>; + phy-mode = "rgmii-id"; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + phy1: phy@1 { /* 88e1510 */ + reg = <1>; + }; + phy2: phy@2 { /* VSC8531 */ + reg = <2>; + rx-internal-delay-ps = <2600>; + tx-internal-delay-ps = <2600>; + }; + }; +}; + +&gem1 { + status = "okay"; + phy-handle = <&phy2>; + phy-mode = "rgmii-id"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + clock-frequency = <400000>; + eeprom_versal: eeprom@51 { + compatible = "st,24c128", "atmel,24c128"; + reg = <0x51>; + }; +}; + +&qspi { + status = "okay"; + num-cs = <0x1>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + + flash@0 { /* MX25U12835 128Mbit */ + #address-cells = <1>; + #size-cells = <1>; + compatible = "m25p80", "jedec,spi-nor"; /* 16MB */ + reg = <0>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + spi-max-frequency = <104000000>; + partition@0 { + label = "spi0-flash0"; + reg = <0x0 0x1000000>; + }; + }; +}; + +&sdhci0 { /* emmc0 */ + status = "okay"; + non-removable; + disable-wp; + no-sd; + no-sdio; + cap-mmc-hw-reset; + bus-width = <8>; + xlnx,mio-bank = <0>; /* FIXME */ +}; + +&sdhci1 { /* connector */ + status = "okay"; + xlnx,mio-bank = <1>; /* FIXME */ +}; + +&serial0 { + status = "okay"; +}; + +&usb0 { + status = "okay"; +}; + +&dwc3_0 { /* USB 2.0 host */ + status = "okay"; + dr_mode = "host"; + maximum-speed = "high-speed"; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + snps,usb3_lpm_capable; + phy-names = "usb3-phy"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vc-p-a2197-00-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vc-p-a2197-00-revA.dts @@ -0,0 +1,55 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal + * + * (C) Copyright 2019, Xilinx, Inc. + * + * Michal Simek + */ + +#include "versal.dtsi" +#include "versal-clk.dtsi" + +/ { + compatible = "xlnx,versal-vc-p-a2197-00-revA", + "xlnx,versal-vc-p-a2197-00", + "xlnx,versal-vc-p-a2197", "xlnx,versal"; + model = "Xilinx Versal A2197 Processor board revA"; + + aliases { + serial2 = &dcc; + }; + + memory: memory@0 { + device_type = "memory"; + reg = <0 0 0 0x80000000>, <0x8 0x0 0x1 0x80000000>; + }; +}; + +&dcc { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&rtc { + status = "okay"; +}; + +&sdhci0 { + no-1-8-v; +}; + +&sdhci1 { + no-1-8-v; +}; + +&watchdog { + status = "okay"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vck190-rev1.1-x-ebm-01-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vck190-rev1.1-x-ebm-01-revA.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal vck190 rev1.1 with X-EBM-01-revA module + * + * (C) Copyright 2019 - 2021, Xilinx, Inc. + * + * Michal Simek + */ + +#include "versal-vmk180-rev1.1-x-ebm-01-revA.dts" + +/ { + compatible = "xlnx,versal-vck190-rev1.1-x-ebm-01-revA", + "xlnx,versal-vck190-rev1.1", "xlnx,versal"; + model = "Xilinx Versal vck190 Eval board rev1.1 (QSPI)"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vck190-rev1.1-x-ebm-02-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vck190-rev1.1-x-ebm-02-revA.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal vck190 rev1.1 with X-EBM-02-revA module + * + * (C) Copyright 2020 - 2021, Xilinx, Inc. + * + * Michal Simek + */ + +#include "versal-vmk180-rev1.1-x-ebm-02-revA.dts" + +/ { + compatible = "xlnx,versal-vck190-rev1.1-x-ebm-02-revA", + "xlnx,versal-vck190-rev1.1", "xlnx,versal"; + model = "Xilinx Versal vck190 Eval board rev1.1 (EMMC)"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vck190-rev1.1-x-ebm-03-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vck190-rev1.1-x-ebm-03-revA.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal vck190 rev1.1 with X-EBM-03-revA module + * + * (C) Copyright 2020 - 2021, Xilinx, Inc. + * + * Michal Simek + */ + +#include "versal-vmk180-rev1.1-x-ebm-03-revA.dts" + +/ { + compatible = "xlnx,versal-vck190-rev1.1-x-ebm-03-revA", + "xlnx,versal-vck190-rev1.1", "xlnx,versal"; + model = "Xilinx Versal vck190 Eval board rev1.1 (OSPI)"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vck190-rev1.1.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vck190-rev1.1.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal vck190 rev1.1 + * + * (C) Copyright 2019 - 2021, Xilinx, Inc. + * + * Michal Simek + */ + +#include "versal-vmk180-rev1.1.dts" + +/ { + compatible = "xlnx,versal-vck190-rev1.1", "xlnx,versal"; + model = "Xilinx Versal vck190 Eval board rev1.1"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vck190-revA-x-ebm-01-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vck190-revA-x-ebm-01-revA.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal vck190 revA with X-EBM-01-revA module + * + * (C) Copyright 2019, Xilinx, Inc. + * + * Michal Simek + */ + +#include "versal-vmk180-revA-x-ebm-01-revA.dts" + +/ { + compatible = "xlnx,versal-vck190-revA-x-ebm-01-revA", + "xlnx,versal-vck190-revA", "xlnx,versal"; + model = "Xilinx Versal vck190 Eval board revA (QSPI)"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vck190-revA-x-ebm-02-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vck190-revA-x-ebm-02-revA.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal vck190 revA with X-EBM-02-revA module + * + * (C) Copyright 2020, Xilinx, Inc. + * + * Michal Simek + */ + +#include "versal-vmk180-revA-x-ebm-02-revA.dts" + +/ { + compatible = "xlnx,versal-vck190-revA-x-ebm-02-revA", + "xlnx,versal-vck190-revA", "xlnx,versal"; + model = "Xilinx Versal vck190 Eval board revA (EMMC)"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vck190-revA-x-ebm-03-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vck190-revA-x-ebm-03-revA.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal vck190 revA with X-EBM-03-revA module + * + * (C) Copyright 2020, Xilinx, Inc. + * + * Michal Simek + */ + +#include "versal-vmk180-revA-x-ebm-03-revA.dts" + +/ { + compatible = "xlnx,versal-vck190-revA-x-ebm-03-revA", + "xlnx,versal-vck190-revA", "xlnx,versal"; + model = "Xilinx Versal vck190 Eval board revA (OSPI)"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vck190-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vck190-revA.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal vck190 revA + * + * (C) Copyright 2019, Xilinx, Inc. + * + * Michal Simek + */ + +#include "versal-vmk180-revA.dts" + +/ { + compatible = "xlnx,versal-vck190-revA", "xlnx,versal"; + model = "Xilinx Versal vck190 Eval board revA"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vck5000-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vck5000-revA.dts @@ -0,0 +1,83 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal vck5000 revA + * + * (C) Copyright 2020, Xilinx, Inc. + * + * Michal Simek + */ + +#include "versal.dtsi" +#include "versal-clk.dtsi" +#include + +/ { + compatible = "xlnx,versal-vck5000-revA", "xlnx,versal"; + model = "Xilinx Versal vck5000 board revA"; + + chosen { + bootargs = "console=ttyAMA0 earlycon=pl011,mmio32,0xFF000000,115200n8"; + stdout-path = "serial0:115200"; + }; + + aliases { + serial0 = &serial0; + serial1 = &serial1; + serial2 = &dcc; + spi0 = &ospi; + }; + + memory: memory@0 { + device_type = "memory"; /* 16GB total via MC0/1/2/3 */ + reg = <0 0 0 0x80000000>, <0x8 0x0 0x3 0x80000000>; + }; +}; + +&ospi { + status = "okay"; + bus-num = <2>; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + + flash@0 { + compatible = "mt35xu02g", "micron,m25p80", "jedec,spi-nor"; + reg = <0>; + #address-cells = <0x1>; + #size-cells = <0x1>; + cdns,read-delay = <0x0>; + cdns,tshsl-ns = <0x0>; + cdns,tsd2d-ns = <0x0>; + cdns,tchsh-ns = <0x1>; + cdns,tslch-ns = <0x1>; + spi-tx-bus-width = <8>; + spi-rx-bus-width = <8>; + spi-max-frequency = <20000000>; + no-wp; + reset-gpios = <&gpio1 0xc GPIO_ACTIVE_LOW>; + partition@0 { + label = "spi0-flash0"; + reg = <0x0 0x10000000>; + }; + }; +}; + +&dcc { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&serial0 { + status = "okay"; +}; + +&serial1 { + status = "disabled"; /* communication with MSP432 */ +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vek280-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vek280-revA.dts @@ -0,0 +1,187 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal VEK280 revA + * + * (C) Copyright 2022, Advanced Micro Devices, Inc + * + * Michal Simek + */ + +#include +#include +#include "versal.dtsi" +#include "versal-clk.dtsi" + +/ { + compatible = "xlnx,versal-vek280-revA", "xlnx,versal-vek280", + "xlnx,versal"; + model = "Xilinx Versal vek280 Eval board revA"; + + memory: memory@0 { + device_type = "memory"; + reg = <0 0 0 0x80000000>, <0x8 0x0 0x1 0x80000000>; /* 2GB + 6GB */ + }; + + chosen { + bootargs = "console=ttyAMA0 earlycon=pl011,mmio32,0xFF000000,115200n8"; + stdout-path = "serial0:115200"; + }; + + aliases { + serial0 = &serial0; + serial2 = &dcc; + i2c0 = &i2c0; + i2c1 = &i2c1; + mmc0 = &sdhci1; + spi0 = &ospi; + usb0 = &usb0; + rtc0 = &rtc; + }; +}; + +/* VADJ_FMC_EN - LPD MIO23 */ +/* FAN - LPD MIO21/22 */ +/* VCC_PL_EN - LPD MIO20 */ +/* PCIE_PERST - LPD MIO18/19 */ +/* SD_BUSPWR - PMC MIO51 */ +/* PCIE_WAKE - PMC MIO50 */ +/* VCCPSLP_EN - PMC MIO49 */ +/* I2C SYSMON - PMC MIO39 - 41 */ +/* PCIE_PWRBRK - PMC MIO38 */ +/* ZU4_TRIGGER - PMC MIO37 */ +/* VCC_AUX_1V2 - MIO11 */ + +&ospi { /* PMC MIO0-10, 12, U297 MT35XU02G */ + status = "okay"; + bus-num = <2>; + num-cs = <1>; + #stream-id-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + + flash@0 { + compatible = "mt35xu02g", "micron,m25p80", "jedec,spi-nor"; + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + cdns,read-delay = <0>; + cdns,tshsl-ns = <0>; + cdns,tsd2d-ns = <0>; + cdns,tchsh-ns = <1>; + cdns,tslch-ns = <1>; + spi-tx-bus-width = <8>; + spi-rx-bus-width = <8>; + spi-max-frequency = <20000000>; + no-wp; + reset-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; + partition@0 { + label = "spi0-flash0"; + reg = <0 0x8000000>; + }; + }; +}; + +&usb0 { /* PMC_MIO13_500 - PMC_MIO25 USB 2.0 */ + status = "okay"; +}; + +&dwc3_0 { /* USB 2.0 host */ + status = "okay"; + dr_mode = "host"; + maximum-speed = "high-speed"; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + snps,usb3_lpm_capable; +}; + +&sdhci1 { /* PMC_MIO26-36/51 */ + status = "okay"; + xlnx,mio-bank = <1>; + no-1-8-v; +}; + +&serial0 { /* PMC_MIO42/43 */ + status = "okay"; +}; + +&i2c0 { /* PMC_MIO46/47 */ + status = "okay"; +}; + +&i2c1 { /* PMC_MIO44/45 */ + status = "okay"; +}; + +&dcc { + status = "okay"; +}; + +&rtc { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&gem0 { /* PMC_MIO_48, LPD_MIO0-11/24/25 */ + status = "okay"; + phy-handle = <&phy1>; + phy-mode = "rgmii-id"; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + phy1: ethernet-phy@1 { /* u198 */ + #phy-cells = <1>; + compatible = "ethernet-phy-id2000.a231"; + reg = <1>; + ti,rx-internal-delay = ; + ti,tx-internal-delay = ; + ti,fifo-depth = <1>; + ti,dp83867-rxctrl-strap-quirk; + reset-assert-us = <100>; + reset-deassert-us = <280>; + reset-gpios = <&gpio1 48 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&lpd_dma_chan0 { + status = "okay"; +}; + +&lpd_dma_chan1 { + status = "okay"; +}; + +&lpd_dma_chan2 { + status = "okay"; +}; + +&lpd_dma_chan3 { + status = "okay"; +}; + +&lpd_dma_chan4 { + status = "okay"; +}; + +&lpd_dma_chan5 { + status = "okay"; +}; + +&lpd_dma_chan6 { + status = "okay"; +}; + +&lpd_dma_chan7 { + status = "okay"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vek280-revB.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vek280-revB.dts @@ -0,0 +1,200 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal VEK280 revB + * + * (C) Copyright 2022, Advanced Micro Devices, Inc + * + * Michal Simek + */ + +#include +#include +#include "versal.dtsi" +#include "versal-clk.dtsi" + +/ { + compatible = "xlnx,versal-vek280-revB", "xlnx,versal-vek280", + "xlnx,versal"; + model = "Xilinx Versal vek280 Eval board revB"; + + memory: memory@0 { + device_type = "memory"; + reg = <0 0 0 0x80000000>, <0x8 0x00000000 0x1 0x80000000>; /* 2GB + 6GB */ + }; + + chosen { + bootargs = "console=ttyAMA0 earlycon=pl011,mmio32,0xFF000000,115200n8"; + stdout-path = "serial0:115200"; + }; + + aliases { + serial0 = &serial0; + serial2 = &dcc; + i2c0 = &i2c0; + i2c1 = &i2c1; + mmc0 = &sdhci1; + spi0 = &ospi; + usb0 = &usb0; + rtc0 = &rtc; + nvmem0 = &eeprom; + }; +}; + +/* VADJ_FMC_EN - LPD MIO23 */ +/* FAN - LPD MIO21/22 */ +/* VCC_PL_EN - LPD MIO20 */ +/* PCIE_PERST - LPD MIO18/19 */ +/* SD_BUSPWR - PMC MIO51 */ +/* PCIE_WAKE - PMC MIO50 */ +/* VCCPSLP_EN - PMC MIO49 */ +/* I2C SYSMON - PMC MIO39 - 41 */ +/* PCIE_PWRBRK - PMC MIO38 */ +/* ZU4_TRIGGER - PMC MIO37 */ +/* VCC_AUX_1V2 - MIO11 */ + +&can0 { + status = "okay"; +}; + +&ospi { /* PMC MIO0-10, 12, U297 MT35XU02G */ + status = "okay"; + bus-num = <2>; + num-cs = <1>; + #stream-id-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + + flash@0 { + compatible = "mt35xu02g", "micron,m25p80", "jedec,spi-nor"; + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + cdns,read-delay = <0>; + cdns,tshsl-ns = <0>; + cdns,tsd2d-ns = <0>; + cdns,tchsh-ns = <1>; + cdns,tslch-ns = <1>; + spi-tx-bus-width = <8>; + spi-rx-bus-width = <8>; + spi-max-frequency = <20000000>; + no-wp; + reset-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; + partition@0 { + label = "spi0-flash0"; + reg = <0 0x8000000>; + }; + }; +}; + +&usb0 { /* PMC_MIO13_500 - PMC_MIO25 USB 2.0 */ + status = "okay"; +}; + +&dwc3_0 { /* USB 2.0 host */ + status = "okay"; + dr_mode = "host"; + maximum-speed = "high-speed"; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + snps,usb3_lpm_capable; +}; + +&sdhci1 { /* PMC_MIO26-36/51 */ + status = "okay"; + xlnx,mio-bank = <1>; + no-1-8-v; +}; + +&serial0 { /* PMC_MIO42/43 */ + status = "okay"; +}; + +&i2c0 { /* PMC_MIO46/47 */ + status = "okay"; +}; + +&i2c1 { /* PMC_MIO44/45 */ + status = "okay"; + bootph-all; + clock-frequency = <100000>; + + /* Use for storing information about SC board */ + eeprom: eeprom@54 { /* u34 - m24128 16kB */ + compatible = "st,24c128", "atmel,24c128"; + reg = <0x54>; /* & 0x5c */ + bootph-all; + }; +}; + +&dcc { + status = "okay"; +}; + +&rtc { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&gem0 { /* PMC_MIO_48, LPD_MIO0-11/24/25 */ + status = "okay"; + phy-handle = <&phy0>; + phy-mode = "rgmii-id"; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + phy0: ethernet-phy@1 { /* u198 - ADI1300 */ + #phy-cells = <1>; + compatible = "ethernet-phy-id0283.bc30"; + reg = <1>; + adi,rx-internal-delay-ps = <2000>; + adi,tx-internal-delay-ps = <2000>; + adi,fifo-depth-bits = <8>; + reset-gpios = <&gpio1 48 GPIO_ACTIVE_LOW>; + reset-assert-us = <10>; + reset-deassert-us = <5000>; + }; + }; +}; + +&lpd_dma_chan0 { + status = "okay"; +}; + +&lpd_dma_chan1 { + status = "okay"; +}; + +&lpd_dma_chan2 { + status = "okay"; +}; + +&lpd_dma_chan3 { + status = "okay"; +}; + +&lpd_dma_chan4 { + status = "okay"; +}; + +&lpd_dma_chan5 { + status = "okay"; +}; + +&lpd_dma_chan6 { + status = "okay"; +}; + +&lpd_dma_chan7 { + status = "okay"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vhk158-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vhk158-revA.dts @@ -0,0 +1,188 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal VHK158 revA + * + * (C) Copyright 2022, Xilinx, Inc. + * + * Michal Simek + */ + +#include +#include +#include "versal.dtsi" +#include "versal-clk.dtsi" + +/ { + compatible = "xlnx,versal-vhk158-revA", "xlnx,versal-vhk158", + "xlnx,versal"; + model = "Xilinx Versal vhk158 Eval board revA"; + + memory: memory@0 { + device_type = "memory"; + reg = <0 0 0 0x80000000>, <0x8 0x0 0x7 0x80000000>; /* 32GB */ + }; + + chosen { + bootargs = "console=ttyAMA0 earlycon=pl011,mmio32,0xFF000000,115200n8"; + stdout-path = "serial0:115200"; + }; + + aliases { + serial0 = &serial0; + serial2 = &dcc; + i2c0 = &i2c0; + i2c1 = &i2c1; + mmc0 = &sdhci1; + spi0 = &ospi; + usb0 = &usb0; + rtc0 = &rtc; + }; +}; + +/* ZU4_TRIGGER - PMC MIO37 */ +/* PCIE_PWRBRK - PMC MIO38 */ +/* I2C SYSMON - PMC MIO39 - 41 */ +/* VCCPSLP_EN - PMC MIO49 */ +/* PCIE_WAKE - PMC MIO50 */ +/* SOC_EN - LPD MIO13 */ +/* PSFP_EN - LPD MIO15 */ +/* AUX_1V2_EN - LPD MIO16 */ +/* HBM_EN - LPD MIO17 */ +/* PCIE_PERST - LPD MIO18/19 */ +/* VCC_PL_EN - LPD MIO20 */ +/* FAN - LPD MIO21/22 */ +/* VADJ_FMC_EN - LPD MIO23 */ + +&ospi { /* PMC MIO0 - 12, U297 MT35XU02G */ + status = "okay"; + bus-num = <2>; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + + flash@0 { + compatible = "mt35xu02g", "micron,m25p80", "jedec,spi-nor"; + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + cdns,read-delay = <0>; + cdns,tshsl-ns = <0>; + cdns,tsd2d-ns = <0>; + cdns,tchsh-ns = <1>; + cdns,tslch-ns = <1>; + spi-tx-bus-width = <8>; + spi-rx-bus-width = <8>; + spi-max-frequency = <20000000>; + no-wp; + reset-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; + partition@0 { + label = "spi0-flash0"; + reg = <0 0x8000000>; + }; + }; +}; + +&usb0 { /* PMC_MIO13_500 - PMC_MIO25 USB 2.0 */ + status = "okay"; +}; + +&dwc3_0 { /* USB 2.0 host */ + status = "okay"; + dr_mode = "host"; + maximum-speed = "high-speed"; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + snps,usb3_lpm_capable; +}; + +&sdhci1 { /* PMC_MIO26-36/51 */ + status = "okay"; + xlnx,mio-bank = <1>; + no-1-8-v; +}; + +&serial0 { /* PMC_MIO42/43 */ + status = "okay"; +}; + +&i2c0 { /* PMC_MIO46/47 */ + status = "okay"; +}; + +&i2c1 { /* PMC_MIO44/45 */ + status = "okay"; +}; + +&dcc { + status = "okay"; +}; + +&rtc { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&gem0 { /* PMC_MIO_48, LPD_MIO0-11/24/25 */ + status = "okay"; + phy-handle = <&phy1>; + phy-mode = "rgmii-id"; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + phy1: ethernet-phy@1 { /* u198 */ + #phy-cells = <1>; + compatible = "ethernet-phy-id2000.a231"; + reg = <1>; + ti,rx-internal-delay = ; + ti,tx-internal-delay = ; + ti,fifo-depth = <1>; + ti,dp83867-rxctrl-strap-quirk; + reset-assert-us = <100>; + reset-deassert-us = <280>; + reset-gpios = <&gpio1 48 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&lpd_dma_chan0 { + status = "okay"; +}; + +&lpd_dma_chan1 { + status = "okay"; +}; + +&lpd_dma_chan2 { + status = "okay"; +}; + +&lpd_dma_chan3 { + status = "okay"; +}; + +&lpd_dma_chan4 { + status = "okay"; +}; + +&lpd_dma_chan5 { + status = "okay"; +}; + +&lpd_dma_chan6 { + status = "okay"; +}; + +&lpd_dma_chan7 { + status = "okay"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vmk180-rev1.1-x-ebm-01-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vmk180-rev1.1-x-ebm-01-revA.dts @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal vmk180 rev1.1 with X-EBM-01-revA module + * + * (C) Copyright 2019 - 2021, Xilinx, Inc. + * + * Michal Simek + */ + +#include "versal-vmk180-rev1.1.dts" + +/ { + compatible = "xlnx,versal-vmk180-rev1.1-x-ebm-01-revA", + "xlnx,versal-vmk180-rev1.1", "xlnx,versal"; + model = "Xilinx Versal vmk180 Eval board rev1.1 (QSPI)"; +}; + +&qspi { +#include "versal-x-ebm-01-revA.dtsi" +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vmk180-rev1.1-x-ebm-02-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vmk180-rev1.1-x-ebm-02-revA.dts @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal vmk180 rev1.1 with X-EBM-02-revA module + * + * (C) Copyright 2020 - 2021, Xilinx, Inc. + * + * Michal Simek + */ + +#include "versal-vmk180-rev1.1.dts" + +/ { + compatible = "xlnx,versal-vmk180-rev1.1-x-ebm-02-revA", + "xlnx,versal-vmk180-rev1.1", "xlnx,versal"; + model = "Xilinx Versal vmk180 Eval board rev1.1 (EMMC)"; +}; + +&sdhci1 { +#include "versal-x-ebm-02-revA.dtsi" +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vmk180-rev1.1-x-ebm-03-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vmk180-rev1.1-x-ebm-03-revA.dts @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal vmk180 rev1.1 with X-EBM-03-revA module + * + * (C) Copyright 2020 - 2021, Xilinx, Inc. + * + * Michal Simek + */ + +#include "versal-vmk180-rev1.1.dts" + +/ { + compatible = "xlnx,versal-vmk180-rev1.1-x-ebm-03-revA", + "xlnx,versal-vmk180-rev1.1", "xlnx,versal"; + model = "Xilinx Versal vmk180 Eval board rev1.1 (OSPI)"; +}; + +&ospi { +#include "versal-x-ebm-03-revA.dtsi" +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vmk180-rev1.1.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vmk180-rev1.1.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal vmk180 rev1.1 + * + * (C) Copyright 2019 - 2021, Xilinx, Inc. + * + * Michal Simek + */ + +#include "versal-vmk180-revA.dts" + +/ { + compatible = "xlnx,versal-vmk180-rev1.1", "xlnx,versal"; + model = "Xilinx Versal vmk180 Eval board rev1.1"; +}; + +&sdhci1 { /* PMC_MIO26-36/51 */ + clk-phase-sd-hs = <111>, <48>; + clk-phase-uhs-sdr25 = <114>, <48>; + clk-phase-uhs-ddr50 = <126>, <36>; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vmk180-revA-x-ebm-01-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vmk180-revA-x-ebm-01-revA.dts @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal vmk180 revA with X-EBM-01-revA module + * + * (C) Copyright 2019, Xilinx, Inc. + * + * Michal Simek + */ + +#include "versal-vmk180-revA.dts" + +/ { + compatible = "xlnx,versal-vmk180-revA-x-ebm-01-revA", + "xlnx,versal-vmk180-revA", "xlnx,versal"; + model = "Xilinx Versal vmk180 Eval board revA (QSPI)"; +}; + +&qspi { +#include "versal-x-ebm-01-revA.dtsi" +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vmk180-revA-x-ebm-02-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vmk180-revA-x-ebm-02-revA.dts @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal vmk180 revA with X-EBM-02-revA module + * + * (C) Copyright 2020, Xilinx, Inc. + * + * Michal Simek + */ + +#include "versal-vmk180-revA.dts" + +/ { + compatible = "xlnx,versal-vmk180-revA-x-ebm-02-revA", + "xlnx,versal-vmk180-revA", "xlnx,versal"; + model = "Xilinx Versal vmk180 Eval board revA (EMMC)"; +}; + +&sdhci1 { +#include "versal-x-ebm-02-revA.dtsi" +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vmk180-revA-x-ebm-03-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vmk180-revA-x-ebm-03-revA.dts @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal vmk180 revA with X-EBM-03-revA module + * + * (C) Copyright 2020, Xilinx, Inc. + * + * Michal Simek + */ + +#include "versal-vmk180-revA.dts" + +/ { + compatible = "xlnx,versal-vmk180-revA-x-ebm-03-revA", + "xlnx,versal-vmk180-revA", "xlnx,versal"; + model = "Xilinx Versal vmk180 Eval board revA (OSPI)"; + + aliases { + spi0 = &ospi; + }; +}; + +&ospi { +#include "versal-x-ebm-03-revA.dtsi" +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vmk180-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vmk180-revA.dts @@ -0,0 +1,171 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal vmk180 revA + * + * (C) Copyright 2019, Xilinx, Inc. + * + * Michal Simek + */ + +#include +#include "versal.dtsi" +#include "versal-clk.dtsi" + +/ { + compatible = "xlnx,versal-vmk180-revA", "xlnx,versal"; + model = "Xilinx Versal vmk180 Eval board revA"; + + memory: memory@0 { + device_type = "memory"; + reg = <0 0 0 0x80000000>, <0x8 0x0 0x1 0x80000000>; + }; + + chosen { + bootargs = "console=ttyAMA0 earlycon=pl011,mmio32,0xFF000000,115200n8"; + stdout-path = "serial0:115200"; + }; + + aliases { + serial0 = &serial0; + serial2 = &dcc; + ethernet0 = &gem0; + ethernet1 = &gem1; + i2c0 = &i2c0; + i2c1 = &i2c1; + mmc0 = &sdhci1; + spi0 = &qspi; + usb0 = &usb0; + rtc0 = &rtc; + }; +}; + +/* PMC_MIO 0 -12 - configuration header QSPI/OSPI/EMMC */ +/* FIXME PMC_MIO37 ZU4_TRIGGER/PMC_MIO37/38 PCIE */ + +&can1 { /* MIO40-41 */ + status = "okay"; +}; + +&dcc { + status = "okay"; +}; + +&rtc { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&sdhci1 { /* PMC_MIO26-36/51 */ + status = "okay"; + xlnx,mio-bank = <1>; + no-1-8-v; +}; + +&serial0 { /* PMC_MIO42/43 */ + status = "okay"; +}; + +&gem0 { /* PMC_MIO_48, LPD_MIO0-11/24/25 */ + status = "okay"; + phy-handle = <&phy1>; /* u198 */ + phy-mode = "rgmii-id"; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy1: ethernet-phy@1 { /* u198 */ + #phy-cells = <1>; + compatible = "ethernet-phy-id2000.a231"; + reg = <1>; + ti,rx-internal-delay = <0xb>; + ti,tx-internal-delay = <0xa>; + ti,fifo-depth = <1>; + ti,dp83867-rxctrl-strap-quirk; + reset-assert-us = <100>; + reset-deassert-us = <280>; + reset-gpios = <&gpio1 48 GPIO_ACTIVE_LOW>; + }; + phy2: ethernet-phy@2 { /* u134 */ + #phy-cells = <1>; + compatible = "ethernet-phy-id2000.a231"; + reg = <2>; + ti,rx-internal-delay = <0xb>; + ti,tx-internal-delay = <0xa>; + ti,fifo-depth = <1>; + ti,dp83867-rxctrl-strap-quirk; + reset-assert-us = <100>; + reset-deassert-us = <280>; + reset-gpios = <&gpio1 49 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&gem1 { /* PMC_MIO_49, LPD_MIO12-23 */ + status = "okay"; + phy-handle = <&phy2>; /* u134 */ + phy-mode = "rgmii-id"; +}; + +&i2c0 { /* PMC_MIO46/47 */ + status = "okay"; +}; + +&i2c1 { /* PMC_MIO44/45 */ + status = "okay"; +}; + +&usb0 { /* PMC_MIO13_500 - PMC_MIO25 USB 2.0 */ + status = "okay"; +}; + +&dwc3_0 { /* USB 2.0 host */ + status = "okay"; + dr_mode = "host"; + maximum-speed = "high-speed"; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + snps,usb3_lpm_capable; +}; + +&lpd_dma_chan0 { + status = "okay"; +}; + +&lpd_dma_chan1 { + status = "okay"; +}; + +&lpd_dma_chan2 { + status = "okay"; +}; + +&lpd_dma_chan3 { + status = "okay"; +}; + +&lpd_dma_chan4 { + status = "okay"; +}; + +&lpd_dma_chan5 { + status = "okay"; +}; + +&lpd_dma_chan6 { + status = "okay"; +}; + +&lpd_dma_chan7 { + status = "okay"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vp-x-a2785-00-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vp-x-a2785-00-revA.dts @@ -0,0 +1,144 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal vp-x-a2785-00 revA + * + * (C) Copyright 2021, Xilinx, Inc. + * + * Michal Simek + */ + +#include "versal.dtsi" +#include "versal-clk.dtsi" + +/ { + model = "Xilinx Versal vp-x-a2785-00 Eval board revA"; + compatible = "xlnx,versal-vp-x-a2785-00-revA", + "xlnx,versal-vp-x-a2785-00", "xlnx,versal"; + + memory: memory@0 { + device_type = "memory"; + reg = <0 0 0 0x80000000>, <0x8 0x0 0x1 0x80000000>; + }; + + chosen { + bootargs = "console=ttyAMA0 earlycon=pl011,mmio32,0xFF000000,115200n8"; + stdout-path = "serial0:115200"; + }; + + aliases { + serial0 = &serial0; + serial2 = &dcc; + ethernet0 = &gem0; + i2c0 = &i2c0; + i2c1 = &i2c1; + mmc0 = &sdhci1; + spi0 = &qspi; + usb0 = &usb0; + rtc0 = &rtc; + }; + /* Missing any LED for heartbeat */ +}; + +&qspi { /* PMC_MIO_500 0 - 12 */ + status = "okay"; /* u93 and u92 */ + num-cs = <2>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + + flash@0 { + compatible = "m25p80", "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */ + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + spi-max-frequency = <35000000>; + partition@0 { + label = "spi0-flash0"; + reg = <0x0 0x8000000>; + }; + }; +}; + +&usb0 { /* PMC_MIO_500 13 - 25 USB 2.0 */ + status = "okay"; +}; + +&dwc3_0 { /* USB 2.0 host */ + status = "okay"; + dr_mode = "host"; + maximum-speed = "high-speed"; /* FIXME */ + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + snps,usb3_lpm_capable; +}; + +&sdhci1 { /* PMC_MIO_501 26 - 36/51 */ + status = "okay"; + xlnx,mio-bank = <1>; + no-1-8-v; +}; + +/* PWM via MIO 41/FAN TACH MIO 49 - FIXME */ + +&serial0 { /* PMC_MIO42/43 */ + status = "okay"; +}; + +&i2c0 { /* PMC_MIO46/47 */ + status = "okay"; +}; + +&i2c1 { /* PMC_MIO44/45 */ + status = "okay"; +}; + +/* PCIe at MIO 38/39/40/50 */ + +&gem0 { /* PMC_MIO_48 - reset, LPD_MIO0-11 , mdio LPD_MIO24/25 */ + status = "okay"; + phy-handle = <&phy1>; /* u198 */ + phy-mode = "rgmii-id"; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + phy1: phy@1 { + #phy-cells = <1>; + compatible = "ethernet-phy-id2000.a231"; + reg = <1>; + ti,rx-internal-delay = <0xb>; + ti,tx-internal-delay = <0xa>; + ti,fifo-depth = <1>; + ti,dp83867-rxctrl-strap-quirk; + }; + }; +}; + +/* LPD_MIO12-23 - PM */ + +&can1 { /* MIO40-41 */ + status = "okay"; +}; + +&dcc { + status = "okay"; +}; + +&rtc { + status = "okay"; +}; + +&gpio0 { + status = "okay"; + /* FIXME Fill names when versal starts */ +}; + +&gpio1 { + status = "okay"; + /* FIXME Fill names when versal starts */ +}; + +&watchdog { + status = "okay"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vpk120-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vpk120-revA.dts @@ -0,0 +1,175 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal vpk120 revA + * + * (C) Copyright 2021, Xilinx, Inc. + * + * Michal Simek + */ + +#include "versal.dtsi" +#include "versal-clk.dtsi" + +/ { + model = "Xilinx Versal vpk120 Eval board revA"; + compatible = "xlnx,versal-vpk120-revA", "xlnx,versal-vpk120", + "xlnx,versal"; + + memory: memory@0 { + device_type = "memory"; + reg = <0 0 0 0x80000000>, <0x8 0x0 0x2 0x80000000>; + }; + + chosen { + bootargs = "console=ttyAMA0 earlycon=pl011,mmio32,0xFF000000,115200n8"; + stdout-path = "serial0:115200"; + }; + + aliases { + serial0 = &serial0; + ethernet0 = &gem0; + i2c0 = &i2c0; + i2c1 = &i2c1; + mmc0 = &sdhci1; + spi0 = &qspi; + usb0 = &usb0; + rtc0 = &rtc; + }; + /* Missing any LED for heartbeat */ +}; + +&qspi { /* PMC_MIO_500 0 - 12 */ + status = "okay"; /* u93 and u92 */ + num-cs = <2>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + + flash@0 { + compatible = "m25p80", "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */ + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + spi-max-frequency = <35000000>; + partition@0 { + label = "spi0-flash0"; + reg = <0x0 0x8000000>; + }; + }; +}; + +&usb0 { /* PMC_MIO_500 13 - 25 USB 2.0 */ + status = "okay"; +}; + +&dwc3_0 { /* USB 2.0 host */ + status = "okay"; + dr_mode = "host"; + maximum-speed = "high-speed"; /* FIXME */ + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + snps,usb3_lpm_capable; +}; + +&sdhci1 { /* PMC_MIO_501 26 - 36/51 */ + status = "okay"; + xlnx,mio-bank = <1>; + no-1-8-v; +}; + +/* PWM via MIO 41/FAN TACH MIO 49 - FIXME */ + +&serial0 { /* PMC_MIO42/43 */ + status = "okay"; +}; + +&i2c0 { /* PMC_MIO46/47 */ + status = "okay"; +}; + +&i2c1 { /* PMC_MIO44/45 */ + status = "okay"; +}; + +/* PCIe at MIO 38/39/40/50 */ + +&gem0 { /* PMC_MIO_48 - reset, LPD_MIO0-11 , mdio LPD_MIO24/25 */ + status = "okay"; + phy-handle = <&phy1>; /* u198 */ + phy-mode = "rgmii-id"; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + phy1: phy@1 { + #phy-cells = <1>; + compatible = "ethernet-phy-id2000.a231"; + reg = <1>; + ti,rx-internal-delay = <0xb>; + ti,tx-internal-delay = <0xa>; + ti,fifo-depth = <1>; + ti,dp83867-rxctrl-strap-quirk; + }; + }; +}; + +/* LPD_MIO12-23 - PM */ + +&can1 { /* MIO40-41 */ + status = "okay"; +}; + +&dcc { + status = "okay"; +}; + +&rtc { + status = "okay"; +}; + +&gpio0 { + status = "okay"; + /* FIXME Fill names when versal starts */ +}; + +&gpio1 { + status = "okay"; + /* FIXME Fill names when versal starts */ +}; + +&watchdog { + status = "okay"; +}; + +&lpd_dma_chan0 { + status = "okay"; +}; + +&lpd_dma_chan1 { + status = "okay"; +}; + +&lpd_dma_chan2 { + status = "okay"; +}; + +&lpd_dma_chan3 { + status = "okay"; +}; + +&lpd_dma_chan4 { + status = "okay"; +}; + +&lpd_dma_chan5 { + status = "okay"; +}; + +&lpd_dma_chan6 { + status = "okay"; +}; + +&lpd_dma_chan7 { + status = "okay"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vpk120-revB.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vpk120-revB.dts @@ -0,0 +1,186 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal vpk120 revB + * + * (C) Copyright 2021, Xilinx, Inc. + * + * Michal Simek + */ + +#include "versal.dtsi" +#include "versal-clk.dtsi" + +/ { + model = "Xilinx Versal vpk120 Eval board revB"; + compatible = "xlnx,versal-vpk120-revB", "xlnx,versal-vpk120", + "xlnx,versal"; + + memory: memory@0 { + device_type = "memory"; + reg = <0 0 0 0x80000000>, <0x8 0x0 0x2 0x80000000>; + }; + + chosen { + bootargs = "console=ttyAMA0 earlycon=pl011,mmio32,0xFF000000,115200n8"; + stdout-path = "serial0:115200"; + }; + + aliases { + serial0 = &serial0; + serial2 = &dcc; + ethernet0 = &gem0; + i2c0 = &i2c0; + i2c1 = &i2c1; + mmc0 = &sdhci1; + spi0 = &qspi; + usb0 = &usb0; + rtc0 = &rtc; + }; + /* Missing any LED for heartbeat */ +}; + +&qspi { /* PMC_MIO_500 0 - 12 */ + status = "okay"; /* u93 and u92 */ + num-cs = <2>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + + flash@0 { + compatible = "m25p80", "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */ + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + spi-max-frequency = <35000000>; + partition@0 { + label = "spi0-flash0"; + reg = <0x0 0x8000000>; + }; + }; +}; + +&usb0 { /* PMC_MIO_500 13 - 25 USB 2.0 */ + status = "okay"; +}; + +&dwc3_0 { /* USB 2.0 host */ + status = "okay"; + dr_mode = "host"; + maximum-speed = "high-speed"; /* FIXME */ + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + snps,usb3_lpm_capable; +}; + +&sdhci1 { /* PMC_MIO_501 26 - 36/51 */ + status = "okay"; + xlnx,mio-bank = <1>; + no-1-8-v; + clk-phase-sd-hs = <111>, <48>; + clk-phase-uhs-sdr25 = <114>, <48>; + clk-phase-uhs-ddr50 = <126>, <36>; +}; + +/* PWM via MIO 41/FAN TACH MIO 49 - FIXME */ + +&serial0 { /* PMC_MIO42/43 */ + status = "okay"; +}; + +&i2c0 { /* PMC_MIO46/47 */ + status = "okay"; +}; + +&i2c1 { /* PMC_MIO44/45 */ + status = "okay"; + + /* Use for storing information about board */ + eeprom: eeprom@54 { /* u34 - m24128 16kB */ + compatible = "st,24c128", "atmel,24c128"; + reg = <0x54>; /* & 0x5c */ + bootph-all; + }; +}; + +/* PCIe at MIO 38/39/40/50 */ + +&gem0 { /* PMC_MIO_48 - reset, LPD_MIO0-11 , mdio LPD_MIO24/25 */ + status = "okay"; + phy-handle = <&phy1>; /* u198 */ + phy-mode = "rgmii-id"; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + phy1: phy@1 { + #phy-cells = <1>; + compatible = "ethernet-phy-id2000.a231"; + reg = <1>; + ti,rx-internal-delay = <0xb>; + ti,tx-internal-delay = <0xa>; + ti,fifo-depth = <1>; + ti,dp83867-rxctrl-strap-quirk; + }; + }; +}; + +/* LPD_MIO12-23 - PM */ + +&can1 { /* MIO40-41 */ + status = "okay"; +}; + +&dcc { + status = "okay"; +}; + +&rtc { + status = "okay"; +}; + +&gpio0 { + status = "okay"; + /* FIXME Fill names when versal starts */ +}; + +&gpio1 { + status = "okay"; + /* FIXME Fill names when versal starts */ +}; + +&watchdog { + status = "okay"; +}; + +&lpd_dma_chan0 { + status = "okay"; +}; + +&lpd_dma_chan1 { + status = "okay"; +}; + +&lpd_dma_chan2 { + status = "okay"; +}; + +&lpd_dma_chan3 { + status = "okay"; +}; + +&lpd_dma_chan4 { + status = "okay"; +}; + +&lpd_dma_chan5 { + status = "okay"; +}; + +&lpd_dma_chan6 { + status = "okay"; +}; + +&lpd_dma_chan7 { + status = "okay"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-vpk180-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-vpk180-revA.dts @@ -0,0 +1,176 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal vpk180 revA + * + * (C) Copyright 2021, Xilinx, Inc. + * + * Michal Simek + */ + +#include "versal.dtsi" +#include "versal-clk.dtsi" + +/ { + model = "Xilinx Versal vpk180 Eval board revA"; + compatible = "xlnx,versal-vpk180-revA", "xlnx,versal-vpk180", + "xlnx,versal"; + + memory: memory@0 { + device_type = "memory"; + reg = <0 0 0 0x80000000>, <0x8 0x0 0x2 0x80000000>; + }; + + chosen { + bootargs = "console=ttyAMA0 earlycon=pl011,mmio32,0xFF000000,115200n8"; + stdout-path = "serial0:115200"; + }; + + aliases { + serial0 = &serial0; + serial2 = &dcc; + ethernet0 = &gem0; + i2c0 = &i2c0; + i2c1 = &i2c1; + mmc0 = &sdhci1; + spi0 = &qspi; + usb0 = &usb0; + rtc0 = &rtc; + }; + /* Missing any LED for heartbeat */ +}; + +&qspi { /* PMC_MIO_500 0 - 12 */ + status = "okay"; /* u93 and u92 */ + num-cs = <2>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + + flash@0 { + compatible = "m25p80", "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */ + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + spi-max-frequency = <35000000>; + partition@0 { + label = "spi0-flash0"; + reg = <0x0 0x8000000>; + }; + }; +}; + +&usb0 { /* PMC_MIO_500 13 - 25 USB 2.0 */ + status = "okay"; +}; + +&dwc3_0 { /* USB 2.0 host */ + status = "okay"; + dr_mode = "host"; + maximum-speed = "high-speed"; /* FIXME */ + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + snps,usb3_lpm_capable; +}; + +&sdhci1 { /* PMC_MIO_501 26 - 36/51 */ + status = "okay"; + xlnx,mio-bank = <1>; + no-1-8-v; + clk-phase-sd-hs = <111>, <48>; + clk-phase-uhs-sdr25 = <114>, <48>; + clk-phase-uhs-ddr50 = <126>, <36>; +}; + +&serial0 { /* PMC_MIO42/43 */ + status = "okay"; +}; + +&i2c0 { /* PMC_MIO46/47 */ + status = "okay"; +}; + +&i2c1 { /* PMC_MIO44/45 */ + status = "okay"; + + /* Use for storing information about board */ + eeprom: eeprom@54 { /* u34 - m24128 16kB */ + compatible = "st,24c128", "atmel,24c128"; + reg = <0x54>; /* & 0x5c */ + bootph-all; + }; +}; + +&gem0 { /* PMC_MIO_48 - reset, LPD_MIO0-11 , mdio LPD_MIO24/25 */ + status = "okay"; + phy-handle = <&phy1>; /* u198 */ + phy-mode = "rgmii-id"; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + phy1: phy@1 { + #phy-cells = <1>; + compatible = "ethernet-phy-id2000.a231"; + reg = <1>; + ti,rx-internal-delay = <0xb>; + ti,tx-internal-delay = <0xa>; + ti,fifo-depth = <1>; + ti,dp83867-rxctrl-strap-quirk; + }; + }; +}; + +&dcc { + status = "okay"; +}; + +&rtc { + status = "okay"; +}; + +&gpio0 { + status = "okay"; + /* FIXME Fill names when versal starts */ +}; + +&gpio1 { + status = "okay"; + /* FIXME Fill names when versal starts */ +}; + +&watchdog { + status = "okay"; +}; + +&lpd_dma_chan0 { + status = "okay"; +}; + +&lpd_dma_chan1 { + status = "okay"; +}; + +&lpd_dma_chan2 { + status = "okay"; +}; + +&lpd_dma_chan3 { + status = "okay"; +}; + +&lpd_dma_chan4 { + status = "okay"; +}; + +&lpd_dma_chan5 { + status = "okay"; +}; + +&lpd_dma_chan6 { + status = "okay"; +}; + +&lpd_dma_chan7 { + status = "okay"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-x-ebm-01-revA.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-x-ebm-01-revA.dtsi @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx X-EBM-01 revA for vck190/vmk180 + * + * (C) Copyright 2019, Xilinx, Inc. + * + * Michal Simek + */ + +status = "okay"; +num-cs = <2>; +spi-tx-bus-width = <4>; +spi-rx-bus-width = <4>; +#address-cells = <1>; +#size-cells = <0>; +flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "m25p80", "jedec,spi-nor"; /* 256MB */ + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */ + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + spi-max-frequency = <150000000>; + partition@0 { + label = "spi0-flash0"; + reg = <0x0 0x10000000>; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-x-ebm-01-revA.dtso +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-x-ebm-01-revA.dtso @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx X-EBM-01 revA for vck190/vmk180 + * + * (C) Copyright 2019, Xilinx, Inc. + * + * Michal Simek + */ + +/dts-v1/; +/plugin/; + +/{ + compatible = "xlnx,versal-x-ebm-01-revA", "xlnx,versal-x-ebm-01"; + + fragment { + target = <&qspi>; + + __overlay__ { +#include "versal-x-ebm-01-revA.dtsi" + }; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-x-ebm-02-revA.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-x-ebm-02-revA.dtsi @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx X-EBM-02 revA for vck190/vmk180 + * + * (C) Copyright 2020, Xilinx, Inc. + * + * Michal Simek + */ + +/* emmc MIO 0-13 - MTFC8GAKAJCN */ +status = "okay"; +non-removable; +disable-wp; +no-sd; +no-sdio; +cap-mmc-hw-reset; +bus-width = <8>; +xlnx,mio-bank = <0>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-x-ebm-02-revA.dtso +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-x-ebm-02-revA.dtso @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx X-EBM-02 revA for vck190/vmk180 + * + * (C) Copyright 2020, Xilinx, Inc. + * + * Michal Simek + */ + +/dts-v1/; +/plugin/; + +/{ + compatible = "xlnx,versal-x-ebm-02-revA", "xlnx,versal-x-ebm-02"; + + fragment { + target = <&sdhci1>; + + __overlay__ { +#include "versal-x-ebm-02-revA.dtsi" + }; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-x-ebm-03-revA.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-x-ebm-03-revA.dtsi @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx X-EBM-03 revA for vck190/vmk180 + * + * (C) Copyright 2020, Xilinx, Inc. + * + * Michal Simek + */ + +#include +#include + +/* U97 MT35XU02G */ +status = "okay"; +bus-num = <2>; +num-cs = <1>; +#address-cells = <1>; +#size-cells = <0>; + +flash@0 { + compatible = "mt35xu02g", "micron,m25p80", "jedec,spi-nor"; + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + cdns,read-delay = <0x0>; + cdns,tshsl-ns = <0x0>; + cdns,tsd2d-ns = <0x0>; + cdns,tchsh-ns = <0x1>; + cdns,tslch-ns = <0x1>; + spi-tx-bus-width = <8>; + spi-rx-bus-width = <8>; + spi-max-frequency = <20000000>; + no-wp; + reset-gpios = <&gpio1 0xc GPIO_ACTIVE_LOW>; + partition@0 { + label = "spi0-flash0"; + reg = <0x0 0x8000000>; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal-x-ebm-03-revA.dtso +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal-x-ebm-03-revA.dtso @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx X-EBM-03 revA for vck190/vmk180 + * + * (C) Copyright 2020, Xilinx, Inc. + * + * Michal Simek + */ + +/dts-v1/; +/plugin/; + +/{ + compatible = "xlnx,versal-x-ebm-03-revA", "xlnx,versal-x-ebm-03"; + + fragment { + target = <&ospi>; + + __overlay__ { +#include "versal-x-ebm-03-revA.dtsi" + }; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/versal.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/versal.dtsi @@ -0,0 +1,722 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal + * + * (C) Copyright 2017 - 2021, Xilinx, Inc. + * + * Michal Simek + */ + +/dts-v1/; + +/ { + compatible = "xlnx,versal"; + #address-cells = <2>; + #size-cells = <2>; + model = "Xilinx Versal"; + + options { + u-boot { + compatible = "u-boot,config"; + bootscr-address = /bits/ 64 <0x20000000>; + }; + }; + + cpus: cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + compatible = "arm,cortex-a72"; + device_type = "cpu"; + enable-method = "psci"; + operating-points-v2 = <&cpu_opp_table>; + reg = <0>; + cpu-idle-states = <&CPU_SLEEP_0>; + }; + + cpu1: cpu@1 { + compatible = "arm,cortex-a72"; + device_type = "cpu"; + enable-method = "psci"; + operating-points-v2 = <&cpu_opp_table>; + reg = <1>; + cpu-idle-states = <&CPU_SLEEP_0>; + }; + + idle-states { + entry-method = "psci"; + + CPU_SLEEP_0: cpu-sleep-0 { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x40000000>; + local-timer-stop; + entry-latency-us = <300>; + exit-latency-us = <600>; + min-residency-us = <10000>; + }; + }; + }; + + cpu_opp_table: opp-table-cpu { + compatible = "operating-points-v2"; + opp-shared; + opp00 { + opp-hz = /bits/ 64 <1199999988>; + opp-microvolt = <1000000>; + clock-latency-ns = <500000>; + }; + opp01 { + opp-hz = /bits/ 64 <599999994>; + opp-microvolt = <1000000>; + clock-latency-ns = <500000>; + }; + opp02 { + opp-hz = /bits/ 64 <399999996>; + opp-microvolt = <1000000>; + clock-latency-ns = <500000>; + }; + opp03 { + opp-hz = /bits/ 64 <299999997>; + opp-microvolt = <1000000>; + clock-latency-ns = <500000>; + }; + }; + + dcc: dcc { + compatible = "arm,dcc"; + status = "disabled"; + bootph-all; + }; + + fpga: fpga-region { + compatible = "fpga-region"; + fpga-mgr = <&versal_fpga>; + #address-cells = <2>; + #size-cells = <2>; + }; + + psci: psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + pmu { + compatible = "arm,armv8-pmuv3"; + interrupt-parent = <&gic>; + interrupts = <1 7 0x304>; + }; + + timer: timer { + compatible = "arm,armv8-timer"; + interrupt-parent = <&gic>; + interrupts = <1 13 4>, + <1 14 4>, + <1 11 4>, + <1 10 4>; + }; + + versal_fpga: versal-fpga { + compatible = "xlnx,versal-fpga"; + }; + + sensor0: versal-thermal-sensor { + compatible = "xlnx,versal-thermal"; + #thermal-sensor-cells = <0>; + io-channels = <&sysmon0>; + io-channel-names = "sysmon-temp-channel"; + }; + + thermal-zones { + versal_thermal: versal-thermal { + polling-delay-passive = <250>; /* milliseconds */ + polling-delay = <1000>; /* milliseconds */ + thermal-sensors = <&sensor0>; + + trips { + temp_alert: temp-alert { + temperature = <70000>; /* millicelsius */ + hysteresis = <0>; /* millicelsius */ + type = "passive"; + }; + + ot_crit: ot-crit { + temperature = <125000>; /* millicelsius */ + hysteresis = <0>; /* millicelsius */ + type = "critical"; + }; + }; + + cooling-maps { + }; + }; + }; + + amba: axi { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + interrupt-parent = <&gic>; + bootph-all; + + gic: interrupt-controller@f9000000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + reg = <0 0xf9000000 0 0x80000>, /* GICD */ + <0 0xf9080000 0 0x80000>; /* GICR */ + interrupt-controller; + interrupts = <1 9 4>; + + gic_its: msi-controller@f9020000 { + compatible = "arm,gic-v3-its"; + status = "disabled"; + msi-controller; + #msi-cells = <1>; + reg = <0 0xf9020000 0 0x20000>; + }; + }; + + can0: can@ff060000 { + compatible = "xlnx,canfd-2.0"; + status = "disabled"; + reg = <0 0xff060000 0 0x6000>; + interrupts = <0 20 4>; + clock-names = "can_clk", "s_axi_aclk"; + rx-fifo-depth = <0x40>; + tx-mailbox-count = <0x20>; + }; + + can1: can@ff070000 { + compatible = "xlnx,canfd-2.0"; + status = "disabled"; + reg = <0 0xff070000 0 0x6000>; + interrupts = <0 21 4>; + clock-names = "can_clk", "s_axi_aclk"; + rx-fifo-depth = <0x40>; + tx-mailbox-count = <0x20>; + }; + + cci: cci@fd000000 { + compatible = "arm,cci-500"; + status = "disabled"; + reg = <0 0xfd000000 0 0x10000>; + ranges = <0 0 0xfd000000 0xa0000>; + #address-cells = <1>; + #size-cells = <1>; + cci_pmu: pmu@10000 { + compatible = "arm,cci-500-pmu,r0"; + reg = <0x10000 0x90000>; + interrupts = <0 106 4>, + <0 106 4>, + <0 106 4>, + <0 106 4>, + <0 106 4>, + <0 106 4>, + <0 106 4>, + <0 106 4>; + }; + }; + + lpd_dma_chan0: dma-controller@ffa80000 { + compatible = "xlnx,zynqmp-dma-1.0"; + status = "disabled"; + reg = <0 0xffa80000 0 0x1000>; + interrupts = <0 60 4>; + clock-names = "clk_main", "clk_apb"; + /* iommus = <&smmu 0x210>; */ + #dma-cells = <1>; + xlnx,bus-width = <64>; + /* dma-coherent; */ + }; + + lpd_dma_chan1: dma-controller@ffa90000 { + compatible = "xlnx,zynqmp-dma-1.0"; + status = "disabled"; + reg = <0 0xffa90000 0 0x1000>; + interrupts = <0 61 4>; + clock-names = "clk_main", "clk_apb"; + /* iommus = <&smmu 0x212>; */ + #dma-cells = <1>; + xlnx,bus-width = <64>; + /* dma-coherent; */ + }; + + lpd_dma_chan2: dma-controller@ffaa0000 { + compatible = "xlnx,zynqmp-dma-1.0"; + status = "disabled"; + reg = <0 0xffaa0000 0 0x1000>; + interrupts = <0 62 4>; + clock-names = "clk_main", "clk_apb"; + /* iommus = <&smmu 0x214>; */ + #dma-cells = <1>; + xlnx,bus-width = <64>; + /* dma-coherent; */ + }; + + lpd_dma_chan3: dma-controller@ffab0000 { + compatible = "xlnx,zynqmp-dma-1.0"; + status = "disabled"; + reg = <0 0xffab0000 0 0x1000>; + interrupts = <0 63 4>; + clock-names = "clk_main", "clk_apb"; + /* iommus = <&smmu 0x216>; */ + #dma-cells = <1>; + xlnx,bus-width = <64>; + /* dma-coherent; */ + }; + + lpd_dma_chan4: dma-controller@ffac0000 { + compatible = "xlnx,zynqmp-dma-1.0"; + status = "disabled"; + reg = <0 0xffac0000 0 0x1000>; + interrupts = <0 64 4>; + clock-names = "clk_main", "clk_apb"; + /* iommus = <&smmu 0x218>; */ + #dma-cells = <1>; + xlnx,bus-width = <64>; + /* dma-coherent; */ + }; + + lpd_dma_chan5: dma-controller@ffad0000 { + compatible = "xlnx,zynqmp-dma-1.0"; + status = "disabled"; + reg = <0 0xffad0000 0 0x1000>; + interrupts = <0 65 4>; + clock-names = "clk_main", "clk_apb"; + /* iommus = <&smmu 0x21a>; */ + #dma-cells = <1>; + xlnx,bus-width = <64>; + /* dma-coherent; */ + }; + + lpd_dma_chan6: dma-controller@ffae0000 { + compatible = "xlnx,zynqmp-dma-1.0"; + status = "disabled"; + reg = <0 0xffae0000 0 0x1000>; + interrupts = <0 66 4>; + clock-names = "clk_main", "clk_apb"; + /* iommus = <&smmu 0x21c>; */ + #dma-cells = <1>; + xlnx,bus-width = <64>; + /* dma-coherent; */ + }; + + lpd_dma_chan7: dma-controller@ffaf0000 { + compatible = "xlnx,zynqmp-dma-1.0"; + status = "disabled"; + reg = <0 0xffaf0000 0 0x1000>; + interrupts = <0 67 4>; + clock-names = "clk_main", "clk_apb"; + /* iommus = <&smmu 0x21e>; */ + #dma-cells = <1>; + xlnx,bus-width = <64>; + /* dma-coherent; */ + }; + + gem0: ethernet@ff0c0000 { + compatible = "xlnx,versal-gem", "cdns,gem"; + status = "disabled"; + reg = <0 0xff0c0000 0 0x1000>; + interrupts = <0 56 4>, <0 56 4>; + clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; + /* iommus = <&smmu 0x234>; */ + /* dma-coherent; */ + #address-cells = <1>; + #size-cells = <0>; + }; + + gem1: ethernet@ff0d0000 { + compatible = "xlnx,versal-gem", "cdns,gem"; + status = "disabled"; + reg = <0 0xff0d0000 0 0x1000>; + interrupts = <0 58 4>, <0 58 4>; + clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; + /* iommus = <&smmu 0x235>; */ + /* dma-coherent; */ + #address-cells = <1>; + #size-cells = <0>; + }; + + gpio0: gpio@ff0b0000 { + compatible = "xlnx,versal-gpio-1.0"; + status = "disabled"; + reg = <0 0xff0b0000 0 0x1000>; + interrupts = <0 13 4>; + #gpio-cells = <2>; + gpio-controller; + #interrupt-cells = <2>; + interrupt-controller; + }; + + gpio1: gpio@f1020000 { + compatible = "xlnx,pmc-gpio-1.0"; + status = "disabled"; + reg = <0 0xf1020000 0 0x1000>; + interrupts = <0 122 4>; + #gpio-cells = <2>; + gpio-controller; + #interrupt-cells = <2>; + interrupt-controller; + }; + + i2c0: i2c@ff020000 { + compatible = "cdns,i2c-r1p14"; + status = "disabled"; + reg = <0 0xff020000 0 0x1000>; + interrupts = <0 14 4>; + clock-frequency = <100000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c1: i2c@ff030000 { + compatible = "cdns,i2c-r1p14"; + status = "disabled"; + reg = <0 0xff030000 0 0x1000>; + interrupts = <0 15 4>; + clock-frequency = <100000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c2: i2c@f1000000 { + compatible = "cdns,i2c-r1p14"; + status = "disabled"; + reg = <0 0xf1000000 0 0x1000>; + interrupts = <0 123 4>; + clock-frequency = <100000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + mc0: memory-controller@f6150000 { + compatible = "xlnx,versal-ddrmc"; + status = "disabled"; + reg = <0x0 0xf6150000 0x0 0x2000>, <0x0 0xf6070000 0x0 0x20000>; + reg-names = "base", "noc"; + interrupts = <0 147 4>; + }; + + mc1: memory-controller@f62c0000 { + compatible = "xlnx,versal-ddrmc"; + status = "disabled"; + reg = <0x0 0xf62c0000 0x0 0x2000>, <0x0 0xf6210000 0x0 0x20000>; + reg-names = "base", "noc"; + interrupts = <0 147 4>; + }; + + mc2: memory-controller@f6430000 { + compatible = "xlnx,versal-ddrmc"; + status = "disabled"; + reg = <0x0 0xf6430000 0x0 0x2000>, <0x0 0xf6380000 0x0 0x20000>; + reg-names = "base", "noc"; + interrupts = <0 147 4>; + }; + + mc3: memory-controller@f65a0000 { + compatible = "xlnx,versal-ddrmc"; + status = "disabled"; + reg = <0x0 0xf65a0000 0x0 0x2000>, <0x0 0xf64f0000 0x0 0x20000>; + reg-names = "base", "noc"; + interrupts = <0 147 4>; + }; + + ocm: memory-controller@ff960000 { + compatible = "xlnx,zynqmp-ocmc-1.0"; + reg = <0x0 0xff960000 0x0 0x1000>; + interrupts = <0 10 4>; + }; + + rtc: rtc@f12a0000 { + compatible = "xlnx,zynqmp-rtc"; + status = "disabled"; + reg = <0 0xf12a0000 0 0x100>; + interrupt-names = "alarm", "sec"; + interrupts = <0 142 4>, <0 143 4>; + calibration = <0x7FFF>; + }; + + sdhci0: mmc@f1040000 { + compatible = "xlnx,versal-8.9a", "arasan,sdhci-8.9a"; + status = "disabled"; + reg = <0 0xf1040000 0 0x10000>; + interrupts = <0 126 4>; + clock-names = "clk_xin", "clk_ahb", "gate"; + #clock-cells = <1>; + clock-output-names = "clk_out_sd0", "clk_in_sd0"; + /* iommus = <&smmu 0x242>; */ + /* dma-coherent; */ + }; + + sdhci1: mmc@f1050000 { + compatible = "xlnx,versal-8.9a", "arasan,sdhci-8.9a"; + status = "disabled"; + reg = <0 0xf1050000 0 0x10000>; + interrupts = <0 128 4>; + clock-names = "clk_xin", "clk_ahb", "gate"; + #clock-cells = <1>; + clock-output-names = "clk_out_sd1", "clk_in_sd1"; + /* iommus = <&smmu 0x243>; */ + /* dma-coherent; */ + }; + + serial0: serial@ff000000 { + compatible = "arm,pl011", "arm,primecell"; + status = "disabled"; + reg = <0 0xff000000 0 0x1000>; + interrupts = <0 18 4>; + reg-io-width = <4>; + clock-names = "uartclk", "apb_pclk"; + bootph-all; + }; + + serial1: serial@ff010000 { + compatible = "arm,pl011", "arm,primecell"; + status = "disabled"; + reg = <0 0xff010000 0 0x1000>; + interrupts = <0 19 4>; + reg-io-width = <4>; + clock-names = "uartclk", "apb_pclk"; + bootph-all; + }; + + smmu: iommu@fd800000 { + compatible = "arm,mmu-500"; + status = "disabled"; + reg = <0 0xfd800000 0 0x40000>; + stream-match-mask = <0x7c00>; + #iommu-cells = <1>; + #global-interrupts = <1>; + interrupts = <0 107 4>, + <0 107 4>, <0 107 4>, <0 107 4>, <0 107 4>, + <0 107 4>, <0 107 4>, <0 107 4>, <0 107 4>, + <0 107 4>, <0 107 4>, <0 107 4>, <0 107 4>, + <0 107 4>, <0 107 4>, <0 107 4>, <0 107 4>, + <0 107 4>, <0 107 4>, <0 107 4>, <0 107 4>, + <0 107 4>, <0 107 4>, <0 107 4>, <0 107 4>, + <0 107 4>, <0 107 4>, <0 107 4>, <0 107 4>, + <0 107 4>, <0 107 4>, <0 107 4>, <0 107 4>; + }; + + ospi: spi@f1010000 { + compatible = "xlnx,versal-ospi-1.0", "cdns,qspi-nor"; + status = "disabled"; + reg = <0 0xf1010000 0 0x10000 0 0xc0000000 0 0x20000000>; + interrupts = <0 124 4>; + cdns,fifo-depth = <256>; + cdns,fifo-width = <4>; + cdns,is-dma = <1>; + cdns,trigger-address = <0xC0000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + qspi: spi@f1030000 { + compatible = "xlnx,versal-qspi-1.0"; + status = "disabled"; + reg = <0 0xf1030000 0 0x1000>; + interrupts = <0 125 4>; + clock-names = "ref_clk", "pclk"; + /* iommus = <&smmu 0x244>; */ + /* dma-coherent; */ + #address-cells = <1>; + #size-cells = <0>; + }; + + spi0: spi@ff040000 { + compatible = "cdns,spi-r1p6"; + status = "disabled"; + reg = <0 0xff040000 0 0x1000>; + interrupts = <0 16 4>; + clock-names = "ref_clk", "pclk"; + #address-cells = <1>; + #size-cells = <0>; + }; + + spi1: spi@ff050000 { + compatible = "cdns,spi-r1p6"; + status = "disabled"; + reg = <0 0xff050000 0 0x1000>; + interrupts = <0 17 4>; + clock-names = "ref_clk", "pclk"; + #address-cells = <1>; + #size-cells = <0>; + }; + + sysmon0: sysmon@f1270000 { + compatible = "xlnx,versal-sysmon"; + #io-channel-cells = <0>; + reg = <0x0 0xf1270000 0x0 0x4000>; + interrupts = <0 144 4>; + xlnx,numchannels = /bits/8 <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + sysmon1: sysmon@109270000 { + compatible = "xlnx,versal-sysmon"; + status = "disabled"; + reg = <0x1 0x09270000 0x0 0x4000>; + xlnx,numchannels = /bits/8 <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + sysmon2: sysmon@111270000 { + compatible = "xlnx,versal-sysmon"; + status = "disabled"; + reg = <0x1 0x11270000 0x0 0x4000>; + xlnx,numchannels = /bits/8 <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + sysmon3: sysmon@119270000 { + compatible = "xlnx,versal-sysmon"; + status = "disabled"; + reg = <0x1 0x19270000 0x0 0x4000>; + xlnx,numchannels = /bits/8 <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + ttc0: timer@ff0e0000 { + compatible = "cdns,ttc"; + status = "disabled"; + interrupts = <0 37 4>, <0 38 4>, <0 39 4>; + reg = <0x0 0xff0e0000 0x0 0x1000>; + timer-width = <32>; + }; + + ttc1: timer@ff0f0000 { + compatible = "cdns,ttc"; + status = "disabled"; + interrupts = <0 40 4>, <0 41 4>, <0 42 4>; + reg = <0x0 0xff0f0000 0x0 0x1000>; + timer-width = <32>; + }; + + ttc2: timer@ff100000 { + compatible = "cdns,ttc"; + status = "disabled"; + interrupts = <0 43 4>, <0 44 4>, <0 45 4>; + reg = <0x0 0xff100000 0x0 0x1000>; + timer-width = <32>; + }; + + ttc3: timer@ff110000 { + compatible = "cdns,ttc"; + status = "disabled"; + interrupts = <0 46 4>, <0 47 4>, <0 48 4>; + reg = <0x0 0xff110000 0x0 0x1000>; + timer-width = <32>; + }; + + usb0: usb@ff9d0000 { + compatible = "xlnx,versal-dwc3"; + status = "disabled"; + reg = <0 0xff9d0000 0 0x100>; + clock-names = "bus_clk", "ref_clk"; + ranges; + #address-cells = <2>; + #size-cells = <2>; + + dwc3_0: usb@fe200000 { + compatible = "snps,dwc3"; + status = "disabled"; + reg = <0 0xfe200000 0 0x10000>; + interrupt-names = "host", "peripheral", "otg", "wakeup"; + interrupts = <0 0x16 4>, <0 0x16 4>, <0 0x1a 4>, <0x0 0x4a 0x4>; + /* iommus = <&smmu 0x230>; */ + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + snps,quirk-frame-length-adjustment = <0x20>; + clock-names = "ref"; + /* dma-coherent; */ + }; + }; + + cpm_pciea: pci@fca10000 { + device_type = "pci"; + #address-cells = <3>; + #interrupt-cells = <1>; + #size-cells = <2>; + compatible = "xlnx,versal-cpm-host-1.00"; + status = "disabled"; + interrupt-map = <0 0 0 1 &pcie_intc_0 0>, + <0 0 0 2 &pcie_intc_0 1>, + <0 0 0 3 &pcie_intc_0 2>, + <0 0 0 4 &pcie_intc_0 3>; + interrupt-map-mask = <0 0 0 7>; + interrupt-names = "misc"; + interrupts = <0 72 4>; + interrupt-parent = <&gic>; + bus-range = <0x00 0xff>; + ranges = <0x02000000 0x00000000 0xe0010000 0x0 0xe0010000 0x00000000 0x10000000>, + <0x43000000 0x00000080 0x00000000 0x00000080 0x00000000 0x00000000 0x80000000>; + msi-map = <0x0 &gic_its 0x0 0x10000>; + reg = <0x0 0xfca10000 0x0 0x1000>, + <0x6 0x00000000 0x0 0x1000000>; + reg-names = "cpm_slcr", "cfg"; + pcie_intc_0: interrupt-controller { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller ; + }; + }; + + cpm5_pcie: pcie@fcdd0000 { + device_type = "pci"; + #address-cells = <3>; + #interrupt-cells = <1>; + #size-cells = <2>; + compatible = "xlnx,versal-cpm5-host"; + status = "disabled"; + interrupt-map = <0 0 0 1 &pcie_intc_1 0>, + <0 0 0 2 &pcie_intc_1 1>, + <0 0 0 3 &pcie_intc_1 2>, + <0 0 0 4 &pcie_intc_1 3>; + interrupt-map-mask = <0 0 0 7>; + interrupt-names = "misc"; + interrupts = <0 72 4>; + interrupt-parent = <&gic>; + bus-range = <0x00 0xff>; + ranges = <0x02000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000>, + <0x43000000 0x80 0x00000000 0x80 0x00000000 0x0 0x80000000>; + msi-map = <0x0 &gic_its 0x0 0x10000>; + reg = <0x00 0xfcdd0000 0x00 0x1000>, + <0x06 0x00000000 0x00 0x1000000>, + <0x00 0xfce20000 0x00 0x1000000>; + reg-names = "cpm_slcr", "cfg", "cpm_csr"; + pcie_intc_1: interrupt-controller { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + }; + }; + + watchdog: watchdog@fd4d0000 { + compatible = "xlnx,versal-wwdt"; + status = "disabled"; + reg = <0 0xfd4d0000 0 0x10000>; + timeout-sec = <30>; + }; + + watchdog1: watchdog@ff120000 { + compatible = "xlnx,versal-wwdt"; + status = "disabled"; + reg = <0 0xff120000 0 0x10000>; + timeout-sec = <30>; + }; + + xilsem_edac: edac@f2014050 { + compatible = "xlnx,versal-xilsem-edac"; + status = "disabled"; + reg = <0x0 0xf2014050 0x0 0xc4>; + }; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/x-prc-07-i3c-revA.dtso +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/x-prc-07-i3c-revA.dtso @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP VN-P-B2197 (Tenzing2) X-PRC-07 RevA with I3C enabled + * + * (C) Copyright 2022, Advanced Micro Devices, Inc. + * + * Jay Buddhabhatti ; + */ + +#include "x-prc-07-revA.dtso" + +&{/} { + model = "X-PRC-07 i3c revA"; +}; + +&i2c0 { + status = "disabled"; +}; + +&i2c1 { + status = "disabled"; +}; + +&i3c0 { + status = "okay"; + #address-cells = <3>; + #size-cells = <0>; + + /* check maximum frequency from datasheet */ + imu@6b { /* u120 */ + compatible = "st,lsm6dso"; + reg = <0 0 0x6b>; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/x-prc-07-revA.dtso +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/x-prc-07-revA.dtso @@ -0,0 +1,173 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP VN-P-B2197 (Tenzing2) X-PRC-07 RevA + * + * (C) Copyright 2022, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +/dts-v1/; +/plugin/; + +#include + +&{/} { + model = "X-PRC-07 revA"; + + aliases { + nvmem2 = &eeprom0; + nvmem3 = &eeprom1; + }; +}; + +&gem1 { + status = "okay"; + phy-handle = <&phy0>; + phy-mode = "rmii"; + mdio1: mdio { + #address-cells = <1>; + #size-cells = <0>; + + /* u393 DP83867 - DNP */ + /* + phy0: ethernet-phy@1 { + #phy-cells = <1>; + compatible = "ethernet-phy-id2000.a231"; + reg = <1>; + ti,rx-internal-delay = <0x8>; + ti,tx-internal-delay = <0xa>; + ti,fifo-depth = <0x1>; + ti,dp83867-rxctrl-strap-quirk; + reset-gpios = <&gpio1 22 GPIO_ACTIVE_LOW>; + }; + */ + /* phy also respond on broadcast address 0 */ + phy0: ethernet-phy@1 { /* u396 RTL8201F */ + #phy-cells = <1>; + compatible = "ethernet-phy-id001c.c816"; + reg = <1>; + }; + }; +}; + +&ospi { + status = "okay"; + num-cs = <2>; + reset-names = "qspi"; + #address-cells = <1>; + #size-cells = <0>; + + mt35xu02g: flash@0 { /* u97/u390 mt35xu02gcba */ + compatible = "mt35xu02g", "micron,m25p80", "jedec,spi-nor"; + reg = <0>, <1>; + stacked-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */ + #address-cells = <1>; + #size-cells = <1>; + cdns,read-delay = <0>; + cdns,tshsl-ns = <0>; + cdns,tsd2d-ns = <0>; + cdns,tchsh-ns = <1>; + cdns,tslch-ns = <1>; + spi-tx-bus-width = <8>; + spi-rx-bus-width = <8>; + spi-max-frequency = <20000000>; + broken-flash-reset; + no-wp; + reset-gpios = <&gpio1 0xc GPIO_ACTIVE_LOW>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "ospi-flash0"; + reg = <0 0x200000>; + }; + partition@1 { + label = "ospi-flash1"; + reg = <0x200000 0x7E00000>; + }; + }; + }; +}; + +&spi1 { + status = "okay"; + num-cs = <3>; + #address-cells = <1>; + #size-cells = <0>; + + flash@2 { /* u397 MX25U3232 - FIXME not supported in U-Boot/Linux */ + compatible = "m25p80", "jedec,spi-nor"; + spi-max-frequency = <5000000>; + reg = <2>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "spi0-flash0"; + reg = <0 0x80000>; + }; + }; + }; +}; + +&i2c0 { + status = "okay"; + bootph-all; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom0: eeprom@51 { /* u45 WP not used */ + compatible = "st,24c128", "atmel,24c128"; + reg = <0x51>; + bootph-all; + }; +}; + +&i2c1 { + status = "okay"; + bootph-all; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom1: eeprom@51 { /* u46 WP not used */ + compatible = "st,24c128", "atmel,24c128"; + reg = <0x51>; + bootph-all; + }; +}; + +&serial0 { + status = "okay"; +}; + +&serial1 { + status = "okay"; +}; + +&sdhci1 { + status = "okay"; + xlnx,mio-bank = <0>; + non-removable; + disable-wp; + no-sd; + no-sdio; + cap-mmc-hw-reset; + bus-width = <8>; +}; + +&usb1 { + status = "okay"; +}; + +&dwc3_1 { + status = "okay"; + snps,ulpi-ext-vbus-drv; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/x-prc-08-revA.dtso +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/x-prc-08-revA.dtso @@ -0,0 +1,128 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP VN-P-B2197 (Tenzing2) X-PRC-08 RevA + * + * (C) Copyright 2022-2023, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +/dts-v1/; +/plugin/; + +#include + +&{/} { + model = "X-PRC-08 revA"; +}; + +/* LPD_MIO0-12, mdio LPD_MIO24-25 */ +&gem0 { + status = "okay"; + phy-handle = <&phy0>; + phy-mode = "rmii"; + mdio1: mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy0: ethernet-phy@1 { /* u37 VSC8540 */ + #phy-cells = <1>; + compatible = "ethernet-phy-id0007.0760"; + reg = <1>; + reset-gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; + }; + }; +}; + +/* u1, u2, u3, u4 - 4x MT25QU01GBBBB, PMC_MIO0-5,7-12 */ +&qspi { + status = "okay"; + reset-gpios = <&gpio1 39 GPIO_ACTIVE_HIGH>; + reset-names = "qspi"; + #address-cells = <1>; + #size-cells = <0>; + num-cs = <2>; + + mt25xu01g: flash@0 { + compatible = "micron,m25p80", "jedec,spi-nor"; + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x8000000 0x8000000>; /* (128+128)MB */ + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + #address-cells = <1>; + #size-cells = <1>; + spi-max-frequency = <150000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "qspi-flash0"; + reg = <0 0x8000000>; + }; + partition@1 { + label = "qspi-flash1"; + reg = <0x8000000 0x8000000>; + }; + }; + }; +}; + +/* LPD_MIO18-23 */ +&spi1 { + status = "okay"; + num-cs = <1>; /* Via J16 - 3 chip selects to the same memory */ + #address-cells = <1>; + #size-cells = <0>; + + flash@0 { /* u35 MX25U3232 */ + compatible = "m25p80"; + spi-max-frequency = <5000000>; + reg = <0>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "spi0-flash0"; + reg = <0 0x80000>; + }; + }; + }; +}; + +/* LPD_MIO16-17 */ +&serial0 { + status = "okay"; +}; + +/* PMC_MIO26-36 */ +&sdhci0 { + status = "okay"; + xlnx,mio-bank = <1>; + bus-width = <4>; +}; + +/* u36a PMC_MIO40-51 MTFC16GAPALBH */ +&sdhci1 { + status = "okay"; + xlnx,mio-bank = <1>; + non-removable; + disable-wp; + no-sd; + no-sdio; + cap-mmc-hw-reset; + bus-width = <8>; +}; + +/* u34 - usb3315c - PMC_MIO13-25 */ +&usb1 { + status = "okay"; +}; + +&dwc3_1 { + status = "okay"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/x-prc-09-i3c-revA.dtso +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/x-prc-09-i3c-revA.dtso @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP VN-P-B2197 (Tenzing2) X-PRC-09 RevA with I3C enabled + * + * (C) Copyright 2022, Advanced Micro Devices, Inc. + * + * Jay Buddhabhatti ; + */ + +#include "x-prc-09-revA.dtso" + +&{/} { + model = "X-PRC-09 i3c revA"; +}; + +&i2c0 { + status = "disabled"; +}; + +&i2c1 { + status = "disabled"; +}; + +&i3c0 { + status = "okay"; + #address-cells = <3>; + #size-cells = <0>; + + /* check maximum frequency from datasheet */ + imu@6b { /* u120 */ + compatible = "st,lsm6dso"; + reg = <0 0 0x6b>; + }; +}; + +&i3c1 { /* u119 */ + status = "okay"; + #address-cells = <3>; + #size-cells = <0>; + + /* icm-42605 - missing i3c driver + drivers/iio/imu/inv_icm42600/inv_icm42600_i2c.c */ + icm42605@68 { + compatible = "invensense,icm42605"; + reg = <0 0 0x68>; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/x-prc-09-revA.dtso +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/x-prc-09-revA.dtso @@ -0,0 +1,140 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP VN-P-B2197 (Tenzing2) X-PRC-09 RevA + * + * (C) Copyright 2022, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +/dts-v1/; +/plugin/; + +#include + +&{/} { + model = "X-PRC-09 revA"; + + aliases { + nvmem2 = &eeprom0; + nvmem3 = &eeprom1; + }; +}; + +&can0 { + status = "okay"; +}; + +&can1 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&gem0 { + status = "okay"; + phy-handle = <&phy0>; + phy-mode = "rgmii-id"; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + phy0: ethernet-phy@1 { /* u128 DP83867 */ + #phy-cells = <1>; + compatible = "ethernet-phy-id2000.a231"; + reg = <1>; + ti,rx-internal-delay = <0x8>; + ti,tx-internal-delay = <0xa>; + ti,fifo-depth = <0x1>; + ti,dp83867-rxctrl-strap-quirk; + ti,min-output-impedance; + reset-assert-us = <0x96>; + reset-deassert-us = <0x118>; + reset-gpios = <&gpio1 48 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&i2c0 { + status = "okay"; + bootph-all; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom0: eeprom@51 { /* u45 WP not used */ + compatible = "st,24c128", "atmel,24c128"; + reg = <0x51>; + bootph-all; + }; +}; + +&i2c1 { + status = "okay"; + bootph-all; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom1: eeprom@55 { /* u46 WP not used */ + compatible = "st,24c128", "atmel,24c128"; + reg = <0x55>; + bootph-all; + }; +}; + +&serial0 { + status = "okay"; +}; + +&serial1 { + status = "okay"; +}; + +&sdhci0 { + status = "okay"; + xlnx,mio-bank = <0>; + no-1-8-v; +}; + +&qspi { + status = "okay"; /* u93 and u92 */ + num-cs = <2>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + #address-cells = <1>; + #size-cells = <0>; + + flash@0 { + compatible = "micron,m25p80", "jedec,spi-nor"; + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */ + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + spi-max-frequency = <150000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "qspi0-flash0"; + reg = <0 0x200000>; + }; + partition@1 { + label = "qspi0-flash1"; + reg = <0x200000 0x7E00000>; + }; + }; + }; +}; + +&usb1 { + status = "okay"; +}; + +&dwc3_1 { + status = "okay"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-a2197-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-a2197-revA.dts @@ -0,0 +1,89 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal a2197 RevA System Controller + * + * (C) Copyright 2019, Xilinx, Inc. + * + * Michal Simek + */ +/dts-v1/; + +#include "zynqmp.dtsi" +#include "zynqmp-clk-ccf.dtsi" +#include + +/ { + model = "Versal System Controller on a2197 board RevA"; + compatible = "xlnx,zynqmp-a2197-revA", "xlnx,zynqmp-a2197", "xlnx,zynqmp"; + + aliases { + i2c0 = &i2c0; + nvmem0 = &eeprom1; + nvmem1 = &eeprom0; + serial0 = &uart0; + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; + }; +}; + +&uart0 { /* uart0 MIO38-39 */ + status = "okay"; +}; + +&i2c0 { + status = "okay"; + bootph-all; + clock-frequency = <400000>; + i2c-mux@74 { /* this cover MGT board */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + bootph-all; + /* FIXME reset connected to SYSCTRL_IIC_MUX0_RESET */ + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* Use for storing information about SC board */ + eeprom0: eeprom@50 { /* u96 - 24LC32A - 256B */ + compatible = "atmel,24c32"; + bootph-all; + reg = <0x50>; + }; + }; + }; +}; + +&i2c1 { + status = "okay"; + bootph-all; + clock-frequency = <400000>; + i2c-mux@74 { /* This cover processor board */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + bootph-all; + /* FIXME reset connected to SYSCTRL_IIC_MUX0_RESET */ + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* Use for storing information about SC board */ + eeprom1: eeprom@50 { /* u96 - 24LC32A - 256B */ + compatible = "atmel,24c32"; + bootph-all; + reg = <0x50>; + }; + }; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi @@ -182,6 +182,22 @@ clocks = <&zynqmp_clk I2C1_REF>; }; +&perf_monitor_ocm { + clocks = <&zynqmp_clk LPD_LSBUS>; +}; + +&perf_monitor_ddr { + clocks = <&zynqmp_clk TOPSW_LSBUS>; +}; + +&perf_monitor_cci { + clocks = <&zynqmp_clk TOPSW_LSBUS>; +}; + +&perf_monitor_lpd { + clocks = <&zynqmp_clk LPD_LSBUS>; +}; + &pcie { clocks = <&zynqmp_clk PCIE_REF>; }; @@ -230,18 +246,30 @@ &uart0 { clocks = <&zynqmp_clk UART0_REF>, <&zynqmp_clk LPD_LSBUS>; + assigned-clocks = <&zynqmp_clk UART0_REF>; }; &uart1 { clocks = <&zynqmp_clk UART1_REF>, <&zynqmp_clk LPD_LSBUS>; + assigned-clocks = <&zynqmp_clk UART1_REF>; }; -&dwc3_0 { +&usb0 { clocks = <&zynqmp_clk USB0_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>; + assigned-clocks = <&zynqmp_clk USB0_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>; }; -&dwc3_1 { +&dwc3_0 { + clocks = <&zynqmp_clk USB3_DUAL_REF>; +}; + +&usb1 { clocks = <&zynqmp_clk USB1_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>; + assigned-clocks = <&zynqmp_clk USB1_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>; +}; + +&dwc3_1 { + clocks = <&zynqmp_clk USB3_DUAL_REF>; }; &watchdog0 { @@ -269,3 +297,7 @@ <&zynqmp_clk DP_AUDIO_REF>, <&zynqmp_clk DP_VIDEO_REF>; /* rpll, rpll, vpll */ }; + +&zynqmp_dp_snd_codec0 { + clocks = <&zynqmp_clk DP_AUDIO_REF>; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-dlc21-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-dlc21-revA.dts @@ -0,0 +1,222 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP DLC21 revA + * + * (C) Copyright 2019 - 2021, Xilinx, Inc. + * + * Michal Simek + */ +/dts-v1/; + +#include "zynqmp.dtsi" +#include "zynqmp-clk-ccf.dtsi" +#include +#include + +/ { + model = "Smartlynq+ DLC21 RevA"; + compatible = "xlnx,zynqmp-dlc21-revA", "xlnx,zynqmp-dlc21", + "xlnx,zynqmp"; + + aliases { + ethernet0 = &gem0; + gpio0 = &gpio; + i2c0 = &i2c0; + mmc0 = &sdhci0; + mmc1 = &sdhci1; + rtc0 = &rtc; + serial0 = &uart0; + serial2 = &dcc; + usb0 = &usb0; + usb1 = &usb1; + spi0 = &spi0; + nvmem0 = &eeprom; + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0 0 0 0x80000000>, <0x8 0 0x3 0x80000000>; + }; + + si5332_1: si5332-1 { /* clk0_sgmii - u142 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + }; + + si5332_2: si5332-2 { /* clk1_usb - u142 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + }; +}; + +&sdhci0 { /* emmc MIO 13-23 - with some settings 16GB */ + status = "okay"; + non-removable; + disable-wp; + no-sd; + no-sdio; + cap-mmc-hw-reset; + bus-width = <8>; + xlnx,mio-bank = <0>; +}; + +&sdhci1 { /* sd1 MIO45-51 cd in place */ + status = "okay"; + no-1-8-v; + disable-wp; + xlnx,mio-bank = <1>; +}; + +&psgtr { + status = "okay"; + /* sgmii, usb3 */ + clocks = <&si5332_1>, <&si5332_2>; + clock-names = "ref0", "ref1"; +}; + +&uart0 { /* uart0 MIO38-39 */ + status = "okay"; + bootph-all; +}; + +&gem0 { + status = "okay"; + phy-handle = <&phy0>; + phy-mode = "sgmii"; /* DTG generates this properly 1512 */ + is-internal-pcspma; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + /* reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; */ + phy0: ethernet-phy@0 { + reg = <0>; + }; + }; +}; + +&gpio { + status = "okay"; + gpio-line-names = "", "", "", "", "", /* 0 - 4 */ + "", "", "", "", "", /* 5 - 9 */ + "", "", "", "EMMC_DAT0", "EMMC_DAT1", /* 10 - 14 */ + "EMMC_DAT2", "EMMC_DAT3", "EMMC_DAT4", "EMMC_DAT5", "EMMC_DAT6", /* 15 - 19 */ + "EMMC_DAT7", "EMMC_CMD", "EMMC_CLK", "EMMC_RST_B", "", /* 20 - 24 */ + "", "DISP_SCL", "DISP_DC_B", "DISP_RES_B", "DISP_CS_B", /* 25 - 29 */ + "", "DISP_SDI", "SYSTEM_RST_R_B", "", "I2C0_SCL", /* 30 - 34 */ + "I2C0_SDA", "", "", "UART0_RXD_IN", "UART0_TXD_OUT", /* 35 - 39 */ + "", "", "ETH_RESET_B", "", "", /* 40 - 44 */ + "SD1_CD_B", "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3", /* 45 - 49 */ + "SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2", /* 50 - 54 */ + "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3", /* 55 - 59 */ + "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "USB1_CLK", /* 60 - 64 */ + "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1", /* 65 - 69 */ + "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6", /* 70 - 74 */ + "USB1_DATA7", "ETH_MDC", "ETH_MDIO", /* 75 - 77, MIO end and EMIO start */ + "", "", /* 78 - 79 */ + "", "", "", "", "", /* 80 - 84 */ + "", "", "", "", "", /* 85 -89 */ + "", "", "", "", "", /* 90 - 94 */ + "", "VCCO_500_RBIAS", "VCCO_501_RBIAS", "VCCO_502_RBIAS", "VCCO_500_RBIAS_LED", /* 95 - 99 */ + "VCCO_501_RBIAS_LED", "VCCO_502_RBIAS_LED", "SYSCTLR_VCCINT_EN", "SYSCTLR_VCC_IO_SOC_EN", "SYSCTLR_VCC_PMC_EN", /* 100 - 104 */ + "", "", "", "", "", /* 105 - 109 */ + "SYSCTLR_VCCO_500_EN", "SYSCTLR_VCCO_501_EN", "SYSCTLR_VCCO_502_EN", "SYSCTLR_VCCO_503_EN", "SYSCTLR_VCC1V8_EN", /* 110 - 114 */ + "SYSCTLR_VCC3V3_EN", "SYSCTLR_VCC1V2_DDR4_EN", "SYSCTLR_VCC1V1_LP4_EN", "SYSCTLR_VDD1_1V8_LP4_EN", "SYSCTLR_VADJ_FMC_EN", /* 115 - 119 */ + "", "", "", "SYSCTLR_UTIL_1V13_EN", "SYSCTLR_UTIL_1V8_EN", /* 120 - 124 */ + "SYSCTLR_UTIL_2V5_EN", "", "", "", "", /* 125 - 129 */ + "", "", "SYSCTLR_USBC_SBU1", "SYSCTLR_USBC_SBU2", "", /* 130 - 134 */ + "", "SYSCTLR_MIC2005_EN_B", "SYSCTLR_MIC2005_FAULT_B", "SYSCTLR_TUSB320_INT_B", "SYSCTLR_TUSB320_ID", /* 135 - 139 */ + "", "", "SYSCTLR_ETH_RESET_B", "", "", /* 140 - 144 */ + "", "", "", "", "", /* 145 - 149 */ + "", "", "", "", "", /* 150 - 154 */ + "", "", "", "", "", /* 155 - 159 */ + "", "", "", "", "", /* 160 - 164 */ + "", "", "", "", "", /* 165 - 169 */ + "", "", "", ""; /* 170 - 173 */ +}; + +&i2c0 { /* MIO34/35 */ + status = "okay"; + clock-frequency = <400000>; + + jtag_vref: mcp4725@62 { + compatible = "microchip,mcp4725"; + reg = <0x62>; + vref-millivolt = <3300>; + }; + + eeprom: eeprom@50 { /* u46 */ + compatible = "atmel,24c32"; + reg = <0x50>; + }; + /* u138 - TUSB320IRWBR - for USB-C */ +}; + +&usb0 { + status = "okay"; +}; + +&dwc3_0 { + status = "okay"; + dr_mode = "peripheral"; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + maximum-speed = "super-speed"; + phy-names = "usb3-phy"; + phys = <&psgtr 1 PHY_TYPE_USB3 0 1>; +}; + +&usb1 { + status = "disabled"; /* Any unknown issue with USB-C */ +}; + +&dwc3_1 { + /delete-property/ phy-names ; + /delete-property/ phys ; + dr_mode = "host"; + maximum-speed = "high-speed"; + snps,dis_u2_susphy_quirk ; + snps,dis_u3_susphy_quirk ; + status = "okay"; +}; + +&xilinx_ams { + status = "okay"; +}; + +&ams_ps { + status = "okay"; +}; + +&ams_pl { + status = "okay"; +}; + +&spi0 { + status = "okay"; + is-decoded-cs = <0>; + num-cs = <1>; + bootph-all; + displayspi@0 { + compatible = "syncoam,seps525"; + bootph-all; + reg = <0>; + status = "okay"; + spi-max-frequency = <10000000>; + spi-cpol; + spi-cpha; + rotate = <0>; + fps = <50>; + buswidth = <8>; + txbuflen = <64000>; + reset-gpios = <&gpio 0x1c GPIO_ACTIVE_LOW>; + dc-gpios = <&gpio 0x1b GPIO_ACTIVE_HIGH>; + debug = <0>; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-e-a2197-00-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-e-a2197-00-revA.dts @@ -0,0 +1,684 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal a2197 RevA System Controller + * + * (C) Copyright 2019 - 2022, Xilinx, Inc. + * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. + * + * Michal Simek + */ +/dts-v1/; + +#include "zynqmp.dtsi" +#include "zynqmp-clk-ccf.dtsi" +#include +#include + +/ { + model = "Versal System Controller on a2197 Eval board RevA"; /* VCK190/VMK180 */ + compatible = "xlnx,zynqmp-e-a2197-00-revA", "xlnx,zynqmp-a2197-revA", + "xlnx,zynqmp-a2197", "xlnx,zynqmp"; + + aliases { + ethernet0 = &gem0; + i2c0 = &i2c0; + i2c1 = &i2c1; + mmc0 = &sdhci1; + nvmem0 = &eeprom; + nvmem1 = &eeprom_ebm; + nvmem2 = &eeprom_fmc1; + nvmem3 = &eeprom_fmc2; + rtc0 = &rtc; + serial0 = &uart0; + serial1 = &dcc; + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; + }; + + ref_clk: ref-clk { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&si570_ref_clk>; + }; + + si570_ddrdimm1_clk: si570-ddrdimm1-clk { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&si570_ddr_dimm1>; + }; + + si570_lpddr4_clk2: si570-lpddr4-clk2 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&si570_lpddr4clk2>; + }; + + si570_lpddr4_clk1: si570-lpddr4-clk1 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&si570_lpddr4clk1>; + }; + + si570_hsdp_clk: si570-hsdp-clk { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&si570_hsdp>; + }; + + si570_zsfp_clk: si570-zsfp-clk { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&si570_zsfp>; + }; + + si570_user1_clk: si570-user1-clk { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&si570_user1>; + }; + + si5332_1: si5332-1 { /* u142 - GEM0 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + }; + + ina226-vccint { + compatible = "iio-hwmon"; + io-channels = <&vccint 0>, <&vccint 1>, <&vccint 2>, <&vccint 3>; + }; + ina226-vcc-soc { + compatible = "iio-hwmon"; + io-channels = <&vcc_soc 0>, <&vcc_soc 1>, <&vcc_soc 2>, <&vcc_soc 3>; + }; + ina226-vcc-pmc { + compatible = "iio-hwmon"; + io-channels = <&vcc_pmc 0>, <&vcc_pmc 1>, <&vcc_pmc 2>, <&vcc_pmc 3>; + }; + ina226-vcc-ram { + compatible = "iio-hwmon"; + io-channels = <&vcc_ram 0>, <&vcc_ram 1>, <&vcc_ram 2>, <&vcc_ram 3>; + }; + ina226-vcc-pslp { + compatible = "iio-hwmon"; + io-channels = <&vcc_pslp 0>, <&vcc_pslp 1>, <&vcc_pslp 2>, <&vcc_pslp 3>; + }; + ina226-vcc-psfp { + compatible = "iio-hwmon"; + io-channels = <&vcc_psfp 0>, <&vcc_psfp 1>, <&vcc_psfp 2>, <&vcc_psfp 3>; + }; + ina226-vccaux { + compatible = "iio-hwmon"; + io-channels = <&vccaux 0>, <&vccaux 1>, <&vccaux 2>, <&vccaux 3>; + }; + ina226-vccaux-pmc { + compatible = "iio-hwmon"; + io-channels = <&vccaux_pmc 0>, <&vccaux_pmc 1>, <&vccaux_pmc 2>, <&vccaux_pmc 3>; + }; + ina226-vcco-500 { + compatible = "iio-hwmon"; + io-channels = <&vcco_500 0>, <&vcco_500 1>, <&vcco_500 2>, <&vcco_500 3>; + }; + ina226-vcco-501 { + compatible = "iio-hwmon"; + io-channels = <&vcco_501 0>, <&vcco_501 1>, <&vcco_501 2>, <&vcco_501 3>; + }; + ina226-vcco-502 { + compatible = "iio-hwmon"; + io-channels = <&vcco_502 0>, <&vcco_502 1>, <&vcco_502 2>, <&vcco_502 3>; + }; + ina226-vcco-503 { + compatible = "iio-hwmon"; + io-channels = <&vcco_503 0>, <&vcco_503 1>, <&vcco_503 2>, <&vcco_503 3>; + }; + ina226-vcc-1v8 { + compatible = "iio-hwmon"; + io-channels = <&vcc_1v8 0>, <&vcc_1v8 1>, <&vcc_1v8 2>, <&vcc_1v8 3>; + }; + ina226-vcc-3v3 { + compatible = "iio-hwmon"; + io-channels = <&vcc_3v3 0>, <&vcc_3v3 1>, <&vcc_3v3 2>, <&vcc_3v3 3>; + }; + ina226-vcc-1v2-ddr4 { + compatible = "iio-hwmon"; + io-channels = <&vcc_1v2_ddr4 0>, <&vcc_1v2_ddr4 1>, <&vcc_1v2_ddr4 2>, <&vcc_1v2_ddr4 3>; + }; + ina226-vcc-1v1-lp4 { + compatible = "iio-hwmon"; + io-channels = <&vcc1v1_lp4 0>, <&vcc1v1_lp4 1>, <&vcc1v1_lp4 2>, <&vcc1v1_lp4 3>; + }; + ina226-vadj-fmc { + compatible = "iio-hwmon"; + io-channels = <&vadj_fmc 0>, <&vadj_fmc 1>, <&vadj_fmc 2>, <&vadj_fmc 3>; + }; + ina226-mgtyavcc { + compatible = "iio-hwmon"; + io-channels = <&mgtyavcc 0>, <&mgtyavcc 1>, <&mgtyavcc 2>, <&mgtyavcc 3>; + }; + ina226-mgtyavtt { + compatible = "iio-hwmon"; + io-channels = <&mgtyavtt 0>, <&mgtyavtt 1>, <&mgtyavtt 2>, <&mgtyavtt 3>; + }; + ina226-mgtyvccaux { + compatible = "iio-hwmon"; + io-channels = <&mgtyvccaux 0>, <&mgtyvccaux 1>, <&mgtyvccaux 2>, <&mgtyvccaux 3>; + }; +}; + +&uart0 { /* uart0 MIO38-39 */ + status = "okay"; +}; + +&sdhci1 { /* sd1 MIO45-51 cd in place */ + status = "okay"; + no-1-8-v; + disable-wp; + xlnx,mio-bank = <1>; +}; + +/* GEM SGMII */ +&psgtr { + status = "okay"; + /* gem0 */ + clocks = <&si5332_1>; + clock-names = "ref0"; +}; + +&gem0 { + status = "okay"; + phys = <&psgtr 0 PHY_TYPE_SGMII 0 0>; + phy-handle = <&phy0>; + phy-mode = "sgmii"; + is-internal-pcspma; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + phy0: ethernet-phy@0 { /* u131 M88E1512 */ + reg = <0>; + }; + }; +}; + +&gpio { + status = "okay"; + gpio-line-names = "", "", "", "", "", /* 0 - 4 */ + "", "", "DC_SYS_CTRL0", "DC_SYS_CTRL1", "DC_SYS_CTRL2", /* 5 - 9 */ + "DC_SYS_CTRL3", "ZU4_TRIGGER", "SYSCTLR_PB", "", "", /* 10 - 14 */ + "", "", "", "", "", /* 15 - 19 */ + "", "", "", "", "", /* 20 - 24 */ + "", "", "", "", "", /* 25 - 29 */ + "", "", "", "", "LP_I2C0_PMC_SCL", /* 30 - 34 */ + "LP_I2C0_PMC_SDA", "LP_I2C1_SCL", "LP_I2C1_SDA", "UART0_RXD_IN", "UART0_TXD_OUT", /* 35 - 39 */ + "", "", "ETH_RESET_B", "", "", /* 40 - 44 */ + "SD1_CD_B", "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3", /* 45 - 49 */ + "SD1_CMD", "SD1_CLK", "", "", "", /* 50 - 54 */ + "", "", "", "", "", /* 55 - 59 */ + "", "", "", "", "", /* 60 - 64 */ + "", "", "", "", "", /* 65 - 69 */ + "", "", "", "", "", /* 70 - 74 */ + "", "ETH_MDC", "ETH_MDIO", /* 75 - 77, MIO end and EMIO start */ + "SYSCTLR_VERSAL_MODE0", "SYSCTLR_VERSAL_MODE1", /* 78 - 79 */ + "SYSCTLR_VERSAL_MODE2", "SYSCTLR_VERSAL_MODE3", "SYSCTLR_POR_B_LS", "DC_PRSNT", "", /* 80 - 84 */ + "SYSCTLR_JTAG_S0", "SYSCTLR_JTAG_S1", "SYSCTLR_IIC_MUX0_RESET_B", "SYSCTLR_IIC_MUX1_RESET_B", "", /* 85 - 89 */ + "SYSCTLR_GPIO0", "SYSCTLR_GPIO1", "SYSCTLR_GPIO2", "SYSCTLR_GPIO3", "SYSCTLR_GPIO4", /* 90 - 94 */ + "SYSCTLR_GPIO5", "", "", "", "", /* 95 - 99 */ + "", "", "", "", "", /* 100 - 104 */ + "", "", "", "", "", /* 105 - 109 */ + "", "", "", "", "", /* 110 - 114 */ + "", "", "", "", "", /* 115 - 119 */ + "", "", "", "", "", /* 120 - 124 */ + "", "", "", "", "", /* 125 - 129 */ + "PMBUS1_INA226_ALERT", "PMBUS2_INA226_ALERT", "", "", "", /* 130 - 134 */ + "", "", "", "", "", /* 135 - 139 */ + "PMBUS_ALERT", "", "SYSCTLR_ETH_RESET_B", "SYSCTLR_VCC0V85_TG", "MAX6643_OT_B", /* 140 - 144 */ + "MAX6643_FANFINAL_B", "MAX6643_FULLSPD", "", "", "", /* 145 - 149 */ + "", "", "", "", "", /* 150 - 154 */ + "", "", "", "", "", /* 155 - 159 */ + "", "", "", "", "", /* 160 - 164 */ + "", "", "", "", "", /* 165 - 169 */ + "", "", "", ""; /* 170 - 173 */ +}; + +&i2c0 { /* MIO 34-35 - can't stay here */ + status = "okay"; + clock-frequency = <400000>; + + tca6416_u233: gpio@20 { /* u233 */ + compatible = "ti,tca6416"; + reg = <0x20>; + gpio-controller; /* interrupt not connected */ + #gpio-cells = <2>; + gpio-line-names = "MAX6643_OT_B", "MAX6643_FANFAIL_B", "", "", /* 0 - 3 */ + "PMBUS2_INA226_ALERT", "", "", "MAX6643_FULLSPD", /* 4 - 7 */ + "FMCP1_FMC_PRSNT_M2C_B", "FMCP2_FMC_PRSNT_M2C_B", "FMCP1_FMCP_PRSNT_M2C_B", "FMCP2_FMCP_PRSNT_M2C_B", /* 10 - 13 */ + "VCCINT_VRHOT_B", "8A34001_EXP_RST_B", "PMBUS_ALERT", "PMBUS1_INA226_ALERT"; /* 14 - 17 */ + }; + + i2c-mux@74 { /* u33 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + /* reset-gpios = <&gpio SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */ + i2c@0 { /* PMBUS */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* u152 IR35215 0x16/0x46 vcc_soc */ + /* u179 ir38164 0x19/0x49 vcco_500 */ + /* u181 ir38164 0x1a/0x4a vcco_501 */ + /* u183 ir38164 0x1b/0x4b vcco_502 */ + /* u185 ir38164 0x1e/0x4e vadj_fmc */ + /* u187 ir38164 0x1F/0x4f mgtyavcc */ + /* u189 ir38164 0x20/0x50 mgtyavtt */ + /* u194 ir38164 0x13/0x43 vdd1_1v8_lp4 */ + /* u195 ir38164 0x14/0x44 vdd2_1v8_lp4 */ + + irps5401_47: irps5401@47 { /* IRPS5401 - u160 */ + compatible = "infineon,irps5401"; + reg = <0x47>; /* pmbus / i2c 0x17 */ + }; + irps5401_4c: irps5401@4c { /* IRPS5401 - u167 */ + compatible = "infineon,irps5401"; + reg = <0x4c>; /* pmbus / i2c 0x1c */ + }; + irps5401_4d: irps5401@4d { /* IRPS5401 - u175 */ + compatible = "infineon,irps5401"; + reg = <0x4d>; /* pmbus / i2c 0x1d */ + }; + }; + i2c@1 { /* PMBUS1_INA226 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* FIXME check alerts coming to SC */ + vccint: ina226@40 { /* u65 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vccint"; + reg = <0x40>; + shunt-resistor = <500>; /* R440 */ + /* 0.80V @ 32A 1 of 6 Phases*/ + }; + vcc_soc: ina226@41 { /* u161 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcc-soc"; + reg = <0x41>; + shunt-resistor = <500>; /* R1702 */ + /* 0.80V @ 18A */ + }; + vcc_pmc: ina226@42 { /* u163 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcc-pmc"; + reg = <0x42>; + shunt-resistor = <5000>; /* R1214 */ + /* 0.78V @ 500mA */ + }; + vcc_ram: ina226@43 { /* u162 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcc-ram"; + reg = <0x43>; + shunt-resistor = <5000>; /* r1221 */ + /* 0.78V @ 4A */ + }; + vcc_pslp: ina226@44 { /* u165 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcc-pslp"; + reg = <0x44>; + shunt-resistor = <5000>; /* R1216 */ + /* 0.78V @ 1A */ + }; + vcc_psfp: ina226@45 { /* u164 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcc-psfp"; + reg = <0x45>; + shunt-resistor = <5000>; /* R1219 */ + /* 0.78V @ 2A */ + }; + }; + i2c@2 { /* PCIE_CLK */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* u39 8T49N240 */ + }; + i2c@3 { /* PMBUS2_INA226 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* FIXME check alerts coming to SC */ + vccaux: ina226@40 { /* u166 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vccaux"; + reg = <0x40>; + shunt-resistor = <5000>; /* R382 */ + /* 1.5V @ 3A */ + }; + vccaux_pmc: ina226@41 { /* u168 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vccaux-pmc"; + reg = <0x41>; + shunt-resistor = <5000>; /* R1246 */ + /* 1.5V @ 500mA */ + }; + vcco_500: ina226@42 { /* u178 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcco-500"; + reg = <0x42>; + shunt-resistor = <2000>; /* R1300 */ + /* 3.3V @ 5A */ + }; + vcco_501: ina226@43 { /* u180 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcco-501"; + reg = <0x43>; + shunt-resistor = <2000>; /* R1313 */ + /* 3.3V @ 5A */ + }; + vcco_502: ina226@44 { /* u182 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcco-502"; + reg = <0x44>; + shunt-resistor = <2000>; /* R1330 */ + /* 3.3V @ 5A */ + }; + vcco_503: ina226@45 { /* u172 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcco-503"; + reg = <0x45>; + shunt-resistor = <5000>; /* R1229 */ + /* 1.8V @ 2A */ + }; + vcc_1v8: ina226@46 { /* u173 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcc-1v8"; + reg = <0x46>; + shunt-resistor = <5000>; /* R400 */ + /* 1.8V @ 6A */ + }; + vcc_3v3: ina226@47 { /* u174 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcc-3v3"; + reg = <0x47>; + shunt-resistor = <5000>; /* R1232 */ + /* 3.3V @ 500mA */ + }; + vcc_1v2_ddr4: ina226@48 { /* u176 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcc-1v2-ddr4"; + reg = <0x48>; + shunt-resistor = <5000>; /* R1275 */ + /* 1.2V @ 4A */ + }; + vcc1v1_lp4: ina226@49 { /* u177 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcc1v1-lp4"; + reg = <0x49>; + shunt-resistor = <5000>; /* R1286 */ + /* 1.1V @ 4A */ + }; + vadj_fmc: ina226@4a { /* u184 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vadj-fmc"; + reg = <0x4a>; + shunt-resistor = <2000>; /* R1350 */ + /* 1.5V @ 10A */ + }; + mgtyavcc: ina226@4b { /* u186 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-mgtyavcc"; + reg = <0x4b>; + shunt-resistor = <2000>; /* R1367 */ + /* 0.88V @ 6A */ + }; + mgtyavtt: ina226@4c { /* u188 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-mgtyavtt"; + reg = <0x4c>; + shunt-resistor = <2000>; /* R1384 */ + /* 1.2V @ 10A */ + }; + mgtyvccaux: ina226@4d { /* u234 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-mgtyvccaux"; + reg = <0x4d>; + shunt-resistor = <5000>; /* r1679 */ + /* 1.5V @ 500mA */ + }; + }; + i2c@4 { /* LP_I2C_SM */ + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + /* FIXME wires ready but chip is missing */ + }; + i2c@5 { /* zSFP_SI570 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + si570_zsfp: clock-generator@5d { /* u192 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; + temperature-stability = <50>; + factory-fout = <156250000>; + clock-frequency = <156250000>; + clock-output-names = "si570_zsfp_clk"; + silabs,skip-recall; + }; + }; + i2c@6 { /* USER_SI570_1 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + si570_user1: clock-generator@5f { /* u205 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5f>; + temperature-stability = <50>; + factory-fout = <100000000>; + clock-frequency = <100000000>; + clock-output-names = "si570_user1"; + silabs,skip-recall; + }; + + }; + i2c@7 { /* USER_SI570_2 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + /* FIXME wires ready but chip is missing */ + }; + }; +}; + +&i2c1 { /* i2c1 MIO 36-37 */ + status = "okay"; + clock-frequency = <400000>; + + i2c-mux@74 { /* u35 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + i2c-mux-idle-disconnect; + /* reset-gpios = <&gpio SYSCTLR_IIC_MUX1_RESET_B GPIO_ACTIVE_HIGH>; */ + dc_i2c: i2c@0 { /* DC_I2C */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* Use for storing information about SC board */ + eeprom: eeprom@54 { /* u34 - m24128 16kB */ + compatible = "st,24c128", "atmel,24c128"; + reg = <0x54>; /* 0x5c too */ + }; + si570_ref_clk: clock-generator@5d { /* u32 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; + temperature-stability = <50>; + factory-fout = <33333333>; + clock-frequency = <33333333>; + clock-output-names = "ref_clk"; + silabs,skip-recall; + }; + /* and connector J212D */ + eeprom_ebm: eeprom@52 { /* x-ebm module */ + compatible = "st,24c128", "atmel,24c128"; + reg = <0x52>; + }; + }; + fmc1: i2c@1 { /* FMCP1_IIC */ + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* FIXME connection to Samtec J51C */ + /* expected eeprom 0x50 FMC cards */ + eeprom_fmc1: eeprom@50 { + compatible = "st,24c128", "atmel,24c128"; + reg = <0x50>; + }; + }; + fmc2: i2c@2 { /* FMCP2_IIC */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* FIXME connection to Samtec J53C */ + /* expected eeprom 0x50 FMC cards */ + eeprom_fmc2: eeprom@50 { + compatible = "st,24c128", "atmel,24c128"; + reg = <0x50>; + }; + }; + i2c@3 { /* DDR4_DIMM1 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + si570_ddr_dimm1: clock-generator@60 { /* u2 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x60>; + temperature-stability = <50>; + factory-fout = <200000000>; + clock-frequency = <200000000>; + clock-output-names = "si570_ddrdimm1_clk"; + silabs,skip-recall; + }; + }; + i2c@4 { /* LPDDR4_SI570_CLK2 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + si570_lpddr4clk2: clock-generator@60 { /* u3 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x60>; + temperature-stability = <50>; + factory-fout = <200000000>; + clock-frequency = <200000000>; + clock-output-names = "si570_lpddr4_clk2"; + silabs,skip-recall; + }; + }; + i2c@5 { /* LPDDR4_SI570_CLK1 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + si570_lpddr4clk1: clock-generator@60 { /* u4 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x60>; + temperature-stability = <50>; + factory-fout = <200000000>; + clock-frequency = <200000000>; + clock-output-names = "si570_lpddr4_clk1"; + silabs,skip-recall; + }; + }; + i2c@6 { /* HSDP_SI570 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + si570_hsdp: clock-generator@5d { /* u5 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; + temperature-stability = <50>; + factory-fout = <156250000>; + clock-frequency = <156250000>; + clock-output-names = "si570_hsdp_clk"; + silabs,skip-recall; + }; + }; + i2c@7 { /* 8A34001 - U219B and J310 connector */ + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + }; + }; + i2c-mux@75 { /* u214 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x75>; + i2c-mux-idle-disconnect; + i2c@0 { /* SFP0_IIC */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* SFP0 */ + }; + i2c@1 { /* SFP1_IIC */ + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* SFP1 */ + }; + i2c@2 { /* QSFP1_I2C */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* QSFP1 */ + }; + /* 3 - 7 unused */ + }; +}; + +&xilinx_ams { + status = "okay"; +}; + +&ams_ps { + status = "okay"; +}; + +&ams_pl { + status = "okay"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-e-a2197-00-revB.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-e-a2197-00-revB.dts @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal a2197 RevB System Controller + * + * (C) Copyright 2019 - 2022, Xilinx, Inc. + * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +#include "zynqmp-e-a2197-00-revA.dts" + +/ { + model = "Versal System Controller on a2197 Eval board RevB"; /* VCK190/VMK180 */ + compatible = "xlnx,zynqmp-e-a2197-00-revB", "xlnx,zynqmp-a2197-revB", + "xlnx,zynqmp-a2197", "xlnx,zynqmp"; + + /delete-node/ ina226-vcco-500; + /delete-node/ ina226-vcco-501; + /delete-node/ ina226-vcco-502; +}; + +&i2c0 { + i2c-mux@74 { /* u33 */ + i2c@2 { /* PCIE_CLK */ + /delete-node/ clock-generator@6c; + }; + i2c@3 { /* PMBUS2_INA226 */ + /delete-node/ ina226@42; + /delete-node/ ina226@43; + /delete-node/ ina226@44; + }; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-g-a2197-00-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-g-a2197-00-revA.dts @@ -0,0 +1,319 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal a2197 RevA System Controller on MGT + * + * (C) Copyright 2019, Xilinx, Inc. + * + * Michal Simek + */ +/dts-v1/; + +#include "zynqmp.dtsi" +#include "zynqmp-clk-ccf.dtsi" +#include + +/ { + model = "Versal System Controller on a2197 MGT Char board RevA"; + compatible = "xlnx,zynqmp-g-a2197-00-revA", "xlnx,zynqmp-a2197-revA", + "xlnx,zynqmp-a2197", "xlnx,zynqmp"; + + aliases { + ethernet0 = &gem0; + i2c0 = &i2c0; + mmc0 = &sdhci0; + nvmem0 = &eeprom; + rtc0 = &rtc; + serial0 = &uart0; + serial1 = &dcc; + usb0 = &usb0; + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; + }; + + ina226-u74 { + compatible = "iio-hwmon"; + io-channels = <&u74 0>, <&u74 1>, <&u74 2>, <&u74 3>; + }; + ina226-u75 { + compatible = "iio-hwmon"; + io-channels = <&u75 0>, <&u75 1>, <&u75 2>, <&u75 3>; + }; + ina226-u78 { + compatible = "iio-hwmon"; + io-channels = <&u78 0>, <&u78 1>, <&u78 2>, <&u78 3>; + }; + ina226-u79 { + compatible = "iio-hwmon"; + io-channels = <&u79 0>, <&u79 1>, <&u79 2>, <&u79 3>; + }; + ina226-u82 { + compatible = "iio-hwmon"; + io-channels = <&u82 0>, <&u82 1>, <&u82 2>, <&u82 3>; + }; + ina226-u84 { + compatible = "iio-hwmon"; + io-channels = <&u84 0>, <&u84 1>, <&u84 2>, <&u84 3>; + }; +}; + +&sdhci0 { /* emmc MIO 13-23 16GB */ + status = "okay"; + non-removable; + disable-wp; + no-sd; + no-sdio; + cap-mmc-hw-reset; + bus-width = <8>; + xlnx,mio-bank = <0>; +}; + +&uart0 { /* uart0 MIO38-39 */ + status = "okay"; +}; + +&gem0 { /* eth MDIO 76/77 */ + status = "okay"; + phy-handle = <&phy0>; + phy-mode = "sgmii"; + is-internal-pcspma; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + phy0: ethernet-phy@0 { /* marwell m88e1512 */ + reg = <0>; + reset-gpios = <&gpio 42 GPIO_ACTIVE_LOW>; +/* xlnx,phy-type = ; */ + }; + }; +}; + +&gpio { + status = "okay"; + gpio-line-names = "", "", "", "", "", /* 0 - 4 */ + "", "", "", "", "", /* 5 - 9 */ + "", "", "", "EMMC_DAT0", "EMMC_DAT1", /* 10 - 14 */ + "EMMC_DAT2", "EMMC_DAT3", "EMMC_DAT4", "EMMC_DAT5", "EMMC_DAT6", /* 15 - 19 */ + "EMMC_DAT7", "EMMC_CMD", "EMMC_CLK", "EMMC_RST_B", "", /* 20 - 24 */ + "", "", "", "", "", /* 25 - 29 */ + "", "", "", "", "LP_I2C0_PMC_SCL", /* 30 - 34 */ + "LP_I2C0_PMC_SDA", "", "", "UART0_RXD_IN", "UART0_TXD_OUT", /* 35 - 39 */ + "", "", "ETH_RESET_B", "", "", /* 40 - 44 */ + "", "", "", "", "", /* 45 - 49 */ + "", "", "USB0_CLK", "USB0_DIR", "USB0_DATA2", /* 50 - 54 */ + "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3", /* 55 - 59 */ + "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "", /* 60 - 64 */ + "", "", "", "", "", /* 65 - 69 */ + "", "", "", "", "", /* 70 - 74 */ + "", "ETH_MDC", "ETH_MDIO", /* 75 - 77, MIO end and EMIO start */ + "SYSCTLR_VERSAL_MODE0", "SYSCTLR_VERSAL_MODE1", /* 78 - 79 */ + "SYSCTLR_VERSAL_MODE2", "SYSCTLR_VERSAL_MODE3", "SYSCTLR_POR_B_LS", "DC_PRSNT", "SYSCTLR_POWER_EN", /* 80 - 84 */ + "SYSCTLR_JTAG_S0", "SYSCTLR_JTAG_S1", "SYSCTLR_IIC_MUX0_RESET_B", "SYSCTLR_IIC_MUX1_RESET_B", "SYSCTLR_LP_I2C_SM_ALERT", /* 85 -89 */ + "SYSCTLR_GPIO0", "SYSCTLR_GPIO1", "SYSCTLR_GPIO2", "SYSCTLR_GPIO3", "SYSCTLR_GPIO4", /* 90 - 94 */ + "SYSCTLR_GPIO5", "VCCO_500_RBIAS", "VCCO_501_RBIAS", "VCCO_502_RBIAS", "VCCO_500_RBIAS_LED", /* 95 - 99 */ + "VCCO_501_RBIAS_LED", "VCCO_502_RBIAS_LED", "SYSCTLR_VCCINT_EN", "SYSCTLR_VCC_IO_SOC_EN", "SYSCTLR_VCC_PMC_EN", /* 100 - 104 */ + "SYSCTLR_VCC_RAM_EN", "SYSCTLR_VCC_PSLP_EN", "SYSCTLR_VCC_PSFP_EN", "SYSCTLR_VCCAUX_EN", "SYSCTLR_VCCAUX_PMC_EN", /* 105 - 109 */ + "SYSCTLR_VCCO_500_EN", "SYSCTLR_VCCO_501_EN", "SYSCTLR_VCCO_502_EN", "SYSCTLR_VCCO_503_EN", "SYSCTLR_VCC1V8_EN", /* 110 - 114 */ + "SYSCTLR_VCC3V3_EN", "SYSCTLR_VCC1V2_DDR4_EN", "SYSCTLR_VCC1V1_LP4_EN", "SYSCTLR_VDD1_1V8_LP4_EN", "SYSCTLR_VADJ_FMC_EN", /* 115 - 119 */ + "SYSCTLR_MGTYAVCC_EN", "SYSCTLR_MGTYAVTT_EN", "SYSCTLR_MGTYVCCAUX_EN", "SYSCTLR_UTIL_1V13_EN", "SYSCTLR_UTIL_1V8_EN", /* 120 - 124 */ + "SYSCTLR_UTIL_2V5_EN", "FMCP1_FMC_PRSNT_M2C_B", "FMCP2_FMC_PRSNT_M2C_B", "FMCP1_FMCP_PRSNT_M2C_B", "FMCP2_FMCP_PRSNT_M2C_B", /* 125 - 129 */ + "PMBUS1_INA226_ALERT", "PMBUS2_INA226_ALERT", "SYSCTLR_USBC_SBU1", "SYSCTLR_USBC_SBU2", "TI_CABLE1", /* 130 - 134 */ + "TI_CABLE2", "SYSCTLR_MIC2005_EN_B", "SYSCTLR_MIC2005_FAULT_B", "SYSCTLR_TUSB320_INT_B", "SYSCTLR_TUSB320_ID", /* 135 - 139 */ + "PMBUS1_ALERT", "PMBUS2_ALERT", "SYSCTLR_ETH_RESET_B", "SYSCTLR_VCC0V85_TG", "MAX6643_OT_B", /* 140 - 144 */ + "MAX6643_FANFINAL_B", "MAX6643_FULLSPD", "", "", "", /* 145 - 149 */ + "", "", "", "", "", /* 150 - 154 */ + "", "", "", "", "", /* 155 - 159 */ + "", "", "", "", "", /* 160 - 164 */ + "", "", "", "", "", /* 165 - 169 */ + "", "", "", ""; /* 170 - 173 */ +}; + +&i2c0 { /* MIO 34-35 - can't stay here */ + status = "okay"; + clock-frequency = <400000>; + scl-gpios = <&gpio 34 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio 35 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-mux@74 { /* u94 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + /* FIXME reset connected to SYSCTRL_IIC_MUX0_RESET */ + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* Use for storing information about SC board */ + eeprom: eeprom@50 { /* u96 - 24LC32A - 256B */ + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + i2c@1 { /* CM_I2C_SCL - Samtec */ + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + i2c@2 { /* PMBUS - AFX_PMBUS */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + tps544@d { /* u85 */ + compatible = "ti,tps544b25"; + reg = <0xd>; + }; + tps544@10 { /* u73 */ + compatible = "ti,tps544b25"; + reg = <0x10>; + }; + tps544@11 { /* u76 */ + compatible = "ti,tps544b25"; + reg = <0x11>; + }; + tps544@12 { /* u77 */ + compatible = "ti,tps544b25"; + reg = <0x12>; + }; + tps544@13 { /* u80 */ + compatible = "ti,tps544b25"; + reg = <0x13>; + }; + tps544@14 { /* u81 */ + compatible = "ti,tps544b25"; + reg = <0x14>; + }; + tps544@15 { /* u83 */ + compatible = "ti,tps544b25"; + reg = <0x15>; + }; + tps544@16 { /* u63 */ + compatible = "ti,tps544b25"; + reg = <0x16>; + }; + tps544@17 { /* u66 */ + compatible = "ti,tps544b25"; + reg = <0x17>; + }; + tps544@18 { /* u67 */ + compatible = "ti,tps544b25"; + reg = <0x18>; + }; + tps544@19 { /* u69 */ + compatible = "ti,tps544b25"; + reg = <0x19>; + }; + tps544@1d { /* u88 */ + compatible = "ti,tps544b25"; + reg = <0x1d>; + }; + tps544@1e { /* u89 */ + compatible = "ti,tps544b25"; + reg = <0x1e>; + }; + tps544@1f { /* u87 */ + compatible = "ti,tps544b25"; + reg = <0x1f>; + }; + tps544@20 { /* u71 */ + compatible = "ti,tps544b25"; + reg = <0x20>; + }; + u74: ina226@40 { /* u74 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-u74"; + reg = <0x40>; + shunt-resistor = <1000>; + }; + u75: ina226@41 { /* u75 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-u75"; + reg = <0x41>; + shunt-resistor = <1000>; + }; + u78: ina226@42 { /* u78 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-u78"; + reg = <0x42>; + shunt-resistor = <5000>; + }; + u79: ina226@43 { /* u79 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-u79"; + reg = <0x43>; + shunt-resistor = <1000>; + }; + u82: ina226@44 { /* u82 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-u82"; + reg = <0x44>; + shunt-resistor = <1000>; + }; + u84: ina226@45 { /* u84 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-u84"; + reg = <0x45>; + shunt-resistor = <5000>; + }; + tps53681@60 { /* u53 - 0xc0 - FIXME name - don't know what it does - also vcc_io_soc */ + compatible = "ti,tps53681", "ti,tps53679"; + reg = <0x60>; + }; + }; + i2c@3 { /* fmc1 via JA2G */ + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + eeprom_fmc1: eeprom@50 { /* on FMC */ + compatible = "atmel,24c04"; + reg = <0x50>; + }; + }; + i2c@4 { /* fmc2 via JA3G */ + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + eeprom_fmc2: eeprom@50 { /* on FMC */ + compatible = "atmel,24c04"; + reg = <0x50>; + }; + }; + i2c@5 { /* fmc3 via JA4G */ + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + eeprom_fmc3: eeprom@50 { /* on FMC */ + compatible = "atmel,24c04"; + reg = <0x50>; + }; + }; + i2c@6 { /* ddr dimm */ + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + }; + /* 7 unused */ + }; +}; + +&usb0 { /* USB0 MIO52-63 */ + status = "okay"; +}; + +&dwc3_0 { + status = "okay"; + dr_mode = "peripheral"; + maximum-speed = "high-speed"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-m-a2197-01-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-m-a2197-01-revA.dts @@ -0,0 +1,492 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal a2197 RevA System Controller + * + * (C) Copyright 2019, Xilinx, Inc. + * + * Michal Simek + */ +/dts-v1/; + +#include "zynqmp.dtsi" +#include "zynqmp-clk-ccf.dtsi" +#include + +/ { + model = "Versal System Controller on a2197 Memory Char board RevA"; + compatible = "xlnx,zynqmp-m-a2197-01-revA", "xlnx,zynqmp-a2197-revA", + "xlnx,zynqmp-a2197", "xlnx,zynqmp"; + + aliases { + ethernet0 = &gem0; + i2c0 = &i2c0; + i2c1 = &i2c1; + mmc0 = &sdhci0; + mmc1 = &sdhci1; + nvmem0 = &eeprom; + rtc0 = &rtc; + serial0 = &uart0; + serial1 = &uart1; + serial2 = &dcc; + usb0 = &usb0; + usb1 = &usb1; + spi0 = &qspi; + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; /* FIXME don't know how big memory is there */ + }; + + ina226-vcc-aux { + compatible = "iio-hwmon"; + io-channels = <&vcc_aux 0>, <&vcc_aux 1>, <&vcc_aux 2>, <&vcc_aux 3>; + }; + ina226-vcc-ram { + compatible = "iio-hwmon"; + io-channels = <&vcc_ram 0>, <&vcc_ram 1>, <&vcc_ram 2>, <&vcc_ram 3>; + }; + ina226-vcc1v1-lp4 { + compatible = "iio-hwmon"; + io-channels = <&vcc1v1_lp4 0>, <&vcc1v1_lp4 1>, <&vcc1v1_lp4 2>, <&vcc1v1_lp4 3>; + }; + ina226-vcc1v2-lp4 { + compatible = "iio-hwmon"; + io-channels = <&vcc1v2_lp4 0>, <&vcc1v2_lp4 1>, <&vcc1v2_lp4 2>, <&vcc1v2_lp4 3>; + }; + ina226-vdd1-1v8-lp4 { + compatible = "iio-hwmon"; + io-channels = <&vdd1_1v8_lp4 0>, <&vdd1_1v8_lp4 1>, <&vdd1_1v8_lp4 2>, <&vdd1_1v8_lp4 3>; + }; + ina226-vcc0v6-lp4 { + compatible = "iio-hwmon"; + io-channels = <&vcc0v6_lp4 0>, <&vcc0v6_lp4 1>, <&vcc0v6_lp4 2>, <&vcc0v6_lp4 3>; + }; +}; + +&qspi { + status = "okay"; + num-cs = <2>; + flash@0 { + compatible = "m25p80", "jedec,spi-nor"; /* 32MB */ + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x4000000 0x4000000>; /* 64MB */ + #address-cells = <1>; + #size-cells = <1>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + spi-max-frequency = <108000000>; + }; +}; + +&sdhci0 { /* emmc MIO 13-23 - with some settings 16GB */ + status = "okay"; + non-removable; + disable-wp; + no-sd; + no-sdio; + cap-mmc-hw-reset; + bus-width = <8>; + xlnx,mio-bank = <0>; /* FIXME tap delay */ +}; + +&uart0 { /* uart0 MIO38-39 */ + status = "okay"; +}; + +&uart1 { /* uart1 MIO40-41 */ + status = "okay"; +}; + +&sdhci1 { /* sd1 MIO45-51 cd in place */ + status = "disable"; + no-1-8-v; + disable-wp; + xlnx,mio-bank = <1>; +}; + +&gem0 { + status = "okay"; + phy-handle = <&phy0>; + phy-mode = "sgmii"; /* DTG generates this properly 1512 */ + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; + phy0: ethernet-phy@0 { /* marwell m88e1512 - SGMII */ + reg = <0>; +/* xlnx,phy-type = ; */ + }; + }; +}; + +&gpio { + status = "okay"; + gpio-line-names = "SCLK_OUT", "MISO_MO1", "MO2", "MO3", "MOSI_MIO0", /* 0 - 4 */ + "N_SS_OUT", "", "SYS_CTRL0", "SYS_CTRL1", "SYS_CTRL2", /* 5 - 9 */ + "SYS_CTRL3", "SYS_CTRL4", "SYS_CTRL5", "EMMC_DAT0", "EMMC_DAT1", /* 10 - 14 */ + "EMMC_DAT2", "EMMC_DAT3", "EMMC_DAT4", "EMMC_DAT5", "EMMC_DAT6", /* 15 - 19 */ + "EMMC_DAT7", "EMMC_CMD", "EMMC_CLK", "EMMC_RST_B", "", /* 20 - 24 */ + "", "RXD0_IN", "TXD0_OUT", "TXD1_OUT", "RXD1_IN", /* 25 - 29 */ + "", "", "", "", "LP_I2C0_PMC_SCL", /* 30 - 34 */ + "LP_I2C0_PMC_SDA", "LP_I2C1_SCL", "LP_I2C1_SDA", "UART0_RXD_IN", "UART0_TXD_OUT", /* 35 - 39 */ + "UART1_TXD_OUT", "UART1_RXD_IN", "ETH_RESET_B", "", "", /* 40 - 44 */ + "SD1_CD_B", "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3", /* 45 - 49 */ + "SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2", /* 50 - 54 */ + "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3", /* 55 - 59 */ + "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "USB1_CLK", /* 60 - 64 */ + "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1", /* 65 - 69 */ + "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6", /* 70 - 74 */ + "USB1_DATA7", "ETH_MDC", "ETH_MDIO", /* 75 - 77, MIO end and EMIO start */ + "", "", "", "", "", /* 78 - 79 */ + "", "", "", "", "", /* 80 - 84 */ + "", "", "", "", "", /* 85 -89 */ + "", "", "", "", "", /* 90 - 94 */ + "", "", "", "", "", /* 95 - 99 */ + "", "", "", "", "", /* 100 - 104 */ + "", "", "", "", "", /* 105 - 109 */ + "", "", "", "", "", /* 110 - 114 */ + "", "", "", "", "", /* 115 - 119 */ + "", "", "", "", "", /* 120 - 124 */ + "", "", "", "", "", /* 125 - 129 */ + "", "", "", "", "", /* 130 - 134 */ + "", "", "", "", "", /* 135 - 139 */ + "", "", "", "", "", /* 140 - 144 */ + "", "", "", "", "", /* 145 - 149 */ + "", "", "", "", "", /* 150 - 154 */ + "", "", "", "", "", /* 155 - 159 */ + "", "", "", "", "", /* 160 - 164 */ + "", "", "", "", "", /* 165 - 169 */ + "", "", "", ""; /* 170 - 173 */ +}; + +&i2c0 { /* MIO 34-35 - can't stay here */ + status = "okay"; + clock-frequency = <400000>; + i2c-mux@74 { /* u46 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + /* FIXME reset connected to SYSCTRL_IIC_MUX0_RESET */ + i2c@0 { /* PMBUS must be enabled via SW21 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + reg_vcc1v2_lp4: tps544@15 { /* u97 */ + compatible = "ti,tps544b25"; + reg = <0x15>; + }; + reg_vcc1v1_lp4: tps544@16 { /* u95 */ + compatible = "ti,tps544b25"; + reg = <0x16>; + }; + reg_vdd1_1v8_lp4: tps544@17 { /* u99 */ + compatible = "ti,tps544b25"; + reg = <0x17>; + }; + /* UTIL_PMBUS connection */ + reg_vcc1v8: tps544@13 { /* u92 */ + compatible = "ti,tps544b25"; + reg = <0x13>; + }; + reg_vcc3v3: tps544@14 { /* u93 */ + compatible = "ti,tps544b25"; + reg = <0x14>; + }; + reg_vcc5v0: tps544@1e { /* u94 */ + compatible = "ti,tps544b25"; + reg = <0x1e>; + }; + }; + i2c@1 { /* PMBUS_INA226 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + vcc_aux: ina226@42 { /* u86 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcc-aux"; + reg = <0x42>; + shunt-resistor = <5000>; + }; + vcc_ram: ina226@43 { /* u81 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcc-ram"; + reg = <0x43>; + shunt-resistor = <5000>; + }; + vcc1v1_lp4: ina226@46 { /* u96 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcc1v1-lp4"; + reg = <0x46>; + shunt-resistor = <5000>; + }; + vcc1v2_lp4: ina226@47 { /* u98 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcc1v2-lp4"; + reg = <0x47>; + shunt-resistor = <5000>; + }; + vdd1_1v8_lp4: ina226@48 { /* u100 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vdd1-1v8-lp4"; + reg = <0x48>; + shunt-resistor = <5000>; + }; + vcc0v6_lp4: ina226@49 { /* u101 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcc0v6-lp4"; + reg = <0x49>; + shunt-resistor = <5000>; + }; + }; + i2c@2 { /* PMBUS1 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + reg_vccint: tps53681@60 { /* u69 - 0xc0 */ + compatible = "ti,tps53681", "ti,tps53679"; + reg = <0x60>; + }; + reg_vcc_pmc: tps544@7 { /* u80 */ + compatible = "ti,tps544b25"; + reg = <0x7>; + }; + reg_vcc_ram: tps544@8 { /* u82 */ + compatible = "ti,tps544b25"; + reg = <0x8>; + }; + reg_vcc_pslp: tps544@9 { /* u83 */ + compatible = "ti,tps544b25"; + reg = <0x9>; + }; + reg_vcc_psfp: tps544@a { /* u84 */ + compatible = "ti,tps544b25"; + reg = <0xa>; + }; + reg_vccaux: tps544@d { /* u85 */ + compatible = "ti,tps544b25"; + reg = <0xd>; + }; + reg_vccaux_pmc: tps544@e { /* u87 */ + compatible = "ti,tps544b25"; + reg = <0xe>; + }; + reg_vcco_500: tps544@f { /* u88 */ + compatible = "ti,tps544b25"; + reg = <0xf>; + }; + reg_vcco_501: tps544@10 { /* u89 */ + compatible = "ti,tps544b25"; + reg = <0x10>; + }; + reg_vcco_502: tps544@11 { /* u90 */ + compatible = "ti,tps544b25"; + reg = <0x11>; + }; + reg_vcco_503: tps544@12 { /* u91 */ + compatible = "ti,tps544b25"; + reg = <0x12>; + }; + }; + i2c@3 { /* MEM PMBUS - FIXME bug in schematics */ + #address-cells = <1>; + #size-cells = <0>; + /* reg = <3>; */ + }; + i2c@4 { /* LP_I2C_SM */ + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + /* connected to U20G */ + }; + /* 5-7 unused */ + }; +}; + +/* TODO sysctrl via J239 */ +/* TODO samtec J212G/H via J242 */ +/* TODO teensy via U30 PCA9543A bus 1 */ +&i2c1 { /* i2c1 MIO 36-37 */ + status = "okay"; + clock-frequency = <400000>; + + /* Must be enabled via J242 */ + eeprom_versal: eeprom@51 { /* x-prc-01-revA u116, x-prc-02-revA u12 */ + compatible = "atmel,24c02"; + reg = <0x51>; + }; + + i2c-mux@74 { /* u47 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + /* FIXME reset connected to SYSCTRL_IIC_MUX1_RESET */ + dc_i2c: i2c@0 { /* DC_I2C */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* Use for storing information about SC board */ + eeprom: eeprom@54 { /* u51 - m24128 16kB FIXME addr */ + compatible = "atmel,24c08"; + reg = <0x54>; + }; + si570_ref_clk: clock-generator@5d { /* u26 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; /* FIXME addr */ + temperature-stability = <50>; + factory-fout = <33333333>; + clock-frequency = <33333333>; + clock-output-names = "REF_CLK"; /* FIXME */ + silabs,skip-recall; + }; + /* Connection via Samtec U20D */ + /* Use for storing information about X-PRC card */ + x_prc_eeprom: eeprom@52 { /* x-prc-01-revA u120, x-prc-02-revA u16 */ + compatible = "atmel,24c02"; + reg = <0x52>; + }; + + /* Use for setting up certain features on X-PRC card */ + x_prc_tca9534: gpio@22 { /* x-prc-01-revA u121, x-prc-02-revA u17 */ + compatible = "nxp,pca9534"; + reg = <0x22>; + gpio-controller; /* IRQ not connected */ + #gpio-cells = <2>; + gpio-line-names = "sw4_1", "sw4_2", "sw4_3", "sw4_4", + "", "", "", ""; + gtr-sel0 { + gpio-hog; + gpios = <0 0>; + input; /* FIXME add meaning */ + line-name = "sw4_1"; + }; + gtr-sel1 { + gpio-hog; + gpios = <1 0>; + input; /* FIXME add meaning */ + line-name = "sw4_2"; + }; + gtr-sel2 { + gpio-hog; + gpios = <2 0>; + input; /* FIXME add meaning */ + line-name = "sw4_3"; + }; + gtr-sel3 { + gpio-hog; + gpios = <3 0>; + input; /* FIXME add meaning */ + line-name = "sw4_4"; + }; + }; + }; + i2c@2 { /* C0_LP4 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + si570_c0_lp4: clock-generator@55 { /* u10 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x55>; + temperature-stability = <50>; + factory-fout = <30000000>; + clock-frequency = <30000000>; + clock-output-names = "C0_LP4_SI570_CLK"; + }; + }; + i2c@3 { /* C1_LP4 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + si570_c1_lp4: clock-generator@5d { /* u10 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; /* FIXME addr */ + temperature-stability = <50>; + factory-fout = <30000000>; + clock-frequency = <30000000>; + clock-output-names = "C1_LP4_SI570_CLK"; + }; + }; + i2c@4 { /* C2_LP4 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + si570_c2_lp4: clock-generator@55 { /* u10 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x55>; + temperature-stability = <50>; + factory-fout = <30000000>; + clock-frequency = <30000000>; + clock-output-names = "C2_LP4_SI570_CLK"; + }; + }; + i2c@5 { /* C3_LP4 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + si570_c3_lp4: clock-generator@55 { /* u15 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x55>; + temperature-stability = <50>; + factory-fout = <30000000>; + clock-frequency = <30000000>; + clock-output-names = "C3_LP4_SI570_CLK"; + }; + }; + i2c@6 { /* HSDP_SI570 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + si570_hsdp: clock-generator@5d { /* u19 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; /* FIXME addr */ + temperature-stability = <50>; + factory-fout = <156250000>; + clock-frequency = <156250000>; + clock-output-names = "HSDP_SI570"; + }; + }; + }; +}; + +&usb0 { + status = "okay"; +}; + +&dwc3_0 { + status = "okay"; + dr_mode = "host"; + /* dr_mode = "peripheral"; */ + maximum-speed = "high-speed"; +}; + +&usb1 { + status = "disabled"; /* not at mem board */ +}; + +&dwc3_1 { + /delete-property/ phy-names ; + /delete-property/ phys ; + maximum-speed = "high-speed"; + snps,dis_u2_susphy_quirk ; + snps,dis_u3_susphy_quirk ; + status = "disabled"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-m-a2197-02-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-m-a2197-02-revA.dts @@ -0,0 +1,494 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal a2197 RevA System Controller + * + * (C) Copyright 2019, Xilinx, Inc. + * + * Michal Simek + */ +/dts-v1/; + +#include "zynqmp.dtsi" +#include "zynqmp-clk-ccf.dtsi" +#include + +/ { + model = "Versal System Controller on a2197 Memory Char board RevA"; + compatible = "xlnx,zynqmp-m-a2197-02-revA", "xlnx,zynqmp-a2197-revA", + "xlnx,zynqmp-a2197", "xlnx,zynqmp"; + + aliases { + ethernet0 = &gem0; + i2c0 = &i2c0; + i2c1 = &i2c1; + mmc0 = &sdhci0; + mmc1 = &sdhci1; + nvmem0 = &eeprom; + rtc0 = &rtc; + serial0 = &uart0; + serial1 = &uart1; + serial2 = &dcc; + usb0 = &usb0; + usb1 = &usb1; + spi0 = &qspi; + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; /* FIXME don't know how big memory is there */ + }; + + ina226-vcc-aux { + compatible = "iio-hwmon"; + io-channels = <&vcc_aux 0>, <&vcc_aux 1>, <&vcc_aux 2>, <&vcc_aux 3>; + }; + ina226-vcc-ram { + compatible = "iio-hwmon"; + io-channels = <&vcc_ram 0>, <&vcc_ram 1>, <&vcc_ram 2>, <&vcc_ram 3>; + }; + ina226-vcc1v1-lp4 { + compatible = "iio-hwmon"; + io-channels = <&vcc1v1_lp4 0>, <&vcc1v1_lp4 1>, <&vcc1v1_lp4 2>, <&vcc1v1_lp4 3>; + }; + ina226-vcc1v2-lp4 { + compatible = "iio-hwmon"; + io-channels = <&vcc1v2_lp4 0>, <&vcc1v2_lp4 1>, <&vcc1v2_lp4 2>, <&vcc1v2_lp4 3>; + }; + ina226-vdd1-1v8-lp4 { + compatible = "iio-hwmon"; + io-channels = <&vdd1_1v8_lp4 0>, <&vdd1_1v8_lp4 1>, <&vdd1_1v8_lp4 2>, <&vdd1_1v8_lp4 3>; + }; +}; + +&qspi { + status = "okay"; + num-cs = <2>; + flash@0 { + compatible = "m25p80", "jedec,spi-nor"; /* 32MB */ + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x4000000 0x4000000>; /* 64MB */ + #address-cells = <1>; + #size-cells = <1>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + spi-max-frequency = <108000000>; + }; +}; + +&sdhci0 { /* emmc MIO 13-23 - with some settings 16GB */ + status = "okay"; + non-removable; + disable-wp; + no-sd; + no-sdio; + cap-mmc-hw-reset; + bus-width = <8>; + xlnx,mio-bank = <0>; /* FIXME tap delay */ +}; + +&uart0 { /* uart0 MIO38-39 */ + status = "okay"; +}; + +&uart1 { /* uart1 MIO40-41 */ + status = "okay"; +}; + +&sdhci1 { /* sd1 MIO45-51 cd in place */ + status = "disable"; + no-1-8-v; + disable-wp; + xlnx,mio-bank = <1>; +}; + +&gem0 { + status = "okay"; + phy-handle = <&phy0>; + phy-mode = "sgmii"; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; + phy0: ethernet-phy@0 { /* marwell m88e1512 - SGMII */ + reg = <0>; + }; + }; +}; + +&gpio { + status = "okay"; + gpio-line-names = "SCLK_OUT", "MISO_MO1", "MO2", "MO3", "MOSI_MIO0", /* 0 - 4 */ + "N_SS_OUT", "", "SYS_CTRL0", "SYS_CTRL1", "SYS_CTRL2", /* 5 - 9 */ + "SYS_CTRL3", "SYS_CTRL4", "SYS_CTRL5", "EMMC_DAT0", "EMMC_DAT1", /* 10 - 14 */ + "EMMC_DAT2", "EMMC_DAT3", "EMMC_DAT4", "EMMC_DAT5", "EMMC_DAT6", /* 15 - 19 */ + "EMMC_DAT7", "EMMC_CMD", "EMMC_CLK", "EMMC_RST_B", "", /* 20 - 24 */ + "", "RXD0_IN", "TXD0_OUT", "TXD1_OUT", "RXD1_IN", /* 25 - 29 */ + "", "", "", "", "LP_I2C0_PMC_SCL", /* 30 - 34 */ + "LP_I2C0_PMC_SDA", "LP_I2C1_SCL", "LP_I2C1_SDA", "UART0_RXD_IN", "UART0_TXD_OUT", /* 35 - 39 */ + "UART1_TXD_OUT", "UART1_RXD_IN", "ETH_RESET_B", "", "", /* 40 - 44 */ + "SD1_CD_B", "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3", /* 45 - 49 */ + "SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2", /* 50 - 54 */ + "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3", /* 55 - 59 */ + "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "USB1_CLK", /* 60 - 64 */ + "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1", /* 65 - 69 */ + "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6", /* 70 - 74 */ + "USB1_DATA7", "ETH_MDC", "ETH_MDIO", /* 75 - 77, MIO end and EMIO start */ + "", "", "", "", "", /* 78 - 79 */ + "", "", "", "", "", /* 80 - 84 */ + "", "", "", "", "", /* 85 -89 */ + "", "", "", "", "", /* 90 - 94 */ + "", "", "", "", "", /* 95 - 99 */ + "", "", "", "", "", /* 100 - 104 */ + "", "", "", "", "", /* 105 - 109 */ + "", "", "", "", "", /* 110 - 114 */ + "", "", "", "", "", /* 115 - 119 */ + "", "", "", "", "", /* 120 - 124 */ + "", "", "", "", "", /* 125 - 129 */ + "", "", "", "", "", /* 130 - 134 */ + "", "", "", "", "", /* 135 - 139 */ + "", "", "", "", "", /* 140 - 144 */ + "", "", "", "", "", /* 145 - 149 */ + "", "", "", "", "", /* 150 - 154 */ + "", "", "", "", "", /* 155 - 159 */ + "", "", "", "", "", /* 160 - 164 */ + "", "", "", "", "", /* 165 - 169 */ + "", "", "", ""; /* 170 - 173 */ +}; + +&i2c0 { /* MIO 34-35 - can't stay here */ + status = "okay"; + clock-frequency = <400000>; + i2c-mux@74 { /* u46 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + /* FIXME reset connected to SYSCTRL_IIC_MUX0_RESET */ + i2c@0 { /* PMBUS must be enabled via SW21 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + reg_vcc1v2_lp4: tps544@15 { /* u97 */ + compatible = "ti,tps544b25"; + reg = <0x15>; + }; + reg_vcc1v1_lp4: tps544@16 { /* u95 */ + compatible = "ti,tps544b25"; + reg = <0x16>; + }; + reg_vdd1_1v8_lp4: tps544@17 { /* u99 */ + compatible = "ti,tps544b25"; + reg = <0x17>; + }; + /* UTIL_PMBUS connection */ + reg_vcc1v8: tps544@13 { /* u92 */ + compatible = "ti,tps544b25"; + reg = <0x13>; + }; + reg_vcc3v3: tps544@14 { /* u93 */ + compatible = "ti,tps544b25"; + reg = <0x14>; + }; + reg_vcc5v0: tps544@1e { /* u94 */ + compatible = "ti,tps544b25"; + reg = <0x1e>; + }; + }; + i2c@1 { /* PMBUS_INA226 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + vcc_aux: ina226@42 { /* u86 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcc-aux"; + reg = <0x42>; + shunt-resistor = <5000>; + }; + vcc_ram: ina226@43 { /* u81 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcc-ram"; + reg = <0x43>; + shunt-resistor = <5000>; + }; + vcc1v1_lp4: ina226@46 { /* u96 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcc1v1-lp4"; + reg = <0x46>; + shunt-resistor = <5000>; + }; + vcc1v2_lp4: ina226@47 { /* u98 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcc1v2-lp4"; + reg = <0x47>; + shunt-resistor = <5000>; + }; + vdd1_1v8_lp4: ina226@48 { /* u100 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vdd1-1v8-lp4"; + reg = <0x48>; + shunt-resistor = <5000>; + }; + }; + i2c@2 { /* PMBUS1 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + reg_vccint: tps53681@60 { /* u69 - 0xc0 */ + compatible = "ti,tps53681", "ti,tps53679"; + reg = <0x60>; + }; + reg_vcc_pmc: tps544@7 { /* u80 */ + compatible = "ti,tps544b25"; + reg = <0x7>; + }; + reg_vcc_ram: tps544@8 { /* u82 */ + compatible = "ti,tps544b25"; + reg = <0x8>; + }; + reg_vcc_pslp: tps544@9 { /* u83 */ + compatible = "ti,tps544b25"; + reg = <0x9>; + }; + reg_vcc_psfp: tps544@a { /* u84 */ + compatible = "ti,tps544b25"; + reg = <0xa>; + }; + reg_vccaux: tps544@d { /* u85 */ + compatible = "ti,tps544b25"; + reg = <0xd>; + }; + reg_vccaux_pmc: tps544@e { /* u87 */ + compatible = "ti,tps544b25"; + reg = <0xe>; + }; + reg_vcco_500: tps544@f { /* u88 */ + compatible = "ti,tps544b25"; + reg = <0xf>; + }; + reg_vcco_501: tps544@10 { /* u89 */ + compatible = "ti,tps544b25"; + reg = <0x10>; + }; + reg_vcco_502: tps544@11 { /* u90 */ + compatible = "ti,tps544b25"; + reg = <0x11>; + }; + reg_vcco_503: tps544@12 { /* u91 */ + compatible = "ti,tps544b25"; + reg = <0x12>; + }; + }; + i2c@3 { /* MEM PMBUS - FIXME bug in schematics */ + #address-cells = <1>; + #size-cells = <0>; + /* reg = <3>; */ + }; + i2c@4 { /* LP_I2C_SM */ + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + /* connected to U20G */ + }; + i2c@5 { /* C0_DDR4_RDIMM */ + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + }; + i2c@6 { /* C2_DDR5_RDIMM */ + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + }; + i2c@7 { /* C3_DDR4_UDIMM */ + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + }; + }; +}; + +/* TODO sysctrl via J239 */ +/* TODO samtec J212G/H via J242 */ +/* TODO teensy via U30 PCA9543A bus 1 */ +&i2c1 { /* i2c1 MIO 36-37 */ + status = "okay"; + clock-frequency = <400000>; + + /* Must be enabled via J242 */ + eeprom_versal: eeprom@51 { /* x-prc-01-revA u116, x-prc-02-revA u12 */ + compatible = "atmel,24c02"; + reg = <0x51>; + }; + + i2c-mux@74 { /* u47 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + /* FIXME reset connected to SYSCTRL_IIC_MUX1_RESET */ + dc_i2c: i2c@0 { /* DC_I2C */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* Use for storing information about SC board */ + eeprom: eeprom@54 { /* u51 - m24128 16kB FIXME addr */ + compatible = "atmel,24c08"; + reg = <0x54>; + }; + si570_ref_clk: clock-generator@5d { /* u26 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; /* FIXME addr */ + temperature-stability = <50>; + factory-fout = <33333333>; + clock-frequency = <33333333>; + clock-output-names = "REF_CLK"; /* FIXME */ + silabs,skip-recall; + }; + /* Connection via Samtec U20D */ + /* Use for storing information about X-PRC card */ + x_prc_eeprom: eeprom@52 { /* x-prc-01-revA u120, x-prc-02-revA u16 */ + compatible = "atmel,24c02"; + reg = <0x52>; + }; + + /* Use for setting up certain features on X-PRC card */ + x_prc_tca9534: gpio@22 { /* x-prc-01-revA u121, x-prc-02-revA u17 */ + compatible = "nxp,pca9534"; + reg = <0x22>; + gpio-controller; /* IRQ not connected */ + #gpio-cells = <2>; + gpio-line-names = "sw4_1", "sw4_2", "sw4_3", "sw4_4", + "", "", "", ""; + gtr-sel0 { + gpio-hog; + gpios = <0 0>; + input; /* FIXME add meaning */ + line-name = "sw4_1"; + }; + gtr-sel1 { + gpio-hog; + gpios = <1 0>; + input; /* FIXME add meaning */ + line-name = "sw4_2"; + }; + gtr-sel2 { + gpio-hog; + gpios = <2 0>; + input; /* FIXME add meaning */ + line-name = "sw4_3"; + }; + gtr-sel3 { + gpio-hog; + gpios = <3 0>; + input; /* FIXME add meaning */ + line-name = "sw4_4"; + }; + }; + }; + i2c@2 { /* C0_DDR4 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + si570_c0_ddr4: clock-generator@55 { /* u4 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x55>; + temperature-stability = <50>; + factory-fout = <30000000>; + clock-frequency = <30000000>; + clock-output-names = "C0_DD4_SI570_CLK"; + }; + }; + i2c@3 { /* C1_RLD3 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + si570_c1_lp4: clock-generator@55 { /* u7 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x55>; + temperature-stability = <50>; + factory-fout = <30000000>; + clock-frequency = <30000000>; + clock-output-names = "C1_RLD3_SI570_CLK"; + }; + }; + i2c@4 { /* C2_DDR5 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + si570_c2_lp4: clock-generator@55 { /* u10 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x55>; + temperature-stability = <50>; + factory-fout = <30000000>; + clock-frequency = <30000000>; + clock-output-names = "C2_DDR5_SI570_CLK"; + }; + }; + i2c@5 { /* C3_DDR4 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + si570_c3_lp4: clock-generator@55 { /* u15 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x55>; + temperature-stability = <50>; + factory-fout = <30000000>; + clock-frequency = <30000000>; + clock-output-names = "C3_LP4_SI570_CLK"; + }; + }; + i2c@6 { /* HSDP_SI570 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + si570_hsdp: clock-generator@5d { /* u19 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; + temperature-stability = <50>; + factory-fout = <156250000>; + clock-frequency = <156250000>; + clock-output-names = "HSDP_SI570"; + }; + }; + }; +}; + +&usb0 { + status = "okay"; +}; + +&dwc3_0 { + status = "okay"; + dr_mode = "host"; + /* dr_mode = "peripheral"; */ + maximum-speed = "high-speed"; +}; + +&usb1 { + status = "disabled"; /* not at mem board */ +}; + +&dwc3_1 { + /delete-property/ phy-names ; + /delete-property/ phys ; + maximum-speed = "high-speed"; + snps,dis_u2_susphy_quirk ; + snps,dis_u3_susphy_quirk ; + status = "disabled"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-m-a2197-03-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-m-a2197-03-revA.dts @@ -0,0 +1,488 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal a2197 RevA System Controller + * + * (C) Copyright 2019, Xilinx, Inc. + * + * Michal Simek + */ +/dts-v1/; + +#include "zynqmp.dtsi" +#include "zynqmp-clk-ccf.dtsi" +#include + +/ { + model = "Versal System Controller on a2197 Memory Char board RevA"; + compatible = "xlnx,zynqmp-m-a2197-03-revA", "xlnx,zynqmp-a2197-revA", + "xlnx,zynqmp-a2197", "xlnx,zynqmp"; + + aliases { + ethernet0 = &gem0; + i2c0 = &i2c0; + i2c1 = &i2c1; + mmc0 = &sdhci0; + mmc1 = &sdhci1; + nvmem0 = &eeprom; + rtc0 = &rtc; + serial0 = &uart0; + serial1 = &uart1; + serial2 = &dcc; + usb0 = &usb0; + usb1 = &usb1; + spi0 = &qspi; + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; /* FIXME don't know how big memory is there */ + }; + + ina226-vcc-aux { + compatible = "iio-hwmon"; + io-channels = <&vcc_aux 0>, <&vcc_aux 1>, <&vcc_aux 2>, <&vcc_aux 3>; + }; + ina226-vcc-ram { + compatible = "iio-hwmon"; + io-channels = <&vcc_ram 0>, <&vcc_ram 1>, <&vcc_ram 2>, <&vcc_ram 3>; + }; + ina226-vcc1v1-lp4 { + compatible = "iio-hwmon"; + io-channels = <&vcc1v1_lp4 0>, <&vcc1v1_lp4 1>, <&vcc1v1_lp4 2>, <&vcc1v1_lp4 3>; + }; + ina226-vcc1v2-lp4 { + compatible = "iio-hwmon"; + io-channels = <&vcc1v2_lp4 0>, <&vcc1v2_lp4 1>, <&vcc1v2_lp4 2>, <&vcc1v2_lp4 3>; + }; + ina226-vdd1-1v8-lp4 { + compatible = "iio-hwmon"; + io-channels = <&vdd1_1v8_lp4 0>, <&vdd1_1v8_lp4 1>, <&vdd1_1v8_lp4 2>, <&vdd1_1v8_lp4 3>; + }; +}; + +&qspi { + status = "okay"; + num-cs = <2>; + flash@0 { + compatible = "m25p80", "jedec,spi-nor"; /* 32MB */ + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x4000000 0x4000000>; /* 64MB */ + #address-cells = <1>; + #size-cells = <1>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + spi-max-frequency = <108000000>; + }; +}; + +&sdhci0 { /* emmc MIO 13-23 - with some settings 16GB */ + status = "okay"; + non-removable; + disable-wp; + no-sd; + no-sdio; + cap-mmc-hw-reset; + bus-width = <8>; + xlnx,mio-bank = <0>; /* FIXME tap delay */ +}; + +&uart0 { /* uart0 MIO38-39 */ + status = "okay"; +}; + +&uart1 { /* uart1 MIO40-41 */ + status = "okay"; +}; + +&sdhci1 { /* sd1 MIO45-51 cd in place */ + status = "disable"; + no-1-8-v; + disable-wp; + xlnx,mio-bank = <1>; +}; + +&gem0 { + status = "okay"; + phy-handle = <&phy0>; + phy-mode = "sgmii"; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; + phy0: ethernet-phy@0 { /* marwell m88e1512 - SGMII */ + reg = <0>; + }; + }; +}; + +&gpio { + status = "okay"; + gpio-line-names = "SCLK_OUT", "MISO_MO1", "MO2", "MO3", "MOSI_MIO0", /* 0 - 4 */ + "N_SS_OUT", "", "SYS_CTRL0", "SYS_CTRL1", "SYS_CTRL2", /* 5 - 9 */ + "SYS_CTRL3", "SYS_CTRL4", "SYS_CTRL5", "EMMC_DAT0", "EMMC_DAT1", /* 10 - 14 */ + "EMMC_DAT2", "EMMC_DAT3", "EMMC_DAT4", "EMMC_DAT5", "EMMC_DAT6", /* 15 - 19 */ + "EMMC_DAT7", "EMMC_CMD", "EMMC_CLK", "EMMC_RST_B", "", /* 20 - 24 */ + "", "RXD0_IN", "TXD0_OUT", "TXD1_OUT", "RXD1_IN", /* 25 - 29 */ + "", "", "", "", "LP_I2C0_PMC_SCL", /* 30 - 34 */ + "LP_I2C0_PMC_SDA", "LP_I2C1_SCL", "LP_I2C1_SDA", "UART0_RXD_IN", "UART0_TXD_OUT", /* 35 - 39 */ + "UART1_TXD_OUT", "UART1_RXD_IN", "ETH_RESET_B", "", "", /* 40 - 44 */ + "SD1_CD_B", "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3", /* 45 - 49 */ + "SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2", /* 50 - 54 */ + "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3", /* 55 - 59 */ + "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "USB1_CLK", /* 60 - 64 */ + "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1", /* 65 - 69 */ + "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6", /* 70 - 74 */ + "USB1_DATA7", "ETH_MDC", "ETH_MDIO", /* 75 - 77, MIO end and EMIO start */ + "", "", "", "", "", /* 78 - 79 */ + "", "", "", "", "", /* 80 - 84 */ + "", "", "", "", "", /* 85 -89 */ + "", "", "", "", "", /* 90 - 94 */ + "", "", "", "", "", /* 95 - 99 */ + "", "", "", "", "", /* 100 - 104 */ + "", "", "", "", "", /* 105 - 109 */ + "", "", "", "", "", /* 110 - 114 */ + "", "", "", "", "", /* 115 - 119 */ + "", "", "", "", "", /* 120 - 124 */ + "", "", "", "", "", /* 125 - 129 */ + "", "", "", "", "", /* 130 - 134 */ + "", "", "", "", "", /* 135 - 139 */ + "", "", "", "", "", /* 140 - 144 */ + "", "", "", "", "", /* 145 - 149 */ + "", "", "", "", "", /* 150 - 154 */ + "", "", "", "", "", /* 155 - 159 */ + "", "", "", "", "", /* 160 - 164 */ + "", "", "", "", "", /* 165 - 169 */ + "", "", "", ""; /* 170 - 173 */ +}; + +&i2c0 { /* MIO 34-35 - can't stay here */ + status = "okay"; + clock-frequency = <400000>; + i2c-mux@74 { /* u46 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + /* FIXME reset connected to SYSCTRL_IIC_MUX0_RESET */ + i2c@0 { /* PMBUS must be enabled via SW21 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + reg_vcc1v2_lp4: tps544@15 { /* u97 */ + compatible = "ti,tps544b25"; + reg = <0x15>; + }; + reg_vcc1v1_lp4: tps544@16 { /* u95 */ + compatible = "ti,tps544b25"; + reg = <0x16>; + }; + reg_vdd1_1v8_lp4: tps544@17 { /* u99 */ + compatible = "ti,tps544b25"; + reg = <0x17>; + }; + /* UTIL_PMBUS connection */ + reg_vcc1v8: tps544@13 { /* u92 */ + compatible = "ti,tps544b25"; + reg = <0x13>; + }; + reg_vcc3v3: tps544@14 { /* u93 */ + compatible = "ti,tps544b25"; + reg = <0x14>; + }; + reg_vcc5v0: tps544@1e { /* u94 */ + compatible = "ti,tps544b25"; + reg = <0x1e>; + }; + reg_vcc1v2_ddr4: tps544@18 { /* u3022 */ + compatible = "ti,tps544b25"; + reg = <0x18>; + }; + }; + i2c@1 { /* PMBUS_INA226 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + vcc_aux: ina226@42 { /* u86 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcc-aux"; + reg = <0x42>; + shunt-resistor = <5000>; + }; + vcc_ram: ina226@43 { /* u81 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcc-ram"; + reg = <0x43>; + shunt-resistor = <5000>; + }; + vcc1v1_lp4: ina226@46 { /* u96 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcc1v1-lp4"; + reg = <0x46>; + shunt-resistor = <5000>; + }; + vcc1v2_lp4: ina226@47 { /* u98 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcc1v2-lp4"; + reg = <0x47>; + shunt-resistor = <5000>; + }; + vdd1_1v8_lp4: ina226@48 { /* u100 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vdd1-1v8-lp4"; + reg = <0x48>; + shunt-resistor = <5000>; + }; + }; + i2c@2 { /* PMBUS1 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + reg_vccint: tps53681@60 { /* u69 - 0xc0 */ + compatible = "ti,tps53681", "ti,tps53679"; + reg = <0x60>; + }; + reg_vcc_pmc: tps544@7 { /* u80 */ + compatible = "ti,tps544b25"; + reg = <0x7>; + }; + reg_vcc_ram: tps544@8 { /* u82 */ + compatible = "ti,tps544b25"; + reg = <0x8>; + }; + reg_vcc_pslp: tps544@9 { /* u83 */ + compatible = "ti,tps544b25"; + reg = <0x9>; + }; + reg_vcc_psfp: tps544@a { /* u84 */ + compatible = "ti,tps544b25"; + reg = <0xa>; + }; + reg_vccaux: tps544@d { /* u85 */ + compatible = "ti,tps544b25"; + reg = <0xd>; + }; + reg_vccaux_pmc: tps544@e { /* u87 */ + compatible = "ti,tps544b25"; + reg = <0xe>; + }; + reg_vcco_500: tps544@f { /* u88 */ + compatible = "ti,tps544b25"; + reg = <0xf>; + }; + reg_vcco_501: tps544@10 { /* u89 */ + compatible = "ti,tps544b25"; + reg = <0x10>; + }; + reg_vcco_502: tps544@11 { /* u90 */ + compatible = "ti,tps544b25"; + reg = <0x11>; + }; + reg_vcco_503: tps544@12 { /* u91 */ + compatible = "ti,tps544b25"; + reg = <0x12>; + }; + }; + i2c@3 { /* MEM PMBUS - FIXME bug in schematics */ + #address-cells = <1>; + #size-cells = <0>; + /* reg = <3>; */ + }; + i2c@4 { /* LP_I2C_SM */ + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + /* connected to U20G */ + }; + i2c@5 { /* DDR4_SODIMM */ + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + }; + }; +}; + +/* TODO sysctrl via J239 */ +/* TODO samtec J212G/H via J242 */ +/* TODO teensy via U30 PCA9543A bus 1 */ +&i2c1 { /* i2c1 MIO 36-37 */ + status = "okay"; + clock-frequency = <400000>; + + /* Must be enabled via J242 */ + eeprom_versal: eeprom@51 { /* x-prc-01-revA u116, x-prc-02-revA u12 */ + compatible = "atmel,24c02"; + reg = <0x51>; + }; + + i2c-mux@74 { /* u47 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + /* FIXME reset connected to SYSCTRL_IIC_MUX1_RESET */ + dc_i2c: i2c@0 { /* DC_I2C */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* Use for storing information about SC board */ + eeprom: eeprom@54 { /* u51 - m24128 16kB FIXME addr */ + compatible = "atmel,24c08"; + reg = <0x54>; + }; + si570_ref_clk: clock-generator@5d { /* u26 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; /* FIXME addr */ + temperature-stability = <50>; + factory-fout = <33333333>; + clock-frequency = <33333333>; + clock-output-names = "REF_CLK"; /* FIXME */ + silabs,skip-recall; + }; + /* Connection via Samtec U20D */ + /* Use for storing information about X-PRC card */ + x_prc_eeprom: eeprom@52 { /* x-prc-01-revA u120, x-prc-02-revA u16 */ + compatible = "atmel,24c02"; + reg = <0x52>; + }; + + /* Use for setting up certain features on X-PRC card */ + x_prc_tca9534: gpio@22 { /* x-prc-01-revA u121, x-prc-02-revA u17 */ + compatible = "nxp,pca9534"; + reg = <0x22>; + gpio-controller; /* IRQ not connected */ + #gpio-cells = <2>; + gpio-line-names = "sw4_1", "sw4_2", "sw4_3", "sw4_4", + "", "", "", ""; + gtr-sel0 { + gpio-hog; + gpios = <0 0>; + input; /* FIXME add meaning */ + line-name = "sw4_1"; + }; + gtr-sel1 { + gpio-hog; + gpios = <1 0>; + input; /* FIXME add meaning */ + line-name = "sw4_2"; + }; + gtr-sel2 { + gpio-hog; + gpios = <2 0>; + input; /* FIXME add meaning */ + line-name = "sw4_3"; + }; + gtr-sel3 { + gpio-hog; + gpios = <3 0>; + input; /* FIXME add meaning */ + line-name = "sw4_4"; + }; + }; + }; + i2c@2 { /* C0_DDR4 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + si570_c0_ddr4: clock-generator@55 { /* u4 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x55>; + temperature-stability = <50>; + factory-fout = <30000000>; + clock-frequency = <30000000>; + clock-output-names = "C0_DD4_SI570_CLK"; + }; + }; + i2c@3 { /* C1_SODIMM */ + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + si570_c1_lp4: clock-generator@55 { /* u7 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x55>; + temperature-stability = <50>; + factory-fout = <30000000>; + clock-frequency = <30000000>; + clock-output-names = "C1_SODIMM_SI570_CLK"; + }; + }; + i2c@4 { /* C2_QDRIV */ + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + si570_c2_lp4: clock-generator@55 { /* u10 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x55>; + temperature-stability = <50>; + factory-fout = <30000000>; + clock-frequency = <30000000>; + clock-output-names = "C2_QDRIV_SI570_CLK"; + }; + }; + i2c@5 { /* C3_DDR4 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + si570_c3_lp4: clock-generator@55 { /* u15 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x55>; + temperature-stability = <50>; + factory-fout = <30000000>; + clock-frequency = <30000000>; + clock-output-names = "C3_LP4_SI570_CLK"; + }; + }; + i2c@6 { /* HSDP_SI570 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + si570_hsdp: clock-generator@5d { /* u19 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; + temperature-stability = <50>; + factory-fout = <156250000>; + clock-frequency = <156250000>; + clock-output-names = "HSDP_SI570"; + }; + }; + }; +}; + +&usb0 { + status = "okay"; +}; + +&dwc3_0 { + status = "okay"; + dr_mode = "host"; + /* dr_mode = "peripheral"; */ + maximum-speed = "high-speed"; +}; + +&usb1 { + status = "disabled"; /* not at mem board */ +}; + +&dwc3_1 { + /delete-property/ phy-names ; + /delete-property/ phys ; + maximum-speed = "high-speed"; + snps,dis_u2_susphy_quirk ; + snps,dis_u3_susphy_quirk ; + status = "disabled"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-p-a2197-00-revA-x-prc-01-revA.dtso +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-p-a2197-00-revA-x-prc-01-revA.dtso @@ -0,0 +1,76 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP System Controller X-PRC-01 revA (SE1) + * + * (C) Copyright 2019 - 2022, Xilinx, Inc. + * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +/dts-v1/; +/plugin/; + +/{ + compatible = "xlnx,zynqmp-x-prc-01-revA", "xlnx,zynqmp-x-prc-01"; + + fragment@0 { + target = <&dc_i2c>; + + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + + x_prc_eeprom: eeprom@52 { /* u120 */ + compatible = "atmel,24c02"; + reg = <0x52>; + }; + + x_prc_tca9534: gpio@22 { /* u121 tca9534 */ + compatible = "nxp,pca9534"; + reg = <0x22>; + gpio-controller; /* IRQ not connected */ + #gpio-cells = <2>; + gpio-line-names = "sw4_1", "sw4_2", "sw4_3", "sw4_4", + "", "", "", ""; + gtr-sel0 { + gpio-hog; + gpios = <0 0>; + input; /* FIXME add meaning */ + line-name = "sw4_1"; + }; + gtr-sel1 { + gpio-hog; + gpios = <1 0>; + input; /* FIXME add meaning */ + line-name = "sw4_2"; + }; + gtr-sel2 { + gpio-hog; + gpios = <2 0>; + input; /* FIXME add meaning */ + line-name = "sw4_3"; + }; + gtr-sel3 { + gpio-hog; + gpios = <3 0>; + input; /* FIXME add meaning */ + line-name = "sw4_4"; + }; + }; + }; + }; + + fragment@1 { + target = <&i2c1>; /* Must be enabled via J242 */ + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + + eeprom_versal: eeprom@51 { /* u116 */ + compatible = "atmel,24c02"; + reg = <0x51>; + }; + }; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-p-a2197-00-revA-x-prc-02-revA.dtso +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-p-a2197-00-revA-x-prc-02-revA.dtso @@ -0,0 +1,76 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP System Controller X-PRC-02 revA (SE2) + * + * (C) Copyright 2019 - 2022, Xilinx, Inc. + * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +/dts-v1/; +/plugin/; + +/{ + compatible = "xlnx,zynqmp-x-prc-02-revA", "xlnx,zynqmp-x-prc-02"; + + fragment@0 { + target = <&dc_i2c>; + + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + + x_prc_eeprom: eeprom@52 { /* u16 */ + compatible = "atmel,24c02"; + reg = <0x52>; + }; + + x_prc_tca9534: gpio@22 { /* u17 tca9534 */ + compatible = "nxp,pca9534"; + reg = <0x22>; + gpio-controller; /* IRQ not connected */ + #gpio-cells = <2>; + gpio-line-names = "sw4_1", "sw4_2", "sw4_3", "sw4_4", + "", "", "", ""; + gtr-sel0 { + gpio-hog; + gpios = <0 0>; + input; /* FIXME add meaning */ + line-name = "sw4_1"; + }; + gtr-sel1 { + gpio-hog; + gpios = <1 0>; + input; /* FIXME add meaning */ + line-name = "sw4_2"; + }; + gtr-sel2 { + gpio-hog; + gpios = <2 0>; + input; /* FIXME add meaning */ + line-name = "sw4_3"; + }; + gtr-sel3 { + gpio-hog; + gpios = <3 0>; + input; /* FIXME add meaning */ + line-name = "sw4_4"; + }; + }; + }; + }; + + fragment@1 { + target = <&i2c1>; /* Must be enabled via J242 */ + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + + eeprom_versal: eeprom@51 { /* u12 */ + compatible = "atmel,24c02"; + reg = <0x51>; + }; + }; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-p-a2197-00-revA-x-prc-03-revA.dtso +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-p-a2197-00-revA-x-prc-03-revA.dtso @@ -0,0 +1,80 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP System Controller X-PRC-03 revA (SE3) + * + * (C) Copyright 2019 - 2022, Xilinx, Inc. + * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +/dts-v1/; +/plugin/; + +/{ + compatible = "xlnx,zynqmp-x-prc-03-revA", "xlnx,zynqmp-x-prc-03"; + + fragment@0 { + target = <&dc_i2c>; + + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + + x_prc_eeprom: eeprom@52 { /* u1 */ + compatible = "atmel,24c02"; + reg = <0x52>; + }; + + x_prc_tca9534: gpio@22 { /* u3 tca9534 */ + compatible = "nxp,pca9534"; + reg = <0x22>; + gpio-controller; /* IRQ not connected */ + #gpio-cells = <2>; + gpio-line-names = "sw4_1", "sw4_2", "sw4_3", "sw4_4", + "", "", "", ""; + gtr-sel0 { + gpio-hog; + gpios = <0 0>; + input; /* FIXME add meaning */ + line-name = "sw4_1"; + }; + gtr-sel1 { + gpio-hog; + gpios = <1 0>; + input; /* FIXME add meaning */ + line-name = "sw4_2"; + }; + gtr-sel2 { + gpio-hog; + gpios = <2 0>; + input; /* FIXME add meaning */ + line-name = "sw4_3"; + }; + gtr-sel3 { + gpio-hog; + gpios = <3 0>; + input; /* FIXME add meaning */ + line-name = "sw4_4"; + }; + }; + x_prc_si5338: clock-generator@70 { /* U9 */ + compatible = "silabs,si5338"; + reg = <0x70>; /* FIXME */ + }; + }; + }; + + fragment@1 { + target = <&i2c1>; /* Must be enabled via J90/J91 */ + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + + eeprom_versal: eeprom@51 { /* u2 */ + compatible = "atmel,24c02"; + reg = <0x51>; + }; + }; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-p-a2197-00-revA-x-prc-04-revA.dtso +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-p-a2197-00-revA-x-prc-04-revA.dtso @@ -0,0 +1,86 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP System Controller X-PRC-04 revA (SE4) + * + * (C) Copyright 2019 - 2022, Xilinx, Inc. + * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +/dts-v1/; +/plugin/; + +/{ + compatible = "xlnx,zynqmp-x-prc-04-revA", "xlnx,zynqmp-x-prc-04"; + + fragment@0 { + target = <&dc_i2c>; + + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + + x_prc_eeprom: eeprom@52 { /* u120 */ + compatible = "atmel,24c02"; + reg = <0x52>; + }; + + x_prc_tca9534: gpio@22 { /* u121 tca9534 */ + compatible = "nxp,pca9534"; + reg = <0x22>; + gpio-controller; /* IRQ not connected */ + #gpio-cells = <2>; + gpio-line-names = "sw4_1", "sw4_2", "sw4_3", "sw4_4", + "", "", "", ""; + gtr-sel0 { + gpio-hog; + gpios = <0 0>; + input; /* FIXME add meaning */ + line-name = "sw4_1"; + }; + gtr-sel1 { + gpio-hog; + gpios = <1 0>; + input; /* FIXME add meaning */ + line-name = "sw4_2"; + }; + gtr-sel2 { + gpio-hog; + gpios = <2 0>; + input; /* FIXME add meaning */ + line-name = "sw4_3"; + }; + gtr-sel3 { + gpio-hog; + gpios = <3 0>; + input; /* FIXME add meaning */ + line-name = "sw4_4"; + }; + }; + + si570_gem_tsu: clock-generator@5d { /* u164 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; + temperature-stability = <50>; + factory-fout = <300000000>; /* FIXME */ + clock-frequency = <300000000>; + clock-output-names = "si570_gem_tsu_clk"; + }; + }; + }; + + fragment@1 { + target = <&i2c1>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + + eeprom_versal: eeprom@51 { /* u153 */ + compatible = "atmel,24c02"; + reg = <0x51>; + }; + }; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-p-a2197-00-revA-x-prc-05-revA.dtso +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-p-a2197-00-revA-x-prc-05-revA.dtso @@ -0,0 +1,86 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP System Controller X-PRC-05 revA (SE5) + * + * (C) Copyright 2019 - 2022, Xilinx, Inc. + * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +/dts-v1/; +/plugin/; + +/{ + compatible = "xlnx,zynqmp-x-prc-05-revA", "xlnx,zynqmp-x-prc-05"; + + fragment@0 { + target = <&dc_i2c>; + + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + + x_prc_eeprom: eeprom@52 { /* u120 */ + compatible = "atmel,24c02"; + reg = <0x52>; + }; + + x_prc_tca9534: gpio@22 { /* u121 tca9534 */ + compatible = "nxp,pca9534"; + reg = <0x22>; + gpio-controller; /* IRQ not connected */ + #gpio-cells = <2>; + gpio-line-names = "sw4_1", "sw4_2", "sw4_3", "sw4_4", + "", "", "", ""; + gtr-sel0 { + gpio-hog; + gpios = <0 0>; + input; /* FIXME add meaning */ + line-name = "sw4_1"; + }; + gtr-sel1 { + gpio-hog; + gpios = <1 0>; + input; /* FIXME add meaning */ + line-name = "sw4_2"; + }; + gtr-sel2 { + gpio-hog; + gpios = <2 0>; + input; /* FIXME add meaning */ + line-name = "sw4_3"; + }; + gtr-sel3 { + gpio-hog; + gpios = <3 0>; + input; /* FIXME add meaning */ + line-name = "sw4_4"; + }; + }; + + si570_gem_tsu: clock-generator@5d { /* u164 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; + temperature-stability = <50>; + factory-fout = <300000000>; /* FIXME */ + clock-frequency = <300000000>; + clock-output-names = "si570_gem_tsu_clk"; + }; + }; + }; + + fragment@1 { + target = <&i2c1>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + + eeprom_versal: eeprom@51 { /* u153 */ + compatible = "atmel,24c02"; + reg = <0x51>; + }; + }; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-p-a2197-00-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-p-a2197-00-revA.dts @@ -0,0 +1,611 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal a2197 RevA System Controller + * + * (C) Copyright 2019, Xilinx, Inc. + * + * Michal Simek + */ +/dts-v1/; + +#include "zynqmp.dtsi" +#include "zynqmp-clk-ccf.dtsi" +#include +#include + +/ { + model = "Versal System Controller on a2197 Processor Char board RevA"; /* Tenzing */ + compatible = "xlnx,zynqmp-p-a2197-00-revA", "xlnx,zynqmp-a2197-revA", + "xlnx,zynqmp-a2197", "xlnx,zynqmp"; + + aliases { + ethernet0 = &gem0; + i2c0 = &i2c0; + i2c1 = &i2c1; + mmc0 = &sdhci0; + mmc1 = &sdhci1; + nvmem0 = &eeprom; + rtc0 = &rtc; + serial0 = &uart0; + serial1 = &uart1; + serial2 = &dcc; + usb0 = &usb0; + usb1 = &usb1; + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; + }; + + ref_clk: ref-clk { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&si570_ref_clk>; + }; + + ddr4_dimm1_si570: ddr4-dimm1-si570 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&si570_ddr_dimm1>; + }; + + ddr4_dimm2_si570: ddr4-dimm2-si570 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&si570_ddr_dimm2>; + }; + + lpddr4_si570: lpddr4-si570 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&si570_lpddr4>; + }; + + hsdp_si570: hsdp-si570 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&si570_hsdp>; + }; + + si5332_1: si5332-1 { /* clk0_sgmii - u142 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + }; + + si5332_2: si5332-2 { /* clk1_usb - u142 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <27000000>; + }; +}; + +&sdhci0 { /* emmc MIO 13-23 - with some settings 16GB */ + status = "okay"; + non-removable; + disable-wp; + no-sd; + no-sdio; + cap-mmc-hw-reset; + bus-width = <8>; + xlnx,mio-bank = <0>; +}; + +&uart0 { /* uart0 MIO38-39 */ + status = "okay"; +}; + +&uart1 { /* uart1 MIO40-41 */ + status = "okay"; +}; + +&sdhci1 { /* sd1 MIO45-51 cd in place */ + status = "okay"; + no-1-8-v; + disable-wp; + xlnx,mio-bank = <1>; +}; + +&psgtr { + status = "okay"; + /* sgmii, usb3 */ + clocks = <&si5332_1>, <&si5332_2>; + clock-names = "ref0", "ref1"; +}; + +&gem0 { + status = "okay"; + phy-handle = <&phy0>; + phy-mode = "sgmii"; /* DTG generates this properly 1512 */ + is-internal-pcspma; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + /* reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; */ + phy0: ethernet-phy@0 { + reg = <0>; + }; + }; +}; + +&gpio { + status = "okay"; + gpio-line-names = "", "", "", "", "", /* 0 - 4 */ + "", "", "DC_SYS_CTRL0", "DC_SYS_CTRL1", "DC_SYS_CTRL2", /* 5 - 9 */ + "DC_SYS_CTRL3", "DC_SYS_CTRL4", "DC_SYS_CTRL5", "EMMC_DAT0", "EMMC_DAT1", /* 10 - 14 */ + "EMMC_DAT2", "EMMC_DAT3", "EMMC_DAT4", "EMMC_DAT5", "EMMC_DAT6", /* 15 - 19 */ + "EMMC_DAT7", "EMMC_CMD", "EMMC_CLK", "EMMC_RST_B", "", /* 20 - 24 */ + "", "", "", "", "", /* 25 - 29 */ + "", "", "", "", "LP_I2C0_PMC_SCL", /* 30 - 34 */ + "LP_I2C0_PMC_SDA", "LP_I2C1_SCL", "LP_I2C1_SDA", "UART0_RXD_IN", "UART0_TXD_OUT", /* 35 - 39 */ + "UART1_TXD_OUT", "UART1_RXD_IN", "ETH_RESET_B", "", "", /* 40 - 44 */ + "SD1_CD_B", "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3", /* 45 - 49 */ + "SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2", /* 50 - 54 */ + "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3", /* 55 - 59 */ + "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "USB1_CLK", /* 60 - 64 */ + "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1", /* 65 - 69 */ + "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6", /* 70 - 74 */ + "USB1_DATA7", "ETH_MDC", "ETH_MDIO", /* 75 - 77, MIO end and EMIO start */ + "SYSCTLR_VERSAL_MODE0", "SYSCTLR_VERSAL_MODE1", /* 78 - 79 */ + "SYSCTLR_VERSAL_MODE2", "SYSCTLR_VERSAL_MODE3", "SYSCTLR_POR_B_LS", "DC_PRSNT", "SYSCTLR_POWER_EN", /* 80 - 84 */ + "SYSCTLR_JTAG_S0", "SYSCTLR_JTAG_S1", "SYSCTLR_IIC_MUX0_RESET_B", "SYSCTLR_IIC_MUX1_RESET_B", "SYSCTLR_LP_I2C_SM_ALERT", /* 85 -89 */ + "SYSCTLR_GPIO0", "SYSCTLR_GPIO1", "SYSCTLR_GPIO2", "SYSCTLR_GPIO3", "SYSCTLR_GPIO4", /* 90 - 94 */ + "SYSCTLR_GPIO5", "VCCO_500_RBIAS", "VCCO_501_RBIAS", "VCCO_502_RBIAS", "VCCO_500_RBIAS_LED", /* 95 - 99 */ + "VCCO_501_RBIAS_LED", "VCCO_502_RBIAS_LED", "SYSCTLR_VCCINT_EN", "SYSCTLR_VCC_IO_SOC_EN", "SYSCTLR_VCC_PMC_EN", /* 100 - 104 */ + "SYSCTLR_VCC_RAM_EN", "SYSCTLR_VCC_PSLP_EN", "SYSCTLR_VCC_PSFP_EN", "SYSCTLR_VCCAUX_EN", "SYSCTLR_VCCAUX_PMC_EN", /* 105 - 109 */ + "SYSCTLR_VCCO_500_EN", "SYSCTLR_VCCO_501_EN", "SYSCTLR_VCCO_502_EN", "SYSCTLR_VCCO_503_EN", "SYSCTLR_VCC1V8_EN", /* 110 - 114 */ + "SYSCTLR_VCC3V3_EN", "SYSCTLR_VCC1V2_DDR4_EN", "SYSCTLR_VCC1V1_LP4_EN", "SYSCTLR_VDD1_1V8_LP4_EN", "SYSCTLR_VADJ_FMC_EN", /* 115 - 119 */ + "SYSCTLR_MGTYAVCC_EN", "SYSCTLR_MGTYAVTT_EN", "SYSCTLR_MGTYVCCAUX_EN", "SYSCTLR_UTIL_1V13_EN", "SYSCTLR_UTIL_1V8_EN", /* 120 - 124 */ + "SYSCTLR_UTIL_2V5_EN", "FMCP1_FMC_PRSNT_M2C_B", "FMCP2_FMC_PRSNT_M2C_B", "FMCP1_FMCP_PRSNT_M2C_B", "FMCP2_FMCP_PRSNT_M2C_B", /* 125 - 129 */ + "PMBUS1_INA226_ALERT", "PMBUS2_INA226_ALERT", "SYSCTLR_USBC_SBU1", "SYSCTLR_USBC_SBU2", "TI_CABLE1", /* 130 - 134 */ + "TI_CABLE2", "SYSCTLR_MIC2005_EN_B", "SYSCTLR_MIC2005_FAULT_B", "SYSCTLR_TUSB320_INT_B", "SYSCTLR_TUSB320_ID", /* 135 - 139 */ + "PMBUS1_ALERT", "PMBUS2_ALERT", "SYSCTLR_ETH_RESET_B", "SYSCTLR_VCC0V85_TG", "MAX6643_OT_B", /* 140 - 144 */ + "MAX6643_FANFINAL_B", "MAX6643_FULLSPD", "", "", "", /* 145 - 149 */ + "", "", "", "", "", /* 150 - 154 */ + "", "", "", "", "", /* 155 - 159 */ + "", "", "", "", "", /* 160 - 164 */ + "", "", "", "", "", /* 165 - 169 */ + "", "", "", ""; /* 170 - 173 */ +}; + +&i2c0 { /* MIO 34-35 - can't stay here */ + status = "okay"; + clock-frequency = <400000>; + i2c-mux@74 { /* u33 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + /* reset-gpios = <&gpio SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */ + i2c@0 { /* PMBUS1 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* On connector J98 */ + reg_vcc_fmc: tps544@7 { /* u80 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */ + reg = <0x7>; + regulator-name = "reg_vcc_fmc"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2600000>; + /* enable-gpio = <&gpio0 23 0x4>; optional */ + }; + reg_vcc_ram: tps544@8 { /* u83 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */ + reg = <0x8>; + }; + reg_vcc_pslp: tps544@9 { /* u85 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */ + reg = <0x9>; + }; + reg_vcc_psfp: tps544@a { /* u86 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */ + reg = <0xa>; + }; + reg_vccint: tps53681@60 { /* u70 - FIXME name - don't know what it does - also vcc_io_soc */ + compatible = "ti,tps53681", "ti,tps53679"; + reg = <0x60>; + /* vccint, vcc_io_soc */ + }; + }; + i2c@1 { /* PMBUS1_INA226 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* FIXME check alerts coming to SC */ + vcc_fmc: ina226@42 { /* u81 */ + compatible = "ti,ina226"; + reg = <0x42>; + shunt-resistor = <5000>; + }; + vcc_ram: ina226@43 { /* u82 */ + compatible = "ti,ina226"; + reg = <0x43>; + shunt-resistor = <5000>; + }; + vcc_pslp: ina226@44 { /* u84 */ + compatible = "ti,ina226"; + reg = <0x44>; + shunt-resistor = <5000>; + }; + vcc_psfp: ina226@45 { /* u87 */ + compatible = "ti,ina226"; + reg = <0x45>; + shunt-resistor = <5000>; + }; + }; + i2c@2 { /* PMBUS2 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* On connector J104 */ + reg_vccaus: tps544@d { /* u88 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */ + reg = <0xd>; + }; + reg_vccaux_fmc: tps544@e { /* u90 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */ + reg = <0xe>; + }; + reg_vcco_500: tps544@f { /* u93 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */ + reg = <0xf>; + }; + reg_vcco_501: tps544@10 { /* u95 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */ + reg = <0x10>; + }; + reg_vcco_502: tps544@11 { /* u97 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */ + reg = <0x11>; + }; + reg_vcco_503: tps544@12 { /* u99 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */ + reg = <0x12>; + }; + reg_vcc1v8: tps544@13 { /* u101 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */ + reg = <0x13>; + }; + reg_vcc3v3: tps544@14 { /* u102 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */ + reg = <0x14>; + }; + reg_vcc1v2_ddr4: tps544@15 { /* u104 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */ + reg = <0x15>; + }; + reg_vcc1v1_lp4: tps544@16 { /* u106 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */ + reg = <0x16>; + }; + reg_vcc1_1V8_lp4: tps544@17 { /* u108 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */ + reg = <0x17>; + }; + reg_vadj_fmc: tps544@19 { /* u109 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */ + reg = <0x19>; + }; + reg_mgtyavcc: tps544@1a { /* u111 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */ + reg = <0x1a>; + }; + reg_mgtyavtt: tps544@1b { /* u114 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */ + reg = <0x1b>; + }; + reg_mgtyvccaux: tps544@1c { /* u115 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */ + reg = <0x1c>; + }; + reg_util_1v13: tps544@1d { /* u117 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */ + reg = <0x1d>; + }; + reg_util_1v8: tps544@1e { /* u118 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */ + reg = <0x1e>; + }; + reg_util_2v5: tps544@1f { /* u119 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */ + reg = <0x1f>; + }; + }; + i2c@3 { /* PMBUS2_INA226 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* FIXME check alerts coming to SC */ + vccaux: ina226@40 { /* u89 */ + compatible = "ti,ina226"; + reg = <0x40>; + shunt-resistor = <5000>; + }; + vccaux_fmc: ina226@41 { /* u91 */ + compatible = "ti,ina226"; + reg = <0x41>; + shunt-resistor = <5000>; + }; + vcco_500: ina226@42 { /* u92 */ + compatible = "ti,ina226"; + reg = <0x42>; + shunt-resistor = <5000>; + }; + vcco_501: ina226@43 { /* u94 */ + compatible = "ti,ina226"; + reg = <0x43>; + shunt-resistor = <5000>; + }; + vcco_502: ina226@44 { /* u96 */ + compatible = "ti,ina226"; + reg = <0x44>; + shunt-resistor = <5000>; + }; + vcco_503: ina226@45 { /* u98 */ + compatible = "ti,ina226"; + reg = <0x45>; + shunt-resistor = <5000>; + }; + vcc_1v8: ina226@46 { /* u100 */ + compatible = "ti,ina226"; + reg = <0x46>; + shunt-resistor = <5000>; + }; + vcc_3v3: ina226@47 { /* u103 */ + compatible = "ti,ina226"; + reg = <0x47>; + shunt-resistor = <5000>; + }; + vcc_1v2_ddr4: ina226@48 { /* u105 */ + compatible = "ti,ina226"; + reg = <0x48>; + shunt-resistor = <1000>; + }; + vcc1v1_lp4: ina226@49 { /* u107 */ + compatible = "ti,ina226"; + reg = <0x49>; + shunt-resistor = <5000>; + }; + vadj_fmc: ina226@4a { /* u110 */ + compatible = "ti,ina226"; + reg = <0x4a>; + shunt-resistor = <5000>; + }; + mgtyavcc: ina226@4b { /* u112 */ + compatible = "ti,ina226"; + reg = <0x4b>; + shunt-resistor = <1000>; + }; + mgtyavtt: ina226@4c { /* u113 */ + compatible = "ti,ina226"; + reg = <0x4c>; + shunt-resistor = <1000>; + }; + mgtyvccaux: ina226@4d { /* u116 */ + compatible = "ti,ina226"; + reg = <0x4d>; + shunt-resistor = <5000>; + }; + vcc_bat: ina226@4e { /* u12 */ + compatible = "ti,ina226"; + reg = <0x4e>; + shunt-resistor = <10000000>; /* 10 ohm */ + }; + }; + i2c@4 { /* LP_I2C_SM */ + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + /* connected to J212G */ + /* zynqmp sm alert or samtec J212H */ + }; + /* 5-7 unused */ + }; +}; + +&i2c1 { /* i2c1 MIO 36-37 */ + status = "okay"; + clock-frequency = <400000>; + + /* Must be enabled via J242 */ + eeprom_versal: eeprom@51 { /* x-prc-01-revA u116, x-prc-02-revA u12 */ + compatible = "atmel,24c02"; + reg = <0x51>; + }; + + i2c-mux@74 { /* u35 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + /* reset-gpios = <&gpio SYSCTLR_IIC_MUX1_RESET_B GPIO_ACTIVE_HIGH>; */ + dc_i2c: i2c@0 { /* DC_I2C */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* Use for storing information about SC board */ + eeprom: eeprom@54 { /* u34 - m24128 16kB */ + compatible = "st,24c128", "atmel,24c128"; + reg = <0x54>; + }; + si570_ref_clk: clock-generator@5d { /* u32 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; /* 570JAC000900DG */ + temperature-stability = <50>; + factory-fout = <33333333>; + clock-frequency = <33333333>; + clock-output-names = "ref_clk"; + silabs,skip-recall; + }; + /* Connection via Samtec J212D */ + /* Use for storing information about X-PRC card */ + x_prc_eeprom: eeprom@52 { /* x-prc-01-revA u120, x-prc-02-revA u16 */ + compatible = "atmel,24c02"; + reg = <0x52>; + }; + + /* Use for setting up certain features on X-PRC card */ + x_prc_tca9534: gpio@22 { /* x-prc-01-revA u121, x-prc-02-revA u17 */ + compatible = "nxp,pca9534"; + reg = <0x22>; + gpio-controller; /* IRQ not connected */ + #gpio-cells = <2>; + gpio-line-names = "sw4_1", "sw4_2", "sw4_3", "sw4_4", + "", "", "", ""; + gtr-sel0 { + gpio-hog; + gpios = <0 0>; + input; /* FIXME add meaning */ + line-name = "sw4_1"; + }; + gtr-sel1 { + gpio-hog; + gpios = <1 0>; + input; /* FIXME add meaning */ + line-name = "sw4_2"; + }; + gtr-sel2 { + gpio-hog; + gpios = <2 0>; + input; /* FIXME add meaning */ + line-name = "sw4_3"; + }; + gtr-sel3 { + gpio-hog; + gpios = <3 0>; + input; /* FIXME add meaning */ + line-name = "sw4_4"; + }; + }; + }; + i2c@1 { /* FMCP1_IIC */ + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* FIXME connection to Samtec J51C */ + /* expected eeprom 0x50 SE cards */ + }; + i2c@2 { /* FMCP2_IIC */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* FIXME connection to Samtec J53C */ + /* expected eeprom 0x50 SE cards */ + }; + i2c@3 { /* DDR4_DIMM1 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + si570_ddr_dimm1: clock-generator@60 { /* u2 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x60>; /* 570BAB000299DG */ + temperature-stability = <50>; + factory-fout = <200000000>; + clock-frequency = <200000000>; + clock-output-names = "si570_ddrdimm1_clk"; + }; + /* 0x50 SPD? */ + }; + i2c@4 { /* DDR4_DIMM2 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + si570_ddr_dimm2: clock-generator@60 { /* u3 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x60>; /* 570BAB000299DG */ + temperature-stability = <50>; + factory-fout = <200000000>; + clock-frequency = <200000000>; + clock-output-names = "si570_ddrdimm2_clk"; + }; + /* 0x50 SPD? */ + }; + i2c@5 { /* LPDDR4_SI570_CLK */ + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + si570_lpddr4: clock-generator@60 { /* u4 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x60>; /* 570BAB000299DG */ + temperature-stability = <50>; + factory-fout = <200000000>; + clock-frequency = <200000000>; + clock-output-names = "si570_lpddr4_clk"; + }; + }; + i2c@6 { /* HSDP_SI570 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + si570_hsdp: clock-generator@60 { /* u5 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x60>; /* 570JAC000900DG */ + temperature-stability = <50>; + factory-fout = <156250000>; + clock-frequency = <156250000>; + clock-output-names = "si570_hsdp_clk"; + }; + }; + i2c@7 { /* PCIE_CLK */ + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + /* u36 0xd8 or 0xde - pcie clk buf - 9ZML1241EKILF PCIe GEN 4 CLOCK BUFFER FIXME - no driver */ + /* u37 0xd0 DNP - pcie clocking 1 - 9FGV1006BQ505LTGI - PCIe GEN 4 CLOCK GENERATOR FIXME - no linux driver */ + /* u38 0xca - pcie clocking 2 - 9ZML1241EKILF PCIe GEN 4 CLOCK BUFFER FIXME - no driver */ + /* u39 8T49N240 - pcie clocking 3 */ + }; + }; +}; + +&usb0 { + status = "okay"; + phy-names = "usb3-phy"; + phys = <&psgtr 1 PHY_TYPE_USB3 0 1>; +}; + +&dwc3_0 { + status = "okay"; + dr_mode = "peripheral"; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + maximum-speed = "super-speed"; +}; + +&usb1 { + status = "okay"; +}; + +&dwc3_1 { + /delete-property/ phy-names ; + /delete-property/ phys ; + dr_mode = "host"; + maximum-speed = "high-speed"; + snps,dis_u2_susphy_quirk ; + snps,dis_u3_susphy_quirk ; + status = "okay"; +}; + +&xilinx_ams { + status = "okay"; +}; + +&ams_ps { + status = "okay"; +}; + +&ams_pl { + status = "okay"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-sc-revB.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-sc-revB.dts @@ -0,0 +1,433 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP Generic System Controller + * + * (C) Copyright 2021 - 2022, Xilinx, Inc. + * (C) Copyright 2022 - 2024, Advanced Micro Devices, Inc. + * + * Michal Simek + */ +/dts-v1/; + +#include "zynqmp.dtsi" +#include "zynqmp-clk-ccf.dtsi" +#include +#include +#include +#include +#include + +/ { + model = "ZynqMP Generic System Controller"; + compatible = "xlnx,zynqmp-sc-revB", "xlnx,zynqmp-sc", "xlnx,zynqmp"; + + aliases { + i2c0 = &i2c0; + i2c1 = &i2c1; + mmc0 = &sdhci0; + mmc1 = &sdhci1; + nvmem0 = &eeprom; + rtc0 = &rtc; + serial0 = &uart0; + serial1 = &uart1; + serial2 = &dcc; + spi0 = &qspi; + spi1 = &spi0; + spi2 = &spi1; + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial1:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + autorepeat; + key-fwuen { + label = "sw16"; + gpios = <&gpio 12 GPIO_ACTIVE_LOW>; + linux,code = ; + wakeup-source; + autorepeat; + }; + }; + + leds { + compatible = "gpio-leds"; + ds40-led { + label = "heartbeat"; + gpios = <&gpio 7 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + ds44-led { + label = "status"; + gpios = <&gpio 8 GPIO_ACTIVE_HIGH>; + }; + }; + + si5332_2: si5332-2 { /* u42 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + }; + + pwm-fan { + compatible = "pwm-fan"; + status = "okay"; + pwms = <&ttc0 2 40000 0>; + }; +}; + +&gpio { + status = "okay"; + gpio-line-names = "QSPI_CLK", "QSPI_DQ1", "QSPI_DQ2", "QSPI_DQ3", "QSPI_DQ0", /* 0 - 4 */ + "QSPI_CS_B", "", "LED1", "LED2", "", /* 5 - 9 */ + "", "ZU4_TRIGGER", "FWUEN", "EMMC_DAT0", "EMMC_DAT1", /* 10 - 14 */ + "EMMC_DAT2", "EMMC_DAT3", "EMMC_DAT4", "EMMC_DAT5", "EMMC_DAT6", /* 15 - 19 */ + "EMMC_DAT7", "EMMC_CMD", "EMMC_CLK", "EMMC_RST_B", "I2C1_SCL", /* 20 - 24 */ + "I2C1_SDA", "UART0_RXD", "UART0_TXD", "", "", /* 25 - 29 */ + "", "", "", "", "I2C0_SCL", /* 30 - 34 */ + "I2C0_SDA", "UART1_TXD", "UART1_RXD", "GEM_TX_CLK", "GEM_TX_D0", /* 35 - 39 */ + "GEM_TX_D1", "GEM_TX_D2", "GEM_TX_D3", "GEM_TX_CTL", "GEM_RX_CLK", /* 40 - 44 */ + "GEM_RX_D0", "GEM_RX_D1", "GEM_RX_D2", "GEM_RX_D3", "GEM_RX_CTL", /* 45 - 49 */ + "GEM_MDC", "GEM_MDIO", "USB0_CLK", "USB0_DIR", "USB0_DATA2", /* 50 - 54 */ + "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3", /* 55 - 59 */ + "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "", /* 60 - 64 */ + "", "", "", "", "", /* 65 - 69 */ + "", "", "", "", "", /* 70 - 74 */ + "", "", "ETH_RESET_B", /* 75 - 77, MIO end and EMIO start */ + "", "", /* 78 - 79 */ + "", "", "", "", "", /* 80 - 84 */ + "", "", "", "", "", /* 85 -89 */ + "", "", "", "", "", /* 90 - 94 */ + "", "", "", "", "", /* 95 - 99 */ + "", "", "", "", "", /* 100 - 104 */ + "", "", "", "", "", /* 105 - 109 */ + "", "", "", "", "", /* 110 - 114 */ + "", "", "", "", "", /* 115 - 119 */ + "", "", "", "", "", /* 120 - 124 */ + "", "", "", "", "", /* 125 - 129 */ + "", "", "", "", "", /* 130 - 134 */ + "", "", "", "", "", /* 135 - 139 */ + "", "", "", "", "", /* 140 - 144 */ + "", "", "", "", "", /* 145 - 149 */ + "", "", "", "", "", /* 150 - 154 */ + "", "", "", "", "", /* 155 - 159 */ + "", "", "", "", "", /* 160 - 164 */ + "", "", "", "", "", /* 165 - 169 */ + "", "", "", ""; /* 170 - 173 */ +}; + +&gem1 { /* gem1 MIO38-49, MDIO MIO50/51 */ + status = "okay"; + phy-mode = "rgmii-id"; + phy-handle = <&phy0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gem1_default>; + + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy0: ethernet-phy@1 { + #phy-cells = <1>; + compatible = "ethernet-phy-id2000.a231"; + reg = <1>; + ti,rx-internal-delay = ; + ti,tx-internal-delay = ; + ti,fifo-depth = ; + ti,dp83867-rxctrl-strap-quirk; + reset-gpios = <&gpio 77 GPIO_ACTIVE_LOW>; + reset-assert-us = <100>; + reset-deassert-us = <280>; + }; + }; +}; + +&i2c0 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + clock-frequency = <100000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c0_default>; + pinctrl-1 = <&pinctrl_i2c0_gpio>; + scl-gpios = <&gpio 34 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio 35 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; +}; + +&i2c1 { /* i2c1 MIO 24-25 */ + status = "okay"; + bootph-all; + clock-frequency = <100000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1_default>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + + /* Use for storing information about SC board */ + eeprom: eeprom@54 { /* u34 - m24128 16kB */ + compatible = "st,24c128", "atmel,24c128"; + reg = <0x54>; /* & 0x5c */ + bootph-all; + }; +}; + +/* USB 3.0 only */ +&psgtr { + status = "okay"; + /* nc, nc, usb3 */ + clocks = <&si5332_2>; + clock-names = "ref2"; +}; + +&qspi { /* MIO 0-5 */ + status = "okay"; + /* QSPI should also have PINCTRL setup */ + flash@0 { + compatible = "m25p80", "jedec,spi-nor"; /* mt25qu512abb8e12 512Mib */ + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + spi-max-frequency = <40000000>; /* 40MHz */ + partition@0 { + label = "Image Selector"; + reg = <0x0 0x80000>; /* 512KB */ + read-only; + lock; + }; + partition@80000 { + label = "Image Selector Golden"; + reg = <0x80000 0x80000>; /* 512KB */ + read-only; + lock; + }; + partition@100000 { + label = "Persistent Register"; + reg = <0x100000 0x20000>; /* 128KB */ + }; + partition@120000 { + label = "Persistent Register Backup"; + reg = <0x120000 0x20000>; /* 128KB */ + }; + partition@140000 { + label = "Open_1"; + reg = <0x140000 0xC0000>; /* 768KB */ + }; + partition@200000 { + label = "Image A (FSBL, PMU, ATF, U-Boot)"; + reg = <0x200000 0xD00000>; /* 13MB */ + }; + partition@f00000 { + label = "ImgSel Image A Catch"; + reg = <0xF00000 0x80000>; /* 512KB */ + read-only; + lock; + }; + partition@f80000 { + label = "Image B (FSBL, PMU, ATF, U-Boot)"; + reg = <0xF80000 0xD00000>; /* 13MB */ + }; + partition@1c80000 { + label = "ImgSel Image B Catch"; + reg = <0x1C80000 0x80000>; /* 512KB */ + read-only; + lock; + }; + partition@1d00000 { + label = "Open_2"; + reg = <0x1D00000 0x100000>; /* 1MB */ + }; + partition@1e00000 { + label = "Recovery Image"; + reg = <0x1E00000 0x200000>; /* 2MB */ + read-only; + lock; + }; + partition@2000000 { + label = "Recovery Image Backup"; + reg = <0x2000000 0x200000>; /* 2MB */ + read-only; + lock; + }; + partition@2200000 { + label = "U-Boot storage variables"; + reg = <0x2200000 0x20000>; /* 128KB */ + }; + partition@2220000 { + label = "U-Boot storage variables backup"; + reg = <0x2220000 0x20000>; /* 128KB */ + }; + partition@2240000 { + label = "SHA256"; + reg = <0x2240000 0x40000>; /* 256B but 256KB sector */ + read-only; + lock; + }; + partition@2280000 { + label = "Secure OS Storage"; + reg = <0x2280000 0x20000>; /* 128KB */ + }; + partition@22A0000 { + label = "User"; + reg = <0x22A0000 0x1d60000>; /* 29.375 MB */ + }; + }; +}; + +&sdhci0 { /* emmc MIO 13-23 - with some settings MTFC16GAPALBH 16GB */ + status = "okay"; + non-removable; + disable-wp; + no-sd; + no-sdio; + cap-mmc-hw-reset; + bus-width = <8>; + xlnx,mio-bank = <0>; +}; + +&ttc0 { + status = "okay"; + #pwm-cells = <3>; +}; + +&uart1 { /* uart0 MIO36-37 */ + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1_default>; +}; + +&pinctrl0 { /* required by spec */ + status = "okay"; + + pinctrl_uart1_default: uart1-default { + conf { + groups = "uart1_9_grp"; + slew-rate = ; + power-source = ; + drive-strength = <12>; + }; + + conf-rx { + pins = "MIO37"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO36"; + bias-disable; + }; + + mux { + groups = "uart1_9_grp"; + function = "uart1"; + }; + }; + + pinctrl_i2c0_default: i2c0-default { + mux { + groups = "i2c0_8_grp"; + function = "i2c0"; + }; + + conf { + groups = "i2c0_8_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c0_gpio: i2c0-gpio-grp { + mux { + groups = "gpio0_34_grp", "gpio0_35_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_34_grp", "gpio0_35_grp"; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c1_default: i2c1-default { + conf { + groups = "i2c1_6_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + + mux { + groups = "i2c1_6_grp"; + function = "i2c1"; + }; + }; + + pinctrl_i2c1_gpio: i2c1-gpio-grp { + conf { + groups = "gpio0_24_grp", "gpio0_25_grp"; + slew-rate = ; + power-source = ; + }; + + mux { + groups = "gpio0_24_grp", "gpio0_25_grp"; + function = "gpio0"; + }; + }; + + pinctrl_gem1_default: gem1-default { + conf { + groups = "ethernet1_0_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO44", "MIO46", "MIO48"; + bias-high-impedance; + low-power-disable; + }; + + conf-bootstrap { + pins = "MIO45", "MIO47", "MIO49"; + bias-disable; + low-power-disable; + }; + + conf-tx { + pins = "MIO38", "MIO39", "MIO40", + "MIO41", "MIO42", "MIO43"; + bias-disable; + low-power-enable; + }; + + conf-mdio { + groups = "mdio1_0_grp"; + slew-rate = ; + power-source = ; + bias-disable; + }; + + mux-mdio { + function = "mdio1"; + groups = "mdio1_0_grp"; + }; + + mux { + function = "ethernet1"; + groups = "ethernet1_0_grp"; + }; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-sc-revC.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-sc-revC.dts @@ -0,0 +1,37 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP Generic System Controller + * + * Copyright (C) 2021 - 2022, Xilinx, Inc. + * Copyright (C) 2022 - 2023, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +#include "zynqmp-sc-revB.dts" + +/ { + model = "ZynqMP Generic System Controller"; + compatible = "xlnx,zynqmp-sc-revC", "xlnx,zynqmp-sc", "xlnx,zynqmp"; +}; + +&gem1 { /* gem1 MIO38-49, MDIO MIO50/51 */ + /delete-node/ mdio; + + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy0: ethernet-phy@1 { /* ADI1300 */ + #phy-cells = <1>; + compatible = "ethernet-phy-id0283.bc30"; + reg = <1>; + adi,rx-internal-delay-ps = <2400>; + adi,tx-internal-delay-ps = <2400>; + adi,fifo-depth-bits = <8>; + reset-gpios = <&gpio 77 GPIO_ACTIVE_LOW>; + reset-assert-us = <10>; + reset-deassert-us = <5000>; + }; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-sc-vek280-revA.dtso +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-sc-vek280-revA.dtso @@ -0,0 +1,278 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP VEK280 revA + * + * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc + * + * Michal Simek + */ + +#include + +/dts-v1/; +/plugin/; + +&{/} { + compatible = "xlnx,zynqmp-sc-vek280-revA", "xlnx,zynqmp-vek280-revA", + "xlnx,zynqmp-vek280", "xlnx,zynqmp"; + + vc7_xin: vc7-xin { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <50000000>; + }; + + gtclk1_1: sys-clk-0 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7 0>; + }; + + gtclk1_2: sys-clk-1 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7 1>; + }; + + gtclk1_3: sys-clk-2 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7 2>; + }; + + gtclk1_6: gtclk1-out6 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7 3>; + }; + + gtclk1_7: gtclk1-out7 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7 4>; + }; + + gtclk1_8: gtclk1-out8 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7 5>; + }; + + gtclk1_10: ps-ref-clk { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7 6>; + }; + + gtclk1_11: gtclk1-out11 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7 7>; + }; +}; + +&i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + tca6416_u233: gpio@20 { /* u233 */ + compatible = "ti,tca6416"; + reg = <0x20>; + gpio-controller; /* interrupt not connected */ + #gpio-cells = <2>; + gpio-line-names = "", "", "SFP_MOD_ABS", "SFP_TX_DISABLE", /* 0 - 3 */ + "PMBUS2_INA226_ALERT", "", "", "", /* 4 - 7 */ + "FMCP1_FMC_PRSNT_M2C_B", "", "FMCP1_FMCP_PRSNT_M2C_B", "", /* 10 - 13 */ + "VCCINT_VRHOT_B", "8A34001_EXP_RST_B", "PMBUS_ALERT", "PMBUS1_INA226_ALERT"; /* 14 - 17 */ + }; + + i2c-mux@74 { /* u33 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + /* reset-gpios = <&gpio SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */ + pmbus_i2c: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* On connector J325 */ + ir35215_46: pmic@46 { /* IR35215 - u152 */ + compatible = "infineon,ir35215"; + reg = <0x46>; /* i2c addr - 0x16 */ + }; + irps5401_47: pmic5401@47 { /* IRPS5401 - u160 */ + compatible = "infineon,irps5401"; + reg = <0x47>; /* i2c addr 0x17 */ + }; + irps5401_48: pmic@48 { /* IRPS5401 - u279 */ + compatible = "infineon,irps5401"; + reg = <0x48>; /* i2c addr 0x18 */ + }; + ir38064_49: regulator@49 { /* IR38064 - u295 */ + compatible = "infineon,ir38064"; + reg = <0x49>; /* i2c addr 0x19 */ + }; + irps5401_4c: pmic@4c { /* IRPS5401 - u167 */ + compatible = "infineon,irps5401"; + reg = <0x4c>; /* i2c addr 0x1c */ + }; + irps5401_4d: pmic@4d { /* IRPS5401 - u175 */ + compatible = "infineon,irps5401"; + reg = <0x4d>; /* i2c addr 0x1d */ + }; + ir38060_4e: regulator@4e { /* IR38060 - u282 */ + compatible = "infineon,ir38060"; + reg = <0x4e>; /* i2c addr 0x1e */ + }; + }; + pmbus1_ina226_i2c: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* alerts coming to u233 and SC */ + vccint: ina226@40 { /* u65 */ + compatible = "ti,ina226"; + reg = <0x40>; + shunt-resistor = <500>; /* r440 */ + }; + vcc_soc: ina226@41 { /* u161 */ + compatible = "ti,ina226"; + reg = <0x41>; + shunt-resistor = <500>; /* r1702 */ + }; + vcc_pmc: ina226@42 { /* u163 */ + compatible = "ti,ina226"; + reg = <0x42>; + shunt-resistor = <5000>; /* r382 */ + }; + vcc_ram: ina226@43 { /* u355 */ + compatible = "ti,ina226"; + reg = <0x43>; + shunt-resistor = <5000>; /* r2417 */ + }; + vcc_pslp: ina226@44 { /* u165 */ + compatible = "ti,ina226"; + reg = <0x44>; + shunt-resistor = <5000>; /* r1830 */ + }; + vcc_psfp: ina226@45 { /* u260 */ + compatible = "ti,ina226"; + reg = <0x45>; + shunt-resistor = <5000>; /* r2386 */ + }; + vcco_hdio: ina226@46 { /* u356 */ + compatible = "ti,ina226"; + reg = <0x46>; + shunt-resistor = <5000>; /* r2392 */ + }; + }; + i2c@2 { /* NC */ /* FIXME maybe remove */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + pmbus2_ina226_i2c: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* alerts coming to u233 and SC */ + vccaux: ina226@40 { /* u166 */ + compatible = "ti,ina226"; + reg = <0x40>; + shunt-resistor = <5000>; /* r2384 */ + }; + vccaux_pmc: ina226@41 { /* u168 */ + compatible = "ti,ina226"; + reg = <0x41>; + shunt-resistor = <5000>; /* r2000 */ + }; + mgtavcc: ina226@42 { /* u265 */ + compatible = "ti,ina226"; + reg = <0x42>; + shunt-resistor = <5000>; /* r1829 */ + }; + vcc1v5: ina226@43 { /* u264 */ + compatible = "ti,ina226"; + reg = <0x43>; + shunt-resistor = <5000>; /* r2397 */ + }; + vcco_mio: ina226@45 { /* u172 */ + compatible = "ti,ina226"; + reg = <0x45>; + shunt-resistor = <5000>; /* r2401 */ + }; + mgtavtt: ina226@46 { /* u188 */ + compatible = "ti,ina226"; + reg = <0x46>; + shunt-resistor = <500>; /* r1384 */ + }; + vcco_502: ina226@47 { /* u174 */ + compatible = "ti,ina226"; + reg = <0x47>; + shunt-resistor = <5000>; /* r1994 */ + }; + mgtvccaux: ina226@48 { /* u176 */ + compatible = "ti,ina226"; + reg = <0x48>; + shunt-resistor = <5000>; /* r2384 */ + }; + vcc1v1_lp4: ina226@49 { /* u306 */ + compatible = "ti,ina226"; + reg = <0x49>; + shunt-resistor = <500>; /* r2064 */ + }; + vadj_fmc: ina226@4a { /* u281 */ + compatible = "ti,ina226"; + reg = <0x4a>; + shunt-resistor = <5000>; /* r2031 */ + }; + lpdmgtyavcc: ina226@4b { /* u177 */ + compatible = "ti,ina226"; + reg = <0x4b>; + shunt-resistor = <5000>; /* r2004 */ + }; + lpdmgtyavtt: ina226@4c { /* u309 */ + compatible = "ti,ina226"; + reg = <0x4c>; + shunt-resistor = <5000>; /* r1229 */ + }; + lpdmgtyvccaux: ina226@4d { /* u234 */ + compatible = "ti,ina226"; + reg = <0x4d>; + shunt-resistor = <5000>; /* r1679 */ + }; + }; + i2c@4 { /* NC */ /* FIXME maybe remove */ + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + }; + rc21008a_gtclk1: i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + /* connector j374 */ + /* rc21008a at 0x9 u299 */ + vc7: clock-generator@9 { + compatible = "renesas,rc21008a"; + reg = <0x9>; + #clock-cells = <1>; + clocks = <&vc7_xin>; + clock-names = "xin"; + }; + }; + fmcp1_iic: i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + /* to j51c */ + }; + sfp: i2c@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + /* sfp+ connector J376 */ + }; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-sc-vek280-revB.dtso +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-sc-vek280-revB.dtso @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP VEK280 revB + * + * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc + * + * Michal Simek + */ + +#include "zynqmp-sc-vek280-revA.dtso" + +&{/} { + compatible = "xlnx,zynqmp-sc-vek280-revB", "xlnx,zynqmp-vek280-revB", + "xlnx,zynqmp-vek280", "xlnx,zynqmp"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-sc-vhk158-revA.dtso +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-sc-vhk158-revA.dtso @@ -0,0 +1,405 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP VHK158 revA + * + * (C) Copyright 2022, Xilinx, Inc. + * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +#include + +/dts-v1/; +/plugin/; + +&{/} { + compatible = "xlnx,zynqmp-sc-vhk158-revA", "xlnx,zynqmp-vhk158-revA", + "xlnx,zynqmp-vhk158", "xlnx,zynqmp"; + + vc7_xin: vc7-xin { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <50000000>; + }; + + gtclk1_out1: gtclk1-out1 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_1 0>; + }; + + gtclk1_out2: gtclk1-out2 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_1 1>; + }; + + gtclk1_out3: gtclk1-out3 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_1 2>; + }; + + gtclk1_out6: gtclk1-out6 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_1 3>; + }; + + gtclk1_out7: gtclk1-out7 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_1 4>; + }; + + gtclk1_out8: gtclk1-out8 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_1 5>; + }; + + gtclk1_out10: gtclk1-out10 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_1 6>; + }; + + gtclk2_out1: gtclk2-out1 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_2 0>; + }; + + gtclk2_out2: gtclk2-out2 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_2 1>; + }; + + gtclk2_out3: gtclk2-out3 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_2 2>; + }; + + gtclk2_out6_ddr1: gtclk2-out6-ddr1 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_2 3>; + }; + + gtclk2_out7_ddr2: gtclk2-out7-ddr2 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_2 4>; + }; + + gtclk2_ref_clk: gtclk2-ref-clk { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_2 5>; + }; + + gtclk2_out10: gtclk2-out10 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_2 6>; + }; +}; + +&i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + tca6416_u233: gpio@20 { /* u233 */ + compatible = "ti,tca6416"; + reg = <0x20>; + gpio-controller; /* interrupt not connected */ + #gpio-cells = <2>; + gpio-line-names = "", "", "QSFPDD1_MODSELL", "QSFPDD2_MODSELL", /* 0 - 3 */ + "PMBUS2_INA226_ALERT", "", "", "", /* 4 - 7 */ + "FMCP1_FMC_PRSNT_M2C_B", "", "FMCP1_FMCP_PRSNT_M2C_B", "", /* 10 - 13 */ + "VCCINT_VRHOT_B", "8A34001_EXP_RST_B", "PMBUS_ALERT", "PMBUS1_INA226_ALERT"; /* 14 - 17 */ + }; + + i2c-mux@74 { /* u33 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + /* reset-gpios = <&gpio SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */ + pmbus_i2c: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* On connector J325 */ + ir38064_41: regulator@41 { /* IR38064 - u294 */ + compatible = "infineon,ir38064"; + reg = <0x41>; /* i2c addr 0x11 */ + }; + irps5401_45: pmic5401@45 { /* IRPS5401 - u280 */ + compatible = "infineon,irps5401"; + reg = <0x45>; /* i2c addr 0x15 */ + }; + ir35221_46: pmic@46 { /* IR35221 - u152 */ + compatible = "infineon,ir35221"; + reg = <0x46>; /* i2c addr - 0x16 */ + }; + irps5401_47: pmic5401@47 { /* IRPS5401 - u160 */ + compatible = "infineon,irps5401"; + reg = <0x47>; /* i2c addr 0x17 */ + }; + irps5401_48: regulator@48 { /* IRPS5401 - u279 */ + compatible = "infineon,irps5401"; + reg = <0x48>; /* i2c addr 0x18 */ + }; + ir38164_49: regulator@49 { /* IR38164 - u295 */ + compatible = "infineon,ir38164"; + reg = <0x49>; /* i2c addr 0x19 */ + }; + ir38060_4a: regulator@4a { /* IR38060 - u259 */ + compatible = "infineon,ir38164"; + reg = <0x4a>; /* i2c addr 0x1a */ + }; + irps5401_4c: pmic@4c { /* IRPS5401 - u167 */ + compatible = "infineon,irps5401"; + reg = <0x4c>; /* i2c addr 0x1c */ + }; + irps5401_4d: pmic@4d { /* IRPS5401 - u175 */ + compatible = "infineon,irps5401"; + reg = <0x4d>; /* i2c addr 0x1d */ + }; + ir38060_4e: regulator@4e { /* IR38060 - u282 */ + compatible = "infineon,ir38164"; + reg = <0x4e>; /* i2c addr 0x1e */ + }; + }; + pmbus1_ina226_i2c: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* FIXME check alerts coming to SC */ + vccint: ina226@40 { /* u65 */ + compatible = "ti,ina226"; + reg = <0x40>; + shunt-resistor = <500>; /* R440 */ + }; + vcc_soc: ina226@41 { /* u161 */ + compatible = "ti,ina226"; + reg = <0x41>; + shunt-resistor = <500>; /* R1702 */ + }; + vcc_pmc: ina226@42 { /* u163 */ + compatible = "ti,ina226"; + reg = <0x42>; + shunt-resistor = <5000>; /* R382 */ + }; + vcc_ram: ina226@43 { /* u5 */ + compatible = "ti,ina226"; + reg = <0x43>; + shunt-resistor = <500>; /* R121 */ + }; + vcc_pslp: ina226@44 { /* u165 */ + compatible = "ti,ina226"; + reg = <0x44>; + shunt-resistor = <5000>; /* R1830 */ + }; + vcc_psfp: ina226@45 { /* u260 */ + compatible = "ti,ina226"; + reg = <0x45>; + shunt-resistor = <5000>; /* R1834 */ + }; + vcco_hbm: ina226@46 { /* u164 */ + compatible = "ti,ina226"; + reg = <0x46>; + shunt-resistor = <500>; /* R2056 */ + }; + vcc_hbm: ina226@47 { /* u307 */ + compatible = "ti,ina226"; + reg = <0x47>; + shunt-resistor = <500>; /* R2068 */ + }; + vccaux_hbm: ina226@48 { /* u308 */ + compatible = "ti,ina226"; + reg = <0x48>; + shunt-resistor = <5000>; /* R2019 */ + }; + }; + i2c@2 { /* NC */ /* FIXME maybe remove */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + pmbus2_ina226_i2c: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* FIXME check alerts coming to SC */ + vccaux: ina226@40 { /* u166 */ + compatible = "ti,ina226"; + reg = <0x40>; + shunt-resistor = <5000>; /* R2060 */ + }; + vccaux_pmc: ina226@41 { /* u168 */ + compatible = "ti,ina226"; + reg = <0x41>; + shunt-resistor = <500>; /* R2000 */ + }; + mgtavcc: ina226@42 { /* u265 */ + compatible = "ti,ina226"; + reg = <0x42>; + shunt-resistor = <500>; /* R1829 */ + }; + vcc1v5: ina226@43 { /* u264 */ + compatible = "ti,ina226"; + reg = <0x43>; + shunt-resistor = <500>; /* R1221 */ + }; + vcco_mio: ina226@45 { /* u172 */ + compatible = "ti,ina226"; + reg = <0x45>; + shunt-resistor = <500>; /* R2015 */ + }; + mgtavtt: ina226@46 { /* u188 */ + compatible = "ti,ina226"; + reg = <0x46>; + shunt-resistor = <500>; /* R1384 */ + }; + vcco_502: ina226@47 { /* u174 */ + compatible = "ti,ina226"; + reg = <0x47>; + shunt-resistor = <500>; /* R1994 */ + }; + mgtvccaux: ina226@48 { /* u176 */ + compatible = "ti,ina226"; + reg = <0x48>; + shunt-resistor = <500>; /* R1232 */ + }; + vcc1v2_rdimm: ina226@49 { /* u306 */ + compatible = "ti,ina226"; + reg = <0x49>; + shunt-resistor = <500>; /* R2064 */ + }; + vadj_fmc: ina226@4a { /* u281 */ + compatible = "ti,ina226"; + reg = <0x4a>; + shunt-resistor = <5000>; /* R2031 */ + }; + lpdmgtyavcc: ina226@4b { /* u177 */ + compatible = "ti,ina226"; + reg = <0x4b>; + shunt-resistor = <500>; /* R2004 */ + }; + lpdmgtyavtt: ina226@4c { /* u309 */ + compatible = "ti,ina226"; + reg = <0x4c>; + shunt-resistor = <500>; /* R1229 */ + }; + lpdmgtyvccaux: ina226@4d { /* u234 */ + compatible = "ti,ina226"; + reg = <0x4d>; + shunt-resistor = <500>; /* R1679 */ + }; + }; + i2c@4 { /* NC */ + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + }; + rc21008a_gtclk1: i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + vc7_1: clock-generator@9 { + compatible = "renesas,rc21008a"; + clock-output-names = "rc21008a-0"; + reg = <0x9>; + #clock-cells = <1>; + clocks = <&vc7_xin>; + clock-names = "xin"; + }; + /* i2c@9 - U299 */ + }; + rc21008a_gtclk2: i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + vc7_2: clock-generator@9 { + compatible = "renesas,rc21008a"; + clock-output-names = "rc21008a-1"; + reg = <0x9>; + #clock-cells = <1>; + clocks = <&vc7_xin>; + clock-names = "xin"; + }; + /* i2c@9 - U300 */ + }; + sync_8a34001: i2c@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + /* U219 - i2c address UNKNOWN */ + }; + }; +}; + +&i2c1 { + #address-cells = <1>; + #size-cells = <0>; + + i2c-mux@74 { /* u35 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + /* reset-gpios = <&gpio SYSCTLR_IIC_MUX1_RESET_B GPIO_ACTIVE_HIGH>; */ + ddr4_dimm0: i2c@0 { /* wired but NC */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + fmcp1_i2c: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* FIXME connection to Samtec J51C */ + /* expected eeprom 0x50 SE cards */ + }; + qsfp1_i2c: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* J350 connector */ + }; + qsfp2_i2c: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* J351 connector */ + }; + qsfp3_i2c: i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + /* J352 connector */ + }; + qsfp4_i2c: i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + /* J353 connector */ + }; + qsfpdd_i2c: i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + /* J1/J2 connectors */ + }; + ddr4_dimm1: i2c@7 { /* wired but NC */ + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + }; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-sc-vm-p-m1369-00-revA.dtso +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-sc-vm-p-m1369-00-revA.dtso @@ -0,0 +1,426 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP VM-P-M1369-00 + * + * Copyright (C) 2024, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +#include + +/dts-v1/; +/plugin/; + +&{/} { + compatible = "xlnx,zynqmp-sc-vm-p-m1369-revA", + "xlnx,zynqmp-sc-vm-p-m1369", "xlnx,zynqmp"; + + sys_clk_0 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&qsfp56g_0_clk 0>; + }; + sys_clk_1 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&qsfp56g_1_clk 0>; + }; + sys_clk_2 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&ch2_lpddr5_refclk 0>; + }; + sys_clk_3 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&ddr5_dimm1_refclk 0>; + }; + sys_clk_4 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&ps_refclk 0>; + }; + + ina226-u19 { + compatible = "iio-hwmon"; + io-channels = <&vcc_soc_ina 0>, <&vcc_soc_ina 1>, <&vcc_soc_ina 2>; + }; + ina226-u287 { + compatible = "iio-hwmon"; + io-channels = <&vcc_ram_ina 0>, <&vcc_ram_ina 1>, <&vcc_ram_ina 2>; + }; + ina226-u288 { + compatible = "iio-hwmon"; + io-channels = <&vcc_pslp_ina 0>, <&vcc_pslp_ina 1>, <&vcc_pslp_ina 2>; + }; + ina226-u289 { + compatible = "iio-hwmon"; + io-channels = <&vccaux_ina 0>, <&vccaux_ina 1>, <&vccaux_ina 2>; + }; + ina226-u290 { + compatible = "iio-hwmon"; + io-channels = <&vccaux_pmc_ina 0>, <&vccaux_pmc_ina 1>, <&vccaux_pmc_ina 2>; + }; + ina226-u291 { + compatible = "iio-hwmon"; + io-channels = <&vcco_500_ina 0>, <&vcco_500_ina 1>, <&vcco_500_ina 2>; + }; + ina226-u292 { + compatible = "iio-hwmon"; + io-channels = <&vcco_501_ina 0>, <&vcco_501_ina 1>, <&vcco_501_ina 2>; + }; + ina226-u293 { + compatible = "iio-hwmon"; + io-channels = <&vcco_502_ina 0>, <&vcco_502_ina 1>, <&vcco_502_ina 2>; + }; + ina226-u294 { + compatible = "iio-hwmon"; + io-channels = <&vcco_503_ina 0>, <&vcco_503_ina 1>, <&vcco_503_ina 2>; + }; + ina226-u295 { + compatible = "iio-hwmon"; + io-channels = <&vcc_ddr5_rdimm_ina 0>, <&vcc_ddr5_rdimm_ina 1>, <&vcc_ddr5_rdimm_ina 2>; + }; + ina226-u298 { + compatible = "iio-hwmon"; + io-channels = <&lp5_1v0_ina 0>, <&lp5_1v0_ina 1>, <&lp5_1v0_ina 2>; + }; + ina226-u296 { + compatible = "iio-hwmon"; + io-channels = <&vcc_fmc_ina 0>, <&vcc_fmc_ina 1>, <&vcc_fmc_ina 2>; + }; + ina226-u299 { + compatible = "iio-hwmon"; + io-channels = <>m_avcc_ina 0>, <>m_avcc_ina 1>, <>m_avcc_ina 2>; + }; + ina226-u300 { + compatible = "iio-hwmon"; + io-channels = <>m_avtt_ina 0>, <>m_avtt_ina 1>, <>m_avtt_ina 2>; + }; + ina226-u301 { + compatible = "iio-hwmon"; + io-channels = <>m_avccaux_ina 0>, <>m_avccaux_ina 1>, <>m_avccaux_ina 2>; + }; + ina226-u297 { + compatible = "iio-hwmon"; + io-channels = <&vcc_mipi_ina 0>, <&vcc_mipi_ina 1>, <&vcc_mipi_ina 2>; + }; +}; + +&i2c1 { /* i2c_main bus */ + #address-cells = <1>; + #size-cells = <0>; + + /* u97 eeprom at 0x54 described in sc-revB - WP protection via BOARD_EEPROM_WP - J1801 */ + + /* i2c_main_1 - u72 - j108 - disable translation, add 8 */ + /* J133 - OE for u91@55 + 8 - 161,132813MHz - QSFP56G_0 */ + qsfp56g_0_clk: clock-controller@5d { + compatible = "renesas,proxo-xp"; + reg = <0x5d>; + #clock-cells = <0>; + clock-output-names = "qsfp56g_0_clk"; + }; + + /* J134 - OE for u92@57 + 8 - 322,265625MHz - QSFP56G_1 */ + qsfp56g_1_clk: clock-controller@5f { + compatible = "renesas,proxo-xp"; + reg = <0x5f>; + #clock-cells = <0>; + clock-output-names = "qsfp56g_1_clk"; + }; + + /* i2c_main_2 - u74 - j110 - disable translation, add 9 */ + /* J210 - OE for u164@50 + 9 - 320MHz - CH2_LP5 */ + ch2_lpddr5_refclk: clock-controller@59 { + compatible = "renesas,proxo-xp"; + reg = <0x59>; + #clock-cells = <0>; + clock-output-names = "ch2_lpddr5_refclk"; + }; + + /* i2c_main_3 - u76 - j112 - disable translation, add 6 */ + /* J231 - OE for u165@50 + 6 - 320MHz - _RDIMM */ + ddr5_dimm1_refclk: clock-controller@56 { + compatible = "renesas,proxo-xp"; + reg = <0x56>; + #clock-cells = <0>; + clock-output-names = "ddr5_udimm_refclk"; + }; + + /* i2c_main_4 - u73 - j109 - disable translation, add 5 */ + /* J117 - OE for u82@50 + 5 - 33,3333MHz - PS_REFCLK */ + ps_refclk: clock-controller@55 { + compatible = "renesas,proxo-xp"; + reg = <0x55>; + #clock-cells = <0>; + clock-output-names = "ps_refclk"; + }; + + /* J71 - selection to LP_I2C_SCL_J or LP_I2C_PMC_SCL_J */ + /* J70 - selection to LP_I2C_SDA_J or LP_I2C_PMC_SDA_J */ + /* this should be SW controlable too */ +}; + +&i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + /* u134 tps544b25 but connected to J178 connector */ + /* u48/IMx3112/0x77 - 1:2 multiplexer - also accessed from Versal NET */ + /* Connection DDR5_UDIMM - SPD can be from 0x50-0x57 */ + /* FIXME gpio should handle SYSCTLR_PMBUS_ALERT and also INA226_PMBUS_ALERT */ + /* Access to i2c_pmc bus via u49 with OE j100 or via SYSCTLR_I2C_PMC_EN */ + + /* ina226_pmbus - J103 - disable INA226_PMBUS */ + vcc_soc_ina: power-monitor@40 { /* u19 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x40>; + shunt-resistor = <1000>; /* R222 */ + }; + + vcc_ram_ina: power-monitor@41 { /* u287 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x41>; + shunt-resistor = <1000>; /* R32981 */ + }; + + vcc_pslp_ina: power-monitor@42 { /* u288 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x42>; + shunt-resistor = <1000>; /* R32984 */ + }; + + vccaux_ina: power-monitor@43 { /* u289 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x43>; + shunt-resistor = <1000>; /* R32987 */ + }; + + vccaux_pmc_ina: power-monitor@44 { /* u290 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x44>; + shunt-resistor = <1000>; /* R32990 */ + }; + + vcco_500_ina: power-monitor@45 { /* u291 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x45>; + shunt-resistor = <1000>; /* R32993 */ + }; + + vcco_501_ina: power-monitor@46 { /* u292 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x46>; + shunt-resistor = <1000>; /* R32996 */ + }; + + vcco_502_ina: power-monitor@47 { /* u293 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x47>; + shunt-resistor = <1000>; /* R32999 */ + }; + + vcco_503_ina: power-monitor@48 { /* u294 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x48>; + shunt-resistor = <1000>; /* R33002 */ + }; + + vcc_ddr5_rdimm_ina: power-monitor@49 { /* u295 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x49>; + shunt-resistor = <1000>; /* R33005 */ + }; + + lp5_1v0_ina: power-monitor@4a { /* u298 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x4a>; + shunt-resistor = <1000>; /* R33014 */ + }; + + vcc_fmc_ina: power-monitor@4b { /* u296 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x4b>; + shunt-resistor = <1000>; /* R33008 */ + }; + + gtm_avcc_ina: power-monitor@4c { /* u299 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x4c>; + shunt-resistor = <1000>; /* R33017 */ + }; + + gtm_avtt_ina: power-monitor@4d { /* u300 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x4d>; + shunt-resistor = <1000>; /* R33020 */ + }; + + gtm_avccaux_ina: power-monitor@4e { /* u301 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x4e>; + shunt-resistor = <1000>; /* R33023 */ + }; + + vcc_mipi_ina: power-monitor@4f { /* u297 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x4f>; + shunt-resistor = <1000>; /* R33011 */ + }; + + /* pmbus - j105 - disable main PMBUS - also going to j102 connector */ + vcc_pslp: regulator@15 { /* u24 */ + compatible = "ti,tps546b24a"; + reg = <0x15>; + }; + + vccaux_pmc: regulator@17 { /* u26 */ + compatible = "ti,tps546b24a"; + reg = <0x17>; + }; + + vcco_500: regulator@18 { /* u27 */ + compatible = "ti,tps546b24a"; + reg = <0x18>; + }; + + vcco_501: regulator@19 { /* u28 */ + compatible = "ti,tps546b24a"; + reg = <0x19>; + }; + + vcco_502: regulator@1a { /* u29 */ + compatible = "ti,tps546b24a"; + reg = <0x1a>; + }; + + vcco_503: regulator@1b { /* u30 */ + compatible = "ti,tps546b24a"; + reg = <0x1b>; + }; + + vcc_ddr5_rdimm: regulator@1c { /* u31 */ + compatible = "ti,tps546b24a"; + reg = <0x1c>; + }; + + gtm_avcc: regulator@22 { /* u37 */ + compatible = "ti,tps546b24a"; + reg = <0x22>; + }; + + gtm_avtt: regulator@20 { /* u38 */ + compatible = "ti,tps546b24a"; + reg = <0x20>; + }; + + gtm_avccaux: regulator@21 { /* u39 */ + compatible = "ti,tps546b24a"; + reg = <0x21>; + }; + + vccint_gt: regulator@2a { /* u44 */ + compatible = "ti,tps546b24a"; + reg = <0x2a>; + }; + + util_1v8: regulator@2b { /* u1839 */ + compatible = "ti,tps546b24a"; + reg = <0x2b>; + }; + + vcc_pmc: regulator@2c { /* u46 */ + compatible = "ti,tps546b24a"; + reg = <0x2c>; + }; + + /* pmbus via U62 as ext_pmbus - disable via j104 */ + vccint: regulator@10 { /* u18 */ + compatible = "ti,tps546b24"; + reg = <0x10>; + }; + + vccsoc: regulator@11 { /* u20 */ + compatible = "ti,tps546b24"; + reg = <0x11>; + }; + + vcc_io: regulator@12 { /* u21 */ + compatible = "ti,tps546b24"; + reg = <0x12>; + }; + + vcc_psfp: regulator@13 { /* u22 */ + compatible = "ti,tps546b24"; + reg = <0x13>; + }; + + vcc_ram: regulator@14 { /* u23 */ + compatible = "ti,tps546b24"; + reg = <0x14>; + }; + + vccaux: regulator@16 { /* u25 */ + compatible = "ti,tps546b24"; + reg = <0x16>; + }; + + lp5_1v0: regulator@1d { /* u32 */ + compatible = "ti,tps546b24"; + reg = <0x1d>; + }; + + vcc_fmc: regulator@1e { /* u33 */ + compatible = "ti,tps546b24"; + reg = <0x1e>; + }; + + lp5_vdd1: regulator@25 { /* u40 */ + compatible = "ti,tps546b24"; + reg = <0x25>; + }; + + lp5_vdd2: regulator@26 { /* u41 */ + compatible = "ti,tps546b24"; + reg = <0x26>; + }; + + lp5_vddq: regulator@27 { /* u42 */ + compatible = "ti,tps546b24"; + reg = <0x27>; + }; + + vcco_hdio: regulator@29 { /* u43 */ + compatible = "ti,tps546b24"; + reg = <0x29>; + }; + + vcc_mipi: regulator@1f { /* u47 */ + compatible = "ti,tps546b24"; + reg = <0x1f>; + }; + + /* connected via J425 connector + ucd90320: power-sequencer@73 { // u16 + compatible = "ti,ucd90320"; + reg = <0x73>; + };*/ +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-sc-vn-p-b2197-00-revA.dtso +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-sc-vn-p-b2197-00-revA.dtso @@ -0,0 +1,496 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP VN-P-B2197-00 (Tenzing2) + * + * Copyright (C) 2022 - 2023, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +#include + +/dts-v1/; +/plugin/; + +&{/} { + #address-cells = <2>; + #size-cells = <2>; + + compatible = "xlnx,zynqmp-sc-vn-p-b2197-revA", + "xlnx,zynqmp-sc-vn-p-b2197", "xlnx,zynqmp"; + + aliases { + nvmem1 = &x_prc_eeprom; + }; + + sys_clk_0 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&qsfp56g_0_clk 0>; + }; + sys_clk_1 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&qsfp56g_1_clk 0>; + }; + sys_clk_2 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&lpddr5_c0_clk 0>; + }; + sys_clk_3 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&lpddr5_c2_clk 0>; + }; + sys_clk_4 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&ddr5_udimm_clk 0>; + }; + sys_clk_5 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&ps_refclk 0>; + }; + sys_clk_6 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&ddr4_clk 0>; + }; + + ina226-u1700 { + compatible = "iio-hwmon"; + io-channels = <&vcc_ram_ina 0>, <&vcc_ram_ina 1>, <&vcc_ram_ina 2>; + }; + ina226-u1732 { + compatible = "iio-hwmon"; + io-channels = <&vcc_lpd_ina 0>, <&vcc_lpd_ina 1>, <&vcc_lpd_ina 2>; + }; + ina226-u1733 { + compatible = "iio-hwmon"; + io-channels = <&vccaux_ina 0>, <&vccaux_ina 1>, <&vccaux_ina 2>; + }; + ina226-u1736 { + compatible = "iio-hwmon"; + io-channels = <&vccaux_lpd_ina 0>, <&vccaux_lpd_ina 1>, <&vccaux_lpd_ina 2>; + }; + ina226-u1737 { + compatible = "iio-hwmon"; + io-channels = <&vcco_500_ina 0>, <&vcco_500_ina 1>, <&vcco_500_ina 2>; + }; + ina226-u1739 { + compatible = "iio-hwmon"; + io-channels = <&vcco_501_ina 0>, <&vcco_501_ina 1>, <&vcco_501_ina 2>; + }; + ina226-u1741 { + compatible = "iio-hwmon"; + io-channels = <&vcco_502_ina 0>, <&vcco_502_ina 1>, <&vcco_502_ina 2>; + }; + ina226-u1743 { + compatible = "iio-hwmon"; + io-channels = <&vcco_503_ina 0>, <&vcco_503_ina 1>, <&vcco_503_ina 2>; + }; + ina226-u1745 { + compatible = "iio-hwmon"; + io-channels = <&vcco_700_ina 0>, <&vcco_700_ina 1>, <&vcco_700_ina 2>; + }; + ina226-u1747 { + compatible = "iio-hwmon"; + io-channels = <&vcco_706_ina 0>, <&vcco_706_ina 1>, <&vcco_706_ina 2>; + }; + ina226-u1750 { + compatible = "iio-hwmon"; + io-channels = <>yp_avcc_ina 0>, <>yp_avcc_ina 1>, <>yp_avcc_ina 2>; + }; + ina226-u1752 { + compatible = "iio-hwmon"; + io-channels = <>yp_avtt_ina 0>, <>yp_avtt_ina 1>, <>yp_avtt_ina 2>; + }; + ina226-u1754 { + compatible = "iio-hwmon"; + io-channels = <>yp_avccaux_ina 0>, <>yp_avccaux_ina 1>, <>yp_avccaux_ina 2>; + }; + ina226-u1756 { + compatible = "iio-hwmon"; + io-channels = <>m_avcc_ina 0>, <>m_avcc_ina 1>, <>m_avcc_ina 2>; + }; + ina226-u1758 { + compatible = "iio-hwmon"; + io-channels = <>m_avtt_ina 0>, <>m_avtt_ina 1>, <>m_avtt_ina 2>; + }; + ina226-u1760 { + compatible = "iio-hwmon"; + io-channels = <>m_avccaux_ina 0>, <>m_avccaux_ina 1>, <>m_avccaux_ina 2>; + }; + + /* sc_vpk180_axi_iic_0_0: i2c@80050000 - UNUSED NOW */ /* SI5332 */ + + /* Connect to J212G pin G29/G30 - sysmon connector */ + /* sc_vpk180_axi_iic_1_0: i2c@80060000 */ /* SYSMON */ + + /* FIXME Fan control via u1702 - max6643 and mux via J1703 - not SW controllable - via EMIO */ +}; + +&i2c1 { + #address-cells = <1>; + #size-cells = <0>; + + /* u97 eeprom at 0x54 described in sc-revB - WP protection via BOARD_EEPROM_WP - J1801 */ + /* DC/SE eeprom at 0x52 */ + x_prc_eeprom: eeprom@52 { /* u4 - DC card identification - possible WP */ + compatible = "atmel,24c02"; + reg = <0x52>; + bootph-all; + }; + + x_prc_tca9534: gpio@22 { /* u5 */ + compatible = "nxp,pca9534"; + reg = <0x22>; + gpio-controller; /* IRQ not connected */ + #gpio-cells = <2>; + gpio-line-names = "xprc_sw_1", "xprc_sw_2", "xprc_sw_3", "xprc_sw_4", + "", "", "", ""; + gtr-sel0 { + gpio-hog; + gpios = <0 0>; + input; /* FIXME add meaning */ + line-name = "xprc_sw_1"; + }; + gtr-sel1 { + gpio-hog; + gpios = <1 0>; + input; /* FIXME add meaning */ + line-name = "xprc_sw_1"; + }; + gtr-sel2 { + gpio-hog; + gpios = <2 0>; + input; /* FIXME add meaning */ + line-name = "xprc_sw_1"; + }; + gtr-sel3 { + gpio-hog; + gpios = <3 0>; + input; /* FIXME add meaning */ + line-name = "xprc_sw_1"; + }; + }; + + /* FMC eeproms at 0x50/0x51 */ + /* via j3/j5 to 0x68 to u32/9FGV1006C + + /* i2c_main_1 - u147 - j157 - disable translation, add 8 */ + /* J1 - OE for u43@55 + 8 - 161,132813MHz - QSFP56G_0 */ + qsfp56g_0_clk: clock-controller@5d { + compatible = "renesas,proxo-xp"; + reg = <0x5d>; + #clock-cells = <0>; + clock-output-names = "qsfp56g_0_clk"; + }; + + /* J2 - OE for u41@57 + 8 - 322,265625MHz - QSFP56G_1 */ + qsfp56g_1_clk: clock-controller@5f { + compatible = "renesas,proxo-xp"; + reg = <0x5f>; + #clock-cells = <0>; + clock-output-names = "qsfp56g_1_clk"; + }; + + /* J81 - OE for u115@50 + 8 - 320MHz - LPDDR5_C0 */ + lpddr5_c0_clk: clock-controller@58 { + compatible = "renesas,proxo-xp"; + reg = <0x58>; + #clock-cells = <0>; + clock-output-names = "lpddr5_c0_clk"; + }; + + /* i2c_main_2 - u148 - j122 - disable translation, add 9 */ + /* J112 - OE for u63@50 + 9 - 320MHz - LPDDR5_C2 */ + lpddr5_c2_clk: clock-controller@59 { + compatible = "renesas,proxo-xp"; + reg = <0x59>; + #clock-cells = <0>; + clock-output-names = "lpddr5_c2_clk"; + }; + + /* i2c_main_3 - u149 - j154 - disable translation, add 6 */ + /* J78 - OE for u116@50 + 6 - 320MHz - DDR5_UDIMM */ + ddr5_udimm_clk: clock-controller@56 { + compatible = "renesas,proxo-xp"; + reg = <0x56>; + #clock-cells = <0>; + clock-output-names = "ddr5_udimm_clk"; + }; + + /* i2c_main_4 - u150 - j146 - disable translation, add 5 */ + /* J107 - OE for u39@50 + 5 - 33,3333MHz - PS_REFCLK */ + ps_refclk: clock-controller@55 { + compatible = "renesas,proxo-xp"; + reg = <0x55>; + #clock-cells = <0>; + clock-output-names = "ps_refclk"; + }; + + /* i2c_main_5 - u1782 - j1798 - disable translation, add 7 */ + /* J77 - OE for u1783@50 + 7 - 320MHz - DDR4 */ + ddr4_clk: clock-controller@57 { + compatible = "renesas,proxo-xp"; + reg = <0x57>; + #clock-cells = <0>; + clock-output-names = "ddr4_clk"; + }; + + /* LTC4316 - not wired XORH/XORL - FIXME */ + /* J3 gate - FIXME should be connected for SW handling */ + /* i2c_main_1 bus */ + i2c1_u32: clock-controller@68 { + compatible = "renesas,9fgv1006"; + reg = <0x68>; + }; + + /* J71 - selection to LP_I2C_SCL_J or LP_I2C_PMC_SCL_J */ + /* J70 - selection to LP_I2C_SDA_J or LP_I2C_PMC_SDA_J */ + /* this should be SW controlable too */ +}; + +&i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + /* Via j11/j12 can also go to u17/IML3112 - 1:2 multiplexer - also accessed from Versal NET */ + /* Connection DDR5_UDIMM - SPD can be from 0x50-0x57 */ + /* FIXME gpio should handle SYSCTLR_PMBUS_ALERT and also INA226_PMBUS_ALERT */ + + /* ina226_pmbus - J55 - disable INA226_PMBUS */ + vcc_ram_ina: power-monitor@40 { /* u1700 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x40>; + shunt-resistor = <1000>; /* R1996 */ + }; + + vcc_lpd_ina: power-monitor@41 { /* u1732 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x41>; + shunt-resistor = <1000>; /* R2017 */ + }; + + vccaux_ina: power-monitor@42 { /* u1733 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x42>; + shunt-resistor = <1000>; /* R2037 */ + }; + + vccaux_lpd_ina: power-monitor@43 { /* u1736 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x43>; + shunt-resistor = <1000>; /* R2057 */ + }; + + vcco_500_ina: power-monitor@44 { /* u1737 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x44>; + shunt-resistor = <1000>; /* R2069 */ + }; + + vcco_501_ina: power-monitor@45 { /* u1739 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x45>; + shunt-resistor = <1000>; /* R2089 */ + }; + + vcco_502_ina: power-monitor@46 { /* u1741 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x46>; + shunt-resistor = <1000>; /* R2108 */ + }; + + vcco_503_ina: power-monitor@47 { /* u1743 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x47>; + shunt-resistor = <1000>; /* R2127 */ + }; + + vcco_700_ina: power-monitor@48 { /* u1745 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x48>; + shunt-resistor = <1000>; /* R2154 */ + }; + + vcco_706_ina: power-monitor@49 { /* u1747 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x49>; + shunt-resistor = <1000>; /* R2175 */ + }; + + gtyp_avcc_ina: power-monitor@4a { /* u1750 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x4a>; + shunt-resistor = <1000>; /* R2195 */ + }; + + gtyp_avtt_ina: power-monitor@4b { /* u1752 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x4b>; + shunt-resistor = <1000>; /* R2215 */ + }; + + gtyp_avccaux_ina: power-monitor@4c { /* u1754 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x4c>; + shunt-resistor = <5000>; /* R2235 */ + }; + + gtm_avcc_ina: power-monitor@4d { /* u1756 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x4d>; + shunt-resistor = <1000>; /* R2256 */ + }; + + gtm_avtt_ina: power-monitor@4e { /* u1758 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x4e>; + shunt-resistor = <1000>; /* R2276 */ + }; + + gtm_avccaux_ina: power-monitor@4f { /* u1760 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + reg = <0x4f>; + shunt-resistor = <5000>; /* R2296 */ + }; + + /* pmbus - J50 - disable main PMBUS - also going to j132 */ + vcc_ram: regulator@a { /* u1730 */ + compatible = "ti,tps544b25"; + reg = <0xa>; + }; + + vcc_lpd: regulator@b { /* u1731 */ + compatible = "ti,tps544b25"; + reg = <0xb>; + }; + + vccaux: regulator@1a { /* u1734 */ + compatible = "ti,tps544b25"; + reg = <0x1a>; + }; + + vcco_503: regulator@12 { /* u1744 */ + compatible = "ti,tps546b24a"; + reg = <0x12>; + }; + + vcco_700: regulator@16 { /* u1746 */ + compatible = "ti,tps544b25"; + reg = <0x16>; + }; + + vcco_706: regulator@17 { /* u1748 */ + compatible = "ti,tps544b25"; + reg = <0x17>; + }; + + gtm_avcc: regulator@23 { /* u1755 */ + compatible = "ti,tps544b25"; + reg = <0x23>; + }; + + gtm_avtt: regulator@24 { /* u1757 */ + compatible = "ti,tps544b25"; + reg = <0x24>; + }; + + gtm_avccaux: regulator@25 { /* u1759 */ + compatible = "ti,tps544b25"; + reg = <0x25>; + }; + + util_1v8: regulator@15 { /* u1765 */ + compatible = "ti,tps544b25"; + reg = <0x15>; + }; + + ucd90320: power-sequencer@73 { /* u1768 */ + compatible = "ti,ucd90320"; + reg = <0x73>; + }; + + /* EXT_PMBUS main - J10 - disable extended PMBUS */ + vccint: tps53681@60 { /* u1712 - J1770 reset jumper */ + compatible = "ti,tps53681", "ti,tps53679"; + reg = <0x60>; + /* vccint, vcc_cpm5n */ + }; + + vcc_io_soc: tps53681@61 { /* u1721 - J1772 reset jumper */ + compatible = "ti,tps53681", "ti,tps53679"; + reg = <0x61>; + /* vcc_io_soc, vcc_fpd */ + }; + + vccaux_lpd: regulator@d { /* u1735 */ + compatible = "ti,tps544b25"; + reg = <0xd>; + }; + + vcco_500: regulator@13 { /* u1738 */ + compatible = "ti,tps546b24a"; + reg = <0x13>; + }; + + vcco_501: regulator@10 { /* u1740 */ + compatible = "ti,tps546b24a"; + reg = <0x10>; + }; + + vcco_502: regulator@11 { /* u1742 */ + compatible = "ti,tps546b24a"; + reg = <0x11>; + }; + + gtyp_avcc: regulator@20 { /* u1749 */ + compatible = "ti,tps544b25"; + reg = <0x20>; + }; + + gtyp_avtt: regulator@21 { /* u1751 */ + compatible = "ti,tps544b25"; + reg = <0x21>; + }; + + gtyp_avccaux: regulator@22 { /* u1753 */ + compatible = "ti,tps544b25"; + reg = <0x22>; + }; + + lp5_vdd1_1v8: regulator@e { /* u1761 - FIXME no ina226 */ + compatible = "ti,tps544b25"; + reg = <0xe>; + }; + + lp5_vdd2_1v05: regulator@f { /* u1762 - FIXME no ina226 */ + compatible = "ti,tps544b25"; + reg = <0xf>; + }; + + lp5_vddq_0v5: regulator@14 { /* u1763 - FIXME no ina226 */ + compatible = "ti,tps546b24a"; + reg = <0x14>; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-sc-vpk120-revB.dtso +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-sc-vpk120-revB.dtso @@ -0,0 +1,355 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP VPK120 revB + * + * (C) Copyright 2021 - 2022, Xilinx, Inc. + * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +#include + +/dts-v1/; +/plugin/; + +&{/} { + compatible = "xlnx,zynqmp-sc-vpk120-revB", "xlnx,zynqmp-vpk120-revB", + "xlnx,zynqmp-vpk120", "xlnx,zynqmp"; + + si570_user1_fmc_clk: si570-user1-fmc-clk { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&user_si570_1>; + }; + + si570_ref_clk: si570-ref-clk { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&ref_clk>; + }; + + si570_lpddr4_clk3: si570-lpddr4-clk3 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&lpddr4_clk3>; + }; + + si570_lpddr4_clk2: si570-lpddr4-clk2 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&lpddr4_clk2>; + }; + + si570_lpddr4_clk1: si570-lpddr4-clk1 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&lpddr4_clk1>; + }; +}; + +&i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + tca6416_u233: gpio@20 { /* u233 */ + compatible = "ti,tca6416"; + reg = <0x20>; + gpio-controller; /* interrupt not connected */ + #gpio-cells = <2>; + gpio-line-names = "", "", "QSFPDD1_MODSELL", "QSFPDD2_MODSELL", /* 0 - 3 */ + "PMBUS2_INA226_ALERT", "", "", "", /* 4 - 7 */ + "FMCP1_FMC_PRSNT_M2C_B", "", "FMCP1_FMCP_PRSNT_M2C_B", "", /* 10 - 13 */ + "VCCINT_VRHOT_B", "8A34001_EXP_RST_B", "PMBUS_ALERT", "PMBUS1_INA226_ALERT"; /* 14 - 17 */ + }; + + i2c-mux@74 { /* u33 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + /* reset-gpios = <&gpio SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */ + pmbus_i2c: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* On connector J325 */ + ir38060_41: regulator@41 { /* IR38060 - u259 */ + compatible = "infineon,ir38060", "infineon,ir38064"; + reg = <0x41>; /* i2c addr 0x11 */ + }; + ir38164_43: regulator@43 { /* IR38164 - u13 */ + compatible = "infineon,ir38164"; + reg = <0x43>; /* i2c addr 0x13 */ + }; + ir35221_46: pmic@46 { /* IR35221 - u152 */ + compatible = "infineon,ir35221"; + reg = <0x46>; /* i2c addr - 0x16 */ + }; + irps5401_47: pmic5401@47 { /* IRPS5401 - u160 */ + compatible = "infineon,irps5401"; + reg = <0x47>; /* i2c addr 0x17 */ + }; + ir38164_49: regulator@49 { /* IR38164 - u189 */ + compatible = "infineon,ir38164"; + reg = <0x49>; /* i2c addr 0x19 */ + }; + irps5401_4c: pmic@4c { /* IRPS5401 - u167 */ + compatible = "infineon,irps5401"; + reg = <0x4c>; /* i2c addr 0x1c */ + }; + irps5401_4d: pmic@4d { /* IRPS5401 - u175 */ + compatible = "infineon,irps5401"; + reg = <0x4d>; /* i2c addr 0x1d */ + }; + ir38164_4e: regulator@4e { /* IR38164 - u185 */ + compatible = "infineon,ir38164"; + reg = <0x4e>; /* i2c addr 0x1e */ + }; + ir38164_4f: regulator@4f { /* IR38164 - u187 */ + compatible = "infineon,ir38164"; + reg = <0x4f>; /* i2c addr 0x1f */ + }; + }; + pmbus1_ina226_i2c: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* FIXME check alerts coming to SC */ + vccint: ina226@40 { /* u65 */ + compatible = "ti,ina226"; + reg = <0x40>; + shunt-resistor = <5000>; + }; + vcc_soc: ina226@41 { /* u161 */ + compatible = "ti,ina226"; + reg = <0x41>; + shunt-resistor = <5000>; + }; + vcc_pmc: ina226@42 { /* u163 */ + compatible = "ti,ina226"; + reg = <0x42>; + shunt-resistor = <5000>; + }; + vcc_ram: ina226@43 { /* u5 */ + compatible = "ti,ina226"; + reg = <0x43>; + shunt-resistor = <5000>; + }; + vcc_pslp: ina226@44 { /* u165 */ + compatible = "ti,ina226"; + reg = <0x44>; + shunt-resistor = <5000>; + }; + vcc_psfp: ina226@45 { /* u164 */ + compatible = "ti,ina226"; + reg = <0x45>; + shunt-resistor = <5000>; + }; + }; + i2c@2 { /* NC */ /* FIXME maybe remove */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + pmbus2_ina226_i2c: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* FIXME check alerts coming to SC */ + vccaux: ina226@40 { /* u166 */ + compatible = "ti,ina226"; + reg = <0x40>; + shunt-resistor = <5000>; + }; + vccaux_pmc: ina226@41 { /* u168 */ + compatible = "ti,ina226"; + reg = <0x41>; + shunt-resistor = <5000>; + }; + mgtavcc: ina226@42 { /* u265 */ + compatible = "ti,ina226"; + reg = <0x42>; + shunt-resistor = <5000>; + }; + vcc1v5: ina226@43 { /* u264 */ + compatible = "ti,ina226"; + reg = <0x43>; + shunt-resistor = <5000>; + }; + vcco_mio: ina226@45 { /* u172 */ + compatible = "ti,ina226"; + reg = <0x45>; + shunt-resistor = <5000>; + }; + mgtavtt: ina226@46 { /* u188 */ + compatible = "ti,ina226"; + reg = <0x46>; + shunt-resistor = <2000>; + }; + vcco_502: ina226@47 { /* u174 */ + compatible = "ti,ina226"; + reg = <0x47>; + shunt-resistor = <5000>; + }; + mgtvccaux: ina226@48 { /* u176 */ + compatible = "ti,ina226"; + reg = <0x48>; + shunt-resistor = <5000>; + }; + vcc1v1_lp4: ina226@49 { /* u186 */ + compatible = "ti,ina226"; + reg = <0x49>; + shunt-resistor = <2000>; + }; + vadj_fmc: ina226@4a { /* u184 */ + compatible = "ti,ina226"; + reg = <0x4a>; + shunt-resistor = <2000>; + }; + lpdmgtyavcc: ina226@4b { /* u177 */ + compatible = "ti,ina226"; + reg = <0x4b>; + shunt-resistor = <5000>; + }; + lpdmgtyavtt: ina226@4c { /* u260 */ + compatible = "ti,ina226"; + reg = <0x4c>; + shunt-resistor = <2000>; + }; + lpdmgtyvccaux: ina226@4d { /* u234 */ + compatible = "ti,ina226"; + reg = <0x4d>; + shunt-resistor = <5000>; + }; + }; + i2c@4 { /* NC */ + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + }; + i2c@5 { /* NC */ + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + }; + user_si570: i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + user_si570_1: clock-generator@5f { /* USER C0 SI570 - u205 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5f>; + temperature-stability = <50>; + factory-fout = <100000000>; + clock-frequency = <100000000>; + clock-output-names = "fmc_si570"; + silabs,skip-recall; + }; + + }; + /* 7 unused */ + }; +}; + +&i2c1 { + #address-cells = <1>; + #size-cells = <0>; + + i2c-mux@74 { /* u35 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + /* reset-gpios = <&gpio SYSCTLR_IIC_MUX1_RESET_B GPIO_ACTIVE_HIGH>; */ + ref_clk_i2c: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + ref_clk: clock-generator@5d { /* u32 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; + temperature-stability = <50>; + factory-fout = <33333333>; + clock-frequency = <33333333>; + clock-output-names = "ref_clk"; + silabs,skip-recall; + }; + }; + fmcp1_i2c: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* FIXME connection to Samtec J51C */ + /* expected eeprom 0x50 SE cards */ + }; + i2c@2 { /* NC - FIXME */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + lpddr4_si570_clk3_i2c: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + lpddr4_clk3: clock-generator@60 { /* u4 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x60>; + temperature-stability = <50>; + factory-fout = <200000000>; + clock-frequency = <200000000>; + clock-output-names = "lpddr4_clk3"; + silabs,skip-recall; + }; + }; + lpddr4_si570_clk2_i2c: i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + lpddr4_clk2: clock-generator@60 { /* u3 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x60>; + temperature-stability = <50>; + factory-fout = <200000000>; + clock-frequency = <200000000>; + clock-output-names = "lpddr4_clk2"; + silabs,skip-recall; + }; + }; + lpddr4_si570_clk1_i2c: i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + lpddr4_clk1: clock-generator@60 { /* u248 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x60>; + temperature-stability = <50>; + factory-fout = <200000000>; + clock-frequency = <200000000>; + clock-output-names = "lpddr4_clk1"; + silabs,skip-recall; + }; + }; + qsfpdd_i2c: i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + /* J1/J2 connectors */ + }; + idt8a34001_i2c: i2c@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + /* Via J310 connector */ + idt_8a34001: phc@5b { + compatible = "idt,8a34001"; /* u219B */ + reg = <0x5b>; /* FIXME not in schematics */ + }; + }; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-sc-vpk180-revA.dtso +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-sc-vpk180-revA.dtso @@ -0,0 +1,496 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP VPK180 revA + * + * (C) Copyright 2021 - 2022, Xilinx, Inc. + * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +#include + +/dts-v1/; +/plugin/; + +&{/} { + compatible = "xlnx,zynqmp-sc-vpk180-revA", "xlnx,zynqmp-vpk180-revA", + "xlnx,zynqmp-vpk180", "xlnx,zynqmp"; + + si570_ref_clk: si570-ref-clk { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&ref_clk>; + }; + + si570_lpddr4_clk3: si570-lpddr4-clk3 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&lpddr4_clk3>; + }; + + si570_lpddr4_clk2: si570-lpddr4-clk2 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&lpddr4_clk2>; + }; + + si570_lpddr4_clk1: si570-lpddr4-clk1 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&lpddr4_clk1>; + }; + + vc7_xin: vc7-xin { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <50000000>; + }; + + gtclk1_out0: gtclk1-out0 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_1 0>; + }; + + gtclk1_out1: gtclk1-out1 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_1 1>; + }; + + gtclk1_out2: gtclk1-out2 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_1 2>; + }; + + gtclk1_out3: gtclk1-out3 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_1 3>; + }; + + gtclk1_out4: gtclk1-out4 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_1 4>; + }; + + gtclk1_out5: gtclk1-out5 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_1 5>; + }; + + gtclk1_out6: gtclk1-out6 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_1 6>; + }; + + gtclk1_out7: gtclk1-out7 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_1 7>; + }; + + gtclk2_out0: gtclk2-out0 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_2 0>; + }; + + gtclk2_out1: gtclk2-out1 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_2 1>; + }; + + gtclk2_out2: gtclk2-out2 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_2 2>; + }; + + gtclk2_out3: gtclk2-out3 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_2 3>; + }; + + gtclk2_out4: gtclk2-out4 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_2 4>; + }; + + gtclk2_out5: gtclk2-out5 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_2 5>; + }; + + gtclk2_out6: gtclk2-out6 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_2 6>; + }; + + gtclk2_out7: gtclk2-out7 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_2 7>; + }; +}; + +&i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + tca6416_u233: gpio@20 { /* u233 */ + compatible = "ti,tca6416"; + reg = <0x20>; + gpio-controller; /* interrupt not connected */ + #gpio-cells = <2>; + gpio-line-names = "QSFPDD1_MODSELL", "QSFPDD2_MODSELL", "QSFPDD3_MODSELL", "QSFPDD4_MODSELL", /* 0 - 3 */ + "PMBUS2_INA226_ALERT", "QSFPDD5_MODSELL", "QSFPDD6_MODSELL", "", /* 4 - 7 */ + "FMCP1_FMC_PRSNT_M2C_B", "", "FMCP1_FMCP_PRSNT_M2C_B", "UTIL_3V3_VRHOT_B", /* 10 - 13 */ + "VCCINT_VRHOT_B", "8A34001_EXP_RST_B", "PMBUS_ALERT", "PMBUS1_INA226_ALERT"; /* 14 - 17 */ + }; + + i2c-mux@74 { /* u33 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + /* reset-gpios = <&gpio SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */ + pmbus_i2c: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* On connector J325 */ + ir38060_41: regulator@41 { /* IR38060 - u259 */ + compatible = "infineon,ir38060", "infineon,ir38064"; + reg = <0x41>; /* i2c addr 0x11 */ + }; + ir35221_45: pmic@45 { /* IR35221 - u291 */ + compatible = "infineon,ir35221"; + reg = <0x45>; /* i2c addr - 0x15 */ + }; + ir35221_46: pmic@46 { /* IR35221 - u152 */ + compatible = "infineon,ir35221"; + reg = <0x46>; /* i2c addr - 0x16 */ + }; + irps5401_47: pmic5401@47 { /* IRPS5401 - u160 */ + compatible = "infineon,irps5401"; + reg = <0x47>; /* i2c addr 0x17 */ + }; + irps5401_48: pmic@48 { /* IRPS5401 - u295 */ + compatible = "infineon,irps5401"; + reg = <0x48>; /* i2c addr 0x18 */ + }; + ir38164_49: regulator@49 { /* IR38164 - u189 */ + compatible = "infineon,ir38164"; + reg = <0x49>; /* i2c addr 0x19 */ + }; + irps5401_4c: pmic@4c { /* IRPS5401 - u167 */ + compatible = "infineon,irps5401"; + reg = <0x4c>; /* i2c addr 0x1c */ + }; + irps5401_4d: pmic@4d { /* IRPS5401 - u175 */ + compatible = "infineon,irps5401"; + reg = <0x4d>; /* i2c addr 0x1d */ + }; + ir38164_4e: regulator@4e { /* IR38164 - u185 */ + compatible = "infineon,ir38164"; + reg = <0x4e>; /* i2c addr 0x1e */ + }; + ir38164_4f: regulator@4f { /* IR38164 - u187 */ + compatible = "infineon,ir38164"; + reg = <0x4f>; /* i2c addr 0x1f */ + }; + }; + pmbus1_ina226_i2c: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* FIXME check alerts coming to SC */ + vccint: ina226@40 { /* u65 */ + compatible = "ti,ina226"; + reg = <0x40>; + shunt-resistor = <5000>; /* r440 */ + }; + vcc_soc: ina226@41 { /* u161 */ + compatible = "ti,ina226"; + reg = <0x41>; + shunt-resistor = <5000>; /* r2174 */ + }; + vcc_pmc: ina226@42 { /* u163 */ + compatible = "ti,ina226"; + reg = <0x42>; + shunt-resistor = <5000>; /* r1214 */ + }; + vcc_ram: ina226@43 { /* u5 */ + compatible = "ti,ina226"; + reg = <0x43>; + shunt-resistor = <5000>; /* r2108 */ + }; + vcc_pslp: ina226@44 { /* u165 */ + compatible = "ti,ina226"; + reg = <0x44>; + shunt-resistor = <5000>; /* r1830 */ + }; + vcc_psfp: ina226@45 { /* u164 */ + compatible = "ti,ina226"; + reg = <0x45>; + shunt-resistor = <5000>; /* r2086 */ + }; + }; + i2c@2 { /* NC */ /* FIXME maybe remove */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + pmbus2_ina226_i2c: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* FIXME check alerts coming to SC */ + vccaux: ina226@40 { /* u166 */ + compatible = "ti,ina226"; + reg = <0x40>; + shunt-resistor = <2000>; /* r2109 */ + }; + vccaux_pmc: ina226@41 { /* u168 */ + compatible = "ti,ina226"; + reg = <0x41>; + shunt-resistor = <5000>; /* r1246 */ + }; + mgtavcc: ina226@42 { /* u265 */ + compatible = "ti,ina226"; + reg = <0x42>; + shunt-resistor = <5000>; /* r1829 */ + }; + vcc1v5: ina226@43 { /* u264 */ + compatible = "ti,ina226"; + reg = <0x43>; + shunt-resistor = <5000>; /* r1221 */ + }; + vcco_mio: ina226@45 { /* u172 */ + compatible = "ti,ina226"; + reg = <0x45>; + shunt-resistor = <5000>; /* r1219 */ + }; + mgtavtt: ina226@46 { /* u188 */ + compatible = "ti,ina226"; + reg = <0x46>; + shunt-resistor = <2000>; /* r1384 */ + }; + vcco_502: ina226@47 { /* u174 */ + compatible = "ti,ina226"; + reg = <0x47>; + shunt-resistor = <5000>; /* r1825 */ + }; + mgtvccaux: ina226@48 { /* u176 */ + compatible = "ti,ina226"; + reg = <0x48>; + shunt-resistor = <5000>; /* r1232 */ + }; + vcc1v1_lp4: ina226@49 { /* u186 */ + compatible = "ti,ina226"; + reg = <0x49>; + shunt-resistor = <2000>; /* r1367 */ + }; + vadj_fmc: ina226@4a { /* u184 */ + compatible = "ti,ina226"; + reg = <0x4a>; + shunt-resistor = <2000>; /* r1350 */ + }; + lpdmgtyavcc: ina226@4b { /* u177 */ + compatible = "ti,ina226"; + reg = <0x4b>; + shunt-resistor = <5000>; /* r2097 */ + }; + lpdmgtyavtt: ina226@4c { /* u260 */ + compatible = "ti,ina226"; + reg = <0x4c>; + shunt-resistor = <2000>; /* r1834 */ + }; + lpdmgtyvccaux: ina226@4d { /* u234 */ + compatible = "ti,ina226"; + reg = <0x4d>; + shunt-resistor = <5000>; /* r1679 */ + }; + }; + /* 4 - 7 unused */ + }; +}; + +&i2c1 { + #address-cells = <1>; + #size-cells = <0>; + + i2c-mux@74 { /* u35 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + i2c-mux-idle-disconnect; + /* reset-gpios = <&PL_GPIO SYSCTLR_IIC_MUX1_RESET_B GPIO_ACTIVE_HIGH>; */ + ref_clk_i2c: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + ref_clk: clock-generator@5d { /* u32 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; + temperature-stability = <50>; + factory-fout = <33333333>; + clock-frequency = <33333333>; + clock-output-names = "ref_clk"; + silabs,skip-recall; + }; + }; + fmcp1_i2c: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* connection to Samtec J51C */ + /* expected eeprom 0x50 SE cards */ + }; + osfp_i2c: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* J362 connector */ + }; + lpddr4_si570_clk3_i2c: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + lpddr4_clk3: clock-generator@60 { /* u4 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x60>; + temperature-stability = <50>; + factory-fout = <200000000>; + clock-frequency = <200000000>; + clock-output-names = "lpddr4_clk3"; + silabs,skip-recall; + }; + /* alternative option DNP - u305 at 0x50 */ + }; + lpddr4_si570_clk2_i2c: i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + lpddr4_clk2: clock-generator@60 { /* u3 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x60>; + temperature-stability = <50>; + factory-fout = <200000000>; + clock-frequency = <200000000>; + clock-output-names = "lpddr4_clk2"; + silabs,skip-recall; + }; + /* alternative option DNP - u303 at 0x50 */ + }; + lpddr4_si570_clk1_i2c: i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + lpddr4_clk1: clock-generator@60 { /* u248 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x60>; + temperature-stability = <50>; + factory-fout = <200000000>; + clock-frequency = <200000000>; + clock-output-names = "lpddr4_clk1"; + silabs,skip-recall; + }; + /* alternative option DNP - u301 at 0x50 */ + }; + qsfpdd_i2c: i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + /* J1/J2/J355/J354/J359/J358 connectors */ + }; + idt8a34001_i2c: i2c@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + /* Via J310 connector */ + idt_8a34001: phc@5b { /* u219B */ + compatible = "idt,8a34001"; + reg = <0x5b>; + }; + }; + }; + i2c-mux@75 { /* u322 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x75>; + i2c-mux-idle-disconnect; + /* reset-gpios = <&PL_GPIO SYSCTLR_IIC_MUX1_RESET_B GPIO_ACTIVE_HIGH>; */ + sfpdd1_i2c: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* J350 sfp-dd at 0x50 */ + }; + sfpdd2_i2c: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* J352 sfp-dd at 0x50 */ + }; + sfpdd3_i2c: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* J385 sfp-dd at 0x50 */ + }; + sfpdd4_i2c: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* J387 sfp-dd at 0x50 */ + }; + rc21008a_gtclk1_i2c: i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + vc7_1: clock-generator@9 { + compatible = "renesas,rc21008a"; + clock-output-names = "rc21008a-0"; + reg = <0x9>; + #clock-cells = <1>; + clocks = <&vc7_xin>; + clock-names = "xin"; + }; + /* u298 - rc21008a at 0x9 */ + /* connector J370 */ + }; + rc21008a_gtclk2_i2c: i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + vc7_2: clock-generator@9 { + compatible = "renesas,rc21008a"; + clock-output-names = "rc21008a-1"; + reg = <0x9>; + #clock-cells = <1>; + clocks = <&vc7_xin>; + clock-names = "xin"; + }; + /* u299 - rc21008a at 0x9 */ + /* connector J371 */ + }; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-sc-vpk180-revB.dtso +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-sc-vpk180-revB.dtso @@ -0,0 +1,432 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP VPK180 revA + * + * (C) Copyright 2021 - 2022, Xilinx, Inc. + * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +#include + +/dts-v1/; +/plugin/; + +&{/} { + compatible = "xlnx,zynqmp-sc-vpk180-revB", "xlnx,zynqmp-vpk180-revB", + "xlnx,zynqmp-vpk180", "xlnx,zynqmp"; + + vc7_xin: vc7-xin { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <50000000>; + }; + + gtclk1_out0: gtclk1-out0 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_1 0>; + }; + + gtclk1_out1: gtclk1-out1 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_1 1>; + }; + + gtclk1_out2: gtclk1-out2 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_1 2>; + }; + + gtclk1_out3: gtclk1-out3 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_1 3>; + }; + + gtclk1_out4: gtclk1-out4 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_1 4>; + }; + + gtclk1_out5: gtclk1-out5 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_1 5>; + }; + + gtclk1_out6: gtclk1-out6 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_1 6>; + }; + + gtclk1_out7: gtclk1-out7 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_1 7>; + }; + + gtclk2_out0: gtclk2-out0 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_2 0>; + }; + + gtclk2_out1: gtclk2-out1 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_2 1>; + }; + + gtclk2_out2: gtclk2-out2 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_2 2>; + }; + + gtclk2_out3: gtclk2-out3 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_2 3>; + }; + + gtclk2_out4: gtclk2-out4 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_2 4>; + }; + + gtclk2_out5: gtclk2-out5 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_2 5>; + }; + + gtclk2_out6: gtclk2-out6 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_2 6>; + }; + + gtclk2_out7: gtclk2-out7 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&vc7_2 7>; + }; +}; + +&i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + tca6416_u233: gpio@20 { /* u233 */ + compatible = "ti,tca6416"; + reg = <0x20>; + gpio-controller; /* interrupt not connected */ + #gpio-cells = <2>; + gpio-line-names = "QSFPDD1_MODSELL", "QSFPDD2_MODSELL", "QSFPDD3_MODSELL", "QSFPDD4_MODSELL", /* 0 - 3 */ + "PMBUS2_INA226_ALERT", "QSFPDD5_MODSELL", "QSFPDD6_MODSELL", "", /* 4 - 7 */ + "FMCP1_FMC_PRSNT_M2C_B", "", "FMCP1_FMCP_PRSNT_M2C_B", "UTIL_3V3_VRHOT_B", /* 10 - 13 */ + "VCCINT_VRHOT_B", "8A34001_EXP_RST_B", "PMBUS_ALERT", "PMBUS1_INA226_ALERT"; /* 14 - 17 */ + }; + + i2c-mux@74 { /* u33 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + /* reset-gpios = <&gpio SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */ + pmbus_i2c: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* On connector J325 */ + ir38060_41: regulator@41 { /* IR38060 - u259 */ + compatible = "infineon,ir38060", "infineon,ir38064"; + reg = <0x41>; /* i2c addr 0x11 */ + }; + ir35221_45: pmic@45 { /* IR35221 - u291 */ + compatible = "infineon,ir35221"; + reg = <0x45>; /* i2c addr - 0x15 */ + }; + ir35221_46: pmic@46 { /* IR35221 - u152 */ + compatible = "infineon,ir35221"; + reg = <0x46>; /* i2c addr - 0x16 */ + }; + irps5401_47: pmic5401@47 { /* IRPS5401 - u160 */ + compatible = "infineon,irps5401"; + reg = <0x47>; /* i2c addr 0x17 */ + }; + irps5401_48: pmic@48 { /* IRPS5401 - u295 */ + compatible = "infineon,irps5401"; + reg = <0x48>; /* i2c addr 0x18 */ + }; + ir38164_49: regulator@49 { /* IR38164 - u189 */ + compatible = "infineon,ir38164"; + reg = <0x49>; /* i2c addr 0x19 */ + }; + irps5401_4c: pmic@4c { /* IRPS5401 - u167 */ + compatible = "infineon,irps5401"; + reg = <0x4c>; /* i2c addr 0x1c */ + }; + irps5401_4d: pmic@4d { /* IRPS5401 - u175 */ + compatible = "infineon,irps5401"; + reg = <0x4d>; /* i2c addr 0x1d */ + }; + ir38164_4e: regulator@4e { /* IR38164 - u185 */ + compatible = "infineon,ir38164"; + reg = <0x4e>; /* i2c addr 0x1e */ + }; + ir38164_4f: regulator@4f { /* IR38164 - u187 */ + compatible = "infineon,ir38164"; + reg = <0x4f>; /* i2c addr 0x1f */ + }; + }; + pmbus1_ina226_i2c: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* FIXME check alerts coming to SC */ + vccint: ina226@40 { /* u65 */ + compatible = "ti,ina226"; + reg = <0x40>; + shunt-resistor = <5000>; /* r440 */ + }; + vcc_soc: ina226@41 { /* u161 */ + compatible = "ti,ina226"; + reg = <0x41>; + shunt-resistor = <5000>; /* r2174 */ + }; + vcc_pmc: ina226@42 { /* u163 */ + compatible = "ti,ina226"; + reg = <0x42>; + shunt-resistor = <5000>; /* r1214 */ + }; + vcc_ram: ina226@43 { /* u5 */ + compatible = "ti,ina226"; + reg = <0x43>; + shunt-resistor = <5000>; /* r2108 */ + }; + vcc_pslp: ina226@44 { /* u165 */ + compatible = "ti,ina226"; + reg = <0x44>; + shunt-resistor = <5000>; /* r1830 */ + }; + vcc_psfp: ina226@45 { /* u164 */ + compatible = "ti,ina226"; + reg = <0x45>; + shunt-resistor = <5000>; /* r2086 */ + }; + }; + i2c@2 { /* NC */ /* FIXME maybe remove */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + pmbus2_ina226_i2c: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* FIXME check alerts coming to SC */ + vccaux: ina226@40 { /* u166 */ + compatible = "ti,ina226"; + reg = <0x40>; + shunt-resistor = <2000>; /* r2109 */ + }; + vccaux_pmc: ina226@41 { /* u168 */ + compatible = "ti,ina226"; + reg = <0x41>; + shunt-resistor = <5000>; /* r1246 */ + }; + mgtavcc: ina226@42 { /* u265 */ + compatible = "ti,ina226"; + reg = <0x42>; + shunt-resistor = <5000>; /* r1829 */ + }; + vcc1v5: ina226@43 { /* u264 */ + compatible = "ti,ina226"; + reg = <0x43>; + shunt-resistor = <5000>; /* r1221 */ + }; + vcco_mio: ina226@45 { /* u172 */ + compatible = "ti,ina226"; + reg = <0x45>; + shunt-resistor = <5000>; /* r1219 */ + }; + mgtavtt: ina226@46 { /* u188 */ + compatible = "ti,ina226"; + reg = <0x46>; + shunt-resistor = <2000>; /* r1384 */ + }; + vcco_502: ina226@47 { /* u174 */ + compatible = "ti,ina226"; + reg = <0x47>; + shunt-resistor = <5000>; /* r1825 */ + }; + mgtvccaux: ina226@48 { /* u176 */ + compatible = "ti,ina226"; + reg = <0x48>; + shunt-resistor = <5000>; /* r1232 */ + }; + vcc1v1_lp4: ina226@49 { /* u186 */ + compatible = "ti,ina226"; + reg = <0x49>; + shunt-resistor = <2000>; /* r1367 */ + }; + vadj_fmc: ina226@4a { /* u184 */ + compatible = "ti,ina226"; + reg = <0x4a>; + shunt-resistor = <2000>; /* r1350 */ + }; + lpdmgtyavcc: ina226@4b { /* u177 */ + compatible = "ti,ina226"; + reg = <0x4b>; + shunt-resistor = <5000>; /* r2097 */ + }; + lpdmgtyavtt: ina226@4c { /* u260 */ + compatible = "ti,ina226"; + reg = <0x4c>; + shunt-resistor = <2000>; /* r1834 */ + }; + lpdmgtyvccaux: ina226@4d { /* u234 */ + compatible = "ti,ina226"; + reg = <0x4d>; + shunt-resistor = <5000>; /* r1679 */ + }; + }; + /* 4 - 7 unused */ + }; +}; + +&i2c1 { + #address-cells = <1>; + #size-cells = <0>; + + i2c-mux@74 { /* u35 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + i2c-mux-idle-disconnect; + /* reset-gpios = <&PL_GPIO SYSCTLR_IIC_MUX1_RESET_B GPIO_ACTIVE_HIGH>; */ + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + fmcp1_i2c: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* connection to Samtec J51C */ + /* expected eeprom 0x50 SE cards */ + }; + osfp_i2c: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* J362 connector */ + }; + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* alternative option DNP - u305 at 0x50 */ + }; + i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + /* alternative option DNP - u303 at 0x50 */ + }; + i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + /* alternative option DNP - u301 at 0x50 */ + }; + qsfpdd_i2c: i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + /* J1/J2/J355/J354/J359/J358 connectors */ + }; + idt8a34001_i2c: i2c@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + /* Via J310 connector */ + idt_8a34001: phc@5b { /* u219B */ + compatible = "idt,8a34001"; + reg = <0x5b>; + }; + }; + }; + i2c-mux@75 { /* u322 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x75>; + i2c-mux-idle-disconnect; + /* reset-gpios = <&PL_GPIO SYSCTLR_IIC_MUX1_RESET_B GPIO_ACTIVE_HIGH>; */ + sfpdd1_i2c: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* J350 sfp-dd at 0x50 */ + }; + sfpdd2_i2c: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* J352 sfp-dd at 0x50 */ + }; + sfpdd3_i2c: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* J385 sfp-dd at 0x50 */ + }; + sfpdd4_i2c: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* J387 sfp-dd at 0x50 */ + }; + rc21008a_gtclk1_i2c: i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + vc7_1: clock-generator@9 { + compatible = "renesas,rc21008a"; + clock-output-names = "rc21008a-0"; + reg = <0x9>; + #clock-cells = <1>; + clocks = <&vc7_xin>; + clock-names = "xin"; + }; + /* u298 - rc21008a at 0x9 */ + /* connector J370 */ + }; + rc21008a_gtclk2_i2c: i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + vc7_2: clock-generator@9 { + compatible = "renesas,rc21008a"; + clock-output-names = "rc21008a-1"; + reg = <0x9>; + #clock-cells = <1>; + clocks = <&vc7_xin>; + clock-names = "xin"; + }; + /* u299 - rc21008a at 0x9 */ + /* connector J371 */ + }; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-sck-kd-g-revA.dtso +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-sck-kd-g-revA.dtso @@ -0,0 +1,391 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for KD240 revA Carrier Card + * + * Copyright (C) 2021 - 2022, Xilinx, Inc. + * Copyright (C) 2022 - 2023, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +#include +#include +#include + +/dts-v1/; +/plugin/; + +&{/} { + compatible = "xlnx,zynqmp-sk-kd240-rev1", + "xlnx,zynqmp-sk-kd240-revB", + "xlnx,zynqmp-sk-kd240-revA", + "xlnx,zynqmp-sk-kd240", "xlnx,zynqmp"; + model = "ZynqMP KD240 revA/B/1"; + + ina260-u3 { + compatible = "iio-hwmon"; + io-channels = <&u3 0>, <&u3 1>, <&u3 2>; + }; + + clk_26: clock2 { /* u17 - USB */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + }; + + clk_25_0: clock4 { /* u92/u91 - GEM2 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; + + clk_25_1: clock5 { /* u92/u91 - GEM3 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; +}; + +&can0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can0_default>; +}; + +&i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */ + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1_default>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + + u3: ina260@40 { /* u3 */ + compatible = "ti,ina260"; + #io-channel-cells = <1>; + label = "ina260-u14"; + reg = <0x40>; + }; + + slg7xl45106: gpio@11 { /* u13 - reset logic */ + compatible = "dlg,slg7xl45106"; + reg = <0x11>; + label = "resetchip"; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "USB0_PHY_RESET_B", "", + "SD_RESET_B", "USB0_HUB_RESET_B", + "", "PS_GEM0_RESET_B", + "", ""; + }; + + hub: usb-hub@2d { /* u36 */ + compatible = "microchip,usb5744"; + reg = <0x2d>; + }; +}; + +/* USB 3.0 */ +&psgtr { + status = "okay"; + /* usb */ + clocks = <&clk_26>; + clock-names = "ref2"; +}; + +&usb0 { /* mio52 - mio63 */ + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb0_default>; + phy-names = "usb3-phy"; + phys = <&psgtr 2 PHY_TYPE_USB3 0 2>; + reset-gpios = <&slg7xl45106 0 GPIO_ACTIVE_LOW>; + assigned-clock-rates = <250000000>, <20000000>; + + usb2244: usb-sd { /* u41 */ + compatible = "microchip,usb2244"; + reset-gpios = <&slg7xl45106 2 GPIO_ACTIVE_LOW>; + }; +}; + +&dwc3_0 { + status = "okay"; + dr_mode = "host"; + snps,usb3_lpm_capable; + maximum-speed = "super-speed"; + #address-cells = <1>; + #size-cells = <0>; + + /* 2.0 hub on port 1 */ + hub_2_0: hub@1 { + compatible = "usb424,2744"; + reg = <1>; + peer-hub = <&hub_3_0>; + i2c-bus = <&hub>; + reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>; + }; + + /* 3.0 hub on port 2 */ + hub_3_0: hub@2 { + compatible = "usb424,5744"; + reg = <2>; + peer-hub = <&hub_2_0>; + i2c-bus = <&hub>; + reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>; + }; +}; + +&gem1 { /* mdio mio50/51 */ + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gem1_default>; + assigned-clock-rates = <250000000>; + + phy-handle = <&phy0>; + phy-mode = "rgmii-id"; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + phy0: ethernet-phy@8 { /* Adin u31 */ + #phy-cells = <1>; + compatible = "ethernet-phy-id0283.bc30"; + reg = <8>; + adi,rx-internal-delay-ps = <2000>; + adi,tx-internal-delay-ps = <2000>; + adi,fifo-depth-bits = <8>; + reset-assert-us = <10>; + reset-deassert-us = <5000>; + reset-gpios = <&gpio 77 GPIO_ACTIVE_LOW>; + }; + }; +}; + +/* 2 more ethernet phys u32@2 and u34@3 */ + +&pinctrl0 { /* required by spec */ + status = "okay"; + + pinctrl_can0_default: can0-default { + mux { + function = "can0"; + groups = "can0_16_grp"; + }; + + conf { + groups = "can0_16_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO66"; + bias-pull-up; + }; + + conf-tx { + pins = "MIO67"; + bias-pull-up; + drive-strength = <4>; + }; + }; + + pinctrl_uart0_default: uart0-default { + conf { + groups = "uart0_17_grp"; + slew-rate = ; + power-source = ; + drive-strength = <12>; + }; + + conf-rx { + pins = "MIO70"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO71"; + bias-disable; + }; + + mux { + groups = "uart0_17_grp"; + function = "uart0"; + }; + }; + + pinctrl_uart1_default: uart1-default { + conf { + groups = "uart1_9_grp"; + slew-rate = ; + power-source = ; + drive-strength = <12>; + }; + + conf-rx { + pins = "MIO37"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO36"; + bias-disable; + output-enable; + }; + + mux { + groups = "uart1_9_grp"; + function = "uart1"; + }; + }; + + pinctrl_i2c1_default: i2c1-default { + conf { + groups = "i2c1_6_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + + mux { + groups = "i2c1_6_grp"; + function = "i2c1"; + }; + }; + + pinctrl_i2c1_gpio: i2c1-gpio-grp { + conf { + groups = "gpio0_24_grp", "gpio0_25_grp"; + slew-rate = ; + power-source = ; + }; + + mux { + groups = "gpio0_24_grp", "gpio0_25_grp"; + function = "gpio0"; + }; + }; + + pinctrl_gem1_default: gem1-default { + conf { + groups = "ethernet1_0_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO45", "MIO46", "MIO47", "MIO48"; + bias-disable; + low-power-disable; + }; + + conf-bootstrap { + pins = "MIO44", "MIO49"; + bias-disable; + output-enable; + low-power-disable; + }; + + conf-tx { + pins = "MIO38", "MIO39", "MIO40", + "MIO41", "MIO42", "MIO43"; + bias-disable; + output-enable; + low-power-enable; + }; + + conf-mdio { + groups = "mdio1_0_grp"; + slew-rate = ; + power-source = ; + bias-disable; + output-enable; + }; + + mux-mdio { + function = "mdio1"; + groups = "mdio1_0_grp"; + }; + + mux { + function = "ethernet1"; + groups = "ethernet1_0_grp"; + }; + }; + + pinctrl_usb0_default: usb0-default { + conf { + groups = "usb0_0_grp"; + power-source = ; + }; + + conf-rx { + pins = "MIO52", "MIO53", "MIO55"; + bias-high-impedance; + drive-strength = <12>; + slew-rate = ; + }; + + conf-tx { + pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", + "MIO60", "MIO61", "MIO62", "MIO63"; + bias-disable; + output-enable; + drive-strength = <4>; + slew-rate = ; + }; + + mux { + groups = "usb0_0_grp"; + function = "usb0"; + }; + }; + + pinctrl_usb1_default: usb1-default { + conf { + groups = "usb1_0_grp"; + power-source = ; + }; + + conf-rx { + pins = "MIO64", "MIO65", "MIO67"; + bias-high-impedance; + drive-strength = <12>; + slew-rate = ; + }; + + conf-tx { + pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", + "MIO72", "MIO73", "MIO74", "MIO75"; + bias-disable; + output-enable; + drive-strength = <4>; + slew-rate = ; + }; + + mux { + groups = "usb1_0_grp"; + function = "usb1"; + }; + }; +}; + +&uart0 { + status = "okay"; + rts-gpios = <&gpio 72 GPIO_ACTIVE_HIGH>; + linux,rs485-enabled-at-boot-time; + rs485-rts-delay = <10 10>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart0_default>; + assigned-clock-rates = <100000000>; +}; + +&uart1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1_default>; +}; + +&zynqmp_dpsub { + status = "disabled"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revA.dtso +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revA.dtso @@ -0,0 +1,439 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for KR260 revA Carrier Card + * + * (C) Copyright 2021, Xilinx, Inc. + * + * Michal Simek + */ + +#include +#include +#include +#include + +/dts-v1/; +/plugin/; + +&{/} { + compatible = "xlnx,zynqmp-sk-kr260-revA", + "xlnx,zynqmp-sk-kr260", "xlnx,zynqmp"; + model = "ZynqMP KR260 revA"; + + ina260-u14 { + compatible = "iio-hwmon"; + io-channels = <&u14 0>, <&u14 1>, <&u14 2>; + }; + + clk_27: clock0 { /* u86 - DP */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <27000000>; + }; + + clk_125: si5332-0 { /* u17 - GEM0/1 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + }; + + clk_74: si5332-5 { /* u17 - SLVC-EC */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <74250000>; + }; + + clk_26: si5332-2 { /* u17 - USB */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + }; + + clk_156: si5332-3 { /* u17 - SFP+ */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <156250000>; + }; + + clk_25_0: si5332-1 { /* u17 - GEM2 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; + + clk_25_1: si5332-4 { /* u17 - GEM3 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; +}; + +&i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */ + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1_default>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + + u14: ina260@40 { /* u14 */ + compatible = "ti,ina260"; + #io-channel-cells = <1>; + label = "ina260-u14"; + reg = <0x40>; + }; + + slg7xl45106: gpio@11 { /* u19 - reset logic */ + compatible = "dlg,slg7xl45106"; + reg = <0x11>; + label = "resetchip"; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "USB0_PHY_RESET_B", "USB1_PHY_RESET_B", + "SD_RESET_B", "USB0_HUB_RESET_B", + "USB1_HUB_RESET_B", "PS_GEM0_RESET_B", + "PS_GEM1_RESET_B", ""; + }; + + i2c-mux@74 { /* u18 */ + compatible = "nxp,pca9546"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + usbhub_i2c0: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + hub_1: usb-hub@2d { + compatible = "microchip,usb5744"; + reg = <0x2d>; + }; + }; + usbhub_i2c1: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + hub_2: usb-hub@2d { + compatible = "microchip,usb5744"; + reg = <0x2d>; + }; + }; + /* Bus 2/3 are not connected */ + }; + + /* si5332@6a - u17 - clock-generator */ +}; + +/* GEM SGMII/DP and USB 3.0 */ +&psgtr { + status = "okay"; + /* gem0/1, dp, usb */ + clocks = <&clk_125>, <&clk_27>, <&clk_26>; + clock-names = "ref0", "ref1", "ref2"; +}; + +&zynqmp_dpsub { + status = "okay"; + phy-names = "dp-phy0"; + phys = <&psgtr 1 PHY_TYPE_DP 0 1>; + assigned-clock-rates = <27000000>, <25000000>, <300000000>; +}; + +&zynqmp_dpdma { + status = "okay"; + assigned-clock-rates = <600000000>; +}; + +&usb0 { /* mio52 - mio63 */ + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb0_default>; + phy-names = "usb3-phy"; + phys = <&psgtr 2 PHY_TYPE_USB3 0 2>; + reset-gpios = <&slg7xl45106 0 GPIO_ACTIVE_LOW>; + assigned-clock-rates = <250000000>, <20000000>; + + usb2244: usb-sd { /* u38 */ + compatible = "microchip,usb2244"; + reset-gpios = <&slg7xl45106 2 GPIO_ACTIVE_LOW>; + }; +}; + +&dwc3_0 { + status = "okay"; + dr_mode = "host"; + snps,usb3_lpm_capable; + maximum-speed = "super-speed"; + #address-cells = <1>; + #size-cells = <0>; + + /* 2.0 hub on port 1 */ + hub_2_0: hub@1 { + compatible = "usb424,2744"; + reg = <1>; + peer-hub = <&hub_3_0>; + i2c-bus = <&hub_1>; + reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>; + }; + + /* 3.0 hub on port 2 */ + hub_3_0: hub@2 { + compatible = "usb424,5744"; + reg = <2>; + peer-hub = <&hub_2_0>; + i2c-bus = <&hub_1>; + reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>; + }; +}; + +&usb1 { /* mio64 - mio75 */ + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb1_default>; + phy-names = "usb3-phy"; + phys = <&psgtr 3 PHY_TYPE_USB3 1 2>; + reset-gpios = <&slg7xl45106 1 GPIO_ACTIVE_LOW>; + assigned-clock-rates = <250000000>, <20000000>; +}; + +&dwc3_1 { + status = "okay"; + dr_mode = "host"; + snps,usb3_lpm_capable; + maximum-speed = "super-speed"; + #address-cells = <1>; + #size-cells = <0>; + + /* 2.0 hub on port 1 */ + hub1_2_0: hub@1 { + compatible = "usb424,2744"; + reg = <1>; + peer-hub = <&hub1_3_0>; + i2c-bus = <&hub_2>; + reset-gpios = <&slg7xl45106 4 GPIO_ACTIVE_LOW>; + }; + + /* 3.0 hub on port 2 */ + hub1_3_0: hub@2 { + compatible = "usb424,5744"; + reg = <2>; + peer-hub = <&hub1_2_0>; + i2c-bus = <&hub_2>; + reset-gpios = <&slg7xl45106 4 GPIO_ACTIVE_LOW>; + }; +}; + +&gem0 { /* mdio mio50/51 */ + status = "okay"; + phys = <&psgtr 0 PHY_TYPE_SGMII 0 0>; + phy-handle = <&phy0>; + phy-mode = "sgmii"; + is-internal-pcspma; + assigned-clock-rates = <250000000>; +}; + +&gem1 { /* mdio mio50/51, gem mio38 - mio49 */ + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gem1_default>; + phy-handle = <&phy1>; + phy-mode = "rgmii-id"; + assigned-clock-rates = <250000000>; + + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + phy0: ethernet-phy@4 { /* u81 */ + #phy-cells = <1>; + compatible = "ethernet-phy-id2000.a231"; + reg = <4>; + ti,rx-internal-delay = ; + ti,tx-internal-delay = ; + ti,fifo-depth = ; + ti,dp83867-rxctrl-strap-quirk; + reset-assert-us = <300>; + reset-deassert-us = <280>; + reset-gpios = <&slg7xl45106 5 GPIO_ACTIVE_LOW>; + }; + phy1: ethernet-phy@8 { /* u36 */ + #phy-cells = <1>; + compatible = "ethernet-phy-id2000.a231"; + reg = <8>; + ti,rx-internal-delay = ; + ti,tx-internal-delay = ; + ti,fifo-depth = ; + ti,dp83867-rxctrl-strap-quirk; + reset-assert-us = <100>; + reset-deassert-us = <280>; + reset-gpios = <&slg7xl45106 6 GPIO_ACTIVE_LOW>; + }; + }; +}; + +/* gem2/gem3 via PL with phys u79@2 and u80@3 */ + +&pinctrl0 { + status = "okay"; + + pinctrl_uart1_default: uart1-default { + conf { + groups = "uart1_9_grp"; + slew-rate = ; + power-source = ; + drive-strength = <12>; + }; + + conf-rx { + pins = "MIO37"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO36"; + bias-disable; + output-enable; + }; + + mux { + groups = "uart1_9_grp"; + function = "uart1"; + }; + }; + + pinctrl_i2c1_default: i2c1-default { + conf { + groups = "i2c1_6_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + + mux { + groups = "i2c1_6_grp"; + function = "i2c1"; + }; + }; + + pinctrl_i2c1_gpio: i2c1-gpio-grp { + conf { + groups = "gpio0_24_grp", "gpio0_25_grp"; + slew-rate = ; + power-source = ; + }; + + mux { + groups = "gpio0_24_grp", "gpio0_25_grp"; + function = "gpio0"; + }; + }; + + pinctrl_gem1_default: gem1-default { + conf { + groups = "ethernet1_0_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO44", "MIO46", "MIO48"; + bias-high-impedance; + low-power-disable; + }; + + conf-bootstrap { + pins = "MIO45", "MIO47", "MIO49"; + bias-disable; + output-enable; + low-power-disable; + }; + + conf-tx { + pins = "MIO38", "MIO39", "MIO40", + "MIO41", "MIO42", "MIO43"; + bias-disable; + output-enable; + low-power-enable; + }; + + conf-mdio { + groups = "mdio1_0_grp"; + slew-rate = ; + power-source = ; + bias-disable; + output-enable; + }; + + mux-mdio { + function = "mdio1"; + groups = "mdio1_0_grp"; + }; + + mux { + function = "ethernet1"; + groups = "ethernet1_0_grp"; + }; + }; + + pinctrl_usb0_default: usb0-default { + conf { + groups = "usb0_0_grp"; + power-source = ; + }; + + conf-rx { + pins = "MIO52", "MIO53", "MIO55"; + bias-high-impedance; + drive-strength = <12>; + slew-rate = ; + }; + + conf-tx { + pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", + "MIO60", "MIO61", "MIO62", "MIO63"; + bias-disable; + output-enable; + drive-strength = <4>; + slew-rate = ; + }; + + mux { + groups = "usb0_0_grp"; + function = "usb0"; + }; + }; + + pinctrl_usb1_default: usb1-default { + conf { + groups = "usb1_0_grp"; + power-source = ; + }; + + conf-rx { + pins = "MIO64", "MIO65", "MIO67"; + bias-high-impedance; + drive-strength = <12>; + slew-rate = ; + }; + + conf-tx { + pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", + "MIO72", "MIO73", "MIO74", "MIO75"; + bias-disable; + output-enable; + drive-strength = <4>; + slew-rate = ; + }; + + mux { + groups = "usb1_0_grp"; + function = "usb1"; + }; + }; +}; + +&uart1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1_default>; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revB.dtso +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revB.dtso @@ -0,0 +1,439 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for KR260 revB Carrier Card (A03 revision) + * + * (C) Copyright 2021 - 2022, Xilinx, Inc. + * + * Michal Simek + */ + +#include +#include +#include +#include + +/dts-v1/; +/plugin/; + +&{/} { + compatible = "xlnx,zynqmp-sk-kr260-revB", + "xlnx,zynqmp-sk-kr260", "xlnx,zynqmp"; + model = "ZynqMP KR260 revB"; + + ina260-u14 { + compatible = "iio-hwmon"; + io-channels = <&u14 0>, <&u14 1>, <&u14 2>; + }; + + clk_125: clock0 { /* u87 - GEM0/1 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + }; + + clk_27: clock1 { /* u86 - DP */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <27000000>; + }; + + clk_26: clock2 { /* u89 - USB */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + }; + + clk_156: clock3 { /* u90 - SFP+ */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <156250000>; + }; + + clk_25_0: clock4 { /* u92/u91 - GEM2 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; + + clk_25_1: clock5 { /* u92/u91 - GEM3 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; + + clk_74: clock6 { /* u88 - SLVC-EC */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <74250000>; + }; +}; + +&i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */ + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1_default>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + + u14: ina260@40 { /* u14 */ + compatible = "ti,ina260"; + #io-channel-cells = <1>; + label = "ina260-u14"; + reg = <0x40>; + }; + + slg7xl45106: gpio@11 { /* u19 - reset logic */ + compatible = "dlg,slg7xl45106"; + reg = <0x11>; + label = "resetchip"; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "USB0_PHY_RESET_B", "USB1_PHY_RESET_B", + "SD_RESET_B", "USB0_HUB_RESET_B", + "USB1_HUB_RESET_B", "PS_GEM0_RESET_B", + "PS_GEM1_RESET_B", ""; + }; + + i2c-mux@74 { /* u18 */ + compatible = "nxp,pca9546"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + usbhub_i2c0: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + hub_1: usb-hub@2d { + compatible = "microchip,usb5744"; + reg = <0x2d>; + }; + }; + usbhub_i2c1: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + hub_2: usb-hub@2d { + compatible = "microchip,usb5744"; + reg = <0x2d>; + }; + }; + /* Bus 2/3 are not connected */ + }; + + /* si5332@6a - u17 - clock-generator */ +}; + +/* GEM SGMII/DP and USB 3.0 */ +&psgtr { + status = "okay"; + /* gem0/1, dp, usb */ + clocks = <&clk_125>, <&clk_27>, <&clk_26>; + clock-names = "ref0", "ref1", "ref2"; +}; + +&zynqmp_dpsub { + status = "okay"; + phy-names = "dp-phy0"; + phys = <&psgtr 1 PHY_TYPE_DP 0 1>; + assigned-clock-rates = <27000000>, <25000000>, <300000000>; +}; + +&zynqmp_dpdma { + status = "okay"; + assigned-clock-rates = <600000000>; +}; + +&usb0 { /* mio52 - mio63 */ + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb0_default>; + phy-names = "usb3-phy"; + phys = <&psgtr 2 PHY_TYPE_USB3 0 2>; + reset-gpios = <&slg7xl45106 0 GPIO_ACTIVE_LOW>; + assigned-clock-rates = <250000000>, <20000000>; + + usb2244: usb-sd { /* u38 */ + compatible = "microchip,usb2244"; + reset-gpios = <&slg7xl45106 2 GPIO_ACTIVE_LOW>; + }; +}; + +&dwc3_0 { + status = "okay"; + dr_mode = "host"; + snps,usb3_lpm_capable; + maximum-speed = "super-speed"; + #address-cells = <1>; + #size-cells = <0>; + + /* 2.0 hub on port 1 */ + hub_2_0: hub@1 { + compatible = "usb424,2744"; + reg = <1>; + peer-hub = <&hub_3_0>; + i2c-bus = <&hub_1>; + reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>; + }; + + /* 3.0 hub on port 2 */ + hub_3_0: hub@2 { + compatible = "usb424,5744"; + reg = <2>; + peer-hub = <&hub_2_0>; + i2c-bus = <&hub_1>; + reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>; + }; +}; + +&usb1 { /* mio64 - mio75 */ + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb1_default>; + phy-names = "usb3-phy"; + phys = <&psgtr 3 PHY_TYPE_USB3 1 2>; + reset-gpios = <&slg7xl45106 1 GPIO_ACTIVE_LOW>; + assigned-clock-rates = <250000000>, <20000000>; +}; + +&dwc3_1 { + status = "okay"; + dr_mode = "host"; + snps,usb3_lpm_capable; + maximum-speed = "super-speed"; + #address-cells = <1>; + #size-cells = <0>; + + /* 2.0 hub on port 1 */ + hub1_2_0: hub@1 { + compatible = "usb424,2744"; + reg = <1>; + peer-hub = <&hub1_3_0>; + i2c-bus = <&hub_2>; + reset-gpios = <&slg7xl45106 4 GPIO_ACTIVE_LOW>; + }; + + /* 3.0 hub on port 2 */ + hub1_3_0: hub@2 { + compatible = "usb424,5744"; + reg = <2>; + peer-hub = <&hub1_2_0>; + i2c-bus = <&hub_2>; + reset-gpios = <&slg7xl45106 4 GPIO_ACTIVE_LOW>; + }; +}; + +&gem0 { /* mdio mio50/51 */ + status = "okay"; + phys = <&psgtr 0 PHY_TYPE_SGMII 0 0>; + phy-handle = <&phy0>; + phy-mode = "sgmii"; + is-internal-pcspma; + assigned-clock-rates = <250000000>; +}; + +&gem1 { /* mdio mio50/51, gem mio38 - mio49 */ + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gem1_default>; + phy-handle = <&phy1>; + phy-mode = "rgmii-id"; + assigned-clock-rates = <250000000>; + + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + phy0: ethernet-phy@4 { /* u81 */ + #phy-cells = <1>; + compatible = "ethernet-phy-id2000.a231"; + reg = <4>; + ti,rx-internal-delay = ; + ti,tx-internal-delay = ; + ti,fifo-depth = ; + ti,dp83867-rxctrl-strap-quirk; + reset-assert-us = <300>; + reset-deassert-us = <280>; + reset-gpios = <&slg7xl45106 5 GPIO_ACTIVE_LOW>; + }; + phy1: ethernet-phy@8 { /* u36 */ + #phy-cells = <1>; + compatible = "ethernet-phy-id2000.a231"; + reg = <8>; + ti,rx-internal-delay = ; + ti,tx-internal-delay = ; + ti,fifo-depth = ; + ti,dp83867-rxctrl-strap-quirk; + reset-assert-us = <100>; + reset-deassert-us = <280>; + reset-gpios = <&slg7xl45106 6 GPIO_ACTIVE_LOW>; + }; + }; +}; + +/* gem2/gem3 via PL with phys u79@2 and u80@3 */ + +&pinctrl0 { + status = "okay"; + + pinctrl_uart1_default: uart1-default { + conf { + groups = "uart1_9_grp"; + slew-rate = ; + power-source = ; + drive-strength = <12>; + }; + + conf-rx { + pins = "MIO37"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO36"; + bias-disable; + output-enable; + }; + + mux { + groups = "uart1_9_grp"; + function = "uart1"; + }; + }; + + pinctrl_i2c1_default: i2c1-default { + conf { + groups = "i2c1_6_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + + mux { + groups = "i2c1_6_grp"; + function = "i2c1"; + }; + }; + + pinctrl_i2c1_gpio: i2c1-gpio-grp { + conf { + groups = "gpio0_24_grp", "gpio0_25_grp"; + slew-rate = ; + power-source = ; + }; + + mux { + groups = "gpio0_24_grp", "gpio0_25_grp"; + function = "gpio0"; + }; + }; + + pinctrl_gem1_default: gem1-default { + conf { + groups = "ethernet1_0_grp"; + slew-rate = ; + power-source = ; + }; + + conf-rx { + pins = "MIO44", "MIO46", "MIO48"; + bias-high-impedance; + low-power-disable; + }; + + conf-bootstrap { + pins = "MIO45", "MIO47", "MIO49"; + bias-disable; + output-enable; + low-power-disable; + }; + + conf-tx { + pins = "MIO38", "MIO39", "MIO40", + "MIO41", "MIO42", "MIO43"; + bias-disable; + output-enable; + low-power-enable; + }; + + conf-mdio { + groups = "mdio1_0_grp"; + slew-rate = ; + power-source = ; + bias-disable; + output-enable; + }; + + mux-mdio { + function = "mdio1"; + groups = "mdio1_0_grp"; + }; + + mux { + function = "ethernet1"; + groups = "ethernet1_0_grp"; + }; + }; + + pinctrl_usb0_default: usb0-default { + conf { + groups = "usb0_0_grp"; + power-source = ; + }; + + conf-rx { + pins = "MIO52", "MIO53", "MIO55"; + bias-high-impedance; + drive-strength = <12>; + slew-rate = ; + }; + + conf-tx { + pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", + "MIO60", "MIO61", "MIO62", "MIO63"; + bias-disable; + output-enable; + drive-strength = <4>; + slew-rate = ; + }; + + mux { + groups = "usb0_0_grp"; + function = "usb0"; + }; + }; + + pinctrl_usb1_default: usb1-default { + conf { + groups = "usb1_0_grp"; + power-source = ; + }; + + conf-rx { + pins = "MIO64", "MIO65", "MIO67"; + bias-high-impedance; + drive-strength = <12>; + slew-rate = ; + }; + + conf-tx { + pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", + "MIO72", "MIO73", "MIO74", "MIO75"; + bias-disable; + output-enable; + drive-strength = <4>; + slew-rate = ; + }; + + mux { + groups = "usb1_0_grp"; + function = "usb1"; + }; + }; +}; + +&uart1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1_default>; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso @@ -22,6 +22,17 @@ /plugin/; &{/} { + compatible = "xlnx,zynqmp-sk-kv260-revA", + "xlnx,zynqmp-sk-kv260-revY", + "xlnx,zynqmp-sk-kv260-revZ", + "xlnx,zynqmp-sk-kv260", "xlnx,zynqmp"; + model = "ZynqMP KV260 revA"; + + ina260-u14 { + compatible = "iio-hwmon"; + io-channels = <&u14 0>, <&u14 1>, <&u14 2>; + }; + si5332_0: si5332-0 { /* u17 */ compatible = "fixed-clock"; #clock-cells = <0>; @@ -68,7 +79,12 @@ scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - /* u14 - 0x40 - ina260 */ + u14: ina260@40 { /* u14 */ + compatible = "ti,ina260"; + #io-channel-cells = <1>; + label = "ina260-u14"; + reg = <0x40>; + }; /* u27 - 0xe0 - STDP4320 DP/HDMI splitter */ }; @@ -113,7 +129,6 @@ pinctrl-0 = <&pinctrl_usb0_default>; phy-names = "usb3-phy"; phys = <&psgtr 2 PHY_TYPE_USB3 0 1>; - /* missing usb5744 - u43 */ }; &dwc3_0 { @@ -121,6 +136,24 @@ dr_mode = "host"; snps,usb3_lpm_capable; maximum-speed = "super-speed"; + #address-cells = <1>; + #size-cells = <0>; + + /* 2.0 hub on port 1 */ + hub_2_0: hub@1 { + compatible = "usb424,2744"; + reg = <1>; + peer-hub = <&hub_3_0>; + reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>; + }; + + /* 3.0 hub on port 2 */ + hub_3_0: hub@2 { + compatible = "usb424,5744"; + reg = <2>; + peer-hub = <&hub_2_0>; + reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>; + }; }; &sdhci1 { /* on CC with tuned parameters */ @@ -139,7 +172,7 @@ bus-width = <4>; }; -&gem3 { /* required by spec */ +&gem3 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gem3_default>; @@ -166,9 +199,28 @@ }; }; -&pinctrl0 { /* required by spec */ +&pinctrl0 { status = "okay"; + pinctrl_gpio0_default: gpio0-default { + conf { + groups = "gpio0_38_grp"; + bias-pull-up; + power-source = ; + }; + + mux { + groups = "gpio0_38_grp"; + function = "gpio0"; + }; + + conf-tx { + pins = "MIO38"; + bias-disable; + output-enable; + }; + }; + pinctrl_uart1_default: uart1-default { conf { groups = "uart1_9_grp"; @@ -185,6 +237,7 @@ conf-tx { pins = "MIO36"; bias-disable; + output-enable; }; mux { @@ -207,7 +260,7 @@ }; }; - pinctrl_i2c1_gpio: i2c1-gpio { + pinctrl_i2c1_gpio: i2c1-gpio-grp { conf { groups = "gpio0_24_grp", "gpio0_25_grp"; slew-rate = ; @@ -236,6 +289,7 @@ conf-bootstrap { pins = "MIO71", "MIO73", "MIO75"; bias-disable; + output-enable; low-power-disable; }; @@ -243,6 +297,7 @@ pins = "MIO64", "MIO65", "MIO66", "MIO67", "MIO68", "MIO69"; bias-disable; + output-enable; low-power-enable; }; @@ -251,6 +306,7 @@ slew-rate = ; power-source = ; bias-disable; + output-enable; }; mux-mdio { @@ -281,6 +337,7 @@ pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + output-enable; drive-strength = <4>; slew-rate = ; }; @@ -297,6 +354,7 @@ slew-rate = ; power-source = ; bias-disable; + output-enable; }; conf-cd { @@ -319,6 +377,12 @@ }; }; +&gpio { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio0_default>; +}; + &uart1 { status = "okay"; pinctrl-names = "default"; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso @@ -17,6 +17,17 @@ /plugin/; &{/} { + compatible = "xlnx,zynqmp-sk-kv260-rev2", + "xlnx,zynqmp-sk-kv260-rev1", + "xlnx,zynqmp-sk-kv260-revB", + "xlnx,zynqmp-sk-kv260", "xlnx,zynqmp"; + model = "ZynqMP KV260 revB"; + + ina260-u14 { + compatible = "iio-hwmon"; + io-channels = <&u14 0>, <&u14 1>, <&u14 2>; + }; + si5332_0: si5332-0 { /* u17 */ compatible = "fixed-clock"; #clock-cells = <0>; @@ -63,8 +74,16 @@ scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - /* u14 - 0x40 - ina260 */ - /* u43 - 0x2d - usb5744 */ + u14: ina260@40 { /* u14 */ + compatible = "ti,ina260"; + #io-channel-cells = <1>; + label = "ina260-u14"; + reg = <0x40>; + }; + hub: usb-hub@2d { + compatible = "microchip,usb5744"; + reg = <0x2d>; + }; /* u27 - 0xe0 - STDP4320 DP/HDMI splitter */ }; @@ -94,6 +113,7 @@ pinctrl-0 = <&pinctrl_usb0_default>; phy-names = "usb3-phy"; phys = <&psgtr 2 PHY_TYPE_USB3 0 1>; + assigned-clock-rates = <250000000>, <20000000>; }; &dwc3_0 { @@ -101,6 +121,26 @@ dr_mode = "host"; snps,usb3_lpm_capable; maximum-speed = "super-speed"; + #address-cells = <1>; + #size-cells = <0>; + + /* 2.0 hub on port 1 */ + hub_2_0: hub@1 { + compatible = "usb424,2744"; + reg = <1>; + peer-hub = <&hub_3_0>; + i2c-bus = <&hub>; + reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>; + }; + + /* 3.0 hub on port 2 */ + hub_3_0: hub@2 { + compatible = "usb424,5744"; + reg = <2>; + peer-hub = <&hub_2_0>; + i2c-bus = <&hub>; + reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>; + }; }; &sdhci1 { /* on CC with tuned parameters */ @@ -122,7 +162,7 @@ bus-width = <4>; }; -&gem3 { /* required by spec */ +&gem3 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gem3_default>; @@ -149,9 +189,28 @@ }; }; -&pinctrl0 { /* required by spec */ +&pinctrl0 { status = "okay"; + pinctrl_gpio0_default: gpio0-default { + conf { + groups = "gpio0_38_grp"; + bias-pull-up; + power-source = ; + }; + + mux { + groups = "gpio0_38_grp"; + function = "gpio0"; + }; + + conf-tx { + pins = "MIO38"; + bias-disable; + output-enable; + }; + }; + pinctrl_uart1_default: uart1-default { conf { groups = "uart1_9_grp"; @@ -168,6 +227,7 @@ conf-tx { pins = "MIO36"; bias-disable; + output-enable; }; mux { @@ -190,7 +250,7 @@ }; }; - pinctrl_i2c1_gpio: i2c1-gpio { + pinctrl_i2c1_gpio: i2c1-gpio-grp { conf { groups = "gpio0_24_grp", "gpio0_25_grp"; slew-rate = ; @@ -219,6 +279,7 @@ conf-bootstrap { pins = "MIO71", "MIO73", "MIO75"; bias-disable; + output-enable; low-power-disable; }; @@ -226,6 +287,7 @@ pins = "MIO64", "MIO65", "MIO66", "MIO67", "MIO68", "MIO69"; bias-disable; + output-enable; low-power-enable; }; @@ -234,6 +296,7 @@ slew-rate = ; power-source = ; bias-disable; + output-enable; }; mux-mdio { @@ -264,6 +327,7 @@ pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + output-enable; drive-strength = <4>; slew-rate = ; }; @@ -280,6 +344,7 @@ slew-rate = ; power-source = ; bias-disable; + output-enable; }; conf-cd { @@ -302,6 +367,12 @@ }; }; +&gpio { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio0_default>; +}; + &uart1 { status = "okay"; pinctrl-names = "default"; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-sm-k24-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-sm-k24-revA.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP SM-K24 RevA + * + * (C) Copyright 2020 - 2021, Xilinx, Inc. + * (C) Copyright 2022, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +#include "zynqmp-sm-k26-revA.dts" + +/ { + model = "ZynqMP SM-K24 RevA/B/1"; + compatible = "xlnx,zynqmp-sm-k24-rev1", "xlnx,zynqmp-sm-k24-revB", + "xlnx,zynqmp-sm-k24-revA", "xlnx,zynqmp-sm-k24", + "xlnx,zynqmp"; + + memory@0 { + device_type = "memory"; /* 2GB */ + reg = <0 0 0 0x80000000>; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts @@ -1,8 +1,9 @@ // SPDX-License-Identifier: GPL-2.0 /* - * dts file for Xilinx ZynqMP SM-K26 rev1/B/A + * dts file for Xilinx ZynqMP SM-K26 rev2/1/B/A * * (C) Copyright 2020 - 2021, Xilinx, Inc. + * (C) Copyright 2023, Advanced Micro Devices, Inc. * * Michal Simek */ @@ -17,8 +18,9 @@ #include / { - model = "ZynqMP SM-K26 Rev1/B/A"; - compatible = "xlnx,zynqmp-sm-k26-rev1", "xlnx,zynqmp-sm-k26-revB", + model = "ZynqMP SM-K26 Rev2/1/B/A"; + compatible = "xlnx,zynqmp-sm-k26-rev2", + "xlnx,zynqmp-sm-k26-rev1", "xlnx,zynqmp-sm-k26-revB", "xlnx,zynqmp-sm-k26-revA", "xlnx,zynqmp-sm-k26", "xlnx,zynqmp"; @@ -101,12 +103,23 @@ <&xilinx_ams 24>, <&xilinx_ams 25>, <&xilinx_ams 26>, <&xilinx_ams 27>, <&xilinx_ams 28>, <&xilinx_ams 29>; }; + + pwm-fan { + compatible = "pwm-fan"; + status = "okay"; + pwms = <&ttc0 2 40000 1>; + }; }; &modepin_gpio { label = "modepin"; }; +&ttc0 { + status = "okay"; + #pwm-cells = <3>; +}; + &uart1 { /* MIO36/MIO37 */ status = "okay"; }; @@ -234,6 +247,9 @@ pinctrl-0 = <&pinctrl_sdhci0_default>; non-removable; disable-wp; + no-sd; + no-sdio; + cap-mmc-hw-reset; bus-width = <8>; xlnx,mio-bank = <0>; assigned-clock-rates = <187498123>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-smk-k24-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-smk-k24-revA.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP SMK-K24 RevA + * + * (C) Copyright 2020 - 2021, Xilinx, Inc. + * (C) Copyright 2022, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +#include "zynqmp-sm-k24-revA.dts" + +/ { + model = "ZynqMP SMK-K24 RevA"; + compatible = "xlnx,zynqmp-smk-k24-revA", "xlnx,zynqmp-smk-k24", + "xlnx,zynqmp"; +}; + +&sdhci0 { + status = "disabled"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-smk-k26-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-smk-k26-revA.dts @@ -1,8 +1,9 @@ // SPDX-License-Identifier: GPL-2.0 /* - * dts file for Xilinx ZynqMP SMK-K26 rev1/B/A + * dts file for Xilinx ZynqMP SMK-K26 rev2/1/B/A * * (C) Copyright 2020 - 2021, Xilinx, Inc. + * (C) Copyright 2023, Advanced Micro Devices, Inc. * * Michal Simek */ @@ -10,8 +11,9 @@ #include "zynqmp-sm-k26-revA.dts" / { - model = "ZynqMP SMK-K26 Rev1/B/A"; - compatible = "xlnx,zynqmp-smk-k26-rev1", "xlnx,zynqmp-smk-k26-revB", + model = "ZynqMP SMK-K26 Rev2/1/B/A"; + compatible = "xlnx,zynqmp-smk-k26-rev2", + "xlnx,zynqmp-smk-k26-rev1", "xlnx,zynqmp-smk-k26-revB", "xlnx,zynqmp-smk-k26-revA", "xlnx,zynqmp-smk-k26", "xlnx,zynqmp"; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-vp-x-a2785-00-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-vp-x-a2785-00-revA.dts @@ -0,0 +1,442 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP vp-x-a2785-00 RevA System Controller + * + * (C) Copyright 2021 - 2022, Xilinx, Inc. + * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. + * + * Michal Simek + */ +/dts-v1/; + +#include "zynqmp.dtsi" +#include "zynqmp-clk-ccf.dtsi" +#include +#include +#include +#include + +/ { + model = "ZynqMP System Controller on vp-x-a2785-00 board RevA"; + compatible = "xlnx,zynqmp-vp-x-a2785-00-revA", + "xlnx,zynqmp-vp-x-a2785-00", "xlnx,zynqmp"; + + aliases { + ethernet0 = &gem0; + i2c0 = &i2c0; + i2c1 = &i2c1; + mmc0 = &sdhci0; + serial0 = &uart0; + serial1 = &dcc; + spi0 = &qspi; + usb0 = &usb0; + usb1 = &usb1; + nvmem0 = &eeprom; + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0 0 0 0x80000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + autorepeat; + key-j383 { + label = "j383"; + gpios = <&gpio 10 GPIO_ACTIVE_HIGH>; + linux,code = ; + wakeup-source; + autorepeat; + }; + }; + + leds { + compatible = "gpio-leds"; + heartbeat-led { /* ds52 */ + label = "heartbeat"; + gpios = <&gpio 9 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; + + si5332_0: si5332-0 { /* ps_ref_clk - u142 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <33333333>; + }; + + si5332_1: si5332-1 { /* clk0_sgmii - u142 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <33333333>; /* FIXME */ + }; + + si5332_2: si5332-2 { /* clk1_usb - u142 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <27000000>; + }; +}; + +&qspi { /* MIO 0-5 */ + status = "okay"; + flash@0 { + compatible = "m25p80", "jedec,spi-nor"; /* u285 - mt25qu512abb8e12 512Mib */ + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-tx-bus-width = <4>; /* maybe 4 here */ + spi-rx-bus-width = <4>; + spi-max-frequency = <108000000>; + partition@0 { /* for testing purpose */ + label = "qspi"; + reg = <0 0x4000000>; + }; + }; +}; + +&sdhci1 { /* sd MIO 45-51 */ + status = "okay"; + no-1-8-v; + disable-wp; + xlnx,mio-bank = <1>; +}; + +&uart0 { /* uart0 MIO38-39 */ + status = "okay"; + bootph-all; +}; + +&gem0 { + status = "okay"; + phy-handle = <&phy0>; + phy-mode = "sgmii"; /* DTG generates this properly 1512 */ + is-internal-pcspma; + /* phys = <&psgtr 0 PHY_TYPE_SGMII 0 0>; */ + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + /* reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; */ + phy0: ethernet-phy@0 { /* u131 - M88e1512 */ + reg = <0>; + }; + }; +}; + +&gpio { + status = "okay"; + gpio-line-names = "QSPI_CLK", "QSPI_DQ1", "QSPI_DQ2", "QSPI_DQ3", "QSPI_DQ0", /* 0 - 4 */ + "QSPI_CS_B", "", "", "SYSCTLR_GPIO", "SYSCTLR_LED", /* 5 - 9 */ + "SYSCTLR_PB", "PMC_ZU4_TRIGGER", "", "", "", /* 10 - 14 */ + "", "", "", "", "", /* 15 - 19 */ + "", "", "", "", "", /* 20 - 24 */ + "", "", "", "", "", /* 25 - 29 */ + "", "", "", "", "LP_I2C0_PMC_SCL", /* 30 - 34 */ + "LP_I2C0_PMC_SDA", "LP_I2C1_SCL", "LP_I2C1_SDA", "UART0_RXD_IN", "UART0_TXD_OUT", /* 35 - 39 */ + "", "", "ETH_RESET_B", "", "", /* 40 - 44 */ + "SD1_CD", "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3", /* 45 - 49 */ + "SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2", /* 50 - 54 */ + "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3", /* 55 - 59 */ + "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "", /* 60 - 64 */ + "", "", "", "", "", /* 65 - 69 */ + "", "", "", "", "", /* 70 - 74 */ + "", "ETH_MDC", "ETH_MDIO", /* 75 - 77, MIO end and EMIO start */ + "", "", /* 78 - 79 */ + "", "", "", "", "", /* 80 - 84 */ + "", "", "", "", "", /* 85 - 89 */ + "", "", "", "", "", /* 90 - 94 */ + "", "", "", "", "", /* 95 - 99 */ + "", "", "", "", "", /* 100 - 104 */ + "", "", "", "", "", /* 105 - 109 */ + "", "", "", "", "", /* 110 - 114 */ + "", "", "", "", "", /* 115 - 119 */ + "", "", "", "", "", /* 120 - 124 */ + "", "", "", "", "", /* 125 - 129 */ + "", "", "", "", "", /* 130 - 134 */ + "", "", "", "", "", /* 135 - 139 */ + "", "", "", "", "", /* 140 - 144 */ + "", "", "", "", "", /* 145 - 149 */ + "", "", "", "", "", /* 150 - 154 */ + "", "", "", "", "", /* 155 - 159 */ + "", "", "", "", "", /* 160 - 164 */ + "", "", "", "", "", /* 165 - 169 */ + "", "", "", ""; /* 170 - 173 */ +}; + +&i2c0 { /* MIO 34-35 - can't stay here */ + status = "okay"; + clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c0_default>; + pinctrl-1 = <&pinctrl_i2c0_gpio>; + scl-gpios = <&gpio 34 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio 35 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + + tca6416_u233: gpio@20 { /* u233 */ /* FIXME - address maybe wrong */ + compatible = "ti,tca6416"; + reg = <0x20>; + gpio-controller; /* interrupt not connected */ + #gpio-cells = <2>; + gpio-line-names = "MAX6643_OT_B", "MAX6643_FANFAIL_B", "", "", /* 0 - 3 */ + "", "", "", "MAX6643_FULL_SPEED", /* 4 - 7 */ + "", "", "", "VCCINT_FAULT_B", /* 10 - 13 */ + "VCCINT_VRHOT_B", "", "PMBUS_ALERT", "PMBUS1_INA226_ALERT"; /* 14 - 17 */ + }; + + i2c-mux@74 { /* u33 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + /* reset-gpios = <&gpio SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */ + pmbus_i2c: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* On connector J325 */ + reg_vccint: tps53681@60 { /* u266 - 0xc0 */ + compatible = "ti,tps53681", "ti,tps53679"; + reg = <0x60>; + }; + reg_vcc1v1_lp4: tps544@d { /* u85 */ + compatible = "ti,tps544b25"; + reg = <0xd>; + }; + reg_mgtyavcc: tps544@10 { /* u274 */ + compatible = "ti,tps544b25"; + reg = <0x10>; + }; + reg_mgtyavtt: tps544@11 { /* u275 */ + compatible = "ti,tps544b25"; + reg = <0x11>; + }; + reg_vccaux: tps544@12 { /* u276 */ + compatible = "ti,tps544b25"; + reg = <0x12>; + }; + reg_vcc_cpm: tps544@14 { /* u272 */ + compatible = "ti,tps544b25"; + reg = <0x14>; + }; + reg_util_3v3: tps544@1d { /* u278 */ + compatible = "ti,tps544b25"; + reg = <0x1d>; + }; + }; + pmbus1_ina226_i2c: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* FIXME check alerts coming to SC */ + vcc_cpm: ina226@44 { /* u273 */ + compatible = "ti,ina226"; + reg = <0x44>; + shunt-resistor = <1000>; + }; + }; + i2c@2 { /* NC */ /* FIXME maybe remove */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + pcie_smbus: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; + pcie2_smbus: i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + }; + i2c@5 { /* NC */ + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + }; + user_si570: i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + }; + /* 7 unused */ + }; +}; + +&i2c1 { /* i2c1 MIO 36-37 */ + status = "okay"; + clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1_default>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio 36 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio 37 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + + i2c-mux@74 { /* u35 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + /* reset-gpios = <&gpio SYSCTLR_IIC_MUX1_RESET_B GPIO_ACTIVE_HIGH>; */ + dc_i2c: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* Use for storing information about SC board */ + eeprom: eeprom@54 { /* u34 - m24128 16kB */ + compatible = "st,24c128", "atmel,24c128"; + reg = <0x54>; /* & 0x5c */ + }; + si570_ref_clk: clock-generator@5d { /* u32 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; + temperature-stability = <50>; + factory-fout = <33333333>; + clock-frequency = <33333333>; + clock-output-names = "ref_clk"; + silabs,skip-recall; + }; + }; + i2c@1 { /* NC - FIXME */ + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + i2c@2 { /* NC - FIXME */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + i2c@3 { /* NC - FIXME */ + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; + lpddr4_si570_clk2_i2c: i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + lpddr4_clk2: clock-generator@60 { /* u3 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x60>; + temperature-stability = <50>; + factory-fout = <200000000>; + clock-frequency = <200000000>; + clock-output-names = "lpddr4_clk2"; + }; + }; + lpddr4_si570_clk1_i2c: i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + lpddr4_clk1: clock-generator@60 { /* u248 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x60>; + temperature-stability = <50>; + factory-fout = <200000000>; + clock-frequency = <200000000>; + clock-output-names = "lpddr4_clk1"; + }; + }; + /* 6-7 unused */ + }; +}; + +&usb0 { /* MIO52 - MIO63 */ + status = "okay"; + phy-names = "usb3-phy"; + phys = <&psgtr 1 PHY_TYPE_USB3 0 1>; +}; + +&psgtr { + status = "okay"; + /* sgmii, usb3 */ + clocks = <&si5332_1>, <&si5332_2>; + clock-names = "ref0", "ref1"; +}; + +&dwc3_0 { + status = "okay"; + dr_mode = "peripheral"; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + maximum-speed = "super-speed"; +}; + +&xilinx_ams { + status = "okay"; +}; + +&ams_ps { + status = "okay"; +}; + +&ams_pl { + status = "okay"; +}; + +&pinctrl0 { + status = "okay"; + pinctrl_i2c0_default: i2c0-default { + mux { + groups = "i2c0_8_grp"; + function = "i2c0"; + }; + + conf { + groups = "i2c0_8_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c0_gpio: i2c0-gpio-grp { + mux { + groups = "gpio0_34_grp", "gpio0_35_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_34_grp", "gpio0_35_grp"; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c1_default: i2c1-default { + mux { + groups = "i2c1_9_grp"; + function = "i2c1"; + }; + + conf { + groups = "i2c1_9_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c1_gpio: i2c1-gpio-grp { + mux { + groups = "gpio0_36_grp", "gpio0_37_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_36_grp", "gpio0_37_grp"; + slew-rate = ; + power-source = ; + }; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-vpk120-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-vpk120-revA.dts @@ -0,0 +1,611 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP VPK120 RevA System Controller + * + * (C) Copyright 2021 - 2022, Xilinx, Inc. + * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. + * + * Michal Simek + */ +/dts-v1/; + +#include "zynqmp.dtsi" +#include "zynqmp-clk-ccf.dtsi" +#include +#include +#include +#include + +/ { + model = "ZynqMP System Controller on VPK120 board RevA"; + compatible = "xlnx,zynqmp-vpk120-revA", + "xlnx,zynqmp-vpk120", "xlnx,zynqmp"; + + aliases { + ethernet0 = &gem0; + i2c0 = &i2c0; + i2c1 = &i2c1; + mmc0 = &sdhci0; + serial0 = &uart0; + serial1 = &dcc; + spi0 = &qspi; + usb0 = &usb0; + usb1 = &usb1; + nvmem0 = &eeprom; + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; + }; + + si570_user1_fmc_clk: si570-user1-fmc-clk { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&user_si570_1>; + }; + + si570_ref_clk: si570-ref-clk { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&ref_clk>; + }; + + si570_lpddr4_clk3: si570-lpddr4-clk3 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&lpddr4_clk3>; + }; + + si570_lpddr4_clk2: si570-lpddr4-clk2 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&lpddr4_clk2>; + }; + + si570_lpddr4_clk1: si570-lpddr4-clk1 { + status = "okay"; + compatible = "xlnx,fclk"; + clocks = <&lpddr4_clk1>; + }; + + gpio-keys { + compatible = "gpio-keys"; + autorepeat; + button-16 { + label = "sw16"; + gpios = <&gpio 10 GPIO_ACTIVE_HIGH>; + linux,code = ; + wakeup-source; + autorepeat; + }; + }; + + leds { + compatible = "gpio-leds"; + heartbeat-led { /* ds40 */ + label = "heartbeat"; + gpios = <&gpio 9 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; + + si5332_0: si5332-0 { /* ps_ref_clk */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <33333333>; + }; + + si5332_1: si5332-1 { /* clk0_sgmii */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <33333333>; /* FIXME */ + }; + + si5332_2: si5332-2 { /* clk1_usb */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <27000000>; + }; +}; + +&qspi { /* MIO 0-5 */ + status = "okay"; + flash@0 { + compatible = "m25p80", "jedec,spi-nor"; /* mt25qu512abb8e12 512Mib */ + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + spi-max-frequency = <108000000>; + partition@0 { /* for testing purpose */ + label = "qspi"; + reg = <0 0x4000000>; + }; + }; +}; + +&sdhci0 { /* emmc MIO 13-23 - with some settings MTFC16GAPALBH 16GB */ + status = "okay"; + non-removable; + disable-wp; + no-sd; + no-sdio; + cap-mmc-hw-reset; + bus-width = <8>; + xlnx,mio-bank = <0>; +}; + +&uart0 { /* uart0 MIO38-39 */ + status = "okay"; + bootph-all; +}; + +&gem0 { + status = "okay"; + phy-handle = <&phy0>; + phy-mode = "sgmii"; /* DTG generates this properly 1512 */ + is-internal-pcspma; + /* phys = <&psgtr 0 PHY_TYPE_SGMII 0 0>; */ + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + /* reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; */ + phy0: ethernet-phy@0 { + reg = <0>; + }; + }; +}; + +&gpio { + status = "okay"; + gpio-line-names = "QSPI_CLK", "QSPI_DQ1", "QSPI_DQ2", "QSPI_DQ3", "QSPI_DQ0", /* 0 - 4 */ + "QSPI_CS_B", "", "", "SYSCTLR_GPIO", "SYSCTLR_LED", /* 5 - 9 */ + "SYSCTLR_PB", "PMC_ZU4_TRIGGER", "", "EMMC_DAT0", "EMMC_DAT1", /* 10 - 14 */ + "EMMC_DAT2", "EMMC_DAT3", "EMMC_DAT4", "EMMC_DAT5", "EMMC_DAT6", /* 15 - 19 */ + "EMMC_DAT7", "EMMC_CMD", "EMMC_CLK", "EMMC_RST_B", "", /* 20 - 24 */ + "", "", "", "", "", /* 25 - 29 */ + "", "", "", "", "LP_I2C0_PMC_SCL", /* 30 - 34 */ + "LP_I2C0_PMC_SDA", "LP_I2C1_SCL", "LP_I2C1_SDA", "UART0_RXD_IN", "UART0_TXD_OUT", /* 35 - 39 */ + "", "", "ETH_RESET_B", "", "", /* 40 - 44 */ + "", "", "", "", "", /* 45 - 49 */ + "", "", "USB0_CLK", "USB0_DIR", "USB0_DATA2", /* 50 - 54 */ + "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3", /* 55 - 59 */ + "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "", /* 60 - 64 */ + "", "", "", "", "", /* 65 - 69 */ + "", "", "", "", "", /* 70 - 74 */ + "", "ETH_MDC", "ETH_MDIO", /* 75 - 77, MIO end and EMIO start */ + "SYSCTLR_VERSAL_MODE0", "SYSCTLR_VERSAL_MODE1", /* 78 - 79 */ + "SYSCTLR_VERSAL_MODE2", "SYSCTLR_VERSAL_MODE3", "SYSCTLR_POR_B_LS", "", "", /* 80 - 84 */ + "SYSCTLR_JTAG_S0", "SYSCTLR_JTAG_S1", "SYSCTLR_IIC_MUX0_RESET_B", "SYSCTLR_IIC_MUX1_RESET_B", "", /* 85 - 89 */ + "SYSCTLR_GPIO0", "SYSCTLR_GPIO1", "SYSCTLR_GPIO2", "SYSCTLR_GPIO3", "SYSCTLR_GPIO4", /* 90 - 94 */ + "SYSCTLR_GPIO5", "", "", "", "", /* 95 - 99 */ + "", "", "", "", "", /* 100 - 104 */ + "", "", "", "", "", /* 105 - 109 */ + "", "", "", "", "", /* 110 - 114 */ + "", "", "", "", "", /* 115 - 119 */ + "", "", "", "", "", /* 120 - 124 */ + "", "", "", "", "", /* 125 - 129 */ + "", "", "", "", "", /* 130 - 134 */ + "", "", "", "", "", /* 135 - 139 */ + "", "", "", "", "", /* 140 - 144 */ + "", "", "", "", "", /* 145 - 149 */ + "", "", "", "", "", /* 150 - 154 */ + "", "", "", "", "", /* 155 - 159 */ + "", "", "", "", "", /* 160 - 164 */ + "", "", "", "", "", /* 165 - 169 */ + "", "", "", ""; /* 170 - 173 */ +}; + +&i2c0 { /* MIO 34-35 - can't stay here */ + status = "okay"; + clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c0_default>; + pinctrl-1 = <&pinctrl_i2c0_gpio>; + scl-gpios = <&gpio 34 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio 35 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + + tca6416_u233: gpio@20 { /* u233 */ /* FIXME - address maybe wrong */ + compatible = "ti,tca6416"; + reg = <0x20>; + gpio-controller; /* interrupt not connected */ + #gpio-cells = <2>; + gpio-line-names = "MAX6643_OT_B", "MAX6643_FANFAIL_B", "QSFPDD1_MODSELL", "QSFPDD1_MODSELL", /* 0 - 3 */ + "PMBUS2_INA226_ALERT", "", "", "MAX6643_FULL_SPEED", /* 4 - 7 */ + "FMCP1_FMC_PRSNT_M2C_B", "", "FMCP1_FMCP_PRSNT_M2C_B", "", /* 10 - 13 */ + "VCCINT_VRHOT_B", "8A34001_EXP_RST_B", "PMBUS_ALERT", "PMBUS1_INA226_ALERT"; /* 14 - 17 */ + }; + + i2c-mux@74 { /* u33 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + /* reset-gpios = <&gpio SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */ + pmbus_i2c: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* On connector J325 */ + ir38060_41: regulator@41 { /* IR38060 - u259 */ + compatible = "infineon,ir38060", "infineon,ir38064"; + reg = <0x41>; /* i2c addr 0x11 */ + }; + ir38164_43: regulator@43 { /* IR38164 - u13 */ + compatible = "infineon,ir38164"; + reg = <0x43>; /* i2c addr 0x13 */ + }; + ir35221_45: pmic@46 { /* IR35221 - u152 */ + compatible = "infineon,ir35221"; + reg = <0x46>; /* PMBUS - 0x16 */ + }; + irps5401_47: pmic5401@47 { /* IRPS5401 - u160 */ + compatible = "infineon,irps5401"; + reg = <0x47>; /* i2c addr 0x17 */ + }; + ir38164_49: regulator@49 { /* IR38164 - u189 */ + compatible = "infineon,ir38164"; + reg = <0x49>; /* i2c addr 0x19 */ + }; + irps5401_4c: pmic@4c { /* IRPS5401 - u167 */ + compatible = "infineon,irps5401"; + reg = <0x4c>; /* i2c addr 0x1c */ + }; + irps5401_4d: pmic@4d { /* IRPS5401 - u175 */ + compatible = "infineon,irps5401"; + reg = <0x4d>; /* i2c addr 0x1c */ + }; + ir38164_4e: regulator@4e { /* IR38164 - u184 */ + compatible = "infineon,ir38164"; + reg = <0x4e>; /* i2c addr 0x1e */ + }; + ir38164_4f: regulator@4f { /* IR38164 - u187 */ + compatible = "infineon,ir38164"; + reg = <0x4f>; /* i2c addr 0x1f */ + }; + }; + pmbus1_ina226_i2c: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* FIXME check alerts coming to SC */ + vccint: ina226@40 { /* u65 */ + compatible = "ti,ina226"; + reg = <0x40>; + shunt-resistor = <5000>; + }; + vcc_soc: ina226@41 { /* u161 */ + compatible = "ti,ina226"; + reg = <0x41>; + shunt-resistor = <5000>; + }; + vcc_pmc: ina226@42 { /* u163 */ + compatible = "ti,ina226"; + reg = <0x42>; + shunt-resistor = <5000>; + }; + vcc_ram: ina226@43 { /* u5 */ + compatible = "ti,ina226"; + reg = <0x43>; + shunt-resistor = <5000>; + }; + vcc_pslp: ina226@44 { /* u165 */ + compatible = "ti,ina226"; + reg = <0x44>; + shunt-resistor = <5000>; + }; + vcc_psfp: ina226@45 { /* u164 */ + compatible = "ti,ina226"; + reg = <0x45>; + shunt-resistor = <5000>; + }; + }; + i2c@2 { /* NC */ /* FIXME maybe remove */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + pmbus2_ina226_i2c: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* FIXME check alerts coming to SC */ + vccaux: ina226@40 { /* u166 */ + compatible = "ti,ina226"; + reg = <0x40>; + shunt-resistor = <5000>; + }; + vccaux_pmc: ina226@41 { /* u168 */ + compatible = "ti,ina226"; + reg = <0x41>; + shunt-resistor = <5000>; + }; + mgtavcc: ina226@42 { /* u265 */ + compatible = "ti,ina226"; + reg = <0x42>; + shunt-resistor = <5000>; + }; + vcc1v5: ina226@43 { /* u264 */ + compatible = "ti,ina226"; + reg = <0x43>; + shunt-resistor = <5000>; + }; + vcco_mio: ina226@45 { /* u172 */ + compatible = "ti,ina226"; + reg = <0x45>; + shunt-resistor = <5000>; + }; + mgtavtt: ina226@46 { /* u188 */ + compatible = "ti,ina226"; + reg = <0x46>; + shunt-resistor = <2000>; + }; + vcco_502: ina226@47 { /* u174 */ + compatible = "ti,ina226"; + reg = <0x47>; + shunt-resistor = <5000>; + }; + mgtvccaux: ina226@48 { /* u176 */ + compatible = "ti,ina226"; + reg = <0x48>; + shunt-resistor = <5000>; + }; + vcc1v1_lp4: ina226@49 { /* u186 */ + compatible = "ti,ina226"; + reg = <0x49>; + shunt-resistor = <2000>; + }; + vadj_fmc: ina226@4a { /* u184 */ + compatible = "ti,ina226"; + reg = <0x4a>; + shunt-resistor = <2000>; + }; + lpdmgtyavcc: ina226@4b { /* u177 */ + compatible = "ti,ina226"; + reg = <0x4b>; + shunt-resistor = <5000>; + }; + lpdmgtyavtt: ina226@4c { /* u260 */ + compatible = "ti,ina226"; + reg = <0x4c>; + shunt-resistor = <2000>; + }; + lpdmgtyvccaux: ina226@4d { /* u234 */ + compatible = "ti,ina226"; + reg = <0x4d>; + shunt-resistor = <5000>; + }; + }; + i2c@4 { /* NC */ + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + }; + i2c@5 { /* NC */ + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + }; + user_si570: i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + user_si570_1: clock-generator@5f { /* USER C0 SI570 - u205 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5f>; + temperature-stability = <50>; + factory-fout = <100000000>; + clock-frequency = <100000000>; + clock-output-names = "fmc_si570"; + }; + + }; + /* 7 unused */ + }; +}; + +&i2c1 { /* i2c1 MIO 36-37 */ + status = "okay"; + clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1_default>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio 36 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio 37 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + + i2c-mux@74 { /* u35 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + /* reset-gpios = <&gpio SYSCTLR_IIC_MUX1_RESET_B GPIO_ACTIVE_HIGH>; */ + ref_clk_i2c: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* Use for storing information about SC board */ + eeprom: eeprom@54 { /* u34 - m24128 16kB */ + compatible = "st,24c128", "atmel,24c128"; + reg = <0x54>; /* & 0x5c */ + }; + ref_clk: clock-generator@5d { /* u32 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; + temperature-stability = <50>; + factory-fout = <33333333>; + clock-frequency = <33333333>; + clock-output-names = "ref_clk"; + silabs,skip-recall; + }; + }; + fmcp1_i2c: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* FIXME connection to Samtec J51C */ + /* expected eeprom 0x50 SE cards */ + }; + i2c@2 { /* NC - FIXME */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + lpddr4_si570_clk3_i2c: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + lpddr4_clk3: clock-generator@60 { /* u4 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x60>; + temperature-stability = <50>; + factory-fout = <200000000>; + clock-frequency = <200000000>; + clock-output-names = "lpddr4_clk3"; + }; + }; + lpddr4_si570_clk2_i2c: i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + lpddr4_clk2: clock-generator@60 { /* u3 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x60>; + temperature-stability = <50>; + factory-fout = <200000000>; + clock-frequency = <200000000>; + clock-output-names = "lpddr4_clk2"; + }; + }; + lpddr4_si570_clk1_i2c: i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + lpddr4_clk1: clock-generator@60 { /* u248 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x60>; + temperature-stability = <50>; + factory-fout = <200000000>; + clock-frequency = <200000000>; + clock-output-names = "lpddr4_clk1"; + }; + }; + qsfpdd_i2c: i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + /* J1/J2 connectors */ + }; + idt8a34001_i2c: i2c@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + /* Via J310 connector */ + idt_8a34001: phc@5b { + compatible = "idt,8a34001"; /* u219B */ + reg = <0x5b>; /* FIXME not in schematics */ + }; + }; + }; +}; + +&usb0 { /* MIO52 - MIO63 */ + status = "okay"; + phy-names = "usb3-phy"; + phys = <&psgtr 1 PHY_TYPE_USB3 0 1>; +}; + +&psgtr { + status = "okay"; + /* sgmii, usb3 */ + clocks = <&si5332_1>, <&si5332_2>; + clock-names = "ref0", "ref1"; +}; + +&dwc3_0 { + status = "okay"; + dr_mode = "peripheral"; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + maximum-speed = "super-speed"; +}; + +&xilinx_ams { + status = "okay"; +}; + +&ams_ps { + status = "okay"; +}; + +&ams_pl { + status = "okay"; +}; + +&pinctrl0 { + status = "okay"; + pinctrl_i2c0_default: i2c0-default { + mux { + groups = "i2c0_8_grp"; + function = "i2c0"; + }; + + conf { + groups = "i2c0_8_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c0_gpio: i2c0-gpio-grp { + mux { + groups = "gpio0_34_grp", "gpio0_35_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_34_grp", "gpio0_35_grp"; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c1_default: i2c1-default { + mux { + groups = "i2c1_9_grp"; + function = "i2c1"; + }; + + conf { + groups = "i2c1_9_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c1_gpio: i2c1-gpio-grp { + mux { + groups = "gpio0_36_grp", "gpio0_37_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_36_grp", "gpio0_37_grp"; + slew-rate = ; + power-source = ; + }; + }; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dts @@ -40,13 +40,29 @@ &qspi { status = "okay"; flash@0 { - compatible = "m25p80", "jedec,spi-nor"; /* 32MB */ + compatible = "m25p80", "jedec,spi-nor"; /* 32MB FIXME */ #address-cells = <1>; #size-cells = <1>; reg = <0x0>; spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; spi-max-frequency = <108000000>; /* Based on DC1 spec */ + partition@0 { /* for testing purpose */ + label = "qspi-fsbl-uboot"; + reg = <0x0 0x100000>; + }; + partition@100000 { /* for testing purpose */ + label = "qspi-linux"; + reg = <0x100000 0x500000>; + }; + partition@600000 { /* for testing purpose */ + label = "qspi-device-tree"; + reg = <0x600000 0x20000>; + }; + partition@620000 { /* for testing purpose */ + label = "qspi-rootfs"; + reg = <0x620000 0x5E0000>; + }; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts @@ -48,6 +48,22 @@ spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */ spi-max-frequency = <108000000>; /* Based on DC1 spec */ + partition@0 { /* for testing purpose */ + label = "qspi-fsbl-uboot"; + reg = <0x0 0x100000>; + }; + partition@100000 { /* for testing purpose */ + label = "qspi-linux"; + reg = <0x100000 0x500000>; + }; + partition@600000 { /* for testing purpose */ + label = "qspi-device-tree"; + reg = <0x600000 0x20000>; + }; + partition@620000 { /* for testing purpose */ + label = "qspi-rootfs"; + reg = <0x620000 0x5E0000>; + }; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts @@ -148,7 +148,7 @@ }; }; - pinctrl_i2c1_gpio: i2c1-gpio { + pinctrl_i2c1_gpio: i2c1-gpio-grp { mux { groups = "gpio0_36_grp", "gpio0_37_grp"; function = "gpio0"; @@ -354,14 +354,32 @@ &qspi { status = "okay"; + num-cs = <2>; flash@0 { compatible = "m25p80", "jedec,spi-nor"; /* Micron MT25QU512ABB8ESF */ #address-cells = <1>; #size-cells = <1>; - reg = <0x0>; + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x4000000 0x4000000>; /* 64MB */ spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; spi-max-frequency = <108000000>; /* Based on DC1 spec */ + partition@0 { /* for testing purpose */ + label = "qspi-fsbl-uboot"; + reg = <0x0 0x100000>; + }; + partition@100000 { /* for testing purpose */ + label = "qspi-linux"; + reg = <0x100000 0x500000>; + }; + partition@600000 { /* for testing purpose */ + label = "qspi-device-tree"; + reg = <0x600000 0x20000>; + }; + partition@620000 { /* for testing purpose */ + label = "qspi-rootfs"; + reg = <0x620000 0x5E0000>; + }; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts @@ -141,19 +141,73 @@ reg = <0x0>; #address-cells = <0x2>; #size-cells = <0x1>; - nand-ecc-mode = "soft"; - nand-ecc-algo = "bch"; + nand-ecc-mode = "hw"; nand-rb = <0>; label = "main-storage-0"; + nand-ecc-step-size = <1024>; + nand-ecc-strength = <24>; + nand-on-flash-bbt; + + partition@0 { /* for testing purpose */ + label = "nand-fsbl-uboot"; + reg = <0x0 0x0 0x400000>; + }; + partition@1 { /* for testing purpose */ + label = "nand-linux"; + reg = <0x0 0x400000 0x1400000>; + }; + partition@2 { /* for testing purpose */ + label = "nand-device-tree"; + reg = <0x0 0x1800000 0x400000>; + }; + partition@3 { /* for testing purpose */ + label = "nand-rootfs"; + reg = <0x0 0x1c00000 0x1400000>; + }; + partition@4 { /* for testing purpose */ + label = "nand-bitstream"; + reg = <0x0 0x3000000 0x400000>; + }; + partition@5 { /* for testing purpose */ + label = "nand-misc"; + reg = <0x0 0x3400000 0xfcc00000>; + }; }; nand@1 { reg = <0x1>; #address-cells = <0x2>; #size-cells = <0x1>; - nand-ecc-mode = "soft"; - nand-ecc-algo = "bch"; + nand-ecc-mode = "hw"; nand-rb = <0>; label = "main-storage-1"; + nand-ecc-step-size = <1024>; + nand-ecc-strength = <24>; + nand-on-flash-bbt; + + partition@0 { /* for testing purpose */ + label = "nand1-fsbl-uboot"; + reg = <0x0 0x0 0x400000>; + }; + partition@1 { /* for testing purpose */ + label = "nand1-linux"; + reg = <0x0 0x400000 0x1400000>; + }; + partition@2 { /* for testing purpose */ + label = "nand1-device-tree"; + reg = <0x0 0x1800000 0x400000>; + }; + partition@3 { /* for testing purpose */ + label = "nand1-rootfs"; + reg = <0x0 0x1c00000 0x1400000>; + }; + partition@4 { /* for testing purpose */ + label = "nand1-bitstream"; + reg = <0x0 0x3000000 0x400000>; + }; + partition@5 { /* for testing purpose */ + label = "nand1-misc"; + reg = <0x0 0x3400000 0xfcc00000>; + }; }; }; @@ -219,7 +273,7 @@ }; }; - pinctrl_i2c0_gpio: i2c0-gpio { + pinctrl_i2c0_gpio: i2c0-gpio-grp { mux { groups = "gpio0_6_grp", "gpio0_7_grp"; function = "gpio0"; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts @@ -131,6 +131,79 @@ status = "okay"; arasan,has-mdma; num-cs = <2>; + + nand@0 { + reg = <0x0>; + #address-cells = <0x2>; + #size-cells = <0x1>; + nand-ecc-mode = "hw"; + nand-rb = <0>; + label = "main-storage-0"; + nand-ecc-step-size = <1024>; + nand-ecc-strength = <24>; + nand-on-flash-bbt; + + partition@0 { /* for testing purpose */ + label = "nand-fsbl-uboot"; + reg = <0x0 0x0 0x400000>; + }; + partition@1 { /* for testing purpose */ + label = "nand-linux"; + reg = <0x0 0x400000 0x1400000>; + }; + partition@2 { /* for testing purpose */ + label = "nand-device-tree"; + reg = <0x0 0x1800000 0x400000>; + }; + partition@3 { /* for testing purpose */ + label = "nand-rootfs"; + reg = <0x0 0x1C00000 0x1400000>; + }; + partition@4 { /* for testing purpose */ + label = "nand-bitstream"; + reg = <0x0 0x3000000 0x400000>; + }; + partition@5 { /* for testing purpose */ + label = "nand-misc"; + reg = <0x0 0x3400000 0xFCC00000>; + }; + }; + nand@1 { + reg = <0x1>; + #address-cells = <0x2>; + #size-cells = <0x1>; + nand-ecc-mode = "hw"; + nand-rb = <0>; + label = "main-storage-1"; + nand-ecc-step-size = <1024>; + nand-ecc-strength = <24>; + nand-on-flash-bbt; + + partition@0 { /* for testing purpose */ + label = "nand1-fsbl-uboot"; + reg = <0x0 0x0 0x400000>; + }; + partition@1 { /* for testing purpose */ + label = "nand1-linux"; + reg = <0x0 0x400000 0x1400000>; + }; + partition@2 { /* for testing purpose */ + label = "nand1-device-tree"; + reg = <0x0 0x1800000 0x400000>; + }; + partition@3 { /* for testing purpose */ + label = "nand1-rootfs"; + reg = <0x0 0x1C00000 0x1400000>; + }; + partition@4 { /* for testing purpose */ + label = "nand1-bitstream"; + reg = <0x0 0x3000000 0x400000>; + }; + partition@5 { /* for testing purpose */ + label = "nand1-misc"; + reg = <0x0 0x3400000 0xFCC00000>; + }; + }; }; &psgtr { --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts @@ -180,6 +180,22 @@ spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; /* also DUAL configuration possible */ spi-max-frequency = <108000000>; /* Based on DC1 spec */ + partition@0 { /* for testing purpose */ + label = "qspi-fsbl-uboot"; + reg = <0x0 0x100000>; + }; + partition@100000 { /* for testing purpose */ + label = "qspi-linux"; + reg = <0x100000 0x500000>; + }; + partition@600000 { /* for testing purpose */ + label = "qspi-device-tree"; + reg = <0x600000 0x20000>; + }; + partition@620000 { /* for testing purpose */ + label = "qspi-rootfs"; + reg = <0x620000 0x5E0000>; + }; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm019-dc5.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm019-dc5.dts @@ -125,7 +125,7 @@ }; }; - pinctrl_i2c0_gpio: i2c0-gpio { + pinctrl_i2c0_gpio: i2c0-gpio-grp { mux { groups = "gpio0_74_grp", "gpio0_75_grp"; function = "gpio0"; @@ -152,7 +152,7 @@ }; }; - pinctrl_i2c1_gpio: i2c1-gpio { + pinctrl_i2c1_gpio: i2c1-gpio-grp { mux { groups = "gpio0_76_grp", "gpio0_77_grp"; function = "gpio0"; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts @@ -275,7 +275,7 @@ }; }; - pinctrl_i2c1_gpio: i2c1-gpio { + pinctrl_i2c1_gpio: i2c1-gpio-grp { mux { groups = "gpio0_4_grp", "gpio0_5_grp"; function = "gpio0"; @@ -509,6 +509,9 @@ xlnx,mio-bank = <0>; non-removable; disable-wp; + no-sd; + no-sdio; + cap-mmc-hw-reset; cap-power-off-card; mmc-pwrseq = <&sdio_pwrseq>; vqmmc-supply = <&wmmcsdio_fixed>; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts @@ -603,7 +603,7 @@ reg = <0x5d>; temperature-stability = <50>; /* copy from zc702 */ factory-fout = <156250000>; - clock-frequency = <148500000>; + clock-frequency = <156250000>; clock-output-names = "si570_mgt"; }; }; @@ -611,7 +611,26 @@ #address-cells = <1>; #size-cells = <0>; reg = <4>; - /* SI5328 - u20 */ + si5328: clock-generator@69 {/* SI5328 - u20 */ + compatible = "silabs,si5328"; + reg = <0x69>; + /* + * Chip has interrupt present connected to PL + * interrupt-parent = <&>; + * interrupts = <>; + */ + #address-cells = <1>; + #size-cells = <0>; + #clock-cells = <1>; + clocks = <&refhdmi>; + clock-names = "xtal"; + clock-output-names = "si5328"; + + si5328_clk: clk0@0 { + reg = <0>; + clock-frequency = <27000000>; + }; + }; }; /* 5 - 7 unconnected */ }; @@ -689,7 +708,7 @@ }; }; - pinctrl_i2c0_gpio: i2c0-gpio { + pinctrl_i2c0_gpio: i2c0-gpio-grp { mux { groups = "gpio0_14_grp", "gpio0_15_grp"; function = "gpio0"; @@ -716,7 +735,7 @@ }; }; - pinctrl_i2c1_gpio: i2c1-gpio { + pinctrl_i2c1_gpio: i2c1-gpio-grp { mux { groups = "gpio0_16_grp", "gpio0_17_grp"; function = "gpio0"; @@ -952,14 +971,32 @@ &qspi { status = "okay"; + num-cs = <2>; flash@0 { - compatible = "m25p80", "jedec,spi-nor"; /* 16MB + 16MB */ + compatible = "m25p80", "jedec,spi-nor"; /* 32MB */ #address-cells = <1>; #size-cells = <1>; - reg = <0x0>; + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x4000000 0x4000000>; /* 64MB */ spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */ spi-max-frequency = <108000000>; /* Based on DC1 spec */ + partition@0 { /* for testing purpose */ + label = "qspi-fsbl-uboot"; + reg = <0x0 0x100000>; + }; + partition@100000 { /* for testing purpose */ + label = "qspi-linux"; + reg = <0x100000 0x500000>; + }; + partition@600000 { /* for testing purpose */ + label = "qspi-device-tree"; + reg = <0x600000 0x20000>; + }; + partition@620000 { /* for testing purpose */ + label = "qspi-rootfs"; + reg = <0x620000 0x5E0000>; + }; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts @@ -272,7 +272,7 @@ }; }; - pinctrl_i2c1_gpio: i2c1-gpio { + pinctrl_i2c1_gpio: i2c1-gpio-grp { mux { groups = "gpio0_16_grp", "gpio0_17_grp"; function = "gpio0"; @@ -447,6 +447,22 @@ spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; spi-max-frequency = <108000000>; /* Based on DC1 spec */ + partition@0 { /* for testing purpose */ + label = "qspi-fsbl-uboot"; + reg = <0x0 0x100000>; + }; + partition@100000 { /* for testing purpose */ + label = "qspi-linux"; + reg = <0x100000 0x500000>; + }; + partition@600000 { /* for testing purpose */ + label = "qspi-device-tree"; + reg = <0x600000 0x20000>; + }; + partition@620000 { /* for testing purpose */ + label = "qspi-rootfs"; + reg = <0x620000 0x5E0000>; + }; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts @@ -284,7 +284,7 @@ }; }; - pinctrl_i2c1_gpio: i2c1-gpio { + pinctrl_i2c1_gpio: i2c1-gpio-grp { mux { groups = "gpio0_16_grp", "gpio0_17_grp"; function = "gpio0"; @@ -459,6 +459,22 @@ spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; spi-max-frequency = <108000000>; /* Based on DC1 spec */ + partition@0 { /* for testing purpose */ + label = "qspi-fsbl-uboot"; + reg = <0x0 0x100000>; + }; + partition@100000 { /* for testing purpose */ + label = "qspi-linux"; + reg = <0x100000 0x500000>; + }; + partition@600000 { /* for testing purpose */ + label = "qspi-device-tree"; + reg = <0x600000 0x20000>; + }; + partition@620000 { /* for testing purpose */ + label = "qspi-rootfs"; + reg = <0x620000 0x5E0000>; + }; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts @@ -152,17 +152,6 @@ clock-frequency = <114285000>; }; - dpcon { - compatible = "dp-connector"; - label = "P11"; - type = "full-size"; - - port { - dpcon_in: endpoint { - remote-endpoint = <&dpsub_dp_out>; - }; - }; - }; }; &can1 { @@ -605,7 +594,7 @@ reg = <0x5d>; temperature-stability = <50>; /* copy from zc702 */ factory-fout = <156250000>; - clock-frequency = <148500000>; + clock-frequency = <156250000>; clock-output-names = "si570_mgt"; }; }; @@ -613,7 +602,26 @@ #address-cells = <1>; #size-cells = <0>; reg = <4>; - /* SI5328 - u20 */ + si5328: clock-generator@69 {/* SI5328 - u20 */ + compatible = "silabs,si5328"; + reg = <0x69>; + /* + * Chip has interrupt present connected to PL + * interrupt-parent = <&>; + * interrupts = <>; + */ + #address-cells = <1>; + #size-cells = <0>; + #clock-cells = <1>; + clocks = <&refhdmi>; + clock-names = "xtal"; + clock-output-names = "si5328"; + + si5328_clk: clk0@0 { + reg = <0>; + clock-frequency = <27000000>; + }; + }; }; i2c@5 { #address-cells = <1>; @@ -700,7 +708,7 @@ }; }; - pinctrl_i2c0_gpio: i2c0-gpio { + pinctrl_i2c0_gpio: i2c0-gpio-grp { mux { groups = "gpio0_14_grp", "gpio0_15_grp"; function = "gpio0"; @@ -727,7 +735,7 @@ }; }; - pinctrl_i2c1_gpio: i2c1-gpio { + pinctrl_i2c1_gpio: i2c1-gpio-grp { mux { groups = "gpio0_16_grp", "gpio0_17_grp"; function = "gpio0"; @@ -959,14 +967,32 @@ &qspi { status = "okay"; + num-cs = <2>; flash@0 { - compatible = "m25p80", "jedec,spi-nor"; /* 16MB + 16MB */ + compatible = "m25p80", "jedec,spi-nor"; /* 32MB */ #address-cells = <1>; #size-cells = <1>; - reg = <0x0>; + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x4000000 0x4000000>; /* 64MB */ spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */ spi-max-frequency = <108000000>; /* Based on DC1 spec */ + partition@0 { /* for testing purpose */ + label = "qspi-fsbl-uboot"; + reg = <0x0 0x100000>; + }; + partition@100000 { /* for testing purpose */ + label = "qspi-linux"; + reg = <0x100000 0x500000>; + }; + partition@600000 { /* for testing purpose */ + label = "qspi-device-tree"; + reg = <0x600000 0x20000>; + }; + partition@620000 { /* for testing purpose */ + label = "qspi-rootfs"; + reg = <0x620000 0x5E0000>; + }; }; }; @@ -1042,12 +1068,4 @@ phy-names = "dp-phy0", "dp-phy1"; phys = <&psgtr 1 PHY_TYPE_DP 0 3>, <&psgtr 0 PHY_TYPE_DP 1 3>; - - ports { - port@5 { - dpsub_dp_out: endpoint { - remote-endpoint = <&dpcon_in>; - }; - }; - }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts @@ -589,7 +589,7 @@ }; }; - pinctrl_i2c0_gpio: i2c0-gpio { + pinctrl_i2c0_gpio: i2c0-gpio-grp { mux { groups = "gpio0_14_grp", "gpio0_15_grp"; function = "gpio0"; @@ -616,7 +616,7 @@ }; }; - pinctrl_i2c1_gpio: i2c1-gpio { + pinctrl_i2c1_gpio: i2c1-gpio-grp { mux { groups = "gpio0_16_grp", "gpio0_17_grp"; function = "gpio0"; @@ -789,14 +789,32 @@ &qspi { status = "okay"; + num-cs = <2>; flash@0 { - compatible = "m25p80", "jedec,spi-nor"; /* 16MB + 16MB */ + compatible = "m25p80", "jedec,spi-nor"; /* 32MB */ #address-cells = <1>; #size-cells = <1>; - reg = <0x0>; + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x10000000 0x10000000>; /* 256MB */ spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */ spi-max-frequency = <108000000>; /* Based on DC1 spec */ + partition@0 { /* for testing purpose */ + label = "qspi-fsbl-uboot"; + reg = <0x0 0x100000>; + }; + partition@100000 { /* for testing purpose */ + label = "qspi-linux"; + reg = <0x100000 0x500000>; + }; + partition@600000 { /* for testing purpose */ + label = "qspi-device-tree"; + reg = <0x600000 0x20000>; + }; + partition@620000 { /* for testing purpose */ + label = "qspi-rootfs"; + reg = <0x620000 0x5E0000>; + }; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revA.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * dts file for Xilinx ZynqMP ZC1275 + * dts file for Xilinx ZynqMP ZCU1275 * * (C) Copyright 2017 - 2021, Xilinx, Inc. * @@ -15,7 +15,8 @@ / { model = "ZynqMP ZCU1275 RevA"; - compatible = "xlnx,zynqmp-zcu1275-revA", "xlnx,zynqmp-zcu1275", "xlnx,zynqmp"; + compatible = "xlnx,zynqmp-zcu1275-revA", "xlnx,zynqmp-zcu1275", + "xlnx,zynqmp"; aliases { serial0 = &uart0; @@ -45,11 +46,29 @@ &qspi { status = "okay"; flash@0 { - compatible = "m25p80", "jedec,spi-nor"; + compatible = "m25p80", "jedec,spi-nor"; /* 32MB */ + #address-cells = <1>; + #size-cells = <1>; reg = <0x0>; spi-tx-bus-width = <4>; - spi-rx-bus-width = <4>; - spi-max-frequency = <108000000>; + spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */ + spi-max-frequency = <108000000>; /* Based on DC1 spec */ + partition@0 { /* for testing purpose */ + label = "qspi-fsbl-uboot"; + reg = <0x0 0x100000>; + }; + partition@100000 { /* for testing purpose */ + label = "qspi-linux"; + reg = <0x100000 0x500000>; + }; + partition@600000 { /* for testing purpose */ + label = "qspi-device-tree"; + reg = <0x600000 0x20000>; + }; + partition@620000 { /* for testing purpose */ + label = "qspi-rootfs"; + reg = <0x620000 0x5E0000>; + }; }; }; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revB.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revB.dts @@ -0,0 +1,112 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP ZCU1275 RevB + * + * (C) Copyright 2018 - 2021, Xilinx, Inc. + * + * Michal Simek + * Siva Durga Prasad Paladugu + */ + +/dts-v1/; + +#include "zynqmp.dtsi" +#include "zynqmp-clk-ccf.dtsi" + +/ { + model = "ZynqMP ZCU1275 RevB"; + compatible = "xlnx,zynqmp-zcu1275-revB", "xlnx,zynqmp-zcu1275", + "xlnx,zynqmp"; + + aliases { + serial0 = &uart0; + serial1 = &dcc; + spi0 = &qspi; + mmc0 = &sdhci1; + ethernet0 = &gem1; + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; + }; +}; + +&dcc { + status = "okay"; +}; + +&gem1 { + status = "okay"; + mdio { + #address-cells = <1>; + #size-cells = <0>; + phy1: ethernet-phy@1 { + reg = <1>; /* KSZ9031RNXIC on AES-FMC-NETW1-G */ + rxc-skew-ps = <1800>; /* Skew control of RX_CLK pad output */ + txc-skew-ps = <1800>; /* Skew control of GTX_CLK pad input */ + txen-skew-ps = <900>; /* Skew control of TX_CTL pad input */ + rxdv-skew-ps = <0>; /* Skew control of RX_CTL pad output */ + rxd0-skew-ps = <0>; /* Skew control of RXD0 pad output */ + rxd1-skew-ps = <0>; /* Skew control of RXD1 pad output */ + rxd2-skew-ps = <0>; /* Skew control of RXD2 pad output */ + rxd3-skew-ps = <0>; /* Skew control of RXD3 pad output */ + txd0-skew-ps = <900>; /* Skew control of TXD0 pad input */ + txd1-skew-ps = <900>; /* Skew control of TXD1 pad input */ + txd2-skew-ps = <900>; /* Skew control of TXD2 pad input */ + txd3-skew-ps = <900>; /* Skew control of TXD3 pad input */ + }; + }; +}; + +&gpio { + status = "okay"; +}; + +&qspi { + status = "okay"; + flash@0 { + compatible = "m25p80", "jedec,spi-nor"; /* 32MB */ + #address-cells = <1>; + #size-cells = <1>; + reg = <0x0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + spi-max-frequency = <108000000>; /* Based on DC1 spec */ + partition@0 { /* for testing purpose */ + label = "qspi-fsbl-uboot"; + reg = <0x0 0x100000>; + }; + partition@100000 { /* for testing purpose */ + label = "qspi-linux"; + reg = <0x100000 0x500000>; + }; + partition@600000 { /* for testing purpose */ + label = "qspi-device-tree"; + reg = <0x600000 0x20000>; + }; + partition@620000 { /* for testing purpose */ + label = "qspi-rootfs"; + reg = <0x620000 0x5E0000>; + }; + }; +}; + +&uart0 { + status = "okay"; +}; + +&sdhci1 { + status = "okay"; + /* + * 1.0 revision has level shifter and this property should be + * removed for supporting UHS mode + */ + no-1-8-v; + xlnx,mio-bank = <1>; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-zcu1285-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-zcu1285-revA.dts @@ -0,0 +1,102 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP ZCU1285 RevA + * + * (C) Copyright 2018 - 2021, Xilinx, Inc. + * + * Michal Simek + * Siva Durga Prasad Paladugu + */ + +/dts-v1/; + +#include "zynqmp.dtsi" +#include "zynqmp-clk-ccf.dtsi" + +/ { + model = "ZynqMP ZCU1285 RevA"; + compatible = "xlnx,zynqmp-zcu1285-revA", "xlnx,zynqmp-zcu1285", + "xlnx,zynqmp"; + + aliases { + serial0 = &uart0; + serial1 = &dcc; + spi0 = &qspi; + mmc0 = &sdhci1; + ethernet0 = &gem1; /* EMIO */ + i2c = &i2c0; /* EMIO */ + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; + }; + +}; + +&dcc { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + clock-frequency = <400000>; + +}; + +&gem1 { + mdio { + #address-cells = <1>; + #size-cells = <0>; + phy1: ethernet-phy@1 { + reg = <1>; /* KSZ9031RNXIC on AES-FMC-NETW1-G */ + rxc-skew-ps = <1800>; /* Skew control of RX_CLK pad output */ + txc-skew-ps = <1800>; /* Skew control of GTX_CLK pad input */ + txen-skew-ps = <900>; /* Skew control of TX_CTL pad input */ + rxdv-skew-ps = <0>; /* Skew control of RX_CTL pad output */ + rxd0-skew-ps = <0>; /* Skew control of RXD0 pad output */ + rxd1-skew-ps = <0>; /* Skew control of RXD1 pad output */ + rxd2-skew-ps = <0>; /* Skew control of RXD2 pad output */ + rxd3-skew-ps = <0>; /* Skew control of RXD3 pad output */ + txd0-skew-ps = <900>; /* Skew control of TXD0 pad input */ + txd1-skew-ps = <900>; /* Skew control of TXD1 pad input */ + txd2-skew-ps = <900>; /* Skew control of TXD2 pad input */ + txd3-skew-ps = <900>; /* Skew control of TXD3 pad input */ + }; + }; +}; + +&gpio { + status = "okay"; +}; + +&qspi { + status = "okay"; + flash@0 { + compatible = "m25p80", "jedec,spi-nor"; /* 32MB */ + #address-cells = <1>; + #size-cells = <1>; + reg = <0x0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + spi-max-frequency = <108000000>; /* Based on DC1 spec */ + }; +}; + +&uart0 { + status = "okay"; +}; + +&sdhci1 { + status = "okay"; + /* + * This property should be removed for supporting UHS mode + */ + no-1-8-v; + xlnx,mio-bank = <1>; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-zcu208-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-zcu208-revA.dts @@ -0,0 +1,712 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * dts file for Xilinx ZynqMP ZCU208 + * + * (C) Copyright 2017 - 2021, Xilinx, Inc. + * + * Michal Simek + */ + +/dts-v1/; + +#include "zynqmp.dtsi" +#include "zynqmp-clk-ccf.dtsi" +#include +#include +#include +#include + +/ { + model = "ZynqMP ZCU208 RevA"; + compatible = "xlnx,zynqmp-zcu208-revA", "xlnx,zynqmp-zcu208", "xlnx,zynqmp"; + + aliases { + ethernet0 = &gem3; + i2c0 = &i2c0; + i2c1 = &i2c1; + mmc0 = &sdhci1; + nvmem0 = &eeprom; + rtc0 = &rtc; + serial0 = &uart0; + serial1 = &dcc; + spi0 = &qspi; + usb0 = &usb0; + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + autorepeat; + switch-19 { + label = "sw19"; + gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; + linux,code = ; + wakeup-source; + autorepeat; + }; + }; + + leds { + compatible = "gpio-leds"; + heartbeat-led { + label = "heartbeat"; + gpios = <&gpio 23 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; + + ina226-vccint { + compatible = "iio-hwmon"; + io-channels = <&vccint 0>, <&vccint 1>, <&vccint 2>, <&vccint 3>; + }; + ina226-vccint-io-bram-ps { + compatible = "iio-hwmon"; + io-channels = <&vccint_io_bram_ps 0>, <&vccint_io_bram_ps 1>, <&vccint_io_bram_ps 2>, <&vccint_io_bram_ps 3>; + }; + ina226-vcc1v8 { + compatible = "iio-hwmon"; + io-channels = <&vcc1v8 0>, <&vcc1v8 1>, <&vcc1v8 2>, <&vcc1v8 3>; + }; + ina226-vcc1v2 { + compatible = "iio-hwmon"; + io-channels = <&vcc1v2 0>, <&vcc1v2 1>, <&vcc1v2 2>, <&vcc1v2 3>; + }; + ina226-vadj-fmc { + compatible = "iio-hwmon"; + io-channels = <&vadj_fmc 0>, <&vadj_fmc 1>, <&vadj_fmc 2>, <&vadj_fmc 3>; + }; + ina226-mgtavcc { + compatible = "iio-hwmon"; + io-channels = <&mgtavcc 0>, <&mgtavcc 1>, <&mgtavcc 2>, <&mgtavcc 3>; + }; + ina226-mgt1v2 { + compatible = "iio-hwmon"; + io-channels = <&mgt1v2 0>, <&mgt1v2 1>, <&mgt1v2 2>, <&mgt1v2 3>; + }; + ina226-mgt1v8 { + compatible = "iio-hwmon"; + io-channels = <&mgt1v8 0>, <&mgt1v8 1>, <&mgt1v8 2>, <&mgt1v8 3>; + }; + ina226-vccint-ams { + compatible = "iio-hwmon"; + io-channels = <&vccint_ams 0>, <&vccint_ams 1>, <&vccint_ams 2>, <&vccint_ams 3>; + }; + ina226-dac-avtt { + compatible = "iio-hwmon"; + io-channels = <&dac_avtt 0>, <&dac_avtt 1>, <&dac_avtt 2>, <&dac_avtt 3>; + }; + ina226-dac-avccaux { + compatible = "iio-hwmon"; + io-channels = <&dac_avccaux 0>, <&dac_avccaux 1>, <&dac_avccaux 2>, <&dac_avccaux 3>; + }; + ina226-adc-avcc { + compatible = "iio-hwmon"; + io-channels = <&adc_avcc 0>, <&adc_avcc 1>, <&adc_avcc 2>, <&adc_avcc 3>; + }; + ina226-adc-avccaux { + compatible = "iio-hwmon"; + io-channels = <&adc_avccaux 0>, <&adc_avccaux 1>, <&adc_avccaux 2>, <&adc_avccaux 3>; + }; + ina226-dac-avcc { + compatible = "iio-hwmon"; + io-channels = <&dac_avcc 0>, <&dac_avcc 1>, <&dac_avcc 2>, <&dac_avcc 3>; + }; + + /* 48MHz reference crystal */ + ref48: ref48M { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <48000000>; + }; +}; + +&dcc { + status = "okay"; +}; + +&fpd_dma_chan1 { + status = "okay"; +}; + +&fpd_dma_chan2 { + status = "okay"; +}; + +&fpd_dma_chan3 { + status = "okay"; +}; + +&fpd_dma_chan4 { + status = "okay"; +}; + +&fpd_dma_chan5 { + status = "okay"; +}; + +&fpd_dma_chan6 { + status = "okay"; +}; + +&fpd_dma_chan7 { + status = "okay"; +}; + +&fpd_dma_chan8 { + status = "okay"; +}; + +&gem3 { + status = "okay"; + phy-handle = <&phy0>; + phy-mode = "rgmii-id"; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + phy0: ethernet-phy@c { + #phy-cells = <1>; + compatible = "ethernet-phy-id2000.a231"; + reg = <0xc>; + ti,rx-internal-delay = <0x8>; + ti,tx-internal-delay = <0xa>; + ti,fifo-depth = <0x1>; + ti,dp83867-rxctrl-strap-quirk; + reset-gpios = <&tca6416_u15 6 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&gpio { + status = "okay"; + gpio-line-names = "QSPI_LWR_CLK", "QSPI_LWR_DQ1", "QSPI_LWR_DQ2", "QSPI_LWR_DQ3", "QSPI_LWR_DQ0", /* 0 - 4 */ + "QSPI_LWR_CS_B", "", "QSPI_UPR_CS_B", "QSPI_UPR_DQ0", "QSPI_UPR_DQ1", /* 5 - 9 */ + "QSPI_UPR_DQ2", "QSPI_UPR_DQ3", "QSPI_UPR_CLK", "PS_GPIO2", "I2C0_SCL", /* 10 - 14 */ + "I2C0_SDA", "I2C1_SCL", "I2C1_SDA", "UART0_TXD", "UART0_RXD", /* 15 - 19 */ + "", "", "BUTTON", "LED", "", /* 20 - 24 */ + "", "PMU_INPUT", "", "", "", /* 25 - 29 */ + "", "", "PMU_GPO0", "PMU_GPO1", "PMU_GPO2", /* 30 - 34 */ + "PMU_GPO3", "PMU_GPO4", "PMU_GPO5", "PS_GPIO1", "SDIO_SEL", /* 35 - 39 */ + "SDIO_DIR_CMD", "SDIO_DIR_DAT0", "SDIO_DIR_DAT1", "", "", /* 40 - 44 */ + "SDIO_DETECT", "SDIO_DAT0", "SDIO_DAT1", "SDIO_DAT2", "SDIO_DAT3", /* 45 - 49 */ + "SDIO_CMD", "SDIO_CLK", "USB_CLK", "USB_DIR", "USB_DATA2", /* 50 - 54 */ + "USB_NXT", "USB_DATA0", "USB_DATA1", "USB_STP", "USB_DATA3", /* 55 - 59 */ + "USB_DATA4", "USB_DATA5", "USB_DATA6", "USB_DATA7", "ENET_TX_CLK", /* 60 - 64 */ + "ENET_TX_D0", "ENET_TX_D1", "ENET_TX_D2", "ENET_TX_D3", "ENET_TX_CTRL", /* 65 - 69 */ + "ENET_RX_CLK", "ENET_RX_D0", "ENET_RX_D1", "ENET_RX_D2", "ENET_RX_D3", /* 70 - 74 */ + "ENET_RX_CTRL", "ENET_MDC", "ENET_MDIO", /* 75 - 77, MIO end and EMIO start */ + "", "", /* 78 - 79 */ + "", "", "", "", "", /* 80 - 84 */ + "", "", "", "", "", /* 85 -89 */ + "", "", "", "", "", /* 90 - 94 */ + "", "", "", "", "", /* 95 - 99 */ + "", "", "", "", "", /* 100 - 104 */ + "", "", "", "", "", /* 105 - 109 */ + "", "", "", "", "", /* 110 - 114 */ + "", "", "", "", "", /* 115 - 119 */ + "", "", "", "", "", /* 120 - 124 */ + "", "", "", "", "", /* 125 - 129 */ + "", "", "", "", "", /* 130 - 134 */ + "", "", "", "", "", /* 135 - 139 */ + "", "", "", "", "", /* 140 - 144 */ + "", "", "", "", "", /* 145 - 149 */ + "", "", "", "", "", /* 150 - 154 */ + "", "", "", "", "", /* 155 - 159 */ + "", "", "", "", "", /* 160 - 164 */ + "", "", "", "", "", /* 165 - 169 */ + "", "", "", ""; /* 170 - 173 */ +}; + +&i2c0 { + status = "okay"; + clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c0_default>; + pinctrl-1 = <&pinctrl_i2c0_gpio>; + scl-gpios = <&gpio 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + + tca6416_u15: gpio@20 { /* u15 */ + compatible = "ti,tca6416"; + reg = <0x20>; + gpio-controller; /* interrupt not connected */ + #gpio-cells = <2>; + gpio-line-names = "MAX6643_OT_B", "MAX6643_FANFAIL_B", "MIO26_PMU_INPUT_LS", "DAC_AVTT_VOUT_SEL", /* 0 - 3 */ + "", "IIC_MUX_RESET_B", "GEM3_EXP_RESET_B", "MAX6643_FULL_SPEED", /* 4 - 7 */ + "FMCP_HSPC_PRSNT_M2C_B", "", "", "VCCINT_VRHOT_B", /* 10 - 13 */ + "", "8A34001_EXP_RST_B", "IRPS5401_ALERT_B", "INA226_PMBUS_ALERT"; /* 14 - 17 */ + }; + + i2c-mux@75 { /* u17 */ + compatible = "nxp,pca9544"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x75>; + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* PS_PMBUS */ + /* PMBUS_ALERT done via pca9544 */ + vccint: ina226@40 { /* u65 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vccint"; + reg = <0x40>; + shunt-resistor = <5000>; + }; + vccint_io_bram_ps: ina226@41 { /* u57 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vccint-io-bram-ps"; + reg = <0x41>; + shunt-resistor = <5000>; + }; + vcc1v8: ina226@42 { /* u60 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcc1v8"; + reg = <0x42>; + shunt-resistor = <2000>; + }; + vcc1v2: ina226@43 { /* u58 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcc1v2"; + reg = <0x43>; + shunt-resistor = <5000>; + }; + vadj_fmc: ina226@45 { /* u62 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vadj-fmc"; + reg = <0x45>; + shunt-resistor = <5000>; + }; + mgtavcc: ina226@46 { /* u67 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-mgtavcc"; + reg = <0x46>; + shunt-resistor = <2000>; + }; + mgt1v2: ina226@47 { /* u63 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-mgt1v2"; + reg = <0x47>; + shunt-resistor = <5000>; + }; + mgt1v8: ina226@48 { /* u64 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-mgt1v8"; + reg = <0x48>; + shunt-resistor = <5000>; + }; + vccint_ams: ina226@49 { /* u61 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vccint-ams"; + reg = <0x49>; + shunt-resistor = <5000>; + }; + dac_avtt: ina226@4a { /* u59 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-dac-avtt"; + reg = <0x4a>; + shunt-resistor = <5000>; + }; + dac_avccaux: ina226@4b { /* u124 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-dac-avccaux"; + reg = <0x4b>; + shunt-resistor = <5000>; + }; + adc_avcc: ina226@4c { /* u75 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-adc-avcc"; + reg = <0x4c>; + shunt-resistor = <5000>; + }; + adc_avccaux: ina226@4d { /* u71 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-adc-avccaux"; + reg = <0x4d>; + shunt-resistor = <5000>; + }; + dac_avcc: ina226@4e { /* u77 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-dac-avcc"; + reg = <0x4e>; + shunt-resistor = <5000>; + }; + }; + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* NC */ + }; + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* u104 - ir35215 0x10/0x40 */ + /* u127 - ir38164 0x1b/0x4b */ + /* u112 - ir38164 0x13/0x43 */ + /* u123 - ir38164 0x1c/0x4c */ + + irps5401_44: irps5401@44 { /* IRPS5401 - u53 */ + compatible = "infineon,irps5401"; + reg = <0x44>; /* i2c addr 0x14 */ + }; + irps5401_45: irps5401@45 { /* IRPS5401 - u55 */ + compatible = "infineon,irps5401"; + reg = <0x45>; /* i2c addr 0x15 */ + }; + /* J21 header too */ + + }; + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* SYSMON */ + }; + }; + /* u38 MPS430 */ +}; + +&i2c1 { + status = "okay"; + clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1_default>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + + i2c-mux@74 { + compatible = "nxp,pca9548"; /* u20 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + i2c-mux-idle-disconnect; + /* FIXME reset-gpios = <&tca6416_u15 SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */ + i2c_eeprom: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* + * IIC_EEPROM 1kB memory which uses 256B blocks + * where every block has different address. + * 0 - 256B address 0x54 + * 256B - 512B address 0x55 + * 512B - 768B address 0x56 + * 768B - 1024B address 0x57 + */ + eeprom: eeprom@54 { /* u21 */ + compatible = "atmel,24c128"; + reg = <0x54>; + }; + }; + i2c_si5341: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + si5341: clock-generator@36 { /* SI5341 - u43 */ + compatible = "silabs,si5341"; + reg = <0x36>; + #clock-cells = <2>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&ref48>; + clock-names = "xtal"; + clock-output-names = "si5341"; + + si5341_2: out@2 { + /* refclk2 for PS-GT, used for USB3 */ + reg = <2>; + always-on; + }; + si5341_3: out@3 { + /* refclk3 for PS-GT, used for SATA */ + reg = <3>; + always-on; + }; + si5341_5: out@5 { + /* refclk5 PL CLK100 */ + reg = <5>; + always-on; + }; + si5341_6: out@6 { + /* refclk6 PL CLK125 */ + reg = <6>; + always-on; + }; + si5341_9: out@9 { + /* refclk9 used for PS_REF_CLK 33.3 MHz */ + reg = <9>; + always-on; + }; + }; + }; + i2c_si570_user_c0: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + si570_1: clock-generator@5d { /* USER C0 SI570 - u47 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; + temperature-stability = <50>; + factory-fout = <300000000>; + clock-frequency = <300000000>; + clock-output-names = "si570_user_c0"; + }; + }; + i2c_si570_mgt: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + si570_2: clock-generator@5d { /* USER MGT SI570 - u48 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; + temperature-stability = <50>; + factory-fout = <156250000>; + clock-frequency = <156250000>; + clock-output-names = "si570_mgt"; + }; + }; + i2c_8a34001: i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + idt_8a34001: phc@5b { + compatible = "idt,8a34001"; /* u409B */ + reg = <0x5b>; + }; + }; + i2c_clk104: i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + /* CLK104_SDA */ + }; + i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + /* RFMCP connector */ + }; + /* 7 NC */ + }; + + i2c-mux@75 { + compatible = "nxp,pca9548"; /* u22 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0x75>; + i2c-mux-idle-disconnect; + /* FIXME reset-gpios = <&tca6416_u15 SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */ + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* FMCP_HSPC_IIC */ + }; + i2c_si570_user_c1: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + si570_3: clock-generator@5d { /* USER C1 SI570 - u130 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; + temperature-stability = <50>; + factory-fout = <300000000>; + clock-frequency = <300000000>; + clock-output-names = "si570_user_c1"; + }; + }; + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* SYSMON */ + }; + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* DDR4 SODIMM */ + }; + i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + /* SFP3 */ + }; + i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + /* SFP2 */ + }; + i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + /* SFP1 */ + }; + i2c@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + /* SFP0 */ + }; + }; + /* MSP430 */ +}; + +&pinctrl0 { + status = "okay"; + pinctrl_i2c0_default: i2c0-default { + mux { + groups = "i2c0_3_grp"; + function = "i2c0"; + }; + + conf { + groups = "i2c0_3_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c0_gpio: i2c0-gpio-grp { + mux { + groups = "gpio0_14_grp", "gpio0_15_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_14_grp", "gpio0_15_grp"; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c1_default: i2c1-default { + mux { + groups = "i2c1_4_grp"; + function = "i2c1"; + }; + + conf { + groups = "i2c1_4_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c1_gpio: i2c1-gpio-grp { + mux { + groups = "gpio0_16_grp", "gpio0_17_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_16_grp", "gpio0_17_grp"; + slew-rate = ; + power-source = ; + }; + }; +}; + +&qspi { + status = "okay"; + num-cs = <2>; + flash@0 { + compatible = "m25p80", "jedec,spi-nor"; /* U11 and U12 MT25QU02GCBBE12 1Gb */ + #address-cells = <1>; + #size-cells = <1>; + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x10000000 0x10000000>; /* 256MB */ + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */ + spi-max-frequency = <108000000>; /* Based on DC1 spec */ + }; +}; + +&psgtr { + status = "okay"; + /* nc, nc, usb3, sata */ + clocks = <&si5341 0 2>, <&si5341 0 3>; + clock-names = "ref2", "ref3"; +}; + +&rtc { + status = "okay"; +}; + +&sata { + status = "okay"; + /* SATA OOB timing settings */ + ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>; + ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; + ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; + ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>; + ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>; + ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; + ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; + ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>; + phy-names = "sata-phy"; + phys = <&psgtr 3 PHY_TYPE_SATA 1 3>; +}; + +/* SD1 with level shifter */ +&sdhci1 { + status = "okay"; + disable-wp; + /* + * This property should be removed for supporting UHS mode + */ + no-1-8-v; + xlnx,mio-bank = <1>; +}; + +&uart0 { + status = "okay"; +}; + +/* ULPI SMSC USB3320 */ +&usb0 { + status = "okay"; + phy-names = "usb3-phy"; + phys = <&psgtr 2 PHY_TYPE_USB3 0 2>; +}; + +&dwc3_0 { + status = "okay"; + dr_mode = "host"; + snps,usb3_lpm_capable; + maximum-speed = "super-speed"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-zcu216-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-zcu216-revA.dts @@ -0,0 +1,715 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * dts file for Xilinx ZynqMP ZCU216 + * + * (C) Copyright 2017 - 2021, Xilinx, Inc. + * + * Michal Simek + */ + +/dts-v1/; + +#include "zynqmp.dtsi" +#include "zynqmp-clk-ccf.dtsi" +#include +#include +#include +#include + +/ { + model = "ZynqMP ZCU216 RevA"; + compatible = "xlnx,zynqmp-zcu216-revA", "xlnx,zynqmp-zcu216", "xlnx,zynqmp"; + + aliases { + ethernet0 = &gem3; + i2c0 = &i2c0; + i2c1 = &i2c1; + mmc0 = &sdhci1; + nvmem0 = &eeprom; + rtc0 = &rtc; + serial0 = &uart0; + serial1 = &dcc; + spi0 = &qspi; + usb0 = &usb0; + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + autorepeat; + switch-19 { + label = "sw19"; + gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; + linux,code = ; + wakeup-source; + autorepeat; + }; + }; + + leds { + compatible = "gpio-leds"; + heartbeat-led { + label = "heartbeat"; + gpios = <&gpio 23 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; + + ina226-vccint { + compatible = "iio-hwmon"; + io-channels = <&vccint 0>, <&vccint 1>, <&vccint 2>, <&vccint 3>; + }; + ina226-vccint-io-bram-ps { + compatible = "iio-hwmon"; + io-channels = <&vccint_io_bram_ps 0>, <&vccint_io_bram_ps 1>, <&vccint_io_bram_ps 2>, <&vccint_io_bram_ps 3>; + }; + ina226-vcc1v8 { + compatible = "iio-hwmon"; + io-channels = <&vcc1v8 0>, <&vcc1v8 1>, <&vcc1v8 2>, <&vcc1v8 3>; + }; + ina226-vcc1v2 { + compatible = "iio-hwmon"; + io-channels = <&vcc1v2 0>, <&vcc1v2 1>, <&vcc1v2 2>, <&vcc1v2 3>; + }; + ina226-vadj-fmc { + compatible = "iio-hwmon"; + io-channels = <&vadj_fmc 0>, <&vadj_fmc 1>, <&vadj_fmc 2>, <&vadj_fmc 3>; + }; + ina226-mgtavcc { + compatible = "iio-hwmon"; + io-channels = <&mgtavcc 0>, <&mgtavcc 1>, <&mgtavcc 2>, <&mgtavcc 3>; + }; + ina226-mgt1v2 { + compatible = "iio-hwmon"; + io-channels = <&mgt1v2 0>, <&mgt1v2 1>, <&mgt1v2 2>, <&mgt1v2 3>; + }; + ina226-mgt1v8 { + compatible = "iio-hwmon"; + io-channels = <&mgt1v8 0>, <&mgt1v8 1>, <&mgt1v8 2>, <&mgt1v8 3>; + }; + ina226-vccint-ams { + compatible = "iio-hwmon"; + io-channels = <&vccint_ams 0>, <&vccint_ams 1>, <&vccint_ams 2>, <&vccint_ams 3>; + }; + ina226-dac-avtt { + compatible = "iio-hwmon"; + io-channels = <&dac_avtt 0>, <&dac_avtt 1>, <&dac_avtt 2>, <&dac_avtt 3>; + }; + ina226-dac-avccaux { + compatible = "iio-hwmon"; + io-channels = <&dac_avccaux 0>, <&dac_avccaux 1>, <&dac_avccaux 2>, <&dac_avccaux 3>; + }; + ina226-adc-avcc { + compatible = "iio-hwmon"; + io-channels = <&adc_avcc 0>, <&adc_avcc 1>, <&adc_avcc 2>, <&adc_avcc 3>; + }; + ina226-adc-avccaux { + compatible = "iio-hwmon"; + io-channels = <&adc_avccaux 0>, <&adc_avccaux 1>, <&adc_avccaux 2>, <&adc_avccaux 3>; + }; + ina226-dac-avcc { + compatible = "iio-hwmon"; + io-channels = <&dac_avcc 0>, <&dac_avcc 1>, <&dac_avcc 2>, <&dac_avcc 3>; + }; + + /* 48MHz reference crystal */ + ref48: ref48M { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <48000000>; + }; +}; + +&psgtr { + status = "okay"; + /* nc, nc, usb3, sata */ + clocks = <&si5341 0 2>, <&si5341 0 3>; + clock-names = "ref2", "ref3"; +}; + +&dcc { + status = "okay"; +}; + +&fpd_dma_chan1 { + status = "okay"; +}; + +&fpd_dma_chan2 { + status = "okay"; +}; + +&fpd_dma_chan3 { + status = "okay"; +}; + +&fpd_dma_chan4 { + status = "okay"; +}; + +&fpd_dma_chan5 { + status = "okay"; +}; + +&fpd_dma_chan6 { + status = "okay"; +}; + +&fpd_dma_chan7 { + status = "okay"; +}; + +&fpd_dma_chan8 { + status = "okay"; +}; + +&gem3 { + status = "okay"; + phy-handle = <&phy0>; + phy-mode = "rgmii-id"; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + phy0: ethernet-phy@c { + #phy-cells = <1>; + compatible = "ethernet-phy-id2000.a231"; + reg = <0xc>; + ti,rx-internal-delay = <0x8>; + ti,tx-internal-delay = <0xa>; + ti,fifo-depth = <0x1>; + ti,dp83867-rxctrl-strap-quirk; + reset-gpios = <&tca6416_u15 6 GPIO_ACTIVE_LOW>; + }; + }; +}; +&gpio { + status = "okay"; + gpio-line-names = "QSPI_LWR_CLK", "QSPI_LWR_DQ1", "QSPI_LWR_DQ2", "QSPI_LWR_DQ3", "QSPI_LWR_DQ0", /* 0 - 4 */ + "QSPI_LWR_CS_B", "", "QSPI_UPR_CS_B", "QSPI_UPR_DQ0", "QSPI_UPR_DQ1", /* 5 - 9 */ + "QSPI_UPR_DQ2", "QSPI_UPR_DQ3", "QSPI_UPR_CLK", "PS_GPIO2", "I2C0_SCL", /* 10 - 14 */ + "I2C0_SDA", "I2C1_SCL", "I2C1_SDA", "UART0_TXD", "UART0_RXD", /* 15 - 19 */ + "", "", "BUTTON", "LED", "", /* 20 - 24 */ + "", "PMU_INPUT", "", "", "", /* 25 - 29 */ + "", "", "PMU_GPO0", "PMU_GPO1", "PMU_GPO2", /* 30 - 34 */ + "PMU_GPO3", "PMU_GPO4", "PMU_GPO5", "PS_GPIO1", "SDIO_SEL", /* 35 - 39 */ + "SDIO_DIR_CMD", "SDIO_DIR_DAT0", "SDIO_DIR_DAT1", "", "", /* 40 - 44 */ + "SDIO_DETECT", "SDIO_DAT0", "SDIO_DAT1", "SDIO_DAT2", "SDIO_DAT3", /* 45 - 49 */ + "SDIO_CMD", "SDIO_CLK", "USB_CLK", "USB_DIR", "USB_DATA2", /* 50 - 54 */ + "USB_NXT", "USB_DATA0", "USB_DATA1", "USB_STP", "USB_DATA3", /* 55 - 59 */ + "USB_DATA4", "USB_DATA5", "USB_DATA6", "USB_DATA7", "ENET_TX_CLK", /* 60 - 64 */ + "ENET_TX_D0", "ENET_TX_D1", "ENET_TX_D2", "ENET_TX_D3", "ENET_TX_CTRL", /* 65 - 69 */ + "ENET_RX_CLK", "ENET_RX_D0", "ENET_RX_D1", "ENET_RX_D2", "ENET_RX_D3", /* 70 - 74 */ + "ENET_RX_CTRL", "ENET_MDC", "ENET_MDIO", /* 75 - 77, MIO end and EMIO start */ + "", "", /* 78 - 79 */ + "", "", "", "", "", /* 80 - 84 */ + "", "", "", "", "", /* 85 -89 */ + "", "", "", "", "", /* 90 - 94 */ + "", "", "", "", "", /* 95 - 99 */ + "", "", "", "", "", /* 100 - 104 */ + "", "", "", "", "", /* 105 - 109 */ + "", "", "", "", "", /* 110 - 114 */ + "", "", "", "", "", /* 115 - 119 */ + "", "", "", "", "", /* 120 - 124 */ + "", "", "", "", "", /* 125 - 129 */ + "", "", "", "", "", /* 130 - 134 */ + "", "", "", "", "", /* 135 - 139 */ + "", "", "", "", "", /* 140 - 144 */ + "", "", "", "", "", /* 145 - 149 */ + "", "", "", "", "", /* 150 - 154 */ + "", "", "", "", "", /* 155 - 159 */ + "", "", "", "", "", /* 160 - 164 */ + "", "", "", "", "", /* 165 - 169 */ + "", "", "", ""; /* 170 - 173 */ +}; + +&gpu { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c0_default>; + pinctrl-1 = <&pinctrl_i2c0_gpio>; + scl-gpios = <&gpio 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + + tca6416_u15: gpio@20 { /* u15 */ + compatible = "ti,tca6416"; + reg = <0x20>; + gpio-controller; /* interrupt not connected */ + #gpio-cells = <2>; + gpio-line-names = "MAX6643_OT_B", "MAX6643_FANFAIL_B", "MIO26_PMU_INPUT_LS", "", /* 0 - 3 */ + "", "IIC_MUX_RESET_B", "GEM3_EXP_RESET_B", "MAX6643_FULL_SPEED", /* 4 - 7 */ + "FMCP_HSPC_PRSNT_M2C_B", "", "", "VCCINT_VRHOT_B", /* 10 - 13 */ + "", "8A34001_EXP_RST_B", "IRPS5401_ALERT_B", "INA226_PMBUS_ALERT"; /* 14 - 17 */ + }; + + i2c-mux@75 { /* u17 */ + compatible = "nxp,pca9544"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x75>; + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* PS_PMBUS */ + /* PMBUS_ALERT done via pca9544 */ + vccint: ina226@40 { /* u65 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vccint"; + reg = <0x40>; + shunt-resistor = <5000>; + }; + vccint_io_bram_ps: ina226@41 { /* u57 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vccint-io-bram-ps"; + reg = <0x41>; + shunt-resistor = <5000>; + }; + vcc1v8: ina226@42 { /* u60 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcc1v8"; + reg = <0x42>; + shunt-resistor = <2000>; + }; + vcc1v2: ina226@43 { /* u58 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcc1v2"; + reg = <0x43>; + shunt-resistor = <5000>; + }; + vadj_fmc: ina226@45 { /* u62 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vadj-fmc"; + reg = <0x45>; + shunt-resistor = <5000>; + }; + mgtavcc: ina226@46 { /* u67 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-mgtavcc"; + reg = <0x46>; + shunt-resistor = <2000>; + }; + mgt1v2: ina226@47 { /* u63 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-mgt1v2"; + reg = <0x47>; + shunt-resistor = <5000>; + }; + mgt1v8: ina226@48 { /* u64 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-mgt1v8"; + reg = <0x48>; + shunt-resistor = <5000>; + }; + vccint_ams: ina226@49 { /* u61 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vccint-ams"; + reg = <0x49>; + shunt-resistor = <5000>; + }; + dac_avtt: ina226@4a { /* u59 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-dac-avtt"; + reg = <0x4a>; + shunt-resistor = <5000>; + }; + dac_avccaux: ina226@4b { /* u124 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-dac-avccaux"; + reg = <0x4b>; + shunt-resistor = <5000>; + }; + adc_avcc: ina226@4c { /* u75 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-adc-avcc"; + reg = <0x4c>; + shunt-resistor = <5000>; + }; + adc_avccaux: ina226@4d { /* u71 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-adc-avccaux"; + reg = <0x4d>; + shunt-resistor = <5000>; + }; + dac_avcc: ina226@4e { /* u77 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-dac-avcc"; + reg = <0x4e>; + shunt-resistor = <5000>; + }; + }; + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* NC */ + }; + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* u104 - ir35215 0x10/0x40 */ + /* u127 - ir38164 0x1b/0x4b */ + /* u112 - ir38164 0x13/0x43 */ + /* u123 - ir38164 0x1c/0x4c */ + + irps5401_44: irps5401@44 { /* IRPS5401 - u53 */ + compatible = "infineon,irps5401"; + reg = <0x44>; /* i2c addr 0x14 */ + }; + irps5401_45: irps5401@45 { /* IRPS5401 - u55 */ + compatible = "infineon,irps5401"; + reg = <0x45>; /* i2c addr 0x15 */ + }; + /* J21 header too */ + + }; + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* SYSMON */ + }; + }; + /* u38 MPS430 */ +}; + +&i2c1 { + status = "okay"; + clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1_default>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + + i2c-mux@74 { + compatible = "nxp,pca9548"; /* u20 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + i2c-mux-idle-disconnect; + /* FIXME reset-gpios = <&tca6416_u15 SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */ + i2c_eeprom: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* + * IIC_EEPROM 1kB memory which uses 256B blocks + * where every block has different address. + * 0 - 256B address 0x54 + * 256B - 512B address 0x55 + * 512B - 768B address 0x56 + * 768B - 1024B address 0x57 + */ + eeprom: eeprom@54 { /* u21 */ + compatible = "atmel,24c128"; + reg = <0x54>; + }; + }; + i2c_si5341: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + si5341: clock-generator@36 { /* SI5341 - u43 */ + compatible = "silabs,si5341"; + reg = <0x36>; + #clock-cells = <2>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&ref48>; + clock-names = "xtal"; + clock-output-names = "si5341"; + + si5341_2: out@2 { + /* refclk2 for PS-GT, used for USB3 */ + reg = <2>; + always-on; + }; + si5341_3: out@3 { + /* refclk3 for PS-GT, used for SATA */ + reg = <3>; + always-on; + }; + si5341_5: out@5 { + /* refclk5 PL CLK100 */ + reg = <5>; + always-on; + }; + si5341_6: out@6 { + /* refclk6 PL CLK125 */ + reg = <6>; + always-on; + }; + si5341_9: out@9 { + /* refclk9 used for PS_REF_CLK 33.3 MHz */ + reg = <9>; + always-on; + }; + }; + }; + i2c_si570_user_c0: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + si570_1: clock-generator@5d { /* USER C0 SI570 - u47 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; + temperature-stability = <50>; + factory-fout = <300000000>; + clock-frequency = <300000000>; + clock-output-names = "si570_user_c0"; + }; + }; + i2c_si570_mgt: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + si570_2: clock-generator@5d { /* USER MGT SI570 - u48 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; + temperature-stability = <50>; + factory-fout = <156250000>; + clock-frequency = <156250000>; + clock-output-names = "si570_mgt"; + }; + }; + i2c_8a34001: i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + idt_8a34001: phc@5b { + compatible = "idt,8a34001"; /* u409B */ + reg = <0x5b>; + }; + }; + i2c_clk104: i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + /* CLK104_SDA */ + }; + i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + /* RFMCP connector */ + }; + /* 7 NC */ + }; + + i2c-mux@75 { + compatible = "nxp,pca9548"; /* u22 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0x75>; + i2c-mux-idle-disconnect; + /* FIXME reset-gpios = <&tca6416_u15 SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */ + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* FMCP_HSPC_IIC */ + }; + i2c_si570_user_c1: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + si570_3: clock-generator@5d { /* USER C1 SI570 - u130 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; + temperature-stability = <50>; + factory-fout = <300000000>; + clock-frequency = <300000000>; + clock-output-names = "si570_user_c1"; + }; + }; + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* SYSMON */ + }; + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* DDR4 SODIMM */ + }; + i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + /* SFP3 */ + }; + i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + /* SFP2 */ + }; + i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + /* SFP1 */ + }; + i2c@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + /* SFP0 */ + }; + }; + /* MSP430 */ +}; + +&pinctrl0 { + status = "okay"; + pinctrl_i2c0_default: i2c0-default { + mux { + groups = "i2c0_3_grp"; + function = "i2c0"; + }; + + conf { + groups = "i2c0_3_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c0_gpio: i2c0-gpio-grp { + mux { + groups = "gpio0_14_grp", "gpio0_15_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_14_grp", "gpio0_15_grp"; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c1_default: i2c1-default { + mux { + groups = "i2c1_4_grp"; + function = "i2c1"; + }; + + conf { + groups = "i2c1_4_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c1_gpio: i2c1-gpio-grp { + mux { + groups = "gpio0_16_grp", "gpio0_17_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_16_grp", "gpio0_17_grp"; + slew-rate = ; + power-source = ; + }; + }; +}; + +&qspi { + status = "okay"; + num-cs = <2>; + flash@0 { + compatible = "m25p80", "jedec,spi-nor"; /* U11 and U12 MT25QU02GCBBE12 1Gb */ + #address-cells = <1>; + #size-cells = <1>; + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x10000000 0x10000000>; /* 256MB */ + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */ + spi-max-frequency = <108000000>; /* Based on DC1 spec */ + }; +}; + +&rtc { + status = "okay"; +}; + +&sata { + status = "okay"; + /* SATA OOB timing settings */ + ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>; + ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; + ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; + ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>; + ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>; + ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; + ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; + ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>; + phy-names = "sata-phy"; + phys = <&psgtr 3 PHY_TYPE_SATA 1 3>; +}; + +/* SD1 with level shifter */ +&sdhci1 { + status = "okay"; + disable-wp; + /* + * This property should be removed for supporting UHS mode + */ + no-1-8-v; + xlnx,mio-bank = <1>; +}; + +&uart0 { + status = "okay"; +}; + +/* ULPI SMSC USB3320 */ +&usb0 { + status = "okay"; + phy-names = "usb3-phy"; + phys = <&psgtr 2 PHY_TYPE_USB3 0 2>; +}; + +&dwc3_0 { + status = "okay"; + dr_mode = "host"; + snps,usb3_lpm_capable; + maximum-speed = "super-speed"; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-zcu670-revA.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-zcu670-revA.dts @@ -0,0 +1,669 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP ZCU670 (67DR) + * + * (C) Copyright 2017 - 2022, Xilinx, Inc. + * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +/dts-v1/; + +#include "zynqmp.dtsi" +#include "zynqmp-clk-ccf.dtsi" +#include +#include +#include +#include + +/ { + model = "ZynqMP ZCU670 RevA"; + compatible = "xlnx,zynqmp-zcu670-revA", "xlnx,zynqmp-zcu670", + "xlnx,zynqmp"; + + aliases { + ethernet0 = &gem3; + i2c0 = &i2c0; + i2c1 = &i2c1; + mmc0 = &sdhci1; + nvmem0 = &eeprom; + rtc0 = &rtc; + serial0 = &uart0; + serial1 = &dcc; + spi0 = &qspi; + usb0 = &usb0; + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0 0 0 0x80000000>, <0x8 0x0 0x0 0x80000000>; + /* Another 4GB connected to PL */ + }; + + gpio-keys { + compatible = "gpio-keys"; + autorepeat; + switch-1 { + label = "sw1"; + gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; + linux,code = ; + wakeup-source; + autorepeat; + }; + }; + + leds { + compatible = "gpio-leds"; + heartbeat-led { + label = "heartbeat"; /* DS1 */ + gpios = <&gpio 23 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; + + ina226-vccint { + compatible = "iio-hwmon"; + io-channels = <&vccint 0>, <&vccint 1>, <&vccint 2>, <&vccint 3>; + }; + ina226-vccint-io-bram-ps { + compatible = "iio-hwmon"; + io-channels = <&vccint_io_bram_ps 0>, <&vccint_io_bram_ps 1>, <&vccint_io_bram_ps 2>, <&vccint_io_bram_ps 3>; + }; + ina226-vcc1v8 { + compatible = "iio-hwmon"; + io-channels = <&vcc1v8 0>, <&vcc1v8 1>, <&vcc1v8 2>, <&vcc1v8 3>; + }; + ina226-vcc1v2 { + compatible = "iio-hwmon"; + io-channels = <&vcc1v2 0>, <&vcc1v2 1>, <&vcc1v2 2>, <&vcc1v2 3>; + }; + ina226-vadj-fmc { + compatible = "iio-hwmon"; + io-channels = <&vadj_fmc 0>, <&vadj_fmc 1>, <&vadj_fmc 2>, <&vadj_fmc 3>; + }; + ina226-mgtavcc { + compatible = "iio-hwmon"; + io-channels = <&mgtavcc 0>, <&mgtavcc 1>, <&mgtavcc 2>, <&mgtavcc 3>; + }; + ina226-mgt1v2 { + compatible = "iio-hwmon"; + io-channels = <&mgt1v2 0>, <&mgt1v2 1>, <&mgt1v2 2>, <&mgt1v2 3>; + }; + ina226-mgt1v8 { + compatible = "iio-hwmon"; + io-channels = <&mgt1v8 0>, <&mgt1v8 1>, <&mgt1v8 2>, <&mgt1v8 3>; + }; + ina226-vccint-ams { + compatible = "iio-hwmon"; + io-channels = <&vccint_ams 0>, <&vccint_ams 1>, <&vccint_ams 2>, <&vccint_ams 3>; + }; + ina226-dac-avtt { + compatible = "iio-hwmon"; + io-channels = <&dac_avtt 0>, <&dac_avtt 1>, <&dac_avtt 2>, <&dac_avtt 3>; + }; + ina226-dac-avccaux { + compatible = "iio-hwmon"; + io-channels = <&dac_avccaux 0>, <&dac_avccaux 1>, <&dac_avccaux 2>, <&dac_avccaux 3>; + }; + ina226-adc-avcc { + compatible = "iio-hwmon"; + io-channels = <&adc_avcc 0>, <&adc_avcc 1>, <&adc_avcc 2>, <&adc_avcc 3>; + }; + ina226-adc-avccaux { + compatible = "iio-hwmon"; + io-channels = <&adc_avccaux 0>, <&adc_avccaux 1>, <&adc_avccaux 2>, <&adc_avccaux 3>; + }; + ina226-dac-avcc { + compatible = "iio-hwmon"; + io-channels = <&dac_avcc 0>, <&dac_avcc 1>, <&dac_avcc 2>, <&dac_avcc 3>; + }; + + /* 48MHz reference crystal */ + ref48: ref48M { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <48000000>; + }; + + si5381_6: si5381-6 { /* refclk_usb3 - u43 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + }; +}; + +&dcc { + status = "okay"; +}; + +&fpd_dma_chan1 { + status = "okay"; +}; + +&fpd_dma_chan2 { + status = "okay"; +}; + +&fpd_dma_chan3 { + status = "okay"; +}; + +&fpd_dma_chan4 { + status = "okay"; +}; + +&fpd_dma_chan5 { + status = "okay"; +}; + +&fpd_dma_chan6 { + status = "okay"; +}; + +&fpd_dma_chan7 { + status = "okay"; +}; + +&fpd_dma_chan8 { + status = "okay"; +}; + +&gem3 { + status = "okay"; + phy-handle = <&phy0>; + phy-mode = "rgmii-id"; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + phy0: ethernet-phy@c { + #phy-cells = <1>; + compatible = "ethernet-phy-id2000.a231"; + reg = <0xc>; + ti,rx-internal-delay = <0x8>; + ti,tx-internal-delay = <0xa>; + ti,fifo-depth = <0x1>; + ti,dp83867-rxctrl-strap-quirk; + reset-gpios = <&tca6416_u15 6 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&gpio { + status = "okay"; + gpio-line-names = "QSPI_LWR_CLK", "QSPI_LWR_DQ1", "QSPI_LWR_DQ2", "QSPI_LWR_DQ3", "QSPI_LWR_DQ0", /* 0 - 4 */ + "QSPI_LWR_CS_B", "", "QSPI_UPR_CS_B", "QSPI_UPR_DQ0", "QSPI_UPR_DQ1", /* 5 - 9 */ + "QSPI_UPR_DQ2", "QSPI_UPR_DQ3", "QSPI_UPR_CLK", "PS_GPIO2", "I2C0_SCL", /* 10 - 14 */ + "I2C0_SDA", "I2C1_SCL", "I2C1_SDA", "UART0_TXD", "UART0_RXD", /* 15 - 19 */ + "", "", "BUTTON", "LED", "", /* 20 - 24 */ + "", "PMU_INPUT", "SFP3_TX_DISABLE", "SFP2_TX_DISABLE", "SFP1_TX_DISABLE", /* 25 - 29 */ + "SFP0_TX_DISABLE", "", "PMU_GPO0", "PMU_GPO1", "PMU_GPO2", /* 30 - 34 */ + "PMU_GPO3", "PMU_GPO4", "PMU_GPO5", "PS_GPIO1", "SDIO_SEL", /* 35 - 39 */ + "SDIO_DIR_CMD", "SDIO_DIR_DAT0", "SDIO_DIR_DAT1", "SD_PWR_RST", "", /* 40 - 44 */ + "SDIO_DETECT", "SDIO_DAT0", "SDIO_DAT1", "SDIO_DAT2", "SDIO_DAT3", /* 45 - 49 */ + "SDIO_CMD", "SDIO_CLK", "USB_CLK", "USB_DIR", "USB_DATA2", /* 50 - 54 */ + "USB_NXT", "USB_DATA0", "USB_DATA1", "USB_STP", "USB_DATA3", /* 55 - 59 */ + "USB_DATA4", "USB_DATA5", "USB_DATA6", "USB_DATA7", "ENET_TX_CLK", /* 60 - 64 */ + "ENET_TX_D0", "ENET_TX_D1", "ENET_TX_D2", "ENET_TX_D3", "ENET_TX_CTRL", /* 65 - 69 */ + "ENET_RX_CLK", "ENET_RX_D0", "ENET_RX_D1", "ENET_RX_D2", "ENET_RX_D3", /* 70 - 74 */ + "ENET_RX_CTRL", "ENET_MDC", "ENET_MDIO", /* 75 - 77, MIO end and EMIO start */ + "", "", /* 78 - 79 */ + "", "", "", "", "", /* 80 - 84 */ + "", "", "", "", "", /* 85 - 89 */ + "", "", "", "", "", /* 90 - 94 */ + "", "", "", "", "", /* 95 - 99 */ + "", "", "", "", "", /* 100 - 104 */ + "", "", "", "", "", /* 105 - 109 */ + "", "", "", "", "", /* 110 - 114 */ + "", "", "", "", "", /* 115 - 119 */ + "", "", "", "", "", /* 120 - 124 */ + "", "", "", "", "", /* 125 - 129 */ + "", "", "", "", "", /* 130 - 134 */ + "", "", "", "", "", /* 135 - 139 */ + "", "", "", "", "", /* 140 - 144 */ + "", "", "", "", "", /* 145 - 149 */ + "", "", "", "", "", /* 150 - 154 */ + "", "", "", "", "", /* 155 - 159 */ + "", "", "", "", "", /* 160 - 164 */ + "", "", "", "", "", /* 165 - 169 */ + "", "", "", ""; /* 170 - 173 */ +}; + +&i2c0 { + status = "okay"; + clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c0_default>; + pinctrl-1 = <&pinctrl_i2c0_gpio>; + scl-gpios = <&gpio 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + + tca6416_u15: gpio@20 { /* u15 */ + compatible = "ti,tca6416"; + reg = <0x20>; + gpio-controller; /* interrupt not connected */ + #gpio-cells = <2>; + gpio-line-names = "MAX6643_OT_B", "MAX6643_FANFAIL_B", "MIO26_PMU_INPUT_LS", "DAC_AVTT_VOUT_SEL", /* 0 - 3 */ + "SI5381_INT_ALM", "IIC_MUX_RESET_B", "GEM3_EXP_RESET_B", "MAX6643_FULL_SPEED", /* 4 - 7 */ + "FMCP_HSPC_PRSNT_M2C_B", "", "", "VCCINT_VRHOT_B", /* 10 - 13 */ + "", "8A34001_EXP_RST_B", "IRPS5401_ALERT_B", "INA226_PMBUS_ALERT"; /* 14 - 17 */ + }; + + i2c-mux@75 { /* u17 */ + compatible = "nxp,pca9544"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x75>; + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* PS_PMBUS */ + /* PMBUS_ALERT done via pca9544 */ + vccint: ina226@40 { /* u65 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vccint"; + reg = <0x40>; + shunt-resistor = <5000>; + }; + vccint_io_bram_ps: ina226@41 { /* u57 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vccint-io-bram-ps"; + reg = <0x41>; + shunt-resistor = <5000>; + }; + vcc1v8: ina226@42 { /* u60 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcc1v8"; + reg = <0x42>; + shunt-resistor = <2000>; + }; + vcc1v2: ina226@43 { /* u58 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcc1v2"; + reg = <0x43>; + shunt-resistor = <5000>; + }; + vadj_fmc: ina226@45 { /* u62 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vadj-fmc"; + reg = <0x45>; + shunt-resistor = <5000>; + }; + mgtavcc: ina226@46 { /* u67 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-mgtavcc"; + reg = <0x46>; + shunt-resistor = <2000>; + }; + mgt1v2: ina226@47 { /* u63 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-mgt1v2"; + reg = <0x47>; + shunt-resistor = <5000>; /* Not in schematics */ + }; + mgt1v8: ina226@48 { /* u64 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-mgt1v8"; + reg = <0x48>; + shunt-resistor = <5000>; + }; + vccint_ams: ina226@49 { /* u61 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vccint-ams"; + reg = <0x49>; + shunt-resistor = <5000>; + }; + dac_avtt: ina226@4a { /* u59 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-dac-avtt"; + reg = <0x4a>; + shunt-resistor = <5000>; + }; + dac_avccaux: ina226@4b { /* u124 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-dac-avccaux"; + reg = <0x4b>; + shunt-resistor = <5000>; + }; + adc_avcc: ina226@4c { /* u75 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-adc-avcc"; + reg = <0x4c>; + shunt-resistor = <5000>; + }; + adc_avccaux: ina226@4d { /* u71 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-adc-avccaux"; + reg = <0x4d>; + shunt-resistor = <5000>; + }; + dac_avcc: ina226@4e { /* u77 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-dac-avcc"; + reg = <0x4e>; + shunt-resistor = <5000>; + }; + }; + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* NC */ + }; + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* u104 - ir35215 0x10/0x40 */ + /* u127 - ir38164 0x1b/0x4b */ + /* u112 - ir38164 0x13/0x43 */ + /* u123 - ir38164 0x1c/0x4c */ + + irps5401_44: irps5401@44 { /* IRPS5401 - u53 */ + compatible = "infineon,irps5401"; + reg = <0x44>; /* i2c addr 0x14 */ + }; + irps5401_45: irps5401@45 { /* IRPS5401 - u55 */ + compatible = "infineon,irps5401"; + reg = <0x45>; /* i2c addr 0x15 */ + }; + /* J21 header too */ + + }; + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* SYSMON */ + }; + }; + /* u38 MPS430 */ +}; + +&i2c1 { + status = "okay"; + clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1_default>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + + i2c-mux@74 { + compatible = "nxp,pca9548"; /* u20 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + /* FIXME reset-gpios = <&tca6416_u15 SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */ + i2c_eeprom: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* + * IIC_EEPROM 1kB memory which uses 256B blocks + * where every block has different address. + * 0 - 256B address 0x54 + * 256B - 512B address 0x55 + * 512B - 768B address 0x56 + * 768B - 1024B address 0x57 + */ + eeprom: eeprom@54 { /* u21 */ + compatible = "atmel,24c128"; + reg = <0x54>; + }; + }; + i2c_si5381: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* SI5381 - u43 */ + /* si5381: clock-generator@68 { + reg = <0x68>; + };*/ + }; + i2c_si570_user_c0: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + si570_1: clock-generator@5d { /* USER C0 SI570 - u47 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; + temperature-stability = <50>; + factory-fout = <300000000>; + clock-frequency = <300000000>; + clock-output-names = "si570_user_c0"; + }; + }; + i2c_si570_mgt: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + si570_2: clock-generator@5d { /* USER MGT SI570 - u48 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; + temperature-stability = <50>; + factory-fout = <156250000>; + clock-frequency = <156250000>; + clock-output-names = "si570_mgt"; + }; + }; + i2c_8a34001: i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + /* U409B - 8a34001 */ + }; + i2c_clk104: i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + /* CLK104_SDA */ + }; + i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + /* RFMCP connector */ + }; + /* 7 NC */ + }; + + i2c-mux@75 { + compatible = "nxp,pca9548"; /* u22 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0x75>; + /* FIXME reset-gpios = <&tca6416_u15 SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */ + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* FMCP_HSPC_IIC */ + }; + i2c_si570_psrefclk: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + si570_3: clock-generator@5d { /* USER SI570 PSREFCLK - u130 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; + temperature-stability = <50>; + factory-fout = <33333333>; + clock-frequency = <33333333>; + clock-output-names = "si570_ps_ref_clk"; + silabs,skip-recall; + }; + }; + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* SYSMON */ + }; + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* DDR4 SODIMM */ + }; + i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + /* SFP3 */ + }; + i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + /* SFP2 */ + }; + i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + /* SFP1 */ + }; + i2c@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + /* SFP0 */ + }; + }; + /* u38 MPS430 */ +}; + +&pinctrl0 { + status = "okay"; + pinctrl_i2c0_default: i2c0-default { + mux { + groups = "i2c0_3_grp"; + function = "i2c0"; + }; + + conf { + groups = "i2c0_3_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c0_gpio: i2c0-gpio-grp { + mux { + groups = "gpio0_14_grp", "gpio0_15_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_14_grp", "gpio0_15_grp"; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c1_default: i2c1-default { + mux { + groups = "i2c1_4_grp"; + function = "i2c1"; + }; + + conf { + groups = "i2c1_4_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c1_gpio: i2c1-gpio-grp { + mux { + groups = "gpio0_16_grp", "gpio0_17_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_16_grp", "gpio0_17_grp"; + slew-rate = ; + power-source = ; + }; + }; +}; + +&qspi { + status = "okay"; + num-cs = <2>; + flash@0 { + compatible = "m25p80", "jedec,spi-nor"; /* U11 and U12 MT25QU02GCBBE12 2Gb */ + #address-cells = <1>; + #size-cells = <1>; + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x10000000 0x10000000>; /* 256MB */ + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */ + spi-max-frequency = <108000000>; /* Based on DC1 spec */ + }; +}; + +&rtc { + status = "okay"; +}; + +/* SD1 with level shifter */ +&sdhci1 { + status = "okay"; + disable-wp; + /* + * This property should be removed for supporting UHS mode + */ + no-1-8-v; + xlnx,mio-bank = <1>; +}; + +&psgtr { + status = "okay"; + /* hspc_dp4, hspc_dp5, usb3, hspc_dp6 */ + clocks = <&si5381_6>; + clock-names = "ref2"; +}; + +&uart0 { + status = "okay"; +}; + +/* ULPI SMSC USB3320 */ +&usb0 { + status = "okay"; + phy-names = "usb3-phy"; + phys = <&psgtr 2 PHY_TYPE_USB3 0 2>; +}; + +&dwc3_0 { + status = "okay"; + dr_mode = "host"; + snps,usb3_lpm_capable; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp-zcu670-revB.dts +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp-zcu670-revB.dts @@ -0,0 +1,672 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP ZCU670 (67DR) revB + * + * (C) Copyright 2017 - 2022, Xilinx, Inc. + * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +/dts-v1/; + +#include "zynqmp.dtsi" +#include "zynqmp-clk-ccf.dtsi" +#include +#include +#include +#include + +/ { + model = "ZynqMP ZCU670 RevB"; + compatible = "xlnx,zynqmp-zcu670-revB", "xlnx,zynqmp-zcu670", + "xlnx,zynqmp"; + + aliases { + ethernet0 = &gem3; + i2c0 = &i2c0; + i2c1 = &i2c1; + mmc0 = &sdhci1; + nvmem0 = &eeprom; + rtc0 = &rtc; + serial0 = &uart0; + serial1 = &dcc; + spi0 = &qspi; + usb0 = &usb0; + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0 0 0 0x80000000>, <0x8 0x0 0x0 0x80000000>; + /* Another 4GB connected to PL */ + }; + + gpio-keys { + compatible = "gpio-keys"; + autorepeat; + switch-1 { + label = "sw1"; + gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; + linux,code = ; + wakeup-source; + autorepeat; + }; + }; + + leds { + compatible = "gpio-leds"; + heartbeat-led { + label = "heartbeat"; /* DS1 */ + gpios = <&gpio 23 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; + + ina226-vccint { + compatible = "iio-hwmon"; + io-channels = <&vccint 0>, <&vccint 1>, <&vccint 2>, <&vccint 3>; + }; + ina226-vccint-io-bram-ps { + compatible = "iio-hwmon"; + io-channels = <&vccint_io_bram_ps 0>, <&vccint_io_bram_ps 1>, <&vccint_io_bram_ps 2>, <&vccint_io_bram_ps 3>; + }; + ina226-vcc1v8 { + compatible = "iio-hwmon"; + io-channels = <&vcc1v8 0>, <&vcc1v8 1>, <&vcc1v8 2>, <&vcc1v8 3>; + }; + ina226-vcc1v2 { + compatible = "iio-hwmon"; + io-channels = <&vcc1v2 0>, <&vcc1v2 1>, <&vcc1v2 2>, <&vcc1v2 3>; + }; + ina226-vadj-fmc { + compatible = "iio-hwmon"; + io-channels = <&vadj_fmc 0>, <&vadj_fmc 1>, <&vadj_fmc 2>, <&vadj_fmc 3>; + }; + ina226-mgtavcc { + compatible = "iio-hwmon"; + io-channels = <&mgtavcc 0>, <&mgtavcc 1>, <&mgtavcc 2>, <&mgtavcc 3>; + }; + ina226-mgt1v2 { + compatible = "iio-hwmon"; + io-channels = <&mgt1v2 0>, <&mgt1v2 1>, <&mgt1v2 2>, <&mgt1v2 3>; + }; + ina226-mgt1v8 { + compatible = "iio-hwmon"; + io-channels = <&mgt1v8 0>, <&mgt1v8 1>, <&mgt1v8 2>, <&mgt1v8 3>; + }; + ina226-vccint-ams { + compatible = "iio-hwmon"; + io-channels = <&vccint_ams 0>, <&vccint_ams 1>, <&vccint_ams 2>, <&vccint_ams 3>; + }; + ina226-dac-avtt { + compatible = "iio-hwmon"; + io-channels = <&dac_avtt 0>, <&dac_avtt 1>, <&dac_avtt 2>, <&dac_avtt 3>; + }; + ina226-dac-avccaux { + compatible = "iio-hwmon"; + io-channels = <&dac_avccaux 0>, <&dac_avccaux 1>, <&dac_avccaux 2>, <&dac_avccaux 3>; + }; + ina226-adc-avcc { + compatible = "iio-hwmon"; + io-channels = <&adc_avcc 0>, <&adc_avcc 1>, <&adc_avcc 2>, <&adc_avcc 3>; + }; + ina226-adc-avccaux { + compatible = "iio-hwmon"; + io-channels = <&adc_avccaux 0>, <&adc_avccaux 1>, <&adc_avccaux 2>, <&adc_avccaux 3>; + }; + ina226-dac-avcc { + compatible = "iio-hwmon"; + io-channels = <&dac_avcc 0>, <&dac_avcc 1>, <&dac_avcc 2>, <&dac_avcc 3>; + }; + + /* 48MHz reference crystal */ + ref48: ref48M { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <48000000>; + }; + + si5381_6: si5381-6 { /* refclk_usb3 - u43 */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + }; +}; + +&dcc { + status = "okay"; +}; + +&fpd_dma_chan1 { + status = "okay"; +}; + +&fpd_dma_chan2 { + status = "okay"; +}; + +&fpd_dma_chan3 { + status = "okay"; +}; + +&fpd_dma_chan4 { + status = "okay"; +}; + +&fpd_dma_chan5 { + status = "okay"; +}; + +&fpd_dma_chan6 { + status = "okay"; +}; + +&fpd_dma_chan7 { + status = "okay"; +}; + +&fpd_dma_chan8 { + status = "okay"; +}; + +&gem3 { + status = "okay"; + phy-handle = <&phy0>; + phy-mode = "rgmii-id"; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + phy0: ethernet-phy@c { + #phy-cells = <1>; + compatible = "ethernet-phy-id2000.a231"; + reg = <0xc>; + ti,rx-internal-delay = <0x8>; + ti,tx-internal-delay = <0xa>; + ti,fifo-depth = <0x1>; + ti,dp83867-rxctrl-strap-quirk; + reset-gpios = <&tca6416_u15 6 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&gpio { + status = "okay"; + gpio-line-names = "QSPI_LWR_CLK", "QSPI_LWR_DQ1", "QSPI_LWR_DQ2", "QSPI_LWR_DQ3", "QSPI_LWR_DQ0", /* 0 - 4 */ + "QSPI_LWR_CS_B", "", "QSPI_UPR_CS_B", "QSPI_UPR_DQ0", "QSPI_UPR_DQ1", /* 5 - 9 */ + "QSPI_UPR_DQ2", "QSPI_UPR_DQ3", "QSPI_UPR_CLK", "PS_GPIO2", "I2C0_SCL", /* 10 - 14 */ + "I2C0_SDA", "I2C1_SCL", "I2C1_SDA", "UART0_TXD", "UART0_RXD", /* 15 - 19 */ + "", "", "BUTTON", "LED", "", /* 20 - 24 */ + "", "PMU_INPUT", "SFP3_TX_DISABLE", "SFP2_TX_DISABLE", "SFP1_TX_DISABLE", /* 25 - 29 */ + "SFP0_TX_DISABLE", "", "PMU_GPO0", "PMU_GPO1", "PMU_GPO2", /* 30 - 34 */ + "PMU_GPO3", "PMU_GPO4", "PMU_GPO5", "PS_GPIO1", "SDIO_SEL", /* 35 - 39 */ + "SDIO_DIR_CMD", "SDIO_DIR_DAT0", "SDIO_DIR_DAT1", "SD_PWR_RST", "", /* 40 - 44 */ + "SDIO_DETECT", "SDIO_DAT0", "SDIO_DAT1", "SDIO_DAT2", "SDIO_DAT3", /* 45 - 49 */ + "SDIO_CMD", "SDIO_CLK", "USB_CLK", "USB_DIR", "USB_DATA2", /* 50 - 54 */ + "USB_NXT", "USB_DATA0", "USB_DATA1", "USB_STP", "USB_DATA3", /* 55 - 59 */ + "USB_DATA4", "USB_DATA5", "USB_DATA6", "USB_DATA7", "ENET_TX_CLK", /* 60 - 64 */ + "ENET_TX_D0", "ENET_TX_D1", "ENET_TX_D2", "ENET_TX_D3", "ENET_TX_CTRL", /* 65 - 69 */ + "ENET_RX_CLK", "ENET_RX_D0", "ENET_RX_D1", "ENET_RX_D2", "ENET_RX_D3", /* 70 - 74 */ + "ENET_RX_CTRL", "ENET_MDC", "ENET_MDIO", /* 75 - 77, MIO end and EMIO start */ + "", "", /* 78 - 79 */ + "", "", "", "", "", /* 80 - 84 */ + "", "", "", "", "", /* 85 - 89 */ + "", "", "", "", "", /* 90 - 94 */ + "", "", "", "", "", /* 95 - 99 */ + "", "", "", "", "", /* 100 - 104 */ + "", "", "", "", "", /* 105 - 109 */ + "", "", "", "", "", /* 110 - 114 */ + "", "", "", "", "", /* 115 - 119 */ + "", "", "", "", "", /* 120 - 124 */ + "", "", "", "", "", /* 125 - 129 */ + "", "", "", "", "", /* 130 - 134 */ + "", "", "", "", "", /* 135 - 139 */ + "", "", "", "", "", /* 140 - 144 */ + "", "", "", "", "", /* 145 - 149 */ + "", "", "", "", "", /* 150 - 154 */ + "", "", "", "", "", /* 155 - 159 */ + "", "", "", "", "", /* 160 - 164 */ + "", "", "", "", "", /* 165 - 169 */ + "", "", "", ""; /* 170 - 173 */ +}; + +&i2c0 { + status = "okay"; + clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c0_default>; + pinctrl-1 = <&pinctrl_i2c0_gpio>; + scl-gpios = <&gpio 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + + tca6416_u15: gpio@20 { /* u15 */ + compatible = "ti,tca6416"; + reg = <0x20>; + gpio-controller; /* interrupt not connected */ + #gpio-cells = <2>; + gpio-line-names = "MAX6643_OT_B", "MAX6643_FANFAIL_B", "MIO26_PMU_INPUT_LS", "DAC_AVTT_VOUT_SEL", /* 0 - 3 */ + "SI5381_INT_ALM", "IIC_MUX_RESET_B", "GEM3_EXP_RESET_B", "MAX6643_FULL_SPEED", /* 4 - 7 */ + "FMCP_HSPC_PRSNT_M2C_B", "", "", "VCCINT_VRHOT_B", /* 10 - 13 */ + "", "8A34001_EXP_RST_B", "IRPS5401_ALERT_B", "INA226_PMBUS_ALERT"; /* 14 - 17 */ + }; + + i2c-mux@75 { /* u17 */ + compatible = "nxp,pca9544"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x75>; + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* PS_PMBUS */ + /* PMBUS_ALERT done via pca9544 */ + vccint: ina226@40 { /* u65 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vccint"; + reg = <0x40>; + shunt-resistor = <5000>; + }; + vccint_io_bram_ps: ina226@41 { /* u57 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vccint-io-bram-ps"; + reg = <0x41>; + shunt-resistor = <5000>; + }; + vcc1v8: ina226@42 { /* u60 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcc1v8"; + reg = <0x42>; + shunt-resistor = <2000>; + }; + vcc1v2: ina226@43 { /* u58 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vcc1v2"; + reg = <0x43>; + shunt-resistor = <5000>; + }; + vadj_fmc: ina226@45 { /* u62 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vadj-fmc"; + reg = <0x45>; + shunt-resistor = <5000>; + }; + mgtavcc: ina226@46 { /* u67 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-mgtavcc"; + reg = <0x46>; + shunt-resistor = <2000>; + }; + mgt1v2: ina226@47 { /* u63 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-mgt1v2"; + reg = <0x47>; + shunt-resistor = <5000>; /* Not in schematics */ + }; + mgt1v8: ina226@48 { /* u64 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-mgt1v8"; + reg = <0x48>; + shunt-resistor = <5000>; + }; + vccint_ams: ina226@49 { /* u61 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-vccint-ams"; + reg = <0x49>; + shunt-resistor = <5000>; + }; + dac_avtt: ina226@4a { /* u59 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-dac-avtt"; + reg = <0x4a>; + shunt-resistor = <5000>; + }; + dac_avccaux: ina226@4b { /* u124 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-dac-avccaux"; + reg = <0x4b>; + shunt-resistor = <5000>; + }; + adc_avcc: ina226@4c { /* u75 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-adc-avcc"; + reg = <0x4c>; + shunt-resistor = <5000>; + }; + adc_avccaux: ina226@4d { /* u71 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-adc-avccaux"; + reg = <0x4d>; + shunt-resistor = <5000>; + }; + dac_avcc: ina226@4e { /* u77 */ + compatible = "ti,ina226"; + #io-channel-cells = <1>; + label = "ina226-dac-avcc"; + reg = <0x4e>; + shunt-resistor = <5000>; + }; + }; + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* NC */ + }; + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* u104 - ir35215 0x10/0x40 */ + /* u127 - ir38164 0x1b/0x4b */ + /* u112 - ir38164 0x13/0x43 */ + /* u123 - ir38164 0x1c/0x4c */ + + irps5401_44: irps5401@44 { /* IRPS5401 - u53 */ + compatible = "infineon,irps5401"; + reg = <0x44>; /* i2c addr 0x14 */ + }; + irps5401_45: irps5401@45 { /* IRPS5401 - u55 */ + compatible = "infineon,irps5401"; + reg = <0x45>; /* i2c addr 0x15 */ + }; + /* J21 header too */ + + }; + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* SYSMON */ + }; + }; + /* u38 MPS430 */ +}; + +&i2c1 { + status = "okay"; + clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1_default>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + + i2c-mux@74 { + compatible = "nxp,pca9548"; /* u20 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + /* FIXME reset-gpios = <&tca6416_u15 SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */ + i2c_eeprom: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* + * IIC_EEPROM 1kB memory which uses 256B blocks + * where every block has different address. + * 0 - 256B address 0x54 + * 256B - 512B address 0x55 + * 512B - 768B address 0x56 + * 768B - 1024B address 0x57 + */ + eeprom: eeprom@54 { /* u21 */ + compatible = "atmel,24c128"; + reg = <0x54>; + }; + }; + i2c_si5381: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* SI5381 - u43 */ + /* si5381: clock-generator@68 { + reg = <0x68>; + };*/ + }; + i2c_si570_user_c0: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + si570_1: clock-generator@5d { /* USER C0 SI570 - u47 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; + temperature-stability = <50>; + factory-fout = <300000000>; + clock-frequency = <300000000>; + clock-output-names = "si570_user_c0"; + }; + }; + i2c_si570_mgt: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + si570_2: clock-generator@5d { /* USER MGT SI570 - u48 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; + temperature-stability = <50>; + factory-fout = <156250000>; + clock-frequency = <156250000>; + clock-output-names = "si570_mgt"; + }; + }; + i2c_8a34001: i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + /* U409B - 8a34001 */ + }; + i2c_clk104: i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + /* CLK104_SDA */ + }; + i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + /* RFMCP connector */ + }; + /* 7 NC */ + }; + + i2c-mux@75 { + compatible = "nxp,pca9548"; /* u22 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0x75>; + /* FIXME reset-gpios = <&tca6416_u15 SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */ + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* FMCP_HSPC_IIC */ + }; + i2c_si570_psrefclk: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + si570_3: clock-generator@5d { /* USER SI570 PSREFCLK - u130 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; + temperature-stability = <50>; + factory-fout = <33333333>; + clock-frequency = <33333333>; + clock-output-names = "si570_ps_ref_clk"; + silabs,skip-recall; + }; + }; + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* SYSMON */ + }; + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* DDR4 SODIMM */ + }; + i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + /* SFP3 */ + }; + i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + /* SFP2 */ + }; + i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + /* SFP1 */ + }; + i2c@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + /* SFP0 */ + }; + }; + /* u38 MPS430 */ +}; + +&pinctrl0 { + status = "okay"; + pinctrl_i2c0_default: i2c0-default { + mux { + groups = "i2c0_3_grp"; + function = "i2c0"; + }; + + conf { + groups = "i2c0_3_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c0_gpio: i2c0-gpio-grp { + mux { + groups = "gpio0_14_grp", "gpio0_15_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_14_grp", "gpio0_15_grp"; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c1_default: i2c1-default { + mux { + groups = "i2c1_4_grp"; + function = "i2c1"; + }; + + conf { + groups = "i2c1_4_grp"; + bias-pull-up; + slew-rate = ; + power-source = ; + }; + }; + + pinctrl_i2c1_gpio: i2c1-gpio-grp { + mux { + groups = "gpio0_16_grp", "gpio0_17_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_16_grp", "gpio0_17_grp"; + slew-rate = ; + power-source = ; + }; + }; +}; + +&qspi { + status = "okay"; + num-cs = <2>; + flash@0 { + compatible = "m25p80", "jedec,spi-nor"; /* U11 and U12 MT25QU02GCBBE12 2Gb */ + #address-cells = <1>; + #size-cells = <1>; + reg = <0>, <1>; + parallel-memories = /bits/ 64 <0x10000000 0x10000000>; /* 256MB */ + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */ + spi-max-frequency = <108000000>; /* Based on DC1 spec */ + }; +}; + +&rtc { + status = "okay"; +}; + +/* SD1 with level shifter */ +&sdhci1 { + status = "okay"; + disable-wp; + /* + * This property should be removed for supporting UHS mode + */ + no-1-8-v; + xlnx,mio-bank = <1>; + clk-phase-sd-hs = <120>, <60>; + clk-phase-uhs-sdr25 = <132>, <60>; + clk-phase-uhs-ddr50 = <153>, <48>; +}; + +&psgtr { + status = "okay"; + /* hspc_dp4, hspc_dp5, usb3, hspc_dp6 */ + clocks = <&si5381_6>; + clock-names = "ref2"; +}; + +&uart0 { + status = "okay"; +}; + +/* ULPI SMSC USB3320 */ +&usb0 { + status = "okay"; + phy-names = "usb3-phy"; + phys = <&psgtr 2 PHY_TYPE_USB3 0 2>; +}; + +&dwc3_0 { + status = "okay"; + dr_mode = "host"; + snps,usb3_lpm_capable; +}; --- linux-xilinx-6.8.0.orig/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ linux-xilinx-6.8.0/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -24,6 +24,13 @@ #address-cells = <2>; #size-cells = <2>; + options { + u-boot { + compatible = "u-boot,config"; + bootscr-address = /bits/ 64 <0x20000000>; + }; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -113,22 +120,6 @@ }; }; - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - rproc_0_fw_image: memory@3ed00000 { - no-map; - reg = <0x0 0x3ed00000 0x0 0x40000>; - }; - - rproc_1_fw_image: memory@3ef00000 { - no-map; - reg = <0x0 0x3ef00000 0x0 0x40000>; - }; - }; - zynqmp_ipi: zynqmp-ipi { bootph-all; compatible = "xlnx,zynqmp-ipi-mailbox"; @@ -180,13 +171,18 @@ }; firmware { + optee: optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + zynqmp_firmware: zynqmp-firmware { compatible = "xlnx,zynqmp-firmware"; #power-domain-cells = <1>; method = "smc"; bootph-all; - zynqmp_power: zynqmp-power { + zynqmp_power: power-management { bootph-all; compatible = "xlnx,zynqmp-power"; interrupt-parent = <&gic>; @@ -195,13 +191,71 @@ mbox-names = "tx", "rx"; }; - nvmem-firmware { + soc-nvmem { compatible = "xlnx,zynqmp-nvmem-fw"; - #address-cells = <1>; - #size-cells = <1>; - - soc_revision: soc-revision@0 { - reg = <0x0 0x4>; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + soc_revision: soc-revision@0 { + reg = <0x0 0x4>; + }; + /* efuse access */ + efuse_dna: efuse-dna@c { + reg = <0xc 0xc>; + }; + efuse_usr0: efuse-usr0@20 { + reg = <0x20 0x4>; + }; + efuse_usr1: efuse-usr1@24 { + reg = <0x24 0x4>; + }; + efuse_usr2: efuse-usr2@28 { + reg = <0x28 0x4>; + }; + efuse_usr3: efuse-usr3@2c { + reg = <0x2c 0x4>; + }; + efuse_usr4: efuse-usr4@30 { + reg = <0x30 0x4>; + }; + efuse_usr5: efuse-usr5@34 { + reg = <0x34 0x4>; + }; + efuse_usr6: efuse-usr6@38 { + reg = <0x38 0x4>; + }; + efuse_usr7: efuse-usr7@3c { + reg = <0x3c 0x4>; + }; + efuse_miscusr: efuse-miscusr@40 { + reg = <0x40 0x4>; + }; + efuse_chash: efuse-chash@50 { + reg = <0x50 0x4>; + }; + efuse_pufmisc: efuse-pufmisc@54 { + reg = <0x54 0x4>; + }; + efuse_sec: efuse-sec@58 { + reg = <0x58 0x4>; + }; + efuse_spkid: efuse-spkid@5c { + reg = <0x5c 0x4>; + }; + efuse_aeskey: efuse-aeskey@60 { + reg = <0x60 0x20>; + }; + efuse_ppk0hash: efuse-ppk0hash@a0 { + reg = <0xa0 0x30>; + }; + efuse_ppk1hash: efuse-ppk1hash@d0 { + reg = <0xd0 0x30>; + }; + efuse_pufuser: efuse-pufuser@100 { + reg = <0x100 0x7F>; + }; }; }; @@ -209,10 +263,6 @@ compatible = "xlnx,zynqmp-pcap-fpga"; }; - xlnx_aes: zynqmp-aes { - compatible = "xlnx,zynqmp-aes"; - }; - zynqmp_reset: reset-controller { compatible = "xlnx,zynqmp-reset"; #reset-cells = <1>; @@ -240,7 +290,7 @@ ; }; - fpga_full: fpga-full { + fpga_full: fpga-region { compatible = "fpga-region"; fpga-mgr = <&zynqmp_pcap>; #address-cells = <2>; @@ -248,23 +298,6 @@ ranges; }; - remoteproc { - compatible = "xlnx,zynqmp-r5fss"; - xlnx,cluster-mode = <1>; - - r5f-0 { - compatible = "xlnx,zynqmp-r5f"; - power-domains = <&zynqmp_firmware PD_RPU_0>; - memory-region = <&rproc_0_fw_image>; - }; - - r5f-1 { - compatible = "xlnx,zynqmp-r5f"; - power-domains = <&zynqmp_firmware PD_RPU_1>; - memory-region = <&rproc_1_fw_image>; - }; - }; - amba: axi { compatible = "simple-bus"; bootph-all; @@ -281,6 +314,7 @@ interrupt-parent = <&gic>; tx-fifo-depth = <0x40>; rx-fifo-depth = <0x40>; + resets = <&zynqmp_reset ZYNQMP_RESET_CAN0>; power-domains = <&zynqmp_firmware PD_CAN_0>; }; @@ -293,6 +327,7 @@ interrupt-parent = <&gic>; tx-fifo-depth = <0x40>; rx-fifo-depth = <0x40>; + resets = <&zynqmp_reset ZYNQMP_RESET_CAN1>; power-domains = <&zynqmp_firmware PD_CAN_1>; }; @@ -326,7 +361,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <128>; - iommus = <&smmu 0x14e8>; + /* iommus = <&smmu 0x14e8>; */ power-domains = <&zynqmp_firmware PD_GDMA>; }; @@ -339,7 +374,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <128>; - iommus = <&smmu 0x14e9>; + /* iommus = <&smmu 0x14e9>; */ power-domains = <&zynqmp_firmware PD_GDMA>; }; @@ -352,7 +387,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <128>; - iommus = <&smmu 0x14ea>; + /* iommus = <&smmu 0x14ea>; */ power-domains = <&zynqmp_firmware PD_GDMA>; }; @@ -365,7 +400,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <128>; - iommus = <&smmu 0x14eb>; + /* iommus = <&smmu 0x14eb>; */ power-domains = <&zynqmp_firmware PD_GDMA>; }; @@ -378,7 +413,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <128>; - iommus = <&smmu 0x14ec>; + /* iommus = <&smmu 0x14ec>; */ power-domains = <&zynqmp_firmware PD_GDMA>; }; @@ -391,7 +426,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <128>; - iommus = <&smmu 0x14ed>; + /* iommus = <&smmu 0x14ed>; */ power-domains = <&zynqmp_firmware PD_GDMA>; }; @@ -404,7 +439,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <128>; - iommus = <&smmu 0x14ee>; + /* iommus = <&smmu 0x14ee>; */ power-domains = <&zynqmp_firmware PD_GDMA>; }; @@ -417,7 +452,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <128>; - iommus = <&smmu 0x14ef>; + /* iommus = <&smmu 0x14ef>; */ power-domains = <&zynqmp_firmware PD_GDMA>; }; @@ -462,7 +497,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <64>; - iommus = <&smmu 0x868>; + /* iommus = <&smmu 0x868>; */ power-domains = <&zynqmp_firmware PD_ADMA>; }; @@ -475,7 +510,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <64>; - iommus = <&smmu 0x869>; + /* iommus = <&smmu 0x869>; */ power-domains = <&zynqmp_firmware PD_ADMA>; }; @@ -488,7 +523,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <64>; - iommus = <&smmu 0x86a>; + /* iommus = <&smmu 0x86a>; */ power-domains = <&zynqmp_firmware PD_ADMA>; }; @@ -501,7 +536,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <64>; - iommus = <&smmu 0x86b>; + /* iommus = <&smmu 0x86b>; */ power-domains = <&zynqmp_firmware PD_ADMA>; }; @@ -514,7 +549,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <64>; - iommus = <&smmu 0x86c>; + /* iommus = <&smmu 0x86c>; */ power-domains = <&zynqmp_firmware PD_ADMA>; }; @@ -527,7 +562,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <64>; - iommus = <&smmu 0x86d>; + /* iommus = <&smmu 0x86d>; */ power-domains = <&zynqmp_firmware PD_ADMA>; }; @@ -540,7 +575,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <64>; - iommus = <&smmu 0x86e>; + /* iommus = <&smmu 0x86e>; */ power-domains = <&zynqmp_firmware PD_ADMA>; }; @@ -553,7 +588,7 @@ clock-names = "clk_main", "clk_apb"; #dma-cells = <1>; xlnx,bus-width = <64>; - iommus = <&smmu 0x86f>; + /* iommus = <&smmu 0x86f>; */ power-domains = <&zynqmp_firmware PD_ADMA>; }; @@ -573,7 +608,7 @@ interrupts = ; #address-cells = <1>; #size-cells = <0>; - iommus = <&smmu 0x872>; + /* iommus = <&smmu 0x872>; */ power-domains = <&zynqmp_firmware PD_NAND>; }; @@ -585,7 +620,7 @@ ; reg = <0x0 0xff0b0000 0x0 0x1000>; clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; - iommus = <&smmu 0x874>; + /* iommus = <&smmu 0x874>; */ power-domains = <&zynqmp_firmware PD_ETH_0>; resets = <&zynqmp_reset ZYNQMP_RESET_GEM0>; reset-names = "gem0_rst"; @@ -599,7 +634,7 @@ ; reg = <0x0 0xff0c0000 0x0 0x1000>; clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; - iommus = <&smmu 0x875>; + /* iommus = <&smmu 0x875>; */ power-domains = <&zynqmp_firmware PD_ETH_1>; resets = <&zynqmp_reset ZYNQMP_RESET_GEM1>; reset-names = "gem1_rst"; @@ -613,7 +648,7 @@ ; reg = <0x0 0xff0d0000 0x0 0x1000>; clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; - iommus = <&smmu 0x876>; + /* iommus = <&smmu 0x876>; */ power-domains = <&zynqmp_firmware PD_ETH_2>; resets = <&zynqmp_reset ZYNQMP_RESET_GEM2>; reset-names = "gem2_rst"; @@ -627,7 +662,7 @@ ; reg = <0x0 0xff0e0000 0x0 0x1000>; clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; - iommus = <&smmu 0x877>; + /* iommus = <&smmu 0x877>; */ power-domains = <&zynqmp_firmware PD_ETH_3>; resets = <&zynqmp_reset ZYNQMP_RESET_GEM3>; reset-names = "gem3_rst"; @@ -670,6 +705,85 @@ power-domains = <&zynqmp_firmware PD_I2C_1>; }; + ocm: memory-controller@ff960000 { + compatible = "xlnx,zynqmp-ocmc-1.0"; + reg = <0x0 0xff960000 0x0 0x1000>; + interrupt-parent = <&gic>; + interrupts = ; + }; + + perf_monitor_ocm: perf-monitor@ffa00000 { + compatible = "xlnx,axi-perf-monitor"; + reg = <0x0 0xffa00000 0x0 0x10000>; + interrupts = ; + interrupt-parent = <&gic>; + xlnx,enable-profile = <0>; + xlnx,enable-trace = <0>; + xlnx,num-monitor-slots = <1>; + xlnx,enable-event-count = <1>; + xlnx,enable-event-log = <1>; + xlnx,have-sampled-metric-cnt = <1>; + xlnx,num-of-counters = <8>; + xlnx,metric-count-width = <32>; + xlnx,metrics-sample-count-width = <32>; + xlnx,global-count-width = <32>; + xlnx,metric-count-scale = <1>; + }; + + perf_monitor_ddr: perf-monitor@fd0b0000 { + compatible = "xlnx,axi-perf-monitor"; + reg = <0x0 0xfd0b0000 0x0 0x10000>; + interrupts = ; + interrupt-parent = <&gic>; + xlnx,enable-profile = <0>; + xlnx,enable-trace = <0>; + xlnx,num-monitor-slots = <6>; + xlnx,enable-event-count = <1>; + xlnx,enable-event-log = <0>; + xlnx,have-sampled-metric-cnt = <1>; + xlnx,num-of-counters = <10>; + xlnx,metric-count-width = <32>; + xlnx,metrics-sample-count-width = <32>; + xlnx,global-count-width = <32>; + xlnx,metric-count-scale = <1>; + }; + + perf_monitor_cci: perf-monitor@fd490000 { + compatible = "xlnx,axi-perf-monitor"; + reg = <0x0 0xfd490000 0x0 0x10000>; + interrupts = ; + interrupt-parent = <&gic>; + xlnx,enable-profile = <0>; + xlnx,enable-trace = <0>; + xlnx,num-monitor-slots = <1>; + xlnx,enable-event-count = <1>; + xlnx,enable-event-log = <0>; + xlnx,have-sampled-metric-cnt = <1>; + xlnx,num-of-counters = <8>; + xlnx,metric-count-width = <32>; + xlnx,metrics-sample-count-width = <32>; + xlnx,global-count-width = <32>; + xlnx,metric-count-scale = <1>; + }; + + perf_monitor_lpd: perf-monitor@ffa10000 { + compatible = "xlnx,axi-perf-monitor"; + reg = <0x0 0xffa10000 0x0 0x10000>; + interrupts = ; + interrupt-parent = <&gic>; + xlnx,enable-profile = <0>; + xlnx,enable-trace = <0>; + xlnx,num-monitor-slots = <1>; + xlnx,enable-event-count = <1>; + xlnx,enable-event-log = <1>; + xlnx,have-sampled-metric-cnt = <1>; + xlnx,num-of-counters = <8>; + xlnx,metric-count-width = <32>; + xlnx,metrics-sample-count-width = <32>; + xlnx,global-count-width = <32>; + xlnx,metric-count-scale = <1>; + }; + pcie: pcie@fd0e0000 { compatible = "xlnx,nwl-pcie-2.11"; status = "disabled"; @@ -689,7 +803,7 @@ msi-parent = <&pcie>; reg = <0x0 0xfd0e0000 0x0 0x1000>, <0x0 0xfd480000 0x0 0x1000>, - <0x80 0x00000000 0x0 0x1000000>; + <0x80 0x00000000 0x0 0x10000000>; reg-names = "breg", "pcireg", "cfg"; ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000>,/* non-prefetchable memory */ <0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */ @@ -699,7 +813,7 @@ <0x0 0x0 0x0 0x2 &pcie_intc 0x2>, <0x0 0x0 0x0 0x3 &pcie_intc 0x3>, <0x0 0x0 0x0 0x4 &pcie_intc 0x4>; - iommus = <&smmu 0x4d0>; + /* iommus = <&smmu 0x4d0>; */ power-domains = <&zynqmp_firmware PD_PCIE>; pcie_intc: legacy-interrupt-controller { interrupt-controller; @@ -720,7 +834,7 @@ <0x0 0xc0000000 0x0 0x8000000>; #address-cells = <1>; #size-cells = <0>; - iommus = <&smmu 0x873>; + /* iommus = <&smmu 0x873>; */ power-domains = <&zynqmp_firmware PD_QSPI>; }; @@ -752,8 +866,8 @@ interrupts = ; power-domains = <&zynqmp_firmware PD_SATA>; resets = <&zynqmp_reset ZYNQMP_RESET_SATA>; - iommus = <&smmu 0x4c0>, <&smmu 0x4c1>, - <&smmu 0x4c2>, <&smmu 0x4c3>; + /* iommus = <&smmu 0x4c0>, <&smmu 0x4c1>, <&smmu 0x4c2>, <&smmu 0x4c3>; */ + /* dma-coherent; */ }; sdhci0: mmc@ff160000 { @@ -764,7 +878,7 @@ interrupts = ; reg = <0x0 0xff160000 0x0 0x1000>; clock-names = "clk_xin", "clk_ahb"; - iommus = <&smmu 0x870>; + /* iommus = <&smmu 0x870>; */ #clock-cells = <1>; clock-output-names = "clk_out_sd0", "clk_in_sd0"; power-domains = <&zynqmp_firmware PD_SD_0>; @@ -779,7 +893,7 @@ interrupts = ; reg = <0x0 0xff170000 0x0 0x1000>; clock-names = "clk_xin", "clk_ahb"; - iommus = <&smmu 0x871>; + /* iommus = <&smmu 0x871>; */ #clock-cells = <1>; clock-output-names = "clk_out_sd1", "clk_in_sd1"; power-domains = <&zynqmp_firmware PD_SD_1>; @@ -893,6 +1007,7 @@ reg = <0x0 0xff000000 0x0 0x1000>; clock-names = "uart_clk", "pclk"; power-domains = <&zynqmp_firmware PD_UART_0>; + resets = <&zynqmp_reset ZYNQMP_RESET_UART0>; }; uart1: serial@ff010000 { @@ -904,6 +1019,7 @@ reg = <0x0 0xff010000 0x0 0x1000>; clock-names = "uart_clk", "pclk"; power-domains = <&zynqmp_firmware PD_UART_1>; + resets = <&zynqmp_reset ZYNQMP_RESET_UART1>; }; usb0: usb@ff9d0000 { @@ -912,6 +1028,7 @@ status = "disabled"; compatible = "xlnx,zynqmp-dwc3"; reg = <0x0 0xff9d0000 0x0 0x100>; + clock-names = "bus_clk", "ref_clk"; power-domains = <&zynqmp_firmware PD_USB_0>; resets = <&zynqmp_reset ZYNQMP_RESET_USB0_CORERESET>, <&zynqmp_reset ZYNQMP_RESET_USB0_HIBERRESET>, @@ -922,15 +1039,17 @@ dwc3_0: usb@fe200000 { compatible = "snps,dwc3"; + status = "disabled"; reg = <0x0 0xfe200000 0x0 0x40000>; interrupt-parent = <&gic>; - interrupt-names = "host", "peripheral", "otg"; + interrupt-names = "host", "peripheral", "otg", "wakeup"; interrupts = , , - ; - clock-names = "bus_early", "ref"; - iommus = <&smmu 0x860>; + , + ; + /* iommus = <&smmu 0x860>; */ snps,quirk-frame-length-adjustment = <0x20>; + clock-names = "ref"; snps,resume-hs-terminations; /* dma-coherent; */ }; @@ -942,6 +1061,7 @@ status = "disabled"; compatible = "xlnx,zynqmp-dwc3"; reg = <0x0 0xff9e0000 0x0 0x100>; + clock-names = "bus_clk", "ref_clk"; power-domains = <&zynqmp_firmware PD_USB_1>; resets = <&zynqmp_reset ZYNQMP_RESET_USB1_CORERESET>, <&zynqmp_reset ZYNQMP_RESET_USB1_HIBERRESET>, @@ -951,15 +1071,17 @@ dwc3_1: usb@fe300000 { compatible = "snps,dwc3"; + status = "disabled"; reg = <0x0 0xfe300000 0x0 0x40000>; interrupt-parent = <&gic>; - interrupt-names = "host", "peripheral", "otg"; + interrupt-names = "host", "peripheral", "otg", "wakeup"; interrupts = , , - ; - clock-names = "bus_early", "ref"; - iommus = <&smmu 0x861>; + , + ; + /* iommus = <&smmu 0x861>; */ snps,quirk-frame-length-adjustment = <0x20>; + clock-names = "ref"; snps,resume-hs-terminations; /* dma-coherent; */ }; @@ -1005,8 +1127,6 @@ compatible = "xlnx,zynqmp-ams-pl"; status = "disabled"; reg = <0x400 0x400>; - #address-cells = <1>; - #size-cells = <0>; }; }; @@ -1018,20 +1138,28 @@ interrupt-parent = <&gic>; clock-names = "axi_clk"; power-domains = <&zynqmp_firmware PD_DP>; + dma-channels = <6>; + /* iommus = <&smmu 0xce4>; */ #dma-cells = <1>; }; + zynqmp_dpaud_setting: dp-aud@fd4ac000 { + compatible = "xlnx,zynqmp-dpaud-setting", "syscon"; + reg = <0x0 0xfd4ac000 0x0 0x1000>; + }; + zynqmp_dpsub: display@fd4a0000 { bootph-all; compatible = "xlnx,zynqmp-dpsub-1.7"; status = "disabled"; reg = <0x0 0xfd4a0000 0x0 0x1000>, <0x0 0xfd4aa000 0x0 0x1000>, - <0x0 0xfd4ab000 0x0 0x1000>, - <0x0 0xfd4ac000 0x0 0x1000>; - reg-names = "dp", "blend", "av_buf", "aud"; + <0x0 0xfd4ab000 0x0 0x1000>; + reg-names = "dp", "blend", "av_buf"; + xlnx,dpaud-reg = <&zynqmp_dpaud_setting>; interrupts = ; interrupt-parent = <&gic>; + /* iommus = <&smmu 0xce3>; */ clock-names = "dp_apb_clk", "dp_aud_clk", "dp_vtc_pixel_clk_in"; power-domains = <&zynqmp_firmware PD_DP>; @@ -1042,6 +1170,34 @@ <&zynqmp_dpdma ZYNQMP_DPDMA_VIDEO2>, <&zynqmp_dpdma ZYNQMP_DPDMA_GRAPHICS>; + /* dummy node to indicate there's no child i2c device */ + i2c-bus { + }; + + zynqmp_dp_snd_codec0: zynqmp-dp-snd-codec0 { + compatible = "xlnx,dp-snd-codec"; + clock-names = "aud_clk"; + }; + + zynqmp_dp_snd_pcm0: zynqmp-dp-snd-pcm0 { + compatible = "xlnx,dp-snd-pcm0"; + dmas = <&zynqmp_dpdma 4>; + dma-names = "tx"; + }; + + zynqmp_dp_snd_pcm1: zynqmp-dp-snd-pcm1 { + compatible = "xlnx,dp-snd-pcm1"; + dmas = <&zynqmp_dpdma 5>; + dma-names = "tx"; + }; + + zynqmp_dp_snd_card0: zynqmp-dp-snd-card { + compatible = "xlnx,dp-snd-card"; + xlnx,dp-snd-pcm = <&zynqmp_dp_snd_pcm0>, + <&zynqmp_dp_snd_pcm1>; + xlnx,dp-snd-codec = <&zynqmp_dp_snd_codec0>; + }; + ports { #address-cells = <1>; #size-cells = <0>; --- linux-xilinx-6.8.0.orig/arch/arm64/configs/defconfig +++ linux-xilinx-6.8.0/arch/arm64/configs/defconfig @@ -632,6 +632,7 @@ CONFIG_GPIO_UNIPHIER=y CONFIG_GPIO_VISCONTI=y CONFIG_GPIO_WCD934X=m +CONFIG_GPIO_VF610=y CONFIG_GPIO_XGENE=y CONFIG_GPIO_XGENE_SB=y CONFIG_GPIO_MAX732X=y @@ -1559,6 +1560,7 @@ CONFIG_INTERCONNECT_QCOM_SC8280XP=y CONFIG_INTERCONNECT_QCOM_SDM845=y CONFIG_INTERCONNECT_QCOM_SDX75=y +CONFIG_INTERCONNECT_QCOM_SM6115=y CONFIG_INTERCONNECT_QCOM_SM8150=m CONFIG_INTERCONNECT_QCOM_SM8250=m CONFIG_INTERCONNECT_QCOM_SM8350=m --- linux-xilinx-6.8.0.orig/arch/arm64/configs/xilinx_defconfig +++ linux-xilinx-6.8.0/arch/arm64/configs/xilinx_defconfig @@ -0,0 +1,649 @@ +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_AUDIT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=16 +CONFIG_CGROUPS=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_EXPERT=y +CONFIG_PROFILING=y +CONFIG_CRASH_DUMP=y +CONFIG_ARCH_ZYNQMP=y +CONFIG_ARM64_VA_BITS_48=y +CONFIG_NR_CPUS=16 +CONFIG_COMPAT=y +CONFIG_RANDOMIZE_BASE=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y +CONFIG_CPUFREQ_DT=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_COMPAT_BRK is not set +CONFIG_MEMORY_HOTPLUG=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 +CONFIG_TRANSPARENT_HUGEPAGE=y +CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y +CONFIG_CMA=y +# CONFIG_ZONE_DMA is not set +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_XFRM_USER=y +CONFIG_NET_KEY=y +CONFIG_NET_KEY_MIGRATE=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +CONFIG_SYN_COOKIES=y +CONFIG_NETWORK_SECMARK=y +CONFIG_NETFILTER=y +CONFIG_NETFILTER_NETLINK_LOG=y +CONFIG_NF_CONNTRACK=y +CONFIG_NF_CONNTRACK_FTP=y +CONFIG_NF_CONNTRACK_SNMP=y +CONFIG_NF_CONNTRACK_TFTP=y +CONFIG_NF_CT_NETLINK=y +CONFIG_NETFILTER_XT_MARK=y +CONFIG_NETFILTER_XT_CONNMARK=y +CONFIG_NETFILTER_XT_TARGET_CHECKSUM=y +CONFIG_NETFILTER_XT_TARGET_LOG=y +CONFIG_NETFILTER_XT_MATCH_CONNMARK=m +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +CONFIG_NETFILTER_XT_MATCH_LIMIT=y +CONFIG_NETFILTER_XT_MATCH_MAC=y +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y +CONFIG_NETFILTER_XT_MATCH_STATE=m +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +CONFIG_IP_NF_MANGLE=y +CONFIG_IP6_NF_IPTABLES=y +CONFIG_IP6_NF_FILTER=y +CONFIG_IP6_NF_TARGET_REJECT=y +CONFIG_IP6_NF_MANGLE=y +CONFIG_BRIDGE_NF_EBTABLES=y +CONFIG_BRIDGE_EBT_T_FILTER=y +CONFIG_BRIDGE_EBT_T_NAT=y +CONFIG_BRIDGE_EBT_MARK_T=y +CONFIG_BRIDGE=y +CONFIG_VLAN_8021Q=y +CONFIG_NET_SCHED=y +CONFIG_NET_SCH_MQPRIO=y +CONFIG_NET_SCH_SKBPRIO=y +CONFIG_NET_PKTGEN=y +CONFIG_CAN=y +CONFIG_BT=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=y +CONFIG_BT_LEDS=y +CONFIG_BT_HCIBTUSB=y +CONFIG_BT_HCIBTSDIO=y +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_BCSP=y +CONFIG_BT_HCIUART_ATH3K=y +CONFIG_BT_HCIUART_LL=y +CONFIG_BT_HCIUART_3WIRE=y +CONFIG_BT_HCIUART_INTEL=y +CONFIG_BT_HCIUART_QCA=y +CONFIG_BT_HCIBCM203X=y +CONFIG_BT_HCIBPA10X=y +CONFIG_BT_HCIBFUSB=y +CONFIG_BT_HCIVHCI=y +CONFIG_BT_MRVL=y +CONFIG_BT_MRVL_SDIO=y +CONFIG_BT_ATH3K=y +CONFIG_CFG80211=m +CONFIG_NL80211_TESTMODE=y +CONFIG_CFG80211_CERTIFICATION_ONUS=y +CONFIG_CFG80211_REG_CELLULAR_HINTS=y +CONFIG_CFG80211_REG_RELAX_NO_IR=y +CONFIG_CFG80211_WEXT=y +CONFIG_MAC80211=m +CONFIG_MAC80211_LEDS=y +CONFIG_MAC80211_MESSAGE_TRACING=y +CONFIG_MAC80211_DEBUG_MENU=y +CONFIG_RFKILL=y +CONFIG_RFKILL_INPUT=y +CONFIG_RFKILL_GPIO=y +CONFIG_NET_9P=y +CONFIG_PCI=y +# CONFIG_VGA_ARB is not set +CONFIG_PCIE_XILINX=y +CONFIG_PCIE_XILINX_DMA_PL=y +CONFIG_PCIE_XILINX_NWL=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_CONNECTOR=y +CONFIG_ARM_SCMI_PROTOCOL=y +CONFIG_ARM_SCMI_POWER_CONTROL=y +CONFIG_ZYNQMP_FIRMWARE_DEBUG=y +CONFIG_ZYNQMP_FIRMWARE_SECURE=y +CONFIG_MTD=y +CONFIG_MTD_TESTS=m +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_CFI=y +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_DATAFLASH=y +CONFIG_MTD_RAW_NAND=y +CONFIG_MTD_NAND_ARASAN=y +CONFIG_MTD_NAND_ECC_SW_BCH=y +CONFIG_MTD_SPI_NOR=y +# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set +CONFIG_MTD_UBI=y +CONFIG_OF_OVERLAY=y +CONFIG_OF_CONFIGFS=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=65536 +CONFIG_SRAM=y +CONFIG_XILINX_SDFEC=y +CONFIG_XILINX_AIE=y +CONFIG_EEPROM_AT24=y +CONFIG_EEPROM_AT25=y +CONFIG_TI_ST=y +CONFIG_BLK_DEV_SD=y +CONFIG_ATA=y +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_AHCI_CEVA=y +# CONFIG_ATA_SFF is not set +CONFIG_NETDEVICES=y +CONFIG_TUN=y +CONFIG_MACB=y +CONFIG_XILINX_EMACLITE=y +CONFIG_XILINX_AXI_EMAC=y +CONFIG_AMD_PHY=y +CONFIG_ADIN_PHY=y +CONFIG_BROADCOM_PHY=y +CONFIG_BCM7XXX_PHY=y +CONFIG_BCM87XX_PHY=y +CONFIG_CICADA_PHY=y +CONFIG_DAVICOM_PHY=y +CONFIG_ICPLUS_PHY=y +CONFIG_LXT_PHY=y +CONFIG_LSI_ET1011C_PHY=y +CONFIG_MARVELL_PHY=y +CONFIG_MICREL_PHY=y +CONFIG_MICROSEMI_PHY=y +CONFIG_NATIONAL_PHY=y +CONFIG_AT803X_PHY=y +CONFIG_QSEMI_PHY=y +CONFIG_REALTEK_PHY=y +CONFIG_SMSC_PHY=y +CONFIG_STE10XP=y +CONFIG_DP83848_PHY=y +CONFIG_DP83867_PHY=y +CONFIG_VITESSE_PHY=y +CONFIG_XILINX_PHY=y +CONFIG_XILINX_GMII2RGMII=y +CONFIG_CAN_XILINXCAN=y +CONFIG_USB_USBNET=y +CONFIG_WL18XX=m +CONFIG_WLCORE_SPI=m +CONFIG_WLCORE_SDIO=m +CONFIG_INPUT_EVDEV=y +CONFIG_KEYBOARD_GPIO=y +CONFIG_KEYBOARD_GPIO_POLLED=y +# CONFIG_INPUT_MOUSE is not set +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SERIAL_AMBA_PL010=y +CONFIG_SERIAL_AMBA_PL010_CONSOLE=y +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +CONFIG_SERIAL_MAX310X=y +CONFIG_SERIAL_UARTLITE=y +CONFIG_SERIAL_UARTLITE_CONSOLE=y +CONFIG_SERIAL_UARTLITE_NR_UARTS=16 +CONFIG_SERIAL_XILINX_PS_UART=y +CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y +CONFIG_SERIAL_DEV_BUS=y +# CONFIG_HW_RANDOM is not set +CONFIG_TCG_TPM=y +CONFIG_TCG_TIS_SPI=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_PCA9541=y +CONFIG_I2C_MUX_PCA954x=y +CONFIG_I2C_CADENCE=y +CONFIG_I2C_XILINX=y +CONFIG_I2C_SLAVE=y +CONFIG_I2C_SLAVE_EEPROM=y +CONFIG_I3C=y +CONFIG_CDNS_I3C_MASTER=y +CONFIG_DW_I3C_MASTER=y +CONFIG_SPI=y +CONFIG_SPI_CADENCE=y +CONFIG_SPI_CADENCE_QUADSPI=y +CONFIG_SPI_XILINX=y +CONFIG_SPI_ZYNQMP_GQSPI=y +CONFIG_PINCTRL=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_XILINX=y +CONFIG_GPIO_ZYNQ=y +CONFIG_GPIO_PCA953X=y +CONFIG_GPIO_PCA9570=y +CONFIG_GPIO_TPS65086=y +CONFIG_POWER_RESET_LTC2952=y +CONFIG_SENSORS_IIO_HWMON=y +CONFIG_SENSORS_LM63=y +CONFIG_PMBUS=y +CONFIG_SENSORS_IR38064=y +CONFIG_SENSORS_IRPS5401=y +CONFIG_SENSORS_MAX20751=y +CONFIG_SENSORS_PWM_FAN=y +CONFIG_WATCHDOG=y +CONFIG_XILINX_WATCHDOG=y +CONFIG_XILINX_WINDOW_WATCHDOG=y +CONFIG_CADENCE_WATCHDOG=y +CONFIG_MFD_TPS65086=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_GPIO=y +CONFIG_REGULATOR_TPS65086=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_USB_SUPPORT=y +CONFIG_USB_VIDEO_CLASS=y +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_VIDEO_XILINX=y +CONFIG_VIDEO_XILINX_CSI2RXSS=y +CONFIG_VIDEO_XILINX_AXI4S_SWITCH=y +CONFIG_VIDEO_XILINX_CFA=y +CONFIG_VIDEO_XILINX_CRESAMPLE=y +CONFIG_VIDEO_XILINX_DEMOSAIC=y +CONFIG_VIDEO_XILINX_GAMMA=y +CONFIG_VIDEO_XILINX_HDMI21RXSS=y +CONFIG_VIDEO_XILINX_HLS=y +CONFIG_VIDEO_XILINX_ISP=y +CONFIG_VIDEO_XILINX_REMAPPER=y +CONFIG_VIDEO_XILINX_RGB2YUV=y +CONFIG_VIDEO_XILINX_SCALER=y +CONFIG_VIDEO_XILINX_SDIRXSS=y +CONFIG_VIDEO_XILINX_SWITCH=y +CONFIG_VIDEO_XILINX_TPG=y +CONFIG_VIDEO_XILINX_VPSS_CSC=y +CONFIG_VIDEO_XILINX_VPSS_SCALER=y +CONFIG_VIDEO_XILINX_DPRXSS=y +CONFIG_VIDEO_XILINX_SCD=y +CONFIG_VIDEO_XILINX_M2M=y +CONFIG_VIDEO_XILINX_AXI4S_BROADCASTER=y +CONFIG_VIDEO_XILINX_AXI4S_SUBSETCONV=y +CONFIG_VIDEO_IMX219=y +CONFIG_VIDEO_IMX274=y +# CONFIG_MEDIA_TUNER_E4000 is not set +# CONFIG_MEDIA_TUNER_FC0011 is not set +# CONFIG_MEDIA_TUNER_FC0012 is not set +# CONFIG_MEDIA_TUNER_FC0013 is not set +# CONFIG_MEDIA_TUNER_FC2580 is not set +# CONFIG_MEDIA_TUNER_IT913X is not set +# CONFIG_MEDIA_TUNER_M88RS6000T is not set +# CONFIG_MEDIA_TUNER_MAX2165 is not set +# CONFIG_MEDIA_TUNER_MC44S803 is not set +# CONFIG_MEDIA_TUNER_MSI001 is not set +# CONFIG_MEDIA_TUNER_MT2060 is not set +# CONFIG_MEDIA_TUNER_MT2063 is not set +# CONFIG_MEDIA_TUNER_MT20XX is not set +# CONFIG_MEDIA_TUNER_MT2131 is not set +# CONFIG_MEDIA_TUNER_MT2266 is not set +# CONFIG_MEDIA_TUNER_MXL301RF is not set +# CONFIG_MEDIA_TUNER_MXL5005S is not set +# CONFIG_MEDIA_TUNER_MXL5007T is not set +# CONFIG_MEDIA_TUNER_QM1D1B0004 is not set +# CONFIG_MEDIA_TUNER_QM1D1C0042 is not set +# CONFIG_MEDIA_TUNER_QT1010 is not set +# CONFIG_MEDIA_TUNER_R820T is not set +# CONFIG_MEDIA_TUNER_SI2157 is not set +# CONFIG_MEDIA_TUNER_SIMPLE is not set +# CONFIG_MEDIA_TUNER_TDA18212 is not set +# CONFIG_MEDIA_TUNER_TDA18218 is not set +# CONFIG_MEDIA_TUNER_TDA18250 is not set +# CONFIG_MEDIA_TUNER_TDA18271 is not set +# CONFIG_MEDIA_TUNER_TDA827X is not set +# CONFIG_MEDIA_TUNER_TDA8290 is not set +# CONFIG_MEDIA_TUNER_TDA9887 is not set +# CONFIG_MEDIA_TUNER_TEA5761 is not set +# CONFIG_MEDIA_TUNER_TEA5767 is not set +# CONFIG_MEDIA_TUNER_TUA9001 is not set +# CONFIG_MEDIA_TUNER_XC2028 is not set +# CONFIG_MEDIA_TUNER_XC4000 is not set +# CONFIG_MEDIA_TUNER_XC5000 is not set +# CONFIG_DVB_M88DS3103 is not set +# CONFIG_DVB_MXL5XX is not set +# CONFIG_DVB_STB0899 is not set +# CONFIG_DVB_STB6100 is not set +# CONFIG_DVB_STV090x is not set +# CONFIG_DVB_STV0910 is not set +# CONFIG_DVB_STV6110x is not set +# CONFIG_DVB_STV6111 is not set +# CONFIG_DVB_DRXK is not set +# CONFIG_DVB_MN88472 is not set +# CONFIG_DVB_MN88473 is not set +# CONFIG_DVB_SI2165 is not set +# CONFIG_DVB_TDA18271C2DD is not set +# CONFIG_DVB_CX24110 is not set +# CONFIG_DVB_CX24116 is not set +# CONFIG_DVB_CX24117 is not set +# CONFIG_DVB_CX24120 is not set +# CONFIG_DVB_CX24123 is not set +# CONFIG_DVB_DS3000 is not set +# CONFIG_DVB_MB86A16 is not set +# CONFIG_DVB_MT312 is not set +# CONFIG_DVB_S5H1420 is not set +# CONFIG_DVB_SI21XX is not set +# CONFIG_DVB_STB6000 is not set +# CONFIG_DVB_STV0288 is not set +# CONFIG_DVB_STV0299 is not set +# CONFIG_DVB_STV0900 is not set +# CONFIG_DVB_STV6110 is not set +# CONFIG_DVB_TDA10071 is not set +# CONFIG_DVB_TDA10086 is not set +# CONFIG_DVB_TDA8083 is not set +# CONFIG_DVB_TDA8261 is not set +# CONFIG_DVB_TDA826X is not set +# CONFIG_DVB_TS2020 is not set +# CONFIG_DVB_TUA6100 is not set +# CONFIG_DVB_TUNER_CX24113 is not set +# CONFIG_DVB_TUNER_ITD1000 is not set +# CONFIG_DVB_VES1X93 is not set +# CONFIG_DVB_ZL10036 is not set +# CONFIG_DVB_ZL10039 is not set +# CONFIG_DVB_AF9013 is not set +# CONFIG_DVB_CX22700 is not set +# CONFIG_DVB_CX22702 is not set +# CONFIG_DVB_CXD2820R is not set +# CONFIG_DVB_CXD2841ER is not set +# CONFIG_DVB_DIB3000MB is not set +# CONFIG_DVB_DIB3000MC is not set +# CONFIG_DVB_DIB7000M is not set +# CONFIG_DVB_DIB7000P is not set +# CONFIG_DVB_DIB9000 is not set +# CONFIG_DVB_DRXD is not set +# CONFIG_DVB_EC100 is not set +# CONFIG_DVB_L64781 is not set +# CONFIG_DVB_MT352 is not set +# CONFIG_DVB_NXT6000 is not set +# CONFIG_DVB_RTL2830 is not set +# CONFIG_DVB_RTL2832 is not set +# CONFIG_DVB_RTL2832_SDR is not set +# CONFIG_DVB_S5H1432 is not set +# CONFIG_DVB_SI2168 is not set +# CONFIG_DVB_SP887X is not set +# CONFIG_DVB_STV0367 is not set +# CONFIG_DVB_TDA10048 is not set +# CONFIG_DVB_TDA1004X is not set +# CONFIG_DVB_ZD1301_DEMOD is not set +# CONFIG_DVB_ZL10353 is not set +# CONFIG_DVB_CXD2880 is not set +# CONFIG_DVB_STV0297 is not set +# CONFIG_DVB_TDA10021 is not set +# CONFIG_DVB_TDA10023 is not set +# CONFIG_DVB_VES1820 is not set +# CONFIG_DVB_AU8522_DTV is not set +# CONFIG_DVB_AU8522_V4L is not set +# CONFIG_DVB_BCM3510 is not set +# CONFIG_DVB_LG2160 is not set +# CONFIG_DVB_LGDT3305 is not set +# CONFIG_DVB_LGDT3306A is not set +# CONFIG_DVB_LGDT330X is not set +# CONFIG_DVB_MXL692 is not set +# CONFIG_DVB_NXT200X is not set +# CONFIG_DVB_OR51132 is not set +# CONFIG_DVB_OR51211 is not set +# CONFIG_DVB_S5H1409 is not set +# CONFIG_DVB_S5H1411 is not set +# CONFIG_DVB_DIB8000 is not set +# CONFIG_DVB_MB86A20S is not set +# CONFIG_DVB_S921 is not set +# CONFIG_DVB_MN88443X is not set +# CONFIG_DVB_TC90522 is not set +# CONFIG_DVB_PLL is not set +# CONFIG_DVB_TUNER_DIB0070 is not set +# CONFIG_DVB_TUNER_DIB0090 is not set +# CONFIG_DVB_A8293 is not set +# CONFIG_DVB_AF9033 is not set +# CONFIG_DVB_ASCOT2E is not set +# CONFIG_DVB_ATBM8830 is not set +# CONFIG_DVB_HELENE is not set +# CONFIG_DVB_HORUS3A is not set +# CONFIG_DVB_ISL6405 is not set +# CONFIG_DVB_ISL6421 is not set +# CONFIG_DVB_ISL6423 is not set +# CONFIG_DVB_IX2505V is not set +# CONFIG_DVB_LGS8GL5 is not set +# CONFIG_DVB_LGS8GXX is not set +# CONFIG_DVB_LNBH25 is not set +# CONFIG_DVB_LNBH29 is not set +# CONFIG_DVB_LNBP21 is not set +# CONFIG_DVB_LNBP22 is not set +# CONFIG_DVB_M88RS2000 is not set +# CONFIG_DVB_TDA665x is not set +# CONFIG_DVB_DRX39XYJ is not set +# CONFIG_DVB_CXD2099 is not set +# CONFIG_DVB_SP2 is not set +CONFIG_DRM=y +CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM=y +CONFIG_DRM_ZYNQMP_DPSUB=y +CONFIG_DRM_XLNX=y +CONFIG_DRM_XLNX_BRIDGE=y +CONFIG_DRM_XLNX_BRIDGE_DEBUG_FS=y +CONFIG_DRM_XLNX_DPTX=y +CONFIG_DRM_XLNX_DSI=y +CONFIG_DRM_XLNX_HDMITX=y +CONFIG_DRM_XLNX_MIXER=y +CONFIG_DRM_XLNX_PL_DISP=y +CONFIG_DRM_XLNX_SDI=y +CONFIG_DRM_XLNX_BRIDGE_CSC=y +CONFIG_DRM_XLNX_BRIDGE_SCALER=y +CONFIG_DRM_XLNX_BRIDGE_VTC=y +CONFIG_FB=y +CONFIG_SOUND=y +CONFIG_SND=y +# CONFIG_SND_DRIVERS is not set +# CONFIG_SND_PCI is not set +CONFIG_SND_USB_AUDIO=y +CONFIG_SND_SOC=y +CONFIG_SND_SOC_XILINX_DP=y +CONFIG_SND_SOC_XILINX_SDI=y +CONFIG_SND_SOC_XILINX_I2S=y +CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER=y +CONFIG_SND_SOC_XILINX_SPDIF=y +CONFIG_SND_SOC_XILINX_PL_SND_CARD=y +CONFIG_USB_ULPI_BUS=y +CONFIG_USB=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y +CONFIG_USB_OTG=y +CONFIG_USB_OTG_FSM=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_USB_UAS=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_ULPI=y +CONFIG_USB_USB2244=m +CONFIG_USB_USB5744=m +CONFIG_USB_ONBOARD_DEV=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_XILINX=y +CONFIG_USB_CONFIGFS=y +CONFIG_USB_CONFIGFS_ACM=y +CONFIG_USB_CONFIGFS_ECM=y +CONFIG_USB_CONFIGFS_ECM_SUBSET=y +CONFIG_USB_CONFIGFS_RNDIS=y +CONFIG_USB_CONFIGFS_EEM=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +CONFIG_USB_ETH=m +CONFIG_USB_ETH_EEM=y +CONFIG_USB_MASS_STORAGE=m +CONFIG_USB_G_SERIAL=m +CONFIG_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_OF_ARASAN=y +CONFIG_SCSI_UFSHCD=y +CONFIG_SCSI_UFS_BSG=y +CONFIG_SCSI_UFSHCD_PLATFORM=y +CONFIG_SCSI_UFS_AMD_VERSAL2=y +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_ONESHOT=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +CONFIG_LEDS_TRIGGER_CPU=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y +CONFIG_LEDS_TRIGGER_TRANSIENT=y +CONFIG_LEDS_TRIGGER_CAMERA=y +CONFIG_EDAC=y +CONFIG_EDAC_SYNOPSYS=y +CONFIG_EDAC_XILINX_XILSEM=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_ZYNQMP=y +CONFIG_DMADEVICES=y +CONFIG_XILINX_DMA=y +CONFIG_XILINX_ZYNQMP_DMA=y +CONFIG_XILINX_ZYNQMP_DPDMA=y +CONFIG_DMATEST=y +CONFIG_DMABUF_HEAPS=y +CONFIG_DMABUF_HEAPS_SYSTEM=y +CONFIG_DMABUF_HEAPS_CMA=y +CONFIG_UIO=y +CONFIG_UIO_XILINX_APM=y +CONFIG_UIO_XILINX_AI_ENGINE=m +CONFIG_VFIO=y +CONFIG_VFIO_CDX=y +CONFIG_STAGING=y +CONFIG_XILINX_FCLK=y +CONFIG_XLNX_SYNC=y +CONFIG_SERIAL_UARTLITE_RS485=y +CONFIG_AXIENET_HAS_TADMA=y +CONFIG_XILINX_TSN=y +CONFIG_COMMON_CLK_SCMI=y +CONFIG_COMMON_CLK_SI5341=y +CONFIG_COMMON_CLK_SI570=y +CONFIG_COMMON_CLK_SI5324=y +CONFIG_COMMON_CLK_VC7=y +CONFIG_COMMON_CLK_PROXO=y +CONFIG_XILINX_VCU=m +CONFIG_COMMON_CLK_XLNX_CLKWZRD=y +# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set +# CONFIG_FSL_ERRATUM_A008585 is not set +CONFIG_ARM_SMMU_V3=y +CONFIG_ZYNQMP_R5_REMOTEPROC=m +CONFIG_RPMSG_CHAR=y +CONFIG_RPMSG_CTRL=y +CONFIG_RPMSG_VIRTIO=y +CONFIG_IIO=y +CONFIG_INA2XX_ADC=y +CONFIG_INA260_ADC=y +CONFIG_XILINX_XADC=y +CONFIG_XILINX_AMS=y +CONFIG_VERSAL_SYSMON=y +CONFIG_BME680=y +CONFIG_BMG160=y +CONFIG_IIO_ST_LSM6DSX=y +CONFIG_BMC150_MAGN_SPI=y +CONFIG_PWM=y +CONFIG_PWM_CADENCE=y +CONFIG_XILINX_INTC=y +CONFIG_IRQCHIP_XILINX_INTC_MODULE_SUPPORT_EXPERIMENTAL=y +CONFIG_RESET_CONTROLLER=y +CONFIG_PHY_XILINX_ZYNQMP=y +CONFIG_PHY_XILINX_HDMIPHY=y +CONFIG_ARM_CCI_PMU=y +CONFIG_RAS=y +CONFIG_NVMEM_ZYNQMP=y +CONFIG_XLNX_SEC_CFG=y +CONFIG_FPGA=y +CONFIG_XILINX_AFI_FPGA=y +CONFIG_XILINX_PR_DECOUPLER=y +CONFIG_FPGA_REGION=y +CONFIG_OF_FPGA_REGION=y +CONFIG_FPGA_MGR_ZYNQMP_FPGA=y +CONFIG_FPGA_MGR_VERSAL_FPGA=y +CONFIG_CDX_BUS=y +CONFIG_CDX_CONTROLLER=m +CONFIG_EXT3_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_BTRFS_FS=y +CONFIG_EXPORTFS_BLOCK_OPS=y +CONFIG_QUOTA=y +CONFIG_QFMT_V2=y +CONFIG_AUTOFS_FS=y +CONFIG_ISO9660_FS=y +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_HUGETLBFS=y +CONFIG_ECRYPT_FS=y +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_SUMMARY=y +CONFIG_JFFS2_FS_XATTR=y +CONFIG_JFFS2_COMPRESSION_OPTIONS=y +CONFIG_JFFS2_LZO=y +CONFIG_JFFS2_RUBIN=y +CONFIG_UBIFS_FS=y +CONFIG_CRAMFS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_ROOT_NFS=y +# CONFIG_NFS_DISABLE_UDP_SUPPORT is not set +CONFIG_NFSD=y +CONFIG_NFSD_V4=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ISO8859_1=y +# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_USER_API_HASH=y +CONFIG_CRYPTO_USER_API_SKCIPHER=y +CONFIG_CRYPTO_CHACHA20_NEON=y +CONFIG_CRYPTO_GHASH_ARM64_CE=y +CONFIG_CRYPTO_SHA1_ARM64_CE=y +CONFIG_CRYPTO_SHA2_ARM64_CE=y +CONFIG_CRYPTO_SHA512_ARM64_CE=y +CONFIG_CRYPTO_SHA3_ARM64=y +CONFIG_CRYPTO_SM3_ARM64_CE=y +CONFIG_CRYPTO_AES_ARM64_CE_BLK=y +CONFIG_CRYPTO_AES_ARM64_BS=y +CONFIG_CRYPTO_SM4_ARM64_CE=y +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y +CONFIG_CRYPTO_DEV_XILINX_ECDSA=y +CONFIG_CRYPTO_DEV_ZYNQMP_AES=y +CONFIG_CRYPTO_DEV_ZYNQMP_SHA3=y +# CONFIG_XZ_DEC_X86 is not set +# CONFIG_XZ_DEC_POWERPC is not set +# CONFIG_XZ_DEC_IA64 is not set +# CONFIG_XZ_DEC_ARM is not set +# CONFIG_XZ_DEC_ARMTHUMB is not set +# CONFIG_XZ_DEC_SPARC is not set +CONFIG_DMA_CMA=y +CONFIG_CMA_SIZE_MBYTES=256 +CONFIG_PRINTK_TIME=y +# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set +CONFIG_MAGIC_SYSRQ=y +CONFIG_DEBUG_FS=y +# CONFIG_SCHED_DEBUG is not set +# CONFIG_FTRACE is not set +# CONFIG_STRICT_DEVMEM is not set +CONFIG_MEMTEST=y --- linux-xilinx-6.8.0.orig/arch/arm64/configs/xilinx_versal_defconfig +++ linux-xilinx-6.8.0/arch/arm64/configs/xilinx_versal_defconfig @@ -0,0 +1,401 @@ +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_AUDIT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=16 +CONFIG_BLK_DEV_INITRD=y +CONFIG_EXPERT=y +CONFIG_PERF_EVENTS=y +CONFIG_ARCH_ZYNQMP=y +CONFIG_ARM64_VA_BITS_48=y +CONFIG_NR_CPUS=2 +CONFIG_COMPAT=y +CONFIG_RANDOMIZE_BASE=y +# CONFIG_EFI is not set +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y +CONFIG_CPUFREQ_DT=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_COMPAT_BRK is not set +# CONFIG_COMPACTION is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 +CONFIG_CMA=y +# CONFIG_ZONE_DMA is not set +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_XFRM_USER=y +CONFIG_NET_KEY=y +CONFIG_NET_KEY_MIGRATE=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +CONFIG_SYN_COOKIES=y +CONFIG_NETWORK_SECMARK=y +CONFIG_NETFILTER=y +CONFIG_NETFILTER_NETLINK_LOG=y +CONFIG_NF_CONNTRACK=y +CONFIG_NF_CONNTRACK_FTP=y +CONFIG_NF_CONNTRACK_SNMP=y +CONFIG_NF_CONNTRACK_TFTP=y +CONFIG_NF_CT_NETLINK=y +CONFIG_NETFILTER_XTABLES=y +CONFIG_NETFILTER_XT_MARK=y +CONFIG_NETFILTER_XT_CONNMARK=y +CONFIG_BRIDGE_NF_EBTABLES=y +CONFIG_BRIDGE_EBT_T_FILTER=y +CONFIG_BRIDGE_EBT_T_NAT=y +CONFIG_BRIDGE_EBT_MARK_T=y +CONFIG_BRIDGE=y +CONFIG_NET_PKTGEN=y +CONFIG_CAN=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_ZYNQMP_FIRMWARE_DEBUG=y +CONFIG_MTD=y +CONFIG_MTD_TESTS=m +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_CFI=y +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_DATAFLASH=y +CONFIG_MTD_RAW_NAND=y +CONFIG_MTD_SPI_NOR=y +# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set +CONFIG_MTD_UBI=y +CONFIG_OF_OVERLAY=y +CONFIG_OF_CONFIGFS=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=65536 +CONFIG_SRAM=y +CONFIG_XILINX_AIE=y +CONFIG_EEPROM_AT24=y +CONFIG_SCSI=y +CONFIG_BLK_DEV_SD=y +CONFIG_NETDEVICES=y +CONFIG_TUN=y +CONFIG_MACB=y +CONFIG_MARVELL_PHY=y +CONFIG_MICROSEMI_PHY=y +CONFIG_REALTEK_PHY=y +CONFIG_DP83848_PHY=y +CONFIG_DP83867_PHY=y +CONFIG_CAN_XILINXCAN=y +CONFIG_KEYBOARD_GPIO=y +CONFIG_KEYBOARD_GPIO_POLLED=y +# CONFIG_INPUT_MOUSE is not set +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_SERIAL_AMBA_PL010=y +CONFIG_SERIAL_AMBA_PL010_CONSOLE=y +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +CONFIG_SERIAL_XILINX_PS_UART=y +CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y +# CONFIG_HW_RANDOM is not set +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_CADENCE=y +CONFIG_SPI=y +CONFIG_SPI_CADENCE=y +CONFIG_SPI_CADENCE_QUADSPI=y +CONFIG_SPI_XILINX=y +CONFIG_SPI_ZYNQMP_GQSPI=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_ZYNQ=y +# CONFIG_HWMON is not set +CONFIG_WATCHDOG=y +CONFIG_XILINX_WATCHDOG=y +CONFIG_XILINX_WINDOW_WATCHDOG=y +CONFIG_REGULATOR=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_VIDEO_XILINX=y +CONFIG_VIDEO_XILINX_CSI2RXSS=y +CONFIG_VIDEO_XILINX_AXI4S_SWITCH=y +CONFIG_VIDEO_XILINX_CFA=y +CONFIG_VIDEO_XILINX_CRESAMPLE=y +CONFIG_VIDEO_XILINX_DEMOSAIC=y +CONFIG_VIDEO_XILINX_GAMMA=y +CONFIG_VIDEO_XILINX_HDMI21RXSS=y +CONFIG_VIDEO_XILINX_HLS=y +CONFIG_VIDEO_XILINX_ISP=y +CONFIG_VIDEO_XILINX_REMAPPER=y +CONFIG_VIDEO_XILINX_RGB2YUV=y +CONFIG_VIDEO_XILINX_SCALER=y +CONFIG_VIDEO_XILINX_SDIRXSS=y +CONFIG_VIDEO_XILINX_SWITCH=y +CONFIG_VIDEO_XILINX_TPG=y +CONFIG_VIDEO_XILINX_VPSS_CSC=y +CONFIG_VIDEO_XILINX_VPSS_SCALER=y +CONFIG_VIDEO_XILINX_DPRXSS=y +CONFIG_VIDEO_XILINX_SCD=y +CONFIG_VIDEO_XILINX_M2M=y +# CONFIG_MEDIA_TUNER_E4000 is not set +# CONFIG_MEDIA_TUNER_FC0011 is not set +# CONFIG_MEDIA_TUNER_FC0012 is not set +# CONFIG_MEDIA_TUNER_FC0013 is not set +# CONFIG_MEDIA_TUNER_FC2580 is not set +# CONFIG_MEDIA_TUNER_IT913X is not set +# CONFIG_MEDIA_TUNER_M88RS6000T is not set +# CONFIG_MEDIA_TUNER_MAX2165 is not set +# CONFIG_MEDIA_TUNER_MC44S803 is not set +# CONFIG_MEDIA_TUNER_MSI001 is not set +# CONFIG_MEDIA_TUNER_MT2060 is not set +# CONFIG_MEDIA_TUNER_MT2063 is not set +# CONFIG_MEDIA_TUNER_MT20XX is not set +# CONFIG_MEDIA_TUNER_MT2131 is not set +# CONFIG_MEDIA_TUNER_MT2266 is not set +# CONFIG_MEDIA_TUNER_MXL301RF is not set +# CONFIG_MEDIA_TUNER_MXL5005S is not set +# CONFIG_MEDIA_TUNER_MXL5007T is not set +# CONFIG_MEDIA_TUNER_QM1D1B0004 is not set +# CONFIG_MEDIA_TUNER_QM1D1C0042 is not set +# CONFIG_MEDIA_TUNER_QT1010 is not set +# CONFIG_MEDIA_TUNER_R820T is not set +# CONFIG_MEDIA_TUNER_SI2157 is not set +# CONFIG_MEDIA_TUNER_SIMPLE is not set +# CONFIG_MEDIA_TUNER_TDA18212 is not set +# CONFIG_MEDIA_TUNER_TDA18218 is not set +# CONFIG_MEDIA_TUNER_TDA18250 is not set +# CONFIG_MEDIA_TUNER_TDA18271 is not set +# CONFIG_MEDIA_TUNER_TDA827X is not set +# CONFIG_MEDIA_TUNER_TDA8290 is not set +# CONFIG_MEDIA_TUNER_TDA9887 is not set +# CONFIG_MEDIA_TUNER_TEA5761 is not set +# CONFIG_MEDIA_TUNER_TEA5767 is not set +# CONFIG_MEDIA_TUNER_TUA9001 is not set +# CONFIG_MEDIA_TUNER_XC2028 is not set +# CONFIG_MEDIA_TUNER_XC4000 is not set +# CONFIG_MEDIA_TUNER_XC5000 is not set +# CONFIG_DVB_MXL5XX is not set +# CONFIG_DVB_STB0899 is not set +# CONFIG_DVB_STB6100 is not set +# CONFIG_DVB_STV090x is not set +# CONFIG_DVB_STV0910 is not set +# CONFIG_DVB_STV6110x is not set +# CONFIG_DVB_STV6111 is not set +# CONFIG_DVB_DRXK is not set +# CONFIG_DVB_MN88472 is not set +# CONFIG_DVB_MN88473 is not set +# CONFIG_DVB_SI2165 is not set +# CONFIG_DVB_TDA18271C2DD is not set +# CONFIG_DVB_CX24110 is not set +# CONFIG_DVB_CX24116 is not set +# CONFIG_DVB_CX24117 is not set +# CONFIG_DVB_CX24120 is not set +# CONFIG_DVB_CX24123 is not set +# CONFIG_DVB_DS3000 is not set +# CONFIG_DVB_MB86A16 is not set +# CONFIG_DVB_MT312 is not set +# CONFIG_DVB_S5H1420 is not set +# CONFIG_DVB_SI21XX is not set +# CONFIG_DVB_STB6000 is not set +# CONFIG_DVB_STV0288 is not set +# CONFIG_DVB_STV0299 is not set +# CONFIG_DVB_STV0900 is not set +# CONFIG_DVB_STV6110 is not set +# CONFIG_DVB_TDA10071 is not set +# CONFIG_DVB_TDA10086 is not set +# CONFIG_DVB_TDA8083 is not set +# CONFIG_DVB_TDA8261 is not set +# CONFIG_DVB_TDA826X is not set +# CONFIG_DVB_TS2020 is not set +# CONFIG_DVB_TUA6100 is not set +# CONFIG_DVB_TUNER_CX24113 is not set +# CONFIG_DVB_TUNER_ITD1000 is not set +# CONFIG_DVB_VES1X93 is not set +# CONFIG_DVB_ZL10036 is not set +# CONFIG_DVB_ZL10039 is not set +# CONFIG_DVB_CX22700 is not set +# CONFIG_DVB_CX22702 is not set +# CONFIG_DVB_CXD2820R is not set +# CONFIG_DVB_CXD2841ER is not set +# CONFIG_DVB_DIB3000MB is not set +# CONFIG_DVB_DIB3000MC is not set +# CONFIG_DVB_DIB7000M is not set +# CONFIG_DVB_DIB7000P is not set +# CONFIG_DVB_DIB9000 is not set +# CONFIG_DVB_DRXD is not set +# CONFIG_DVB_EC100 is not set +# CONFIG_DVB_L64781 is not set +# CONFIG_DVB_MT352 is not set +# CONFIG_DVB_NXT6000 is not set +# CONFIG_DVB_S5H1432 is not set +# CONFIG_DVB_SP887X is not set +# CONFIG_DVB_STV0367 is not set +# CONFIG_DVB_TDA10048 is not set +# CONFIG_DVB_TDA1004X is not set +# CONFIG_DVB_ZD1301_DEMOD is not set +# CONFIG_DVB_ZL10353 is not set +# CONFIG_DVB_CXD2880 is not set +# CONFIG_DVB_STV0297 is not set +# CONFIG_DVB_TDA10021 is not set +# CONFIG_DVB_TDA10023 is not set +# CONFIG_DVB_VES1820 is not set +# CONFIG_DVB_AU8522_DTV is not set +# CONFIG_DVB_AU8522_V4L is not set +# CONFIG_DVB_BCM3510 is not set +# CONFIG_DVB_LG2160 is not set +# CONFIG_DVB_LGDT3305 is not set +# CONFIG_DVB_LGDT330X is not set +# CONFIG_DVB_MXL692 is not set +# CONFIG_DVB_NXT200X is not set +# CONFIG_DVB_OR51132 is not set +# CONFIG_DVB_OR51211 is not set +# CONFIG_DVB_S5H1409 is not set +# CONFIG_DVB_S5H1411 is not set +# CONFIG_DVB_DIB8000 is not set +# CONFIG_DVB_MB86A20S is not set +# CONFIG_DVB_S921 is not set +# CONFIG_DVB_MN88443X is not set +# CONFIG_DVB_TC90522 is not set +# CONFIG_DVB_PLL is not set +# CONFIG_DVB_TUNER_DIB0070 is not set +# CONFIG_DVB_TUNER_DIB0090 is not set +# CONFIG_DVB_A8293 is not set +# CONFIG_DVB_AF9033 is not set +# CONFIG_DVB_ASCOT2E is not set +# CONFIG_DVB_ATBM8830 is not set +# CONFIG_DVB_HELENE is not set +# CONFIG_DVB_HORUS3A is not set +# CONFIG_DVB_ISL6405 is not set +# CONFIG_DVB_ISL6421 is not set +# CONFIG_DVB_ISL6423 is not set +# CONFIG_DVB_IX2505V is not set +# CONFIG_DVB_LGS8GL5 is not set +# CONFIG_DVB_LGS8GXX is not set +# CONFIG_DVB_LNBH25 is not set +# CONFIG_DVB_LNBH29 is not set +# CONFIG_DVB_LNBP21 is not set +# CONFIG_DVB_LNBP22 is not set +# CONFIG_DVB_M88RS2000 is not set +# CONFIG_DVB_TDA665x is not set +# CONFIG_DVB_DRX39XYJ is not set +# CONFIG_DVB_CXD2099 is not set +# CONFIG_DVB_SP2 is not set +CONFIG_DRM=y +CONFIG_DRM_XLNX=y +CONFIG_DRM_XLNX_BRIDGE=y +CONFIG_DRM_XLNX_BRIDGE_DEBUG_FS=y +CONFIG_DRM_XLNX_DPTX=y +CONFIG_DRM_XLNX_DSI=y +CONFIG_DRM_XLNX_HDMITX=y +CONFIG_DRM_XLNX_MIXER=y +CONFIG_DRM_XLNX_PL_DISP=y +CONFIG_DRM_XLNX_SDI=y +CONFIG_DRM_XLNX_BRIDGE_CSC=y +CONFIG_DRM_XLNX_BRIDGE_SCALER=y +CONFIG_DRM_XLNX_BRIDGE_VTC=y +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_SOC=y +CONFIG_USB_ULPI_BUS=y +CONFIG_USB=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y +CONFIG_USB_OTG=y +CONFIG_USB_OTG_FSM=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_ULPI=y +CONFIG_USB_GADGET=y +CONFIG_USB_CONFIGFS=y +CONFIG_USB_CONFIGFS_ACM=y +CONFIG_USB_CONFIGFS_ECM=y +CONFIG_USB_CONFIGFS_ECM_SUBSET=y +CONFIG_USB_CONFIGFS_RNDIS=y +CONFIG_USB_CONFIGFS_EEM=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +CONFIG_USB_ETH=m +CONFIG_USB_ETH_EEM=y +CONFIG_USB_MASS_STORAGE=m +CONFIG_USB_G_SERIAL=m +CONFIG_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_OF_ARASAN=y +CONFIG_EDAC=y +CONFIG_EDAC_XILINX_XILSEM=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_ZYNQMP=y +CONFIG_DMADEVICES=y +CONFIG_XILINX_ZYNQMP_DMA=y +CONFIG_DMATEST=y +CONFIG_DMABUF_HEAPS=y +CONFIG_DMABUF_HEAPS_SYSTEM=y +CONFIG_DMABUF_HEAPS_CMA=y +CONFIG_UIO=y +CONFIG_UIO_PDRV_GENIRQ=m +CONFIG_UIO_DMEM_GENIRQ=m +CONFIG_STAGING=y +CONFIG_COMMON_CLK_XLNX_CLKWZRD=y +# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set +# CONFIG_FSL_ERRATUM_A008585 is not set +CONFIG_REMOTEPROC=y +CONFIG_ZYNQMP_R5_REMOTEPROC=m +CONFIG_RPMSG_CHAR=m +CONFIG_IIO=y +CONFIG_VERSAL_SYSMON=y +CONFIG_XILINX_INTC=y +CONFIG_RESET_CONTROLLER=y +CONFIG_PHY_XILINX_ZYNQMP=y +CONFIG_PHY_XILINX_HDMIPHY=y +CONFIG_ARM_CCI_PMU=y +CONFIG_RAS=y +CONFIG_XLNX_SEC_CFG=y +CONFIG_FPGA=y +CONFIG_XILINX_PR_DECOUPLER=y +CONFIG_FPGA_REGION=y +CONFIG_OF_FPGA_REGION=y +CONFIG_FPGA_MGR_VERSAL_FPGA=y +CONFIG_EXT3_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_BTRFS_FS=y +CONFIG_EXPORTFS_BLOCK_OPS=y +CONFIG_QUOTA=y +CONFIG_QFMT_V2=y +CONFIG_AUTOFS_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_ECRYPT_FS=y +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_SUMMARY=y +CONFIG_JFFS2_FS_XATTR=y +CONFIG_JFFS2_COMPRESSION_OPTIONS=y +CONFIG_JFFS2_LZO=y +CONFIG_JFFS2_RUBIN=y +CONFIG_UBIFS_FS=y +CONFIG_CRAMFS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_ROOT_NFS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ISO8859_1=y +CONFIG_CRYPTO_DEV_XILINX_ECDSA=y +# CONFIG_XZ_DEC_X86 is not set +# CONFIG_XZ_DEC_POWERPC is not set +# CONFIG_XZ_DEC_IA64 is not set +# CONFIG_XZ_DEC_ARM is not set +# CONFIG_XZ_DEC_ARMTHUMB is not set +# CONFIG_XZ_DEC_SPARC is not set +CONFIG_DMA_CMA=y +CONFIG_CMA_SIZE_MBYTES=256 +CONFIG_PRINTK_TIME=y +# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set +CONFIG_DEBUG_FS=y +# CONFIG_SCHED_DEBUG is not set +# CONFIG_FTRACE is not set +# CONFIG_STRICT_DEVMEM is not set +CONFIG_MEMTEST=y --- linux-xilinx-6.8.0.orig/arch/arm64/configs/xilinx_versal_net_defconfig +++ linux-xilinx-6.8.0/arch/arm64/configs/xilinx_versal_net_defconfig @@ -0,0 +1,198 @@ +CONFIG_SYSVIPC=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_RCU_EXPERT=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=16 +CONFIG_CGROUPS=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_PERF_EVENTS=y +CONFIG_ARCH_ZYNQMP=y +CONFIG_ARM64_VA_BITS_48=y +CONFIG_NR_CPUS=16 +# CONFIG_RODATA_FULL_DEFAULT_ENABLED is not set +# CONFIG_ARM64_TAGGED_ADDR_ABI is not set +CONFIG_COMPAT=y +# CONFIG_ARM64_SVE is not set +CONFIG_RANDOMIZE_BASE=y +# CONFIG_EFI is not set +CONFIG_MODULES=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_COMPAT_BRK is not set +# CONFIG_COMPACTION is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 +CONFIG_CMA=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_PACKET_DIAG=y +CONFIG_UNIX=y +CONFIG_UNIX_DIAG=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +CONFIG_SYN_COOKIES=y +CONFIG_NETWORK_SECMARK=y +CONFIG_NETWORK_PHY_TIMESTAMPING=y +CONFIG_DNS_RESOLVER=y +CONFIG_VSOCKETS=y +CONFIG_QRTR=y +CONFIG_CAN=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_ZYNQMP_FIRMWARE_DEBUG=y +CONFIG_MTD=y +CONFIG_MTD_TESTS=m +CONFIG_MTD_SPI_NOR=y +# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set +CONFIG_MTD_SPI_NOR_SWP_DISABLE=y +CONFIG_OF_OVERLAY=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=65536 +CONFIG_SRAM=y +CONFIG_SCSI=y +CONFIG_BLK_DEV_SD=y +CONFIG_NETDEVICES=y +CONFIG_MACB=y +CONFIG_ADIN_PHY=y +CONFIG_DAVICOM_PHY=y +CONFIG_DP83822_PHY=y +CONFIG_DP83TC811_PHY=y +CONFIG_DP83848_PHY=y +CONFIG_DP83867_PHY=y +CONFIG_DP83869_PHY=y +CONFIG_VITESSE_PHY=y +CONFIG_XILINX_PHY=y +CONFIG_XILINX_GMII2RGMII=y +CONFIG_CAN_XILINXCAN=y +CONFIG_CAN_DEBUG_DEVICES=y +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_SERIO is not set +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_SERIAL_AMBA_PL010=y +CONFIG_SERIAL_AMBA_PL010_CONSOLE=y +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +CONFIG_SERIAL_XILINX_PS_UART=y +CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y +# CONFIG_HW_RANDOM is not set +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_CADENCE=y +CONFIG_I2C_XILINX=y +CONFIG_I2C_SLAVE=y +CONFIG_I2C_SLAVE_EEPROM=y +CONFIG_I3C=y +CONFIG_CDNS_I3C_MASTER=y +CONFIG_DW_I3C_MASTER=y +CONFIG_SPI=y +CONFIG_SPI_CADENCE=y +CONFIG_SPI_CADENCE_QUADSPI=y +CONFIG_SPI_XILINX=y +CONFIG_SPI_ZYNQMP_GQSPI=y +CONFIG_PTP_1588_CLOCK_XILINX=y +CONFIG_GPIOLIB=y +# CONFIG_HWMON is not set +CONFIG_WATCHDOG=y +CONFIG_XILINX_WATCHDOG=y +CONFIG_XILINX_WINDOW_WATCHDOG=y +CONFIG_CADENCE_WATCHDOG=y +CONFIG_REGULATOR=y +CONFIG_FB=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_USB_ULPI_BUS=y +CONFIG_USB=y +CONFIG_USB_OTG=y +CONFIG_USB_OTG_FSM=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DBGCAP=y +CONFIG_USB_STORAGE=y +CONFIG_USB_UAS=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_ULPI=y +CONFIG_USB_HUB_USB251XB=y +CONFIG_USB_USB5744=y +CONFIG_USB_HSIC_USB3503=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_XILINX=y +CONFIG_USB_CONFIGFS=y +CONFIG_USB_CONFIGFS_EEM=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +CONFIG_USB_ETH=m +CONFIG_USB_ETH_EEM=y +CONFIG_USB_MASS_STORAGE=y +CONFIG_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_OF_ARASAN=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_ZYNQMP=y +CONFIG_RTC_DRV_CADENCE=y +CONFIG_DMADEVICES=y +CONFIG_XILINX_ZYNQMP_DMA=y +CONFIG_DMATEST=y +CONFIG_SYNC_FILE=y +CONFIG_VFIO=y +CONFIG_VFIO_CDX=y +# CONFIG_VIRTIO_MENU is not set +# CONFIG_VHOST_MENU is not set +CONFIG_COMMON_CLK_XLNX_CLKWZRD=y +# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set +# CONFIG_FSL_ERRATUM_A008585 is not set +CONFIG_ARM_SMMU_V3=y +CONFIG_REMOTEPROC_CDEV=y +CONFIG_ZYNQMP_R5_REMOTEPROC=m +CONFIG_RPMSG_CHAR=y +CONFIG_RPMSG_CTRL=y +CONFIG_RPMSG_VIRTIO=y +CONFIG_IIO=y +CONFIG_IIO_ST_LSM6DSX=y +CONFIG_RESET_CONTROLLER=y +CONFIG_PHY_XILINX_ZYNQMP=y +# CONFIG_ARM_PMU is not set +CONFIG_CDX_BUS=y +CONFIG_CDX_CONTROLLER=m +CONFIG_EXT3_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_BTRFS_FS=y +CONFIG_EXPORTFS_BLOCK_OPS=y +# CONFIG_DNOTIFY is not set +CONFIG_QUOTA=y +CONFIG_QFMT_V2=y +CONFIG_AUTOFS_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_HUGETLBFS=y +CONFIG_ECRYPT_FS=y +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_SUMMARY=y +CONFIG_JFFS2_FS_XATTR=y +CONFIG_JFFS2_COMPRESSION_OPTIONS=y +CONFIG_JFFS2_LZO=y +CONFIG_JFFS2_RUBIN=y +CONFIG_CRAMFS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ISO8859_1=y +CONFIG_KEYS=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_ZSTD=y +CONFIG_DMA_CMA=y +CONFIG_CMA_SIZE_MBYTES=256 +CONFIG_PRINTK_TIME=y +# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set +CONFIG_DEBUG_FS=y +CONFIG_RCU_CPU_STALL_TIMEOUT=80 +# CONFIG_STRICT_DEVMEM is not set +CONFIG_MEMTEST=y --- linux-xilinx-6.8.0.orig/arch/arm64/configs/xilinx_zynqmp_defconfig +++ linux-xilinx-6.8.0/arch/arm64/configs/xilinx_zynqmp_defconfig @@ -0,0 +1,579 @@ +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_AUDIT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=16 +CONFIG_CGROUPS=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_EXPERT=y +CONFIG_PROFILING=y +CONFIG_ARCH_ZYNQMP=y +CONFIG_NR_CPUS=4 +CONFIG_COMPAT=y +CONFIG_RANDOMIZE_BASE=y +# CONFIG_DMI is not set +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y +CONFIG_CPUFREQ_DT=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_COMPAT_BRK is not set +CONFIG_MEMORY_HOTPLUG=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 +CONFIG_TRANSPARENT_HUGEPAGE=y +CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y +CONFIG_CMA=y +# CONFIG_ZONE_DMA is not set +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_XFRM_USER=y +CONFIG_NET_KEY=y +CONFIG_NET_KEY_MIGRATE=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +CONFIG_SYN_COOKIES=y +CONFIG_NETWORK_SECMARK=y +CONFIG_NETFILTER=y +CONFIG_NETFILTER_NETLINK_LOG=y +CONFIG_NF_CONNTRACK=m +CONFIG_NF_CT_NETLINK=m +CONFIG_NETFILTER_XT_MARK=y +CONFIG_NETFILTER_XT_TARGET_CHECKSUM=y +CONFIG_NETFILTER_XT_TARGET_LOG=y +CONFIG_NETFILTER_XT_MATCH_CONNMARK=m +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +CONFIG_NETFILTER_XT_MATCH_LIMIT=y +CONFIG_NETFILTER_XT_MATCH_MAC=y +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y +CONFIG_NETFILTER_XT_MATCH_STATE=m +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +CONFIG_IP_NF_MANGLE=y +CONFIG_IP6_NF_IPTABLES=y +CONFIG_IP6_NF_FILTER=y +CONFIG_IP6_NF_TARGET_REJECT=y +CONFIG_IP6_NF_MANGLE=y +CONFIG_BRIDGE_NF_EBTABLES=y +CONFIG_BRIDGE_EBT_T_FILTER=y +CONFIG_BRIDGE_EBT_T_NAT=y +CONFIG_BRIDGE_EBT_MARK_T=y +CONFIG_BRIDGE=y +CONFIG_VLAN_8021Q=y +CONFIG_NET_SCHED=y +CONFIG_NET_SCH_MQPRIO=y +CONFIG_NET_SCH_SKBPRIO=y +CONFIG_NET_PKTGEN=y +CONFIG_CAN=y +CONFIG_BT=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=y +CONFIG_BT_LEDS=y +CONFIG_BT_HCIBTUSB=y +CONFIG_BT_HCIBTSDIO=y +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_BCSP=y +CONFIG_BT_HCIUART_ATH3K=y +CONFIG_BT_HCIUART_LL=y +CONFIG_BT_HCIUART_3WIRE=y +CONFIG_BT_HCIUART_INTEL=y +CONFIG_BT_HCIUART_QCA=y +CONFIG_BT_HCIBCM203X=y +CONFIG_BT_HCIBPA10X=y +CONFIG_BT_HCIBFUSB=y +CONFIG_BT_HCIVHCI=y +CONFIG_BT_MRVL=y +CONFIG_BT_MRVL_SDIO=y +CONFIG_BT_ATH3K=y +CONFIG_CFG80211=m +CONFIG_NL80211_TESTMODE=y +CONFIG_CFG80211_CERTIFICATION_ONUS=y +CONFIG_CFG80211_REG_CELLULAR_HINTS=y +CONFIG_CFG80211_REG_RELAX_NO_IR=y +CONFIG_CFG80211_WEXT=y +CONFIG_MAC80211=m +CONFIG_MAC80211_LEDS=y +CONFIG_MAC80211_MESSAGE_TRACING=y +CONFIG_MAC80211_DEBUG_MENU=y +CONFIG_RFKILL=y +CONFIG_RFKILL_INPUT=y +CONFIG_RFKILL_GPIO=y +CONFIG_NET_9P=y +CONFIG_PCI=y +# CONFIG_VGA_ARB is not set +CONFIG_PCIE_XILINX_NWL=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_CONNECTOR=y +CONFIG_ZYNQMP_FIRMWARE_DEBUG=y +CONFIG_ZYNQMP_FIRMWARE_SECURE=y +CONFIG_MTD=y +CONFIG_MTD_TESTS=m +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_CFI=y +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_DATAFLASH=y +CONFIG_MTD_RAW_NAND=y +CONFIG_MTD_NAND_ARASAN=y +CONFIG_MTD_NAND_ECC_SW_BCH=y +CONFIG_MTD_SPI_NOR=y +# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set +CONFIG_MTD_UBI=y +CONFIG_OF_OVERLAY=y +CONFIG_OF_CONFIGFS=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=65536 +CONFIG_XILINX_SDFEC=y +CONFIG_EEPROM_AT24=y +CONFIG_EEPROM_AT25=y +CONFIG_TI_ST=y +CONFIG_BLK_DEV_SD=y +CONFIG_ATA=y +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_AHCI_CEVA=y +# CONFIG_ATA_SFF is not set +CONFIG_NETDEVICES=y +CONFIG_TUN=y +CONFIG_MACB=y +CONFIG_XILINX_EMACLITE=y +CONFIG_XILINX_AXI_EMAC=y +CONFIG_AMD_PHY=y +CONFIG_BROADCOM_PHY=y +CONFIG_BCM7XXX_PHY=y +CONFIG_BCM87XX_PHY=y +CONFIG_CICADA_PHY=y +CONFIG_DAVICOM_PHY=y +CONFIG_ICPLUS_PHY=y +CONFIG_LXT_PHY=y +CONFIG_LSI_ET1011C_PHY=y +CONFIG_MARVELL_PHY=y +CONFIG_MICREL_PHY=y +CONFIG_NATIONAL_PHY=y +CONFIG_AT803X_PHY=y +CONFIG_QSEMI_PHY=y +CONFIG_REALTEK_PHY=y +CONFIG_SMSC_PHY=y +CONFIG_STE10XP=y +CONFIG_DP83867_PHY=y +CONFIG_VITESSE_PHY=y +CONFIG_XILINX_GMII2RGMII=y +CONFIG_CAN_XILINXCAN=y +CONFIG_USB_USBNET=y +CONFIG_WL18XX=m +CONFIG_WLCORE_SPI=m +CONFIG_WLCORE_SDIO=m +CONFIG_INPUT_EVDEV=y +CONFIG_KEYBOARD_GPIO=y +CONFIG_KEYBOARD_GPIO_POLLED=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SERIAL_MAX310X=y +CONFIG_SERIAL_UARTLITE=y +CONFIG_SERIAL_UARTLITE_CONSOLE=y +CONFIG_SERIAL_UARTLITE_NR_UARTS=16 +CONFIG_SERIAL_XILINX_PS_UART=y +CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y +CONFIG_SERIAL_DEV_BUS=y +# CONFIG_HW_RANDOM is not set +CONFIG_TCG_TPM=y +CONFIG_TCG_TIS_SPI=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_PCA954x=y +CONFIG_I2C_CADENCE=y +CONFIG_I2C_XILINX=y +CONFIG_I2C_SLAVE=y +CONFIG_I2C_SLAVE_EEPROM=y +CONFIG_SPI=y +CONFIG_SPI_CADENCE=y +CONFIG_SPI_XILINX=y +CONFIG_SPI_ZYNQMP_GQSPI=y +CONFIG_PINCTRL=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_XILINX=y +CONFIG_GPIO_ZYNQ=y +CONFIG_GPIO_PCA953X=y +CONFIG_GPIO_PCA9570=y +CONFIG_GPIO_TPS65086=y +CONFIG_POWER_RESET_LTC2952=y +CONFIG_SENSORS_IIO_HWMON=y +CONFIG_SENSORS_LM63=y +CONFIG_PMBUS=y +CONFIG_SENSORS_IRPS5401=y +CONFIG_SENSORS_MAX20751=y +CONFIG_SENSORS_PWM_FAN=y +CONFIG_WATCHDOG=y +CONFIG_XILINX_WATCHDOG=y +CONFIG_CADENCE_WATCHDOG=y +CONFIG_MFD_TPS65086=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_GPIO=y +CONFIG_REGULATOR_TPS65086=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_USB_SUPPORT=y +CONFIG_USB_VIDEO_CLASS=y +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_VIDEO_XILINX=y +CONFIG_VIDEO_XILINX_CSI2RXSS=y +CONFIG_VIDEO_XILINX_AXI4S_SWITCH=y +CONFIG_VIDEO_XILINX_CFA=y +CONFIG_VIDEO_XILINX_CRESAMPLE=y +CONFIG_VIDEO_XILINX_DEMOSAIC=y +CONFIG_VIDEO_XILINX_GAMMA=y +CONFIG_VIDEO_XILINX_HDMI21RXSS=y +CONFIG_VIDEO_XILINX_HLS=y +CONFIG_VIDEO_XILINX_ISP=y +CONFIG_VIDEO_XILINX_REMAPPER=y +CONFIG_VIDEO_XILINX_RGB2YUV=y +CONFIG_VIDEO_XILINX_SCALER=y +CONFIG_VIDEO_XILINX_SDIRXSS=y +CONFIG_VIDEO_XILINX_SWITCH=y +CONFIG_VIDEO_XILINX_TPG=y +CONFIG_VIDEO_XILINX_VPSS_CSC=y +CONFIG_VIDEO_XILINX_VPSS_SCALER=y +CONFIG_VIDEO_XILINX_DPRXSS=y +CONFIG_VIDEO_XILINX_SCD=y +CONFIG_VIDEO_XILINX_M2M=y +CONFIG_VIDEO_XILINX_AXI4S_BROADCASTER=y +CONFIG_VIDEO_XILINX_AXI4S_SUBSETCONV=y +CONFIG_VIDEO_IMX219=y +CONFIG_VIDEO_IMX274=y +# CONFIG_MEDIA_TUNER_E4000 is not set +# CONFIG_MEDIA_TUNER_FC0011 is not set +# CONFIG_MEDIA_TUNER_FC0012 is not set +# CONFIG_MEDIA_TUNER_FC0013 is not set +# CONFIG_MEDIA_TUNER_FC2580 is not set +# CONFIG_MEDIA_TUNER_IT913X is not set +# CONFIG_MEDIA_TUNER_M88RS6000T is not set +# CONFIG_MEDIA_TUNER_MAX2165 is not set +# CONFIG_MEDIA_TUNER_MC44S803 is not set +# CONFIG_MEDIA_TUNER_MSI001 is not set +# CONFIG_MEDIA_TUNER_MT2060 is not set +# CONFIG_MEDIA_TUNER_MT2063 is not set +# CONFIG_MEDIA_TUNER_MT20XX is not set +# CONFIG_MEDIA_TUNER_MT2131 is not set +# CONFIG_MEDIA_TUNER_MT2266 is not set +# CONFIG_MEDIA_TUNER_MXL301RF is not set +# CONFIG_MEDIA_TUNER_MXL5005S is not set +# CONFIG_MEDIA_TUNER_MXL5007T is not set +# CONFIG_MEDIA_TUNER_QM1D1B0004 is not set +# CONFIG_MEDIA_TUNER_QM1D1C0042 is not set +# CONFIG_MEDIA_TUNER_QT1010 is not set +# CONFIG_MEDIA_TUNER_R820T is not set +# CONFIG_MEDIA_TUNER_SI2157 is not set +# CONFIG_MEDIA_TUNER_SIMPLE is not set +# CONFIG_MEDIA_TUNER_TDA18212 is not set +# CONFIG_MEDIA_TUNER_TDA18218 is not set +# CONFIG_MEDIA_TUNER_TDA18250 is not set +# CONFIG_MEDIA_TUNER_TDA18271 is not set +# CONFIG_MEDIA_TUNER_TDA827X is not set +# CONFIG_MEDIA_TUNER_TDA8290 is not set +# CONFIG_MEDIA_TUNER_TDA9887 is not set +# CONFIG_MEDIA_TUNER_TEA5761 is not set +# CONFIG_MEDIA_TUNER_TEA5767 is not set +# CONFIG_MEDIA_TUNER_TUA9001 is not set +# CONFIG_MEDIA_TUNER_XC2028 is not set +# CONFIG_MEDIA_TUNER_XC4000 is not set +# CONFIG_MEDIA_TUNER_XC5000 is not set +# CONFIG_DVB_M88DS3103 is not set +# CONFIG_DVB_MXL5XX is not set +# CONFIG_DVB_STB0899 is not set +# CONFIG_DVB_STB6100 is not set +# CONFIG_DVB_STV090x is not set +# CONFIG_DVB_STV0910 is not set +# CONFIG_DVB_STV6110x is not set +# CONFIG_DVB_STV6111 is not set +# CONFIG_DVB_DRXK is not set +# CONFIG_DVB_MN88472 is not set +# CONFIG_DVB_MN88473 is not set +# CONFIG_DVB_SI2165 is not set +# CONFIG_DVB_TDA18271C2DD is not set +# CONFIG_DVB_CX24110 is not set +# CONFIG_DVB_CX24116 is not set +# CONFIG_DVB_CX24117 is not set +# CONFIG_DVB_CX24120 is not set +# CONFIG_DVB_CX24123 is not set +# CONFIG_DVB_DS3000 is not set +# CONFIG_DVB_MB86A16 is not set +# CONFIG_DVB_MT312 is not set +# CONFIG_DVB_S5H1420 is not set +# CONFIG_DVB_SI21XX is not set +# CONFIG_DVB_STB6000 is not set +# CONFIG_DVB_STV0288 is not set +# CONFIG_DVB_STV0299 is not set +# CONFIG_DVB_STV0900 is not set +# CONFIG_DVB_STV6110 is not set +# CONFIG_DVB_TDA10071 is not set +# CONFIG_DVB_TDA10086 is not set +# CONFIG_DVB_TDA8083 is not set +# CONFIG_DVB_TDA8261 is not set +# CONFIG_DVB_TDA826X is not set +# CONFIG_DVB_TS2020 is not set +# CONFIG_DVB_TUA6100 is not set +# CONFIG_DVB_TUNER_CX24113 is not set +# CONFIG_DVB_TUNER_ITD1000 is not set +# CONFIG_DVB_VES1X93 is not set +# CONFIG_DVB_ZL10036 is not set +# CONFIG_DVB_ZL10039 is not set +# CONFIG_DVB_AF9013 is not set +# CONFIG_DVB_CX22700 is not set +# CONFIG_DVB_CX22702 is not set +# CONFIG_DVB_CXD2820R is not set +# CONFIG_DVB_CXD2841ER is not set +# CONFIG_DVB_DIB3000MB is not set +# CONFIG_DVB_DIB3000MC is not set +# CONFIG_DVB_DIB7000M is not set +# CONFIG_DVB_DIB7000P is not set +# CONFIG_DVB_DIB9000 is not set +# CONFIG_DVB_DRXD is not set +# CONFIG_DVB_EC100 is not set +# CONFIG_DVB_L64781 is not set +# CONFIG_DVB_MT352 is not set +# CONFIG_DVB_NXT6000 is not set +# CONFIG_DVB_RTL2830 is not set +# CONFIG_DVB_RTL2832 is not set +# CONFIG_DVB_RTL2832_SDR is not set +# CONFIG_DVB_S5H1432 is not set +# CONFIG_DVB_SI2168 is not set +# CONFIG_DVB_SP887X is not set +# CONFIG_DVB_STV0367 is not set +# CONFIG_DVB_TDA10048 is not set +# CONFIG_DVB_TDA1004X is not set +# CONFIG_DVB_ZD1301_DEMOD is not set +# CONFIG_DVB_ZL10353 is not set +# CONFIG_DVB_CXD2880 is not set +# CONFIG_DVB_STV0297 is not set +# CONFIG_DVB_TDA10021 is not set +# CONFIG_DVB_TDA10023 is not set +# CONFIG_DVB_VES1820 is not set +# CONFIG_DVB_AU8522_DTV is not set +# CONFIG_DVB_AU8522_V4L is not set +# CONFIG_DVB_BCM3510 is not set +# CONFIG_DVB_LG2160 is not set +# CONFIG_DVB_LGDT3305 is not set +# CONFIG_DVB_LGDT3306A is not set +# CONFIG_DVB_LGDT330X is not set +# CONFIG_DVB_MXL692 is not set +# CONFIG_DVB_NXT200X is not set +# CONFIG_DVB_OR51132 is not set +# CONFIG_DVB_OR51211 is not set +# CONFIG_DVB_S5H1409 is not set +# CONFIG_DVB_S5H1411 is not set +# CONFIG_DVB_DIB8000 is not set +# CONFIG_DVB_MB86A20S is not set +# CONFIG_DVB_S921 is not set +# CONFIG_DVB_MN88443X is not set +# CONFIG_DVB_TC90522 is not set +# CONFIG_DVB_PLL is not set +# CONFIG_DVB_TUNER_DIB0070 is not set +# CONFIG_DVB_TUNER_DIB0090 is not set +# CONFIG_DVB_A8293 is not set +# CONFIG_DVB_AF9033 is not set +# CONFIG_DVB_ASCOT2E is not set +# CONFIG_DVB_ATBM8830 is not set +# CONFIG_DVB_HELENE is not set +# CONFIG_DVB_HORUS3A is not set +# CONFIG_DVB_ISL6405 is not set +# CONFIG_DVB_ISL6421 is not set +# CONFIG_DVB_ISL6423 is not set +# CONFIG_DVB_IX2505V is not set +# CONFIG_DVB_LGS8GL5 is not set +# CONFIG_DVB_LGS8GXX is not set +# CONFIG_DVB_LNBH25 is not set +# CONFIG_DVB_LNBH29 is not set +# CONFIG_DVB_LNBP21 is not set +# CONFIG_DVB_LNBP22 is not set +# CONFIG_DVB_M88RS2000 is not set +# CONFIG_DVB_TDA665x is not set +# CONFIG_DVB_DRX39XYJ is not set +# CONFIG_DVB_CXD2099 is not set +# CONFIG_DVB_SP2 is not set +CONFIG_DRM=y +CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM=y +CONFIG_DRM_ZYNQMP_DPSUB=y +CONFIG_DRM_XLNX=y +CONFIG_DRM_XLNX_BRIDGE=y +CONFIG_DRM_XLNX_BRIDGE_DEBUG_FS=y +CONFIG_DRM_XLNX_DPTX=y +CONFIG_DRM_XLNX_DSI=y +CONFIG_DRM_XLNX_HDMITX=y +CONFIG_DRM_XLNX_MIXER=y +CONFIG_DRM_XLNX_PL_DISP=y +CONFIG_DRM_XLNX_SDI=y +CONFIG_DRM_XLNX_BRIDGE_CSC=y +CONFIG_DRM_XLNX_BRIDGE_SCALER=y +CONFIG_DRM_XLNX_BRIDGE_VTC=y +CONFIG_FB=y +CONFIG_SOUND=y +CONFIG_SND=y +# CONFIG_SND_DRIVERS is not set +# CONFIG_SND_PCI is not set +CONFIG_SND_USB_AUDIO=y +CONFIG_SND_SOC=y +CONFIG_SND_SOC_XILINX_DP=y +CONFIG_SND_SOC_XILINX_SDI=y +CONFIG_SND_SOC_XILINX_I2S=y +CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER=y +CONFIG_SND_SOC_XILINX_SPDIF=y +CONFIG_SND_SOC_XILINX_PL_SND_CARD=y +CONFIG_USB_ULPI_BUS=y +CONFIG_USB=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y +CONFIG_USB_OTG=y +CONFIG_USB_OTG_FSM=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_USB_UAS=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_ULPI=y +CONFIG_USB_USB2244=m +CONFIG_USB_USB5744=m +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_XILINX=y +CONFIG_USB_CONFIGFS=y +CONFIG_USB_CONFIGFS_ACM=y +CONFIG_USB_CONFIGFS_ECM=y +CONFIG_USB_CONFIGFS_ECM_SUBSET=y +CONFIG_USB_CONFIGFS_RNDIS=y +CONFIG_USB_CONFIGFS_EEM=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +CONFIG_USB_ETH=m +CONFIG_USB_ETH_EEM=y +CONFIG_USB_MASS_STORAGE=m +CONFIG_USB_G_SERIAL=m +CONFIG_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_OF_ARASAN=y +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_ONESHOT=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +CONFIG_LEDS_TRIGGER_CPU=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y +CONFIG_LEDS_TRIGGER_TRANSIENT=y +CONFIG_LEDS_TRIGGER_CAMERA=y +CONFIG_EDAC=y +CONFIG_EDAC_SYNOPSYS=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_ZYNQMP=y +CONFIG_DMADEVICES=y +CONFIG_XILINX_DMA=y +CONFIG_XILINX_ZYNQMP_DMA=y +CONFIG_XILINX_ZYNQMP_DPDMA=y +CONFIG_DMATEST=y +CONFIG_DMABUF_HEAPS=y +CONFIG_DMABUF_HEAPS_SYSTEM=y +CONFIG_DMABUF_HEAPS_CMA=y +CONFIG_UIO=y +CONFIG_UIO_PDRV_GENIRQ=m +CONFIG_UIO_DMEM_GENIRQ=m +CONFIG_UIO_XILINX_APM=y +CONFIG_STAGING=y +CONFIG_XILINX_FCLK=y +CONFIG_XLNX_SYNC=y +CONFIG_SERIAL_UARTLITE_RS485=y +CONFIG_AXIENET_HAS_TADMA=y +CONFIG_XILINX_TSN=y +CONFIG_COMMON_CLK_SI5341=y +CONFIG_COMMON_CLK_SI570=y +CONFIG_COMMON_CLK_SI5324=y +CONFIG_COMMON_CLK_VC7=y +CONFIG_COMMON_CLK_PROXO=y +CONFIG_XILINX_VCU=m +CONFIG_COMMON_CLK_XLNX_CLKWZRD=y +CONFIG_REMOTEPROC=y +CONFIG_ZYNQMP_R5_REMOTEPROC=m +CONFIG_RPMSG_CHAR=m +CONFIG_IIO=y +CONFIG_INA2XX_ADC=y +CONFIG_INA260_ADC=y +CONFIG_XILINX_XADC=y +CONFIG_XILINX_AMS=y +CONFIG_BME680=y +CONFIG_BMG160=y +CONFIG_BMC150_MAGN_SPI=y +CONFIG_PWM=y +CONFIG_PWM_CADENCE=y +CONFIG_XILINX_INTC=y +CONFIG_RESET_CONTROLLER=y +CONFIG_PHY_XILINX_ZYNQMP=y +CONFIG_PHY_XILINX_HDMIPHY=y +CONFIG_ARM_CCI_PMU=y +CONFIG_RAS=y +CONFIG_NVMEM_ZYNQMP=y +CONFIG_FPGA=y +CONFIG_XILINX_AFI_FPGA=y +CONFIG_FPGA_BRIDGE=y +CONFIG_XILINX_PR_DECOUPLER=y +CONFIG_FPGA_REGION=y +CONFIG_OF_FPGA_REGION=y +CONFIG_FPGA_MGR_ZYNQMP_FPGA=y +CONFIG_EXT3_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_BTRFS_FS=y +CONFIG_QUOTA=y +CONFIG_QFMT_V2=y +CONFIG_AUTOFS_FS=y +CONFIG_ISO9660_FS=y +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_HUGETLBFS=y +CONFIG_ECRYPT_FS=y +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_XATTR=y +CONFIG_JFFS2_COMPRESSION_OPTIONS=y +CONFIG_JFFS2_LZO=y +CONFIG_JFFS2_RUBIN=y +CONFIG_UBIFS_FS=y +CONFIG_CRAMFS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_ROOT_NFS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ISO8859_1=y +# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_USER_API_HASH=y +CONFIG_CRYPTO_DEV_XILINX_RSA=y +CONFIG_CRYPTO_DEV_ZYNQMP_AES=y +CONFIG_CRYPTO_DEV_ZYNQMP_SHA3=y +CONFIG_DMA_CMA=y +CONFIG_CMA_SIZE_MBYTES=256 +CONFIG_PRINTK_TIME=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_DEBUG_FS=y +# CONFIG_SCHED_DEBUG is not set +# CONFIG_FTRACE is not set +# CONFIG_STRICT_DEVMEM is not set +CONFIG_MEMTEST=y --- linux-xilinx-6.8.0.orig/arch/arm64/include/asm/acpi.h +++ linux-xilinx-6.8.0/arch/arm64/include/asm/acpi.h @@ -119,6 +119,18 @@ return acpi_cpu_get_madt_gicc(cpu)->uid; } +static inline int get_cpu_for_acpi_id(u32 uid) +{ + int cpu; + + for (cpu = 0; cpu < nr_cpu_ids; cpu++) + if (acpi_cpu_get_madt_gicc(cpu) && + uid == get_acpi_id_for_cpu(cpu)) + return cpu; + + return -EINVAL; +} + static inline void arch_fix_phys_package_id(int num, u32 slot) { } void __init acpi_init_cpus(void); int apei_claim_sea(struct pt_regs *regs); --- linux-xilinx-6.8.0.orig/arch/arm64/include/asm/asm-bug.h +++ linux-xilinx-6.8.0/arch/arm64/include/asm/asm-bug.h @@ -28,6 +28,7 @@ 14470: .long 14471f - .; \ _BUGVERBOSE_LOCATION(__FILE__, __LINE__) \ .short flags; \ + .align 2; \ .popsection; \ 14471: #else --- linux-xilinx-6.8.0.orig/arch/arm64/include/asm/barrier.h +++ linux-xilinx-6.8.0/arch/arm64/include/asm/barrier.h @@ -40,6 +40,10 @@ */ #define dgh() asm volatile("hint #6" : : : "memory") +#define spec_bar() asm volatile(ALTERNATIVE("dsb nsh\nisb\n", \ + SB_BARRIER_INSN"nop\n", \ + ARM64_HAS_SB)) + #ifdef CONFIG_ARM64_PSEUDO_NMI #define pmr_sync() \ do { \ --- linux-xilinx-6.8.0.orig/arch/arm64/include/asm/cpucaps.h +++ linux-xilinx-6.8.0/arch/arm64/include/asm/cpucaps.h @@ -58,6 +58,8 @@ return IS_ENABLED(CONFIG_NVIDIA_CARMEL_CNP_ERRATUM); case ARM64_WORKAROUND_REPEAT_TLBI: return IS_ENABLED(CONFIG_ARM64_WORKAROUND_REPEAT_TLBI); + case ARM64_WORKAROUND_SPECULATIVE_SSBS: + return IS_ENABLED(CONFIG_ARM64_WORKAROUND_SPECULATIVE_SSBS); } return true; --- linux-xilinx-6.8.0.orig/arch/arm64/include/asm/cputype.h +++ linux-xilinx-6.8.0/arch/arm64/include/asm/cputype.h @@ -86,6 +86,15 @@ #define ARM_CPU_PART_CORTEX_X2 0xD48 #define ARM_CPU_PART_NEOVERSE_N2 0xD49 #define ARM_CPU_PART_CORTEX_A78C 0xD4B +#define ARM_CPU_PART_CORTEX_X1C 0xD4C +#define ARM_CPU_PART_CORTEX_X3 0xD4E +#define ARM_CPU_PART_NEOVERSE_V2 0xD4F +#define ARM_CPU_PART_CORTEX_A720 0xD81 +#define ARM_CPU_PART_CORTEX_X4 0xD82 +#define ARM_CPU_PART_NEOVERSE_V3 0xD84 +#define ARM_CPU_PART_CORTEX_X925 0xD85 +#define ARM_CPU_PART_CORTEX_A725 0xD87 +#define ARM_CPU_PART_NEOVERSE_N3 0xD8E #define APM_CPU_PART_XGENE 0x000 #define APM_CPU_VAR_POTENZA 0x00 @@ -135,6 +144,7 @@ #define APPLE_CPU_PART_M2_AVALANCHE_MAX 0x039 #define AMPERE_CPU_PART_AMPERE1 0xAC3 +#define AMPERE_CPU_PART_AMPERE1A 0xAC4 #define MICROSOFT_CPU_PART_AZURE_COBALT_100 0xD49 /* Based on r0p0 of ARM Neoverse N2 */ @@ -159,6 +169,15 @@ #define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2) #define MIDR_NEOVERSE_N2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N2) #define MIDR_CORTEX_A78C MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78C) +#define MIDR_CORTEX_X1C MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X1C) +#define MIDR_CORTEX_X3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X3) +#define MIDR_NEOVERSE_V2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V2) +#define MIDR_CORTEX_A720 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A720) +#define MIDR_CORTEX_X4 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X4) +#define MIDR_NEOVERSE_V3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V3) +#define MIDR_CORTEX_X925 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X925) +#define MIDR_CORTEX_A725 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A725) +#define MIDR_NEOVERSE_N3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N3) #define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX) #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX) #define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX) @@ -196,6 +215,7 @@ #define MIDR_APPLE_M2_BLIZZARD_MAX MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_BLIZZARD_MAX) #define MIDR_APPLE_M2_AVALANCHE_MAX MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_AVALANCHE_MAX) #define MIDR_AMPERE1 MIDR_CPU_MODEL(ARM_CPU_IMP_AMPERE, AMPERE_CPU_PART_AMPERE1) +#define MIDR_AMPERE1A MIDR_CPU_MODEL(ARM_CPU_IMP_AMPERE, AMPERE_CPU_PART_AMPERE1A) #define MIDR_MICROSOFT_AZURE_COBALT_100 MIDR_CPU_MODEL(ARM_CPU_IMP_MICROSOFT, MICROSOFT_CPU_PART_AZURE_COBALT_100) /* Fujitsu Erratum 010001 affects A64FX 1.0 and 1.1, (v0r0 and v1r0) */ --- linux-xilinx-6.8.0.orig/arch/arm64/include/asm/esr.h +++ linux-xilinx-6.8.0/arch/arm64/include/asm/esr.h @@ -10,63 +10,63 @@ #include #include -#define ESR_ELx_EC_UNKNOWN (0x00) -#define ESR_ELx_EC_WFx (0x01) +#define ESR_ELx_EC_UNKNOWN UL(0x00) +#define ESR_ELx_EC_WFx UL(0x01) /* Unallocated EC: 0x02 */ -#define ESR_ELx_EC_CP15_32 (0x03) -#define ESR_ELx_EC_CP15_64 (0x04) -#define ESR_ELx_EC_CP14_MR (0x05) -#define ESR_ELx_EC_CP14_LS (0x06) -#define ESR_ELx_EC_FP_ASIMD (0x07) -#define ESR_ELx_EC_CP10_ID (0x08) /* EL2 only */ -#define ESR_ELx_EC_PAC (0x09) /* EL2 and above */ +#define ESR_ELx_EC_CP15_32 UL(0x03) +#define ESR_ELx_EC_CP15_64 UL(0x04) +#define ESR_ELx_EC_CP14_MR UL(0x05) +#define ESR_ELx_EC_CP14_LS UL(0x06) +#define ESR_ELx_EC_FP_ASIMD UL(0x07) +#define ESR_ELx_EC_CP10_ID UL(0x08) /* EL2 only */ +#define ESR_ELx_EC_PAC UL(0x09) /* EL2 and above */ /* Unallocated EC: 0x0A - 0x0B */ -#define ESR_ELx_EC_CP14_64 (0x0C) -#define ESR_ELx_EC_BTI (0x0D) -#define ESR_ELx_EC_ILL (0x0E) +#define ESR_ELx_EC_CP14_64 UL(0x0C) +#define ESR_ELx_EC_BTI UL(0x0D) +#define ESR_ELx_EC_ILL UL(0x0E) /* Unallocated EC: 0x0F - 0x10 */ -#define ESR_ELx_EC_SVC32 (0x11) -#define ESR_ELx_EC_HVC32 (0x12) /* EL2 only */ -#define ESR_ELx_EC_SMC32 (0x13) /* EL2 and above */ +#define ESR_ELx_EC_SVC32 UL(0x11) +#define ESR_ELx_EC_HVC32 UL(0x12) /* EL2 only */ +#define ESR_ELx_EC_SMC32 UL(0x13) /* EL2 and above */ /* Unallocated EC: 0x14 */ -#define ESR_ELx_EC_SVC64 (0x15) -#define ESR_ELx_EC_HVC64 (0x16) /* EL2 and above */ -#define ESR_ELx_EC_SMC64 (0x17) /* EL2 and above */ -#define ESR_ELx_EC_SYS64 (0x18) -#define ESR_ELx_EC_SVE (0x19) -#define ESR_ELx_EC_ERET (0x1a) /* EL2 only */ +#define ESR_ELx_EC_SVC64 UL(0x15) +#define ESR_ELx_EC_HVC64 UL(0x16) /* EL2 and above */ +#define ESR_ELx_EC_SMC64 UL(0x17) /* EL2 and above */ +#define ESR_ELx_EC_SYS64 UL(0x18) +#define ESR_ELx_EC_SVE UL(0x19) +#define ESR_ELx_EC_ERET UL(0x1a) /* EL2 only */ /* Unallocated EC: 0x1B */ -#define ESR_ELx_EC_FPAC (0x1C) /* EL1 and above */ -#define ESR_ELx_EC_SME (0x1D) +#define ESR_ELx_EC_FPAC UL(0x1C) /* EL1 and above */ +#define ESR_ELx_EC_SME UL(0x1D) /* Unallocated EC: 0x1E */ -#define ESR_ELx_EC_IMP_DEF (0x1f) /* EL3 only */ -#define ESR_ELx_EC_IABT_LOW (0x20) -#define ESR_ELx_EC_IABT_CUR (0x21) -#define ESR_ELx_EC_PC_ALIGN (0x22) +#define ESR_ELx_EC_IMP_DEF UL(0x1f) /* EL3 only */ +#define ESR_ELx_EC_IABT_LOW UL(0x20) +#define ESR_ELx_EC_IABT_CUR UL(0x21) +#define ESR_ELx_EC_PC_ALIGN UL(0x22) /* Unallocated EC: 0x23 */ -#define ESR_ELx_EC_DABT_LOW (0x24) -#define ESR_ELx_EC_DABT_CUR (0x25) -#define ESR_ELx_EC_SP_ALIGN (0x26) -#define ESR_ELx_EC_MOPS (0x27) -#define ESR_ELx_EC_FP_EXC32 (0x28) +#define ESR_ELx_EC_DABT_LOW UL(0x24) +#define ESR_ELx_EC_DABT_CUR UL(0x25) +#define ESR_ELx_EC_SP_ALIGN UL(0x26) +#define ESR_ELx_EC_MOPS UL(0x27) +#define ESR_ELx_EC_FP_EXC32 UL(0x28) /* Unallocated EC: 0x29 - 0x2B */ -#define ESR_ELx_EC_FP_EXC64 (0x2C) +#define ESR_ELx_EC_FP_EXC64 UL(0x2C) /* Unallocated EC: 0x2D - 0x2E */ -#define ESR_ELx_EC_SERROR (0x2F) -#define ESR_ELx_EC_BREAKPT_LOW (0x30) -#define ESR_ELx_EC_BREAKPT_CUR (0x31) -#define ESR_ELx_EC_SOFTSTP_LOW (0x32) -#define ESR_ELx_EC_SOFTSTP_CUR (0x33) -#define ESR_ELx_EC_WATCHPT_LOW (0x34) -#define ESR_ELx_EC_WATCHPT_CUR (0x35) +#define ESR_ELx_EC_SERROR UL(0x2F) +#define ESR_ELx_EC_BREAKPT_LOW UL(0x30) +#define ESR_ELx_EC_BREAKPT_CUR UL(0x31) +#define ESR_ELx_EC_SOFTSTP_LOW UL(0x32) +#define ESR_ELx_EC_SOFTSTP_CUR UL(0x33) +#define ESR_ELx_EC_WATCHPT_LOW UL(0x34) +#define ESR_ELx_EC_WATCHPT_CUR UL(0x35) /* Unallocated EC: 0x36 - 0x37 */ -#define ESR_ELx_EC_BKPT32 (0x38) +#define ESR_ELx_EC_BKPT32 UL(0x38) /* Unallocated EC: 0x39 */ -#define ESR_ELx_EC_VECTOR32 (0x3A) /* EL2 only */ +#define ESR_ELx_EC_VECTOR32 UL(0x3A) /* EL2 only */ /* Unallocated EC: 0x3B */ -#define ESR_ELx_EC_BRK64 (0x3C) +#define ESR_ELx_EC_BRK64 UL(0x3C) /* Unallocated EC: 0x3D - 0x3F */ -#define ESR_ELx_EC_MAX (0x3F) +#define ESR_ELx_EC_MAX UL(0x3F) #define ESR_ELx_EC_SHIFT (26) #define ESR_ELx_EC_WIDTH (6) --- linux-xilinx-6.8.0.orig/arch/arm64/include/asm/insn.h +++ linux-xilinx-6.8.0/arch/arm64/include/asm/insn.h @@ -347,6 +347,7 @@ __AARCH64_INSN_FUNCS(exclusive, 0x3F800000, 0x08000000) __AARCH64_INSN_FUNCS(load_ex, 0x3F400000, 0x08400000) __AARCH64_INSN_FUNCS(store_ex, 0x3F400000, 0x08000000) +__AARCH64_INSN_FUNCS(mops, 0x3B200C00, 0x19000400) __AARCH64_INSN_FUNCS(stp, 0x7FC00000, 0x29000000) __AARCH64_INSN_FUNCS(ldp, 0x7FC00000, 0x29400000) __AARCH64_INSN_FUNCS(stp_post, 0x7FC00000, 0x28800000) --- linux-xilinx-6.8.0.orig/arch/arm64/include/asm/irqflags.h +++ linux-xilinx-6.8.0/arch/arm64/include/asm/irqflags.h @@ -5,7 +5,6 @@ #ifndef __ASM_IRQFLAGS_H #define __ASM_IRQFLAGS_H -#include #include #include #include --- linux-xilinx-6.8.0.orig/arch/arm64/include/asm/jump_label.h +++ linux-xilinx-6.8.0/arch/arm64/include/asm/jump_label.h @@ -13,6 +13,7 @@ #include #include +#define HAVE_JUMP_LABEL_BATCH #define JUMP_LABEL_NOP_SIZE AARCH64_INSN_SIZE static __always_inline bool arch_static_branch(struct static_key * const key, --- linux-xilinx-6.8.0.orig/arch/arm64/include/asm/kvm_host.h +++ linux-xilinx-6.8.0/arch/arm64/include/asm/kvm_host.h @@ -73,8 +73,6 @@ static inline enum kvm_mode kvm_get_mode(void) { return KVM_MODE_NONE; }; #endif -DECLARE_STATIC_KEY_FALSE(userspace_irqchip_in_use); - extern unsigned int __ro_after_init kvm_sve_max_vl; int __init kvm_arm_init_sve(void); --- linux-xilinx-6.8.0.orig/arch/arm64/include/asm/mman.h +++ linux-xilinx-6.8.0/arch/arm64/include/asm/mman.h @@ -3,6 +3,8 @@ #define __ASM_MMAN_H__ #include +#include +#include #include #include @@ -21,19 +23,24 @@ } #define arch_calc_vm_prot_bits(prot, pkey) arch_calc_vm_prot_bits(prot, pkey) -static inline unsigned long arch_calc_vm_flag_bits(unsigned long flags) +static inline unsigned long arch_calc_vm_flag_bits(struct file *file, + unsigned long flags) { /* * Only allow MTE on anonymous mappings as these are guaranteed to be * backed by tags-capable memory. The vm_flags may be overridden by a * filesystem supporting MTE (RAM-based). */ - if (system_supports_mte() && (flags & MAP_ANONYMOUS)) - return VM_MTE_ALLOWED; + if (system_supports_mte()) { + if ((flags & MAP_ANONYMOUS) && !(flags & MAP_HUGETLB)) + return VM_MTE_ALLOWED; + if (shmem_file(file)) + return VM_MTE_ALLOWED; + } return 0; } -#define arch_calc_vm_flag_bits(flags) arch_calc_vm_flag_bits(flags) +#define arch_calc_vm_flag_bits(file, flags) arch_calc_vm_flag_bits(file, flags) static inline bool arch_validate_prot(unsigned long prot, unsigned long addr __always_unused) --- linux-xilinx-6.8.0.orig/arch/arm64/include/asm/sysreg.h +++ linux-xilinx-6.8.0/arch/arm64/include/asm/sysreg.h @@ -1036,18 +1036,18 @@ * Permission Indirection Extension (PIE) permission encodings. * Encodings with the _O suffix, have overlays applied (Permission Overlay Extension). */ -#define PIE_NONE_O 0x0 -#define PIE_R_O 0x1 -#define PIE_X_O 0x2 -#define PIE_RX_O 0x3 -#define PIE_RW_O 0x5 -#define PIE_RWnX_O 0x6 -#define PIE_RWX_O 0x7 -#define PIE_R 0x8 -#define PIE_GCS 0x9 -#define PIE_RX 0xa -#define PIE_RW 0xc -#define PIE_RWX 0xe +#define PIE_NONE_O UL(0x0) +#define PIE_R_O UL(0x1) +#define PIE_X_O UL(0x2) +#define PIE_RX_O UL(0x3) +#define PIE_RW_O UL(0x5) +#define PIE_RWnX_O UL(0x6) +#define PIE_RWX_O UL(0x7) +#define PIE_R UL(0x8) +#define PIE_GCS UL(0x9) +#define PIE_RX UL(0xa) +#define PIE_RW UL(0xc) +#define PIE_RWX UL(0xe) #define PIRx_ELx_PERM(idx, perm) ((perm) << ((idx) * 4)) --- linux-xilinx-6.8.0.orig/arch/arm64/include/asm/tlbflush.h +++ linux-xilinx-6.8.0/arch/arm64/include/asm/tlbflush.h @@ -161,12 +161,18 @@ #define MAX_TLBI_RANGE_PAGES __TLBI_RANGE_PAGES(31, 3) /* - * Generate 'num' values from -1 to 30 with -1 rejected by the - * __flush_tlb_range() loop below. - */ -#define TLBI_RANGE_MASK GENMASK_ULL(4, 0) -#define __TLBI_RANGE_NUM(pages, scale) \ - ((((pages) >> (5 * (scale) + 1)) & TLBI_RANGE_MASK) - 1) + * Generate 'num' values from -1 to 31 with -1 rejected by the + * __flush_tlb_range() loop below. Its return value is only + * significant for a maximum of MAX_TLBI_RANGE_PAGES pages. If + * 'pages' is more than that, you must iterate over the overall + * range. + */ +#define __TLBI_RANGE_NUM(pages, scale) \ + ({ \ + int __pages = min((pages), \ + __TLBI_RANGE_PAGES(31, (scale))); \ + (__pages >> (5 * (scale) + 1)) - 1; \ + }) /* * TLB Invalidation @@ -379,10 +385,6 @@ * 3. If there is 1 page remaining, flush it through non-range operations. Range * operations can only span an even number of pages. We save this for last to * ensure 64KB start alignment is maintained for the LPA2 case. - * - * Note that certain ranges can be represented by either num = 31 and - * scale or num = 0 and scale + 1. The loop below favours the latter - * since num is limited to 30 by the __TLBI_RANGE_NUM() macro. */ #define __flush_tlb_range_op(op, start, pages, stride, \ asid, tlb_level, tlbi_user, lpa2) \ --- linux-xilinx-6.8.0.orig/arch/arm64/include/asm/unistd32.h +++ linux-xilinx-6.8.0/arch/arm64/include/asm/unistd32.h @@ -840,7 +840,7 @@ #define __NR_ppoll_time64 414 __SYSCALL(__NR_ppoll_time64, compat_sys_ppoll_time64) #define __NR_io_pgetevents_time64 416 -__SYSCALL(__NR_io_pgetevents_time64, sys_io_pgetevents) +__SYSCALL(__NR_io_pgetevents_time64, compat_sys_io_pgetevents_time64) #define __NR_recvmmsg_time64 417 __SYSCALL(__NR_recvmmsg_time64, compat_sys_recvmmsg_time64) #define __NR_mq_timedsend_time64 418 --- linux-xilinx-6.8.0.orig/arch/arm64/include/asm/uprobes.h +++ linux-xilinx-6.8.0/arch/arm64/include/asm/uprobes.h @@ -10,11 +10,9 @@ #include #include -#define MAX_UINSN_BYTES AARCH64_INSN_SIZE - #define UPROBE_SWBP_INSN cpu_to_le32(BRK64_OPCODE_UPROBES) #define UPROBE_SWBP_INSN_SIZE AARCH64_INSN_SIZE -#define UPROBE_XOL_SLOT_BYTES MAX_UINSN_BYTES +#define UPROBE_XOL_SLOT_BYTES AARCH64_INSN_SIZE typedef __le32 uprobe_opcode_t; @@ -23,8 +21,8 @@ struct arch_uprobe { union { - u8 insn[MAX_UINSN_BYTES]; - u8 ixol[MAX_UINSN_BYTES]; + __le32 insn; + __le32 ixol; }; struct arch_probe_insn api; bool simulate; --- linux-xilinx-6.8.0.orig/arch/arm64/include/uapi/asm/sigcontext.h +++ linux-xilinx-6.8.0/arch/arm64/include/uapi/asm/sigcontext.h @@ -312,10 +312,10 @@ ((sizeof(struct za_context) + (__SVE_VQ_BYTES - 1)) \ / __SVE_VQ_BYTES * __SVE_VQ_BYTES) -#define ZA_SIG_REGS_SIZE(vq) ((vq * __SVE_VQ_BYTES) * (vq * __SVE_VQ_BYTES)) +#define ZA_SIG_REGS_SIZE(vq) (((vq) * __SVE_VQ_BYTES) * ((vq) * __SVE_VQ_BYTES)) #define ZA_SIG_ZAV_OFFSET(vq, n) (ZA_SIG_REGS_OFFSET + \ - (SVE_SIG_ZREG_SIZE(vq) * n)) + (SVE_SIG_ZREG_SIZE(vq) * (n))) #define ZA_SIG_CONTEXT_SIZE(vq) \ (ZA_SIG_REGS_OFFSET + ZA_SIG_REGS_SIZE(vq)) @@ -326,7 +326,7 @@ #define ZT_SIG_REGS_OFFSET sizeof(struct zt_context) -#define ZT_SIG_REGS_SIZE(n) (ZT_SIG_REG_BYTES * n) +#define ZT_SIG_REGS_SIZE(n) (ZT_SIG_REG_BYTES * (n)) #define ZT_SIG_CONTEXT_SIZE(n) \ (sizeof(struct zt_context) + ZT_SIG_REGS_SIZE(n)) --- linux-xilinx-6.8.0.orig/arch/arm64/kernel/acpi_numa.c +++ linux-xilinx-6.8.0/arch/arm64/kernel/acpi_numa.c @@ -27,24 +27,13 @@ #include -static int acpi_early_node_map[NR_CPUS] __initdata = { NUMA_NO_NODE }; +static int acpi_early_node_map[NR_CPUS] __initdata = { [0 ... NR_CPUS - 1] = NUMA_NO_NODE }; int __init acpi_numa_get_nid(unsigned int cpu) { return acpi_early_node_map[cpu]; } -static inline int get_cpu_for_acpi_id(u32 uid) -{ - int cpu; - - for (cpu = 0; cpu < nr_cpu_ids; cpu++) - if (uid == get_acpi_id_for_cpu(cpu)) - return cpu; - - return -EINVAL; -} - static int __init acpi_parse_gicc_pxm(union acpi_subtable_headers *header, const unsigned long end) { --- linux-xilinx-6.8.0.orig/arch/arm64/kernel/armv8_deprecated.c +++ linux-xilinx-6.8.0/arch/arm64/kernel/armv8_deprecated.c @@ -462,6 +462,9 @@ for (int i = 0; i < ARRAY_SIZE(insn_emulations); i++) { struct insn_emulation *insn = insn_emulations[i]; bool enable = READ_ONCE(insn->current_mode) == INSN_HW; + if (insn->status == INSN_UNAVAILABLE) + continue; + if (insn->set_hw_mode && insn->set_hw_mode(enable)) { pr_warn("CPU[%u] cannot support the emulation of %s", cpu, insn->name); --- linux-xilinx-6.8.0.orig/arch/arm64/kernel/cacheinfo.c +++ linux-xilinx-6.8.0/arch/arm64/kernel/cacheinfo.c @@ -101,16 +101,18 @@ unsigned int level, idx; enum cache_type type; struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); - struct cacheinfo *this_leaf = this_cpu_ci->info_list; + struct cacheinfo *infos = this_cpu_ci->info_list; for (idx = 0, level = 1; level <= this_cpu_ci->num_levels && - idx < this_cpu_ci->num_leaves; idx++, level++) { + idx < this_cpu_ci->num_leaves; level++) { type = get_cache_type(level); if (type == CACHE_TYPE_SEPARATE) { - ci_leaf_init(this_leaf++, CACHE_TYPE_DATA, level); - ci_leaf_init(this_leaf++, CACHE_TYPE_INST, level); + if (idx + 1 >= this_cpu_ci->num_leaves) + break; + ci_leaf_init(&infos[idx++], CACHE_TYPE_DATA, level); + ci_leaf_init(&infos[idx++], CACHE_TYPE_INST, level); } else { - ci_leaf_init(this_leaf++, type, level); + ci_leaf_init(&infos[idx++], type, level); } } return 0; --- linux-xilinx-6.8.0.orig/arch/arm64/kernel/cpu_errata.c +++ linux-xilinx-6.8.0/arch/arm64/kernel/cpu_errata.c @@ -432,6 +432,41 @@ }; #endif +#ifdef CONFIG_ARM64_ERRATUM_3194386 +static const struct midr_range erratum_spec_ssbs_list[] = { + MIDR_ALL_VERSIONS(MIDR_CORTEX_A76), + MIDR_ALL_VERSIONS(MIDR_CORTEX_A77), + MIDR_ALL_VERSIONS(MIDR_CORTEX_A78), + MIDR_ALL_VERSIONS(MIDR_CORTEX_A78C), + MIDR_ALL_VERSIONS(MIDR_CORTEX_A710), + MIDR_ALL_VERSIONS(MIDR_CORTEX_A715), + MIDR_ALL_VERSIONS(MIDR_CORTEX_A720), + MIDR_ALL_VERSIONS(MIDR_CORTEX_A725), + MIDR_ALL_VERSIONS(MIDR_CORTEX_X1), + MIDR_ALL_VERSIONS(MIDR_CORTEX_X1C), + MIDR_ALL_VERSIONS(MIDR_CORTEX_X2), + MIDR_ALL_VERSIONS(MIDR_CORTEX_X3), + MIDR_ALL_VERSIONS(MIDR_CORTEX_X4), + MIDR_ALL_VERSIONS(MIDR_CORTEX_X925), + MIDR_ALL_VERSIONS(MIDR_MICROSOFT_AZURE_COBALT_100), + MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N1), + MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N2), + MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N3), + MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V1), + MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V2), + MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3), + {} +}; +#endif + +#ifdef CONFIG_AMPERE_ERRATUM_AC03_CPU_38 +static const struct midr_range erratum_ac03_cpu_38_list[] = { + MIDR_ALL_VERSIONS(MIDR_AMPERE1), + MIDR_ALL_VERSIONS(MIDR_AMPERE1A), + {}, +}; +#endif + const struct arm64_cpu_capabilities arm64_errata[] = { #ifdef CONFIG_ARM64_WORKAROUND_CLEAN_CACHE { @@ -729,6 +764,13 @@ MIDR_FIXED(MIDR_CPU_VAR_REV(1,1), BIT(25)), }, #endif +#ifdef CONFIG_ARM64_ERRATUM_3194386 + { + .desc = "SSBS not fully self-synchronizing", + .capability = ARM64_WORKAROUND_SPECULATIVE_SSBS, + ERRATA_MIDR_RANGE_LIST(erratum_spec_ssbs_list), + }, +#endif #ifdef CONFIG_ARM64_WORKAROUND_SPECULATIVE_UNPRIV_LOAD { .desc = "ARM errata 2966298, 3117295", @@ -741,7 +783,7 @@ { .desc = "AmpereOne erratum AC03_CPU_38", .capability = ARM64_WORKAROUND_AMPERE_AC03_CPU_38, - ERRATA_MIDR_ALL_VERSIONS(MIDR_AMPERE1), + ERRATA_MIDR_RANGE_LIST(erratum_ac03_cpu_38_list), }, #endif { --- linux-xilinx-6.8.0.orig/arch/arm64/kernel/cpufeature.c +++ linux-xilinx-6.8.0/arch/arm64/kernel/cpufeature.c @@ -1068,12 +1068,6 @@ id_aa64pfr1_sme(read_sanitised_ftr_reg(SYS_ID_AA64PFR1_EL1))) { unsigned long cpacr = cpacr_save_enable_kernel_sme(); - /* - * We mask out SMPS since even if the hardware - * supports priorities the kernel does not at present - * and we block access to them. - */ - info->reg_smidr = read_cpuid(SMIDR_EL1) & ~SMIDR_EL1_SMPS; vec_init_vq_map(ARM64_VEC_SME); cpacr_restore(cpacr); @@ -1314,13 +1308,6 @@ id_aa64pfr1_sme(read_sanitised_ftr_reg(SYS_ID_AA64PFR1_EL1))) { unsigned long cpacr = cpacr_save_enable_kernel_sme(); - /* - * We mask out SMPS since even if the hardware - * supports priorities the kernel does not at present - * and we block access to them. - */ - info->reg_smidr = read_cpuid(SMIDR_EL1) & ~SMIDR_EL1_SMPS; - /* Probe vector lengths */ if (!system_capabilities_finalized()) vec_update_vq_map(ARM64_VEC_SME); @@ -2218,6 +2205,14 @@ if (regp) regp->user_mask &= ~ID_AA64ISAR1_EL1_BF16_MASK; } + + if (cpus_have_cap(ARM64_WORKAROUND_SPECULATIVE_SSBS)) { + struct arm64_ftr_reg *regp; + + regp = get_arm64_ftr_reg(SYS_ID_AA64PFR1_EL1); + if (regp) + regp->user_mask &= ~ID_AA64PFR1_EL1_SSBS_MASK; + } } static void elf_hwcap_fixup(void) @@ -2771,6 +2766,13 @@ .matches = match, \ } +#define HWCAP_CAP_MATCH_ID(match, reg, field, min_value, cap_type, cap) \ + { \ + __HWCAP_CAP(#cap, cap_type, cap) \ + HWCAP_CPUID_MATCH(reg, field, min_value) \ + .matches = match, \ + } + #ifdef CONFIG_ARM64_PTR_AUTH static const struct arm64_cpu_capabilities ptr_auth_hwcap_addr_matches[] = { { @@ -2799,6 +2801,13 @@ }; #endif +#ifdef CONFIG_ARM64_SVE +static bool has_sve_feature(const struct arm64_cpu_capabilities *cap, int scope) +{ + return system_supports_sve() && has_user_cpuid_feature(cap, scope); +} +#endif + static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = { HWCAP_CAP(ID_AA64ISAR0_EL1, AES, PMULL, CAP_HWCAP, KERNEL_HWCAP_PMULL), HWCAP_CAP(ID_AA64ISAR0_EL1, AES, AES, CAP_HWCAP, KERNEL_HWCAP_AES), @@ -2838,19 +2847,19 @@ HWCAP_CAP(ID_AA64MMFR2_EL1, AT, IMP, CAP_HWCAP, KERNEL_HWCAP_USCAT), #ifdef CONFIG_ARM64_SVE HWCAP_CAP(ID_AA64PFR0_EL1, SVE, IMP, CAP_HWCAP, KERNEL_HWCAP_SVE), - HWCAP_CAP(ID_AA64ZFR0_EL1, SVEver, SVE2p1, CAP_HWCAP, KERNEL_HWCAP_SVE2P1), - HWCAP_CAP(ID_AA64ZFR0_EL1, SVEver, SVE2, CAP_HWCAP, KERNEL_HWCAP_SVE2), - HWCAP_CAP(ID_AA64ZFR0_EL1, AES, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEAES), - HWCAP_CAP(ID_AA64ZFR0_EL1, AES, PMULL128, CAP_HWCAP, KERNEL_HWCAP_SVEPMULL), - HWCAP_CAP(ID_AA64ZFR0_EL1, BitPerm, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEBITPERM), - HWCAP_CAP(ID_AA64ZFR0_EL1, B16B16, IMP, CAP_HWCAP, KERNEL_HWCAP_SVE_B16B16), - HWCAP_CAP(ID_AA64ZFR0_EL1, BF16, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEBF16), - HWCAP_CAP(ID_AA64ZFR0_EL1, BF16, EBF16, CAP_HWCAP, KERNEL_HWCAP_SVE_EBF16), - HWCAP_CAP(ID_AA64ZFR0_EL1, SHA3, IMP, CAP_HWCAP, KERNEL_HWCAP_SVESHA3), - HWCAP_CAP(ID_AA64ZFR0_EL1, SM4, IMP, CAP_HWCAP, KERNEL_HWCAP_SVESM4), - HWCAP_CAP(ID_AA64ZFR0_EL1, I8MM, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEI8MM), - HWCAP_CAP(ID_AA64ZFR0_EL1, F32MM, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEF32MM), - HWCAP_CAP(ID_AA64ZFR0_EL1, F64MM, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEF64MM), + HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, SVEver, SVE2p1, CAP_HWCAP, KERNEL_HWCAP_SVE2P1), + HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, SVEver, SVE2, CAP_HWCAP, KERNEL_HWCAP_SVE2), + HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, AES, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEAES), + HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, AES, PMULL128, CAP_HWCAP, KERNEL_HWCAP_SVEPMULL), + HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, BitPerm, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEBITPERM), + HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, B16B16, IMP, CAP_HWCAP, KERNEL_HWCAP_SVE_B16B16), + HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, BF16, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEBF16), + HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, BF16, EBF16, CAP_HWCAP, KERNEL_HWCAP_SVE_EBF16), + HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, SHA3, IMP, CAP_HWCAP, KERNEL_HWCAP_SVESHA3), + HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, SM4, IMP, CAP_HWCAP, KERNEL_HWCAP_SVESM4), + HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, I8MM, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEI8MM), + HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, F32MM, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEF32MM), + HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, F64MM, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEF64MM), #endif HWCAP_CAP(ID_AA64PFR1_EL1, SSBS, SSBS2, CAP_HWCAP, KERNEL_HWCAP_SSBS), #ifdef CONFIG_ARM64_BTI --- linux-xilinx-6.8.0.orig/arch/arm64/kernel/cpuinfo.c +++ linux-xilinx-6.8.0/arch/arm64/kernel/cpuinfo.c @@ -458,6 +458,16 @@ if (id_aa64pfr0_32bit_el0(info->reg_id_aa64pfr0)) __cpuinfo_store_cpu_32bit(&info->aarch32); + if (IS_ENABLED(CONFIG_ARM64_SME) && + id_aa64pfr1_sme(info->reg_id_aa64pfr1)) { + /* + * We mask out SMPS since even if the hardware + * supports priorities the kernel does not at present + * and we block access to them. + */ + info->reg_smidr = read_cpuid(SMIDR_EL1) & ~SMIDR_EL1_SMPS; + } + cpuinfo_detect_icache_policy(info); } --- linux-xilinx-6.8.0.orig/arch/arm64/kernel/fpsimd.c +++ linux-xilinx-6.8.0/arch/arm64/kernel/fpsimd.c @@ -1350,6 +1350,7 @@ } else { fpsimd_to_sve(current); current->thread.fp_type = FP_STATE_SVE; + fpsimd_flush_task_state(current); } } @@ -1518,6 +1519,27 @@ task->thread.kernel_fpsimd_cpu = smp_processor_id(); } +/* + * Invalidate any task's FPSIMD state that is present on this cpu. + * The FPSIMD context should be acquired with get_cpu_fpsimd_context() + * before calling this function. + */ +static void fpsimd_flush_cpu_state(void) +{ + WARN_ON(!system_supports_fpsimd()); + __this_cpu_write(fpsimd_last_state.st, NULL); + + /* + * Leaving streaming mode enabled will cause issues for any kernel + * NEON and leaving streaming mode or ZA enabled may increase power + * consumption. + */ + if (system_supports_sme()) + sme_smstop(); + + set_thread_flag(TIF_FOREIGN_FPSTATE); +} + void fpsimd_thread_switch(struct task_struct *next) { bool wrong_task, wrong_cpu; @@ -1535,7 +1557,7 @@ if (test_tsk_thread_flag(next, TIF_KERNEL_FPSTATE)) { fpsimd_load_kernel_state(next); - set_tsk_thread_flag(next, TIF_FOREIGN_FPSTATE); + fpsimd_flush_cpu_state(); } else { /* * Fix up TIF_FOREIGN_FPSTATE to correctly describe next's @@ -1825,27 +1847,6 @@ } /* - * Invalidate any task's FPSIMD state that is present on this cpu. - * The FPSIMD context should be acquired with get_cpu_fpsimd_context() - * before calling this function. - */ -static void fpsimd_flush_cpu_state(void) -{ - WARN_ON(!system_supports_fpsimd()); - __this_cpu_write(fpsimd_last_state.st, NULL); - - /* - * Leaving streaming mode enabled will cause issues for any kernel - * NEON and leaving streaming mode or ZA enabled may increase power - * consumption. - */ - if (system_supports_sme()) - sme_smstop(); - - set_thread_flag(TIF_FOREIGN_FPSTATE); -} - -/* * Save the FPSIMD state to memory and invalidate cpu view. * This function must be called with preemption disabled. */ @@ -1923,7 +1924,7 @@ put_cpu_fpsimd_context(); } -EXPORT_SYMBOL_GPL(kernel_neon_begin); +EXPORT_SYMBOL(kernel_neon_begin); /* * kernel_neon_end(): give the CPU FPSIMD registers back to the current task @@ -1950,7 +1951,7 @@ else clear_thread_flag(TIF_KERNEL_FPSTATE); } -EXPORT_SYMBOL_GPL(kernel_neon_end); +EXPORT_SYMBOL(kernel_neon_end); #ifdef CONFIG_EFI --- linux-xilinx-6.8.0.orig/arch/arm64/kernel/head.S +++ linux-xilinx-6.8.0/arch/arm64/kernel/head.S @@ -569,6 +569,11 @@ adr_l x1, __hyp_text_end adr_l x2, dcache_clean_poc blr x2 + + mov_q x0, INIT_SCTLR_EL2_MMU_OFF + pre_disable_mmu_workaround + msr sctlr_el2, x0 + isb 0: mov_q x0, HCR_HOST_NVHE_FLAGS msr hcr_el2, x0 --- linux-xilinx-6.8.0.orig/arch/arm64/kernel/idreg-override.c +++ linux-xilinx-6.8.0/arch/arm64/kernel/idreg-override.c @@ -308,7 +308,8 @@ match_options(buf); for (i = 0; parse_aliases && i < ARRAY_SIZE(aliases); i++) - if (!memcmp(buf, aliases[i].alias, len + 1)) + if (len == strlen(aliases[i].alias) && + !memcmp(buf, aliases[i].alias, len + 1)) __parse_cmdline(aliases[i].feature, false); } while (1); } --- linux-xilinx-6.8.0.orig/arch/arm64/kernel/irq.c +++ linux-xilinx-6.8.0/arch/arm64/kernel/irq.c @@ -100,7 +100,11 @@ void (*handle_arch_irq)(struct pt_regs *) __ro_after_init = default_handle_irq; void (*handle_arch_fiq)(struct pt_regs *) __ro_after_init = default_handle_fiq; +#ifndef CONFIG_IRQCHIP_XILINX_INTC_MODULE_SUPPORT_EXPERIMENTAL int __init set_handle_irq(void (*handle_irq)(struct pt_regs *)) +#else +int set_handle_irq(void (*handle_irq)(struct pt_regs *)) +#endif { if (handle_arch_irq != default_handle_irq) return -EBUSY; --- linux-xilinx-6.8.0.orig/arch/arm64/kernel/jump_label.c +++ linux-xilinx-6.8.0/arch/arm64/kernel/jump_label.c @@ -7,11 +7,12 @@ */ #include #include +#include #include #include -void arch_jump_label_transform(struct jump_entry *entry, - enum jump_label_type type) +bool arch_jump_label_transform_queue(struct jump_entry *entry, + enum jump_label_type type) { void *addr = (void *)jump_entry_code(entry); u32 insn; @@ -25,4 +26,10 @@ } aarch64_insn_patch_text_nosync(addr, insn); + return true; +} + +void arch_jump_label_transform_apply(void) +{ + kick_all_cpus_sync(); } --- linux-xilinx-6.8.0.orig/arch/arm64/kernel/probes/decode-insn.c +++ linux-xilinx-6.8.0/arch/arm64/kernel/probes/decode-insn.c @@ -58,10 +58,13 @@ * Instructions which load PC relative literals are not going to work * when executed from an XOL slot. Instructions doing an exclusive * load/store are not going to complete successfully when single-step - * exception handling happens in the middle of the sequence. + * exception handling happens in the middle of the sequence. Memory + * copy/set instructions require that all three instructions be placed + * consecutively in memory. */ if (aarch64_insn_uses_literal(insn) || - aarch64_insn_is_exclusive(insn)) + aarch64_insn_is_exclusive(insn) || + aarch64_insn_is_mops(insn)) return false; return true; @@ -99,10 +102,6 @@ aarch64_insn_is_blr(insn) || aarch64_insn_is_ret(insn)) { api->handler = simulate_br_blr_ret; - } else if (aarch64_insn_is_ldr_lit(insn)) { - api->handler = simulate_ldr_literal; - } else if (aarch64_insn_is_ldrsw_lit(insn)) { - api->handler = simulate_ldrsw_literal; } else { /* * Instruction cannot be stepped out-of-line and we don't @@ -140,6 +139,17 @@ probe_opcode_t insn = le32_to_cpu(*addr); probe_opcode_t *scan_end = NULL; unsigned long size = 0, offset = 0; + struct arch_probe_insn *api = &asi->api; + + if (aarch64_insn_is_ldr_lit(insn)) { + api->handler = simulate_ldr_literal; + decoded = INSN_GOOD_NO_SLOT; + } else if (aarch64_insn_is_ldrsw_lit(insn)) { + api->handler = simulate_ldrsw_literal; + decoded = INSN_GOOD_NO_SLOT; + } else { + decoded = arm_probe_decode_insn(insn, &asi->api); + } /* * If there's a symbol defined in front of and near enough to @@ -157,7 +167,6 @@ else scan_end = addr - MAX_ATOMIC_CONTEXT_SIZE; } - decoded = arm_probe_decode_insn(insn, &asi->api); if (decoded != INSN_REJECTED && scan_end) if (is_probed_address_atomic(addr - 1, scan_end)) --- linux-xilinx-6.8.0.orig/arch/arm64/kernel/probes/simulate-insn.c +++ linux-xilinx-6.8.0/arch/arm64/kernel/probes/simulate-insn.c @@ -171,17 +171,15 @@ void __kprobes simulate_ldr_literal(u32 opcode, long addr, struct pt_regs *regs) { - u64 *load_addr; + unsigned long load_addr; int xn = opcode & 0x1f; - int disp; - disp = ldr_displacement(opcode); - load_addr = (u64 *) (addr + disp); + load_addr = addr + ldr_displacement(opcode); if (opcode & (1 << 30)) /* x0-x30 */ - set_x_reg(regs, xn, *load_addr); + set_x_reg(regs, xn, READ_ONCE(*(u64 *)load_addr)); else /* w0-w30 */ - set_w_reg(regs, xn, *load_addr); + set_w_reg(regs, xn, READ_ONCE(*(u32 *)load_addr)); instruction_pointer_set(regs, instruction_pointer(regs) + 4); } @@ -189,14 +187,12 @@ void __kprobes simulate_ldrsw_literal(u32 opcode, long addr, struct pt_regs *regs) { - s32 *load_addr; + unsigned long load_addr; int xn = opcode & 0x1f; - int disp; - disp = ldr_displacement(opcode); - load_addr = (s32 *) (addr + disp); + load_addr = addr + ldr_displacement(opcode); - set_x_reg(regs, xn, *load_addr); + set_x_reg(regs, xn, READ_ONCE(*(s32 *)load_addr)); instruction_pointer_set(regs, instruction_pointer(regs) + 4); } --- linux-xilinx-6.8.0.orig/arch/arm64/kernel/probes/uprobes.c +++ linux-xilinx-6.8.0/arch/arm64/kernel/probes/uprobes.c @@ -42,7 +42,7 @@ else if (!IS_ALIGNED(addr, AARCH64_INSN_SIZE)) return -EINVAL; - insn = *(probe_opcode_t *)(&auprobe->insn[0]); + insn = le32_to_cpu(auprobe->insn); switch (arm_probe_decode_insn(insn, &auprobe->api)) { case INSN_REJECTED: @@ -108,7 +108,7 @@ if (!auprobe->simulate) return false; - insn = *(probe_opcode_t *)(&auprobe->insn[0]); + insn = le32_to_cpu(auprobe->insn); addr = instruction_pointer(regs); if (auprobe->api.handler) --- linux-xilinx-6.8.0.orig/arch/arm64/kernel/process.c +++ linux-xilinx-6.8.0/arch/arm64/kernel/process.c @@ -429,7 +429,7 @@ if (is_compat_thread(task_thread_info(next))) write_sysreg(next->thread.uw.tp_value, tpidrro_el0); - else if (!arm64_kernel_unmapped_at_el0()) + else write_sysreg(0, tpidrro_el0); write_sysreg(*task_user_tls(next), tpidr_el0); --- linux-xilinx-6.8.0.orig/arch/arm64/kernel/proton-pack.c +++ linux-xilinx-6.8.0/arch/arm64/kernel/proton-pack.c @@ -558,6 +558,18 @@ /* SCTLR_EL1.DSSBS was initialised to 0 during boot */ set_pstate_ssbs(0); + + /* + * SSBS is self-synchronizing and is intended to affect subsequent + * speculative instructions, but some CPUs can speculate with a stale + * value of SSBS. + * + * Mitigate this with an unconditional speculation barrier, as CPUs + * could mis-speculate branches and bypass a conditional barrier. + */ + if (IS_ENABLED(CONFIG_ARM64_ERRATUM_3194386)) + spec_bar(); + return SPECTRE_MITIGATED; } --- linux-xilinx-6.8.0.orig/arch/arm64/kernel/ptrace.c +++ linux-xilinx-6.8.0/arch/arm64/kernel/ptrace.c @@ -729,7 +729,6 @@ { unsigned int vq; bool active; - bool fpsimd_only; enum vec_type task_type; memset(header, 0, sizeof(*header)); @@ -745,12 +744,10 @@ case ARM64_VEC_SVE: if (test_tsk_thread_flag(target, TIF_SVE_VL_INHERIT)) header->flags |= SVE_PT_VL_INHERIT; - fpsimd_only = !test_tsk_thread_flag(target, TIF_SVE); break; case ARM64_VEC_SME: if (test_tsk_thread_flag(target, TIF_SME_VL_INHERIT)) header->flags |= SVE_PT_VL_INHERIT; - fpsimd_only = false; break; default: WARN_ON_ONCE(1); @@ -758,7 +755,7 @@ } if (active) { - if (fpsimd_only) { + if (target->thread.fp_type == FP_STATE_FPSIMD) { header->flags |= SVE_PT_REGS_FPSIMD; } else { header->flags |= SVE_PT_REGS_SVE; @@ -1389,7 +1386,7 @@ { long ctrl = get_tagged_addr_ctrl(target); - if (IS_ERR_VALUE(ctrl)) + if (WARN_ON_ONCE(IS_ERR_VALUE(ctrl))) return ctrl; return membuf_write(&to, &ctrl, sizeof(ctrl)); @@ -1403,6 +1400,10 @@ int ret; long ctrl; + ctrl = get_tagged_addr_ctrl(target); + if (WARN_ON_ONCE(IS_ERR_VALUE(ctrl))) + return ctrl; + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl, 0, -1); if (ret) return ret; --- linux-xilinx-6.8.0.orig/arch/arm64/kernel/setup.c +++ linux-xilinx-6.8.0/arch/arm64/kernel/setup.c @@ -190,7 +190,11 @@ if (dt_virt) memblock_reserve(dt_phys, size); - if (!dt_virt || !early_init_dt_scan(dt_virt)) { + /* + * dt_virt is a fixmap address, hence __pa(dt_virt) can't be used. + * Pass dt_phys directly. + */ + if (!early_init_dt_scan(dt_virt, dt_phys)) { pr_crit("\n" "Error: invalid device tree blob at physical address %pa (virtual address 0x%px)\n" "The dtb must be 8-byte aligned and must not exceed 2 MB in size\n" @@ -371,9 +375,6 @@ smp_init_cpus(); smp_build_mpidr_hash(); - /* Init percpu seeds for random tags after cpus are set up. */ - kasan_init_sw_tags(); - #ifdef CONFIG_ARM64_SW_TTBR0_PAN /* * Make sure init_thread_info.ttbr0 always generates translation --- linux-xilinx-6.8.0.orig/arch/arm64/kernel/smccc-call.S +++ linux-xilinx-6.8.0/arch/arm64/kernel/smccc-call.S @@ -7,48 +7,19 @@ #include #include -#include - -/* - * If we have SMCCC v1.3 and (as is likely) no SVE state in - * the registers then set the SMCCC hint bit to say there's no - * need to preserve it. Do this by directly adjusting the SMCCC - * function value which is already stored in x0 ready to be called. - */ -SYM_FUNC_START(__arm_smccc_sve_check) - - ldr_l x16, smccc_has_sve_hint - cbz x16, 2f - - get_current_task x16 - ldr x16, [x16, #TSK_TI_FLAGS] - tbnz x16, #TIF_FOREIGN_FPSTATE, 1f // Any live FP state? - tbnz x16, #TIF_SVE, 2f // Does that state include SVE? - -1: orr x0, x0, ARM_SMCCC_1_3_SVE_HINT - -2: ret -SYM_FUNC_END(__arm_smccc_sve_check) -EXPORT_SYMBOL(__arm_smccc_sve_check) .macro SMCCC instr - stp x29, x30, [sp, #-16]! - mov x29, sp -alternative_if ARM64_SVE - bl __arm_smccc_sve_check -alternative_else_nop_endif \instr #0 - ldr x4, [sp, #16] + ldr x4, [sp] stp x0, x1, [x4, #ARM_SMCCC_RES_X0_OFFS] stp x2, x3, [x4, #ARM_SMCCC_RES_X2_OFFS] - ldr x4, [sp, #24] + ldr x4, [sp, #8] cbz x4, 1f /* no quirk structure */ ldr x9, [x4, #ARM_SMCCC_QUIRK_ID_OFFS] cmp x9, #ARM_SMCCC_QUIRK_QCOM_A6 b.ne 1f str x6, [x4, ARM_SMCCC_QUIRK_STATE_OFFS] -1: ldp x29, x30, [sp], #16 - ret +1: ret .endm /* --- linux-xilinx-6.8.0.orig/arch/arm64/kernel/smp.c +++ linux-xilinx-6.8.0/arch/arm64/kernel/smp.c @@ -71,7 +71,7 @@ IPI_RESCHEDULE, IPI_CALL_FUNC, IPI_CPU_STOP, - IPI_CPU_CRASH_STOP, + IPI_CPU_STOP_NMI, IPI_TIMER, IPI_IRQ_WORK, NR_IPI, @@ -88,6 +88,8 @@ static int nr_ipi __ro_after_init = NR_IPI; static struct irq_desc *ipi_desc[MAX_IPI] __ro_after_init; +static bool crash_stop; + static void ipi_setup(int cpu); #ifdef CONFIG_HOTPLUG_CPU @@ -462,6 +464,8 @@ init_gic_priority_masking(); kasan_init_hw_tags(); + /* Init percpu seeds for random tags after cpus are set up. */ + kasan_init_sw_tags(); } /* @@ -760,13 +764,15 @@ } } -static const char *ipi_types[NR_IPI] __tracepoint_string = { +static const char *ipi_types[MAX_IPI] __tracepoint_string = { [IPI_RESCHEDULE] = "Rescheduling interrupts", [IPI_CALL_FUNC] = "Function call interrupts", [IPI_CPU_STOP] = "CPU stop interrupts", - [IPI_CPU_CRASH_STOP] = "CPU stop (for crash dump) interrupts", + [IPI_CPU_STOP_NMI] = "CPU stop NMIs", [IPI_TIMER] = "Timer broadcast interrupts", [IPI_IRQ_WORK] = "IRQ work interrupts", + [IPI_CPU_BACKTRACE] = "CPU backtrace interrupts", + [IPI_KGDB_ROUNDUP] = "KGDB roundup interrupts", }; static void smp_cross_call(const struct cpumask *target, unsigned int ipinr); @@ -777,7 +783,7 @@ { unsigned int cpu, i; - for (i = 0; i < NR_IPI; i++) { + for (i = 0; i < MAX_IPI; i++) { seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i, prec >= 4 ? " " : ""); for_each_online_cpu(cpu) @@ -806,9 +812,9 @@ } #endif -static void __noreturn local_cpu_stop(void) +static void __noreturn local_cpu_stop(unsigned int cpu) { - set_cpu_online(smp_processor_id(), false); + set_cpu_online(cpu, false); local_daif_mask(); sdei_mask_local_cpu(); @@ -822,21 +828,26 @@ */ void __noreturn panic_smp_self_stop(void) { - local_cpu_stop(); + local_cpu_stop(smp_processor_id()); } -#ifdef CONFIG_KEXEC_CORE -static atomic_t waiting_for_crash_ipi = ATOMIC_INIT(0); -#endif - static void __noreturn ipi_cpu_crash_stop(unsigned int cpu, struct pt_regs *regs) { #ifdef CONFIG_KEXEC_CORE + /* + * Use local_daif_mask() instead of local_irq_disable() to make sure + * that pseudo-NMIs are disabled. The "crash stop" code starts with + * an IRQ and falls back to NMI (which might be pseudo). If the IRQ + * finally goes through right as we're timing out then the NMI could + * interrupt us. It's better to prevent the NMI and let the IRQ + * finish since the pt_regs will be better. + */ + local_daif_mask(); + crash_save_cpu(regs, cpu); - atomic_dec(&waiting_for_crash_ipi); + set_cpu_online(cpu, false); - local_irq_disable(); sdei_mask_local_cpu(); if (IS_ENABLED(CONFIG_HOTPLUG_CPU)) @@ -901,14 +912,12 @@ break; case IPI_CPU_STOP: - local_cpu_stop(); - break; - - case IPI_CPU_CRASH_STOP: - if (IS_ENABLED(CONFIG_KEXEC_CORE)) { + case IPI_CPU_STOP_NMI: + if (IS_ENABLED(CONFIG_KEXEC_CORE) && crash_stop) { ipi_cpu_crash_stop(cpu, get_irq_regs()); - unreachable(); + } else { + local_cpu_stop(cpu); } break; @@ -963,8 +972,7 @@ return false; switch (ipi) { - case IPI_CPU_STOP: - case IPI_CPU_CRASH_STOP: + case IPI_CPU_STOP_NMI: case IPI_CPU_BACKTRACE: case IPI_KGDB_ROUNDUP: return true; @@ -1077,79 +1085,109 @@ void smp_send_stop(void) { + static unsigned long stop_in_progress; + cpumask_t mask; unsigned long timeout; - if (num_other_online_cpus()) { - cpumask_t mask; + /* + * If this cpu is the only one alive at this point in time, online or + * not, there are no stop messages to be sent around, so just back out. + */ + if (num_other_online_cpus() == 0) + goto skip_ipi; - cpumask_copy(&mask, cpu_online_mask); - cpumask_clear_cpu(smp_processor_id(), &mask); + /* Only proceed if this is the first CPU to reach this code */ + if (test_and_set_bit(0, &stop_in_progress)) + return; - if (system_state <= SYSTEM_RUNNING) - pr_crit("SMP: stopping secondary CPUs\n"); - smp_cross_call(&mask, IPI_CPU_STOP); - } + /* + * Send an IPI to all currently online CPUs except the CPU running + * this code. + * + * NOTE: we don't do anything here to prevent other CPUs from coming + * online after we snapshot `cpu_online_mask`. Ideally, the calling code + * should do something to prevent other CPUs from coming up. This code + * can be called in the panic path and thus it doesn't seem wise to + * grab the CPU hotplug mutex ourselves. Worst case: + * - If a CPU comes online as we're running, we'll likely notice it + * during the 1 second wait below and then we'll catch it when we try + * with an NMI (assuming NMIs are enabled) since we re-snapshot the + * mask before sending an NMI. + * - If we leave the function and see that CPUs are still online we'll + * at least print a warning. Especially without NMIs this function + * isn't foolproof anyway so calling code will just have to accept + * the fact that there could be cases where a CPU can't be stopped. + */ + cpumask_copy(&mask, cpu_online_mask); + cpumask_clear_cpu(smp_processor_id(), &mask); - /* Wait up to one second for other CPUs to stop */ + if (system_state <= SYSTEM_RUNNING) + pr_crit("SMP: stopping secondary CPUs\n"); + + /* + * Start with a normal IPI and wait up to one second for other CPUs to + * stop. We do this first because it gives other processors a chance + * to exit critical sections / drop locks and makes the rest of the + * stop process (especially console flush) more robust. + */ + smp_cross_call(&mask, IPI_CPU_STOP); timeout = USEC_PER_SEC; while (num_other_online_cpus() && timeout--) udelay(1); - if (num_other_online_cpus()) + /* + * If CPUs are still online, try an NMI. There's no excuse for this to + * be slow, so we only give them an extra 10 ms to respond. + */ + if (num_other_online_cpus() && ipi_should_be_nmi(IPI_CPU_STOP_NMI)) { + smp_rmb(); + cpumask_copy(&mask, cpu_online_mask); + cpumask_clear_cpu(smp_processor_id(), &mask); + + pr_info("SMP: retry stop with NMI for CPUs %*pbl\n", + cpumask_pr_args(&mask)); + + smp_cross_call(&mask, IPI_CPU_STOP_NMI); + timeout = USEC_PER_MSEC * 10; + while (num_other_online_cpus() && timeout--) + udelay(1); + } + + if (num_other_online_cpus()) { + smp_rmb(); + cpumask_copy(&mask, cpu_online_mask); + cpumask_clear_cpu(smp_processor_id(), &mask); + pr_warn("SMP: failed to stop secondary CPUs %*pbl\n", - cpumask_pr_args(cpu_online_mask)); + cpumask_pr_args(&mask)); + } +skip_ipi: sdei_mask_local_cpu(); } #ifdef CONFIG_KEXEC_CORE void crash_smp_send_stop(void) { - static int cpus_stopped; - cpumask_t mask; - unsigned long timeout; - /* * This function can be called twice in panic path, but obviously * we execute this only once. + * + * We use this same boolean to tell whether the IPI we send was a + * stop or a "crash stop". */ - if (cpus_stopped) + if (crash_stop) return; + crash_stop = 1; - cpus_stopped = 1; + smp_send_stop(); - /* - * If this cpu is the only one alive at this point in time, online or - * not, there are no stop messages to be sent around, so just back out. - */ - if (num_other_online_cpus() == 0) - goto skip_ipi; - - cpumask_copy(&mask, cpu_online_mask); - cpumask_clear_cpu(smp_processor_id(), &mask); - - atomic_set(&waiting_for_crash_ipi, num_other_online_cpus()); - - pr_crit("SMP: stopping secondary CPUs\n"); - smp_cross_call(&mask, IPI_CPU_CRASH_STOP); - - /* Wait up to one second for other CPUs to stop */ - timeout = USEC_PER_SEC; - while ((atomic_read(&waiting_for_crash_ipi) > 0) && timeout--) - udelay(1); - - if (atomic_read(&waiting_for_crash_ipi) > 0) - pr_warn("SMP: failed to stop secondary CPUs %*pbl\n", - cpumask_pr_args(&mask)); - -skip_ipi: - sdei_mask_local_cpu(); sdei_handler_abort(); } bool smp_crash_stop_failed(void) { - return (atomic_read(&waiting_for_crash_ipi) > 0); + return num_other_online_cpus() != 0; } #endif --- linux-xilinx-6.8.0.orig/arch/arm64/kernel/syscall.c +++ linux-xilinx-6.8.0/arch/arm64/kernel/syscall.c @@ -56,17 +56,15 @@ syscall_set_return_value(current, regs, 0, ret); /* - * Ultimately, this value will get limited by KSTACK_OFFSET_MAX(), - * but not enough for arm64 stack utilization comfort. To keep - * reasonable stack head room, reduce the maximum offset to 9 bits. + * This value will get limited by KSTACK_OFFSET_MAX(), which is 10 + * bits. The actual entropy will be further reduced by the compiler + * when applying stack alignment constraints: the AAPCS mandates a + * 16-byte aligned SP at function boundaries, which will remove the + * 4 low bits from any entropy chosen here. * - * The actual entropy will be further reduced by the compiler when - * applying stack alignment constraints: the AAPCS mandates a - * 16-byte (i.e. 4-bit) aligned SP at function boundaries. - * - * The resulting 5 bits of entropy is seen in SP[8:4]. + * The resulting 6 bits of entropy is seen in SP[9:4]. */ - choose_random_kstack_offset(get_random_u16() & 0x1FF); + choose_random_kstack_offset(get_random_u16()); } static inline bool has_syscall_work(unsigned long flags) --- linux-xilinx-6.8.0.orig/arch/arm64/kernel/vdso/vdso.lds.S +++ linux-xilinx-6.8.0/arch/arm64/kernel/vdso/vdso.lds.S @@ -38,6 +38,7 @@ */ /DISCARD/ : { *(.note.GNU-stack .note.gnu.property) + *(.ARM.attributes) } .note : { *(.note.*) } :text :note --- linux-xilinx-6.8.0.orig/arch/arm64/kernel/vmlinux.lds.S +++ linux-xilinx-6.8.0/arch/arm64/kernel/vmlinux.lds.S @@ -162,6 +162,7 @@ /DISCARD/ : { *(.interp .dynamic) *(.dynsym .dynstr .hash .gnu.hash) + *(.ARM.attributes) } . = KIMAGE_VADDR; @@ -285,6 +286,9 @@ __initdata_end = .; __init_end = .; + .data.rel.ro : { *(.data.rel.ro) } + ASSERT(SIZEOF(.data.rel.ro) == 0, "Unexpected RELRO detected!") + _data = .; _sdata = .; RW_DATA(L1_CACHE_BYTES, PAGE_SIZE, THREAD_ALIGN) @@ -336,9 +340,6 @@ *(.plt) *(.plt.*) *(.iplt) *(.igot .igot.plt) } ASSERT(SIZEOF(.plt) == 0, "Unexpected run-time procedure linkages detected!") - - .data.rel.ro : { *(.data.rel.ro) } - ASSERT(SIZEOF(.data.rel.ro) == 0, "Unexpected RELRO detected!") } #include "image-vars.h" --- linux-xilinx-6.8.0.orig/arch/arm64/kvm/arch_timer.c +++ linux-xilinx-6.8.0/arch/arm64/kvm/arch_timer.c @@ -206,8 +206,7 @@ static inline bool userspace_irqchip(struct kvm *kvm) { - return static_branch_unlikely(&userspace_irqchip_in_use) && - unlikely(!irqchip_in_kernel(kvm)); + return unlikely(!irqchip_in_kernel(kvm)); } static void soft_timer_start(struct hrtimer *hrt, u64 ns) @@ -467,10 +466,8 @@ trace_kvm_timer_emulate(ctx, should_fire); - if (should_fire != ctx->irq.level) { + if (should_fire != ctx->irq.level) kvm_timer_update_irq(ctx->vcpu, should_fire, ctx); - return; - } /* * If the timer can fire now, we don't need to have a soft timer --- linux-xilinx-6.8.0.orig/arch/arm64/kvm/arm.c +++ linux-xilinx-6.8.0/arch/arm64/kvm/arm.c @@ -57,7 +57,6 @@ static bool vgic_present, kvm_arm_initialised; static DEFINE_PER_CPU(unsigned char, kvm_hyp_initialized); -DEFINE_STATIC_KEY_FALSE(userspace_irqchip_in_use); bool is_kvm_arm_initialised(void) { @@ -191,6 +190,23 @@ } +static void kvm_destroy_mpidr_data(struct kvm *kvm) +{ + struct kvm_mpidr_data *data; + + mutex_lock(&kvm->arch.config_lock); + + data = rcu_dereference_protected(kvm->arch.mpidr_data, + lockdep_is_held(&kvm->arch.config_lock)); + if (data) { + rcu_assign_pointer(kvm->arch.mpidr_data, NULL); + synchronize_rcu(); + kfree(data); + } + + mutex_unlock(&kvm->arch.config_lock); +} + /** * kvm_arch_destroy_vm - destroy the VM data structure * @kvm: pointer to the KVM struct @@ -205,7 +221,8 @@ if (is_protected_kvm_enabled()) pkvm_destroy_hyp_vm(kvm); - kfree(kvm->arch.mpidr_data); + kvm_destroy_mpidr_data(kvm); + kvm_destroy_vcpus(kvm); kvm_unshare_hyp(kvm, kvm + 1); @@ -390,6 +407,13 @@ vcpu->arch.hw_mmu = &vcpu->kvm->arch.mmu; + /* + * This vCPU may have been created after mpidr_data was initialized. + * Throw out the pre-computed mappings if that is the case which forces + * KVM to fall back to iteratively searching the vCPUs. + */ + kvm_destroy_mpidr_data(vcpu->kvm); + err = kvm_vgic_vcpu_init(vcpu); if (err) return err; @@ -403,9 +427,6 @@ void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu) { - if (vcpu_has_run_once(vcpu) && unlikely(!irqchip_in_kernel(vcpu->kvm))) - static_branch_dec(&userspace_irqchip_in_use); - kvm_mmu_free_memory_cache(&vcpu->arch.mmu_page_cache); kvm_timer_vcpu_terminate(vcpu); kvm_pmu_vcpu_destroy(vcpu); @@ -589,7 +610,8 @@ mutex_lock(&kvm->arch.config_lock); - if (kvm->arch.mpidr_data || atomic_read(&kvm->online_vcpus) == 1) + if (rcu_access_pointer(kvm->arch.mpidr_data) || + atomic_read(&kvm->online_vcpus) == 1) goto out; kvm_for_each_vcpu(c, vcpu, kvm) { @@ -626,7 +648,7 @@ data->cmpidr_to_idx[index] = c; } - kvm->arch.mpidr_data = data; + rcu_assign_pointer(kvm->arch.mpidr_data, data); out: mutex_unlock(&kvm->arch.config_lock); } @@ -688,14 +710,6 @@ return ret; } - if (!irqchip_in_kernel(kvm)) { - /* - * Tell the rest of the code that there are userspace irqchip - * VMs in the wild. - */ - static_branch_inc(&userspace_irqchip_in_use); - } - /* * Initialize traps for protected VMs. * NOTE: Move to run in EL2 directly, rather than via a hypercall, once @@ -838,6 +852,9 @@ static int check_vcpu_requests(struct kvm_vcpu *vcpu) { if (kvm_request_pending(vcpu)) { + if (kvm_check_request(KVM_REQ_VM_DEAD, vcpu)) + return -EIO; + if (kvm_check_request(KVM_REQ_SLEEP, vcpu)) kvm_vcpu_sleep(vcpu); @@ -913,7 +930,7 @@ * state gets updated in kvm_timer_update_run and * kvm_pmu_update_run below). */ - if (static_branch_unlikely(&userspace_irqchip_in_use)) { + if (unlikely(!irqchip_in_kernel(vcpu->kvm))) { if (kvm_timer_should_notify_user(vcpu) || kvm_pmu_should_notify_user(vcpu)) { *ret = -EINTR; @@ -969,13 +986,13 @@ if (run->exit_reason == KVM_EXIT_MMIO) { ret = kvm_handle_mmio_return(vcpu); - if (ret) + if (ret <= 0) return ret; } vcpu_load(vcpu); - if (run->immediate_exit) { + if (!vcpu->wants_to_run) { ret = -EINTR; goto out; } @@ -1035,7 +1052,7 @@ vcpu->mode = OUTSIDE_GUEST_MODE; isb(); /* Ensure work in x_flush_hwstate is committed */ kvm_pmu_sync_hwstate(vcpu); - if (static_branch_unlikely(&userspace_irqchip_in_use)) + if (unlikely(!irqchip_in_kernel(vcpu->kvm))) kvm_timer_sync_user(vcpu); kvm_vgic_sync_hwstate(vcpu); local_irq_enable(); @@ -1081,7 +1098,7 @@ * we don't want vtimer interrupts to race with syncing the * timer virtual interrupt state. */ - if (static_branch_unlikely(&userspace_irqchip_in_use)) + if (unlikely(!irqchip_in_kernel(vcpu->kvm))) kvm_timer_sync_user(vcpu); kvm_arch_vcpu_ctxsync_fp(vcpu); @@ -1842,8 +1859,7 @@ static void __init cpu_prepare_hyp_mode(int cpu, u32 hyp_va_bits) { struct kvm_nvhe_init_params *params = per_cpu_ptr_nvhe_sym(kvm_init_params, cpu); - u64 mmfr0 = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1); - unsigned long tcr; + unsigned long tcr, ips; /* * Calculate the raw per-cpu offset without a translation from the @@ -1857,6 +1873,7 @@ params->mair_el2 = read_sysreg(mair_el1); tcr = read_sysreg(tcr_el1); + ips = FIELD_GET(TCR_IPS_MASK, tcr); if (cpus_have_final_cap(ARM64_KVM_HVHE)) { tcr |= TCR_EPD1_MASK; } else { @@ -1866,8 +1883,8 @@ tcr &= ~TCR_T0SZ_MASK; tcr |= TCR_T0SZ(hyp_va_bits); tcr &= ~TCR_EL2_PS_MASK; - tcr |= FIELD_PREP(TCR_EL2_PS_MASK, kvm_get_parange(mmfr0)); - if (kvm_lpa2_is_enabled()) + tcr |= FIELD_PREP(TCR_EL2_PS_MASK, ips); + if (lpa2_is_enabled()) tcr |= TCR_EL2_DS; params->tcr_el2 = tcr; @@ -2459,21 +2476,27 @@ struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr) { - struct kvm_vcpu *vcpu; + struct kvm_vcpu *vcpu = NULL; + struct kvm_mpidr_data *data; unsigned long i; mpidr &= MPIDR_HWID_BITMASK; - if (kvm->arch.mpidr_data) { - u16 idx = kvm_mpidr_index(kvm->arch.mpidr_data, mpidr); + rcu_read_lock(); + data = rcu_dereference(kvm->arch.mpidr_data); + + if (data) { + u16 idx = kvm_mpidr_index(data, mpidr); - vcpu = kvm_get_vcpu(kvm, - kvm->arch.mpidr_data->cmpidr_to_idx[idx]); + vcpu = kvm_get_vcpu(kvm, data->cmpidr_to_idx[idx]); if (mpidr != kvm_vcpu_get_mpidr_aff(vcpu)) vcpu = NULL; + } + + rcu_read_unlock(); + if (vcpu) return vcpu; - } kvm_for_each_vcpu(i, vcpu, kvm) { if (mpidr == kvm_vcpu_get_mpidr_aff(vcpu)) --- linux-xilinx-6.8.0.orig/arch/arm64/kvm/guest.c +++ linux-xilinx-6.8.0/arch/arm64/kvm/guest.c @@ -251,6 +251,7 @@ case PSR_AA32_MODE_SVC: case PSR_AA32_MODE_ABT: case PSR_AA32_MODE_UND: + case PSR_AA32_MODE_SYS: if (!vcpu_el1_is_32bit(vcpu)) return -EINVAL; break; @@ -276,7 +277,7 @@ if (*vcpu_cpsr(vcpu) & PSR_MODE32_BIT) { int i, nr_reg; - switch (*vcpu_cpsr(vcpu)) { + switch (*vcpu_cpsr(vcpu) & PSR_AA32_MODE_MASK) { /* * Either we are dealing with user mode, and only the * first 15 registers (+ PC) must be narrowed to 32bit. --- linux-xilinx-6.8.0.orig/arch/arm64/kvm/hyp/aarch32.c +++ linux-xilinx-6.8.0/arch/arm64/kvm/hyp/aarch32.c @@ -50,9 +50,23 @@ u32 cpsr_cond; int cond; - /* Top two bits non-zero? Unconditional. */ - if (kvm_vcpu_get_esr(vcpu) >> 30) + /* + * These are the exception classes that could fire with a + * conditional instruction. + */ + switch (kvm_vcpu_trap_get_class(vcpu)) { + case ESR_ELx_EC_CP15_32: + case ESR_ELx_EC_CP15_64: + case ESR_ELx_EC_CP14_MR: + case ESR_ELx_EC_CP14_LS: + case ESR_ELx_EC_FP_ASIMD: + case ESR_ELx_EC_CP10_ID: + case ESR_ELx_EC_CP14_64: + case ESR_ELx_EC_SVC32: + break; + default: return true; + } /* Is condition field valid? */ cond = kvm_vcpu_get_condition(vcpu); --- linux-xilinx-6.8.0.orig/arch/arm64/kvm/hyp/nvhe/ffa.c +++ linux-xilinx-6.8.0/arch/arm64/kvm/hyp/nvhe/ffa.c @@ -415,9 +415,9 @@ return; } -static __always_inline void do_ffa_mem_xfer(const u64 func_id, - struct arm_smccc_res *res, - struct kvm_cpu_context *ctxt) +static void __do_ffa_mem_xfer(const u64 func_id, + struct arm_smccc_res *res, + struct kvm_cpu_context *ctxt) { DECLARE_REG(u32, len, ctxt, 1); DECLARE_REG(u32, fraglen, ctxt, 2); @@ -429,9 +429,6 @@ u32 offset, nr_ranges; int ret = 0; - BUILD_BUG_ON(func_id != FFA_FN64_MEM_SHARE && - func_id != FFA_FN64_MEM_LEND); - if (addr_mbz || npages_mbz || fraglen > len || fraglen > KVM_FFA_MBOX_NR_PAGES * PAGE_SIZE) { ret = FFA_RET_INVALID_PARAMETERS; @@ -450,6 +447,11 @@ goto out_unlock; } + if (len > ffa_desc_buf.len) { + ret = FFA_RET_NO_MEMORY; + goto out_unlock; + } + buf = hyp_buffers.tx; memcpy(buf, host_buffers.tx, fraglen); @@ -501,6 +503,13 @@ goto out_unlock; } +#define do_ffa_mem_xfer(fid, res, ctxt) \ + do { \ + BUILD_BUG_ON((fid) != FFA_FN64_MEM_SHARE && \ + (fid) != FFA_FN64_MEM_LEND); \ + __do_ffa_mem_xfer((fid), (res), (ctxt)); \ + } while (0); + static void do_ffa_mem_reclaim(struct arm_smccc_res *res, struct kvm_cpu_context *ctxt) { --- linux-xilinx-6.8.0.orig/arch/arm64/kvm/hyp/nvhe/tlb.c +++ linux-xilinx-6.8.0/arch/arm64/kvm/hyp/nvhe/tlb.c @@ -154,7 +154,8 @@ /* Switch to requested VMID */ __tlb_switch_to_guest(mmu, &cxt, false); - __flush_s2_tlb_range_op(ipas2e1is, start, pages, stride, 0); + __flush_s2_tlb_range_op(ipas2e1is, start, pages, stride, + TLBI_TTL_UNKNOWN); dsb(ish); __tlbi(vmalle1is); --- linux-xilinx-6.8.0.orig/arch/arm64/kvm/hyp/pgtable.c +++ linux-xilinx-6.8.0/arch/arm64/kvm/hyp/pgtable.c @@ -528,7 +528,7 @@ kvm_clear_pte(ctx->ptep); dsb(ishst); - __tlbi_level(vae2is, __TLBI_VADDR(ctx->addr, 0), ctx->level); + __tlbi_level(vae2is, __TLBI_VADDR(ctx->addr, 0), 0); } else { if (ctx->end - ctx->addr < granule) return -EINVAL; @@ -829,12 +829,15 @@ * Perform the appropriate TLB invalidation based on the * evicted pte value (if any). */ - if (kvm_pte_table(ctx->old, ctx->level)) - kvm_tlb_flush_vmid_range(mmu, ctx->addr, - kvm_granule_size(ctx->level)); - else if (kvm_pte_valid(ctx->old)) + if (kvm_pte_table(ctx->old, ctx->level)) { + u64 size = kvm_granule_size(ctx->level); + u64 addr = ALIGN_DOWN(ctx->addr, size); + + kvm_tlb_flush_vmid_range(mmu, addr, size); + } else if (kvm_pte_valid(ctx->old)) { kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, mmu, ctx->addr, ctx->level); + } } if (stage2_pte_is_counted(ctx->old)) @@ -882,9 +885,13 @@ if (kvm_pte_valid(ctx->old)) { kvm_clear_pte(ctx->ptep); - if (!stage2_unmap_defer_tlb_flush(pgt)) - kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, mmu, - ctx->addr, ctx->level); + if (kvm_pte_table(ctx->old, ctx->level)) { + kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, mmu, ctx->addr, + 0); + } else if (!stage2_unmap_defer_tlb_flush(pgt)) { + kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, mmu, ctx->addr, + ctx->level); + } } mm_ops->put_page(ctx->ptep); --- linux-xilinx-6.8.0.orig/arch/arm64/kvm/hyp/vhe/tlb.c +++ linux-xilinx-6.8.0/arch/arm64/kvm/hyp/vhe/tlb.c @@ -171,7 +171,8 @@ /* Switch to requested VMID */ __tlb_switch_to_guest(mmu, &cxt); - __flush_s2_tlb_range_op(ipas2e1is, start, pages, stride, 0); + __flush_s2_tlb_range_op(ipas2e1is, start, pages, stride, + TLBI_TTL_UNKNOWN); dsb(ish); __tlbi(vmalle1is); --- linux-xilinx-6.8.0.orig/arch/arm64/kvm/mmio.c +++ linux-xilinx-6.8.0/arch/arm64/kvm/mmio.c @@ -72,6 +72,31 @@ return data; } +static bool kvm_pending_sync_exception(struct kvm_vcpu *vcpu) +{ + if (!vcpu_get_flag(vcpu, PENDING_EXCEPTION)) + return false; + + if (vcpu_el1_is_32bit(vcpu)) { + switch (vcpu_get_flag(vcpu, EXCEPT_MASK)) { + case unpack_vcpu_flag(EXCEPT_AA32_UND): + case unpack_vcpu_flag(EXCEPT_AA32_IABT): + case unpack_vcpu_flag(EXCEPT_AA32_DABT): + return true; + default: + return false; + } + } else { + switch (vcpu_get_flag(vcpu, EXCEPT_MASK)) { + case unpack_vcpu_flag(EXCEPT_AA64_EL1_SYNC): + case unpack_vcpu_flag(EXCEPT_AA64_EL2_SYNC): + return true; + default: + return false; + } + } +} + /** * kvm_handle_mmio_return -- Handle MMIO loads after user space emulation * or in-kernel IO emulation @@ -84,9 +109,12 @@ unsigned int len; int mask; - /* Detect an already handled MMIO return */ - if (unlikely(!vcpu->mmio_needed)) - return 0; + /* + * Detect if the MMIO return was already handled or if userspace aborted + * the MMIO access. + */ + if (unlikely(!vcpu->mmio_needed || kvm_pending_sync_exception(vcpu))) + return 1; vcpu->mmio_needed = 0; @@ -117,7 +145,7 @@ */ kvm_incr_pc(vcpu); - return 0; + return 1; } int io_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa) --- linux-xilinx-6.8.0.orig/arch/arm64/kvm/mmu.c +++ linux-xilinx-6.8.0/arch/arm64/kvm/mmu.c @@ -1631,7 +1631,7 @@ fault_ipa = kvm_vcpu_get_fault_ipa(vcpu); is_iabt = kvm_vcpu_trap_is_iabt(vcpu); - if (esr_fsc_is_permission_fault(esr)) { + if (esr_fsc_is_translation_fault(esr)) { /* Beyond sanitised PARange (which is the IPA limit) */ if (fault_ipa >= BIT_ULL(get_kvm_ipa_limit())) { kvm_inject_size_fault(vcpu); --- linux-xilinx-6.8.0.orig/arch/arm64/kvm/pmu-emul.c +++ linux-xilinx-6.8.0/arch/arm64/kvm/pmu-emul.c @@ -342,7 +342,6 @@ if ((kvm_vcpu_read_pmcr(vcpu) & ARMV8_PMU_PMCR_E)) { reg = __vcpu_sys_reg(vcpu, PMOVSSET_EL0); - reg &= __vcpu_sys_reg(vcpu, PMCNTENSET_EL0); reg &= __vcpu_sys_reg(vcpu, PMINTENSET_EL1); } --- linux-xilinx-6.8.0.orig/arch/arm64/kvm/sys_regs.c +++ linux-xilinx-6.8.0/arch/arm64/kvm/sys_regs.c @@ -32,6 +32,7 @@ #include #include "sys_regs.h" +#include "vgic/vgic.h" #include "trace.h" @@ -427,6 +428,11 @@ { bool g1; + if (!kvm_has_gicv3(vcpu->kvm)) { + kvm_inject_undefined(vcpu); + return false; + } + if (!p->is_write) return read_from_write_only(vcpu, p, r); @@ -1531,6 +1537,7 @@ val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_MTE); val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_SME); + val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_MPAM_frac); break; case SYS_ID_AA64ISAR1_EL1: if (!vcpu_has_ptrauth(vcpu)) @@ -1677,6 +1684,13 @@ val &= ~ID_AA64PFR0_EL1_AMU_MASK; + /* + * MPAM is disabled by default as KVM also needs a set of PARTID to + * program the MPAMVPMx_EL2 PARTID remapping registers with. But some + * older kernels let the guest see the ID bit. + */ + val &= ~ID_AA64PFR0_EL1_MPAM_MASK; + return val; } @@ -1786,6 +1800,42 @@ return set_id_reg(vcpu, rd, val); } +static int set_id_aa64pfr0_el1(struct kvm_vcpu *vcpu, + const struct sys_reg_desc *rd, u64 user_val) +{ + u64 hw_val = read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1); + u64 mpam_mask = ID_AA64PFR0_EL1_MPAM_MASK; + + /* + * Commit 011e5f5bf529f ("arm64/cpufeature: Add remaining feature bits + * in ID_AA64PFR0 register") exposed the MPAM field of AA64PFR0_EL1 to + * guests, but didn't add trap handling. KVM doesn't support MPAM and + * always returns an UNDEF for these registers. The guest must see 0 + * for this field. + * + * But KVM must also accept values from user-space that were provided + * by KVM. On CPUs that support MPAM, permit user-space to write + * the sanitizied value to ID_AA64PFR0_EL1.MPAM, but ignore this field. + */ + if ((hw_val & mpam_mask) == (user_val & mpam_mask)) + user_val &= ~ID_AA64PFR0_EL1_MPAM_MASK; + + return set_id_reg(vcpu, rd, user_val); +} + +static int set_id_aa64pfr1_el1(struct kvm_vcpu *vcpu, + const struct sys_reg_desc *rd, u64 user_val) +{ + u64 hw_val = read_sanitised_ftr_reg(SYS_ID_AA64PFR1_EL1); + u64 mpam_mask = ID_AA64PFR1_EL1_MPAM_frac_MASK; + + /* See set_id_aa64pfr0_el1 for comment about MPAM */ + if ((hw_val & mpam_mask) == (user_val & mpam_mask)) + user_val &= ~ID_AA64PFR1_EL1_MPAM_frac_MASK; + + return set_id_reg(vcpu, rd, user_val); +} + /* * cpufeature ID register user accessors * @@ -1934,7 +1984,7 @@ * one cache line. */ if (kvm_has_mte(vcpu->kvm)) - clidr |= 2 << CLIDR_TTYPE_SHIFT(loc); + clidr |= 2ULL << CLIDR_TTYPE_SHIFT(loc); __vcpu_sys_reg(vcpu, r->reg) = clidr; @@ -2282,7 +2332,7 @@ { SYS_DESC(SYS_ID_AA64PFR0_EL1), .access = access_id_reg, .get_user = get_id_reg, - .set_user = set_id_reg, + .set_user = set_id_aa64pfr0_el1, .reset = read_sanitised_id_aa64pfr0_el1, .val = ~(ID_AA64PFR0_EL1_AMU | ID_AA64PFR0_EL1_MPAM | @@ -2291,7 +2341,11 @@ ID_AA64PFR0_EL1_GIC | ID_AA64PFR0_EL1_AdvSIMD | ID_AA64PFR0_EL1_FP), }, - ID_SANITISED(ID_AA64PFR1_EL1), + { SYS_DESC(SYS_ID_AA64PFR1_EL1), + .access = access_id_reg, + .get_user = get_id_reg, + .set_user = set_id_aa64pfr1_el1, + .reset = kvm_read_sanitised_id_reg, }, ID_UNALLOCATED(4,2), ID_UNALLOCATED(4,3), ID_WRITABLE(ID_AA64ZFR0_EL1, ~ID_AA64ZFR0_EL1_RES0), @@ -2334,7 +2388,8 @@ ID_WRITABLE(ID_AA64MMFR0_EL1, ~(ID_AA64MMFR0_EL1_RES0 | ID_AA64MMFR0_EL1_TGRAN4_2 | ID_AA64MMFR0_EL1_TGRAN64_2 | - ID_AA64MMFR0_EL1_TGRAN16_2)), + ID_AA64MMFR0_EL1_TGRAN16_2 | + ID_AA64MMFR0_EL1_ASIDBITS)), ID_WRITABLE(ID_AA64MMFR1_EL1, ~(ID_AA64MMFR1_EL1_RES0 | ID_AA64MMFR1_EL1_HCX | ID_AA64MMFR1_EL1_XNX | --- linux-xilinx-6.8.0.orig/arch/arm64/kvm/vgic/vgic-init.c +++ linux-xilinx-6.8.0/arch/arm64/kvm/vgic/vgic-init.c @@ -355,7 +355,7 @@ if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) { list_for_each_entry_safe(rdreg, next, &dist->rd_regions, list) - vgic_v3_free_redist_region(rdreg); + vgic_v3_free_redist_region(kvm, rdreg); INIT_LIST_HEAD(&dist->rd_regions); } else { dist->vgic_cpu_base = VGIC_ADDR_UNDEF; @@ -494,10 +494,10 @@ out: mutex_unlock(&kvm->arch.config_lock); out_slots: - mutex_unlock(&kvm->slots_lock); - if (ret) - kvm_vgic_destroy(kvm); + kvm_vm_dead(kvm); + + mutex_unlock(&kvm->slots_lock); return ret; } --- linux-xilinx-6.8.0.orig/arch/arm64/kvm/vgic/vgic-its.c +++ linux-xilinx-6.8.0/arch/arm64/kvm/vgic/vgic-its.c @@ -861,6 +861,9 @@ ite = find_ite(its, device_id, event_id); if (ite && its_is_collection_mapped(ite->collection)) { + struct its_device *device = find_its_device(its, device_id); + int ite_esz = vgic_its_get_abi(its)->ite_esz; + gpa_t gpa = device->itt_addr + ite->event_id * ite_esz; /* * Though the spec talks about removing the pending state, we * don't bother here since we clear the ITTE anyway and the @@ -869,7 +872,8 @@ vgic_its_invalidate_cache(kvm); its_free_ite(kvm, ite); - return 0; + + return vgic_its_write_entry_lock(its, gpa, 0, ite_esz); } return E_ITS_DISCARD_UNMAPPED_INTERRUPT; @@ -1217,9 +1221,11 @@ bool valid = its_cmd_get_validbit(its_cmd); u8 num_eventid_bits = its_cmd_get_size(its_cmd); gpa_t itt_addr = its_cmd_get_ittaddr(its_cmd); + int dte_esz = vgic_its_get_abi(its)->dte_esz; struct its_device *device; + gpa_t gpa; - if (!vgic_its_check_id(its, its->baser_device_table, device_id, NULL)) + if (!vgic_its_check_id(its, its->baser_device_table, device_id, &gpa)) return E_ITS_MAPD_DEVICE_OOR; if (valid && num_eventid_bits > VITS_TYPER_IDBITS) @@ -1240,7 +1246,7 @@ * is an error, so we are done in any case. */ if (!valid) - return 0; + return vgic_its_write_entry_lock(its, gpa, 0, dte_esz); device = vgic_its_alloc_device(its, device_id, itt_addr, num_eventid_bits); @@ -2212,7 +2218,6 @@ static int vgic_its_save_ite(struct vgic_its *its, struct its_device *dev, struct its_ite *ite, gpa_t gpa, int ite_esz) { - struct kvm *kvm = its->dev->kvm; u32 next_offset; u64 val; @@ -2221,7 +2226,8 @@ ((u64)ite->irq->intid << KVM_ITS_ITE_PINTID_SHIFT) | ite->collection->collection_id; val = cpu_to_le64(val); - return vgic_write_guest_lock(kvm, gpa, &val, ite_esz); + + return vgic_its_write_entry_lock(its, gpa, val, ite_esz); } /** @@ -2362,7 +2368,6 @@ static int vgic_its_save_dte(struct vgic_its *its, struct its_device *dev, gpa_t ptr, int dte_esz) { - struct kvm *kvm = its->dev->kvm; u64 val, itt_addr_field; u32 next_offset; @@ -2373,7 +2378,8 @@ (itt_addr_field << KVM_ITS_DTE_ITTADDR_SHIFT) | (dev->num_eventid_bits - 1)); val = cpu_to_le64(val); - return vgic_write_guest_lock(kvm, ptr, &val, dte_esz); + + return vgic_its_write_entry_lock(its, ptr, val, dte_esz); } /** @@ -2560,7 +2566,8 @@ ((u64)collection->target_addr << KVM_ITS_CTE_RDBASE_SHIFT) | collection->collection_id); val = cpu_to_le64(val); - return vgic_write_guest_lock(its->dev->kvm, gpa, &val, esz); + + return vgic_its_write_entry_lock(its, gpa, val, esz); } /* @@ -2576,8 +2583,7 @@ u64 val; int ret; - BUG_ON(esz > sizeof(val)); - ret = kvm_read_guest_lock(kvm, gpa, &val, esz); + ret = vgic_its_read_entry_lock(its, gpa, &val, esz); if (ret) return ret; val = le64_to_cpu(val); @@ -2615,7 +2621,6 @@ u64 baser = its->baser_coll_table; gpa_t gpa = GITS_BASER_ADDR_48_to_52(baser); struct its_collection *collection; - u64 val; size_t max_size, filled = 0; int ret, cte_esz = abi->cte_esz; @@ -2639,10 +2644,7 @@ * table is not fully filled, add a last dummy element * with valid bit unset */ - val = 0; - BUG_ON(cte_esz > sizeof(val)); - ret = vgic_write_guest_lock(its->dev->kvm, gpa, &val, cte_esz); - return ret; + return vgic_its_write_entry_lock(its, gpa, 0, cte_esz); } /** --- linux-xilinx-6.8.0.orig/arch/arm64/kvm/vgic/vgic-kvm-device.c +++ linux-xilinx-6.8.0/arch/arm64/kvm/vgic/vgic-kvm-device.c @@ -338,12 +338,12 @@ int vgic_v2_parse_attr(struct kvm_device *dev, struct kvm_device_attr *attr, struct vgic_reg_attr *reg_attr) { - int cpuid; + int cpuid = FIELD_GET(KVM_DEV_ARM_VGIC_CPUID_MASK, attr->attr); - cpuid = FIELD_GET(KVM_DEV_ARM_VGIC_CPUID_MASK, attr->attr); - - reg_attr->vcpu = kvm_get_vcpu_by_id(dev->kvm, cpuid); reg_attr->addr = attr->attr & KVM_DEV_ARM_VGIC_OFFSET_MASK; + reg_attr->vcpu = kvm_get_vcpu_by_id(dev->kvm, cpuid); + if (!reg_attr->vcpu) + return -EINVAL; return 0; } --- linux-xilinx-6.8.0.orig/arch/arm64/kvm/vgic/vgic-mmio-v3.c +++ linux-xilinx-6.8.0/arch/arm64/kvm/vgic/vgic-mmio-v3.c @@ -530,6 +530,7 @@ unsigned long val) { struct vgic_irq *irq; + u32 intid; /* * If the guest wrote only to the upper 32bit part of the @@ -541,9 +542,13 @@ if ((addr & 4) || !vgic_lpis_enabled(vcpu)) return; + intid = lower_32_bits(val); + if (intid < VGIC_MIN_LPI) + return; + vgic_set_rdist_busy(vcpu, true); - irq = vgic_get_irq(vcpu->kvm, NULL, lower_32_bits(val)); + irq = vgic_get_irq(vcpu->kvm, NULL, intid); if (irq) { vgic_its_inv_lpi(vcpu->kvm, irq); vgic_put_irq(vcpu->kvm, irq); @@ -919,8 +924,19 @@ return ret; } -void vgic_v3_free_redist_region(struct vgic_redist_region *rdreg) +void vgic_v3_free_redist_region(struct kvm *kvm, struct vgic_redist_region *rdreg) { + struct kvm_vcpu *vcpu; + unsigned long c; + + lockdep_assert_held(&kvm->arch.config_lock); + + /* Garbage collect the region */ + kvm_for_each_vcpu(c, vcpu, kvm) { + if (vcpu->arch.vgic_cpu.rdreg == rdreg) + vcpu->arch.vgic_cpu.rdreg = NULL; + } + list_del(&rdreg->list); kfree(rdreg); } @@ -945,7 +961,7 @@ mutex_lock(&kvm->arch.config_lock); rdreg = vgic_v3_rdist_region_from_index(kvm, index); - vgic_v3_free_redist_region(rdreg); + vgic_v3_free_redist_region(kvm, rdreg); mutex_unlock(&kvm->arch.config_lock); return ret; } --- linux-xilinx-6.8.0.orig/arch/arm64/kvm/vgic/vgic.h +++ linux-xilinx-6.8.0/arch/arm64/kvm/vgic/vgic.h @@ -145,6 +145,29 @@ return ret; } +static inline int vgic_its_read_entry_lock(struct vgic_its *its, gpa_t eaddr, + u64 *eval, unsigned long esize) +{ + struct kvm *kvm = its->dev->kvm; + + if (KVM_BUG_ON(esize != sizeof(*eval), kvm)) + return -EINVAL; + + return kvm_read_guest_lock(kvm, eaddr, eval, esize); + +} + +static inline int vgic_its_write_entry_lock(struct vgic_its *its, gpa_t eaddr, + u64 eval, unsigned long esize) +{ + struct kvm *kvm = its->dev->kvm; + + if (KVM_BUG_ON(esize != sizeof(eval), kvm)) + return -EINVAL; + + return vgic_write_guest_lock(kvm, eaddr, &eval, esize); +} + /* * This struct provides an intermediate representation of the fields contained * in the GICH_VMCR and ICH_VMCR registers, such that code exporting the GIC @@ -310,7 +333,7 @@ struct vgic_redist_region *vgic_v3_rdist_region_from_index(struct kvm *kvm, u32 index); -void vgic_v3_free_redist_region(struct vgic_redist_region *rdreg); +void vgic_v3_free_redist_region(struct kvm *kvm, struct vgic_redist_region *rdreg); bool vgic_v3_rdist_overlap(struct kvm *kvm, gpa_t base, size_t size); @@ -343,4 +366,11 @@ void vgic_v4_get_vlpi_state(struct vgic_irq *irq, bool *val); int vgic_v4_request_vpe_irq(struct kvm_vcpu *vcpu, int irq); +static inline bool kvm_has_gicv3(struct kvm *kvm) +{ + return (static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif) && + irqchip_in_kernel(kvm) && + kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3); +} + #endif --- linux-xilinx-6.8.0.orig/arch/arm64/mm/context.c +++ linux-xilinx-6.8.0/arch/arm64/mm/context.c @@ -32,9 +32,9 @@ static unsigned long *pinned_asid_map; #define ASID_MASK (~GENMASK(asid_bits - 1, 0)) -#define ASID_FIRST_VERSION (1UL << asid_bits) +#define ASID_FIRST_VERSION (1UL << 16) -#define NUM_USER_ASIDS ASID_FIRST_VERSION +#define NUM_USER_ASIDS (1UL << asid_bits) #define ctxid2asid(asid) ((asid) & ~ASID_MASK) #define asid2ctxid(asid, genid) ((asid) | (genid)) --- linux-xilinx-6.8.0.orig/arch/arm64/mm/hugetlbpage.c +++ linux-xilinx-6.8.0/arch/arm64/mm/hugetlbpage.c @@ -526,6 +526,18 @@ static int __init hugetlbpage_init(void) { + /* + * HugeTLB pages are supported on maximum four page table + * levels (PUD, CONT PMD, PMD, CONT PTE) for a given base + * page size, corresponding to hugetlb_add_hstate() calls + * here. + * + * HUGE_MAX_HSTATE should at least match maximum supported + * HugeTLB page sizes on the platform. Any new addition to + * supported HugeTLB page sizes will also require changing + * HUGE_MAX_HSTATE as well. + */ + BUILD_BUG_ON(HUGE_MAX_HSTATE < 4); if (pud_sect_supported()) hugetlb_add_hstate(PUD_SHIFT - PAGE_SHIFT); --- linux-xilinx-6.8.0.orig/arch/arm64/mm/pageattr.c +++ linux-xilinx-6.8.0/arch/arm64/mm/pageattr.c @@ -219,9 +219,6 @@ pte_t *ptep; unsigned long addr = (unsigned long)page_address(page); - if (!can_set_direct_map()) - return true; - pgdp = pgd_offset_k(addr); if (pgd_none(READ_ONCE(*pgdp))) return false; --- linux-xilinx-6.8.0.orig/arch/arm64/mm/trans_pgd.c +++ linux-xilinx-6.8.0/arch/arm64/mm/trans_pgd.c @@ -42,14 +42,16 @@ * the temporary mappings we use during restore. */ set_pte(dst_ptep, pte_mkwrite_novma(pte)); - } else if ((debug_pagealloc_enabled() || - is_kfence_address((void *)addr)) && !pte_none(pte)) { + } else if (!pte_none(pte)) { /* * debug_pagealloc will removed the PTE_VALID bit if * the page isn't in use by the resume kernel. It may have * been in use by the original kernel, in which case we need * to put it back in our copy to do the restore. * + * Other cases include kfence / vmalloc / memfd_secret which + * may call `set_direct_map_invalid_noflush()`. + * * Before marking this entry valid, check the pfn should * be mapped. */ --- linux-xilinx-6.8.0.orig/arch/arm64/net/bpf_jit_comp.c +++ linux-xilinx-6.8.0/arch/arm64/net/bpf_jit_comp.c @@ -26,7 +26,7 @@ #define TMP_REG_1 (MAX_BPF_JIT_REG + 0) #define TMP_REG_2 (MAX_BPF_JIT_REG + 1) -#define TCALL_CNT (MAX_BPF_JIT_REG + 2) +#define TCCNT_PTR (MAX_BPF_JIT_REG + 2) #define TMP_REG_3 (MAX_BPF_JIT_REG + 3) #define FP_BOTTOM (MAX_BPF_JIT_REG + 4) @@ -62,8 +62,8 @@ [TMP_REG_1] = A64_R(10), [TMP_REG_2] = A64_R(11), [TMP_REG_3] = A64_R(12), - /* tail_call_cnt */ - [TCALL_CNT] = A64_R(26), + /* tail_call_cnt_ptr */ + [TCCNT_PTR] = A64_R(26), /* temporary register for blinding constants */ [BPF_REG_AX] = A64_R(9), [FP_BOTTOM] = A64_R(27), @@ -269,13 +269,35 @@ * mov x29, sp * stp x19, x20, [sp, #-16]! * stp x21, x22, [sp, #-16]! - * stp x25, x26, [sp, #-16]! + * stp x26, x25, [sp, #-16]! + * stp x26, x25, [sp, #-16]! * stp x27, x28, [sp, #-16]! * mov x25, sp * mov tcc, #0 * // PROLOGUE_OFFSET */ +static void prepare_bpf_tail_call_cnt(struct jit_ctx *ctx) +{ + const struct bpf_prog *prog = ctx->prog; + const bool is_main_prog = !bpf_is_subprog(prog); + const u8 ptr = bpf2a64[TCCNT_PTR]; + const u8 fp = bpf2a64[BPF_REG_FP]; + const u8 tcc = ptr; + + emit(A64_PUSH(ptr, fp, A64_SP), ctx); + if (is_main_prog) { + /* Initialize tail_call_cnt. */ + emit(A64_MOVZ(1, tcc, 0, 0), ctx); + emit(A64_PUSH(tcc, fp, A64_SP), ctx); + emit(A64_MOV(1, ptr, A64_SP), ctx); + } else { + emit(A64_PUSH(ptr, fp, A64_SP), ctx); + emit(A64_NOP, ctx); + emit(A64_NOP, ctx); + } +} + #define BTI_INSNS (IS_ENABLED(CONFIG_ARM64_BTI_KERNEL) ? 1 : 0) #define PAC_INSNS (IS_ENABLED(CONFIG_ARM64_PTR_AUTH_KERNEL) ? 1 : 0) @@ -283,7 +305,7 @@ #define POKE_OFFSET (BTI_INSNS + 1) /* Tail call offset to jump into */ -#define PROLOGUE_OFFSET (BTI_INSNS + 2 + PAC_INSNS + 8) +#define PROLOGUE_OFFSET (BTI_INSNS + 2 + PAC_INSNS + 10) static int build_prologue(struct jit_ctx *ctx, bool ebpf_from_cbpf) { @@ -294,7 +316,6 @@ const u8 r8 = bpf2a64[BPF_REG_8]; const u8 r9 = bpf2a64[BPF_REG_9]; const u8 fp = bpf2a64[BPF_REG_FP]; - const u8 tcc = bpf2a64[TCALL_CNT]; const u8 fpb = bpf2a64[FP_BOTTOM]; const int idx0 = ctx->idx; int cur_offset; @@ -344,16 +365,13 @@ /* Save callee-saved registers */ emit(A64_PUSH(r6, r7, A64_SP), ctx); emit(A64_PUSH(r8, r9, A64_SP), ctx); - emit(A64_PUSH(fp, tcc, A64_SP), ctx); + prepare_bpf_tail_call_cnt(ctx); emit(A64_PUSH(fpb, A64_R(28), A64_SP), ctx); /* Set up BPF prog stack base register */ emit(A64_MOV(1, fp, A64_SP), ctx); if (!ebpf_from_cbpf && is_main_prog) { - /* Initialize tail_call_cnt */ - emit(A64_MOVZ(1, tcc, 0, 0), ctx); - cur_offset = ctx->idx - idx0; if (cur_offset != PROLOGUE_OFFSET) { pr_err_once("PROLOGUE_OFFSET = %d, expected %d!\n", @@ -384,7 +402,8 @@ const u8 tmp = bpf2a64[TMP_REG_1]; const u8 prg = bpf2a64[TMP_REG_2]; - const u8 tcc = bpf2a64[TCALL_CNT]; + const u8 tcc = bpf2a64[TMP_REG_3]; + const u8 ptr = bpf2a64[TCCNT_PTR]; const int idx0 = ctx->idx; #define cur_offset (ctx->idx - idx0) #define jmp_offset (out_offset - (cur_offset)) @@ -401,11 +420,12 @@ emit(A64_B_(A64_COND_CS, jmp_offset), ctx); /* - * if (tail_call_cnt >= MAX_TAIL_CALL_CNT) + * if ((*tail_call_cnt_ptr) >= MAX_TAIL_CALL_CNT) * goto out; - * tail_call_cnt++; + * (*tail_call_cnt_ptr)++; */ emit_a64_mov_i64(tmp, MAX_TAIL_CALL_CNT, ctx); + emit(A64_LDR64I(tcc, ptr, 0), ctx); emit(A64_CMP(1, tcc, tmp), ctx); emit(A64_B_(A64_COND_CS, jmp_offset), ctx); emit(A64_ADD_I(1, tcc, tcc, 1), ctx); @@ -421,6 +441,9 @@ emit(A64_LDR64(prg, tmp, prg), ctx); emit(A64_CBZ(1, prg, jmp_offset), ctx); + /* Update tail_call_cnt if the slot is populated. */ + emit(A64_STR64I(tcc, ptr, 0), ctx); + /* goto *(prog->bpf_func + prologue_offset); */ off = offsetof(struct bpf_prog, bpf_func); emit_a64_mov_i64(tmp, off, ctx); @@ -661,6 +684,7 @@ const u8 r8 = bpf2a64[BPF_REG_8]; const u8 r9 = bpf2a64[BPF_REG_9]; const u8 fp = bpf2a64[BPF_REG_FP]; + const u8 ptr = bpf2a64[TCCNT_PTR]; const u8 fpb = bpf2a64[FP_BOTTOM]; /* We're done with BPF stack */ @@ -669,7 +693,8 @@ /* Restore x27 and x28 */ emit(A64_POP(fpb, A64_R(28), A64_SP), ctx); /* Restore fs (x25) and x26 */ - emit(A64_POP(fp, A64_R(26), A64_SP), ctx); + emit(A64_POP(ptr, fp, A64_SP), ctx); + emit(A64_POP(ptr, fp, A64_SP), ctx); /* Restore callee-saved register */ emit(A64_POP(r8, r9, A64_SP), ctx); @@ -876,7 +901,7 @@ emit(A64_UXTH(is64, dst, dst), ctx); break; case 32: - emit(A64_REV32(is64, dst, dst), ctx); + emit(A64_REV32(0, dst, dst), ctx); /* upper 32 bits already cleared */ break; case 64: @@ -1189,7 +1214,7 @@ } else { emit_a64_mov_i(1, tmp, off, ctx); if (sign_extend) - emit(A64_LDRSW(dst, src_adj, off_adj), ctx); + emit(A64_LDRSW(dst, src, tmp), ctx); else emit(A64_LDR32(dst, src, tmp), ctx); } @@ -1648,7 +1673,8 @@ prog->jited_len = 0; goto out_off; } - bpf_jit_binary_lock_ro(header); + if (bpf_jit_binary_lock_ro(header)) + goto out_off; } else { jit_data->ctx = ctx; jit_data->image = image_ptr; @@ -1738,15 +1764,15 @@ emit_call(enter_prog, ctx); + /* save return value to callee saved register x20 */ + emit(A64_MOV(1, A64_R(20), A64_R(0)), ctx); + /* if (__bpf_prog_enter(prog) == 0) * goto skip_exec_of_prog; */ branch = ctx->image + ctx->idx; emit(A64_NOP, ctx); - /* save return value to callee saved register x20 */ - emit(A64_MOV(1, A64_R(20), A64_R(0)), ctx); - emit(A64_ADD_I(1, A64_R(0), A64_SP, args_off), ctx); if (!p->jited) emit_addr_mov_i64(A64_R(1), (const u64)p->insnsi, ctx); @@ -1816,6 +1842,12 @@ } } +static bool is_struct_ops_tramp(const struct bpf_tramp_links *fentry_links) +{ + return fentry_links->nr_links == 1 && + fentry_links->links[0]->link.type == BPF_LINK_TYPE_STRUCT_OPS; +} + /* Based on the x86's implementation of arch_prepare_bpf_trampoline(). * * bpf prog and function entry before bpf trampoline hooked: @@ -1845,6 +1877,7 @@ struct bpf_tramp_links *fmod_ret = &tlinks[BPF_TRAMP_MODIFY_RETURN]; bool save_ret; __le32 **branches = NULL; + bool is_struct_ops = is_struct_ops_tramp(fentry); /* trampoline stack layout: * [ parent ip ] @@ -1913,11 +1946,14 @@ */ emit_bti(A64_BTI_JC, ctx); - /* frame for parent function */ - emit(A64_PUSH(A64_FP, A64_R(9), A64_SP), ctx); - emit(A64_MOV(1, A64_FP, A64_SP), ctx); + /* x9 is not set for struct_ops */ + if (!is_struct_ops) { + /* frame for parent function */ + emit(A64_PUSH(A64_FP, A64_R(9), A64_SP), ctx); + emit(A64_MOV(1, A64_FP, A64_SP), ctx); + } - /* frame for patched function */ + /* frame for patched function for tracing, or caller for struct_ops */ emit(A64_PUSH(A64_FP, A64_LR, A64_SP), ctx); emit(A64_MOV(1, A64_FP, A64_SP), ctx); @@ -1942,7 +1978,11 @@ emit(A64_STR64I(A64_R(20), A64_SP, regs_off + 8), ctx); if (flags & BPF_TRAMP_F_CALL_ORIG) { - emit_addr_mov_i64(A64_R(0), (const u64)im, ctx); + /* for the first pass, assume the worst case */ + if (!ctx->image) + ctx->idx += 4; + else + emit_a64_mov_i64(A64_R(0), (const u64)im, ctx); emit_call((const u64)__bpf_tramp_enter, ctx); } @@ -1986,7 +2026,11 @@ if (flags & BPF_TRAMP_F_CALL_ORIG) { im->ip_epilogue = ctx->image + ctx->idx; - emit_addr_mov_i64(A64_R(0), (const u64)im, ctx); + /* for the first pass, assume the worst case */ + if (!ctx->image) + ctx->idx += 4; + else + emit_a64_mov_i64(A64_R(0), (const u64)im, ctx); emit_call((const u64)__bpf_tramp_exit, ctx); } @@ -2003,19 +2047,24 @@ /* reset SP */ emit(A64_MOV(1, A64_SP, A64_FP), ctx); - /* pop frames */ - emit(A64_POP(A64_FP, A64_LR, A64_SP), ctx); - emit(A64_POP(A64_FP, A64_R(9), A64_SP), ctx); - - if (flags & BPF_TRAMP_F_SKIP_FRAME) { - /* skip patched function, return to parent */ - emit(A64_MOV(1, A64_LR, A64_R(9)), ctx); - emit(A64_RET(A64_R(9)), ctx); + if (is_struct_ops) { + emit(A64_POP(A64_FP, A64_LR, A64_SP), ctx); + emit(A64_RET(A64_LR), ctx); } else { - /* return to patched function */ - emit(A64_MOV(1, A64_R(10), A64_LR), ctx); - emit(A64_MOV(1, A64_LR, A64_R(9)), ctx); - emit(A64_RET(A64_R(10)), ctx); + /* pop frames */ + emit(A64_POP(A64_FP, A64_LR, A64_SP), ctx); + emit(A64_POP(A64_FP, A64_R(9), A64_SP), ctx); + + if (flags & BPF_TRAMP_F_SKIP_FRAME) { + /* skip patched function, return to parent */ + emit(A64_MOV(1, A64_LR, A64_R(9)), ctx); + emit(A64_RET(A64_R(9)), ctx); + } else { + /* return to patched function */ + emit(A64_MOV(1, A64_R(10), A64_LR), ctx); + emit(A64_MOV(1, A64_LR, A64_R(9)), ctx); + emit(A64_RET(A64_R(10)), ctx); + } } if (ctx->image) --- linux-xilinx-6.8.0.orig/arch/arm64/tools/cpucaps +++ linux-xilinx-6.8.0/arch/arm64/tools/cpucaps @@ -99,4 +99,5 @@ WORKAROUND_QCOM_FALKOR_E1003 WORKAROUND_REPEAT_TLBI WORKAROUND_SPECULATIVE_AT +WORKAROUND_SPECULATIVE_SSBS WORKAROUND_SPECULATIVE_UNPRIV_LOAD --- linux-xilinx-6.8.0.orig/arch/csky/include/uapi/asm/unistd.h +++ linux-xilinx-6.8.0/arch/csky/include/uapi/asm/unistd.h @@ -6,6 +6,7 @@ #define __ARCH_WANT_SYS_CLONE3 #define __ARCH_WANT_SET_GET_RLIMIT #define __ARCH_WANT_TIME32_SYSCALLS +#define __ARCH_WANT_SYNC_FILE_RANGE2 #include #define __NR_set_thread_area (__NR_arch_specific_syscall + 0) --- linux-xilinx-6.8.0.orig/arch/csky/kernel/probes/ftrace.c +++ linux-xilinx-6.8.0/arch/csky/kernel/probes/ftrace.c @@ -12,6 +12,9 @@ struct kprobe_ctlblk *kcb; struct pt_regs *regs; + if (unlikely(kprobe_ftrace_disabled)) + return; + bit = ftrace_test_recursion_trylock(ip, parent_ip); if (bit < 0) return; --- linux-xilinx-6.8.0.orig/arch/csky/kernel/setup.c +++ linux-xilinx-6.8.0/arch/csky/kernel/setup.c @@ -112,9 +112,9 @@ pre_trap_init(); if (dtb_start == NULL) - early_init_dt_scan(__dtb_start); + early_init_dt_scan(__dtb_start, __pa(dtb_start)); else - early_init_dt_scan(dtb_start); + early_init_dt_scan(dtb_start, __pa(dtb_start)); start_kernel(); --- linux-xilinx-6.8.0.orig/arch/hexagon/Makefile +++ linux-xilinx-6.8.0/arch/hexagon/Makefile @@ -32,3 +32,9 @@ TIR_NAME := r19 KBUILD_CFLAGS += -ffixed-$(TIR_NAME) -DTHREADINFO_REG=$(TIR_NAME) -D__linux__ KBUILD_AFLAGS += -DTHREADINFO_REG=$(TIR_NAME) + +# Disable HexagonConstExtenders pass for LLVM versions prior to 19.1.0 +# https://github.com/llvm/llvm-project/issues/99714 +ifneq ($(call clang-min-version, 190100),y) +KBUILD_CFLAGS += -mllvm -hexagon-cext=false +endif --- linux-xilinx-6.8.0.orig/arch/hexagon/include/asm/cmpxchg.h +++ linux-xilinx-6.8.0/arch/hexagon/include/asm/cmpxchg.h @@ -56,7 +56,7 @@ __typeof__(ptr) __ptr = (ptr); \ __typeof__(*(ptr)) __old = (old); \ __typeof__(*(ptr)) __new = (new); \ - __typeof__(*(ptr)) __oldval = 0; \ + __typeof__(*(ptr)) __oldval = (__typeof__(*(ptr))) 0; \ \ asm volatile( \ "1: %0 = memw_locked(%1);\n" \ --- linux-xilinx-6.8.0.orig/arch/hexagon/include/asm/syscalls.h +++ linux-xilinx-6.8.0/arch/hexagon/include/asm/syscalls.h @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#include + +asmlinkage long sys_hexagon_fadvise64_64(int fd, int advice, + u32 a2, u32 a3, u32 a4, u32 a5); --- linux-xilinx-6.8.0.orig/arch/hexagon/include/uapi/asm/unistd.h +++ linux-xilinx-6.8.0/arch/hexagon/include/uapi/asm/unistd.h @@ -36,5 +36,6 @@ #define __ARCH_WANT_SYS_VFORK #define __ARCH_WANT_SYS_FORK #define __ARCH_WANT_TIME32_SYSCALLS +#define __ARCH_WANT_SYNC_FILE_RANGE2 #include --- linux-xilinx-6.8.0.orig/arch/hexagon/kernel/syscalltab.c +++ linux-xilinx-6.8.0/arch/hexagon/kernel/syscalltab.c @@ -14,6 +14,13 @@ #undef __SYSCALL #define __SYSCALL(nr, call) [nr] = (call), +SYSCALL_DEFINE6(hexagon_fadvise64_64, int, fd, int, advice, + SC_ARG64(offset), SC_ARG64(len)) +{ + return ksys_fadvise64_64(fd, SC_VAL64(loff_t, offset), SC_VAL64(loff_t, len), advice); +} +#define sys_fadvise64_64 sys_hexagon_fadvise64_64 + void *sys_call_table[__NR_syscalls] = { #include }; --- linux-xilinx-6.8.0.orig/arch/hexagon/kernel/traps.c +++ linux-xilinx-6.8.0/arch/hexagon/kernel/traps.c @@ -195,8 +195,10 @@ printk(KERN_EMERG "Oops: %s[#%d]:\n", str, ++die.counter); if (notify_die(DIE_OOPS, str, regs, err, pt_cause(regs), SIGSEGV) == - NOTIFY_STOP) + NOTIFY_STOP) { + spin_unlock_irq(&die.lock); return 1; + } print_modules(); show_regs(regs); --- linux-xilinx-6.8.0.orig/arch/hexagon/kernel/vmlinux.lds.S +++ linux-xilinx-6.8.0/arch/hexagon/kernel/vmlinux.lds.S @@ -63,6 +63,7 @@ STABS_DEBUG DWARF_DEBUG ELF_DETAILS + .hexagon.attributes 0 : { *(.hexagon.attributes) } DISCARDS } --- linux-xilinx-6.8.0.orig/arch/loongarch/boot/dts/loongson-2k0500-ref.dts +++ linux-xilinx-6.8.0/arch/loongarch/boot/dts/loongson-2k0500-ref.dts @@ -44,14 +44,14 @@ &gmac0 { status = "okay"; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; bus_id = <0x0>; }; &gmac1 { status = "okay"; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; bus_id = <0x1>; }; --- linux-xilinx-6.8.0.orig/arch/loongarch/boot/dts/loongson-2k1000-ref.dts +++ linux-xilinx-6.8.0/arch/loongarch/boot/dts/loongson-2k1000-ref.dts @@ -43,7 +43,7 @@ &gmac0 { status = "okay"; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; phy-handle = <&phy0>; mdio { compatible = "snps,dwmac-mdio"; @@ -58,7 +58,7 @@ &gmac1 { status = "okay"; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; phy-handle = <&phy1>; mdio { compatible = "snps,dwmac-mdio"; --- linux-xilinx-6.8.0.orig/arch/loongarch/configs/loongson3_defconfig +++ linux-xilinx-6.8.0/arch/loongarch/configs/loongson3_defconfig @@ -93,7 +93,6 @@ CONFIG_ZSWAP=y CONFIG_ZSWAP_COMPRESSOR_DEFAULT_ZSTD=y CONFIG_ZBUD=y -CONFIG_Z3FOLD=y CONFIG_ZSMALLOC=m # CONFIG_COMPAT_BRK is not set CONFIG_MEMORY_HOTPLUG=y --- linux-xilinx-6.8.0.orig/arch/loongarch/crypto/crc32-loongarch.c +++ linux-xilinx-6.8.0/arch/loongarch/crypto/crc32-loongarch.c @@ -44,7 +44,6 @@ CRC32(crc, value, w); p += sizeof(u32); - len -= sizeof(u32); } if (len & sizeof(u16)) { @@ -80,7 +79,6 @@ CRC32C(crc, value, w); p += sizeof(u32); - len -= sizeof(u32); } if (len & sizeof(u16)) { --- linux-xilinx-6.8.0.orig/arch/loongarch/include/asm/Kbuild +++ linux-xilinx-6.8.0/arch/loongarch/include/asm/Kbuild @@ -4,6 +4,7 @@ generic-y += parport.h generic-y += early_ioremap.h generic-y += qrwlock.h +generic-y += qspinlock.h generic-y += rwsem.h generic-y += segment.h generic-y += user.h --- linux-xilinx-6.8.0.orig/arch/loongarch/include/asm/bootinfo.h +++ linux-xilinx-6.8.0/arch/loongarch/include/asm/bootinfo.h @@ -26,6 +26,10 @@ #define NR_WORDS DIV_ROUND_UP(NR_CPUS, BITS_PER_LONG) +/* + * The "core" of cores_per_node and cores_per_package stands for a + * logical core, which means in a SMT system it stands for a thread. + */ struct loongson_system_configuration { int nr_cpus; int nr_nodes; --- linux-xilinx-6.8.0.orig/arch/loongarch/include/asm/hugetlb.h +++ linux-xilinx-6.8.0/arch/loongarch/include/asm/hugetlb.h @@ -29,12 +29,22 @@ return 0; } +#define __HAVE_ARCH_HUGE_PTE_CLEAR +static inline void huge_pte_clear(struct mm_struct *mm, unsigned long addr, + pte_t *ptep, unsigned long sz) +{ + pte_t clear; + + pte_val(clear) = (unsigned long)invalid_pte_table; + set_pte_at(mm, addr, ptep, clear); +} + #define __HAVE_ARCH_HUGE_PTEP_GET_AND_CLEAR static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) { pte_t clear; - pte_t pte = *ptep; + pte_t pte = ptep_get(ptep); pte_val(clear) = (unsigned long)invalid_pte_table; set_pte_at(mm, addr, ptep, clear); @@ -65,7 +75,7 @@ pte_t *ptep, pte_t pte, int dirty) { - int changed = !pte_same(*ptep, pte); + int changed = !pte_same(ptep_get(ptep), pte); if (changed) { set_pte_at(vma->vm_mm, addr, ptep, pte); --- linux-xilinx-6.8.0.orig/arch/loongarch/include/asm/hw_breakpoint.h +++ linux-xilinx-6.8.0/arch/loongarch/include/asm/hw_breakpoint.h @@ -38,8 +38,8 @@ * Limits. * Changing these will require modifications to the register accessors. */ -#define LOONGARCH_MAX_BRP 8 -#define LOONGARCH_MAX_WRP 8 +#define LOONGARCH_MAX_BRP 14 +#define LOONGARCH_MAX_WRP 14 /* Virtual debug register bases. */ #define CSR_CFG_ADDR 0 @@ -75,6 +75,8 @@ #define CSR_MWPC_NUM 0x3f #define CTRL_PLV_ENABLE 0x1e +#define CTRL_PLV0_ENABLE 0x02 +#define CTRL_PLV3_ENABLE 0x10 #define MWPnCFG3_LoadEn 8 #define MWPnCFG3_StoreEn 9 @@ -101,7 +103,7 @@ struct perf_event_attr; extern int arch_bp_generic_fields(struct arch_hw_breakpoint_ctrl ctrl, - int *gen_len, int *gen_type, int *offset); + int *gen_len, int *gen_type); extern int arch_check_bp_in_kernelspace(struct arch_hw_breakpoint *hw); extern int hw_breakpoint_arch_parse(struct perf_event *bp, const struct perf_event_attr *attr, --- linux-xilinx-6.8.0.orig/arch/loongarch/include/asm/hw_irq.h +++ linux-xilinx-6.8.0/arch/loongarch/include/asm/hw_irq.h @@ -9,6 +9,8 @@ extern atomic_t irq_err_count; +#define ARCH_IRQ_INIT_FLAGS IRQ_NOPROBE + /* * interrupt-retrigger: NOP for now. This may not be appropriate for all * machines, we'll see ... --- linux-xilinx-6.8.0.orig/arch/loongarch/include/asm/inst.h +++ linux-xilinx-6.8.0/arch/loongarch/include/asm/inst.h @@ -678,7 +678,17 @@ DEF_EMIT_REG2I16_FORMAT(bge, bge_op) DEF_EMIT_REG2I16_FORMAT(bltu, bltu_op) DEF_EMIT_REG2I16_FORMAT(bgeu, bgeu_op) -DEF_EMIT_REG2I16_FORMAT(jirl, jirl_op) + +static inline void emit_jirl(union loongarch_instruction *insn, + enum loongarch_gpr rd, + enum loongarch_gpr rj, + int offset) +{ + insn->reg2i16_format.opcode = jirl_op; + insn->reg2i16_format.immediate = offset; + insn->reg2i16_format.rd = rd; + insn->reg2i16_format.rj = rj; +} #define DEF_EMIT_REG2BSTRD_FORMAT(NAME, OP) \ static inline void emit_##NAME(union loongarch_instruction *insn, \ --- linux-xilinx-6.8.0.orig/arch/loongarch/include/asm/io.h +++ linux-xilinx-6.8.0/arch/loongarch/include/asm/io.h @@ -71,6 +71,8 @@ #define memcpy_fromio(a, c, l) __memcpy_fromio((a), (c), (l)) #define memcpy_toio(c, a, l) __memcpy_toio((c), (a), (l)) +#define __io_aw() mmiowb() + #include #define ARCH_HAS_VALID_PHYS_ADDR_RANGE --- linux-xilinx-6.8.0.orig/arch/loongarch/include/asm/kasan.h +++ linux-xilinx-6.8.0/arch/loongarch/include/asm/kasan.h @@ -16,7 +16,7 @@ #define XRANGE_SHIFT (48) /* Valid address length */ -#define XRANGE_SHADOW_SHIFT (PGDIR_SHIFT + PAGE_SHIFT - 3) +#define XRANGE_SHADOW_SHIFT min(cpu_vabits, VA_BITS) /* Used for taking out the valid address */ #define XRANGE_SHADOW_MASK GENMASK_ULL(XRANGE_SHADOW_SHIFT - 1, 0) /* One segment whole address space size */ @@ -25,6 +25,7 @@ /* 64-bit segment value. */ #define XKPRANGE_UC_SEG (0x8000) #define XKPRANGE_CC_SEG (0x9000) +#define XKPRANGE_WC_SEG (0xa000) #define XKVRANGE_VC_SEG (0xffff) /* Cached */ @@ -41,20 +42,28 @@ #define XKPRANGE_UC_SHADOW_SIZE (XKPRANGE_UC_SIZE >> KASAN_SHADOW_SCALE_SHIFT) #define XKPRANGE_UC_SHADOW_END (XKPRANGE_UC_KASAN_OFFSET + XKPRANGE_UC_SHADOW_SIZE) +/* WriteCombine */ +#define XKPRANGE_WC_START WRITECOMBINE_BASE +#define XKPRANGE_WC_SIZE XRANGE_SIZE +#define XKPRANGE_WC_KASAN_OFFSET XKPRANGE_UC_SHADOW_END +#define XKPRANGE_WC_SHADOW_SIZE (XKPRANGE_WC_SIZE >> KASAN_SHADOW_SCALE_SHIFT) +#define XKPRANGE_WC_SHADOW_END (XKPRANGE_WC_KASAN_OFFSET + XKPRANGE_WC_SHADOW_SIZE) + /* VMALLOC (Cached or UnCached) */ #define XKVRANGE_VC_START MODULES_VADDR #define XKVRANGE_VC_SIZE round_up(KFENCE_AREA_END - MODULES_VADDR + 1, PGDIR_SIZE) -#define XKVRANGE_VC_KASAN_OFFSET XKPRANGE_UC_SHADOW_END +#define XKVRANGE_VC_KASAN_OFFSET XKPRANGE_WC_SHADOW_END #define XKVRANGE_VC_SHADOW_SIZE (XKVRANGE_VC_SIZE >> KASAN_SHADOW_SCALE_SHIFT) #define XKVRANGE_VC_SHADOW_END (XKVRANGE_VC_KASAN_OFFSET + XKVRANGE_VC_SHADOW_SIZE) /* KAsan shadow memory start right after vmalloc. */ #define KASAN_SHADOW_START round_up(KFENCE_AREA_END, PGDIR_SIZE) #define KASAN_SHADOW_SIZE (XKVRANGE_VC_SHADOW_END - XKPRANGE_CC_KASAN_OFFSET) -#define KASAN_SHADOW_END round_up(KASAN_SHADOW_START + KASAN_SHADOW_SIZE, PGDIR_SIZE) +#define KASAN_SHADOW_END (round_up(KASAN_SHADOW_START + KASAN_SHADOW_SIZE, PGDIR_SIZE) - 1) #define XKPRANGE_CC_SHADOW_OFFSET (KASAN_SHADOW_START + XKPRANGE_CC_KASAN_OFFSET) #define XKPRANGE_UC_SHADOW_OFFSET (KASAN_SHADOW_START + XKPRANGE_UC_KASAN_OFFSET) +#define XKPRANGE_WC_SHADOW_OFFSET (KASAN_SHADOW_START + XKPRANGE_WC_KASAN_OFFSET) #define XKVRANGE_VC_SHADOW_OFFSET (KASAN_SHADOW_START + XKVRANGE_VC_KASAN_OFFSET) extern bool kasan_early_stage; --- linux-xilinx-6.8.0.orig/arch/loongarch/include/asm/kfence.h +++ linux-xilinx-6.8.0/arch/loongarch/include/asm/kfence.h @@ -43,13 +43,13 @@ { pte_t *pte = virt_to_kpte(addr); - if (WARN_ON(!pte) || pte_none(*pte)) + if (WARN_ON(!pte) || pte_none(ptep_get(pte))) return false; if (protect) - set_pte(pte, __pte(pte_val(*pte) & ~(_PAGE_VALID | _PAGE_PRESENT))); + set_pte(pte, __pte(pte_val(ptep_get(pte)) & ~(_PAGE_VALID | _PAGE_PRESENT))); else - set_pte(pte, __pte(pte_val(*pte) | (_PAGE_VALID | _PAGE_PRESENT))); + set_pte(pte, __pte(pte_val(ptep_get(pte)) | (_PAGE_VALID | _PAGE_PRESENT))); preempt_disable(); local_flush_tlb_one(addr); --- linux-xilinx-6.8.0.orig/arch/loongarch/include/asm/loongarch.h +++ linux-xilinx-6.8.0/arch/loongarch/include/asm/loongarch.h @@ -243,7 +243,7 @@ #define CSR_ESTAT_IS_WIDTH 14 #define CSR_ESTAT_IS (_ULCAST_(0x3fff) << CSR_ESTAT_IS_SHIFT) -#define LOONGARCH_CSR_ERA 0x6 /* ERA */ +#define LOONGARCH_CSR_ERA 0x6 /* Exception return address */ #define LOONGARCH_CSR_BADV 0x7 /* Bad virtual address */ @@ -937,6 +937,36 @@ #define LOONGARCH_CSR_DB7CTRL 0x34a /* data breakpoint 7 control */ #define LOONGARCH_CSR_DB7ASID 0x34b /* data breakpoint 7 asid */ +#define LOONGARCH_CSR_DB8ADDR 0x350 /* data breakpoint 8 address */ +#define LOONGARCH_CSR_DB8MASK 0x351 /* data breakpoint 8 mask */ +#define LOONGARCH_CSR_DB8CTRL 0x352 /* data breakpoint 8 control */ +#define LOONGARCH_CSR_DB8ASID 0x353 /* data breakpoint 8 asid */ + +#define LOONGARCH_CSR_DB9ADDR 0x358 /* data breakpoint 9 address */ +#define LOONGARCH_CSR_DB9MASK 0x359 /* data breakpoint 9 mask */ +#define LOONGARCH_CSR_DB9CTRL 0x35a /* data breakpoint 9 control */ +#define LOONGARCH_CSR_DB9ASID 0x35b /* data breakpoint 9 asid */ + +#define LOONGARCH_CSR_DB10ADDR 0x360 /* data breakpoint 10 address */ +#define LOONGARCH_CSR_DB10MASK 0x361 /* data breakpoint 10 mask */ +#define LOONGARCH_CSR_DB10CTRL 0x362 /* data breakpoint 10 control */ +#define LOONGARCH_CSR_DB10ASID 0x363 /* data breakpoint 10 asid */ + +#define LOONGARCH_CSR_DB11ADDR 0x368 /* data breakpoint 11 address */ +#define LOONGARCH_CSR_DB11MASK 0x369 /* data breakpoint 11 mask */ +#define LOONGARCH_CSR_DB11CTRL 0x36a /* data breakpoint 11 control */ +#define LOONGARCH_CSR_DB11ASID 0x36b /* data breakpoint 11 asid */ + +#define LOONGARCH_CSR_DB12ADDR 0x370 /* data breakpoint 12 address */ +#define LOONGARCH_CSR_DB12MASK 0x371 /* data breakpoint 12 mask */ +#define LOONGARCH_CSR_DB12CTRL 0x372 /* data breakpoint 12 control */ +#define LOONGARCH_CSR_DB12ASID 0x373 /* data breakpoint 12 asid */ + +#define LOONGARCH_CSR_DB13ADDR 0x378 /* data breakpoint 13 address */ +#define LOONGARCH_CSR_DB13MASK 0x379 /* data breakpoint 13 mask */ +#define LOONGARCH_CSR_DB13CTRL 0x37a /* data breakpoint 13 control */ +#define LOONGARCH_CSR_DB13ASID 0x37b /* data breakpoint 13 asid */ + #define LOONGARCH_CSR_FWPC 0x380 /* instruction breakpoint config */ #define LOONGARCH_CSR_FWPS 0x381 /* instruction breakpoint status */ @@ -980,6 +1010,36 @@ #define LOONGARCH_CSR_IB7CTRL 0x3ca /* inst breakpoint 7 control */ #define LOONGARCH_CSR_IB7ASID 0x3cb /* inst breakpoint 7 asid */ +#define LOONGARCH_CSR_IB8ADDR 0x3d0 /* inst breakpoint 8 address */ +#define LOONGARCH_CSR_IB8MASK 0x3d1 /* inst breakpoint 8 mask */ +#define LOONGARCH_CSR_IB8CTRL 0x3d2 /* inst breakpoint 8 control */ +#define LOONGARCH_CSR_IB8ASID 0x3d3 /* inst breakpoint 8 asid */ + +#define LOONGARCH_CSR_IB9ADDR 0x3d8 /* inst breakpoint 9 address */ +#define LOONGARCH_CSR_IB9MASK 0x3d9 /* inst breakpoint 9 mask */ +#define LOONGARCH_CSR_IB9CTRL 0x3da /* inst breakpoint 9 control */ +#define LOONGARCH_CSR_IB9ASID 0x3db /* inst breakpoint 9 asid */ + +#define LOONGARCH_CSR_IB10ADDR 0x3e0 /* inst breakpoint 10 address */ +#define LOONGARCH_CSR_IB10MASK 0x3e1 /* inst breakpoint 10 mask */ +#define LOONGARCH_CSR_IB10CTRL 0x3e2 /* inst breakpoint 10 control */ +#define LOONGARCH_CSR_IB10ASID 0x3e3 /* inst breakpoint 10 asid */ + +#define LOONGARCH_CSR_IB11ADDR 0x3e8 /* inst breakpoint 11 address */ +#define LOONGARCH_CSR_IB11MASK 0x3e9 /* inst breakpoint 11 mask */ +#define LOONGARCH_CSR_IB11CTRL 0x3ea /* inst breakpoint 11 control */ +#define LOONGARCH_CSR_IB11ASID 0x3eb /* inst breakpoint 11 asid */ + +#define LOONGARCH_CSR_IB12ADDR 0x3f0 /* inst breakpoint 12 address */ +#define LOONGARCH_CSR_IB12MASK 0x3f1 /* inst breakpoint 12 mask */ +#define LOONGARCH_CSR_IB12CTRL 0x3f2 /* inst breakpoint 12 control */ +#define LOONGARCH_CSR_IB12ASID 0x3f3 /* inst breakpoint 12 asid */ + +#define LOONGARCH_CSR_IB13ADDR 0x3f8 /* inst breakpoint 13 address */ +#define LOONGARCH_CSR_IB13MASK 0x3f9 /* inst breakpoint 13 mask */ +#define LOONGARCH_CSR_IB13CTRL 0x3fa /* inst breakpoint 13 control */ +#define LOONGARCH_CSR_IB13ASID 0x3fb /* inst breakpoint 13 asid */ + #define LOONGARCH_CSR_DEBUG 0x500 /* debug config */ #define LOONGARCH_CSR_DERA 0x501 /* debug era */ #define LOONGARCH_CSR_DESAVE 0x502 /* debug save */ --- linux-xilinx-6.8.0.orig/arch/loongarch/include/asm/numa.h +++ linux-xilinx-6.8.0/arch/loongarch/include/asm/numa.h @@ -56,6 +56,7 @@ static inline void early_numa_add_cpu(int cpuid, s16 node) { } static inline void numa_add_cpu(unsigned int cpu) { } static inline void numa_remove_cpu(unsigned int cpu) { } +static inline void set_cpuid_to_node(int cpuid, s16 node) { } static inline int early_cpu_to_node(int cpu) { --- linux-xilinx-6.8.0.orig/arch/loongarch/include/asm/page.h +++ linux-xilinx-6.8.0/arch/loongarch/include/asm/page.h @@ -94,10 +94,7 @@ extern int __virt_addr_valid(volatile void *kaddr); #define virt_addr_valid(kaddr) __virt_addr_valid((volatile void *)(kaddr)) -#define VM_DATA_DEFAULT_FLAGS \ - (VM_READ | VM_WRITE | \ - ((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0) | \ - VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) +#define VM_DATA_DEFAULT_FLAGS VM_DATA_FLAGS_TSK_EXEC #include #include --- linux-xilinx-6.8.0.orig/arch/loongarch/include/asm/percpu.h +++ linux-xilinx-6.8.0/arch/loongarch/include/asm/percpu.h @@ -29,7 +29,12 @@ __my_cpu_offset = off; csr_write64(off, PERCPU_BASE_KS); } -#define __my_cpu_offset __my_cpu_offset + +#define __my_cpu_offset \ +({ \ + __asm__ __volatile__("":"+r"(__my_cpu_offset)); \ + __my_cpu_offset; \ +}) #define PERCPU_OP(op, asm_op, c_op) \ static __always_inline unsigned long __percpu_##op(void *ptr, \ --- linux-xilinx-6.8.0.orig/arch/loongarch/include/asm/perf_event.h +++ linux-xilinx-6.8.0/arch/loongarch/include/asm/perf_event.h @@ -7,6 +7,13 @@ #ifndef __LOONGARCH_PERF_EVENT_H__ #define __LOONGARCH_PERF_EVENT_H__ +#include + #define perf_arch_bpf_user_pt_regs(regs) (struct user_pt_regs *)regs +#define perf_arch_fetch_caller_regs(regs, __ip) { \ + (regs)->csr_era = (__ip); \ + (regs)->regs[3] = (unsigned long) __builtin_frame_address(0); \ +} + #endif /* __LOONGARCH_PERF_EVENT_H__ */ --- linux-xilinx-6.8.0.orig/arch/loongarch/include/asm/pgtable.h +++ linux-xilinx-6.8.0/arch/loongarch/include/asm/pgtable.h @@ -106,6 +106,9 @@ #define KFENCE_AREA_START (VMEMMAP_END + 1) #define KFENCE_AREA_END (KFENCE_AREA_START + KFENCE_AREA_SIZE - 1) +#define ptep_get(ptep) READ_ONCE(*(ptep)) +#define pmdp_get(pmdp) READ_ONCE(*(pmdp)) + #define pte_ERROR(e) \ pr_err("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e)) #ifndef __PAGETABLE_PMD_FOLDED @@ -147,11 +150,6 @@ return p4d_val(p4d) != (unsigned long)invalid_pud_table; } -static inline void p4d_clear(p4d_t *p4dp) -{ - p4d_val(*p4dp) = (unsigned long)invalid_pud_table; -} - static inline pud_t *p4d_pgtable(p4d_t p4d) { return (pud_t *)p4d_val(p4d); @@ -159,7 +157,12 @@ static inline void set_p4d(p4d_t *p4d, p4d_t p4dval) { - *p4d = p4dval; + WRITE_ONCE(*p4d, p4dval); +} + +static inline void p4d_clear(p4d_t *p4dp) +{ + set_p4d(p4dp, __p4d((unsigned long)invalid_pud_table)); } #define p4d_phys(p4d) PHYSADDR(p4d_val(p4d)) @@ -193,17 +196,20 @@ return pud_val(pud) != (unsigned long)invalid_pmd_table; } -static inline void pud_clear(pud_t *pudp) +static inline pmd_t *pud_pgtable(pud_t pud) { - pud_val(*pudp) = ((unsigned long)invalid_pmd_table); + return (pmd_t *)pud_val(pud); } -static inline pmd_t *pud_pgtable(pud_t pud) +static inline void set_pud(pud_t *pud, pud_t pudval) { - return (pmd_t *)pud_val(pud); + WRITE_ONCE(*pud, pudval); } -#define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while (0) +static inline void pud_clear(pud_t *pudp) +{ + set_pud(pudp, __pud((unsigned long)invalid_pmd_table)); +} #define pud_phys(pud) PHYSADDR(pud_val(pud)) #define pud_page(pud) (pfn_to_page(pud_phys(pud) >> PAGE_SHIFT)) @@ -231,12 +237,15 @@ return pmd_val(pmd) != (unsigned long)invalid_pte_table; } -static inline void pmd_clear(pmd_t *pmdp) +static inline void set_pmd(pmd_t *pmd, pmd_t pmdval) { - pmd_val(*pmdp) = ((unsigned long)invalid_pte_table); + WRITE_ONCE(*pmd, pmdval); } -#define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while (0) +static inline void pmd_clear(pmd_t *pmdp) +{ + set_pmd(pmdp, __pmd((unsigned long)invalid_pte_table)); +} #define pmd_phys(pmd) PHYSADDR(pmd_val(pmd)) @@ -314,7 +323,8 @@ static inline void set_pte(pte_t *ptep, pte_t pteval) { - *ptep = pteval; + WRITE_ONCE(*ptep, pteval); + if (pte_val(pteval) & _PAGE_GLOBAL) { pte_t *buddy = ptep_buddy(ptep); /* @@ -341,8 +351,8 @@ : [buddy] "+m" (buddy->pte), [tmp] "=&r" (tmp) : [global] "r" (page_global)); #else /* !CONFIG_SMP */ - if (pte_none(*buddy)) - pte_val(*buddy) = pte_val(*buddy) | _PAGE_GLOBAL; + if (pte_none(ptep_get(buddy))) + WRITE_ONCE(*buddy, __pte(pte_val(ptep_get(buddy)) | _PAGE_GLOBAL)); #endif /* CONFIG_SMP */ } } @@ -350,7 +360,7 @@ static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) { /* Preserve global status for the pair */ - if (pte_val(*ptep_buddy(ptep)) & _PAGE_GLOBAL) + if (pte_val(ptep_get(ptep_buddy(ptep))) & _PAGE_GLOBAL) set_pte(ptep, __pte(_PAGE_GLOBAL)); else set_pte(ptep, __pte(0)); @@ -592,7 +602,7 @@ static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long address, pmd_t *pmdp) { - pmd_t old = *pmdp; + pmd_t old = pmdp_get(pmdp); pmd_clear(pmdp); --- linux-xilinx-6.8.0.orig/arch/loongarch/include/asm/stackframe.h +++ linux-xilinx-6.8.0/arch/loongarch/include/asm/stackframe.h @@ -41,7 +41,7 @@ .macro JUMP_VIRT_ADDR temp1 temp2 li.d \temp1, CACHE_BASE pcaddi \temp2, 0 - or \temp1, \temp1, \temp2 + bstrins.d \temp1, \temp2, (DMW_PABITS - 1), 0 jirl zero, \temp1, 0xc .endm --- linux-xilinx-6.8.0.orig/arch/loongarch/include/uapi/asm/ptrace.h +++ linux-xilinx-6.8.0/arch/loongarch/include/uapi/asm/ptrace.h @@ -72,6 +72,16 @@ } dbg_regs[8]; }; +struct user_watch_state_v2 { + uint64_t dbg_info; + struct { + uint64_t addr; + uint64_t mask; + uint32_t ctrl; + uint32_t pad; + } dbg_regs[14]; +}; + #define PTRACE_SYSEMU 0x1f #define PTRACE_SYSEMU_SINGLESTEP 0x20 --- linux-xilinx-6.8.0.orig/arch/loongarch/include/uapi/asm/unistd.h +++ linux-xilinx-6.8.0/arch/loongarch/include/uapi/asm/unistd.h @@ -1,4 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +#define __ARCH_WANT_NEW_STAT #define __ARCH_WANT_SYS_CLONE #define __ARCH_WANT_SYS_CLONE3 --- linux-xilinx-6.8.0.orig/arch/loongarch/kernel/efi.c +++ linux-xilinx-6.8.0/arch/loongarch/kernel/efi.c @@ -66,6 +66,12 @@ set_bit(EFI_RUNTIME_SERVICES, &efi.flags); } +bool efi_poweroff_required(void) +{ + return efi_enabled(EFI_RUNTIME_SERVICES) && + (acpi_gbl_reduced_hardware || acpi_no_s5); +} + unsigned long __initdata screen_info_table = EFI_INVALID_TABLE_ADDR; #if defined(CONFIG_SYSFB) || defined(CONFIG_EFI_EARLYCON) @@ -89,7 +95,7 @@ memset(si, 0, sizeof(*si)); early_memunmap(si, sizeof(*si)); - memblock_reserve(screen_info.lfb_base, screen_info.lfb_size); + memblock_reserve(__screen_info_lfb_base(&screen_info), screen_info.lfb_size); } void __init efi_init(void) --- linux-xilinx-6.8.0.orig/arch/loongarch/kernel/ftrace_dyn.c +++ linux-xilinx-6.8.0/arch/loongarch/kernel/ftrace_dyn.c @@ -287,6 +287,9 @@ struct kprobe *p; struct kprobe_ctlblk *kcb; + if (unlikely(kprobe_ftrace_disabled)) + return; + bit = ftrace_test_recursion_trylock(ip, parent_ip); if (bit < 0) return; --- linux-xilinx-6.8.0.orig/arch/loongarch/kernel/genex.S +++ linux-xilinx-6.8.0/arch/loongarch/kernel/genex.S @@ -18,27 +18,29 @@ .align 5 SYM_FUNC_START(__arch_cpu_idle) - /* start of rollback region */ - LONG_L t0, tp, TI_FLAGS - nop - andi t0, t0, _TIF_NEED_RESCHED - bnez t0, 1f - nop - nop - nop + /* start of idle interrupt region */ + ori t0, zero, CSR_CRMD_IE + /* idle instruction needs irq enabled */ + csrxchg t0, t0, LOONGARCH_CSR_CRMD + /* + * If an interrupt lands here; between enabling interrupts above and + * going idle on the next instruction, we must *NOT* go idle since the + * interrupt could have set TIF_NEED_RESCHED or caused an timer to need + * reprogramming. Fall through -- see handle_vint() below -- and have + * the idle loop take care of things. + */ idle 0 - /* end of rollback region */ + /* end of idle interrupt region */ 1: jr ra SYM_FUNC_END(__arch_cpu_idle) SYM_CODE_START(handle_vint) BACKUP_T0T1 SAVE_ALL - la_abs t1, __arch_cpu_idle + la_abs t1, 1b LONG_L t0, sp, PT_ERA - /* 32 byte rollback region */ - ori t0, t0, 0x1f - xori t0, t0, 0x1f + /* 3 instructions idle interrupt region */ + ori t0, t0, 0b1100 bne t0, t1, 1f LONG_S t0, sp, PT_ERA 1: move a0, sp --- linux-xilinx-6.8.0.orig/arch/loongarch/kernel/head.S +++ linux-xilinx-6.8.0/arch/loongarch/kernel/head.S @@ -22,7 +22,7 @@ _head: .word MZ_MAGIC /* "MZ", MS-DOS header */ .org 0x8 - .dword kernel_entry /* Kernel entry point */ + .dword _kernel_entry /* Kernel entry point (physical address) */ .dword _kernel_asize /* Kernel image effective size */ .quad PHYS_LINK_KADDR /* Kernel image load offset from start of RAM */ .org 0x38 /* 0x20 ~ 0x37 reserved */ --- linux-xilinx-6.8.0.orig/arch/loongarch/kernel/hw_breakpoint.c +++ linux-xilinx-6.8.0/arch/loongarch/kernel/hw_breakpoint.c @@ -51,7 +51,13 @@ READ_WB_REG_CASE(OFF, 4, REG, T, VAL); \ READ_WB_REG_CASE(OFF, 5, REG, T, VAL); \ READ_WB_REG_CASE(OFF, 6, REG, T, VAL); \ - READ_WB_REG_CASE(OFF, 7, REG, T, VAL); + READ_WB_REG_CASE(OFF, 7, REG, T, VAL); \ + READ_WB_REG_CASE(OFF, 8, REG, T, VAL); \ + READ_WB_REG_CASE(OFF, 9, REG, T, VAL); \ + READ_WB_REG_CASE(OFF, 10, REG, T, VAL); \ + READ_WB_REG_CASE(OFF, 11, REG, T, VAL); \ + READ_WB_REG_CASE(OFF, 12, REG, T, VAL); \ + READ_WB_REG_CASE(OFF, 13, REG, T, VAL); #define GEN_WRITE_WB_REG_CASES(OFF, REG, T, VAL) \ WRITE_WB_REG_CASE(OFF, 0, REG, T, VAL); \ @@ -61,7 +67,13 @@ WRITE_WB_REG_CASE(OFF, 4, REG, T, VAL); \ WRITE_WB_REG_CASE(OFF, 5, REG, T, VAL); \ WRITE_WB_REG_CASE(OFF, 6, REG, T, VAL); \ - WRITE_WB_REG_CASE(OFF, 7, REG, T, VAL); + WRITE_WB_REG_CASE(OFF, 7, REG, T, VAL); \ + WRITE_WB_REG_CASE(OFF, 8, REG, T, VAL); \ + WRITE_WB_REG_CASE(OFF, 9, REG, T, VAL); \ + WRITE_WB_REG_CASE(OFF, 10, REG, T, VAL); \ + WRITE_WB_REG_CASE(OFF, 11, REG, T, VAL); \ + WRITE_WB_REG_CASE(OFF, 12, REG, T, VAL); \ + WRITE_WB_REG_CASE(OFF, 13, REG, T, VAL); static u64 read_wb_reg(int reg, int n, int t) { @@ -174,11 +186,21 @@ static int hw_breakpoint_control(struct perf_event *bp, enum hw_breakpoint_ops ops) { - u32 ctrl; + u32 ctrl, privilege; int i, max_slots, enable; + struct pt_regs *regs; struct perf_event **slots; struct arch_hw_breakpoint *info = counter_arch_bp(bp); + if (arch_check_bp_in_kernelspace(info)) + privilege = CTRL_PLV0_ENABLE; + else + privilege = CTRL_PLV3_ENABLE; + + /* Whether bp belongs to a task. */ + if (bp->hw.target) + regs = task_pt_regs(bp->hw.target); + if (info->ctrl.type == LOONGARCH_BREAKPOINT_EXECUTE) { /* Breakpoint */ slots = this_cpu_ptr(bp_on_reg); @@ -197,31 +219,38 @@ switch (ops) { case HW_BREAKPOINT_INSTALL: /* Set the FWPnCFG/MWPnCFG 1~4 register. */ - write_wb_reg(CSR_CFG_ADDR, i, 0, info->address); - write_wb_reg(CSR_CFG_ADDR, i, 1, info->address); - write_wb_reg(CSR_CFG_MASK, i, 0, info->mask); - write_wb_reg(CSR_CFG_MASK, i, 1, info->mask); - write_wb_reg(CSR_CFG_ASID, i, 0, 0); - write_wb_reg(CSR_CFG_ASID, i, 1, 0); if (info->ctrl.type == LOONGARCH_BREAKPOINT_EXECUTE) { - write_wb_reg(CSR_CFG_CTRL, i, 0, CTRL_PLV_ENABLE); + write_wb_reg(CSR_CFG_ADDR, i, 0, info->address); + write_wb_reg(CSR_CFG_MASK, i, 0, info->mask); + write_wb_reg(CSR_CFG_ASID, i, 0, 0); + write_wb_reg(CSR_CFG_CTRL, i, 0, privilege); } else { + write_wb_reg(CSR_CFG_ADDR, i, 1, info->address); + write_wb_reg(CSR_CFG_MASK, i, 1, info->mask); + write_wb_reg(CSR_CFG_ASID, i, 1, 0); ctrl = encode_ctrl_reg(info->ctrl); - write_wb_reg(CSR_CFG_CTRL, i, 1, ctrl | CTRL_PLV_ENABLE); + write_wb_reg(CSR_CFG_CTRL, i, 1, ctrl | privilege); } enable = csr_read64(LOONGARCH_CSR_CRMD); csr_write64(CSR_CRMD_WE | enable, LOONGARCH_CSR_CRMD); + if (bp->hw.target && test_tsk_thread_flag(bp->hw.target, TIF_LOAD_WATCH)) + regs->csr_prmd |= CSR_PRMD_PWE; break; case HW_BREAKPOINT_UNINSTALL: /* Reset the FWPnCFG/MWPnCFG 1~4 register. */ - write_wb_reg(CSR_CFG_ADDR, i, 0, 0); - write_wb_reg(CSR_CFG_ADDR, i, 1, 0); - write_wb_reg(CSR_CFG_MASK, i, 0, 0); - write_wb_reg(CSR_CFG_MASK, i, 1, 0); - write_wb_reg(CSR_CFG_CTRL, i, 0, 0); - write_wb_reg(CSR_CFG_CTRL, i, 1, 0); - write_wb_reg(CSR_CFG_ASID, i, 0, 0); - write_wb_reg(CSR_CFG_ASID, i, 1, 0); + if (info->ctrl.type == LOONGARCH_BREAKPOINT_EXECUTE) { + write_wb_reg(CSR_CFG_ADDR, i, 0, 0); + write_wb_reg(CSR_CFG_MASK, i, 0, 0); + write_wb_reg(CSR_CFG_CTRL, i, 0, 0); + write_wb_reg(CSR_CFG_ASID, i, 0, 0); + } else { + write_wb_reg(CSR_CFG_ADDR, i, 1, 0); + write_wb_reg(CSR_CFG_MASK, i, 1, 0); + write_wb_reg(CSR_CFG_CTRL, i, 1, 0); + write_wb_reg(CSR_CFG_ASID, i, 1, 0); + } + if (bp->hw.target) + regs->csr_prmd &= ~CSR_PRMD_PWE; break; } @@ -283,7 +312,7 @@ * to generic breakpoint descriptions. */ int arch_bp_generic_fields(struct arch_hw_breakpoint_ctrl ctrl, - int *gen_len, int *gen_type, int *offset) + int *gen_len, int *gen_type) { /* Type */ switch (ctrl.type) { @@ -303,11 +332,6 @@ return -EINVAL; } - if (!ctrl.len) - return -EINVAL; - - *offset = __ffs(ctrl.len); - /* Len */ switch (ctrl.len) { case LOONGARCH_BREAKPOINT_LEN_1: @@ -386,21 +410,17 @@ struct arch_hw_breakpoint *hw) { int ret; - u64 alignment_mask, offset; + u64 alignment_mask; /* Build the arch_hw_breakpoint. */ ret = arch_build_bp_info(bp, attr, hw); if (ret) return ret; - if (hw->ctrl.type != LOONGARCH_BREAKPOINT_EXECUTE) - alignment_mask = 0x7; - else + if (hw->ctrl.type == LOONGARCH_BREAKPOINT_EXECUTE) { alignment_mask = 0x3; - offset = hw->address & alignment_mask; - - hw->address &= ~alignment_mask; - hw->ctrl.len <<= offset; + hw->address &= ~alignment_mask; + } return 0; } @@ -471,12 +491,15 @@ slots = this_cpu_ptr(bp_on_reg); for (i = 0; i < boot_cpu_data.watch_ireg_count; ++i) { - bp = slots[i]; - if (bp == NULL) - continue; - perf_bp_event(bp, regs); + if ((csr_read32(LOONGARCH_CSR_FWPS) & (0x1 << i))) { + bp = slots[i]; + if (bp == NULL) + continue; + perf_bp_event(bp, regs); + csr_write32(0x1 << i, LOONGARCH_CSR_FWPS); + update_bp_registers(regs, 0, 0); + } } - update_bp_registers(regs, 0, 0); } NOKPROBE_SYMBOL(breakpoint_handler); @@ -488,12 +511,15 @@ slots = this_cpu_ptr(wp_on_reg); for (i = 0; i < boot_cpu_data.watch_dreg_count; ++i) { - wp = slots[i]; - if (wp == NULL) - continue; - perf_bp_event(wp, regs); + if ((csr_read32(LOONGARCH_CSR_MWPS) & (0x1 << i))) { + wp = slots[i]; + if (wp == NULL) + continue; + perf_bp_event(wp, regs); + csr_write32(0x1 << i, LOONGARCH_CSR_MWPS); + update_bp_registers(regs, 0, 1); + } } - update_bp_registers(regs, 0, 1); } NOKPROBE_SYMBOL(watchpoint_handler); --- linux-xilinx-6.8.0.orig/arch/loongarch/kernel/idle.c +++ linux-xilinx-6.8.0/arch/loongarch/kernel/idle.c @@ -11,7 +11,6 @@ void __cpuidle arch_cpu_idle(void) { - raw_local_irq_enable(); - __arch_cpu_idle(); /* idle instruction needs irq enabled */ + __arch_cpu_idle(); raw_local_irq_disable(); } --- linux-xilinx-6.8.0.orig/arch/loongarch/kernel/inst.c +++ linux-xilinx-6.8.0/arch/loongarch/kernel/inst.c @@ -332,7 +332,7 @@ return INSN_BREAK; } - emit_jirl(&insn, rj, rd, imm >> 2); + emit_jirl(&insn, rd, rj, imm >> 2); return insn.word; } --- linux-xilinx-6.8.0.orig/arch/loongarch/kernel/irq.c +++ linux-xilinx-6.8.0/arch/loongarch/kernel/irq.c @@ -122,9 +122,6 @@ panic("IPI IRQ request failed\n"); #endif - for (i = 0; i < NR_IRQS; i++) - irq_set_noprobe(i); - for_each_possible_cpu(i) { page = alloc_pages_node(cpu_to_node(i), GFP_KERNEL, order); --- linux-xilinx-6.8.0.orig/arch/loongarch/kernel/perf_event.c +++ linux-xilinx-6.8.0/arch/loongarch/kernel/perf_event.c @@ -884,4 +884,4 @@ return 0; } -early_initcall(init_hw_perf_events); +pure_initcall(init_hw_perf_events); --- linux-xilinx-6.8.0.orig/arch/loongarch/kernel/process.c +++ linux-xilinx-6.8.0/arch/loongarch/kernel/process.c @@ -293,13 +293,15 @@ { unsigned long top = TASK_SIZE & PAGE_MASK; - /* Space for the VDSO & data page */ - top -= PAGE_ALIGN(current->thread.vdso->size); - top -= VVAR_SIZE; + if (current->thread.vdso) { + /* Space for the VDSO & data page */ + top -= PAGE_ALIGN(current->thread.vdso->size); + top -= VVAR_SIZE; - /* Space to randomize the VDSO base */ - if (current->flags & PF_RANDOMIZE) - top -= VDSO_RANDOMIZE_SIZE; + /* Space to randomize the VDSO base */ + if (current->flags & PF_RANDOMIZE) + top -= VDSO_RANDOMIZE_SIZE; + } return top; } --- linux-xilinx-6.8.0.orig/arch/loongarch/kernel/ptrace.c +++ linux-xilinx-6.8.0/arch/loongarch/kernel/ptrace.c @@ -494,28 +494,14 @@ struct arch_hw_breakpoint_ctrl ctrl, struct perf_event_attr *attr) { - int err, len, type, offset; + int err, len, type; - err = arch_bp_generic_fields(ctrl, &len, &type, &offset); + err = arch_bp_generic_fields(ctrl, &len, &type); if (err) return err; - switch (note_type) { - case NT_LOONGARCH_HW_BREAK: - if ((type & HW_BREAKPOINT_X) != type) - return -EINVAL; - break; - case NT_LOONGARCH_HW_WATCH: - if ((type & HW_BREAKPOINT_RW) != type) - return -EINVAL; - break; - default: - return -EINVAL; - } - attr->bp_len = len; attr->bp_type = type; - attr->bp_addr += offset; return 0; } @@ -603,16 +589,36 @@ struct perf_event *bp; struct perf_event_attr attr; struct arch_hw_breakpoint_ctrl ctrl; + struct thread_info *ti = task_thread_info(tsk); bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx); if (IS_ERR(bp)) return PTR_ERR(bp); attr = bp->attr; - decode_ctrl_reg(uctrl, &ctrl); - err = ptrace_hbp_fill_attr_ctrl(note_type, ctrl, &attr); - if (err) - return err; + + switch (note_type) { + case NT_LOONGARCH_HW_BREAK: + ctrl.type = LOONGARCH_BREAKPOINT_EXECUTE; + ctrl.len = LOONGARCH_BREAKPOINT_LEN_4; + break; + case NT_LOONGARCH_HW_WATCH: + decode_ctrl_reg(uctrl, &ctrl); + break; + default: + return -EINVAL; + } + + if (uctrl & CTRL_PLV_ENABLE) { + err = ptrace_hbp_fill_attr_ctrl(note_type, ctrl, &attr); + if (err) + return err; + attr.disabled = 0; + set_ti_thread_flag(ti, TIF_LOAD_WATCH); + } else { + attr.disabled = 1; + clear_ti_thread_flag(ti, TIF_LOAD_WATCH); + } return modify_user_hw_breakpoint(bp, &attr); } @@ -643,6 +649,10 @@ struct perf_event *bp; struct perf_event_attr attr; + /* Kernel-space address cannot be monitored by user-space */ + if ((unsigned long)addr >= XKPRANGE) + return -EINVAL; + bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx); if (IS_ERR(bp)) return PTR_ERR(bp); @@ -710,7 +720,7 @@ unsigned int note_type = regset->core_note_type; /* Resource info */ - offset = offsetof(struct user_watch_state, dbg_regs); + offset = offsetof(struct user_watch_state_v2, dbg_regs); user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, 0, offset); /* (address, mask, ctrl) registers */ @@ -910,7 +920,7 @@ #ifdef CONFIG_HAVE_HW_BREAKPOINT [REGSET_HW_BREAK] = { .core_note_type = NT_LOONGARCH_HW_BREAK, - .n = sizeof(struct user_watch_state) / sizeof(u32), + .n = sizeof(struct user_watch_state_v2) / sizeof(u32), .size = sizeof(u32), .align = sizeof(u32), .regset_get = hw_break_get, @@ -918,7 +928,7 @@ }, [REGSET_HW_WATCH] = { .core_note_type = NT_LOONGARCH_HW_WATCH, - .n = sizeof(struct user_watch_state) / sizeof(u32), + .n = sizeof(struct user_watch_state_v2) / sizeof(u32), .size = sizeof(u32), .align = sizeof(u32), .regset_get = hw_break_get, --- linux-xilinx-6.8.0.orig/arch/loongarch/kernel/relocate.c +++ linux-xilinx-6.8.0/arch/loongarch/kernel/relocate.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include @@ -170,7 +171,7 @@ unsigned long kernel_length; unsigned long random_offset = 0; void *location_new = _text; /* Default to original kernel start */ - char *cmdline = early_ioremap(fw_arg1, COMMAND_LINE_SIZE); /* Boot command line is passed in fw_arg1 */ + char *cmdline = early_memremap_ro(fw_arg1, COMMAND_LINE_SIZE); /* Boot command line is passed in fw_arg1 */ strscpy(boot_command_line, cmdline, COMMAND_LINE_SIZE); @@ -182,6 +183,7 @@ random_offset = (unsigned long)location_new - (unsigned long)(_text); #endif reloc_offset = (unsigned long)_text - VMLINUX_LOAD_ADDRESS; + early_memunmap(cmdline, COMMAND_LINE_SIZE); if (random_offset) { kernel_length = (long)(_end) - (long)(_text); --- linux-xilinx-6.8.0.orig/arch/loongarch/kernel/reset.c +++ linux-xilinx-6.8.0/arch/loongarch/kernel/reset.c @@ -33,7 +33,7 @@ console_flush_on_panic(CONSOLE_FLUSH_PENDING); while (true) { - __arch_cpu_idle(); + __asm__ __volatile__("idle 0" : : : "memory"); } } @@ -53,7 +53,7 @@ #endif while (true) { - __arch_cpu_idle(); + __asm__ __volatile__("idle 0" : : : "memory"); } } @@ -74,6 +74,6 @@ acpi_reboot(); while (true) { - __arch_cpu_idle(); + __asm__ __volatile__("idle 0" : : : "memory"); } } --- linux-xilinx-6.8.0.orig/arch/loongarch/kernel/setup.c +++ linux-xilinx-6.8.0/arch/loongarch/kernel/setup.c @@ -54,6 +54,7 @@ #define SMBIOS_FREQHIGH_OFFSET 0x17 #define SMBIOS_FREQLOW_MASK 0xFF #define SMBIOS_CORE_PACKAGE_OFFSET 0x23 +#define SMBIOS_THREAD_PACKAGE_OFFSET 0x25 #define LOONGSON_EFI_ENABLE (1 << 3) unsigned long fw_arg0, fw_arg1, fw_arg2; @@ -124,7 +125,7 @@ cpu_clock_freq = freq_temp * 1000000; loongson_sysconf.cpuname = (void *)dmi_string_parse(dm, dmi_data[16]); - loongson_sysconf.cores_per_package = *(dmi_data + SMBIOS_CORE_PACKAGE_OFFSET); + loongson_sysconf.cores_per_package = *(dmi_data + SMBIOS_THREAD_PACKAGE_OFFSET); pr_info("CpuClock = %llu\n", cpu_clock_freq); } @@ -281,7 +282,7 @@ return; /* Prefer to use built-in dtb, checking its legality first. */ - if (!fdt_check_header(__dtb_start)) + if (IS_ENABLED(CONFIG_BUILTIN_DTB) && !fdt_check_header(__dtb_start)) fdt_pointer = __dtb_start; else fdt_pointer = efi_fdt_pointer(); /* Fallback to firmware dtb */ @@ -289,7 +290,7 @@ if (!fdt_pointer || fdt_check_header(fdt_pointer)) return; - early_init_dt_scan(fdt_pointer); + early_init_dt_scan(fdt_pointer, __pa(fdt_pointer)); early_init_fdt_reserve_self(); max_low_pfn = PFN_PHYS(memblock_end_of_DRAM()); --- linux-xilinx-6.8.0.orig/arch/loongarch/kernel/smp.c +++ linux-xilinx-6.8.0/arch/loongarch/kernel/smp.c @@ -262,7 +262,6 @@ if (cpuid == loongson_sysconf.boot_cpu_id) { cpu = 0; - numa_add_cpu(cpu); } else { cpu = cpumask_next_zero(-1, cpu_present_mask); } @@ -272,6 +271,9 @@ set_cpu_present(cpu, true); __cpu_number_map[cpuid] = cpu; __cpu_logical_map[cpu] = cpuid; + + early_numa_add_cpu(cpuid, 0); + set_cpuid_to_node(cpuid, 0); } loongson_sysconf.nr_cpus = num_processors; @@ -456,6 +458,7 @@ set_cpu_possible(0, true); set_cpu_online(0, true); set_my_cpu_offset(per_cpu_offset(0)); + numa_add_cpu(0); rr_node = first_node(node_online_map); for_each_possible_cpu(cpu) { --- linux-xilinx-6.8.0.orig/arch/loongarch/kernel/traps.c +++ linux-xilinx-6.8.0/arch/loongarch/kernel/traps.c @@ -529,6 +529,9 @@ #else unsigned int *pc; + if (regs->csr_prmd & CSR_PRMD_PIE) + local_irq_enable(); + perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, regs->csr_badvaddr); /* @@ -553,6 +556,8 @@ die_if_kernel("Kernel ale access", regs); force_sig_fault(SIGBUS, BUS_ADRALN, (void __user *)regs->csr_badvaddr); out: + if (regs->csr_prmd & CSR_PRMD_PIE) + local_irq_disable(); #endif irqentry_exit(regs, state); } --- linux-xilinx-6.8.0.orig/arch/loongarch/kernel/vmlinux.lds.S +++ linux-xilinx-6.8.0/arch/loongarch/kernel/vmlinux.lds.S @@ -5,6 +5,7 @@ #define PAGE_SIZE _PAGE_SIZE #define RO_EXCEPTION_TABLE_ALIGN 4 +#define PHYSADDR_MASK 0xffffffffffff /* 48-bit */ /* * Put .bss..swapper_pg_dir as the first thing in .bss. This will @@ -139,10 +140,11 @@ #ifdef CONFIG_EFI_STUB /* header symbols */ - _kernel_asize = _end - _text; - _kernel_fsize = _edata - _text; - _kernel_vsize = _end - __initdata_begin; - _kernel_rsize = _edata - __initdata_begin; + _kernel_entry = ABSOLUTE(kernel_entry & PHYSADDR_MASK); + _kernel_asize = ABSOLUTE(_end - _text); + _kernel_fsize = ABSOLUTE(_edata - _text); + _kernel_vsize = ABSOLUTE(_end - __initdata_begin); + _kernel_rsize = ABSOLUTE(_edata - __initdata_begin); #endif .gptab.sdata : { --- linux-xilinx-6.8.0.orig/arch/loongarch/kvm/main.c +++ linux-xilinx-6.8.0/arch/loongarch/kvm/main.c @@ -282,9 +282,9 @@ * TOE=0: Trap on Exception. * TIT=0: Trap on Timer. */ - if (env & CSR_GCFG_GCIP_ALL) + if (env & CSR_GCFG_GCIP_SECURE) gcfg |= CSR_GCFG_GCI_SECURE; - if (env & CSR_GCFG_MATC_ROOT) + if (env & CSR_GCFG_MATP_ROOT) gcfg |= CSR_GCFG_MATC_ROOT; write_csr_gcfg(gcfg); --- linux-xilinx-6.8.0.orig/arch/loongarch/kvm/mmu.c +++ linux-xilinx-6.8.0/arch/loongarch/kvm/mmu.c @@ -727,19 +727,19 @@ * value) and then p*d_offset() walks into the target huge page instead * of the old page table (sees the new value). */ - pgd = READ_ONCE(*pgd_offset(kvm->mm, hva)); + pgd = pgdp_get(pgd_offset(kvm->mm, hva)); if (pgd_none(pgd)) goto out; - p4d = READ_ONCE(*p4d_offset(&pgd, hva)); + p4d = p4dp_get(p4d_offset(&pgd, hva)); if (p4d_none(p4d) || !p4d_present(p4d)) goto out; - pud = READ_ONCE(*pud_offset(&p4d, hva)); + pud = pudp_get(pud_offset(&p4d, hva)); if (pud_none(pud) || !pud_present(pud)) goto out; - pmd = READ_ONCE(*pmd_offset(&pud, hva)); + pmd = pmdp_get(pmd_offset(&pud, hva)); if (pmd_none(pmd) || !pmd_present(pmd)) goto out; --- linux-xilinx-6.8.0.orig/arch/loongarch/kvm/timer.c +++ linux-xilinx-6.8.0/arch/loongarch/kvm/timer.c @@ -174,10 +174,11 @@ vcpu->arch.expire = expire; /* - * HRTIMER_MODE_PINNED is suggested since vcpu may run in - * the same physical cpu in next time + * HRTIMER_MODE_PINNED_HARD is suggested since vcpu may run in + * the same physical cpu in next time, and the timer should run + * in hardirq context even in the PREEMPT_RT case. */ - hrtimer_start(&vcpu->arch.swtimer, expire, HRTIMER_MODE_ABS_PINNED); + hrtimer_start(&vcpu->arch.swtimer, expire, HRTIMER_MODE_ABS_PINNED_HARD); } else if (vcpu->stat.generic.blocking) { /* * Inject timer interrupt so that halt polling can dectect and exit. --- linux-xilinx-6.8.0.orig/arch/loongarch/kvm/vcpu.c +++ linux-xilinx-6.8.0/arch/loongarch/kvm/vcpu.c @@ -61,7 +61,7 @@ */ static int kvm_enter_guest_check(struct kvm_vcpu *vcpu) { - int ret; + int idx, ret; /* * Check conditions before entering the guest @@ -70,7 +70,9 @@ if (ret < 0) return ret; + idx = srcu_read_lock(&vcpu->kvm->srcu); ret = kvm_check_requests(vcpu); + srcu_read_unlock(&vcpu->kvm->srcu, idx); return ret; } @@ -875,7 +877,7 @@ vcpu->arch.vpid = 0; - hrtimer_init(&vcpu->arch.swtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS_PINNED); + hrtimer_init(&vcpu->arch.swtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS_PINNED_HARD); vcpu->arch.swtimer.function = kvm_swtimer_wakeup; vcpu->arch.handle_exit = kvm_handle_exit; @@ -1144,7 +1146,7 @@ kvm_complete_iocsr_read(vcpu, run); } - if (run->immediate_exit) + if (!vcpu->wants_to_run) return r; /* Clear exit_reason */ --- linux-xilinx-6.8.0.orig/arch/loongarch/lib/csum.c +++ linux-xilinx-6.8.0/arch/loongarch/lib/csum.c @@ -25,7 +25,7 @@ const u64 *ptr; u64 data, sum64 = 0; - if (unlikely(len == 0)) + if (unlikely(len <= 0)) return 0; offset = (unsigned long)buff & 7; --- linux-xilinx-6.8.0.orig/arch/loongarch/mm/fault.c +++ linux-xilinx-6.8.0/arch/loongarch/mm/fault.c @@ -202,10 +202,10 @@ if (!(vma->vm_flags & VM_WRITE)) goto bad_area; } else { - if (!(vma->vm_flags & VM_READ) && address != exception_era(regs)) - goto bad_area; if (!(vma->vm_flags & VM_EXEC) && address == exception_era(regs)) goto bad_area; + if (!(vma->vm_flags & (VM_READ | VM_WRITE)) && address != exception_era(regs)) + goto bad_area; } /* --- linux-xilinx-6.8.0.orig/arch/loongarch/mm/hugetlbpage.c +++ linux-xilinx-6.8.0/arch/loongarch/mm/hugetlbpage.c @@ -39,11 +39,11 @@ pmd_t *pmd = NULL; pgd = pgd_offset(mm, addr); - if (pgd_present(*pgd)) { + if (pgd_present(pgdp_get(pgd))) { p4d = p4d_offset(pgd, addr); - if (p4d_present(*p4d)) { + if (p4d_present(p4dp_get(p4d))) { pud = pud_offset(p4d, addr); - if (pud_present(*pud)) + if (pud_present(pudp_get(pud))) pmd = pmd_offset(pud, addr); } } --- linux-xilinx-6.8.0.orig/arch/loongarch/mm/init.c +++ linux-xilinx-6.8.0/arch/loongarch/mm/init.c @@ -140,7 +140,7 @@ int __meminit vmemmap_check_pmd(pmd_t *pmd, int node, unsigned long addr, unsigned long next) { - int huge = pmd_val(*pmd) & _PAGE_HUGE; + int huge = pmd_val(pmdp_get(pmd)) & _PAGE_HUGE; if (huge) vmemmap_verify((pte_t *)pmd, node, addr, next); @@ -172,7 +172,7 @@ pud_t *pud; pmd_t *pmd; - if (p4d_none(*p4d)) { + if (p4d_none(p4dp_get(p4d))) { pud = memblock_alloc(PAGE_SIZE, PAGE_SIZE); if (!pud) panic("%s: Failed to allocate memory\n", __func__); @@ -183,7 +183,7 @@ } pud = pud_offset(p4d, addr); - if (pud_none(*pud)) { + if (pud_none(pudp_get(pud))) { pmd = memblock_alloc(PAGE_SIZE, PAGE_SIZE); if (!pmd) panic("%s: Failed to allocate memory\n", __func__); @@ -194,7 +194,7 @@ } pmd = pmd_offset(pud, addr); - if (!pmd_present(*pmd)) { + if (!pmd_present(pmdp_get(pmd))) { pte_t *pte; pte = memblock_alloc(PAGE_SIZE, PAGE_SIZE); @@ -215,7 +215,7 @@ BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses); ptep = populate_kernel_pte(addr); - if (!pte_none(*ptep)) { + if (!pte_none(ptep_get(ptep))) { pte_ERROR(*ptep); return; } --- linux-xilinx-6.8.0.orig/arch/loongarch/mm/kasan_init.c +++ linux-xilinx-6.8.0/arch/loongarch/mm/kasan_init.c @@ -13,6 +13,13 @@ static pgd_t kasan_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE); +#ifdef __PAGETABLE_P4D_FOLDED +#define __pgd_none(early, pgd) (0) +#else +#define __pgd_none(early, pgd) (early ? (pgd_val(pgd) == 0) : \ +(__pa(pgd_val(pgd)) == (unsigned long)__pa(kasan_early_shadow_p4d))) +#endif + #ifdef __PAGETABLE_PUD_FOLDED #define __p4d_none(early, p4d) (0) #else @@ -55,6 +62,9 @@ case XKPRANGE_UC_SEG: offset = XKPRANGE_UC_SHADOW_OFFSET; break; + case XKPRANGE_WC_SEG: + offset = XKPRANGE_WC_SHADOW_OFFSET; + break; case XKVRANGE_VC_SEG: offset = XKVRANGE_VC_SHADOW_OFFSET; break; @@ -79,6 +89,8 @@ if (addr >= XKVRANGE_VC_SHADOW_OFFSET) return (void *)(((addr - XKVRANGE_VC_SHADOW_OFFSET) << KASAN_SHADOW_SCALE_SHIFT) + XKVRANGE_VC_START); + else if (addr >= XKPRANGE_WC_SHADOW_OFFSET) + return (void *)(((addr - XKPRANGE_WC_SHADOW_OFFSET) << KASAN_SHADOW_SCALE_SHIFT) + XKPRANGE_WC_START); else if (addr >= XKPRANGE_UC_SHADOW_OFFSET) return (void *)(((addr - XKPRANGE_UC_SHADOW_OFFSET) << KASAN_SHADOW_SCALE_SHIFT) + XKPRANGE_UC_START); else if (addr >= XKPRANGE_CC_SHADOW_OFFSET) @@ -105,7 +117,7 @@ static pte_t *__init kasan_pte_offset(pmd_t *pmdp, unsigned long addr, int node, bool early) { - if (__pmd_none(early, READ_ONCE(*pmdp))) { + if (__pmd_none(early, pmdp_get(pmdp))) { phys_addr_t pte_phys = early ? __pa_symbol(kasan_early_shadow_pte) : kasan_alloc_zeroed_page(node); if (!early) @@ -118,7 +130,7 @@ static pmd_t *__init kasan_pmd_offset(pud_t *pudp, unsigned long addr, int node, bool early) { - if (__pud_none(early, READ_ONCE(*pudp))) { + if (__pud_none(early, pudp_get(pudp))) { phys_addr_t pmd_phys = early ? __pa_symbol(kasan_early_shadow_pmd) : kasan_alloc_zeroed_page(node); if (!early) @@ -131,7 +143,7 @@ static pud_t *__init kasan_pud_offset(p4d_t *p4dp, unsigned long addr, int node, bool early) { - if (__p4d_none(early, READ_ONCE(*p4dp))) { + if (__p4d_none(early, p4dp_get(p4dp))) { phys_addr_t pud_phys = early ? __pa_symbol(kasan_early_shadow_pud) : kasan_alloc_zeroed_page(node); if (!early) @@ -142,6 +154,19 @@ return pud_offset(p4dp, addr); } +static p4d_t *__init kasan_p4d_offset(pgd_t *pgdp, unsigned long addr, int node, bool early) +{ + if (__pgd_none(early, pgdp_get(pgdp))) { + phys_addr_t p4d_phys = early ? + __pa_symbol(kasan_early_shadow_p4d) : kasan_alloc_zeroed_page(node); + if (!early) + memcpy(__va(p4d_phys), kasan_early_shadow_p4d, sizeof(kasan_early_shadow_p4d)); + pgd_populate(&init_mm, pgdp, (p4d_t *)__va(p4d_phys)); + } + + return p4d_offset(pgdp, addr); +} + static void __init kasan_pte_populate(pmd_t *pmdp, unsigned long addr, unsigned long end, int node, bool early) { @@ -154,7 +179,7 @@ : kasan_alloc_zeroed_page(node); next = addr + PAGE_SIZE; set_pte(ptep, pfn_pte(__phys_to_pfn(page_phys), PAGE_KERNEL)); - } while (ptep++, addr = next, addr != end && __pte_none(early, READ_ONCE(*ptep))); + } while (ptep++, addr = next, addr != end && __pte_none(early, ptep_get(ptep))); } static void __init kasan_pmd_populate(pud_t *pudp, unsigned long addr, @@ -166,7 +191,7 @@ do { next = pmd_addr_end(addr, end); kasan_pte_populate(pmdp, addr, next, node, early); - } while (pmdp++, addr = next, addr != end && __pmd_none(early, READ_ONCE(*pmdp))); + } while (pmdp++, addr = next, addr != end && __pmd_none(early, pmdp_get(pmdp))); } static void __init kasan_pud_populate(p4d_t *p4dp, unsigned long addr, @@ -178,19 +203,19 @@ do { next = pud_addr_end(addr, end); kasan_pmd_populate(pudp, addr, next, node, early); - } while (pudp++, addr = next, addr != end); + } while (pudp++, addr = next, addr != end && __pud_none(early, READ_ONCE(*pudp))); } static void __init kasan_p4d_populate(pgd_t *pgdp, unsigned long addr, unsigned long end, int node, bool early) { unsigned long next; - p4d_t *p4dp = p4d_offset(pgdp, addr); + p4d_t *p4dp = kasan_p4d_offset(pgdp, addr, node, early); do { next = p4d_addr_end(addr, end); kasan_pud_populate(p4dp, addr, next, node, early); - } while (p4dp++, addr = next, addr != end); + } while (p4dp++, addr = next, addr != end && __p4d_none(early, READ_ONCE(*p4dp))); } static void __init kasan_pgd_populate(unsigned long addr, unsigned long end, @@ -218,7 +243,7 @@ asmlinkage void __init kasan_early_init(void) { BUILD_BUG_ON(!IS_ALIGNED(KASAN_SHADOW_START, PGDIR_SIZE)); - BUILD_BUG_ON(!IS_ALIGNED(KASAN_SHADOW_END, PGDIR_SIZE)); + BUILD_BUG_ON(!IS_ALIGNED(KASAN_SHADOW_END + 1, PGDIR_SIZE)); } static inline void kasan_set_pgd(pgd_t *pgdp, pgd_t pgdval) @@ -233,7 +258,7 @@ * swapper_pg_dir. pgd_clear() can't be used * here because it's nop on 2,3-level pagetable setups */ - for (; start < end; start += PGDIR_SIZE) + for (; start < end; start = pgd_addr_end(start, end)) kasan_set_pgd((pgd_t *)pgd_offset_k(start), __pgd(0)); } @@ -243,6 +268,17 @@ phys_addr_t pa_start, pa_end; /* + * If PGDIR_SIZE is too large for cpu_vabits, KASAN_SHADOW_END will + * overflow UINTPTR_MAX and then looks like a user space address. + * For example, PGDIR_SIZE of CONFIG_4KB_4LEVEL is 2^39, which is too + * large for Loongson-2K series whose cpu_vabits = 39. + */ + if (KASAN_SHADOW_END < vm_map_base) { + pr_warn("PGDIR_SIZE too large for cpu_vabits, KernelAddressSanitizer disabled.\n"); + return; + } + + /* * PGD was populated as invalid_pmd_table or invalid_pud_table * in pagetable_init() which depends on how many levels of page * table you are using, but we had to clean the gpd of kasan --- linux-xilinx-6.8.0.orig/arch/loongarch/mm/pgtable.c +++ linux-xilinx-6.8.0/arch/loongarch/mm/pgtable.c @@ -128,7 +128,7 @@ void set_pmd_at(struct mm_struct *mm, unsigned long addr, pmd_t *pmdp, pmd_t pmd) { - *pmdp = pmd; + WRITE_ONCE(*pmdp, pmd); flush_tlb_all(); } --- linux-xilinx-6.8.0.orig/arch/loongarch/mm/tlb.c +++ linux-xilinx-6.8.0/arch/loongarch/mm/tlb.c @@ -292,7 +292,7 @@ /* Avoid lockdep warning */ rcutree_report_cpu_starting(cpu); -#ifdef CONFIG_NUMA +#if defined(CONFIG_NUMA) && !defined(CONFIG_PREEMPT_RT) vec_sz = sizeof(exception_handlers); if (pcpu_handlers[cpu]) --- linux-xilinx-6.8.0.orig/arch/loongarch/net/bpf_jit.c +++ linux-xilinx-6.8.0/arch/loongarch/net/bpf_jit.c @@ -179,15 +179,15 @@ if (!is_tail_call) { /* Set return value */ - move_reg(ctx, LOONGARCH_GPR_A0, regmap[BPF_REG_0]); + emit_insn(ctx, addiw, LOONGARCH_GPR_A0, regmap[BPF_REG_0], 0); /* Return to the caller */ - emit_insn(ctx, jirl, LOONGARCH_GPR_RA, LOONGARCH_GPR_ZERO, 0); + emit_insn(ctx, jirl, LOONGARCH_GPR_ZERO, LOONGARCH_GPR_RA, 0); } else { /* * Call the next bpf prog and skip the first instruction * of TCC initialization. */ - emit_insn(ctx, jirl, LOONGARCH_GPR_T3, LOONGARCH_GPR_ZERO, 1); + emit_insn(ctx, jirl, LOONGARCH_GPR_ZERO, LOONGARCH_GPR_T3, 1); } } @@ -904,7 +904,7 @@ return ret; move_addr(ctx, t1, func_addr); - emit_insn(ctx, jirl, t1, LOONGARCH_GPR_RA, 0); + emit_insn(ctx, jirl, LOONGARCH_GPR_RA, t1, 0); move_reg(ctx, regmap[BPF_REG_0], LOONGARCH_GPR_A0); break; @@ -1294,16 +1294,19 @@ flush_icache_range((unsigned long)header, (unsigned long)(ctx.image + ctx.idx)); if (!prog->is_func || extra_pass) { + int err; + if (extra_pass && ctx.idx != jit_data->ctx.idx) { pr_err_once("multi-func JIT bug %d != %d\n", ctx.idx, jit_data->ctx.idx); - bpf_jit_binary_free(header); - prog->bpf_func = NULL; - prog->jited = 0; - prog->jited_len = 0; - goto out_offset; + goto out_free; + } + err = bpf_jit_binary_lock_ro(header); + if (err) { + pr_err_once("bpf_jit_binary_lock_ro() returned %d\n", + err); + goto out_free; } - bpf_jit_binary_lock_ro(header); } else { jit_data->ctx = ctx; jit_data->image = image_ptr; @@ -1334,6 +1337,13 @@ out_offset = -1; return prog; + +out_free: + bpf_jit_binary_free(header); + prog->bpf_func = NULL; + prog->jited = 0; + prog->jited_len = 0; + goto out_offset; } /* Indicate the JIT backend supports mixing bpf2bpf and tailcalls. */ --- linux-xilinx-6.8.0.orig/arch/loongarch/pci/acpi.c +++ linux-xilinx-6.8.0/arch/loongarch/pci/acpi.c @@ -225,6 +225,7 @@ if (bus) { memcpy(bus->sysdata, info->cfg, sizeof(struct pci_config_window)); kfree(info); + kfree(root_ops); } else { struct pci_bus *child; --- linux-xilinx-6.8.0.orig/arch/loongarch/power/platform.c +++ linux-xilinx-6.8.0/arch/loongarch/power/platform.c @@ -17,7 +17,7 @@ if (acpi_gbl_reduced_hardware) return; - acpi_enable_all_wakeup_gpes(); + acpi_hw_enable_all_wakeup_gpes(); } void enable_pci_wakeup(void) --- linux-xilinx-6.8.0.orig/arch/loongarch/vdso/Makefile +++ linux-xilinx-6.8.0/arch/loongarch/vdso/Makefile @@ -22,7 +22,7 @@ cflags-vdso := $(ccflags-vdso) \ -isystem $(shell $(CC) -print-file-name=include) \ $(filter -W%,$(filter-out -Wa$(comma)%,$(KBUILD_CFLAGS))) \ - -O2 -g -fno-strict-aliasing -fno-common -fno-builtin \ + -std=gnu11 -O2 -g -fno-strict-aliasing -fno-common -fno-builtin \ -fno-stack-protector -fno-jump-tables -DDISABLE_BRANCH_PROFILING \ $(call cc-option, -fno-asynchronous-unwind-tables) \ $(call cc-option, -fno-stack-protector) --- linux-xilinx-6.8.0.orig/arch/m68k/amiga/config.c +++ linux-xilinx-6.8.0/arch/m68k/amiga/config.c @@ -180,6 +180,15 @@ dev->slotsize = be16_to_cpu(cd->cd_SlotSize); dev->boardaddr = be32_to_cpu(cd->cd_BoardAddr); dev->boardsize = be32_to_cpu(cd->cd_BoardSize); + + /* CS-LAB Warp 1260 workaround */ + if (be16_to_cpu(dev->rom.er_Manufacturer) == ZORRO_MANUF(ZORRO_PROD_CSLAB_WARP_1260) && + dev->rom.er_Product == ZORRO_PROD(ZORRO_PROD_CSLAB_WARP_1260)) { + + /* turn off all interrupts */ + pr_info("Warp 1260 card detected: applying interrupt storm workaround\n"); + *(uint32_t *)(dev->boardaddr + 0x1000) = 0xfff; + } } else pr_warn("amiga_parse_bootinfo: too many AutoConfig devices\n"); #endif /* CONFIG_ZORRO */ --- linux-xilinx-6.8.0.orig/arch/m68k/atari/ataints.c +++ linux-xilinx-6.8.0/arch/m68k/atari/ataints.c @@ -301,11 +301,7 @@ if (ATARIHW_PRESENT(SCU)) { /* init the SCU if present */ - tt_scu.sys_mask = 0x10; /* enable VBL (for the cursor) and - * disable HSYNC interrupts (who - * needs them?) MFP and SCC are - * enabled in VME mask - */ + tt_scu.sys_mask = 0x0; /* disable all interrupts */ tt_scu.vme_mask = 0x60; /* enable MFP and SCC ints */ } else { /* If no SCU and no Hades, the HSYNC interrupt needs to be --- linux-xilinx-6.8.0.orig/arch/m68k/coldfire/device.c +++ linux-xilinx-6.8.0/arch/m68k/coldfire/device.c @@ -93,7 +93,7 @@ .dev.platform_data = mcf_uart_platform_data, }; -#if IS_ENABLED(CONFIG_FEC) +#ifdef MCFFEC_BASE0 #ifdef CONFIG_M5441x #define FEC_NAME "enet-fec" @@ -145,6 +145,7 @@ .platform_data = FEC_PDATA, } }; +#endif /* MCFFEC_BASE0 */ #ifdef MCFFEC_BASE1 static struct resource mcf_fec1_resources[] = { @@ -182,7 +183,6 @@ } }; #endif /* MCFFEC_BASE1 */ -#endif /* CONFIG_FEC */ #if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) /* @@ -624,12 +624,12 @@ static struct platform_device *mcf_devices[] __initdata = { &mcf_uart, -#if IS_ENABLED(CONFIG_FEC) +#ifdef MCFFEC_BASE0 &mcf_fec0, +#endif #ifdef MCFFEC_BASE1 &mcf_fec1, #endif -#endif #if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) &mcf_qspi, #endif --- linux-xilinx-6.8.0.orig/arch/m68k/include/asm/cmpxchg.h +++ linux-xilinx-6.8.0/arch/m68k/include/asm/cmpxchg.h @@ -32,7 +32,7 @@ x = tmp; break; default: - tmp = __invalid_xchg_size(x, ptr, size); + x = __invalid_xchg_size(x, ptr, size); break; } --- linux-xilinx-6.8.0.orig/arch/m68k/include/asm/mcfgpio.h +++ linux-xilinx-6.8.0/arch/m68k/include/asm/mcfgpio.h @@ -136,7 +136,7 @@ * read-modify-write as well as those controlled by the EPORT and GPIO modules. */ #define MCFGPIO_SCR_START 40 -#elif defined(CONFIGM5441x) +#elif defined(CONFIG_M5441x) /* The m5441x EPORT doesn't have its own GPIO port, uses PORT C */ #define MCFGPIO_SCR_START 0 #else --- linux-xilinx-6.8.0.orig/arch/m68k/include/asm/mvme147hw.h +++ linux-xilinx-6.8.0/arch/m68k/include/asm/mvme147hw.h @@ -93,8 +93,8 @@ #define M147_SCC_B_ADDR 0xfffe3000 #define M147_SCC_PCLK 5000000 -#define MVME147_IRQ_SCSI_PORT (IRQ_USER+0x45) -#define MVME147_IRQ_SCSI_DMA (IRQ_USER+0x46) +#define MVME147_IRQ_SCSI_PORT (IRQ_USER + 5) +#define MVME147_IRQ_SCSI_DMA (IRQ_USER + 6) /* SCC interrupts, for MVME147 */ --- linux-xilinx-6.8.0.orig/arch/m68k/include/asm/vga.h +++ linux-xilinx-6.8.0/arch/m68k/include/asm/vga.h @@ -9,7 +9,7 @@ */ #ifndef CONFIG_PCI -#include +#include #include /* @@ -29,9 +29,9 @@ #define inw_p(port) 0 #define outb_p(port, val) do { } while (0) #define outw(port, val) do { } while (0) -#define readb raw_inb -#define writeb raw_outb -#define writew raw_outw +#define readb __raw_readb +#define writeb __raw_writeb +#define writew __raw_writew #endif /* CONFIG_PCI */ #endif /* _ASM_M68K_VGA_H */ --- linux-xilinx-6.8.0.orig/arch/m68k/kernel/early_printk.c +++ linux-xilinx-6.8.0/arch/m68k/kernel/early_printk.c @@ -13,6 +13,7 @@ #include +#include "../mvme147/mvme147.h" #include "../mvme16x/mvme16x.h" asmlinkage void __init debug_cons_nputs(const char *s, unsigned n); @@ -22,7 +23,9 @@ { #if !(defined(CONFIG_SUN3) || defined(CONFIG_M68000) || \ defined(CONFIG_COLDFIRE)) - if (MACH_IS_MVME16x) + if (MACH_IS_MVME147) + mvme147_scc_write(c, s, n); + else if (MACH_IS_MVME16x) mvme16x_cons_write(c, s, n); else debug_cons_nputs(s, n); --- linux-xilinx-6.8.0.orig/arch/m68k/kernel/entry.S +++ linux-xilinx-6.8.0/arch/m68k/kernel/entry.S @@ -430,7 +430,9 @@ movec %a0,%dfc /* restore status register */ - movew %a1@(TASK_THREAD+THREAD_SR),%sr + movew %a1@(TASK_THREAD+THREAD_SR),%d0 + oriw #0x0700,%d0 + movew %d0,%sr rts --- linux-xilinx-6.8.0.orig/arch/m68k/kernel/process.c +++ linux-xilinx-6.8.0/arch/m68k/kernel/process.c @@ -117,7 +117,7 @@ { /* regs will be equal to current_pt_regs() */ struct kernel_clone_args args = { - .flags = regs->d1 & ~CSIGNAL, + .flags = (u32)(regs->d1) & ~CSIGNAL, .pidfd = (int __user *)regs->d3, .child_tid = (int __user *)regs->d4, .parent_tid = (int __user *)regs->d3, --- linux-xilinx-6.8.0.orig/arch/m68k/mac/misc.c +++ linux-xilinx-6.8.0/arch/m68k/mac/misc.c @@ -453,30 +453,18 @@ void mac_reset(void) { - if (macintosh_config->adb_type == MAC_ADB_II && - macintosh_config->ident != MAC_MODEL_SE30) { - /* need ROMBASE in booter */ - /* indeed, plus need to MAP THE ROM !! */ - - if (mac_bi_data.rombase == 0) - mac_bi_data.rombase = 0x40800000; - - /* works on some */ - rom_reset = (void *) (mac_bi_data.rombase + 0xa); - - local_irq_disable(); - rom_reset(); #ifdef CONFIG_ADB_CUDA - } else if (macintosh_config->adb_type == MAC_ADB_EGRET || - macintosh_config->adb_type == MAC_ADB_CUDA) { + if (macintosh_config->adb_type == MAC_ADB_EGRET || + macintosh_config->adb_type == MAC_ADB_CUDA) { cuda_restart(); + } else #endif #ifdef CONFIG_ADB_PMU - } else if (macintosh_config->adb_type == MAC_ADB_PB2) { + if (macintosh_config->adb_type == MAC_ADB_PB2) { pmu_restart(); + } else #endif - } else if (CPU_IS_030) { - + if (CPU_IS_030) { /* 030-specific reset routine. The idea is general, but the * specific registers to reset are '030-specific. Until I * have a non-030 machine, I can't test anything else. @@ -524,6 +512,18 @@ "jmp %/a0@\n\t" /* jump to the reset vector */ ".chip 68k" : : "r" (offset), "a" (rombase) : "a0"); + } else { + /* need ROMBASE in booter */ + /* indeed, plus need to MAP THE ROM !! */ + + if (mac_bi_data.rombase == 0) + mac_bi_data.rombase = 0x40800000; + + /* works on some */ + rom_reset = (void *)(mac_bi_data.rombase + 0xa); + + local_irq_disable(); + rom_reset(); } /* should never get here */ --- linux-xilinx-6.8.0.orig/arch/m68k/mvme147/config.c +++ linux-xilinx-6.8.0/arch/m68k/mvme147/config.c @@ -32,6 +32,7 @@ #include #include +#include "mvme147.h" static void mvme147_get_model(char *model); extern void mvme147_sched_init(void); @@ -185,3 +186,32 @@ } return 0; } + +static void scc_delay(void) +{ + __asm__ __volatile__ ("nop; nop;"); +} + +static void scc_write(char ch) +{ + do { + scc_delay(); + } while (!(in_8(M147_SCC_A_ADDR) & BIT(2))); + scc_delay(); + out_8(M147_SCC_A_ADDR, 8); + scc_delay(); + out_8(M147_SCC_A_ADDR, ch); +} + +void mvme147_scc_write(struct console *co, const char *str, unsigned int count) +{ + unsigned long flags; + + local_irq_save(flags); + while (count--) { + if (*str == '\n') + scc_write('\r'); + scc_write(*str++); + } + local_irq_restore(flags); +} --- linux-xilinx-6.8.0.orig/arch/m68k/mvme147/mvme147.h +++ linux-xilinx-6.8.0/arch/m68k/mvme147/mvme147.h @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +struct console; + +/* config.c */ +void mvme147_scc_write(struct console *co, const char *str, unsigned int count); --- linux-xilinx-6.8.0.orig/arch/microblaze/include/asm/sections.h +++ linux-xilinx-6.8.0/arch/microblaze/include/asm/sections.h @@ -14,6 +14,9 @@ extern char _ssbss[], _esbss[]; extern unsigned long __ivt_start[], __ivt_end[]; +extern char __initramfs_end[]; +extern char _end_tlb_mapping[]; + extern u32 _fdt_start[], _fdt_end[]; # endif /* !__ASSEMBLY__ */ --- linux-xilinx-6.8.0.orig/arch/microblaze/kernel/Makefile +++ linux-xilinx-6.8.0/arch/microblaze/kernel/Makefile @@ -7,7 +7,6 @@ # Do not trace early boot code and low level code CFLAGS_REMOVE_timer.o = -pg CFLAGS_REMOVE_intc.o = -pg -CFLAGS_REMOVE_early_printk.o = -pg CFLAGS_REMOVE_ftrace.o = -pg CFLAGS_REMOVE_process.o = -pg endif --- linux-xilinx-6.8.0.orig/arch/microblaze/kernel/cpu/cpuinfo-static.c +++ linux-xilinx-6.8.0/arch/microblaze/kernel/cpu/cpuinfo-static.c @@ -18,7 +18,7 @@ static const char cpu_ver_string[] = CONFIG_XILINX_MICROBLAZE0_HW_VER; #define err_printk(x) \ - early_printk("ERROR: Microblaze " x "-different for kernel and DTS\n"); + pr_err("ERROR: Microblaze " x "-different for kernel and DTS\n"); void __init set_cpuinfo_static(struct cpuinfo *ci, struct device_node *cpu) { --- linux-xilinx-6.8.0.orig/arch/microblaze/kernel/head.S +++ linux-xilinx-6.8.0/arch/microblaze/kernel/head.S @@ -173,9 +173,8 @@ tophys(r4,r3) /* Load the kernel physical address */ /* start to do TLB calculation */ - addik r12, r0, _end + addik r12, r0, _end_tlb_mapping rsub r12, r3, r12 - addik r12, r12, CONFIG_LOWMEM_SIZE >> PTE_SHIFT /* that's the pad */ or r9, r0, r0 /* TLB0 = 0 */ or r10, r0, r0 /* TLB1 = 0 */ --- linux-xilinx-6.8.0.orig/arch/microblaze/kernel/microblaze_ksyms.c +++ linux-xilinx-6.8.0/arch/microblaze/kernel/microblaze_ksyms.c @@ -16,6 +16,7 @@ #include #include #include +#include #ifdef CONFIG_FUNCTION_TRACER extern void _mcount(void); @@ -46,3 +47,12 @@ EXPORT_SYMBOL(__udivsi3); extern void __umodsi3(void); EXPORT_SYMBOL(__umodsi3); + +#ifdef CONFIG_MB_MANAGER +extern void xmb_manager_register(uintptr_t phys_baseaddr, u32 cr_val, + void (*callback)(void *data), + void *priv, void (*reset_callback)(void *data)); +EXPORT_SYMBOL(xmb_manager_register); +extern asmlinkage void xmb_inject_err(void); +EXPORT_SYMBOL(xmb_inject_err); +#endif --- linux-xilinx-6.8.0.orig/arch/microblaze/kernel/prom.c +++ linux-xilinx-6.8.0/arch/microblaze/kernel/prom.c @@ -18,7 +18,7 @@ { pr_debug(" -> early_init_devtree(%p)\n", params); - early_init_dt_scan(params); + early_init_dt_scan(params, __pa(params)); if (!strlen(boot_command_line)) strscpy(boot_command_line, cmd_line, COMMAND_LINE_SIZE); --- linux-xilinx-6.8.0.orig/arch/microblaze/kernel/setup.c +++ linux-xilinx-6.8.0/arch/microblaze/kernel/setup.c @@ -132,7 +132,7 @@ if (fdt) pr_info("FDT at 0x%08x\n", fdt); else - pr_info("Compiled-in FDT at %p\n", _fdt_start); + pr_info("Compiled-in FDT at 0x%08x\n", (unsigned)&_fdt_start); #ifdef CONFIG_MTD_UCLINUX pr_info("Found romfs @ 0x%08x (0x%08x)\n", --- linux-xilinx-6.8.0.orig/arch/microblaze/kernel/vmlinux.lds.S +++ linux-xilinx-6.8.0/arch/microblaze/kernel/vmlinux.lds.S @@ -119,12 +119,6 @@ CON_INITCALL } - __init_end_before_initramfs = .; - - .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) { - INIT_RAM_FS - } - __init_end = .; .bss ALIGN (PAGE_SIZE) : AT(ADDR(.bss) - LOAD_OFFSET) { @@ -137,6 +131,15 @@ } . = ALIGN(PAGE_SIZE); _end = .; + /* Add space in TLB mapping for early free pages mapping */ + . = . + 0x100000; /* CONFIG_LOWMEM_SIZE >> PTE_SHIFT + space */ + + _end_tlb_mapping = . ; + + .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) { + INIT_RAM_FS + } + __initramfs_end = . ; DISCARDS } --- linux-xilinx-6.8.0.orig/arch/microblaze/mm/init.c +++ linux-xilinx-6.8.0/arch/microblaze/mm/init.c @@ -192,11 +192,7 @@ asmlinkage void __init mmu_init(void) { unsigned int kstart, ksize; - - if (!memblock.reserved.cnt) { - pr_emerg("Error memory count\n"); - machine_restart(NULL); - } + phys_addr_t __maybe_unused size; if ((u32) memblock.memory.regions[0].size < 0x400000) { pr_emerg("Memory must be greater than 4MB\n"); @@ -233,10 +229,14 @@ #if defined(CONFIG_BLK_DEV_INITRD) /* Remove the init RAM disk from the available memory. */ if (initrd_start) { - unsigned long size; size = initrd_end - initrd_start; memblock_reserve(__virt_to_phys(initrd_start), size); } + + size = __initramfs_end - __initramfs_start; + if (size) + memblock_reserve((phys_addr_t)__virt_to_phys(__initramfs_start), + size); #endif /* CONFIG_BLK_DEV_INITRD */ /* Initialize the MMU hardware */ --- linux-xilinx-6.8.0.orig/arch/mips/Kconfig +++ linux-xilinx-6.8.0/arch/mips/Kconfig @@ -14,7 +14,7 @@ select ARCH_HAS_STRNCPY_FROM_USER select ARCH_HAS_STRNLEN_USER select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST - select ARCH_HAS_UBSAN_SANITIZE_ALL + select ARCH_HAS_UBSAN select ARCH_HAS_GCOV_PROFILE_ALL select ARCH_KEEP_MEMBLOCK select ARCH_USE_BUILTIN_BSWAP --- linux-xilinx-6.8.0.orig/arch/mips/Makefile +++ linux-xilinx-6.8.0/arch/mips/Makefile @@ -299,7 +299,7 @@ ifdef CONFIG_64BIT ifndef KBUILD_SYM32 ifeq ($(shell expr $(load-y) \< 0xffffffff80000000), 0) - KBUILD_SYM32 = y + KBUILD_SYM32 = $(call cc-option-yn, -msym32) endif endif --- linux-xilinx-6.8.0.orig/arch/mips/bmips/setup.c +++ linux-xilinx-6.8.0/arch/mips/bmips/setup.c @@ -110,7 +110,8 @@ * RAC flush causes kernel panics on BCM6358 when booting from TP1 * because the bootloader is not initializing it properly. */ - bmips_rac_flush_disable = !!(read_c0_brcm_cmt_local() & (1 << 31)); + bmips_rac_flush_disable = !!(read_c0_brcm_cmt_local() & (1 << 31)) || + !!BMIPS_GET_CBR(); } static void bcm6368_quirks(void) --- linux-xilinx-6.8.0.orig/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi +++ linux-xilinx-6.8.0/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi @@ -23,14 +23,6 @@ }; }; - memory@200000 { - compatible = "memory"; - device_type = "memory"; - reg = <0x00000000 0x00200000 0x00000000 0x0ee00000>, /* 238 MB at 2 MB */ - <0x00000000 0x20000000 0x00000000 0x1f000000>, /* 496 MB at 512 MB */ - <0x00000001 0x10000000 0x00000001 0xb0000000>; /* 6912 MB at 4352MB */ - }; - cpu_clk: cpu_clk { #clock-cells = <0>; compatible = "fixed-clock"; @@ -52,6 +44,13 @@ 0 0x40000000 0 0x40000000 0 0x40000000 0xfe 0x00000000 0xfe 0x00000000 0 0x40000000>; + isa@18000000 { + compatible = "isa"; + #size-cells = <1>; + #address-cells = <2>; + ranges = <1 0x0 0x0 0x18000000 0x4000>; + }; + pm: reset-controller@1fe07000 { compatible = "loongson,ls2k-pm"; reg = <0 0x1fe07000 0 0x422>; @@ -100,8 +99,8 @@ rtc0: rtc@1fe07800 { compatible = "loongson,ls2k1000-rtc"; reg = <0 0x1fe07800 0 0x78>; - interrupt-parent = <&liointc0>; - interrupts = <60 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent = <&liointc1>; + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; }; uart0: serial@1fe00000 { @@ -109,7 +108,7 @@ reg = <0 0x1fe00000 0 0x8>; clock-frequency = <125000000>; interrupt-parent = <&liointc0>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; no-loopback-test; }; @@ -118,7 +117,6 @@ device_type = "pci"; #address-cells = <3>; #size-cells = <2>; - #interrupt-cells = <2>; reg = <0 0x1a000000 0 0x02000000>, <0xfe 0x00000000 0 0x20000000>; @@ -133,11 +131,12 @@ "pciclass0c03"; reg = <0x1800 0x0 0x0 0x0 0x0>; - interrupts = <12 IRQ_TYPE_LEVEL_LOW>, - <13 IRQ_TYPE_LEVEL_LOW>; + interrupts = <12 IRQ_TYPE_LEVEL_HIGH>, + <13 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "macirq", "eth_lpi"; interrupt-parent = <&liointc0>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; + phy-handle = <&phy1>; mdio { #address-cells = <1>; #size-cells = <0>; @@ -156,11 +155,12 @@ "loongson, pci-gmac"; reg = <0x1900 0x0 0x0 0x0 0x0>; - interrupts = <14 IRQ_TYPE_LEVEL_LOW>, - <15 IRQ_TYPE_LEVEL_LOW>; + interrupts = <14 IRQ_TYPE_LEVEL_HIGH>, + <15 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "macirq", "eth_lpi"; interrupt-parent = <&liointc0>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; + phy-handle = <&phy1>; mdio { #address-cells = <1>; #size-cells = <0>; @@ -178,7 +178,7 @@ "pciclass0c03"; reg = <0x2100 0x0 0x0 0x0 0x0>; - interrupts = <18 IRQ_TYPE_LEVEL_LOW>; + interrupts = <18 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&liointc1>; }; @@ -189,7 +189,7 @@ "pciclass0c03"; reg = <0x2200 0x0 0x0 0x0 0x0>; - interrupts = <19 IRQ_TYPE_LEVEL_LOW>; + interrupts = <19 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&liointc1>; }; @@ -200,97 +200,121 @@ "pciclass0106"; reg = <0x4000 0x0 0x0 0x0 0x0>; - interrupts = <19 IRQ_TYPE_LEVEL_LOW>; + interrupts = <19 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&liointc0>; }; - pci_bridge@9,0 { + pcie@9,0 { compatible = "pci0014,7a19.0", "pci0014,7a19", "pciclass060400", "pciclass0604"; reg = <0x4800 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; #interrupt-cells = <1>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&liointc1>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &liointc1 0 IRQ_TYPE_LEVEL_LOW>; + interrupt-map = <0 0 0 0 &liointc1 0 IRQ_TYPE_LEVEL_HIGH>; + ranges; external-facing; }; - pci_bridge@a,0 { + pcie@a,0 { compatible = "pci0014,7a09.0", "pci0014,7a09", "pciclass060400", "pciclass0604"; reg = <0x5000 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; #interrupt-cells = <1>; - interrupts = <1 IRQ_TYPE_LEVEL_LOW>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&liointc1>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &liointc1 1 IRQ_TYPE_LEVEL_LOW>; + interrupt-map = <0 0 0 0 &liointc1 1 IRQ_TYPE_LEVEL_HIGH>; + ranges; external-facing; }; - pci_bridge@b,0 { + pcie@b,0 { compatible = "pci0014,7a09.0", "pci0014,7a09", "pciclass060400", "pciclass0604"; reg = <0x5800 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; #interrupt-cells = <1>; - interrupts = <2 IRQ_TYPE_LEVEL_LOW>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&liointc1>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &liointc1 2 IRQ_TYPE_LEVEL_LOW>; + interrupt-map = <0 0 0 0 &liointc1 2 IRQ_TYPE_LEVEL_HIGH>; + ranges; external-facing; }; - pci_bridge@c,0 { + pcie@c,0 { compatible = "pci0014,7a09.0", "pci0014,7a09", "pciclass060400", "pciclass0604"; reg = <0x6000 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; #interrupt-cells = <1>; - interrupts = <3 IRQ_TYPE_LEVEL_LOW>; + interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&liointc1>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &liointc1 3 IRQ_TYPE_LEVEL_LOW>; + interrupt-map = <0 0 0 0 &liointc1 3 IRQ_TYPE_LEVEL_HIGH>; + ranges; external-facing; }; - pci_bridge@d,0 { + pcie@d,0 { compatible = "pci0014,7a19.0", "pci0014,7a19", "pciclass060400", "pciclass0604"; reg = <0x6800 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; #interrupt-cells = <1>; - interrupts = <4 IRQ_TYPE_LEVEL_LOW>; + interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&liointc1>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &liointc1 4 IRQ_TYPE_LEVEL_LOW>; + interrupt-map = <0 0 0 0 &liointc1 4 IRQ_TYPE_LEVEL_HIGH>; + ranges; external-facing; }; - pci_bridge@e,0 { + pcie@e,0 { compatible = "pci0014,7a09.0", "pci0014,7a09", "pciclass060400", "pciclass0604"; reg = <0x7000 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; #interrupt-cells = <1>; - interrupts = <5 IRQ_TYPE_LEVEL_LOW>; + interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&liointc1>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &liointc1 5 IRQ_TYPE_LEVEL_LOW>; + interrupt-map = <0 0 0 0 &liointc1 5 IRQ_TYPE_LEVEL_HIGH>; + ranges; external-facing; }; --- linux-xilinx-6.8.0.orig/arch/mips/boot/dts/loongson/loongson64g_4core_ls7a.dts +++ linux-xilinx-6.8.0/arch/mips/boot/dts/loongson/loongson64g_4core_ls7a.dts @@ -33,6 +33,7 @@ compatible = "loongson,pch-msi-1.0"; reg = <0 0x2ff00000 0 0x8>; interrupt-controller; + #interrupt-cells = <1>; msi-controller; loongson,msi-base-vec = <64>; loongson,msi-num-vecs = <192>; --- linux-xilinx-6.8.0.orig/arch/mips/boot/dts/loongson/ls7a-pch.dtsi +++ linux-xilinx-6.8.0/arch/mips/boot/dts/loongson/ls7a-pch.dtsi @@ -70,7 +70,6 @@ device_type = "pci"; #address-cells = <3>; #size-cells = <2>; - #interrupt-cells = <2>; msi-parent = <&msi>; reg = <0 0x1a000000 0 0x02000000>, @@ -234,7 +233,7 @@ }; }; - pci_bridge@9,0 { + pcie@9,0 { compatible = "pci0014,7a19.1", "pci0014,7a19", "pciclass060400", @@ -244,12 +243,16 @@ interrupts = <32 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&pic>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &pic 32 IRQ_TYPE_LEVEL_HIGH>; + ranges; }; - pci_bridge@a,0 { + pcie@a,0 { compatible = "pci0014,7a09.1", "pci0014,7a09", "pciclass060400", @@ -259,12 +262,16 @@ interrupts = <33 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&pic>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &pic 33 IRQ_TYPE_LEVEL_HIGH>; + ranges; }; - pci_bridge@b,0 { + pcie@b,0 { compatible = "pci0014,7a09.1", "pci0014,7a09", "pciclass060400", @@ -274,12 +281,16 @@ interrupts = <34 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&pic>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &pic 34 IRQ_TYPE_LEVEL_HIGH>; + ranges; }; - pci_bridge@c,0 { + pcie@c,0 { compatible = "pci0014,7a09.1", "pci0014,7a09", "pciclass060400", @@ -289,12 +300,16 @@ interrupts = <35 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&pic>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &pic 35 IRQ_TYPE_LEVEL_HIGH>; + ranges; }; - pci_bridge@d,0 { + pcie@d,0 { compatible = "pci0014,7a19.1", "pci0014,7a19", "pciclass060400", @@ -304,12 +319,16 @@ interrupts = <36 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&pic>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &pic 36 IRQ_TYPE_LEVEL_HIGH>; + ranges; }; - pci_bridge@e,0 { + pcie@e,0 { compatible = "pci0014,7a09.1", "pci0014,7a09", "pciclass060400", @@ -319,12 +338,16 @@ interrupts = <37 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&pic>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &pic 37 IRQ_TYPE_LEVEL_HIGH>; + ranges; }; - pci_bridge@f,0 { + pcie@f,0 { compatible = "pci0014,7a29.1", "pci0014,7a29", "pciclass060400", @@ -334,12 +357,16 @@ interrupts = <40 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&pic>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &pic 40 IRQ_TYPE_LEVEL_HIGH>; + ranges; }; - pci_bridge@10,0 { + pcie@10,0 { compatible = "pci0014,7a19.1", "pci0014,7a19", "pciclass060400", @@ -349,12 +376,16 @@ interrupts = <41 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&pic>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &pic 41 IRQ_TYPE_LEVEL_HIGH>; + ranges; }; - pci_bridge@11,0 { + pcie@11,0 { compatible = "pci0014,7a29.1", "pci0014,7a29", "pciclass060400", @@ -364,12 +395,16 @@ interrupts = <42 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&pic>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &pic 42 IRQ_TYPE_LEVEL_HIGH>; + ranges; }; - pci_bridge@12,0 { + pcie@12,0 { compatible = "pci0014,7a19.1", "pci0014,7a19", "pciclass060400", @@ -379,12 +414,16 @@ interrupts = <43 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&pic>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &pic 43 IRQ_TYPE_LEVEL_HIGH>; + ranges; }; - pci_bridge@13,0 { + pcie@13,0 { compatible = "pci0014,7a29.1", "pci0014,7a29", "pciclass060400", @@ -394,12 +433,16 @@ interrupts = <38 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&pic>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &pic 38 IRQ_TYPE_LEVEL_HIGH>; + ranges; }; - pci_bridge@14,0 { + pcie@14,0 { compatible = "pci0014,7a19.1", "pci0014,7a19", "pciclass060400", @@ -409,9 +452,13 @@ interrupts = <39 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&pic>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &pic 39 IRQ_TYPE_LEVEL_HIGH>; + ranges; }; }; --- linux-xilinx-6.8.0.orig/arch/mips/include/asm/mach-loongson64/boot_param.h +++ linux-xilinx-6.8.0/arch/mips/include/asm/mach-loongson64/boot_param.h @@ -42,12 +42,14 @@ Legacy_1B = 0x5, Legacy_2G = 0x6, Legacy_2H = 0x7, + Legacy_2K = 0x8, Loongson_1A = 0x100, Loongson_1B = 0x101, Loongson_2E = 0x200, Loongson_2F = 0x201, Loongson_2G = 0x202, Loongson_2H = 0x203, + Loongson_2K = 0x204, Loongson_3A = 0x300, Loongson_3B = 0x301 }; --- linux-xilinx-6.8.0.orig/arch/mips/include/asm/mips-cm.h +++ linux-xilinx-6.8.0/arch/mips/include/asm/mips-cm.h @@ -33,6 +33,19 @@ */ extern phys_addr_t __mips_cm_phys_base(void); +/** + * mips_cm_l2sync_phys_base - retrieve the physical base address of the CM + * L2-sync region + * + * This function returns the physical base address of the Coherence Manager + * L2-cache only region. It provides a default implementation which reads the + * CMGCRL2OnlySyncBase register where available or returns a 4K region just + * behind the CM GCR base address. It may be overridden by platforms which + * determine this address in a different way by defining a function with the + * same prototype. + */ +extern phys_addr_t mips_cm_l2sync_phys_base(void); + /* * mips_cm_is64 - determine CM register width * @@ -228,6 +241,10 @@ GCR_ACCESSOR_RO(32, 0x0f0, cpc_status) #define CM_GCR_CPC_STATUS_EX BIT(0) +/* GCR_ACCESS - Controls core/IOCU access to GCRs */ +GCR_ACCESSOR_RW(32, 0x120, access_cm3) +#define CM_GCR_ACCESS_ACCESSEN GENMASK(7, 0) + /* GCR_L2_CONFIG - Indicates L2 cache configuration when Config5.L2C=1 */ GCR_ACCESSOR_RW(32, 0x130, l2_config) #define CM_GCR_L2_CONFIG_BYPASS BIT(20) --- linux-xilinx-6.8.0.orig/arch/mips/include/asm/mipsregs.h +++ linux-xilinx-6.8.0/arch/mips/include/asm/mipsregs.h @@ -2078,7 +2078,14 @@ _ASM_INSN_IF_MIPS(0x4200000c) \ _ASM_INSN32_IF_MM(0x0000517c) #else /* !TOOLCHAIN_SUPPORTS_VIRT */ -#define _ASM_SET_VIRT ".set\tvirt\n\t" +#if MIPS_ISA_REV >= 5 +#define _ASM_SET_VIRT_ISA +#elif defined(CONFIG_64BIT) +#define _ASM_SET_VIRT_ISA ".set\tmips64r5\n\t" +#else +#define _ASM_SET_VIRT_ISA ".set\tmips32r5\n\t" +#endif +#define _ASM_SET_VIRT _ASM_SET_VIRT_ISA ".set\tvirt\n\t" #define _ASM_SET_MFGC0 _ASM_SET_VIRT #define _ASM_SET_DMFGC0 _ASM_SET_VIRT #define _ASM_SET_MTGC0 _ASM_SET_VIRT @@ -2099,7 +2106,6 @@ ({ int __res; \ __asm__ __volatile__( \ ".set\tpush\n\t" \ - ".set\tmips32r5\n\t" \ _ASM_SET_MFGC0 \ "mfgc0\t%0, " #source ", %1\n\t" \ _ASM_UNSET_MFGC0 \ @@ -2113,7 +2119,6 @@ ({ unsigned long long __res; \ __asm__ __volatile__( \ ".set\tpush\n\t" \ - ".set\tmips64r5\n\t" \ _ASM_SET_DMFGC0 \ "dmfgc0\t%0, " #source ", %1\n\t" \ _ASM_UNSET_DMFGC0 \ @@ -2127,7 +2132,6 @@ do { \ __asm__ __volatile__( \ ".set\tpush\n\t" \ - ".set\tmips32r5\n\t" \ _ASM_SET_MTGC0 \ "mtgc0\t%z0, " #register ", %1\n\t" \ _ASM_UNSET_MTGC0 \ @@ -2140,7 +2144,6 @@ do { \ __asm__ __volatile__( \ ".set\tpush\n\t" \ - ".set\tmips64r5\n\t" \ _ASM_SET_DMTGC0 \ "dmtgc0\t%z0, " #register ", %1\n\t" \ _ASM_UNSET_DMTGC0 \ --- linux-xilinx-6.8.0.orig/arch/mips/include/asm/ptrace.h +++ linux-xilinx-6.8.0/arch/mips/include/asm/ptrace.h @@ -159,7 +159,7 @@ #define exception_ip(regs) exception_ip(regs) #define profile_pc(regs) instruction_pointer(regs) -extern asmlinkage long syscall_trace_enter(struct pt_regs *regs, long syscall); +extern asmlinkage long syscall_trace_enter(struct pt_regs *regs); extern asmlinkage void syscall_trace_leave(struct pt_regs *regs); extern void die(const char *, struct pt_regs *) __noreturn; --- linux-xilinx-6.8.0.orig/arch/mips/include/asm/switch_to.h +++ linux-xilinx-6.8.0/arch/mips/include/asm/switch_to.h @@ -97,7 +97,7 @@ } \ } while (0) #else -# define __sanitize_fcr31(next) +# define __sanitize_fcr31(next) do { (void) (next); } while (0) #endif /* --- linux-xilinx-6.8.0.orig/arch/mips/kernel/asm-offsets.c +++ linux-xilinx-6.8.0/arch/mips/kernel/asm-offsets.c @@ -101,6 +101,7 @@ OFFSET(TI_CPU, thread_info, cpu); OFFSET(TI_PRE_COUNT, thread_info, preempt_count); OFFSET(TI_REGS, thread_info, regs); + OFFSET(TI_SYSCALL, thread_info, syscall); DEFINE(_THREAD_SIZE, THREAD_SIZE); DEFINE(_THREAD_MASK, THREAD_MASK); DEFINE(_IRQ_STACK_SIZE, IRQ_STACK_SIZE); --- linux-xilinx-6.8.0.orig/arch/mips/kernel/cevt-r4k.c +++ linux-xilinx-6.8.0/arch/mips/kernel/cevt-r4k.c @@ -303,13 +303,6 @@ if (!c0_compare_int_usable()) return -ENXIO; - /* - * With vectored interrupts things are getting platform specific. - * get_c0_compare_int is a hook to allow a platform to return the - * interrupt number of its liking. - */ - irq = get_c0_compare_int(); - cd = &per_cpu(mips_clockevent_device, cpu); cd->name = "MIPS"; @@ -320,7 +313,6 @@ min_delta = calculate_min_delta(); cd->rating = 300; - cd->irq = irq; cd->cpumask = cpumask_of(cpu); cd->set_next_event = mips_next_event; cd->event_handler = mips_event_handler; @@ -332,6 +324,13 @@ cp0_timer_irq_installed = 1; + /* + * With vectored interrupts things are getting platform specific. + * get_c0_compare_int is a hook to allow a platform to return the + * interrupt number of its liking. + */ + irq = get_c0_compare_int(); + if (request_irq(irq, c0_compare_interrupt, flags, "timer", c0_compare_interrupt)) pr_err("Failed to request irq %d (timer)\n", irq); --- linux-xilinx-6.8.0.orig/arch/mips/kernel/cmpxchg.c +++ linux-xilinx-6.8.0/arch/mips/kernel/cmpxchg.c @@ -102,3 +102,4 @@ return old; } } +EXPORT_SYMBOL(__cmpxchg_small); --- linux-xilinx-6.8.0.orig/arch/mips/kernel/cpu-probe.c +++ linux-xilinx-6.8.0/arch/mips/kernel/cpu-probe.c @@ -1724,12 +1724,16 @@ c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_CAM | MIPS_ASE_LOONGSON_EXT | MIPS_ASE_LOONGSON_EXT2); c->ases &= ~MIPS_ASE_VZ; /* VZ of Loongson-3A2000/3000 is incomplete */ + change_c0_config6(LOONGSON_CONF6_EXTIMER | LOONGSON_CONF6_INTIMER, + LOONGSON_CONF6_INTIMER); break; case PRID_IMP_LOONGSON_64G: __cpu_name[cpu] = "ICT Loongson-3"; set_elf_platform(cpu, "loongson3a"); set_isa(c, MIPS_CPU_ISA_M64R2); decode_cpucfg(c); + change_c0_config6(LOONGSON_CONF6_EXTIMER | LOONGSON_CONF6_INTIMER, + LOONGSON_CONF6_INTIMER); break; default: panic("Unknown Loongson Processor ID!"); --- linux-xilinx-6.8.0.orig/arch/mips/kernel/ftrace.c +++ linux-xilinx-6.8.0/arch/mips/kernel/ftrace.c @@ -248,7 +248,7 @@ #define S_R_SP (0xafb0 << 16) /* s{d,w} R, offset(sp) */ #define OFFSET_MASK 0xffff /* stack offset range: 0 ~ PT_SIZE */ -unsigned long ftrace_get_parent_ra_addr(unsigned long self_ra, unsigned long +static unsigned long ftrace_get_parent_ra_addr(unsigned long self_ra, unsigned long old_parent_ra, unsigned long parent_ra_addr, unsigned long fp) { unsigned long sp, ip, tmp; --- linux-xilinx-6.8.0.orig/arch/mips/kernel/mips-cm.c +++ linux-xilinx-6.8.0/arch/mips/kernel/mips-cm.c @@ -201,7 +201,7 @@ phys_addr_t mips_cm_phys_base(void) __attribute__((weak, alias("__mips_cm_phys_base"))); -static phys_addr_t __mips_cm_l2sync_phys_base(void) +phys_addr_t __weak mips_cm_l2sync_phys_base(void) { u32 base_reg; @@ -217,9 +217,6 @@ return mips_cm_phys_base() + MIPS_CM_GCR_SIZE; } -phys_addr_t mips_cm_l2sync_phys_base(void) - __attribute__((weak, alias("__mips_cm_l2sync_phys_base"))); - static void mips_cm_probe_l2sync(void) { unsigned major_rev; --- linux-xilinx-6.8.0.orig/arch/mips/kernel/prom.c +++ linux-xilinx-6.8.0/arch/mips/kernel/prom.c @@ -41,7 +41,7 @@ void __init __dt_setup_arch(void *bph) { - if (!early_init_dt_scan(bph)) + if (!early_init_dt_scan(bph, __pa(bph))) return; mips_set_machine_name(of_flat_dt_get_machine_name()); --- linux-xilinx-6.8.0.orig/arch/mips/kernel/ptrace.c +++ linux-xilinx-6.8.0/arch/mips/kernel/ptrace.c @@ -1317,16 +1317,13 @@ * Notification of system call entry/exit * - triggered by current->work.syscall_trace */ -asmlinkage long syscall_trace_enter(struct pt_regs *regs, long syscall) +asmlinkage long syscall_trace_enter(struct pt_regs *regs) { user_exit(); - current_thread_info()->syscall = syscall; - if (test_thread_flag(TIF_SYSCALL_TRACE)) { if (ptrace_report_syscall_entry(regs)) return -1; - syscall = current_thread_info()->syscall; } #ifdef CONFIG_SECCOMP @@ -1335,7 +1332,7 @@ struct seccomp_data sd; unsigned long args[6]; - sd.nr = syscall; + sd.nr = current_thread_info()->syscall; sd.arch = syscall_get_arch(current); syscall_get_arguments(current, regs, args); for (i = 0; i < 6; i++) @@ -1345,23 +1342,23 @@ ret = __secure_computing(&sd); if (ret == -1) return ret; - syscall = current_thread_info()->syscall; } #endif if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) trace_sys_enter(regs, regs->regs[2]); - audit_syscall_entry(syscall, regs->regs[4], regs->regs[5], + audit_syscall_entry(current_thread_info()->syscall, + regs->regs[4], regs->regs[5], regs->regs[6], regs->regs[7]); /* * Negative syscall numbers are mistaken for rejected syscalls, but * won't have had the return value set appropriately, so we do so now. */ - if (syscall < 0) + if (current_thread_info()->syscall < 0) syscall_set_return_value(current, regs, -ENOSYS, 0); - return syscall; + return current_thread_info()->syscall; } /* --- linux-xilinx-6.8.0.orig/arch/mips/kernel/relocate.c +++ linux-xilinx-6.8.0/arch/mips/kernel/relocate.c @@ -337,7 +337,7 @@ #if defined(CONFIG_USE_OF) /* Deal with the device tree */ fdt = plat_get_fdt(); - early_init_dt_scan(fdt); + early_init_dt_scan(fdt, __pa(fdt)); if (boot_command_line[0]) { /* Boot command line was passed in device tree */ strscpy(arcs_cmdline, boot_command_line, COMMAND_LINE_SIZE); --- linux-xilinx-6.8.0.orig/arch/mips/kernel/scall32-o32.S +++ linux-xilinx-6.8.0/arch/mips/kernel/scall32-o32.S @@ -77,6 +77,18 @@ PTR_WD load_a7, bad_stack_a7 .previous + /* + * syscall number is in v0 unless we called syscall(__NR_###) + * where the real syscall number is in a0 + */ + subu t2, v0, __NR_O32_Linux + bnez t2, 1f /* __NR_syscall at offset 0 */ + LONG_S a0, TI_SYSCALL($28) # Save a0 as syscall number + b 2f +1: + LONG_S v0, TI_SYSCALL($28) # Save v0 as syscall number +2: + lw t0, TI_FLAGS($28) # syscall tracing enabled? li t1, _TIF_WORK_SYSCALL_ENTRY and t0, t1 @@ -114,16 +126,7 @@ SAVE_STATIC move a0, sp - /* - * syscall number is in v0 unless we called syscall(__NR_###) - * where the real syscall number is in a0 - */ - move a1, v0 - subu t2, v0, __NR_O32_Linux - bnez t2, 1f /* __NR_syscall at offset 0 */ - lw a1, PT_R4(sp) - -1: jal syscall_trace_enter + jal syscall_trace_enter bltz v0, 1f # seccomp failed? Skip syscall --- linux-xilinx-6.8.0.orig/arch/mips/kernel/scall64-n32.S +++ linux-xilinx-6.8.0/arch/mips/kernel/scall64-n32.S @@ -44,6 +44,8 @@ sd a3, PT_R26(sp) # save a3 for syscall restarting + LONG_S v0, TI_SYSCALL($28) # Store syscall number + li t1, _TIF_WORK_SYSCALL_ENTRY LONG_L t0, TI_FLAGS($28) # syscall tracing enabled? and t0, t1, t0 @@ -72,7 +74,6 @@ n32_syscall_trace_entry: SAVE_STATIC move a0, sp - move a1, v0 jal syscall_trace_enter bltz v0, 1f # seccomp failed? Skip syscall --- linux-xilinx-6.8.0.orig/arch/mips/kernel/scall64-n64.S +++ linux-xilinx-6.8.0/arch/mips/kernel/scall64-n64.S @@ -46,6 +46,8 @@ sd a3, PT_R26(sp) # save a3 for syscall restarting + LONG_S v0, TI_SYSCALL($28) # Store syscall number + li t1, _TIF_WORK_SYSCALL_ENTRY LONG_L t0, TI_FLAGS($28) # syscall tracing enabled? and t0, t1, t0 @@ -82,7 +84,6 @@ syscall_trace_entry: SAVE_STATIC move a0, sp - move a1, v0 jal syscall_trace_enter bltz v0, 1f # seccomp failed? Skip syscall --- linux-xilinx-6.8.0.orig/arch/mips/kernel/scall64-o32.S +++ linux-xilinx-6.8.0/arch/mips/kernel/scall64-o32.S @@ -79,6 +79,22 @@ PTR_WD load_a7, bad_stack_a7 .previous + /* + * absolute syscall number is in v0 unless we called syscall(__NR_###) + * where the real syscall number is in a0 + * note: NR_syscall is the first O32 syscall but the macro is + * only defined when compiling with -mabi=32 (CONFIG_32BIT) + * therefore __NR_O32_Linux is used (4000) + */ + + subu t2, v0, __NR_O32_Linux + bnez t2, 1f /* __NR_syscall at offset 0 */ + LONG_S a0, TI_SYSCALL($28) # Save a0 as syscall number + b 2f +1: + LONG_S v0, TI_SYSCALL($28) # Save v0 as syscall number +2: + li t1, _TIF_WORK_SYSCALL_ENTRY LONG_L t0, TI_FLAGS($28) # syscall tracing enabled? and t0, t1, t0 @@ -113,22 +129,7 @@ sd a7, PT_R11(sp) # For indirect syscalls move a0, sp - /* - * absolute syscall number is in v0 unless we called syscall(__NR_###) - * where the real syscall number is in a0 - * note: NR_syscall is the first O32 syscall but the macro is - * only defined when compiling with -mabi=32 (CONFIG_32BIT) - * therefore __NR_O32_Linux is used (4000) - */ - .set push - .set reorder - subu t1, v0, __NR_O32_Linux - move a1, v0 - bnez t1, 1f /* __NR_syscall at offset 0 */ - ld a1, PT_R4(sp) /* Arg1 for __NR_syscall case */ - .set pop - -1: jal syscall_trace_enter + jal syscall_trace_enter bltz v0, 1f # seccomp failed? Skip syscall --- linux-xilinx-6.8.0.orig/arch/mips/kernel/smp-cps.c +++ linux-xilinx-6.8.0/arch/mips/kernel/smp-cps.c @@ -222,7 +222,10 @@ write_gcr_co_reset_ext_base(CM_GCR_Cx_RESET_EXT_BASE_UEB); /* Ensure the core can access the GCRs */ - set_gcr_access(1 << core); + if (mips_cm_revision() < CM_REV_CM3) + set_gcr_access(1 << core); + else + set_gcr_access_cm3(1 << core); if (mips_cpc_present()) { /* Reset the core */ --- linux-xilinx-6.8.0.orig/arch/mips/kernel/syscalls/syscall_n32.tbl +++ linux-xilinx-6.8.0/arch/mips/kernel/syscalls/syscall_n32.tbl @@ -354,7 +354,7 @@ 412 n32 utimensat_time64 sys_utimensat 413 n32 pselect6_time64 compat_sys_pselect6_time64 414 n32 ppoll_time64 compat_sys_ppoll_time64 -416 n32 io_pgetevents_time64 sys_io_pgetevents +416 n32 io_pgetevents_time64 compat_sys_io_pgetevents_time64 417 n32 recvmmsg_time64 compat_sys_recvmmsg_time64 418 n32 mq_timedsend_time64 sys_mq_timedsend 419 n32 mq_timedreceive_time64 sys_mq_timedreceive --- linux-xilinx-6.8.0.orig/arch/mips/kernel/syscalls/syscall_o32.tbl +++ linux-xilinx-6.8.0/arch/mips/kernel/syscalls/syscall_o32.tbl @@ -27,7 +27,7 @@ 17 o32 break sys_ni_syscall # 18 was sys_stat 18 o32 unused18 sys_ni_syscall -19 o32 lseek sys_lseek +19 o32 lseek sys_lseek compat_sys_lseek 20 o32 getpid sys_getpid 21 o32 mount sys_mount 22 o32 umount sys_oldumount @@ -403,7 +403,7 @@ 412 o32 utimensat_time64 sys_utimensat sys_utimensat 413 o32 pselect6_time64 sys_pselect6 compat_sys_pselect6_time64 414 o32 ppoll_time64 sys_ppoll compat_sys_ppoll_time64 -416 o32 io_pgetevents_time64 sys_io_pgetevents sys_io_pgetevents +416 o32 io_pgetevents_time64 sys_io_pgetevents compat_sys_io_pgetevents_time64 417 o32 recvmmsg_time64 sys_recvmmsg compat_sys_recvmmsg_time64 418 o32 mq_timedsend_time64 sys_mq_timedsend sys_mq_timedsend 419 o32 mq_timedreceive_time64 sys_mq_timedreceive sys_mq_timedreceive --- linux-xilinx-6.8.0.orig/arch/mips/kvm/mips.c +++ linux-xilinx-6.8.0/arch/mips/kvm/mips.c @@ -436,7 +436,7 @@ vcpu->mmio_needed = 0; } - if (vcpu->run->immediate_exit) + if (!vcpu->wants_to_run) goto out; lose_fpu(1); --- linux-xilinx-6.8.0.orig/arch/mips/loongson64/boardinfo.c +++ linux-xilinx-6.8.0/arch/mips/loongson64/boardinfo.c @@ -21,13 +21,11 @@ "BIOS Info\n" "Vendor\t\t\t: %s\n" "Version\t\t\t: %s\n" - "ROM Size\t\t: %d KB\n" "Release Date\t\t: %s\n", strsep(&tmp_board_manufacturer, "-"), eboard->name, strsep(&tmp_bios_vendor, "-"), einter->description, - einter->size, especial->special_name); } static struct kobj_attribute boardinfo_attr = __ATTR(boardinfo, 0444, --- linux-xilinx-6.8.0.orig/arch/mips/loongson64/env.c +++ linux-xilinx-6.8.0/arch/mips/loongson64/env.c @@ -88,6 +88,12 @@ cpu_clock_freq = ecpu->cpu_clock_freq; loongson_sysconf.cputype = ecpu->cputype; switch (ecpu->cputype) { + case Legacy_2K: + case Loongson_2K: + smp_group[0] = 0x900000001fe11000; + loongson_sysconf.cores_per_node = 2; + loongson_sysconf.cores_per_package = 2; + break; case Legacy_3A: case Loongson_3A: loongson_sysconf.cores_per_node = 4; @@ -221,6 +227,8 @@ default: break; } + } else if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64R) { + loongson_fdt_blob = __dtb_loongson64_2core_2k1000_begin; } else if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64G) { if (loongson_sysconf.bridgetype == LS7A) loongson_fdt_blob = __dtb_loongson64g_4core_ls7a_begin; --- linux-xilinx-6.8.0.orig/arch/mips/loongson64/reset.c +++ linux-xilinx-6.8.0/arch/mips/loongson64/reset.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include @@ -21,36 +22,21 @@ #include #include -static void loongson_restart(char *command) +static int firmware_restart(struct sys_off_data *unusedd) { void (*fw_restart)(void) = (void *)loongson_sysconf.restart_addr; fw_restart(); - while (1) { - if (cpu_wait) - cpu_wait(); - } + return NOTIFY_DONE; } -static void loongson_poweroff(void) +static int firmware_poweroff(struct sys_off_data *unused) { void (*fw_poweroff)(void) = (void *)loongson_sysconf.poweroff_addr; fw_poweroff(); - while (1) { - if (cpu_wait) - cpu_wait(); - } -} - -static void loongson_halt(void) -{ - pr_notice("\n\n** You can safely turn off the power now **\n\n"); - while (1) { - if (cpu_wait) - cpu_wait(); - } + return NOTIFY_DONE; } #ifdef CONFIG_KEXEC_CORE @@ -154,9 +140,17 @@ static int __init mips_reboot_setup(void) { - _machine_restart = loongson_restart; - _machine_halt = loongson_halt; - pm_power_off = loongson_poweroff; + if (loongson_sysconf.restart_addr) { + register_sys_off_handler(SYS_OFF_MODE_RESTART, + SYS_OFF_PRIO_FIRMWARE, + firmware_restart, NULL); + } + + if (loongson_sysconf.poweroff_addr) { + register_sys_off_handler(SYS_OFF_MODE_POWER_OFF, + SYS_OFF_PRIO_FIRMWARE, + firmware_poweroff, NULL); + } #ifdef CONFIG_KEXEC_CORE kexec_argv = kmalloc(KEXEC_ARGV_SIZE, GFP_KERNEL); --- linux-xilinx-6.8.0.orig/arch/mips/loongson64/smp.c +++ linux-xilinx-6.8.0/arch/mips/loongson64/smp.c @@ -466,12 +466,25 @@ static void __init loongson3_smp_setup(void) { int i = 0, num = 0; /* i: physical id, num: logical id */ + int max_cpus = 0; init_cpu_possible(cpu_none_mask); + for (i = 0; i < ARRAY_SIZE(smp_group); i++) { + if (!smp_group[i]) + break; + max_cpus += loongson_sysconf.cores_per_node; + } + + if (max_cpus < loongson_sysconf.nr_cpus) { + pr_err("SMP Groups are less than the number of CPUs\n"); + loongson_sysconf.nr_cpus = max_cpus ? max_cpus : 1; + } + /* For unified kernel, NR_CPUS is the maximum possible value, * loongson_sysconf.nr_cpus is the really present value */ + i = 0; while (i < loongson_sysconf.nr_cpus) { if (loongson_sysconf.reserved_cpus_mask & (1< 4) return 0; delay *= 2; --- linux-xilinx-6.8.0.orig/arch/mips/pci/pci-legacy.c +++ linux-xilinx-6.8.0/arch/mips/pci/pci-legacy.c @@ -29,6 +29,14 @@ static int pci_initialized; +unsigned long pci_address_to_pio(phys_addr_t address) +{ + if (address > IO_SPACE_LIMIT) + return (unsigned long)-1; + + return (unsigned long) address; +} + /* * We need to avoid collisions with `mirrored' VGA ports * and other strange ISA hardware, so we always want the --- linux-xilinx-6.8.0.orig/arch/mips/pci/pcie-octeon.c +++ linux-xilinx-6.8.0/arch/mips/pci/pcie-octeon.c @@ -230,12 +230,18 @@ { union cvmx_pcie_address pcie_addr; union cvmx_pciercx_cfg006 pciercx_cfg006; + union cvmx_pciercx_cfg032 pciercx_cfg032; pciercx_cfg006.u32 = cvmx_pcie_cfgx_read(pcie_port, CVMX_PCIERCX_CFG006(pcie_port)); if ((bus <= pciercx_cfg006.s.pbnum) && (dev != 0)) return 0; + pciercx_cfg032.u32 = + cvmx_pcie_cfgx_read(pcie_port, CVMX_PCIERCX_CFG032(pcie_port)); + if ((pciercx_cfg032.s.dlla == 0) || (pciercx_cfg032.s.lt == 1)) + return 0; + pcie_addr.u64 = 0; pcie_addr.config.upper = 2; pcie_addr.config.io = 1; --- linux-xilinx-6.8.0.orig/arch/mips/sgi-ip30/ip30-console.c +++ linux-xilinx-6.8.0/arch/mips/sgi-ip30/ip30-console.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 #include +#include #include #include --- linux-xilinx-6.8.0.orig/arch/nios2/kernel/prom.c +++ linux-xilinx-6.8.0/arch/nios2/kernel/prom.c @@ -26,12 +26,12 @@ if (be32_to_cpup((__be32 *)CONFIG_NIOS2_DTB_PHYS_ADDR) == OF_DT_HEADER) { params = (void *)CONFIG_NIOS2_DTB_PHYS_ADDR; - early_init_dt_scan(params); + early_init_dt_scan(params, __pa(params)); return; } #endif if (be32_to_cpu((__be32) *dtb) == OF_DT_HEADER) params = (void *)__dtb_start; - early_init_dt_scan(params); + early_init_dt_scan(params, __pa(params)); } --- linux-xilinx-6.8.0.orig/arch/openrisc/Kconfig +++ linux-xilinx-6.8.0/arch/openrisc/Kconfig @@ -64,6 +64,9 @@ config LOCKDEP_SUPPORT def_bool y +config FIX_EARLYCON_MEM + def_bool y + menu "Processor type and features" choice --- linux-xilinx-6.8.0.orig/arch/openrisc/include/asm/fixmap.h +++ linux-xilinx-6.8.0/arch/openrisc/include/asm/fixmap.h @@ -26,59 +26,19 @@ #include #include -/* - * On OpenRISC we use these special fixed_addresses for doing ioremap - * early in the boot process before memory initialization is complete. - * This is used, in particular, by the early serial console code. - * - * It's not really 'fixmap', per se, but fits loosely into the same - * paradigm. - */ enum fixed_addresses { - /* - * FIX_IOREMAP entries are useful for mapping physical address - * space before ioremap() is useable, e.g. really early in boot - * before kmalloc() is working. - */ -#define FIX_N_IOREMAPS 32 - FIX_IOREMAP_BEGIN, - FIX_IOREMAP_END = FIX_IOREMAP_BEGIN + FIX_N_IOREMAPS - 1, + FIX_EARLYCON_MEM_BASE, __end_of_fixed_addresses }; #define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT) /* FIXADDR_BOTTOM might be a better name here... */ #define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) +#define FIXMAP_PAGE_IO PAGE_KERNEL_NOCACHE -#define __fix_to_virt(x) (FIXADDR_TOP - ((x) << PAGE_SHIFT)) -#define __virt_to_fix(x) ((FIXADDR_TOP - ((x)&PAGE_MASK)) >> PAGE_SHIFT) +extern void __set_fixmap(enum fixed_addresses idx, + phys_addr_t phys, pgprot_t flags); -/* - * 'index to address' translation. If anyone tries to use the idx - * directly without tranlation, we catch the bug with a NULL-deference - * kernel oops. Illegal ranges of incoming indices are caught too. - */ -static __always_inline unsigned long fix_to_virt(const unsigned int idx) -{ - /* - * this branch gets completely eliminated after inlining, - * except when someone tries to use fixaddr indices in an - * illegal way. (such as mixing up address types or using - * out-of-range indices). - * - * If it doesn't get removed, the linker will complain - * loudly with a reasonably clear error message.. - */ - if (idx >= __end_of_fixed_addresses) - BUG(); - - return __fix_to_virt(idx); -} - -static inline unsigned long virt_to_fix(const unsigned long vaddr) -{ - BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START); - return __virt_to_fix(vaddr); -} +#include #endif --- linux-xilinx-6.8.0.orig/arch/openrisc/kernel/prom.c +++ linux-xilinx-6.8.0/arch/openrisc/kernel/prom.c @@ -22,6 +22,6 @@ void __init early_init_devtree(void *params) { - early_init_dt_scan(params); + early_init_dt_scan(params, __pa(params)); memblock_allow_resize(); } --- linux-xilinx-6.8.0.orig/arch/openrisc/kernel/setup.c +++ linux-xilinx-6.8.0/arch/openrisc/kernel/setup.c @@ -255,6 +255,9 @@ void __init setup_arch(char **cmdline_p) { + /* setup memblock allocator */ + setup_memory(); + unflatten_and_copy_device_tree(); setup_cpuinfo(); @@ -278,9 +281,6 @@ } #endif - /* setup memblock allocator */ - setup_memory(); - /* paging_init() sets up the MMU and marks all pages as reserved */ paging_init(); --- linux-xilinx-6.8.0.orig/arch/openrisc/kernel/traps.c +++ linux-xilinx-6.8.0/arch/openrisc/kernel/traps.c @@ -180,29 +180,39 @@ asmlinkage void do_fpe_trap(struct pt_regs *regs, unsigned long address) { - int code = FPE_FLTUNK; - unsigned long fpcsr = regs->fpcsr; - - if (fpcsr & SPR_FPCSR_IVF) - code = FPE_FLTINV; - else if (fpcsr & SPR_FPCSR_OVF) - code = FPE_FLTOVF; - else if (fpcsr & SPR_FPCSR_UNF) - code = FPE_FLTUND; - else if (fpcsr & SPR_FPCSR_DZF) - code = FPE_FLTDIV; - else if (fpcsr & SPR_FPCSR_IXF) - code = FPE_FLTRES; - - /* Clear all flags */ - regs->fpcsr &= ~SPR_FPCSR_ALLF; - - force_sig_fault(SIGFPE, code, (void __user *)regs->pc); + if (user_mode(regs)) { + int code = FPE_FLTUNK; + unsigned long fpcsr = regs->fpcsr; + + if (fpcsr & SPR_FPCSR_IVF) + code = FPE_FLTINV; + else if (fpcsr & SPR_FPCSR_OVF) + code = FPE_FLTOVF; + else if (fpcsr & SPR_FPCSR_UNF) + code = FPE_FLTUND; + else if (fpcsr & SPR_FPCSR_DZF) + code = FPE_FLTDIV; + else if (fpcsr & SPR_FPCSR_IXF) + code = FPE_FLTRES; + + /* Clear all flags */ + regs->fpcsr &= ~SPR_FPCSR_ALLF; + + force_sig_fault(SIGFPE, code, (void __user *)regs->pc); + } else { + pr_emerg("KERNEL: Illegal fpe exception 0x%.8lx\n", regs->pc); + die("Die:", regs, SIGFPE); + } } asmlinkage void do_trap(struct pt_regs *regs, unsigned long address) { - force_sig_fault(SIGTRAP, TRAP_BRKPT, (void __user *)regs->pc); + if (user_mode(regs)) { + force_sig_fault(SIGTRAP, TRAP_BRKPT, (void __user *)regs->pc); + } else { + pr_emerg("KERNEL: Illegal trap exception 0x%.8lx\n", regs->pc); + die("Die:", regs, SIGILL); + } } asmlinkage void do_unaligned_access(struct pt_regs *regs, unsigned long address) --- linux-xilinx-6.8.0.orig/arch/openrisc/mm/init.c +++ linux-xilinx-6.8.0/arch/openrisc/mm/init.c @@ -207,6 +207,43 @@ return; } +static int __init map_page(unsigned long va, phys_addr_t pa, pgprot_t prot) +{ + p4d_t *p4d; + pud_t *pud; + pmd_t *pmd; + pte_t *pte; + + p4d = p4d_offset(pgd_offset_k(va), va); + pud = pud_offset(p4d, va); + pmd = pmd_offset(pud, va); + pte = pte_alloc_kernel(pmd, va); + + if (pte == NULL) + return -ENOMEM; + + if (pgprot_val(prot)) + set_pte_at(&init_mm, va, pte, pfn_pte(pa >> PAGE_SHIFT, prot)); + else + pte_clear(&init_mm, va, pte); + + local_flush_tlb_page(NULL, va); + return 0; +} + +void __init __set_fixmap(enum fixed_addresses idx, + phys_addr_t phys, pgprot_t prot) +{ + unsigned long address = __fix_to_virt(idx); + + if (idx >= __end_of_fixed_addresses) { + BUG(); + return; + } + + map_page(address, phys, prot); +} + static const pgprot_t protection_map[16] = { [VM_NONE] = PAGE_NONE, [VM_READ] = PAGE_READONLY_X, --- linux-xilinx-6.8.0.orig/arch/parisc/Kconfig +++ linux-xilinx-6.8.0/arch/parisc/Kconfig @@ -12,12 +12,14 @@ select ARCH_HAS_ELF_RANDOMIZE select ARCH_HAS_STRICT_KERNEL_RWX select ARCH_HAS_STRICT_MODULE_RWX - select ARCH_HAS_UBSAN_SANITIZE_ALL + select ARCH_HAS_UBSAN select ARCH_HAS_PTE_SPECIAL select ARCH_NO_SG_CHAIN + select ARCH_SPLIT_ARG64 if !64BIT select ARCH_SUPPORTS_HUGETLBFS if PA20 select ARCH_SUPPORTS_MEMORY_FAILURE select ARCH_STACKWALK + select ARCH_HAS_CACHE_LINE_SIZE select ARCH_HAS_DEBUG_VM_PGTABLE select HAVE_RELIABLE_STACKTRACE select DMA_OPS @@ -56,8 +58,8 @@ select HAVE_ARCH_MMAP_RND_BITS select HAVE_ARCH_AUDITSYSCALL select HAVE_ARCH_HASH - select HAVE_ARCH_JUMP_LABEL - select HAVE_ARCH_JUMP_LABEL_RELATIVE + # select HAVE_ARCH_JUMP_LABEL + # select HAVE_ARCH_JUMP_LABEL_RELATIVE select HAVE_ARCH_KFENCE select HAVE_ARCH_SECCOMP_FILTER select HAVE_ARCH_TRACEHOOK @@ -84,6 +86,7 @@ select HAVE_SOFTIRQ_ON_OWN_STACK if IRQSTACKS select TRACE_IRQFLAGS_SUPPORT select HAVE_FUNCTION_DESCRIPTORS if 64BIT + select PCI_MSI_ARCH_FALLBACKS if PCI_MSI help The PA-RISC microprocessor is designed by Hewlett-Packard and used --- linux-xilinx-6.8.0.orig/arch/parisc/include/asm/assembly.h +++ linux-xilinx-6.8.0/arch/parisc/include/asm/assembly.h @@ -97,26 +97,28 @@ * version takes two arguments: a src and destination register. * However, the source and destination registers can not be * the same register. + * + * We use add,l to avoid clobbering the C/B bits in the PSW. */ .macro tophys grvirt, grphys - ldil L%(__PAGE_OFFSET), \grphys - sub \grvirt, \grphys, \grphys + ldil L%(-__PAGE_OFFSET), \grphys + addl \grvirt, \grphys, \grphys .endm - + .macro tovirt grphys, grvirt ldil L%(__PAGE_OFFSET), \grvirt - add \grphys, \grvirt, \grvirt + addl \grphys, \grvirt, \grvirt .endm .macro tophys_r1 gr - ldil L%(__PAGE_OFFSET), %r1 - sub \gr, %r1, \gr + ldil L%(-__PAGE_OFFSET), %r1 + addl \gr, %r1, \gr .endm - + .macro tovirt_r1 gr ldil L%(__PAGE_OFFSET), %r1 - add \gr, %r1, \gr + addl \gr, %r1, \gr .endm .macro delay value --- linux-xilinx-6.8.0.orig/arch/parisc/include/asm/cache.h +++ linux-xilinx-6.8.0/arch/parisc/include/asm/cache.h @@ -20,7 +20,16 @@ #define SMP_CACHE_BYTES L1_CACHE_BYTES -#define ARCH_DMA_MINALIGN L1_CACHE_BYTES +#ifdef CONFIG_PA20 +#define ARCH_DMA_MINALIGN 128 +#else +#define ARCH_DMA_MINALIGN 32 +#endif +#define ARCH_KMALLOC_MINALIGN 16 /* ldcw requires 16-byte alignment */ + +#define arch_slab_minalign() ((unsigned)dcache_stride) +#define cache_line_size() dcache_stride +#define dma_get_cache_alignment cache_line_size #define __read_mostly __section(".data..read_mostly") --- linux-xilinx-6.8.0.orig/arch/parisc/include/asm/cacheflush.h +++ linux-xilinx-6.8.0/arch/parisc/include/asm/cacheflush.h @@ -31,18 +31,17 @@ void flush_cache_all(void); void flush_cache_mm(struct mm_struct *mm); -void flush_kernel_dcache_page_addr(const void *addr); - #define flush_kernel_dcache_range(start,size) \ flush_kernel_dcache_range_asm((start), (start)+(size)); +/* The only way to flush a vmap range is to flush whole cache */ #define ARCH_IMPLEMENTS_FLUSH_KERNEL_VMAP_RANGE 1 void flush_kernel_vmap_range(void *vaddr, int size); void invalidate_kernel_vmap_range(void *vaddr, int size); -#define flush_cache_vmap(start, end) flush_cache_all() +void flush_cache_vmap(unsigned long start, unsigned long end); #define flush_cache_vmap_early(start, end) do { } while (0) -#define flush_cache_vunmap(start, end) flush_cache_all() +void flush_cache_vunmap(unsigned long start, unsigned long end); void flush_dcache_folio(struct folio *folio); #define flush_dcache_folio flush_dcache_folio @@ -77,17 +76,11 @@ void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end); -/* defined in pacache.S exported in cache.c used by flush_anon_page */ -void flush_dcache_page_asm(unsigned long phys_addr, unsigned long vaddr); - #define ARCH_HAS_FLUSH_ANON_PAGE void flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr); #define ARCH_HAS_FLUSH_ON_KUNMAP -static inline void kunmap_flush_on_unmap(const void *addr) -{ - flush_kernel_dcache_page_addr(addr); -} +void kunmap_flush_on_unmap(const void *addr); #endif /* _PARISC_CACHEFLUSH_H */ --- linux-xilinx-6.8.0.orig/arch/parisc/include/asm/checksum.h +++ linux-xilinx-6.8.0/arch/parisc/include/asm/checksum.h @@ -40,7 +40,7 @@ " addc %0, %5, %0\n" " addc %0, %3, %0\n" "1: ldws,ma 4(%1), %3\n" -" addib,< 0, %2, 1b\n" +" addib,> -1, %2, 1b\n" " addc %0, %3, %0\n" "\n" " extru %0, 31, 16, %4\n" @@ -126,6 +126,7 @@ ** Try to keep 4 registers with "live" values ahead of the ALU. */ +" depdi 0, 31, 32, %0\n"/* clear upper half of incoming checksum */ " ldd,ma 8(%1), %4\n" /* get 1st saddr word */ " ldd,ma 8(%2), %5\n" /* get 1st daddr word */ " add %4, %0, %0\n" @@ -137,8 +138,8 @@ " add,dc %3, %0, %0\n" /* fold in proto+len | carry bit */ " extrd,u %0, 31, 32, %4\n"/* copy upper half down */ " depdi 0, 31, 32, %0\n"/* clear upper half */ -" add %4, %0, %0\n" /* fold into 32-bits */ -" addc 0, %0, %0\n" /* add carry */ +" add,dc %4, %0, %0\n" /* fold into 32-bits, plus carry */ +" addc 0, %0, %0\n" /* add final carry */ #else @@ -163,7 +164,8 @@ " ldw,ma 4(%2), %7\n" /* 4th daddr */ " addc %6, %0, %0\n" " addc %7, %0, %0\n" -" addc %3, %0, %0\n" /* fold in proto+len, catch carry */ +" addc %3, %0, %0\n" /* fold in proto+len */ +" addc 0, %0, %0\n" /* add carry */ #endif : "=r" (sum), "=r" (saddr), "=r" (daddr), "=r" (len), --- linux-xilinx-6.8.0.orig/arch/parisc/include/asm/mman.h +++ linux-xilinx-6.8.0/arch/parisc/include/asm/mman.h @@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __ASM_MMAN_H__ +#define __ASM_MMAN_H__ + +#include +#include + +/* PARISC cannot allow mdwe as it needs writable stacks */ +static inline bool arch_memory_deny_write_exec_supported(void) +{ + return false; +} +#define arch_memory_deny_write_exec_supported arch_memory_deny_write_exec_supported + +static inline unsigned long arch_calc_vm_flag_bits(struct file *file, unsigned long flags) +{ + /* + * The stack on parisc grows upwards, so if userspace requests memory + * for a stack, mark it with VM_GROWSUP so that the stack expansion in + * the fault handler will work. + */ + if (flags & MAP_STACK) + return VM_GROWSUP; + + return 0; +} +#define arch_calc_vm_flag_bits(file, flags) arch_calc_vm_flag_bits(file, flags) + +#endif /* __ASM_MMAN_H__ */ --- linux-xilinx-6.8.0.orig/arch/parisc/include/asm/page.h +++ linux-xilinx-6.8.0/arch/parisc/include/asm/page.h @@ -16,6 +16,7 @@ #define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT) #define PAGE_MASK (~(PAGE_SIZE-1)) +#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA #ifndef __ASSEMBLY__ --- linux-xilinx-6.8.0.orig/arch/parisc/include/asm/pgtable.h +++ linux-xilinx-6.8.0/arch/parisc/include/asm/pgtable.h @@ -448,14 +448,17 @@ return pte; } +static inline pte_t ptep_get(pte_t *ptep) +{ + return READ_ONCE(*ptep); +} +#define ptep_get ptep_get + static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep) { pte_t pte; - if (!pte_young(*ptep)) - return 0; - - pte = *ptep; + pte = ptep_get(ptep); if (!pte_young(pte)) { return 0; } @@ -463,17 +466,10 @@ return 1; } -struct mm_struct; -static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) -{ - pte_t old_pte; - - old_pte = *ptep; - set_pte(ptep, __pte(0)); - - return old_pte; -} +int ptep_clear_flush_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep); +pte_t ptep_clear_flush(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep); +struct mm_struct; static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep) { set_pte(ptep, pte_wrprotect(*ptep)); @@ -511,7 +507,8 @@ #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG -#define __HAVE_ARCH_PTEP_GET_AND_CLEAR +#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH +#define __HAVE_ARCH_PTEP_CLEAR_FLUSH #define __HAVE_ARCH_PTEP_SET_WRPROTECT #define __HAVE_ARCH_PTE_SAME --- linux-xilinx-6.8.0.orig/arch/parisc/include/asm/signal.h +++ linux-xilinx-6.8.0/arch/parisc/include/asm/signal.h @@ -4,23 +4,11 @@ #include -#define _NSIG 64 -/* bits-per-word, where word apparently means 'long' not 'int' */ -#define _NSIG_BPW BITS_PER_LONG -#define _NSIG_WORDS (_NSIG / _NSIG_BPW) - # ifndef __ASSEMBLY__ /* Most things should be clean enough to redefine this at will, if care is taken to make libc match. */ -typedef unsigned long old_sigset_t; /* at least 32 bits */ - -typedef struct { - /* next_signal() assumes this is a long - no choice */ - unsigned long sig[_NSIG_WORDS]; -} sigset_t; - #include #endif /* !__ASSEMBLY */ --- linux-xilinx-6.8.0.orig/arch/parisc/include/uapi/asm/signal.h +++ linux-xilinx-6.8.0/arch/parisc/include/uapi/asm/signal.h @@ -57,10 +57,20 @@ #include +#define _NSIG 64 +#define _NSIG_BPW (sizeof(unsigned long) * 8) +#define _NSIG_WORDS (_NSIG / _NSIG_BPW) + # ifndef __ASSEMBLY__ # include +typedef unsigned long old_sigset_t; /* at least 32 bits */ + +typedef struct { + unsigned long sig[_NSIG_WORDS]; +} sigset_t; + /* Avoid too many header ordering problems. */ struct siginfo; --- linux-xilinx-6.8.0.orig/arch/parisc/kernel/cache.c +++ linux-xilinx-6.8.0/arch/parisc/kernel/cache.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -31,20 +32,31 @@ #include #include +#define PTR_PAGE_ALIGN_DOWN(addr) PTR_ALIGN_DOWN(addr, PAGE_SIZE) + +/* + * When nonzero, use _PAGE_ACCESSED bit to try to reduce the number + * of page flushes done flush_cache_page_if_present. There are some + * pros and cons in using this option. It may increase the risk of + * random segmentation faults. + */ +#define CONFIG_FLUSH_PAGE_ACCESSED 0 + int split_tlb __ro_after_init; int dcache_stride __ro_after_init; int icache_stride __ro_after_init; EXPORT_SYMBOL(dcache_stride); +/* Internal implementation in arch/parisc/kernel/pacache.S */ void flush_dcache_page_asm(unsigned long phys_addr, unsigned long vaddr); EXPORT_SYMBOL(flush_dcache_page_asm); void purge_dcache_page_asm(unsigned long phys_addr, unsigned long vaddr); void flush_icache_page_asm(unsigned long phys_addr, unsigned long vaddr); - -/* Internal implementation in arch/parisc/kernel/pacache.S */ void flush_data_cache_local(void *); /* flushes local data-cache only */ void flush_instruction_cache_local(void); /* flushes local code-cache only */ +static void flush_kernel_dcache_page_addr(const void *addr); + /* On some machines (i.e., ones with the Merced bus), there can be * only a single PxTLB broadcast at a time; this must be guaranteed * by software. We need a spinlock around all TLB flushes to ensure @@ -321,6 +333,18 @@ { if (!static_branch_likely(&parisc_has_cache)) return; + + /* + * The TLB is the engine of coherence on parisc. The CPU is + * entitled to speculate any page with a TLB mapping, so here + * we kill the mapping then flush the page along a special flush + * only alias mapping. This guarantees that the page is no-longer + * in the cache for any process and nor may it be speculatively + * read in (until the user or kernel specifically accesses it, + * of course). + */ + flush_tlb_page(vma, vmaddr); + preempt_disable(); flush_dcache_page_asm(physaddr, vmaddr); if (vma->vm_flags & VM_EXEC) @@ -328,46 +352,44 @@ preempt_enable(); } -static void flush_user_cache_page(struct vm_area_struct *vma, unsigned long vmaddr) +static void flush_kernel_dcache_page_addr(const void *addr) { - unsigned long flags, space, pgd, prot; -#ifdef CONFIG_TLB_PTLOCK - unsigned long pgd_lock; -#endif + unsigned long vaddr = (unsigned long)addr; + unsigned long flags; - vmaddr &= PAGE_MASK; + /* Purge TLB entry to remove translation on all CPUs */ + purge_tlb_start(flags); + pdtlb(SR_KERNEL, addr); + purge_tlb_end(flags); + /* Use tmpalias flush to prevent data cache move-in */ preempt_disable(); + flush_dcache_page_asm(__pa(vaddr), vaddr); + preempt_enable(); +} - /* Set context for flush */ - local_irq_save(flags); - prot = mfctl(8); - space = mfsp(SR_USER); - pgd = mfctl(25); -#ifdef CONFIG_TLB_PTLOCK - pgd_lock = mfctl(28); -#endif - switch_mm_irqs_off(NULL, vma->vm_mm, NULL); - local_irq_restore(flags); - - flush_user_dcache_range_asm(vmaddr, vmaddr + PAGE_SIZE); - if (vma->vm_flags & VM_EXEC) - flush_user_icache_range_asm(vmaddr, vmaddr + PAGE_SIZE); - flush_tlb_page(vma, vmaddr); +static void flush_kernel_icache_page_addr(const void *addr) +{ + unsigned long vaddr = (unsigned long)addr; + unsigned long flags; - /* Restore previous context */ - local_irq_save(flags); -#ifdef CONFIG_TLB_PTLOCK - mtctl(pgd_lock, 28); -#endif - mtctl(pgd, 25); - mtsp(space, SR_USER); - mtctl(prot, 8); - local_irq_restore(flags); + /* Purge TLB entry to remove translation on all CPUs */ + purge_tlb_start(flags); + pdtlb(SR_KERNEL, addr); + purge_tlb_end(flags); + /* Use tmpalias flush to prevent instruction cache move-in */ + preempt_disable(); + flush_icache_page_asm(__pa(vaddr), vaddr); preempt_enable(); } +void kunmap_flush_on_unmap(const void *addr) +{ + flush_kernel_dcache_page_addr(addr); +} +EXPORT_SYMBOL(kunmap_flush_on_unmap); + void flush_icache_pages(struct vm_area_struct *vma, struct page *page, unsigned int nr) { @@ -375,13 +397,16 @@ for (;;) { flush_kernel_dcache_page_addr(kaddr); - flush_kernel_icache_page(kaddr); + flush_kernel_icache_page_addr(kaddr); if (--nr == 0) break; kaddr += PAGE_SIZE; } } +/* + * Walk page directory for MM to find PTEP pointer for address ADDR. + */ static inline pte_t *get_ptep(struct mm_struct *mm, unsigned long addr) { pte_t *ptep = NULL; @@ -410,6 +435,41 @@ == (_PAGE_PRESENT | _PAGE_ACCESSED); } +/* + * Return user physical address. Returns 0 if page is not present. + */ +static inline unsigned long get_upa(struct mm_struct *mm, unsigned long addr) +{ + unsigned long flags, space, pgd, prot, pa; +#ifdef CONFIG_TLB_PTLOCK + unsigned long pgd_lock; +#endif + + /* Save context */ + local_irq_save(flags); + prot = mfctl(8); + space = mfsp(SR_USER); + pgd = mfctl(25); +#ifdef CONFIG_TLB_PTLOCK + pgd_lock = mfctl(28); +#endif + + /* Set context for lpa_user */ + switch_mm_irqs_off(NULL, mm, NULL); + pa = lpa_user(addr); + + /* Restore previous context */ +#ifdef CONFIG_TLB_PTLOCK + mtctl(pgd_lock, 28); +#endif + mtctl(pgd, 25); + mtsp(space, SR_USER); + mtctl(prot, 8); + local_irq_restore(flags); + + return pa; +} + void flush_dcache_folio(struct folio *folio) { struct address_space *mapping = folio_flush_mapping(folio); @@ -458,50 +518,23 @@ if (addr + nr * PAGE_SIZE > vma->vm_end) nr = (vma->vm_end - addr) / PAGE_SIZE; - if (parisc_requires_coherency()) { - for (i = 0; i < nr; i++) { - pte_t *ptep = get_ptep(vma->vm_mm, - addr + i * PAGE_SIZE); - if (!ptep) - continue; - if (pte_needs_flush(*ptep)) - flush_user_cache_page(vma, - addr + i * PAGE_SIZE); - /* Optimise accesses to the same table? */ - pte_unmap(ptep); - } - } else { + if (old_addr == 0 || (old_addr & (SHM_COLOUR - 1)) + != (addr & (SHM_COLOUR - 1))) { + for (i = 0; i < nr; i++) + __flush_cache_page(vma, + addr + i * PAGE_SIZE, + (pfn + i) * PAGE_SIZE); /* - * The TLB is the engine of coherence on parisc: - * The CPU is entitled to speculate any page - * with a TLB mapping, so here we kill the - * mapping then flush the page along a special - * flush only alias mapping. This guarantees that - * the page is no-longer in the cache for any - * process and nor may it be speculatively read - * in (until the user or kernel specifically - * accesses it, of course) + * Software is allowed to have any number + * of private mappings to a page. */ - for (i = 0; i < nr; i++) - flush_tlb_page(vma, addr + i * PAGE_SIZE); - if (old_addr == 0 || (old_addr & (SHM_COLOUR - 1)) - != (addr & (SHM_COLOUR - 1))) { - for (i = 0; i < nr; i++) - __flush_cache_page(vma, - addr + i * PAGE_SIZE, - (pfn + i) * PAGE_SIZE); - /* - * Software is allowed to have any number - * of private mappings to a page. - */ - if (!(vma->vm_flags & VM_SHARED)) - continue; - if (old_addr) - pr_err("INEQUIVALENT ALIASES 0x%lx and 0x%lx in file %pD\n", - old_addr, addr, vma->vm_file); - if (nr == folio_nr_pages(folio)) - old_addr = addr; - } + if (!(vma->vm_flags & VM_SHARED)) + continue; + if (old_addr) + pr_err("INEQUIVALENT ALIASES 0x%lx and 0x%lx in file %pD\n", + old_addr, addr, vma->vm_file); + if (nr == folio_nr_pages(folio)) + old_addr = addr; } WARN_ON(++count == 4096); } @@ -591,35 +624,28 @@ extern void clear_user_page_asm(void *, unsigned long); extern void copy_user_page_asm(void *, void *, unsigned long); -void flush_kernel_dcache_page_addr(const void *addr) -{ - unsigned long flags; - - flush_kernel_dcache_page_asm(addr); - purge_tlb_start(flags); - pdtlb(SR_KERNEL, addr); - purge_tlb_end(flags); -} -EXPORT_SYMBOL(flush_kernel_dcache_page_addr); - static void flush_cache_page_if_present(struct vm_area_struct *vma, - unsigned long vmaddr, unsigned long pfn) + unsigned long vmaddr) { +#if CONFIG_FLUSH_PAGE_ACCESSED bool needs_flush = false; - pte_t *ptep; + pte_t *ptep, pte; - /* - * The pte check is racy and sometimes the flush will trigger - * a non-access TLB miss. Hopefully, the page has already been - * flushed. - */ ptep = get_ptep(vma->vm_mm, vmaddr); if (ptep) { - needs_flush = pte_needs_flush(*ptep); + pte = ptep_get(ptep); + needs_flush = pte_needs_flush(pte); pte_unmap(ptep); } if (needs_flush) - flush_cache_page(vma, vmaddr, pfn); + __flush_cache_page(vma, vmaddr, PFN_PHYS(pte_pfn(pte))); +#else + struct mm_struct *mm = vma->vm_mm; + unsigned long physaddr = get_upa(mm, vmaddr); + + if (physaddr) + __flush_cache_page(vma, vmaddr, PAGE_ALIGN_DOWN(physaddr)); +#endif } void copy_user_highpage(struct page *to, struct page *from, @@ -629,7 +655,7 @@ kfrom = kmap_local_page(from); kto = kmap_local_page(to); - flush_cache_page_if_present(vma, vaddr, page_to_pfn(from)); + __flush_cache_page(vma, vaddr, PFN_PHYS(page_to_pfn(from))); copy_page_asm(kto, kfrom); kunmap_local(kto); kunmap_local(kfrom); @@ -638,16 +664,17 @@ void copy_to_user_page(struct vm_area_struct *vma, struct page *page, unsigned long user_vaddr, void *dst, void *src, int len) { - flush_cache_page_if_present(vma, user_vaddr, page_to_pfn(page)); + __flush_cache_page(vma, user_vaddr, PFN_PHYS(page_to_pfn(page))); memcpy(dst, src, len); - flush_kernel_dcache_range_asm((unsigned long)dst, (unsigned long)dst + len); + flush_kernel_dcache_page_addr(PTR_PAGE_ALIGN_DOWN(dst)); } void copy_from_user_page(struct vm_area_struct *vma, struct page *page, unsigned long user_vaddr, void *dst, void *src, int len) { - flush_cache_page_if_present(vma, user_vaddr, page_to_pfn(page)); + __flush_cache_page(vma, user_vaddr, PFN_PHYS(page_to_pfn(page))); memcpy(dst, src, len); + flush_kernel_dcache_page_addr(PTR_PAGE_ALIGN_DOWN(src)); } /* __flush_tlb_range() @@ -681,32 +708,10 @@ static void flush_cache_pages(struct vm_area_struct *vma, unsigned long start, unsigned long end) { - unsigned long addr, pfn; - pte_t *ptep; + unsigned long addr; - for (addr = start; addr < end; addr += PAGE_SIZE) { - bool needs_flush = false; - /* - * The vma can contain pages that aren't present. Although - * the pte search is expensive, we need the pte to find the - * page pfn and to check whether the page should be flushed. - */ - ptep = get_ptep(vma->vm_mm, addr); - if (ptep) { - needs_flush = pte_needs_flush(*ptep); - pfn = pte_pfn(*ptep); - pte_unmap(ptep); - } - if (needs_flush) { - if (parisc_requires_coherency()) { - flush_user_cache_page(vma, addr); - } else { - if (WARN_ON(!pfn_valid(pfn))) - return; - __flush_cache_page(vma, addr, PFN_PHYS(pfn)); - } - } - } + for (addr = start; addr < end; addr += PAGE_SIZE) + flush_cache_page_if_present(vma, addr); } static inline unsigned long mm_total_size(struct mm_struct *mm) @@ -757,21 +762,19 @@ if (WARN_ON(IS_ENABLED(CONFIG_SMP) && arch_irqs_disabled())) return; flush_tlb_range(vma, start, end); - flush_cache_all(); + if (vma->vm_flags & VM_EXEC) + flush_cache_all(); + else + flush_data_cache(); return; } - flush_cache_pages(vma, start, end); + flush_cache_pages(vma, start & PAGE_MASK, end); } void flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long pfn) { - if (WARN_ON(!pfn_valid(pfn))) - return; - if (parisc_requires_coherency()) - flush_user_cache_page(vma, vmaddr); - else - __flush_cache_page(vma, vmaddr, PFN_PHYS(pfn)); + __flush_cache_page(vma, vmaddr, PFN_PHYS(pfn)); } void flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr) @@ -779,34 +782,133 @@ if (!PageAnon(page)) return; - if (parisc_requires_coherency()) { - if (vma->vm_flags & VM_SHARED) - flush_data_cache(); - else - flush_user_cache_page(vma, vmaddr); + __flush_cache_page(vma, vmaddr, PFN_PHYS(page_to_pfn(page))); +} + +int ptep_clear_flush_young(struct vm_area_struct *vma, unsigned long addr, + pte_t *ptep) +{ + pte_t pte = ptep_get(ptep); + + if (!pte_young(pte)) + return 0; + set_pte(ptep, pte_mkold(pte)); +#if CONFIG_FLUSH_PAGE_ACCESSED + __flush_cache_page(vma, addr, PFN_PHYS(pte_pfn(pte))); +#endif + return 1; +} + +/* + * After a PTE is cleared, we have no way to flush the cache for + * the physical page. On PA8800 and PA8900 processors, these lines + * can cause random cache corruption. Thus, we must flush the cache + * as well as the TLB when clearing a PTE that's valid. + */ +pte_t ptep_clear_flush(struct vm_area_struct *vma, unsigned long addr, + pte_t *ptep) +{ + struct mm_struct *mm = (vma)->vm_mm; + pte_t pte = ptep_get_and_clear(mm, addr, ptep); + unsigned long pfn = pte_pfn(pte); + + if (pfn_valid(pfn)) + __flush_cache_page(vma, addr, PFN_PHYS(pfn)); + else if (pte_accessible(mm, pte)) + flush_tlb_page(vma, addr); + + return pte; +} + +/* + * The physical address for pages in the ioremap case can be obtained + * from the vm_struct struct. I wasn't able to successfully handle the + * vmalloc and vmap cases. We have an array of struct page pointers in + * the uninitialized vmalloc case but the flush failed using page_to_pfn. + */ +void flush_cache_vmap(unsigned long start, unsigned long end) +{ + unsigned long addr, physaddr; + struct vm_struct *vm; + + /* Prevent cache move-in */ + flush_tlb_kernel_range(start, end); + + if (end - start >= parisc_cache_flush_threshold) { + flush_cache_all(); return; } - flush_tlb_page(vma, vmaddr); - preempt_disable(); - flush_dcache_page_asm(page_to_phys(page), vmaddr); - preempt_enable(); + if (WARN_ON_ONCE(!is_vmalloc_addr((void *)start))) { + flush_cache_all(); + return; + } + + vm = find_vm_area((void *)start); + if (WARN_ON_ONCE(!vm)) { + flush_cache_all(); + return; + } + + /* The physical addresses of IOREMAP regions are contiguous */ + if (vm->flags & VM_IOREMAP) { + physaddr = vm->phys_addr; + for (addr = start; addr < end; addr += PAGE_SIZE) { + preempt_disable(); + flush_dcache_page_asm(physaddr, start); + flush_icache_page_asm(physaddr, start); + preempt_enable(); + physaddr += PAGE_SIZE; + } + return; + } + + flush_cache_all(); } +EXPORT_SYMBOL(flush_cache_vmap); +/* + * The vm_struct has been retired and the page table is set up. The + * last page in the range is a guard page. Its physical address can't + * be determined using lpa, so there is no way to flush the range + * using flush_dcache_page_asm. + */ +void flush_cache_vunmap(unsigned long start, unsigned long end) +{ + /* Prevent cache move-in */ + flush_tlb_kernel_range(start, end); + flush_data_cache(); +} +EXPORT_SYMBOL(flush_cache_vunmap); + +/* + * On systems with PA8800/PA8900 processors, there is no way to flush + * a vmap range other than using the architected loop to flush the + * entire cache. The page directory is not set up, so we can't use + * fdc, etc. FDCE/FICE don't work to flush a portion of the cache. + * L2 is physically indexed but FDCE/FICE instructions in virtual + * mode output their virtual address on the core bus, not their + * real address. As a result, the L2 cache index formed from the + * virtual address will most likely not be the same as the L2 index + * formed from the real address. + */ void flush_kernel_vmap_range(void *vaddr, int size) { unsigned long start = (unsigned long)vaddr; unsigned long end = start + size; - if ((!IS_ENABLED(CONFIG_SMP) || !arch_irqs_disabled()) && - (unsigned long)size >= parisc_cache_flush_threshold) { - flush_tlb_kernel_range(start, end); - flush_data_cache(); + flush_tlb_kernel_range(start, end); + + if (!static_branch_likely(&parisc_has_dcache)) + return; + + /* If interrupts are disabled, we can only do local flush */ + if (WARN_ON(IS_ENABLED(CONFIG_SMP) && arch_irqs_disabled())) { + flush_data_cache_local(NULL); return; } - flush_kernel_dcache_range_asm(start, end); - flush_tlb_kernel_range(start, end); + flush_data_cache(); } EXPORT_SYMBOL(flush_kernel_vmap_range); @@ -818,15 +920,18 @@ /* Ensure DMA is complete */ asm_syncdma(); - if ((!IS_ENABLED(CONFIG_SMP) || !arch_irqs_disabled()) && - (unsigned long)size >= parisc_cache_flush_threshold) { - flush_tlb_kernel_range(start, end); - flush_data_cache(); + flush_tlb_kernel_range(start, end); + + if (!static_branch_likely(&parisc_has_dcache)) + return; + + /* If interrupts are disabled, we can only do local flush */ + if (WARN_ON(IS_ENABLED(CONFIG_SMP) && arch_irqs_disabled())) { + flush_data_cache_local(NULL); return; } - purge_kernel_dcache_range_asm(start, end); - flush_tlb_kernel_range(start, end); + flush_data_cache(); } EXPORT_SYMBOL(invalidate_kernel_vmap_range); --- linux-xilinx-6.8.0.orig/arch/parisc/kernel/entry.S +++ linux-xilinx-6.8.0/arch/parisc/kernel/entry.S @@ -1051,8 +1051,7 @@ STREG %r16, PT_ISR(%r29) STREG %r17, PT_IOR(%r29) -#if 0 && defined(CONFIG_64BIT) - /* Revisit when we have 64-bit code above 4Gb */ +#if defined(CONFIG_64BIT) b,n intr_save2 skip_save_ior: @@ -1060,8 +1059,7 @@ * need to adjust iasq/iaoq here in the same way we adjusted isr/ior * above. */ - extrd,u,* %r8,PSW_W_BIT,1,%r1 - cmpib,COND(=),n 1,%r1,intr_save2 + bb,COND(>=),n %r8,PSW_W_BIT,intr_save2 LDREG PT_IASQ0(%r29), %r16 LDREG PT_IAOQ0(%r29), %r17 /* adjust iasq/iaoq */ --- linux-xilinx-6.8.0.orig/arch/parisc/kernel/ftrace.c +++ linux-xilinx-6.8.0/arch/parisc/kernel/ftrace.c @@ -87,7 +87,7 @@ int ftrace_disable_ftrace_graph_caller(void) { - static_key_enable(&ftrace_graph_enable.key); + static_key_disable(&ftrace_graph_enable.key); return 0; } #endif @@ -206,6 +206,9 @@ struct kprobe *p; int bit; + if (unlikely(kprobe_ftrace_disabled)) + return; + bit = ftrace_test_recursion_trylock(ip, parent_ip); if (bit < 0) return; --- linux-xilinx-6.8.0.orig/arch/parisc/kernel/irq.c +++ linux-xilinx-6.8.0/arch/parisc/kernel/irq.c @@ -498,7 +498,7 @@ old_regs = set_irq_regs(regs); local_irq_disable(); - irq_enter(); + irq_enter_rcu(); eirr_val = mfctl(23) & cpu_eiem & per_cpu(local_ack_eiem, cpu); if (!eirr_val) @@ -533,7 +533,7 @@ #endif /* CONFIG_IRQSTACKS */ out: - irq_exit(); + irq_exit_rcu(); set_irq_regs(old_regs); return; --- linux-xilinx-6.8.0.orig/arch/parisc/kernel/parisc_ksyms.c +++ linux-xilinx-6.8.0/arch/parisc/kernel/parisc_ksyms.c @@ -22,6 +22,7 @@ #include EXPORT_SYMBOL(__xchg8); EXPORT_SYMBOL(__xchg32); +EXPORT_SYMBOL(__cmpxchg_u8); EXPORT_SYMBOL(__cmpxchg_u32); EXPORT_SYMBOL(__cmpxchg_u64); #ifdef CONFIG_SMP --- linux-xilinx-6.8.0.orig/arch/parisc/kernel/sys_parisc32.c +++ linux-xilinx-6.8.0/arch/parisc/kernel/sys_parisc32.c @@ -23,12 +23,3 @@ current->comm, current->pid, r20); return -ENOSYS; } - -asmlinkage long sys32_fanotify_mark(compat_int_t fanotify_fd, compat_uint_t flags, - compat_uint_t mask0, compat_uint_t mask1, compat_int_t dfd, - const char __user * pathname) -{ - return sys_fanotify_mark(fanotify_fd, flags, - ((__u64)mask1 << 32) | mask0, - dfd, pathname); -} --- linux-xilinx-6.8.0.orig/arch/parisc/kernel/syscall.S +++ linux-xilinx-6.8.0/arch/parisc/kernel/syscall.S @@ -243,10 +243,10 @@ #ifdef CONFIG_64BIT ldil L%sys_call_table, %r1 - or,= %r2,%r2,%r2 - addil L%(sys_call_table64-sys_call_table), %r1 + or,ev %r2,%r2,%r2 + ldil L%sys_call_table64, %r1 ldo R%sys_call_table(%r1), %r19 - or,= %r2,%r2,%r2 + or,ev %r2,%r2,%r2 ldo R%sys_call_table64(%r1), %r19 #else load32 sys_call_table, %r19 @@ -379,10 +379,10 @@ extrd,u %r19,63,1,%r2 /* W hidden in bottom bit */ ldil L%sys_call_table, %r1 - or,= %r2,%r2,%r2 - addil L%(sys_call_table64-sys_call_table), %r1 + or,ev %r2,%r2,%r2 + ldil L%sys_call_table64, %r1 ldo R%sys_call_table(%r1), %r19 - or,= %r2,%r2,%r2 + or,ev %r2,%r2,%r2 ldo R%sys_call_table64(%r1), %r19 #else load32 sys_call_table, %r19 @@ -1327,6 +1327,8 @@ END(sys_call_table) #ifdef CONFIG_64BIT +#undef __SYSCALL_WITH_COMPAT +#define __SYSCALL_WITH_COMPAT(nr, native, compat) __SYSCALL(nr, native) .align 8 ENTRY(sys_call_table64) #include /* 64-bit syscalls */ --- linux-xilinx-6.8.0.orig/arch/parisc/kernel/syscalls/syscall.tbl +++ linux-xilinx-6.8.0/arch/parisc/kernel/syscalls/syscall.tbl @@ -108,7 +108,7 @@ 95 common fchown sys_fchown 96 common getpriority sys_getpriority 97 common setpriority sys_setpriority -98 common recv sys_recv +98 common recv sys_recv compat_sys_recv 99 common statfs sys_statfs compat_sys_statfs 100 common fstatfs sys_fstatfs compat_sys_fstatfs 101 common stat64 sys_stat64 @@ -135,7 +135,7 @@ 120 common clone sys_clone_wrapper 121 common setdomainname sys_setdomainname 122 common sendfile sys_sendfile compat_sys_sendfile -123 common recvfrom sys_recvfrom +123 common recvfrom sys_recvfrom compat_sys_recvfrom 124 32 adjtimex sys_adjtimex_time32 124 64 adjtimex sys_adjtimex 125 common mprotect sys_mprotect @@ -364,7 +364,7 @@ 320 common accept4 sys_accept4 321 common prlimit64 sys_prlimit64 322 common fanotify_init sys_fanotify_init -323 common fanotify_mark sys_fanotify_mark sys32_fanotify_mark +323 common fanotify_mark sys_fanotify_mark compat_sys_fanotify_mark 324 32 clock_adjtime sys_clock_adjtime32 324 64 clock_adjtime sys_clock_adjtime 325 common name_to_handle_at sys_name_to_handle_at --- linux-xilinx-6.8.0.orig/arch/parisc/kernel/unaligned.c +++ linux-xilinx-6.8.0/arch/parisc/kernel/unaligned.c @@ -169,6 +169,7 @@ static int emulate_ldd(struct pt_regs *regs, int toreg, int flop) { unsigned long saddr = regs->ior; + unsigned long shift, temp1; __u64 val = 0; ASM_EXCEPTIONTABLE_VAR(ret); @@ -180,25 +181,22 @@ #ifdef CONFIG_64BIT __asm__ __volatile__ ( -" depd,z %3,60,3,%%r19\n" /* r19=(ofs&7)*8 */ -" mtsp %4, %%sr1\n" -" depd %%r0,63,3,%3\n" -"1: ldd 0(%%sr1,%3),%0\n" -"2: ldd 8(%%sr1,%3),%%r20\n" -" subi 64,%%r19,%%r19\n" -" mtsar %%r19\n" -" shrpd %0,%%r20,%%sar,%0\n" +" depd,z %2,60,3,%3\n" /* shift=(ofs&7)*8 */ +" mtsp %5, %%sr1\n" +" depd %%r0,63,3,%2\n" +"1: ldd 0(%%sr1,%2),%0\n" +"2: ldd 8(%%sr1,%2),%4\n" +" subi 64,%3,%3\n" +" mtsar %3\n" +" shrpd %0,%4,%%sar,%0\n" "3: \n" ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 3b, "%1") ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 3b, "%1") - : "=r" (val), "+r" (ret) - : "0" (val), "r" (saddr), "r" (regs->isr) - : "r19", "r20" ); + : "+r" (val), "+r" (ret), "+r" (saddr), "=&r" (shift), "=&r" (temp1) + : "r" (regs->isr) ); #else - { - unsigned long shift, temp1; __asm__ __volatile__ ( -" zdep %2,29,2,%3\n" /* r19=(ofs&3)*8 */ +" zdep %2,29,2,%3\n" /* shift=(ofs&3)*8 */ " mtsp %5, %%sr1\n" " dep %%r0,31,2,%2\n" "1: ldw 0(%%sr1,%2),%0\n" @@ -214,7 +212,6 @@ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(3b, 4b, "%1") : "+r" (val), "+r" (ret), "+r" (saddr), "=&r" (shift), "=&r" (temp1) : "r" (regs->isr) ); - } #endif DPRINTF("val = 0x%llx\n", val); --- linux-xilinx-6.8.0.orig/arch/parisc/mm/init.c +++ linux-xilinx-6.8.0/arch/parisc/mm/init.c @@ -458,7 +458,6 @@ unsigned long kernel_end = (unsigned long)&_end; /* Remap kernel text and data, but do not touch init section yet. */ - kernel_set_to_readonly = true; map_pages(init_end, __pa(init_end), kernel_end - init_end, PAGE_KERNEL, 0); @@ -492,11 +491,18 @@ #ifdef CONFIG_STRICT_KERNEL_RWX void mark_rodata_ro(void) { - /* rodata memory was already mapped with KERNEL_RO access rights by - pagetable_init() and map_pages(). No need to do additional stuff here */ - unsigned long roai_size = __end_ro_after_init - __start_ro_after_init; + unsigned long start = (unsigned long) &__start_rodata; + unsigned long end = (unsigned long) &__end_rodata; + + pr_info("Write protecting the kernel read-only data: %luk\n", + (end - start) >> 10); + + kernel_set_to_readonly = true; + map_pages(start, __pa(start), end - start, PAGE_KERNEL, 0); - pr_info("Write protected read-only-after-init data: %luk\n", roai_size >> 10); + /* force the kernel to see the new page table entries */ + flush_cache_all(); + flush_tlb_all(); } #endif --- linux-xilinx-6.8.0.orig/arch/parisc/net/bpf_jit_core.c +++ linux-xilinx-6.8.0/arch/parisc/net/bpf_jit_core.c @@ -114,7 +114,7 @@ jit_data->header = bpf_jit_binary_alloc(prog_size + extable_size, &jit_data->image, - sizeof(u32), + sizeof(long), bpf_fill_ill_insns); if (!jit_data->header) { prog = orig_prog; @@ -167,7 +167,13 @@ bpf_flush_icache(jit_data->header, ctx->insns + ctx->ninsns); if (!prog->is_func || extra_pass) { - bpf_jit_binary_lock_ro(jit_data->header); + if (bpf_jit_binary_lock_ro(jit_data->header)) { + bpf_jit_binary_free(jit_data->header); + prog->bpf_func = NULL; + prog->jited = 0; + prog->jited_len = 0; + goto out_offset; + } prologue_len = ctx->epilogue_offset - ctx->body_len; for (i = 0; i < prog->len; i++) ctx->offset[i] += prologue_len; --- linux-xilinx-6.8.0.orig/arch/powerpc/Kconfig +++ linux-xilinx-6.8.0/arch/powerpc/Kconfig @@ -154,7 +154,7 @@ select ARCH_HAS_SYSCALL_WRAPPER if !SPU_BASE && !COMPAT select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST select ARCH_HAS_UACCESS_FLUSHCACHE - select ARCH_HAS_UBSAN_SANITIZE_ALL + select ARCH_HAS_UBSAN select ARCH_HAVE_NMI_SAFE_CMPXCHG select ARCH_KEEP_MEMBLOCK select ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE if PPC_RADIX_MMU @@ -273,8 +273,8 @@ select HAVE_RSEQ select HAVE_SETUP_PER_CPU_AREA if PPC64 select HAVE_SOFTIRQ_ON_OWN_STACK - select HAVE_STACKPROTECTOR if PPC32 && $(cc-option,-mstack-protector-guard=tls -mstack-protector-guard-reg=r2) - select HAVE_STACKPROTECTOR if PPC64 && $(cc-option,-mstack-protector-guard=tls -mstack-protector-guard-reg=r13) + select HAVE_STACKPROTECTOR if PPC32 && $(cc-option,$(m32-flag) -mstack-protector-guard=tls -mstack-protector-guard-reg=r2 -mstack-protector-guard-offset=0) + select HAVE_STACKPROTECTOR if PPC64 && $(cc-option,$(m64-flag) -mstack-protector-guard=tls -mstack-protector-guard-reg=r13 -mstack-protector-guard-offset=0) select HAVE_STATIC_CALL if PPC32 select HAVE_SYSCALL_TRACEPOINTS select HAVE_VIRT_CPU_ACCOUNTING --- linux-xilinx-6.8.0.orig/arch/powerpc/Makefile +++ linux-xilinx-6.8.0/arch/powerpc/Makefile @@ -100,13 +100,6 @@ KBUILD_LDFLAGS += -m elf$(BITS)$(LDEMULATION) endif -cflags-$(CONFIG_STACKPROTECTOR) += -mstack-protector-guard=tls -ifdef CONFIG_PPC64 -cflags-$(CONFIG_STACKPROTECTOR) += -mstack-protector-guard-reg=r13 -else -cflags-$(CONFIG_STACKPROTECTOR) += -mstack-protector-guard-reg=r2 -endif - LDFLAGS_vmlinux-y := -Bstatic LDFLAGS_vmlinux-$(CONFIG_RELOCATABLE) := -pie LDFLAGS_vmlinux-$(CONFIG_RELOCATABLE) += -z notext @@ -238,7 +231,7 @@ all: zImage # With make 3.82 we cannot mix normal and wildcard targets -BOOT_TARGETS1 := zImage zImage.initrd uImage +BOOT_TARGETS1 := zImage zImage.initrd uImage vmlinux.strip BOOT_TARGETS2 := zImage% dtbImage% treeImage.% cuImage.% simpleImage.% uImage.% PHONY += $(BOOT_TARGETS1) $(BOOT_TARGETS2) @@ -400,9 +393,11 @@ PHONY += stack_protector_prepare stack_protector_prepare: prepare0 ifdef CONFIG_PPC64 - $(eval KBUILD_CFLAGS += -mstack-protector-guard-offset=$(shell awk '{if ($$2 == "PACA_CANARY") print $$3;}' include/generated/asm-offsets.h)) + $(eval KBUILD_CFLAGS += -mstack-protector-guard=tls -mstack-protector-guard-reg=r13 \ + -mstack-protector-guard-offset=$(shell awk '{if ($$2 == "PACA_CANARY") print $$3;}' include/generated/asm-offsets.h)) else - $(eval KBUILD_CFLAGS += -mstack-protector-guard-offset=$(shell awk '{if ($$2 == "TASK_CANARY") print $$3;}' include/generated/asm-offsets.h)) + $(eval KBUILD_CFLAGS += -mstack-protector-guard=tls -mstack-protector-guard-reg=r2 \ + -mstack-protector-guard-offset=$(shell awk '{if ($$2 == "TASK_CANARY") print $$3;}' include/generated/asm-offsets.h)) endif endif --- linux-xilinx-6.8.0.orig/arch/powerpc/boot/simple_alloc.c +++ linux-xilinx-6.8.0/arch/powerpc/boot/simple_alloc.c @@ -112,8 +112,11 @@ return ptr; new = simple_malloc(size); - memcpy(new, ptr, p->size); - simple_free(ptr); + if (new) { + memcpy(new, ptr, p->size); + simple_free(ptr); + } + return new; } --- linux-xilinx-6.8.0.orig/arch/powerpc/configs/85xx-hw.config +++ linux-xilinx-6.8.0/arch/powerpc/configs/85xx-hw.config @@ -24,6 +24,7 @@ CONFIG_FSL_CORENET_CF=y CONFIG_FSL_DMA=y CONFIG_FSL_HV_MANAGER=y +CONFIG_FSL_IFC=y CONFIG_FSL_PQ_MDIO=y CONFIG_FSL_RIO=y CONFIG_FSL_XGMAC_MDIO=y @@ -58,6 +59,7 @@ CONFIG_MARVELL_PHY=y CONFIG_MDIO_BUS_MUX_GPIO=y CONFIG_MDIO_BUS_MUX_MMIOREG=y +CONFIG_MEMORY=y CONFIG_MMC_SDHCI_OF_ESDHC=y CONFIG_MMC_SDHCI_PLTFM=y CONFIG_MMC_SDHCI=y --- linux-xilinx-6.8.0.orig/arch/powerpc/configs/ppc64_defconfig +++ linux-xilinx-6.8.0/arch/powerpc/configs/ppc64_defconfig @@ -81,7 +81,6 @@ CONFIG_PARTITION_ADVANCED=y CONFIG_BINFMT_MISC=m CONFIG_ZSWAP=y -CONFIG_Z3FOLD=y CONFIG_ZSMALLOC=y # CONFIG_SLAB_MERGE_DEFAULT is not set CONFIG_SLAB_FREELIST_RANDOM=y --- linux-xilinx-6.8.0.orig/arch/powerpc/configs/ps3_defconfig +++ linux-xilinx-6.8.0/arch/powerpc/configs/ps3_defconfig @@ -24,7 +24,6 @@ CONFIG_PS3_LPM=m # CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set CONFIG_KEXEC=y -# CONFIG_PPC64_BIG_ENDIAN_ELF_ABI_V2 is not set CONFIG_PPC_4K_PAGES=y CONFIG_SCHED_SMT=y CONFIG_PM=y --- linux-xilinx-6.8.0.orig/arch/powerpc/crypto/Kconfig +++ linux-xilinx-6.8.0/arch/powerpc/crypto/Kconfig @@ -96,6 +96,7 @@ config CRYPTO_AES_GCM_P10 tristate "Stitched AES/GCM acceleration support on P10 or later CPU (PPC)" + depends on BROKEN depends on PPC64 && CPU_LITTLE_ENDIAN && VSX select CRYPTO_LIB_AES select CRYPTO_ALGAPI --- linux-xilinx-6.8.0.orig/arch/powerpc/crypto/chacha-p10-glue.c +++ linux-xilinx-6.8.0/arch/powerpc/crypto/chacha-p10-glue.c @@ -197,6 +197,9 @@ static int __init chacha_p10_init(void) { + if (!cpu_has_feature(CPU_FTR_ARCH_31)) + return 0; + static_branch_enable(&have_p10); return crypto_register_skciphers(algs, ARRAY_SIZE(algs)); @@ -204,10 +207,13 @@ static void __exit chacha_p10_exit(void) { + if (!static_branch_likely(&have_p10)) + return; + crypto_unregister_skciphers(algs, ARRAY_SIZE(algs)); } -module_cpu_feature_match(PPC_MODULE_FEATURE_P10, chacha_p10_init); +module_init(chacha_p10_init); module_exit(chacha_p10_exit); MODULE_DESCRIPTION("ChaCha and XChaCha stream ciphers (P10 accelerated)"); --- linux-xilinx-6.8.0.orig/arch/powerpc/include/asm/asm-compat.h +++ linux-xilinx-6.8.0/arch/powerpc/include/asm/asm-compat.h @@ -39,6 +39,12 @@ #define STDX_BE stringify_in_c(stdbrx) #endif +#ifdef CONFIG_CC_IS_CLANG +#define DS_FORM_CONSTRAINT "Z<>" +#else +#define DS_FORM_CONSTRAINT "YZ<>" +#endif + #else /* 32-bit */ /* operations for longs and pointers */ --- linux-xilinx-6.8.0.orig/arch/powerpc/include/asm/atomic.h +++ linux-xilinx-6.8.0/arch/powerpc/include/asm/atomic.h @@ -11,6 +11,7 @@ #include #include #include +#include /* * Since *_return_relaxed and {cmp}xchg_relaxed are implemented with @@ -197,7 +198,7 @@ if (IS_ENABLED(CONFIG_PPC_KERNEL_PREFIXED)) __asm__ __volatile__("ld %0,0(%1)" : "=r"(t) : "b"(&v->counter)); else - __asm__ __volatile__("ld%U1%X1 %0,%1" : "=r"(t) : "m<>"(v->counter)); + __asm__ __volatile__("ld%U1%X1 %0,%1" : "=r"(t) : DS_FORM_CONSTRAINT (v->counter)); return t; } @@ -208,7 +209,7 @@ if (IS_ENABLED(CONFIG_PPC_KERNEL_PREFIXED)) __asm__ __volatile__("std %1,0(%2)" : "=m"(v->counter) : "r"(i), "b"(&v->counter)); else - __asm__ __volatile__("std%U0%X0 %1,%0" : "=m<>"(v->counter) : "r"(i)); + __asm__ __volatile__("std%U0%X0 %1,%0" : "=" DS_FORM_CONSTRAINT (v->counter) : "r"(i)); } #define ATOMIC64_OP(op, asm_op) \ --- linux-xilinx-6.8.0.orig/arch/powerpc/include/asm/book3s/64/hash-4k.h +++ linux-xilinx-6.8.0/arch/powerpc/include/asm/book3s/64/hash-4k.h @@ -90,6 +90,34 @@ #endif /* + * With 4K page size the real_pte machinery is all nops. + */ +static inline real_pte_t __real_pte(pte_t pte, pte_t *ptep, int offset) +{ + return (real_pte_t){pte}; +} + +#define __rpte_to_pte(r) ((r).pte) + +static inline unsigned long __rpte_to_hidx(real_pte_t rpte, unsigned long index) +{ + return pte_val(__rpte_to_pte(rpte)) >> H_PAGE_F_GIX_SHIFT; +} + +#define pte_iterate_hashed_subpages(rpte, psize, va, index, shift) \ + do { \ + index = 0; \ + shift = mmu_psize_defs[psize].shift; \ + +#define pte_iterate_hashed_end() } while(0) + +/* + * We expect this to be called only for user addresses or kernel virtual + * addresses other than the linear mapping. + */ +#define pte_pagesize_index(mm, addr, pte) MMU_PAGE_4K + +/* * 4K PTE format is different from 64K PTE format. Saving the hash_slot is just * a matter of returning the PTE bits that need to be modified. On 64K PTE, * things are a little more involved and hence needs many more parameters to --- linux-xilinx-6.8.0.orig/arch/powerpc/include/asm/book3s/64/pgtable.h +++ linux-xilinx-6.8.0/arch/powerpc/include/asm/book3s/64/pgtable.h @@ -302,32 +302,6 @@ #ifndef __ASSEMBLY__ -/* - * This is the default implementation of various PTE accessors, it's - * used in all cases except Book3S with 64K pages where we have a - * concept of sub-pages - */ -#ifndef __real_pte - -#define __real_pte(e, p, o) ((real_pte_t){(e)}) -#define __rpte_to_pte(r) ((r).pte) -#define __rpte_to_hidx(r,index) (pte_val(__rpte_to_pte(r)) >> H_PAGE_F_GIX_SHIFT) - -#define pte_iterate_hashed_subpages(rpte, psize, va, index, shift) \ - do { \ - index = 0; \ - shift = mmu_psize_defs[psize].shift; \ - -#define pte_iterate_hashed_end() } while(0) - -/* - * We expect this to be called only for user addresses or kernel virtual - * addresses other than the linear mapping. - */ -#define pte_pagesize_index(mm, addr, pte) MMU_PAGE_4K - -#endif /* __real_pte */ - static inline unsigned long pte_update(struct mm_struct *mm, unsigned long addr, pte_t *ptep, unsigned long clr, unsigned long set, int huge) --- linux-xilinx-6.8.0.orig/arch/powerpc/include/asm/cputhreads.h +++ linux-xilinx-6.8.0/arch/powerpc/include/asm/cputhreads.h @@ -3,6 +3,7 @@ #define _ASM_POWERPC_CPUTHREADS_H #ifndef __ASSEMBLY__ +#include #include #include --- linux-xilinx-6.8.0.orig/arch/powerpc/include/asm/dtl.h +++ linux-xilinx-6.8.0/arch/powerpc/include/asm/dtl.h @@ -1,8 +1,8 @@ #ifndef _ASM_POWERPC_DTL_H #define _ASM_POWERPC_DTL_H +#include #include -#include /* * Layout of entries in the hypervisor's dispatch trace log buffer. @@ -35,7 +35,7 @@ #define DTL_LOG_ALL (DTL_LOG_CEDE | DTL_LOG_PREEMPT | DTL_LOG_FAULT) extern struct kmem_cache *dtl_cache; -extern rwlock_t dtl_access_lock; +extern struct rw_semaphore dtl_access_lock; extern void register_dtl_buffer(int cpu); extern void alloc_dtl_buffers(unsigned long *time_limit); --- linux-xilinx-6.8.0.orig/arch/powerpc/include/asm/fadump.h +++ linux-xilinx-6.8.0/arch/powerpc/include/asm/fadump.h @@ -32,4 +32,11 @@ int depth, void *data); extern int fadump_reserve_mem(void); #endif + +#if defined(CONFIG_FA_DUMP) && defined(CONFIG_CMA) +void fadump_cma_init(void); +#else +static inline void fadump_cma_init(void) { } +#endif + #endif /* _ASM_POWERPC_FADUMP_H */ --- linux-xilinx-6.8.0.orig/arch/powerpc/include/asm/guest-state-buffer.h +++ linux-xilinx-6.8.0/arch/powerpc/include/asm/guest-state-buffer.h @@ -81,6 +81,7 @@ #define KVMPPC_GSID_HASHKEYR 0x1050 #define KVMPPC_GSID_HASHPKEYR 0x1051 #define KVMPPC_GSID_CTRL 0x1052 +#define KVMPPC_GSID_DPDES 0x1053 #define KVMPPC_GSID_CR 0x2000 #define KVMPPC_GSID_PIDR 0x2001 @@ -110,7 +111,7 @@ #define KVMPPC_GSE_META_COUNT (KVMPPC_GSE_META_END - KVMPPC_GSE_META_START + 1) #define KVMPPC_GSE_DW_REGS_START KVMPPC_GSID_GPR(0) -#define KVMPPC_GSE_DW_REGS_END KVMPPC_GSID_CTRL +#define KVMPPC_GSE_DW_REGS_END KVMPPC_GSID_DPDES #define KVMPPC_GSE_DW_REGS_COUNT \ (KVMPPC_GSE_DW_REGS_END - KVMPPC_GSE_DW_REGS_START + 1) --- linux-xilinx-6.8.0.orig/arch/powerpc/include/asm/hugetlb.h +++ linux-xilinx-6.8.0/arch/powerpc/include/asm/hugetlb.h @@ -15,6 +15,15 @@ extern bool hugetlb_disabled; +static inline bool hugepages_supported(void) +{ + if (hugetlb_disabled) + return false; + + return HPAGE_SHIFT != 0; +} +#define hugepages_supported hugepages_supported + void __init hugetlbpage_init_defaultsize(void); int slice_is_hugepage_only_range(struct mm_struct *mm, unsigned long addr, --- linux-xilinx-6.8.0.orig/arch/powerpc/include/asm/hvcall.h +++ linux-xilinx-6.8.0/arch/powerpc/include/asm/hvcall.h @@ -524,7 +524,7 @@ * Used for all but the craziest of phyp interfaces (see plpar_hcall9) */ #define PLPAR_HCALL_BUFSIZE 4 -long plpar_hcall(unsigned long opcode, unsigned long *retbuf, ...); +long plpar_hcall(unsigned long opcode, unsigned long retbuf[static PLPAR_HCALL_BUFSIZE], ...); /** * plpar_hcall_raw: - Make a hypervisor call without calculating hcall stats @@ -538,7 +538,7 @@ * plpar_hcall, but plpar_hcall_raw works in real mode and does not * calculate hypervisor call statistics. */ -long plpar_hcall_raw(unsigned long opcode, unsigned long *retbuf, ...); +long plpar_hcall_raw(unsigned long opcode, unsigned long retbuf[static PLPAR_HCALL_BUFSIZE], ...); /** * plpar_hcall9: - Make a pseries hypervisor call with up to 9 return arguments @@ -549,8 +549,8 @@ * PLPAR_HCALL9_BUFSIZE to size the return argument buffer. */ #define PLPAR_HCALL9_BUFSIZE 9 -long plpar_hcall9(unsigned long opcode, unsigned long *retbuf, ...); -long plpar_hcall9_raw(unsigned long opcode, unsigned long *retbuf, ...); +long plpar_hcall9(unsigned long opcode, unsigned long retbuf[static PLPAR_HCALL9_BUFSIZE], ...); +long plpar_hcall9_raw(unsigned long opcode, unsigned long retbuf[static PLPAR_HCALL9_BUFSIZE], ...); /* pseries hcall tracing */ extern struct static_key hcall_tracepoint_key; @@ -570,7 +570,7 @@ unsigned long backing_mem; }; -int h_get_mpp(struct hvcall_mpp_data *); +long h_get_mpp(struct hvcall_mpp_data *mpp_data); struct hvcall_mpp_x_data { unsigned long coalesced_bytes; --- linux-xilinx-6.8.0.orig/arch/powerpc/include/asm/interrupt.h +++ linux-xilinx-6.8.0/arch/powerpc/include/asm/interrupt.h @@ -336,6 +336,14 @@ if (IS_ENABLED(CONFIG_KASAN)) return; + /* + * Likewise, do not use it in real mode if percpu first chunk is not + * embedded. With CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK enabled there + * are chances where percpu allocation can come from vmalloc area. + */ + if (percpu_first_chunk_is_paged) + return; + /* Otherwise, it should be safe to call it */ nmi_enter(); } @@ -351,6 +359,8 @@ // no nmi_exit for a pseries hash guest taking a real mode exception } else if (IS_ENABLED(CONFIG_KASAN)) { // no nmi_exit for KASAN in real mode + } else if (percpu_first_chunk_is_paged) { + // no nmi_exit if percpu first chunk is not embedded } else { nmi_exit(); } --- linux-xilinx-6.8.0.orig/arch/powerpc/include/asm/io.h +++ linux-xilinx-6.8.0/arch/powerpc/include/asm/io.h @@ -37,7 +37,7 @@ * define properly based on the platform */ #ifndef CONFIG_PCI -#define _IO_BASE 0 +#define _IO_BASE POISON_POINTER_DELTA #define _ISA_MEM_BASE 0 #define PCI_DRAM_OFFSET 0 #elif defined(CONFIG_PPC32) @@ -585,12 +585,12 @@ #define __do_inw(port) _rec_inw(port) #define __do_inl(port) _rec_inl(port) #else /* CONFIG_PPC32 */ -#define __do_outb(val, port) writeb(val,(PCI_IO_ADDR)_IO_BASE+port); -#define __do_outw(val, port) writew(val,(PCI_IO_ADDR)_IO_BASE+port); -#define __do_outl(val, port) writel(val,(PCI_IO_ADDR)_IO_BASE+port); -#define __do_inb(port) readb((PCI_IO_ADDR)_IO_BASE + port); -#define __do_inw(port) readw((PCI_IO_ADDR)_IO_BASE + port); -#define __do_inl(port) readl((PCI_IO_ADDR)_IO_BASE + port); +#define __do_outb(val, port) writeb(val,(PCI_IO_ADDR)(_IO_BASE+port)); +#define __do_outw(val, port) writew(val,(PCI_IO_ADDR)(_IO_BASE+port)); +#define __do_outl(val, port) writel(val,(PCI_IO_ADDR)(_IO_BASE+port)); +#define __do_inb(port) readb((PCI_IO_ADDR)(_IO_BASE + port)); +#define __do_inw(port) readw((PCI_IO_ADDR)(_IO_BASE + port)); +#define __do_inl(port) readl((PCI_IO_ADDR)(_IO_BASE + port)); #endif /* !CONFIG_PPC32 */ #ifdef CONFIG_EEH @@ -606,12 +606,12 @@ #define __do_writesw(a, b, n) _outsw(PCI_FIX_ADDR(a),(b),(n)) #define __do_writesl(a, b, n) _outsl(PCI_FIX_ADDR(a),(b),(n)) -#define __do_insb(p, b, n) readsb((PCI_IO_ADDR)_IO_BASE+(p), (b), (n)) -#define __do_insw(p, b, n) readsw((PCI_IO_ADDR)_IO_BASE+(p), (b), (n)) -#define __do_insl(p, b, n) readsl((PCI_IO_ADDR)_IO_BASE+(p), (b), (n)) -#define __do_outsb(p, b, n) writesb((PCI_IO_ADDR)_IO_BASE+(p),(b),(n)) -#define __do_outsw(p, b, n) writesw((PCI_IO_ADDR)_IO_BASE+(p),(b),(n)) -#define __do_outsl(p, b, n) writesl((PCI_IO_ADDR)_IO_BASE+(p),(b),(n)) +#define __do_insb(p, b, n) readsb((PCI_IO_ADDR)(_IO_BASE+(p)), (b), (n)) +#define __do_insw(p, b, n) readsw((PCI_IO_ADDR)(_IO_BASE+(p)), (b), (n)) +#define __do_insl(p, b, n) readsl((PCI_IO_ADDR)(_IO_BASE+(p)), (b), (n)) +#define __do_outsb(p, b, n) writesb((PCI_IO_ADDR)(_IO_BASE+(p)),(b),(n)) +#define __do_outsw(p, b, n) writesw((PCI_IO_ADDR)(_IO_BASE+(p)),(b),(n)) +#define __do_outsl(p, b, n) writesl((PCI_IO_ADDR)(_IO_BASE+(p)),(b),(n)) #define __do_memset_io(addr, c, n) \ _memset_io(PCI_FIX_ADDR(addr), c, n) --- linux-xilinx-6.8.0.orig/arch/powerpc/include/asm/kfence.h +++ linux-xilinx-6.8.0/arch/powerpc/include/asm/kfence.h @@ -15,10 +15,19 @@ #define ARCH_FUNC_PREFIX "." #endif +#ifdef CONFIG_KFENCE +extern bool kfence_disabled; + +static inline void disable_kfence(void) +{ + kfence_disabled = true; +} + static inline bool arch_kfence_init_pool(void) { - return true; + return !kfence_disabled; } +#endif #ifdef CONFIG_PPC64 static inline bool kfence_protect_page(unsigned long addr, bool protect) --- linux-xilinx-6.8.0.orig/arch/powerpc/include/asm/kvm_book3s.h +++ linux-xilinx-6.8.0/arch/powerpc/include/asm/kvm_book3s.h @@ -594,6 +594,7 @@ KVMPPC_BOOK3S_VCORE_ACCESSOR(vtb, 64, KVMPPC_GSID_VTB) +KVMPPC_BOOK3S_VCORE_ACCESSOR(dpdes, 64, KVMPPC_GSID_DPDES) KVMPPC_BOOK3S_VCORE_ACCESSOR_GET(arch_compat, 32, KVMPPC_GSID_LOGICAL_PVR) KVMPPC_BOOK3S_VCORE_ACCESSOR_GET(lpcr, 64, KVMPPC_GSID_LPCR) KVMPPC_BOOK3S_VCORE_ACCESSOR_SET(tb_offset, 64, KVMPPC_GSID_TB_OFFSET) --- linux-xilinx-6.8.0.orig/arch/powerpc/include/asm/kvm_host.h +++ linux-xilinx-6.8.0/arch/powerpc/include/asm/kvm_host.h @@ -599,6 +599,9 @@ ulong dawrx0; ulong dawr1; ulong dawrx1; + ulong dexcr; + ulong hashkeyr; + ulong hashpkeyr; ulong ciabr; ulong cfar; ulong ppr; --- linux-xilinx-6.8.0.orig/arch/powerpc/include/asm/nohash/mmu-e500.h +++ linux-xilinx-6.8.0/arch/powerpc/include/asm/nohash/mmu-e500.h @@ -303,8 +303,7 @@ extern int book3e_htw_mode; #define PPC_HTW_NONE 0 -#define PPC_HTW_IBM 1 -#define PPC_HTW_E6500 2 +#define PPC_HTW_E6500 1 /* * 64-bit booke platforms don't load the tlb in the tlb miss handler code. --- linux-xilinx-6.8.0.orig/arch/powerpc/include/asm/percpu.h +++ linux-xilinx-6.8.0/arch/powerpc/include/asm/percpu.h @@ -15,6 +15,16 @@ #endif /* CONFIG_SMP */ #endif /* __powerpc64__ */ +#if defined(CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK) && defined(CONFIG_SMP) +#include +DECLARE_STATIC_KEY_FALSE(__percpu_first_chunk_is_paged); + +#define percpu_first_chunk_is_paged \ + (static_key_enabled(&__percpu_first_chunk_is_paged.key)) +#else +#define percpu_first_chunk_is_paged false +#endif /* CONFIG_PPC64 && CONFIG_SMP */ + #include #include --- linux-xilinx-6.8.0.orig/arch/powerpc/include/asm/plpks.h +++ linux-xilinx-6.8.0/arch/powerpc/include/asm/plpks.h @@ -44,9 +44,8 @@ #define PLPKS_MAX_DATA_SIZE 4000 // Timeouts for PLPKS operations -#define PLPKS_MAX_TIMEOUT 5000 // msec -#define PLPKS_FLUSH_SLEEP 10 // msec -#define PLPKS_FLUSH_SLEEP_RANGE 400 +#define PLPKS_MAX_TIMEOUT (5 * USEC_PER_SEC) +#define PLPKS_FLUSH_SLEEP 10000 // usec struct plpks_var { char *component; --- linux-xilinx-6.8.0.orig/arch/powerpc/include/asm/ppc-opcode.h +++ linux-xilinx-6.8.0/arch/powerpc/include/asm/ppc-opcode.h @@ -510,6 +510,7 @@ #define PPC_RAW_STB(r, base, i) (0x98000000 | ___PPC_RS(r) | ___PPC_RA(base) | IMM_L(i)) #define PPC_RAW_LBZ(r, base, i) (0x88000000 | ___PPC_RT(r) | ___PPC_RA(base) | IMM_L(i)) #define PPC_RAW_LDX(r, base, b) (0x7c00002a | ___PPC_RT(r) | ___PPC_RA(base) | ___PPC_RB(b)) +#define PPC_RAW_LHA(r, base, i) (0xa8000000 | ___PPC_RT(r) | ___PPC_RA(base) | IMM_L(i)) #define PPC_RAW_LHZ(r, base, i) (0xa0000000 | ___PPC_RT(r) | ___PPC_RA(base) | IMM_L(i)) #define PPC_RAW_LHBRX(r, base, b) (0x7c00062c | ___PPC_RT(r) | ___PPC_RA(base) | ___PPC_RB(b)) #define PPC_RAW_LWBRX(r, base, b) (0x7c00042c | ___PPC_RT(r) | ___PPC_RA(base) | ___PPC_RB(b)) @@ -532,6 +533,7 @@ #define PPC_RAW_MULW(d, a, b) (0x7c0001d6 | ___PPC_RT(d) | ___PPC_RA(a) | ___PPC_RB(b)) #define PPC_RAW_MULHWU(d, a, b) (0x7c000016 | ___PPC_RT(d) | ___PPC_RA(a) | ___PPC_RB(b)) #define PPC_RAW_MULI(d, a, i) (0x1c000000 | ___PPC_RT(d) | ___PPC_RA(a) | IMM_L(i)) +#define PPC_RAW_DIVW(d, a, b) (0x7c0003d6 | ___PPC_RT(d) | ___PPC_RA(a) | ___PPC_RB(b)) #define PPC_RAW_DIVWU(d, a, b) (0x7c000396 | ___PPC_RT(d) | ___PPC_RA(a) | ___PPC_RB(b)) #define PPC_RAW_DIVDU(d, a, b) (0x7c000392 | ___PPC_RT(d) | ___PPC_RA(a) | ___PPC_RB(b)) #define PPC_RAW_DIVDE(t, a, b) (0x7c000352 | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b)) @@ -550,6 +552,8 @@ #define PPC_RAW_XOR(d, a, b) (0x7c000278 | ___PPC_RA(d) | ___PPC_RS(a) | ___PPC_RB(b)) #define PPC_RAW_XORI(d, a, i) (0x68000000 | ___PPC_RA(d) | ___PPC_RS(a) | IMM_L(i)) #define PPC_RAW_XORIS(d, a, i) (0x6c000000 | ___PPC_RA(d) | ___PPC_RS(a) | IMM_L(i)) +#define PPC_RAW_EXTSB(d, a) (0x7c000774 | ___PPC_RA(d) | ___PPC_RS(a)) +#define PPC_RAW_EXTSH(d, a) (0x7c000734 | ___PPC_RA(d) | ___PPC_RS(a)) #define PPC_RAW_EXTSW(d, a) (0x7c0007b4 | ___PPC_RA(d) | ___PPC_RS(a)) #define PPC_RAW_SLW(d, a, s) (0x7c000030 | ___PPC_RA(d) | ___PPC_RS(a) | ___PPC_RB(s)) #define PPC_RAW_SLD(d, a, s) (0x7c000036 | ___PPC_RA(d) | ___PPC_RS(a) | ___PPC_RB(s)) --- linux-xilinx-6.8.0.orig/arch/powerpc/include/asm/reg_fsl_emb.h +++ linux-xilinx-6.8.0/arch/powerpc/include/asm/reg_fsl_emb.h @@ -12,9 +12,16 @@ #ifndef __ASSEMBLY__ /* Performance Monitor Registers */ #define mfpmr(rn) ({unsigned int rval; \ - asm volatile("mfpmr %0," __stringify(rn) \ + asm volatile(".machine push; " \ + ".machine e300; " \ + "mfpmr %0," __stringify(rn) ";" \ + ".machine pop; " \ : "=r" (rval)); rval;}) -#define mtpmr(rn, v) asm volatile("mtpmr " __stringify(rn) ",%0" : : "r" (v)) +#define mtpmr(rn, v) asm volatile(".machine push; " \ + ".machine e300; " \ + "mtpmr " __stringify(rn) ",%0; " \ + ".machine pop; " \ + : : "r" (v)) #endif /* __ASSEMBLY__ */ /* Freescale Book E Performance Monitor APU Registers */ --- linux-xilinx-6.8.0.orig/arch/powerpc/include/asm/sstep.h +++ linux-xilinx-6.8.0/arch/powerpc/include/asm/sstep.h @@ -173,9 +173,4 @@ */ extern int emulate_loadstore(struct pt_regs *regs, struct instruction_op *op); -extern void emulate_vsx_load(struct instruction_op *op, union vsx_reg *reg, - const void *mem, bool cross_endian); -extern void emulate_vsx_store(struct instruction_op *op, - const union vsx_reg *reg, void *mem, - bool cross_endian); extern int emulate_dcbz(unsigned long ea, struct pt_regs *regs); --- linux-xilinx-6.8.0.orig/arch/powerpc/include/asm/topology.h +++ linux-xilinx-6.8.0/arch/powerpc/include/asm/topology.h @@ -145,6 +145,7 @@ #ifdef CONFIG_HOTPLUG_SMT #include +#include #include static inline bool topology_is_primary_thread(unsigned int cpu) @@ -156,6 +157,18 @@ { return cpu_thread_in_core(cpu) < cpu_smt_num_threads; } + +#define topology_is_core_online topology_is_core_online +static inline bool topology_is_core_online(unsigned int cpu) +{ + int i, first_cpu = cpu_first_thread_sibling(cpu); + + for (i = first_cpu; i < first_cpu + threads_per_core; ++i) { + if (cpu_online(i)) + return true; + } + return false; +} #endif #endif /* __KERNEL__ */ --- linux-xilinx-6.8.0.orig/arch/powerpc/include/asm/uaccess.h +++ linux-xilinx-6.8.0/arch/powerpc/include/asm/uaccess.h @@ -6,6 +6,7 @@ #include #include #include +#include #ifdef __powerpc64__ /* We use TASK_SIZE_USER64 as TASK_SIZE is not constant */ @@ -93,8 +94,18 @@ #endif #ifdef __powerpc64__ +#ifdef CONFIG_PPC_KERNEL_PREFIXED #define __put_user_asm2_goto(x, ptr, label) \ __put_user_asm_goto(x, ptr, label, "std") +#else +#define __put_user_asm2_goto(x, addr, label) \ + asm goto ("1: std%U1%X1 %0,%1 # put_user\n" \ + EX_TABLE(1b, %l2) \ + : \ + : "r" (x), DS_FORM_CONSTRAINT (*addr) \ + : \ + : label) +#endif // CONFIG_PPC_KERNEL_PREFIXED #else /* __powerpc64__ */ #define __put_user_asm2_goto(x, addr, label) \ asm goto( \ --- linux-xilinx-6.8.0.orig/arch/powerpc/include/asm/vdso.h +++ linux-xilinx-6.8.0/arch/powerpc/include/asm/vdso.h @@ -25,6 +25,7 @@ #ifdef __VDSO64__ #define V_FUNCTION_BEGIN(name) \ .globl name; \ + .type name,@function; \ name: \ #define V_FUNCTION_END(name) \ --- linux-xilinx-6.8.0.orig/arch/powerpc/include/asm/vdso_datapage.h +++ linux-xilinx-6.8.0/arch/powerpc/include/asm/vdso_datapage.h @@ -111,6 +111,21 @@ addi \ptr, \ptr, (_vdso_datapage - 999b)@l .endm +#include +#include + +.macro get_realdatapage ptr scratch + get_datapage \ptr +#ifdef CONFIG_TIME_NS + lwz \scratch, VDSO_CLOCKMODE_OFFSET(\ptr) + xoris \scratch, \scratch, VDSO_CLOCKMODE_TIMENS@h + xori \scratch, \scratch, VDSO_CLOCKMODE_TIMENS@l + cntlzw \scratch, \scratch + rlwinm \scratch, \scratch, PAGE_SHIFT - 5, 1 << PAGE_SHIFT + add \ptr, \ptr, \scratch +#endif +.endm + #endif /* __ASSEMBLY__ */ #endif /* __KERNEL__ */ --- linux-xilinx-6.8.0.orig/arch/powerpc/include/asm/vmalloc.h +++ linux-xilinx-6.8.0/arch/powerpc/include/asm/vmalloc.h @@ -7,14 +7,14 @@ #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP #define arch_vmap_pud_supported arch_vmap_pud_supported -static inline bool arch_vmap_pud_supported(pgprot_t prot) +static __always_inline bool arch_vmap_pud_supported(pgprot_t prot) { /* HPT does not cope with large pages in the vmalloc area */ return radix_enabled(); } #define arch_vmap_pmd_supported arch_vmap_pmd_supported -static inline bool arch_vmap_pmd_supported(pgprot_t prot) +static __always_inline bool arch_vmap_pmd_supported(pgprot_t prot) { return radix_enabled(); } --- linux-xilinx-6.8.0.orig/arch/powerpc/include/uapi/asm/kvm.h +++ linux-xilinx-6.8.0/arch/powerpc/include/uapi/asm/kvm.h @@ -646,6 +646,9 @@ #define KVM_REG_PPC_SIER3 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc3) #define KVM_REG_PPC_DAWR1 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc4) #define KVM_REG_PPC_DAWRX1 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc5) +#define KVM_REG_PPC_DEXCR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc6) +#define KVM_REG_PPC_HASHKEYR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc7) +#define KVM_REG_PPC_HASHPKEYR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc8) /* Transactional Memory checkpointed state: * This is all GPRs, all VSX regs and a subset of SPRs --- linux-xilinx-6.8.0.orig/arch/powerpc/kernel/asm-offsets.c +++ linux-xilinx-6.8.0/arch/powerpc/kernel/asm-offsets.c @@ -348,6 +348,8 @@ #else OFFSET(CFG_SYSCALL_MAP32, vdso_arch_data, syscall_map); #endif + OFFSET(VDSO_CLOCKMODE_OFFSET, vdso_arch_data, data[0].clock_mode); + DEFINE(VDSO_CLOCKMODE_TIMENS, VDSO_CLOCKMODE_TIMENS); #ifdef CONFIG_BUG DEFINE(BUG_ENTRY_SIZE, sizeof(struct bug_entry)); --- linux-xilinx-6.8.0.orig/arch/powerpc/kernel/dt_cpu_ftrs.c +++ linux-xilinx-6.8.0/arch/powerpc/kernel/dt_cpu_ftrs.c @@ -857,7 +857,7 @@ using_dt_cpu_ftrs = false; /* Setup and verify the FDT, if it fails we just bail */ - if (!early_init_dt_verify(fdt)) + if (!early_init_dt_verify(fdt, __pa(fdt))) return false; if (!of_scan_flat_dt(fdt_find_cpu_features, NULL)) --- linux-xilinx-6.8.0.orig/arch/powerpc/kernel/eeh_pe.c +++ linux-xilinx-6.8.0/arch/powerpc/kernel/eeh_pe.c @@ -849,6 +849,7 @@ { struct eeh_dev *edev; struct pci_dev *pdev; + struct pci_bus *bus = NULL; if (pe->type & EEH_PE_PHB) return pe->phb->bus; @@ -859,9 +860,11 @@ /* Retrieve the parent PCI bus of first (top) PCI device */ edev = list_first_entry_or_null(&pe->edevs, struct eeh_dev, entry); + pci_lock_rescan_remove(); pdev = eeh_dev_to_pci_dev(edev); if (pdev) - return pdev->bus; + bus = pdev->bus; + pci_unlock_rescan_remove(); - return NULL; + return bus; } --- linux-xilinx-6.8.0.orig/arch/powerpc/kernel/fadump.c +++ linux-xilinx-6.8.0/arch/powerpc/kernel/fadump.c @@ -80,27 +80,23 @@ * But for some reason even if it fails we still have the memory reservation * with us and we can still continue doing fadump. */ -static int __init fadump_cma_init(void) +void __init fadump_cma_init(void) { unsigned long long base, size; int rc; - if (!fw_dump.fadump_enabled) - return 0; - + if (!fw_dump.fadump_supported || !fw_dump.fadump_enabled || + fw_dump.dump_active) + return; /* * Do not use CMA if user has provided fadump=nocma kernel parameter. - * Return 1 to continue with fadump old behaviour. */ - if (fw_dump.nocma) - return 1; + if (fw_dump.nocma || !fw_dump.boot_memory_size) + return; base = fw_dump.reserve_dump_area_start; size = fw_dump.boot_memory_size; - if (!size) - return 0; - rc = cma_init_reserved_mem(base, size, 0, "fadump_cma", &fadump_cma); if (rc) { pr_err("Failed to init cma area for firmware-assisted dump,%d\n", rc); @@ -110,7 +106,7 @@ * blocked from production system usage. Hence return 1, * so that we can continue with fadump. */ - return 1; + return; } /* @@ -127,10 +123,7 @@ cma_get_size(fadump_cma), (unsigned long)cma_get_base(fadump_cma) >> 20, fw_dump.reserve_dump_area_size); - return 1; } -#else -static int __init fadump_cma_init(void) { return 1; } #endif /* CONFIG_CMA */ /* Scan the Firmware Assisted dump configuration details. */ @@ -647,8 +640,6 @@ pr_info("Reserved %lldMB of memory at %#016llx (System RAM: %lldMB)\n", (size >> 20), base, (memblock_phys_mem_size() >> 20)); - - ret = fadump_cma_init(); } return ret; --- linux-xilinx-6.8.0.orig/arch/powerpc/kernel/head_64.S +++ linux-xilinx-6.8.0/arch/powerpc/kernel/head_64.S @@ -647,8 +647,9 @@ * Note: This process overwrites the OF exception vectors. */ LOAD_REG_IMMEDIATE(r3, PAGE_OFFSET) - mr. r4,r26 /* In some cases the loader may */ - beq 9f /* have already put us at zero */ + mr r4,r26 /* Load the virtual source address into r4 */ + cmpld r3,r4 /* Check if source == dest */ + beq 9f /* If so skip the copy */ li r6,0x100 /* Start offset, the first 0x100 */ /* bytes were copied earlier. */ --- linux-xilinx-6.8.0.orig/arch/powerpc/kernel/head_8xx.S +++ linux-xilinx-6.8.0/arch/powerpc/kernel/head_8xx.S @@ -41,12 +41,12 @@ #include "head_32.h" .macro compare_to_kernel_boundary scratch, addr -#if CONFIG_TASK_SIZE <= 0x80000000 && CONFIG_PAGE_OFFSET >= 0x80000000 +#if CONFIG_TASK_SIZE <= 0x80000000 && MODULES_VADDR >= 0x80000000 /* By simply checking Address >= 0x80000000, we know if its a kernel address */ not. \scratch, \addr #else rlwinm \scratch, \addr, 16, 0xfff8 - cmpli cr0, \scratch, PAGE_OFFSET@h + cmpli cr0, \scratch, TASK_SIZE@h #endif .endm @@ -404,7 +404,7 @@ mfspr r10, SPRN_SRR0 mtspr SPRN_MD_EPN, r10 rlwinm r11, r10, 16, 0xfff8 - cmpli cr1, r11, PAGE_OFFSET@h + cmpli cr1, r11, TASK_SIZE@h mfspr r11, SPRN_M_TWB /* Get level 1 table */ blt+ cr1, 3f --- linux-xilinx-6.8.0.orig/arch/powerpc/kernel/iommu.c +++ linux-xilinx-6.8.0/arch/powerpc/kernel/iommu.c @@ -686,7 +686,7 @@ static void iommu_table_reserve_pages(struct iommu_table *tbl, unsigned long res_start, unsigned long res_end) { - int i; + unsigned long i; WARN_ON_ONCE(res_end < res_start); /* --- linux-xilinx-6.8.0.orig/arch/powerpc/kernel/kprobes-ftrace.c +++ linux-xilinx-6.8.0/arch/powerpc/kernel/kprobes-ftrace.c @@ -21,6 +21,9 @@ struct pt_regs *regs; int bit; + if (unlikely(kprobe_ftrace_disabled)) + return; + bit = ftrace_test_recursion_trylock(nip, parent_nip); if (bit < 0) return; --- linux-xilinx-6.8.0.orig/arch/powerpc/kernel/module_64.c +++ linux-xilinx-6.8.0/arch/powerpc/kernel/module_64.c @@ -347,12 +347,13 @@ static void dedotify_versions(struct modversion_info *vers, unsigned long size) { - struct modversion_info *end; + struct modversion_info *end = (void *)vers + size; - for (end = (void *)vers + size; vers < end; vers++) + for (; vers < end && vers->next; vers = (void *)vers + vers->next) { if (vers->name[0] == '.') { memmove(vers->name, vers->name+1, strlen(vers->name)); } + } } /* --- linux-xilinx-6.8.0.orig/arch/powerpc/kernel/pci-common.c +++ linux-xilinx-6.8.0/arch/powerpc/kernel/pci-common.c @@ -360,6 +360,7 @@ } return NULL; } +EXPORT_SYMBOL(pci_find_hose_for_OF_device); struct pci_controller *pci_find_controller_for_domain(int domain_nr) { @@ -1630,6 +1631,7 @@ { return pci_bus_find_capability(fake_pci_bus(hose, bus), devfn, cap); } +EXPORT_SYMBOL_GPL(early_find_capability); struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus) { --- linux-xilinx-6.8.0.orig/arch/powerpc/kernel/prom.c +++ linux-xilinx-6.8.0/arch/powerpc/kernel/prom.c @@ -327,6 +327,7 @@ void *data) { const char *type = of_get_flat_dt_prop(node, "device_type", NULL); + const __be32 *cpu_version = NULL; const __be32 *prop; const __be32 *intserv; int i, nthreads; @@ -375,6 +376,18 @@ if (IS_ENABLED(CONFIG_PPC64)) boot_cpu_hwid = be32_to_cpu(intserv[found_thread]); + if (nr_cpu_ids % nthreads != 0) { + set_nr_cpu_ids(ALIGN(nr_cpu_ids, nthreads)); + pr_warn("nr_cpu_ids was not a multiple of threads_per_core, adjusted to %d\n", + nr_cpu_ids); + } + + if (boot_cpuid >= nr_cpu_ids) { + set_nr_cpu_ids(min(CONFIG_NR_CPUS, ALIGN(boot_cpuid + 1, nthreads))); + pr_warn("Boot CPU %d >= nr_cpu_ids, adjusted nr_cpu_ids to %d\n", + boot_cpuid, nr_cpu_ids); + } + /* * PAPR defines "logical" PVR values for cpus that * meet various levels of the architecture: @@ -398,7 +411,7 @@ prop = of_get_flat_dt_prop(node, "cpu-version", NULL); if (prop && (be32_to_cpup(prop) & 0xff000000) == 0x0f000000) { identify_cpu(0, be32_to_cpup(prop)); - seq_buf_printf(&ppc_hw_desc, "0x%04x ", be32_to_cpup(prop)); + cpu_version = prop; } check_cpu_feature_properties(node); @@ -409,6 +422,12 @@ } identical_pvr_fixup(node); + + // We can now add the CPU name & PVR to the hardware description + seq_buf_printf(&ppc_hw_desc, "%s 0x%04lx ", cur_cpu_spec->cpu_name, mfspr(SPRN_PVR)); + if (cpu_version) + seq_buf_printf(&ppc_hw_desc, "0x%04x ", be32_to_cpup(cpu_version)); + init_mmu_slb_size(node); #ifdef CONFIG_PPC64 @@ -762,7 +781,7 @@ DBG(" -> early_init_devtree(%px)\n", params); /* Too early to BUG_ON(), do it by hand */ - if (!early_init_dt_verify(params)) + if (!early_init_dt_verify(params, __pa(params))) panic("BUG: Failed verifying flat device tree, bad version?"); of_scan_flat_dt(early_init_dt_scan_model, NULL); @@ -846,9 +865,6 @@ dt_cpu_ftrs_scan(); - // We can now add the CPU name & PVR to the hardware description - seq_buf_printf(&ppc_hw_desc, "%s 0x%04lx ", cur_cpu_spec->cpu_name, mfspr(SPRN_PVR)); - /* Retrieve CPU related informations from the flat tree * (altivec support, boot CPU ID, ...) */ --- linux-xilinx-6.8.0.orig/arch/powerpc/kernel/prom_init.c +++ linux-xilinx-6.8.0/arch/powerpc/kernel/prom_init.c @@ -2924,7 +2924,7 @@ #endif #if defined(CONFIG_PPC64) && defined(CONFIG_PPC_PMAC) -static void __init fixup_device_tree_pmac(void) +static void __init fixup_device_tree_pmac64(void) { phandle u3, i2c, mpic; u32 u3_rev; @@ -2964,7 +2964,31 @@ &parent, sizeof(parent)); } #else -#define fixup_device_tree_pmac() +#define fixup_device_tree_pmac64() +#endif + +#ifdef CONFIG_PPC_PMAC +static void __init fixup_device_tree_pmac(void) +{ + __be32 val = 1; + char type[8]; + phandle node; + + // Some pmacs are missing #size-cells on escc nodes + for (node = 0; prom_next_node(&node); ) { + type[0] = '\0'; + prom_getprop(node, "device_type", type, sizeof(type)); + if (prom_strcmp(type, "escc")) + continue; + + if (prom_getproplen(node, "#size-cells") != PROM_ERROR) + continue; + + prom_setprop(node, NULL, "#size-cells", &val, sizeof(val)); + } +} +#else +static inline void fixup_device_tree_pmac(void) { } #endif #ifdef CONFIG_PPC_EFIKA @@ -3189,6 +3213,7 @@ fixup_device_tree_maple_memory_controller(); fixup_device_tree_chrp(); fixup_device_tree_pmac(); + fixup_device_tree_pmac64(); fixup_device_tree_efika(); fixup_device_tree_pasemi(); } --- linux-xilinx-6.8.0.orig/arch/powerpc/kernel/rtas.c +++ linux-xilinx-6.8.0/arch/powerpc/kernel/rtas.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -1916,6 +1917,9 @@ || nargs + nret > ARRAY_SIZE(args.args)) return -EINVAL; + nargs = array_index_nospec(nargs, ARRAY_SIZE(args.args)); + nret = array_index_nospec(nret, ARRAY_SIZE(args.args) - nargs); + /* Copy in args. */ if (copy_from_user(args.args, uargs->args, nargs * sizeof(rtas_arg_t)) != 0) --- linux-xilinx-6.8.0.orig/arch/powerpc/kernel/setup-common.c +++ linux-xilinx-6.8.0/arch/powerpc/kernel/setup-common.c @@ -35,6 +35,7 @@ #include #include #include +#include #include #include #include @@ -67,6 +68,7 @@ #include #include #include +#include #include "setup.h" @@ -896,6 +898,16 @@ */ initialize_cache_info(); + /* + * Lock down the kernel if booted in secure mode. This is required to + * maintain kernel integrity. + */ + if (IS_ENABLED(CONFIG_LOCK_DOWN_IN_SECURE_BOOT)) { + if (is_ppc_secureboot_enabled()) + security_lock_kernel_down("PowerNV Secure Boot mode", + LOCKDOWN_INTEGRITY_MAX); + } + /* Initialize RTAS if available. */ rtas_initialize(); @@ -933,6 +945,7 @@ mem_topology_setup(); /* Set max_mapnr before paging_init() */ set_max_mapnr(max_pfn); + high_memory = (void *)__va(max_low_pfn * PAGE_SIZE); /* * Release secondary cpus out of their spinloops at 0x60 now that @@ -970,9 +983,11 @@ initmem_init(); /* - * Reserve large chunks of memory for use by CMA for KVM and hugetlb. These must - * be called after initmem_init(), so that pageblock_order is initialised. + * Reserve large chunks of memory for use by CMA for fadump, KVM and + * hugetlb. These must be called after initmem_init(), so that + * pageblock_order is initialised. */ + fadump_cma_init(); kvm_cma_reserve(); gigantic_hugetlb_cma_reserve(); --- linux-xilinx-6.8.0.orig/arch/powerpc/kernel/setup_64.c +++ linux-xilinx-6.8.0/arch/powerpc/kernel/setup_64.c @@ -834,6 +834,7 @@ unsigned long __per_cpu_offset[NR_CPUS] __read_mostly; EXPORT_SYMBOL(__per_cpu_offset); +DEFINE_STATIC_KEY_FALSE(__percpu_first_chunk_is_paged); void __init setup_per_cpu_areas(void) { @@ -876,6 +877,7 @@ if (rc < 0) panic("cannot initialize percpu area (err=%d)", rc); + static_key_enable(&__percpu_first_chunk_is_paged.key); delta = (unsigned long)pcpu_base_addr - (unsigned long)__per_cpu_start; for_each_possible_cpu(cpu) { __per_cpu_offset[cpu] = delta + pcpu_unit_offsets[cpu]; @@ -922,6 +924,7 @@ hardlockup_detector_disable(); #else if (firmware_has_feature(FW_FEATURE_LPAR)) { + check_kvm_guest(); if (is_kvm_guest()) hardlockup_detector_disable(); } --- linux-xilinx-6.8.0.orig/arch/powerpc/kernel/syscalls/syscall.tbl +++ linux-xilinx-6.8.0/arch/powerpc/kernel/syscalls/syscall.tbl @@ -230,8 +230,10 @@ 178 nospu rt_sigsuspend sys_rt_sigsuspend compat_sys_rt_sigsuspend 179 32 pread64 sys_ppc_pread64 compat_sys_ppc_pread64 179 64 pread64 sys_pread64 +179 spu pread64 sys_pread64 180 32 pwrite64 sys_ppc_pwrite64 compat_sys_ppc_pwrite64 180 64 pwrite64 sys_pwrite64 +180 spu pwrite64 sys_pwrite64 181 common chown sys_chown 182 common getcwd sys_getcwd 183 common capget sys_capget @@ -246,6 +248,7 @@ 190 common ugetrlimit sys_getrlimit compat_sys_getrlimit 191 32 readahead sys_ppc_readahead compat_sys_ppc_readahead 191 64 readahead sys_readahead +191 spu readahead sys_readahead 192 32 mmap2 sys_mmap2 compat_sys_mmap2 193 32 truncate64 sys_ppc_truncate64 compat_sys_ppc_truncate64 194 32 ftruncate64 sys_ppc_ftruncate64 compat_sys_ppc_ftruncate64 @@ -293,6 +296,7 @@ 232 nospu set_tid_address sys_set_tid_address 233 32 fadvise64 sys_ppc32_fadvise64 compat_sys_ppc32_fadvise64 233 64 fadvise64 sys_fadvise64 +233 spu fadvise64 sys_fadvise64 234 nospu exit_group sys_exit_group 235 nospu lookup_dcookie sys_ni_syscall 236 common epoll_create sys_epoll_create @@ -502,7 +506,7 @@ 412 32 utimensat_time64 sys_utimensat sys_utimensat 413 32 pselect6_time64 sys_pselect6 compat_sys_pselect6_time64 414 32 ppoll_time64 sys_ppoll compat_sys_ppoll_time64 -416 32 io_pgetevents_time64 sys_io_pgetevents sys_io_pgetevents +416 32 io_pgetevents_time64 sys_io_pgetevents compat_sys_io_pgetevents_time64 417 32 recvmmsg_time64 sys_recvmmsg compat_sys_recvmmsg_time64 418 32 mq_timedsend_time64 sys_mq_timedsend sys_mq_timedsend 419 32 mq_timedreceive_time64 sys_mq_timedreceive sys_mq_timedreceive --- linux-xilinx-6.8.0.orig/arch/powerpc/kernel/vdso/Makefile +++ linux-xilinx-6.8.0/arch/powerpc/kernel/vdso/Makefile @@ -10,28 +10,11 @@ ifneq ($(c-gettimeofday-y),) CFLAGS_vgettimeofday-32.o += -include $(c-gettimeofday-y) - CFLAGS_vgettimeofday-32.o += $(DISABLE_LATENT_ENTROPY_PLUGIN) - CFLAGS_vgettimeofday-32.o += $(call cc-option, -fno-stack-protector) - CFLAGS_vgettimeofday-32.o += -DDISABLE_BRANCH_PROFILING - CFLAGS_vgettimeofday-32.o += -ffreestanding -fasynchronous-unwind-tables - CFLAGS_REMOVE_vgettimeofday-32.o = $(CC_FLAGS_FTRACE) - CFLAGS_REMOVE_vgettimeofday-32.o += -mcmodel=medium -mabi=elfv1 -mabi=elfv2 -mcall-aixdesc - # This flag is supported by clang for 64-bit but not 32-bit so it will cause - # an unused command line flag warning for this file. - ifdef CONFIG_CC_IS_CLANG - CFLAGS_REMOVE_vgettimeofday-32.o += -fno-stack-clash-protection - endif - CFLAGS_vgettimeofday-64.o += -include $(c-gettimeofday-y) - CFLAGS_vgettimeofday-64.o += $(DISABLE_LATENT_ENTROPY_PLUGIN) - CFLAGS_vgettimeofday-64.o += $(call cc-option, -fno-stack-protector) - CFLAGS_vgettimeofday-64.o += -DDISABLE_BRANCH_PROFILING - CFLAGS_vgettimeofday-64.o += -ffreestanding -fasynchronous-unwind-tables - CFLAGS_REMOVE_vgettimeofday-64.o = $(CC_FLAGS_FTRACE) # Go prior to 1.16.x assumes r30 is not clobbered by any VDSO code. That used to be true # by accident when the VDSO was hand-written asm code, but may not be now that the VDSO is # compiler generated. To avoid breaking Go tell GCC not to use r30. Impact on code # generation is minimal, it will just use r29 instead. - CFLAGS_vgettimeofday-64.o += $(call cc-option, -ffixed-r30) + CFLAGS_vgettimeofday-64.o += -include $(c-gettimeofday-y) $(call cc-option, -ffixed-r30) endif # Build rules @@ -54,6 +37,11 @@ KCSAN_SANITIZE := n ccflags-y := -fno-common -fno-builtin +ccflags-y += $(DISABLE_LATENT_ENTROPY_PLUGIN) +ccflags-y += $(call cc-option, -fno-stack-protector) +ccflags-y += -DDISABLE_BRANCH_PROFILING +ccflags-y += -ffreestanding -fasynchronous-unwind-tables +ccflags-remove-y := $(CC_FLAGS_FTRACE) ldflags-y := -Wl,--hash-style=both -nostdlib -shared -z noexecstack $(CLANG_FLAGS) ldflags-$(CONFIG_LD_IS_LLD) += $(call cc-option,--ld-path=$(LD),-fuse-ld=lld) ldflags-$(CONFIG_LD_ORPHAN_WARN) += -Wl,--orphan-handling=$(CONFIG_LD_ORPHAN_WARN_LEVEL) @@ -62,6 +50,16 @@ ldflags-y += $(filter-out $(CC_AUTO_VAR_INIT_ZERO_ENABLER) $(CC_FLAGS_FTRACE) -Wa$(comma)%, $(KBUILD_CFLAGS)) CC32FLAGS := -m32 +CC32FLAGSREMOVE := -mcmodel=medium -mabi=elfv1 -mabi=elfv2 -mcall-aixdesc +ifdef CONFIG_CC_IS_CLANG +# This flag is supported by clang for 64-bit but not 32-bit so it will cause +# an unused command line flag warning for this file. +CC32FLAGSREMOVE += -fno-stack-clash-protection +# -mstack-protector-guard values from the 64-bit build are not valid for the +# 32-bit one. clang validates the values passed to these arguments during +# parsing, even when -fno-stack-protector is passed afterwards. +CC32FLAGSREMOVE += -mstack-protector-guard% +endif LD32FLAGS := -Wl,-soname=linux-vdso32.so.1 AS32FLAGS := -D__VDSO32__ @@ -108,7 +106,7 @@ quiet_cmd_vdso32as = VDSO32A $@ cmd_vdso32as = $(VDSOCC) $(a_flags) $(CC32FLAGS) $(AS32FLAGS) -c -o $@ $< quiet_cmd_vdso32cc = VDSO32C $@ - cmd_vdso32cc = $(VDSOCC) $(c_flags) $(CC32FLAGS) -c -o $@ $< + cmd_vdso32cc = $(VDSOCC) $(filter-out $(CC32FLAGSREMOVE), $(c_flags)) $(CC32FLAGS) -c -o $@ $< quiet_cmd_vdso64ld_and_check = VDSO64L $@ cmd_vdso64ld_and_check = $(VDSOCC) $(ldflags-y) $(LD64FLAGS) -o $@ -Wl,-T$(filter %.lds,$^) $(filter %.o,$^); $(cmd_vdso_check) --- linux-xilinx-6.8.0.orig/arch/powerpc/kernel/vdso/cacheflush.S +++ linux-xilinx-6.8.0/arch/powerpc/kernel/vdso/cacheflush.S @@ -30,7 +30,7 @@ #ifdef CONFIG_PPC64 mflr r12 .cfi_register lr,r12 - get_datapage r10 + get_realdatapage r10, r11 mtlr r12 .cfi_restore lr #endif --- linux-xilinx-6.8.0.orig/arch/powerpc/kernel/vdso/datapage.S +++ linux-xilinx-6.8.0/arch/powerpc/kernel/vdso/datapage.S @@ -28,7 +28,7 @@ mflr r12 .cfi_register lr,r12 mr. r4,r3 - get_datapage r3 + get_realdatapage r3, r11 mtlr r12 #ifdef __powerpc64__ addi r3,r3,CFG_SYSCALL_MAP64 @@ -52,7 +52,7 @@ .cfi_startproc mflr r12 .cfi_register lr,r12 - get_datapage r3 + get_realdatapage r3, r11 #ifndef __powerpc64__ lwz r4,(CFG_TB_TICKS_PER_SEC + 4)(r3) #endif --- linux-xilinx-6.8.0.orig/arch/powerpc/kernel/vdso/gettimeofday.S +++ linux-xilinx-6.8.0/arch/powerpc/kernel/vdso/gettimeofday.S @@ -38,11 +38,7 @@ .else addi r4, r5, VDSO_DATA_OFFSET .endif -#ifdef __powerpc64__ bl CFUNC(DOTSYM(\funct)) -#else - bl \funct -#endif PPC_LL r0, PPC_MIN_STKFRM + PPC_LR_STKOFF(r1) #ifdef __powerpc64__ PPC_LL r2, PPC_MIN_STKFRM + STK_GOT(r1) --- linux-xilinx-6.8.0.orig/arch/powerpc/kernel/vdso/vdso32.lds.S +++ linux-xilinx-6.8.0/arch/powerpc/kernel/vdso/vdso32.lds.S @@ -74,6 +74,8 @@ .got : { *(.got) } :text .plt : { *(.plt) } + .rela.dyn : { *(.rela .rela*) } + _end = .; __end = .; PROVIDE(end = .); @@ -87,7 +89,7 @@ *(.branch_lt) *(.data .data.* .gnu.linkonce.d.* .sdata*) *(.bss .sbss .dynbss .dynsbss) - *(.got1 .glink .iplt .rela*) + *(.got1 .glink .iplt) } } --- linux-xilinx-6.8.0.orig/arch/powerpc/kernel/vdso/vdso64.lds.S +++ linux-xilinx-6.8.0/arch/powerpc/kernel/vdso/vdso64.lds.S @@ -69,7 +69,7 @@ .eh_frame_hdr : { *(.eh_frame_hdr) } :text :eh_frame_hdr .eh_frame : { KEEP (*(.eh_frame)) } :text .gcc_except_table : { *(.gcc_except_table) } - .rela.dyn ALIGN(8) : { *(.rela.dyn) } + .rela.dyn ALIGN(8) : { *(.rela .rela*) } .got ALIGN(8) : { *(.got .toc) } @@ -86,7 +86,7 @@ *(.data .data.* .gnu.linkonce.d.* .sdata*) *(.bss .sbss .dynbss .dynsbss) *(.opd) - *(.glink .iplt .plt .rela*) + *(.glink .iplt .plt) } } --- linux-xilinx-6.8.0.orig/arch/powerpc/kernel/vmlinux.lds.S +++ linux-xilinx-6.8.0/arch/powerpc/kernel/vmlinux.lds.S @@ -123,8 +123,6 @@ */ *(.sfpr); *(.text.asan.* .text.tsan.*) - MEM_KEEP(init.text) - MEM_KEEP(exit.text) } :text . = ALIGN(PAGE_SIZE); --- linux-xilinx-6.8.0.orig/arch/powerpc/kexec/core_64.c +++ linux-xilinx-6.8.0/arch/powerpc/kexec/core_64.c @@ -26,6 +26,7 @@ #include #include #include /* _end */ +#include #include #include #include @@ -315,6 +316,16 @@ if (!kdump_in_progress()) kexec_prepare_cpus(); +#ifdef CONFIG_PPC_PSERIES + /* + * This must be done after other CPUs have shut down, otherwise they + * could execute the 'scv' instruction, which is not supported with + * reloc disabled (see configure_exceptions()). + */ + if (firmware_has_feature(FW_FEATURE_SET_MODE)) + pseries_disable_reloc_on_exc(); +#endif + printk("kexec: Starting switchover sequence.\n"); /* switch to a staticly allocated stack. Based on irq stack code. --- linux-xilinx-6.8.0.orig/arch/powerpc/kexec/file_load_64.c +++ linux-xilinx-6.8.0/arch/powerpc/kexec/file_load_64.c @@ -916,13 +916,18 @@ if (dn) { u64 val; - of_property_read_u64(dn, "opal-base-address", &val); + ret = of_property_read_u64(dn, "opal-base-address", &val); + if (ret) + goto out; + ret = kexec_purgatory_get_set_symbol(image, "opal_base", &val, sizeof(val), false); if (ret) goto out; - of_property_read_u64(dn, "opal-entry-address", &val); + ret = of_property_read_u64(dn, "opal-entry-address", &val); + if (ret) + goto out; ret = kexec_purgatory_get_set_symbol(image, "opal_entry", &val, sizeof(val), false); } --- linux-xilinx-6.8.0.orig/arch/powerpc/kvm/book3s_64_vio.c +++ linux-xilinx-6.8.0/arch/powerpc/kvm/book3s_64_vio.c @@ -130,14 +130,16 @@ } rcu_read_unlock(); - fdput(f); - - if (!found) + if (!found) { + fdput(f); return -EINVAL; + } table_group = iommu_group_get_iommudata(grp); - if (WARN_ON(!table_group)) + if (WARN_ON(!table_group)) { + fdput(f); return -EFAULT; + } for (i = 0; i < IOMMU_TABLE_GROUP_MAX_TABLES; ++i) { struct iommu_table *tbltmp = table_group->tables[i]; @@ -158,8 +160,10 @@ break; } } - if (!tbl) + if (!tbl) { + fdput(f); return -EINVAL; + } rcu_read_lock(); list_for_each_entry_rcu(stit, &stt->iommu_tables, next) { @@ -170,6 +174,7 @@ /* stit is being destroyed */ iommu_tce_table_put(tbl); rcu_read_unlock(); + fdput(f); return -ENOTTY; } /* @@ -177,6 +182,7 @@ * its KVM reference counter and can return. */ rcu_read_unlock(); + fdput(f); return 0; } rcu_read_unlock(); @@ -184,6 +190,7 @@ stit = kzalloc(sizeof(*stit), GFP_KERNEL); if (!stit) { iommu_tce_table_put(tbl); + fdput(f); return -ENOMEM; } @@ -192,6 +199,7 @@ list_add_rcu(&stit->next, &stt->iommu_tables); + fdput(f); return 0; } --- linux-xilinx-6.8.0.orig/arch/powerpc/kvm/book3s_hv.c +++ linux-xilinx-6.8.0/arch/powerpc/kvm/book3s_hv.c @@ -2304,7 +2304,7 @@ *val = get_reg_val(id, kvmppc_get_siar_hv(vcpu)); break; case KVM_REG_PPC_SDAR: - *val = get_reg_val(id, kvmppc_get_siar_hv(vcpu)); + *val = get_reg_val(id, kvmppc_get_sdar_hv(vcpu)); break; case KVM_REG_PPC_SIER: *val = get_reg_val(id, kvmppc_get_sier_hv(vcpu, 0)); @@ -2348,6 +2348,15 @@ case KVM_REG_PPC_DAWRX1: *val = get_reg_val(id, kvmppc_get_dawrx1_hv(vcpu)); break; + case KVM_REG_PPC_DEXCR: + *val = get_reg_val(id, kvmppc_get_dexcr_hv(vcpu)); + break; + case KVM_REG_PPC_HASHKEYR: + *val = get_reg_val(id, kvmppc_get_hashkeyr_hv(vcpu)); + break; + case KVM_REG_PPC_HASHPKEYR: + *val = get_reg_val(id, kvmppc_get_hashpkeyr_hv(vcpu)); + break; case KVM_REG_PPC_CIABR: *val = get_reg_val(id, kvmppc_get_ciabr_hv(vcpu)); break; @@ -2539,7 +2548,7 @@ vcpu->arch.mmcrs = set_reg_val(id, *val); break; case KVM_REG_PPC_MMCR3: - *val = get_reg_val(id, vcpu->arch.mmcr[3]); + kvmppc_set_mmcr_hv(vcpu, 3, set_reg_val(id, *val)); break; case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8: i = id - KVM_REG_PPC_PMC1; @@ -2591,6 +2600,15 @@ case KVM_REG_PPC_DAWRX1: kvmppc_set_dawrx1_hv(vcpu, set_reg_val(id, *val) & ~DAWRX_HYP); break; + case KVM_REG_PPC_DEXCR: + kvmppc_set_dexcr_hv(vcpu, set_reg_val(id, *val)); + break; + case KVM_REG_PPC_HASHKEYR: + kvmppc_set_hashkeyr_hv(vcpu, set_reg_val(id, *val)); + break; + case KVM_REG_PPC_HASHPKEYR: + kvmppc_set_hashpkeyr_hv(vcpu, set_reg_val(id, *val)); + break; case KVM_REG_PPC_CIABR: kvmppc_set_ciabr_hv(vcpu, set_reg_val(id, *val)); /* Don't allow setting breakpoints in hypervisor code */ @@ -4115,6 +4133,11 @@ int trap; long rc; + if (vcpu->arch.doorbell_request) { + vcpu->arch.doorbell_request = 0; + kvmppc_set_dpdes(vcpu, 1); + } + io = &vcpu->arch.nestedv2_io; msr = mfmsr(); @@ -4205,6 +4228,15 @@ hvregs.hdec_expiry = time_limit; /* + * hvregs has the doorbell status, so zero it here which + * enables us to receive doorbells when H_ENTER_NESTED is + * in progress for this vCPU + */ + + if (vcpu->arch.doorbell_request) + vcpu->arch.doorbell_request = 0; + + /* * When setting DEC, we must always deal with irq_work_raise * via NMI vs setting DEC. The problem occurs right as we * switch into guest mode if a NMI hits and sets pending work @@ -4793,9 +4825,20 @@ BOOK3S_INTERRUPT_EXTERNAL, 0); else lpcr |= LPCR_MER; + } else { + /* + * L1's copy of L2's LPCR (vcpu->arch.vcore->lpcr) can get its MER bit + * unexpectedly set - for e.g. during NMI handling when all register + * states are synchronized from L0 to L1. L1 needs to inform L0 about + * MER=1 only when there are pending external interrupts. + * In the above if check, MER bit is set if there are pending + * external interrupts. Hence, explicity mask off MER bit + * here as otherwise it may generate spurious interrupts in L2 KVM + * causing an endless loop, which results in L2 guest getting hung. + */ + lpcr &= ~LPCR_MER; } } else if (vcpu->arch.pending_exceptions || - vcpu->arch.doorbell_request || xive_interrupt_pending(vcpu)) { vcpu->arch.ret = RESUME_HOST; goto out; @@ -4856,7 +4899,7 @@ * entering a nested guest in which case the decrementer is now owned * by L2 and the L1 decrementer is provided in hdec_expires */ - if (!kvmhv_is_nestedv2() && kvmppc_core_pending_dec(vcpu) && + if (kvmppc_core_pending_dec(vcpu) && ((tb < kvmppc_dec_expires_host_tb(vcpu)) || (trap == BOOK3S_INTERRUPT_SYSCALL && kvmppc_get_gpr(vcpu, 3) == H_ENTER_NESTED))) @@ -6374,10 +6417,6 @@ .fast_vcpu_kick = kvmppc_fast_vcpu_kick_hv, .arch_vm_ioctl = kvm_arch_vm_ioctl_hv, .hcall_implemented = kvmppc_hcall_impl_hv, -#ifdef CONFIG_KVM_XICS - .irq_bypass_add_producer = kvmppc_irq_bypass_add_producer_hv, - .irq_bypass_del_producer = kvmppc_irq_bypass_del_producer_hv, -#endif .configure_mmu = kvmhv_configure_mmu, .get_rmmu_info = kvmhv_get_rmmu_info, .set_smt_mode = kvmhv_set_smt_mode, @@ -6495,6 +6534,22 @@ return r; } +#if defined(CONFIG_KVM_XICS) + /* + * IRQ bypass is supported only for interrupts whose EOI operations are + * handled via OPAL calls. Therefore, register IRQ bypass handlers + * exclusively for PowerNV KVM when booted with 'xive=off', indicating + * the use of the emulated XICS interrupt controller. + */ + if (!kvmhv_on_pseries()) { + pr_info("KVM-HV: Enabling IRQ bypass\n"); + kvm_ops_hv.irq_bypass_add_producer = + kvmppc_irq_bypass_add_producer_hv; + kvm_ops_hv.irq_bypass_del_producer = + kvmppc_irq_bypass_del_producer_hv; + } +#endif + kvm_ops_hv.owner = THIS_MODULE; kvmppc_hv_ops = &kvm_ops_hv; --- linux-xilinx-6.8.0.orig/arch/powerpc/kvm/book3s_hv.h +++ linux-xilinx-6.8.0/arch/powerpc/kvm/book3s_hv.h @@ -116,6 +116,9 @@ KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(dawr1, 64, KVMPPC_GSID_DAWR1) KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(dawrx0, 64, KVMPPC_GSID_DAWRX0) KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(dawrx1, 64, KVMPPC_GSID_DAWRX1) +KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(dexcr, 64, KVMPPC_GSID_DEXCR) +KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(hashkeyr, 64, KVMPPC_GSID_HASHKEYR) +KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(hashpkeyr, 64, KVMPPC_GSID_HASHPKEYR) KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(ciabr, 64, KVMPPC_GSID_CIABR) KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(wort, 64, KVMPPC_GSID_WORT) KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(ppr, 64, KVMPPC_GSID_PPR) --- linux-xilinx-6.8.0.orig/arch/powerpc/kvm/book3s_hv_nested.c +++ linux-xilinx-6.8.0/arch/powerpc/kvm/book3s_hv_nested.c @@ -32,7 +32,7 @@ struct kvmppc_vcore *vc = vcpu->arch.vcore; hr->pcr = vc->pcr | PCR_MASK; - hr->dpdes = vc->dpdes; + hr->dpdes = vcpu->arch.doorbell_request; hr->hfscr = vcpu->arch.hfscr; hr->tb_offset = vc->tb_offset; hr->dawr0 = vcpu->arch.dawr0; @@ -105,7 +105,7 @@ { struct kvmppc_vcore *vc = vcpu->arch.vcore; - hr->dpdes = vc->dpdes; + hr->dpdes = vcpu->arch.doorbell_request; hr->purr = vcpu->arch.purr; hr->spurr = vcpu->arch.spurr; hr->ic = vcpu->arch.ic; @@ -143,7 +143,7 @@ struct kvmppc_vcore *vc = vcpu->arch.vcore; vc->pcr = hr->pcr | PCR_MASK; - vc->dpdes = hr->dpdes; + vcpu->arch.doorbell_request = hr->dpdes; vcpu->arch.hfscr = hr->hfscr; vcpu->arch.dawr0 = hr->dawr0; vcpu->arch.dawrx0 = hr->dawrx0; @@ -170,7 +170,13 @@ { struct kvmppc_vcore *vc = vcpu->arch.vcore; - vc->dpdes = hr->dpdes; + /* + * This L2 vCPU might have received a doorbell while H_ENTER_NESTED was being handled. + * Make sure we preserve the doorbell if it was either: + * a) Sent after H_ENTER_NESTED was called on this vCPU (arch.doorbell_request would be 1) + * b) Doorbell was not handled and L2 exited for some other reason (hr->dpdes would be 1) + */ + vcpu->arch.doorbell_request = vcpu->arch.doorbell_request | hr->dpdes; vcpu->arch.hfscr = hr->hfscr; vcpu->arch.purr = hr->purr; vcpu->arch.spurr = hr->spurr; --- linux-xilinx-6.8.0.orig/arch/powerpc/kvm/book3s_hv_nestedv2.c +++ linux-xilinx-6.8.0/arch/powerpc/kvm/book3s_hv_nestedv2.c @@ -71,8 +71,8 @@ } if (kvmppc_gsm_includes(gsm, KVMPPC_GSID_RUN_OUTPUT)) { - kvmppc_gse_put_buff_info(gsb, KVMPPC_GSID_RUN_OUTPUT, - cfg->vcpu_run_output_cfg); + rc = kvmppc_gse_put_buff_info(gsb, KVMPPC_GSID_RUN_OUTPUT, + cfg->vcpu_run_output_cfg); if (rc < 0) return rc; } @@ -193,6 +193,15 @@ case KVMPPC_GSID_DAWRX1: rc = kvmppc_gse_put_u32(gsb, iden, vcpu->arch.dawrx1); break; + case KVMPPC_GSID_DEXCR: + rc = kvmppc_gse_put_u64(gsb, iden, vcpu->arch.dexcr); + break; + case KVMPPC_GSID_HASHKEYR: + rc = kvmppc_gse_put_u64(gsb, iden, vcpu->arch.hashkeyr); + break; + case KVMPPC_GSID_HASHPKEYR: + rc = kvmppc_gse_put_u64(gsb, iden, vcpu->arch.hashpkeyr); + break; case KVMPPC_GSID_CIABR: rc = kvmppc_gse_put_u64(gsb, iden, vcpu->arch.ciabr); break; @@ -311,6 +320,10 @@ rc = kvmppc_gse_put_u64(gsb, iden, vcpu->arch.vcore->vtb); break; + case KVMPPC_GSID_DPDES: + rc = kvmppc_gse_put_u64(gsb, iden, + vcpu->arch.vcore->dpdes); + break; case KVMPPC_GSID_LPCR: rc = kvmppc_gse_put_u64(gsb, iden, vcpu->arch.vcore->lpcr); @@ -441,6 +454,15 @@ case KVMPPC_GSID_DAWRX1: vcpu->arch.dawrx1 = kvmppc_gse_get_u32(gse); break; + case KVMPPC_GSID_DEXCR: + vcpu->arch.dexcr = kvmppc_gse_get_u64(gse); + break; + case KVMPPC_GSID_HASHKEYR: + vcpu->arch.hashkeyr = kvmppc_gse_get_u64(gse); + break; + case KVMPPC_GSID_HASHPKEYR: + vcpu->arch.hashpkeyr = kvmppc_gse_get_u64(gse); + break; case KVMPPC_GSID_CIABR: vcpu->arch.ciabr = kvmppc_gse_get_u64(gse); break; @@ -543,6 +565,9 @@ case KVMPPC_GSID_VTB: vcpu->arch.vcore->vtb = kvmppc_gse_get_u64(gse); break; + case KVMPPC_GSID_DPDES: + vcpu->arch.vcore->dpdes = kvmppc_gse_get_u64(gse); + break; case KVMPPC_GSID_LPCR: vcpu->arch.vcore->lpcr = kvmppc_gse_get_u64(gse); break; --- linux-xilinx-6.8.0.orig/arch/powerpc/kvm/powerpc.c +++ linux-xilinx-6.8.0/arch/powerpc/kvm/powerpc.c @@ -1852,7 +1852,7 @@ kvm_sigset_activate(vcpu); - if (run->immediate_exit) + if (!vcpu->wants_to_run) r = -EINTR; else r = kvmppc_vcpu_run(vcpu); @@ -1984,8 +1984,10 @@ break; r = -ENXIO; - if (!xive_enabled()) + if (!xive_enabled()) { + fdput(f); break; + } r = -EPERM; dev = kvm_device_from_filp(f.file); --- linux-xilinx-6.8.0.orig/arch/powerpc/kvm/test-guest-state-buffer.c +++ linux-xilinx-6.8.0/arch/powerpc/kvm/test-guest-state-buffer.c @@ -151,7 +151,7 @@ i++; } - for (u16 iden = KVMPPC_GSID_GPR(0); iden <= KVMPPC_GSID_CTRL; iden++) { + for (u16 iden = KVMPPC_GSID_GPR(0); iden <= KVMPPC_GSE_DW_REGS_END; iden++) { kvmppc_gsbm_set(&gsbm, iden); kvmppc_gsbm_set(&gsbm1, iden); KUNIT_EXPECT_TRUE(test, kvmppc_gsbm_test(&gsbm, iden)); --- linux-xilinx-6.8.0.orig/arch/powerpc/lib/Makefile +++ linux-xilinx-6.8.0/arch/powerpc/lib/Makefile @@ -76,7 +76,7 @@ obj-$(CONFIG_FTR_FIXUP_SELFTEST) += feature-fixups-test.o obj-$(CONFIG_ALTIVEC) += xor_vmx.o xor_vmx_glue.o -CFLAGS_xor_vmx.o += -maltivec $(call cc-option,-mabi=altivec) +CFLAGS_xor_vmx.o += -mhard-float -maltivec $(call cc-option,-mabi=altivec) # Enable CFLAGS_xor_vmx.o += -isystem $(shell $(CC) -print-file-name=include) --- linux-xilinx-6.8.0.orig/arch/powerpc/lib/code-patching.c +++ linux-xilinx-6.8.0/arch/powerpc/lib/code-patching.c @@ -106,7 +106,7 @@ unsigned long addr; int err; - area = get_vm_area(PAGE_SIZE, VM_ALLOC); + area = get_vm_area(PAGE_SIZE, 0); if (!area) { WARN_ONCE(1, "Failed to create text area for cpu %d\n", cpu); @@ -430,7 +430,9 @@ orig_mm = start_using_temp_mm(patching_mm); + kasan_disable_current(); err = __patch_instructions(patch_addr, code, len, repeat_instr); + kasan_enable_current(); /* context synchronisation performed by __patch_instructions */ stop_using_temp_mm(patching_mm, orig_mm); --- linux-xilinx-6.8.0.orig/arch/powerpc/lib/qspinlock.c +++ linux-xilinx-6.8.0/arch/powerpc/lib/qspinlock.c @@ -697,7 +697,15 @@ } release: - qnodesp->count--; /* release the node */ + /* + * Clear the lock before releasing the node, as another CPU might see stale + * values if an interrupt occurs after we increment qnodesp->count + * but before node->lock is initialized. The barrier ensures that + * there are no further stores to the node after it has been released. + */ + node->lock = NULL; + barrier(); + qnodesp->count--; } void queued_spin_lock_slowpath(struct qspinlock *lock) --- linux-xilinx-6.8.0.orig/arch/powerpc/lib/sstep.c +++ linux-xilinx-6.8.0/arch/powerpc/lib/sstep.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -780,8 +781,8 @@ #endif /* __powerpc64 */ #ifdef CONFIG_VSX -void emulate_vsx_load(struct instruction_op *op, union vsx_reg *reg, - const void *mem, bool rev) +static nokprobe_inline void emulate_vsx_load(struct instruction_op *op, union vsx_reg *reg, + const void *mem, bool rev) { int size, read_size; int i, j; @@ -863,11 +864,9 @@ break; } } -EXPORT_SYMBOL_GPL(emulate_vsx_load); -NOKPROBE_SYMBOL(emulate_vsx_load); -void emulate_vsx_store(struct instruction_op *op, const union vsx_reg *reg, - void *mem, bool rev) +static nokprobe_inline void emulate_vsx_store(struct instruction_op *op, const union vsx_reg *reg, + void *mem, bool rev) { int size, write_size; int i, j; @@ -955,8 +954,6 @@ break; } } -EXPORT_SYMBOL_GPL(emulate_vsx_store); -NOKPROBE_SYMBOL(emulate_vsx_store); static nokprobe_inline int do_vsx_load(struct instruction_op *op, unsigned long ea, struct pt_regs *regs, --- linux-xilinx-6.8.0.orig/arch/powerpc/mm/book3s64/pgtable.c +++ linux-xilinx-6.8.0/arch/powerpc/mm/book3s64/pgtable.c @@ -130,7 +130,7 @@ WARN_ON(pte_hw_valid(pud_pte(*pudp))); assert_spin_locked(pud_lockptr(mm, pudp)); - WARN_ON(!(pud_large(pud))); + WARN_ON(!(pud_leaf(pud))); #endif trace_hugepage_set_pud(addr, pud_val(pud)); return set_pte_at(mm, addr, pudp_ptep(pudp), pud_pte(pud)); @@ -170,6 +170,7 @@ { unsigned long old_pmd; + VM_WARN_ON_ONCE(!pmd_present(*pmdp)); old_pmd = pmd_hugepage_update(vma->vm_mm, address, pmdp, _PAGE_PRESENT, _PAGE_INVALID); flush_pmd_tlb_range(vma, address, address + HPAGE_PMD_SIZE); return __pmd(old_pmd); --- linux-xilinx-6.8.0.orig/arch/powerpc/mm/book3s64/radix_pgtable.c +++ linux-xilinx-6.8.0/arch/powerpc/mm/book3s64/radix_pgtable.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include @@ -31,6 +32,7 @@ #include #include #include +#include #include @@ -293,7 +295,8 @@ static int __meminit create_physical_mapping(unsigned long start, unsigned long end, - int nid, pgprot_t _prot) + int nid, pgprot_t _prot, + unsigned long mapping_sz_limit) { unsigned long vaddr, addr, mapping_size = 0; bool prev_exec, exec = false; @@ -301,7 +304,10 @@ int psize; unsigned long max_mapping_size = memory_block_size; - if (debug_pagealloc_enabled_or_kfence()) + if (mapping_sz_limit < max_mapping_size) + max_mapping_size = mapping_sz_limit; + + if (debug_pagealloc_enabled()) max_mapping_size = PAGE_SIZE; start = ALIGN(start, PAGE_SIZE); @@ -356,8 +362,74 @@ return 0; } +#ifdef CONFIG_KFENCE +static bool __ro_after_init kfence_early_init = !!CONFIG_KFENCE_SAMPLE_INTERVAL; + +static int __init parse_kfence_early_init(char *arg) +{ + int val; + + if (get_option(&arg, &val)) + kfence_early_init = !!val; + return 0; +} +early_param("kfence.sample_interval", parse_kfence_early_init); + +static inline phys_addr_t alloc_kfence_pool(void) +{ + phys_addr_t kfence_pool; + + /* + * TODO: Support to enable KFENCE after bootup depends on the ability to + * split page table mappings. As such support is not currently + * implemented for radix pagetables, support enabling KFENCE + * only at system startup for now. + * + * After support for splitting mappings is available on radix, + * alloc_kfence_pool() & map_kfence_pool() can be dropped and + * mapping for __kfence_pool memory can be + * split during arch_kfence_init_pool(). + */ + if (!kfence_early_init) + goto no_kfence; + + kfence_pool = memblock_phys_alloc(KFENCE_POOL_SIZE, PAGE_SIZE); + if (!kfence_pool) + goto no_kfence; + + memblock_mark_nomap(kfence_pool, KFENCE_POOL_SIZE); + return kfence_pool; + +no_kfence: + disable_kfence(); + return 0; +} + +static inline void map_kfence_pool(phys_addr_t kfence_pool) +{ + if (!kfence_pool) + return; + + if (create_physical_mapping(kfence_pool, kfence_pool + KFENCE_POOL_SIZE, + -1, PAGE_KERNEL, PAGE_SIZE)) + goto err; + + memblock_clear_nomap(kfence_pool, KFENCE_POOL_SIZE); + __kfence_pool = __va(kfence_pool); + return; + +err: + memblock_phys_free(kfence_pool, KFENCE_POOL_SIZE); + disable_kfence(); +} +#else +static inline phys_addr_t alloc_kfence_pool(void) { return 0; } +static inline void map_kfence_pool(phys_addr_t kfence_pool) { } +#endif + static void __init radix_init_pgtable(void) { + phys_addr_t kfence_pool; unsigned long rts_field; phys_addr_t start, end; u64 i; @@ -365,6 +437,8 @@ /* We don't support slb for radix */ slb_set_size(0); + kfence_pool = alloc_kfence_pool(); + /* * Create the linear mapping */ @@ -381,9 +455,11 @@ } WARN_ON(create_physical_mapping(start, end, - -1, PAGE_KERNEL)); + -1, PAGE_KERNEL, ~0UL)); } + map_kfence_pool(kfence_pool); + if (!cpu_has_feature(CPU_FTR_HVMODE) && cpu_has_feature(CPU_FTR_P9_RADIX_PREFETCH_BUG)) { /* @@ -875,7 +951,7 @@ } return create_physical_mapping(__pa(start), __pa(end), - nid, prot); + nid, prot, ~0UL); } int __meminit radix__remove_section_mapping(unsigned long start, unsigned long end) --- linux-xilinx-6.8.0.orig/arch/powerpc/mm/fault.c +++ linux-xilinx-6.8.0/arch/powerpc/mm/fault.c @@ -432,10 +432,16 @@ /* * The kernel should never take an execute fault nor should it * take a page fault to a kernel address or a page fault to a user - * address outside of dedicated places + * address outside of dedicated places. + * + * Rather than kfence directly reporting false negatives, search whether + * the NIP belongs to the fixup table for cases where fault could come + * from functions like copy_from_kernel_nofault(). */ if (unlikely(!is_user && bad_kernel_fault(regs, error_code, address, is_write))) { - if (kfence_handle_page_fault(address, is_write, regs)) + if (is_kfence_address((void *)address) && + !search_exception_tables(instruction_pointer(regs)) && + kfence_handle_page_fault(address, is_write, regs)) return 0; return SIGSEGV; --- linux-xilinx-6.8.0.orig/arch/powerpc/mm/init-common.c +++ linux-xilinx-6.8.0/arch/powerpc/mm/init-common.c @@ -31,6 +31,9 @@ bool disable_kuep = !IS_ENABLED(CONFIG_PPC_KUEP); bool disable_kuap = !IS_ENABLED(CONFIG_PPC_KUAP); +#ifdef CONFIG_KFENCE +bool __ro_after_init kfence_disabled; +#endif static int __init parse_nosmep(char *p) { --- linux-xilinx-6.8.0.orig/arch/powerpc/mm/mem.c +++ linux-xilinx-6.8.0/arch/powerpc/mm/mem.c @@ -288,8 +288,6 @@ swiotlb_init(ppc_swiotlb_enable, ppc_swiotlb_flags); #endif - high_memory = (void *) __va(max_low_pfn * PAGE_SIZE); - kasan_late_init(); memblock_free_all(); --- linux-xilinx-6.8.0.orig/arch/powerpc/mm/nohash/8xx.c +++ linux-xilinx-6.8.0/arch/powerpc/mm/nohash/8xx.c @@ -94,7 +94,8 @@ return -EINVAL; set_huge_pte_at(&init_mm, va, ptep, - pte_mkhuge(pfn_pte(pa >> PAGE_SHIFT, prot)), psize); + pte_mkhuge(pfn_pte(pa >> PAGE_SHIFT, prot)), + 1UL << mmu_psize_to_shift(psize)); return 0; } @@ -150,11 +151,11 @@ mmu_mapin_immr(); - mmu_mapin_ram_chunk(0, boundary, PAGE_KERNEL_TEXT, true); + mmu_mapin_ram_chunk(0, boundary, PAGE_KERNEL_X, true); if (debug_pagealloc_enabled_or_kfence()) { top = boundary; } else { - mmu_mapin_ram_chunk(boundary, einittext8, PAGE_KERNEL_TEXT, true); + mmu_mapin_ram_chunk(boundary, einittext8, PAGE_KERNEL_X, true); mmu_mapin_ram_chunk(einittext8, top, PAGE_KERNEL, true); } --- linux-xilinx-6.8.0.orig/arch/powerpc/mm/nohash/Makefile +++ linux-xilinx-6.8.0/arch/powerpc/mm/nohash/Makefile @@ -3,7 +3,7 @@ ccflags-$(CONFIG_PPC64) := $(NO_MINIMAL_TOC) obj-y += mmu_context.o tlb.o tlb_low.o kup.o -obj-$(CONFIG_PPC_BOOK3E_64) += tlb_low_64e.o book3e_pgtable.o +obj-$(CONFIG_PPC_BOOK3E_64) += tlb_64e.o tlb_low_64e.o book3e_pgtable.o obj-$(CONFIG_40x) += 40x.o obj-$(CONFIG_44x) += 44x.o obj-$(CONFIG_PPC_8xx) += 8xx.o --- linux-xilinx-6.8.0.orig/arch/powerpc/mm/nohash/tlb.c +++ linux-xilinx-6.8.0/arch/powerpc/mm/nohash/tlb.c @@ -110,28 +110,6 @@ }; #endif -/* The variables below are currently only used on 64-bit Book3E - * though this will probably be made common with other nohash - * implementations at some point - */ -#ifdef CONFIG_PPC64 - -int mmu_pte_psize; /* Page size used for PTE pages */ -int mmu_vmemmap_psize; /* Page size used for the virtual mem map */ -int book3e_htw_mode; /* HW tablewalk? Value is PPC_HTW_* */ -unsigned long linear_map_top; /* Top of linear mapping */ - - -/* - * Number of bytes to add to SPRN_SPRG_TLB_EXFRAME on crit/mcheck/debug - * exceptions. This is used for bolted and e6500 TLB miss handlers which - * do not modify this SPRG in the TLB miss code; for other TLB miss handlers, - * this is set to zero. - */ -int extlb_level_exc; - -#endif /* CONFIG_PPC64 */ - #ifdef CONFIG_PPC_E500 /* next_tlbcam_idx is used to round-robin tlbcam entry assignment */ DEFINE_PER_CPU(int, next_tlbcam_idx); @@ -358,381 +336,7 @@ flush_tlb_mm(tlb->mm); } -/* - * Below are functions specific to the 64-bit variant of Book3E though that - * may change in the future - */ - -#ifdef CONFIG_PPC64 - -/* - * Handling of virtual linear page tables or indirect TLB entries - * flushing when PTE pages are freed - */ -void tlb_flush_pgtable(struct mmu_gather *tlb, unsigned long address) -{ - int tsize = mmu_psize_defs[mmu_pte_psize].enc; - - if (book3e_htw_mode != PPC_HTW_NONE) { - unsigned long start = address & PMD_MASK; - unsigned long end = address + PMD_SIZE; - unsigned long size = 1UL << mmu_psize_defs[mmu_pte_psize].shift; - - /* This isn't the most optimal, ideally we would factor out the - * while preempt & CPU mask mucking around, or even the IPI but - * it will do for now - */ - while (start < end) { - __flush_tlb_page(tlb->mm, start, tsize, 1); - start += size; - } - } else { - unsigned long rmask = 0xf000000000000000ul; - unsigned long rid = (address & rmask) | 0x1000000000000000ul; - unsigned long vpte = address & ~rmask; - - vpte = (vpte >> (PAGE_SHIFT - 3)) & ~0xffful; - vpte |= rid; - __flush_tlb_page(tlb->mm, vpte, tsize, 0); - } -} - -static void __init setup_page_sizes(void) -{ - unsigned int tlb0cfg; - unsigned int tlb0ps; - unsigned int eptcfg; - int i, psize; - -#ifdef CONFIG_PPC_E500 - unsigned int mmucfg = mfspr(SPRN_MMUCFG); - int fsl_mmu = mmu_has_feature(MMU_FTR_TYPE_FSL_E); - - if (fsl_mmu && (mmucfg & MMUCFG_MAVN) == MMUCFG_MAVN_V1) { - unsigned int tlb1cfg = mfspr(SPRN_TLB1CFG); - unsigned int min_pg, max_pg; - - min_pg = (tlb1cfg & TLBnCFG_MINSIZE) >> TLBnCFG_MINSIZE_SHIFT; - max_pg = (tlb1cfg & TLBnCFG_MAXSIZE) >> TLBnCFG_MAXSIZE_SHIFT; - - for (psize = 0; psize < MMU_PAGE_COUNT; ++psize) { - struct mmu_psize_def *def; - unsigned int shift; - - def = &mmu_psize_defs[psize]; - shift = def->shift; - - if (shift == 0 || shift & 1) - continue; - - /* adjust to be in terms of 4^shift Kb */ - shift = (shift - 10) >> 1; - - if ((shift >= min_pg) && (shift <= max_pg)) - def->flags |= MMU_PAGE_SIZE_DIRECT; - } - - goto out; - } - - if (fsl_mmu && (mmucfg & MMUCFG_MAVN) == MMUCFG_MAVN_V2) { - u32 tlb1cfg, tlb1ps; - - tlb0cfg = mfspr(SPRN_TLB0CFG); - tlb1cfg = mfspr(SPRN_TLB1CFG); - tlb1ps = mfspr(SPRN_TLB1PS); - eptcfg = mfspr(SPRN_EPTCFG); - - if ((tlb1cfg & TLBnCFG_IND) && (tlb0cfg & TLBnCFG_PT)) - book3e_htw_mode = PPC_HTW_E6500; - - /* - * We expect 4K subpage size and unrestricted indirect size. - * The lack of a restriction on indirect size is a Freescale - * extension, indicated by PSn = 0 but SPSn != 0. - */ - if (eptcfg != 2) - book3e_htw_mode = PPC_HTW_NONE; - - for (psize = 0; psize < MMU_PAGE_COUNT; ++psize) { - struct mmu_psize_def *def = &mmu_psize_defs[psize]; - - if (!def->shift) - continue; - - if (tlb1ps & (1U << (def->shift - 10))) { - def->flags |= MMU_PAGE_SIZE_DIRECT; - - if (book3e_htw_mode && psize == MMU_PAGE_2M) - def->flags |= MMU_PAGE_SIZE_INDIRECT; - } - } - - goto out; - } -#endif - - tlb0cfg = mfspr(SPRN_TLB0CFG); - tlb0ps = mfspr(SPRN_TLB0PS); - eptcfg = mfspr(SPRN_EPTCFG); - - /* Look for supported direct sizes */ - for (psize = 0; psize < MMU_PAGE_COUNT; ++psize) { - struct mmu_psize_def *def = &mmu_psize_defs[psize]; - - if (tlb0ps & (1U << (def->shift - 10))) - def->flags |= MMU_PAGE_SIZE_DIRECT; - } - - /* Indirect page sizes supported ? */ - if ((tlb0cfg & TLBnCFG_IND) == 0 || - (tlb0cfg & TLBnCFG_PT) == 0) - goto out; - - book3e_htw_mode = PPC_HTW_IBM; - - /* Now, we only deal with one IND page size for each - * direct size. Hopefully all implementations today are - * unambiguous, but we might want to be careful in the - * future. - */ - for (i = 0; i < 3; i++) { - unsigned int ps, sps; - - sps = eptcfg & 0x1f; - eptcfg >>= 5; - ps = eptcfg & 0x1f; - eptcfg >>= 5; - if (!ps || !sps) - continue; - for (psize = 0; psize < MMU_PAGE_COUNT; psize++) { - struct mmu_psize_def *def = &mmu_psize_defs[psize]; - - if (ps == (def->shift - 10)) - def->flags |= MMU_PAGE_SIZE_INDIRECT; - if (sps == (def->shift - 10)) - def->ind = ps + 10; - } - } - -out: - /* Cleanup array and print summary */ - pr_info("MMU: Supported page sizes\n"); - for (psize = 0; psize < MMU_PAGE_COUNT; ++psize) { - struct mmu_psize_def *def = &mmu_psize_defs[psize]; - const char *__page_type_names[] = { - "unsupported", - "direct", - "indirect", - "direct & indirect" - }; - if (def->flags == 0) { - def->shift = 0; - continue; - } - pr_info(" %8ld KB as %s\n", 1ul << (def->shift - 10), - __page_type_names[def->flags & 0x3]); - } -} - -static void __init setup_mmu_htw(void) -{ - /* - * If we want to use HW tablewalk, enable it by patching the TLB miss - * handlers to branch to the one dedicated to it. - */ - - switch (book3e_htw_mode) { - case PPC_HTW_IBM: - patch_exception(0x1c0, exc_data_tlb_miss_htw_book3e); - patch_exception(0x1e0, exc_instruction_tlb_miss_htw_book3e); - break; -#ifdef CONFIG_PPC_E500 - case PPC_HTW_E6500: - extlb_level_exc = EX_TLB_SIZE; - patch_exception(0x1c0, exc_data_tlb_miss_e6500_book3e); - patch_exception(0x1e0, exc_instruction_tlb_miss_e6500_book3e); - break; -#endif - } - pr_info("MMU: Book3E HW tablewalk %s\n", - book3e_htw_mode != PPC_HTW_NONE ? "enabled" : "not supported"); -} - -/* - * Early initialization of the MMU TLB code - */ -static void early_init_this_mmu(void) -{ - unsigned int mas4; - - /* Set MAS4 based on page table setting */ - - mas4 = 0x4 << MAS4_WIMGED_SHIFT; - switch (book3e_htw_mode) { - case PPC_HTW_E6500: - mas4 |= MAS4_INDD; - mas4 |= BOOK3E_PAGESZ_2M << MAS4_TSIZED_SHIFT; - mas4 |= MAS4_TLBSELD(1); - mmu_pte_psize = MMU_PAGE_2M; - break; - - case PPC_HTW_IBM: - mas4 |= MAS4_INDD; - mas4 |= BOOK3E_PAGESZ_1M << MAS4_TSIZED_SHIFT; - mmu_pte_psize = MMU_PAGE_1M; - break; - - case PPC_HTW_NONE: - mas4 |= BOOK3E_PAGESZ_4K << MAS4_TSIZED_SHIFT; - mmu_pte_psize = mmu_virtual_psize; - break; - } - mtspr(SPRN_MAS4, mas4); - -#ifdef CONFIG_PPC_E500 - if (mmu_has_feature(MMU_FTR_TYPE_FSL_E)) { - unsigned int num_cams; - bool map = true; - - /* use a quarter of the TLBCAM for bolted linear map */ - num_cams = (mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY) / 4; - - /* - * Only do the mapping once per core, or else the - * transient mapping would cause problems. - */ -#ifdef CONFIG_SMP - if (hweight32(get_tensr()) > 1) - map = false; -#endif - - if (map) - linear_map_top = map_mem_in_cams(linear_map_top, - num_cams, false, true); - } -#endif - - /* A sync won't hurt us after mucking around with - * the MMU configuration - */ - mb(); -} - -static void __init early_init_mmu_global(void) -{ - /* XXX This should be decided at runtime based on supported - * page sizes in the TLB, but for now let's assume 16M is - * always there and a good fit (which it probably is) - * - * Freescale booke only supports 4K pages in TLB0, so use that. - */ - if (mmu_has_feature(MMU_FTR_TYPE_FSL_E)) - mmu_vmemmap_psize = MMU_PAGE_4K; - else - mmu_vmemmap_psize = MMU_PAGE_16M; - - /* XXX This code only checks for TLB 0 capabilities and doesn't - * check what page size combos are supported by the HW. It - * also doesn't handle the case where a separate array holds - * the IND entries from the array loaded by the PT. - */ - /* Look for supported page sizes */ - setup_page_sizes(); - - /* Look for HW tablewalk support */ - setup_mmu_htw(); - -#ifdef CONFIG_PPC_E500 - if (mmu_has_feature(MMU_FTR_TYPE_FSL_E)) { - if (book3e_htw_mode == PPC_HTW_NONE) { - extlb_level_exc = EX_TLB_SIZE; - patch_exception(0x1c0, exc_data_tlb_miss_bolted_book3e); - patch_exception(0x1e0, - exc_instruction_tlb_miss_bolted_book3e); - } - } -#endif - - /* Set the global containing the top of the linear mapping - * for use by the TLB miss code - */ - linear_map_top = memblock_end_of_DRAM(); - - ioremap_bot = IOREMAP_BASE; -} - -static void __init early_mmu_set_memory_limit(void) -{ -#ifdef CONFIG_PPC_E500 - if (mmu_has_feature(MMU_FTR_TYPE_FSL_E)) { - /* - * Limit memory so we dont have linear faults. - * Unlike memblock_set_current_limit, which limits - * memory available during early boot, this permanently - * reduces the memory available to Linux. We need to - * do this because highmem is not supported on 64-bit. - */ - memblock_enforce_memory_limit(linear_map_top); - } -#endif - - memblock_set_current_limit(linear_map_top); -} - -/* boot cpu only */ -void __init early_init_mmu(void) -{ - early_init_mmu_global(); - early_init_this_mmu(); - early_mmu_set_memory_limit(); -} - -void early_init_mmu_secondary(void) -{ - early_init_this_mmu(); -} - -void setup_initial_memory_limit(phys_addr_t first_memblock_base, - phys_addr_t first_memblock_size) -{ - /* On non-FSL Embedded 64-bit, we adjust the RMA size to match - * the bolted TLB entry. We know for now that only 1G - * entries are supported though that may eventually - * change. - * - * on FSL Embedded 64-bit, usually all RAM is bolted, but with - * unusual memory sizes it's possible for some RAM to not be mapped - * (such RAM is not used at all by Linux, since we don't support - * highmem on 64-bit). We limit ppc64_rma_size to what would be - * mappable if this memblock is the only one. Additional memblocks - * can only increase, not decrease, the amount that ends up getting - * mapped. We still limit max to 1G even if we'll eventually map - * more. This is due to what the early init code is set up to do. - * - * We crop it to the size of the first MEMBLOCK to - * avoid going over total available memory just in case... - */ -#ifdef CONFIG_PPC_E500 - if (early_mmu_has_feature(MMU_FTR_TYPE_FSL_E)) { - unsigned long linear_sz; - unsigned int num_cams; - - /* use a quarter of the TLBCAM for bolted linear map */ - num_cams = (mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY) / 4; - - linear_sz = map_mem_in_cams(first_memblock_size, num_cams, - true, true); - - ppc64_rma_size = min_t(u64, linear_sz, 0x40000000); - } else -#endif - ppc64_rma_size = min_t(u64, first_memblock_size, 0x40000000); - - /* Finally limit subsequent allocations */ - memblock_set_current_limit(first_memblock_base + ppc64_rma_size); -} -#else /* ! CONFIG_PPC64 */ +#ifndef CONFIG_PPC64 void __init early_init_mmu(void) { unsigned long root = of_get_flat_dt_root(); --- linux-xilinx-6.8.0.orig/arch/powerpc/mm/nohash/tlb_64e.c +++ linux-xilinx-6.8.0/arch/powerpc/mm/nohash/tlb_64e.c @@ -0,0 +1,361 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2008,2009 Ben Herrenschmidt + * IBM Corp. + * + * Derived from arch/ppc/mm/init.c: + * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) + * + * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au) + * and Cort Dougan (PReP) (cort@cs.nmt.edu) + * Copyright (C) 1996 Paul Mackerras + * + * Derived from "arch/i386/mm/init.c" + * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include + +/* The variables below are currently only used on 64-bit Book3E + * though this will probably be made common with other nohash + * implementations at some point + */ +static int mmu_pte_psize; /* Page size used for PTE pages */ +int mmu_vmemmap_psize; /* Page size used for the virtual mem map */ +int book3e_htw_mode; /* HW tablewalk? Value is PPC_HTW_* */ +unsigned long linear_map_top; /* Top of linear mapping */ + + +/* + * Number of bytes to add to SPRN_SPRG_TLB_EXFRAME on crit/mcheck/debug + * exceptions. This is used for bolted and e6500 TLB miss handlers which + * do not modify this SPRG in the TLB miss code; for other TLB miss handlers, + * this is set to zero. + */ +int extlb_level_exc; + +/* + * Handling of virtual linear page tables or indirect TLB entries + * flushing when PTE pages are freed + */ +void tlb_flush_pgtable(struct mmu_gather *tlb, unsigned long address) +{ + int tsize = mmu_psize_defs[mmu_pte_psize].enc; + + if (book3e_htw_mode != PPC_HTW_NONE) { + unsigned long start = address & PMD_MASK; + unsigned long end = address + PMD_SIZE; + unsigned long size = 1UL << mmu_psize_defs[mmu_pte_psize].shift; + + /* This isn't the most optimal, ideally we would factor out the + * while preempt & CPU mask mucking around, or even the IPI but + * it will do for now + */ + while (start < end) { + __flush_tlb_page(tlb->mm, start, tsize, 1); + start += size; + } + } else { + unsigned long rmask = 0xf000000000000000ul; + unsigned long rid = (address & rmask) | 0x1000000000000000ul; + unsigned long vpte = address & ~rmask; + + vpte = (vpte >> (PAGE_SHIFT - 3)) & ~0xffful; + vpte |= rid; + __flush_tlb_page(tlb->mm, vpte, tsize, 0); + } +} + +static void __init setup_page_sizes(void) +{ + unsigned int tlb0cfg; + unsigned int eptcfg; + int psize; + +#ifdef CONFIG_PPC_E500 + unsigned int mmucfg = mfspr(SPRN_MMUCFG); + int fsl_mmu = mmu_has_feature(MMU_FTR_TYPE_FSL_E); + + if (fsl_mmu && (mmucfg & MMUCFG_MAVN) == MMUCFG_MAVN_V1) { + unsigned int tlb1cfg = mfspr(SPRN_TLB1CFG); + unsigned int min_pg, max_pg; + + min_pg = (tlb1cfg & TLBnCFG_MINSIZE) >> TLBnCFG_MINSIZE_SHIFT; + max_pg = (tlb1cfg & TLBnCFG_MAXSIZE) >> TLBnCFG_MAXSIZE_SHIFT; + + for (psize = 0; psize < MMU_PAGE_COUNT; ++psize) { + struct mmu_psize_def *def; + unsigned int shift; + + def = &mmu_psize_defs[psize]; + shift = def->shift; + + if (shift == 0 || shift & 1) + continue; + + /* adjust to be in terms of 4^shift Kb */ + shift = (shift - 10) >> 1; + + if ((shift >= min_pg) && (shift <= max_pg)) + def->flags |= MMU_PAGE_SIZE_DIRECT; + } + + goto out; + } + + if (fsl_mmu && (mmucfg & MMUCFG_MAVN) == MMUCFG_MAVN_V2) { + u32 tlb1cfg, tlb1ps; + + tlb0cfg = mfspr(SPRN_TLB0CFG); + tlb1cfg = mfspr(SPRN_TLB1CFG); + tlb1ps = mfspr(SPRN_TLB1PS); + eptcfg = mfspr(SPRN_EPTCFG); + + if ((tlb1cfg & TLBnCFG_IND) && (tlb0cfg & TLBnCFG_PT)) + book3e_htw_mode = PPC_HTW_E6500; + + /* + * We expect 4K subpage size and unrestricted indirect size. + * The lack of a restriction on indirect size is a Freescale + * extension, indicated by PSn = 0 but SPSn != 0. + */ + if (eptcfg != 2) + book3e_htw_mode = PPC_HTW_NONE; + + for (psize = 0; psize < MMU_PAGE_COUNT; ++psize) { + struct mmu_psize_def *def = &mmu_psize_defs[psize]; + + if (!def->shift) + continue; + + if (tlb1ps & (1U << (def->shift - 10))) { + def->flags |= MMU_PAGE_SIZE_DIRECT; + + if (book3e_htw_mode && psize == MMU_PAGE_2M) + def->flags |= MMU_PAGE_SIZE_INDIRECT; + } + } + + goto out; + } +#endif +out: + /* Cleanup array and print summary */ + pr_info("MMU: Supported page sizes\n"); + for (psize = 0; psize < MMU_PAGE_COUNT; ++psize) { + struct mmu_psize_def *def = &mmu_psize_defs[psize]; + const char *__page_type_names[] = { + "unsupported", + "direct", + "indirect", + "direct & indirect" + }; + if (def->flags == 0) { + def->shift = 0; + continue; + } + pr_info(" %8ld KB as %s\n", 1ul << (def->shift - 10), + __page_type_names[def->flags & 0x3]); + } +} + +static void __init setup_mmu_htw(void) +{ + /* + * If we want to use HW tablewalk, enable it by patching the TLB miss + * handlers to branch to the one dedicated to it. + */ + + switch (book3e_htw_mode) { +#ifdef CONFIG_PPC_E500 + case PPC_HTW_E6500: + extlb_level_exc = EX_TLB_SIZE; + patch_exception(0x1c0, exc_data_tlb_miss_e6500_book3e); + patch_exception(0x1e0, exc_instruction_tlb_miss_e6500_book3e); + break; +#endif + } + pr_info("MMU: Book3E HW tablewalk %s\n", + book3e_htw_mode != PPC_HTW_NONE ? "enabled" : "not supported"); +} + +/* + * Early initialization of the MMU TLB code + */ +static void early_init_this_mmu(void) +{ + unsigned int mas4; + + /* Set MAS4 based on page table setting */ + + mas4 = 0x4 << MAS4_WIMGED_SHIFT; + switch (book3e_htw_mode) { + case PPC_HTW_E6500: + mas4 |= MAS4_INDD; + mas4 |= BOOK3E_PAGESZ_2M << MAS4_TSIZED_SHIFT; + mas4 |= MAS4_TLBSELD(1); + mmu_pte_psize = MMU_PAGE_2M; + break; + + case PPC_HTW_NONE: + mas4 |= BOOK3E_PAGESZ_4K << MAS4_TSIZED_SHIFT; + mmu_pte_psize = mmu_virtual_psize; + break; + } + mtspr(SPRN_MAS4, mas4); + +#ifdef CONFIG_PPC_E500 + if (mmu_has_feature(MMU_FTR_TYPE_FSL_E)) { + unsigned int num_cams; + bool map = true; + + /* use a quarter of the TLBCAM for bolted linear map */ + num_cams = (mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY) / 4; + + /* + * Only do the mapping once per core, or else the + * transient mapping would cause problems. + */ +#ifdef CONFIG_SMP + if (hweight32(get_tensr()) > 1) + map = false; +#endif + + if (map) + linear_map_top = map_mem_in_cams(linear_map_top, + num_cams, false, true); + } +#endif + + /* A sync won't hurt us after mucking around with + * the MMU configuration + */ + mb(); +} + +static void __init early_init_mmu_global(void) +{ + /* XXX This should be decided at runtime based on supported + * page sizes in the TLB, but for now let's assume 16M is + * always there and a good fit (which it probably is) + * + * Freescale booke only supports 4K pages in TLB0, so use that. + */ + if (mmu_has_feature(MMU_FTR_TYPE_FSL_E)) + mmu_vmemmap_psize = MMU_PAGE_4K; + else + mmu_vmemmap_psize = MMU_PAGE_16M; + + /* XXX This code only checks for TLB 0 capabilities and doesn't + * check what page size combos are supported by the HW. It + * also doesn't handle the case where a separate array holds + * the IND entries from the array loaded by the PT. + */ + /* Look for supported page sizes */ + setup_page_sizes(); + + /* Look for HW tablewalk support */ + setup_mmu_htw(); + +#ifdef CONFIG_PPC_E500 + if (mmu_has_feature(MMU_FTR_TYPE_FSL_E)) { + if (book3e_htw_mode == PPC_HTW_NONE) { + extlb_level_exc = EX_TLB_SIZE; + patch_exception(0x1c0, exc_data_tlb_miss_bolted_book3e); + patch_exception(0x1e0, + exc_instruction_tlb_miss_bolted_book3e); + } + } +#endif + + /* Set the global containing the top of the linear mapping + * for use by the TLB miss code + */ + linear_map_top = memblock_end_of_DRAM(); + + ioremap_bot = IOREMAP_BASE; +} + +static void __init early_mmu_set_memory_limit(void) +{ +#ifdef CONFIG_PPC_E500 + if (mmu_has_feature(MMU_FTR_TYPE_FSL_E)) { + /* + * Limit memory so we dont have linear faults. + * Unlike memblock_set_current_limit, which limits + * memory available during early boot, this permanently + * reduces the memory available to Linux. We need to + * do this because highmem is not supported on 64-bit. + */ + memblock_enforce_memory_limit(linear_map_top); + } +#endif + + memblock_set_current_limit(linear_map_top); +} + +/* boot cpu only */ +void __init early_init_mmu(void) +{ + early_init_mmu_global(); + early_init_this_mmu(); + early_mmu_set_memory_limit(); +} + +void early_init_mmu_secondary(void) +{ + early_init_this_mmu(); +} + +void setup_initial_memory_limit(phys_addr_t first_memblock_base, + phys_addr_t first_memblock_size) +{ + /* On non-FSL Embedded 64-bit, we adjust the RMA size to match + * the bolted TLB entry. We know for now that only 1G + * entries are supported though that may eventually + * change. + * + * on FSL Embedded 64-bit, usually all RAM is bolted, but with + * unusual memory sizes it's possible for some RAM to not be mapped + * (such RAM is not used at all by Linux, since we don't support + * highmem on 64-bit). We limit ppc64_rma_size to what would be + * mappable if this memblock is the only one. Additional memblocks + * can only increase, not decrease, the amount that ends up getting + * mapped. We still limit max to 1G even if we'll eventually map + * more. This is due to what the early init code is set up to do. + * + * We crop it to the size of the first MEMBLOCK to + * avoid going over total available memory just in case... + */ +#ifdef CONFIG_PPC_E500 + if (early_mmu_has_feature(MMU_FTR_TYPE_FSL_E)) { + unsigned long linear_sz; + unsigned int num_cams; + + /* use a quarter of the TLBCAM for bolted linear map */ + num_cams = (mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY) / 4; + + linear_sz = map_mem_in_cams(first_memblock_size, num_cams, + true, true); + + ppc64_rma_size = min_t(u64, linear_sz, 0x40000000); + } else +#endif + ppc64_rma_size = min_t(u64, first_memblock_size, 0x40000000); + + /* Finally limit subsequent allocations */ + memblock_set_current_limit(first_memblock_base + ppc64_rma_size); +} --- linux-xilinx-6.8.0.orig/arch/powerpc/mm/nohash/tlb_low_64e.S +++ linux-xilinx-6.8.0/arch/powerpc/mm/nohash/tlb_low_64e.S @@ -893,201 +893,6 @@ TLB_MISS_EPILOG_ERROR b exc_data_storage_book3e - -/************************************************************** - * * - * TLB miss handling for Book3E with hw page table support * - * * - **************************************************************/ - - -/* Data TLB miss */ - START_EXCEPTION(data_tlb_miss_htw) - TLB_MISS_PROLOG - - /* Now we handle the fault proper. We only save DEAR in normal - * fault case since that's the only interesting values here. - * We could probably also optimize by not saving SRR0/1 in the - * linear mapping case but I'll leave that for later - */ - mfspr r14,SPRN_ESR - mfspr r16,SPRN_DEAR /* get faulting address */ - srdi r11,r16,44 /* get region */ - xoris r11,r11,0xc - cmpldi cr0,r11,0 /* linear mapping ? */ - beq tlb_load_linear /* yes -> go to linear map load */ - cmpldi cr1,r11,1 /* vmalloc mapping ? */ - - /* We do the user/kernel test for the PID here along with the RW test - */ - srdi. r11,r16,60 /* Check for user region */ - ld r15,PACAPGD(r13) /* Load user pgdir */ - beq htw_tlb_miss - - /* XXX replace the RMW cycles with immediate loads + writes */ -1: mfspr r10,SPRN_MAS1 - rlwinm r10,r10,0,16,1 /* Clear TID */ - mtspr SPRN_MAS1,r10 - ld r15,PACA_KERNELPGD(r13) /* Load kernel pgdir */ - beq+ cr1,htw_tlb_miss - - /* We got a crappy address, just fault with whatever DEAR and ESR - * are here - */ - TLB_MISS_EPILOG_ERROR - b exc_data_storage_book3e - -/* Instruction TLB miss */ - START_EXCEPTION(instruction_tlb_miss_htw) - TLB_MISS_PROLOG - - /* If we take a recursive fault, the second level handler may need - * to know whether we are handling a data or instruction fault in - * order to get to the right store fault handler. We provide that - * info by keeping a crazy value for ESR in r14 - */ - li r14,-1 /* store to exception frame is done later */ - - /* Now we handle the fault proper. We only save DEAR in the non - * linear mapping case since we know the linear mapping case will - * not re-enter. We could indeed optimize and also not save SRR0/1 - * in the linear mapping case but I'll leave that for later - * - * Faulting address is SRR0 which is already in r16 - */ - srdi r11,r16,44 /* get region */ - xoris r11,r11,0xc - cmpldi cr0,r11,0 /* linear mapping ? */ - beq tlb_load_linear /* yes -> go to linear map load */ - cmpldi cr1,r11,1 /* vmalloc mapping ? */ - - /* We do the user/kernel test for the PID here along with the RW test - */ - srdi. r11,r16,60 /* Check for user region */ - ld r15,PACAPGD(r13) /* Load user pgdir */ - beq htw_tlb_miss - - /* XXX replace the RMW cycles with immediate loads + writes */ -1: mfspr r10,SPRN_MAS1 - rlwinm r10,r10,0,16,1 /* Clear TID */ - mtspr SPRN_MAS1,r10 - ld r15,PACA_KERNELPGD(r13) /* Load kernel pgdir */ - beq+ htw_tlb_miss - - /* We got a crappy address, just fault */ - TLB_MISS_EPILOG_ERROR - b exc_instruction_storage_book3e - - -/* - * This is the guts of the second-level TLB miss handler for direct - * misses. We are entered with: - * - * r16 = virtual page table faulting address - * r15 = PGD pointer - * r14 = ESR - * r13 = PACA - * r12 = TLB exception frame in PACA - * r11 = crap (free to use) - * r10 = crap (free to use) - * - * It can be re-entered by the linear mapping miss handler. However, to - * avoid too much complication, it will save/restore things for us - */ -htw_tlb_miss: -#ifdef CONFIG_PPC_KUAP - mfspr r10,SPRN_MAS1 - rlwinm. r10,r10,0,0x3fff0000 - beq- htw_tlb_miss_fault /* KUAP fault */ -#endif - /* Search if we already have a TLB entry for that virtual address, and - * if we do, bail out. - * - * MAS1:IND should be already set based on MAS4 - */ - PPC_TLBSRX_DOT(0,R16) - beq htw_tlb_miss_done - - /* Now, we need to walk the page tables. First check if we are in - * range. - */ - rldicl. r10,r16,64-PGTABLE_EADDR_SIZE,PGTABLE_EADDR_SIZE+4 - bne- htw_tlb_miss_fault - - /* Get the PGD pointer */ - cmpldi cr0,r15,0 - beq- htw_tlb_miss_fault - - /* Get to PGD entry */ - rldicl r11,r16,64-(PGDIR_SHIFT-3),64-PGD_INDEX_SIZE-3 - clrrdi r10,r11,3 - ldx r15,r10,r15 - cmpdi cr0,r15,0 - bge htw_tlb_miss_fault - - /* Get to PUD entry */ - rldicl r11,r16,64-(PUD_SHIFT-3),64-PUD_INDEX_SIZE-3 - clrrdi r10,r11,3 - ldx r15,r10,r15 - cmpdi cr0,r15,0 - bge htw_tlb_miss_fault - - /* Get to PMD entry */ - rldicl r11,r16,64-(PMD_SHIFT-3),64-PMD_INDEX_SIZE-3 - clrrdi r10,r11,3 - ldx r15,r10,r15 - cmpdi cr0,r15,0 - bge htw_tlb_miss_fault - - /* Ok, we're all right, we can now create an indirect entry for - * a 1M or 256M page. - * - * The last trick is now that because we use "half" pages for - * the HTW (1M IND is 2K and 256M IND is 32K) we need to account - * for an added LSB bit to the RPN. For 64K pages, there is no - * problem as we already use 32K arrays (half PTE pages), but for - * 4K page we need to extract a bit from the virtual address and - * insert it into the "PA52" bit of the RPN. - */ - rlwimi r15,r16,32-9,20,20 - /* Now we build the MAS: - * - * MAS 0 : Fully setup with defaults in MAS4 and TLBnCFG - * MAS 1 : Almost fully setup - * - PID already updated by caller if necessary - * - TSIZE for now is base ind page size always - * MAS 2 : Use defaults - * MAS 3+7 : Needs to be done - */ - ori r10,r15,(BOOK3E_PAGESZ_4K << MAS3_SPSIZE_SHIFT) - - srdi r16,r10,32 - mtspr SPRN_MAS3,r10 - mtspr SPRN_MAS7,r16 - - tlbwe - -htw_tlb_miss_done: - /* We don't bother with restoring DEAR or ESR since we know we are - * level 0 and just going back to userland. They are only needed - * if you are going to take an access fault - */ - TLB_MISS_EPILOG_SUCCESS - rfi - -htw_tlb_miss_fault: - /* We need to check if it was an instruction miss. We know this - * though because r14 would contain -1 - */ - cmpdi cr0,r14,-1 - beq 1f - mtspr SPRN_DEAR,r16 - mtspr SPRN_ESR,r14 - TLB_MISS_EPILOG_ERROR - b exc_data_storage_book3e -1: TLB_MISS_EPILOG_ERROR - b exc_instruction_storage_book3e - /* * This is the guts of "any" level TLB miss handler for kernel linear * mapping misses. We are entered with: --- linux-xilinx-6.8.0.orig/arch/powerpc/net/bpf_jit_comp32.c +++ linux-xilinx-6.8.0/arch/powerpc/net/bpf_jit_comp32.c @@ -450,10 +450,16 @@ } break; case BPF_ALU | BPF_DIV | BPF_X: /* (u32) dst /= (u32) src */ - EMIT(PPC_RAW_DIVWU(dst_reg, src2_reg, src_reg)); + if (off) + EMIT(PPC_RAW_DIVW(dst_reg, src2_reg, src_reg)); + else + EMIT(PPC_RAW_DIVWU(dst_reg, src2_reg, src_reg)); break; case BPF_ALU | BPF_MOD | BPF_X: /* (u32) dst %= (u32) src */ - EMIT(PPC_RAW_DIVWU(_R0, src2_reg, src_reg)); + if (off) + EMIT(PPC_RAW_DIVW(_R0, src2_reg, src_reg)); + else + EMIT(PPC_RAW_DIVWU(_R0, src2_reg, src_reg)); EMIT(PPC_RAW_MULW(_R0, src_reg, _R0)); EMIT(PPC_RAW_SUB(dst_reg, src2_reg, _R0)); break; @@ -467,10 +473,16 @@ if (imm == 1) { EMIT(PPC_RAW_MR(dst_reg, src2_reg)); } else if (is_power_of_2((u32)imm)) { - EMIT(PPC_RAW_SRWI(dst_reg, src2_reg, ilog2(imm))); + if (off) + EMIT(PPC_RAW_SRAWI(dst_reg, src2_reg, ilog2(imm))); + else + EMIT(PPC_RAW_SRWI(dst_reg, src2_reg, ilog2(imm))); } else { PPC_LI32(_R0, imm); - EMIT(PPC_RAW_DIVWU(dst_reg, src2_reg, _R0)); + if (off) + EMIT(PPC_RAW_DIVW(dst_reg, src2_reg, _R0)); + else + EMIT(PPC_RAW_DIVWU(dst_reg, src2_reg, _R0)); } break; case BPF_ALU | BPF_MOD | BPF_K: /* (u32) dst %= (u32) imm */ @@ -480,11 +492,19 @@ if (!is_power_of_2((u32)imm)) { bpf_set_seen_register(ctx, tmp_reg); PPC_LI32(tmp_reg, imm); - EMIT(PPC_RAW_DIVWU(_R0, src2_reg, tmp_reg)); + if (off) + EMIT(PPC_RAW_DIVW(_R0, src2_reg, tmp_reg)); + else + EMIT(PPC_RAW_DIVWU(_R0, src2_reg, tmp_reg)); EMIT(PPC_RAW_MULW(_R0, tmp_reg, _R0)); EMIT(PPC_RAW_SUB(dst_reg, src2_reg, _R0)); } else if (imm == 1) { EMIT(PPC_RAW_LI(dst_reg, 0)); + } else if (off) { + EMIT(PPC_RAW_SRAWI(_R0, src2_reg, ilog2(imm))); + EMIT(PPC_RAW_ADDZE(_R0, _R0)); + EMIT(PPC_RAW_SLWI(_R0, _R0, ilog2(imm))); + EMIT(PPC_RAW_SUB(dst_reg, src2_reg, _R0)); } else { imm = ilog2((u32)imm); EMIT(PPC_RAW_RLWINM(dst_reg, src2_reg, 0, 32 - imm, 31)); @@ -497,11 +517,21 @@ imm = -imm; if (!is_power_of_2(imm)) return -EOPNOTSUPP; - if (imm == 1) + if (imm == 1) { EMIT(PPC_RAW_LI(dst_reg, 0)); - else + EMIT(PPC_RAW_LI(dst_reg_h, 0)); + } else if (off) { + EMIT(PPC_RAW_SRAWI(dst_reg_h, src2_reg_h, 31)); + EMIT(PPC_RAW_XOR(dst_reg, src2_reg, dst_reg_h)); + EMIT(PPC_RAW_SUBFC(dst_reg, dst_reg_h, dst_reg)); + EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 0, 32 - ilog2(imm), 31)); + EMIT(PPC_RAW_XOR(dst_reg, dst_reg, dst_reg_h)); + EMIT(PPC_RAW_SUBFC(dst_reg, dst_reg_h, dst_reg)); + EMIT(PPC_RAW_SUBFE(dst_reg_h, dst_reg_h, dst_reg_h)); + } else { EMIT(PPC_RAW_RLWINM(dst_reg, src2_reg, 0, 32 - ilog2(imm), 31)); - EMIT(PPC_RAW_LI(dst_reg_h, 0)); + EMIT(PPC_RAW_LI(dst_reg_h, 0)); + } break; case BPF_ALU64 | BPF_DIV | BPF_K: /* dst /= imm */ if (!imm) @@ -727,15 +757,30 @@ * MOV */ case BPF_ALU64 | BPF_MOV | BPF_X: /* dst = src */ - if (dst_reg == src_reg) - break; - EMIT(PPC_RAW_MR(dst_reg, src_reg)); - EMIT(PPC_RAW_MR(dst_reg_h, src_reg_h)); + if (off == 8) { + EMIT(PPC_RAW_EXTSB(dst_reg, src_reg)); + EMIT(PPC_RAW_SRAWI(dst_reg_h, dst_reg, 31)); + } else if (off == 16) { + EMIT(PPC_RAW_EXTSH(dst_reg, src_reg)); + EMIT(PPC_RAW_SRAWI(dst_reg_h, dst_reg, 31)); + } else if (off == 32 && dst_reg == src_reg) { + EMIT(PPC_RAW_SRAWI(dst_reg_h, src_reg, 31)); + } else if (off == 32) { + EMIT(PPC_RAW_MR(dst_reg, src_reg)); + EMIT(PPC_RAW_SRAWI(dst_reg_h, src_reg, 31)); + } else if (dst_reg != src_reg) { + EMIT(PPC_RAW_MR(dst_reg, src_reg)); + EMIT(PPC_RAW_MR(dst_reg_h, src_reg_h)); + } break; case BPF_ALU | BPF_MOV | BPF_X: /* (u32) dst = src */ /* special mov32 for zext */ if (imm == 1) EMIT(PPC_RAW_LI(dst_reg_h, 0)); + else if (off == 8) + EMIT(PPC_RAW_EXTSB(dst_reg, src_reg)); + else if (off == 16) + EMIT(PPC_RAW_EXTSH(dst_reg, src_reg)); else if (dst_reg != src_reg) EMIT(PPC_RAW_MR(dst_reg, src_reg)); break; @@ -751,6 +796,7 @@ * BPF_FROM_BE/LE */ case BPF_ALU | BPF_END | BPF_FROM_LE: + case BPF_ALU64 | BPF_END | BPF_FROM_LE: switch (imm) { case 16: /* Copy 16 bits to upper part */ @@ -785,6 +831,8 @@ EMIT(PPC_RAW_MR(dst_reg_h, tmp_reg)); break; } + if (BPF_CLASS(code) == BPF_ALU64 && imm != 64) + EMIT(PPC_RAW_LI(dst_reg_h, 0)); break; case BPF_ALU | BPF_END | BPF_FROM_BE: switch (imm) { @@ -852,6 +900,15 @@ /* Get offset into TMP_REG */ EMIT(PPC_RAW_LI(tmp_reg, off)); + /* + * Enforce full ordering for operations with BPF_FETCH by emitting a 'sync' + * before and after the operation. + * + * This is a requirement in the Linux Kernel Memory Model. + * See __cmpxchg_u32() in asm/cmpxchg.h as an example. + */ + if ((imm & BPF_FETCH) && IS_ENABLED(CONFIG_SMP)) + EMIT(PPC_RAW_SYNC()); tmp_idx = ctx->idx * 4; /* load value from memory into r0 */ EMIT(PPC_RAW_LWARX(_R0, tmp_reg, dst_reg, 0)); @@ -905,6 +962,9 @@ /* For the BPF_FETCH variant, get old data into src_reg */ if (imm & BPF_FETCH) { + /* Emit 'sync' to enforce full ordering */ + if (IS_ENABLED(CONFIG_SMP)) + EMIT(PPC_RAW_SYNC()); EMIT(PPC_RAW_MR(ret_reg, ax_reg)); if (!fp->aux->verifier_zext) EMIT(PPC_RAW_LI(ret_reg - 1, 0)); /* higher 32-bit */ @@ -918,11 +978,17 @@ * BPF_LDX */ case BPF_LDX | BPF_MEM | BPF_B: /* dst = *(u8 *)(ul) (src + off) */ + case BPF_LDX | BPF_MEMSX | BPF_B: case BPF_LDX | BPF_PROBE_MEM | BPF_B: + case BPF_LDX | BPF_PROBE_MEMSX | BPF_B: case BPF_LDX | BPF_MEM | BPF_H: /* dst = *(u16 *)(ul) (src + off) */ + case BPF_LDX | BPF_MEMSX | BPF_H: case BPF_LDX | BPF_PROBE_MEM | BPF_H: + case BPF_LDX | BPF_PROBE_MEMSX | BPF_H: case BPF_LDX | BPF_MEM | BPF_W: /* dst = *(u32 *)(ul) (src + off) */ + case BPF_LDX | BPF_MEMSX | BPF_W: case BPF_LDX | BPF_PROBE_MEM | BPF_W: + case BPF_LDX | BPF_PROBE_MEMSX | BPF_W: case BPF_LDX | BPF_MEM | BPF_DW: /* dst = *(u64 *)(ul) (src + off) */ case BPF_LDX | BPF_PROBE_MEM | BPF_DW: /* @@ -931,7 +997,7 @@ * load only if addr is kernel address (see is_kernel_addr()), otherwise * set dst_reg=0 and move on. */ - if (BPF_MODE(code) == BPF_PROBE_MEM) { + if (BPF_MODE(code) == BPF_PROBE_MEM || BPF_MODE(code) == BPF_PROBE_MEMSX) { PPC_LI32(_R0, TASK_SIZE - off); EMIT(PPC_RAW_CMPLW(src_reg, _R0)); PPC_BCC_SHORT(COND_GT, (ctx->idx + 4) * 4); @@ -953,30 +1019,48 @@ * as there are two load instructions for dst_reg_h & dst_reg * respectively. */ - if (size == BPF_DW) + if (size == BPF_DW || + (size == BPF_B && BPF_MODE(code) == BPF_PROBE_MEMSX)) PPC_JMP((ctx->idx + 3) * 4); else PPC_JMP((ctx->idx + 2) * 4); } - switch (size) { - case BPF_B: - EMIT(PPC_RAW_LBZ(dst_reg, src_reg, off)); - break; - case BPF_H: - EMIT(PPC_RAW_LHZ(dst_reg, src_reg, off)); - break; - case BPF_W: - EMIT(PPC_RAW_LWZ(dst_reg, src_reg, off)); - break; - case BPF_DW: - EMIT(PPC_RAW_LWZ(dst_reg_h, src_reg, off)); - EMIT(PPC_RAW_LWZ(dst_reg, src_reg, off + 4)); - break; - } + if (BPF_MODE(code) == BPF_MEMSX || BPF_MODE(code) == BPF_PROBE_MEMSX) { + switch (size) { + case BPF_B: + EMIT(PPC_RAW_LBZ(dst_reg, src_reg, off)); + EMIT(PPC_RAW_EXTSB(dst_reg, dst_reg)); + break; + case BPF_H: + EMIT(PPC_RAW_LHA(dst_reg, src_reg, off)); + break; + case BPF_W: + EMIT(PPC_RAW_LWZ(dst_reg, src_reg, off)); + break; + } + if (!fp->aux->verifier_zext) + EMIT(PPC_RAW_SRAWI(dst_reg_h, dst_reg, 31)); - if (size != BPF_DW && !fp->aux->verifier_zext) - EMIT(PPC_RAW_LI(dst_reg_h, 0)); + } else { + switch (size) { + case BPF_B: + EMIT(PPC_RAW_LBZ(dst_reg, src_reg, off)); + break; + case BPF_H: + EMIT(PPC_RAW_LHZ(dst_reg, src_reg, off)); + break; + case BPF_W: + EMIT(PPC_RAW_LWZ(dst_reg, src_reg, off)); + break; + case BPF_DW: + EMIT(PPC_RAW_LWZ(dst_reg_h, src_reg, off)); + EMIT(PPC_RAW_LWZ(dst_reg, src_reg, off + 4)); + break; + } + if (size != BPF_DW && !fp->aux->verifier_zext) + EMIT(PPC_RAW_LI(dst_reg_h, 0)); + } if (BPF_MODE(code) == BPF_PROBE_MEM) { int insn_idx = ctx->idx - 1; @@ -1068,6 +1152,9 @@ case BPF_JMP | BPF_JA: PPC_JMP(addrs[i + 1 + off]); break; + case BPF_JMP32 | BPF_JA: + PPC_JMP(addrs[i + 1 + imm]); + break; case BPF_JMP | BPF_JGT | BPF_K: case BPF_JMP | BPF_JGT | BPF_X: --- linux-xilinx-6.8.0.orig/arch/powerpc/net/bpf_jit_comp64.c +++ linux-xilinx-6.8.0/arch/powerpc/net/bpf_jit_comp64.c @@ -202,7 +202,8 @@ EMIT(PPC_RAW_BLR()); } -static int bpf_jit_emit_func_call_hlp(u32 *image, struct codegen_context *ctx, u64 func) +static int +bpf_jit_emit_func_call_hlp(u32 *image, u32 *fimage, struct codegen_context *ctx, u64 func) { unsigned long func_addr = func ? ppc_function_entry((void *)func) : 0; long reladdr; @@ -211,19 +212,20 @@ return -EINVAL; if (IS_ENABLED(CONFIG_PPC_KERNEL_PCREL)) { - reladdr = func_addr - CTX_NIA(ctx); + reladdr = func_addr - local_paca->kernelbase; if (reladdr >= (long)SZ_8G || reladdr < -(long)SZ_8G) { - pr_err("eBPF: address of %ps out of range of pcrel address.\n", - (void *)func); + pr_err("eBPF: address of %ps out of range of 34-bit relative address.\n", + (void *)func); return -ERANGE; } - /* pla r12,addr */ - EMIT(PPC_PREFIX_MLS | __PPC_PRFX_R(1) | IMM_H18(reladdr)); - EMIT(PPC_INST_PADDI | ___PPC_RT(_R12) | IMM_L(reladdr)); - EMIT(PPC_RAW_MTCTR(_R12)); - EMIT(PPC_RAW_BCTR()); - + EMIT(PPC_RAW_LD(_R12, _R13, offsetof(struct paca_struct, kernelbase))); + /* Align for subsequent prefix instruction */ + if (!IS_ALIGNED((unsigned long)fimage + CTX_NIA(ctx), 8)) + EMIT(PPC_RAW_NOP()); + /* paddi r12,r12,addr */ + EMIT(PPC_PREFIX_MLS | __PPC_PRFX_R(0) | IMM_H18(reladdr)); + EMIT(PPC_INST_PADDI | ___PPC_RT(_R12) | ___PPC_RA(_R12) | IMM_L(reladdr)); } else { reladdr = func_addr - kernel_toc_addr(); if (reladdr > 0x7FFFFFFF || reladdr < -(0x80000000L)) { @@ -233,9 +235,9 @@ EMIT(PPC_RAW_ADDIS(_R12, _R2, PPC_HA(reladdr))); EMIT(PPC_RAW_ADDI(_R12, _R12, PPC_LO(reladdr))); - EMIT(PPC_RAW_MTCTR(_R12)); - EMIT(PPC_RAW_BCTRL()); } + EMIT(PPC_RAW_MTCTR(_R12)); + EMIT(PPC_RAW_BCTRL()); return 0; } @@ -285,7 +287,7 @@ int b2p_index = bpf_to_ppc(BPF_REG_3); int bpf_tailcall_prologue_size = 8; - if (IS_ENABLED(CONFIG_PPC64_ELF_ABI_V2)) + if (!IS_ENABLED(CONFIG_PPC_KERNEL_PCREL) && IS_ENABLED(CONFIG_PPC64_ELF_ABI_V2)) bpf_tailcall_prologue_size += 4; /* skip past the toc load */ /* @@ -803,6 +805,15 @@ /* Get offset into TMP_REG_1 */ EMIT(PPC_RAW_LI(tmp1_reg, off)); + /* + * Enforce full ordering for operations with BPF_FETCH by emitting a 'sync' + * before and after the operation. + * + * This is a requirement in the Linux Kernel Memory Model. + * See __cmpxchg_u64() in asm/cmpxchg.h as an example. + */ + if ((imm & BPF_FETCH) && IS_ENABLED(CONFIG_SMP)) + EMIT(PPC_RAW_SYNC()); tmp_idx = ctx->idx * 4; /* load value from memory into TMP_REG_2 */ if (size == BPF_DW) @@ -865,6 +876,9 @@ PPC_BCC_SHORT(COND_NE, tmp_idx); if (imm & BPF_FETCH) { + /* Emit 'sync' to enforce full ordering */ + if (IS_ENABLED(CONFIG_SMP)) + EMIT(PPC_RAW_SYNC()); EMIT(PPC_RAW_MR(ret_reg, _R0)); /* * Skip unnecessary zero-extension for 32-bit cmpxchg. @@ -993,7 +1007,7 @@ return ret; if (func_addr_fixed) - ret = bpf_jit_emit_func_call_hlp(image, ctx, func_addr); + ret = bpf_jit_emit_func_call_hlp(image, fimage, ctx, func_addr); else ret = bpf_jit_emit_func_call_rel(image, fimage, ctx, func_addr); --- linux-xilinx-6.8.0.orig/arch/powerpc/perf/hv-gpci.c +++ linux-xilinx-6.8.0/arch/powerpc/perf/hv-gpci.c @@ -695,6 +695,20 @@ ret = plpar_hcall_norets(H_GET_PERF_COUNTER_INFO, virt_to_phys(arg), HGPCI_REQ_BUFFER_SIZE); + + /* + * ret value as 'H_PARAMETER' with detail_rc as 'GEN_BUF_TOO_SMALL', + * specifies that the current buffer size cannot accommodate + * all the information and a partial buffer returned. + * Since in this function we are only accessing data for a given starting index, + * we don't need to accommodate whole data and can get required count by + * accessing first entry data. + * Hence hcall fails only incase the ret value is other than H_SUCCESS or + * H_PARAMETER with detail_rc value as GEN_BUF_TOO_SMALL(0x1B). + */ + if (ret == H_PARAMETER && be32_to_cpu(arg->params.detail_rc) == 0x1B) + ret = 0; + if (ret) { pr_devel("hcall failed: 0x%lx\n", ret); goto out; @@ -759,6 +773,7 @@ { u64 count; u8 length; + unsigned long ret; /* Not our event */ if (event->attr.type != event->pmu->type) @@ -789,13 +804,23 @@ } /* check if the request works... */ - if (single_gpci_request(event_get_request(event), + ret = single_gpci_request(event_get_request(event), event_get_starting_index(event), event_get_secondary_index(event), event_get_counter_info_version(event), event_get_offset(event), length, - &count)) { + &count); + + /* + * ret value as H_AUTHORITY implies that partition is not permitted to retrieve + * performance information, and required to set + * "Enable Performance Information Collection" option. + */ + if (ret == H_AUTHORITY) + return -EPERM; + + if (ret) { pr_devel("gpci hcall failed\n"); return -EINVAL; } --- linux-xilinx-6.8.0.orig/arch/powerpc/platforms/44x/warp.c +++ linux-xilinx-6.8.0/arch/powerpc/platforms/44x/warp.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include --- linux-xilinx-6.8.0.orig/arch/powerpc/platforms/85xx/smp.c +++ linux-xilinx-6.8.0/arch/powerpc/platforms/85xx/smp.c @@ -398,6 +398,7 @@ hard_irq_disable(); mpic_teardown_this_cpu(secondary); +#ifdef CONFIG_CRASH_DUMP if (cpu == crashing_cpu && cpu_thread_in_core(cpu) != 0) { /* * We enter the crash kernel on whatever cpu crashed, @@ -406,9 +407,11 @@ */ disable_threadbit = 1; disable_cpu = cpu_first_thread_sibling(cpu); - } else if (sibling != crashing_cpu && - cpu_thread_in_core(cpu) == 0 && - cpu_thread_in_core(sibling) != 0) { + } else if (sibling == crashing_cpu) { + return; + } +#endif + if (cpu_thread_in_core(cpu) == 0 && cpu_thread_in_core(sibling) != 0) { disable_threadbit = 2; disable_cpu = sibling; } --- linux-xilinx-6.8.0.orig/arch/powerpc/platforms/book3s/vas-api.c +++ linux-xilinx-6.8.0/arch/powerpc/platforms/book3s/vas-api.c @@ -464,7 +464,43 @@ return VM_FAULT_SIGBUS; } +/* + * During mmap() paste address, mapping VMA is saved in VAS window + * struct which is used to unmap during migration if the window is + * still open. But the user space can remove this mapping with + * munmap() before closing the window and the VMA address will + * be invalid. Set VAS window VMA to NULL in this function which + * is called before VMA free. + */ +static void vas_mmap_close(struct vm_area_struct *vma) +{ + struct file *fp = vma->vm_file; + struct coproc_instance *cp_inst = fp->private_data; + struct vas_window *txwin; + + /* Should not happen */ + if (!cp_inst || !cp_inst->txwin) { + pr_err("No attached VAS window for the paste address mmap\n"); + return; + } + + txwin = cp_inst->txwin; + /* + * task_ref.vma is set in coproc_mmap() during mmap paste + * address. So it has to be the same VMA that is getting freed. + */ + if (WARN_ON(txwin->task_ref.vma != vma)) { + pr_err("Invalid paste address mmaping\n"); + return; + } + + mutex_lock(&txwin->task_ref.mmap_mutex); + txwin->task_ref.vma = NULL; + mutex_unlock(&txwin->task_ref.mmap_mutex); +} + static const struct vm_operations_struct vas_vm_ops = { + .close = vas_mmap_close, .fault = vas_mmap_fault, }; --- linux-xilinx-6.8.0.orig/arch/powerpc/platforms/embedded6xx/linkstation.c +++ linux-xilinx-6.8.0/arch/powerpc/platforms/embedded6xx/linkstation.c @@ -99,9 +99,6 @@ mpic_init(mpic); } -extern void avr_uart_configure(void); -extern void avr_uart_send(const char); - static void __noreturn linkstation_restart(char *cmd) { local_irq_disable(); --- linux-xilinx-6.8.0.orig/arch/powerpc/platforms/embedded6xx/mpc10x.h +++ linux-xilinx-6.8.0/arch/powerpc/platforms/embedded6xx/mpc10x.h @@ -156,4 +156,7 @@ /* For MPC107 boards that use the built-in openpic */ void mpc10x_set_openpic(void); +void avr_uart_configure(void); +void avr_uart_send(const char c); + #endif /* __PPC_KERNEL_MPC10X_H */ --- linux-xilinx-6.8.0.orig/arch/powerpc/platforms/powermac/Kconfig +++ linux-xilinx-6.8.0/arch/powerpc/platforms/powermac/Kconfig @@ -2,7 +2,7 @@ config PPC_PMAC bool "Apple PowerMac based machines" depends on PPC_BOOK3S && CPU_BIG_ENDIAN - select ADB_CUDA if POWER_RESET && PPC32 + select ADB_CUDA if POWER_RESET && ADB select MPIC select FORCE_PCI select PPC_INDIRECT_PCI if PPC32 --- linux-xilinx-6.8.0.orig/arch/powerpc/platforms/powernv/opal-irqchip.c +++ linux-xilinx-6.8.0/arch/powerpc/platforms/powernv/opal-irqchip.c @@ -282,6 +282,7 @@ name, NULL); if (rc) { pr_warn("Error %d requesting OPAL irq %d\n", rc, (int)r->start); + kfree(name); continue; } } --- linux-xilinx-6.8.0.orig/arch/powerpc/platforms/ps3/Kconfig +++ linux-xilinx-6.8.0/arch/powerpc/platforms/ps3/Kconfig @@ -67,6 +67,7 @@ config PS3_PS3AV depends on PPC_PS3 tristate "PS3 AV settings driver" if PS3_ADVANCED + select VIDEO select PS3_VUART default y help --- linux-xilinx-6.8.0.orig/arch/powerpc/platforms/pseries/dlpar.c +++ linux-xilinx-6.8.0/arch/powerpc/platforms/pseries/dlpar.c @@ -334,23 +334,6 @@ { int rc; - /* pseries error logs are in BE format, convert to cpu type */ - switch (hp_elog->id_type) { - case PSERIES_HP_ELOG_ID_DRC_COUNT: - hp_elog->_drc_u.drc_count = - be32_to_cpu(hp_elog->_drc_u.drc_count); - break; - case PSERIES_HP_ELOG_ID_DRC_INDEX: - hp_elog->_drc_u.drc_index = - be32_to_cpu(hp_elog->_drc_u.drc_index); - break; - case PSERIES_HP_ELOG_ID_DRC_IC: - hp_elog->_drc_u.ic.count = - be32_to_cpu(hp_elog->_drc_u.ic.count); - hp_elog->_drc_u.ic.index = - be32_to_cpu(hp_elog->_drc_u.ic.index); - } - switch (hp_elog->resource) { case PSERIES_HP_ELOG_RESOURCE_MEM: rc = dlpar_memory(hp_elog); --- linux-xilinx-6.8.0.orig/arch/powerpc/platforms/pseries/dtl.c +++ linux-xilinx-6.8.0/arch/powerpc/platforms/pseries/dtl.c @@ -191,7 +191,7 @@ return -EBUSY; /* ensure there are no other conflicting dtl users */ - if (!read_trylock(&dtl_access_lock)) + if (!down_read_trylock(&dtl_access_lock)) return -EBUSY; n_entries = dtl_buf_entries; @@ -199,7 +199,7 @@ if (!buf) { printk(KERN_WARNING "%s: buffer alloc failed for cpu %d\n", __func__, dtl->cpu); - read_unlock(&dtl_access_lock); + up_read(&dtl_access_lock); return -ENOMEM; } @@ -217,7 +217,7 @@ spin_unlock(&dtl->lock); if (rc) { - read_unlock(&dtl_access_lock); + up_read(&dtl_access_lock); kmem_cache_free(dtl_cache, buf); } @@ -232,7 +232,7 @@ dtl->buf = NULL; dtl->buf_entries = 0; spin_unlock(&dtl->lock); - read_unlock(&dtl_access_lock); + up_read(&dtl_access_lock); } /* file interface */ --- linux-xilinx-6.8.0.orig/arch/powerpc/platforms/pseries/eeh_pseries.c +++ linux-xilinx-6.8.0/arch/powerpc/platforms/pseries/eeh_pseries.c @@ -580,8 +580,10 @@ switch(rets[0]) { case 0: - result = EEH_STATE_MMIO_ACTIVE | - EEH_STATE_DMA_ACTIVE; + result = EEH_STATE_MMIO_ACTIVE | + EEH_STATE_DMA_ACTIVE | + EEH_STATE_MMIO_ENABLED | + EEH_STATE_DMA_ENABLED; break; case 1: result = EEH_STATE_RESET_ACTIVE | --- linux-xilinx-6.8.0.orig/arch/powerpc/platforms/pseries/hotplug-cpu.c +++ linux-xilinx-6.8.0/arch/powerpc/platforms/pseries/hotplug-cpu.c @@ -757,7 +757,7 @@ u32 drc_index; int rc; - drc_index = hp_elog->_drc_u.drc_index; + drc_index = be32_to_cpu(hp_elog->_drc_u.drc_index); lock_device_hotplug(); --- linux-xilinx-6.8.0.orig/arch/powerpc/platforms/pseries/hotplug-memory.c +++ linux-xilinx-6.8.0/arch/powerpc/platforms/pseries/hotplug-memory.c @@ -817,16 +817,16 @@ case PSERIES_HP_ELOG_ACTION_ADD: switch (hp_elog->id_type) { case PSERIES_HP_ELOG_ID_DRC_COUNT: - count = hp_elog->_drc_u.drc_count; + count = be32_to_cpu(hp_elog->_drc_u.drc_count); rc = dlpar_memory_add_by_count(count); break; case PSERIES_HP_ELOG_ID_DRC_INDEX: - drc_index = hp_elog->_drc_u.drc_index; + drc_index = be32_to_cpu(hp_elog->_drc_u.drc_index); rc = dlpar_memory_add_by_index(drc_index); break; case PSERIES_HP_ELOG_ID_DRC_IC: - count = hp_elog->_drc_u.ic.count; - drc_index = hp_elog->_drc_u.ic.index; + count = be32_to_cpu(hp_elog->_drc_u.ic.count); + drc_index = be32_to_cpu(hp_elog->_drc_u.ic.index); rc = dlpar_memory_add_by_ic(count, drc_index); break; default: @@ -838,16 +838,16 @@ case PSERIES_HP_ELOG_ACTION_REMOVE: switch (hp_elog->id_type) { case PSERIES_HP_ELOG_ID_DRC_COUNT: - count = hp_elog->_drc_u.drc_count; + count = be32_to_cpu(hp_elog->_drc_u.drc_count); rc = dlpar_memory_remove_by_count(count); break; case PSERIES_HP_ELOG_ID_DRC_INDEX: - drc_index = hp_elog->_drc_u.drc_index; + drc_index = be32_to_cpu(hp_elog->_drc_u.drc_index); rc = dlpar_memory_remove_by_index(drc_index); break; case PSERIES_HP_ELOG_ID_DRC_IC: - count = hp_elog->_drc_u.ic.count; - drc_index = hp_elog->_drc_u.ic.index; + count = be32_to_cpu(hp_elog->_drc_u.ic.count); + drc_index = be32_to_cpu(hp_elog->_drc_u.ic.index); rc = dlpar_memory_remove_by_ic(count, drc_index); break; default: --- linux-xilinx-6.8.0.orig/arch/powerpc/platforms/pseries/iommu.c +++ linux-xilinx-6.8.0/arch/powerpc/platforms/pseries/iommu.c @@ -786,8 +786,16 @@ * parent bus. During reboot, there will be ibm,dma-window property to * define DMA window. For kdump, there will at least be default window or DDW * or both. + * There is an exception to the above. In case the PE goes into frozen + * state, firmware may not provide ibm,dma-window property at the time + * of LPAR boot up. */ + if (!pdn) { + pr_debug(" no ibm,dma-window property !\n"); + return; + } + ppci = PCI_DN(pdn); pr_debug(" parent is %pOF, iommu_table: 0x%p\n", @@ -1500,7 +1508,8 @@ iommu_table_setparms_common(newtbl, pci->phb->bus->number, create.liobn, win_addr, 1UL << len, page_shift, NULL, &iommu_table_lpar_multi_ops); - iommu_init_table(newtbl, pci->phb->node, start, end); + iommu_init_table(newtbl, pci->phb->node, + start >> page_shift, end >> page_shift); pci->table_group->tables[1] = newtbl; --- linux-xilinx-6.8.0.orig/arch/powerpc/platforms/pseries/kexec.c +++ linux-xilinx-6.8.0/arch/powerpc/platforms/pseries/kexec.c @@ -61,11 +61,3 @@ } else xics_kexec_teardown_cpu(secondary); } - -void pseries_machine_kexec(struct kimage *image) -{ - if (firmware_has_feature(FW_FEATURE_SET_MODE)) - pseries_disable_reloc_on_exc(); - - default_machine_kexec(image); -} --- linux-xilinx-6.8.0.orig/arch/powerpc/platforms/pseries/lpar.c +++ linux-xilinx-6.8.0/arch/powerpc/platforms/pseries/lpar.c @@ -169,7 +169,7 @@ */ #define NR_CPUS_H NR_CPUS -DEFINE_RWLOCK(dtl_access_lock); +DECLARE_RWSEM(dtl_access_lock); static DEFINE_PER_CPU(struct vcpu_dispatch_data, vcpu_disp_data); static DEFINE_PER_CPU(u64, dtl_entry_ridx); static DEFINE_PER_CPU(struct dtl_worker, dtl_workers); @@ -463,7 +463,7 @@ { int rc = 0, state; - if (!write_trylock(&dtl_access_lock)) { + if (!down_write_trylock(&dtl_access_lock)) { rc = -EBUSY; goto out; } @@ -479,7 +479,7 @@ pr_err("vcpudispatch_stats: unable to setup workqueue for DTL processing\n"); free_dtl_buffers(time_limit); reset_global_dtl_mask(); - write_unlock(&dtl_access_lock); + up_write(&dtl_access_lock); rc = -EINVAL; goto out; } @@ -494,7 +494,7 @@ cpuhp_remove_state(dtl_worker_state); free_dtl_buffers(time_limit); reset_global_dtl_mask(); - write_unlock(&dtl_access_lock); + up_write(&dtl_access_lock); } static ssize_t vcpudispatch_stats_write(struct file *file, const char __user *p, @@ -1886,10 +1886,10 @@ * h_get_mpp * H_GET_MPP hcall returns info in 7 parms */ -int h_get_mpp(struct hvcall_mpp_data *mpp_data) +long h_get_mpp(struct hvcall_mpp_data *mpp_data) { - int rc; - unsigned long retbuf[PLPAR_HCALL9_BUFSIZE]; + unsigned long retbuf[PLPAR_HCALL9_BUFSIZE] = {0}; + long rc; rc = plpar_hcall9(H_GET_MPP, retbuf); --- linux-xilinx-6.8.0.orig/arch/powerpc/platforms/pseries/lparcfg.c +++ linux-xilinx-6.8.0/arch/powerpc/platforms/pseries/lparcfg.c @@ -113,8 +113,8 @@ */ static unsigned int h_get_ppp(struct hvcall_ppp_data *ppp_data) { - unsigned long rc; - unsigned long retbuf[PLPAR_HCALL9_BUFSIZE]; + unsigned long retbuf[PLPAR_HCALL9_BUFSIZE] = {0}; + long rc; rc = plpar_hcall9(H_GET_PPP, retbuf); @@ -193,7 +193,7 @@ struct hvcall_ppp_data ppp_data; struct device_node *root; const __be32 *perf_level; - int rc; + long rc; rc = h_get_ppp(&ppp_data); if (rc) @@ -357,8 +357,8 @@ static void read_lpar_name(struct seq_file *m) { - if (read_rtas_lpar_name(m) && read_dt_lpar_name(m)) - pr_err_once("Error can't get the LPAR name"); + if (read_rtas_lpar_name(m)) + read_dt_lpar_name(m); } #define SPLPAR_MAXLENGTH 1026*(sizeof(char)) --- linux-xilinx-6.8.0.orig/arch/powerpc/platforms/pseries/papr_platform_attributes.c +++ linux-xilinx-6.8.0/arch/powerpc/platforms/pseries/papr_platform_attributes.c @@ -101,10 +101,12 @@ esi_buf_size = ESI_HDR_SIZE + (CURR_MAX_ESI_ATTRS * max_esi_attrs); temp_buf = krealloc(buf, esi_buf_size, GFP_KERNEL); - if (temp_buf) + if (temp_buf) { buf = temp_buf; - else - return -ENOMEM; + } else { + ret = -ENOMEM; + goto out_buf; + } goto retry; } --- linux-xilinx-6.8.0.orig/arch/powerpc/platforms/pseries/plpks.c +++ linux-xilinx-6.8.0/arch/powerpc/platforms/pseries/plpks.c @@ -415,8 +415,7 @@ break; } - usleep_range(PLPKS_FLUSH_SLEEP, - PLPKS_FLUSH_SLEEP + PLPKS_FLUSH_SLEEP_RANGE); + fsleep(PLPKS_FLUSH_SLEEP); timeout = timeout + PLPKS_FLUSH_SLEEP; } while (timeout < PLPKS_MAX_TIMEOUT); @@ -464,9 +463,10 @@ continuetoken = retbuf[0]; if (pseries_status_to_err(rc) == -EBUSY) { - int delay_ms = get_longbusy_msecs(rc); - mdelay(delay_ms); - timeout += delay_ms; + int delay_us = get_longbusy_msecs(rc) * 1000; + + fsleep(delay_us); + timeout += delay_us; } rc = pseries_status_to_err(rc); } while (rc == -EBUSY && timeout < PLPKS_MAX_TIMEOUT); @@ -683,7 +683,7 @@ out: fdt_nop_property(fdt, chosen_node, "ibm,plpks-pw"); // Since we've cleared the password, we must update the FDT checksum - early_init_dt_verify(fdt); + early_init_dt_verify(fdt, __pa(fdt)); } static __init int pseries_plpks_init(void) --- linux-xilinx-6.8.0.orig/arch/powerpc/platforms/pseries/pmem.c +++ linux-xilinx-6.8.0/arch/powerpc/platforms/pseries/pmem.c @@ -121,7 +121,7 @@ return -EINVAL; } - drc_index = hp_elog->_drc_u.drc_index; + drc_index = be32_to_cpu(hp_elog->_drc_u.drc_index); lock_device_hotplug(); --- linux-xilinx-6.8.0.orig/arch/powerpc/platforms/pseries/pseries.h +++ linux-xilinx-6.8.0/arch/powerpc/platforms/pseries/pseries.h @@ -38,7 +38,6 @@ #endif extern void pseries_kexec_cpu_down(int crash_shutdown, int secondary); -void pseries_machine_kexec(struct kimage *image); extern void pSeries_final_fixup(void); --- linux-xilinx-6.8.0.orig/arch/powerpc/platforms/pseries/setup.c +++ linux-xilinx-6.8.0/arch/powerpc/platforms/pseries/setup.c @@ -343,8 +343,8 @@ { void (*ctor)(void *) = get_dtl_cache_ctor(); - dtl_cache = kmem_cache_create("dtl", DISPATCH_LOG_BYTES, - DISPATCH_LOG_BYTES, 0, ctor); + dtl_cache = kmem_cache_create_usercopy("dtl", DISPATCH_LOG_BYTES, + DISPATCH_LOG_BYTES, 0, 0, DISPATCH_LOG_BYTES, ctor); if (!dtl_cache) { pr_warn("Failed to create dispatch trace log buffer cache\n"); pr_warn("Stolen time statistics will be unreliable\n"); @@ -1153,7 +1153,6 @@ .machine_check_exception = pSeries_machine_check_exception, .machine_check_log_err = pSeries_machine_check_log_err, #ifdef CONFIG_KEXEC_CORE - .machine_kexec = pseries_machine_kexec, .kexec_cpu_down = pseries_kexec_cpu_down, #endif #ifdef CONFIG_MEMORY_HOTPLUG --- linux-xilinx-6.8.0.orig/arch/powerpc/platforms/pseries/vio.c +++ linux-xilinx-6.8.0/arch/powerpc/platforms/pseries/vio.c @@ -39,7 +39,6 @@ .name = "vio", .type = "", .dev.init_name = "vio", - .dev.bus = &vio_bus_type, }; #ifdef CONFIG_PPC_SMLPAR --- linux-xilinx-6.8.0.orig/arch/powerpc/sysdev/fsl_msi.c +++ linux-xilinx-6.8.0/arch/powerpc/sysdev/fsl_msi.c @@ -566,10 +566,12 @@ .msiir_offset = 0x38, }; +#ifdef CONFIG_EPAPR_PARAVIRT static const struct fsl_msi_feature vmpic_msi_feature = { .fsl_pic_ip = FSL_PIC_IP_VMPIC, .msiir_offset = 0, }; +#endif static const struct of_device_id fsl_of_msi_ids[] = { { --- linux-xilinx-6.8.0.orig/arch/powerpc/sysdev/xive/native.c +++ linux-xilinx-6.8.0/arch/powerpc/sysdev/xive/native.c @@ -559,9 +559,7 @@ struct device_node *np; struct resource r; void __iomem *tima; - struct property *prop; u8 max_prio = 7; - const __be32 *p; u32 val, cpu; s64 rc; @@ -592,7 +590,7 @@ max_prio = val - 1; /* Iterate the EQ sizes and pick one */ - of_property_for_each_u32(np, "ibm,xive-eq-sizes", prop, p, val) { + of_property_for_each_u32(np, "ibm,xive-eq-sizes", val) { xive_queue_shift = val; if (val == PAGE_SHIFT) break; --- linux-xilinx-6.8.0.orig/arch/powerpc/sysdev/xive/spapr.c +++ linux-xilinx-6.8.0/arch/powerpc/sysdev/xive/spapr.c @@ -814,7 +814,6 @@ struct device_node *np; struct resource r; void __iomem *tima; - struct property *prop; u8 max_prio; u32 val; u32 len; @@ -866,7 +865,7 @@ } /* Iterate the EQ sizes and pick one */ - of_property_for_each_u32(np, "ibm,xive-eq-sizes", prop, reg, val) { + of_property_for_each_u32(np, "ibm,xive-eq-sizes", val) { xive_queue_shift = val; if (val == PAGE_SHIFT) break; --- linux-xilinx-6.8.0.orig/arch/powerpc/xmon/ppc-dis.c +++ linux-xilinx-6.8.0/arch/powerpc/xmon/ppc-dis.c @@ -122,32 +122,21 @@ bool insn_is_short; ppc_cpu_t dialect; - dialect = PPC_OPCODE_PPC | PPC_OPCODE_COMMON - | PPC_OPCODE_64 | PPC_OPCODE_POWER4 | PPC_OPCODE_ALTIVEC; + dialect = PPC_OPCODE_PPC | PPC_OPCODE_COMMON; - if (cpu_has_feature(CPU_FTRS_POWER5)) - dialect |= PPC_OPCODE_POWER5; + if (IS_ENABLED(CONFIG_PPC64)) + dialect |= PPC_OPCODE_64 | PPC_OPCODE_POWER4 | PPC_OPCODE_CELL | + PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | + PPC_OPCODE_POWER9; - if (cpu_has_feature(CPU_FTRS_CELL)) - dialect |= (PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC); + if (cpu_has_feature(CPU_FTR_TM)) + dialect |= PPC_OPCODE_HTM; - if (cpu_has_feature(CPU_FTRS_POWER6)) - dialect |= (PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC); - - if (cpu_has_feature(CPU_FTRS_POWER7)) - dialect |= (PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7 - | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX); - - if (cpu_has_feature(CPU_FTRS_POWER8)) - dialect |= (PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7 - | PPC_OPCODE_POWER8 | PPC_OPCODE_HTM - | PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2 | PPC_OPCODE_VSX); - - if (cpu_has_feature(CPU_FTRS_POWER9)) - dialect |= (PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7 - | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9 | PPC_OPCODE_HTM - | PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2 - | PPC_OPCODE_VSX | PPC_OPCODE_VSX3); + if (cpu_has_feature(CPU_FTR_ALTIVEC)) + dialect |= PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2; + + if (cpu_has_feature(CPU_FTR_VSX)) + dialect |= PPC_OPCODE_VSX | PPC_OPCODE_VSX3; /* Get the major opcode of the insn. */ opcode = NULL; --- linux-xilinx-6.8.0.orig/arch/powerpc/xmon/xmon.c +++ linux-xilinx-6.8.0/arch/powerpc/xmon/xmon.c @@ -1352,7 +1352,7 @@ } termch = cpu; - if (!scanhex(&cpu)) { + if (!scanhex(&cpu) || cpu >= num_possible_cpus()) { /* print cpus waiting or in xmon */ printf("cpus stopped:"); last_cpu = first_cpu = NR_CPUS; @@ -2774,7 +2774,7 @@ termch = c; /* Put c back, it wasn't 'a' */ - if (scanhex(&num)) + if (scanhex(&num) && num < num_possible_cpus()) dump_one_paca(num); else dump_one_paca(xmon_owner); @@ -2847,7 +2847,7 @@ termch = c; /* Put c back, it wasn't 'a' */ - if (scanhex(&num)) + if (scanhex(&num) && num < num_possible_cpus()) dump_one_xive(num); else dump_one_xive(xmon_owner); --- linux-xilinx-6.8.0.orig/arch/riscv/Kconfig +++ linux-xilinx-6.8.0/arch/riscv/Kconfig @@ -27,6 +27,7 @@ select ARCH_HAS_GCOV_PROFILE_ALL select ARCH_HAS_GIGANTIC_PAGE select ARCH_HAS_KCOV + select ARCH_HAS_MEMBARRIER_CALLBACKS select ARCH_HAS_MMIOWB select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE select ARCH_HAS_PMEM_API @@ -37,7 +38,7 @@ select ARCH_HAS_STRICT_MODULE_RWX if MMU && !XIP_KERNEL select ARCH_HAS_SYSCALL_WRAPPER select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST - select ARCH_HAS_UBSAN_SANITIZE_ALL + select ARCH_HAS_UBSAN select ARCH_HAS_VDSO_DATA select ARCH_KEEP_MEMBLOCK if ACPI select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX @@ -96,7 +97,7 @@ select HAS_IOPORT if MMU select HAVE_ARCH_AUDITSYSCALL select HAVE_ARCH_HUGE_VMALLOC if HAVE_ARCH_HUGE_VMAP - select HAVE_ARCH_HUGE_VMAP if MMU && 64BIT && !XIP_KERNEL + select HAVE_ARCH_HUGE_VMAP if MMU && 64BIT select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL select HAVE_ARCH_JUMP_LABEL_RELATIVE if !XIP_KERNEL select HAVE_ARCH_KASAN if MMU && 64BIT @@ -286,6 +287,11 @@ config FIX_EARLYCON_MEM def_bool MMU +config ILLEGAL_POINTER_VALUE + hex + default 0 if 32BIT + default 0xdead000000000000 if 64BIT + config PGTABLE_LEVELS int default 5 if 64BIT @@ -519,8 +525,8 @@ config TOOLCHAIN_HAS_V bool default y - depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64iv) - depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32iv) + depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64imv) + depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32imv) depends on LLD_VERSION >= 140000 || LD_VERSION >= 23800 depends on AS_HAS_OPTION_ARCH @@ -679,8 +685,7 @@ config THREAD_SIZE_ORDER int "Kernel stack size (in power-of-two numbers of page size)" if VMAP_STACK && EXPERT range 0 4 - default 1 if 32BIT && !KASAN - default 3 if 64BIT && KASAN + default 1 if 32BIT default 2 help Specify the Pages of thread stack size (from 4KB to 64KB), which also --- linux-xilinx-6.8.0.orig/arch/riscv/Kconfig.errata +++ linux-xilinx-6.8.0/arch/riscv/Kconfig.errata @@ -82,14 +82,14 @@ Otherwise, please say "N" here to avoid unnecessary overhead. -config ERRATA_THEAD_PBMT - bool "Apply T-Head memory type errata" +config ERRATA_THEAD_MAE + bool "Apply T-Head's memory attribute extension (XTheadMae) errata" depends on ERRATA_THEAD && 64BIT && MMU select RISCV_ALTERNATIVE_EARLY default y help - This will apply the memory type errata to handle the non-standard - memory type bits in page-table-entries on T-Head SoCs. + This will apply the memory attribute extension errata to handle the + non-standard PTE utilization on T-Head SoCs (XTheadMae). If you don't know what to do here, say "Y". --- linux-xilinx-6.8.0.orig/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts +++ linux-xilinx-6.8.0/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts @@ -160,9 +160,11 @@ status = "okay"; }; +/* UBUNTU: PCIe support is not yet ready, so disable it for now &pcie { status = "okay"; }; +*/ &qspi { status = "okay"; --- linux-xilinx-6.8.0.orig/arch/riscv/boot/dts/sifive/fu740-c000.dtsi +++ linux-xilinx-6.8.0/arch/riscv/boot/dts/sifive/fu740-c000.dtsi @@ -42,7 +42,7 @@ }; }; cpu1: cpu@1 { - compatible = "sifive,bullet0", "riscv"; + compatible = "sifive,u74-mc", "sifive,bullet0", "riscv"; d-cache-block-size = <64>; d-cache-sets = <64>; d-cache-size = <32768>; @@ -69,7 +69,7 @@ }; }; cpu2: cpu@2 { - compatible = "sifive,bullet0", "riscv"; + compatible = "sifive,u74-mc", "sifive,bullet0", "riscv"; d-cache-block-size = <64>; d-cache-sets = <64>; d-cache-size = <32768>; @@ -96,7 +96,7 @@ }; }; cpu3: cpu@3 { - compatible = "sifive,bullet0", "riscv"; + compatible = "sifive,u74-mc", "sifive,bullet0", "riscv"; d-cache-block-size = <64>; d-cache-sets = <64>; d-cache-size = <32768>; @@ -123,7 +123,7 @@ }; }; cpu4: cpu@4 { - compatible = "sifive,bullet0", "riscv"; + compatible = "sifive,u74-mc", "sifive,bullet0", "riscv"; d-cache-block-size = <64>; d-cache-sets = <64>; d-cache-size = <32768>; --- linux-xilinx-6.8.0.orig/arch/riscv/boot/dts/sifive/hifive-unleashed-a00-microsemi.dts +++ linux-xilinx-6.8.0/arch/riscv/boot/dts/sifive/hifive-unleashed-a00-microsemi.dts @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) + +#include "hifive-unleashed-a00.dts" + +/ { + soc { + pcie: pcie@2030000000 { + #address-cells = <0x3>; + #interrupt-cells = <0x1>; + #size-cells = <0x2>; + compatible = "microsemi,ms-pf-axi-pcie-host"; + device_type = "pci"; + bus-range = <0x01 0x7f>; + interrupt-map = <0 0 0 1 &ms_pcie_intc 0 0 0 0 2 &ms_pcie_intc 1 0 0 0 3 &ms_pcie_intc 2 0 0 0 4 &ms_pcie_intc 3>; + interrupt-map-mask = <0 0 0 7>; + interrupt-parent = <&plic0>; + interrupts = <32>; + ranges = <0x3000000 0x0 0x40000000 0x0 0x40000000 0x0 0x20000000>; + reg = <0x20 0x30000000 0x0 0x4000000 0x20 0x0 0x0 0x100000>; + reg-names = "control", "apb"; + ms_pcie_intc: interrupt-controller { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + }; + }; + }; +}; --- linux-xilinx-6.8.0.orig/arch/riscv/boot/dts/starfive/jh7100.dtsi +++ linux-xilinx-6.8.0/arch/riscv/boot/dts/starfive/jh7100.dtsi @@ -116,6 +116,7 @@ osc_sys: osc-sys { compatible = "fixed-clock"; #clock-cells = <0>; + clock-output-names = "osc_sys"; /* This value must be overridden by the board */ clock-frequency = <0>; }; @@ -123,6 +124,7 @@ osc_aud: osc-aud { compatible = "fixed-clock"; #clock-cells = <0>; + clock-output-names = "osc_aud"; /* This value must be overridden by the board */ clock-frequency = <0>; }; @@ -130,6 +132,7 @@ gmac_rmii_ref: gmac-rmii-ref { compatible = "fixed-clock"; #clock-cells = <0>; + clock-output-names = "gmac_rmii_ref"; /* Should be overridden by the board when needed */ clock-frequency = <0>; }; @@ -137,6 +140,7 @@ gmac_gr_mii_rxclk: gmac-gr-mii-rxclk { compatible = "fixed-clock"; #clock-cells = <0>; + clock-output-names = "gmac_gr_mii_rxclk"; /* Should be overridden by the board when needed */ clock-frequency = <0>; }; --- linux-xilinx-6.8.0.orig/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ linux-xilinx-6.8.0/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -189,7 +189,6 @@ axp15060: pmic@36 { compatible = "x-powers,axp15060"; reg = <0x36>; - interrupts = <0>; interrupt-controller; #interrupt-cells = <1>; @@ -230,24 +229,6 @@ status = "okay"; }; -&i2srx { - pinctrl-names = "default"; - pinctrl-0 = <&i2srx_pins>; - status = "okay"; -}; - -&i2stx0 { - pinctrl-names = "default"; - pinctrl-0 = <&mclk_ext_pins>; - status = "okay"; -}; - -&i2stx1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2stx1_pins>; - status = "okay"; -}; - &mmc0 { max-frequency = <100000000>; assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>; @@ -335,6 +316,12 @@ }; }; +&syscrg { + assigned-clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>, + <&pllclk JH7110_PLLCLK_PLL0_OUT>; + assigned-clock-rates = <500000000>, <1500000000>; +}; + &sysgpio { i2c0_pins: i2c0-0 { i2c-pins { @@ -392,46 +379,6 @@ }; }; - i2srx_pins: i2srx-0 { - clk-sd-pins { - pinmux = , - , - , - , - ; - input-enable; - }; - }; - - i2stx1_pins: i2stx1-0 { - sd-pins { - pinmux = ; - bias-disable; - input-disable; - }; - }; - - mclk_ext_pins: mclk-ext-0 { - mclk-ext-pins { - pinmux = ; - input-enable; - }; - }; - mmc0_pins: mmc0-0 { rst-pins { pinmux = ; - bias-pull-up; - drive-strength = <2>; - input-disable; - input-schmitt-disable; - slew-rate = <0>; - }; - - rx-pins { - pinmux = ; - input-enable; - }; - - sync-pins { - pinmux = ; - input-enable; - }; - - pcmclk-pins { - pinmux = ; - input-enable; - }; - }; - uart0_pins: uart0-0 { tx-pins { pinmux = ; - status = "okay"; -}; - &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins>; --- linux-xilinx-6.8.0.orig/arch/riscv/errata/thead/errata.c +++ linux-xilinx-6.8.0/arch/riscv/errata/thead/errata.c @@ -19,20 +19,26 @@ #include #include -static bool errata_probe_pbmt(unsigned int stage, - unsigned long arch_id, unsigned long impid) +#define CSR_TH_SXSTATUS 0x5c0 +#define SXSTATUS_MAEE _AC(0x200000, UL) + +static bool errata_probe_mae(unsigned int stage, + unsigned long arch_id, unsigned long impid) { - if (!IS_ENABLED(CONFIG_ERRATA_THEAD_PBMT)) + if (!IS_ENABLED(CONFIG_ERRATA_THEAD_MAE)) return false; if (arch_id != 0 || impid != 0) return false; - if (stage == RISCV_ALTERNATIVES_EARLY_BOOT || - stage == RISCV_ALTERNATIVES_MODULE) - return true; + if (stage != RISCV_ALTERNATIVES_EARLY_BOOT && + stage != RISCV_ALTERNATIVES_MODULE) + return false; + + if (!(csr_read(CSR_TH_SXSTATUS) & SXSTATUS_MAEE)) + return false; - return false; + return true; } /* @@ -140,8 +146,8 @@ { u32 cpu_req_errata = 0; - if (errata_probe_pbmt(stage, archid, impid)) - cpu_req_errata |= BIT(ERRATA_THEAD_PBMT); + if (errata_probe_mae(stage, archid, impid)) + cpu_req_errata |= BIT(ERRATA_THEAD_MAE); errata_probe_cmo(stage, archid, impid); --- linux-xilinx-6.8.0.orig/arch/riscv/include/asm/asm.h +++ linux-xilinx-6.8.0/arch/riscv/include/asm/asm.h @@ -183,6 +183,16 @@ REG_L x31, PT_T6(sp) .endm +/* Annotate a function as being unsuitable for kprobes. */ +#ifdef CONFIG_KPROBES +#define ASM_NOKPROBE(name) \ + .pushsection "_kprobe_blacklist", "aw"; \ + RISCV_PTR name; \ + .popsection +#else +#define ASM_NOKPROBE(name) +#endif + #endif /* __ASSEMBLY__ */ #endif /* _ASM_RISCV_ASM_H */ --- linux-xilinx-6.8.0.orig/arch/riscv/include/asm/cacheflush.h +++ linux-xilinx-6.8.0/arch/riscv/include/asm/cacheflush.h @@ -13,6 +13,12 @@ asm volatile ("fence.i" ::: "memory"); } +static inline void local_flush_icache_range(unsigned long start, + unsigned long end) +{ + local_flush_icache_all(); +} + #define PG_dcache_clean PG_arch_1 static inline void flush_dcache_folio(struct folio *folio) --- linux-xilinx-6.8.0.orig/arch/riscv/include/asm/errata_list.h +++ linux-xilinx-6.8.0/arch/riscv/include/asm/errata_list.h @@ -23,7 +23,7 @@ #endif #ifdef CONFIG_ERRATA_THEAD -#define ERRATA_THEAD_PBMT 0 +#define ERRATA_THEAD_MAE 0 #define ERRATA_THEAD_PMU 1 #define ERRATA_THEAD_NUMBER 2 #endif @@ -43,30 +43,40 @@ CONFIG_ERRATA_SIFIVE_CIP_453) #else /* !__ASSEMBLY__ */ -#define ALT_FLUSH_TLB_PAGE(x) \ +#define ALT_SFENCE_VMA_ASID(asid) \ +asm(ALTERNATIVE("sfence.vma x0, %0", "sfence.vma", SIFIVE_VENDOR_ID, \ + ERRATA_SIFIVE_CIP_1200, CONFIG_ERRATA_SIFIVE_CIP_1200) \ + : : "r" (asid) : "memory") + +#define ALT_SFENCE_VMA_ADDR(addr) \ asm(ALTERNATIVE("sfence.vma %0", "sfence.vma", SIFIVE_VENDOR_ID, \ ERRATA_SIFIVE_CIP_1200, CONFIG_ERRATA_SIFIVE_CIP_1200) \ : : "r" (addr) : "memory") +#define ALT_SFENCE_VMA_ADDR_ASID(addr, asid) \ +asm(ALTERNATIVE("sfence.vma %0, %1", "sfence.vma", SIFIVE_VENDOR_ID, \ + ERRATA_SIFIVE_CIP_1200, CONFIG_ERRATA_SIFIVE_CIP_1200) \ + : : "r" (addr), "r" (asid) : "memory") + /* * _val is marked as "will be overwritten", so need to set it to 0 * in the default case. */ #define ALT_SVPBMT_SHIFT 61 -#define ALT_THEAD_PBMT_SHIFT 59 +#define ALT_THEAD_MAE_SHIFT 59 #define ALT_SVPBMT(_val, prot) \ asm(ALTERNATIVE_2("li %0, 0\t\nnop", \ "li %0, %1\t\nslli %0,%0,%3", 0, \ RISCV_ISA_EXT_SVPBMT, CONFIG_RISCV_ISA_SVPBMT, \ "li %0, %2\t\nslli %0,%0,%4", THEAD_VENDOR_ID, \ - ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT) \ + ERRATA_THEAD_MAE, CONFIG_ERRATA_THEAD_MAE) \ : "=r"(_val) \ : "I"(prot##_SVPBMT >> ALT_SVPBMT_SHIFT), \ - "I"(prot##_THEAD >> ALT_THEAD_PBMT_SHIFT), \ + "I"(prot##_THEAD >> ALT_THEAD_MAE_SHIFT), \ "I"(ALT_SVPBMT_SHIFT), \ - "I"(ALT_THEAD_PBMT_SHIFT)) + "I"(ALT_THEAD_MAE_SHIFT)) -#ifdef CONFIG_ERRATA_THEAD_PBMT +#ifdef CONFIG_ERRATA_THEAD_MAE /* * IO/NOCACHE memory types are handled together with svpbmt, * so on T-Head chips, check if no other memory type is set, @@ -83,11 +93,11 @@ "slli t3, t3, %3\n\t" \ "or %0, %0, t3\n\t" \ "2:", THEAD_VENDOR_ID, \ - ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT) \ + ERRATA_THEAD_MAE, CONFIG_ERRATA_THEAD_MAE) \ : "+r"(_val) \ - : "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \ - "I"(_PAGE_PMA_THEAD >> ALT_THEAD_PBMT_SHIFT), \ - "I"(ALT_THEAD_PBMT_SHIFT) \ + : "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_MAE_SHIFT), \ + "I"(_PAGE_PMA_THEAD >> ALT_THEAD_MAE_SHIFT), \ + "I"(ALT_THEAD_MAE_SHIFT) \ : "t3") #else #define ALT_THEAD_PMA(_val) --- linux-xilinx-6.8.0.orig/arch/riscv/include/asm/insn.h +++ linux-xilinx-6.8.0/arch/riscv/include/asm/insn.h @@ -145,7 +145,7 @@ /* parts of opcode for RVF, RVD and RVQ */ #define RVFDQ_FL_FS_WIDTH_OFF 12 -#define RVFDQ_FL_FS_WIDTH_MASK GENMASK(3, 0) +#define RVFDQ_FL_FS_WIDTH_MASK GENMASK(2, 0) #define RVFDQ_FL_FS_WIDTH_W 2 #define RVFDQ_FL_FS_WIDTH_D 3 #define RVFDQ_LS_FS_WIDTH_Q 4 --- linux-xilinx-6.8.0.orig/arch/riscv/include/asm/kfence.h +++ linux-xilinx-6.8.0/arch/riscv/include/asm/kfence.h @@ -22,7 +22,9 @@ else set_pte(pte, __pte(pte_val(ptep_get(pte)) | _PAGE_PRESENT)); - flush_tlb_kernel_range(addr, addr + PAGE_SIZE); + preempt_disable(); + local_flush_tlb_kernel_range(addr, addr + PAGE_SIZE); + preempt_enable(); return true; } --- linux-xilinx-6.8.0.orig/arch/riscv/include/asm/kvm_vcpu_pmu.h +++ linux-xilinx-6.8.0/arch/riscv/include/asm/kvm_vcpu_pmu.h @@ -10,6 +10,7 @@ #define __KVM_VCPU_RISCV_PMU_H #include +#include #include #ifdef CONFIG_RISCV_PMU_SBI @@ -57,11 +58,11 @@ #if defined(CONFIG_32BIT) #define KVM_RISCV_VCPU_HPMCOUNTER_CSR_FUNCS \ -{.base = CSR_CYCLEH, .count = 31, .func = kvm_riscv_vcpu_pmu_read_hpm }, \ -{.base = CSR_CYCLE, .count = 31, .func = kvm_riscv_vcpu_pmu_read_hpm }, +{.base = CSR_CYCLEH, .count = 32, .func = kvm_riscv_vcpu_pmu_read_hpm }, \ +{.base = CSR_CYCLE, .count = 32, .func = kvm_riscv_vcpu_pmu_read_hpm }, #else #define KVM_RISCV_VCPU_HPMCOUNTER_CSR_FUNCS \ -{.base = CSR_CYCLE, .count = 31, .func = kvm_riscv_vcpu_pmu_read_hpm }, +{.base = CSR_CYCLE, .count = 32, .func = kvm_riscv_vcpu_pmu_read_hpm }, #endif int kvm_riscv_vcpu_pmu_incr_fw(struct kvm_vcpu *vcpu, unsigned long fid); @@ -92,8 +93,20 @@ struct kvm_pmu { }; +static inline int kvm_riscv_vcpu_pmu_read_legacy(struct kvm_vcpu *vcpu, unsigned int csr_num, + unsigned long *val, unsigned long new_val, + unsigned long wr_mask) +{ + if (csr_num == CSR_CYCLE || csr_num == CSR_INSTRET) { + *val = 0; + return KVM_INSN_CONTINUE_NEXT_SEPC; + } else { + return KVM_INSN_ILLEGAL_TRAP; + } +} + #define KVM_RISCV_VCPU_HPMCOUNTER_CSR_FUNCS \ -{.base = 0, .count = 0, .func = NULL }, +{.base = CSR_CYCLE, .count = 3, .func = kvm_riscv_vcpu_pmu_read_legacy }, static inline void kvm_riscv_vcpu_pmu_init(struct kvm_vcpu *vcpu) {} static inline int kvm_riscv_vcpu_pmu_incr_fw(struct kvm_vcpu *vcpu, unsigned long fid) --- linux-xilinx-6.8.0.orig/arch/riscv/include/asm/membarrier.h +++ linux-xilinx-6.8.0/arch/riscv/include/asm/membarrier.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef _ASM_RISCV_MEMBARRIER_H +#define _ASM_RISCV_MEMBARRIER_H + +static inline void membarrier_arch_switch_mm(struct mm_struct *prev, + struct mm_struct *next, + struct task_struct *tsk) +{ + /* + * Only need the full barrier when switching between processes. + * Barrier when switching from kernel to userspace is not + * required here, given that it is implied by mmdrop(). Barrier + * when switching from userspace to kernel is not needed after + * store to rq->curr. + */ + if (IS_ENABLED(CONFIG_SMP) && + likely(!(atomic_read(&next->membarrier_state) & + (MEMBARRIER_STATE_PRIVATE_EXPEDITED | + MEMBARRIER_STATE_GLOBAL_EXPEDITED)) || !prev)) + return; + + /* + * The membarrier system call requires a full memory barrier + * after storing to rq->curr, before going back to user-space. + * Matches a full barrier in the proximity of the membarrier + * system call entry. + */ + smp_mb(); +} + +#endif /* _ASM_RISCV_MEMBARRIER_H */ --- linux-xilinx-6.8.0.orig/arch/riscv/include/asm/page.h +++ linux-xilinx-6.8.0/arch/riscv/include/asm/page.h @@ -89,7 +89,7 @@ #define PTE_FMT "%08lx" #endif -#ifdef CONFIG_64BIT +#if defined(CONFIG_64BIT) && defined(CONFIG_MMU) /* * We override this value as its generic definition uses __pa too early in * the boot process (before kernel_map.va_pa_offset is set). @@ -122,6 +122,7 @@ extern struct kernel_mapping kernel_map; extern phys_addr_t phys_ram_base; +extern unsigned long vmemmap_start_pfn; #define is_kernel_mapping(x) \ ((x) >= kernel_map.virt_addr && (x) < (kernel_map.virt_addr + kernel_map.size)) --- linux-xilinx-6.8.0.orig/arch/riscv/include/asm/patch.h +++ linux-xilinx-6.8.0/arch/riscv/include/asm/patch.h @@ -6,6 +6,7 @@ #ifndef _ASM_RISCV_PATCH_H #define _ASM_RISCV_PATCH_H +int patch_insn_write(void *addr, const void *insn, size_t len); int patch_text_nosync(void *addr, const void *insns, size_t len); int patch_text_set_nosync(void *addr, u8 c, size_t len); int patch_text(void *addr, u32 *insns, int ninsns); --- linux-xilinx-6.8.0.orig/arch/riscv/include/asm/pgtable.h +++ linux-xilinx-6.8.0/arch/riscv/include/asm/pgtable.h @@ -84,7 +84,7 @@ * Define vmemmap for pfn_to_page & page_to_pfn calls. Needed if kernel * is configured with CONFIG_SPARSEMEM_VMEMMAP enabled. */ -#define vmemmap ((struct page *)VMEMMAP_START - (phys_ram_base >> PAGE_SHIFT)) +#define vmemmap ((struct page *)VMEMMAP_START - vmemmap_start_pfn) #define PCI_IO_SIZE SZ_16M #define PCI_IO_END VMEMMAP_START @@ -439,9 +439,11 @@ return pte; } +#ifdef CONFIG_RISCV_ISA_SVNAPOT #define pte_leaf_size(pte) (pte_napot(pte) ? \ napot_cont_size(napot_cont_order(pte)) :\ PAGE_SIZE) +#endif #ifdef CONFIG_NUMA_BALANCING /* @@ -886,7 +888,7 @@ #define PAGE_SHARED __pgprot(0) #define PAGE_KERNEL __pgprot(0) #define swapper_pg_dir NULL -#define TASK_SIZE 0xffffffffUL +#define TASK_SIZE _AC(-1, UL) #define VMALLOC_START _AC(0, UL) #define VMALLOC_END TASK_SIZE --- linux-xilinx-6.8.0.orig/arch/riscv/include/asm/sbi.h +++ linux-xilinx-6.8.0/arch/riscv/include/asm/sbi.h @@ -9,6 +9,7 @@ #include #include +#include #ifdef CONFIG_RISCV_SBI enum sbi_ext_id { @@ -292,10 +293,13 @@ }; void sbi_init(void); -struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0, - unsigned long arg1, unsigned long arg2, - unsigned long arg3, unsigned long arg4, - unsigned long arg5); +long __sbi_base_ecall(int fid); +struct sbiret __sbi_ecall(unsigned long arg0, unsigned long arg1, + unsigned long arg2, unsigned long arg3, + unsigned long arg4, unsigned long arg5, + int fid, int ext); +#define sbi_ecall(e, f, a0, a1, a2, a3, a4, a5) \ + __sbi_ecall(a0, a1, a2, a3, a4, a5, f, e) #ifdef CONFIG_RISCV_SBI_V01 void sbi_console_putchar(int ch); @@ -359,7 +363,23 @@ SBI_SPEC_VERSION_MAJOR_SHIFT) | minor; } -int sbi_err_map_linux_errno(int err); +static inline int sbi_err_map_linux_errno(int err) +{ + switch (err) { + case SBI_SUCCESS: + return 0; + case SBI_ERR_DENIED: + return -EPERM; + case SBI_ERR_INVALID_PARAM: + return -EINVAL; + case SBI_ERR_INVALID_ADDRESS: + return -EFAULT; + case SBI_ERR_NOT_SUPPORTED: + case SBI_ERR_FAILURE: + default: + return -ENOTSUPP; + }; +} extern bool sbi_debug_console_available; int sbi_debug_console_write(const char *bytes, unsigned int num_bytes); @@ -370,6 +390,8 @@ static inline void sbi_init(void) {} #endif /* CONFIG_RISCV_SBI */ +unsigned long riscv_get_mvendorid(void); +unsigned long riscv_get_marchid(void); unsigned long riscv_cached_mvendorid(unsigned int cpu_id); unsigned long riscv_cached_marchid(unsigned int cpu_id); unsigned long riscv_cached_mimpid(unsigned int cpu_id); --- linux-xilinx-6.8.0.orig/arch/riscv/include/asm/sparsemem.h +++ linux-xilinx-6.8.0/arch/riscv/include/asm/sparsemem.h @@ -7,7 +7,7 @@ #ifdef CONFIG_64BIT #define MAX_PHYSMEM_BITS 56 #else -#define MAX_PHYSMEM_BITS 34 +#define MAX_PHYSMEM_BITS 32 #endif /* CONFIG_64BIT */ #define SECTION_SIZE_BITS 27 #endif /* CONFIG_SPARSEMEM */ --- linux-xilinx-6.8.0.orig/arch/riscv/include/asm/string.h +++ linux-xilinx-6.8.0/arch/riscv/include/asm/string.h @@ -19,6 +19,7 @@ extern asmlinkage void *memmove(void *, const void *, size_t); extern asmlinkage void *__memmove(void *, const void *, size_t); +#if !(defined(CONFIG_KASAN_GENERIC) || defined(CONFIG_KASAN_SW_TAGS)) #define __HAVE_ARCH_STRCMP extern asmlinkage int strcmp(const char *cs, const char *ct); @@ -27,6 +28,7 @@ #define __HAVE_ARCH_STRNCMP extern asmlinkage int strncmp(const char *cs, const char *ct, size_t count); +#endif /* For those files which don't want to check by kasan. */ #if defined(CONFIG_KASAN) && !defined(__SANITIZE_ADDRESS__) --- linux-xilinx-6.8.0.orig/arch/riscv/include/asm/thread_info.h +++ linux-xilinx-6.8.0/arch/riscv/include/asm/thread_info.h @@ -12,7 +12,12 @@ #include /* thread information allocation */ -#define THREAD_SIZE_ORDER CONFIG_THREAD_SIZE_ORDER +#ifdef CONFIG_KASAN +#define KASAN_STACK_ORDER 1 +#else +#define KASAN_STACK_ORDER 0 +#endif +#define THREAD_SIZE_ORDER (CONFIG_THREAD_SIZE_ORDER + KASAN_STACK_ORDER) #define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER) /* --- linux-xilinx-6.8.0.orig/arch/riscv/include/asm/tlbflush.h +++ linux-xilinx-6.8.0/arch/riscv/include/asm/tlbflush.h @@ -22,10 +22,27 @@ __asm__ __volatile__ ("sfence.vma" : : : "memory"); } +static inline void local_flush_tlb_all_asid(unsigned long asid) +{ + if (asid != FLUSH_TLB_NO_ASID) + ALT_SFENCE_VMA_ASID(asid); + else + local_flush_tlb_all(); +} + /* Flush one page from local TLB */ static inline void local_flush_tlb_page(unsigned long addr) { - ALT_FLUSH_TLB_PAGE(__asm__ __volatile__ ("sfence.vma %0" : : "r" (addr) : "memory")); + ALT_SFENCE_VMA_ADDR(addr); +} + +static inline void local_flush_tlb_page_asid(unsigned long addr, + unsigned long asid) +{ + if (asid != FLUSH_TLB_NO_ASID) + ALT_SFENCE_VMA_ADDR_ASID(addr, asid); + else + local_flush_tlb_page(addr); } #else /* CONFIG_MMU */ #define local_flush_tlb_all() do { } while (0) --- linux-xilinx-6.8.0.orig/arch/riscv/include/asm/trace.h +++ linux-xilinx-6.8.0/arch/riscv/include/asm/trace.h @@ -0,0 +1,54 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#undef TRACE_SYSTEM +#define TRACE_SYSTEM riscv + +#if !defined(_TRACE_RISCV_H) || defined(TRACE_HEADER_MULTI_READ) +#define _TRACE_RISCV_H + +#include + +TRACE_EVENT_CONDITION(sbi_call, + TP_PROTO(int ext, int fid), + TP_ARGS(ext, fid), + TP_CONDITION(ext != SBI_EXT_HSM), + + TP_STRUCT__entry( + __field(int, ext) + __field(int, fid) + ), + + TP_fast_assign( + __entry->ext = ext; + __entry->fid = fid; + ), + + TP_printk("ext=0x%x fid=%d", __entry->ext, __entry->fid) +); + +TRACE_EVENT_CONDITION(sbi_return, + TP_PROTO(int ext, long error, long value), + TP_ARGS(ext, error, value), + TP_CONDITION(ext != SBI_EXT_HSM), + + TP_STRUCT__entry( + __field(long, error) + __field(long, value) + ), + + TP_fast_assign( + __entry->error = error; + __entry->value = value; + ), + + TP_printk("error=%ld value=0x%lx", __entry->error, __entry->value) +); + +#endif /* _TRACE_RISCV_H */ + +#undef TRACE_INCLUDE_PATH +#undef TRACE_INCLUDE_FILE + +#define TRACE_INCLUDE_PATH asm +#define TRACE_INCLUDE_FILE trace + +#include --- linux-xilinx-6.8.0.orig/arch/riscv/include/asm/uaccess.h +++ linux-xilinx-6.8.0/arch/riscv/include/asm/uaccess.h @@ -319,7 +319,7 @@ #define __get_kernel_nofault(dst, src, type, err_label) \ do { \ - long __kr_err; \ + long __kr_err = 0; \ \ __get_user_nocheck(*((type *)(dst)), (type *)(src), __kr_err); \ if (unlikely(__kr_err)) \ @@ -328,7 +328,7 @@ #define __put_kernel_nofault(dst, src, type, err_label) \ do { \ - long __kr_err; \ + long __kr_err = 0; \ \ __put_user_nocheck(*((type *)(src)), (type *)(dst), __kr_err); \ if (unlikely(__kr_err)) \ --- linux-xilinx-6.8.0.orig/arch/riscv/include/uapi/asm/auxvec.h +++ linux-xilinx-6.8.0/arch/riscv/include/uapi/asm/auxvec.h @@ -34,7 +34,7 @@ #define AT_L3_CACHEGEOMETRY 47 /* entries in ARCH_DLINFO */ -#define AT_VECTOR_SIZE_ARCH 9 +#define AT_VECTOR_SIZE_ARCH 10 #define AT_MINSIGSTKSZ 51 #endif /* _UAPI_ASM_RISCV_AUXVEC_H */ --- linux-xilinx-6.8.0.orig/arch/riscv/include/uapi/asm/hwprobe.h +++ linux-xilinx-6.8.0/arch/riscv/include/uapi/asm/hwprobe.h @@ -54,7 +54,7 @@ #define RISCV_HWPROBE_EXT_ZFHMIN (1 << 28) #define RISCV_HWPROBE_EXT_ZIHINTNTL (1 << 29) #define RISCV_HWPROBE_EXT_ZVFH (1 << 30) -#define RISCV_HWPROBE_EXT_ZVFHMIN (1 << 31) +#define RISCV_HWPROBE_EXT_ZVFHMIN (1ULL << 31) #define RISCV_HWPROBE_EXT_ZFA (1ULL << 32) #define RISCV_HWPROBE_EXT_ZTSO (1ULL << 33) #define RISCV_HWPROBE_EXT_ZACAS (1ULL << 34) --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/Makefile +++ linux-xilinx-6.8.0/arch/riscv/kernel/Makefile @@ -20,17 +20,21 @@ ifdef CONFIG_RISCV_ALTERNATIVE_EARLY CFLAGS_alternative.o := -mcmodel=medany CFLAGS_cpufeature.o := -mcmodel=medany +CFLAGS_sbi_ecall.o := -mcmodel=medany ifdef CONFIG_FTRACE CFLAGS_REMOVE_alternative.o = $(CC_FLAGS_FTRACE) CFLAGS_REMOVE_cpufeature.o = $(CC_FLAGS_FTRACE) +CFLAGS_REMOVE_sbi_ecall.o = $(CC_FLAGS_FTRACE) endif ifdef CONFIG_RELOCATABLE CFLAGS_alternative.o += -fno-pie CFLAGS_cpufeature.o += -fno-pie +CFLAGS_sbi_ecall.o += -fno-pie endif ifdef CONFIG_KASAN KASAN_SANITIZE_alternative.o := n KASAN_SANITIZE_cpufeature.o := n +KASAN_SANITIZE_sbi_ecall.o := n endif endif @@ -83,7 +87,7 @@ obj-$(CONFIG_PERF_EVENTS) += perf_callchain.o obj-$(CONFIG_HAVE_PERF_REGS) += perf_regs.o -obj-$(CONFIG_RISCV_SBI) += sbi.o +obj-$(CONFIG_RISCV_SBI) += sbi.o sbi_ecall.o ifeq ($(CONFIG_RISCV_SBI), y) obj-$(CONFIG_SMP) += sbi-ipi.o obj-$(CONFIG_SMP) += cpu_ops_sbi.o --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/acpi.c +++ linux-xilinx-6.8.0/arch/riscv/kernel/acpi.c @@ -205,7 +205,7 @@ if (!size) return NULL; - return early_ioremap(phys, size); + return early_memremap(phys, size); } void __init __acpi_unmap_table(void __iomem *map, unsigned long size) @@ -213,7 +213,7 @@ if (!map || !size) return; - early_iounmap(map, size); + early_memunmap(map, size); } void __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size) --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/asm-offsets.c +++ linux-xilinx-6.8.0/arch/riscv/kernel/asm-offsets.c @@ -4,8 +4,6 @@ * Copyright (C) 2017 SiFive */ -#define GENERATING_ASM_OFFSETS - #include #include #include --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/cpu-hotplug.c +++ linux-xilinx-6.8.0/arch/riscv/kernel/cpu-hotplug.c @@ -58,7 +58,7 @@ if (cpu_ops->cpu_is_stopped) ret = cpu_ops->cpu_is_stopped(cpu); if (ret) - pr_warn("CPU%d may not have stopped: %d\n", cpu, ret); + pr_warn("CPU%u may not have stopped: %d\n", cpu, ret); } /* --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/cpu.c +++ linux-xilinx-6.8.0/arch/riscv/kernel/cpu.c @@ -139,6 +139,34 @@ return -1; } +unsigned long __init riscv_get_marchid(void) +{ + struct riscv_cpuinfo *ci = this_cpu_ptr(&riscv_cpuinfo); + +#if IS_ENABLED(CONFIG_RISCV_SBI) + ci->marchid = sbi_spec_is_0_1() ? 0 : sbi_get_marchid(); +#elif IS_ENABLED(CONFIG_RISCV_M_MODE) + ci->marchid = csr_read(CSR_MARCHID); +#else + ci->marchid = 0; +#endif + return ci->marchid; +} + +unsigned long __init riscv_get_mvendorid(void) +{ + struct riscv_cpuinfo *ci = this_cpu_ptr(&riscv_cpuinfo); + +#if IS_ENABLED(CONFIG_RISCV_SBI) + ci->mvendorid = sbi_spec_is_0_1() ? 0 : sbi_get_mvendorid(); +#elif IS_ENABLED(CONFIG_RISCV_M_MODE) + ci->mvendorid = csr_read(CSR_MVENDORID); +#else + ci->mvendorid = 0; +#endif + return ci->mvendorid; +} + DEFINE_PER_CPU(struct riscv_cpuinfo, riscv_cpuinfo); unsigned long riscv_cached_mvendorid(unsigned int cpu_id) @@ -170,12 +198,16 @@ struct riscv_cpuinfo *ci = this_cpu_ptr(&riscv_cpuinfo); #if IS_ENABLED(CONFIG_RISCV_SBI) - ci->mvendorid = sbi_spec_is_0_1() ? 0 : sbi_get_mvendorid(); - ci->marchid = sbi_spec_is_0_1() ? 0 : sbi_get_marchid(); + if (!ci->mvendorid) + ci->mvendorid = sbi_spec_is_0_1() ? 0 : sbi_get_mvendorid(); + if (!ci->marchid) + ci->marchid = sbi_spec_is_0_1() ? 0 : sbi_get_marchid(); ci->mimpid = sbi_spec_is_0_1() ? 0 : sbi_get_mimpid(); #elif IS_ENABLED(CONFIG_RISCV_M_MODE) - ci->mvendorid = csr_read(CSR_MVENDORID); - ci->marchid = csr_read(CSR_MARCHID); + if (!ci->mvendorid) + ci->mvendorid = csr_read(CSR_MVENDORID); + if (!ci->marchid) + ci->marchid = csr_read(CSR_MARCHID); ci->mimpid = csr_read(CSR_MIMPID); #else ci->mvendorid = 0; --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/cpu_ops_sbi.c +++ linux-xilinx-6.8.0/arch/riscv/kernel/cpu_ops_sbi.c @@ -72,7 +72,7 @@ /* Make sure tidle is updated */ smp_mb(); bdata->task_ptr = tidle; - bdata->stack_ptr = task_stack_page(tidle) + THREAD_SIZE; + bdata->stack_ptr = task_pt_regs(tidle); /* Make sure boot data is updated */ smp_mb(); hsm_data = __pa(bdata); --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/cpu_ops_spinwait.c +++ linux-xilinx-6.8.0/arch/riscv/kernel/cpu_ops_spinwait.c @@ -34,8 +34,7 @@ /* Make sure tidle is updated */ smp_mb(); - WRITE_ONCE(__cpu_spinwait_stack_pointer[hartid], - task_stack_page(tidle) + THREAD_SIZE); + WRITE_ONCE(__cpu_spinwait_stack_pointer[hartid], task_pt_regs(tidle)); WRITE_ONCE(__cpu_spinwait_task_pointer[hartid], tidle); } --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/cpufeature.c +++ linux-xilinx-6.8.0/arch/riscv/kernel/cpufeature.c @@ -503,6 +503,8 @@ struct acpi_table_header *rhct; acpi_status status; unsigned int cpu; + u64 boot_vendorid; + u64 boot_archid; if (!acpi_disabled) { status = acpi_get_table(ACPI_SIG_RHCT, 0, &rhct); @@ -510,6 +512,9 @@ return; } + boot_vendorid = riscv_get_mvendorid(); + boot_archid = riscv_get_marchid(); + for_each_possible_cpu(cpu) { struct riscv_isainfo *isainfo = &hart_isa[cpu]; unsigned long this_hwcap = 0; @@ -557,8 +562,7 @@ * CPU cores with the ratified spec will contain non-zero * marchid. */ - if (acpi_disabled && riscv_cached_mvendorid(cpu) == THEAD_VENDOR_ID && - riscv_cached_marchid(cpu) == 0x0) { + if (acpi_disabled && boot_vendorid == THEAD_VENDOR_ID && boot_archid == 0x0) { this_hwcap &= ~isa2hwcap[RISCV_ISA_EXT_v]; clear_bit(RISCV_ISA_EXT_v, isainfo->isa); } @@ -612,7 +616,7 @@ if (ext->subset_ext_size) { for (int j = 0; j < ext->subset_ext_size; j++) { - if (riscv_isa_extension_check(ext->subset_ext_ids[i])) + if (riscv_isa_extension_check(ext->subset_ext_ids[j])) set_bit(ext->subset_ext_ids[j], isainfo->isa); } } @@ -899,6 +903,7 @@ if (per_cpu(misaligned_access_speed, cpu) != RISCV_HWPROBE_MISALIGNED_UNKNOWN) goto exit; + check_unaligned_access_emulated(NULL); buf = alloc_pages(GFP_KERNEL, MISALIGNED_BUFFER_ORDER); if (!buf) { pr_warn("Allocation failure, not measuring misaligned performance\n"); --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/efi-header.S +++ linux-xilinx-6.8.0/arch/riscv/kernel/efi-header.S @@ -64,7 +64,7 @@ .long efi_header_end - _start // SizeOfHeaders .long 0 // CheckSum .short IMAGE_SUBSYSTEM_EFI_APPLICATION // Subsystem - .short 0 // DllCharacteristics + .short IMAGE_DLL_CHARACTERISTICS_NX_COMPAT // DllCharacteristics .quad 0 // SizeOfStackReserve .quad 0 // SizeOfStackCommit .quad 0 // SizeOfHeapReserve --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/elf_kexec.c +++ linux-xilinx-6.8.0/arch/riscv/kernel/elf_kexec.c @@ -445,6 +445,12 @@ *(u32 *)loc = CLEAN_IMM(CJTYPE, *(u32 *)loc) | ENCODE_CJTYPE_IMM(val - addr); break; + case R_RISCV_ADD16: + *(u16 *)loc += val; + break; + case R_RISCV_SUB16: + *(u16 *)loc -= val; + break; case R_RISCV_ADD32: *(u32 *)loc += val; break; --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/entry.S +++ linux-xilinx-6.8.0/arch/riscv/kernel/entry.S @@ -111,6 +111,7 @@ 1: tail do_trap_unknown SYM_CODE_END(handle_exception) +ASM_NOKPROBE(handle_exception) /* * The ret_from_exception must be called with interrupt disabled. Here is the @@ -184,6 +185,7 @@ sret #endif SYM_CODE_END(ret_from_exception) +ASM_NOKPROBE(ret_from_exception) #ifdef CONFIG_VMAP_STACK SYM_CODE_START_LOCAL(handle_kernel_stack_overflow) @@ -219,6 +221,7 @@ move a0, sp tail handle_bad_stack SYM_CODE_END(handle_kernel_stack_overflow) +ASM_NOKPROBE(handle_kernel_stack_overflow) #endif SYM_CODE_START(ret_from_fork) @@ -229,8 +232,8 @@ jalr s0 1: move a0, sp /* pt_regs */ - la ra, ret_from_exception - tail syscall_exit_to_user_mode + call syscall_exit_to_user_mode + j ret_from_exception SYM_CODE_END(ret_from_fork) #ifdef CONFIG_IRQ_STACKS --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/ftrace.c +++ linux-xilinx-6.8.0/arch/riscv/kernel/ftrace.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include @@ -75,8 +76,7 @@ make_call_t0(hook_pos, target, call); /* Replace the auipc-jalr pair at once. Return -EPERM on write error. */ - if (patch_text_nosync - ((void *)hook_pos, enable ? call : nops, MCOUNT_INSN_SIZE)) + if (patch_insn_write((void *)hook_pos, enable ? call : nops, MCOUNT_INSN_SIZE)) return -EPERM; return 0; @@ -88,7 +88,7 @@ make_call_t0(rec->ip, addr, call); - if (patch_text_nosync((void *)rec->ip, call, MCOUNT_INSN_SIZE)) + if (patch_insn_write((void *)rec->ip, call, MCOUNT_INSN_SIZE)) return -EPERM; return 0; @@ -99,7 +99,7 @@ { unsigned int nops[2] = {NOP4, NOP4}; - if (patch_text_nosync((void *)rec->ip, nops, MCOUNT_INSN_SIZE)) + if (patch_insn_write((void *)rec->ip, nops, MCOUNT_INSN_SIZE)) return -EPERM; return 0; @@ -120,6 +120,9 @@ out = ftrace_make_nop(mod, rec, MCOUNT_ADDR); mutex_unlock(&text_mutex); + if (!mod) + local_flush_icache_range(rec->ip, rec->ip + MCOUNT_INSN_SIZE); + return out; } @@ -134,6 +137,42 @@ return ret; } + +struct ftrace_modify_param { + int command; + atomic_t cpu_count; +}; + +static int __ftrace_modify_code(void *data) +{ + struct ftrace_modify_param *param = data; + + if (atomic_inc_return(¶m->cpu_count) == num_online_cpus()) { + ftrace_modify_all_code(param->command); + /* + * Make sure the patching store is effective *before* we + * increment the counter which releases all waiting CPUs + * by using the release variant of atomic increment. The + * release pairs with the call to local_flush_icache_all() + * on the waiting CPU. + */ + atomic_inc_return_release(¶m->cpu_count); + } else { + while (atomic_read(¶m->cpu_count) <= num_online_cpus()) + cpu_relax(); + } + + local_flush_icache_all(); + + return 0; +} + +void arch_ftrace_update_code(int command) +{ + struct ftrace_modify_param param = { command, ATOMIC_INIT(0) }; + + stop_machine(__ftrace_modify_code, ¶m, cpu_online_mask); +} #endif #ifdef CONFIG_DYNAMIC_FTRACE_WITH_REGS --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/head.S +++ linux-xilinx-6.8.0/arch/riscv/kernel/head.S @@ -165,10 +165,21 @@ #endif call .Lsetup_trap_vector scs_load_current - tail smp_callin + call smp_callin #endif /* CONFIG_SMP */ .align 2 +.Lsecondary_park: + /* + * Park this hart if we: + * - have too many harts on CONFIG_RISCV_BOOT_SPINWAIT + * - receive an early trap, before setup_trap_vector finished + * - fail in smp_callin(), as a successful one wouldn't return + */ + wfi + j .Lsecondary_park + +.align 2 .Lsetup_trap_vector: /* Set trap vector to exception handler */ la a0, handle_exception @@ -181,12 +192,6 @@ csrw CSR_SCRATCH, zero ret -.align 2 -.Lsecondary_park: - /* We lack SMP support or have too many harts, so park this hart */ - wfi - j .Lsecondary_park - SYM_CODE_END(_start) SYM_CODE_START(_start_kernel) @@ -300,6 +305,9 @@ #else mv a0, a1 #endif /* CONFIG_BUILTIN_DTB */ + /* Set trap vector to spin forever to help debug */ + la a3, .Lsecondary_park + csrw CSR_TVEC, a3 call setup_vm #ifdef CONFIG_MMU la a0, early_pg_dir --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/machine_kexec.c +++ linux-xilinx-6.8.0/arch/riscv/kernel/machine_kexec.c @@ -121,20 +121,12 @@ for_each_irq_desc(i, desc) { struct irq_chip *chip; - int ret; chip = irq_desc_get_chip(desc); if (!chip) continue; - /* - * First try to remove the active state. If this - * fails, try to EOI the interrupt. - */ - ret = irq_set_irqchip_state(i, IRQCHIP_STATE_ACTIVE, false); - - if (ret && irqd_irq_inprogress(&desc->irq_data) && - chip->irq_eoi) + if (chip->irq_eoi && irqd_irq_inprogress(&desc->irq_data)) chip->irq_eoi(&desc->irq_data); if (chip->irq_mask) --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/module.c +++ linux-xilinx-6.8.0/arch/riscv/kernel/module.c @@ -24,7 +24,7 @@ struct relocation_head { struct hlist_node node; - struct list_head *rel_entry; + struct list_head rel_entry; void *location; }; @@ -635,7 +635,7 @@ location = rel_head_iter->location; list_for_each_entry_safe(rel_entry_iter, rel_entry_iter_tmp, - rel_head_iter->rel_entry, + &rel_head_iter->rel_entry, head) { curr_type = rel_entry_iter->type; reloc_handlers[curr_type].reloc_handler( @@ -705,16 +705,7 @@ return -ENOMEM; } - rel_head->rel_entry = - kmalloc(sizeof(struct list_head), GFP_KERNEL); - - if (!rel_head->rel_entry) { - kfree(entry); - kfree(rel_head); - return -ENOMEM; - } - - INIT_LIST_HEAD(rel_head->rel_entry); + INIT_LIST_HEAD(&rel_head->rel_entry); rel_head->location = location; INIT_HLIST_NODE(&rel_head->node); if (!current_head->first) { @@ -723,7 +714,6 @@ if (!bucket) { kfree(entry); - kfree(rel_head->rel_entry); kfree(rel_head); return -ENOMEM; } @@ -736,7 +726,7 @@ } /* Add relocation to head of discovered rel_head */ - list_add_tail(&entry->head, rel_head->rel_entry); + list_add_tail(&entry->head, &rel_head->rel_entry); return 0; } --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/patch.c +++ linux-xilinx-6.8.0/arch/riscv/kernel/patch.c @@ -80,6 +80,8 @@ */ lockdep_assert_held(&text_mutex); + preempt_disable(); + if (across_pages) patch_map(addr + PAGE_SIZE, FIX_TEXT_POKE1); @@ -92,6 +94,8 @@ if (across_pages) patch_unmap(FIX_TEXT_POKE1); + preempt_enable(); + return 0; } NOKPROBE_SYMBOL(__patch_insn_set); @@ -122,6 +126,8 @@ if (!riscv_patch_in_stop_machine) lockdep_assert_held(&text_mutex); + preempt_disable(); + if (across_pages) patch_map(addr + PAGE_SIZE, FIX_TEXT_POKE1); @@ -134,6 +140,8 @@ if (across_pages) patch_unmap(FIX_TEXT_POKE1); + preempt_enable(); + return ret; } NOKPROBE_SYMBOL(__patch_insn_write); @@ -188,7 +196,7 @@ } NOKPROBE_SYMBOL(patch_text_set_nosync); -static int patch_insn_write(void *addr, const void *insn, size_t len) +int patch_insn_write(void *addr, const void *insn, size_t len) { size_t patched = 0; size_t size; @@ -232,16 +240,24 @@ if (atomic_inc_return(&patch->cpu_count) == num_online_cpus()) { for (i = 0; ret == 0 && i < patch->ninsns; i++) { len = GET_INSN_LENGTH(patch->insns[i]); - ret = patch_text_nosync(patch->addr + i * len, - &patch->insns[i], len); + ret = patch_insn_write(patch->addr + i * len, &patch->insns[i], len); } - atomic_inc(&patch->cpu_count); + /* + * Make sure the patching store is effective *before* we + * increment the counter which releases all waiting CPUs + * by using the release variant of atomic increment. The + * release pairs with the call to local_flush_icache_all() + * on the waiting CPU. + */ + atomic_inc_return_release(&patch->cpu_count); } else { while (atomic_read(&patch->cpu_count) <= num_online_cpus()) cpu_relax(); smp_mb(); } + local_flush_icache_all(); + return ret; } NOKPROBE_SYMBOL(patch_text_cb); --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/perf_callchain.c +++ linux-xilinx-6.8.0/arch/riscv/kernel/perf_callchain.c @@ -62,7 +62,7 @@ perf_callchain_store(entry, regs->epc); fp = user_backtrace(entry, fp, regs->ra); - while (fp && !(fp & 0x3) && entry->nr < entry->max_stack) + while (fp && !(fp & 0x7) && entry->nr < entry->max_stack) fp = user_backtrace(entry, fp, 0); } --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/probes/ftrace.c +++ linux-xilinx-6.8.0/arch/riscv/kernel/probes/ftrace.c @@ -11,6 +11,9 @@ struct kprobe_ctlblk *kcb; int bit; + if (unlikely(kprobe_ftrace_disabled)) + return; + bit = ftrace_test_recursion_trylock(ip, parent_ip); if (bit < 0) return; --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/probes/kprobes.c +++ linux-xilinx-6.8.0/arch/riscv/kernel/probes/kprobes.c @@ -28,9 +28,8 @@ p->ainsn.api.restore = (unsigned long)p->addr + offset; - patch_text(p->ainsn.api.insn, &p->opcode, 1); - patch_text((void *)((unsigned long)(p->ainsn.api.insn) + offset), - &insn, 1); + patch_text_nosync(p->ainsn.api.insn, &p->opcode, 1); + patch_text_nosync((void *)p->ainsn.api.insn + offset, &insn, 1); } static void __kprobes arch_prepare_simulate(struct kprobe *p) --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/process.c +++ linux-xilinx-6.8.0/arch/riscv/kernel/process.c @@ -27,8 +27,6 @@ #include #include -register unsigned long gp_in_global __asm__("gp"); - #if defined(CONFIG_STACKPROTECTOR) && !defined(CONFIG_STACKPROTECTOR_PER_TASK) #include unsigned long __stack_chk_guard __read_mostly; @@ -37,7 +35,7 @@ extern asmlinkage void ret_from_fork(void); -void arch_cpu_idle(void) +void noinstr arch_cpu_idle(void) { cpu_do_idle(); } @@ -207,7 +205,6 @@ if (unlikely(args->fn)) { /* Kernel thread */ memset(childregs, 0, sizeof(struct pt_regs)); - childregs->gp = gp_in_global; /* Supervisor/Machine, irqs on: */ childregs->status = SR_PP | SR_PIE; --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/riscv_ksyms.c +++ linux-xilinx-6.8.0/arch/riscv/kernel/riscv_ksyms.c @@ -12,9 +12,6 @@ EXPORT_SYMBOL(memset); EXPORT_SYMBOL(memcpy); EXPORT_SYMBOL(memmove); -EXPORT_SYMBOL(strcmp); -EXPORT_SYMBOL(strlen); -EXPORT_SYMBOL(strncmp); EXPORT_SYMBOL(__memset); EXPORT_SYMBOL(__memcpy); EXPORT_SYMBOL(__memmove); --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/sbi-ipi.c +++ linux-xilinx-6.8.0/arch/riscv/kernel/sbi-ipi.c @@ -68,7 +68,7 @@ * the masking/unmasking of virtual IPIs is done * via generic IPI-Mux */ - cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, + cpuhp_setup_state(CPUHP_AP_IRQ_RISCV_SBI_IPI_STARTING, "irqchip/sbi-ipi:starting", sbi_ipi_starting_cpu, NULL); --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/sbi.c +++ linux-xilinx-6.8.0/arch/riscv/kernel/sbi.c @@ -24,51 +24,6 @@ unsigned long start, unsigned long size, unsigned long arg4, unsigned long arg5) __ro_after_init; -struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0, - unsigned long arg1, unsigned long arg2, - unsigned long arg3, unsigned long arg4, - unsigned long arg5) -{ - struct sbiret ret; - - register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); - register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); - register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); - register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3); - register uintptr_t a4 asm ("a4") = (uintptr_t)(arg4); - register uintptr_t a5 asm ("a5") = (uintptr_t)(arg5); - register uintptr_t a6 asm ("a6") = (uintptr_t)(fid); - register uintptr_t a7 asm ("a7") = (uintptr_t)(ext); - asm volatile ("ecall" - : "+r" (a0), "+r" (a1) - : "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6), "r" (a7) - : "memory"); - ret.error = a0; - ret.value = a1; - - return ret; -} -EXPORT_SYMBOL(sbi_ecall); - -int sbi_err_map_linux_errno(int err) -{ - switch (err) { - case SBI_SUCCESS: - return 0; - case SBI_ERR_DENIED: - return -EPERM; - case SBI_ERR_INVALID_PARAM: - return -EINVAL; - case SBI_ERR_INVALID_ADDRESS: - return -EFAULT; - case SBI_ERR_NOT_SUPPORTED: - case SBI_ERR_FAILURE: - default: - return -ENOTSUPP; - }; -} -EXPORT_SYMBOL(sbi_err_map_linux_errno); - #ifdef CONFIG_RISCV_SBI_V01 static unsigned long __sbi_v01_cpumask_to_hartmask(const struct cpumask *cpu_mask) { @@ -528,17 +483,6 @@ } EXPORT_SYMBOL(sbi_probe_extension); -static long __sbi_base_ecall(int fid) -{ - struct sbiret ret; - - ret = sbi_ecall(SBI_EXT_BASE, fid, 0, 0, 0, 0, 0, 0); - if (!ret.error) - return ret.value; - else - return sbi_err_map_linux_errno(ret.error); -} - static inline long sbi_get_spec_version(void) { return __sbi_base_ecall(SBI_EXT_BASE_GET_SPEC_VERSION); --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/sbi_ecall.c +++ linux-xilinx-6.8.0/arch/riscv/kernel/sbi_ecall.c @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: GPL-2.0 +/* Copyright (c) 2024 Rivos Inc. */ + +#include +#define CREATE_TRACE_POINTS +#include + +long __sbi_base_ecall(int fid) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_BASE, fid, 0, 0, 0, 0, 0, 0); + if (!ret.error) + return ret.value; + else + return sbi_err_map_linux_errno(ret.error); +} +EXPORT_SYMBOL(__sbi_base_ecall); + +struct sbiret __sbi_ecall(unsigned long arg0, unsigned long arg1, + unsigned long arg2, unsigned long arg3, + unsigned long arg4, unsigned long arg5, + int fid, int ext) +{ + struct sbiret ret; + + trace_sbi_call(ext, fid); + + register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); + register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); + register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); + register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3); + register uintptr_t a4 asm ("a4") = (uintptr_t)(arg4); + register uintptr_t a5 asm ("a5") = (uintptr_t)(arg5); + register uintptr_t a6 asm ("a6") = (uintptr_t)(fid); + register uintptr_t a7 asm ("a7") = (uintptr_t)(ext); + asm volatile ("ecall" + : "+r" (a0), "+r" (a1) + : "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6), "r" (a7) + : "memory"); + ret.error = a0; + ret.value = a1; + + trace_sbi_return(ext, ret.error, ret.value); + + return ret; +} +EXPORT_SYMBOL(__sbi_ecall); --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/setup.c +++ linux-xilinx-6.8.0/arch/riscv/kernel/setup.c @@ -227,7 +227,7 @@ static void __init parse_dtb(void) { /* Early scan of device tree from init memory */ - if (early_init_dt_scan(dtb_early_va)) { + if (early_init_dt_scan(dtb_early_va, dtb_early_pa)) { const char *name = of_flat_dt_get_machine_name(); if (name) { --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/signal.c +++ linux-xilinx-6.8.0/arch/riscv/kernel/signal.c @@ -119,6 +119,13 @@ struct __sc_riscv_v_state __user *state = sc_vec; void __user *datap; + /* + * Mark the vstate as clean prior performing the actual copy, + * to avoid getting the vstate incorrectly clobbered by the + * discarded vector state. + */ + riscv_v_vstate_set_restore(current, regs); + /* Copy everything of __sc_riscv_v_state except datap. */ err = __copy_from_user(¤t->thread.vstate, &state->v_state, offsetof(struct __riscv_v_ext_state, datap)); @@ -133,13 +140,7 @@ * Copy the whole vector content from user space datap. Use * copy_from_user to prevent information leak. */ - err = copy_from_user(current->thread.vstate.datap, datap, riscv_v_vsize); - if (unlikely(err)) - return err; - - riscv_v_vstate_set_restore(current, regs); - - return err; + return copy_from_user(current->thread.vstate.datap, datap, riscv_v_vsize); } #else #define save_v_state(task, regs) (0) --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/smpboot.c +++ linux-xilinx-6.8.0/arch/riscv/kernel/smpboot.c @@ -26,7 +26,7 @@ #include #include -#include +#include #include #include #include @@ -219,6 +219,15 @@ struct mm_struct *mm = &init_mm; unsigned int curr_cpuid = smp_processor_id(); + if (has_vector()) { + /* + * Return as early as possible so the hart with a mismatching + * vlen won't boot. + */ + if (riscv_v_setup_vsize()) + return; + } + /* All kernel threads share the same mm context. */ mmgrab(mm); current->active_mm = mm; @@ -231,17 +240,13 @@ numa_add_cpu(curr_cpuid); set_cpu_online(curr_cpuid, 1); - if (has_vector()) { - if (riscv_v_setup_vsize()) - elf_hwcap &= ~COMPAT_HWCAP_ISA_V; - } - riscv_user_isa_enable(); /* - * Remote TLB flushes are ignored while the CPU is offline, so emit - * a local TLB flush right now just in case. + * Remote cache and TLB flushes are ignored while the CPU is offline, + * so flush them both right now just in case. */ + local_flush_icache_all(); local_flush_tlb_all(); complete(&cpu_running); /* --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/stacktrace.c +++ linux-xilinx-6.8.0/arch/riscv/kernel/stacktrace.c @@ -18,10 +18,21 @@ extern asmlinkage void ret_from_exception(void); +static inline int fp_is_valid(unsigned long fp, unsigned long sp) +{ + unsigned long low, high; + + low = sp + sizeof(struct stackframe); + high = ALIGN(sp, THREAD_SIZE); + + return !(fp < low || fp > high || fp & 0x07); +} + void notrace walk_stackframe(struct task_struct *task, struct pt_regs *regs, bool (*fn)(void *, unsigned long), void *arg) { unsigned long fp, sp, pc; + int graph_idx = 0; int level = 0; if (regs) { @@ -41,26 +52,24 @@ } for (;;) { - unsigned long low, high; struct stackframe *frame; if (unlikely(!__kernel_text_address(pc) || (level++ >= 0 && !fn(arg, pc)))) break; - /* Validate frame pointer */ - low = sp + sizeof(struct stackframe); - high = ALIGN(sp, THREAD_SIZE); - if (unlikely(fp < low || fp > high || fp & 0x7)) + if (unlikely(!fp_is_valid(fp, sp))) break; + /* Unwind stack frame */ frame = (struct stackframe *)fp - 1; sp = fp; - if (regs && (regs->epc == pc) && (frame->fp & 0x7)) { + if (regs && (regs->epc == pc) && fp_is_valid(frame->ra, sp)) { + /* We hit function where ra is not saved on the stack */ fp = frame->ra; pc = regs->ra; } else { fp = frame->fp; - pc = ftrace_graph_ret_addr(current, NULL, frame->ra, + pc = ftrace_graph_ret_addr(current, &graph_idx, frame->ra, &frame->ra); if (pc == (unsigned long)ret_from_exception) { if (unlikely(!__kernel_text_address(pc) || !fn(arg, pc))) @@ -148,7 +157,7 @@ return pc; } -noinline void arch_stack_walk(stack_trace_consume_fn consume_entry, void *cookie, +noinline noinstr void arch_stack_walk(stack_trace_consume_fn consume_entry, void *cookie, struct task_struct *task, struct pt_regs *regs) { walk_stackframe(task, regs, consume_entry, cookie); --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/traps.c +++ linux-xilinx-6.8.0/arch/riscv/kernel/traps.c @@ -34,7 +34,7 @@ int show_unhandled_signals = 1; -static DEFINE_SPINLOCK(die_lock); +static DEFINE_RAW_SPINLOCK(die_lock); static int copy_code(struct pt_regs *regs, u16 *val, const u16 *insns) { @@ -80,7 +80,7 @@ oops_enter(); - spin_lock_irqsave(&die_lock, flags); + raw_spin_lock_irqsave(&die_lock, flags); console_verbose(); bust_spinlocks(1); @@ -99,7 +99,7 @@ bust_spinlocks(0); add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE); - spin_unlock_irqrestore(&die_lock, flags); + raw_spin_unlock_irqrestore(&die_lock, flags); oops_exit(); if (in_interrupt()) @@ -121,7 +121,7 @@ print_vma_addr(KERN_CONT " in ", instruction_pointer(regs)); pr_cont("\n"); __show_regs(regs); - dump_instr(KERN_EMERG, regs); + dump_instr(KERN_INFO, regs); } force_sig_fault(signo, code, (void __user *)addr); @@ -317,6 +317,7 @@ regs->epc += 4; regs->orig_a0 = regs->a0; + regs->a0 = -ENOSYS; riscv_v_vstate_discard(regs); @@ -324,8 +325,6 @@ if (syscall >= 0 && syscall < NR_syscalls) syscall_handler(regs, syscall); - else if (syscall != -1) - regs->a0 = -ENOSYS; syscall_exit_to_user_mode(regs); } else { --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/traps_misaligned.c +++ linux-xilinx-6.8.0/arch/riscv/kernel/traps_misaligned.c @@ -136,8 +136,6 @@ #define REG_PTR(insn, pos, regs) \ (ulong *)((ulong)(regs) + REG_OFFSET(insn, pos)) -#define GET_RM(insn) (((insn) >> 12) & 7) - #define GET_RS1(insn, regs) (*REG_PTR(insn, SH_RS1, regs)) #define GET_RS2(insn, regs) (*REG_PTR(insn, SH_RS2, regs)) #define GET_RS1S(insn, regs) (*REG_PTR(RVC_RS1S(insn), 0, regs)) @@ -264,86 +262,14 @@ #define GET_F32_RS2C(insn, regs) (get_f32_rs(insn, 2, regs)) #define GET_F32_RS2S(insn, regs) (get_f32_rs(RVC_RS2S(insn), 0, regs)) -#ifdef CONFIG_RISCV_M_MODE -static inline int load_u8(struct pt_regs *regs, const u8 *addr, u8 *r_val) -{ - u8 val; - - asm volatile("lbu %0, %1" : "=&r" (val) : "m" (*addr)); - *r_val = val; - - return 0; -} - -static inline int store_u8(struct pt_regs *regs, u8 *addr, u8 val) -{ - asm volatile ("sb %0, %1\n" : : "r" (val), "m" (*addr)); - - return 0; -} - -static inline int get_insn(struct pt_regs *regs, ulong mepc, ulong *r_insn) -{ - register ulong __mepc asm ("a2") = mepc; - ulong val, rvc_mask = 3, tmp; - - asm ("and %[tmp], %[addr], 2\n" - "bnez %[tmp], 1f\n" -#if defined(CONFIG_64BIT) - __stringify(LWU) " %[insn], (%[addr])\n" -#else - __stringify(LW) " %[insn], (%[addr])\n" -#endif - "and %[tmp], %[insn], %[rvc_mask]\n" - "beq %[tmp], %[rvc_mask], 2f\n" - "sll %[insn], %[insn], %[xlen_minus_16]\n" - "srl %[insn], %[insn], %[xlen_minus_16]\n" - "j 2f\n" - "1:\n" - "lhu %[insn], (%[addr])\n" - "and %[tmp], %[insn], %[rvc_mask]\n" - "bne %[tmp], %[rvc_mask], 2f\n" - "lhu %[tmp], 2(%[addr])\n" - "sll %[tmp], %[tmp], 16\n" - "add %[insn], %[insn], %[tmp]\n" - "2:" - : [insn] "=&r" (val), [tmp] "=&r" (tmp) - : [addr] "r" (__mepc), [rvc_mask] "r" (rvc_mask), - [xlen_minus_16] "i" (XLEN_MINUS_16)); - - *r_insn = val; - - return 0; -} -#else -static inline int load_u8(struct pt_regs *regs, const u8 *addr, u8 *r_val) -{ - if (user_mode(regs)) { - return __get_user(*r_val, (u8 __user *)addr); - } else { - *r_val = *addr; - return 0; - } -} - -static inline int store_u8(struct pt_regs *regs, u8 *addr, u8 val) -{ - if (user_mode(regs)) { - return __put_user(val, (u8 __user *)addr); - } else { - *addr = val; - return 0; - } -} - -#define __read_insn(regs, insn, insn_addr) \ +#define __read_insn(regs, insn, insn_addr, type) \ ({ \ int __ret; \ \ if (user_mode(regs)) { \ - __ret = __get_user(insn, insn_addr); \ + __ret = __get_user(insn, (type __user *) insn_addr); \ } else { \ - insn = *(__force u16 *)insn_addr; \ + insn = *(type *)insn_addr; \ __ret = 0; \ } \ \ @@ -356,9 +282,8 @@ if (epc & 0x2) { ulong tmp = 0; - u16 __user *insn_addr = (u16 __user *)epc; - if (__read_insn(regs, insn, insn_addr)) + if (__read_insn(regs, insn, epc, u16)) return -EFAULT; /* __get_user() uses regular "lw" which sign extend the loaded * value make sure to clear higher order bits in case we "or" it @@ -369,16 +294,14 @@ *r_insn = insn; return 0; } - insn_addr++; - if (__read_insn(regs, tmp, insn_addr)) + epc += sizeof(u16); + if (__read_insn(regs, tmp, epc, u16)) return -EFAULT; *r_insn = (tmp << 16) | insn; return 0; } else { - u32 __user *insn_addr = (u32 __user *)epc; - - if (__read_insn(regs, insn, insn_addr)) + if (__read_insn(regs, insn, epc, u32)) return -EFAULT; if ((insn & __INSN_LENGTH_MASK) == __INSN_LENGTH_32) { *r_insn = insn; @@ -390,7 +313,6 @@ return 0; } } -#endif union reg_data { u8 data_bytes[8]; @@ -409,7 +331,7 @@ unsigned long epc = regs->epc; unsigned long insn; unsigned long addr = regs->badaddr; - int i, fp = 0, shift = 0, len = 0; + int fp = 0, shift = 0, len = 0; perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, addr); @@ -490,9 +412,11 @@ return -EOPNOTSUPP; val.data_u64 = 0; - for (i = 0; i < len; i++) { - if (load_u8(regs, (void *)(addr + i), &val.data_bytes[i])) + if (user_mode(regs)) { + if (copy_from_user(&val, (u8 __user *)addr, len)) return -1; + } else { + memcpy(&val, (u8 *)addr, len); } if (!fp) @@ -513,7 +437,7 @@ unsigned long epc = regs->epc; unsigned long insn; unsigned long addr = regs->badaddr; - int i, len = 0, fp = 0; + int len = 0, fp = 0; perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, addr); @@ -586,9 +510,11 @@ if (!IS_ENABLED(CONFIG_FPU) && fp) return -EOPNOTSUPP; - for (i = 0; i < len; i++) { - if (store_u8(regs, (void *)(addr + i), val.data_bytes[i])) + if (user_mode(regs)) { + if (copy_to_user((u8 __user *)addr, &val, len)) return -1; + } else { + memcpy((u8 *)addr, &val, len); } regs->epc = epc + INSN_LEN(insn); @@ -632,7 +558,7 @@ * accesses emulated since tasks requesting such control can run on any * CPU. */ - for_each_present_cpu(cpu) { + for_each_online_cpu(cpu) { if (per_cpu(misaligned_access_speed, cpu) != RISCV_HWPROBE_MISALIGNED_EMULATED) { return; --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/vdso/Makefile +++ linux-xilinx-6.8.0/arch/riscv/kernel/vdso/Makefile @@ -18,6 +18,7 @@ ccflags-y := -fno-stack-protector ccflags-y += -DDISABLE_BRANCH_PROFILING +ccflags-y += -fno-builtin ifneq ($(c-gettimeofday-y),) CFLAGS_vgettimeofday.o += -fPIC -include $(c-gettimeofday-y) @@ -37,6 +38,7 @@ # Disable -pg to prevent insert call site CFLAGS_REMOVE_vgettimeofday.o = $(CC_FLAGS_FTRACE) $(CC_FLAGS_SCS) +CFLAGS_REMOVE_hwprobe.o = $(CC_FLAGS_FTRACE) $(CC_FLAGS_SCS) # Disable profiling and instrumentation for VDSO code GCOV_PROFILE := n --- linux-xilinx-6.8.0.orig/arch/riscv/kernel/vector.c +++ linux-xilinx-6.8.0/arch/riscv/kernel/vector.c @@ -306,7 +306,7 @@ static int __init riscv_v_sysctl_init(void) { return 0; } #endif /* ! CONFIG_SYSCTL */ -static int riscv_v_init(void) +static int __init riscv_v_init(void) { return riscv_v_sysctl_init(); } --- linux-xilinx-6.8.0.orig/arch/riscv/kvm/aia_aplic.c +++ linux-xilinx-6.8.0/arch/riscv/kvm/aia_aplic.c @@ -137,11 +137,22 @@ raw_spin_lock_irqsave(&irqd->lock, flags); sm = irqd->sourcecfg & APLIC_SOURCECFG_SM_MASK; - if (!pending && - ((sm == APLIC_SOURCECFG_SM_LEVEL_HIGH) || - (sm == APLIC_SOURCECFG_SM_LEVEL_LOW))) + if (sm == APLIC_SOURCECFG_SM_INACTIVE) goto skip_write_pending; + if (sm == APLIC_SOURCECFG_SM_LEVEL_HIGH || + sm == APLIC_SOURCECFG_SM_LEVEL_LOW) { + if (!pending) + goto noskip_write_pending; + if ((irqd->state & APLIC_IRQ_STATE_INPUT) && + sm == APLIC_SOURCECFG_SM_LEVEL_LOW) + goto skip_write_pending; + if (!(irqd->state & APLIC_IRQ_STATE_INPUT) && + sm == APLIC_SOURCECFG_SM_LEVEL_HIGH) + goto skip_write_pending; + } + +noskip_write_pending: if (pending) irqd->state |= APLIC_IRQ_STATE_PENDING; else @@ -187,16 +198,31 @@ static bool aplic_read_input(struct aplic *aplic, u32 irq) { - bool ret; - unsigned long flags; + u32 sourcecfg, sm, raw_input, irq_inverted; struct aplic_irq *irqd; + unsigned long flags; + bool ret = false; if (!irq || aplic->nr_irqs <= irq) return false; irqd = &aplic->irqs[irq]; raw_spin_lock_irqsave(&irqd->lock, flags); - ret = (irqd->state & APLIC_IRQ_STATE_INPUT) ? true : false; + + sourcecfg = irqd->sourcecfg; + if (sourcecfg & APLIC_SOURCECFG_D) + goto skip; + + sm = sourcecfg & APLIC_SOURCECFG_SM_MASK; + if (sm == APLIC_SOURCECFG_SM_INACTIVE) + goto skip; + + raw_input = (irqd->state & APLIC_IRQ_STATE_INPUT) ? 1 : 0; + irq_inverted = (sm == APLIC_SOURCECFG_SM_LEVEL_LOW || + sm == APLIC_SOURCECFG_SM_EDGE_FALL) ? 1 : 0; + ret = !!(raw_input ^ irq_inverted); + +skip: raw_spin_unlock_irqrestore(&irqd->lock, flags); return ret; --- linux-xilinx-6.8.0.orig/arch/riscv/kvm/aia_device.c +++ linux-xilinx-6.8.0/arch/riscv/kvm/aia_device.c @@ -237,10 +237,11 @@ static u32 aia_imsic_hart_index(struct kvm_aia *aia, gpa_t addr) { - u32 hart, group = 0; + u32 hart = 0, group = 0; - hart = (addr >> (aia->nr_guest_bits + IMSIC_MMIO_PAGE_SHIFT)) & - GENMASK_ULL(aia->nr_hart_bits - 1, 0); + if (aia->nr_hart_bits) + hart = (addr >> (aia->nr_guest_bits + IMSIC_MMIO_PAGE_SHIFT)) & + GENMASK_ULL(aia->nr_hart_bits - 1, 0); if (aia->nr_group_bits) group = (addr >> aia->nr_group_shift) & GENMASK_ULL(aia->nr_group_bits - 1, 0); --- linux-xilinx-6.8.0.orig/arch/riscv/kvm/aia_imsic.c +++ linux-xilinx-6.8.0/arch/riscv/kvm/aia_imsic.c @@ -55,7 +55,7 @@ /* IMSIC SW-file */ struct imsic_mrif *swfile; phys_addr_t swfile_pa; - spinlock_t swfile_extirq_lock; + raw_spinlock_t swfile_extirq_lock; }; #define imsic_vs_csr_read(__c) \ @@ -622,7 +622,7 @@ * interruptions between reading topei and updating pending status. */ - spin_lock_irqsave(&imsic->swfile_extirq_lock, flags); + raw_spin_lock_irqsave(&imsic->swfile_extirq_lock, flags); if (imsic_mrif_atomic_read(mrif, &mrif->eidelivery) && imsic_mrif_topei(mrif, imsic->nr_eix, imsic->nr_msis)) @@ -630,7 +630,7 @@ else kvm_riscv_vcpu_unset_interrupt(vcpu, IRQ_VS_EXT); - spin_unlock_irqrestore(&imsic->swfile_extirq_lock, flags); + raw_spin_unlock_irqrestore(&imsic->swfile_extirq_lock, flags); } static void imsic_swfile_read(struct kvm_vcpu *vcpu, bool clear, @@ -1051,7 +1051,7 @@ } imsic->swfile = page_to_virt(swfile_page); imsic->swfile_pa = page_to_phys(swfile_page); - spin_lock_init(&imsic->swfile_extirq_lock); + raw_spin_lock_init(&imsic->swfile_extirq_lock); /* Setup IO device */ kvm_iodevice_init(&imsic->iodev, &imsic_iodoev_ops); --- linux-xilinx-6.8.0.orig/arch/riscv/kvm/vcpu.c +++ linux-xilinx-6.8.0/arch/riscv/kvm/vcpu.c @@ -711,7 +711,7 @@ return ret; } - if (run->immediate_exit) { + if (!vcpu->wants_to_run) { kvm_vcpu_srcu_read_unlock(vcpu); return -EINTR; } --- linux-xilinx-6.8.0.orig/arch/riscv/kvm/vcpu_insn.c +++ linux-xilinx-6.8.0/arch/riscv/kvm/vcpu_insn.c @@ -7,6 +7,8 @@ #include #include +#include + #define INSN_OPCODE_MASK 0x007c #define INSN_OPCODE_SHIFT 2 #define INSN_OPCODE_SYSTEM 28 @@ -213,9 +215,20 @@ unsigned long wr_mask); }; +static int seed_csr_rmw(struct kvm_vcpu *vcpu, unsigned int csr_num, + unsigned long *val, unsigned long new_val, + unsigned long wr_mask) +{ + if (!riscv_isa_extension_available(vcpu->arch.isa, ZKR)) + return KVM_INSN_ILLEGAL_TRAP; + + return KVM_INSN_EXIT_TO_USER_SPACE; +} + static const struct csr_func csr_funcs[] = { KVM_RISCV_VCPU_AIA_CSR_FUNCS KVM_RISCV_VCPU_HPMCOUNTER_CSR_FUNCS + { .base = CSR_SEED, .count = 1, .func = seed_csr_rmw }, }; /** --- linux-xilinx-6.8.0.orig/arch/riscv/kvm/vcpu_onereg.c +++ linux-xilinx-6.8.0/arch/riscv/kvm/vcpu_onereg.c @@ -714,9 +714,9 @@ switch (reg_subtype) { case KVM_REG_RISCV_ISA_SINGLE: return riscv_vcpu_set_isa_ext_single(vcpu, reg_num, reg_val); - case KVM_REG_RISCV_SBI_MULTI_EN: + case KVM_REG_RISCV_ISA_MULTI_EN: return riscv_vcpu_set_isa_ext_multi(vcpu, reg_num, reg_val, true); - case KVM_REG_RISCV_SBI_MULTI_DIS: + case KVM_REG_RISCV_ISA_MULTI_DIS: return riscv_vcpu_set_isa_ext_multi(vcpu, reg_num, reg_val, false); default: return -ENOENT; --- linux-xilinx-6.8.0.orig/arch/riscv/kvm/vcpu_pmu.c +++ linux-xilinx-6.8.0/arch/riscv/kvm/vcpu_pmu.c @@ -39,7 +39,7 @@ u64 sample_period; if (!pmc->counter_val) - sample_period = counter_val_mask + 1; + sample_period = counter_val_mask; else sample_period = (-pmc->counter_val) & counter_val_mask; --- linux-xilinx-6.8.0.orig/arch/riscv/kvm/vcpu_sbi.c +++ linux-xilinx-6.8.0/arch/riscv/kvm/vcpu_sbi.c @@ -127,8 +127,8 @@ run->riscv_sbi.args[3] = cp->a3; run->riscv_sbi.args[4] = cp->a4; run->riscv_sbi.args[5] = cp->a5; - run->riscv_sbi.ret[0] = cp->a0; - run->riscv_sbi.ret[1] = cp->a1; + run->riscv_sbi.ret[0] = SBI_ERR_NOT_SUPPORTED; + run->riscv_sbi.ret[1] = 0; } void kvm_riscv_vcpu_sbi_system_reset(struct kvm_vcpu *vcpu, @@ -483,19 +483,22 @@ struct kvm_vcpu_sbi_context *scontext = &vcpu->arch.sbi_context; const struct kvm_riscv_sbi_extension_entry *entry; const struct kvm_vcpu_sbi_extension *ext; - int i; + int idx, i; for (i = 0; i < ARRAY_SIZE(sbi_ext); i++) { entry = &sbi_ext[i]; ext = entry->ext_ptr; + idx = entry->ext_idx; + + if (idx < 0 || idx >= ARRAY_SIZE(scontext->ext_status)) + continue; if (ext->probe && !ext->probe(vcpu)) { - scontext->ext_status[entry->ext_idx] = - KVM_RISCV_SBI_EXT_STATUS_UNAVAILABLE; + scontext->ext_status[idx] = KVM_RISCV_SBI_EXT_STATUS_UNAVAILABLE; continue; } - scontext->ext_status[entry->ext_idx] = ext->default_disabled ? + scontext->ext_status[idx] = ext->default_disabled ? KVM_RISCV_SBI_EXT_STATUS_DISABLED : KVM_RISCV_SBI_EXT_STATUS_ENABLED; } --- linux-xilinx-6.8.0.orig/arch/riscv/lib/Makefile +++ linux-xilinx-6.8.0/arch/riscv/lib/Makefile @@ -3,9 +3,11 @@ lib-y += memcpy.o lib-y += memset.o lib-y += memmove.o +ifeq ($(CONFIG_KASAN_GENERIC)$(CONFIG_KASAN_SW_TAGS),) lib-y += strcmp.o lib-y += strlen.o lib-y += strncmp.o +endif lib-y += csum.o ifeq ($(CONFIG_MMU), y) lib-$(CONFIG_RISCV_ISA_V) += uaccess_vector.o --- linux-xilinx-6.8.0.orig/arch/riscv/lib/strcmp.S +++ linux-xilinx-6.8.0/arch/riscv/lib/strcmp.S @@ -120,3 +120,4 @@ .option pop #endif SYM_FUNC_END(strcmp) +EXPORT_SYMBOL(strcmp) --- linux-xilinx-6.8.0.orig/arch/riscv/lib/strlen.S +++ linux-xilinx-6.8.0/arch/riscv/lib/strlen.S @@ -131,3 +131,4 @@ #endif SYM_FUNC_END(strlen) SYM_FUNC_ALIAS(__pi_strlen, strlen) +EXPORT_SYMBOL(strlen) --- linux-xilinx-6.8.0.orig/arch/riscv/lib/strncmp.S +++ linux-xilinx-6.8.0/arch/riscv/lib/strncmp.S @@ -136,3 +136,4 @@ .option pop #endif SYM_FUNC_END(strncmp) +EXPORT_SYMBOL(strncmp) --- linux-xilinx-6.8.0.orig/arch/riscv/mm/context.c +++ linux-xilinx-6.8.0/arch/riscv/mm/context.c @@ -323,6 +323,8 @@ if (unlikely(prev == next)) return; + membarrier_arch_switch_mm(prev, next, task); + /* * Mark the current MM context as inactive, and the next as * active. This is at least used by the icache flushing --- linux-xilinx-6.8.0.orig/arch/riscv/mm/fault.c +++ linux-xilinx-6.8.0/arch/riscv/mm/fault.c @@ -61,26 +61,27 @@ static inline void mm_fault_error(struct pt_regs *regs, unsigned long addr, vm_fault_t fault) { + if (!user_mode(regs)) { + no_context(regs, addr); + return; + } + if (fault & VM_FAULT_OOM) { /* * We ran out of memory, call the OOM killer, and return the userspace * (which will retry the fault, or kill us if we got oom-killed). */ - if (!user_mode(regs)) { - no_context(regs, addr); - return; - } pagefault_out_of_memory(); return; } else if (fault & (VM_FAULT_SIGBUS | VM_FAULT_HWPOISON | VM_FAULT_HWPOISON_LARGE)) { /* Kernel mode? Handle exceptions or die */ - if (!user_mode(regs)) { - no_context(regs, addr); - return; - } do_trap(regs, SIGBUS, BUS_ADRERR, addr); return; + } else if (fault & VM_FAULT_SIGSEGV) { + do_trap(regs, SIGSEGV, SEGV_MAPERR, addr); + return; } + BUG(); } --- linux-xilinx-6.8.0.orig/arch/riscv/mm/init.c +++ linux-xilinx-6.8.0/arch/riscv/mm/init.c @@ -32,6 +32,7 @@ #include #include #include +#include #include #include "../kernel/head.h" @@ -59,6 +60,13 @@ phys_addr_t phys_ram_base __ro_after_init; EXPORT_SYMBOL(phys_ram_base); +#ifdef CONFIG_SPARSEMEM_VMEMMAP +#define VMEMMAP_ADDR_ALIGN (1ULL << SECTION_SIZE_BITS) + +unsigned long vmemmap_start_pfn __ro_after_init; +EXPORT_SYMBOL(vmemmap_start_pfn); +#endif + unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] __page_aligned_bss; EXPORT_SYMBOL(empty_zero_page); @@ -219,37 +227,51 @@ */ memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start); - phys_ram_end = memblock_end_of_DRAM(); - /* * Make sure we align the start of the memory on a PMD boundary so that * at worst, we map the linear mapping with PMD mappings. */ - if (!IS_ENABLED(CONFIG_XIP_KERNEL)) + if (!IS_ENABLED(CONFIG_XIP_KERNEL)) { phys_ram_base = memblock_start_of_DRAM() & PMD_MASK; +#ifdef CONFIG_SPARSEMEM_VMEMMAP + vmemmap_start_pfn = round_down(phys_ram_base, VMEMMAP_ADDR_ALIGN) >> PAGE_SHIFT; +#endif + } /* * In 64-bit, any use of __va/__pa before this point is wrong as we * did not know the start of DRAM before. */ - if (IS_ENABLED(CONFIG_64BIT)) + if (IS_ENABLED(CONFIG_64BIT) && IS_ENABLED(CONFIG_MMU)) kernel_map.va_pa_offset = PAGE_OFFSET - phys_ram_base; /* - * memblock allocator is not aware of the fact that last 4K bytes of - * the addressable memory can not be mapped because of IS_ERR_VALUE - * macro. Make sure that last 4k bytes are not usable by memblock - * if end of dram is equal to maximum addressable memory. For 64-bit - * kernel, this problem can't happen here as the end of the virtual - * address space is occupied by the kernel mapping then this check must - * be done as soon as the kernel mapping base address is determined. + * The size of the linear page mapping may restrict the amount of + * usable RAM. + */ + if (IS_ENABLED(CONFIG_64BIT) && IS_ENABLED(CONFIG_MMU)) { + max_mapped_addr = __pa(PAGE_OFFSET) + KERN_VIRT_SIZE; + memblock_cap_memory_range(phys_ram_base, + max_mapped_addr - phys_ram_base); + } + + /* + * Reserve physical address space that would be mapped to virtual + * addresses greater than (void *)(-PAGE_SIZE) because: + * - This memory would overlap with ERR_PTR + * - This memory belongs to high memory, which is not supported + * + * This is not applicable to 64-bit kernel, because virtual addresses + * after (void *)(-PAGE_SIZE) are not linearly mapped: they are + * occupied by kernel mapping. Also it is unrealistic for high memory + * to exist on 64-bit platforms. */ if (!IS_ENABLED(CONFIG_64BIT)) { - max_mapped_addr = __pa(~(ulong)0); - if (max_mapped_addr == (phys_ram_end - 1)) - memblock_set_current_limit(max_mapped_addr - 4096); + max_mapped_addr = __va_to_pa_nodebug(-PAGE_SIZE); + memblock_reserve(max_mapped_addr, (phys_addr_t)-max_mapped_addr); } + phys_ram_end = memblock_end_of_DRAM(); min_low_pfn = PFN_UP(phys_ram_base); max_low_pfn = max_pfn = PFN_DOWN(phys_ram_end); high_memory = (void *)(__va(PFN_PHYS(max_low_pfn))); @@ -669,6 +691,9 @@ static uintptr_t __init best_map_size(phys_addr_t pa, uintptr_t va, phys_addr_t size) { + if (debug_pagealloc_enabled()) + return PAGE_SIZE; + if (pgtable_l5_enabled && !(pa & (P4D_SIZE - 1)) && !(va & (P4D_SIZE - 1)) && size >= P4D_SIZE) return P4D_SIZE; @@ -824,6 +849,10 @@ disable_pgtable_l4(); } + /* UBUNTU: Force disable sv57 and fallback to sv48 */ + if (pgtable_l5_enabled) + disable_pgtable_l5(); + memset(early_pg_dir, 0, PAGE_SIZE); memset(early_p4d, 0, PAGE_SIZE); memset(early_pud, 0, PAGE_SIZE); @@ -901,7 +930,7 @@ PMD_SIZE, PAGE_KERNEL_EXEC); /* Map the data in RAM */ - end_va = kernel_map.virt_addr + XIP_OFFSET + kernel_map.size; + end_va = kernel_map.virt_addr + kernel_map.size; for (va = kernel_map.virt_addr + XIP_OFFSET; va < end_va; va += PMD_SIZE) create_pgd_mapping(pgdir, va, kernel_map.phys_addr + (va - (kernel_map.virt_addr + XIP_OFFSET)), @@ -1069,8 +1098,11 @@ kernel_map.xiprom_sz = (uintptr_t)(&_exiprom) - (uintptr_t)(&_xiprom); phys_ram_base = CONFIG_PHYS_RAM_BASE; +#ifdef CONFIG_SPARSEMEM_VMEMMAP + vmemmap_start_pfn = round_down(phys_ram_base, VMEMMAP_ADDR_ALIGN) >> PAGE_SHIFT; +#endif kernel_map.phys_addr = (uintptr_t)CONFIG_PHYS_RAM_BASE; - kernel_map.size = (uintptr_t)(&_end) - (uintptr_t)(&_sdata); + kernel_map.size = (uintptr_t)(&_end) - (uintptr_t)(&_start); kernel_map.va_kernel_xip_pa_offset = kernel_map.virt_addr - kernel_map.xiprom; #else @@ -1267,8 +1299,6 @@ if (start <= __pa(PAGE_OFFSET) && __pa(PAGE_OFFSET) < end) start = __pa(PAGE_OFFSET); - if (end >= __pa(PAGE_OFFSET) + memory_limit) - end = __pa(PAGE_OFFSET) + memory_limit; create_linear_mapping_range(start, end, 0); } --- linux-xilinx-6.8.0.orig/arch/riscv/mm/pageattr.c +++ linux-xilinx-6.8.0/arch/riscv/mm/pageattr.c @@ -387,17 +387,33 @@ } #ifdef CONFIG_DEBUG_PAGEALLOC +static int debug_pagealloc_set_page(pte_t *pte, unsigned long addr, void *data) +{ + int enable = *(int *)data; + + unsigned long val = pte_val(ptep_get(pte)); + + if (enable) + val |= _PAGE_PRESENT; + else + val &= ~_PAGE_PRESENT; + + set_pte(pte, __pte(val)); + + return 0; +} + void __kernel_map_pages(struct page *page, int numpages, int enable) { if (!debug_pagealloc_enabled()) return; - if (enable) - __set_memory((unsigned long)page_address(page), numpages, - __pgprot(_PAGE_PRESENT), __pgprot(0)); - else - __set_memory((unsigned long)page_address(page), numpages, - __pgprot(0), __pgprot(_PAGE_PRESENT)); + unsigned long start = (unsigned long)page_address(page); + unsigned long size = PAGE_SIZE * numpages; + + apply_to_existing_page_range(&init_mm, start, size, debug_pagealloc_set_page, &enable); + + flush_tlb_kernel_range(start, start + size); } #endif --- linux-xilinx-6.8.0.orig/arch/riscv/mm/tlbflush.c +++ linux-xilinx-6.8.0/arch/riscv/mm/tlbflush.c @@ -7,29 +7,6 @@ #include #include -static inline void local_flush_tlb_all_asid(unsigned long asid) -{ - if (asid != FLUSH_TLB_NO_ASID) - __asm__ __volatile__ ("sfence.vma x0, %0" - : - : "r" (asid) - : "memory"); - else - local_flush_tlb_all(); -} - -static inline void local_flush_tlb_page_asid(unsigned long addr, - unsigned long asid) -{ - if (asid != FLUSH_TLB_NO_ASID) - __asm__ __volatile__ ("sfence.vma %0, %1" - : - : "r" (addr), "r" (asid) - : "memory"); - else - local_flush_tlb_page(addr); -} - /* * Flush entire TLB if number of entries to be flushed is greater * than the threshold below. @@ -99,7 +76,7 @@ local_flush_tlb_range_asid(d->start, d->size, d->stride, d->asid); } -static void __flush_tlb_range(struct cpumask *cmask, unsigned long asid, +static void __flush_tlb_range(const struct cpumask *cmask, unsigned long asid, unsigned long start, unsigned long size, unsigned long stride) { @@ -200,7 +177,7 @@ void flush_tlb_kernel_range(unsigned long start, unsigned long end) { - __flush_tlb_range((struct cpumask *)cpu_online_mask, FLUSH_TLB_NO_ASID, + __flush_tlb_range(cpu_online_mask, FLUSH_TLB_NO_ASID, start, end - start, PAGE_SIZE); } --- linux-xilinx-6.8.0.orig/arch/riscv/net/bpf_jit_comp64.c +++ linux-xilinx-6.8.0/arch/riscv/net/bpf_jit_comp64.c @@ -14,6 +14,8 @@ #include "bpf_jit.h" #define RV_FENTRY_NINSNS 2 +/* imm that allows emit_imm to emit max count insns */ +#define RV_MAX_COUNT_IMM 0x7FFF7FF7FF7FF7FF #define RV_REG_TCC RV_REG_A6 #define RV_REG_TCC_SAVED RV_REG_S6 /* Store A6 in S6 if program do calls */ @@ -516,33 +518,33 @@ break; /* src_reg = atomic_fetch_(dst_reg + off16, src_reg) */ case BPF_ADD | BPF_FETCH: - emit(is64 ? rv_amoadd_d(rs, rs, rd, 0, 0) : - rv_amoadd_w(rs, rs, rd, 0, 0), ctx); + emit(is64 ? rv_amoadd_d(rs, rs, rd, 1, 1) : + rv_amoadd_w(rs, rs, rd, 1, 1), ctx); if (!is64) emit_zext_32(rs, ctx); break; case BPF_AND | BPF_FETCH: - emit(is64 ? rv_amoand_d(rs, rs, rd, 0, 0) : - rv_amoand_w(rs, rs, rd, 0, 0), ctx); + emit(is64 ? rv_amoand_d(rs, rs, rd, 1, 1) : + rv_amoand_w(rs, rs, rd, 1, 1), ctx); if (!is64) emit_zext_32(rs, ctx); break; case BPF_OR | BPF_FETCH: - emit(is64 ? rv_amoor_d(rs, rs, rd, 0, 0) : - rv_amoor_w(rs, rs, rd, 0, 0), ctx); + emit(is64 ? rv_amoor_d(rs, rs, rd, 1, 1) : + rv_amoor_w(rs, rs, rd, 1, 1), ctx); if (!is64) emit_zext_32(rs, ctx); break; case BPF_XOR | BPF_FETCH: - emit(is64 ? rv_amoxor_d(rs, rs, rd, 0, 0) : - rv_amoxor_w(rs, rs, rd, 0, 0), ctx); + emit(is64 ? rv_amoxor_d(rs, rs, rd, 1, 1) : + rv_amoxor_w(rs, rs, rd, 1, 1), ctx); if (!is64) emit_zext_32(rs, ctx); break; /* src_reg = atomic_xchg(dst_reg + off16, src_reg); */ case BPF_XCHG: - emit(is64 ? rv_amoswap_d(rs, rs, rd, 0, 0) : - rv_amoswap_w(rs, rs, rd, 0, 0), ctx); + emit(is64 ? rv_amoswap_d(rs, rs, rd, 1, 1) : + rv_amoswap_w(rs, rs, rd, 1, 1), ctx); if (!is64) emit_zext_32(rs, ctx); break; @@ -555,8 +557,8 @@ rv_lr_w(r0, 0, rd, 0, 0), ctx); jmp_offset = ninsns_rvoff(8); emit(rv_bne(RV_REG_T2, r0, jmp_offset >> 1), ctx); - emit(is64 ? rv_sc_d(RV_REG_T3, rs, rd, 0, 0) : - rv_sc_w(RV_REG_T3, rs, rd, 0, 0), ctx); + emit(is64 ? rv_sc_d(RV_REG_T3, rs, rd, 0, 1) : + rv_sc_w(RV_REG_T3, rs, rd, 0, 1), ctx); jmp_offset = ninsns_rvoff(-6); emit(rv_bne(RV_REG_T3, 0, jmp_offset >> 1), ctx); emit(rv_fence(0x3, 0x3), ctx); @@ -740,6 +742,9 @@ if (ret) return ret; + /* store prog start time */ + emit_mv(RV_REG_S1, RV_REG_A0, ctx); + /* if (__bpf_prog_enter(prog) == 0) * goto skip_exec_of_prog; */ @@ -747,9 +752,6 @@ /* nop reserved for conditional jump */ emit(rv_nop(), ctx); - /* store prog start time */ - emit_mv(RV_REG_S1, RV_REG_A0, ctx); - /* arg1: &args_off */ emit_addi(RV_REG_A0, RV_REG_FP, -args_off, ctx); if (!p->jited) @@ -922,7 +924,7 @@ orig_call += RV_FENTRY_NINSNS * 4; if (flags & BPF_TRAMP_F_CALL_ORIG) { - emit_imm(RV_REG_A0, (const s64)im, ctx); + emit_imm(RV_REG_A0, ctx->insns ? (const s64)im : RV_MAX_COUNT_IMM, ctx); ret = emit_call((const u64)__bpf_tramp_enter, true, ctx); if (ret) return ret; @@ -983,7 +985,7 @@ if (flags & BPF_TRAMP_F_CALL_ORIG) { im->ip_epilogue = ctx->insns + ctx->ninsns; - emit_imm(RV_REG_A0, (const s64)im, ctx); + emit_imm(RV_REG_A0, ctx->insns ? (const s64)im : RV_MAX_COUNT_IMM, ctx); ret = emit_call((const u64)__bpf_tramp_exit, true, ctx); if (ret) goto out; @@ -1052,6 +1054,7 @@ { int ret; struct rv_jit_context ctx; + u32 size = image_end - image; ctx.ninsns = 0; /* @@ -1065,11 +1068,16 @@ ctx.ro_insns = image; ret = __arch_prepare_bpf_trampoline(im, m, tlinks, func_addr, flags, &ctx); if (ret < 0) - return ret; + goto out; - bpf_flush_icache(ctx.insns, ctx.insns + ctx.ninsns); + if (WARN_ON(size < ninsns_rvoff(ctx.ninsns))) { + ret = -E2BIG; + goto out; + } - return ninsns_rvoff(ret); + bpf_flush_icache(image, image_end); +out: + return ret < 0 ? ret : size; } int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx, --- linux-xilinx-6.8.0.orig/arch/riscv/purgatory/Makefile +++ linux-xilinx-6.8.0/arch/riscv/purgatory/Makefile @@ -2,7 +2,9 @@ OBJECT_FILES_NON_STANDARD := y purgatory-y := purgatory.o sha256.o entry.o string.o ctype.o memcpy.o memset.o +ifeq ($(CONFIG_KASAN_GENERIC)$(CONFIG_KASAN_SW_TAGS),) purgatory-y += strcmp.o strlen.o strncmp.o +endif targets += $(purgatory-y) PURGATORY_OBJS = $(addprefix $(obj)/,$(purgatory-y)) --- linux-xilinx-6.8.0.orig/arch/riscv/purgatory/entry.S +++ linux-xilinx-6.8.0/arch/riscv/purgatory/entry.S @@ -7,6 +7,7 @@ * Author: Li Zhengyu (lizhengyu3@huawei.com) * */ +#include #include .text @@ -34,6 +35,7 @@ .data +.align LGREG SYM_DATA(riscv_kernel_entry, .quad 0) .end --- linux-xilinx-6.8.0.orig/arch/s390/Kconfig +++ linux-xilinx-6.8.0/arch/s390/Kconfig @@ -82,7 +82,7 @@ select ARCH_HAS_STRICT_KERNEL_RWX select ARCH_HAS_STRICT_MODULE_RWX select ARCH_HAS_SYSCALL_WRAPPER - select ARCH_HAS_UBSAN_SANITIZE_ALL + select ARCH_HAS_UBSAN select ARCH_HAS_VDSO_DATA select ARCH_HAVE_NMI_SAFE_CMPXCHG select ARCH_INLINE_READ_LOCK @@ -113,6 +113,7 @@ select ARCH_INLINE_WRITE_UNLOCK_BH select ARCH_INLINE_WRITE_UNLOCK_IRQ select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE + select ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE select ARCH_STACKWALK select ARCH_SUPPORTS_ATOMIC_RMW select ARCH_SUPPORTS_DEBUG_PAGEALLOC --- linux-xilinx-6.8.0.orig/arch/s390/Makefile +++ linux-xilinx-6.8.0/arch/s390/Makefile @@ -21,7 +21,7 @@ ifndef CONFIG_AS_IS_LLVM KBUILD_AFLAGS_DECOMPRESSOR += $(if $(CONFIG_DEBUG_INFO),$(aflags_dwarf)) endif -KBUILD_CFLAGS_DECOMPRESSOR := $(CLANG_FLAGS) -m64 -O2 -mpacked-stack +KBUILD_CFLAGS_DECOMPRESSOR := $(CLANG_FLAGS) -m64 -O2 -mpacked-stack -std=gnu11 KBUILD_CFLAGS_DECOMPRESSOR += -DDISABLE_BRANCH_PROFILING -D__NO_FORTIFY KBUILD_CFLAGS_DECOMPRESSOR += -fno-delete-null-pointer-checks -msoft-float -mbackchain KBUILD_CFLAGS_DECOMPRESSOR += -fno-asynchronous-unwind-tables --- linux-xilinx-6.8.0.orig/arch/s390/boot/startup.c +++ linux-xilinx-6.8.0/arch/s390/boot/startup.c @@ -32,7 +32,6 @@ unsigned long __bootdata(ident_map_size); u64 __bootdata_preserved(stfle_fac_list[16]); -u64 __bootdata_preserved(alt_stfle_fac_list[16]); struct oldmem_data __bootdata_preserved(oldmem_data); struct machine_info machine; @@ -78,7 +77,7 @@ : [reg1] "=&d" (reg1), [reg2] "=&a" (reg2), [rc] "+&d" (rc), - [tmp] "=&d" (tmp), + [tmp] "+&d" (tmp), "+Q" (S390_lowcore.program_new_psw), "=Q" (old) : [psw_old] "a" (&old), @@ -385,8 +384,12 @@ /* vmlinux decompression is done, shrink reserved low memory */ physmem_reserve(RR_DECOMPRESSOR, 0, (unsigned long)_decompressor_end); - if (kaslr_enabled()) - amode31_lma = randomize_within_range(vmlinux.amode31_size, PAGE_SIZE, 0, SZ_2G); + if (kaslr_enabled()) { + unsigned long amode31_min; + + amode31_min = (unsigned long)_decompressor_end; + amode31_lma = randomize_within_range(vmlinux.amode31_size, PAGE_SIZE, amode31_min, SZ_2G); + } amode31_lma = amode31_lma ?: vmlinux.default_lma - vmlinux.amode31_size; physmem_reserve(RR_AMODE31, amode31_lma, vmlinux.amode31_size); --- linux-xilinx-6.8.0.orig/arch/s390/boot/vmem.c +++ linux-xilinx-6.8.0/arch/s390/boot/vmem.c @@ -366,7 +366,7 @@ } pmd = boot_crst_alloc(_SEGMENT_ENTRY_EMPTY); pud_populate(&init_mm, pud, pmd); - } else if (pud_large(*pud)) { + } else if (pud_leaf(*pud)) { continue; } pgtable_pmd_populate(pud, addr, next, mode); --- linux-xilinx-6.8.0.orig/arch/s390/include/asm/cpacf.h +++ linux-xilinx-6.8.0/arch/s390/include/asm/cpacf.h @@ -166,28 +166,86 @@ typedef struct { unsigned char bytes[16]; } cpacf_mask_t; -/** - * cpacf_query() - check if a specific CPACF function is available - * @opcode: the opcode of the crypto instruction - * @func: the function code to test for - * - * Executes the query function for the given crypto instruction @opcode - * and checks if @func is available - * - * Returns 1 if @func is available for @opcode, 0 otherwise +/* + * Prototype for a not existing function to produce a link + * error if __cpacf_query() or __cpacf_check_opcode() is used + * with an invalid compile time const opcode. */ -static __always_inline void __cpacf_query(unsigned int opcode, cpacf_mask_t *mask) +void __cpacf_bad_opcode(void); + +static __always_inline void __cpacf_query_rre(u32 opc, u8 r1, u8 r2, + cpacf_mask_t *mask) { asm volatile( - " lghi 0,0\n" /* query function */ - " lgr 1,%[mask]\n" - " spm 0\n" /* pckmo doesn't change the cc */ - /* Parameter regs are ignored, but must be nonzero and unique */ - "0: .insn rrf,%[opc] << 16,2,4,6,0\n" - " brc 1,0b\n" /* handle partial completion */ - : "=m" (*mask) - : [mask] "d" ((unsigned long)mask), [opc] "i" (opcode) - : "cc", "0", "1"); + " la %%r1,%[mask]\n" + " xgr %%r0,%%r0\n" + " .insn rre,%[opc] << 16,%[r1],%[r2]\n" + : [mask] "=R" (*mask) + : [opc] "i" (opc), + [r1] "i" (r1), [r2] "i" (r2) + : "cc", "r0", "r1"); +} + +static __always_inline void __cpacf_query_rrf(u32 opc, + u8 r1, u8 r2, u8 r3, u8 m4, + cpacf_mask_t *mask) +{ + asm volatile( + " la %%r1,%[mask]\n" + " xgr %%r0,%%r0\n" + " .insn rrf,%[opc] << 16,%[r1],%[r2],%[r3],%[m4]\n" + : [mask] "=R" (*mask) + : [opc] "i" (opc), [r1] "i" (r1), [r2] "i" (r2), + [r3] "i" (r3), [m4] "i" (m4) + : "cc", "r0", "r1"); +} + +static __always_inline void __cpacf_query(unsigned int opcode, + cpacf_mask_t *mask) +{ + switch (opcode) { + case CPACF_KDSA: + __cpacf_query_rre(CPACF_KDSA, 0, 2, mask); + break; + case CPACF_KIMD: + __cpacf_query_rre(CPACF_KIMD, 0, 2, mask); + break; + case CPACF_KLMD: + __cpacf_query_rre(CPACF_KLMD, 0, 2, mask); + break; + case CPACF_KM: + __cpacf_query_rre(CPACF_KM, 2, 4, mask); + break; + case CPACF_KMA: + __cpacf_query_rrf(CPACF_KMA, 2, 4, 6, 0, mask); + break; + case CPACF_KMAC: + __cpacf_query_rre(CPACF_KMAC, 0, 2, mask); + break; + case CPACF_KMC: + __cpacf_query_rre(CPACF_KMC, 2, 4, mask); + break; + case CPACF_KMCTR: + __cpacf_query_rrf(CPACF_KMCTR, 2, 4, 6, 0, mask); + break; + case CPACF_KMF: + __cpacf_query_rre(CPACF_KMF, 2, 4, mask); + break; + case CPACF_KMO: + __cpacf_query_rre(CPACF_KMO, 2, 4, mask); + break; + case CPACF_PCC: + __cpacf_query_rre(CPACF_PCC, 0, 0, mask); + break; + case CPACF_PCKMO: + __cpacf_query_rre(CPACF_PCKMO, 0, 0, mask); + break; + case CPACF_PRNO: + __cpacf_query_rre(CPACF_PRNO, 2, 4, mask); + break; + default: + __cpacf_bad_opcode(); + } } static __always_inline int __cpacf_check_opcode(unsigned int opcode) @@ -211,10 +269,21 @@ case CPACF_KMA: return test_facility(146); /* check for MSA8 */ default: - BUG(); + __cpacf_bad_opcode(); + return 0; } } +/** + * cpacf_query() - check if a specific CPACF function is available + * @opcode: the opcode of the crypto instruction + * @func: the function code to test for + * + * Executes the query function for the given crypto instruction @opcode + * and checks if @func is available + * + * Returns 1 if @func is available for @opcode, 0 otherwise + */ static __always_inline int cpacf_query(unsigned int opcode, cpacf_mask_t *mask) { if (__cpacf_check_opcode(opcode)) { --- linux-xilinx-6.8.0.orig/arch/s390/include/asm/dwarf.h +++ linux-xilinx-6.8.0/arch/s390/include/asm/dwarf.h @@ -9,6 +9,7 @@ #define CFI_DEF_CFA_OFFSET .cfi_def_cfa_offset #define CFI_ADJUST_CFA_OFFSET .cfi_adjust_cfa_offset #define CFI_RESTORE .cfi_restore +#define CFI_REL_OFFSET .cfi_rel_offset #ifdef CONFIG_AS_CFI_VAL_OFFSET #define CFI_VAL_OFFSET .cfi_val_offset --- linux-xilinx-6.8.0.orig/arch/s390/include/asm/entry-common.h +++ linux-xilinx-6.8.0/arch/s390/include/asm/entry-common.h @@ -55,7 +55,7 @@ static inline void arch_exit_to_user_mode_prepare(struct pt_regs *regs, unsigned long ti_work) { - choose_random_kstack_offset(get_tod_clock_fast() & 0xff); + choose_random_kstack_offset(get_tod_clock_fast()); } #define arch_exit_to_user_mode_prepare arch_exit_to_user_mode_prepare --- linux-xilinx-6.8.0.orig/arch/s390/include/asm/facility.h +++ linux-xilinx-6.8.0/arch/s390/include/asm/facility.h @@ -60,13 +60,15 @@ unsigned long facilities_als[] = { FACILITIES_ALS }; if (__builtin_constant_p(nr) && nr < sizeof(facilities_als) * 8) { - if (__test_facility(nr, &facilities_als)) - return 1; + if (__test_facility(nr, &facilities_als)) { + if (!__is_defined(__DECOMPRESSOR)) + return 1; + } } return __test_facility(nr, &stfle_fac_list); } -static inline unsigned long __stfle_asm(u64 *stfle_fac_list, int size) +static inline unsigned long __stfle_asm(u64 *fac_list, int size) { unsigned long reg0 = size - 1; @@ -74,7 +76,7 @@ " lgr 0,%[reg0]\n" " .insn s,0xb2b00000,%[list]\n" /* stfle */ " lgr %[reg0],0\n" - : [reg0] "+&d" (reg0), [list] "+Q" (*stfle_fac_list) + : [reg0] "+&d" (reg0), [list] "+Q" (*fac_list) : : "memory", "cc", "0"); return reg0; @@ -82,10 +84,10 @@ /** * stfle - Store facility list extended - * @stfle_fac_list: array where facility list can be stored + * @fac_list: array where facility list can be stored * @size: size of passed in array in double words */ -static inline void __stfle(u64 *stfle_fac_list, int size) +static inline void __stfle(u64 *fac_list, int size) { unsigned long nr; u32 stfl_fac_list; @@ -94,20 +96,20 @@ " stfl 0(0)\n" : "=m" (S390_lowcore.stfl_fac_list)); stfl_fac_list = S390_lowcore.stfl_fac_list; - memcpy(stfle_fac_list, &stfl_fac_list, 4); + memcpy(fac_list, &stfl_fac_list, 4); nr = 4; /* bytes stored by stfl */ if (stfl_fac_list & 0x01000000) { /* More facility bits available with stfle */ - nr = __stfle_asm(stfle_fac_list, size); + nr = __stfle_asm(fac_list, size); nr = min_t(unsigned long, (nr + 1) * 8, size * 8); } - memset((char *) stfle_fac_list + nr, 0, size * 8 - nr); + memset((char *)fac_list + nr, 0, size * 8 - nr); } -static inline void stfle(u64 *stfle_fac_list, int size) +static inline void stfle(u64 *fac_list, int size) { preempt_disable(); - __stfle(stfle_fac_list, size); + __stfle(fac_list, size); preempt_enable(); } --- linux-xilinx-6.8.0.orig/arch/s390/include/asm/ftrace.h +++ linux-xilinx-6.8.0/arch/s390/include/asm/ftrace.h @@ -7,13 +7,24 @@ #define MCOUNT_INSN_SIZE 6 #ifndef __ASSEMBLY__ +#include -#ifdef CONFIG_CC_IS_CLANG -/* https://bugs.llvm.org/show_bug.cgi?id=41424 */ -#define ftrace_return_address(n) 0UL -#else -#define ftrace_return_address(n) __builtin_return_address(n) -#endif +static __always_inline unsigned long return_address(unsigned int n) +{ + struct stack_frame *sf; + + if (!n) + return (unsigned long)__builtin_return_address(0); + + sf = (struct stack_frame *)current_frame_address(); + do { + sf = (struct stack_frame *)sf->back_chain; + if (!sf) + return 0; + } while (--n); + return sf->gprs[8]; +} +#define ftrace_return_address(n) return_address(n) void ftrace_caller(void); --- linux-xilinx-6.8.0.orig/arch/s390/include/asm/futex.h +++ linux-xilinx-6.8.0/arch/s390/include/asm/futex.h @@ -44,7 +44,7 @@ break; case FUTEX_OP_ANDN: __futex_atomic_op("lr %2,%1\nnr %2,%5\n", - ret, oldval, newval, uaddr, oparg); + ret, oldval, newval, uaddr, ~oparg); break; case FUTEX_OP_XOR: __futex_atomic_op("lr %2,%1\nxr %2,%5\n", --- linux-xilinx-6.8.0.orig/arch/s390/include/asm/gmap.h +++ linux-xilinx-6.8.0/arch/s390/include/asm/gmap.h @@ -146,7 +146,7 @@ void gmap_sync_dirty_log_pmd(struct gmap *gmap, unsigned long dirty_bitmap[4], unsigned long gaddr, unsigned long vmaddr); -int gmap_mark_unmergeable(void); +int s390_disable_cow_sharing(void); void s390_unlist_old_asce(struct gmap *gmap); int s390_replace_asce(struct gmap *gmap); void s390_uv_destroy_pfns(unsigned long count, unsigned long *pfns); --- linux-xilinx-6.8.0.orig/arch/s390/include/asm/io.h +++ linux-xilinx-6.8.0/arch/s390/include/asm/io.h @@ -16,8 +16,10 @@ #include #define xlate_dev_mem_ptr xlate_dev_mem_ptr +#define kc_xlate_dev_mem_ptr xlate_dev_mem_ptr void *xlate_dev_mem_ptr(phys_addr_t phys); #define unxlate_dev_mem_ptr unxlate_dev_mem_ptr +#define kc_unxlate_dev_mem_ptr unxlate_dev_mem_ptr void unxlate_dev_mem_ptr(phys_addr_t phys, void *addr); #define IO_SPACE_LIMIT 0 --- linux-xilinx-6.8.0.orig/arch/s390/include/asm/ipl.h +++ linux-xilinx-6.8.0/arch/s390/include/asm/ipl.h @@ -139,6 +139,7 @@ unsigned char flags, unsigned short cert); int ipl_report_add_certificate(struct ipl_report *report, void *key, unsigned long addr, unsigned long len); +bool ipl_get_secureboot(void); /* * DIAG 308 support --- linux-xilinx-6.8.0.orig/arch/s390/include/asm/kvm_host.h +++ linux-xilinx-6.8.0/arch/s390/include/asm/kvm_host.h @@ -427,6 +427,7 @@ u64 instruction_io_other; u64 instruction_lpsw; u64 instruction_lpswe; + u64 instruction_lpswey; u64 instruction_pfmf; u64 instruction_ptff; u64 instruction_sck; --- linux-xilinx-6.8.0.orig/arch/s390/include/asm/mmu.h +++ linux-xilinx-6.8.0/arch/s390/include/asm/mmu.h @@ -32,6 +32,11 @@ unsigned int uses_skeys:1; /* The mmu context uses CMM. */ unsigned int uses_cmm:1; + /* + * The mmu context allows COW-sharing of memory pages (KSM, zeropage). + * Note that COW-sharing during fork() is currently always allowed. + */ + unsigned int allow_cow_sharing:1; /* The gmaps associated with this context are allowed to use huge pages. */ unsigned int allow_gmap_hpage_1m:1; } mm_context_t; --- linux-xilinx-6.8.0.orig/arch/s390/include/asm/mmu_context.h +++ linux-xilinx-6.8.0/arch/s390/include/asm/mmu_context.h @@ -35,6 +35,7 @@ mm->context.has_pgste = 0; mm->context.uses_skeys = 0; mm->context.uses_cmm = 0; + mm->context.allow_cow_sharing = 1; mm->context.allow_gmap_hpage_1m = 0; #endif switch (mm->context.asce_limit) { --- linux-xilinx-6.8.0.orig/arch/s390/include/asm/pci.h +++ linux-xilinx-6.8.0/arch/s390/include/asm/pci.h @@ -96,7 +96,6 @@ u8 size; /* order 2 exponent */ }; -struct s390_domain; struct kvm_zdev; #define ZPCI_FUNCTIONS_PER_BUS 256 @@ -107,9 +106,10 @@ struct list_head resources; struct list_head bus_next; struct resource bus_resource; - int pchid; + int topo; /* TID if topo_is_tid, PCHID otherwise */ int domain_nr; - bool multifunction; + u8 multifunction : 1; + u8 topo_is_tid : 1; enum pci_bus_speed max_bus_speed; }; @@ -122,6 +122,7 @@ struct rcu_head rcu; struct hotplug_slot hotplug_slot; + struct mutex state_lock; /* protect state changes */ enum zpci_state state; u32 fid; /* function ID, used by sclp */ u32 fh; /* function handle, used by insn's */ @@ -129,6 +130,8 @@ u16 vfn; /* virtual function number */ u16 pchid; /* physical channel ID */ u16 maxstbl; /* Maximum store block size */ + u16 rid; /* RID as supplied by firmware */ + u16 tid; /* Topology for which RID is valid */ u8 pfgid; /* function group ID */ u8 pft; /* pci function type */ u8 port; @@ -139,10 +142,10 @@ u8 is_physfn : 1; u8 util_str_avail : 1; u8 irqs_registered : 1; - u8 reserved : 2; + u8 tid_avail : 1; + u8 reserved : 1; unsigned int devfn; /* DEVFN part of the RID*/ - struct mutex lock; u8 pfip[CLP_PFIP_NR_SEGMENTS]; /* pci function internal path */ u32 uid; /* user defined id */ u8 util_str[CLP_UTIL_STR_LEN]; /* utility string */ @@ -170,6 +173,7 @@ u64 dma_mask; /* DMA address space mask */ /* Function measurement block */ + struct mutex fmb_lock; struct zpci_fmb *fmb; u16 fmb_update; /* update interval */ u16 fmb_length; @@ -180,9 +184,10 @@ struct dentry *debugfs_dev; /* IOMMU and passthrough */ - struct s390_domain *s390_domain; /* s390 IOMMU domain data */ + struct iommu_domain *s390_domain; /* attached IOMMU domain */ struct kvm_zdev *kzdev; struct mutex kzdev_lock; + spinlock_t dom_lock; /* protect s390_domain change */ }; static inline bool zdev_enabled(struct zpci_dev *zdev) @@ -202,12 +207,14 @@ ----------------------------------------------------------------------------- */ /* Base stuff */ struct zpci_dev *zpci_create_device(u32 fid, u32 fh, enum zpci_state state); +int zpci_add_device(struct zpci_dev *zdev); int zpci_enable_device(struct zpci_dev *); int zpci_disable_device(struct zpci_dev *); int zpci_scan_configured_device(struct zpci_dev *zdev, u32 fh); int zpci_deconfigure_device(struct zpci_dev *zdev); void zpci_device_reserved(struct zpci_dev *zdev); bool zpci_is_device_configured(struct zpci_dev *zdev); +int zpci_scan_devices(void); int zpci_hot_reset_device(struct zpci_dev *zdev); int zpci_register_ioat(struct zpci_dev *, u8, u64, u64, u64, u8 *); @@ -217,7 +224,7 @@ /* CLP */ int clp_setup_writeback_mio(void); -int clp_scan_pci_devices(void); +int clp_scan_pci_devices(struct list_head *scan_list); int clp_query_pci_fn(struct zpci_dev *zdev); int clp_enable_fh(struct zpci_dev *zdev, u32 *fh, u8 nr_dma_as); int clp_disable_fh(struct zpci_dev *zdev, u32 *fh); --- linux-xilinx-6.8.0.orig/arch/s390/include/asm/pci_clp.h +++ linux-xilinx-6.8.0/arch/s390/include/asm/pci_clp.h @@ -110,7 +110,8 @@ struct clp_rsp_query_pci { struct clp_rsp_hdr hdr; u16 vfn; /* virtual fn number */ - u16 : 3; + u16 : 2; + u16 tid_avail : 1; u16 rid_avail : 1; u16 is_physfn : 1; u16 reserved1 : 1; @@ -130,8 +131,9 @@ u64 edma; /* end dma as */ #define ZPCI_RID_MASK_DEVFN 0x00ff u16 rid; /* BUS/DEVFN PCI address */ - u16 reserved0; - u32 reserved[10]; + u32 reserved0; + u16 tid; + u32 reserved[9]; u32 uid; /* user defined id */ u8 util_str[CLP_UTIL_STR_LEN]; /* utility string */ u32 reserved2[16]; --- linux-xilinx-6.8.0.orig/arch/s390/include/asm/perf_event.h +++ linux-xilinx-6.8.0/arch/s390/include/asm/perf_event.h @@ -73,6 +73,7 @@ #define SAMPLE_FREQ_MODE(hwc) (SAMPL_FLAGS(hwc) & PERF_CPUM_SF_FREQ_MODE) #define perf_arch_fetch_caller_regs(regs, __ip) do { \ + (regs)->psw.mask = 0; \ (regs)->psw.addr = (__ip); \ (regs)->gprs[15] = (unsigned long)__builtin_frame_address(0) - \ offsetof(struct stack_frame, back_chain); \ --- linux-xilinx-6.8.0.orig/arch/s390/include/asm/pgtable.h +++ linux-xilinx-6.8.0/arch/s390/include/asm/pgtable.h @@ -566,10 +566,20 @@ } /* - * In the case that a guest uses storage keys - * faults should no longer be backed by zero pages + * As soon as the guest uses storage keys or enables PV, we deduplicate all + * mapped shared zeropages and prevent new shared zeropages from getting + * mapped. */ -#define mm_forbids_zeropage mm_has_pgste +#define mm_forbids_zeropage mm_forbids_zeropage +static inline int mm_forbids_zeropage(struct mm_struct *mm) +{ +#ifdef CONFIG_PGSTE + if (!mm->context.allow_cow_sharing) + return 1; +#endif + return 0; +} + static inline int mm_uses_skeys(struct mm_struct *mm) { #ifdef CONFIG_PGSTE @@ -730,7 +740,7 @@ { unsigned long type = pud_val(pud) & _REGION_ENTRY_TYPE_MASK; - if (type > _REGION_ENTRY_TYPE_R3 || pud_large(pud)) + if (type > _REGION_ENTRY_TYPE_R3 || pud_leaf(pud)) return 1; if (type < _REGION_ENTRY_TYPE_R3) return 0; @@ -1398,7 +1408,7 @@ unsigned long origin_mask; origin_mask = _REGION_ENTRY_ORIGIN; - if (pud_large(pud)) + if (pud_leaf(pud)) origin_mask = _REGION3_ENTRY_ORIGIN_LARGE; return (unsigned long)__va(pud_val(pud) & origin_mask); } @@ -1766,8 +1776,10 @@ static inline pmd_t pmdp_invalidate(struct vm_area_struct *vma, unsigned long addr, pmd_t *pmdp) { - pmd_t pmd = __pmd(pmd_val(*pmdp) | _SEGMENT_ENTRY_INVALID); + pmd_t pmd; + VM_WARN_ON_ONCE(!pmd_present(*pmdp)); + pmd = __pmd(pmd_val(*pmdp) | _SEGMENT_ENTRY_INVALID); return pmdp_xchg_direct(vma->vm_mm, addr, pmdp, pmd); } --- linux-xilinx-6.8.0.orig/arch/s390/include/asm/processor.h +++ linux-xilinx-6.8.0/arch/s390/include/asm/processor.h @@ -99,6 +99,7 @@ extern const struct seq_operations cpuinfo_op; extern void execve_tail(void); +unsigned long vdso_text_size(void); unsigned long vdso_size(void); /* @@ -140,8 +141,7 @@ " la %[addr],256(%[addr])\n" " brctg %[tmp],0b\n" "1: stg %[poison],0(%[addr])\n" - " larl %[tmp],3f\n" - " ex %[count],0(%[tmp])\n" + " exrl %[count],3f\n" " j 4f\n" "2: stg %[poison],0(%[addr])\n" " j 4f\n" @@ -303,8 +303,8 @@ */ static __always_inline void __load_psw_mask(unsigned long mask) { + psw_t psw __uninitialized; unsigned long addr; - psw_t psw; psw.mask = mask; --- linux-xilinx-6.8.0.orig/arch/s390/include/asm/set_memory.h +++ linux-xilinx-6.8.0/arch/s390/include/asm/set_memory.h @@ -62,5 +62,6 @@ int set_direct_map_invalid_noflush(struct page *page); int set_direct_map_default_noflush(struct page *page); +bool kernel_page_present(struct page *page); #endif --- linux-xilinx-6.8.0.orig/arch/s390/include/asm/stacktrace.h +++ linux-xilinx-6.8.0/arch/s390/include/asm/stacktrace.h @@ -2,6 +2,7 @@ #ifndef _ASM_S390_STACKTRACE_H #define _ASM_S390_STACKTRACE_H +#include #include #include #include @@ -13,6 +14,17 @@ unsigned long empty2[4]; }; +struct stack_frame_vdso_wrapper { + struct stack_frame_user sf; + unsigned long return_address; +}; + +struct perf_callchain_entry_ctx; + +void arch_stack_walk_user_common(stack_trace_consume_fn consume_entry, void *cookie, + struct perf_callchain_entry_ctx *entry, + const struct pt_regs *regs, bool perf); + enum stack_type { STACK_TYPE_UNKNOWN, STACK_TYPE_TASK, --- linux-xilinx-6.8.0.orig/arch/s390/include/asm/uv.h +++ linux-xilinx-6.8.0/arch/s390/include/asm/uv.h @@ -442,7 +442,10 @@ if (!uv_call(0, (u64)&uvcb)) return 0; - return -EINVAL; + pr_err("%s UVC failed (rc: 0x%x, rrc: 0x%x), possible hypervisor bug.\n", + uvcb.header.cmd == UVC_CMD_SET_SHARED_ACCESS ? "Share" : "Unshare", + uvcb.header.rc, uvcb.header.rrc); + panic("System security cannot be guaranteed unless the system panics now.\n"); } /* --- linux-xilinx-6.8.0.orig/arch/s390/kernel/Makefile +++ linux-xilinx-6.8.0/arch/s390/kernel/Makefile @@ -11,6 +11,8 @@ # Do not trace early setup code CFLAGS_REMOVE_early.o = $(CC_FLAGS_FTRACE) CFLAGS_REMOVE_rethook.o = $(CC_FLAGS_FTRACE) +CFLAGS_REMOVE_stacktrace.o = $(CC_FLAGS_FTRACE) +CFLAGS_REMOVE_unwind_bc.o = $(CC_FLAGS_FTRACE) endif @@ -34,7 +36,7 @@ CFLAGS_dumpstack.o += -fno-optimize-sibling-calls CFLAGS_unwind_bc.o += -fno-optimize-sibling-calls -obj-y := head64.o traps.o time.o process.o earlypgm.o early.o setup.o idle.o vtime.o +obj-y := head64.o traps.o time.o process.o early.o setup.o idle.o vtime.o obj-y += processor.o syscall.o ptrace.o signal.o cpcmd.o ebcdic.o nmi.o obj-y += debug.o irq.o ipl.o dis.o diag.o vdso.o cpufeature.o obj-y += sysinfo.o lgr.o os_info.o ctlreg.o --- linux-xilinx-6.8.0.orig/arch/s390/kernel/asm-offsets.c +++ linux-xilinx-6.8.0/arch/s390/kernel/asm-offsets.c @@ -66,6 +66,11 @@ OFFSET(__SF_SIE_CONTROL_PHYS, stack_frame, sie_control_block_phys); DEFINE(STACK_FRAME_OVERHEAD, sizeof(struct stack_frame)); BLANK(); + OFFSET(__SFUSER_BACKCHAIN, stack_frame_user, back_chain); + DEFINE(STACK_FRAME_USER_OVERHEAD, sizeof(struct stack_frame_user)); + OFFSET(__SFVDSO_RETURN_ADDRESS, stack_frame_vdso_wrapper, return_address); + DEFINE(STACK_FRAME_VDSO_OVERHEAD, sizeof(struct stack_frame_vdso_wrapper)); + BLANK(); /* idle data offsets */ OFFSET(__CLOCK_IDLE_ENTER, s390_idle_data, clock_idle_enter); OFFSET(__TIMER_IDLE_ENTER, s390_idle_data, timer_idle_enter); --- linux-xilinx-6.8.0.orig/arch/s390/kernel/cache.c +++ linux-xilinx-6.8.0/arch/s390/kernel/cache.c @@ -166,5 +166,6 @@ ci_leaf_init(this_leaf++, pvt, ctype, level, cpu); } } + this_cpu_ci->cpu_map_populated = true; return 0; } --- linux-xilinx-6.8.0.orig/arch/s390/kernel/entry.S +++ linux-xilinx-6.8.0/arch/s390/kernel/entry.S @@ -458,9 +458,13 @@ SYM_CODE_END(\name) .endm + .section .irqentry.text, "ax" + INT_HANDLER ext_int_handler,__LC_EXT_OLD_PSW,do_ext_irq INT_HANDLER io_int_handler,__LC_IO_OLD_PSW,do_io_irq + .section .kprobes.text, "ax" + /* * Load idle PSW. */ @@ -621,6 +625,21 @@ 3: j 3b SYM_CODE_END(restart_int_handler) +SYM_CODE_START(early_pgm_check_handler) + stmg %r8,%r15,__LC_SAVE_AREA_SYNC + aghi %r15,-(STACK_FRAME_OVERHEAD+__PT_SIZE) + la %r11,STACK_FRAME_OVERHEAD(%r15) + xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) + stmg %r0,%r7,__PT_R0(%r11) + mvc __PT_PSW(16,%r11),__LC_PGM_OLD_PSW + mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC + lgr %r2,%r11 + brasl %r14,__do_early_pgm_check + mvc __LC_RETURN_PSW(16),STACK_FRAME_OVERHEAD+__PT_PSW(%r15) + lmg %r0,%r15,STACK_FRAME_OVERHEAD+__PT_R0(%r15) + lpswe __LC_RETURN_PSW +SYM_CODE_END(early_pgm_check_handler) + .section .kprobes.text, "ax" #if defined(CONFIG_CHECK_STACK) || defined(CONFIG_VMAP_STACK) @@ -653,6 +672,7 @@ SYM_DATA_END(daton_psw) .section .rodata, "a" + .balign 8 #define SYSCALL(esame,emu) .quad __s390x_ ## esame SYM_DATA_START(sys_call_table) #include "asm/syscall_table.h" --- linux-xilinx-6.8.0.orig/arch/s390/kernel/ftrace.c +++ linux-xilinx-6.8.0/arch/s390/kernel/ftrace.c @@ -296,6 +296,9 @@ struct kprobe *p; int bit; + if (unlikely(kprobe_ftrace_disabled)) + return; + bit = ftrace_test_recursion_trylock(ip, parent_ip); if (bit < 0) return; --- linux-xilinx-6.8.0.orig/arch/s390/kernel/ipl.c +++ linux-xilinx-6.8.0/arch/s390/kernel/ipl.c @@ -962,8 +962,8 @@ scpdata_len += padding; } - reipl_block_nvme->hdr.len = IPL_BP_FCP_LEN + scpdata_len; - reipl_block_nvme->nvme.len = IPL_BP0_FCP_LEN + scpdata_len; + reipl_block_nvme->hdr.len = IPL_BP_NVME_LEN + scpdata_len; + reipl_block_nvme->nvme.len = IPL_BP0_NVME_LEN + scpdata_len; reipl_block_nvme->nvme.scp_data_len = scpdata_len; return count; @@ -1858,9 +1858,9 @@ } dump_block_nvme->hdr.len = IPL_BP_NVME_LEN; dump_block_nvme->hdr.version = IPL_PARM_BLOCK_VERSION; - dump_block_nvme->fcp.len = IPL_BP0_NVME_LEN; - dump_block_nvme->fcp.pbt = IPL_PBT_NVME; - dump_block_nvme->fcp.opt = IPL_PB0_NVME_OPT_DUMP; + dump_block_nvme->nvme.len = IPL_BP0_NVME_LEN; + dump_block_nvme->nvme.pbt = IPL_PBT_NVME; + dump_block_nvme->nvme.opt = IPL_PB0_NVME_OPT_DUMP; dump_capabilities |= DUMP_TYPE_NVME; return 0; } @@ -2520,3 +2520,8 @@ } #endif + +bool ipl_get_secureboot(void) +{ + return !!ipl_secure_flag; +} --- linux-xilinx-6.8.0.orig/arch/s390/kernel/kprobes.c +++ linux-xilinx-6.8.0/arch/s390/kernel/kprobes.c @@ -525,6 +525,12 @@ return 0; } +int __init arch_populate_kprobe_blacklist(void) +{ + return kprobe_add_area_blacklist((unsigned long)__irqentry_text_start, + (unsigned long)__irqentry_text_end); +} + int arch_trampoline_kprobe(struct kprobe *p) { return 0; --- linux-xilinx-6.8.0.orig/arch/s390/kernel/perf_cpum_cf.c +++ linux-xilinx-6.8.0/arch/s390/kernel/perf_cpum_cf.c @@ -428,7 +428,7 @@ case CPUMF_CTR_SET_CRYPTO: if (cpumf_ctr_info.csvn >= 1 && cpumf_ctr_info.csvn <= 5) ctrset_size = 16; - else if (cpumf_ctr_info.csvn == 6 || cpumf_ctr_info.csvn == 7) + else if (cpumf_ctr_info.csvn >= 6) ctrset_size = 20; break; case CPUMF_CTR_SET_EXT: @@ -438,7 +438,7 @@ ctrset_size = 48; else if (cpumf_ctr_info.csvn >= 3 && cpumf_ctr_info.csvn <= 5) ctrset_size = 128; - else if (cpumf_ctr_info.csvn == 6 || cpumf_ctr_info.csvn == 7) + else if (cpumf_ctr_info.csvn >= 6 && cpumf_ctr_info.csvn <= 8) ctrset_size = 160; break; case CPUMF_CTR_SET_MT_DIAG: @@ -556,25 +556,31 @@ struct cf_trailer_entry *trailer_start, *trailer_stop; struct cf_ctrset_entry *ctrstart, *ctrstop; size_t offset = 0; + int i; - auth &= (1 << CPUMF_LCCTL_ENABLE_SHIFT) - 1; - do { + for (i = CPUMF_CTR_SET_BASIC; i < CPUMF_CTR_SET_MAX; ++i) { ctrstart = (struct cf_ctrset_entry *)(cpuhw->start + offset); ctrstop = (struct cf_ctrset_entry *)(cpuhw->stop + offset); + /* Counter set not authorized */ + if (!(auth & cpumf_ctr_ctl[i])) + continue; + /* Counter set size zero was not saved */ + if (!cpum_cf_read_setsize(i)) + continue; + if (memcmp(ctrstop, ctrstart, sizeof(*ctrstop))) { pr_err_once("cpum_cf_diag counter set compare error " "in set %i\n", ctrstart->set); return 0; } - auth &= ~cpumf_ctr_ctl[ctrstart->set]; if (ctrstart->def == CF_DIAG_CTRSET_DEF) { cfdiag_diffctrset((u64 *)(ctrstart + 1), (u64 *)(ctrstop + 1), ctrstart->ctr); offset += ctrstart->ctr * sizeof(u64) + sizeof(*ctrstart); } - } while (ctrstart->def && auth); + } /* Save time_stamp from start of event in stop's trailer */ trailer_start = (struct cf_trailer_entry *)(cpuhw->start + offset); @@ -971,7 +977,7 @@ if (event->attr.sample_type & PERF_SAMPLE_RAW) { raw.frag.size = cpuhw->usedss; raw.frag.data = cpuhw->stop; - perf_sample_save_raw_data(&data, &raw); + perf_sample_save_raw_data(&data, event, &raw); } overflow = perf_event_overflow(event, &data, ®s); --- linux-xilinx-6.8.0.orig/arch/s390/kernel/perf_cpum_cf_events.c +++ linux-xilinx-6.8.0/arch/s390/kernel/perf_cpum_cf_events.c @@ -237,7 +237,6 @@ CPUMF_EVENT_ATTR(cf_z14, TX_C_TABORT_SPECIAL, 0x00f5); CPUMF_EVENT_ATTR(cf_z14, MT_DIAG_CYCLES_ONE_THR_ACTIVE, 0x01c0); CPUMF_EVENT_ATTR(cf_z14, MT_DIAG_CYCLES_TWO_THR_ACTIVE, 0x01c1); - CPUMF_EVENT_ATTR(cf_z15, L1D_RO_EXCL_WRITES, 0x0080); CPUMF_EVENT_ATTR(cf_z15, DTLB2_WRITES, 0x0081); CPUMF_EVENT_ATTR(cf_z15, DTLB2_MISSES, 0x0082); @@ -365,6 +364,83 @@ CPUMF_EVENT_ATTR(cf_z16, NNPA_HOLD_LOCK, 0x010e); CPUMF_EVENT_ATTR(cf_z16, MT_DIAG_CYCLES_ONE_THR_ACTIVE, 0x01c0); CPUMF_EVENT_ATTR(cf_z16, MT_DIAG_CYCLES_TWO_THR_ACTIVE, 0x01c1); +CPUMF_EVENT_ATTR(cf_z17, L1D_RO_EXCL_WRITES, 0x0080); +CPUMF_EVENT_ATTR(cf_z17, DTLB2_WRITES, 0x0081); +CPUMF_EVENT_ATTR(cf_z17, DTLB2_MISSES, 0x0082); +CPUMF_EVENT_ATTR(cf_z17, CRSTE_1MB_WRITES, 0x0083); +CPUMF_EVENT_ATTR(cf_z17, DTLB2_GPAGE_WRITES, 0x0084); +CPUMF_EVENT_ATTR(cf_z17, ITLB2_WRITES, 0x0086); +CPUMF_EVENT_ATTR(cf_z17, ITLB2_MISSES, 0x0087); +CPUMF_EVENT_ATTR(cf_z17, TLB2_PTE_WRITES, 0x0089); +CPUMF_EVENT_ATTR(cf_z17, TLB2_CRSTE_WRITES, 0x008a); +CPUMF_EVENT_ATTR(cf_z17, TLB2_ENGINES_BUSY, 0x008b); +CPUMF_EVENT_ATTR(cf_z17, TX_C_TEND, 0x008c); +CPUMF_EVENT_ATTR(cf_z17, TX_NC_TEND, 0x008d); +CPUMF_EVENT_ATTR(cf_z17, L1C_TLB2_MISSES, 0x008f); +CPUMF_EVENT_ATTR(cf_z17, DCW_REQ, 0x0091); +CPUMF_EVENT_ATTR(cf_z17, DCW_REQ_IV, 0x0092); +CPUMF_EVENT_ATTR(cf_z17, DCW_REQ_CHIP_HIT, 0x0093); +CPUMF_EVENT_ATTR(cf_z17, DCW_REQ_DRAWER_HIT, 0x0094); +CPUMF_EVENT_ATTR(cf_z17, DCW_ON_CHIP, 0x0095); +CPUMF_EVENT_ATTR(cf_z17, DCW_ON_CHIP_IV, 0x0096); +CPUMF_EVENT_ATTR(cf_z17, DCW_ON_CHIP_CHIP_HIT, 0x0097); +CPUMF_EVENT_ATTR(cf_z17, DCW_ON_CHIP_DRAWER_HIT, 0x0098); +CPUMF_EVENT_ATTR(cf_z17, DCW_ON_MODULE, 0x0099); +CPUMF_EVENT_ATTR(cf_z17, DCW_ON_DRAWER, 0x009a); +CPUMF_EVENT_ATTR(cf_z17, DCW_OFF_DRAWER, 0x009b); +CPUMF_EVENT_ATTR(cf_z17, DCW_ON_CHIP_MEMORY, 0x009c); +CPUMF_EVENT_ATTR(cf_z17, DCW_ON_MODULE_MEMORY, 0x009d); +CPUMF_EVENT_ATTR(cf_z17, DCW_ON_DRAWER_MEMORY, 0x009e); +CPUMF_EVENT_ATTR(cf_z17, DCW_OFF_DRAWER_MEMORY, 0x009f); +CPUMF_EVENT_ATTR(cf_z17, IDCW_ON_MODULE_IV, 0x00a0); +CPUMF_EVENT_ATTR(cf_z17, IDCW_ON_MODULE_CHIP_HIT, 0x00a1); +CPUMF_EVENT_ATTR(cf_z17, IDCW_ON_MODULE_DRAWER_HIT, 0x00a2); +CPUMF_EVENT_ATTR(cf_z17, IDCW_ON_DRAWER_IV, 0x00a3); +CPUMF_EVENT_ATTR(cf_z17, IDCW_ON_DRAWER_CHIP_HIT, 0x00a4); +CPUMF_EVENT_ATTR(cf_z17, IDCW_ON_DRAWER_DRAWER_HIT, 0x00a5); +CPUMF_EVENT_ATTR(cf_z17, IDCW_OFF_DRAWER_IV, 0x00a6); +CPUMF_EVENT_ATTR(cf_z17, IDCW_OFF_DRAWER_CHIP_HIT, 0x00a7); +CPUMF_EVENT_ATTR(cf_z17, IDCW_OFF_DRAWER_DRAWER_HIT, 0x00a8); +CPUMF_EVENT_ATTR(cf_z17, ICW_REQ, 0x00a9); +CPUMF_EVENT_ATTR(cf_z17, ICW_REQ_IV, 0x00aa); +CPUMF_EVENT_ATTR(cf_z17, ICW_REQ_CHIP_HIT, 0x00ab); +CPUMF_EVENT_ATTR(cf_z17, ICW_REQ_DRAWER_HIT, 0x00ac); +CPUMF_EVENT_ATTR(cf_z17, ICW_ON_CHIP, 0x00ad); +CPUMF_EVENT_ATTR(cf_z17, ICW_ON_CHIP_IV, 0x00ae); +CPUMF_EVENT_ATTR(cf_z17, ICW_ON_CHIP_CHIP_HIT, 0x00af); +CPUMF_EVENT_ATTR(cf_z17, ICW_ON_CHIP_DRAWER_HIT, 0x00b0); +CPUMF_EVENT_ATTR(cf_z17, ICW_ON_MODULE, 0x00b1); +CPUMF_EVENT_ATTR(cf_z17, ICW_ON_DRAWER, 0x00b2); +CPUMF_EVENT_ATTR(cf_z17, ICW_OFF_DRAWER, 0x00b3); +CPUMF_EVENT_ATTR(cf_z17, CYCLES_SAMETHRD, 0x00ca); +CPUMF_EVENT_ATTR(cf_z17, CYCLES_DIFFTHRD, 0x00cb); +CPUMF_EVENT_ATTR(cf_z17, INST_SAMETHRD, 0x00cc); +CPUMF_EVENT_ATTR(cf_z17, INST_DIFFTHRD, 0x00cd); +CPUMF_EVENT_ATTR(cf_z17, WRONG_BRANCH_PREDICTION, 0x00ce); +CPUMF_EVENT_ATTR(cf_z17, VX_BCD_EXECUTION_SLOTS, 0x00e1); +CPUMF_EVENT_ATTR(cf_z17, DECIMAL_INSTRUCTIONS, 0x00e2); +CPUMF_EVENT_ATTR(cf_z17, LAST_HOST_TRANSLATIONS, 0x00e8); +CPUMF_EVENT_ATTR(cf_z17, TX_NC_TABORT, 0x00f4); +CPUMF_EVENT_ATTR(cf_z17, TX_C_TABORT_NO_SPECIAL, 0x00f5); +CPUMF_EVENT_ATTR(cf_z17, TX_C_TABORT_SPECIAL, 0x00f6); +CPUMF_EVENT_ATTR(cf_z17, DFLT_ACCESS, 0x00f8); +CPUMF_EVENT_ATTR(cf_z17, DFLT_CYCLES, 0x00fd); +CPUMF_EVENT_ATTR(cf_z17, SORTL, 0x0100); +CPUMF_EVENT_ATTR(cf_z17, DFLT_CC, 0x0109); +CPUMF_EVENT_ATTR(cf_z17, DFLT_CCFINISH, 0x010a); +CPUMF_EVENT_ATTR(cf_z17, NNPA_INVOCATIONS, 0x010b); +CPUMF_EVENT_ATTR(cf_z17, NNPA_COMPLETIONS, 0x010c); +CPUMF_EVENT_ATTR(cf_z17, NNPA_WAIT_LOCK, 0x010d); +CPUMF_EVENT_ATTR(cf_z17, NNPA_HOLD_LOCK, 0x010e); +CPUMF_EVENT_ATTR(cf_z17, NNPA_INST_ONCHIP, 0x0110); +CPUMF_EVENT_ATTR(cf_z17, NNPA_INST_OFFCHIP, 0x0111); +CPUMF_EVENT_ATTR(cf_z17, NNPA_INST_DIFF, 0x0112); +CPUMF_EVENT_ATTR(cf_z17, NNPA_4K_PREFETCH, 0x0114); +CPUMF_EVENT_ATTR(cf_z17, NNPA_COMPL_LOCK, 0x0115); +CPUMF_EVENT_ATTR(cf_z17, NNPA_RETRY_LOCK, 0x0116); +CPUMF_EVENT_ATTR(cf_z17, NNPA_RETRY_LOCK_WITH_PLO, 0x0117); +CPUMF_EVENT_ATTR(cf_z17, MT_DIAG_CYCLES_ONE_THR_ACTIVE, 0x01c0); +CPUMF_EVENT_ATTR(cf_z17, MT_DIAG_CYCLES_TWO_THR_ACTIVE, 0x01c1); static struct attribute *cpumcf_fvn1_pmu_event_attr[] __initdata = { CPUMF_EVENT_PTR(cf_fvn1, CPU_CYCLES), @@ -414,7 +490,7 @@ NULL, }; -static struct attribute *cpumcf_svn_67_pmu_event_attr[] __initdata = { +static struct attribute *cpumcf_svn_678_pmu_event_attr[] __initdata = { CPUMF_EVENT_PTR(cf_svn_12345, PRNG_FUNCTIONS), CPUMF_EVENT_PTR(cf_svn_12345, PRNG_CYCLES), CPUMF_EVENT_PTR(cf_svn_12345, PRNG_BLOCKED_FUNCTIONS), @@ -779,6 +855,87 @@ NULL, }; +static struct attribute *cpumcf_z17_pmu_event_attr[] __initdata = { + CPUMF_EVENT_PTR(cf_z17, L1D_RO_EXCL_WRITES), + CPUMF_EVENT_PTR(cf_z17, DTLB2_WRITES), + CPUMF_EVENT_PTR(cf_z17, DTLB2_MISSES), + CPUMF_EVENT_PTR(cf_z17, CRSTE_1MB_WRITES), + CPUMF_EVENT_PTR(cf_z17, DTLB2_GPAGE_WRITES), + CPUMF_EVENT_PTR(cf_z17, ITLB2_WRITES), + CPUMF_EVENT_PTR(cf_z17, ITLB2_MISSES), + CPUMF_EVENT_PTR(cf_z17, TLB2_PTE_WRITES), + CPUMF_EVENT_PTR(cf_z17, TLB2_CRSTE_WRITES), + CPUMF_EVENT_PTR(cf_z17, TLB2_ENGINES_BUSY), + CPUMF_EVENT_PTR(cf_z17, TX_C_TEND), + CPUMF_EVENT_PTR(cf_z17, TX_NC_TEND), + CPUMF_EVENT_PTR(cf_z17, L1C_TLB2_MISSES), + CPUMF_EVENT_PTR(cf_z17, DCW_REQ), + CPUMF_EVENT_PTR(cf_z17, DCW_REQ_IV), + CPUMF_EVENT_PTR(cf_z17, DCW_REQ_CHIP_HIT), + CPUMF_EVENT_PTR(cf_z17, DCW_REQ_DRAWER_HIT), + CPUMF_EVENT_PTR(cf_z17, DCW_ON_CHIP), + CPUMF_EVENT_PTR(cf_z17, DCW_ON_CHIP_IV), + CPUMF_EVENT_PTR(cf_z17, DCW_ON_CHIP_CHIP_HIT), + CPUMF_EVENT_PTR(cf_z17, DCW_ON_CHIP_DRAWER_HIT), + CPUMF_EVENT_PTR(cf_z17, DCW_ON_MODULE), + CPUMF_EVENT_PTR(cf_z17, DCW_ON_DRAWER), + CPUMF_EVENT_PTR(cf_z17, DCW_OFF_DRAWER), + CPUMF_EVENT_PTR(cf_z17, DCW_ON_CHIP_MEMORY), + CPUMF_EVENT_PTR(cf_z17, DCW_ON_MODULE_MEMORY), + CPUMF_EVENT_PTR(cf_z17, DCW_ON_DRAWER_MEMORY), + CPUMF_EVENT_PTR(cf_z17, DCW_OFF_DRAWER_MEMORY), + CPUMF_EVENT_PTR(cf_z17, IDCW_ON_MODULE_IV), + CPUMF_EVENT_PTR(cf_z17, IDCW_ON_MODULE_CHIP_HIT), + CPUMF_EVENT_PTR(cf_z17, IDCW_ON_MODULE_DRAWER_HIT), + CPUMF_EVENT_PTR(cf_z17, IDCW_ON_DRAWER_IV), + CPUMF_EVENT_PTR(cf_z17, IDCW_ON_DRAWER_CHIP_HIT), + CPUMF_EVENT_PTR(cf_z17, IDCW_ON_DRAWER_DRAWER_HIT), + CPUMF_EVENT_PTR(cf_z17, IDCW_OFF_DRAWER_IV), + CPUMF_EVENT_PTR(cf_z17, IDCW_OFF_DRAWER_CHIP_HIT), + CPUMF_EVENT_PTR(cf_z17, IDCW_OFF_DRAWER_DRAWER_HIT), + CPUMF_EVENT_PTR(cf_z17, ICW_REQ), + CPUMF_EVENT_PTR(cf_z17, ICW_REQ_IV), + CPUMF_EVENT_PTR(cf_z17, ICW_REQ_CHIP_HIT), + CPUMF_EVENT_PTR(cf_z17, ICW_REQ_DRAWER_HIT), + CPUMF_EVENT_PTR(cf_z17, ICW_ON_CHIP), + CPUMF_EVENT_PTR(cf_z17, ICW_ON_CHIP_IV), + CPUMF_EVENT_PTR(cf_z17, ICW_ON_CHIP_CHIP_HIT), + CPUMF_EVENT_PTR(cf_z17, ICW_ON_CHIP_DRAWER_HIT), + CPUMF_EVENT_PTR(cf_z17, ICW_ON_MODULE), + CPUMF_EVENT_PTR(cf_z17, ICW_ON_DRAWER), + CPUMF_EVENT_PTR(cf_z17, ICW_OFF_DRAWER), + CPUMF_EVENT_PTR(cf_z17, CYCLES_SAMETHRD), + CPUMF_EVENT_PTR(cf_z17, CYCLES_DIFFTHRD), + CPUMF_EVENT_PTR(cf_z17, INST_SAMETHRD), + CPUMF_EVENT_PTR(cf_z17, INST_DIFFTHRD), + CPUMF_EVENT_PTR(cf_z17, WRONG_BRANCH_PREDICTION), + CPUMF_EVENT_PTR(cf_z17, VX_BCD_EXECUTION_SLOTS), + CPUMF_EVENT_PTR(cf_z17, DECIMAL_INSTRUCTIONS), + CPUMF_EVENT_PTR(cf_z17, LAST_HOST_TRANSLATIONS), + CPUMF_EVENT_PTR(cf_z17, TX_NC_TABORT), + CPUMF_EVENT_PTR(cf_z17, TX_C_TABORT_NO_SPECIAL), + CPUMF_EVENT_PTR(cf_z17, TX_C_TABORT_SPECIAL), + CPUMF_EVENT_PTR(cf_z17, DFLT_ACCESS), + CPUMF_EVENT_PTR(cf_z17, DFLT_CYCLES), + CPUMF_EVENT_PTR(cf_z17, SORTL), + CPUMF_EVENT_PTR(cf_z17, DFLT_CC), + CPUMF_EVENT_PTR(cf_z17, DFLT_CCFINISH), + CPUMF_EVENT_PTR(cf_z17, NNPA_INVOCATIONS), + CPUMF_EVENT_PTR(cf_z17, NNPA_COMPLETIONS), + CPUMF_EVENT_PTR(cf_z17, NNPA_WAIT_LOCK), + CPUMF_EVENT_PTR(cf_z17, NNPA_HOLD_LOCK), + CPUMF_EVENT_PTR(cf_z17, NNPA_INST_ONCHIP), + CPUMF_EVENT_PTR(cf_z17, NNPA_INST_OFFCHIP), + CPUMF_EVENT_PTR(cf_z17, NNPA_INST_DIFF), + CPUMF_EVENT_PTR(cf_z17, NNPA_4K_PREFETCH), + CPUMF_EVENT_PTR(cf_z17, NNPA_COMPL_LOCK), + CPUMF_EVENT_PTR(cf_z17, NNPA_RETRY_LOCK), + CPUMF_EVENT_PTR(cf_z17, NNPA_RETRY_LOCK_WITH_PLO), + CPUMF_EVENT_PTR(cf_z17, MT_DIAG_CYCLES_ONE_THR_ACTIVE), + CPUMF_EVENT_PTR(cf_z17, MT_DIAG_CYCLES_TWO_THR_ACTIVE), + NULL, +}; + /* END: CPUM_CF COUNTER DEFINITIONS ===================================== */ static struct attribute_group cpumcf_pmu_events_group = { @@ -855,16 +1012,11 @@ } /* Determine version specific crypto set */ - switch (ci.csvn) { - case 1 ... 5: + csvn = none; + if (ci.csvn >= 1 && ci.csvn <= 5) csvn = cpumcf_svn_12345_pmu_event_attr; - break; - case 6 ... 7: - csvn = cpumcf_svn_67_pmu_event_attr; - break; - default: - csvn = none; - } + else if (ci.csvn >= 6) + csvn = cpumcf_svn_678_pmu_event_attr; /* Determine model-specific counter set(s) */ get_cpu_id(&cpu_id); @@ -897,6 +1049,10 @@ case 0x3932: model = cpumcf_z16_pmu_event_attr; break; + case 0x9175: + case 0x9176: + model = cpumcf_z17_pmu_event_attr; + break; default: model = none; break; --- linux-xilinx-6.8.0.orig/arch/s390/kernel/perf_cpum_sf.c +++ linux-xilinx-6.8.0/arch/s390/kernel/perf_cpum_sf.c @@ -1463,7 +1463,7 @@ unsigned long range, i, range_scan, idx, head, base, offset; struct hws_trailer_entry *te; - if (WARN_ON_ONCE(handle->head & ~PAGE_MASK)) + if (handle->head & ~PAGE_MASK) return -EINVAL; aux->head = handle->head >> PAGE_SHIFT; @@ -1642,7 +1642,7 @@ unsigned long num_sdb; aux = perf_get_aux(handle); - if (WARN_ON_ONCE(!aux)) + if (!aux) return; /* Inform user space new data arrived */ @@ -1661,7 +1661,7 @@ num_sdb); break; } - if (WARN_ON_ONCE(!aux)) + if (!aux) return; /* Update head and alert_mark to new position */ @@ -1896,12 +1896,8 @@ { struct cpu_hw_sf *cpuhw = this_cpu_ptr(&cpu_hw_sf); - if (WARN_ON_ONCE(!(event->hw.state & PERF_HES_STOPPED))) + if (!(event->hw.state & PERF_HES_STOPPED)) return; - - if (flags & PERF_EF_RELOAD) - WARN_ON_ONCE(!(event->hw.state & PERF_HES_UPTODATE)); - perf_pmu_disable(event->pmu); event->hw.state = 0; cpuhw->lsctl.cs = 1; @@ -1926,7 +1922,9 @@ event->hw.state |= PERF_HES_STOPPED; if ((flags & PERF_EF_UPDATE) && !(event->hw.state & PERF_HES_UPTODATE)) { - hw_perf_event_update(event, 1); + /* CPU hotplug off removes SDBs. No samples to extract. */ + if (cpuhw->flags & PMU_F_RESERVED) + hw_perf_event_update(event, 1); event->hw.state |= PERF_HES_UPTODATE; } perf_pmu_enable(event->pmu); --- linux-xilinx-6.8.0.orig/arch/s390/kernel/perf_event.c +++ linux-xilinx-6.8.0/arch/s390/kernel/perf_event.c @@ -218,39 +218,7 @@ void perf_callchain_user(struct perf_callchain_entry_ctx *entry, struct pt_regs *regs) { - struct stack_frame_user __user *sf; - unsigned long ip, sp; - bool first = true; - - if (is_compat_task()) - return; - perf_callchain_store(entry, instruction_pointer(regs)); - sf = (void __user *)user_stack_pointer(regs); - pagefault_disable(); - while (entry->nr < entry->max_stack) { - if (__get_user(sp, &sf->back_chain)) - break; - if (__get_user(ip, &sf->gprs[8])) - break; - if (ip & 0x1) { - /* - * If the instruction address is invalid, and this - * is the first stack frame, assume r14 has not - * been written to the stack yet. Otherwise exit. - */ - if (first && !(regs->gprs[14] & 0x1)) - ip = regs->gprs[14]; - else - break; - } - perf_callchain_store(entry, ip); - /* Sanity check: ABI requires SP to be aligned 8 bytes. */ - if (!sp || sp & 0x7) - break; - sf = (void __user *)sp; - first = false; - } - pagefault_enable(); + arch_stack_walk_user_common(NULL, NULL, entry, regs, true); } /* Perf definitions for PMU event attributes in sysfs */ --- linux-xilinx-6.8.0.orig/arch/s390/kernel/perf_pai_crypto.c +++ linux-xilinx-6.8.0/arch/s390/kernel/perf_pai_crypto.c @@ -90,7 +90,6 @@ event->cpu); struct paicrypt_map *cpump = mp->mapptr; - cpump->event = NULL; static_branch_dec(&pai_key); mutex_lock(&pai_reserve_mutex); debug_sprintf_event(cfm_dbg, 5, "%s event %#llx cpu %d users %d" @@ -348,10 +347,15 @@ static void paicrypt_stop(struct perf_event *event, int flags) { - if (!event->attr.sample_period) /* Counting */ + struct paicrypt_mapptr *mp = this_cpu_ptr(paicrypt_root.mapptr); + struct paicrypt_map *cpump = mp->mapptr; + + if (!event->attr.sample_period) { /* Counting */ paicrypt_read(event); - else /* Sampling */ + } else { /* Sampling */ perf_sched_cb_dec(event->pmu); + cpump->event = NULL; + } event->hw.state = PERF_HES_STOPPED; } @@ -421,7 +425,7 @@ if (event->attr.sample_type & PERF_SAMPLE_RAW) { raw.frag.size = rawsize; raw.frag.data = cpump->save; - perf_sample_save_raw_data(&data, &raw); + perf_sample_save_raw_data(&data, event, &raw); } overflow = perf_event_overflow(event, &data, ®s); @@ -721,7 +725,7 @@ for (i = 0; i < ARRAY_SIZE(paicrypt_ctrnames); i++) { ret = attr_event_init_one(attrs, i); if (ret) { - attr_event_free(attrs, i - 1); + attr_event_free(attrs, i); return ret; } } --- linux-xilinx-6.8.0.orig/arch/s390/kernel/perf_pai_ext.c +++ linux-xilinx-6.8.0/arch/s390/kernel/perf_pai_ext.c @@ -121,7 +121,6 @@ struct paiext_map *cpump = mp->mapptr; mutex_lock(&paiext_reserve_mutex); - cpump->event = NULL; if (refcount_dec_and_test(&cpump->refcnt)) /* Last reference gone */ paiext_free(mp); paiext_root_free(); @@ -355,10 +354,15 @@ static void paiext_stop(struct perf_event *event, int flags) { - if (!event->attr.sample_period) /* Counting */ + struct paiext_mapptr *mp = this_cpu_ptr(paiext_root.mapptr); + struct paiext_map *cpump = mp->mapptr; + + if (!event->attr.sample_period) { /* Counting */ paiext_read(event); - else /* Sampling */ + } else { /* Sampling */ perf_sched_cb_dec(event->pmu); + cpump->event = NULL; + } event->hw.state = PERF_HES_STOPPED; } @@ -441,7 +445,7 @@ if (event->attr.sample_type & PERF_SAMPLE_RAW) { raw.frag.size = rawsize; raw.frag.data = cpump->save; - perf_sample_save_raw_data(&data, &raw); + perf_sample_save_raw_data(&data, event, &raw); } overflow = perf_event_overflow(event, &data, ®s); @@ -611,7 +615,7 @@ for (i = 0; i < ARRAY_SIZE(paiext_ctrnames); i++) { ret = attr_event_init_one(attrs, i); if (ret) { - attr_event_free(attrs, i - 1); + attr_event_free(attrs, i); return ret; } } --- linux-xilinx-6.8.0.orig/arch/s390/kernel/processor.c +++ linux-xilinx-6.8.0/arch/s390/kernel/processor.c @@ -274,6 +274,10 @@ case 0x3932: strcpy(elf_platform, "z16"); break; + case 0x9175: + case 0x9176: + strcpy(elf_platform, "z17"); + break; } return 0; } --- linux-xilinx-6.8.0.orig/arch/s390/kernel/setup.c +++ linux-xilinx-6.8.0/arch/s390/kernel/setup.c @@ -51,6 +51,7 @@ #include #include #include +#include #include #include @@ -155,7 +156,7 @@ EXPORT_SYMBOL(zlib_dfltcc_support); u64 __bootdata_preserved(stfle_fac_list[16]); EXPORT_SYMBOL(stfle_fac_list); -u64 __bootdata_preserved(alt_stfle_fac_list[16]); +u64 alt_stfle_fac_list[16]; struct oldmem_data __bootdata_preserved(oldmem_data); unsigned long VMALLOC_START; @@ -891,6 +892,9 @@ log_component_list(); + if (ipl_get_secureboot()) + security_lock_kernel_down("Secure IPL mode", LOCKDOWN_INTEGRITY_MAX); + /* Have one command line that is parsed and saved in /proc/cmdline */ /* boot_command_line has been already set up in early.c */ *cmdline_p = boot_command_line; --- linux-xilinx-6.8.0.orig/arch/s390/kernel/stacktrace.c +++ linux-xilinx-6.8.0/arch/s390/kernel/stacktrace.c @@ -5,6 +5,7 @@ * Copyright IBM Corp. 2006 */ +#include #include #include #include @@ -62,42 +63,102 @@ return 0; } -void arch_stack_walk_user(stack_trace_consume_fn consume_entry, void *cookie, - const struct pt_regs *regs) +static inline bool store_ip(stack_trace_consume_fn consume_entry, void *cookie, + struct perf_callchain_entry_ctx *entry, bool perf, + unsigned long ip) +{ +#ifdef CONFIG_PERF_EVENTS + if (perf) { + if (perf_callchain_store(entry, ip)) + return false; + return true; + } +#endif + return consume_entry(cookie, ip); +} + +static inline bool ip_invalid(unsigned long ip) { + /* + * Perform some basic checks if an instruction address taken + * from unreliable source is invalid. + */ + if (ip & 1) + return true; + if (ip < mmap_min_addr) + return true; + if (ip >= current->mm->context.asce_limit) + return true; + return false; +} + +static inline bool ip_within_vdso(unsigned long ip) +{ + return in_range(ip, current->mm->context.vdso_base, vdso_text_size()); +} + +void arch_stack_walk_user_common(stack_trace_consume_fn consume_entry, void *cookie, + struct perf_callchain_entry_ctx *entry, + const struct pt_regs *regs, bool perf) +{ + struct stack_frame_vdso_wrapper __user *sf_vdso; struct stack_frame_user __user *sf; unsigned long ip, sp; bool first = true; if (is_compat_task()) return; - if (!consume_entry(cookie, instruction_pointer(regs))) + if (!current->mm) + return; + ip = instruction_pointer(regs); + if (!store_ip(consume_entry, cookie, entry, perf, ip)) return; sf = (void __user *)user_stack_pointer(regs); pagefault_disable(); while (1) { if (__get_user(sp, &sf->back_chain)) break; - if (__get_user(ip, &sf->gprs[8])) + /* + * VDSO entry code has a non-standard stack frame layout. + * See VDSO user wrapper code for details. + */ + if (!sp && ip_within_vdso(ip)) { + sf_vdso = (void __user *)sf; + if (__get_user(ip, &sf_vdso->return_address)) + break; + sp = (unsigned long)sf + STACK_FRAME_VDSO_OVERHEAD; + sf = (void __user *)sp; + if (__get_user(sp, &sf->back_chain)) + break; + } else { + sf = (void __user *)sp; + if (__get_user(ip, &sf->gprs[8])) + break; + } + /* Sanity check: ABI requires SP to be 8 byte aligned. */ + if (sp & 0x7) break; - if (ip & 0x1) { + if (ip_invalid(ip)) { /* * If the instruction address is invalid, and this * is the first stack frame, assume r14 has not * been written to the stack yet. Otherwise exit. */ - if (first && !(regs->gprs[14] & 0x1)) - ip = regs->gprs[14]; - else + if (!first) + break; + ip = regs->gprs[14]; + if (ip_invalid(ip)) break; } - if (!consume_entry(cookie, ip)) + if (!store_ip(consume_entry, cookie, entry, perf, ip)) break; - /* Sanity check: ABI requires SP to be aligned 8 bytes. */ - if (!sp || sp & 0x7) - break; - sf = (void __user *)sp; first = false; } pagefault_enable(); } + +void arch_stack_walk_user(stack_trace_consume_fn consume_entry, void *cookie, + const struct pt_regs *regs) +{ + arch_stack_walk_user_common(consume_entry, cookie, NULL, regs, false); +} --- linux-xilinx-6.8.0.orig/arch/s390/kernel/syscalls/Makefile +++ linux-xilinx-6.8.0/arch/s390/kernel/syscalls/Makefile @@ -12,7 +12,7 @@ uapi-hdrs-y := $(uapi)/unistd_32.h uapi-hdrs-y += $(uapi)/unistd_64.h -targets += $(addprefix ../../../,$(gen-y) $(kapi-hdrs-y) $(uapi-hdrs-y)) +targets += $(addprefix ../../../../,$(gen-y) $(kapi-hdrs-y) $(uapi-hdrs-y)) PHONY += kapi uapi --- linux-xilinx-6.8.0.orig/arch/s390/kernel/syscalls/syscall.tbl +++ linux-xilinx-6.8.0/arch/s390/kernel/syscalls/syscall.tbl @@ -418,7 +418,7 @@ 412 32 utimensat_time64 - sys_utimensat 413 32 pselect6_time64 - compat_sys_pselect6_time64 414 32 ppoll_time64 - compat_sys_ppoll_time64 -416 32 io_pgetevents_time64 - sys_io_pgetevents +416 32 io_pgetevents_time64 - compat_sys_io_pgetevents_time64 417 32 recvmmsg_time64 - compat_sys_recvmmsg_time64 418 32 mq_timedsend_time64 - sys_mq_timedsend 419 32 mq_timedreceive_time64 - sys_mq_timedreceive --- linux-xilinx-6.8.0.orig/arch/s390/kernel/uv.c +++ linux-xilinx-6.8.0/arch/s390/kernel/uv.c @@ -181,36 +181,36 @@ } /* - * Calculate the expected ref_count for a page that would otherwise have no + * Calculate the expected ref_count for a folio that would otherwise have no * further pins. This was cribbed from similar functions in other places in * the kernel, but with some slight modifications. We know that a secure - * page can not be a huge page for example. + * folio can not be a large folio, for example. */ -static int expected_page_refs(struct page *page) +static int expected_folio_refs(struct folio *folio) { int res; - res = page_mapcount(page); - if (PageSwapCache(page)) { + res = folio_mapcount(folio); + if (folio_test_swapcache(folio)) { res++; - } else if (page_mapping(page)) { + } else if (folio_mapping(folio)) { res++; - if (page_has_private(page)) + if (folio->private) res++; } return res; } -static int make_page_secure(struct page *page, struct uv_cb_header *uvcb) +static int make_folio_secure(struct folio *folio, struct uv_cb_header *uvcb) { int expected, cc = 0; - if (PageWriteback(page)) + if (folio_test_writeback(folio)) return -EAGAIN; - expected = expected_page_refs(page); - if (!page_ref_freeze(page, expected)) + expected = expected_folio_refs(folio); + if (!folio_ref_freeze(folio, expected)) return -EBUSY; - set_bit(PG_arch_1, &page->flags); + set_bit(PG_arch_1, &folio->flags); /* * If the UVC does not succeed or fail immediately, we don't want to * loop for long, or we might get stall notifications. @@ -220,9 +220,9 @@ * -EAGAIN and we let the callers deal with it. */ cc = __uv_call(0, (u64)uvcb); - page_ref_unfreeze(page, expected); + folio_ref_unfreeze(folio, expected); /* - * Return -ENXIO if the page was not mapped, -EINVAL for other errors. + * Return -ENXIO if the folio was not mapped, -EINVAL for other errors. * If busy or partially completed, return -EAGAIN. */ if (cc == UVC_CC_OK) @@ -277,7 +277,7 @@ bool local_drain = false; spinlock_t *ptelock; unsigned long uaddr; - struct page *page; + struct folio *folio; pte_t *ptep; int rc; @@ -306,15 +306,26 @@ if (!ptep) goto out; if (pte_present(*ptep) && !(pte_val(*ptep) & _PAGE_INVALID) && pte_write(*ptep)) { - page = pte_page(*ptep); + folio = page_folio(pte_page(*ptep)); + rc = -EINVAL; + if (folio_test_large(folio)) + goto unlock; rc = -EAGAIN; - if (trylock_page(page)) { + if (folio_trylock(folio)) { if (should_export_before_import(uvcb, gmap->mm)) - uv_convert_from_secure(page_to_phys(page)); - rc = make_page_secure(page, uvcb); - unlock_page(page); + uv_convert_from_secure(PFN_PHYS(folio_pfn(folio))); + rc = make_folio_secure(folio, uvcb); + folio_unlock(folio); } + + /* + * Once we drop the PTL, the folio may get unmapped and + * freed immediately. We need a temporary reference. + */ + if (rc == -EAGAIN) + folio_get(folio); } +unlock: pte_unmap_unlock(ptep, ptelock); out: mmap_read_unlock(gmap->mm); @@ -324,10 +335,11 @@ * If we are here because the UVC returned busy or partial * completion, this is just a useless check, but it is safe. */ - wait_on_page_writeback(page); + folio_wait_writeback(folio); + folio_put(folio); } else if (rc == -EBUSY) { /* - * If we have tried a local drain and the page refcount + * If we have tried a local drain and the folio refcount * still does not match our expected safe value, try with a * system wide drain. This is needed if the pagevecs holding * the page are on a different CPU. @@ -338,7 +350,7 @@ return -EAGAIN; } /* - * We are here if the page refcount does not match the + * We are here if the folio refcount does not match the * expected safe value. The main culprits are usually * pagevecs. With lru_add_drain() we drain the pagevecs * on the local CPU so that hopefully the refcount will --- linux-xilinx-6.8.0.orig/arch/s390/kernel/vdso.c +++ linux-xilinx-6.8.0/arch/s390/kernel/vdso.c @@ -213,17 +213,22 @@ return addr; } -unsigned long vdso_size(void) +unsigned long vdso_text_size(void) { - unsigned long size = VVAR_NR_PAGES * PAGE_SIZE; + unsigned long size; if (is_compat_task()) - size += vdso32_end - vdso32_start; + size = vdso32_end - vdso32_start; else - size += vdso64_end - vdso64_start; + size = vdso64_end - vdso64_start; return PAGE_ALIGN(size); } +unsigned long vdso_size(void) +{ + return vdso_text_size() + VVAR_NR_PAGES * PAGE_SIZE; +} + int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp) { unsigned long addr = VDSO_BASE; --- linux-xilinx-6.8.0.orig/arch/s390/kernel/vdso32/Makefile +++ linux-xilinx-6.8.0/arch/s390/kernel/vdso32/Makefile @@ -19,10 +19,12 @@ KBUILD_AFLAGS_32 += -m31 -s KBUILD_CFLAGS_32 := $(filter-out -m64,$(KBUILD_CFLAGS)) +KBUILD_CFLAGS_32 := $(filter-out -mpacked-stack,$(KBUILD_CFLAGS)) KBUILD_CFLAGS_32 := $(filter-out -mno-pic-data-is-text-relative,$(KBUILD_CFLAGS_32)) -KBUILD_CFLAGS_32 += -m31 -fPIC -shared -fno-common -fno-builtin +KBUILD_CFLAGS_32 := $(filter-out -fno-asynchronous-unwind-tables,$(KBUILD_CFLAGS_32)) +KBUILD_CFLAGS_32 += -m31 -fPIC -shared -fno-common -fno-builtin -fasynchronous-unwind-tables -LDFLAGS_vdso32.so.dbg += -fPIC -shared -soname=linux-vdso32.so.1 \ +LDFLAGS_vdso32.so.dbg += -shared -soname=linux-vdso32.so.1 \ --hash-style=both --build-id=sha1 -melf_s390 -T $(targets:%=$(obj)/%.dbg): KBUILD_CFLAGS = $(KBUILD_CFLAGS_32) --- linux-xilinx-6.8.0.orig/arch/s390/kernel/vdso64/Makefile +++ linux-xilinx-6.8.0/arch/s390/kernel/vdso64/Makefile @@ -24,9 +24,12 @@ KBUILD_AFLAGS_64 += -m64 KBUILD_CFLAGS_64 := $(filter-out -m64,$(KBUILD_CFLAGS)) +KBUILD_CFLAGS_64 := $(filter-out -mpacked-stack,$(KBUILD_CFLAGS_64)) KBUILD_CFLAGS_64 := $(filter-out -mno-pic-data-is-text-relative,$(KBUILD_CFLAGS_64)) -KBUILD_CFLAGS_64 += -m64 -fPIC -fno-common -fno-builtin -ldflags-y := -fPIC -shared -soname=linux-vdso64.so.1 \ +KBUILD_CFLAGS_64 := $(filter-out -munaligned-symbols,$(KBUILD_CFLAGS_64)) +KBUILD_CFLAGS_64 := $(filter-out -fno-asynchronous-unwind-tables,$(KBUILD_CFLAGS_64)) +KBUILD_CFLAGS_64 += -m64 -fPIC -fno-common -fno-builtin -fasynchronous-unwind-tables +ldflags-y := -shared -soname=linux-vdso64.so.1 \ --hash-style=both --build-id=sha1 -T $(targets:%=$(obj)/%.dbg): KBUILD_CFLAGS = $(KBUILD_CFLAGS_64) --- linux-xilinx-6.8.0.orig/arch/s390/kernel/vdso64/vdso_user_wrapper.S +++ linux-xilinx-6.8.0/arch/s390/kernel/vdso64/vdso_user_wrapper.S @@ -6,8 +6,6 @@ #include #include -#define WRAPPER_FRAME_SIZE (STACK_FRAME_OVERHEAD+8) - /* * Older glibc version called vdso without allocating a stackframe. This wrapper * is just used to allocate a stackframe. See @@ -20,14 +18,17 @@ __ALIGN __kernel_\func: CFI_STARTPROC - aghi %r15,-WRAPPER_FRAME_SIZE - CFI_DEF_CFA_OFFSET (STACK_FRAME_OVERHEAD + WRAPPER_FRAME_SIZE) - CFI_VAL_OFFSET 15, -STACK_FRAME_OVERHEAD - stg %r14,STACK_FRAME_OVERHEAD(%r15) + aghi %r15,-STACK_FRAME_VDSO_OVERHEAD + CFI_DEF_CFA_OFFSET (STACK_FRAME_USER_OVERHEAD + STACK_FRAME_VDSO_OVERHEAD) + CFI_VAL_OFFSET 15,-STACK_FRAME_USER_OVERHEAD + stg %r14,__SFVDSO_RETURN_ADDRESS(%r15) + CFI_REL_OFFSET 14,__SFVDSO_RETURN_ADDRESS + xc __SFUSER_BACKCHAIN(8,%r15),__SFUSER_BACKCHAIN(%r15) brasl %r14,__s390_vdso_\func - lg %r14,STACK_FRAME_OVERHEAD(%r15) - aghi %r15,WRAPPER_FRAME_SIZE - CFI_DEF_CFA_OFFSET STACK_FRAME_OVERHEAD + lg %r14,__SFVDSO_RETURN_ADDRESS(%r15) + CFI_RESTORE 14 + aghi %r15,STACK_FRAME_VDSO_OVERHEAD + CFI_DEF_CFA_OFFSET STACK_FRAME_USER_OVERHEAD CFI_RESTORE 15 br %r14 CFI_ENDPROC --- linux-xilinx-6.8.0.orig/arch/s390/kernel/vmlinux.lds.S +++ linux-xilinx-6.8.0/arch/s390/kernel/vmlinux.lds.S @@ -72,6 +72,15 @@ . = ALIGN(PAGE_SIZE); __end_ro_after_init = .; + .data.rel.ro : { + *(.data.rel.ro .data.rel.ro.*) + } + .got : { + __got_start = .; + *(.got) + __got_end = .; + } + RW_DATA(0x100, PAGE_SIZE, THREAD_SIZE) BOOT_DATA_PRESERVED --- linux-xilinx-6.8.0.orig/arch/s390/kernel/vtime.c +++ linux-xilinx-6.8.0/arch/s390/kernel/vtime.c @@ -210,13 +210,13 @@ virt_timer_expire(); steal = S390_lowcore.steal_timer; - avg_steal = S390_lowcore.avg_steal_timer / 2; + avg_steal = S390_lowcore.avg_steal_timer; if ((s64) steal > 0) { S390_lowcore.steal_timer = 0; account_steal_time(cputime_to_nsecs(steal)); avg_steal += steal; } - S390_lowcore.avg_steal_timer = avg_steal; + S390_lowcore.avg_steal_timer = avg_steal / 2; } static u64 vtime_delta(void) --- linux-xilinx-6.8.0.orig/arch/s390/kvm/diag.c +++ linux-xilinx-6.8.0/arch/s390/kvm/diag.c @@ -77,7 +77,7 @@ vcpu->stat.instruction_diagnose_258++; if (vcpu->run->s.regs.gprs[rx] & 7) return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); - rc = read_guest(vcpu, vcpu->run->s.regs.gprs[rx], rx, &parm, sizeof(parm)); + rc = read_guest_real(vcpu, vcpu->run->s.regs.gprs[rx], &parm, sizeof(parm)); if (rc) return kvm_s390_inject_prog_cond(vcpu, rc); if (parm.parm_version != 2 || parm.parm_len < 5 || parm.code != 0x258) --- linux-xilinx-6.8.0.orig/arch/s390/kvm/gaccess.c +++ linux-xilinx-6.8.0/arch/s390/kvm/gaccess.c @@ -984,6 +984,8 @@ const gfn_t gfn = gpa_to_gfn(gpa); int rc; + if (!gfn_to_memslot(kvm, gfn)) + return PGM_ADDRESSING; if (mode == GACC_STORE) rc = kvm_write_guest_page(kvm, gfn, data, offset, len); else @@ -1141,6 +1143,8 @@ gra += fragment_len; data += fragment_len; } + if (rc > 0) + vcpu->arch.pgm.code = rc; return rc; } --- linux-xilinx-6.8.0.orig/arch/s390/kvm/gaccess.h +++ linux-xilinx-6.8.0/arch/s390/kvm/gaccess.h @@ -405,11 +405,12 @@ * @len: number of bytes to copy * * Copy @len bytes from @data (kernel space) to @gra (guest real address). - * It is up to the caller to ensure that the entire guest memory range is - * valid memory before calling this function. * Guest low address and key protection are not checked. * - * Returns zero on success or -EFAULT on error. + * Returns zero on success, -EFAULT when copying from @data failed, or + * PGM_ADRESSING in case @gra is outside a memslot. In this case, pgm check info + * is also stored to allow injecting into the guest (if applicable) using + * kvm_s390_inject_prog_cond(). * * If an error occurs data may have been copied partially to guest memory. */ @@ -428,11 +429,12 @@ * @len: number of bytes to copy * * Copy @len bytes from @gra (guest real address) to @data (kernel space). - * It is up to the caller to ensure that the entire guest memory range is - * valid memory before calling this function. * Guest key protection is not checked. * - * Returns zero on success or -EFAULT on error. + * Returns zero on success, -EFAULT when copying to @data failed, or + * PGM_ADRESSING in case @gra is outside a memslot. In this case, pgm check info + * is also stored to allow injecting into the guest (if applicable) using + * kvm_s390_inject_prog_cond(). * * If an error occurs data may have been copied partially to kernel space. */ --- linux-xilinx-6.8.0.orig/arch/s390/kvm/kvm-s390.c +++ linux-xilinx-6.8.0/arch/s390/kvm/kvm-s390.c @@ -132,6 +132,7 @@ STATS_DESC_COUNTER(VCPU, instruction_io_other), STATS_DESC_COUNTER(VCPU, instruction_lpsw), STATS_DESC_COUNTER(VCPU, instruction_lpswe), + STATS_DESC_COUNTER(VCPU, instruction_lpswey), STATS_DESC_COUNTER(VCPU, instruction_pfmf), STATS_DESC_COUNTER(VCPU, instruction_ptff), STATS_DESC_COUNTER(VCPU, instruction_sck), @@ -2631,9 +2632,7 @@ if (r) break; - mmap_write_lock(current->mm); - r = gmap_mark_unmergeable(); - mmap_write_unlock(current->mm); + r = s390_disable_cow_sharing(); if (r) break; @@ -5045,7 +5044,7 @@ if (vcpu->kvm->arch.pv.dumping) return -EINVAL; - if (kvm_run->immediate_exit) + if (!vcpu->wants_to_run) return -EINTR; if (kvm_run->kvm_valid_regs & ~KVM_SYNC_S390_VALID_FIELDS || @@ -5761,6 +5760,9 @@ { gpa_t size; + if (kvm_is_ucontrol(kvm)) + return -EINVAL; + /* When we are protected, we should not change the memory slots */ if (kvm_s390_pv_get_handle(kvm)) return -EINVAL; --- linux-xilinx-6.8.0.orig/arch/s390/kvm/kvm-s390.h +++ linux-xilinx-6.8.0/arch/s390/kvm/kvm-s390.h @@ -120,6 +120,21 @@ return (base2 ? vcpu->run->s.regs.gprs[base2] : 0) + disp2; } +static inline u64 kvm_s390_get_base_disp_siy(struct kvm_vcpu *vcpu, u8 *ar) +{ + u32 base1 = vcpu->arch.sie_block->ipb >> 28; + s64 disp1; + + /* The displacement is a 20bit _SIGNED_ value */ + disp1 = sign_extend64(((vcpu->arch.sie_block->ipb & 0x0fff0000) >> 16) + + ((vcpu->arch.sie_block->ipb & 0xff00) << 4), 19); + + if (ar) + *ar = base1; + + return (base1 ? vcpu->run->s.regs.gprs[base1] : 0) + disp1; +} + static inline void kvm_s390_get_base_disp_sse(struct kvm_vcpu *vcpu, u64 *address1, u64 *address2, u8 *ar_b1, u8 *ar_b2) @@ -234,7 +249,12 @@ static inline u32 kvm_s390_get_gisa_desc(struct kvm *kvm) { - u32 gd = virt_to_phys(kvm->arch.gisa_int.origin); + u32 gd; + + if (!kvm->arch.gisa_int.origin) + return 0; + + gd = virt_to_phys(kvm->arch.gisa_int.origin); if (gd && sclp.has_gisaf) gd |= GISA_FORMAT1; --- linux-xilinx-6.8.0.orig/arch/s390/kvm/priv.c +++ linux-xilinx-6.8.0/arch/s390/kvm/priv.c @@ -797,6 +797,36 @@ return 0; } +static int handle_lpswey(struct kvm_vcpu *vcpu) +{ + psw_t new_psw; + u64 addr; + int rc; + u8 ar; + + vcpu->stat.instruction_lpswey++; + + if (!test_kvm_facility(vcpu->kvm, 193)) + return kvm_s390_inject_program_int(vcpu, PGM_OPERATION); + + if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) + return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); + + addr = kvm_s390_get_base_disp_siy(vcpu, &ar); + if (addr & 7) + return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); + + rc = read_guest(vcpu, addr, ar, &new_psw, sizeof(new_psw)); + if (rc) + return kvm_s390_inject_prog_cond(vcpu, rc); + + vcpu->arch.sie_block->gpsw = new_psw; + if (!is_valid_psw(&vcpu->arch.sie_block->gpsw)) + return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); + + return 0; +} + static int handle_stidp(struct kvm_vcpu *vcpu) { u64 stidp_data = vcpu->kvm->arch.model.cpuid; @@ -1462,6 +1492,8 @@ case 0x61: case 0x62: return handle_ri(vcpu); + case 0x71: + return handle_lpswey(vcpu); default: return -EOPNOTSUPP; } --- linux-xilinx-6.8.0.orig/arch/s390/kvm/vsie.c +++ linux-xilinx-6.8.0/arch/s390/kvm/vsie.c @@ -1350,8 +1350,14 @@ page = radix_tree_lookup(&kvm->arch.vsie.addr_to_page, addr >> 9); rcu_read_unlock(); if (page) { - if (page_ref_inc_return(page) == 2) - return page_to_virt(page); + if (page_ref_inc_return(page) == 2) { + if (page->index == addr) + return page_to_virt(page); + /* + * We raced with someone reusing + putting this vsie + * page before we grabbed it. + */ + } page_ref_dec(page); } @@ -1381,15 +1387,20 @@ kvm->arch.vsie.next++; kvm->arch.vsie.next %= nr_vcpus; } - radix_tree_delete(&kvm->arch.vsie.addr_to_page, page->index >> 9); + if (page->index != ULONG_MAX) + radix_tree_delete(&kvm->arch.vsie.addr_to_page, + page->index >> 9); } - page->index = addr; - /* double use of the same address */ + /* Mark it as invalid until it resides in the tree. */ + page->index = ULONG_MAX; + + /* Double use of the same address or allocation failure. */ if (radix_tree_insert(&kvm->arch.vsie.addr_to_page, addr >> 9, page)) { page_ref_dec(page); mutex_unlock(&kvm->arch.vsie.mutex); return NULL; } + page->index = addr; mutex_unlock(&kvm->arch.vsie.mutex); vsie_page = page_to_virt(page); @@ -1482,7 +1493,9 @@ vsie_page = page_to_virt(page); release_gmap_shadow(vsie_page); /* free the radix tree entry */ - radix_tree_delete(&kvm->arch.vsie.addr_to_page, page->index >> 9); + if (page->index != ULONG_MAX) + radix_tree_delete(&kvm->arch.vsie.addr_to_page, + page->index >> 9); __free_page(page); } kvm->arch.vsie.page_count = 0; --- linux-xilinx-6.8.0.orig/arch/s390/mm/cmm.c +++ linux-xilinx-6.8.0/arch/s390/mm/cmm.c @@ -95,11 +95,12 @@ (*counter)++; spin_unlock(&cmm_lock); nr--; + cond_resched(); } return nr; } -static long cmm_free_pages(long nr, long *counter, struct cmm_page_array **list) +static long __cmm_free_pages(long nr, long *counter, struct cmm_page_array **list) { struct cmm_page_array *pa; unsigned long addr; @@ -123,6 +124,21 @@ return nr; } +static long cmm_free_pages(long nr, long *counter, struct cmm_page_array **list) +{ + long inc = 0; + + while (nr) { + inc = min(256L, nr); + nr -= inc; + inc = __cmm_free_pages(inc, counter, list); + if (inc) + break; + cond_resched(); + } + return nr + inc; +} + static int cmm_oom_notify(struct notifier_block *self, unsigned long dummy, void *parm) { --- linux-xilinx-6.8.0.orig/arch/s390/mm/fault.c +++ linux-xilinx-6.8.0/arch/s390/mm/fault.c @@ -430,12 +430,13 @@ handle_fault_error_nolock(regs, 0); else do_sigsegv(regs, SEGV_MAPERR); - } else if (fault & VM_FAULT_SIGBUS) { + } else if (fault & (VM_FAULT_SIGBUS | VM_FAULT_HWPOISON)) { if (!user_mode(regs)) handle_fault_error_nolock(regs, 0); else do_sigbus(regs); } else { + pr_emerg("Unexpected fault flags: %08x\n", fault); BUG(); } } --- linux-xilinx-6.8.0.orig/arch/s390/mm/gmap.c +++ linux-xilinx-6.8.0/arch/s390/mm/gmap.c @@ -596,7 +596,7 @@ pud = pud_offset(p4d, vmaddr); VM_BUG_ON(pud_none(*pud)); /* large puds cannot yet be handled */ - if (pud_large(*pud)) + if (pud_leaf(*pud)) return -EFAULT; pmd = pmd_offset(pud, vmaddr); VM_BUG_ON(pmd_none(*pmd)); @@ -2548,41 +2548,6 @@ #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ /* - * Remove all empty zero pages from the mapping for lazy refaulting - * - This must be called after mm->context.has_pgste is set, to avoid - * future creation of zero pages - * - This must be called after THP was disabled. - * - * mm contracts with s390, that even if mm were to remove a page table, - * racing with the loop below and so causing pte_offset_map_lock() to fail, - * it will never insert a page table containing empty zero pages once - * mm_forbids_zeropage(mm) i.e. mm->context.has_pgste is set. - */ -static int __zap_zero_pages(pmd_t *pmd, unsigned long start, - unsigned long end, struct mm_walk *walk) -{ - unsigned long addr; - - for (addr = start; addr != end; addr += PAGE_SIZE) { - pte_t *ptep; - spinlock_t *ptl; - - ptep = pte_offset_map_lock(walk->mm, pmd, addr, &ptl); - if (!ptep) - break; - if (is_zero_pfn(pte_pfn(*ptep))) - ptep_xchg_direct(walk->mm, addr, ptep, __pte(_PAGE_INVALID)); - pte_unmap_unlock(ptep, ptl); - } - return 0; -} - -static const struct mm_walk_ops zap_zero_walk_ops = { - .pmd_entry = __zap_zero_pages, - .walk_lock = PGWALK_WRLOCK, -}; - -/* * switch on pgstes for its userspace process (for kvm) */ int s390_enable_sie(void) @@ -2599,22 +2564,142 @@ mm->context.has_pgste = 1; /* split thp mappings and disable thp for future mappings */ thp_split_mm(mm); - walk_page_range(mm, 0, TASK_SIZE, &zap_zero_walk_ops, NULL); mmap_write_unlock(mm); return 0; } EXPORT_SYMBOL_GPL(s390_enable_sie); -int gmap_mark_unmergeable(void) +static int find_zeropage_pte_entry(pte_t *pte, unsigned long addr, + unsigned long end, struct mm_walk *walk) { + unsigned long *found_addr = walk->private; + + /* Return 1 of the page is a zeropage. */ + if (is_zero_pfn(pte_pfn(*pte))) { + /* + * Shared zeropage in e.g., a FS DAX mapping? We cannot do the + * right thing and likely don't care: FAULT_FLAG_UNSHARE + * currently only works in COW mappings, which is also where + * mm_forbids_zeropage() is checked. + */ + if (!is_cow_mapping(walk->vma->vm_flags)) + return -EFAULT; + + *found_addr = addr; + return 1; + } + return 0; +} + +static const struct mm_walk_ops find_zeropage_ops = { + .pte_entry = find_zeropage_pte_entry, + .walk_lock = PGWALK_WRLOCK, +}; + +/* + * Unshare all shared zeropages, replacing them by anonymous pages. Note that + * we cannot simply zap all shared zeropages, because this could later + * trigger unexpected userfaultfd missing events. + * + * This must be called after mm->context.allow_cow_sharing was + * set to 0, to avoid future mappings of shared zeropages. + * + * mm contracts with s390, that even if mm were to remove a page table, + * and racing with walk_page_range_vma() calling pte_offset_map_lock() + * would fail, it will never insert a page table containing empty zero + * pages once mm_forbids_zeropage(mm) i.e. + * mm->context.allow_cow_sharing is set to 0. + */ +static int __s390_unshare_zeropages(struct mm_struct *mm) +{ + struct vm_area_struct *vma; + VMA_ITERATOR(vmi, mm, 0); + unsigned long addr; + vm_fault_t fault; + int rc; + + for_each_vma(vmi, vma) { + /* + * We could only look at COW mappings, but it's more future + * proof to catch unexpected zeropages in other mappings and + * fail. + */ + if ((vma->vm_flags & VM_PFNMAP) || is_vm_hugetlb_page(vma)) + continue; + addr = vma->vm_start; + +retry: + rc = walk_page_range_vma(vma, addr, vma->vm_end, + &find_zeropage_ops, &addr); + if (rc < 0) + return rc; + else if (!rc) + continue; + + /* addr was updated by find_zeropage_pte_entry() */ + fault = handle_mm_fault(vma, addr, + FAULT_FLAG_UNSHARE | FAULT_FLAG_REMOTE, + NULL); + if (fault & VM_FAULT_OOM) + return -ENOMEM; + /* + * See break_ksm(): even after handle_mm_fault() returned 0, we + * must start the lookup from the current address, because + * handle_mm_fault() may back out if there's any difficulty. + * + * VM_FAULT_SIGBUS and VM_FAULT_SIGSEGV are unexpected but + * maybe they could trigger in the future on concurrent + * truncation. In that case, the shared zeropage would be gone + * and we can simply retry and make progress. + */ + cond_resched(); + goto retry; + } + + return 0; +} + +static int __s390_disable_cow_sharing(struct mm_struct *mm) +{ + int rc; + + if (!mm->context.allow_cow_sharing) + return 0; + + mm->context.allow_cow_sharing = 0; + + /* Replace all shared zeropages by anonymous pages. */ + rc = __s390_unshare_zeropages(mm); /* * Make sure to disable KSM (if enabled for the whole process or * individual VMAs). Note that nothing currently hinders user space * from re-enabling it. */ - return ksm_disable(current->mm); + if (!rc) + rc = ksm_disable(mm); + if (rc) + mm->context.allow_cow_sharing = 1; + return rc; +} + +/* + * Disable most COW-sharing of memory pages for the whole process: + * (1) Disable KSM and unmerge/unshare any KSM pages. + * (2) Disallow shared zeropages and unshare any zerpages that are mapped. + * + * Not that we currently don't bother with COW-shared pages that are shared + * with parent/child processes due to fork(). + */ +int s390_disable_cow_sharing(void) +{ + int rc; + + mmap_write_lock(current->mm); + rc = __s390_disable_cow_sharing(current->mm); + mmap_write_unlock(current->mm); + return rc; } -EXPORT_SYMBOL_GPL(gmap_mark_unmergeable); +EXPORT_SYMBOL_GPL(s390_disable_cow_sharing); /* * Enable storage key handling from now on and initialize the storage @@ -2659,7 +2744,7 @@ return 0; start = pmd_val(*pmd) & HPAGE_MASK; - end = start + HPAGE_SIZE - 1; + end = start + HPAGE_SIZE; __storage_key_init_range(start, end); set_bit(PG_arch_1, &page->flags); cond_resched(); @@ -2683,7 +2768,7 @@ goto out_up; mm->context.uses_skeys = 1; - rc = gmap_mark_unmergeable(); + rc = __s390_disable_cow_sharing(mm); if (rc) { mm->context.uses_skeys = 0; goto out_up; --- linux-xilinx-6.8.0.orig/arch/s390/mm/hugetlbpage.c +++ linux-xilinx-6.8.0/arch/s390/mm/hugetlbpage.c @@ -139,7 +139,7 @@ } if (!test_and_set_bit(PG_arch_1, &page->flags)) - __storage_key_init_range(paddr, paddr + size - 1); + __storage_key_init_range(paddr, paddr + size); } void __set_huge_pte_at(struct mm_struct *mm, unsigned long addr, @@ -224,7 +224,7 @@ if (p4d_present(*p4dp)) { pudp = pud_offset(p4dp, addr); if (pud_present(*pudp)) { - if (pud_large(*pudp)) + if (pud_leaf(*pudp)) return (pte_t *) pudp; pmdp = pmd_offset(pudp, addr); } @@ -240,7 +240,7 @@ int pud_huge(pud_t pud) { - return pud_large(pud); + return pud_leaf(pud); } bool __init arch_hugetlb_valid_size(unsigned long size) --- linux-xilinx-6.8.0.orig/arch/s390/mm/init.c +++ linux-xilinx-6.8.0/arch/s390/mm/init.c @@ -281,9 +281,6 @@ unsigned long size_pages = PFN_DOWN(size); int rc; - if (WARN_ON_ONCE(params->altmap)) - return -EINVAL; - if (WARN_ON_ONCE(params->pgprot.pgprot != PAGE_KERNEL.pgprot)) return -EINVAL; --- linux-xilinx-6.8.0.orig/arch/s390/mm/pageattr.c +++ linux-xilinx-6.8.0/arch/s390/mm/pageattr.c @@ -274,7 +274,7 @@ if (pud_none(*pudp)) return -EINVAL; next = pud_addr_end(addr, end); - if (pud_large(*pudp)) { + if (pud_leaf(*pudp)) { need_split = !!(flags & SET_MEMORY_4K); need_split |= !!(addr & ~PUD_MASK); need_split |= !!(addr + PUD_SIZE > next); @@ -406,6 +406,21 @@ return __set_memory((unsigned long)page_to_virt(page), 1, SET_MEMORY_DEF); } +bool kernel_page_present(struct page *page) +{ + unsigned long addr; + unsigned int cc; + + addr = (unsigned long)page_address(page); + asm volatile( + " lra %[addr],0(%[addr])\n" + " ipm %[cc]\n" + : [cc] "=d" (cc), [addr] "+a" (addr) + : + : "cc"); + return (cc >> 28) == 0; +} + #if defined(CONFIG_DEBUG_PAGEALLOC) || defined(CONFIG_KFENCE) static void ipte_range(pte_t *pte, unsigned long address, int nr) --- linux-xilinx-6.8.0.orig/arch/s390/mm/pgalloc.c +++ linux-xilinx-6.8.0/arch/s390/mm/pgalloc.c @@ -55,6 +55,8 @@ void crst_table_free(struct mm_struct *mm, unsigned long *table) { + if (!table) + return; pagetable_free(virt_to_ptdesc(table)); } @@ -262,6 +264,8 @@ static void base_crst_free(unsigned long *table) { + if (!table) + return; pagetable_free(virt_to_ptdesc(table)); } --- linux-xilinx-6.8.0.orig/arch/s390/mm/pgtable.c +++ linux-xilinx-6.8.0/arch/s390/mm/pgtable.c @@ -470,7 +470,7 @@ return -ENOENT; /* Large PUDs are not supported yet. */ - if (pud_large(*pud)) + if (pud_leaf(*pud)) return -EFAULT; *pmdp = pmd_offset(pud, addr); --- linux-xilinx-6.8.0.orig/arch/s390/mm/vmem.c +++ linux-xilinx-6.8.0/arch/s390/mm/vmem.c @@ -33,8 +33,12 @@ return memblock_alloc(size, size); } -static void vmem_free_pages(unsigned long addr, int order) +static void vmem_free_pages(unsigned long addr, int order, struct vmem_altmap *altmap) { + if (altmap) { + vmem_altmap_free(altmap, 1 << order); + return; + } /* We don't expect boot memory to be removed ever. */ if (!slab_is_available() || WARN_ON_ONCE(PageReserved(virt_to_page((void *)addr)))) @@ -156,7 +160,8 @@ /* __ref: we'll only call vmemmap_alloc_block() via vmemmap_populate() */ static int __ref modify_pte_table(pmd_t *pmd, unsigned long addr, - unsigned long end, bool add, bool direct) + unsigned long end, bool add, bool direct, + struct vmem_altmap *altmap) { unsigned long prot, pages = 0; int ret = -ENOMEM; @@ -172,11 +177,11 @@ if (pte_none(*pte)) continue; if (!direct) - vmem_free_pages((unsigned long) pfn_to_virt(pte_pfn(*pte)), 0); + vmem_free_pages((unsigned long)pfn_to_virt(pte_pfn(*pte)), get_order(PAGE_SIZE), altmap); pte_clear(&init_mm, addr, pte); } else if (pte_none(*pte)) { if (!direct) { - void *new_page = vmemmap_alloc_block(PAGE_SIZE, NUMA_NO_NODE); + void *new_page = vmemmap_alloc_block_buf(PAGE_SIZE, NUMA_NO_NODE, altmap); if (!new_page) goto out; @@ -213,7 +218,8 @@ /* __ref: we'll only call vmemmap_alloc_block() via vmemmap_populate() */ static int __ref modify_pmd_table(pud_t *pud, unsigned long addr, - unsigned long end, bool add, bool direct) + unsigned long end, bool add, bool direct, + struct vmem_altmap *altmap) { unsigned long next, prot, pages = 0; int ret = -ENOMEM; @@ -234,11 +240,11 @@ if (IS_ALIGNED(addr, PMD_SIZE) && IS_ALIGNED(next, PMD_SIZE)) { if (!direct) - vmem_free_pages(pmd_deref(*pmd), get_order(PMD_SIZE)); + vmem_free_pages(pmd_deref(*pmd), get_order(PMD_SIZE), altmap); pmd_clear(pmd); pages++; } else if (!direct && vmemmap_unuse_sub_pmd(addr, next)) { - vmem_free_pages(pmd_deref(*pmd), get_order(PMD_SIZE)); + vmem_free_pages(pmd_deref(*pmd), get_order(PMD_SIZE), altmap); pmd_clear(pmd); } continue; @@ -261,7 +267,7 @@ * page tables since vmemmap_populate gets * called for each section separately. */ - new_page = vmemmap_alloc_block(PMD_SIZE, NUMA_NO_NODE); + new_page = vmemmap_alloc_block_buf(PMD_SIZE, NUMA_NO_NODE, altmap); if (new_page) { set_pmd(pmd, __pmd(__pa(new_page) | prot)); if (!IS_ALIGNED(addr, PMD_SIZE) || @@ -280,7 +286,7 @@ vmemmap_use_sub_pmd(addr, next); continue; } - ret = modify_pte_table(pmd, addr, next, add, direct); + ret = modify_pte_table(pmd, addr, next, add, direct, altmap); if (ret) goto out; if (!add) @@ -302,12 +308,12 @@ for (i = 0; i < PTRS_PER_PMD; i++, pmd++) if (!pmd_none(*pmd)) return; - vmem_free_pages(pud_deref(*pud), CRST_ALLOC_ORDER); + vmem_free_pages(pud_deref(*pud), CRST_ALLOC_ORDER, NULL); pud_clear(pud); } static int modify_pud_table(p4d_t *p4d, unsigned long addr, unsigned long end, - bool add, bool direct) + bool add, bool direct, struct vmem_altmap *altmap) { unsigned long next, prot, pages = 0; int ret = -ENOMEM; @@ -323,7 +329,7 @@ if (!add) { if (pud_none(*pud)) continue; - if (pud_large(*pud)) { + if (pud_leaf(*pud)) { if (IS_ALIGNED(addr, PUD_SIZE) && IS_ALIGNED(next, PUD_SIZE)) { pud_clear(pud); @@ -344,10 +350,10 @@ if (!pmd) goto out; pud_populate(&init_mm, pud, pmd); - } else if (pud_large(*pud)) { + } else if (pud_leaf(*pud)) { continue; } - ret = modify_pmd_table(pud, addr, next, add, direct); + ret = modify_pmd_table(pud, addr, next, add, direct, altmap); if (ret) goto out; if (!add) @@ -370,12 +376,12 @@ if (!pud_none(*pud)) return; } - vmem_free_pages(p4d_deref(*p4d), CRST_ALLOC_ORDER); + vmem_free_pages(p4d_deref(*p4d), CRST_ALLOC_ORDER, NULL); p4d_clear(p4d); } static int modify_p4d_table(pgd_t *pgd, unsigned long addr, unsigned long end, - bool add, bool direct) + bool add, bool direct, struct vmem_altmap *altmap) { unsigned long next; int ret = -ENOMEM; @@ -394,7 +400,7 @@ goto out; p4d_populate(&init_mm, p4d, pud); } - ret = modify_pud_table(p4d, addr, next, add, direct); + ret = modify_pud_table(p4d, addr, next, add, direct, altmap); if (ret) goto out; if (!add) @@ -415,12 +421,12 @@ if (!p4d_none(*p4d)) return; } - vmem_free_pages(pgd_deref(*pgd), CRST_ALLOC_ORDER); + vmem_free_pages(pgd_deref(*pgd), CRST_ALLOC_ORDER, NULL); pgd_clear(pgd); } static int modify_pagetable(unsigned long start, unsigned long end, bool add, - bool direct) + bool direct, struct vmem_altmap *altmap) { unsigned long addr, next; int ret = -ENOMEM; @@ -445,7 +451,7 @@ goto out; pgd_populate(&init_mm, pgd, p4d); } - ret = modify_p4d_table(pgd, addr, next, add, direct); + ret = modify_p4d_table(pgd, addr, next, add, direct, altmap); if (ret) goto out; if (!add) @@ -458,14 +464,16 @@ return ret; } -static int add_pagetable(unsigned long start, unsigned long end, bool direct) +static int add_pagetable(unsigned long start, unsigned long end, bool direct, + struct vmem_altmap *altmap) { - return modify_pagetable(start, end, true, direct); + return modify_pagetable(start, end, true, direct, altmap); } -static int remove_pagetable(unsigned long start, unsigned long end, bool direct) +static int remove_pagetable(unsigned long start, unsigned long end, bool direct, + struct vmem_altmap *altmap) { - return modify_pagetable(start, end, false, direct); + return modify_pagetable(start, end, false, direct, altmap); } /* @@ -474,7 +482,7 @@ static int vmem_add_range(unsigned long start, unsigned long size) { start = (unsigned long)__va(start); - return add_pagetable(start, start + size, true); + return add_pagetable(start, start + size, true, NULL); } /* @@ -483,7 +491,7 @@ static void vmem_remove_range(unsigned long start, unsigned long size) { start = (unsigned long)__va(start); - remove_pagetable(start, start + size, true); + remove_pagetable(start, start + size, true, NULL); } /* @@ -496,9 +504,9 @@ mutex_lock(&vmem_mutex); /* We don't care about the node, just use NUMA_NO_NODE on allocations */ - ret = add_pagetable(start, end, false); + ret = add_pagetable(start, end, false, altmap); if (ret) - remove_pagetable(start, end, false); + remove_pagetable(start, end, false, altmap); mutex_unlock(&vmem_mutex); return ret; } @@ -509,7 +517,7 @@ struct vmem_altmap *altmap) { mutex_lock(&vmem_mutex); - remove_pagetable(start, end, false); + remove_pagetable(start, end, false, altmap); mutex_unlock(&vmem_mutex); } @@ -591,7 +599,7 @@ if (!pmd) goto out; pud_populate(&init_mm, pud, pmd); - } else if (WARN_ON_ONCE(pud_large(*pud))) { + } else if (WARN_ON_ONCE(pud_leaf(*pud))) { goto out; } pmd = pmd_offset(pud, addr); --- linux-xilinx-6.8.0.orig/arch/s390/net/bpf_jit_comp.c +++ linux-xilinx-6.8.0/arch/s390/net/bpf_jit_comp.c @@ -516,11 +516,12 @@ * PLT for hotpatchable calls. The calling convention is the same as for the * ftrace hotpatch trampolines: %r0 is return address, %r1 is clobbered. */ -extern const char bpf_plt[]; -extern const char bpf_plt_ret[]; -extern const char bpf_plt_target[]; -extern const char bpf_plt_end[]; -#define BPF_PLT_SIZE 32 +struct bpf_plt { + char code[16]; + void *ret; + void *target; +} __packed; +extern const struct bpf_plt bpf_plt; asm( ".pushsection .rodata\n" " .balign 8\n" @@ -531,15 +532,14 @@ " .balign 8\n" "bpf_plt_ret: .quad 0\n" "bpf_plt_target: .quad 0\n" - "bpf_plt_end:\n" " .popsection\n" ); -static void bpf_jit_plt(void *plt, void *ret, void *target) +static void bpf_jit_plt(struct bpf_plt *plt, void *ret, void *target) { - memcpy(plt, bpf_plt, BPF_PLT_SIZE); - *(void **)((char *)plt + (bpf_plt_ret - bpf_plt)) = ret; - *(void **)((char *)plt + (bpf_plt_target - bpf_plt)) = target ?: ret; + memcpy(plt, &bpf_plt, sizeof(*plt)); + plt->ret = ret; + plt->target = target; } /* @@ -662,9 +662,9 @@ jit->prg = ALIGN(jit->prg, 8); jit->prologue_plt = jit->prg; if (jit->prg_buf) - bpf_jit_plt(jit->prg_buf + jit->prg, + bpf_jit_plt((struct bpf_plt *)(jit->prg_buf + jit->prg), jit->prg_buf + jit->prologue_plt_ret, NULL); - jit->prg += BPF_PLT_SIZE; + jit->prg += sizeof(struct bpf_plt); } static int get_probe_mem_regno(const u8 *insn) @@ -1427,8 +1427,12 @@ EMIT6_DISP_LH(0xeb000000, is32 ? (op32) : (op64), \ (insn->imm & BPF_FETCH) ? src_reg : REG_W0, \ src_reg, dst_reg, off); \ - if (is32 && (insn->imm & BPF_FETCH)) \ - EMIT_ZERO(src_reg); \ + if (insn->imm & BPF_FETCH) { \ + /* bcr 14,0 - see atomic_fetch_{add,and,or,xor}() */ \ + _EMIT2(0x07e0); \ + if (is32) \ + EMIT_ZERO(src_reg); \ + } \ } while (0) case BPF_ADD: case BPF_ADD | BPF_FETCH: @@ -2040,9 +2044,6 @@ struct bpf_jit jit; int pass; - if (WARN_ON_ONCE(bpf_plt_end - bpf_plt != BPF_PLT_SIZE)) - return orig_fp; - if (!fp->jit_requested) return orig_fp; @@ -2111,7 +2112,11 @@ print_fn_code(jit.prg_buf, jit.size_prg); } if (!fp->is_func || extra_pass) { - bpf_jit_binary_lock_ro(header); + if (bpf_jit_binary_lock_ro(header)) { + bpf_jit_binary_free(header); + fp = orig_fp; + goto free_addrs; + } } else { jit_data->header = header; jit_data->ctx = jit; @@ -2148,14 +2153,11 @@ int bpf_arch_text_poke(void *ip, enum bpf_text_poke_type t, void *old_addr, void *new_addr) { + struct bpf_plt expected_plt, current_plt, new_plt, *plt; struct { u16 opc; s32 disp; } __packed insn; - char expected_plt[BPF_PLT_SIZE]; - char current_plt[BPF_PLT_SIZE]; - char new_plt[BPF_PLT_SIZE]; - char *plt; char *ret; int err; @@ -2174,18 +2176,18 @@ */ } else { /* Verify the PLT. */ - plt = (char *)ip + (insn.disp << 1); - err = copy_from_kernel_nofault(current_plt, plt, BPF_PLT_SIZE); + plt = ip + (insn.disp << 1); + err = copy_from_kernel_nofault(¤t_plt, plt, + sizeof(current_plt)); if (err < 0) return err; ret = (char *)ip + 6; - bpf_jit_plt(expected_plt, ret, old_addr); - if (memcmp(current_plt, expected_plt, BPF_PLT_SIZE)) + bpf_jit_plt(&expected_plt, ret, old_addr); + if (memcmp(¤t_plt, &expected_plt, sizeof(current_plt))) return -EINVAL; /* Adjust the call address. */ - bpf_jit_plt(new_plt, ret, new_addr); - s390_kernel_write(plt + (bpf_plt_target - bpf_plt), - new_plt + (bpf_plt_target - bpf_plt), + bpf_jit_plt(&new_plt, ret, new_addr); + s390_kernel_write(&plt->target, &new_plt.target, sizeof(void *)); } --- linux-xilinx-6.8.0.orig/arch/s390/pci/pci.c +++ linux-xilinx-6.8.0/arch/s390/pci/pci.c @@ -28,6 +28,8 @@ #include #include #include +#include +#include #include #include @@ -42,6 +44,7 @@ /* list of all detected zpci devices */ static LIST_HEAD(zpci_list); static DEFINE_SPINLOCK(zpci_list_lock); +static DEFINE_MUTEX(zpci_add_remove_lock); static DECLARE_BITMAP(zpci_domain, ZPCI_DOMAIN_BITMAP_SIZE); static DEFINE_SPINLOCK(zpci_domain_lock); @@ -67,6 +70,15 @@ struct airq_iv *zpci_aif_sbv; EXPORT_SYMBOL_GPL(zpci_aif_sbv); +void zpci_zdev_put(struct zpci_dev *zdev) +{ + if (!zdev) + return; + mutex_lock(&zpci_add_remove_lock); + kref_put_lock(&zdev->kref, zpci_release_device, &zpci_list_lock); + mutex_unlock(&zpci_add_remove_lock); +} + struct zpci_dev *get_zdev_by_fid(u32 fid) { struct zpci_dev *tmp, *zdev = NULL; @@ -159,6 +171,7 @@ u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_SET_MEASURE); struct zpci_iommu_ctrs *ctrs; struct zpci_fib fib = {0}; + unsigned long flags; u8 cc, status; if (zdev->fmb || sizeof(*zdev->fmb) < zdev->fmb_length) @@ -170,6 +183,7 @@ WARN_ON((u64) zdev->fmb & 0xf); /* reset software counters */ + spin_lock_irqsave(&zdev->dom_lock, flags); ctrs = zpci_get_iommu_ctrs(zdev); if (ctrs) { atomic64_set(&ctrs->mapped_pages, 0); @@ -178,6 +192,7 @@ atomic64_set(&ctrs->sync_map_rpcits, 0); atomic64_set(&ctrs->sync_rpcits, 0); } + spin_unlock_irqrestore(&zdev->dom_lock, flags); fib.fmb_addr = virt_to_phys(zdev->fmb); @@ -730,12 +745,12 @@ * equivalent to its state during boot when first probing a driver. * Consequently after reset the PCI function requires re-initialization via the * common PCI code including re-enabling IRQs via pci_alloc_irq_vectors() - * and enabling the function via e.g.pci_enablde_device_flags().The caller + * and enabling the function via e.g. pci_enable_device_flags(). The caller * must guard against concurrent reset attempts. * * In most cases this function should not be called directly but through * pci_reset_function() or pci_reset_bus() which handle the save/restore and - * locking. + * locking - asserted by lockdep. * * Return: 0 on success and an error value otherwise */ @@ -744,6 +759,7 @@ u8 status; int rc; + lockdep_assert_held(&zdev->state_lock); zpci_dbg(3, "rst fid:%x, fh:%x\n", zdev->fid, zdev->fh); if (zdev_enabled(zdev)) { /* Disables device access, DMAs and IRQs (reset state) */ @@ -780,8 +796,9 @@ * @fh: Current Function Handle of the device to be created * @state: Initial state after creation either Standby or Configured * - * Creates a new zpci device and adds it to its, possibly newly created, zbus - * as well as zpci_list. + * Allocates a new struct zpci_dev and queries the platform for its details. + * If successful the device can subsequently be added to the zPCI subsystem + * using zpci_add_device(). * * Returns: the zdev on success or an error pointer otherwise */ @@ -790,7 +807,6 @@ struct zpci_dev *zdev; int rc; - zpci_dbg(1, "add fid:%x, fh:%x, c:%d\n", fid, fh, state); zdev = kzalloc(sizeof(*zdev), GFP_KERNEL); if (!zdev) return ERR_PTR(-ENOMEM); @@ -805,10 +821,35 @@ goto error; zdev->state = state; - kref_init(&zdev->kref); - mutex_init(&zdev->lock); + mutex_init(&zdev->state_lock); + mutex_init(&zdev->fmb_lock); mutex_init(&zdev->kzdev_lock); + return zdev; + +error: + zpci_dbg(0, "crt fid:%x, rc:%d\n", fid, rc); + kfree(zdev); + return ERR_PTR(rc); +} + +/** + * zpci_add_device() - Add a previously created zPCI device to the zPCI subsystem + * @zdev: The zPCI device to be added + * + * A struct zpci_dev is added to the zPCI subsystem and to a virtual PCI bus creating + * a new one as necessary. A hotplug slot is created and events start to be handled. + * If successful from this point on zpci_zdev_get() and zpci_zdev_put() must be used. + * If adding the struct zpci_dev fails the device was not added and should be freed. + * + * Return: 0 on success, or an error code otherwise + */ +int zpci_add_device(struct zpci_dev *zdev) +{ + int rc; + + mutex_lock(&zpci_add_remove_lock); + zpci_dbg(1, "add fid:%x, fh:%x, c:%d\n", zdev->fid, zdev->fh, zdev->state); rc = zpci_init_iommu(zdev); if (rc) goto error; @@ -817,18 +858,19 @@ if (rc) goto error_destroy_iommu; + kref_init(&zdev->kref); spin_lock(&zpci_list_lock); list_add_tail(&zdev->entry, &zpci_list); spin_unlock(&zpci_list_lock); - - return zdev; + mutex_unlock(&zpci_add_remove_lock); + return 0; error_destroy_iommu: zpci_destroy_iommu(zdev); error: - zpci_dbg(0, "add fid:%x, rc:%d\n", fid, rc); - kfree(zdev); - return ERR_PTR(rc); + zpci_dbg(0, "add fid:%x, rc:%d\n", zdev->fid, rc); + mutex_unlock(&zpci_add_remove_lock); + return rc; } bool zpci_is_device_configured(struct zpci_dev *zdev) @@ -870,6 +912,10 @@ { int rc; + lockdep_assert_held(&zdev->state_lock); + if (zdev->state != ZPCI_FN_STATE_CONFIGURED) + return 0; + if (zdev->zbus->bus) zpci_bus_remove_device(zdev, false); @@ -893,59 +939,44 @@ * @zdev: the zpci_dev that was reserved * * Handle the case that a given zPCI function was reserved by another system. - * After a call to this function the zpci_dev can not be found via - * get_zdev_by_fid() anymore but may still be accessible via existing - * references though it will not be functional anymore. */ void zpci_device_reserved(struct zpci_dev *zdev) { - if (zdev->has_hp_slot) - zpci_exit_slot(zdev); - /* - * Remove device from zpci_list as it is going away. This also - * makes sure we ignore subsequent zPCI events for this device. - */ - spin_lock(&zpci_list_lock); - list_del(&zdev->entry); - spin_unlock(&zpci_list_lock); + lockdep_assert_held(&zdev->state_lock); + /* We may declare the device reserved multiple times */ + if (zdev->state == ZPCI_FN_STATE_RESERVED) + return; zdev->state = ZPCI_FN_STATE_RESERVED; zpci_dbg(3, "rsv fid:%x\n", zdev->fid); + /* + * The underlying device is gone. Allow the zdev to be freed + * as soon as all other references are gone by accounting for + * the removal as a dropped reference. + */ zpci_zdev_put(zdev); } void zpci_release_device(struct kref *kref) { struct zpci_dev *zdev = container_of(kref, struct zpci_dev, kref); - int ret; - if (zdev->zbus->bus) - zpci_bus_remove_device(zdev, false); + lockdep_assert_held(&zpci_add_remove_lock); + WARN_ON(zdev->state != ZPCI_FN_STATE_RESERVED); + /* + * We already hold zpci_list_lock thanks to kref_put_lock(). + * This makes sure no new reference can be taken from the list. + */ + list_del(&zdev->entry); + spin_unlock(&zpci_list_lock); - if (zdev_enabled(zdev)) - zpci_disable_device(zdev); + if (zdev->has_hp_slot) + zpci_exit_slot(zdev); - switch (zdev->state) { - case ZPCI_FN_STATE_CONFIGURED: - ret = sclp_pci_deconfigure(zdev->fid); - zpci_dbg(3, "deconf fid:%x, rc:%d\n", zdev->fid, ret); - fallthrough; - case ZPCI_FN_STATE_STANDBY: - if (zdev->has_hp_slot) - zpci_exit_slot(zdev); - spin_lock(&zpci_list_lock); - list_del(&zdev->entry); - spin_unlock(&zpci_list_lock); - zpci_dbg(3, "rsv fid:%x\n", zdev->fid); - fallthrough; - case ZPCI_FN_STATE_RESERVED: - if (zdev->has_resources) - zpci_cleanup_bus_resources(zdev); - zpci_bus_device_unregister(zdev); - zpci_destroy_iommu(zdev); - fallthrough; - default: - break; - } + if (zdev->has_resources) + zpci_cleanup_bus_resources(zdev); + + zpci_bus_device_unregister(zdev); + zpci_destroy_iommu(zdev); zpci_dbg(3, "rem fid:%x\n", zdev->fid); kfree_rcu(zdev, rcu); } @@ -1081,6 +1112,50 @@ return s390_pci_initialized; } +static int zpci_cmp_rid(void *priv, const struct list_head *a, + const struct list_head *b) +{ + struct zpci_dev *za = container_of(a, struct zpci_dev, entry); + struct zpci_dev *zb = container_of(b, struct zpci_dev, entry); + + /* + * PCI functions without RID available maintain original order + * between themselves but sort before those with RID. + */ + if (za->rid == zb->rid) + return za->rid_available > zb->rid_available; + /* + * PCI functions with RID sort by RID ascending. + */ + return za->rid > zb->rid; +} + +static void zpci_add_devices(struct list_head *scan_list) +{ + struct zpci_dev *zdev, *tmp; + + list_sort(NULL, scan_list, &zpci_cmp_rid); + list_for_each_entry_safe(zdev, tmp, scan_list, entry) { + list_del_init(&zdev->entry); + if (zpci_add_device(zdev)) + kfree(zdev); + } +} + +int zpci_scan_devices(void) +{ + LIST_HEAD(scan_list); + int rc; + + rc = clp_scan_pci_devices(&scan_list); + if (rc) + return rc; + + zpci_add_devices(&scan_list); + zpci_bus_scan_busses(); + return 0; +} + static int __init pci_base_init(void) { int rc; @@ -1110,10 +1185,9 @@ if (rc) goto out_irq; - rc = clp_scan_pci_devices(); + rc = zpci_scan_devices(); if (rc) goto out_find; - zpci_bus_scan_busses(); s390_pci_initialized = 1; return 0; --- linux-xilinx-6.8.0.orig/arch/s390/pci/pci_bus.c +++ linux-xilinx-6.8.0/arch/s390/pci/pci_bus.c @@ -168,9 +168,15 @@ mutex_unlock(&zbus_list_lock); } +static bool zpci_bus_is_multifunction_root(struct zpci_dev *zdev) +{ + return !s390_pci_no_rid && zdev->rid_available && + !zdev->vfn; +} + /* zpci_bus_create_pci_bus - Create the PCI bus associated with this zbus * @zbus: the zbus holding the zdevices - * @fr: PCI root function that will determine the bus's domain, and bus speeed + * @fr: PCI root function that will determine the bus's domain, and bus speed * @ops: the pci operations * * The PCI function @fr determines the domain (its UID), multifunction property @@ -188,7 +194,7 @@ return domain; zbus->domain_nr = domain; - zbus->multifunction = fr->rid_available; + zbus->multifunction = zpci_bus_is_multifunction_root(fr); zbus->max_bus_speed = fr->max_bus_speed; /* @@ -232,13 +238,15 @@ kref_put(&zbus->kref, zpci_bus_release); } -static struct zpci_bus *zpci_bus_get(int pchid) +static struct zpci_bus *zpci_bus_get(int topo, bool topo_is_tid) { struct zpci_bus *zbus; mutex_lock(&zbus_list_lock); list_for_each_entry(zbus, &zbus_list, bus_next) { - if (pchid == zbus->pchid) { + if (!zbus->multifunction) + continue; + if (topo_is_tid == zbus->topo_is_tid && topo == zbus->topo) { kref_get(&zbus->kref); goto out_unlock; } @@ -249,7 +257,7 @@ return zbus; } -static struct zpci_bus *zpci_bus_alloc(int pchid) +static struct zpci_bus *zpci_bus_alloc(int topo, bool topo_is_tid) { struct zpci_bus *zbus; @@ -257,7 +265,8 @@ if (!zbus) return NULL; - zbus->pchid = pchid; + zbus->topo = topo; + zbus->topo_is_tid = topo_is_tid; INIT_LIST_HEAD(&zbus->bus_next); mutex_lock(&zbus_list_lock); list_add_tail(&zbus->bus_next, &zbus_list); @@ -292,19 +301,22 @@ { int rc = -EINVAL; + if (zbus->multifunction) { + if (!zdev->rid_available) { + WARN_ONCE(1, "rid_available not set for multifunction\n"); + return rc; + } + zdev->devfn = zdev->rid & ZPCI_RID_MASK_DEVFN; + } + if (zbus->function[zdev->devfn]) { pr_err("devfn %04x is already assigned\n", zdev->devfn); return rc; } - zdev->zbus = zbus; zbus->function[zdev->devfn] = zdev; zpci_nb_devices++; - if (zbus->multifunction && !zdev->rid_available) { - WARN_ONCE(1, "rid_available not set for multifunction\n"); - goto error; - } rc = zpci_init_slot(zdev); if (rc) goto error; @@ -319,10 +331,25 @@ return rc; } +static bool zpci_bus_is_isolated_vf(struct zpci_bus *zbus, struct zpci_dev *zdev) +{ + struct pci_dev *pdev; + + if (!zdev->vfn) + return false; + + pdev = zpci_iov_find_parent_pf(zbus, zdev); + if (!pdev) + return true; + pci_dev_put(pdev); + return false; +} + int zpci_bus_device_register(struct zpci_dev *zdev, struct pci_ops *ops) { + bool topo_is_tid = zdev->tid_avail; struct zpci_bus *zbus = NULL; - int rc = -EBADF; + int topo, rc = -EBADF; if (zpci_nb_devices == ZPCI_NR_DEVICES) { pr_warn("Adding PCI function %08x failed because the configured limit of %d is reached\n", @@ -330,14 +357,19 @@ return -ENOSPC; } - if (zdev->devfn >= ZPCI_FUNCTIONS_PER_BUS) - return -EINVAL; - - if (!s390_pci_no_rid && zdev->rid_available) - zbus = zpci_bus_get(zdev->pchid); + topo = topo_is_tid ? zdev->tid : zdev->pchid; + zbus = zpci_bus_get(topo, topo_is_tid); + /* + * An isolated VF gets its own domain/bus even if there exists + * a matching domain/bus already + */ + if (zbus && zpci_bus_is_isolated_vf(zbus, zdev)) { + zpci_bus_put(zbus); + zbus = NULL; + } if (!zbus) { - zbus = zpci_bus_alloc(zdev->pchid); + zbus = zpci_bus_alloc(topo, topo_is_tid); if (!zbus) return -ENOMEM; } --- linux-xilinx-6.8.0.orig/arch/s390/pci/pci_bus.h +++ linux-xilinx-6.8.0/arch/s390/pci/pci_bus.h @@ -17,11 +17,8 @@ void zpci_bus_remove_device(struct zpci_dev *zdev, bool set_error); void zpci_release_device(struct kref *kref); -static inline void zpci_zdev_put(struct zpci_dev *zdev) -{ - if (zdev) - kref_put(&zdev->kref, zpci_release_device); -} + +void zpci_zdev_put(struct zpci_dev *zdev); static inline void zpci_zdev_get(struct zpci_dev *zdev) { --- linux-xilinx-6.8.0.orig/arch/s390/pci/pci_clp.c +++ linux-xilinx-6.8.0/arch/s390/pci/pci_clp.c @@ -164,10 +164,13 @@ zdev->port = response->port; zdev->uid = response->uid; zdev->fmb_length = sizeof(u32) * response->fmb_len; - zdev->rid_available = response->rid_avail; zdev->is_physfn = response->is_physfn; - if (!s390_pci_no_rid && zdev->rid_available) - zdev->devfn = response->rid & ZPCI_RID_MASK_DEVFN; + zdev->rid_available = response->rid_avail; + if (zdev->rid_available) + zdev->rid = response->rid; + zdev->tid_avail = response->tid_avail; + if (zdev->tid_avail) + zdev->tid = response->tid; memcpy(zdev->pfip, response->pfip, sizeof(zdev->pfip)); if (response->util_str_avail) { @@ -407,6 +410,7 @@ static void __clp_add(struct clp_fh_list_entry *entry, void *data) { + struct list_head *scan_list = data; struct zpci_dev *zdev; if (!entry->vendor_id) @@ -417,10 +421,13 @@ zpci_zdev_put(zdev); return; } - zpci_create_device(entry->fid, entry->fh, entry->config_state); + zdev = zpci_create_device(entry->fid, entry->fh, entry->config_state); + if (IS_ERR(zdev)) + return; + list_add_tail(&zdev->entry, scan_list); } -int clp_scan_pci_devices(void) +int clp_scan_pci_devices(struct list_head *scan_list) { struct clp_req_rsp_list_pci *rrb; int rc; @@ -429,7 +436,7 @@ if (!rrb) return -ENOMEM; - rc = clp_list_pci(rrb, NULL, __clp_add); + rc = clp_list_pci(rrb, scan_list, __clp_add); clp_free_block(rrb); return rc; --- linux-xilinx-6.8.0.orig/arch/s390/pci/pci_debug.c +++ linux-xilinx-6.8.0/arch/s390/pci/pci_debug.c @@ -71,17 +71,23 @@ static void pci_sw_counter_show(struct seq_file *m) { - struct zpci_iommu_ctrs *ctrs = zpci_get_iommu_ctrs(m->private); + struct zpci_dev *zdev = m->private; + struct zpci_iommu_ctrs *ctrs; atomic64_t *counter; + unsigned long flags; int i; + spin_lock_irqsave(&zdev->dom_lock, flags); + ctrs = zpci_get_iommu_ctrs(m->private); if (!ctrs) - return; + goto unlock; counter = &ctrs->mapped_pages; for (i = 0; i < ARRAY_SIZE(pci_sw_names); i++, counter++) seq_printf(m, "%26s:\t%llu\n", pci_sw_names[i], atomic64_read(counter)); +unlock: + spin_unlock_irqrestore(&zdev->dom_lock, flags); } static int pci_perf_show(struct seq_file *m, void *v) @@ -91,9 +97,9 @@ if (!zdev) return 0; - mutex_lock(&zdev->lock); + mutex_lock(&zdev->fmb_lock); if (!zdev->fmb) { - mutex_unlock(&zdev->lock); + mutex_unlock(&zdev->fmb_lock); seq_puts(m, "FMB statistics disabled\n"); return 0; } @@ -130,7 +136,7 @@ } pci_sw_counter_show(m); - mutex_unlock(&zdev->lock); + mutex_unlock(&zdev->fmb_lock); return 0; } @@ -148,7 +154,7 @@ if (rc) return rc; - mutex_lock(&zdev->lock); + mutex_lock(&zdev->fmb_lock); switch (val) { case 0: rc = zpci_fmb_disable_device(zdev); @@ -157,7 +163,7 @@ rc = zpci_fmb_enable_device(zdev); break; } - mutex_unlock(&zdev->lock); + mutex_unlock(&zdev->fmb_lock); return rc ? rc : count; } --- linux-xilinx-6.8.0.orig/arch/s390/pci/pci_event.c +++ linux-xilinx-6.8.0/arch/s390/pci/pci_event.c @@ -267,6 +267,7 @@ zpci_err_hex(ccdf, sizeof(*ccdf)); if (zdev) { + mutex_lock(&zdev->state_lock); zpci_update_fh(zdev, ccdf->fh); if (zdev->zbus->bus) pdev = pci_get_slot(zdev->zbus->bus, zdev->devfn); @@ -279,21 +280,24 @@ goto no_pdev; switch (ccdf->pec) { - case 0x003a: /* Service Action or Error Recovery Successful */ + case 0x002a: /* Error event concerns FMB */ + case 0x002b: + case 0x002c: + break; + case 0x0040: /* Service Action or Error Recovery Failed */ + case 0x003b: + zpci_event_io_failure(pdev, pci_channel_io_perm_failure); + break; + default: /* PCI function left in the error state attempt to recover */ ers_res = zpci_event_attempt_error_recovery(pdev); if (ers_res != PCI_ERS_RESULT_RECOVERED) zpci_event_io_failure(pdev, pci_channel_io_perm_failure); break; - default: - /* - * Mark as frozen not permanently failed because the device - * could be subsequently recovered by the platform. - */ - zpci_event_io_failure(pdev, pci_channel_io_frozen); - break; } pci_dev_put(pdev); no_pdev: + if (zdev) + mutex_unlock(&zdev->state_lock); zpci_zdev_put(zdev); } @@ -318,6 +322,22 @@ zdev->state = ZPCI_FN_STATE_STANDBY; } +static void zpci_event_reappear(struct zpci_dev *zdev) +{ + lockdep_assert_held(&zdev->state_lock); + /* + * The zdev is in the reserved state. This means that it was presumed to + * go away but there are still undropped references. Now, the platform + * announced its availability again. Bring back the lingering zdev + * to standby. This is safe because we hold a temporary reference + * now so that it won't go away. Account for the re-appearance of the + * underlying device by incrementing the reference count. + */ + zdev->state = ZPCI_FN_STATE_STANDBY; + zpci_zdev_get(zdev); + zpci_dbg(1, "rea fid:%x, fh:%x\n", zdev->fid, zdev->fh); +} + static void __zpci_event_availability(struct zpci_ccdf_avail *ccdf) { struct zpci_dev *zdev = get_zdev_by_fid(ccdf->fid); @@ -326,25 +346,44 @@ zpci_dbg(3, "avl fid:%x, fh:%x, pec:%x\n", ccdf->fid, ccdf->fh, ccdf->pec); + + if (existing_zdev) + mutex_lock(&zdev->state_lock); + switch (ccdf->pec) { case 0x0301: /* Reserved|Standby -> Configured */ if (!zdev) { zdev = zpci_create_device(ccdf->fid, ccdf->fh, ZPCI_FN_STATE_CONFIGURED); if (IS_ERR(zdev)) break; + if (zpci_add_device(zdev)) { + kfree(zdev); + break; + } } else { + if (zdev->state == ZPCI_FN_STATE_RESERVED) + zpci_event_reappear(zdev); /* the configuration request may be stale */ - if (zdev->state != ZPCI_FN_STATE_STANDBY) + else if (zdev->state != ZPCI_FN_STATE_STANDBY) break; zdev->state = ZPCI_FN_STATE_CONFIGURED; } zpci_scan_configured_device(zdev, ccdf->fh); break; case 0x0302: /* Reserved -> Standby */ - if (!zdev) - zpci_create_device(ccdf->fid, ccdf->fh, ZPCI_FN_STATE_STANDBY); - else + if (!zdev) { + zdev = zpci_create_device(ccdf->fid, ccdf->fh, ZPCI_FN_STATE_STANDBY); + if (IS_ERR(zdev)) + break; + if (zpci_add_device(zdev)) { + kfree(zdev); + break; + } + } else { + if (zdev->state == ZPCI_FN_STATE_RESERVED) + zpci_event_reappear(zdev); zpci_update_fh(zdev, ccdf->fh); + } break; case 0x0303: /* Deconfiguration requested */ if (zdev) { @@ -373,7 +412,7 @@ break; case 0x0306: /* 0x308 or 0x302 for multiple devices */ zpci_remove_reserved_devices(); - clp_scan_pci_devices(); + zpci_scan_devices(); break; case 0x0308: /* Standby -> Reserved */ if (!zdev) @@ -383,8 +422,10 @@ default: break; } - if (existing_zdev) + if (existing_zdev) { + mutex_unlock(&zdev->state_lock); zpci_zdev_put(zdev); + } } void zpci_event_availability(void *data) --- linux-xilinx-6.8.0.orig/arch/s390/pci/pci_iov.c +++ linux-xilinx-6.8.0/arch/s390/pci/pci_iov.c @@ -60,18 +60,35 @@ return 0; } -int zpci_iov_setup_virtfn(struct zpci_bus *zbus, struct pci_dev *virtfn, int vfn) +/** + * zpci_iov_find_parent_pf - Find the parent PF, if any, of the given function + * @zbus: The bus that the PCI function is on, or would be added on + * @zdev: The PCI function + * + * Finds the parent PF, if it exists and is configured, of the given PCI function + * and increments its refcount. Th PF is searched for on the provided bus so the + * caller has to ensure that this is the correct bus to search. This function may + * be used before adding the PCI function to a zbus. + * + * Return: Pointer to the struct pci_dev of the parent PF or NULL if it not + * found. If the function is not a VF or has no RequesterID information, + * NULL is returned as well. + */ +struct pci_dev *zpci_iov_find_parent_pf(struct zpci_bus *zbus, struct zpci_dev *zdev) { - int i, cand_devfn; - struct zpci_dev *zdev; + int i, vfid, devfn, cand_devfn; struct pci_dev *pdev; - int vfid = vfn - 1; /* Linux' vfid's start at 0 vfn at 1*/ - int rc = 0; if (!zbus->multifunction) - return 0; - - /* If the parent PF for the given VF is also configured in the + return NULL; + /* Non-VFs and VFs without RID available don't have a parent */ + if (!zdev->vfn || !zdev->rid_available) + return NULL; + /* Linux vfid starts at 0 vfn at 1 */ + vfid = zdev->vfn - 1; + devfn = zdev->rid & ZPCI_RID_MASK_DEVFN; + /* + * If the parent PF for the given VF is also configured in the * instance, it must be on the same zbus. * We can then identify the parent PF by checking what * devfn the VF would have if it belonged to that PF using the PF's @@ -85,15 +102,26 @@ if (!pdev) continue; cand_devfn = pci_iov_virtfn_devfn(pdev, vfid); - if (cand_devfn == virtfn->devfn) { - rc = zpci_iov_link_virtfn(pdev, virtfn, vfid); - /* balance pci_get_slot() */ - pci_dev_put(pdev); - break; - } + if (cand_devfn == devfn) + return pdev; /* balance pci_get_slot() */ pci_dev_put(pdev); } } + return NULL; +} + +int zpci_iov_setup_virtfn(struct zpci_bus *zbus, struct pci_dev *virtfn, int vfn) +{ + struct zpci_dev *zdev = to_zpci(virtfn); + struct pci_dev *pdev_pf; + int rc = 0; + + pdev_pf = zpci_iov_find_parent_pf(zbus, zdev); + if (pdev_pf) { + /* Linux' vfids start at 0 while zdev->vfn starts at 1 */ + rc = zpci_iov_link_virtfn(pdev_pf, virtfn, zdev->vfn - 1); + pci_dev_put(pdev_pf); + } return rc; } --- linux-xilinx-6.8.0.orig/arch/s390/pci/pci_iov.h +++ linux-xilinx-6.8.0/arch/s390/pci/pci_iov.h @@ -17,6 +17,8 @@ int zpci_iov_setup_virtfn(struct zpci_bus *zbus, struct pci_dev *virtfn, int vfn); +struct pci_dev *zpci_iov_find_parent_pf(struct zpci_bus *zbus, struct zpci_dev *zdev); + #else /* CONFIG_PCI_IOV */ static inline void zpci_iov_remove_virtfn(struct pci_dev *pdev, int vfn) {} @@ -26,5 +28,10 @@ { return 0; } + +static inline struct pci_dev *zpci_iov_find_parent_pf(struct zpci_bus *zbus, struct zpci_dev *zdev) +{ + return NULL; +} #endif /* CONFIG_PCI_IOV */ #endif /* __S390_PCI_IOV_h */ --- linux-xilinx-6.8.0.orig/arch/s390/pci/pci_irq.c +++ linux-xilinx-6.8.0/arch/s390/pci/pci_irq.c @@ -268,33 +268,20 @@ } } -int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) +static int __alloc_airq(struct zpci_dev *zdev, int msi_vecs, + unsigned long *bit) { - struct zpci_dev *zdev = to_zpci(pdev); - unsigned int hwirq, msi_vecs, cpu; - unsigned long bit; - struct msi_desc *msi; - struct msi_msg msg; - int cpu_addr; - int rc, irq; - - zdev->aisb = -1UL; - zdev->msi_first_bit = -1U; - if (type == PCI_CAP_ID_MSI && nvec > 1) - return 1; - msi_vecs = min_t(unsigned int, nvec, zdev->max_msi); - if (irq_delivery == DIRECTED) { /* Allocate cpu vector bits */ - bit = airq_iv_alloc(zpci_ibv[0], msi_vecs); - if (bit == -1UL) + *bit = airq_iv_alloc(zpci_ibv[0], msi_vecs); + if (*bit == -1UL) return -EIO; } else { /* Allocate adapter summary indicator bit */ - bit = airq_iv_alloc_bit(zpci_sbv); - if (bit == -1UL) + *bit = airq_iv_alloc_bit(zpci_sbv); + if (*bit == -1UL) return -EIO; - zdev->aisb = bit; + zdev->aisb = *bit; /* Create adapter interrupt vector */ zdev->aibv = airq_iv_create(msi_vecs, AIRQ_IV_DATA | AIRQ_IV_BITLOCK, NULL); @@ -302,27 +289,66 @@ return -ENOMEM; /* Wire up shortcut pointer */ - zpci_ibv[bit] = zdev->aibv; + zpci_ibv[*bit] = zdev->aibv; /* Each function has its own interrupt vector */ - bit = 0; + *bit = 0; + } + return 0; +} + +int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) +{ + unsigned int hwirq, msi_vecs, irqs_per_msi, i, cpu; + struct zpci_dev *zdev = to_zpci(pdev); + struct msi_desc *msi; + struct msi_msg msg; + unsigned long bit; + int cpu_addr; + int rc, irq; + + zdev->aisb = -1UL; + zdev->msi_first_bit = -1U; + + msi_vecs = min_t(unsigned int, nvec, zdev->max_msi); + if (msi_vecs < nvec) { + pr_info("%s requested %d irqs, allocate system limit of %d", + pci_name(pdev), nvec, zdev->max_msi); } - /* Request MSI interrupts */ + rc = __alloc_airq(zdev, msi_vecs, &bit); + if (rc < 0) + return rc; + + /* + * Request MSI interrupts: + * When using MSI, nvec_used interrupt sources and their irq + * descriptors are controlled through one msi descriptor. + * Thus the outer loop over msi descriptors shall run only once, + * while two inner loops iterate over the interrupt vectors. + * When using MSI-X, each interrupt vector/irq descriptor + * is bound to exactly one msi descriptor (nvec_used is one). + * So the inner loops are executed once, while the outer iterates + * over the MSI-X descriptors. + */ hwirq = bit; msi_for_each_desc(msi, &pdev->dev, MSI_DESC_NOTASSOCIATED) { - rc = -EIO; if (hwirq - bit >= msi_vecs) break; - irq = __irq_alloc_descs(-1, 0, 1, 0, THIS_MODULE, - (irq_delivery == DIRECTED) ? - msi->affinity : NULL); + irqs_per_msi = min_t(unsigned int, msi_vecs, msi->nvec_used); + irq = __irq_alloc_descs(-1, 0, irqs_per_msi, 0, THIS_MODULE, + (irq_delivery == DIRECTED) ? + msi->affinity : NULL); if (irq < 0) return -ENOMEM; - rc = irq_set_msi_desc(irq, msi); - if (rc) - return rc; - irq_set_chip_and_handler(irq, &zpci_irq_chip, - handle_percpu_irq); + + for (i = 0; i < irqs_per_msi; i++) { + rc = irq_set_msi_desc_off(irq, i, msi); + if (rc) + return rc; + irq_set_chip_and_handler(irq + i, &zpci_irq_chip, + handle_percpu_irq); + } + msg.data = hwirq - bit; if (irq_delivery == DIRECTED) { if (msi->affinity) @@ -335,31 +361,35 @@ msg.address_lo |= (cpu_addr << 8); for_each_possible_cpu(cpu) { - airq_iv_set_data(zpci_ibv[cpu], hwirq, irq); + for (i = 0; i < irqs_per_msi; i++) + airq_iv_set_data(zpci_ibv[cpu], + hwirq + i, irq + i); } } else { msg.address_lo = zdev->msi_addr & 0xffffffff; - airq_iv_set_data(zdev->aibv, hwirq, irq); + for (i = 0; i < irqs_per_msi; i++) + airq_iv_set_data(zdev->aibv, hwirq + i, irq + i); } msg.address_hi = zdev->msi_addr >> 32; pci_write_msi_msg(irq, &msg); - hwirq++; + hwirq += irqs_per_msi; } zdev->msi_first_bit = bit; - zdev->msi_nr_irqs = msi_vecs; + zdev->msi_nr_irqs = hwirq - bit; rc = zpci_set_irq(zdev); if (rc) return rc; - return (msi_vecs == nvec) ? 0 : msi_vecs; + return (zdev->msi_nr_irqs == nvec) ? 0 : zdev->msi_nr_irqs; } void arch_teardown_msi_irqs(struct pci_dev *pdev) { struct zpci_dev *zdev = to_zpci(pdev); struct msi_desc *msi; + unsigned int i; int rc; /* Disable interrupts */ @@ -369,8 +399,10 @@ /* Release MSI interrupts */ msi_for_each_desc(msi, &pdev->dev, MSI_DESC_ASSOCIATED) { - irq_set_msi_desc(msi->irq, NULL); - irq_free_desc(msi->irq); + for (i = 0; i < msi->nvec_used; i++) { + irq_set_msi_desc(msi->irq + i, NULL); + irq_free_desc(msi->irq + i); + } msi->msg.address_lo = 0; msi->msg.address_hi = 0; msi->msg.data = 0; @@ -410,7 +442,7 @@ union zpci_sic_iib iib = {{0}}; union zpci_sic_iib ziib = {{0}}; - iib.cdiib.dibv_addr = (u64) zpci_ibv[smp_processor_id()]->vector; + iib.cdiib.dibv_addr = virt_to_phys(zpci_ibv[smp_processor_id()]->vector); zpci_set_irq_ctrl(SIC_IRQ_MODE_SET_CPU, 0, &iib); zpci_set_irq_ctrl(SIC_IRQ_MODE_D_SINGLE, PCI_ISC, &ziib); --- linux-xilinx-6.8.0.orig/arch/s390/pci/pci_sysfs.c +++ linux-xilinx-6.8.0/arch/s390/pci/pci_sysfs.c @@ -49,6 +49,39 @@ } static DEVICE_ATTR_RO(mio_enabled); +static int _do_recover(struct pci_dev *pdev, struct zpci_dev *zdev) +{ + u8 status; + int ret; + + pci_stop_and_remove_bus_device(pdev); + if (zdev_enabled(zdev)) { + ret = zpci_disable_device(zdev); + /* + * Due to a z/VM vs LPAR inconsistency in the error + * state the FH may indicate an enabled device but + * disable says the device is already disabled don't + * treat it as an error here. + */ + if (ret == -EINVAL) + ret = 0; + if (ret) + return ret; + } + + ret = zpci_enable_device(zdev); + if (ret) + return ret; + + if (zdev->dma_table) { + ret = zpci_register_ioat(zdev, 0, zdev->start_dma, zdev->end_dma, + virt_to_phys(zdev->dma_table), &status); + if (ret) + zpci_disable_device(zdev); + } + return ret; +} + static ssize_t recover_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { @@ -56,7 +89,6 @@ struct pci_dev *pdev = to_pci_dev(dev); struct zpci_dev *zdev = to_zpci(pdev); int ret = 0; - u8 status; /* Can't use device_remove_self() here as that would lead us to lock * the pci_rescan_remove_lock while holding the device' kernfs lock. @@ -70,6 +102,12 @@ */ kn = sysfs_break_active_protection(&dev->kobj, &attr->attr); WARN_ON_ONCE(!kn); + + /* Device needs to be configured and state must not change */ + mutex_lock(&zdev->state_lock); + if (zdev->state != ZPCI_FN_STATE_CONFIGURED) + goto out; + /* device_remove_file() serializes concurrent calls ignoring all but * the first */ @@ -82,35 +120,13 @@ */ pci_lock_rescan_remove(); if (pci_dev_is_added(pdev)) { - pci_stop_and_remove_bus_device(pdev); - if (zdev_enabled(zdev)) { - ret = zpci_disable_device(zdev); - /* - * Due to a z/VM vs LPAR inconsistency in the error - * state the FH may indicate an enabled device but - * disable says the device is already disabled don't - * treat it as an error here. - */ - if (ret == -EINVAL) - ret = 0; - if (ret) - goto out; - } - - ret = zpci_enable_device(zdev); - if (ret) - goto out; - - if (zdev->dma_table) { - ret = zpci_register_ioat(zdev, 0, zdev->start_dma, zdev->end_dma, - virt_to_phys(zdev->dma_table), &status); - if (ret) - zpci_disable_device(zdev); - } + ret = _do_recover(pdev, zdev); } -out: pci_rescan_bus(zdev->zbus->bus); pci_unlock_rescan_remove(); + +out: + mutex_unlock(&zdev->state_lock); if (kn) sysfs_unbreak_active_protection(kn); return ret ? ret : count; --- linux-xilinx-6.8.0.orig/arch/s390/purgatory/Makefile +++ linux-xilinx-6.8.0/arch/s390/purgatory/Makefile @@ -21,7 +21,7 @@ KASAN_SANITIZE := n KCSAN_SANITIZE := n -KBUILD_CFLAGS := -fno-strict-aliasing -Wall -Wstrict-prototypes +KBUILD_CFLAGS := -std=gnu11 -fno-strict-aliasing -Wall -Wstrict-prototypes KBUILD_CFLAGS += -Wno-pointer-sign -Wno-sign-compare KBUILD_CFLAGS += -fno-zero-initialized-in-bss -fno-builtin -ffreestanding KBUILD_CFLAGS += -Os -m64 -msoft-float -fno-common --- linux-xilinx-6.8.0.orig/arch/sh/kernel/cpu/proc.c +++ linux-xilinx-6.8.0/arch/sh/kernel/cpu/proc.c @@ -132,7 +132,7 @@ static void *c_start(struct seq_file *m, loff_t *pos) { - return *pos < NR_CPUS ? cpu_data + *pos : NULL; + return *pos < nr_cpu_ids ? cpu_data + *pos : NULL; } static void *c_next(struct seq_file *m, void *v, loff_t *pos) { --- linux-xilinx-6.8.0.orig/arch/sh/kernel/kprobes.c +++ linux-xilinx-6.8.0/arch/sh/kernel/kprobes.c @@ -44,17 +44,12 @@ if (OPCODE_RTE(opcode)) return -EFAULT; /* Bad breakpoint */ + memcpy(p->ainsn.insn, p->addr, MAX_INSN_SIZE * sizeof(kprobe_opcode_t)); p->opcode = opcode; return 0; } -void __kprobes arch_copy_kprobe(struct kprobe *p) -{ - memcpy(p->ainsn.insn, p->addr, MAX_INSN_SIZE * sizeof(kprobe_opcode_t)); - p->opcode = *p->addr; -} - void __kprobes arch_arm_kprobe(struct kprobe *p) { *p->addr = BREAKPOINT_INSTRUCTION; --- linux-xilinx-6.8.0.orig/arch/sh/kernel/setup.c +++ linux-xilinx-6.8.0/arch/sh/kernel/setup.c @@ -255,7 +255,7 @@ dt_virt = phys_to_virt(dt_phys); #endif - if (!dt_virt || !early_init_dt_scan(dt_virt)) { + if (!dt_virt || !early_init_dt_scan(dt_virt, __pa(dt_virt))) { pr_crit("Error: invalid device tree blob" " at physical address %p\n", (void *)dt_phys); --- linux-xilinx-6.8.0.orig/arch/sh/kernel/sys_sh32.c +++ linux-xilinx-6.8.0/arch/sh/kernel/sys_sh32.c @@ -59,3 +59,14 @@ (u64)len0 << 32 | len1, advice); #endif } + +/* + * swap the arguments the way that libc wants them instead of + * moving flags ahead of the 64-bit nbytes argument + */ +SYSCALL_DEFINE6(sh_sync_file_range6, int, fd, SC_ARG64(offset), + SC_ARG64(nbytes), unsigned int, flags) +{ + return ksys_sync_file_range(fd, SC_VAL64(loff_t, offset), + SC_VAL64(loff_t, nbytes), flags); +} --- linux-xilinx-6.8.0.orig/arch/sh/kernel/syscalls/syscall.tbl +++ linux-xilinx-6.8.0/arch/sh/kernel/syscalls/syscall.tbl @@ -321,7 +321,7 @@ 311 common set_robust_list sys_set_robust_list 312 common get_robust_list sys_get_robust_list 313 common splice sys_splice -314 common sync_file_range sys_sync_file_range +314 common sync_file_range sys_sh_sync_file_range6 315 common tee sys_tee 316 common vmsplice sys_vmsplice 317 common move_pages sys_move_pages @@ -395,6 +395,7 @@ 385 common pkey_alloc sys_pkey_alloc 386 common pkey_free sys_pkey_free 387 common rseq sys_rseq +388 common sync_file_range2 sys_sync_file_range2 # room for arch specific syscalls 393 common semget sys_semget 394 common semctl sys_semctl --- linux-xilinx-6.8.0.orig/arch/sh/lib/checksum.S +++ linux-xilinx-6.8.0/arch/sh/lib/checksum.S @@ -33,7 +33,8 @@ */ /* - * asmlinkage __wsum csum_partial(const void *buf, int len, __wsum sum); + * unsigned int csum_partial(const unsigned char *buf, int len, + * unsigned int sum); */ .text @@ -45,31 +46,11 @@ * Fortunately, it is easy to convert 2-byte alignment to 4-byte * alignment for the unrolled loop. */ + mov r5, r1 mov r4, r0 - tst #3, r0 ! Check alignment. - bt/s 2f ! Jump if alignment is ok. - mov r4, r7 ! Keep a copy to check for alignment + tst #2, r0 ! Check alignment. + bt 2f ! Jump if alignment is ok. ! - tst #1, r0 ! Check alignment. - bt 21f ! Jump if alignment is boundary of 2bytes. - - ! buf is odd - tst r5, r5 - add #-1, r5 - bt 9f - mov.b @r4+, r0 - extu.b r0, r0 - addc r0, r6 ! t=0 from previous tst - mov r6, r0 - shll8 r6 - shlr16 r0 - shlr8 r0 - or r0, r6 - mov r4, r0 - tst #2, r0 - bt 2f -21: - ! buf is 2 byte aligned (len could be 0) add #-2, r5 ! Alignment uses up two bytes. cmp/pz r5 ! bt/s 1f ! Jump if we had at least two bytes. @@ -77,17 +58,16 @@ bra 6f add #2, r5 ! r5 was < 2. Deal with it. 1: + mov r5, r1 ! Save new len for later use. mov.w @r4+, r0 extu.w r0, r0 addc r0, r6 bf 2f add #1, r6 2: - ! buf is 4 byte aligned (len could be 0) - mov r5, r1 mov #-5, r0 - shld r0, r1 - tst r1, r1 + shld r0, r5 + tst r5, r5 bt/s 4f ! if it's =0, go to 4f clrt .align 2 @@ -109,31 +89,30 @@ addc r0, r6 addc r2, r6 movt r0 - dt r1 + dt r5 bf/s 3b cmp/eq #1, r0 - ! here, we know r1==0 - addc r1, r6 ! add carry to r6 + ! here, we know r5==0 + addc r5, r6 ! add carry to r6 4: - mov r5, r0 + mov r1, r0 and #0x1c, r0 tst r0, r0 - bt 6f - ! 4 bytes or more remaining - mov r0, r1 - shlr2 r1 + bt/s 6f + mov r0, r5 + shlr2 r5 mov #0, r2 5: addc r2, r6 mov.l @r4+, r2 movt r0 - dt r1 + dt r5 bf/s 5b cmp/eq #1, r0 addc r2, r6 - addc r1, r6 ! r1==0 here, so it means add carry-bit + addc r5, r6 ! r5==0 here, so it means add carry-bit 6: - ! 3 bytes or less remaining + mov r1, r5 mov #3, r0 and r0, r5 tst r5, r5 @@ -159,16 +138,6 @@ mov #0, r0 addc r0, r6 9: - ! Check if the buffer was misaligned, if so realign sum - mov r7, r0 - tst #1, r0 - bt 10f - mov r6, r0 - shll8 r6 - shlr16 r0 - shlr8 r0 - or r0, r6 -10: rts mov r6, r0 --- linux-xilinx-6.8.0.orig/arch/sparc/Kconfig +++ linux-xilinx-6.8.0/arch/sparc/Kconfig @@ -57,6 +57,8 @@ select CLZ_TAB select DMA_DIRECT_REMAP select GENERIC_ATOMIC64 + select GENERIC_LIB_CMPDI2 + select GENERIC_LIB_UCMPDI2 select HAVE_UID16 select LOCK_MM_AND_FIND_VMA select OLD_SIGACTION @@ -140,10 +142,6 @@ default y if SPARC32 select KMAP_LOCAL -config GENERIC_ISA_DMA - bool - default y if SPARC32 - config PGTABLE_LEVELS default 4 if 64BIT default 3 --- linux-xilinx-6.8.0.orig/arch/sparc/include/asm/oplib_64.h +++ linux-xilinx-6.8.0/arch/sparc/include/asm/oplib_64.h @@ -247,6 +247,7 @@ int prom_ihandle2path(int handle, char *buffer, int bufsize); /* Client interface level routines. */ +void prom_cif_init(void *cif_handler); void p1275_cmd_direct(unsigned long *); #endif /* !(__SPARC64_OPLIB_H) */ --- linux-xilinx-6.8.0.orig/arch/sparc/include/asm/parport.h +++ linux-xilinx-6.8.0/arch/sparc/include/asm/parport.h @@ -1,256 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0 */ -/* parport.h: sparc64 specific parport initialization and dma. - * - * Copyright (C) 1999 Eddie C. Dost (ecd@skynet.be) - */ +#ifndef ___ASM_SPARC_PARPORT_H +#define ___ASM_SPARC_PARPORT_H -#ifndef _ASM_SPARC64_PARPORT_H -#define _ASM_SPARC64_PARPORT_H 1 - -#include -#include - -#include -#include -#include - -#define PARPORT_PC_MAX_PORTS PARPORT_MAX - -/* - * While sparc64 doesn't have an ISA DMA API, we provide something that looks - * close enough to make parport_pc happy - */ -#define HAS_DMA - -#ifdef CONFIG_PARPORT_PC_FIFO -static DEFINE_SPINLOCK(dma_spin_lock); - -#define claim_dma_lock() \ -({ unsigned long flags; \ - spin_lock_irqsave(&dma_spin_lock, flags); \ - flags; \ -}) - -#define release_dma_lock(__flags) \ - spin_unlock_irqrestore(&dma_spin_lock, __flags); +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif #endif -static struct sparc_ebus_info { - struct ebus_dma_info info; - unsigned int addr; - unsigned int count; - int lock; - - struct parport *port; -} sparc_ebus_dmas[PARPORT_PC_MAX_PORTS]; - -static DECLARE_BITMAP(dma_slot_map, PARPORT_PC_MAX_PORTS); - -static inline int request_dma(unsigned int dmanr, const char *device_id) -{ - if (dmanr >= PARPORT_PC_MAX_PORTS) - return -EINVAL; - if (xchg(&sparc_ebus_dmas[dmanr].lock, 1) != 0) - return -EBUSY; - return 0; -} - -static inline void free_dma(unsigned int dmanr) -{ - if (dmanr >= PARPORT_PC_MAX_PORTS) { - printk(KERN_WARNING "Trying to free DMA%d\n", dmanr); - return; - } - if (xchg(&sparc_ebus_dmas[dmanr].lock, 0) == 0) { - printk(KERN_WARNING "Trying to free free DMA%d\n", dmanr); - return; - } -} - -static inline void enable_dma(unsigned int dmanr) -{ - ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 1); - - if (ebus_dma_request(&sparc_ebus_dmas[dmanr].info, - sparc_ebus_dmas[dmanr].addr, - sparc_ebus_dmas[dmanr].count)) - BUG(); -} - -static inline void disable_dma(unsigned int dmanr) -{ - ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 0); -} - -static inline void clear_dma_ff(unsigned int dmanr) -{ - /* nothing */ -} - -static inline void set_dma_mode(unsigned int dmanr, char mode) -{ - ebus_dma_prepare(&sparc_ebus_dmas[dmanr].info, (mode != DMA_MODE_WRITE)); -} - -static inline void set_dma_addr(unsigned int dmanr, unsigned int addr) -{ - sparc_ebus_dmas[dmanr].addr = addr; -} - -static inline void set_dma_count(unsigned int dmanr, unsigned int count) -{ - sparc_ebus_dmas[dmanr].count = count; -} - -static inline unsigned int get_dma_residue(unsigned int dmanr) -{ - return ebus_dma_residue(&sparc_ebus_dmas[dmanr].info); -} - -static int ecpp_probe(struct platform_device *op) -{ - unsigned long base = op->resource[0].start; - unsigned long config = op->resource[1].start; - unsigned long d_base = op->resource[2].start; - unsigned long d_len; - struct device_node *parent; - struct parport *p; - int slot, err; - - parent = op->dev.of_node->parent; - if (of_node_name_eq(parent, "dma")) { - p = parport_pc_probe_port(base, base + 0x400, - op->archdata.irqs[0], PARPORT_DMA_NOFIFO, - op->dev.parent->parent, 0); - if (!p) - return -ENOMEM; - dev_set_drvdata(&op->dev, p); - return 0; - } - - for (slot = 0; slot < PARPORT_PC_MAX_PORTS; slot++) { - if (!test_and_set_bit(slot, dma_slot_map)) - break; - } - err = -ENODEV; - if (slot >= PARPORT_PC_MAX_PORTS) - goto out_err; - - spin_lock_init(&sparc_ebus_dmas[slot].info.lock); - - d_len = (op->resource[2].end - d_base) + 1UL; - sparc_ebus_dmas[slot].info.regs = - of_ioremap(&op->resource[2], 0, d_len, "ECPP DMA"); - - if (!sparc_ebus_dmas[slot].info.regs) - goto out_clear_map; - - sparc_ebus_dmas[slot].info.flags = 0; - sparc_ebus_dmas[slot].info.callback = NULL; - sparc_ebus_dmas[slot].info.client_cookie = NULL; - sparc_ebus_dmas[slot].info.irq = 0xdeadbeef; - strcpy(sparc_ebus_dmas[slot].info.name, "parport"); - if (ebus_dma_register(&sparc_ebus_dmas[slot].info)) - goto out_unmap_regs; - - ebus_dma_irq_enable(&sparc_ebus_dmas[slot].info, 1); - - /* Configure IRQ to Push Pull, Level Low */ - /* Enable ECP, set bit 2 of the CTR first */ - outb(0x04, base + 0x02); - ns87303_modify(config, PCR, - PCR_EPP_ENABLE | - PCR_IRQ_ODRAIN, - PCR_ECP_ENABLE | - PCR_ECP_CLK_ENA | - PCR_IRQ_POLAR); - - /* CTR bit 5 controls direction of port */ - ns87303_modify(config, PTR, - 0, PTR_LPT_REG_DIR); - - p = parport_pc_probe_port(base, base + 0x400, - op->archdata.irqs[0], - slot, - op->dev.parent, - 0); - err = -ENOMEM; - if (!p) - goto out_disable_irq; - - dev_set_drvdata(&op->dev, p); - - return 0; - -out_disable_irq: - ebus_dma_irq_enable(&sparc_ebus_dmas[slot].info, 0); - ebus_dma_unregister(&sparc_ebus_dmas[slot].info); - -out_unmap_regs: - of_iounmap(&op->resource[2], sparc_ebus_dmas[slot].info.regs, d_len); - -out_clear_map: - clear_bit(slot, dma_slot_map); - -out_err: - return err; -} - -static int ecpp_remove(struct platform_device *op) -{ - struct parport *p = dev_get_drvdata(&op->dev); - int slot = p->dma; - - parport_pc_unregister_port(p); - - if (slot != PARPORT_DMA_NOFIFO) { - unsigned long d_base = op->resource[2].start; - unsigned long d_len; - - d_len = (op->resource[2].end - d_base) + 1UL; - - ebus_dma_irq_enable(&sparc_ebus_dmas[slot].info, 0); - ebus_dma_unregister(&sparc_ebus_dmas[slot].info); - of_iounmap(&op->resource[2], - sparc_ebus_dmas[slot].info.regs, - d_len); - clear_bit(slot, dma_slot_map); - } - - return 0; -} - -static const struct of_device_id ecpp_match[] = { - { - .name = "ecpp", - }, - { - .name = "parallel", - .compatible = "ecpp", - }, - { - .name = "parallel", - .compatible = "ns87317-ecpp", - }, - { - .name = "parallel", - .compatible = "pnpALI,1533,3", - }, - {}, -}; - -static struct platform_driver ecpp_driver = { - .driver = { - .name = "ecpp", - .of_match_table = ecpp_match, - }, - .probe = ecpp_probe, - .remove = ecpp_remove, -}; - -static int parport_pc_find_nonpci_ports(int autoirq, int autodma) -{ - return platform_driver_register(&ecpp_driver); -} - -#endif /* !(_ASM_SPARC64_PARPORT_H */ --- linux-xilinx-6.8.0.orig/arch/sparc/include/asm/parport_64.h +++ linux-xilinx-6.8.0/arch/sparc/include/asm/parport_64.h @@ -0,0 +1,256 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* parport.h: sparc64 specific parport initialization and dma. + * + * Copyright (C) 1999 Eddie C. Dost (ecd@skynet.be) + */ + +#ifndef _ASM_SPARC64_PARPORT_H +#define _ASM_SPARC64_PARPORT_H 1 + +#include +#include + +#include +#include +#include + +#define PARPORT_PC_MAX_PORTS PARPORT_MAX + +/* + * While sparc64 doesn't have an ISA DMA API, we provide something that looks + * close enough to make parport_pc happy + */ +#define HAS_DMA + +#ifdef CONFIG_PARPORT_PC_FIFO +static DEFINE_SPINLOCK(dma_spin_lock); + +#define claim_dma_lock() \ +({ unsigned long flags; \ + spin_lock_irqsave(&dma_spin_lock, flags); \ + flags; \ +}) + +#define release_dma_lock(__flags) \ + spin_unlock_irqrestore(&dma_spin_lock, __flags); +#endif + +static struct sparc_ebus_info { + struct ebus_dma_info info; + unsigned int addr; + unsigned int count; + int lock; + + struct parport *port; +} sparc_ebus_dmas[PARPORT_PC_MAX_PORTS]; + +static DECLARE_BITMAP(dma_slot_map, PARPORT_PC_MAX_PORTS); + +static inline int request_dma(unsigned int dmanr, const char *device_id) +{ + if (dmanr >= PARPORT_PC_MAX_PORTS) + return -EINVAL; + if (xchg(&sparc_ebus_dmas[dmanr].lock, 1) != 0) + return -EBUSY; + return 0; +} + +static inline void free_dma(unsigned int dmanr) +{ + if (dmanr >= PARPORT_PC_MAX_PORTS) { + printk(KERN_WARNING "Trying to free DMA%d\n", dmanr); + return; + } + if (xchg(&sparc_ebus_dmas[dmanr].lock, 0) == 0) { + printk(KERN_WARNING "Trying to free free DMA%d\n", dmanr); + return; + } +} + +static inline void enable_dma(unsigned int dmanr) +{ + ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 1); + + if (ebus_dma_request(&sparc_ebus_dmas[dmanr].info, + sparc_ebus_dmas[dmanr].addr, + sparc_ebus_dmas[dmanr].count)) + BUG(); +} + +static inline void disable_dma(unsigned int dmanr) +{ + ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 0); +} + +static inline void clear_dma_ff(unsigned int dmanr) +{ + /* nothing */ +} + +static inline void set_dma_mode(unsigned int dmanr, char mode) +{ + ebus_dma_prepare(&sparc_ebus_dmas[dmanr].info, (mode != DMA_MODE_WRITE)); +} + +static inline void set_dma_addr(unsigned int dmanr, unsigned int addr) +{ + sparc_ebus_dmas[dmanr].addr = addr; +} + +static inline void set_dma_count(unsigned int dmanr, unsigned int count) +{ + sparc_ebus_dmas[dmanr].count = count; +} + +static inline unsigned int get_dma_residue(unsigned int dmanr) +{ + return ebus_dma_residue(&sparc_ebus_dmas[dmanr].info); +} + +static int ecpp_probe(struct platform_device *op) +{ + unsigned long base = op->resource[0].start; + unsigned long config = op->resource[1].start; + unsigned long d_base = op->resource[2].start; + unsigned long d_len; + struct device_node *parent; + struct parport *p; + int slot, err; + + parent = op->dev.of_node->parent; + if (of_node_name_eq(parent, "dma")) { + p = parport_pc_probe_port(base, base + 0x400, + op->archdata.irqs[0], PARPORT_DMA_NOFIFO, + op->dev.parent->parent, 0); + if (!p) + return -ENOMEM; + dev_set_drvdata(&op->dev, p); + return 0; + } + + for (slot = 0; slot < PARPORT_PC_MAX_PORTS; slot++) { + if (!test_and_set_bit(slot, dma_slot_map)) + break; + } + err = -ENODEV; + if (slot >= PARPORT_PC_MAX_PORTS) + goto out_err; + + spin_lock_init(&sparc_ebus_dmas[slot].info.lock); + + d_len = (op->resource[2].end - d_base) + 1UL; + sparc_ebus_dmas[slot].info.regs = + of_ioremap(&op->resource[2], 0, d_len, "ECPP DMA"); + + if (!sparc_ebus_dmas[slot].info.regs) + goto out_clear_map; + + sparc_ebus_dmas[slot].info.flags = 0; + sparc_ebus_dmas[slot].info.callback = NULL; + sparc_ebus_dmas[slot].info.client_cookie = NULL; + sparc_ebus_dmas[slot].info.irq = 0xdeadbeef; + strcpy(sparc_ebus_dmas[slot].info.name, "parport"); + if (ebus_dma_register(&sparc_ebus_dmas[slot].info)) + goto out_unmap_regs; + + ebus_dma_irq_enable(&sparc_ebus_dmas[slot].info, 1); + + /* Configure IRQ to Push Pull, Level Low */ + /* Enable ECP, set bit 2 of the CTR first */ + outb(0x04, base + 0x02); + ns87303_modify(config, PCR, + PCR_EPP_ENABLE | + PCR_IRQ_ODRAIN, + PCR_ECP_ENABLE | + PCR_ECP_CLK_ENA | + PCR_IRQ_POLAR); + + /* CTR bit 5 controls direction of port */ + ns87303_modify(config, PTR, + 0, PTR_LPT_REG_DIR); + + p = parport_pc_probe_port(base, base + 0x400, + op->archdata.irqs[0], + slot, + op->dev.parent, + 0); + err = -ENOMEM; + if (!p) + goto out_disable_irq; + + dev_set_drvdata(&op->dev, p); + + return 0; + +out_disable_irq: + ebus_dma_irq_enable(&sparc_ebus_dmas[slot].info, 0); + ebus_dma_unregister(&sparc_ebus_dmas[slot].info); + +out_unmap_regs: + of_iounmap(&op->resource[2], sparc_ebus_dmas[slot].info.regs, d_len); + +out_clear_map: + clear_bit(slot, dma_slot_map); + +out_err: + return err; +} + +static int ecpp_remove(struct platform_device *op) +{ + struct parport *p = dev_get_drvdata(&op->dev); + int slot = p->dma; + + parport_pc_unregister_port(p); + + if (slot != PARPORT_DMA_NOFIFO) { + unsigned long d_base = op->resource[2].start; + unsigned long d_len; + + d_len = (op->resource[2].end - d_base) + 1UL; + + ebus_dma_irq_enable(&sparc_ebus_dmas[slot].info, 0); + ebus_dma_unregister(&sparc_ebus_dmas[slot].info); + of_iounmap(&op->resource[2], + sparc_ebus_dmas[slot].info.regs, + d_len); + clear_bit(slot, dma_slot_map); + } + + return 0; +} + +static const struct of_device_id ecpp_match[] = { + { + .name = "ecpp", + }, + { + .name = "parallel", + .compatible = "ecpp", + }, + { + .name = "parallel", + .compatible = "ns87317-ecpp", + }, + { + .name = "parallel", + .compatible = "pnpALI,1533,3", + }, + {}, +}; + +static struct platform_driver ecpp_driver = { + .driver = { + .name = "ecpp", + .of_match_table = ecpp_match, + }, + .probe = ecpp_probe, + .remove = ecpp_remove, +}; + +static int parport_pc_find_nonpci_ports(int autoirq, int autodma) +{ + return platform_driver_register(&ecpp_driver); +} + +#endif /* !(_ASM_SPARC64_PARPORT_H */ --- linux-xilinx-6.8.0.orig/arch/sparc/include/asm/smp_64.h +++ linux-xilinx-6.8.0/arch/sparc/include/asm/smp_64.h @@ -47,7 +47,6 @@ int hard_smp_processor_id(void); #define raw_smp_processor_id() (current_thread_info()->cpu) -void smp_fill_in_cpu_possible_map(void); void smp_fill_in_sib_core_maps(void); void __noreturn cpu_play_dead(void); @@ -77,7 +76,6 @@ #define smp_fill_in_sib_core_maps() do { } while (0) #define smp_fetch_global_regs() do { } while (0) #define smp_fetch_global_pmu() do { } while (0) -#define smp_fill_in_cpu_possible_map() do { } while (0) #define smp_init_cpu_poke() do { } while (0) #define scheduler_poke() do { } while (0) --- linux-xilinx-6.8.0.orig/arch/sparc/include/uapi/asm/termbits.h +++ linux-xilinx-6.8.0/arch/sparc/include/uapi/asm/termbits.h @@ -10,16 +10,6 @@ typedef unsigned long tcflag_t; #endif -#define NCC 8 -struct termio { - unsigned short c_iflag; /* input mode flags */ - unsigned short c_oflag; /* output mode flags */ - unsigned short c_cflag; /* control mode flags */ - unsigned short c_lflag; /* local mode flags */ - unsigned char c_line; /* line discipline */ - unsigned char c_cc[NCC]; /* control characters */ -}; - #define NCCS 17 struct termios { tcflag_t c_iflag; /* input mode flags */ --- linux-xilinx-6.8.0.orig/arch/sparc/include/uapi/asm/termios.h +++ linux-xilinx-6.8.0/arch/sparc/include/uapi/asm/termios.h @@ -40,5 +40,14 @@ unsigned short ws_ypixel; }; +#define NCC 8 +struct termio { + unsigned short c_iflag; /* input mode flags */ + unsigned short c_oflag; /* output mode flags */ + unsigned short c_cflag; /* control mode flags */ + unsigned short c_lflag; /* local mode flags */ + unsigned char c_line; /* line discipline */ + unsigned char c_cc[NCC]; /* control characters */ +}; #endif /* _UAPI_SPARC_TERMIOS_H */ --- linux-xilinx-6.8.0.orig/arch/sparc/kernel/leon_pci_grpci1.c +++ linux-xilinx-6.8.0/arch/sparc/kernel/leon_pci_grpci1.c @@ -697,7 +697,7 @@ return err; } -static const struct of_device_id grpci1_of_match[] __initconst = { +static const struct of_device_id grpci1_of_match[] = { { .name = "GAISLER_PCIFBRG", }, --- linux-xilinx-6.8.0.orig/arch/sparc/kernel/leon_pci_grpci2.c +++ linux-xilinx-6.8.0/arch/sparc/kernel/leon_pci_grpci2.c @@ -889,7 +889,7 @@ return err; } -static const struct of_device_id grpci2_of_match[] __initconst = { +static const struct of_device_id grpci2_of_match[] = { { .name = "GAISLER_GRPCI2", }, --- linux-xilinx-6.8.0.orig/arch/sparc/kernel/nmi.c +++ linux-xilinx-6.8.0/arch/sparc/kernel/nmi.c @@ -279,7 +279,7 @@ if (!strncmp(str, "panic", 5)) panic_on_timeout = 1; - return 0; + return 1; } __setup("nmi_watchdog=", setup_nmi_watchdog); --- linux-xilinx-6.8.0.orig/arch/sparc/kernel/prom_64.c +++ linux-xilinx-6.8.0/arch/sparc/kernel/prom_64.c @@ -483,7 +483,9 @@ ncpus_probed++; #ifdef CONFIG_SMP set_cpu_present(cpuid, true); - set_cpu_possible(cpuid, true); + + if (num_possible_cpus() < nr_cpu_ids) + set_cpu_possible(cpuid, true); #endif return NULL; } --- linux-xilinx-6.8.0.orig/arch/sparc/kernel/setup_64.c +++ linux-xilinx-6.8.0/arch/sparc/kernel/setup_64.c @@ -671,7 +671,6 @@ paging_init(); init_sparc64_elf_hwcap(); - smp_fill_in_cpu_possible_map(); /* * Once the OF device tree and MDESC have been setup and nr_cpus has * been parsed, we know the list of possible cpus. Therefore we can --- linux-xilinx-6.8.0.orig/arch/sparc/kernel/smp_64.c +++ linux-xilinx-6.8.0/arch/sparc/kernel/smp_64.c @@ -1220,20 +1220,6 @@ xcall_deliver_impl = hypervisor_xcall_deliver; } -void __init smp_fill_in_cpu_possible_map(void) -{ - int possible_cpus = num_possible_cpus(); - int i; - - if (possible_cpus > nr_cpu_ids) - possible_cpus = nr_cpu_ids; - - for (i = 0; i < possible_cpus; i++) - set_cpu_possible(i, true); - for (; i < NR_CPUS; i++) - set_cpu_possible(i, false); -} - void smp_fill_in_sib_core_maps(void) { unsigned int i; --- linux-xilinx-6.8.0.orig/arch/sparc/kernel/sys32.S +++ linux-xilinx-6.8.0/arch/sparc/kernel/sys32.S @@ -18,224 +18,3 @@ sethi %hi(sys_mmap), %g1 jmpl %g1 + %lo(sys_mmap), %g0 sllx %o5, 12, %o5 - - .align 32 - .globl sys32_socketcall -sys32_socketcall: /* %o0=call, %o1=args */ - cmp %o0, 1 - bl,pn %xcc, do_einval - cmp %o0, 18 - bg,pn %xcc, do_einval - sub %o0, 1, %o0 - sllx %o0, 5, %o0 - sethi %hi(__socketcall_table_begin), %g2 - or %g2, %lo(__socketcall_table_begin), %g2 - jmpl %g2 + %o0, %g0 - nop -do_einval: - retl - mov -EINVAL, %o0 - - .align 32 -__socketcall_table_begin: - - /* Each entry is exactly 32 bytes. */ -do_sys_socket: /* sys_socket(int, int, int) */ -1: ldswa [%o1 + 0x0] %asi, %o0 - sethi %hi(sys_socket), %g1 -2: ldswa [%o1 + 0x8] %asi, %o2 - jmpl %g1 + %lo(sys_socket), %g0 -3: ldswa [%o1 + 0x4] %asi, %o1 - nop - nop - nop -do_sys_bind: /* sys_bind(int fd, struct sockaddr *, int) */ -4: ldswa [%o1 + 0x0] %asi, %o0 - sethi %hi(sys_bind), %g1 -5: ldswa [%o1 + 0x8] %asi, %o2 - jmpl %g1 + %lo(sys_bind), %g0 -6: lduwa [%o1 + 0x4] %asi, %o1 - nop - nop - nop -do_sys_connect: /* sys_connect(int, struct sockaddr *, int) */ -7: ldswa [%o1 + 0x0] %asi, %o0 - sethi %hi(sys_connect), %g1 -8: ldswa [%o1 + 0x8] %asi, %o2 - jmpl %g1 + %lo(sys_connect), %g0 -9: lduwa [%o1 + 0x4] %asi, %o1 - nop - nop - nop -do_sys_listen: /* sys_listen(int, int) */ -10: ldswa [%o1 + 0x0] %asi, %o0 - sethi %hi(sys_listen), %g1 - jmpl %g1 + %lo(sys_listen), %g0 -11: ldswa [%o1 + 0x4] %asi, %o1 - nop - nop - nop - nop -do_sys_accept: /* sys_accept(int, struct sockaddr *, int *) */ -12: ldswa [%o1 + 0x0] %asi, %o0 - sethi %hi(sys_accept), %g1 -13: lduwa [%o1 + 0x8] %asi, %o2 - jmpl %g1 + %lo(sys_accept), %g0 -14: lduwa [%o1 + 0x4] %asi, %o1 - nop - nop - nop -do_sys_getsockname: /* sys_getsockname(int, struct sockaddr *, int *) */ -15: ldswa [%o1 + 0x0] %asi, %o0 - sethi %hi(sys_getsockname), %g1 -16: lduwa [%o1 + 0x8] %asi, %o2 - jmpl %g1 + %lo(sys_getsockname), %g0 -17: lduwa [%o1 + 0x4] %asi, %o1 - nop - nop - nop -do_sys_getpeername: /* sys_getpeername(int, struct sockaddr *, int *) */ -18: ldswa [%o1 + 0x0] %asi, %o0 - sethi %hi(sys_getpeername), %g1 -19: lduwa [%o1 + 0x8] %asi, %o2 - jmpl %g1 + %lo(sys_getpeername), %g0 -20: lduwa [%o1 + 0x4] %asi, %o1 - nop - nop - nop -do_sys_socketpair: /* sys_socketpair(int, int, int, int *) */ -21: ldswa [%o1 + 0x0] %asi, %o0 - sethi %hi(sys_socketpair), %g1 -22: ldswa [%o1 + 0x8] %asi, %o2 -23: lduwa [%o1 + 0xc] %asi, %o3 - jmpl %g1 + %lo(sys_socketpair), %g0 -24: ldswa [%o1 + 0x4] %asi, %o1 - nop - nop -do_sys_send: /* sys_send(int, void *, size_t, unsigned int) */ -25: ldswa [%o1 + 0x0] %asi, %o0 - sethi %hi(sys_send), %g1 -26: lduwa [%o1 + 0x8] %asi, %o2 -27: lduwa [%o1 + 0xc] %asi, %o3 - jmpl %g1 + %lo(sys_send), %g0 -28: lduwa [%o1 + 0x4] %asi, %o1 - nop - nop -do_sys_recv: /* sys_recv(int, void *, size_t, unsigned int) */ -29: ldswa [%o1 + 0x0] %asi, %o0 - sethi %hi(sys_recv), %g1 -30: lduwa [%o1 + 0x8] %asi, %o2 -31: lduwa [%o1 + 0xc] %asi, %o3 - jmpl %g1 + %lo(sys_recv), %g0 -32: lduwa [%o1 + 0x4] %asi, %o1 - nop - nop -do_sys_sendto: /* sys_sendto(int, u32, compat_size_t, unsigned int, u32, int) */ -33: ldswa [%o1 + 0x0] %asi, %o0 - sethi %hi(sys_sendto), %g1 -34: lduwa [%o1 + 0x8] %asi, %o2 -35: lduwa [%o1 + 0xc] %asi, %o3 -36: lduwa [%o1 + 0x10] %asi, %o4 -37: ldswa [%o1 + 0x14] %asi, %o5 - jmpl %g1 + %lo(sys_sendto), %g0 -38: lduwa [%o1 + 0x4] %asi, %o1 -do_sys_recvfrom: /* sys_recvfrom(int, u32, compat_size_t, unsigned int, u32, u32) */ -39: ldswa [%o1 + 0x0] %asi, %o0 - sethi %hi(sys_recvfrom), %g1 -40: lduwa [%o1 + 0x8] %asi, %o2 -41: lduwa [%o1 + 0xc] %asi, %o3 -42: lduwa [%o1 + 0x10] %asi, %o4 -43: lduwa [%o1 + 0x14] %asi, %o5 - jmpl %g1 + %lo(sys_recvfrom), %g0 -44: lduwa [%o1 + 0x4] %asi, %o1 -do_sys_shutdown: /* sys_shutdown(int, int) */ -45: ldswa [%o1 + 0x0] %asi, %o0 - sethi %hi(sys_shutdown), %g1 - jmpl %g1 + %lo(sys_shutdown), %g0 -46: ldswa [%o1 + 0x4] %asi, %o1 - nop - nop - nop - nop -do_sys_setsockopt: /* sys_setsockopt(int, int, int, char *, int) */ -47: ldswa [%o1 + 0x0] %asi, %o0 - sethi %hi(sys_setsockopt), %g1 -48: ldswa [%o1 + 0x8] %asi, %o2 -49: lduwa [%o1 + 0xc] %asi, %o3 -50: ldswa [%o1 + 0x10] %asi, %o4 - jmpl %g1 + %lo(sys_setsockopt), %g0 -51: ldswa [%o1 + 0x4] %asi, %o1 - nop -do_sys_getsockopt: /* sys_getsockopt(int, int, int, u32, u32) */ -52: ldswa [%o1 + 0x0] %asi, %o0 - sethi %hi(sys_getsockopt), %g1 -53: ldswa [%o1 + 0x8] %asi, %o2 -54: lduwa [%o1 + 0xc] %asi, %o3 -55: lduwa [%o1 + 0x10] %asi, %o4 - jmpl %g1 + %lo(sys_getsockopt), %g0 -56: ldswa [%o1 + 0x4] %asi, %o1 - nop -do_sys_sendmsg: /* compat_sys_sendmsg(int, struct compat_msghdr *, unsigned int) */ -57: ldswa [%o1 + 0x0] %asi, %o0 - sethi %hi(compat_sys_sendmsg), %g1 -58: lduwa [%o1 + 0x8] %asi, %o2 - jmpl %g1 + %lo(compat_sys_sendmsg), %g0 -59: lduwa [%o1 + 0x4] %asi, %o1 - nop - nop - nop -do_sys_recvmsg: /* compat_sys_recvmsg(int, struct compat_msghdr *, unsigned int) */ -60: ldswa [%o1 + 0x0] %asi, %o0 - sethi %hi(compat_sys_recvmsg), %g1 -61: lduwa [%o1 + 0x8] %asi, %o2 - jmpl %g1 + %lo(compat_sys_recvmsg), %g0 -62: lduwa [%o1 + 0x4] %asi, %o1 - nop - nop - nop -do_sys_accept4: /* sys_accept4(int, struct sockaddr *, int *, int) */ -63: ldswa [%o1 + 0x0] %asi, %o0 - sethi %hi(sys_accept4), %g1 -64: lduwa [%o1 + 0x8] %asi, %o2 -65: ldswa [%o1 + 0xc] %asi, %o3 - jmpl %g1 + %lo(sys_accept4), %g0 -66: lduwa [%o1 + 0x4] %asi, %o1 - nop - nop - - .section __ex_table,"a" - .align 4 - .word 1b, __retl_efault, 2b, __retl_efault - .word 3b, __retl_efault, 4b, __retl_efault - .word 5b, __retl_efault, 6b, __retl_efault - .word 7b, __retl_efault, 8b, __retl_efault - .word 9b, __retl_efault, 10b, __retl_efault - .word 11b, __retl_efault, 12b, __retl_efault - .word 13b, __retl_efault, 14b, __retl_efault - .word 15b, __retl_efault, 16b, __retl_efault - .word 17b, __retl_efault, 18b, __retl_efault - .word 19b, __retl_efault, 20b, __retl_efault - .word 21b, __retl_efault, 22b, __retl_efault - .word 23b, __retl_efault, 24b, __retl_efault - .word 25b, __retl_efault, 26b, __retl_efault - .word 27b, __retl_efault, 28b, __retl_efault - .word 29b, __retl_efault, 30b, __retl_efault - .word 31b, __retl_efault, 32b, __retl_efault - .word 33b, __retl_efault, 34b, __retl_efault - .word 35b, __retl_efault, 36b, __retl_efault - .word 37b, __retl_efault, 38b, __retl_efault - .word 39b, __retl_efault, 40b, __retl_efault - .word 41b, __retl_efault, 42b, __retl_efault - .word 43b, __retl_efault, 44b, __retl_efault - .word 45b, __retl_efault, 46b, __retl_efault - .word 47b, __retl_efault, 48b, __retl_efault - .word 49b, __retl_efault, 50b, __retl_efault - .word 51b, __retl_efault, 52b, __retl_efault - .word 53b, __retl_efault, 54b, __retl_efault - .word 55b, __retl_efault, 56b, __retl_efault - .word 57b, __retl_efault, 58b, __retl_efault - .word 59b, __retl_efault, 60b, __retl_efault - .word 61b, __retl_efault, 62b, __retl_efault - .word 63b, __retl_efault, 64b, __retl_efault - .word 65b, __retl_efault, 66b, __retl_efault - .previous --- linux-xilinx-6.8.0.orig/arch/sparc/kernel/syscalls/syscall.tbl +++ linux-xilinx-6.8.0/arch/sparc/kernel/syscalls/syscall.tbl @@ -117,7 +117,7 @@ 90 common dup2 sys_dup2 91 32 setfsuid32 sys_setfsuid 92 common fcntl sys_fcntl compat_sys_fcntl -93 common select sys_select +93 common select sys_select compat_sys_select 94 32 setfsgid32 sys_setfsgid 95 common fsync sys_fsync 96 common setpriority sys_setpriority @@ -155,7 +155,7 @@ 123 32 fchown sys_fchown16 123 64 fchown sys_fchown 124 common fchmod sys_fchmod -125 common recvfrom sys_recvfrom +125 common recvfrom sys_recvfrom compat_sys_recvfrom 126 32 setreuid sys_setreuid16 126 64 setreuid sys_setreuid 127 32 setregid sys_setregid16 @@ -247,7 +247,7 @@ 204 32 readdir sys_old_readdir compat_sys_old_readdir 204 64 readdir sys_nis_syscall 205 common readahead sys_readahead compat_sys_readahead -206 common socketcall sys_socketcall sys32_socketcall +206 common socketcall sys_socketcall compat_sys_socketcall 207 common syslog sys_syslog 208 common lookup_dcookie sys_ni_syscall 209 common fadvise64 sys_fadvise64 compat_sys_fadvise64 @@ -461,7 +461,7 @@ 412 32 utimensat_time64 sys_utimensat sys_utimensat 413 32 pselect6_time64 sys_pselect6 compat_sys_pselect6_time64 414 32 ppoll_time64 sys_ppoll compat_sys_ppoll_time64 -416 32 io_pgetevents_time64 sys_io_pgetevents sys_io_pgetevents +416 32 io_pgetevents_time64 sys_io_pgetevents compat_sys_io_pgetevents_time64 417 32 recvmmsg_time64 sys_recvmmsg compat_sys_recvmmsg_time64 418 32 mq_timedsend_time64 sys_mq_timedsend sys_mq_timedsend 419 32 mq_timedreceive_time64 sys_mq_timedreceive sys_mq_timedreceive --- linux-xilinx-6.8.0.orig/arch/sparc/lib/Makefile +++ linux-xilinx-6.8.0/arch/sparc/lib/Makefile @@ -14,7 +14,7 @@ lib-$(CONFIG_SPARC32) += copy_user.o locks.o lib-$(CONFIG_SPARC64) += atomic_64.o lib-$(CONFIG_SPARC32) += lshrdi3.o ashldi3.o -lib-$(CONFIG_SPARC32) += muldi3.o bitext.o cmpdi2.o +lib-$(CONFIG_SPARC32) += muldi3.o bitext.o lib-$(CONFIG_SPARC64) += multi3.o lib-$(CONFIG_SPARC64) += fls.o lib-$(CONFIG_SPARC64) += fls64.o @@ -51,5 +51,5 @@ lib-$(CONFIG_SPARC64) += mcount.o ipcsum.o xor.o hweight.o ffs.o obj-$(CONFIG_SPARC64) += iomap.o -obj-$(CONFIG_SPARC32) += atomic32.o ucmpdi2.o +obj-$(CONFIG_SPARC32) += atomic32.o obj-$(CONFIG_SPARC64) += PeeCeeI.o --- linux-xilinx-6.8.0.orig/arch/sparc/mm/init_64.c +++ linux-xilinx-6.8.0/arch/sparc/mm/init_64.c @@ -1665,7 +1665,7 @@ if (pud_none(*pud)) return false; - if (pud_large(*pud)) + if (pud_leaf(*pud)) return pfn_valid(pud_pfn(*pud)); pmd = pmd_offset(pud, addr); --- linux-xilinx-6.8.0.orig/arch/sparc/mm/tlb.c +++ linux-xilinx-6.8.0/arch/sparc/mm/tlb.c @@ -249,6 +249,7 @@ { pmd_t old, entry; + VM_WARN_ON_ONCE(!pmd_present(*pmdp)); entry = __pmd(pmd_val(*pmdp) & ~_PAGE_VALID); old = pmdp_establish(vma, address, pmdp, entry); flush_tlb_range(vma, address, address + HPAGE_PMD_SIZE); --- linux-xilinx-6.8.0.orig/arch/sparc/net/bpf_jit_comp_64.c +++ linux-xilinx-6.8.0/arch/sparc/net/bpf_jit_comp_64.c @@ -1602,7 +1602,11 @@ bpf_flush_icache(header, (u8 *)header + header->size); if (!prog->is_func || extra_pass) { - bpf_jit_binary_lock_ro(header); + if (bpf_jit_binary_lock_ro(header)) { + bpf_jit_binary_free(header); + prog = orig_prog; + goto out_off; + } } else { jit_data->ctx = ctx; jit_data->image = image_ptr; --- linux-xilinx-6.8.0.orig/arch/sparc/prom/init_64.c +++ linux-xilinx-6.8.0/arch/sparc/prom/init_64.c @@ -26,9 +26,6 @@ * routines in the prom library. * It gets passed the pointer to the PROM vector. */ - -extern void prom_cif_init(void *); - void __init prom_init(void *cif_handler) { phandle node; --- linux-xilinx-6.8.0.orig/arch/sparc/prom/p1275.c +++ linux-xilinx-6.8.0/arch/sparc/prom/p1275.c @@ -49,7 +49,7 @@ local_irq_restore(flags); } -void prom_cif_init(void *cif_handler, void *cif_stack) +void prom_cif_init(void *cif_handler) { p1275buf.prom_cif_handler = (void (*)(long *))cif_handler; } --- linux-xilinx-6.8.0.orig/arch/sparc/vdso/vma.c +++ linux-xilinx-6.8.0/arch/sparc/vdso/vma.c @@ -449,9 +449,8 @@ unsigned long val; err = kstrtoul(s, 10, &val); - if (err) - return err; - vdso_enabled = val; - return 0; + if (!err) + vdso_enabled = val; + return 1; } __setup("vdso=", vdso_setup); --- linux-xilinx-6.8.0.orig/arch/um/drivers/line.c +++ linux-xilinx-6.8.0/arch/um/drivers/line.c @@ -383,6 +383,7 @@ parse_chan_pair(NULL, line, n, opts, error_out); err = 0; } + *error_out = "configured as 'none'"; } else { char *new = kstrdup(init, GFP_KERNEL); if (!new) { @@ -406,6 +407,7 @@ } } if (err) { + *error_out = "failed to parse channel pair"; line->init_str = NULL; line->valid = 0; kfree(new); @@ -676,24 +678,26 @@ goto cleanup; } - *winch = ((struct winch) { .list = LIST_HEAD_INIT(winch->list), - .fd = fd, + *winch = ((struct winch) { .fd = fd, .tty_fd = tty_fd, .pid = pid, .port = port, .stack = stack }); + spin_lock(&winch_handler_lock); + list_add(&winch->list, &winch_handlers); + spin_unlock(&winch_handler_lock); + if (um_request_irq(WINCH_IRQ, fd, IRQ_READ, winch_interrupt, IRQF_SHARED, "winch", winch) < 0) { printk(KERN_ERR "register_winch_irq - failed to register " "IRQ\n"); + spin_lock(&winch_handler_lock); + list_del(&winch->list); + spin_unlock(&winch_handler_lock); goto out_free; } - spin_lock(&winch_handler_lock); - list_add(&winch->list, &winch_handlers); - spin_unlock(&winch_handler_lock); - return; out_free: --- linux-xilinx-6.8.0.orig/arch/um/drivers/net_kern.c +++ linux-xilinx-6.8.0/arch/um/drivers/net_kern.c @@ -336,7 +336,7 @@ static void net_device_release(struct device *dev) { - struct uml_net *device = dev_get_drvdata(dev); + struct uml_net *device = container_of(dev, struct uml_net, pdev.dev); struct net_device *netdev = device->dev; struct uml_net_private *lp = netdev_priv(netdev); --- linux-xilinx-6.8.0.orig/arch/um/drivers/ubd_kern.c +++ linux-xilinx-6.8.0/arch/um/drivers/ubd_kern.c @@ -456,43 +456,31 @@ return n; } -/* Called without dev->lock held, and only in interrupt context. */ -static void ubd_handler(void) +static void ubd_end_request(struct io_thread_req *io_req) { - int n; - int count; - - while(1){ - n = bulk_req_safe_read( - thread_fd, - irq_req_buffer, - &irq_remainder, - &irq_remainder_size, - UBD_REQ_BUFFER_SIZE - ); - if (n < 0) { - if(n == -EAGAIN) - break; - printk(KERN_ERR "spurious interrupt in ubd_handler, " - "err = %d\n", -n); - return; - } - for (count = 0; count < n/sizeof(struct io_thread_req *); count++) { - struct io_thread_req *io_req = (*irq_req_buffer)[count]; - - if ((io_req->error == BLK_STS_NOTSUPP) && (req_op(io_req->req) == REQ_OP_DISCARD)) { - blk_queue_max_discard_sectors(io_req->req->q, 0); - blk_queue_max_write_zeroes_sectors(io_req->req->q, 0); - } - blk_mq_end_request(io_req->req, io_req->error); - kfree(io_req); - } + if (io_req->error == BLK_STS_NOTSUPP) { + if (req_op(io_req->req) == REQ_OP_DISCARD) + blk_queue_max_discard_sectors(io_req->req->q, 0); + else if (req_op(io_req->req) == REQ_OP_WRITE_ZEROES) + blk_queue_max_write_zeroes_sectors(io_req->req->q, 0); } + blk_mq_end_request(io_req->req, io_req->error); + kfree(io_req); } static irqreturn_t ubd_intr(int irq, void *dev) { - ubd_handler(); + int len, i; + + while ((len = bulk_req_safe_read(thread_fd, irq_req_buffer, + &irq_remainder, &irq_remainder_size, + UBD_REQ_BUFFER_SIZE)) >= 0) { + for (i = 0; i < len / sizeof(struct io_thread_req *); i++) + ubd_end_request((*irq_req_buffer)[i]); + } + + if (len < 0 && len != -EAGAIN) + pr_err("spurious interrupt in %s, err = %d\n", __func__, len); return IRQ_HANDLED; } @@ -810,7 +798,7 @@ static void ubd_device_release(struct device *dev) { - struct ubd *ubd_dev = dev_get_drvdata(dev); + struct ubd *ubd_dev = container_of(dev, struct ubd, pdev.dev); blk_mq_free_tag_set(&ubd_dev->tag_set); *ubd_dev = ((struct ubd) DEFAULT_UBD); @@ -1098,7 +1086,7 @@ if (irq_req_buffer == NULL) { printk(KERN_ERR "Failed to initialize ubd buffering\n"); - return -1; + return -ENOMEM; } io_req_buffer = kmalloc_array(UBD_REQ_BUFFER_SIZE, sizeof(struct io_thread_req *), @@ -1109,7 +1097,7 @@ if (io_req_buffer == NULL) { printk(KERN_ERR "Failed to initialize ubd buffering\n"); - return -1; + return -ENOMEM; } platform_driver_register(&ubd_driver); mutex_lock(&ubd_lock); --- linux-xilinx-6.8.0.orig/arch/um/drivers/vector_kern.c +++ linux-xilinx-6.8.0/arch/um/drivers/vector_kern.c @@ -141,7 +141,7 @@ if (allow != NULL) { if (kstrtoul(allow, 10, &result) == 0) - return (allow > 0); + return result > 0; } return false; } @@ -823,7 +823,8 @@ static void vector_device_release(struct device *dev) { - struct vector_device *device = dev_get_drvdata(dev); + struct vector_device *device = + container_of(dev, struct vector_device, pdev.dev); struct net_device *netdev = device->dev; list_del(&device->list); --- linux-xilinx-6.8.0.orig/arch/um/include/asm/kasan.h +++ linux-xilinx-6.8.0/arch/um/include/asm/kasan.h @@ -24,7 +24,6 @@ #ifdef CONFIG_KASAN void kasan_init(void); -void kasan_map_memory(void *start, unsigned long len); extern int kasan_um_is_ready; #ifdef CONFIG_STATIC_LINK --- linux-xilinx-6.8.0.orig/arch/um/include/asm/mmu.h +++ linux-xilinx-6.8.0/arch/um/include/asm/mmu.h @@ -14,8 +14,6 @@ struct uml_arch_mm_context arch; } mm_context_t; -extern void __switch_mm(struct mm_id * mm_idp); - /* Avoid tangled inclusion with asm/ldt.h */ extern long init_new_ldt(struct mm_context *to_mm, struct mm_context *from_mm); extern void free_ldt(struct mm_context *mm); --- linux-xilinx-6.8.0.orig/arch/um/include/asm/processor-generic.h +++ linux-xilinx-6.8.0/arch/um/include/asm/processor-generic.h @@ -94,7 +94,6 @@ #define current_cpu_data boot_cpu_data #define cache_line_size() (boot_cpu_data.cache_alignment) -extern unsigned long get_thread_reg(int reg, jmp_buf *buf); #define KSTK_REG(tsk, reg) get_thread_reg(reg, &tsk->thread.switch_buf) extern unsigned long __get_wchan(struct task_struct *p); --- linux-xilinx-6.8.0.orig/arch/um/include/shared/kern_util.h +++ linux-xilinx-6.8.0/arch/um/include/shared/kern_util.h @@ -66,4 +66,6 @@ void um_idle_sleep(void); +void kasan_map_memory(void *start, size_t len); + #endif --- linux-xilinx-6.8.0.orig/arch/um/include/shared/skas/mm_id.h +++ linux-xilinx-6.8.0/arch/um/include/shared/skas/mm_id.h @@ -15,4 +15,6 @@ int kill; }; +void __switch_mm(struct mm_id *mm_idp); + #endif --- linux-xilinx-6.8.0.orig/arch/um/kernel/dtb.c +++ linux-xilinx-6.8.0/arch/um/kernel/dtb.c @@ -16,16 +16,16 @@ void *area; area = uml_load_file(dtb, &size); - if (!area) - return; + if (area) { + if (!early_init_dt_scan(area, __pa(area))) { + pr_err("invalid DTB %s\n", dtb); + memblock_free(area, size); + return; + } - if (!early_init_dt_scan(area)) { - pr_err("invalid DTB %s\n", dtb); - memblock_free(area, size); - return; + early_init_fdt_scan_reserved_mem(); } - early_init_fdt_scan_reserved_mem(); unflatten_device_tree(); } --- linux-xilinx-6.8.0.orig/arch/um/kernel/physmem.c +++ linux-xilinx-6.8.0/arch/um/kernel/physmem.c @@ -80,10 +80,10 @@ unsigned long len, unsigned long long highmem) { unsigned long reserve = reserve_end - start; - long map_size = len - reserve; + unsigned long map_size = len - reserve; int err; - if(map_size <= 0) { + if (len <= reserve) { os_warn("Too few physical memory! Needed=%lu, given=%lu\n", reserve, len); exit(1); @@ -94,7 +94,7 @@ err = os_map_memory((void *) reserve_end, physmem_fd, reserve, map_size, 1, 1, 1); if (err < 0) { - os_warn("setup_physmem - mapping %ld bytes of memory at 0x%p " + os_warn("setup_physmem - mapping %lu bytes of memory at 0x%p " "failed - errno = %d\n", map_size, (void *) reserve_end, err); exit(1); --- linux-xilinx-6.8.0.orig/arch/um/kernel/process.c +++ linux-xilinx-6.8.0/arch/um/kernel/process.c @@ -389,6 +389,6 @@ { int cpu = current_thread_info()->cpu; - return save_i387_registers(userspace_pid[cpu], (unsigned long *) fpu); + return save_i387_registers(userspace_pid[cpu], (unsigned long *) fpu) == 0; } --- linux-xilinx-6.8.0.orig/arch/um/kernel/sysrq.c +++ linux-xilinx-6.8.0/arch/um/kernel/sysrq.c @@ -53,5 +53,5 @@ } printk("%sCall Trace:\n", loglvl); - dump_trace(current, &stackops, (void *)loglvl); + dump_trace(task ?: current, &stackops, (void *)loglvl); } --- linux-xilinx-6.8.0.orig/arch/um/kernel/time.c +++ linux-xilinx-6.8.0/arch/um/kernel/time.c @@ -874,9 +874,9 @@ return 1; } -__setup("time-travel-start", setup_time_travel_start); +__setup("time-travel-start=", setup_time_travel_start); __uml_help(setup_time_travel_start, -"time-travel-start=\n" +"time-travel-start=\n" "Configure the UML instance's wall clock to start at this value rather than\n" "the host's wall clock at the time of UML boot.\n"); #endif --- linux-xilinx-6.8.0.orig/arch/um/os-Linux/mem.c +++ linux-xilinx-6.8.0/arch/um/os-Linux/mem.c @@ -15,6 +15,7 @@ #include #include #include +#include #include /* --- linux-xilinx-6.8.0.orig/arch/um/os-Linux/signal.c +++ linux-xilinx-6.8.0/arch/um/os-Linux/signal.c @@ -8,6 +8,7 @@ #include #include +#include #include #include #include @@ -65,9 +66,7 @@ int signals_enabled; #ifdef UML_CONFIG_UML_TIME_TRAVEL_SUPPORT -static int signals_blocked; -#else -#define signals_blocked 0 +static int signals_blocked, signals_blocked_pending; #endif static unsigned int signals_pending; static unsigned int signals_active = 0; @@ -76,14 +75,27 @@ { int enabled = signals_enabled; - if ((signals_blocked || !enabled) && (sig == SIGIO)) { +#ifdef UML_CONFIG_UML_TIME_TRAVEL_SUPPORT + if ((signals_blocked || + __atomic_load_n(&signals_blocked_pending, __ATOMIC_SEQ_CST)) && + (sig == SIGIO)) { + /* increment so unblock will do another round */ + __atomic_add_fetch(&signals_blocked_pending, 1, + __ATOMIC_SEQ_CST); + return; + } +#endif + + if (!enabled && (sig == SIGIO)) { /* * In TT_MODE_EXTERNAL, need to still call time-travel - * handlers unless signals are also blocked for the - * external time message processing. This will mark - * signals_pending by itself (only if necessary.) + * handlers. This will mark signals_pending by itself + * (only if necessary.) + * Note we won't get here if signals are hard-blocked + * (which is handled above), in that case the hard- + * unblock will handle things. */ - if (!signals_blocked && time_travel_mode == TT_MODE_EXTERNAL) + if (time_travel_mode == TT_MODE_EXTERNAL) sigio_run_timetravel_handlers(); else signals_pending |= SIGIO_MASK; @@ -380,33 +392,99 @@ #ifdef UML_CONFIG_UML_TIME_TRAVEL_SUPPORT void mark_sigio_pending(void) { + /* + * It would seem that this should be atomic so + * it isn't a read-modify-write with a signal + * that could happen in the middle, losing the + * value set by the signal. + * + * However, this function is only called when in + * time-travel=ext simulation mode, in which case + * the only signal ever pending is SIGIO, which + * is blocked while this can be called, and the + * timer signal (SIGALRM) cannot happen. + */ signals_pending |= SIGIO_MASK; } void block_signals_hard(void) { - if (signals_blocked) - return; - signals_blocked = 1; + signals_blocked++; barrier(); } void unblock_signals_hard(void) { + static bool unblocking; + if (!signals_blocked) + panic("unblocking signals while not blocked"); + + if (--signals_blocked) return; - /* Must be set to 0 before we check the pending bits etc. */ - signals_blocked = 0; + /* + * Must be set to 0 before we check pending so the + * SIGIO handler will run as normal unless we're still + * going to process signals_blocked_pending. + */ barrier(); - if (signals_pending && signals_enabled) { - /* this is a bit inefficient, but that's not really important */ - block_signals(); - unblock_signals(); - } else if (signals_pending & SIGIO_MASK) { - /* we need to run time-travel handlers even if not enabled */ - sigio_run_timetravel_handlers(); + /* + * Note that block_signals_hard()/unblock_signals_hard() can be called + * within the unblock_signals()/sigio_run_timetravel_handlers() below. + * This would still be prone to race conditions since it's actually a + * call _within_ e.g. vu_req_read_message(), where we observed this + * issue, which loops. Thus, if the inner call handles the recorded + * pending signals, we can get out of the inner call with the real + * signal hander no longer blocked, and still have a race. Thus don't + * handle unblocking in the inner call, if it happens, but only in + * the outermost call - 'unblocking' serves as an ownership for the + * signals_blocked_pending decrement. + */ + if (unblocking) + return; + unblocking = true; + + while (__atomic_load_n(&signals_blocked_pending, __ATOMIC_SEQ_CST)) { + if (signals_enabled) { + /* signals are enabled so we can touch this */ + signals_pending |= SIGIO_MASK; + /* + * this is a bit inefficient, but that's + * not really important + */ + block_signals(); + unblock_signals(); + } else { + /* + * we need to run time-travel handlers even + * if not enabled + */ + sigio_run_timetravel_handlers(); + } + + /* + * The decrement of signals_blocked_pending must be atomic so + * that the signal handler will either happen before or after + * the decrement, not during a read-modify-write: + * - If it happens before, it can increment it and we'll + * decrement it and do another round in the loop. + * - If it happens after it'll see 0 for both signals_blocked + * and signals_blocked_pending and thus run the handler as + * usual (subject to signals_enabled, but that's unrelated.) + * + * Note that a call to unblock_signals_hard() within the calls + * to unblock_signals() or sigio_run_timetravel_handlers() above + * will do nothing due to the 'unblocking' state, so this cannot + * underflow as the only one decrementing will be the outermost + * one. + */ + if (__atomic_sub_fetch(&signals_blocked_pending, 1, + __ATOMIC_SEQ_CST) < 0) + panic("signals_blocked_pending underflow"); } + + unblocking = false; } #endif --- linux-xilinx-6.8.0.orig/arch/x86/Kconfig +++ linux-xilinx-6.8.0/arch/x86/Kconfig @@ -62,6 +62,7 @@ select ACPI_HOTPLUG_CPU if ACPI_PROCESSOR && HOTPLUG_CPU select ARCH_32BIT_OFF_T if X86_32 select ARCH_CLOCKSOURCE_INIT + select ARCH_CONFIGURES_CPU_MITIGATIONS select ARCH_CORRECT_STACKTRACE_ON_KRETPROBE select ARCH_ENABLE_HUGEPAGE_MIGRATION if X86_64 && HUGETLB_PAGE && MIGRATION select ARCH_ENABLE_MEMORY_HOTPLUG if X86_64 @@ -100,7 +101,7 @@ select ARCH_HAS_STRICT_MODULE_RWX select ARCH_HAS_SYNC_CORE_BEFORE_USERMODE select ARCH_HAS_SYSCALL_WRAPPER - select ARCH_HAS_UBSAN_SANITIZE_ALL + select ARCH_HAS_UBSAN select ARCH_HAS_DEBUG_WX select ARCH_HAS_ZONE_DMA_SET if EXPERT select ARCH_HAVE_NMI_SAFE_CMPXCHG @@ -1539,19 +1540,6 @@ This requires an AMD processor that supports Secure Memory Encryption (SME). -config AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT - bool "Activate AMD Secure Memory Encryption (SME) by default" - depends on AMD_MEM_ENCRYPT - help - Say yes to have system memory encrypted by default if running on - an AMD processor that supports Secure Memory Encryption (SME). - - If set to Y, then the encryption of system memory can be - deactivated with the mem_encrypt=off command line option. - - If set to N, then the encryption of system memory can be - activated with the mem_encrypt=on command line option. - # Common NUMA Features config NUMA bool "NUMA Memory Allocation and Scheduler Support" @@ -2275,6 +2263,7 @@ config ADDRESS_MASKING bool "Linear Address Masking support" depends on X86_64 + depends on COMPILE_TEST || !CPU_MITIGATIONS # wait for LASS help Linear Address Masking (LAM) modifies the checking that is applied to 64-bit linear addresses, allowing software to use of the @@ -2480,17 +2469,21 @@ def_bool y depends on CALL_PADDING && !CFI_CLANG -menuconfig SPECULATION_MITIGATIONS - bool "Mitigations for speculative execution vulnerabilities" +menuconfig CPU_MITIGATIONS + bool "Mitigations for CPU vulnerabilities" default y help - Say Y here to enable options which enable mitigations for - speculative execution hardware vulnerabilities. + Say Y here to enable options which enable mitigations for hardware + vulnerabilities (usually related to speculative execution). + Mitigations can be disabled or restricted to SMT systems at runtime + via the "mitigations" kernel parameter. - If you say N, all mitigations will be disabled. You really - should know what you are doing to say so. + If you say N, all mitigations will be disabled. This CANNOT be + overridden at runtime. -if SPECULATION_MITIGATIONS + Say 'Y', unless you really know what you are doing. + +if CPU_MITIGATIONS config PAGE_TABLE_ISOLATION bool "Remove the kernel mapping in user mode" @@ -2567,7 +2560,8 @@ depends on CPU_SUP_AMD && X86_64 default y help - Compile the kernel with support for the retbleed=ibpb mitigation. + Compile the kernel with support for the retbleed=ibpb and + spec_rstack_overflow={ibpb,ibpb-vmexit} mitigations. config CPU_IBRS_ENTRY bool "Enable IBRS on kernel entry" @@ -2614,6 +2608,27 @@ If in doubt, say N. +config MITIGATION_RFDS + bool "RFDS Mitigation" + depends on CPU_SUP_INTEL + default y + help + Enable mitigation for Register File Data Sampling (RFDS) by default. + RFDS is a hardware vulnerability which affects Intel Atom CPUs. It + allows unprivileged speculative access to stale data previously + stored in floating point, vector and integer registers. + See also + +config MITIGATION_SPECTRE_BHI + bool "Mitigate Spectre-BHB (Branch History Injection)" + depends on CPU_SUP_INTEL + default y + help + Enable BHI mitigations. BHI attacks are a form of Spectre V2 attacks + where the branch history buffer is poisoned to speculatively steer + indirect branches. + See + endif config ARCH_HAS_ADD_PAGES --- linux-xilinx-6.8.0.orig/arch/x86/Kconfig.assembler +++ linux-xilinx-6.8.0/arch/x86/Kconfig.assembler @@ -26,6 +26,6 @@ Supported by binutils >= 2.30 and LLVM integrated assembler config AS_WRUSS - def_bool $(as-instr,wrussq %rax$(comma)(%rbx)) + def_bool $(as-instr64,wrussq %rax$(comma)(%rbx)) help Supported by binutils >= 2.31 and LLVM integrated assembler --- linux-xilinx-6.8.0.orig/arch/x86/Kconfig.debug +++ linux-xilinx-6.8.0/arch/x86/Kconfig.debug @@ -248,6 +248,7 @@ config UNWINDER_FRAME_POINTER bool "Frame pointer unwinder" + select ARCH_WANT_FRAME_POINTERS select FRAME_POINTER help This option enables the frame pointer unwinder for unwinding kernel @@ -271,7 +272,3 @@ overhead. endchoice - -config FRAME_POINTER - depends on !UNWINDER_ORC && !UNWINDER_GUESS - bool --- linux-xilinx-6.8.0.orig/arch/x86/Makefile +++ linux-xilinx-6.8.0/arch/x86/Makefile @@ -114,9 +114,10 @@ ifeq ($(CONFIG_STACKPROTECTOR),y) ifeq ($(CONFIG_SMP),y) - KBUILD_CFLAGS += -mstack-protector-guard-reg=fs -mstack-protector-guard-symbol=__stack_chk_guard + KBUILD_CFLAGS += -mstack-protector-guard-reg=fs \ + -mstack-protector-guard-symbol=__ref_stack_chk_guard else - KBUILD_CFLAGS += -mstack-protector-guard=global + KBUILD_CFLAGS += -mstack-protector-guard=global endif endif else --- linux-xilinx-6.8.0.orig/arch/x86/Makefile.um +++ linux-xilinx-6.8.0/arch/x86/Makefile.um @@ -9,6 +9,7 @@ # ifeq ($(CONFIG_CC_IS_CLANG),y) KBUILD_CFLAGS += -mno-sse -mno-mmx -mno-sse2 -mno-3dnow -mno-avx +KBUILD_RUSTFLAGS += --target=$(objtree)/scripts/target.json KBUILD_RUSTFLAGS += -Ctarget-feature=-sse,-sse2,-sse3,-ssse3,-sse4.1,-sse4.2,-avx,-avx2 endif --- linux-xilinx-6.8.0.orig/arch/x86/boot/compressed/Makefile +++ linux-xilinx-6.8.0/arch/x86/boot/compressed/Makefile @@ -34,6 +34,7 @@ # avoid errors with '-march=i386', and future flags may depend on the target to # be valid. KBUILD_CFLAGS := -m$(BITS) -O2 $(CLANG_FLAGS) +KBUILD_CFLAGS += -std=gnu11 KBUILD_CFLAGS += -fno-strict-aliasing -fPIE KBUILD_CFLAGS += -Wundef KBUILD_CFLAGS += -DDISABLE_BRANCH_PROFILING @@ -84,7 +85,7 @@ hostprogs := mkpiggy HOST_EXTRACFLAGS += -I$(srctree)/tools/include -sed-voffset := -e 's/^\([0-9a-fA-F]*\) [ABCDGRSTVW] \(_text\|__bss_start\|_end\)$$/\#define VO_\2 _AC(0x\1,UL)/p' +sed-voffset := -e 's/^\([0-9a-fA-F]*\) [ABCDGRSTVW] \(_text\|__start_rodata\|__bss_start\|_end\)$$/\#define VO_\2 _AC(0x\1,UL)/p' quiet_cmd_voffset = VOFFSET $@ cmd_voffset = $(NM) $< | sed -n $(sed-voffset) > $@ @@ -116,9 +117,9 @@ vmlinux-objs-$(CONFIG_EFI) += $(obj)/efi.o vmlinux-objs-$(CONFIG_EFI_MIXED) += $(obj)/efi_mixed.o -vmlinux-objs-$(CONFIG_EFI_STUB) += $(objtree)/drivers/firmware/efi/libstub/lib.a +vmlinux-libs-$(CONFIG_EFI_STUB) += $(objtree)/drivers/firmware/efi/libstub/lib.a -$(obj)/vmlinux: $(vmlinux-objs-y) FORCE +$(obj)/vmlinux: $(vmlinux-objs-y) $(vmlinux-libs-y) FORCE $(call if_changed,ld) OBJCOPYFLAGS_vmlinux.bin := -R .comment -S --- linux-xilinx-6.8.0.orig/arch/x86/boot/compressed/efi_mixed.S +++ linux-xilinx-6.8.0/arch/x86/boot/compressed/efi_mixed.S @@ -15,10 +15,12 @@ */ #include +#include #include #include #include #include +#include .code64 .text @@ -49,6 +51,11 @@ lea efi32_boot_args(%rip), %rdx mov 0(%rdx), %edi mov 4(%rdx), %esi + + /* Switch to the firmware's stack */ + movl efi32_boot_sp(%rip), %esp + andl $~7, %esp + #ifdef CONFIG_EFI_HANDOVER_PROTOCOL mov 8(%rdx), %edx // saved bootparams pointer test %edx, %edx @@ -144,6 +151,7 @@ SYM_FUNC_START(efi32_stub_entry) call 1f 1: popl %ecx + leal (efi32_boot_args - 1b)(%ecx), %ebx /* Clear BSS */ xorl %eax, %eax @@ -158,6 +166,7 @@ popl %ecx popl %edx popl %esi + movl %esi, 8(%ebx) jmp efi32_entry SYM_FUNC_END(efi32_stub_entry) #endif @@ -234,8 +243,6 @@ * * Arguments: %ecx image handle * %edx EFI system table pointer - * %esi struct bootparams pointer (or NULL when not using - * the EFI handover protocol) * * Since this is the point of no return for ordinary execution, no registers * are considered live except for the function parameters. [Note that the EFI @@ -254,13 +261,25 @@ /* Store firmware IDT descriptor */ sidtl (efi32_boot_idt - 1b)(%ebx) + /* Store firmware stack pointer */ + movl %esp, (efi32_boot_sp - 1b)(%ebx) + /* Store boot arguments */ leal (efi32_boot_args - 1b)(%ebx), %ebx movl %ecx, 0(%ebx) movl %edx, 4(%ebx) - movl %esi, 8(%ebx) movb $0x0, 12(%ebx) // efi_is64 + /* + * Allocate some memory for a temporary struct boot_params, which only + * needs the minimal pieces that startup_32() relies on. + */ + subl $PARAM_SIZE, %esp + movl %esp, %esi + movl $PAGE_SIZE, BP_kernel_alignment(%esi) + movl $_end - 1b, BP_init_size(%esi) + subl $startup_32 - 1b, BP_init_size(%esi) + /* Disable paging */ movl %cr0, %eax btrl $X86_CR0_PG_BIT, %eax @@ -286,8 +305,7 @@ movl 8(%ebp), %ecx // image_handle movl 12(%ebp), %edx // sys_table - xorl %esi, %esi - jmp efi32_entry // pass %ecx, %edx, %esi + jmp efi32_entry // pass %ecx, %edx // no other registers remain live 2: popl %edi // restore callee-save registers @@ -318,5 +336,6 @@ SYM_DATA_LOCAL(efi32_boot_cs, .word 0) SYM_DATA_LOCAL(efi32_boot_ds, .word 0) +SYM_DATA_LOCAL(efi32_boot_sp, .long 0) SYM_DATA_LOCAL(efi32_boot_args, .long 0, 0, 0) SYM_DATA(efi_is64, .byte 1) --- linux-xilinx-6.8.0.orig/arch/x86/boot/compressed/head_64.S +++ linux-xilinx-6.8.0/arch/x86/boot/compressed/head_64.S @@ -398,6 +398,11 @@ call sev_enable #endif + /* Preserve only the CR4 bits that must be preserved, and clear the rest */ + movq %cr4, %rax + andl $(X86_CR4_PAE | X86_CR4_MCE | X86_CR4_LA57), %eax + movq %rax, %cr4 + /* * configure_5level_paging() updates the number of paging levels using * a trampoline in 32-bit addressable memory if the current number does --- linux-xilinx-6.8.0.orig/arch/x86/boot/compressed/misc.c +++ linux-xilinx-6.8.0/arch/x86/boot/compressed/misc.c @@ -330,6 +330,7 @@ return ehdr.e_entry - LOAD_PHYSICAL_ADDR; } +const unsigned long kernel_text_size = VO___start_rodata - VO__text; const unsigned long kernel_total_size = VO__end - VO__text; static u8 boot_heap[BOOT_HEAP_SIZE] __aligned(4); @@ -358,6 +359,19 @@ } /* + * Set the memory encryption xloadflag based on the mem_encrypt= command line + * parameter, if provided. + */ +static void parse_mem_encrypt(struct setup_header *hdr) +{ + int on = cmdline_find_option_bool("mem_encrypt=on"); + int off = cmdline_find_option_bool("mem_encrypt=off"); + + if (on > off) + hdr->xloadflags |= XLF_MEM_ENCRYPTION; +} + +/* * The compressed kernel image (ZO), has been moved so that its position * is against the end of the buffer used to hold the uncompressed kernel * image (VO) and the execution environment (.bss, .brk), which makes sure @@ -387,6 +401,8 @@ /* Clear flags intended for solely in-kernel use. */ boot_params_ptr->hdr.loadflags &= ~KASLR_FLAG; + parse_mem_encrypt(&boot_params_ptr->hdr); + sanitize_boot_params(boot_params_ptr); if (boot_params_ptr->screen_info.orig_video_mode == 7) { --- linux-xilinx-6.8.0.orig/arch/x86/boot/compressed/sev.c +++ linux-xilinx-6.8.0/arch/x86/boot/compressed/sev.c @@ -116,6 +116,9 @@ #undef __init #define __init +#undef __head +#define __head + #define __BOOT_COMPRESSED /* Basic instruction decoding support needed */ @@ -304,6 +307,10 @@ if (result != ES_OK) goto finish; + result = vc_check_opcode_bytes(&ctxt, exit_code); + if (result != ES_OK) + goto finish; + switch (exit_code) { case SVM_EXIT_RDTSC: case SVM_EXIT_RDTSCP: --- linux-xilinx-6.8.0.orig/arch/x86/boot/main.c +++ linux-xilinx-6.8.0/arch/x86/boot/main.c @@ -119,8 +119,8 @@ char *stack_end; if (boot_params.hdr.loadflags & CAN_USE_HEAP) { - asm("leal %P1(%%esp),%0" - : "=r" (stack_end) : "i" (-STACK_SIZE)); + asm("leal %n1(%%esp),%0" + : "=r" (stack_end) : "i" (STACK_SIZE)); heap_end = (char *) ((size_t)boot_params.hdr.heap_end_ptr + 0x200); --- linux-xilinx-6.8.0.orig/arch/x86/coco/core.c +++ linux-xilinx-6.8.0/arch/x86/coco/core.c @@ -3,18 +3,22 @@ * Confidential Computing Platform Capability checks * * Copyright (C) 2021 Advanced Micro Devices, Inc. + * Copyright (C) 2024 Jason A. Donenfeld . All Rights Reserved. * * Author: Tom Lendacky */ #include #include +#include +#include +#include #include #include enum cc_vendor cc_vendor __ro_after_init = CC_VENDOR_NONE; -static u64 cc_mask __ro_after_init; +u64 cc_mask __ro_after_init; static bool noinstr intel_cc_platform_has(enum cc_attr attr) { @@ -149,7 +153,39 @@ } EXPORT_SYMBOL_GPL(cc_mkdec); -__init void cc_set_mask(u64 mask) +__init void cc_random_init(void) { - cc_mask = mask; + /* + * The seed is 32 bytes (in units of longs), which is 256 bits, which + * is the security level that the RNG is targeting. + */ + unsigned long rng_seed[32 / sizeof(long)]; + size_t i, longs; + + if (!cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT)) + return; + + /* + * Since the CoCo threat model includes the host, the only reliable + * source of entropy that can be neither observed nor manipulated is + * RDRAND. Usually, RDRAND failure is considered tolerable, but since + * CoCo guests have no other unobservable source of entropy, it's + * important to at least ensure the RNG gets some initial random seeds. + */ + for (i = 0; i < ARRAY_SIZE(rng_seed); i += longs) { + longs = arch_get_random_longs(&rng_seed[i], ARRAY_SIZE(rng_seed) - i); + + /* + * A zero return value means that the guest doesn't have RDRAND + * or the CPU is physically broken, and in both cases that + * means most crypto inside of the CoCo instance will be + * broken, defeating the purpose of CoCo in the first place. So + * just panic here because it's absolutely unsafe to continue + * executing. + */ + if (longs == 0) + panic("RDRAND is defective."); + } + add_device_randomness(rng_seed, sizeof(rng_seed)); + memzero_explicit(rng_seed, sizeof(rng_seed)); } --- linux-xilinx-6.8.0.orig/arch/x86/coco/tdx/tdx.c +++ linux-xilinx-6.8.0/arch/x86/coco/tdx/tdx.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -14,6 +15,8 @@ #include #include #include +#include +#include /* MMIO direction */ #define EPT_READ 0 @@ -38,6 +41,8 @@ #define TDREPORT_SUBTYPE_0 0 +static atomic_long_t nr_shared; + /* Called from __tdx_hypercall() for unrecoverable failure */ noinstr void __noreturn __tdx_hypercall_failed(void) { @@ -73,6 +78,32 @@ panic("TDCALL %lld failed (Buggy TDX module!)\n", fn); } +/* Read TD-scoped metadata */ +static inline u64 tdg_vm_rd(u64 field, u64 *value) +{ + struct tdx_module_args args = { + .rdx = field, + }; + u64 ret; + + ret = __tdcall_ret(TDG_VM_RD, &args); + *value = args.r8; + + return ret; +} + +/* Write TD-scoped metadata */ +static inline u64 tdg_vm_wr(u64 field, u64 value, u64 mask) +{ + struct tdx_module_args args = { + .rdx = field, + .r8 = value, + .r9 = mask, + }; + + return __tdcall(TDG_VM_WR, &args); +} + /** * tdx_mcall_get_report0() - Wrapper to get TDREPORT0 (a.k.a. TDREPORT * subtype 0) using TDG.MR.REPORT TDCALL. @@ -163,7 +194,61 @@ __tdx_hypercall(&args); } -static void tdx_parse_tdinfo(u64 *cc_mask) +/* + * The kernel cannot handle #VEs when accessing normal kernel memory. Ensure + * that no #VE will be delivered for accesses to TD-private memory. + * + * TDX 1.0 does not allow the guest to disable SEPT #VE on its own. The VMM + * controls if the guest will receive such #VE with TD attribute + * ATTR_SEPT_VE_DISABLE. + * + * Newer TDX modules allow the guest to control if it wants to receive SEPT + * violation #VEs. + * + * Check if the feature is available and disable SEPT #VE if possible. + * + * If the TD is allowed to disable/enable SEPT #VEs, the ATTR_SEPT_VE_DISABLE + * attribute is no longer reliable. It reflects the initial state of the + * control for the TD, but it will not be updated if someone (e.g. bootloader) + * changes it before the kernel starts. Kernel must check TDCS_TD_CTLS bit to + * determine if SEPT #VEs are enabled or disabled. + */ +static void disable_sept_ve(u64 td_attr) +{ + const char *msg = "TD misconfiguration: SEPT #VE has to be disabled"; + bool debug = td_attr & ATTR_DEBUG; + u64 config, controls; + + /* Is this TD allowed to disable SEPT #VE */ + tdg_vm_rd(TDCS_CONFIG_FLAGS, &config); + if (!(config & TDCS_CONFIG_FLEXIBLE_PENDING_VE)) { + /* No SEPT #VE controls for the guest: check the attribute */ + if (td_attr & ATTR_SEPT_VE_DISABLE) + return; + + /* Relax SEPT_VE_DISABLE check for debug TD for backtraces */ + if (debug) + pr_warn("%s\n", msg); + else + tdx_panic(msg); + return; + } + + /* Check if SEPT #VE has been disabled before us */ + tdg_vm_rd(TDCS_TD_CTLS, &controls); + if (controls & TD_CTLS_PENDING_VE_DISABLE) + return; + + /* Keep #VEs enabled for splats in debugging environments */ + if (debug) + return; + + /* Disable SEPT #VEs */ + tdg_vm_wr(TDCS_TD_CTLS, TD_CTLS_PENDING_VE_DISABLE, + TD_CTLS_PENDING_VE_DISABLE); +} + +static void tdx_setup(u64 *cc_mask) { struct tdx_module_args args = {}; unsigned int gpa_width; @@ -188,21 +273,12 @@ gpa_width = args.rcx & GENMASK(5, 0); *cc_mask = BIT_ULL(gpa_width - 1); - /* - * The kernel can not handle #VE's when accessing normal kernel - * memory. Ensure that no #VE will be delivered for accesses to - * TD-private memory. Only VMM-shared memory (MMIO) will #VE. - */ td_attr = args.rdx; - if (!(td_attr & ATTR_SEPT_VE_DISABLE)) { - const char *msg = "TD misconfiguration: SEPT_VE_DISABLE attribute must be set."; - /* Relax SEPT_VE_DISABLE check for debug TD. */ - if (td_attr & ATTR_DEBUG) - pr_warn("%s\n", msg); - else - tdx_panic(msg); - } + /* Kernel does not use NOTIFY_ENABLES and does not need random #VEs */ + tdg_vm_wr(TDCS_NOTIFY_ENABLES, 0, -1ULL); + + disable_sept_ve(td_attr); } /* @@ -385,7 +461,6 @@ .r12 = size, .r13 = EPT_READ, .r14 = addr, - .r15 = *val, }; if (__tdx_hypercall(&args)) @@ -430,6 +505,11 @@ return -EINVAL; } + if (!fault_in_kernel_space(ve->gla)) { + WARN_ONCE(1, "Access to userspace address is not supported"); + return -EINVAL; + } + /* * Reject EPT violation #VEs that split pages. * @@ -798,36 +878,128 @@ return true; } -static bool tdx_enc_status_change_prepare(unsigned long vaddr, int numpages, - bool enc) +static int tdx_enc_status_change_prepare(unsigned long vaddr, int numpages, + bool enc) { /* * Only handle shared->private conversion here. * See the comment in tdx_early_init(). */ - if (enc) - return tdx_enc_status_changed(vaddr, numpages, enc); - return true; + if (enc && !tdx_enc_status_changed(vaddr, numpages, enc)) + return -EIO; + + return 0; } -static bool tdx_enc_status_change_finish(unsigned long vaddr, int numpages, +static int tdx_enc_status_change_finish(unsigned long vaddr, int numpages, bool enc) { /* * Only handle private->shared conversion here. * See the comment in tdx_early_init(). */ - if (!enc) - return tdx_enc_status_changed(vaddr, numpages, enc); - return true; + if (!enc && !tdx_enc_status_changed(vaddr, numpages, enc)) + return -EIO; + + if (enc) + atomic_long_sub(numpages, &nr_shared); + else + atomic_long_add(numpages, &nr_shared); + + return 0; +} + +/* Stop new private<->shared conversions */ +static void tdx_kexec_begin(void) +{ + if (!IS_ENABLED(CONFIG_KEXEC_CORE)) + return; + + /* + * Crash kernel reaches here with interrupts disabled: can't wait for + * conversions to finish. + * + * If race happened, just report and proceed. + */ + if (!set_memory_enc_stop_conversion()) + pr_warn("Failed to stop shared<->private conversions\n"); +} + +/* Walk direct mapping and convert all shared memory back to private */ +static void tdx_kexec_finish(void) +{ + unsigned long addr, end; + long found = 0, shared; + + if (!IS_ENABLED(CONFIG_KEXEC_CORE)) + return; + + lockdep_assert_irqs_disabled(); + + addr = PAGE_OFFSET; + end = PAGE_OFFSET + get_max_mapped(); + + while (addr < end) { + unsigned long size; + unsigned int level; + pte_t *pte; + + pte = lookup_address(addr, &level); + size = page_level_size(level); + + if (pte && pte_decrypted(*pte)) { + int pages = size / PAGE_SIZE; + + /* + * Touching memory with shared bit set triggers implicit + * conversion to shared. + * + * Make sure nobody touches the shared range from + * now on. + */ + set_pte(pte, __pte(0)); + + /* + * Memory encryption state persists across kexec. + * If tdx_enc_status_changed() fails in the first + * kernel, it leaves memory in an unknown state. + * + * If that memory remains shared, accessing it in the + * *next* kernel through a private mapping will result + * in an unrecoverable guest shutdown. + * + * The kdump kernel boot is not impacted as it uses + * a pre-reserved memory range that is always private. + * However, gathering crash information could lead to + * a crash if it accesses unconverted memory through + * a private mapping which is possible when accessing + * that memory through /proc/vmcore, for example. + * + * In all cases, print error info in order to leave + * enough bread crumbs for debugging. + */ + if (!tdx_enc_status_changed(addr, pages, true)) { + pr_err("Failed to unshare range %#lx-%#lx\n", + addr, addr + size); + } + + found += pages; + } + + addr += size; + } + + __flush_tlb_all(); + + shared = atomic_long_read(&nr_shared); + if (shared != found) { + pr_err("shared page accounting is off\n"); + pr_err("nr_shared = %ld, nr_found = %ld\n", shared, found); + } } void __init tdx_early_init(void) { - struct tdx_module_args args = { - .rdx = TDCS_NOTIFY_ENABLES, - .r9 = -1ULL, - }; u64 cc_mask; u32 eax, sig[3]; @@ -842,11 +1014,11 @@ setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); cc_vendor = CC_VENDOR_INTEL; - tdx_parse_tdinfo(&cc_mask); - cc_set_mask(cc_mask); - /* Kernel does not use NOTIFY_ENABLES and does not need random #VEs */ - tdcall(TDG_VM_WR, &args); + /* Configure the TD */ + tdx_setup(&cc_mask); + + cc_set_mask(cc_mask); /* * All bits above GPA width are reserved and kernel treats shared bit @@ -881,6 +1053,9 @@ x86_platform.guest.enc_cache_flush_required = tdx_cache_flush_required; x86_platform.guest.enc_tlb_flush_required = tdx_tlb_flush_required; + x86_platform.guest.enc_kexec_begin = tdx_kexec_begin; + x86_platform.guest.enc_kexec_finish = tdx_kexec_finish; + /* * TDX intercepts the RDMSR to read the X2APIC ID in the parallel * bringup low level code. That raises #VE which cannot be handled --- linux-xilinx-6.8.0.orig/arch/x86/crypto/aegis128-aesni-asm.S +++ linux-xilinx-6.8.0/arch/x86/crypto/aegis128-aesni-asm.S @@ -21,7 +21,7 @@ #define T1 %xmm7 #define STATEP %rdi -#define LEN %rsi +#define LEN %esi #define SRC %rdx #define DST %rcx @@ -76,32 +76,32 @@ xor %r9d, %r9d pxor MSG, MSG - mov LEN, %r8 + mov LEN, %r8d and $0x1, %r8 jz .Lld_partial_1 - mov LEN, %r8 + mov LEN, %r8d and $0x1E, %r8 add SRC, %r8 mov (%r8), %r9b .Lld_partial_1: - mov LEN, %r8 + mov LEN, %r8d and $0x2, %r8 jz .Lld_partial_2 - mov LEN, %r8 + mov LEN, %r8d and $0x1C, %r8 add SRC, %r8 shl $0x10, %r9 mov (%r8), %r9w .Lld_partial_2: - mov LEN, %r8 + mov LEN, %r8d and $0x4, %r8 jz .Lld_partial_4 - mov LEN, %r8 + mov LEN, %r8d and $0x18, %r8 add SRC, %r8 shl $32, %r9 @@ -111,11 +111,11 @@ .Lld_partial_4: movq %r9, MSG - mov LEN, %r8 + mov LEN, %r8d and $0x8, %r8 jz .Lld_partial_8 - mov LEN, %r8 + mov LEN, %r8d and $0x10, %r8 add SRC, %r8 pslldq $8, MSG @@ -139,7 +139,7 @@ * %r10 */ SYM_FUNC_START_LOCAL(__store_partial) - mov LEN, %r8 + mov LEN, %r8d mov DST, %r9 movq T0, %r10 @@ -677,7 +677,7 @@ call __store_partial /* mask with byte count: */ - movq LEN, T0 + movd LEN, T0 punpcklbw T0, T0 punpcklbw T0, T0 punpcklbw T0, T0 @@ -702,7 +702,8 @@ /* * void crypto_aegis128_aesni_final(void *state, void *tag_xor, - * u64 assoclen, u64 cryptlen); + * unsigned int assoclen, + * unsigned int cryptlen); */ SYM_FUNC_START(crypto_aegis128_aesni_final) FRAME_BEGIN @@ -715,8 +716,8 @@ movdqu 0x40(STATEP), STATE4 /* prepare length block: */ - movq %rdx, MSG - movq %rcx, T0 + movd %edx, MSG + movd %ecx, T0 pslldq $8, T0 pxor T0, MSG psllq $3, MSG /* multiply by 8 (to get bit count) */ --- linux-xilinx-6.8.0.orig/arch/x86/crypto/nh-avx2-x86_64.S +++ linux-xilinx-6.8.0/arch/x86/crypto/nh-avx2-x86_64.S @@ -154,5 +154,6 @@ vpaddq T1, T0, T0 vpaddq T4, T0, T0 vmovdqu T0, (HASH) + vzeroupper RET SYM_FUNC_END(nh_avx2) --- linux-xilinx-6.8.0.orig/arch/x86/crypto/sha256-avx2-asm.S +++ linux-xilinx-6.8.0/arch/x86/crypto/sha256-avx2-asm.S @@ -592,22 +592,22 @@ leaq K256+0*32(%rip), INP ## reuse INP as scratch reg vpaddd (INP, SRND), X0, XFER vmovdqa XFER, 0*32+_XFER(%rsp, SRND) - FOUR_ROUNDS_AND_SCHED _XFER + 0*32 + FOUR_ROUNDS_AND_SCHED (_XFER + 0*32) leaq K256+1*32(%rip), INP vpaddd (INP, SRND), X0, XFER vmovdqa XFER, 1*32+_XFER(%rsp, SRND) - FOUR_ROUNDS_AND_SCHED _XFER + 1*32 + FOUR_ROUNDS_AND_SCHED (_XFER + 1*32) leaq K256+2*32(%rip), INP vpaddd (INP, SRND), X0, XFER vmovdqa XFER, 2*32+_XFER(%rsp, SRND) - FOUR_ROUNDS_AND_SCHED _XFER + 2*32 + FOUR_ROUNDS_AND_SCHED (_XFER + 2*32) leaq K256+3*32(%rip), INP vpaddd (INP, SRND), X0, XFER vmovdqa XFER, 3*32+_XFER(%rsp, SRND) - FOUR_ROUNDS_AND_SCHED _XFER + 3*32 + FOUR_ROUNDS_AND_SCHED (_XFER + 3*32) add $4*32, SRND cmp $3*4*32, SRND @@ -618,12 +618,12 @@ leaq K256+0*32(%rip), INP vpaddd (INP, SRND), X0, XFER vmovdqa XFER, 0*32+_XFER(%rsp, SRND) - DO_4ROUNDS _XFER + 0*32 + DO_4ROUNDS (_XFER + 0*32) leaq K256+1*32(%rip), INP vpaddd (INP, SRND), X1, XFER vmovdqa XFER, 1*32+_XFER(%rsp, SRND) - DO_4ROUNDS _XFER + 1*32 + DO_4ROUNDS (_XFER + 1*32) add $2*32, SRND vmovdqa X2, X0 @@ -651,8 +651,8 @@ xor SRND, SRND .align 16 .Lloop3: - DO_4ROUNDS _XFER + 0*32 + 16 - DO_4ROUNDS _XFER + 1*32 + 16 + DO_4ROUNDS (_XFER + 0*32 + 16) + DO_4ROUNDS (_XFER + 1*32 + 16) add $2*32, SRND cmp $4*4*32, SRND jb .Lloop3 @@ -716,6 +716,7 @@ popq %r13 popq %r12 popq %rbx + vzeroupper RET SYM_FUNC_END(sha256_transform_rorx) --- linux-xilinx-6.8.0.orig/arch/x86/crypto/sha512-avx2-asm.S +++ linux-xilinx-6.8.0/arch/x86/crypto/sha512-avx2-asm.S @@ -680,6 +680,7 @@ pop %r12 pop %rbx + vzeroupper RET SYM_FUNC_END(sha512_transform_rorx) --- linux-xilinx-6.8.0.orig/arch/x86/entry/common.c +++ linux-xilinx-6.8.0/arch/x86/entry/common.c @@ -49,7 +49,7 @@ if (likely(unr < NR_syscalls)) { unr = array_index_nospec(unr, NR_syscalls); - regs->ax = sys_call_table[unr](regs); + regs->ax = x64_sys_call(regs, unr); return true; } return false; @@ -66,7 +66,7 @@ if (IS_ENABLED(CONFIG_X86_X32_ABI) && likely(xnr < X32_NR_syscalls)) { xnr = array_index_nospec(xnr, X32_NR_syscalls); - regs->ax = x32_sys_call_table[xnr](regs); + regs->ax = x32_sys_call(regs, xnr); return true; } return false; @@ -162,7 +162,7 @@ if (likely(unr < IA32_NR_syscalls)) { unr = array_index_nospec(unr, IA32_NR_syscalls); - regs->ax = ia32_sys_call_table[unr](regs); + regs->ax = ia32_sys_call(regs, unr); } else if (nr != -1) { regs->ax = __ia32_sys_ni_syscall(regs); } @@ -189,7 +189,7 @@ } /** - * int80_emulation - 32-bit legacy syscall entry + * do_int80_emulation - 32-bit legacy syscall C entry from asm * * This entry point can be used by 32-bit and 64-bit programs to perform * 32-bit system calls. Instances of INT $0x80 can be found inline in @@ -207,7 +207,7 @@ * eax: system call number * ebx, ecx, edx, esi, edi, ebp: arg1 - arg 6 */ -DEFINE_IDTENTRY_RAW(int80_emulation) +__visible noinstr void do_int80_emulation(struct pt_regs *regs) { int nr; --- linux-xilinx-6.8.0.orig/arch/x86/entry/entry.S +++ linux-xilinx-6.8.0/arch/x86/entry/entry.S @@ -9,6 +9,8 @@ #include #include #include +#include +#include .pushsection .noinstr.text, "ax" @@ -17,6 +19,9 @@ movl $PRED_CMD_IBPB, %eax xorl %edx, %edx wrmsr + + /* Make sure IBPB clears return stack preductions too. */ + FILL_RETURN_BUFFER %rax, RSB_CLEAR_LOOPS, X86_BUG_IBPB_NO_RET RET SYM_FUNC_END(entry_ibpb) /* For KVM */ @@ -43,3 +48,18 @@ .popsection +#ifndef CONFIG_X86_64 +/* + * Clang's implementation of TLS stack cookies requires the variable in + * question to be a TLS variable. If the variable happens to be defined as an + * ordinary variable with external linkage in the same compilation unit (which + * amounts to the whole of vmlinux with LTO enabled), Clang will drop the + * segment register prefix from the references, resulting in broken code. Work + * around this by avoiding the symbol used in -mstack-protector-guard-symbol= + * entirely in the C code, and use an alias emitted by the linker script + * instead. + */ +#ifdef CONFIG_STACKPROTECTOR +EXPORT_SYMBOL(__ref_stack_chk_guard); +#endif +#endif --- linux-xilinx-6.8.0.orig/arch/x86/entry/entry_32.S +++ linux-xilinx-6.8.0/arch/x86/entry/entry_32.S @@ -875,6 +875,8 @@ /* Now ready to switch the cr3 */ SWITCH_TO_USER_CR3 scratch_reg=%eax + /* Clobbers ZF */ + CLEAR_CPU_BUFFERS /* * Restore all flags except IF. (We restore IF separately because @@ -885,7 +887,6 @@ BUG_IF_WRONG_CR3 no_user_check=1 popfl popl %eax - CLEAR_CPU_BUFFERS /* * Return back to the vDSO, which will pop ecx and edx. @@ -1148,7 +1149,6 @@ /* Not on SYSENTER stack. */ call exc_nmi - CLEAR_CPU_BUFFERS jmp .Lnmi_return .Lnmi_from_sysenter_stack: @@ -1169,6 +1169,7 @@ CHECK_AND_APPLY_ESPFIX RESTORE_ALL_NMI cr3_reg=%edi pop=4 + CLEAR_CPU_BUFFERS jmp .Lirq_return #ifdef CONFIG_X86_ESPFIX32 @@ -1210,6 +1211,7 @@ * 1 - orig_ax */ lss (1+5+6)*4(%esp), %esp # back to espfix stack + CLEAR_CPU_BUFFERS jmp .Lirq_return #endif SYM_CODE_END(asm_exc_nmi) --- linux-xilinx-6.8.0.orig/arch/x86/entry/entry_64.S +++ linux-xilinx-6.8.0/arch/x86/entry/entry_64.S @@ -116,6 +116,7 @@ /* clobbers %rax, make sure it is after saving the syscall nr */ IBRS_ENTER UNTRAIN_RET + CLEAR_BRANCH_HISTORY call do_syscall_64 /* returns with IRQs disabled */ @@ -1494,3 +1495,63 @@ call make_task_dead SYM_CODE_END(rewind_stack_and_make_dead) .popsection + +/* + * This sequence executes branches in order to remove user branch information + * from the branch history tracker in the Branch Predictor, therefore removing + * user influence on subsequent BTB lookups. + * + * It should be used on parts prior to Alder Lake. Newer parts should use the + * BHI_DIS_S hardware control instead. If a pre-Alder Lake part is being + * virtualized on newer hardware the VMM should protect against BHI attacks by + * setting BHI_DIS_S for the guests. + * + * CALLs/RETs are necessary to prevent Loop Stream Detector(LSD) from engaging + * and not clearing the branch history. The call tree looks like: + * + * call 1 + * call 2 + * call 2 + * call 2 + * call 2 + * call 2 + * ret + * ret + * ret + * ret + * ret + * ret + * + * This means that the stack is non-constant and ORC can't unwind it with %rsp + * alone. Therefore we unconditionally set up the frame pointer, which allows + * ORC to unwind properly. + * + * The alignment is for performance and not for safety, and may be safely + * refactored in the future if needed. + */ +SYM_FUNC_START(clear_bhb_loop) + push %rbp + mov %rsp, %rbp + movl $5, %ecx + ANNOTATE_INTRA_FUNCTION_CALL + call 1f + jmp 5f + .align 64, 0xcc + ANNOTATE_INTRA_FUNCTION_CALL +1: call 2f + RET + .align 64, 0xcc +2: movl $5, %eax +3: jmp 4f + nop +4: sub $1, %eax + jnz 3b + sub $1, %ecx + jnz 1b + RET +5: lfence + pop %rbp + RET +SYM_FUNC_END(clear_bhb_loop) +EXPORT_SYMBOL_GPL(clear_bhb_loop) +STACK_FRAME_NON_STANDARD(clear_bhb_loop) --- linux-xilinx-6.8.0.orig/arch/x86/entry/entry_64_compat.S +++ linux-xilinx-6.8.0/arch/x86/entry/entry_64_compat.S @@ -90,9 +90,6 @@ cld - IBRS_ENTER - UNTRAIN_RET - /* * SYSENTER doesn't filter flags, so we need to clear NT and AC * ourselves. To save a few cycles, we can check whether @@ -116,6 +113,16 @@ jnz .Lsysenter_fix_flags .Lsysenter_flags_fixed: + /* + * CPU bugs mitigations mechanisms can call other functions. They + * should be invoked after making sure TF is cleared because + * single-step is ignored only for instructions inside the + * entry_SYSENTER_compat function. + */ + IBRS_ENTER + UNTRAIN_RET + CLEAR_BRANCH_HISTORY + movq %rsp, %rdi call do_SYSENTER_32 jmp sysret32_from_system_call @@ -206,6 +213,7 @@ IBRS_ENTER UNTRAIN_RET + CLEAR_BRANCH_HISTORY movq %rsp, %rdi call do_fast_syscall_32 @@ -276,3 +284,17 @@ ANNOTATE_NOENDBR int3 SYM_CODE_END(entry_SYSCALL_compat) + +/* + * int 0x80 is used by 32 bit mode as a system call entry. Normally idt entries + * point to C routines, however since this is a system call interface the branch + * history needs to be scrubbed to protect against BHI attacks, and that + * scrubbing needs to take place in assembly code prior to entering any C + * routines. + */ +SYM_CODE_START(int80_emulation) + ANNOTATE_NOENDBR + UNWIND_HINT_FUNC + CLEAR_BRANCH_HISTORY + jmp do_int80_emulation +SYM_CODE_END(int80_emulation) --- linux-xilinx-6.8.0.orig/arch/x86/entry/syscall_32.c +++ linux-xilinx-6.8.0/arch/x86/entry/syscall_32.c @@ -14,12 +14,31 @@ #endif #define __SYSCALL(nr, sym) extern long __ia32_##sym(const struct pt_regs *); - +#define __SYSCALL_NORETURN(nr, sym) extern long __noreturn __ia32_##sym(const struct pt_regs *); #include -#undef __SYSCALL +#undef __SYSCALL -#define __SYSCALL(nr, sym) __ia32_##sym, +#undef __SYSCALL_NORETURN +#define __SYSCALL_NORETURN __SYSCALL -__visible const sys_call_ptr_t ia32_sys_call_table[] = { +/* + * The sys_call_table[] is no longer used for system calls, but + * kernel/trace/trace_syscalls.c still wants to know the system + * call address. + */ +#ifdef CONFIG_X86_32 +#define __SYSCALL(nr, sym) __ia32_##sym, +const sys_call_ptr_t sys_call_table[] = { #include }; +#undef __SYSCALL +#endif + +#define __SYSCALL(nr, sym) case nr: return __ia32_##sym(regs); +long ia32_sys_call(const struct pt_regs *regs, unsigned int nr) +{ + switch (nr) { + #include + default: return __ia32_sys_ni_syscall(regs); + } +}; --- linux-xilinx-6.8.0.orig/arch/x86/entry/syscall_64.c +++ linux-xilinx-6.8.0/arch/x86/entry/syscall_64.c @@ -8,11 +8,29 @@ #include #define __SYSCALL(nr, sym) extern long __x64_##sym(const struct pt_regs *); +#define __SYSCALL_NORETURN(nr, sym) extern long __noreturn __x64_##sym(const struct pt_regs *); #include -#undef __SYSCALL +#undef __SYSCALL -#define __SYSCALL(nr, sym) __x64_##sym, +#undef __SYSCALL_NORETURN +#define __SYSCALL_NORETURN __SYSCALL -asmlinkage const sys_call_ptr_t sys_call_table[] = { +/* + * The sys_call_table[] is no longer used for system calls, but + * kernel/trace/trace_syscalls.c still wants to know the system + * call address. + */ +#define __SYSCALL(nr, sym) __x64_##sym, +const sys_call_ptr_t sys_call_table[] = { #include }; +#undef __SYSCALL + +#define __SYSCALL(nr, sym) case nr: return __x64_##sym(regs); +long x64_sys_call(const struct pt_regs *regs, unsigned int nr) +{ + switch (nr) { + #include + default: return __x64_sys_ni_syscall(regs); + } +}; --- linux-xilinx-6.8.0.orig/arch/x86/entry/syscall_x32.c +++ linux-xilinx-6.8.0/arch/x86/entry/syscall_x32.c @@ -8,11 +8,18 @@ #include #define __SYSCALL(nr, sym) extern long __x64_##sym(const struct pt_regs *); +#define __SYSCALL_NORETURN(nr, sym) extern long __noreturn __x64_##sym(const struct pt_regs *); #include -#undef __SYSCALL +#undef __SYSCALL -#define __SYSCALL(nr, sym) __x64_##sym, +#undef __SYSCALL_NORETURN +#define __SYSCALL_NORETURN __SYSCALL -asmlinkage const sys_call_ptr_t x32_sys_call_table[] = { -#include +#define __SYSCALL(nr, sym) case nr: return __x64_##sym(regs); +long x32_sys_call(const struct pt_regs *regs, unsigned int nr) +{ + switch (nr) { + #include + default: return __x64_sys_ni_syscall(regs); + } }; --- linux-xilinx-6.8.0.orig/arch/x86/entry/syscalls/syscall_32.tbl +++ linux-xilinx-6.8.0/arch/x86/entry/syscalls/syscall_32.tbl @@ -2,7 +2,7 @@ # 32-bit system call numbers and entry vectors # # The format is: -# +# [ [noreturn]] # # The __ia32_sys and __ia32_compat_sys stubs are created on-the-fly for # sys_*() system calls and compat_sys_*() compat system calls if @@ -12,7 +12,7 @@ # The abi is always "i386" for this file. # 0 i386 restart_syscall sys_restart_syscall -1 i386 exit sys_exit +1 i386 exit sys_exit - noreturn 2 i386 fork sys_fork 3 i386 read sys_read 4 i386 write sys_write @@ -263,7 +263,7 @@ 249 i386 io_cancel sys_io_cancel 250 i386 fadvise64 sys_ia32_fadvise64 # 251 is available for reuse (was briefly sys_set_zone_reclaim) -252 i386 exit_group sys_exit_group +252 i386 exit_group sys_exit_group - noreturn 253 i386 lookup_dcookie 254 i386 epoll_create sys_epoll_create 255 i386 epoll_ctl sys_epoll_ctl @@ -420,7 +420,7 @@ 412 i386 utimensat_time64 sys_utimensat 413 i386 pselect6_time64 sys_pselect6 compat_sys_pselect6_time64 414 i386 ppoll_time64 sys_ppoll compat_sys_ppoll_time64 -416 i386 io_pgetevents_time64 sys_io_pgetevents +416 i386 io_pgetevents_time64 sys_io_pgetevents compat_sys_io_pgetevents_time64 417 i386 recvmmsg_time64 sys_recvmmsg compat_sys_recvmmsg_time64 418 i386 mq_timedsend_time64 sys_mq_timedsend 419 i386 mq_timedreceive_time64 sys_mq_timedreceive --- linux-xilinx-6.8.0.orig/arch/x86/entry/syscalls/syscall_64.tbl +++ linux-xilinx-6.8.0/arch/x86/entry/syscalls/syscall_64.tbl @@ -2,7 +2,7 @@ # 64-bit system call numbers and entry vectors # # The format is: -# +# [ [noreturn]] # # The __x64_sys_*() stubs are created on-the-fly for sys_*() system calls # @@ -68,7 +68,7 @@ 57 common fork sys_fork 58 common vfork sys_vfork 59 64 execve sys_execve -60 common exit sys_exit +60 common exit sys_exit - noreturn 61 common wait4 sys_wait4 62 common kill sys_kill 63 common uname sys_newuname @@ -239,7 +239,7 @@ 228 common clock_gettime sys_clock_gettime 229 common clock_getres sys_clock_getres 230 common clock_nanosleep sys_clock_nanosleep -231 common exit_group sys_exit_group +231 common exit_group sys_exit_group - noreturn 232 common epoll_wait sys_epoll_wait 233 common epoll_ctl sys_epoll_ctl 234 common tgkill sys_tgkill --- linux-xilinx-6.8.0.orig/arch/x86/entry/vdso/Makefile +++ linux-xilinx-6.8.0/arch/x86/entry/vdso/Makefile @@ -34,8 +34,13 @@ KASAN_SANITIZE_vma.o := y UBSAN_SANITIZE_vma.o := y KCSAN_SANITIZE_vma.o := y -OBJECT_FILES_NON_STANDARD_vma.o := n -OBJECT_FILES_NON_STANDARD_extable.o := n + +OBJECT_FILES_NON_STANDARD_extable.o := n +OBJECT_FILES_NON_STANDARD_vdso-image-32.o := n +OBJECT_FILES_NON_STANDARD_vdso-image-x32.o := n +OBJECT_FILES_NON_STANDARD_vdso-image-64.o := n +OBJECT_FILES_NON_STANDARD_vdso32-setup.o := n +OBJECT_FILES_NON_STANDARD_vma.o := n # vDSO images to build vdso_img-$(VDSO64-y) += 64 @@ -43,7 +48,6 @@ vdso_img-$(VDSO32-y) += 32 obj-$(VDSO32-y) += vdso32-setup.o -OBJECT_FILES_NON_STANDARD_vdso32-setup.o := n vobjs := $(foreach F,$(vobjs-y),$(obj)/$F) vobjs32 := $(foreach F,$(vobjs32-y),$(obj)/$F) --- linux-xilinx-6.8.0.orig/arch/x86/entry/vsyscall/vsyscall_64.c +++ linux-xilinx-6.8.0/arch/x86/entry/vsyscall/vsyscall_64.c @@ -76,7 +76,7 @@ if (!show_unhandled_signals) return; - printk_ratelimited("%s%s[%d] %s ip:%lx cs:%lx sp:%lx ax:%lx si:%lx di:%lx\n", + printk_ratelimited("%s%s[%d] %s ip:%lx cs:%x sp:%lx ax:%lx si:%lx di:%lx\n", level, current->comm, task_pid_nr(current), message, regs->ip, regs->cs, regs->sp, regs->ax, regs->si, regs->di); @@ -98,11 +98,6 @@ static bool write_ok_or_segv(unsigned long ptr, size_t size) { - /* - * XXX: if access_ok, get_user, and put_user handled - * sig_on_uaccess_err, this could go away. - */ - if (!access_ok((void __user *)ptr, size)) { struct thread_struct *thread = ¤t->thread; @@ -120,10 +115,8 @@ bool emulate_vsyscall(unsigned long error_code, struct pt_regs *regs, unsigned long address) { - struct task_struct *tsk; unsigned long caller; int vsyscall_nr, syscall_nr, tmp; - int prev_sig_on_uaccess_err; long ret; unsigned long orig_dx; @@ -172,8 +165,6 @@ goto sigsegv; } - tsk = current; - /* * Check for access_ok violations and find the syscall nr. * @@ -234,12 +225,8 @@ goto do_ret; /* skip requested */ /* - * With a real vsyscall, page faults cause SIGSEGV. We want to - * preserve that behavior to make writing exploits harder. + * With a real vsyscall, page faults cause SIGSEGV. */ - prev_sig_on_uaccess_err = current->thread.sig_on_uaccess_err; - current->thread.sig_on_uaccess_err = 1; - ret = -EFAULT; switch (vsyscall_nr) { case 0: @@ -262,23 +249,12 @@ break; } - current->thread.sig_on_uaccess_err = prev_sig_on_uaccess_err; - check_fault: if (ret == -EFAULT) { /* Bad news -- userspace fed a bad pointer to a vsyscall. */ warn_bad_vsyscall(KERN_INFO, regs, "vsyscall fault (exploit attempt?)"); - - /* - * If we failed to generate a signal for any reason, - * generate one here. (This should be impossible.) - */ - if (WARN_ON_ONCE(!sigismember(&tsk->pending.signal, SIGBUS) && - !sigismember(&tsk->pending.signal, SIGSEGV))) - goto sigsegv; - - return true; /* Don't emulate the ret. */ + goto sigsegv; } regs->ax = ret; --- linux-xilinx-6.8.0.orig/arch/x86/events/amd/core.c +++ linux-xilinx-6.8.0/arch/x86/events/amd/core.c @@ -250,7 +250,7 @@ /* * AMD Performance Monitor Family 17h and later: */ -static const u64 amd_f17h_perfmon_event_map[PERF_COUNT_HW_MAX] = +static const u64 amd_zen1_perfmon_event_map[PERF_COUNT_HW_MAX] = { [PERF_COUNT_HW_CPU_CYCLES] = 0x0076, [PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0, @@ -262,10 +262,24 @@ [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = 0x0187, }; +static const u64 amd_zen2_perfmon_event_map[PERF_COUNT_HW_MAX] = +{ + [PERF_COUNT_HW_CPU_CYCLES] = 0x0076, + [PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0, + [PERF_COUNT_HW_CACHE_REFERENCES] = 0xff60, + [PERF_COUNT_HW_CACHE_MISSES] = 0x0964, + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x00c2, + [PERF_COUNT_HW_BRANCH_MISSES] = 0x00c3, + [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x00a9, +}; + static u64 amd_pmu_event_map(int hw_event) { - if (boot_cpu_data.x86 >= 0x17) - return amd_f17h_perfmon_event_map[hw_event]; + if (cpu_feature_enabled(X86_FEATURE_ZEN2) || boot_cpu_data.x86 >= 0x19) + return amd_zen2_perfmon_event_map[hw_event]; + + if (cpu_feature_enabled(X86_FEATURE_ZEN1)) + return amd_zen1_perfmon_event_map[hw_event]; return amd_perfmon_event_map[hw_event]; } @@ -403,8 +417,10 @@ * be removed on one CPU at a time AND PMU is disabled * when we come here */ - for (i = 0; i < x86_pmu.num_counters; i++) { - if (cmpxchg(nb->owners + i, event, NULL) == event) + for_each_set_bit(i, x86_pmu.cntr_mask, X86_PMC_IDX_MAX) { + struct perf_event *tmp = event; + + if (try_cmpxchg(nb->owners + i, &tmp, NULL)) break; } } @@ -470,7 +486,7 @@ * because of successive calls to x86_schedule_events() from * hw_perf_group_sched_in() without hw_perf_enable() */ - for_each_set_bit(idx, c->idxmsk, x86_pmu.num_counters) { + for_each_set_bit(idx, c->idxmsk, x86_pmu_max_num_counters(NULL)) { if (new == -1 || hwc->idx == idx) /* assign free slot, prefer hwc->idx */ old = cmpxchg(nb->owners + idx, NULL, event); @@ -513,7 +529,7 @@ /* * initialize all possible NB constraints */ - for (i = 0; i < x86_pmu.num_counters; i++) { + for_each_set_bit(i, x86_pmu.cntr_mask, X86_PMC_IDX_MAX) { __set_bit(i, nb->event_constraints[i].idxmsk); nb->event_constraints[i].weight = 1; } @@ -604,7 +620,6 @@ kfree(cpuhw->lbr_sel); cpuhw->lbr_sel = NULL; - amd_pmu_cpu_reset(cpu); if (!x86_pmu.amd_nb_constraints) return; @@ -707,7 +722,7 @@ * counters are always enabled when this function is called and * ARCH_PERFMON_EVENTSEL_INT is always set. */ - for (idx = 0; idx < x86_pmu.num_counters; idx++) { + for_each_set_bit(idx, x86_pmu.cntr_mask, X86_PMC_IDX_MAX) { if (!test_bit(idx, cpuc->active_mask)) continue; @@ -727,7 +742,7 @@ amd_brs_enable_all(); - for (idx = 0; idx < x86_pmu.num_counters; idx++) { + for_each_set_bit(idx, x86_pmu.cntr_mask, X86_PMC_IDX_MAX) { /* only activate events which are marked as active */ if (!test_bit(idx, cpuc->active_mask)) continue; @@ -882,11 +897,12 @@ static int amd_pmu_v2_handle_irq(struct pt_regs *regs) { struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); + static atomic64_t status_warned = ATOMIC64_INIT(0); + u64 reserved, status, mask, new_bits, prev_bits; struct perf_sample_data data; struct hw_perf_event *hwc; struct perf_event *event; int handled = 0, idx; - u64 reserved, status, mask; bool pmu_enabled; /* @@ -919,7 +935,7 @@ /* Clear any reserved bits set by buggy microcode */ status &= amd_pmu_global_cntr_mask; - for (idx = 0; idx < x86_pmu.num_counters; idx++) { + for_each_set_bit(idx, x86_pmu.cntr_mask, X86_PMC_IDX_MAX) { if (!test_bit(idx, cpuc->active_mask)) continue; @@ -951,7 +967,12 @@ * the corresponding PMCs are expected to be inactive according to the * active_mask */ - WARN_ON(status > 0); + if (status > 0) { + prev_bits = atomic64_fetch_or(status, &status_warned); + // A new bit was set for the very first time. + new_bits = status & ~prev_bits; + WARN(new_bits, "New overflows for inactive PMCs: %llx\n", new_bits); + } /* Clear overflow and freeze bits */ amd_pmu_ack_global_status(~status); @@ -1254,7 +1275,7 @@ .addr_offset = amd_pmu_addr_offset, .event_map = amd_pmu_event_map, .max_events = ARRAY_SIZE(amd_perfmon_event_map), - .num_counters = AMD64_NUM_COUNTERS, + .cntr_mask64 = GENMASK_ULL(AMD64_NUM_COUNTERS - 1, 0), .add = amd_pmu_add_event, .del = amd_pmu_del_event, .cntval_bits = 48, @@ -1353,7 +1374,7 @@ */ x86_pmu.eventsel = MSR_F15H_PERF_CTL; x86_pmu.perfctr = MSR_F15H_PERF_CTR; - x86_pmu.num_counters = AMD64_NUM_COUNTERS_CORE; + x86_pmu.cntr_mask64 = GENMASK_ULL(AMD64_NUM_COUNTERS_CORE - 1, 0); /* Check for Performance Monitoring v2 support */ if (boot_cpu_has(X86_FEATURE_PERFMON_V2)) { @@ -1363,9 +1384,9 @@ x86_pmu.version = 2; /* Find the number of available Core PMCs */ - x86_pmu.num_counters = ebx.split.num_core_pmc; + x86_pmu.cntr_mask64 = GENMASK_ULL(ebx.split.num_core_pmc - 1, 0); - amd_pmu_global_cntr_mask = (1ULL << x86_pmu.num_counters) - 1; + amd_pmu_global_cntr_mask = x86_pmu.cntr_mask64; /* Update PMC handling functions */ x86_pmu.enable_all = amd_pmu_v2_enable_all; @@ -1393,12 +1414,12 @@ * even numbered counter that has a consecutive adjacent odd * numbered counter following it. */ - for (i = 0; i < x86_pmu.num_counters - 1; i += 2) + for (i = 0; i < x86_pmu_max_num_counters(NULL) - 1; i += 2) even_ctr_mask |= BIT_ULL(i); pair_constraint = (struct event_constraint) __EVENT_CONSTRAINT(0, even_ctr_mask, 0, - x86_pmu.num_counters / 2, 0, + x86_pmu_max_num_counters(NULL) / 2, 0, PERF_X86_EVENT_PAIR); x86_pmu.get_event_constraints = amd_get_event_constraints_f17h; --- linux-xilinx-6.8.0.orig/arch/x86/events/amd/ibs.c +++ linux-xilinx-6.8.0/arch/x86/events/amd/ibs.c @@ -1118,7 +1118,7 @@ .data = ibs_data.data, }, }; - perf_sample_save_raw_data(&data, &raw); + perf_sample_save_raw_data(&data, event, &raw); } if (perf_ibs == &perf_ibs_op) --- linux-xilinx-6.8.0.orig/arch/x86/events/amd/lbr.c +++ linux-xilinx-6.8.0/arch/x86/events/amd/lbr.c @@ -173,9 +173,11 @@ /* * Check if a branch has been logged; if valid = 0, spec = 0 - * then no branch was recorded + * then no branch was recorded; if reserved = 1 then an + * erroneous branch was recorded (see Erratum 1452) */ - if (!entry.to.split.valid && !entry.to.split.spec) + if ((!entry.to.split.valid && !entry.to.split.spec) || + entry.to.split.reserved) continue; perf_clear_branch_entry_bitfields(br + out); --- linux-xilinx-6.8.0.orig/arch/x86/events/amd/uncore.c +++ linux-xilinx-6.8.0/arch/x86/events/amd/uncore.c @@ -162,7 +162,9 @@ /* if not, take the first available counter */ hwc->idx = -1; for (i = 0; i < pmu->num_counters; i++) { - if (cmpxchg(&ctx->events[i], NULL, event) == NULL) { + struct perf_event *tmp = NULL; + + if (try_cmpxchg(&ctx->events[i], &tmp, event)) { hwc->idx = i; break; } @@ -196,7 +198,9 @@ event->pmu->stop(event, PERF_EF_UPDATE); for (i = 0; i < pmu->num_counters; i++) { - if (cmpxchg(&ctx->events[i], event, NULL) == event) + struct perf_event *tmp = event; + + if (try_cmpxchg(&ctx->events[i], &tmp, NULL)) break; } @@ -639,7 +643,7 @@ info.split.aux_data = 0; info.split.num_pmcs = NUM_COUNTERS_NB; info.split.gid = 0; - info.split.cid = topology_die_id(cpu); + info.split.cid = topology_logical_package_id(cpu); if (pmu_version >= 2) { ebx.full = cpuid_ebx(EXT_PERFMON_DEBUG_FEATURES); @@ -654,17 +658,20 @@ { struct attribute **df_attr = amd_uncore_df_format_attr; struct amd_uncore_pmu *pmu; + int num_counters; /* Run just once */ if (uncore->init_done) return amd_uncore_ctx_init(uncore, cpu); + num_counters = amd_uncore_ctx_num_pmcs(uncore, cpu); + if (!num_counters) + goto done; + /* No grouping, single instance for a system */ uncore->pmus = kzalloc(sizeof(*uncore->pmus), GFP_KERNEL); - if (!uncore->pmus) { - uncore->num_pmus = 0; + if (!uncore->pmus) goto done; - } /* * For Family 17h and above, the Northbridge counters are repurposed @@ -674,7 +681,7 @@ pmu = &uncore->pmus[0]; strscpy(pmu->name, boot_cpu_data.x86 >= 0x17 ? "amd_df" : "amd_nb", sizeof(pmu->name)); - pmu->num_counters = amd_uncore_ctx_num_pmcs(uncore, cpu); + pmu->num_counters = num_counters; pmu->msr_base = MSR_F15H_NB_PERF_CTL; pmu->rdpmc_base = RDPMC_BASE_NB; pmu->group = amd_uncore_ctx_gid(uncore, cpu); @@ -785,17 +792,20 @@ { struct attribute **l3_attr = amd_uncore_l3_format_attr; struct amd_uncore_pmu *pmu; + int num_counters; /* Run just once */ if (uncore->init_done) return amd_uncore_ctx_init(uncore, cpu); + num_counters = amd_uncore_ctx_num_pmcs(uncore, cpu); + if (!num_counters) + goto done; + /* No grouping, single instance for a system */ uncore->pmus = kzalloc(sizeof(*uncore->pmus), GFP_KERNEL); - if (!uncore->pmus) { - uncore->num_pmus = 0; + if (!uncore->pmus) goto done; - } /* * For Family 17h and above, L3 cache counters are available instead @@ -805,7 +815,7 @@ pmu = &uncore->pmus[0]; strscpy(pmu->name, boot_cpu_data.x86 >= 0x17 ? "amd_l3" : "amd_l2", sizeof(pmu->name)); - pmu->num_counters = amd_uncore_ctx_num_pmcs(uncore, cpu); + pmu->num_counters = num_counters; pmu->msr_base = MSR_F16H_L2I_PERF_CTL; pmu->rdpmc_base = RDPMC_BASE_LLC; pmu->group = amd_uncore_ctx_gid(uncore, cpu); @@ -893,8 +903,8 @@ cpuid(EXT_PERFMON_DEBUG_FEATURES, &eax, &ebx.full, &ecx, &edx); info.split.aux_data = ecx; /* stash active mask */ info.split.num_pmcs = ebx.split.num_umc_pmc; - info.split.gid = topology_die_id(cpu); - info.split.cid = topology_die_id(cpu); + info.split.gid = topology_logical_package_id(cpu); + info.split.cid = topology_logical_package_id(cpu); *per_cpu_ptr(uncore->info, cpu) = info; } --- linux-xilinx-6.8.0.orig/arch/x86/events/core.c +++ linux-xilinx-6.8.0/arch/x86/events/core.c @@ -41,6 +41,8 @@ #include #include #include +#include +#include #include "perf_event.h" @@ -189,29 +191,31 @@ #ifdef CONFIG_X86_LOCAL_APIC -static inline int get_possible_num_counters(void) +static inline u64 get_possible_counter_mask(void) { - int i, num_counters = x86_pmu.num_counters; + u64 cntr_mask = x86_pmu.cntr_mask64; + int i; if (!is_hybrid()) - return num_counters; + return cntr_mask; for (i = 0; i < x86_pmu.num_hybrid_pmus; i++) - num_counters = max_t(int, num_counters, x86_pmu.hybrid_pmu[i].num_counters); + cntr_mask |= x86_pmu.hybrid_pmu[i].cntr_mask64; - return num_counters; + return cntr_mask; } static bool reserve_pmc_hardware(void) { - int i, num_counters = get_possible_num_counters(); + u64 cntr_mask = get_possible_counter_mask(); + int i, end; - for (i = 0; i < num_counters; i++) { + for_each_set_bit(i, (unsigned long *)&cntr_mask, X86_PMC_IDX_MAX) { if (!reserve_perfctr_nmi(x86_pmu_event_addr(i))) goto perfctr_fail; } - for (i = 0; i < num_counters; i++) { + for_each_set_bit(i, (unsigned long *)&cntr_mask, X86_PMC_IDX_MAX) { if (!reserve_evntsel_nmi(x86_pmu_config_addr(i))) goto eventsel_fail; } @@ -219,13 +223,14 @@ return true; eventsel_fail: - for (i--; i >= 0; i--) + end = i; + for_each_set_bit(i, (unsigned long *)&cntr_mask, end) release_evntsel_nmi(x86_pmu_config_addr(i)); - - i = num_counters; + i = X86_PMC_IDX_MAX; perfctr_fail: - for (i--; i >= 0; i--) + end = i; + for_each_set_bit(i, (unsigned long *)&cntr_mask, end) release_perfctr_nmi(x86_pmu_event_addr(i)); return false; @@ -233,9 +238,10 @@ static void release_pmc_hardware(void) { - int i, num_counters = get_possible_num_counters(); + u64 cntr_mask = get_possible_counter_mask(); + int i; - for (i = 0; i < num_counters; i++) { + for_each_set_bit(i, (unsigned long *)&cntr_mask, X86_PMC_IDX_MAX) { release_perfctr_nmi(x86_pmu_event_addr(i)); release_evntsel_nmi(x86_pmu_config_addr(i)); } @@ -248,7 +254,8 @@ #endif -bool check_hw_exists(struct pmu *pmu, int num_counters, int num_counters_fixed) +bool check_hw_exists(struct pmu *pmu, unsigned long *cntr_mask, + unsigned long *fixed_cntr_mask) { u64 val, val_fail = -1, val_new= ~0; int i, reg, reg_fail = -1, ret = 0; @@ -259,7 +266,7 @@ * Check to see if the BIOS enabled any of the counters, if so * complain and bail. */ - for (i = 0; i < num_counters; i++) { + for_each_set_bit(i, cntr_mask, X86_PMC_IDX_MAX) { reg = x86_pmu_config_addr(i); ret = rdmsrl_safe(reg, &val); if (ret) @@ -273,12 +280,12 @@ } } - if (num_counters_fixed) { + if (*(u64 *)fixed_cntr_mask) { reg = MSR_ARCH_PERFMON_FIXED_CTR_CTRL; ret = rdmsrl_safe(reg, &val); if (ret) goto msr_fail; - for (i = 0; i < num_counters_fixed; i++) { + for_each_set_bit(i, fixed_cntr_mask, X86_PMC_IDX_MAX) { if (fixed_counter_disabled(i, pmu)) continue; if (val & (0x03ULL << i*4)) { @@ -679,7 +686,7 @@ struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); int idx; - for (idx = 0; idx < x86_pmu.num_counters; idx++) { + for_each_set_bit(idx, x86_pmu.cntr_mask, X86_PMC_IDX_MAX) { struct hw_perf_event *hwc = &cpuc->events[idx]->hw; u64 val; @@ -736,7 +743,7 @@ struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); int idx; - for (idx = 0; idx < x86_pmu.num_counters; idx++) { + for_each_set_bit(idx, x86_pmu.cntr_mask, X86_PMC_IDX_MAX) { struct hw_perf_event *hwc = &cpuc->events[idx]->hw; if (!test_bit(idx, cpuc->active_mask)) @@ -975,7 +982,6 @@ int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign) { - int num_counters = hybrid(cpuc->pmu, num_counters); struct event_constraint *c; struct perf_event *e; int n0, i, wmin, wmax, unsched = 0; @@ -1051,7 +1057,7 @@ /* slow path */ if (i != n) { - int gpmax = num_counters; + int gpmax = x86_pmu_max_num_counters(cpuc->pmu); /* * Do not allow scheduling of more than half the available @@ -1072,7 +1078,7 @@ * the extra Merge events needed by large increment events. */ if (x86_pmu.flags & PMU_FL_PAIR) { - gpmax = num_counters - cpuc->n_pair; + gpmax -= cpuc->n_pair; WARN_ON(gpmax <= 0); } @@ -1157,12 +1163,10 @@ */ static int collect_events(struct cpu_hw_events *cpuc, struct perf_event *leader, bool dogrp) { - int num_counters = hybrid(cpuc->pmu, num_counters); - int num_counters_fixed = hybrid(cpuc->pmu, num_counters_fixed); struct perf_event *event; int n, max_count; - max_count = num_counters + num_counters_fixed; + max_count = x86_pmu_num_counters(cpuc->pmu) + x86_pmu_num_counters_fixed(cpuc->pmu); /* current number of events already accepted */ n = cpuc->n_events; @@ -1519,19 +1523,22 @@ void perf_event_print_debug(void) { u64 ctrl, status, overflow, pmc_ctrl, pmc_count, prev_left, fixed; + unsigned long *cntr_mask, *fixed_cntr_mask; + struct event_constraint *pebs_constraints; + struct cpu_hw_events *cpuc; u64 pebs, debugctl; - int cpu = smp_processor_id(); - struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu); - int num_counters = hybrid(cpuc->pmu, num_counters); - int num_counters_fixed = hybrid(cpuc->pmu, num_counters_fixed); - struct event_constraint *pebs_constraints = hybrid(cpuc->pmu, pebs_constraints); - unsigned long flags; - int idx; + int cpu, idx; - if (!num_counters) - return; + guard(irqsave)(); - local_irq_save(flags); + cpu = smp_processor_id(); + cpuc = &per_cpu(cpu_hw_events, cpu); + cntr_mask = hybrid(cpuc->pmu, cntr_mask); + fixed_cntr_mask = hybrid(cpuc->pmu, fixed_cntr_mask); + pebs_constraints = hybrid(cpuc->pmu, pebs_constraints); + + if (!*(u64 *)cntr_mask) + return; if (x86_pmu.version >= 2) { rdmsrl(MSR_CORE_PERF_GLOBAL_CTRL, ctrl); @@ -1555,7 +1562,7 @@ } pr_info("CPU#%d: active: %016llx\n", cpu, *(u64 *)cpuc->active_mask); - for (idx = 0; idx < num_counters; idx++) { + for_each_set_bit(idx, cntr_mask, X86_PMC_IDX_MAX) { rdmsrl(x86_pmu_config_addr(idx), pmc_ctrl); rdmsrl(x86_pmu_event_addr(idx), pmc_count); @@ -1568,7 +1575,7 @@ pr_info("CPU#%d: gen-PMC%d left: %016llx\n", cpu, idx, prev_left); } - for (idx = 0; idx < num_counters_fixed; idx++) { + for_each_set_bit(idx, fixed_cntr_mask, X86_PMC_IDX_MAX) { if (fixed_counter_disabled(idx, cpuc->pmu)) continue; rdmsrl(MSR_ARCH_PERFMON_FIXED_CTR0 + idx, pmc_count); @@ -1576,7 +1583,6 @@ pr_info("CPU#%d: fixed-PMC%d count: %016llx\n", cpu, idx, pmc_count); } - local_irq_restore(flags); } void x86_pmu_stop(struct perf_event *event, int flags) @@ -1644,6 +1650,7 @@ while (++i < cpuc->n_events) { cpuc->event_list[i-1] = cpuc->event_list[i]; cpuc->event_constraint[i-1] = cpuc->event_constraint[i]; + cpuc->assign[i-1] = cpuc->assign[i]; } cpuc->event_constraint[i-1] = NULL; --cpuc->n_events; @@ -1681,7 +1688,7 @@ */ apic_write(APIC_LVTPC, APIC_DM_NMI); - for (idx = 0; idx < x86_pmu.num_counters; idx++) { + for_each_set_bit(idx, x86_pmu.cntr_mask, X86_PMC_IDX_MAX) { if (!test_bit(idx, cpuc->active_mask)) continue; @@ -2037,18 +2044,15 @@ static_call(x86_pmu_update)(event); } -void x86_pmu_show_pmu_cap(int num_counters, int num_counters_fixed, - u64 intel_ctrl) +void x86_pmu_show_pmu_cap(struct pmu *pmu) { pr_info("... version: %d\n", x86_pmu.version); pr_info("... bit width: %d\n", x86_pmu.cntval_bits); - pr_info("... generic registers: %d\n", num_counters); + pr_info("... generic registers: %d\n", x86_pmu_num_counters(pmu)); pr_info("... value mask: %016Lx\n", x86_pmu.cntval_mask); pr_info("... max period: %016Lx\n", x86_pmu.max_period); - pr_info("... fixed-purpose events: %lu\n", - hweight64((((1ULL << num_counters_fixed) - 1) - << INTEL_PMC_IDX_FIXED) & intel_ctrl)); - pr_info("... event mask: %016Lx\n", intel_ctrl); + pr_info("... fixed-purpose events: %d\n", x86_pmu_num_counters_fixed(pmu)); + pr_info("... event mask: %016Lx\n", hybrid(pmu, intel_ctrl)); } static int __init init_hw_perf_events(void) @@ -2085,7 +2089,7 @@ pmu_check_apic(); /* sanity check that the hardware exists or is emulated */ - if (!check_hw_exists(&pmu, x86_pmu.num_counters, x86_pmu.num_counters_fixed)) + if (!check_hw_exists(&pmu, x86_pmu.cntr_mask, x86_pmu.fixed_cntr_mask)) goto out_bad_pmu; pr_cont("%s PMU driver.\n", x86_pmu.name); @@ -2096,14 +2100,14 @@ quirk->func(); if (!x86_pmu.intel_ctrl) - x86_pmu.intel_ctrl = (1 << x86_pmu.num_counters) - 1; + x86_pmu.intel_ctrl = x86_pmu.cntr_mask64; perf_events_lapic_init(); register_nmi_handler(NMI_LOCAL, perf_event_nmi_handler, 0, "PMI"); unconstrained = (struct event_constraint) - __EVENT_CONSTRAINT(0, (1ULL << x86_pmu.num_counters) - 1, - 0, x86_pmu.num_counters, 0, 0); + __EVENT_CONSTRAINT(0, x86_pmu.cntr_mask64, + 0, x86_pmu_num_counters(NULL), 0, 0); x86_pmu_format_group.attrs = x86_pmu.format_attrs; @@ -2112,11 +2116,8 @@ pmu.attr_update = x86_pmu.attr_update; - if (!is_hybrid()) { - x86_pmu_show_pmu_cap(x86_pmu.num_counters, - x86_pmu.num_counters_fixed, - x86_pmu.intel_ctrl); - } + if (!is_hybrid()) + x86_pmu_show_pmu_cap(NULL); if (!x86_pmu.read) x86_pmu.read = _x86_pmu_read; @@ -2480,7 +2481,7 @@ for_each_set_bit(i, cpuc->dirty, X86_PMC_IDX_MAX) { if (i >= INTEL_PMC_IDX_FIXED) { /* Metrics and fake events don't have corresponding HW counters. */ - if ((i - INTEL_PMC_IDX_FIXED) >= hybrid(cpuc->pmu, num_counters_fixed)) + if (!test_bit(i - INTEL_PMC_IDX_FIXED, hybrid(cpuc->pmu, fixed_cntr_mask))) continue; wrmsrl(MSR_ARCH_PERFMON_FIXED_CTR0 + (i - INTEL_PMC_IDX_FIXED), 0); @@ -2546,6 +2547,7 @@ struct device_attribute *attr, const char *buf, size_t count) { + static DEFINE_MUTEX(rdpmc_mutex); unsigned long val; ssize_t ret; @@ -2559,6 +2561,8 @@ if (x86_pmu.attr_rdpmc_broken) return -ENOTSUPP; + guard(mutex)(&rdpmc_mutex); + if (val != x86_pmu.attr_rdpmc) { /* * Changing into or out of never available or always available, @@ -2812,6 +2816,46 @@ return get_desc_base(desc); } +#ifdef CONFIG_UPROBES +/* + * Heuristic-based check if uprobe is installed at the function entry. + * + * Under assumption of user code being compiled with frame pointers, + * `push %rbp/%ebp` is a good indicator that we indeed are. + * + * Similarly, `endbr64` (assuming 64-bit mode) is also a common pattern. + * If we get this wrong, captured stack trace might have one extra bogus + * entry, but the rest of stack trace will still be meaningful. + */ +static bool is_uprobe_at_func_entry(struct pt_regs *regs) +{ + struct arch_uprobe *auprobe; + + if (!current->utask) + return false; + + auprobe = current->utask->auprobe; + if (!auprobe) + return false; + + /* push %rbp/%ebp */ + if (auprobe->insn[0] == 0x55) + return true; + + /* endbr64 (64-bit only) */ + if (user_64bit_mode(regs) && is_endbr(*(u32 *)auprobe->insn)) + return true; + + return false; +} + +#else +static bool is_uprobe_at_func_entry(struct pt_regs *regs) +{ + return false; +} +#endif /* CONFIG_UPROBES */ + #ifdef CONFIG_IA32_EMULATION #include @@ -2823,6 +2867,7 @@ unsigned long ss_base, cs_base; struct stack_frame_ia32 frame; const struct stack_frame_ia32 __user *fp; + u32 ret_addr; if (user_64bit_mode(regs)) return 0; @@ -2832,6 +2877,12 @@ fp = compat_ptr(ss_base + regs->bp); pagefault_disable(); + + /* see perf_callchain_user() below for why we do this */ + if (is_uprobe_at_func_entry(regs) && + !get_user(ret_addr, (const u32 __user *)regs->sp)) + perf_callchain_store(entry, ret_addr); + while (entry->nr < entry->max_stack) { if (!valid_user_frame(fp, sizeof(frame))) break; @@ -2860,6 +2911,7 @@ { struct stack_frame frame; const struct stack_frame __user *fp; + unsigned long ret_addr; if (perf_guest_state()) { /* TODO: We don't support guest os callchain now */ @@ -2883,6 +2935,19 @@ return; pagefault_disable(); + + /* + * If we are called from uprobe handler, and we are indeed at the very + * entry to user function (which is normally a `push %rbp` instruction, + * under assumption of application being compiled with frame pointers), + * we should read return address from *regs->sp before proceeding + * to follow frame pointers, otherwise we'll skip immediate caller + * as %rbp is not yet setup. + */ + if (is_uprobe_at_func_entry(regs) && + !get_user(ret_addr, (const unsigned long __user *)regs->sp)) + perf_callchain_store(entry, ret_addr); + while (entry->nr < entry->max_stack) { if (!valid_user_frame(fp, sizeof(frame))) break; @@ -2982,8 +3047,8 @@ * base PMU holds the correct number of counters for P-cores. */ cap->version = x86_pmu.version; - cap->num_counters_gp = x86_pmu.num_counters; - cap->num_counters_fixed = x86_pmu.num_counters_fixed; + cap->num_counters_gp = x86_pmu_num_counters(NULL); + cap->num_counters_fixed = x86_pmu_num_counters_fixed(NULL); cap->bit_width_gp = x86_pmu.cntval_bits; cap->bit_width_fixed = x86_pmu.cntval_bits; cap->events_mask = (unsigned int)x86_pmu.events_maskl; --- linux-xilinx-6.8.0.orig/arch/x86/events/intel/core.c +++ linux-xilinx-6.8.0/arch/x86/events/intel/core.c @@ -2873,23 +2873,23 @@ { struct debug_store *ds = __this_cpu_read(cpu_hw_events.ds); struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); - int num_counters_fixed = hybrid(cpuc->pmu, num_counters_fixed); - int num_counters = hybrid(cpuc->pmu, num_counters); + unsigned long *cntr_mask = hybrid(cpuc->pmu, cntr_mask); + unsigned long *fixed_cntr_mask = hybrid(cpuc->pmu, fixed_cntr_mask); unsigned long flags; int idx; - if (!num_counters) + if (!*(u64 *)cntr_mask) return; local_irq_save(flags); pr_info("clearing PMU state on CPU#%d\n", smp_processor_id()); - for (idx = 0; idx < num_counters; idx++) { + for_each_set_bit(idx, cntr_mask, INTEL_PMC_MAX_GENERIC) { wrmsrl_safe(x86_pmu_config_addr(idx), 0ull); wrmsrl_safe(x86_pmu_event_addr(idx), 0ull); } - for (idx = 0; idx < num_counters_fixed; idx++) { + for_each_set_bit(idx, fixed_cntr_mask, INTEL_PMC_MAX_FIXED) { if (fixed_counter_disabled(idx, cpuc->pmu)) continue; wrmsrl_safe(MSR_ARCH_PERFMON_FIXED_CTR0 + idx, 0ull); @@ -2939,8 +2939,7 @@ !guest_pebs_idxs) return; - for_each_set_bit(bit, (unsigned long *)&guest_pebs_idxs, - INTEL_PMC_IDX_FIXED + x86_pmu.num_counters_fixed) { + for_each_set_bit(bit, (unsigned long *)&guest_pebs_idxs, X86_PMC_IDX_MAX) { event = cpuc->events[bit]; if (!event->attr.precise_ip) continue; @@ -3912,8 +3911,12 @@ x86_pmu.pebs_aliases(event); } - if (needs_branch_stack(event) && is_sampling_event(event)) - event->hw.flags |= PERF_X86_EVENT_NEEDS_BRANCH_STACK; + if (needs_branch_stack(event)) { + /* Avoid branch stack setup for counting events in SAMPLE READ */ + if (is_sampling_event(event) || + !(event->attr.sample_type & PERF_SAMPLE_READ)) + event->hw.flags |= PERF_X86_EVENT_NEEDS_BRANCH_STACK; + } if (branch_sample_counters(event)) { struct perf_event *leader, *sibling; @@ -4198,7 +4201,7 @@ struct perf_guest_switch_msr *arr = cpuc->guest_switch_msrs; int idx; - for (idx = 0; idx < x86_pmu.num_counters; idx++) { + for_each_set_bit(idx, x86_pmu.cntr_mask, X86_PMC_IDX_MAX) { struct perf_event *event = cpuc->events[idx]; arr[idx].msr = x86_pmu_config_addr(idx); @@ -4216,7 +4219,7 @@ arr[idx].guest &= ~ARCH_PERFMON_EVENTSEL_ENABLE; } - *nr = x86_pmu.num_counters; + *nr = x86_pmu_max_num_counters(cpuc->pmu); return arr; } @@ -4231,7 +4234,7 @@ struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); int idx; - for (idx = 0; idx < x86_pmu.num_counters; idx++) { + for_each_set_bit(idx, x86_pmu.cntr_mask, X86_PMC_IDX_MAX) { struct hw_perf_event *hwc = &cpuc->events[idx]->hw; if (!test_bit(idx, cpuc->active_mask) || @@ -4529,6 +4532,25 @@ return HYBRID_INTEL_CORE; } +static inline bool erratum_hsw11(struct perf_event *event) +{ + return (event->hw.config & INTEL_ARCH_EVENT_MASK) == + X86_CONFIG(.event=0xc0, .umask=0x01); +} + +/* + * The HSW11 requires a period larger than 100 which is the same as the BDM11. + * A minimum period of 128 is enforced as well for the INST_RETIRED.ALL. + * + * The message 'interrupt took too long' can be observed on any counter which + * was armed with a period < 32 and two events expired in the same NMI. + * A minimum period of 32 is enforced for the rest of the events. + */ +static void hsw_limit_period(struct perf_event *event, s64 *left) +{ + *left = max(*left, erratum_hsw11(event) ? 128 : 32); +} + /* * Broadwell: * @@ -4546,8 +4568,7 @@ */ static void bdw_limit_period(struct perf_event *event, s64 *left) { - if ((event->hw.config & INTEL_ARCH_EVENT_MASK) == - X86_CONFIG(.event=0xc0, .umask=0x01)) { + if (erratum_hsw11(event)) { if (*left < 128) *left = 128; *left &= ~0x3fULL; @@ -4683,13 +4704,33 @@ } } -static void intel_pmu_check_num_counters(int *num_counters, - int *num_counters_fixed, - u64 *intel_ctrl, u64 fixed_mask); +static void intel_pmu_check_counters_mask(u64 *cntr_mask, + u64 *fixed_cntr_mask, + u64 *intel_ctrl) +{ + unsigned int bit; + + bit = fls64(*cntr_mask); + if (bit > INTEL_PMC_MAX_GENERIC) { + WARN(1, KERN_ERR "hw perf events %d > max(%d), clipping!", + bit, INTEL_PMC_MAX_GENERIC); + *cntr_mask &= GENMASK_ULL(INTEL_PMC_MAX_GENERIC - 1, 0); + } + *intel_ctrl = *cntr_mask; + + bit = fls64(*fixed_cntr_mask); + if (bit > INTEL_PMC_MAX_FIXED) { + WARN(1, KERN_ERR "hw perf events fixed %d > max(%d), clipping!", + bit, INTEL_PMC_MAX_FIXED); + *fixed_cntr_mask &= GENMASK_ULL(INTEL_PMC_MAX_FIXED - 1, 0); + } + + *intel_ctrl |= *fixed_cntr_mask << INTEL_PMC_IDX_FIXED; +} static void intel_pmu_check_event_constraints(struct event_constraint *event_constraints, - int num_counters, - int num_counters_fixed, + u64 cntr_mask, + u64 fixed_cntr_mask, u64 intel_ctrl); static void intel_pmu_check_extra_regs(struct extra_reg *extra_regs); @@ -4697,8 +4738,8 @@ static inline bool intel_pmu_broken_perf_cap(void) { /* The Perf Metric (Bit 15) is always cleared */ - if ((boot_cpu_data.x86_model == INTEL_FAM6_METEORLAKE) || - (boot_cpu_data.x86_model == INTEL_FAM6_METEORLAKE_L)) + if (boot_cpu_data.x86_vfm == INTEL_METEORLAKE || + boot_cpu_data.x86_vfm == INTEL_METEORLAKE_L) return true; return false; @@ -4706,17 +4747,19 @@ static void update_pmu_cap(struct x86_hybrid_pmu *pmu) { - unsigned int sub_bitmaps = cpuid_eax(ARCH_PERFMON_EXT_LEAF); - unsigned int eax, ebx, ecx, edx; + unsigned int cntr, fixed_cntr, ecx, edx; + union cpuid35_eax eax; + union cpuid35_ebx ebx; + + cpuid(ARCH_PERFMON_EXT_LEAF, &eax.full, &ebx.full, &ecx, &edx); - if (sub_bitmaps & ARCH_PERFMON_NUM_COUNTER_LEAF_BIT) { + if (eax.split.cntr_subleaf) { cpuid_count(ARCH_PERFMON_EXT_LEAF, ARCH_PERFMON_NUM_COUNTER_LEAF, - &eax, &ebx, &ecx, &edx); - pmu->num_counters = fls(eax); - pmu->num_counters_fixed = fls(ebx); + &cntr, &fixed_cntr, &ecx, &edx); + pmu->cntr_mask64 = cntr; + pmu->fixed_cntr_mask64 = fixed_cntr; } - if (!intel_pmu_broken_perf_cap()) { /* Perf Metric (Bit 15) and PEBS via PT (Bit 16) are hybrid enumeration */ rdmsrl(MSR_IA32_PERF_CAPABILITIES, pmu->intel_cap.capabilities); @@ -4725,26 +4768,21 @@ static void intel_pmu_check_hybrid_pmus(struct x86_hybrid_pmu *pmu) { - intel_pmu_check_num_counters(&pmu->num_counters, &pmu->num_counters_fixed, - &pmu->intel_ctrl, (1ULL << pmu->num_counters_fixed) - 1); - pmu->max_pebs_events = min_t(unsigned, MAX_PEBS_EVENTS, pmu->num_counters); + intel_pmu_check_counters_mask(&pmu->cntr_mask64, &pmu->fixed_cntr_mask64, + &pmu->intel_ctrl); + pmu->pebs_events_mask = intel_pmu_pebs_mask(pmu->cntr_mask64); pmu->unconstrained = (struct event_constraint) - __EVENT_CONSTRAINT(0, (1ULL << pmu->num_counters) - 1, - 0, pmu->num_counters, 0, 0); + __EVENT_CONSTRAINT(0, pmu->cntr_mask64, + 0, x86_pmu_num_counters(&pmu->pmu), 0, 0); if (pmu->intel_cap.perf_metrics) pmu->intel_ctrl |= 1ULL << GLOBAL_CTRL_EN_PERF_METRICS; else pmu->intel_ctrl &= ~(1ULL << GLOBAL_CTRL_EN_PERF_METRICS); - if (pmu->intel_cap.pebs_output_pt_available) - pmu->pmu.capabilities |= PERF_PMU_CAP_AUX_OUTPUT; - else - pmu->pmu.capabilities &= ~PERF_PMU_CAP_AUX_OUTPUT; - intel_pmu_check_event_constraints(pmu->event_constraints, - pmu->num_counters, - pmu->num_counters_fixed, + pmu->cntr_mask64, + pmu->fixed_cntr_mask64, pmu->intel_ctrl); intel_pmu_check_extra_regs(pmu->extra_regs); @@ -4805,18 +4843,14 @@ intel_pmu_check_hybrid_pmus(pmu); - if (!check_hw_exists(&pmu->pmu, pmu->num_counters, pmu->num_counters_fixed)) + if (!check_hw_exists(&pmu->pmu, pmu->cntr_mask, pmu->fixed_cntr_mask)) return false; pr_info("%s PMU driver: ", pmu->name); - if (pmu->intel_cap.pebs_output_pt_available) - pr_cont("PEBS-via-PT "); - pr_cont("\n"); - x86_pmu_show_pmu_cap(pmu->num_counters, pmu->num_counters_fixed, - pmu->intel_ctrl); + x86_pmu_show_pmu_cap(&pmu->pmu); end: cpumask_set_cpu(cpu, &pmu->supported_cpus); @@ -4836,8 +4870,11 @@ init_debug_store_on_cpu(cpu); /* - * Deal with CPUs that don't clear their LBRs on power-up. + * Deal with CPUs that don't clear their LBRs on power-up, and that may + * even boot with LBRs enabled. */ + if (!static_cpu_has(X86_FEATURE_ARCH_LBR) && x86_pmu.lbr_nr) + msr_clear_bit(MSR_IA32_DEBUGCTLMSR, DEBUGCTLMSR_LBR_BIT); intel_pmu_lbr_reset(); cpuc->lbr_sel = NULL; @@ -5704,8 +5741,22 @@ return x86_pmu.version >= 2 ? attr->mode : 0; } +static umode_t +td_is_visible(struct kobject *kobj, struct attribute *attr, int i) +{ + /* + * Hide the perf metrics topdown events + * if the feature is not enumerated. + */ + if (x86_pmu.num_topdown_events) + return x86_pmu.intel_cap.perf_metrics ? attr->mode : 0; + + return attr->mode; +} + static struct attribute_group group_events_td = { .name = "events", + .is_visible = td_is_visible, }; static struct attribute_group group_events_mem = { @@ -5907,9 +5958,27 @@ return (cpu >= 0) && (pmu->pmu_type & pmu_attr->pmu_type) ? attr->mode : 0; } +static umode_t hybrid_td_is_visible(struct kobject *kobj, + struct attribute *attr, int i) +{ + struct device *dev = kobj_to_dev(kobj); + struct x86_hybrid_pmu *pmu = + container_of(dev_get_drvdata(dev), struct x86_hybrid_pmu, pmu); + + if (!is_attr_for_this_pmu(kobj, attr)) + return 0; + + + /* Only the big core supports perf metrics */ + if (pmu->pmu_type == hybrid_big) + return pmu->intel_cap.perf_metrics ? attr->mode : 0; + + return attr->mode; +} + static struct attribute_group hybrid_group_events_td = { .name = "events", - .is_visible = hybrid_events_is_visible, + .is_visible = hybrid_td_is_visible, }; static struct attribute_group hybrid_group_events_mem = { @@ -5961,29 +6030,9 @@ static struct attribute *empty_attrs; -static void intel_pmu_check_num_counters(int *num_counters, - int *num_counters_fixed, - u64 *intel_ctrl, u64 fixed_mask) -{ - if (*num_counters > INTEL_PMC_MAX_GENERIC) { - WARN(1, KERN_ERR "hw perf events %d > max(%d), clipping!", - *num_counters, INTEL_PMC_MAX_GENERIC); - *num_counters = INTEL_PMC_MAX_GENERIC; - } - *intel_ctrl = (1ULL << *num_counters) - 1; - - if (*num_counters_fixed > INTEL_PMC_MAX_FIXED) { - WARN(1, KERN_ERR "hw perf events fixed %d > max(%d), clipping!", - *num_counters_fixed, INTEL_PMC_MAX_FIXED); - *num_counters_fixed = INTEL_PMC_MAX_FIXED; - } - - *intel_ctrl |= fixed_mask << INTEL_PMC_IDX_FIXED; -} - static void intel_pmu_check_event_constraints(struct event_constraint *event_constraints, - int num_counters, - int num_counters_fixed, + u64 cntr_mask, + u64 fixed_cntr_mask, u64 intel_ctrl) { struct event_constraint *c; @@ -6020,10 +6069,9 @@ * generic counters */ if (!use_fixed_pseudo_encoding(c->code)) - c->idxmsk64 |= (1ULL << num_counters) - 1; + c->idxmsk64 |= cntr_mask; } - c->idxmsk64 &= - ~(~0ULL << (INTEL_PMC_IDX_FIXED + num_counters_fixed)); + c->idxmsk64 &= cntr_mask | (fixed_cntr_mask << INTEL_PMC_IDX_FIXED); c->weight = hweight64(c->idxmsk64); } } @@ -6074,21 +6122,19 @@ pmu->pmu_type = intel_hybrid_pmu_type_map[bit].id; pmu->name = intel_hybrid_pmu_type_map[bit].name; - pmu->num_counters = x86_pmu.num_counters; - pmu->num_counters_fixed = x86_pmu.num_counters_fixed; - pmu->max_pebs_events = min_t(unsigned, MAX_PEBS_EVENTS, pmu->num_counters); + pmu->cntr_mask64 = x86_pmu.cntr_mask64; + pmu->fixed_cntr_mask64 = x86_pmu.fixed_cntr_mask64; + pmu->pebs_events_mask = intel_pmu_pebs_mask(pmu->cntr_mask64); pmu->unconstrained = (struct event_constraint) - __EVENT_CONSTRAINT(0, (1ULL << pmu->num_counters) - 1, - 0, pmu->num_counters, 0, 0); + __EVENT_CONSTRAINT(0, pmu->cntr_mask64, + 0, x86_pmu_num_counters(&pmu->pmu), 0, 0); pmu->intel_cap.capabilities = x86_pmu.intel_cap.capabilities; if (pmu->pmu_type & hybrid_small) { pmu->intel_cap.perf_metrics = 0; - pmu->intel_cap.pebs_output_pt_available = 1; pmu->mid_ack = true; } else if (pmu->pmu_type & hybrid_big) { pmu->intel_cap.perf_metrics = 1; - pmu->intel_cap.pebs_output_pt_available = 0; pmu->late_ack = true; } } @@ -6192,14 +6238,14 @@ x86_pmu = intel_pmu; x86_pmu.version = version; - x86_pmu.num_counters = eax.split.num_counters; + x86_pmu.cntr_mask64 = GENMASK_ULL(eax.split.num_counters - 1, 0); x86_pmu.cntval_bits = eax.split.bit_width; x86_pmu.cntval_mask = (1ULL << eax.split.bit_width) - 1; x86_pmu.events_maskl = ebx.full; x86_pmu.events_mask_len = eax.split.mask_length; - x86_pmu.max_pebs_events = min_t(unsigned, MAX_PEBS_EVENTS, x86_pmu.num_counters); + x86_pmu.pebs_events_mask = intel_pmu_pebs_mask(x86_pmu.cntr_mask64); x86_pmu.pebs_capable = PEBS_COUNTER_MASK; /* @@ -6209,12 +6255,10 @@ if (version > 1 && version < 5) { int assume = 3 * !boot_cpu_has(X86_FEATURE_HYPERVISOR); - x86_pmu.num_counters_fixed = - max((int)edx.split.num_counters_fixed, assume); - - fixed_mask = (1L << x86_pmu.num_counters_fixed) - 1; + x86_pmu.fixed_cntr_mask64 = + GENMASK_ULL(max((int)edx.split.num_counters_fixed, assume) - 1, 0); } else if (version >= 5) - x86_pmu.num_counters_fixed = fls(fixed_mask); + x86_pmu.fixed_cntr_mask64 = fixed_mask; if (boot_cpu_has(X86_FEATURE_PDCM)) { u64 capabilities; @@ -6244,19 +6288,19 @@ /* * Install the hw-cache-events table: */ - switch (boot_cpu_data.x86_model) { - case INTEL_FAM6_CORE_YONAH: + switch (boot_cpu_data.x86_vfm) { + case INTEL_CORE_YONAH: pr_cont("Core events, "); name = "core"; break; - case INTEL_FAM6_CORE2_MEROM: + case INTEL_CORE2_MEROM: x86_add_quirk(intel_clovertown_quirk); fallthrough; - case INTEL_FAM6_CORE2_MEROM_L: - case INTEL_FAM6_CORE2_PENRYN: - case INTEL_FAM6_CORE2_DUNNINGTON: + case INTEL_CORE2_MEROM_L: + case INTEL_CORE2_PENRYN: + case INTEL_CORE2_DUNNINGTON: memcpy(hw_cache_event_ids, core2_hw_cache_event_ids, sizeof(hw_cache_event_ids)); @@ -6268,9 +6312,9 @@ name = "core2"; break; - case INTEL_FAM6_NEHALEM: - case INTEL_FAM6_NEHALEM_EP: - case INTEL_FAM6_NEHALEM_EX: + case INTEL_NEHALEM: + case INTEL_NEHALEM_EP: + case INTEL_NEHALEM_EX: memcpy(hw_cache_event_ids, nehalem_hw_cache_event_ids, sizeof(hw_cache_event_ids)); memcpy(hw_cache_extra_regs, nehalem_hw_cache_extra_regs, @@ -6302,11 +6346,11 @@ name = "nehalem"; break; - case INTEL_FAM6_ATOM_BONNELL: - case INTEL_FAM6_ATOM_BONNELL_MID: - case INTEL_FAM6_ATOM_SALTWELL: - case INTEL_FAM6_ATOM_SALTWELL_MID: - case INTEL_FAM6_ATOM_SALTWELL_TABLET: + case INTEL_ATOM_BONNELL: + case INTEL_ATOM_BONNELL_MID: + case INTEL_ATOM_SALTWELL: + case INTEL_ATOM_SALTWELL_MID: + case INTEL_ATOM_SALTWELL_TABLET: memcpy(hw_cache_event_ids, atom_hw_cache_event_ids, sizeof(hw_cache_event_ids)); @@ -6319,11 +6363,11 @@ name = "bonnell"; break; - case INTEL_FAM6_ATOM_SILVERMONT: - case INTEL_FAM6_ATOM_SILVERMONT_D: - case INTEL_FAM6_ATOM_SILVERMONT_MID: - case INTEL_FAM6_ATOM_AIRMONT: - case INTEL_FAM6_ATOM_AIRMONT_MID: + case INTEL_ATOM_SILVERMONT: + case INTEL_ATOM_SILVERMONT_D: + case INTEL_ATOM_SILVERMONT_MID: + case INTEL_ATOM_AIRMONT: + case INTEL_ATOM_AIRMONT_MID: memcpy(hw_cache_event_ids, slm_hw_cache_event_ids, sizeof(hw_cache_event_ids)); memcpy(hw_cache_extra_regs, slm_hw_cache_extra_regs, @@ -6341,8 +6385,8 @@ name = "silvermont"; break; - case INTEL_FAM6_ATOM_GOLDMONT: - case INTEL_FAM6_ATOM_GOLDMONT_D: + case INTEL_ATOM_GOLDMONT: + case INTEL_ATOM_GOLDMONT_D: memcpy(hw_cache_event_ids, glm_hw_cache_event_ids, sizeof(hw_cache_event_ids)); memcpy(hw_cache_extra_regs, glm_hw_cache_extra_regs, @@ -6368,7 +6412,7 @@ name = "goldmont"; break; - case INTEL_FAM6_ATOM_GOLDMONT_PLUS: + case INTEL_ATOM_GOLDMONT_PLUS: memcpy(hw_cache_event_ids, glp_hw_cache_event_ids, sizeof(hw_cache_event_ids)); memcpy(hw_cache_extra_regs, glp_hw_cache_extra_regs, @@ -6397,9 +6441,9 @@ name = "goldmont_plus"; break; - case INTEL_FAM6_ATOM_TREMONT_D: - case INTEL_FAM6_ATOM_TREMONT: - case INTEL_FAM6_ATOM_TREMONT_L: + case INTEL_ATOM_TREMONT_D: + case INTEL_ATOM_TREMONT: + case INTEL_ATOM_TREMONT_L: x86_pmu.late_ack = true; memcpy(hw_cache_event_ids, glp_hw_cache_event_ids, sizeof(hw_cache_event_ids)); @@ -6426,7 +6470,7 @@ name = "Tremont"; break; - case INTEL_FAM6_ATOM_GRACEMONT: + case INTEL_ATOM_GRACEMONT: intel_pmu_init_grt(NULL); intel_pmu_pebs_data_source_grt(); x86_pmu.pebs_latency_data = adl_latency_data_small; @@ -6438,8 +6482,8 @@ name = "gracemont"; break; - case INTEL_FAM6_ATOM_CRESTMONT: - case INTEL_FAM6_ATOM_CRESTMONT_X: + case INTEL_ATOM_CRESTMONT: + case INTEL_ATOM_CRESTMONT_X: intel_pmu_init_grt(NULL); x86_pmu.extra_regs = intel_cmt_extra_regs; intel_pmu_pebs_data_source_cmt(); @@ -6452,9 +6496,9 @@ name = "crestmont"; break; - case INTEL_FAM6_WESTMERE: - case INTEL_FAM6_WESTMERE_EP: - case INTEL_FAM6_WESTMERE_EX: + case INTEL_WESTMERE: + case INTEL_WESTMERE_EP: + case INTEL_WESTMERE_EX: memcpy(hw_cache_event_ids, westmere_hw_cache_event_ids, sizeof(hw_cache_event_ids)); memcpy(hw_cache_extra_regs, nehalem_hw_cache_extra_regs, @@ -6483,8 +6527,8 @@ name = "westmere"; break; - case INTEL_FAM6_SANDYBRIDGE: - case INTEL_FAM6_SANDYBRIDGE_X: + case INTEL_SANDYBRIDGE: + case INTEL_SANDYBRIDGE_X: x86_add_quirk(intel_sandybridge_quirk); x86_add_quirk(intel_ht_bug); memcpy(hw_cache_event_ids, snb_hw_cache_event_ids, @@ -6497,7 +6541,7 @@ x86_pmu.event_constraints = intel_snb_event_constraints; x86_pmu.pebs_constraints = intel_snb_pebs_event_constraints; x86_pmu.pebs_aliases = intel_pebs_aliases_snb; - if (boot_cpu_data.x86_model == INTEL_FAM6_SANDYBRIDGE_X) + if (boot_cpu_data.x86_vfm == INTEL_SANDYBRIDGE_X) x86_pmu.extra_regs = intel_snbep_extra_regs; else x86_pmu.extra_regs = intel_snb_extra_regs; @@ -6523,8 +6567,8 @@ name = "sandybridge"; break; - case INTEL_FAM6_IVYBRIDGE: - case INTEL_FAM6_IVYBRIDGE_X: + case INTEL_IVYBRIDGE: + case INTEL_IVYBRIDGE_X: x86_add_quirk(intel_ht_bug); memcpy(hw_cache_event_ids, snb_hw_cache_event_ids, sizeof(hw_cache_event_ids)); @@ -6540,7 +6584,7 @@ x86_pmu.pebs_constraints = intel_ivb_pebs_event_constraints; x86_pmu.pebs_aliases = intel_pebs_aliases_ivb; x86_pmu.pebs_prec_dist = true; - if (boot_cpu_data.x86_model == INTEL_FAM6_IVYBRIDGE_X) + if (boot_cpu_data.x86_vfm == INTEL_IVYBRIDGE_X) x86_pmu.extra_regs = intel_snbep_extra_regs; else x86_pmu.extra_regs = intel_snb_extra_regs; @@ -6562,10 +6606,10 @@ break; - case INTEL_FAM6_HASWELL: - case INTEL_FAM6_HASWELL_X: - case INTEL_FAM6_HASWELL_L: - case INTEL_FAM6_HASWELL_G: + case INTEL_HASWELL: + case INTEL_HASWELL_X: + case INTEL_HASWELL_L: + case INTEL_HASWELL_G: x86_add_quirk(intel_ht_bug); x86_add_quirk(intel_pebs_isolation_quirk); x86_pmu.late_ack = true; @@ -6585,6 +6629,7 @@ x86_pmu.hw_config = hsw_hw_config; x86_pmu.get_event_constraints = hsw_get_event_constraints; + x86_pmu.limit_period = hsw_limit_period; x86_pmu.lbr_double_abort = true; extra_attr = boot_cpu_has(X86_FEATURE_RTM) ? hsw_format_attr : nhm_format_attr; @@ -6595,10 +6640,10 @@ name = "haswell"; break; - case INTEL_FAM6_BROADWELL: - case INTEL_FAM6_BROADWELL_D: - case INTEL_FAM6_BROADWELL_G: - case INTEL_FAM6_BROADWELL_X: + case INTEL_BROADWELL: + case INTEL_BROADWELL_D: + case INTEL_BROADWELL_G: + case INTEL_BROADWELL_X: x86_add_quirk(intel_pebs_isolation_quirk); x86_pmu.late_ack = true; memcpy(hw_cache_event_ids, hsw_hw_cache_event_ids, sizeof(hw_cache_event_ids)); @@ -6637,8 +6682,8 @@ name = "broadwell"; break; - case INTEL_FAM6_XEON_PHI_KNL: - case INTEL_FAM6_XEON_PHI_KNM: + case INTEL_XEON_PHI_KNL: + case INTEL_XEON_PHI_KNM: memcpy(hw_cache_event_ids, slm_hw_cache_event_ids, sizeof(hw_cache_event_ids)); memcpy(hw_cache_extra_regs, @@ -6657,15 +6702,15 @@ name = "knights-landing"; break; - case INTEL_FAM6_SKYLAKE_X: + case INTEL_SKYLAKE_X: pmem = true; fallthrough; - case INTEL_FAM6_SKYLAKE_L: - case INTEL_FAM6_SKYLAKE: - case INTEL_FAM6_KABYLAKE_L: - case INTEL_FAM6_KABYLAKE: - case INTEL_FAM6_COMETLAKE_L: - case INTEL_FAM6_COMETLAKE: + case INTEL_SKYLAKE_L: + case INTEL_SKYLAKE: + case INTEL_KABYLAKE_L: + case INTEL_KABYLAKE: + case INTEL_COMETLAKE_L: + case INTEL_COMETLAKE: x86_add_quirk(intel_pebs_isolation_quirk); x86_pmu.late_ack = true; memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event_ids)); @@ -6714,16 +6759,16 @@ name = "skylake"; break; - case INTEL_FAM6_ICELAKE_X: - case INTEL_FAM6_ICELAKE_D: + case INTEL_ICELAKE_X: + case INTEL_ICELAKE_D: x86_pmu.pebs_ept = 1; pmem = true; fallthrough; - case INTEL_FAM6_ICELAKE_L: - case INTEL_FAM6_ICELAKE: - case INTEL_FAM6_TIGERLAKE_L: - case INTEL_FAM6_TIGERLAKE: - case INTEL_FAM6_ROCKETLAKE: + case INTEL_ICELAKE_L: + case INTEL_ICELAKE: + case INTEL_TIGERLAKE_L: + case INTEL_TIGERLAKE: + case INTEL_ROCKETLAKE: x86_pmu.late_ack = true; memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event_ids)); memcpy(hw_cache_extra_regs, skl_hw_cache_extra_regs, sizeof(hw_cache_extra_regs)); @@ -6758,16 +6803,22 @@ name = "icelake"; break; - case INTEL_FAM6_SAPPHIRERAPIDS_X: - case INTEL_FAM6_EMERALDRAPIDS_X: + case INTEL_SAPPHIRERAPIDS_X: + case INTEL_EMERALDRAPIDS_X: x86_pmu.flags |= PMU_FL_MEM_LOADS_AUX; x86_pmu.extra_regs = intel_glc_extra_regs; - fallthrough; - case INTEL_FAM6_GRANITERAPIDS_X: - case INTEL_FAM6_GRANITERAPIDS_D: + pr_cont("Sapphire Rapids events, "); + name = "sapphire_rapids"; + goto glc_common; + + case INTEL_GRANITERAPIDS_X: + case INTEL_GRANITERAPIDS_D: + x86_pmu.extra_regs = intel_rwc_extra_regs; + pr_cont("Granite Rapids events, "); + name = "granite_rapids"; + + glc_common: intel_pmu_init_glc(NULL); - if (!x86_pmu.extra_regs) - x86_pmu.extra_regs = intel_rwc_extra_regs; x86_pmu.pebs_ept = 1; x86_pmu.hw_config = hsw_hw_config; x86_pmu.get_event_constraints = glc_get_event_constraints; @@ -6778,15 +6829,13 @@ td_attr = glc_td_events_attrs; tsx_attr = glc_tsx_events_attrs; intel_pmu_pebs_data_source_skl(true); - pr_cont("Sapphire Rapids events, "); - name = "sapphire_rapids"; break; - case INTEL_FAM6_ALDERLAKE: - case INTEL_FAM6_ALDERLAKE_L: - case INTEL_FAM6_RAPTORLAKE: - case INTEL_FAM6_RAPTORLAKE_P: - case INTEL_FAM6_RAPTORLAKE_S: + case INTEL_ALDERLAKE: + case INTEL_ALDERLAKE_L: + case INTEL_RAPTORLAKE: + case INTEL_RAPTORLAKE_P: + case INTEL_RAPTORLAKE_S: /* * Alder Lake has 2 types of CPU, core and atom. * @@ -6809,11 +6858,13 @@ pmu = &x86_pmu.hybrid_pmu[X86_HYBRID_PMU_CORE_IDX]; intel_pmu_init_glc(&pmu->pmu); if (cpu_feature_enabled(X86_FEATURE_HYBRID_CPU)) { - pmu->num_counters = x86_pmu.num_counters + 2; - pmu->num_counters_fixed = x86_pmu.num_counters_fixed + 1; + pmu->cntr_mask64 <<= 2; + pmu->cntr_mask64 |= 0x3; + pmu->fixed_cntr_mask64 <<= 1; + pmu->fixed_cntr_mask64 |= 0x1; } else { - pmu->num_counters = x86_pmu.num_counters; - pmu->num_counters_fixed = x86_pmu.num_counters_fixed; + pmu->cntr_mask64 = x86_pmu.cntr_mask64; + pmu->fixed_cntr_mask64 = x86_pmu.fixed_cntr_mask64; } /* @@ -6823,15 +6874,16 @@ * mistakenly add extra counters for P-cores. Correct the number of * counters here. */ - if ((pmu->num_counters > 8) || (pmu->num_counters_fixed > 4)) { - pmu->num_counters = x86_pmu.num_counters; - pmu->num_counters_fixed = x86_pmu.num_counters_fixed; + if ((x86_pmu_num_counters(&pmu->pmu) > 8) || (x86_pmu_num_counters_fixed(&pmu->pmu) > 4)) { + pmu->cntr_mask64 = x86_pmu.cntr_mask64; + pmu->fixed_cntr_mask64 = x86_pmu.fixed_cntr_mask64; } - pmu->max_pebs_events = min_t(unsigned, MAX_PEBS_EVENTS, pmu->num_counters); + pmu->pebs_events_mask = intel_pmu_pebs_mask(pmu->cntr_mask64); pmu->unconstrained = (struct event_constraint) - __EVENT_CONSTRAINT(0, (1ULL << pmu->num_counters) - 1, - 0, pmu->num_counters, 0, 0); + __EVENT_CONSTRAINT(0, pmu->cntr_mask64, + 0, x86_pmu_num_counters(&pmu->pmu), 0, 0); + pmu->extra_regs = intel_glc_extra_regs; /* Initialize Atom core specific PerfMon capabilities.*/ @@ -6844,8 +6896,9 @@ name = "alderlake_hybrid"; break; - case INTEL_FAM6_METEORLAKE: - case INTEL_FAM6_METEORLAKE_L: + case INTEL_METEORLAKE: + case INTEL_METEORLAKE_L: + case INTEL_ARROWLAKE_U: intel_pmu_init_hybrid(hybrid_big_small); x86_pmu.pebs_latency_data = mtl_latency_data_small; @@ -6898,9 +6951,9 @@ * The constraints may be cut according to the CPUID enumeration * by inserting the EVENT_CONSTRAINT_END. */ - if (x86_pmu.num_counters_fixed > INTEL_PMC_MAX_FIXED) - x86_pmu.num_counters_fixed = INTEL_PMC_MAX_FIXED; - intel_v5_gen_event_constraints[x86_pmu.num_counters_fixed].weight = -1; + if (fls64(x86_pmu.fixed_cntr_mask64) > INTEL_PMC_MAX_FIXED) + x86_pmu.fixed_cntr_mask64 &= GENMASK_ULL(INTEL_PMC_MAX_FIXED - 1, 0); + intel_v5_gen_event_constraints[fls64(x86_pmu.fixed_cntr_mask64)].weight = -1; x86_pmu.event_constraints = intel_v5_gen_event_constraints; pr_cont("generic architected perfmon, "); name = "generic_arch_v5+"; @@ -6927,18 +6980,17 @@ x86_pmu.attr_update = hybrid_attr_update; } - intel_pmu_check_num_counters(&x86_pmu.num_counters, - &x86_pmu.num_counters_fixed, - &x86_pmu.intel_ctrl, - (u64)fixed_mask); + intel_pmu_check_counters_mask(&x86_pmu.cntr_mask64, + &x86_pmu.fixed_cntr_mask64, + &x86_pmu.intel_ctrl); /* AnyThread may be deprecated on arch perfmon v5 or later */ if (x86_pmu.intel_cap.anythread_deprecated) x86_pmu.format_attrs = intel_arch_formats_attr; intel_pmu_check_event_constraints(x86_pmu.event_constraints, - x86_pmu.num_counters, - x86_pmu.num_counters_fixed, + x86_pmu.cntr_mask64, + x86_pmu.fixed_cntr_mask64, x86_pmu.intel_ctrl); /* * Access LBR MSR may cause #GP under certain circumstances. --- linux-xilinx-6.8.0.orig/arch/x86/events/intel/cstate.c +++ linux-xilinx-6.8.0/arch/x86/events/intel/cstate.c @@ -41,7 +41,7 @@ * MSR_CORE_C1_RES: CORE C1 Residency Counter * perf code: 0x00 * Available model: SLM,AMT,GLM,CNL,ICX,TNT,ADL,RPL - * MTL,SRF,GRR + * MTL,SRF,GRR,ARL,LNL * Scope: Core (each processor core has a MSR) * MSR_CORE_C3_RESIDENCY: CORE C3 Residency Counter * perf code: 0x01 @@ -53,50 +53,50 @@ * Available model: SLM,AMT,NHM,WSM,SNB,IVB,HSW,BDW, * SKL,KNL,GLM,CNL,KBL,CML,ICL,ICX, * TGL,TNT,RKL,ADL,RPL,SPR,MTL,SRF, - * GRR + * GRR,ARL,LNL * Scope: Core * MSR_CORE_C7_RESIDENCY: CORE C7 Residency Counter * perf code: 0x03 * Available model: SNB,IVB,HSW,BDW,SKL,CNL,KBL,CML, - * ICL,TGL,RKL,ADL,RPL,MTL + * ICL,TGL,RKL,ADL,RPL,MTL,ARL,LNL * Scope: Core * MSR_PKG_C2_RESIDENCY: Package C2 Residency Counter. * perf code: 0x00 * Available model: SNB,IVB,HSW,BDW,SKL,KNL,GLM,CNL, * KBL,CML,ICL,ICX,TGL,TNT,RKL,ADL, - * RPL,SPR,MTL + * RPL,SPR,MTL,ARL,LNL,SRF * Scope: Package (physical package) * MSR_PKG_C3_RESIDENCY: Package C3 Residency Counter. * perf code: 0x01 * Available model: NHM,WSM,SNB,IVB,HSW,BDW,SKL,KNL, * GLM,CNL,KBL,CML,ICL,TGL,TNT,RKL, - * ADL,RPL,MTL + * ADL,RPL,MTL,ARL,LNL * Scope: Package (physical package) * MSR_PKG_C6_RESIDENCY: Package C6 Residency Counter. * perf code: 0x02 * Available model: SLM,AMT,NHM,WSM,SNB,IVB,HSW,BDW, * SKL,KNL,GLM,CNL,KBL,CML,ICL,ICX, - * TGL,TNT,RKL,ADL,RPL,SPR,MTL,SRF + * TGL,TNT,RKL,ADL,RPL,SPR,MTL,SRF, + * ARL,LNL * Scope: Package (physical package) * MSR_PKG_C7_RESIDENCY: Package C7 Residency Counter. * perf code: 0x03 * Available model: NHM,WSM,SNB,IVB,HSW,BDW,SKL,CNL, - * KBL,CML,ICL,TGL,RKL,ADL,RPL,MTL + * KBL,CML,ICL,TGL,RKL * Scope: Package (physical package) * MSR_PKG_C8_RESIDENCY: Package C8 Residency Counter. * perf code: 0x04 * Available model: HSW ULT,KBL,CNL,CML,ICL,TGL,RKL, - * ADL,RPL,MTL + * ADL,RPL,MTL,ARL * Scope: Package (physical package) * MSR_PKG_C9_RESIDENCY: Package C9 Residency Counter. * perf code: 0x05 - * Available model: HSW ULT,KBL,CNL,CML,ICL,TGL,RKL, - * ADL,RPL,MTL + * Available model: HSW ULT,KBL,CNL,CML,ICL,TGL,RKL * Scope: Package (physical package) * MSR_PKG_C10_RESIDENCY: Package C10 Residency Counter. * perf code: 0x06 * Available model: HSW ULT,KBL,GLM,CNL,CML,ICL,TGL, - * TNT,RKL,ADL,RPL,MTL + * TNT,RKL,ADL,RPL,MTL,ARL,LNL * Scope: Package (physical package) * MSR_MODULE_C6_RES_MS: Module C6 Residency Counter. * perf code: 0x00 @@ -592,9 +592,7 @@ .pkg_events = BIT(PERF_CSTATE_PKG_C2_RES) | BIT(PERF_CSTATE_PKG_C3_RES) | BIT(PERF_CSTATE_PKG_C6_RES) | - BIT(PERF_CSTATE_PKG_C7_RES) | BIT(PERF_CSTATE_PKG_C8_RES) | - BIT(PERF_CSTATE_PKG_C9_RES) | BIT(PERF_CSTATE_PKG_C10_RES), }; @@ -648,6 +646,17 @@ BIT(PERF_CSTATE_PKG_C10_RES), }; +static const struct cstate_model lnl_cstates __initconst = { + .core_events = BIT(PERF_CSTATE_CORE_C1_RES) | + BIT(PERF_CSTATE_CORE_C6_RES) | + BIT(PERF_CSTATE_CORE_C7_RES), + + .pkg_events = BIT(PERF_CSTATE_PKG_C2_RES) | + BIT(PERF_CSTATE_PKG_C3_RES) | + BIT(PERF_CSTATE_PKG_C6_RES) | + BIT(PERF_CSTATE_PKG_C10_RES), +}; + static const struct cstate_model slm_cstates __initconst = { .core_events = BIT(PERF_CSTATE_CORE_C1_RES) | BIT(PERF_CSTATE_CORE_C6_RES), @@ -689,85 +698,90 @@ .core_events = BIT(PERF_CSTATE_CORE_C1_RES) | BIT(PERF_CSTATE_CORE_C6_RES), - .pkg_events = BIT(PERF_CSTATE_PKG_C6_RES), + .pkg_events = BIT(PERF_CSTATE_PKG_C2_RES) | + BIT(PERF_CSTATE_PKG_C6_RES), .module_events = BIT(PERF_CSTATE_MODULE_C6_RES), }; static const struct x86_cpu_id intel_cstates_match[] __initconst = { - X86_MATCH_INTEL_FAM6_MODEL(NEHALEM, &nhm_cstates), - X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EP, &nhm_cstates), - X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EX, &nhm_cstates), - - X86_MATCH_INTEL_FAM6_MODEL(WESTMERE, &nhm_cstates), - X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EP, &nhm_cstates), - X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EX, &nhm_cstates), - - X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE, &snb_cstates), - X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X, &snb_cstates), - - X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE, &snb_cstates), - X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X, &snb_cstates), - - X86_MATCH_INTEL_FAM6_MODEL(HASWELL, &snb_cstates), - X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X, &snb_cstates), - X86_MATCH_INTEL_FAM6_MODEL(HASWELL_G, &snb_cstates), - - X86_MATCH_INTEL_FAM6_MODEL(HASWELL_L, &hswult_cstates), - - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, &slm_cstates), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_D, &slm_cstates), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT, &slm_cstates), - - X86_MATCH_INTEL_FAM6_MODEL(BROADWELL, &snb_cstates), - X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D, &snb_cstates), - X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G, &snb_cstates), - X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, &snb_cstates), - - X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, &snb_cstates), - X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, &snb_cstates), - X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, &snb_cstates), - - X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, &hswult_cstates), - X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, &hswult_cstates), - X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L, &hswult_cstates), - X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, &hswult_cstates), - - X86_MATCH_INTEL_FAM6_MODEL(CANNONLAKE_L, &cnl_cstates), - - X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &knl_cstates), - X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &knl_cstates), - - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, &glm_cstates), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_D, &glm_cstates), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &glm_cstates), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &glm_cstates), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT, &glm_cstates), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, &glm_cstates), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, &adl_cstates), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT_X, &srf_cstates), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT, &grr_cstates), - - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &icl_cstates), - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, &icl_cstates), - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, &icx_cstates), - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, &icx_cstates), - X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &icx_cstates), - X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, &icx_cstates), - X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_X, &icx_cstates), - X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_D, &icx_cstates), - - X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, &icl_cstates), - X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, &icl_cstates), - X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE, &icl_cstates), - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &adl_cstates), - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &adl_cstates), - X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, &adl_cstates), - X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, &adl_cstates), - X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, &adl_cstates), - X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE, &adl_cstates), - X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, &adl_cstates), + X86_MATCH_VFM(INTEL_NEHALEM, &nhm_cstates), + X86_MATCH_VFM(INTEL_NEHALEM_EP, &nhm_cstates), + X86_MATCH_VFM(INTEL_NEHALEM_EX, &nhm_cstates), + + X86_MATCH_VFM(INTEL_WESTMERE, &nhm_cstates), + X86_MATCH_VFM(INTEL_WESTMERE_EP, &nhm_cstates), + X86_MATCH_VFM(INTEL_WESTMERE_EX, &nhm_cstates), + + X86_MATCH_VFM(INTEL_SANDYBRIDGE, &snb_cstates), + X86_MATCH_VFM(INTEL_SANDYBRIDGE_X, &snb_cstates), + + X86_MATCH_VFM(INTEL_IVYBRIDGE, &snb_cstates), + X86_MATCH_VFM(INTEL_IVYBRIDGE_X, &snb_cstates), + + X86_MATCH_VFM(INTEL_HASWELL, &snb_cstates), + X86_MATCH_VFM(INTEL_HASWELL_X, &snb_cstates), + X86_MATCH_VFM(INTEL_HASWELL_G, &snb_cstates), + + X86_MATCH_VFM(INTEL_HASWELL_L, &hswult_cstates), + + X86_MATCH_VFM(INTEL_ATOM_SILVERMONT, &slm_cstates), + X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_D, &slm_cstates), + X86_MATCH_VFM(INTEL_ATOM_AIRMONT, &slm_cstates), + + X86_MATCH_VFM(INTEL_BROADWELL, &snb_cstates), + X86_MATCH_VFM(INTEL_BROADWELL_D, &snb_cstates), + X86_MATCH_VFM(INTEL_BROADWELL_G, &snb_cstates), + X86_MATCH_VFM(INTEL_BROADWELL_X, &snb_cstates), + + X86_MATCH_VFM(INTEL_SKYLAKE_L, &snb_cstates), + X86_MATCH_VFM(INTEL_SKYLAKE, &snb_cstates), + X86_MATCH_VFM(INTEL_SKYLAKE_X, &snb_cstates), + + X86_MATCH_VFM(INTEL_KABYLAKE_L, &hswult_cstates), + X86_MATCH_VFM(INTEL_KABYLAKE, &hswult_cstates), + X86_MATCH_VFM(INTEL_COMETLAKE_L, &hswult_cstates), + X86_MATCH_VFM(INTEL_COMETLAKE, &hswult_cstates), + + X86_MATCH_VFM(INTEL_CANNONLAKE_L, &cnl_cstates), + + X86_MATCH_VFM(INTEL_XEON_PHI_KNL, &knl_cstates), + X86_MATCH_VFM(INTEL_XEON_PHI_KNM, &knl_cstates), + + X86_MATCH_VFM(INTEL_ATOM_GOLDMONT, &glm_cstates), + X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_D, &glm_cstates), + X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_PLUS, &glm_cstates), + X86_MATCH_VFM(INTEL_ATOM_TREMONT_D, &glm_cstates), + X86_MATCH_VFM(INTEL_ATOM_TREMONT, &glm_cstates), + X86_MATCH_VFM(INTEL_ATOM_TREMONT_L, &glm_cstates), + X86_MATCH_VFM(INTEL_ATOM_GRACEMONT, &adl_cstates), + X86_MATCH_VFM(INTEL_ATOM_CRESTMONT_X, &srf_cstates), + X86_MATCH_VFM(INTEL_ATOM_CRESTMONT, &grr_cstates), + + X86_MATCH_VFM(INTEL_ICELAKE_L, &icl_cstates), + X86_MATCH_VFM(INTEL_ICELAKE, &icl_cstates), + X86_MATCH_VFM(INTEL_ICELAKE_X, &icx_cstates), + X86_MATCH_VFM(INTEL_ICELAKE_D, &icx_cstates), + X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, &icx_cstates), + X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X, &icx_cstates), + X86_MATCH_VFM(INTEL_GRANITERAPIDS_X, &icx_cstates), + X86_MATCH_VFM(INTEL_GRANITERAPIDS_D, &icx_cstates), + + X86_MATCH_VFM(INTEL_TIGERLAKE_L, &icl_cstates), + X86_MATCH_VFM(INTEL_TIGERLAKE, &icl_cstates), + X86_MATCH_VFM(INTEL_ROCKETLAKE, &icl_cstates), + X86_MATCH_VFM(INTEL_ALDERLAKE, &adl_cstates), + X86_MATCH_VFM(INTEL_ALDERLAKE_L, &adl_cstates), + X86_MATCH_VFM(INTEL_RAPTORLAKE, &adl_cstates), + X86_MATCH_VFM(INTEL_RAPTORLAKE_P, &adl_cstates), + X86_MATCH_VFM(INTEL_RAPTORLAKE_S, &adl_cstates), + X86_MATCH_VFM(INTEL_METEORLAKE, &adl_cstates), + X86_MATCH_VFM(INTEL_METEORLAKE_L, &adl_cstates), + X86_MATCH_VFM(INTEL_ARROWLAKE, &adl_cstates), + X86_MATCH_VFM(INTEL_ARROWLAKE_H, &adl_cstates), + X86_MATCH_VFM(INTEL_ARROWLAKE_U, &adl_cstates), + X86_MATCH_VFM(INTEL_LUNARLAKE_M, &lnl_cstates), { }, }; MODULE_DEVICE_TABLE(x86cpu, intel_cstates_match); --- linux-xilinx-6.8.0.orig/arch/x86/events/intel/ds.c +++ linux-xilinx-6.8.0/arch/x86/events/intel/ds.c @@ -1136,8 +1136,7 @@ static inline void pebs_update_threshold(struct cpu_hw_events *cpuc) { struct debug_store *ds = cpuc->ds; - int max_pebs_events = hybrid(cpuc->pmu, max_pebs_events); - int num_counters_fixed = hybrid(cpuc->pmu, num_counters_fixed); + int max_pebs_events = intel_pmu_max_num_pebs(cpuc->pmu); u64 threshold; int reserved; @@ -1145,7 +1144,7 @@ return; if (x86_pmu.flags & PMU_FL_PEBS_ALL) - reserved = max_pebs_events + num_counters_fixed; + reserved = max_pebs_events + x86_pmu_max_num_counters_fixed(cpuc->pmu); else reserved = max_pebs_events; @@ -1236,11 +1235,11 @@ struct pmu *pmu = event->pmu; /* - * Make sure we get updated with the first PEBS - * event. It will trigger also during removal, but - * that does not hurt: + * Make sure we get updated with the first PEBS event. + * During removal, ->pebs_data_cfg is still valid for + * the last PEBS event. Don't clear it. */ - if (cpuc->n_pebs == 1) + if ((cpuc->n_pebs == 1) && add) cpuc->pebs_data_cfg = PEBS_UPDATE_DS_SW; if (needed_cb != pebs_needs_sched_cb(cpuc)) { @@ -1354,7 +1353,7 @@ * hence we need to drain when changing said * size. */ - intel_pmu_drain_large_pebs(cpuc); + intel_pmu_drain_pebs_buffer(); adaptive_pebs_record_size_update(); wrmsrl(MSR_PEBS_DATA_CFG, pebs_data_cfg); cpuc->active_pebs_data_cfg = pebs_data_cfg; @@ -1830,8 +1829,12 @@ set_linear_ip(regs, basic->ip); regs->flags = PERF_EFLAGS_EXACT; - if ((sample_type & PERF_SAMPLE_WEIGHT_STRUCT) && (x86_pmu.flags & PMU_FL_RETIRE_LATENCY)) - data->weight.var3_w = format_size >> PEBS_RETIRE_LATENCY_OFFSET & PEBS_LATENCY_MASK; + if (sample_type & PERF_SAMPLE_WEIGHT_STRUCT) { + if (x86_pmu.flags & PMU_FL_RETIRE_LATENCY) + data->weight.var3_w = format_size >> PEBS_RETIRE_LATENCY_OFFSET & PEBS_LATENCY_MASK; + else + data->weight.var3_w = 0; + } /* * The record for MEMINFO is in front of GP @@ -2156,6 +2159,7 @@ void *base, *at, *top; short counts[INTEL_PMC_IDX_FIXED + MAX_FIXED_PEBS_EVENTS] = {}; short error[INTEL_PMC_IDX_FIXED + MAX_FIXED_PEBS_EVENTS] = {}; + int max_pebs_events = intel_pmu_max_num_pebs(NULL); int bit, i, size; u64 mask; @@ -2167,11 +2171,11 @@ ds->pebs_index = ds->pebs_buffer_base; - mask = (1ULL << x86_pmu.max_pebs_events) - 1; - size = x86_pmu.max_pebs_events; + mask = x86_pmu.pebs_events_mask; + size = max_pebs_events; if (x86_pmu.flags & PMU_FL_PEBS_ALL) { - mask |= ((1ULL << x86_pmu.num_counters_fixed) - 1) << INTEL_PMC_IDX_FIXED; - size = INTEL_PMC_IDX_FIXED + x86_pmu.num_counters_fixed; + mask |= x86_pmu.fixed_cntr_mask64 << INTEL_PMC_IDX_FIXED; + size = INTEL_PMC_IDX_FIXED + x86_pmu_max_num_counters_fixed(NULL); } if (unlikely(base >= top)) { @@ -2207,8 +2211,9 @@ pebs_status = p->status = cpuc->pebs_enabled; bit = find_first_bit((unsigned long *)&pebs_status, - x86_pmu.max_pebs_events); - if (bit >= x86_pmu.max_pebs_events) + max_pebs_events); + + if (!(x86_pmu.pebs_events_mask & (1 << bit))) continue; /* @@ -2266,12 +2271,10 @@ { short counts[INTEL_PMC_IDX_FIXED + MAX_FIXED_PEBS_EVENTS] = {}; struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); - int max_pebs_events = hybrid(cpuc->pmu, max_pebs_events); - int num_counters_fixed = hybrid(cpuc->pmu, num_counters_fixed); struct debug_store *ds = cpuc->ds; struct perf_event *event; void *base, *at, *top; - int bit, size; + int bit; u64 mask; if (!x86_pmu.pebs_active) @@ -2282,12 +2285,11 @@ ds->pebs_index = ds->pebs_buffer_base; - mask = ((1ULL << max_pebs_events) - 1) | - (((1ULL << num_counters_fixed) - 1) << INTEL_PMC_IDX_FIXED); - size = INTEL_PMC_IDX_FIXED + num_counters_fixed; + mask = hybrid(cpuc->pmu, pebs_events_mask) | + (hybrid(cpuc->pmu, fixed_cntr_mask64) << INTEL_PMC_IDX_FIXED); if (unlikely(base >= top)) { - intel_pmu_pebs_event_update_no_drain(cpuc, size); + intel_pmu_pebs_event_update_no_drain(cpuc, X86_PMC_IDX_MAX); return; } @@ -2297,11 +2299,11 @@ pebs_status = get_pebs_status(at) & cpuc->pebs_enabled; pebs_status &= mask; - for_each_set_bit(bit, (unsigned long *)&pebs_status, size) + for_each_set_bit(bit, (unsigned long *)&pebs_status, X86_PMC_IDX_MAX) counts[bit]++; } - for_each_set_bit(bit, (unsigned long *)&mask, size) { + for_each_set_bit(bit, (unsigned long *)&mask, X86_PMC_IDX_MAX) { if (counts[bit] == 0) continue; @@ -2379,6 +2381,7 @@ x86_pmu.large_pebs_flags |= PERF_SAMPLE_TIME; break; + case 6: case 5: x86_pmu.pebs_ept = 1; fallthrough; @@ -2405,7 +2408,15 @@ } pr_cont("PEBS fmt4%c%s, ", pebs_type, pebs_qual); - if (!is_hybrid() && x86_pmu.intel_cap.pebs_output_pt_available) { + /* + * The PEBS-via-PT is not supported on hybrid platforms, + * because not all CPUs of a hybrid machine support it. + * The global x86_pmu.intel_cap, which only contains the + * common capabilities, is used to check the availability + * of the feature. The per-PMU pebs_output_pt_available + * in a hybrid machine should be ignored. + */ + if (x86_pmu.intel_cap.pebs_output_pt_available) { pr_cont("PEBS-via-PT, "); x86_get_pmu(smp_processor_id())->capabilities |= PERF_PMU_CAP_AUX_OUTPUT; } --- linux-xilinx-6.8.0.orig/arch/x86/events/intel/knc.c +++ linux-xilinx-6.8.0/arch/x86/events/intel/knc.c @@ -303,7 +303,7 @@ .apic = 1, .max_period = (1ULL << 39) - 1, .version = 0, - .num_counters = 2, + .cntr_mask64 = 0x3, .cntval_bits = 40, .cntval_mask = (1ULL << 40) - 1, .get_event_constraints = x86_get_event_constraints, --- linux-xilinx-6.8.0.orig/arch/x86/events/intel/p4.c +++ linux-xilinx-6.8.0/arch/x86/events/intel/p4.c @@ -919,7 +919,7 @@ struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); int idx; - for (idx = 0; idx < x86_pmu.num_counters; idx++) { + for_each_set_bit(idx, x86_pmu.cntr_mask, X86_PMC_IDX_MAX) { struct perf_event *event = cpuc->events[idx]; if (!test_bit(idx, cpuc->active_mask)) continue; @@ -998,7 +998,7 @@ struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); int idx; - for (idx = 0; idx < x86_pmu.num_counters; idx++) { + for_each_set_bit(idx, x86_pmu.cntr_mask, X86_PMC_IDX_MAX) { struct perf_event *event = cpuc->events[idx]; if (!test_bit(idx, cpuc->active_mask)) continue; @@ -1040,7 +1040,7 @@ cpuc = this_cpu_ptr(&cpu_hw_events); - for (idx = 0; idx < x86_pmu.num_counters; idx++) { + for_each_set_bit(idx, x86_pmu.cntr_mask, X86_PMC_IDX_MAX) { int overflow; if (!test_bit(idx, cpuc->active_mask)) { @@ -1353,7 +1353,7 @@ * though leave it restricted at moment assuming * HT is on */ - .num_counters = ARCH_P4_MAX_CCCR, + .cntr_mask64 = GENMASK_ULL(ARCH_P4_MAX_CCCR - 1, 0), .apic = 1, .cntval_bits = ARCH_P4_CNTRVAL_BITS, .cntval_mask = ARCH_P4_CNTRVAL_MASK, @@ -1395,7 +1395,7 @@ * * Solve this by zero'ing out the registers to mimic a reset. */ - for (i = 0; i < x86_pmu.num_counters; i++) { + for_each_set_bit(i, x86_pmu.cntr_mask, X86_PMC_IDX_MAX) { reg = x86_pmu_config_addr(i); wrmsrl_safe(reg, 0ULL); } --- linux-xilinx-6.8.0.orig/arch/x86/events/intel/p6.c +++ linux-xilinx-6.8.0/arch/x86/events/intel/p6.c @@ -214,7 +214,7 @@ .apic = 1, .max_period = (1ULL << 31) - 1, .version = 0, - .num_counters = 2, + .cntr_mask64 = 0x3, /* * Events have 40 bits implemented. However they are designed such * that bits [32-39] are sign extensions of bit 31. As such the --- linux-xilinx-6.8.0.orig/arch/x86/events/intel/pt.c +++ linux-xilinx-6.8.0/arch/x86/events/intel/pt.c @@ -828,11 +828,13 @@ buf->cur_idx++; if (buf->cur_idx == buf->cur->last) { - if (buf->cur == buf->last) + if (buf->cur == buf->last) { buf->cur = buf->first; - else + buf->wrapped = true; + } else { buf->cur = list_entry(buf->cur->list.next, struct topa, list); + } buf->cur_idx = 0; } } @@ -846,8 +848,11 @@ static void pt_update_head(struct pt *pt) { struct pt_buffer *buf = perf_get_aux(&pt->handle); + bool wrapped = buf->wrapped; u64 topa_idx, base, old; + buf->wrapped = false; + if (buf->single) { local_set(&buf->data_size, buf->output_off); return; @@ -865,7 +870,7 @@ } else { old = (local64_xchg(&buf->head, base) & ((buf->nr_pages << PAGE_SHIFT) - 1)); - if (base < old) + if (base < old || (base == old && wrapped)) base += buf->nr_pages << PAGE_SHIFT; local_add(base - old, &buf->data_size); @@ -878,7 +883,7 @@ */ static void *pt_buffer_region(struct pt_buffer *buf) { - return phys_to_virt(TOPA_ENTRY(buf->cur, buf->cur_idx)->base << TOPA_SHIFT); + return phys_to_virt((phys_addr_t)TOPA_ENTRY(buf->cur, buf->cur_idx)->base << TOPA_SHIFT); } /** @@ -990,7 +995,7 @@ * order allocations, there shouldn't be many of these. */ list_for_each_entry(topa, &buf->tables, list) { - if (topa->offset + topa->size > pg << PAGE_SHIFT) + if (topa->offset + topa->size > (unsigned long)pg << PAGE_SHIFT) goto found; } @@ -1606,6 +1611,7 @@ * see comment in intel_pt_interrupt(). */ WRITE_ONCE(pt->handle_nmi, 0); + barrier(); pt_config_stop(event); @@ -1657,11 +1663,10 @@ return 0; /* - * Here, handle_nmi tells us if the tracing is on + * There is no PT interrupt in this mode, so stop the trace and it will + * remain stopped while the buffer is copied. */ - if (READ_ONCE(pt->handle_nmi)) - pt_config_stop(event); - + pt_config_stop(event); pt_read_offset(buf); pt_update_head(pt); @@ -1673,11 +1678,10 @@ ret = perf_output_copy_aux(&pt->handle, handle, from, to); /* - * If the tracing was on when we turned up, restart it. - * Compiler barrier not needed as we couldn't have been - * preempted by anything that touches pt->handle_nmi. + * Here, handle_nmi tells us if the tracing was on. + * If the tracing was on, restart it. */ - if (pt->handle_nmi) + if (READ_ONCE(pt->handle_nmi)) pt_config_start(event); return ret; --- linux-xilinx-6.8.0.orig/arch/x86/events/intel/pt.h +++ linux-xilinx-6.8.0/arch/x86/events/intel/pt.h @@ -33,8 +33,8 @@ u64 rsvd2 : 1; u64 size : 4; u64 rsvd3 : 2; - u64 base : 36; - u64 rsvd4 : 16; + u64 base : 40; + u64 rsvd4 : 12; }; /* TSC to Core Crystal Clock Ratio */ @@ -65,6 +65,7 @@ * @head: logical write offset inside the buffer * @snapshot: if this is for a snapshot/overwrite counter * @single: use Single Range Output instead of ToPA + * @wrapped: buffer advance wrapped back to the first topa table * @stop_pos: STOP topa entry index * @intr_pos: INT topa entry index * @stop_te: STOP topa entry pointer @@ -82,6 +83,7 @@ local64_t head; bool snapshot; bool single; + bool wrapped; long stop_pos, intr_pos; struct topa_entry *stop_te, *intr_te; void **data_pages; --- linux-xilinx-6.8.0.orig/arch/x86/events/intel/uncore.c +++ linux-xilinx-6.8.0/arch/x86/events/intel/uncore.c @@ -263,6 +263,9 @@ return; } + if (intel_generic_uncore_assign_hw_event(event, box)) + return; + hwc->config_base = uncore_event_ctl(box, hwc->idx); hwc->event_base = uncore_perf_ctr(box, hwc->idx); } @@ -843,7 +846,9 @@ static ssize_t uncore_get_attr_cpumask(struct device *dev, struct device_attribute *attr, char *buf) { - return cpumap_print_to_pagebuf(true, buf, &uncore_cpu_mask); + struct intel_uncore_pmu *pmu = container_of(dev_get_drvdata(dev), struct intel_uncore_pmu, pmu); + + return cpumap_print_to_pagebuf(true, buf, &pmu->cpu_mask); } static DEVICE_ATTR(cpumask, S_IRUGO, uncore_get_attr_cpumask, NULL); @@ -860,7 +865,10 @@ static inline int uncore_get_box_id(struct intel_uncore_type *type, struct intel_uncore_pmu *pmu) { - return type->box_ids ? type->box_ids[pmu->pmu_idx] : pmu->pmu_idx; + if (type->boxes) + return intel_uncore_find_discovery_unit_id(type->boxes, -1, pmu->pmu_idx); + + return pmu->pmu_idx; } void uncore_get_alias_name(char *pmu_name, struct intel_uncore_pmu *pmu) @@ -961,6 +969,9 @@ if (type->cleanup_mapping) type->cleanup_mapping(type); + if (type->cleanup_extra_boxes) + type->cleanup_extra_boxes(type); + if (pmu) { for (i = 0; i < type->num_boxes; i++, pmu++) { uncore_pmu_unregister(pmu); @@ -969,10 +980,7 @@ kfree(type->pmus); type->pmus = NULL; } - if (type->box_ids) { - kfree(type->box_ids); - type->box_ids = NULL; - } + kfree(type->events_group); type->events_group = NULL; } @@ -1076,22 +1084,19 @@ uncore_pci_find_dev_pmu_from_types(struct pci_dev *pdev) { struct intel_uncore_type **types = uncore_pci_uncores; + struct intel_uncore_discovery_unit *unit; struct intel_uncore_type *type; - u64 box_ctl; - int i, die; + struct rb_node *node; for (; *types; types++) { type = *types; - for (die = 0; die < __uncore_max_dies; die++) { - for (i = 0; i < type->num_boxes; i++) { - if (!type->box_ctls[die]) - continue; - box_ctl = type->box_ctls[die] + type->pci_offsets[i]; - if (pdev->devfn == UNCORE_DISCOVERY_PCI_DEVFN(box_ctl) && - pdev->bus->number == UNCORE_DISCOVERY_PCI_BUS(box_ctl) && - pci_domain_nr(pdev->bus) == UNCORE_DISCOVERY_PCI_DOMAIN(box_ctl)) - return &type->pmus[i]; - } + + for (node = rb_first(type->boxes); node; node = rb_next(node)) { + unit = rb_entry(node, struct intel_uncore_discovery_unit, node); + if (pdev->devfn == UNCORE_DISCOVERY_PCI_DEVFN(unit->addr) && + pdev->bus->number == UNCORE_DISCOVERY_PCI_BUS(unit->addr) && + pci_domain_nr(pdev->bus) == UNCORE_DISCOVERY_PCI_DOMAIN(unit->addr)) + return &type->pmus[unit->pmu_idx]; } } @@ -1367,28 +1372,25 @@ static void uncore_pci_pmus_register(void) { struct intel_uncore_type **types = uncore_pci_uncores; + struct intel_uncore_discovery_unit *unit; struct intel_uncore_type *type; struct intel_uncore_pmu *pmu; + struct rb_node *node; struct pci_dev *pdev; - u64 box_ctl; - int i, die; for (; *types; types++) { type = *types; - for (die = 0; die < __uncore_max_dies; die++) { - for (i = 0; i < type->num_boxes; i++) { - if (!type->box_ctls[die]) - continue; - box_ctl = type->box_ctls[die] + type->pci_offsets[i]; - pdev = pci_get_domain_bus_and_slot(UNCORE_DISCOVERY_PCI_DOMAIN(box_ctl), - UNCORE_DISCOVERY_PCI_BUS(box_ctl), - UNCORE_DISCOVERY_PCI_DEVFN(box_ctl)); - if (!pdev) - continue; - pmu = &type->pmus[i]; - uncore_pci_pmu_register(pdev, type, pmu, die); - } + for (node = rb_first(type->boxes); node; node = rb_next(node)) { + unit = rb_entry(node, struct intel_uncore_discovery_unit, node); + pdev = pci_get_domain_bus_and_slot(UNCORE_DISCOVERY_PCI_DOMAIN(unit->addr), + UNCORE_DISCOVERY_PCI_BUS(unit->addr), + UNCORE_DISCOVERY_PCI_DEVFN(unit->addr)); + + if (!pdev) + continue; + pmu = &type->pmus[unit->pmu_idx]; + uncore_pci_pmu_register(pdev, type, pmu, unit->die); } } @@ -1453,6 +1455,18 @@ } } +static bool uncore_die_has_box(struct intel_uncore_type *type, + int die, unsigned int pmu_idx) +{ + if (!type->boxes) + return true; + + if (intel_uncore_find_discovery_unit_id(type->boxes, die, pmu_idx) < 0) + return false; + + return true; +} + static void uncore_change_type_ctx(struct intel_uncore_type *type, int old_cpu, int new_cpu) { @@ -1468,18 +1482,25 @@ if (old_cpu < 0) { WARN_ON_ONCE(box->cpu != -1); - box->cpu = new_cpu; + if (uncore_die_has_box(type, die, pmu->pmu_idx)) { + box->cpu = new_cpu; + cpumask_set_cpu(new_cpu, &pmu->cpu_mask); + } continue; } - WARN_ON_ONCE(box->cpu != old_cpu); + WARN_ON_ONCE(box->cpu != -1 && box->cpu != old_cpu); box->cpu = -1; + cpumask_clear_cpu(old_cpu, &pmu->cpu_mask); if (new_cpu < 0) continue; + if (!uncore_die_has_box(type, die, pmu->pmu_idx)) + continue; uncore_pmu_cancel_hrtimer(box); perf_pmu_migrate_context(&pmu->pmu, old_cpu, new_cpu); box->cpu = new_cpu; + cpumask_set_cpu(new_cpu, &pmu->cpu_mask); } } @@ -1502,7 +1523,7 @@ pmu = type->pmus; for (i = 0; i < type->num_boxes; i++, pmu++) { box = pmu->boxes[id]; - if (box && atomic_dec_return(&box->refcnt) == 0) + if (box && box->cpu >= 0 && atomic_dec_return(&box->refcnt) == 0) uncore_box_exit(box); } } @@ -1592,7 +1613,7 @@ pmu = type->pmus; for (i = 0; i < type->num_boxes; i++, pmu++) { box = pmu->boxes[id]; - if (box && atomic_inc_return(&box->refcnt) == 1) + if (box && box->cpu >= 0 && atomic_inc_return(&box->refcnt) == 1) uncore_box_init(box); } } --- linux-xilinx-6.8.0.orig/arch/x86/events/intel/uncore.h +++ linux-xilinx-6.8.0/arch/x86/events/intel/uncore.h @@ -62,7 +62,6 @@ unsigned fixed_ctr; unsigned fixed_ctl; unsigned box_ctl; - u64 *box_ctls; /* Unit ctrl addr of the first box of each die */ union { unsigned msr_offset; unsigned mmio_offset; @@ -76,7 +75,6 @@ u64 *pci_offsets; u64 *mmio_offsets; }; - unsigned *box_ids; struct event_constraint unconstrainted; struct event_constraint *constraints; struct intel_uncore_pmu *pmus; @@ -86,6 +84,7 @@ const struct attribute_group *attr_groups[4]; const struct attribute_group **attr_update; struct pmu *pmu; /* for custom pmu ops */ + struct rb_root *boxes; /* * Uncore PMU would store relevant platform topology configuration here * to identify which platform component each PMON block of that type is @@ -98,6 +97,10 @@ int (*get_topology)(struct intel_uncore_type *type); void (*set_mapping)(struct intel_uncore_type *type); void (*cleanup_mapping)(struct intel_uncore_type *type); + /* + * Optional callbacks for extra uncore units cleanup + */ + void (*cleanup_extra_boxes)(struct intel_uncore_type *type); }; #define pmu_group attr_groups[0] @@ -125,6 +128,7 @@ int func_id; bool registered; atomic_t activeboxes; + cpumask_t cpu_mask; struct intel_uncore_type *type; struct intel_uncore_box **boxes; }; --- linux-xilinx-6.8.0.orig/arch/x86/events/intel/uncore_discovery.c +++ linux-xilinx-6.8.0/arch/x86/events/intel/uncore_discovery.c @@ -89,9 +89,7 @@ if (!type) return NULL; - type->box_ctrl_die = kcalloc(__uncore_max_dies, sizeof(u64), GFP_KERNEL); - if (!type->box_ctrl_die) - goto free_type; + type->units = RB_ROOT; type->access_type = unit->access_type; num_discovered_types[type->access_type]++; @@ -100,12 +98,6 @@ rb_add(&type->node, &discovery_tables, __type_less); return type; - -free_type: - kfree(type); - - return NULL; - } static struct intel_uncore_discovery_type * @@ -120,14 +112,118 @@ return add_uncore_discovery_type(unit); } +static inline int pmu_idx_cmp(const void *key, const struct rb_node *b) +{ + struct intel_uncore_discovery_unit *unit; + const unsigned int *id = key; + + unit = rb_entry(b, struct intel_uncore_discovery_unit, node); + + if (unit->pmu_idx > *id) + return -1; + else if (unit->pmu_idx < *id) + return 1; + + return 0; +} + +static struct intel_uncore_discovery_unit * +intel_uncore_find_discovery_unit(struct rb_root *units, int die, + unsigned int pmu_idx) +{ + struct intel_uncore_discovery_unit *unit; + struct rb_node *pos; + + if (!units) + return NULL; + + pos = rb_find_first(&pmu_idx, units, pmu_idx_cmp); + if (!pos) + return NULL; + unit = rb_entry(pos, struct intel_uncore_discovery_unit, node); + + if (die < 0) + return unit; + + for (; pos; pos = rb_next(pos)) { + unit = rb_entry(pos, struct intel_uncore_discovery_unit, node); + + if (unit->pmu_idx != pmu_idx) + break; + + if (unit->die == die) + return unit; + } + + return NULL; +} + +int intel_uncore_find_discovery_unit_id(struct rb_root *units, int die, + unsigned int pmu_idx) +{ + struct intel_uncore_discovery_unit *unit; + + unit = intel_uncore_find_discovery_unit(units, die, pmu_idx); + if (unit) + return unit->id; + + return -1; +} + +static inline bool unit_less(struct rb_node *a, const struct rb_node *b) +{ + struct intel_uncore_discovery_unit *a_node, *b_node; + + a_node = rb_entry(a, struct intel_uncore_discovery_unit, node); + b_node = rb_entry(b, struct intel_uncore_discovery_unit, node); + + if (a_node->pmu_idx < b_node->pmu_idx) + return true; + if (a_node->pmu_idx > b_node->pmu_idx) + return false; + + if (a_node->die < b_node->die) + return true; + if (a_node->die > b_node->die) + return false; + + return 0; +} + +static inline struct intel_uncore_discovery_unit * +uncore_find_unit(struct rb_root *root, unsigned int id) +{ + struct intel_uncore_discovery_unit *unit; + struct rb_node *node; + + for (node = rb_first(root); node; node = rb_next(node)) { + unit = rb_entry(node, struct intel_uncore_discovery_unit, node); + if (unit->id == id) + return unit; + } + + return NULL; +} + +void uncore_find_add_unit(struct intel_uncore_discovery_unit *node, + struct rb_root *root, u16 *num_units) +{ + struct intel_uncore_discovery_unit *unit = uncore_find_unit(root, node->id); + + if (unit) + node->pmu_idx = unit->pmu_idx; + else if (num_units) + node->pmu_idx = (*num_units)++; + + rb_add(&node->node, root, unit_less); +} + static void uncore_insert_box_info(struct uncore_unit_discovery *unit, - int die, bool parsed) + int die) { + struct intel_uncore_discovery_unit *node; struct intel_uncore_discovery_type *type; - unsigned int *ids; - u64 *box_offset; - int i; if (!unit->ctl || !unit->ctl_offset || !unit->ctr_offset) { pr_info("Invalid address is detected for uncore type %d box %d, " @@ -136,71 +232,29 @@ return; } - if (parsed) { - type = search_uncore_discovery_type(unit->box_type); - if (!type) { - pr_info("A spurious uncore type %d is detected, " - "Disable the uncore type.\n", - unit->box_type); - return; - } - /* Store the first box of each die */ - if (!type->box_ctrl_die[die]) - type->box_ctrl_die[die] = unit->ctl; + node = kzalloc(sizeof(*node), GFP_KERNEL); + if (!node) return; - } - type = get_uncore_discovery_type(unit); - if (!type) - return; + node->die = die; + node->id = unit->box_id; + node->addr = unit->ctl; - box_offset = kcalloc(type->num_boxes + 1, sizeof(u64), GFP_KERNEL); - if (!box_offset) + type = get_uncore_discovery_type(unit); + if (!type) { + kfree(node); return; + } - ids = kcalloc(type->num_boxes + 1, sizeof(unsigned int), GFP_KERNEL); - if (!ids) - goto free_box_offset; + uncore_find_add_unit(node, &type->units, &type->num_units); /* Store generic information for the first box */ - if (!type->num_boxes) { - type->box_ctrl = unit->ctl; - type->box_ctrl_die[die] = unit->ctl; + if (type->num_units == 1) { type->num_counters = unit->num_regs; type->counter_width = unit->bit_width; type->ctl_offset = unit->ctl_offset; type->ctr_offset = unit->ctr_offset; - *ids = unit->box_id; - goto end; - } - - for (i = 0; i < type->num_boxes; i++) { - ids[i] = type->ids[i]; - box_offset[i] = type->box_offset[i]; - - if (unit->box_id == ids[i]) { - pr_info("Duplicate uncore type %d box ID %d is detected, " - "Drop the duplicate uncore unit.\n", - unit->box_type, unit->box_id); - goto free_ids; - } } - ids[i] = unit->box_id; - box_offset[i] = unit->ctl - type->box_ctrl; - kfree(type->ids); - kfree(type->box_offset); -end: - type->ids = ids; - type->box_offset = box_offset; - type->num_boxes++; - return; - -free_ids: - kfree(ids); - -free_box_offset: - kfree(box_offset); - } static bool @@ -279,7 +333,7 @@ if (uncore_ignore_unit(&unit, ignore)) continue; - uncore_insert_box_info(&unit, die, *parsed); + uncore_insert_box_info(&unit, die); } *parsed = true; @@ -339,9 +393,16 @@ void intel_uncore_clear_discovery_tables(void) { struct intel_uncore_discovery_type *type, *next; + struct intel_uncore_discovery_unit *pos; + struct rb_node *node; rbtree_postorder_for_each_entry_safe(type, next, &discovery_tables, node) { - kfree(type->box_ctrl_die); + while (!RB_EMPTY_ROOT(&type->units)) { + node = rb_first(&type->units); + pos = rb_entry(node, struct intel_uncore_discovery_unit, node); + rb_erase(node, &type->units); + kfree(pos); + } kfree(type); } } @@ -366,19 +427,31 @@ .attrs = generic_uncore_formats_attr, }; +static u64 intel_generic_uncore_box_ctl(struct intel_uncore_box *box) +{ + struct intel_uncore_discovery_unit *unit; + + unit = intel_uncore_find_discovery_unit(box->pmu->type->boxes, + -1, box->pmu->pmu_idx); + if (WARN_ON_ONCE(!unit)) + return 0; + + return unit->addr; +} + void intel_generic_uncore_msr_init_box(struct intel_uncore_box *box) { - wrmsrl(uncore_msr_box_ctl(box), GENERIC_PMON_BOX_CTL_INT); + wrmsrl(intel_generic_uncore_box_ctl(box), GENERIC_PMON_BOX_CTL_INT); } void intel_generic_uncore_msr_disable_box(struct intel_uncore_box *box) { - wrmsrl(uncore_msr_box_ctl(box), GENERIC_PMON_BOX_CTL_FRZ); + wrmsrl(intel_generic_uncore_box_ctl(box), GENERIC_PMON_BOX_CTL_FRZ); } void intel_generic_uncore_msr_enable_box(struct intel_uncore_box *box) { - wrmsrl(uncore_msr_box_ctl(box), 0); + wrmsrl(intel_generic_uncore_box_ctl(box), 0); } static void intel_generic_uncore_msr_enable_event(struct intel_uncore_box *box, @@ -406,10 +479,47 @@ .read_counter = uncore_msr_read_counter, }; +bool intel_generic_uncore_assign_hw_event(struct perf_event *event, + struct intel_uncore_box *box) +{ + struct hw_perf_event *hwc = &event->hw; + u64 box_ctl; + + if (!box->pmu->type->boxes) + return false; + + if (box->io_addr) { + hwc->config_base = uncore_pci_event_ctl(box, hwc->idx); + hwc->event_base = uncore_pci_perf_ctr(box, hwc->idx); + return true; + } + + box_ctl = intel_generic_uncore_box_ctl(box); + if (!box_ctl) + return false; + + if (box->pci_dev) { + box_ctl = UNCORE_DISCOVERY_PCI_BOX_CTRL(box_ctl); + hwc->config_base = box_ctl + uncore_pci_event_ctl(box, hwc->idx); + hwc->event_base = box_ctl + uncore_pci_perf_ctr(box, hwc->idx); + return true; + } + + hwc->config_base = box_ctl + box->pmu->type->event_ctl + hwc->idx; + hwc->event_base = box_ctl + box->pmu->type->perf_ctr + hwc->idx; + + return true; +} + +static inline int intel_pci_uncore_box_ctl(struct intel_uncore_box *box) +{ + return UNCORE_DISCOVERY_PCI_BOX_CTRL(intel_generic_uncore_box_ctl(box)); +} + void intel_generic_uncore_pci_init_box(struct intel_uncore_box *box) { struct pci_dev *pdev = box->pci_dev; - int box_ctl = uncore_pci_box_ctl(box); + int box_ctl = intel_pci_uncore_box_ctl(box); __set_bit(UNCORE_BOX_FLAG_CTL_OFFS8, &box->flags); pci_write_config_dword(pdev, box_ctl, GENERIC_PMON_BOX_CTL_INT); @@ -418,7 +528,7 @@ void intel_generic_uncore_pci_disable_box(struct intel_uncore_box *box) { struct pci_dev *pdev = box->pci_dev; - int box_ctl = uncore_pci_box_ctl(box); + int box_ctl = intel_pci_uncore_box_ctl(box); pci_write_config_dword(pdev, box_ctl, GENERIC_PMON_BOX_CTL_FRZ); } @@ -426,7 +536,7 @@ void intel_generic_uncore_pci_enable_box(struct intel_uncore_box *box) { struct pci_dev *pdev = box->pci_dev; - int box_ctl = uncore_pci_box_ctl(box); + int box_ctl = intel_pci_uncore_box_ctl(box); pci_write_config_dword(pdev, box_ctl, 0); } @@ -473,34 +583,30 @@ #define UNCORE_GENERIC_MMIO_SIZE 0x4000 -static u64 generic_uncore_mmio_box_ctl(struct intel_uncore_box *box) -{ - struct intel_uncore_type *type = box->pmu->type; - - if (!type->box_ctls || !type->box_ctls[box->dieid] || !type->mmio_offsets) - return 0; - - return type->box_ctls[box->dieid] + type->mmio_offsets[box->pmu->pmu_idx]; -} - void intel_generic_uncore_mmio_init_box(struct intel_uncore_box *box) { - u64 box_ctl = generic_uncore_mmio_box_ctl(box); + static struct intel_uncore_discovery_unit *unit; struct intel_uncore_type *type = box->pmu->type; resource_size_t addr; - if (!box_ctl) { + unit = intel_uncore_find_discovery_unit(type->boxes, box->dieid, box->pmu->pmu_idx); + if (!unit) { + pr_warn("Uncore type %d id %d: Cannot find box control address.\n", + type->type_id, box->pmu->pmu_idx); + return; + } + + if (!unit->addr) { pr_warn("Uncore type %d box %d: Invalid box control address.\n", - type->type_id, type->box_ids[box->pmu->pmu_idx]); + type->type_id, unit->id); return; } - addr = box_ctl; + addr = unit->addr; box->io_addr = ioremap(addr, UNCORE_GENERIC_MMIO_SIZE); if (!box->io_addr) { pr_warn("Uncore type %d box %d: ioremap error for 0x%llx.\n", - type->type_id, type->box_ids[box->pmu->pmu_idx], - (unsigned long long)addr); + type->type_id, unit->id, (unsigned long long)addr); return; } @@ -560,34 +666,22 @@ struct intel_uncore_discovery_type *type) { uncore->type_id = type->type; - uncore->num_boxes = type->num_boxes; uncore->num_counters = type->num_counters; uncore->perf_ctr_bits = type->counter_width; - uncore->box_ids = type->ids; + uncore->perf_ctr = (unsigned int)type->ctr_offset; + uncore->event_ctl = (unsigned int)type->ctl_offset; + uncore->boxes = &type->units; + uncore->num_boxes = type->num_units; switch (type_id) { case UNCORE_ACCESS_MSR: uncore->ops = &generic_uncore_msr_ops; - uncore->perf_ctr = (unsigned int)type->box_ctrl + type->ctr_offset; - uncore->event_ctl = (unsigned int)type->box_ctrl + type->ctl_offset; - uncore->box_ctl = (unsigned int)type->box_ctrl; - uncore->msr_offsets = type->box_offset; break; case UNCORE_ACCESS_PCI: uncore->ops = &generic_uncore_pci_ops; - uncore->perf_ctr = (unsigned int)UNCORE_DISCOVERY_PCI_BOX_CTRL(type->box_ctrl) + type->ctr_offset; - uncore->event_ctl = (unsigned int)UNCORE_DISCOVERY_PCI_BOX_CTRL(type->box_ctrl) + type->ctl_offset; - uncore->box_ctl = (unsigned int)UNCORE_DISCOVERY_PCI_BOX_CTRL(type->box_ctrl); - uncore->box_ctls = type->box_ctrl_die; - uncore->pci_offsets = type->box_offset; break; case UNCORE_ACCESS_MMIO: uncore->ops = &generic_uncore_mmio_ops; - uncore->perf_ctr = (unsigned int)type->ctr_offset; - uncore->event_ctl = (unsigned int)type->ctl_offset; - uncore->box_ctl = (unsigned int)type->box_ctrl; - uncore->box_ctls = type->box_ctrl_die; - uncore->mmio_offsets = type->box_offset; uncore->mmio_map_size = UNCORE_GENERIC_MMIO_SIZE; break; default: --- linux-xilinx-6.8.0.orig/arch/x86/events/intel/uncore_discovery.h +++ linux-xilinx-6.8.0/arch/x86/events/intel/uncore_discovery.h @@ -113,19 +113,24 @@ }; }; +struct intel_uncore_discovery_unit { + struct rb_node node; + unsigned int pmu_idx; /* The idx of the corresponding PMU */ + unsigned int id; /* Unit ID */ + unsigned int die; /* Die ID */ + u64 addr; /* Unit Control Address */ +}; + struct intel_uncore_discovery_type { struct rb_node node; enum uncore_access_type access_type; - u64 box_ctrl; /* Unit ctrl addr of the first box */ - u64 *box_ctrl_die; /* Unit ctrl addr of the first box of each die */ + struct rb_root units; /* Unit ctrl addr for all units */ u16 type; /* Type ID of the uncore block */ u8 num_counters; u8 counter_width; u8 ctl_offset; /* Counter Control 0 offset */ u8 ctr_offset; /* Counter 0 offset */ - u16 num_boxes; /* number of boxes for the uncore block */ - unsigned int *ids; /* Box IDs */ - u64 *box_offset; /* Box offset */ + u16 num_units; /* number of units */ }; bool intel_uncore_has_discovery_tables(int *ignore); @@ -156,3 +161,10 @@ struct intel_uncore_type ** intel_uncore_generic_init_uncores(enum uncore_access_type type_id, int num_extra); + +int intel_uncore_find_discovery_unit_id(struct rb_root *units, int die, + unsigned int pmu_idx); +bool intel_generic_uncore_assign_hw_event(struct perf_event *event, + struct intel_uncore_box *box); +void uncore_find_add_unit(struct intel_uncore_discovery_unit *node, + struct rb_root *root, u16 *num_units); --- linux-xilinx-6.8.0.orig/arch/x86/events/intel/uncore_snbep.c +++ linux-xilinx-6.8.0/arch/x86/events/intel/uncore_snbep.c @@ -461,6 +461,7 @@ #define SPR_UBOX_DID 0x3250 /* SPR CHA */ +#define SPR_CHA_EVENT_MASK_EXT 0xffffffff #define SPR_CHA_PMON_CTL_TID_EN (1 << 16) #define SPR_CHA_PMON_EVENT_MASK (SNBEP_PMON_RAW_EVENT_MASK | \ SPR_CHA_PMON_CTL_TID_EN) @@ -477,6 +478,7 @@ DEFINE_UNCORE_FORMAT_ATTR(umask_ext2, umask, "config:8-15,32-57"); DEFINE_UNCORE_FORMAT_ATTR(umask_ext3, umask, "config:8-15,32-39"); DEFINE_UNCORE_FORMAT_ATTR(umask_ext4, umask, "config:8-15,32-55"); +DEFINE_UNCORE_FORMAT_ATTR(umask_ext5, umask, "config:8-15,32-63"); DEFINE_UNCORE_FORMAT_ATTR(qor, qor, "config:16"); DEFINE_UNCORE_FORMAT_ATTR(edge, edge, "config:18"); DEFINE_UNCORE_FORMAT_ATTR(tid_en, tid_en, "config:19"); @@ -5932,10 +5934,11 @@ struct hw_perf_event_extra *reg1 = &event->hw.extra_reg; bool tie_en = !!(event->hw.config & SPR_CHA_PMON_CTL_TID_EN); struct intel_uncore_type *type = box->pmu->type; + int id = intel_uncore_find_discovery_unit_id(type->boxes, -1, box->pmu->pmu_idx); if (tie_en) { reg1->reg = SPR_C0_MSR_PMON_BOX_FILTER0 + - HSWEP_CBO_MSR_OFFSET * type->box_ids[box->pmu->pmu_idx]; + HSWEP_CBO_MSR_OFFSET * id; reg1->config = event->attr.config1 & SPR_CHA_PMON_BOX_FILTER_TID; reg1->idx = 0; } @@ -5957,7 +5960,7 @@ static struct attribute *spr_uncore_cha_formats_attr[] = { &format_attr_event.attr, - &format_attr_umask_ext4.attr, + &format_attr_umask_ext5.attr, &format_attr_tid_en2.attr, &format_attr_edge.attr, &format_attr_inv.attr, @@ -5993,7 +5996,7 @@ static struct intel_uncore_type spr_uncore_chabox = { .name = "cha", .event_mask = SPR_CHA_PMON_EVENT_MASK, - .event_mask_ext = SPR_RAW_EVENT_MASK_EXT, + .event_mask_ext = SPR_CHA_EVENT_MASK_EXT, .num_shared_regs = 1, .constraints = skx_uncore_chabox_constraints, .ops = &spr_uncore_chabox_ops, @@ -6161,7 +6164,55 @@ .name = "mdf", }; -#define UNCORE_SPR_NUM_UNCORE_TYPES 12 +static void spr_uncore_mmio_offs8_init_box(struct intel_uncore_box *box) +{ + __set_bit(UNCORE_BOX_FLAG_CTL_OFFS8, &box->flags); + intel_generic_uncore_mmio_init_box(box); +} + +static struct intel_uncore_ops spr_uncore_mmio_offs8_ops = { + .init_box = spr_uncore_mmio_offs8_init_box, + .exit_box = uncore_mmio_exit_box, + .disable_box = intel_generic_uncore_mmio_disable_box, + .enable_box = intel_generic_uncore_mmio_enable_box, + .disable_event = intel_generic_uncore_mmio_disable_event, + .enable_event = spr_uncore_mmio_enable_event, + .read_counter = uncore_mmio_read_counter, +}; + +#define SPR_UNCORE_MMIO_OFFS8_COMMON_FORMAT() \ + SPR_UNCORE_COMMON_FORMAT(), \ + .ops = &spr_uncore_mmio_offs8_ops + +static struct event_constraint spr_uncore_cxlcm_constraints[] = { + UNCORE_EVENT_CONSTRAINT(0x02, 0x0f), + UNCORE_EVENT_CONSTRAINT(0x05, 0x0f), + UNCORE_EVENT_CONSTRAINT(0x40, 0xf0), + UNCORE_EVENT_CONSTRAINT(0x41, 0xf0), + UNCORE_EVENT_CONSTRAINT(0x42, 0xf0), + UNCORE_EVENT_CONSTRAINT(0x43, 0xf0), + UNCORE_EVENT_CONSTRAINT(0x4b, 0xf0), + UNCORE_EVENT_CONSTRAINT(0x52, 0xf0), + EVENT_CONSTRAINT_END +}; + +static struct intel_uncore_type spr_uncore_cxlcm = { + SPR_UNCORE_MMIO_OFFS8_COMMON_FORMAT(), + .name = "cxlcm", + .constraints = spr_uncore_cxlcm_constraints, +}; + +static struct intel_uncore_type spr_uncore_cxldp = { + SPR_UNCORE_MMIO_OFFS8_COMMON_FORMAT(), + .name = "cxldp", +}; + +static struct intel_uncore_type spr_uncore_hbm = { + SPR_UNCORE_COMMON_FORMAT(), + .name = "hbm", +}; + +#define UNCORE_SPR_NUM_UNCORE_TYPES 15 #define UNCORE_SPR_CHA 0 #define UNCORE_SPR_IIO 1 #define UNCORE_SPR_IMC 6 @@ -6185,6 +6236,9 @@ NULL, NULL, &spr_uncore_mdf, + &spr_uncore_cxlcm, + &spr_uncore_cxldp, + &spr_uncore_hbm, }; /* @@ -6197,6 +6251,24 @@ 0, 0x8000, 0x10000, 0x18000 }; +static void spr_extra_boxes_cleanup(struct intel_uncore_type *type) +{ + struct intel_uncore_discovery_unit *pos; + struct rb_node *node; + + if (!type->boxes) + return; + + while (!RB_EMPTY_ROOT(type->boxes)) { + node = rb_first(type->boxes); + pos = rb_entry(node, struct intel_uncore_discovery_unit, node); + rb_erase(node, type->boxes); + kfree(pos); + } + kfree(type->boxes); + type->boxes = NULL; +} + static struct intel_uncore_type spr_uncore_upi = { .event_mask = SNBEP_PMON_RAW_EVENT_MASK, .event_mask_ext = SPR_RAW_EVENT_MASK_EXT, @@ -6211,10 +6283,11 @@ .num_counters = 4, .num_boxes = SPR_UNCORE_UPI_NUM_BOXES, .perf_ctr_bits = 48, - .perf_ctr = ICX_UPI_PCI_PMON_CTR0, - .event_ctl = ICX_UPI_PCI_PMON_CTL0, + .perf_ctr = ICX_UPI_PCI_PMON_CTR0 - ICX_UPI_PCI_PMON_BOX_CTL, + .event_ctl = ICX_UPI_PCI_PMON_CTL0 - ICX_UPI_PCI_PMON_BOX_CTL, .box_ctl = ICX_UPI_PCI_PMON_BOX_CTL, .pci_offsets = spr_upi_pci_offsets, + .cleanup_extra_boxes = spr_extra_boxes_cleanup, }; static struct intel_uncore_type spr_uncore_m3upi = { @@ -6224,11 +6297,12 @@ .num_counters = 4, .num_boxes = SPR_UNCORE_UPI_NUM_BOXES, .perf_ctr_bits = 48, - .perf_ctr = ICX_M3UPI_PCI_PMON_CTR0, - .event_ctl = ICX_M3UPI_PCI_PMON_CTL0, + .perf_ctr = ICX_M3UPI_PCI_PMON_CTR0 - ICX_M3UPI_PCI_PMON_BOX_CTL, + .event_ctl = ICX_M3UPI_PCI_PMON_CTL0 - ICX_M3UPI_PCI_PMON_BOX_CTL, .box_ctl = ICX_M3UPI_PCI_PMON_BOX_CTL, .pci_offsets = spr_upi_pci_offsets, .constraints = icx_uncore_m3upi_constraints, + .cleanup_extra_boxes = spr_extra_boxes_cleanup, }; enum perf_uncore_spr_iio_freerunning_type_id { @@ -6459,18 +6533,21 @@ static int uncore_type_max_boxes(struct intel_uncore_type **types, int type_id) { + struct intel_uncore_discovery_unit *unit; struct intel_uncore_type *type; - int i, max = 0; + struct rb_node *node; + int max = 0; type = uncore_find_type_by_id(types, type_id); if (!type) return 0; - for (i = 0; i < type->num_boxes; i++) { - if (type->box_ids[i] > max) - max = type->box_ids[i]; - } + for (node = rb_first(type->boxes); node; node = rb_next(node)) { + unit = rb_entry(node, struct intel_uncore_discovery_unit, node); + if (unit->id > max) + max = unit->id; + } return max + 1; } @@ -6512,10 +6589,11 @@ static void spr_update_device_location(int type_id) { + struct intel_uncore_discovery_unit *unit; struct intel_uncore_type *type; struct pci_dev *dev = NULL; + struct rb_root *root; u32 device, devfn; - u64 *ctls; int die; if (type_id == UNCORE_SPR_UPI) { @@ -6529,27 +6607,35 @@ } else return; - ctls = kcalloc(__uncore_max_dies, sizeof(u64), GFP_KERNEL); - if (!ctls) { + root = kzalloc(sizeof(struct rb_root), GFP_KERNEL); + if (!root) { type->num_boxes = 0; return; } + *root = RB_ROOT; while ((dev = pci_get_device(PCI_VENDOR_ID_INTEL, device, dev)) != NULL) { - if (devfn != dev->devfn) - continue; die = uncore_device_to_die(dev); if (die < 0) continue; - ctls[die] = pci_domain_nr(dev->bus) << UNCORE_DISCOVERY_PCI_DOMAIN_OFFSET | - dev->bus->number << UNCORE_DISCOVERY_PCI_BUS_OFFSET | - devfn << UNCORE_DISCOVERY_PCI_DEVFN_OFFSET | - type->box_ctl; + unit = kzalloc(sizeof(*unit), GFP_KERNEL); + if (!unit) + continue; + unit->die = die; + unit->id = PCI_SLOT(dev->devfn) - PCI_SLOT(devfn); + unit->addr = pci_domain_nr(dev->bus) << UNCORE_DISCOVERY_PCI_DOMAIN_OFFSET | + dev->bus->number << UNCORE_DISCOVERY_PCI_BUS_OFFSET | + devfn << UNCORE_DISCOVERY_PCI_DEVFN_OFFSET | + type->box_ctl; + + unit->pmu_idx = unit->id; + + uncore_find_add_unit(unit, root, NULL); } - type->box_ctls = ctls; + type->boxes = root; } int spr_uncore_pci_init(void) @@ -6622,7 +6708,7 @@ }; static struct intel_uncore_type gnr_uncore_b2cxl = { - SPR_UNCORE_MMIO_COMMON_FORMAT(), + SPR_UNCORE_MMIO_OFFS8_COMMON_FORMAT(), .name = "b2cxl", }; --- linux-xilinx-6.8.0.orig/arch/x86/events/perf_event.h +++ linux-xilinx-6.8.0/arch/x86/events/perf_event.h @@ -684,9 +684,15 @@ cpumask_t supported_cpus; union perf_capabilities intel_cap; u64 intel_ctrl; - int max_pebs_events; - int num_counters; - int num_counters_fixed; + u64 pebs_events_mask; + union { + u64 cntr_mask64; + unsigned long cntr_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)]; + }; + union { + u64 fixed_cntr_mask64; + unsigned long fixed_cntr_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)]; + }; struct event_constraint unconstrained; u64 hw_cache_event_ids @@ -774,8 +780,14 @@ int (*rdpmc_index)(int index); u64 (*event_map)(int); int max_events; - int num_counters; - int num_counters_fixed; + union { + u64 cntr_mask64; + unsigned long cntr_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)]; + }; + union { + u64 fixed_cntr_mask64; + unsigned long fixed_cntr_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)]; + }; int cntval_bits; u64 cntval_mask; union { @@ -852,7 +864,7 @@ pebs_ept :1; int pebs_record_size; int pebs_buffer_size; - int max_pebs_events; + u64 pebs_events_mask; void (*drain_pebs)(struct pt_regs *regs, struct perf_sample_data *data); struct event_constraint *pebs_constraints; void (*pebs_aliases)(struct perf_event *event); @@ -1125,8 +1137,8 @@ return x86_pmu.rdpmc_index ? x86_pmu.rdpmc_index(index) : index; } -bool check_hw_exists(struct pmu *pmu, int num_counters, - int num_counters_fixed); +bool check_hw_exists(struct pmu *pmu, unsigned long *cntr_mask, + unsigned long *fixed_cntr_mask); int x86_add_exclusive(unsigned int what); @@ -1197,8 +1209,27 @@ int x86_pmu_handle_irq(struct pt_regs *regs); -void x86_pmu_show_pmu_cap(int num_counters, int num_counters_fixed, - u64 intel_ctrl); +void x86_pmu_show_pmu_cap(struct pmu *pmu); + +static inline int x86_pmu_num_counters(struct pmu *pmu) +{ + return hweight64(hybrid(pmu, cntr_mask64)); +} + +static inline int x86_pmu_max_num_counters(struct pmu *pmu) +{ + return fls64(hybrid(pmu, cntr_mask64)); +} + +static inline int x86_pmu_num_counters_fixed(struct pmu *pmu) +{ + return hweight64(hybrid(pmu, fixed_cntr_mask64)); +} + +static inline int x86_pmu_max_num_counters_fixed(struct pmu *pmu) +{ + return fls64(hybrid(pmu, fixed_cntr_mask64)); +} extern struct event_constraint emptyconstraint; @@ -1648,6 +1679,17 @@ return !!(x86_pmu.flags & PMU_FL_EXCL_ENABLED); } +static inline u64 intel_pmu_pebs_mask(u64 cntr_mask) +{ + return MAX_PEBS_EVENTS_MASK & cntr_mask; +} + +static inline int intel_pmu_max_num_pebs(struct pmu *pmu) +{ + static_assert(MAX_PEBS_EVENTS == 32); + return fls((u32)hybrid(pmu, pebs_events_mask)); +} + #else /* CONFIG_CPU_SUP_INTEL */ static inline void reserve_ds_buffers(void) --- linux-xilinx-6.8.0.orig/arch/x86/events/zhaoxin/core.c +++ linux-xilinx-6.8.0/arch/x86/events/zhaoxin/core.c @@ -530,13 +530,13 @@ pr_info("Version check pass!\n"); x86_pmu.version = version; - x86_pmu.num_counters = eax.split.num_counters; + x86_pmu.cntr_mask64 = GENMASK_ULL(eax.split.num_counters - 1, 0); x86_pmu.cntval_bits = eax.split.bit_width; x86_pmu.cntval_mask = (1ULL << eax.split.bit_width) - 1; x86_pmu.events_maskl = ebx.full; x86_pmu.events_mask_len = eax.split.mask_length; - x86_pmu.num_counters_fixed = edx.split.num_counters_fixed; + x86_pmu.fixed_cntr_mask64 = GENMASK_ULL(edx.split.num_counters_fixed - 1, 0); x86_add_quirk(zhaoxin_arch_events_quirk); switch (boot_cpu_data.x86) { @@ -604,13 +604,13 @@ return -ENODEV; } - x86_pmu.intel_ctrl = (1 << (x86_pmu.num_counters)) - 1; - x86_pmu.intel_ctrl |= ((1LL << x86_pmu.num_counters_fixed)-1) << INTEL_PMC_IDX_FIXED; + x86_pmu.intel_ctrl = x86_pmu.cntr_mask64; + x86_pmu.intel_ctrl |= x86_pmu.fixed_cntr_mask64 << INTEL_PMC_IDX_FIXED; if (x86_pmu.event_constraints) { for_each_event_constraint(c, x86_pmu.event_constraints) { - c->idxmsk64 |= (1ULL << x86_pmu.num_counters) - 1; - c->weight += x86_pmu.num_counters; + c->idxmsk64 |= x86_pmu.cntr_mask64; + c->weight += x86_pmu_num_counters(NULL); } } --- linux-xilinx-6.8.0.orig/arch/x86/hyperv/hv_init.c +++ linux-xilinx-6.8.0/arch/x86/hyperv/hv_init.c @@ -35,7 +35,6 @@ #include #include -int hyperv_init_cpuhp; u64 hv_current_partition_id = ~0ull; EXPORT_SYMBOL_GPL(hv_current_partition_id); @@ -607,8 +606,6 @@ register_syscore_ops(&hv_syscore_ops); - hyperv_init_cpuhp = cpuhp; - if (cpuid_ebx(HYPERV_CPUID_FEATURES) & HV_ACCESS_PARTITION_ID) hv_get_partition_id(); @@ -637,7 +634,7 @@ clean_guest_os_id: wrmsrl(HV_X64_MSR_GUEST_OS_ID, 0); hv_ivm_msr_write(HV_X64_MSR_GUEST_OS_ID, 0); - cpuhp_remove_state(cpuhp); + cpuhp_remove_state(CPUHP_AP_HYPERV_ONLINE); free_ghcb_page: free_percpu(hv_ghcb_pg); free_vp_assist_page: --- linux-xilinx-6.8.0.orig/arch/x86/hyperv/hv_vtl.c +++ linux-xilinx-6.8.0/arch/x86/hyperv/hv_vtl.c @@ -12,6 +12,7 @@ #include #include #include +#include <../kernel/smpboot.h> extern struct boot_params boot_params; static struct real_mode_header hv_vtl_real_mode_header; @@ -64,7 +65,7 @@ ((secondary_startup_64_fn)secondary_startup_64)(&boot_params, &boot_params); } -static int hv_vtl_bringup_vcpu(u32 target_vp_index, u64 eip_ignored) +static int hv_vtl_bringup_vcpu(u32 target_vp_index, int cpu, u64 eip_ignored) { u64 status; int ret = 0; @@ -78,7 +79,9 @@ struct ldttss_desc *ldt; struct desc_struct *gdt; - u64 rsp = current->thread.sp; + struct task_struct *idle = idle_thread_get(cpu); + u64 rsp = (unsigned long)idle->thread.sp; + u64 rip = (u64)&hv_vtl_ap_entry; native_store_gdt(&gdt_ptr); @@ -205,7 +208,15 @@ static int hv_vtl_wakeup_secondary_cpu(u32 apicid, unsigned long start_eip) { - int vp_id; + int vp_id, cpu; + + /* Find the logical CPU for the APIC ID */ + for_each_present_cpu(cpu) { + if (arch_match_cpu_phys_id(cpu, apicid)) + break; + } + if (cpu >= nr_cpu_ids) + return -EINVAL; pr_debug("Bringing up CPU with APIC ID %d in VTL2...\n", apicid); vp_id = hv_vtl_apicid_to_vp_id(apicid); @@ -219,7 +230,7 @@ return -EINVAL; } - return hv_vtl_bringup_vcpu(vp_id, start_eip); + return hv_vtl_bringup_vcpu(vp_id, cpu, start_eip); } int __init hv_vtl_early_init(void) --- linux-xilinx-6.8.0.orig/arch/x86/hyperv/ivm.c +++ linux-xilinx-6.8.0/arch/x86/hyperv/ivm.c @@ -523,9 +523,9 @@ * transition is complete, hv_vtom_set_host_visibility() marks the pages * as "present" again. */ -static bool hv_vtom_clear_present(unsigned long kbuffer, int pagecount, bool enc) +static int hv_vtom_clear_present(unsigned long kbuffer, int pagecount, bool enc) { - return !set_memory_np(kbuffer, pagecount); + return set_memory_np(kbuffer, pagecount); } /* @@ -536,20 +536,19 @@ * with host. This function works as wrap of hv_mark_gpa_visibility() * with memory base and size. */ -static bool hv_vtom_set_host_visibility(unsigned long kbuffer, int pagecount, bool enc) +static int hv_vtom_set_host_visibility(unsigned long kbuffer, int pagecount, bool enc) { enum hv_mem_host_visibility visibility = enc ? VMBUS_PAGE_NOT_VISIBLE : VMBUS_PAGE_VISIBLE_READ_WRITE; u64 *pfn_array; phys_addr_t paddr; + int i, pfn, err; void *vaddr; int ret = 0; - bool result = true; - int i, pfn; pfn_array = kmalloc(HV_HYP_PAGE_SIZE, GFP_KERNEL); if (!pfn_array) { - result = false; + ret = -ENOMEM; goto err_set_memory_p; } @@ -568,10 +567,8 @@ if (pfn == HV_MAX_MODIFY_GPA_REP_COUNT || i == pagecount - 1) { ret = hv_mark_gpa_visibility(pfn, pfn_array, visibility); - if (ret) { - result = false; + if (ret) goto err_free_pfn_array; - } pfn = 0; } } @@ -586,10 +583,11 @@ * order to avoid leaving the memory range in a "broken" state. Setting * the PRESENT bits shouldn't fail, but return an error if it does. */ - if (set_memory_p(kbuffer, pagecount)) - result = false; + err = set_memory_p(kbuffer, pagecount); + if (err && !ret) + ret = err; - return result; + return ret; } static bool hv_vtom_tlb_flush_required(bool private) --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/acpi.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/acpi.h @@ -165,6 +165,14 @@ void x86_default_set_root_pointer(u64 addr); u64 x86_default_get_root_pointer(void); +#ifdef CONFIG_XEN_PV +/* A Xen PV domain needs a special acpi_os_ioremap() handling. */ +extern void __iomem * (*acpi_os_ioremap)(acpi_physical_address phys, + acpi_size size); +void __iomem *x86_acpi_os_ioremap(acpi_physical_address phys, acpi_size size); +#define acpi_os_ioremap acpi_os_ioremap +#endif + #else /* !CONFIG_ACPI */ #define acpi_lapic 0 --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/alternative.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/alternative.h @@ -294,10 +294,10 @@ * Otherwise, if CPU has feature1, newinstr1 is used. * Otherwise, oldinstr is used. */ -#define alternative_input_2(oldinstr, newinstr1, ft_flags1, newinstr2, \ - ft_flags2, input...) \ - asm_inline volatile(ALTERNATIVE_2(oldinstr, newinstr1, ft_flags1, \ - newinstr2, ft_flags2) \ +#define alternative_input_2(oldinstr, newinstr1, ft_flags1, newinstr2, \ + ft_flags2, input...) \ + asm_inline volatile(ALTERNATIVE_2(oldinstr, newinstr1, ft_flags1, \ + newinstr2, ft_flags2) \ : : "i" (0), ## input) /* Like alternative_input, but with a single output argument */ @@ -307,7 +307,7 @@ /* Like alternative_io, but for replacing a direct call with another one. */ #define alternative_call(oldfunc, newfunc, ft_flags, output, input...) \ - asm_inline volatile (ALTERNATIVE("call %P[old]", "call %P[new]", ft_flags) \ + asm_inline volatile (ALTERNATIVE("call %c[old]", "call %c[new]", ft_flags) \ : output : [old] "i" (oldfunc), [new] "i" (newfunc), ## input) /* @@ -316,12 +316,12 @@ * Otherwise, if CPU has feature1, function1 is used. * Otherwise, old function is used. */ -#define alternative_call_2(oldfunc, newfunc1, ft_flags1, newfunc2, ft_flags2, \ - output, input...) \ - asm_inline volatile (ALTERNATIVE_2("call %P[old]", "call %P[new1]", ft_flags1,\ - "call %P[new2]", ft_flags2) \ - : output, ASM_CALL_CONSTRAINT \ - : [old] "i" (oldfunc), [new1] "i" (newfunc1), \ +#define alternative_call_2(oldfunc, newfunc1, ft_flags1, newfunc2, ft_flags2, \ + output, input...) \ + asm_inline volatile (ALTERNATIVE_2("call %c[old]", "call %c[new1]", ft_flags1, \ + "call %c[new2]", ft_flags2) \ + : output, ASM_CALL_CONSTRAINT \ + : [old] "i" (oldfunc), [new1] "i" (newfunc1), \ [new2] "i" (newfunc2), ## input) /* --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/amd_nb.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/amd_nb.h @@ -116,7 +116,10 @@ #define amd_nb_num(x) 0 #define amd_nb_has_feature(x) false -#define node_to_amd_nb(x) NULL +static inline struct amd_northbridge *node_to_amd_nb(int node) +{ + return NULL; +} #define amd_gart_present(x) false #endif --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/apic.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/apic.h @@ -13,6 +13,7 @@ #include #include #include +#include #define ARCH_APICTIMER_STOPS_ON_C3 1 @@ -96,7 +97,7 @@ static inline u32 native_apic_mem_read(u32 reg) { - return *((volatile u32 *)(APIC_BASE + reg)); + return readl((void __iomem *)(APIC_BASE + reg)); } static inline void native_apic_mem_eoi(void) @@ -336,20 +337,12 @@ * APIC drivers are probed based on how they are listed in the .apicdrivers * section. So the order is important and enforced by the ordering * of different apic driver files in the Makefile. - * - * For the files having two apic drivers, we use apic_drivers() - * to enforce the order with in them. */ #define apic_driver(sym) \ static const struct apic *__apicdrivers_##sym __used \ __aligned(sizeof(struct apic *)) \ __section(".apicdrivers") = { &sym } -#define apic_drivers(sym1, sym2) \ - static struct apic *__apicdrivers_##sym1##sym2[2] __used \ - __aligned(sizeof(struct apic *)) \ - __section(".apicdrivers") = { &sym1, &sym2 } - extern struct apic *__apicdrivers[], *__apicdrivers_end[]; /* --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/asm-prototypes.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/asm-prototypes.h @@ -13,8 +13,12 @@ #include #include #include +#include #ifndef CONFIG_X86_CMPXCHG64 extern void cmpxchg8b_emu(void); #endif +#if defined(__GENKSYMS__) && defined(CONFIG_STACKPROTECTOR) +extern unsigned long __ref_stack_chk_guard; +#endif --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/asm.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/asm.h @@ -113,6 +113,20 @@ #endif +#ifndef __ASSEMBLY__ +#ifndef __pic__ +static __always_inline __pure void *rip_rel_ptr(void *p) +{ + asm("leaq %c1(%%rip), %0" : "=r"(p) : "i"(p)); + + return p; +} +#define RIP_REL_REF(var) (*(typeof(&(var)))rip_rel_ptr(&(var))) +#else +#define RIP_REL_REF(var) (var) +#endif +#endif + /* * Macros to generate condition code outputs from inline assembly, * The output operand must be type "bool". --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/atomic64_32.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/atomic64_32.h @@ -24,7 +24,7 @@ #ifdef CONFIG_X86_CMPXCHG64 #define __alternative_atomic64(f, g, out, in...) \ - asm volatile("call %P[func]" \ + asm volatile("call %c[func]" \ : out : [func] "i" (atomic64_##g##_cx8), ## in) #define ATOMIC64_DECL(sym) ATOMIC64_DECL_ONE(sym##_cx8) --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/barrier.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/barrier.h @@ -79,6 +79,9 @@ #define __smp_mb__before_atomic() do { } while (0) #define __smp_mb__after_atomic() do { } while (0) +/* Writing to CR3 provides a full memory barrier in switch_mm(). */ +#define smp_mb__after_switch_mm() do { } while (0) + #include #endif /* _ASM_X86_BARRIER_H */ --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/boot.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/boot.h @@ -81,6 +81,7 @@ #ifndef __ASSEMBLY__ extern unsigned int output_len; +extern const unsigned long kernel_text_size; extern const unsigned long kernel_total_size; unsigned long decompress_kernel(unsigned char *outbuf, unsigned long virt_addr, --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/bug.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/bug.h @@ -13,6 +13,18 @@ #define INSN_UD2 0x0b0f #define LEN_UD2 2 +/* + * In clang we have UD1s reporting UBSAN failures on X86, 64 and 32bit. + */ +#define INSN_ASOP 0x67 +#define OPCODE_ESCAPE 0x0f +#define SECOND_BYTE_OPCODE_UD1 0xb9 +#define SECOND_BYTE_OPCODE_UD2 0x0b + +#define BUG_NONE 0xffff +#define BUG_UD1 0xfffe +#define BUG_UD2 0xfffd + #ifdef CONFIG_GENERIC_BUG #ifdef CONFIG_X86_32 --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/cmpxchg_64.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/cmpxchg_64.h @@ -62,7 +62,7 @@ asm volatile(_lock "cmpxchg16b %[ptr]" \ CC_SET(e) \ : CC_OUT(e) (ret), \ - [ptr] "+m" (*ptr), \ + [ptr] "+m" (*(_ptr)), \ "+a" (o.low), "+d" (o.high) \ : "b" (n.low), "c" (n.high) \ : "memory"); \ --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/coco.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/coco.h @@ -2,6 +2,7 @@ #ifndef _ASM_X86_COCO_H #define _ASM_X86_COCO_H +#include #include enum cc_vendor { @@ -12,11 +13,18 @@ #ifdef CONFIG_ARCH_HAS_CC_PLATFORM extern enum cc_vendor cc_vendor; -void cc_set_mask(u64 mask); +extern u64 cc_mask; +static inline void cc_set_mask(u64 mask) +{ + RIP_REL_REF(cc_mask) = mask; +} + u64 cc_mkenc(u64 val); u64 cc_mkdec(u64 val); +void cc_random_init(void); #else #define cc_vendor (CC_VENDOR_NONE) +static const u64 cc_mask = 0; static inline u64 cc_mkenc(u64 val) { @@ -27,6 +35,7 @@ { return val; } +static inline void cc_random_init(void) { } #endif #endif /* _ASM_X86_COCO_H */ --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/cpu_device_id.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/cpu_device_id.h @@ -3,6 +3,39 @@ #define _ASM_X86_CPU_DEVICE_ID /* + * Can't use because it generates expressions that + * cannot be used in structure initializers. Bitfield construction + * here must match the union in struct cpuinfo_86: + * union { + * struct { + * __u8 x86_model; + * __u8 x86; + * __u8 x86_vendor; + * __u8 x86_reserved; + * }; + * __u32 x86_vfm; + * }; + */ +#define VFM_MODEL_BIT 0 +#define VFM_FAMILY_BIT 8 +#define VFM_VENDOR_BIT 16 +#define VFM_RSVD_BIT 24 + +#define VFM_MODEL_MASK GENMASK(VFM_FAMILY_BIT - 1, VFM_MODEL_BIT) +#define VFM_FAMILY_MASK GENMASK(VFM_VENDOR_BIT - 1, VFM_FAMILY_BIT) +#define VFM_VENDOR_MASK GENMASK(VFM_RSVD_BIT - 1, VFM_VENDOR_BIT) + +#define VFM_MODEL(vfm) (((vfm) & VFM_MODEL_MASK) >> VFM_MODEL_BIT) +#define VFM_FAMILY(vfm) (((vfm) & VFM_FAMILY_MASK) >> VFM_FAMILY_BIT) +#define VFM_VENDOR(vfm) (((vfm) & VFM_VENDOR_MASK) >> VFM_VENDOR_BIT) + +#define VFM_MAKE(_vendor, _family, _model) ( \ + ((_model) << VFM_MODEL_BIT) | \ + ((_family) << VFM_FAMILY_BIT) | \ + ((_vendor) << VFM_VENDOR_BIT) \ +) + +/* * Declare drivers belonging to specific x86 CPUs * Similar in spirit to pci_device_id and related PCI functions * @@ -20,6 +53,9 @@ #define X86_CENTAUR_FAM6_C7_D 0xd #define X86_CENTAUR_FAM6_NANO 0xf +/* x86_cpu_id::flags */ +#define X86_CPU_ID_FLAG_ENTRY_VALID BIT(0) + #define X86_STEPPINGS(mins, maxs) GENMASK(maxs, mins) /** * X86_MATCH_VENDOR_FAM_MODEL_STEPPINGS_FEATURE - Base macro for CPU matching @@ -46,6 +82,18 @@ .model = _model, \ .steppings = _steppings, \ .feature = _feature, \ + .flags = X86_CPU_ID_FLAG_ENTRY_VALID, \ + .driver_data = (unsigned long) _data \ +} + +#define X86_MATCH_VENDORID_FAM_MODEL_STEPPINGS_FEATURE(_vendor, _family, _model, \ + _steppings, _feature, _data) { \ + .vendor = _vendor, \ + .family = _family, \ + .model = _model, \ + .steppings = _steppings, \ + .feature = _feature, \ + .flags = X86_CPU_ID_FLAG_ENTRY_VALID, \ .driver_data = (unsigned long) _data \ } @@ -164,6 +212,56 @@ X86_MATCH_VENDOR_FAM_MODEL_STEPPINGS_FEATURE(INTEL, 6, INTEL_FAM6_##model, \ steppings, X86_FEATURE_ANY, data) +/** + * X86_MATCH_VFM - Match encoded vendor/family/model + * @vfm: Encoded 8-bits each for vendor, family, model + * @data: Driver specific data or NULL. The internal storage + * format is unsigned long. The supplied value, pointer + * etc. is cast to unsigned long internally. + * + * Stepping and feature are set to wildcards + */ +#define X86_MATCH_VFM(vfm, data) \ + X86_MATCH_VENDORID_FAM_MODEL_STEPPINGS_FEATURE( \ + VFM_VENDOR(vfm), \ + VFM_FAMILY(vfm), \ + VFM_MODEL(vfm), \ + X86_STEPPING_ANY, X86_FEATURE_ANY, data) + +/** + * X86_MATCH_VFM_STEPPINGS - Match encoded vendor/family/model/stepping + * @vfm: Encoded 8-bits each for vendor, family, model + * @steppings: Bitmask of steppings to match + * @data: Driver specific data or NULL. The internal storage + * format is unsigned long. The supplied value, pointer + * etc. is cast to unsigned long internally. + * + * feature is set to wildcard + */ +#define X86_MATCH_VFM_STEPPINGS(vfm, steppings, data) \ + X86_MATCH_VENDORID_FAM_MODEL_STEPPINGS_FEATURE( \ + VFM_VENDOR(vfm), \ + VFM_FAMILY(vfm), \ + VFM_MODEL(vfm), \ + steppings, X86_FEATURE_ANY, data) + +/** + * X86_MATCH_VFM_FEATURE - Match encoded vendor/family/model/feature + * @vfm: Encoded 8-bits each for vendor, family, model + * @feature: A X86_FEATURE bit + * @data: Driver specific data or NULL. The internal storage + * format is unsigned long. The supplied value, pointer + * etc. is cast to unsigned long internally. + * + * Steppings is set to wildcard + */ +#define X86_MATCH_VFM_FEATURE(vfm, feature, data) \ + X86_MATCH_VENDORID_FAM_MODEL_STEPPINGS_FEATURE( \ + VFM_VENDOR(vfm), \ + VFM_FAMILY(vfm), \ + VFM_MODEL(vfm), \ + X86_STEPPING_ANY, feature, data) + /* * Match specific microcode revisions. * @@ -188,6 +286,14 @@ .x86_model = (model), \ .x86_stepping = (stepping), \ .x86_microcode_rev = (revision), \ +} + +#define AMD_CPU_DESC(fam, model, stepping, revision) { \ + .x86_family = (fam), \ + .x86_vendor = X86_VENDOR_AMD, \ + .x86_model = (model), \ + .x86_stepping = (stepping), \ + .x86_microcode_rev = (revision), \ } extern const struct x86_cpu_id *x86_match_cpu(const struct x86_cpu_id *match); --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/cpufeature.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/cpufeature.h @@ -33,6 +33,8 @@ CPUID_7_EDX, CPUID_8000_001F_EAX, CPUID_8000_0021_EAX, + CPUID_LNX_5, + NR_CPUID_WORDS, }; #define X86_CAP_FMT_NUM "%d:%d" @@ -91,8 +93,9 @@ CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 18, feature_bit) || \ CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 19, feature_bit) || \ CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 20, feature_bit) || \ + CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 21, feature_bit) || \ REQUIRED_MASK_CHECK || \ - BUILD_BUG_ON_ZERO(NCAPINTS != 21)) + BUILD_BUG_ON_ZERO(NCAPINTS != 22)) #define DISABLED_MASK_BIT_SET(feature_bit) \ ( CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 0, feature_bit) || \ @@ -116,8 +119,9 @@ CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 18, feature_bit) || \ CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 19, feature_bit) || \ CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 20, feature_bit) || \ + CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 21, feature_bit) || \ DISABLED_MASK_CHECK || \ - BUILD_BUG_ON_ZERO(NCAPINTS != 21)) + BUILD_BUG_ON_ZERO(NCAPINTS != 22)) #define cpu_has(c, bit) \ (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \ @@ -169,7 +173,7 @@ static __always_inline bool _static_cpu_has(u16 bit) { asm goto( - ALTERNATIVE_TERNARY("jmp 6f", %P[feature], "", "jmp %l[t_no]") + ALTERNATIVE_TERNARY("jmp 6f", %c[feature], "", "jmp %l[t_no]") ".pushsection .altinstr_aux,\"ax\"\n" "6:\n" " testb %[bitnum]," _ASM_RIP(%P[cap_byte]) "\n" --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/cpufeatures.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/cpufeatures.h @@ -13,7 +13,7 @@ /* * Defines x86 CPU feature bits */ -#define NCAPINTS 21 /* N 32-bit words worth of info */ +#define NCAPINTS 22 /* N 32-bit words worth of info */ #define NBUGINTS 2 /* N 32-bit bug flags */ /* @@ -215,7 +215,7 @@ #define X86_FEATURE_SPEC_STORE_BYPASS_DISABLE ( 7*32+23) /* "" Disable Speculative Store Bypass. */ #define X86_FEATURE_LS_CFG_SSBD ( 7*32+24) /* "" AMD SSBD implementation via LS_CFG MSR */ #define X86_FEATURE_IBRS ( 7*32+25) /* Indirect Branch Restricted Speculation */ -#define X86_FEATURE_IBPB ( 7*32+26) /* Indirect Branch Prediction Barrier */ +#define X86_FEATURE_IBPB ( 7*32+26) /* Indirect Branch Prediction Barrier without a guaranteed RSB flush */ #define X86_FEATURE_STIBP ( 7*32+27) /* Single Thread Indirect Branch Predictors */ #define X86_FEATURE_ZEN ( 7*32+28) /* "" Generic flag for all Zen and newer */ #define X86_FEATURE_L1TF_PTEINV ( 7*32+29) /* "" L1TF workaround PTE inversion */ @@ -346,6 +346,7 @@ #define X86_FEATURE_CPPC (13*32+27) /* Collaborative Processor Performance Control */ #define X86_FEATURE_AMD_PSFD (13*32+28) /* "" Predictive Store Forwarding Disable */ #define X86_FEATURE_BTC_NO (13*32+29) /* "" Not vulnerable to Branch Type Confusion */ +#define X86_FEATURE_AMD_IBPB_RET (13*32+30) /* IBPB clears return address predictor */ #define X86_FEATURE_BRS (13*32+31) /* Branch Sampling available */ /* Thermal and Power Management Leaf, CPUID level 0x00000006 (EAX), word 14 */ @@ -359,6 +360,7 @@ #define X86_FEATURE_HWP_ACT_WINDOW (14*32+ 9) /* HWP Activity Window */ #define X86_FEATURE_HWP_EPP (14*32+10) /* HWP Energy Perf. Preference */ #define X86_FEATURE_HWP_PKG_REQ (14*32+11) /* HWP Package Level Request */ +#define X86_FEATURE_HWP_HIGHEST_PERF_CHANGE (14*32+15) /* "" HWP Highest perf change */ #define X86_FEATURE_HFI (14*32+19) /* Hardware Feedback Interface */ /* AMD SVM Feature Identification, CPUID level 0x8000000a (EDX), word 15 */ @@ -457,6 +459,17 @@ #define X86_FEATURE_SRSO_NO (20*32+29) /* "" CPU is not affected by SRSO */ /* + * Extended auxiliary flags: Linux defined - for features scattered in various + * CPUID levels like 0x80000022, etc and Linux defined features. + * + * Reuse free bits when adding new feature flags! + */ +#define X86_FEATURE_CLEAR_BHB_LOOP (21*32+ 1) /* "" Clear branch history at syscall entry using SW loop */ +#define X86_FEATURE_BHI_CTRL (21*32+ 2) /* "" BHI_DIS_S HW control available */ +#define X86_FEATURE_CLEAR_BHB_HW (21*32+ 3) /* "" BHI_DIS_S HW control enabled */ +#define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* "" Clear branch history at vmexit using SW loop */ + +/* * BUG word(s) */ #define X86_BUG(x) (NCAPINTS*32 + (x)) @@ -503,4 +516,7 @@ /* BUG word 2 */ #define X86_BUG_SRSO X86_BUG(1*32 + 0) /* AMD SRSO bug */ #define X86_BUG_DIV0 X86_BUG(1*32 + 1) /* AMD DIV0 speculation bug */ +#define X86_BUG_RFDS X86_BUG(1*32 + 2) /* CPU is vulnerable to Register File Data Sampling */ +#define X86_BUG_BHI X86_BUG(1*32 + 3) /* CPU is affected by Branch History Injection */ +#define X86_BUG_IBPB_NO_RET X86_BUG(1*32 + 4) /* "ibpb_no_ret" IBPB omits return target predictions */ #endif /* _ASM_X86_CPUFEATURES_H */ --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/crash_core.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/crash_core.h @@ -39,4 +39,6 @@ #endif } +#define HAVE_ARCH_ADD_CRASH_RES_TO_IOMEM_EARLY + #endif /* _X86_CRASH_CORE_H */ --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/disabled-features.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/disabled-features.h @@ -143,6 +143,7 @@ #define DISABLED_MASK18 (DISABLE_IBT) #define DISABLED_MASK19 0 #define DISABLED_MASK20 0 -#define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 21) +#define DISABLED_MASK21 0 +#define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 22) #endif /* _ASM_X86_DISABLED_FEATURES_H */ --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/efi.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/efi.h @@ -410,7 +410,6 @@ struct efi_memory_map_data *data); extern void __efi_memmap_free(u64 phys, unsigned long size, unsigned long flags); -#define __efi_memmap_free __efi_memmap_free extern int __init efi_memmap_install(struct efi_memory_map_data *data); extern int __init efi_memmap_split_count(efi_memory_desc_t *md, --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/entry-common.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/entry-common.h @@ -73,19 +73,16 @@ #endif /* - * Ultimately, this value will get limited by KSTACK_OFFSET_MAX(), - * but not enough for x86 stack utilization comfort. To keep - * reasonable stack head room, reduce the maximum offset to 8 bits. - * - * The actual entropy will be further reduced by the compiler when - * applying stack alignment constraints (see cc_stack_align4/8 in + * This value will get limited by KSTACK_OFFSET_MAX(), which is 10 + * bits. The actual entropy will be further reduced by the compiler + * when applying stack alignment constraints (see cc_stack_align4/8 in * arch/x86/Makefile), which will remove the 3 (x86_64) or 2 (ia32) * low bits from any entropy chosen here. * - * Therefore, final stack offset entropy will be 5 (x86_64) or - * 6 (ia32) bits. + * Therefore, final stack offset entropy will be 7 (x86_64) or + * 8 (ia32) bits. */ - choose_random_kstack_offset(rdtsc() & 0xFF); + choose_random_kstack_offset(rdtsc()); } #define arch_exit_to_user_mode_prepare arch_exit_to_user_mode_prepare --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/fpu/signal.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/fpu/signal.h @@ -29,7 +29,7 @@ unsigned long fpu__get_fpstate_size(void); -extern bool copy_fpstate_to_sigframe(void __user *buf, void __user *fp, int size); +extern bool copy_fpstate_to_sigframe(void __user *buf, void __user *fp, int size, u32 pkru); extern void fpu__clear_user_states(struct fpu *fpu); extern bool fpu__restore_sig(void __user *buf, int ia32_frame); --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/fpu/types.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/fpu/types.h @@ -591,6 +591,13 @@ * even without XSAVE support, i.e. legacy features FP + SSE */ u64 legacy_features; + /* + * @independent_features: + * + * Features that are supported by XSAVES, but not managed as part of + * the FPU core, such as LBR + */ + u64 independent_features; }; /* FPU state configuration information */ --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/hardirq.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/hardirq.h @@ -63,7 +63,11 @@ #define local_softirq_pending_ref pcpu_hot.softirq_pending #if IS_ENABLED(CONFIG_KVM_INTEL) -static inline void kvm_set_cpu_l1tf_flush_l1d(void) +/* + * This function is called from noinstr interrupt contexts + * and must be inlined to not get instrumentation. + */ +static __always_inline void kvm_set_cpu_l1tf_flush_l1d(void) { __this_cpu_write(irq_stat.kvm_cpu_l1tf_flush_l1d, 1); } @@ -78,7 +82,7 @@ return __this_cpu_read(irq_stat.kvm_cpu_l1tf_flush_l1d); } #else /* !IS_ENABLED(CONFIG_KVM_INTEL) */ -static inline void kvm_set_cpu_l1tf_flush_l1d(void) { } +static __always_inline void kvm_set_cpu_l1tf_flush_l1d(void) { } #endif /* IS_ENABLED(CONFIG_KVM_INTEL) */ #endif /* _ASM_X86_HARDIRQ_H */ --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/idtentry.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/idtentry.h @@ -13,15 +13,18 @@ #include +typedef void (*idtentry_t)(struct pt_regs *regs); + /** * DECLARE_IDTENTRY - Declare functions for simple IDT entry points * No error code pushed by hardware * @vector: Vector number (ignored for C) * @func: Function name of the entry point * - * Declares three functions: + * Declares four functions: * - The ASM entry point: asm_##func * - The XEN PV trap entry point: xen_##func (maybe unused) + * - The C handler called from the FRED event dispatcher (maybe unused) * - The C handler called from the ASM entry point * * Note: This is the C variant of DECLARE_IDTENTRY(). As the name says it @@ -31,6 +34,7 @@ #define DECLARE_IDTENTRY(vector, func) \ asmlinkage void asm_##func(void); \ asmlinkage void xen_asm_##func(void); \ + void fred_##func(struct pt_regs *regs); \ __visible void func(struct pt_regs *regs) /** @@ -138,6 +142,17 @@ __visible noinstr void func(struct pt_regs *regs) /** + * DEFINE_FREDENTRY_RAW - Emit code for raw FRED entry points + * @func: Function name of the entry point + * + * @func is called from the FRED event dispatcher with interrupts disabled. + * + * See @DEFINE_IDTENTRY_RAW for further details. + */ +#define DEFINE_FREDENTRY_RAW(func) \ +noinstr void fred_##func(struct pt_regs *regs) + +/** * DECLARE_IDTENTRY_RAW_ERRORCODE - Declare functions for raw IDT entry points * Error code pushed by hardware * @vector: Vector number (ignored for C) @@ -197,8 +212,8 @@ irqentry_state_t state = irqentry_enter(regs); \ u32 vector = (u32)(u8)error_code; \ \ + kvm_set_cpu_l1tf_flush_l1d(); \ instrumentation_begin(); \ - kvm_set_cpu_l1tf_flush_l1d(); \ run_irq_on_irqstack_cond(__##func, regs, vector); \ instrumentation_end(); \ irqentry_exit(regs, state); \ @@ -233,17 +248,27 @@ #define DEFINE_IDTENTRY_SYSVEC(func) \ static void __##func(struct pt_regs *regs); \ \ +static __always_inline void instr_##func(struct pt_regs *regs) \ +{ \ + run_sysvec_on_irqstack_cond(__##func, regs); \ +} \ + \ __visible noinstr void func(struct pt_regs *regs) \ { \ irqentry_state_t state = irqentry_enter(regs); \ \ + kvm_set_cpu_l1tf_flush_l1d(); \ instrumentation_begin(); \ - kvm_set_cpu_l1tf_flush_l1d(); \ - run_sysvec_on_irqstack_cond(__##func, regs); \ + instr_##func (regs); \ instrumentation_end(); \ irqentry_exit(regs, state); \ } \ \ +void fred_##func(struct pt_regs *regs) \ +{ \ + instr_##func (regs); \ +} \ + \ static noinline void __##func(struct pt_regs *regs) /** @@ -260,19 +285,29 @@ #define DEFINE_IDTENTRY_SYSVEC_SIMPLE(func) \ static __always_inline void __##func(struct pt_regs *regs); \ \ +static __always_inline void instr_##func(struct pt_regs *regs) \ +{ \ + __irq_enter_raw(); \ + __##func (regs); \ + __irq_exit_raw(); \ +} \ + \ __visible noinstr void func(struct pt_regs *regs) \ { \ irqentry_state_t state = irqentry_enter(regs); \ \ + kvm_set_cpu_l1tf_flush_l1d(); \ instrumentation_begin(); \ - __irq_enter_raw(); \ - kvm_set_cpu_l1tf_flush_l1d(); \ - __##func (regs); \ - __irq_exit_raw(); \ + instr_##func (regs); \ instrumentation_end(); \ irqentry_exit(regs, state); \ } \ \ +void fred_##func(struct pt_regs *regs) \ +{ \ + instr_##func (regs); \ +} \ + \ static __always_inline void __##func(struct pt_regs *regs) /** @@ -410,15 +445,18 @@ /* C-Code mapping */ #define DECLARE_IDTENTRY_NMI DECLARE_IDTENTRY_RAW #define DEFINE_IDTENTRY_NMI DEFINE_IDTENTRY_RAW +#define DEFINE_FREDENTRY_NMI DEFINE_FREDENTRY_RAW #ifdef CONFIG_X86_64 #define DECLARE_IDTENTRY_MCE DECLARE_IDTENTRY_IST #define DEFINE_IDTENTRY_MCE DEFINE_IDTENTRY_IST #define DEFINE_IDTENTRY_MCE_USER DEFINE_IDTENTRY_NOIST +#define DEFINE_FREDENTRY_MCE DEFINE_FREDENTRY_RAW #define DECLARE_IDTENTRY_DEBUG DECLARE_IDTENTRY_IST #define DEFINE_IDTENTRY_DEBUG DEFINE_IDTENTRY_IST #define DEFINE_IDTENTRY_DEBUG_USER DEFINE_IDTENTRY_NOIST +#define DEFINE_FREDENTRY_DEBUG DEFINE_FREDENTRY_RAW #endif #else /* !__ASSEMBLY__ */ @@ -655,23 +693,36 @@ DECLARE_IDTENTRY_SYSVEC(REBOOT_VECTOR, sysvec_reboot); DECLARE_IDTENTRY_SYSVEC(CALL_FUNCTION_SINGLE_VECTOR, sysvec_call_function_single); DECLARE_IDTENTRY_SYSVEC(CALL_FUNCTION_VECTOR, sysvec_call_function); +#else +# define fred_sysvec_reschedule_ipi NULL +# define fred_sysvec_reboot NULL +# define fred_sysvec_call_function_single NULL +# define fred_sysvec_call_function NULL #endif #ifdef CONFIG_X86_LOCAL_APIC # ifdef CONFIG_X86_MCE_THRESHOLD DECLARE_IDTENTRY_SYSVEC(THRESHOLD_APIC_VECTOR, sysvec_threshold); +# else +# define fred_sysvec_threshold NULL # endif # ifdef CONFIG_X86_MCE_AMD DECLARE_IDTENTRY_SYSVEC(DEFERRED_ERROR_VECTOR, sysvec_deferred_error); +# else +# define fred_sysvec_deferred_error NULL # endif # ifdef CONFIG_X86_THERMAL_VECTOR DECLARE_IDTENTRY_SYSVEC(THERMAL_APIC_VECTOR, sysvec_thermal); +# else +# define fred_sysvec_thermal NULL # endif # ifdef CONFIG_IRQ_WORK DECLARE_IDTENTRY_SYSVEC(IRQ_WORK_VECTOR, sysvec_irq_work); +# else +# define fred_sysvec_irq_work NULL # endif #endif @@ -679,12 +730,16 @@ DECLARE_IDTENTRY_SYSVEC(POSTED_INTR_VECTOR, sysvec_kvm_posted_intr_ipi); DECLARE_IDTENTRY_SYSVEC(POSTED_INTR_WAKEUP_VECTOR, sysvec_kvm_posted_intr_wakeup_ipi); DECLARE_IDTENTRY_SYSVEC(POSTED_INTR_NESTED_VECTOR, sysvec_kvm_posted_intr_nested_ipi); +#else +# define fred_sysvec_kvm_posted_intr_ipi NULL +# define fred_sysvec_kvm_posted_intr_wakeup_ipi NULL +# define fred_sysvec_kvm_posted_intr_nested_ipi NULL #endif #if IS_ENABLED(CONFIG_HYPERV) DECLARE_IDTENTRY_SYSVEC(HYPERVISOR_CALLBACK_VECTOR, sysvec_hyperv_callback); DECLARE_IDTENTRY_SYSVEC(HYPERV_REENLIGHTENMENT_VECTOR, sysvec_hyperv_reenlightenment); -DECLARE_IDTENTRY_SYSVEC(HYPERV_STIMER0_VECTOR, sysvec_hyperv_stimer0); +DECLARE_IDTENTRY_SYSVEC(HYPERV_STIMER0_VECTOR, sysvec_hyperv_stimer0); #endif #if IS_ENABLED(CONFIG_ACRN_GUEST) --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/intel-family.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/intel-family.h @@ -40,136 +40,221 @@ * their own names :-( */ +#define IFM(_fam, _model) VFM_MAKE(X86_VENDOR_INTEL, _fam, _model) + /* Wildcard match for FAM6 so X86_MATCH_INTEL_FAM6_MODEL(ANY) works */ #define INTEL_FAM6_ANY X86_MODEL_ANY +/* Wildcard match for FAM6 so X86_MATCH_VFM(ANY) works */ +#define INTEL_ANY IFM(X86_FAMILY_ANY, X86_MODEL_ANY) #define INTEL_FAM6_CORE_YONAH 0x0E +#define INTEL_CORE_YONAH IFM(6, 0x0E) #define INTEL_FAM6_CORE2_MEROM 0x0F +#define INTEL_CORE2_MEROM IFM(6, 0x0F) #define INTEL_FAM6_CORE2_MEROM_L 0x16 +#define INTEL_CORE2_MEROM_L IFM(6, 0x16) #define INTEL_FAM6_CORE2_PENRYN 0x17 +#define INTEL_CORE2_PENRYN IFM(6, 0x17) #define INTEL_FAM6_CORE2_DUNNINGTON 0x1D +#define INTEL_CORE2_DUNNINGTON IFM(6, 0x1D) #define INTEL_FAM6_NEHALEM 0x1E +#define INTEL_NEHALEM IFM(6, 0x1E) #define INTEL_FAM6_NEHALEM_G 0x1F /* Auburndale / Havendale */ +#define INTEL_NEHALEM_G IFM(6, 0x1F) /* Auburndale / Havendale */ #define INTEL_FAM6_NEHALEM_EP 0x1A +#define INTEL_NEHALEM_EP IFM(6, 0x1A) #define INTEL_FAM6_NEHALEM_EX 0x2E +#define INTEL_NEHALEM_EX IFM(6, 0x2E) #define INTEL_FAM6_WESTMERE 0x25 +#define INTEL_WESTMERE IFM(6, 0x25) #define INTEL_FAM6_WESTMERE_EP 0x2C +#define INTEL_WESTMERE_EP IFM(6, 0x2C) #define INTEL_FAM6_WESTMERE_EX 0x2F +#define INTEL_WESTMERE_EX IFM(6, 0x2F) #define INTEL_FAM6_SANDYBRIDGE 0x2A +#define INTEL_SANDYBRIDGE IFM(6, 0x2A) #define INTEL_FAM6_SANDYBRIDGE_X 0x2D +#define INTEL_SANDYBRIDGE_X IFM(6, 0x2D) #define INTEL_FAM6_IVYBRIDGE 0x3A +#define INTEL_IVYBRIDGE IFM(6, 0x3A) #define INTEL_FAM6_IVYBRIDGE_X 0x3E +#define INTEL_IVYBRIDGE_X IFM(6, 0x3E) #define INTEL_FAM6_HASWELL 0x3C +#define INTEL_HASWELL IFM(6, 0x3C) #define INTEL_FAM6_HASWELL_X 0x3F +#define INTEL_HASWELL_X IFM(6, 0x3F) #define INTEL_FAM6_HASWELL_L 0x45 +#define INTEL_HASWELL_L IFM(6, 0x45) #define INTEL_FAM6_HASWELL_G 0x46 +#define INTEL_HASWELL_G IFM(6, 0x46) #define INTEL_FAM6_BROADWELL 0x3D +#define INTEL_BROADWELL IFM(6, 0x3D) #define INTEL_FAM6_BROADWELL_G 0x47 +#define INTEL_BROADWELL_G IFM(6, 0x47) #define INTEL_FAM6_BROADWELL_X 0x4F +#define INTEL_BROADWELL_X IFM(6, 0x4F) #define INTEL_FAM6_BROADWELL_D 0x56 +#define INTEL_BROADWELL_D IFM(6, 0x56) #define INTEL_FAM6_SKYLAKE_L 0x4E /* Sky Lake */ +#define INTEL_SKYLAKE_L IFM(6, 0x4E) /* Sky Lake */ #define INTEL_FAM6_SKYLAKE 0x5E /* Sky Lake */ +#define INTEL_SKYLAKE IFM(6, 0x5E) /* Sky Lake */ #define INTEL_FAM6_SKYLAKE_X 0x55 /* Sky Lake */ +#define INTEL_SKYLAKE_X IFM(6, 0x55) /* Sky Lake */ /* CASCADELAKE_X 0x55 Sky Lake -- s: 7 */ /* COOPERLAKE_X 0x55 Sky Lake -- s: 11 */ #define INTEL_FAM6_KABYLAKE_L 0x8E /* Sky Lake */ +#define INTEL_KABYLAKE_L IFM(6, 0x8E) /* Sky Lake */ /* AMBERLAKE_L 0x8E Sky Lake -- s: 9 */ /* COFFEELAKE_L 0x8E Sky Lake -- s: 10 */ /* WHISKEYLAKE_L 0x8E Sky Lake -- s: 11,12 */ #define INTEL_FAM6_KABYLAKE 0x9E /* Sky Lake */ +#define INTEL_KABYLAKE IFM(6, 0x9E) /* Sky Lake */ /* COFFEELAKE 0x9E Sky Lake -- s: 10-13 */ #define INTEL_FAM6_COMETLAKE 0xA5 /* Sky Lake */ +#define INTEL_COMETLAKE IFM(6, 0xA5) /* Sky Lake */ #define INTEL_FAM6_COMETLAKE_L 0xA6 /* Sky Lake */ +#define INTEL_COMETLAKE_L IFM(6, 0xA6) /* Sky Lake */ #define INTEL_FAM6_CANNONLAKE_L 0x66 /* Palm Cove */ +#define INTEL_CANNONLAKE_L IFM(6, 0x66) /* Palm Cove */ #define INTEL_FAM6_ICELAKE_X 0x6A /* Sunny Cove */ +#define INTEL_ICELAKE_X IFM(6, 0x6A) /* Sunny Cove */ #define INTEL_FAM6_ICELAKE_D 0x6C /* Sunny Cove */ +#define INTEL_ICELAKE_D IFM(6, 0x6C) /* Sunny Cove */ #define INTEL_FAM6_ICELAKE 0x7D /* Sunny Cove */ +#define INTEL_ICELAKE IFM(6, 0x7D) /* Sunny Cove */ #define INTEL_FAM6_ICELAKE_L 0x7E /* Sunny Cove */ +#define INTEL_ICELAKE_L IFM(6, 0x7E) /* Sunny Cove */ #define INTEL_FAM6_ICELAKE_NNPI 0x9D /* Sunny Cove */ +#define INTEL_ICELAKE_NNPI IFM(6, 0x9D) /* Sunny Cove */ #define INTEL_FAM6_ROCKETLAKE 0xA7 /* Cypress Cove */ +#define INTEL_ROCKETLAKE IFM(6, 0xA7) /* Cypress Cove */ #define INTEL_FAM6_TIGERLAKE_L 0x8C /* Willow Cove */ +#define INTEL_TIGERLAKE_L IFM(6, 0x8C) /* Willow Cove */ #define INTEL_FAM6_TIGERLAKE 0x8D /* Willow Cove */ +#define INTEL_TIGERLAKE IFM(6, 0x8D) /* Willow Cove */ #define INTEL_FAM6_SAPPHIRERAPIDS_X 0x8F /* Golden Cove */ +#define INTEL_SAPPHIRERAPIDS_X IFM(6, 0x8F) /* Golden Cove */ #define INTEL_FAM6_EMERALDRAPIDS_X 0xCF +#define INTEL_EMERALDRAPIDS_X IFM(6, 0xCF) #define INTEL_FAM6_GRANITERAPIDS_X 0xAD +#define INTEL_GRANITERAPIDS_X IFM(6, 0xAD) #define INTEL_FAM6_GRANITERAPIDS_D 0xAE +#define INTEL_GRANITERAPIDS_D IFM(6, 0xAE) /* "Hybrid" Processors (P-Core/E-Core) */ #define INTEL_FAM6_LAKEFIELD 0x8A /* Sunny Cove / Tremont */ +#define INTEL_LAKEFIELD IFM(6, 0x8A) /* Sunny Cove / Tremont */ #define INTEL_FAM6_ALDERLAKE 0x97 /* Golden Cove / Gracemont */ +#define INTEL_ALDERLAKE IFM(6, 0x97) /* Golden Cove / Gracemont */ #define INTEL_FAM6_ALDERLAKE_L 0x9A /* Golden Cove / Gracemont */ +#define INTEL_ALDERLAKE_L IFM(6, 0x9A) /* Golden Cove / Gracemont */ #define INTEL_FAM6_RAPTORLAKE 0xB7 /* Raptor Cove / Enhanced Gracemont */ +#define INTEL_RAPTORLAKE IFM(6, 0xB7) /* Raptor Cove / Enhanced Gracemont */ #define INTEL_FAM6_RAPTORLAKE_P 0xBA +#define INTEL_RAPTORLAKE_P IFM(6, 0xBA) #define INTEL_FAM6_RAPTORLAKE_S 0xBF +#define INTEL_RAPTORLAKE_S IFM(6, 0xBF) #define INTEL_FAM6_METEORLAKE 0xAC +#define INTEL_METEORLAKE IFM(6, 0xAC) #define INTEL_FAM6_METEORLAKE_L 0xAA +#define INTEL_METEORLAKE_L IFM(6, 0xAA) #define INTEL_FAM6_ARROWLAKE_H 0xC5 +#define INTEL_ARROWLAKE_H IFM(6, 0xC5) #define INTEL_FAM6_ARROWLAKE 0xC6 +#define INTEL_ARROWLAKE IFM(6, 0xC6) +#define INTEL_FAM6_ARROWLAKE_U 0xB5 +#define INTEL_ARROWLAKE_U IFM(6, 0xB5) #define INTEL_FAM6_LUNARLAKE_M 0xBD +#define INTEL_LUNARLAKE_M IFM(6, 0xBD) /* "Small Core" Processors (Atom/E-Core) */ #define INTEL_FAM6_ATOM_BONNELL 0x1C /* Diamondville, Pineview */ +#define INTEL_ATOM_BONNELL IFM(6, 0x1C) /* Diamondville, Pineview */ #define INTEL_FAM6_ATOM_BONNELL_MID 0x26 /* Silverthorne, Lincroft */ +#define INTEL_ATOM_BONNELL_MID IFM(6, 0x26) /* Silverthorne, Lincroft */ #define INTEL_FAM6_ATOM_SALTWELL 0x36 /* Cedarview */ +#define INTEL_ATOM_SALTWELL IFM(6, 0x36) /* Cedarview */ #define INTEL_FAM6_ATOM_SALTWELL_MID 0x27 /* Penwell */ +#define INTEL_ATOM_SALTWELL_MID IFM(6, 0x27) /* Penwell */ #define INTEL_FAM6_ATOM_SALTWELL_TABLET 0x35 /* Cloverview */ +#define INTEL_ATOM_SALTWELL_TABLET IFM(6, 0x35) /* Cloverview */ #define INTEL_FAM6_ATOM_SILVERMONT 0x37 /* Bay Trail, Valleyview */ +#define INTEL_ATOM_SILVERMONT IFM(6, 0x37) /* Bay Trail, Valleyview */ #define INTEL_FAM6_ATOM_SILVERMONT_D 0x4D /* Avaton, Rangely */ +#define INTEL_ATOM_SILVERMONT_D IFM(6, 0x4D) /* Avaton, Rangely */ #define INTEL_FAM6_ATOM_SILVERMONT_MID 0x4A /* Merriefield */ +#define INTEL_ATOM_SILVERMONT_MID IFM(6, 0x4A) /* Merriefield */ #define INTEL_FAM6_ATOM_AIRMONT 0x4C /* Cherry Trail, Braswell */ +#define INTEL_ATOM_AIRMONT IFM(6, 0x4C) /* Cherry Trail, Braswell */ #define INTEL_FAM6_ATOM_AIRMONT_MID 0x5A /* Moorefield */ +#define INTEL_ATOM_AIRMONT_MID IFM(6, 0x5A) /* Moorefield */ #define INTEL_FAM6_ATOM_AIRMONT_NP 0x75 /* Lightning Mountain */ +#define INTEL_ATOM_AIRMONT_NP IFM(6, 0x75) /* Lightning Mountain */ #define INTEL_FAM6_ATOM_GOLDMONT 0x5C /* Apollo Lake */ +#define INTEL_ATOM_GOLDMONT IFM(6, 0x5C) /* Apollo Lake */ #define INTEL_FAM6_ATOM_GOLDMONT_D 0x5F /* Denverton */ +#define INTEL_ATOM_GOLDMONT_D IFM(6, 0x5F) /* Denverton */ /* Note: the micro-architecture is "Goldmont Plus" */ #define INTEL_FAM6_ATOM_GOLDMONT_PLUS 0x7A /* Gemini Lake */ +#define INTEL_ATOM_GOLDMONT_PLUS IFM(6, 0x7A) /* Gemini Lake */ #define INTEL_FAM6_ATOM_TREMONT_D 0x86 /* Jacobsville */ +#define INTEL_ATOM_TREMONT_D IFM(6, 0x86) /* Jacobsville */ #define INTEL_FAM6_ATOM_TREMONT 0x96 /* Elkhart Lake */ +#define INTEL_ATOM_TREMONT IFM(6, 0x96) /* Elkhart Lake */ #define INTEL_FAM6_ATOM_TREMONT_L 0x9C /* Jasper Lake */ +#define INTEL_ATOM_TREMONT_L IFM(6, 0x9C) /* Jasper Lake */ #define INTEL_FAM6_ATOM_GRACEMONT 0xBE /* Alderlake N */ +#define INTEL_ATOM_GRACEMONT IFM(6, 0xBE) /* Alderlake N */ #define INTEL_FAM6_ATOM_CRESTMONT_X 0xAF /* Sierra Forest */ +#define INTEL_ATOM_CRESTMONT_X IFM(6, 0xAF) /* Sierra Forest */ #define INTEL_FAM6_ATOM_CRESTMONT 0xB6 /* Grand Ridge */ +#define INTEL_ATOM_CRESTMONT IFM(6, 0xB6) /* Grand Ridge */ #define INTEL_FAM6_ATOM_DARKMONT_X 0xDD /* Clearwater Forest */ +#define INTEL_ATOM_DARKMONT_X IFM(6, 0xDD) /* Clearwater Forest */ /* Xeon Phi */ #define INTEL_FAM6_XEON_PHI_KNL 0x57 /* Knights Landing */ +#define INTEL_XEON_PHI_KNL IFM(6, 0x57) /* Knights Landing */ #define INTEL_FAM6_XEON_PHI_KNM 0x85 /* Knights Mill */ +#define INTEL_XEON_PHI_KNM IFM(6, 0x85) /* Knights Mill */ /* Family 5 */ #define INTEL_FAM5_QUARK_X1000 0x09 /* Quark X1000 SoC */ +#define INTEL_QUARK_X1000 IFM(5, 0x09) /* Quark X1000 SoC */ #endif /* _ASM_X86_INTEL_FAMILY_H */ --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/intel_ds.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/intel_ds.h @@ -9,6 +9,7 @@ /* The maximal number of PEBS events: */ #define MAX_PEBS_EVENTS_FMT4 8 #define MAX_PEBS_EVENTS 32 +#define MAX_PEBS_EVENTS_MASK GENMASK_ULL(MAX_PEBS_EVENTS - 1, 0) #define MAX_FIXED_PEBS_EVENTS 16 /* --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/io.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/io.h @@ -379,7 +379,7 @@ const u8 *end = from + count * 64; while (from < end) { - movdir64b(dst, from); + movdir64b_io(dst, from); from += 64; } } --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/irq_stack.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/irq_stack.h @@ -100,7 +100,7 @@ } #define ASM_CALL_ARG0 \ - "call %P[__func] \n" \ + "call %c[__func] \n" \ ASM_REACHABLE #define ASM_CALL_ARG1 \ --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/kexec.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/kexec.h @@ -16,6 +16,7 @@ # define PAGES_NR 4 #endif +# define KEXEC_CONTROL_PAGE_SIZE 4096 # define KEXEC_CONTROL_CODE_MAX_SIZE 2048 #ifndef __ASSEMBLY__ @@ -44,7 +45,6 @@ /* Maximum address we can use for the control code buffer */ # define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE -# define KEXEC_CONTROL_PAGE_SIZE 4096 /* The native architecture */ # define KEXEC_ARCH KEXEC_ARCH_386 @@ -59,9 +59,6 @@ /* Maximum address we can use for the control pages */ # define KEXEC_CONTROL_MEMORY_LIMIT (MAXMEM-1) -/* Allocate one page for the pdp and the second for the code */ -# define KEXEC_CONTROL_PAGE_SIZE (4096UL + 4096UL) - /* The native architecture */ # define KEXEC_ARCH KEXEC_ARCH_X86_64 #endif @@ -146,6 +143,19 @@ }; #else struct kimage_arch { + /* + * This is a kimage control page, as it must not overlap with either + * source or destination address ranges. + */ + pgd_t *pgd; + /* + * The virtual mapping of the control code page itself is used only + * during the transition, while the current kernel's pages are all + * in place. Thus the intermediate page table pages used to map it + * are not control pages, but instead just normal pages obtained + * with get_zeroed_page(). And have to be tracked (below) so that + * they can be freed. + */ p4d_t *p4d; pud_t *pud; pmd_t *pmd; --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/kvm-x86-ops.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/kvm-x86-ops.h @@ -48,6 +48,7 @@ KVM_X86_OP(get_gdt) KVM_X86_OP(set_gdt) KVM_X86_OP(sync_dirty_debug_regs) +KVM_X86_OP(set_dr6) KVM_X86_OP(set_dr7) KVM_X86_OP(cache_reg) KVM_X86_OP(get_rflags) --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/kvm_host.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/kvm_host.h @@ -26,6 +26,8 @@ #include #include #include +#include +#include #include #include @@ -854,6 +856,7 @@ int cpuid_nent; struct kvm_cpuid_entry2 *cpuid_entries; struct kvm_hypervisor_cpuid kvm_cpuid; + bool is_amd_compatible; /* * FIXME: Drop this macro and use KVM_NR_GOVERNED_FEATURES directly @@ -1420,7 +1423,9 @@ bool sgx_provisioning_allowed; struct kvm_x86_pmu_event_filter __rcu *pmu_event_filter; - struct task_struct *nx_huge_page_recovery_thread; + struct vhost_task *nx_huge_page_recovery_thread; + u64 nx_huge_page_last; + struct once nx_once; #ifdef CONFIG_X86_64 /* The number of TDP MMU pages across all roots. */ @@ -1636,6 +1641,7 @@ void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); + void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value); void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); @@ -1693,11 +1699,13 @@ void (*enable_irq_window)(struct kvm_vcpu *vcpu); void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); bool (*check_apicv_inhibit_reasons)(enum kvm_apicv_inhibit reason); + + const bool x2apic_icr_is_split; const unsigned long required_apicv_inhibits; bool allow_apicv_in_x2apic_without_x2apic_virtualization; void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu); void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); - void (*hwapic_isr_update)(int isr); + void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr); bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu); void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu); @@ -1803,7 +1811,7 @@ bool (*is_exception_vmexit)(struct kvm_vcpu *vcpu, u8 vector, u32 error_code); int (*check_events)(struct kvm_vcpu *vcpu); - bool (*has_events)(struct kvm_vcpu *vcpu); + bool (*has_events)(struct kvm_vcpu *vcpu, bool for_injection); void (*triple_fault)(struct kvm_vcpu *vcpu); int (*get_state)(struct kvm_vcpu *vcpu, struct kvm_nested_state __user *user_kvm_nested_state, --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/mem_encrypt.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/mem_encrypt.h @@ -15,7 +15,8 @@ #include #include -#include +#include +struct boot_params; #ifdef CONFIG_X86_MEM_ENCRYPT void __init mem_encrypt_init(void); @@ -46,8 +47,8 @@ void __init sme_early_init(void); -void __init sme_encrypt_kernel(struct boot_params *bp); -void __init sme_enable(struct boot_params *bp); +void sme_encrypt_kernel(struct boot_params *bp); +void sme_enable(struct boot_params *bp); int __init early_set_memory_decrypted(unsigned long vaddr, unsigned long size); int __init early_set_memory_encrypted(unsigned long vaddr, unsigned long size); @@ -58,6 +59,11 @@ void __init sev_es_init_vc_handling(void); +static inline u64 sme_get_me_mask(void) +{ + return RIP_REL_REF(sme_me_mask); +} + #define __bss_decrypted __section(".bss..decrypted") #else /* !CONFIG_AMD_MEM_ENCRYPT */ @@ -75,8 +81,8 @@ static inline void __init sme_early_init(void) { } -static inline void __init sme_encrypt_kernel(struct boot_params *bp) { } -static inline void __init sme_enable(struct boot_params *bp) { } +static inline void sme_encrypt_kernel(struct boot_params *bp) { } +static inline void sme_enable(struct boot_params *bp) { } static inline void sev_es_init_vc_handling(void) { } @@ -89,6 +95,8 @@ static inline void mem_encrypt_free_decrypted_mem(void) { } +static inline u64 sme_get_me_mask(void) { return 0; } + #define __bss_decrypted #endif /* CONFIG_AMD_MEM_ENCRYPT */ @@ -106,11 +114,6 @@ extern char __start_bss_decrypted[], __end_bss_decrypted[], __start_bss_decrypted_unused[]; -static inline u64 sme_get_me_mask(void) -{ - return sme_me_mask; -} - #endif /* __ASSEMBLY__ */ #endif /* __X86_MEM_ENCRYPT_H__ */ --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/mmu.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/mmu.h @@ -37,6 +37,8 @@ */ atomic64_t tlb_gen; + unsigned long next_trim_cpumask; + #ifdef CONFIG_MODIFY_LDT_SYSCALL struct rw_semaphore ldt_usr_sem; struct ldt_struct *ldt; --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/mmu_context.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/mmu_context.h @@ -145,6 +145,7 @@ mm->context.ctx_id = atomic64_inc_return(&last_mm_ctx_id); atomic64_set(&mm->context.tlb_gen, 0); + mm->context.next_trim_cpumask = jiffies + HZ; #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS if (cpu_feature_enabled(X86_FEATURE_OSPKE)) { --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/mshyperv.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/mshyperv.h @@ -40,7 +40,6 @@ } #if IS_ENABLED(CONFIG_HYPERV) -extern int hyperv_init_cpuhp; extern bool hyperv_paravisor_present; extern void *hv_hypercall_pg; --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/msr-index.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/msr-index.h @@ -50,10 +50,13 @@ #define SPEC_CTRL_SSBD BIT(SPEC_CTRL_SSBD_SHIFT) /* Speculative Store Bypass Disable */ #define SPEC_CTRL_RRSBA_DIS_S_SHIFT 6 /* Disable RRSBA behavior */ #define SPEC_CTRL_RRSBA_DIS_S BIT(SPEC_CTRL_RRSBA_DIS_S_SHIFT) +#define SPEC_CTRL_BHI_DIS_S_SHIFT 10 /* Disable Branch History Injection behavior */ +#define SPEC_CTRL_BHI_DIS_S BIT(SPEC_CTRL_BHI_DIS_S_SHIFT) /* A mask for bits which the kernel toggles when controlling mitigations */ #define SPEC_CTRL_MITIGATIONS_MASK (SPEC_CTRL_IBRS | SPEC_CTRL_STIBP | SPEC_CTRL_SSBD \ - | SPEC_CTRL_RRSBA_DIS_S) + | SPEC_CTRL_RRSBA_DIS_S \ + | SPEC_CTRL_BHI_DIS_S) #define MSR_IA32_PRED_CMD 0x00000049 /* Prediction Command */ #define PRED_CMD_IBPB BIT(0) /* Indirect Branch Prediction Barrier */ @@ -152,6 +155,10 @@ * are restricted to targets in * kernel. */ +#define ARCH_CAP_BHI_NO BIT(20) /* + * CPU is not affected by Branch + * History Injection. + */ #define ARCH_CAP_PBRSB_NO BIT(24) /* * Not susceptible to Post-Barrier * Return Stack Buffer Predictions. @@ -165,6 +172,14 @@ * CPU is not vulnerable to Gather * Data Sampling (GDS). */ +#define ARCH_CAP_RFDS_NO BIT(27) /* + * Not susceptible to Register + * File Data Sampling. + */ +#define ARCH_CAP_RFDS_CLEAR BIT(28) /* + * VERW clears CPU Register + * File. + */ #define ARCH_CAP_XAPIC_DISABLE BIT(21) /* * IA32_XAPIC_DISABLE_STATUS MSR @@ -348,7 +363,8 @@ #define MSR_IA32_PASID_VALID BIT_ULL(31) /* DEBUGCTLMSR bits (others vary by model): */ -#define DEBUGCTLMSR_LBR (1UL << 0) /* last branch recording */ +#define DEBUGCTLMSR_LBR_BIT 0 /* last branch recording */ +#define DEBUGCTLMSR_LBR (1UL << DEBUGCTLMSR_LBR_BIT) #define DEBUGCTLMSR_BTF_SHIFT 1 #define DEBUGCTLMSR_BTF (1UL << 1) /* single-step on branches */ #define DEBUGCTLMSR_BUS_LOCK_DETECT (1UL << 2) --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/nospec-branch.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/nospec-branch.h @@ -271,11 +271,20 @@ .Lskip_rsb_\@: .endm +/* + * The CALL to srso_alias_untrain_ret() must be patched in directly at + * the spot where untraining must be done, ie., srso_alias_untrain_ret() + * must be the target of a CALL instruction instead of indirectly + * jumping to a wrapper which then calls it. Therefore, this macro is + * called outside of __UNTRAIN_RET below, for the time being, before the + * kernel can support nested alternatives with arbitrary nesting. + */ +.macro CALL_UNTRAIN_RET #if defined(CONFIG_CPU_UNRET_ENTRY) || defined(CONFIG_CPU_SRSO) -#define CALL_UNTRAIN_RET "call entry_untrain_ret" -#else -#define CALL_UNTRAIN_RET "" + ALTERNATIVE_2 "", "call entry_untrain_ret", X86_FEATURE_UNRET, \ + "call srso_alias_untrain_ret", X86_FEATURE_SRSO_ALIAS #endif +.endm /* * Mitigate RETBleed for AMD/Hygon Zen uarch. Requires KERNEL CR3 because the @@ -291,8 +300,8 @@ .macro __UNTRAIN_RET ibpb_feature, call_depth_insns #if defined(CONFIG_RETHUNK) || defined(CONFIG_CPU_IBPB_ENTRY) VALIDATE_UNRET_END - ALTERNATIVE_3 "", \ - CALL_UNTRAIN_RET, X86_FEATURE_UNRET, \ + CALL_UNTRAIN_RET + ALTERNATIVE_2 "", \ "call entry_ibpb", \ibpb_feature, \ __stringify(\call_depth_insns), X86_FEATURE_CALL_DEPTH #endif @@ -323,9 +332,31 @@ * Note: Only the memory operand variant of VERW clears the CPU buffers. */ .macro CLEAR_CPU_BUFFERS - ALTERNATIVE "", __stringify(verw _ASM_RIP(mds_verw_sel)), X86_FEATURE_CLEAR_CPU_BUF +#ifdef CONFIG_X86_64 + ALTERNATIVE "", "verw mds_verw_sel(%rip)", X86_FEATURE_CLEAR_CPU_BUF +#else + /* + * In 32bit mode, the memory operand must be a %cs reference. The data + * segments may not be usable (vm86 mode), and the stack segment may not + * be flat (ESPFIX32). + */ + ALTERNATIVE "", "verw %cs:mds_verw_sel", X86_FEATURE_CLEAR_CPU_BUF +#endif +.endm + +#ifdef CONFIG_X86_64 +.macro CLEAR_BRANCH_HISTORY + ALTERNATIVE "", "call clear_bhb_loop", X86_FEATURE_CLEAR_BHB_LOOP .endm +.macro CLEAR_BRANCH_HISTORY_VMEXIT + ALTERNATIVE "", "call clear_bhb_loop", X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT +.endm +#else +#define CLEAR_BRANCH_HISTORY +#define CLEAR_BRANCH_HISTORY_VMEXIT +#endif + #else /* __ASSEMBLY__ */ #define ANNOTATE_RETPOLINE_SAFE \ @@ -351,6 +382,8 @@ static inline void retbleed_return_thunk(void) {} #endif +extern void srso_alias_untrain_ret(void); + #ifdef CONFIG_CPU_SRSO extern void srso_return_thunk(void); extern void srso_alias_return_thunk(void); @@ -366,6 +399,10 @@ extern void entry_untrain_ret(void); extern void entry_ibpb(void); +#ifdef CONFIG_X86_64 +extern void clear_bhb_loop(void); +#endif + extern void (*x86_return_thunk)(void); #ifdef CONFIG_CALL_DEPTH_TRACKING --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/page.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/page.h @@ -66,10 +66,14 @@ * virt_addr_valid(kaddr) returns true. */ #define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) -#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) extern bool __virt_addr_valid(unsigned long kaddr); #define virt_addr_valid(kaddr) __virt_addr_valid((unsigned long) (kaddr)) +static __always_inline void *pfn_to_kaddr(unsigned long pfn) +{ + return __va(pfn << PAGE_SHIFT); +} + static __always_inline u64 __canonical_address(u64 vaddr, u8 vaddr_bits) { return ((s64)vaddr << (64 - vaddr_bits)) >> (64 - vaddr_bits); --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/page_64.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/page_64.h @@ -17,6 +17,7 @@ extern unsigned long page_offset_base; extern unsigned long vmalloc_base; extern unsigned long vmemmap_base; +extern unsigned long physmem_end; static __always_inline unsigned long __phys_addr_nodebug(unsigned long x) { --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/pci-direct.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/pci-direct.h @@ -10,9 +10,11 @@ extern u32 read_pci_config(u8 bus, u8 slot, u8 func, u8 offset); extern u8 read_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset); extern u16 read_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset); +extern u32 pci_early_find_cap(int bus, int slot, int func, int cap); extern void write_pci_config(u8 bus, u8 slot, u8 func, u8 offset, u32 val); extern void write_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset, u8 val); extern void write_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset, u16 val); +extern unsigned int pci_early_clear_msi; extern int early_pci_allowed(void); #endif /* _ASM_X86_PCI_DIRECT_H */ --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/perf_event.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/perf_event.h @@ -185,9 +185,33 @@ * detection/enumeration details: */ #define ARCH_PERFMON_EXT_LEAF 0x00000023 -#define ARCH_PERFMON_NUM_COUNTER_LEAF_BIT 0x1 #define ARCH_PERFMON_NUM_COUNTER_LEAF 0x1 +union cpuid35_eax { + struct { + unsigned int leaf0:1; + /* Counters Sub-Leaf */ + unsigned int cntr_subleaf:1; + /* Auto Counter Reload Sub-Leaf */ + unsigned int acr_subleaf:1; + /* Events Sub-Leaf */ + unsigned int events_subleaf:1; + unsigned int reserved:28; + } split; + unsigned int full; +}; + +union cpuid35_ebx { + struct { + /* UnitMask2 Supported */ + unsigned int umask2:1; + /* EQ-bit Supported */ + unsigned int eq:1; + unsigned int reserved:30; + } split; + unsigned int full; +}; + /* * Intel Architectural LBR CPUID detection/enumeration details: */ --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/pgtable.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/pgtable.h @@ -141,6 +141,11 @@ return pte_flags(pte) & _PAGE_ACCESSED; } +static inline bool pte_decrypted(pte_t pte) +{ + return cc_mkdec(pte_val(pte)) == pte_val(pte); +} + #define pmd_dirty pmd_dirty static inline bool pmd_dirty(pmd_t pmd) { @@ -388,23 +393,7 @@ #ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP static inline int pte_uffd_wp(pte_t pte) { - bool wp = pte_flags(pte) & _PAGE_UFFD_WP; - -#ifdef CONFIG_DEBUG_VM - /* - * Having write bit for wr-protect-marked present ptes is fatal, - * because it means the uffd-wp bit will be ignored and write will - * just go through. - * - * Use any chance of pgtable walking to verify this (e.g., when - * page swapped out or being migrated for all purposes). It means - * something is already wrong. Tell the admin even before the - * process crashes. We also nail it with wrong pgtable setup. - */ - WARN_ON_ONCE(wp && pte_write(pte)); -#endif - - return wp; + return pte_flags(pte) & _PAGE_UFFD_WP; } static inline pte_t pte_mkuffd_wp(pte_t pte) --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/pgtable_64_types.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/pgtable_64_types.h @@ -140,6 +140,10 @@ # define VMEMMAP_START __VMEMMAP_BASE_L4 #endif /* CONFIG_DYNAMIC_MEMORY_LAYOUT */ +#ifdef CONFIG_RANDOMIZE_MEMORY +# define PHYSMEM_END physmem_end +#endif + /* * End of the region for which vmalloc page tables are pre-allocated. * For non-KMSAN builds, this is the same as VMALLOC_END. --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/pgtable_types.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/pgtable_types.h @@ -36,10 +36,12 @@ #define _PAGE_BIT_DEVMAP _PAGE_BIT_SOFTW4 #ifdef CONFIG_X86_64 -#define _PAGE_BIT_SAVED_DIRTY _PAGE_BIT_SOFTW5 /* Saved Dirty bit */ +#define _PAGE_BIT_SAVED_DIRTY _PAGE_BIT_SOFTW5 /* Saved Dirty bit (leaf) */ +#define _PAGE_BIT_NOPTISHADOW _PAGE_BIT_SOFTW5 /* No PTI shadow (root PGD) */ #else /* Shared with _PAGE_BIT_UFFD_WP which is not supported on 32 bit */ -#define _PAGE_BIT_SAVED_DIRTY _PAGE_BIT_SOFTW2 /* Saved Dirty bit */ +#define _PAGE_BIT_SAVED_DIRTY _PAGE_BIT_SOFTW2 /* Saved Dirty bit (leaf) */ +#define _PAGE_BIT_NOPTISHADOW _PAGE_BIT_SOFTW2 /* No PTI shadow (root PGD) */ #endif /* If _PAGE_BIT_PRESENT is clear, we use these: */ @@ -139,6 +141,8 @@ #define _PAGE_PROTNONE (_AT(pteval_t, 1) << _PAGE_BIT_PROTNONE) +#define _PAGE_NOPTISHADOW (_AT(pteval_t, 1) << _PAGE_BIT_NOPTISHADOW) + /* * Set of bits not changed in pte_modify. The pte's * protection key is treated like _PAGE_RW, for @@ -148,7 +152,7 @@ #define _COMMON_PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT | \ _PAGE_SPECIAL | _PAGE_ACCESSED | \ _PAGE_DIRTY_BITS | _PAGE_SOFT_DIRTY | \ - _PAGE_DEVMAP | _PAGE_ENC | _PAGE_UFFD_WP) + _PAGE_DEVMAP | _PAGE_CC | _PAGE_UFFD_WP) #define _PAGE_CHG_MASK (_COMMON_PAGE_CHG_MASK | _PAGE_PAT) #define _HPAGE_CHG_MASK (_COMMON_PAGE_CHG_MASK | _PAGE_PSE | _PAGE_PAT_LARGE) @@ -173,6 +177,7 @@ }; #endif +#define _PAGE_CC (_AT(pteval_t, cc_mask)) #define _PAGE_ENC (_AT(pteval_t, sme_me_mask)) #define _PAGE_CACHE_MASK (_PAGE_PWT | _PAGE_PCD | _PAGE_PAT) @@ -566,6 +571,8 @@ extern pte_t *lookup_address(unsigned long address, unsigned int *level); extern pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address, unsigned int *level); +pte_t *lookup_address_in_pgd_attr(pgd_t *pgd, unsigned long address, + unsigned int *level, bool *nx, bool *rw); extern pmd_t *lookup_pmd_address(unsigned long address); extern phys_addr_t slow_virt_to_phys(void *__address); extern int __init kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/posted_intr.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/posted_intr.h @@ -0,0 +1,88 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _X86_POSTED_INTR_H +#define _X86_POSTED_INTR_H + +#define POSTED_INTR_ON 0 +#define POSTED_INTR_SN 1 + +#define PID_TABLE_ENTRY_VALID 1 + +/* Posted-Interrupt Descriptor */ +struct pi_desc { + u32 pir[8]; /* Posted interrupt requested */ + union { + struct { + /* bit 256 - Outstanding Notification */ + u16 on : 1, + /* bit 257 - Suppress Notification */ + sn : 1, + /* bit 271:258 - Reserved */ + rsvd_1 : 14; + /* bit 279:272 - Notification Vector */ + u8 nv; + /* bit 287:280 - Reserved */ + u8 rsvd_2; + /* bit 319:288 - Notification Destination */ + u32 ndst; + }; + u64 control; + }; + u32 rsvd[6]; +} __aligned(64); + +static inline bool pi_test_and_set_on(struct pi_desc *pi_desc) +{ + return test_and_set_bit(POSTED_INTR_ON, (unsigned long *)&pi_desc->control); +} + +static inline bool pi_test_and_clear_on(struct pi_desc *pi_desc) +{ + return test_and_clear_bit(POSTED_INTR_ON, (unsigned long *)&pi_desc->control); +} + +static inline bool pi_test_and_clear_sn(struct pi_desc *pi_desc) +{ + return test_and_clear_bit(POSTED_INTR_SN, (unsigned long *)&pi_desc->control); +} + +static inline bool pi_test_and_set_pir(int vector, struct pi_desc *pi_desc) +{ + return test_and_set_bit(vector, (unsigned long *)pi_desc->pir); +} + +static inline bool pi_is_pir_empty(struct pi_desc *pi_desc) +{ + return bitmap_empty((unsigned long *)pi_desc->pir, NR_VECTORS); +} + +static inline void pi_set_sn(struct pi_desc *pi_desc) +{ + set_bit(POSTED_INTR_SN, (unsigned long *)&pi_desc->control); +} + +static inline void pi_set_on(struct pi_desc *pi_desc) +{ + set_bit(POSTED_INTR_ON, (unsigned long *)&pi_desc->control); +} + +static inline void pi_clear_on(struct pi_desc *pi_desc) +{ + clear_bit(POSTED_INTR_ON, (unsigned long *)&pi_desc->control); +} + +static inline void pi_clear_sn(struct pi_desc *pi_desc) +{ + clear_bit(POSTED_INTR_SN, (unsigned long *)&pi_desc->control); +} + +static inline bool pi_test_on(struct pi_desc *pi_desc) +{ + return test_bit(POSTED_INTR_ON, (unsigned long *)&pi_desc->control); +} + +static inline bool pi_test_sn(struct pi_desc *pi_desc) +{ + return test_bit(POSTED_INTR_SN, (unsigned long *)&pi_desc->control); +} + +#endif /* _X86_POSTED_INTR_H */ --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/processor.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/processor.h @@ -106,9 +106,23 @@ }; struct cpuinfo_x86 { - __u8 x86; /* CPU family */ - __u8 x86_vendor; /* CPU vendor */ - __u8 x86_model; + union { + /* + * The particular ordering (low-to-high) of (vendor, + * family, model) is done in case range of models, like + * it is usually done on AMD, need to be compared. + */ + struct { + __u8 x86_model; + /* CPU family */ + __u8 x86; + /* CPU vendor */ + __u8 x86_vendor; + __u8 x86_reserved; + }; + /* combined vendor, family, model */ + __u32 x86_vfm; + }; __u8 x86_stepping; #ifdef CONFIG_X86_64 /* Number of 4K pages in DTLB/ITLB combined(in pages): */ @@ -205,6 +219,8 @@ return BIT_ULL(boot_cpu_data.x86_cache_bits - 1 - PAGE_SHIFT); } +void init_cpu_devs(void); +void get_cpu_vendor(struct cpuinfo_x86 *c); extern void early_cpu_init(void); extern void identify_secondary_cpu(struct cpuinfo_x86 *); extern void print_cpu_info(struct cpuinfo_x86 *); @@ -479,7 +495,6 @@ unsigned long iopl_emul; unsigned int iopl_warn:1; - unsigned int sig_on_uaccess_err:1; /* * Protection Keys Register for Userspace. Loaded immediately on --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/ptrace.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/ptrace.h @@ -56,18 +56,64 @@ #else /* __i386__ */ +struct fred_cs { + /* CS selector */ + u64 cs : 16, + /* Stack level at event time */ + sl : 2, + /* IBT in WAIT_FOR_ENDBRANCH state */ + wfe : 1, + : 45; +}; + +struct fred_ss { + /* SS selector */ + u64 ss : 16, + /* STI state */ + sti : 1, + /* Set if syscall, sysenter or INT n */ + swevent : 1, + /* Event is NMI type */ + nmi : 1, + : 13, + /* Event vector */ + vector : 8, + : 8, + /* Event type */ + type : 4, + : 4, + /* Event was incident to enclave execution */ + enclave : 1, + /* CPU was in long mode */ + lm : 1, + /* + * Nested exception during FRED delivery, not set + * for #DF. + */ + nested : 1, + : 1, + /* + * The length of the instruction causing the event. + * Only set for INTO, INT1, INT3, INT n, SYSCALL + * and SYSENTER. 0 otherwise. + */ + insnlen : 4; +}; + struct pt_regs { -/* - * C ABI says these regs are callee-preserved. They aren't saved on kernel entry - * unless syscall needs a complete, fully filled "struct pt_regs". - */ + /* + * C ABI says these regs are callee-preserved. They aren't saved on + * kernel entry unless syscall needs a complete, fully filled + * "struct pt_regs". + */ unsigned long r15; unsigned long r14; unsigned long r13; unsigned long r12; unsigned long bp; unsigned long bx; -/* These regs are callee-clobbered. Always saved on kernel entry. */ + + /* These regs are callee-clobbered. Always saved on kernel entry. */ unsigned long r11; unsigned long r10; unsigned long r9; @@ -77,18 +123,50 @@ unsigned long dx; unsigned long si; unsigned long di; -/* - * On syscall entry, this is syscall#. On CPU exception, this is error code. - * On hw interrupt, it's IRQ number: - */ + + /* + * orig_ax is used on entry for: + * - the syscall number (syscall, sysenter, int80) + * - error_code stored by the CPU on traps and exceptions + * - the interrupt number for device interrupts + * + * A FRED stack frame starts here: + * 1) It _always_ includes an error code; + * + * 2) The return frame for ERET[US] starts here, but + * the content of orig_ax is ignored. + */ unsigned long orig_ax; -/* Return frame for iretq */ + + /* The IRETQ return frame starts here */ unsigned long ip; - unsigned long cs; + + union { + /* CS selector */ + u16 cs; + /* The extended 64-bit data slot containing CS */ + u64 csx; + /* The FRED CS extension */ + struct fred_cs fred_cs; + }; + unsigned long flags; unsigned long sp; - unsigned long ss; -/* top of stack page */ + + union { + /* SS selector */ + u16 ss; + /* The extended 64-bit data slot containing SS */ + u64 ssx; + /* The FRED SS extension */ + struct fred_ss fred_ss; + }; + + /* + * Top of stack on IDT systems, while FRED systems have extra fields + * defined above for storing exception related information, e.g. CR2 or + * DR6. + */ }; #endif /* !__i386__ */ --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/qspinlock.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/qspinlock.h @@ -66,13 +66,15 @@ #ifdef CONFIG_PARAVIRT /* - * virt_spin_lock_key - enables (by default) the virt_spin_lock() hijack. + * virt_spin_lock_key - disables by default the virt_spin_lock() hijack. * - * Native (and PV wanting native due to vCPU pinning) should disable this key. - * It is done in this backwards fashion to only have a single direction change, - * which removes ordering between native_pv_spin_init() and HV setup. + * Native (and PV wanting native due to vCPU pinning) should keep this key + * disabled. Native does not touch the key. + * + * When in a guest then native_pv_lock_init() enables the key first and + * KVM/XEN might conditionally disable it later in the boot process again. */ -DECLARE_STATIC_KEY_TRUE(virt_spin_lock_key); +DECLARE_STATIC_KEY_FALSE(virt_spin_lock_key); /* * Shortcut for the queued_spin_lock_slowpath() function that allows --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/required-features.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/required-features.h @@ -99,6 +99,7 @@ #define REQUIRED_MASK18 0 #define REQUIRED_MASK19 0 #define REQUIRED_MASK20 0 -#define REQUIRED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 21) +#define REQUIRED_MASK21 0 +#define REQUIRED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 22) #endif /* _ASM_X86_REQUIRED_FEATURES_H */ --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/set_memory.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/set_memory.h @@ -49,8 +49,11 @@ int set_memory_np(unsigned long addr, int numpages); int set_memory_p(unsigned long addr, int numpages); int set_memory_4k(unsigned long addr, int numpages); + +bool set_memory_enc_stop_conversion(void); int set_memory_encrypted(unsigned long addr, int numpages); int set_memory_decrypted(unsigned long addr, int numpages); + int set_memory_np_noalias(unsigned long addr, int numpages); int set_memory_nonglobal(unsigned long addr, int numpages); int set_memory_global(unsigned long addr, int numpages); --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/sev.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/sev.h @@ -199,16 +199,16 @@ struct snp_guest_request_ioctl; void setup_ghcb(void); -void __init early_snp_set_memory_private(unsigned long vaddr, unsigned long paddr, - unsigned long npages); -void __init early_snp_set_memory_shared(unsigned long vaddr, unsigned long paddr, - unsigned long npages); -void __init snp_prep_memory(unsigned long paddr, unsigned int sz, enum psc_op op); +void early_snp_set_memory_private(unsigned long vaddr, unsigned long paddr, + unsigned long npages); +void early_snp_set_memory_shared(unsigned long vaddr, unsigned long paddr, + unsigned long npages); void snp_set_memory_shared(unsigned long vaddr, unsigned long npages); void snp_set_memory_private(unsigned long vaddr, unsigned long npages); void snp_set_wakeup_secondary_cpu(void); bool snp_init(struct boot_params *bp); -void __init __noreturn snp_abort(void); +void __noreturn snp_abort(void); +void snp_dmi_setup(void); int snp_issue_guest_request(u64 exit_code, struct snp_req_data *input, struct snp_guest_request_ioctl *rio); void snp_accept_memory(phys_addr_t start, phys_addr_t end); u64 snp_get_unsupported_features(u64 status); @@ -227,12 +227,12 @@ early_snp_set_memory_private(unsigned long vaddr, unsigned long paddr, unsigned long npages) { } static inline void __init early_snp_set_memory_shared(unsigned long vaddr, unsigned long paddr, unsigned long npages) { } -static inline void __init snp_prep_memory(unsigned long paddr, unsigned int sz, enum psc_op op) { } static inline void snp_set_memory_shared(unsigned long vaddr, unsigned long npages) { } static inline void snp_set_memory_private(unsigned long vaddr, unsigned long npages) { } static inline void snp_set_wakeup_secondary_cpu(void) { } static inline bool snp_init(struct boot_params *bp) { return false; } static inline void snp_abort(void) { } +static inline void snp_dmi_setup(void) { } static inline int snp_issue_guest_request(u64 exit_code, struct snp_req_data *input, struct snp_guest_request_ioctl *rio) { return -ENOTTY; --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/shared/tdx.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/shared/tdx.h @@ -16,11 +16,20 @@ #define TDG_VP_VEINFO_GET 3 #define TDG_MR_REPORT 4 #define TDG_MEM_PAGE_ACCEPT 6 +#define TDG_VM_RD 7 #define TDG_VM_WR 8 -/* TDCS fields. To be used by TDG.VM.WR and TDG.VM.RD module calls */ +/* TDX TD-Scope Metadata. To be used by TDG.VM.WR and TDG.VM.RD */ +#define TDCS_CONFIG_FLAGS 0x1110000300000016 +#define TDCS_TD_CTLS 0x1110000300000017 #define TDCS_NOTIFY_ENABLES 0x9100000000000010 +/* TDCS_CONFIG_FLAGS bits */ +#define TDCS_CONFIG_FLEXIBLE_PENDING_VE BIT_ULL(1) + +/* TDCS_TD_CTLS bits */ +#define TD_CTLS_PENDING_VE_DISABLE BIT_ULL(0) + /* TDX hypercall Leaf IDs */ #define TDVMCALL_MAP_GPA 0x10001 #define TDVMCALL_GET_QUOTE 0x10002 --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/shstk.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/shstk.h @@ -21,6 +21,7 @@ void shstk_free(struct task_struct *p); int setup_signal_shadow_stack(struct ksignal *ksig); int restore_signal_shadow_stack(void); +int shstk_update_last_frame(unsigned long val); #else static inline long shstk_prctl(struct task_struct *task, int option, unsigned long arg2) { return -EINVAL; } @@ -31,6 +32,7 @@ static inline void shstk_free(struct task_struct *p) {} static inline int setup_signal_shadow_stack(struct ksignal *ksig) { return 0; } static inline int restore_signal_shadow_stack(void) { return 0; } +static inline int shstk_update_last_frame(unsigned long val) { return 0; } #endif /* CONFIG_X86_USER_SHADOW_STACK */ #endif /* __ASSEMBLY__ */ --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/sparsemem.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/sparsemem.h @@ -37,8 +37,6 @@ #define phys_to_target_node phys_to_target_node extern int memory_add_physaddr_to_nid(u64 start); #define memory_add_physaddr_to_nid memory_add_physaddr_to_nid -extern int numa_fill_memblks(u64 start, u64 end); -#define numa_fill_memblks numa_fill_memblks #endif #endif /* __ASSEMBLY__ */ --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/special_insns.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/special_insns.h @@ -217,17 +217,17 @@ #define nop() asm volatile ("nop") -static inline void serialize(void) +static __always_inline void serialize(void) { /* Instruction opcode for SERIALIZE; supported in binutils >= 2.35. */ asm volatile(".byte 0xf, 0x1, 0xe8" ::: "memory"); } /* The dst parameter must be 64-bytes aligned */ -static inline void movdir64b(void __iomem *dst, const void *src) +static inline void movdir64b(void *dst, const void *src) { const struct { char _[64]; } *__src = src; - struct { char _[64]; } __iomem *__dst = dst; + struct { char _[64]; } *__dst = dst; /* * MOVDIR64B %(rdx), rax. @@ -245,6 +245,11 @@ : "m" (*__src), "a" (__dst), "d" (__src)); } +static inline void movdir64b_io(void __iomem *dst, const void *src) +{ + movdir64b((void __force *)dst, src); +} + /** * enqcmds - Enqueue a command in supervisor (CPL0) mode * @dst: destination, in MMIO space (must be 512-bit aligned) --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/static_call.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/static_call.h @@ -65,4 +65,19 @@ extern bool __static_call_fixup(void *tramp, u8 op, void *dest); +extern void __static_call_update_early(void *tramp, void *func); + +#define static_call_update_early(name, _func) \ +({ \ + typeof(&STATIC_CALL_TRAMP(name)) __F = (_func); \ + if (static_call_initialized) { \ + __static_call_update(&STATIC_CALL_KEY(name), \ + STATIC_CALL_TRAMP_ADDR(name), __F);\ + } else { \ + WRITE_ONCE(STATIC_CALL_KEY(name).func, _func); \ + __static_call_update_early(STATIC_CALL_TRAMP_ADDR(name),\ + __F); \ + } \ +}) + #endif /* _ASM_STATIC_CALL_H */ --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/suspend_32.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/suspend_32.h @@ -12,11 +12,6 @@ /* image of the saved processor state */ struct saved_context { - /* - * On x86_32, all segment registers except gs are saved at kernel - * entry in pt_regs. - */ - u16 gs; unsigned long cr0, cr2, cr3, cr4; u64 misc_enable; struct saved_msrs saved_msrs; @@ -27,6 +22,11 @@ unsigned long tr; unsigned long safety; unsigned long return_address; + /* + * On x86_32, all segment registers except gs are saved at kernel + * entry in pt_regs. + */ + u16 gs; bool misc_enable_saved; } __attribute__((packed)); --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/sync_core.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/sync_core.h @@ -8,7 +8,7 @@ #include #ifdef CONFIG_X86_32 -static inline void iret_to_self(void) +static __always_inline void iret_to_self(void) { asm volatile ( "pushfl\n\t" @@ -19,7 +19,7 @@ : ASM_CALL_CONSTRAINT : : "memory"); } #else -static inline void iret_to_self(void) +static __always_inline void iret_to_self(void) { unsigned int tmp; @@ -55,7 +55,7 @@ * Like all of Linux's memory ordering operations, this is a * compiler barrier as well. */ -static inline void sync_core(void) +static __always_inline void sync_core(void) { /* * The SERIALIZE instruction is the most straightforward way to --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/syscall.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/syscall.h @@ -16,19 +16,17 @@ #include /* for TS_COMPAT */ #include +/* This is used purely for kernel/trace/trace_syscalls.c */ typedef long (*sys_call_ptr_t)(const struct pt_regs *); extern const sys_call_ptr_t sys_call_table[]; -#if defined(CONFIG_X86_32) -#define ia32_sys_call_table sys_call_table -#else /* * These may not exist, but still put the prototypes in so we * can use IS_ENABLED(). */ -extern const sys_call_ptr_t ia32_sys_call_table[]; -extern const sys_call_ptr_t x32_sys_call_table[]; -#endif +extern long ia32_sys_call(const struct pt_regs *, unsigned int nr); +extern long x32_sys_call(const struct pt_regs *, unsigned int nr); +extern long x64_sys_call(const struct pt_regs *, unsigned int nr); /* * Only the low 32 bits of orig_ax are meaningful, so we return int. @@ -84,7 +82,12 @@ struct pt_regs *regs, unsigned long *args) { - memcpy(args, ®s->bx, 6 * sizeof(args[0])); + args[0] = regs->bx; + args[1] = regs->cx; + args[2] = regs->dx; + args[3] = regs->si; + args[4] = regs->di; + args[5] = regs->bp; } static inline int syscall_get_arch(struct task_struct *task) @@ -127,6 +130,7 @@ } bool do_syscall_64(struct pt_regs *regs, int nr); +void do_int80_emulation(struct pt_regs *regs); #endif /* CONFIG_X86_32 */ --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/tlb.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/tlb.h @@ -34,4 +34,8 @@ free_page_and_swap_cache(table); } +static inline void invlpg(unsigned long addr) +{ + asm volatile("invlpg (%0)" ::"r" (addr) : "memory"); +} #endif /* _ASM_X86_TLB_H */ --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/tlbflush.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/tlbflush.h @@ -222,6 +222,7 @@ unsigned int initiating_cpu; u8 stride_shift; u8 freed_tables; + u8 trim_cpumask; }; void flush_tlb_local(void); --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/uaccess.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/uaccess.h @@ -78,10 +78,10 @@ int __ret_gu; \ register __inttype(*(ptr)) __val_gu asm("%"_ASM_DX); \ __chk_user_ptr(ptr); \ - asm volatile("call __" #fn "_%P4" \ + asm volatile("call __" #fn "_%c[size]" \ : "=a" (__ret_gu), "=r" (__val_gu), \ ASM_CALL_CONSTRAINT \ - : "0" (ptr), "i" (sizeof(*(ptr)))); \ + : "0" (ptr), [size] "i" (sizeof(*(ptr)))); \ instrument_get_user(__val_gu); \ (x) = (__force __typeof__(*(ptr))) __val_gu; \ __builtin_expect(__ret_gu, 0); \ @@ -177,7 +177,7 @@ __chk_user_ptr(__ptr); \ __ptr_pu = __ptr; \ __val_pu = __x; \ - asm volatile("call __" #fn "_%P[size]" \ + asm volatile("call __" #fn "_%c[size]" \ : "=c" (__ret_pu), \ ASM_CALL_CONSTRAINT \ : "0" (__ptr_pu), \ --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/uaccess_64.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/uaccess_64.h @@ -57,6 +57,14 @@ #define valid_user_address(x) ((long)(x) >= 0) /* + * Masking the user address is an alternative to a conditional + * user_access_begin that can avoid the fencing. This only works + * for dense accesses starting at the address. + */ +#define mask_user_address(x) ((typeof(x))((long)(x)|((long)(x)>>63))) +#define masked_user_access_begin(x) ({ __uaccess_begin(); mask_user_address(x); }) + +/* * User pointers can have tag bits on x86-64. This scheme tolerates * arbitrary values in those bits rather then masking them off. * --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/vmware.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/vmware.h @@ -7,51 +7,321 @@ #include /* - * The hypercall definitions differ in the low word of the %edx argument - * in the following way: the old port base interface uses the port - * number to distinguish between high- and low bandwidth versions. + * VMware hypercall ABI. + * + * - Low bandwidth (LB) hypercalls (I/O port based, vmcall and vmmcall) + * have up to 6 input and 6 output arguments passed and returned using + * registers: %eax (arg0), %ebx (arg1), %ecx (arg2), %edx (arg3), + * %esi (arg4), %edi (arg5). + * The following input arguments must be initialized by the caller: + * arg0 - VMWARE_HYPERVISOR_MAGIC + * arg2 - Hypercall command + * arg3 bits [15:0] - Port number, LB and direction flags + * + * - Low bandwidth TDX hypercalls (x86_64 only) are similar to LB + * hypercalls. They also have up to 6 input and 6 output on registers + * arguments, with different argument to register mapping: + * %r12 (arg0), %rbx (arg1), %r13 (arg2), %rdx (arg3), + * %rsi (arg4), %rdi (arg5). + * + * - High bandwidth (HB) hypercalls are I/O port based only. They have + * up to 7 input and 7 output arguments passed and returned using + * registers: %eax (arg0), %ebx (arg1), %ecx (arg2), %edx (arg3), + * %esi (arg4), %edi (arg5), %ebp (arg6). + * The following input arguments must be initialized by the caller: + * arg0 - VMWARE_HYPERVISOR_MAGIC + * arg1 - Hypercall command + * arg3 bits [15:0] - Port number, HB and direction flags + * + * For compatibility purposes, x86_64 systems use only lower 32 bits + * for input and output arguments. + * + * The hypercall definitions differ in the low word of the %edx (arg3) + * in the following way: the old I/O port based interface uses the port + * number to distinguish between high- and low bandwidth versions, and + * uses IN/OUT instructions to define transfer direction. * * The new vmcall interface instead uses a set of flags to select * bandwidth mode and transfer direction. The flags should be loaded - * into %dx by any user and are automatically replaced by the port - * number if the VMWARE_HYPERVISOR_PORT method is used. - * - * In short, new driver code should strictly use the new definition of - * %dx content. + * into arg3 by any user and are automatically replaced by the port + * number if the I/O port method is used. */ -/* Old port-based version */ -#define VMWARE_HYPERVISOR_PORT 0x5658 -#define VMWARE_HYPERVISOR_PORT_HB 0x5659 - -/* Current vmcall / vmmcall version */ -#define VMWARE_HYPERVISOR_HB BIT(0) -#define VMWARE_HYPERVISOR_OUT BIT(1) - -/* The low bandwidth call. The low word of edx is presumed clear. */ -#define VMWARE_HYPERCALL \ - ALTERNATIVE_2("movw $" __stringify(VMWARE_HYPERVISOR_PORT) ", %%dx; " \ - "inl (%%dx), %%eax", \ - "vmcall", X86_FEATURE_VMCALL, \ - "vmmcall", X86_FEATURE_VMW_VMMCALL) +#define VMWARE_HYPERVISOR_HB BIT(0) +#define VMWARE_HYPERVISOR_OUT BIT(1) + +#define VMWARE_HYPERVISOR_PORT 0x5658 +#define VMWARE_HYPERVISOR_PORT_HB (VMWARE_HYPERVISOR_PORT | \ + VMWARE_HYPERVISOR_HB) + +#define VMWARE_HYPERVISOR_MAGIC 0x564d5868U +#define VMWARE_CMD_GETVERSION 10 +#define VMWARE_CMD_GETHZ 45 +#define VMWARE_CMD_GETVCPU_INFO 68 +#define VMWARE_CMD_STEALCLOCK 91 /* - * The high bandwidth out call. The low word of edx is presumed to have the - * HB and OUT bits set. + * Hypercall command mask: + * bits [6:0] command, range [0, 127] + * bits [19:16] sub-command, range [0, 15] */ -#define VMWARE_HYPERCALL_HB_OUT \ - ALTERNATIVE_2("movw $" __stringify(VMWARE_HYPERVISOR_PORT_HB) ", %%dx; " \ - "rep outsb", \ - "vmcall", X86_FEATURE_VMCALL, \ - "vmmcall", X86_FEATURE_VMW_VMMCALL) +#define VMWARE_CMD_MASK 0xf007fU + +#define CPUID_VMWARE_FEATURES_ECX_VMMCALL BIT(0) +#define CPUID_VMWARE_FEATURES_ECX_VMCALL BIT(1) + +extern unsigned long vmware_hypercall_slow(unsigned long cmd, + unsigned long in1, unsigned long in3, + unsigned long in4, unsigned long in5, + u32 *out1, u32 *out2, u32 *out3, + u32 *out4, u32 *out5); + +#define VMWARE_TDX_VENDOR_LEAF 0x1af7e4909ULL +#define VMWARE_TDX_HCALL_FUNC 1 + +extern unsigned long vmware_tdx_hypercall(unsigned long cmd, + unsigned long in1, unsigned long in3, + unsigned long in4, unsigned long in5, + u32 *out1, u32 *out2, u32 *out3, + u32 *out4, u32 *out5); /* - * The high bandwidth in call. The low word of edx is presumed to have the - * HB bit set. + * The low bandwidth call. The low word of %edx is presumed to have OUT bit + * set. The high word of %edx may contain input data from the caller. */ -#define VMWARE_HYPERCALL_HB_IN \ - ALTERNATIVE_2("movw $" __stringify(VMWARE_HYPERVISOR_PORT_HB) ", %%dx; " \ - "rep insb", \ - "vmcall", X86_FEATURE_VMCALL, \ +#define VMWARE_HYPERCALL \ + ALTERNATIVE_2("movw %[port], %%dx\n\t" \ + "inl (%%dx), %%eax", \ + "vmcall", X86_FEATURE_VMCALL, \ "vmmcall", X86_FEATURE_VMW_VMMCALL) + +static inline +unsigned long vmware_hypercall1(unsigned long cmd, unsigned long in1) +{ + unsigned long out0; + + if (cpu_feature_enabled(X86_FEATURE_TDX_GUEST)) + return vmware_tdx_hypercall(cmd, in1, 0, 0, 0, + NULL, NULL, NULL, NULL, NULL); + + if (unlikely(!alternatives_patched) && !__is_defined(MODULE)) + return vmware_hypercall_slow(cmd, in1, 0, 0, 0, + NULL, NULL, NULL, NULL, NULL); + + asm_inline volatile (VMWARE_HYPERCALL + : "=a" (out0) + : [port] "i" (VMWARE_HYPERVISOR_PORT), + "a" (VMWARE_HYPERVISOR_MAGIC), + "b" (in1), + "c" (cmd), + "d" (0) + : "cc", "memory"); + return out0; +} + +static inline +unsigned long vmware_hypercall3(unsigned long cmd, unsigned long in1, + u32 *out1, u32 *out2) +{ + unsigned long out0; + + if (cpu_feature_enabled(X86_FEATURE_TDX_GUEST)) + return vmware_tdx_hypercall(cmd, in1, 0, 0, 0, + out1, out2, NULL, NULL, NULL); + + if (unlikely(!alternatives_patched) && !__is_defined(MODULE)) + return vmware_hypercall_slow(cmd, in1, 0, 0, 0, + out1, out2, NULL, NULL, NULL); + + asm_inline volatile (VMWARE_HYPERCALL + : "=a" (out0), "=b" (*out1), "=c" (*out2) + : [port] "i" (VMWARE_HYPERVISOR_PORT), + "a" (VMWARE_HYPERVISOR_MAGIC), + "b" (in1), + "c" (cmd), + "d" (0) + : "cc", "memory"); + return out0; +} + +static inline +unsigned long vmware_hypercall4(unsigned long cmd, unsigned long in1, + u32 *out1, u32 *out2, u32 *out3) +{ + unsigned long out0; + + if (cpu_feature_enabled(X86_FEATURE_TDX_GUEST)) + return vmware_tdx_hypercall(cmd, in1, 0, 0, 0, + out1, out2, out3, NULL, NULL); + + if (unlikely(!alternatives_patched) && !__is_defined(MODULE)) + return vmware_hypercall_slow(cmd, in1, 0, 0, 0, + out1, out2, out3, NULL, NULL); + + asm_inline volatile (VMWARE_HYPERCALL + : "=a" (out0), "=b" (*out1), "=c" (*out2), "=d" (*out3) + : [port] "i" (VMWARE_HYPERVISOR_PORT), + "a" (VMWARE_HYPERVISOR_MAGIC), + "b" (in1), + "c" (cmd), + "d" (0) + : "cc", "memory"); + return out0; +} + +static inline +unsigned long vmware_hypercall5(unsigned long cmd, unsigned long in1, + unsigned long in3, unsigned long in4, + unsigned long in5, u32 *out2) +{ + unsigned long out0; + + if (cpu_feature_enabled(X86_FEATURE_TDX_GUEST)) + return vmware_tdx_hypercall(cmd, in1, in3, in4, in5, + NULL, out2, NULL, NULL, NULL); + + if (unlikely(!alternatives_patched) && !__is_defined(MODULE)) + return vmware_hypercall_slow(cmd, in1, in3, in4, in5, + NULL, out2, NULL, NULL, NULL); + + asm_inline volatile (VMWARE_HYPERCALL + : "=a" (out0), "=c" (*out2) + : [port] "i" (VMWARE_HYPERVISOR_PORT), + "a" (VMWARE_HYPERVISOR_MAGIC), + "b" (in1), + "c" (cmd), + "d" (in3), + "S" (in4), + "D" (in5) + : "cc", "memory"); + return out0; +} + +static inline +unsigned long vmware_hypercall6(unsigned long cmd, unsigned long in1, + unsigned long in3, u32 *out2, + u32 *out3, u32 *out4, u32 *out5) +{ + unsigned long out0; + + if (cpu_feature_enabled(X86_FEATURE_TDX_GUEST)) + return vmware_tdx_hypercall(cmd, in1, in3, 0, 0, + NULL, out2, out3, out4, out5); + + if (unlikely(!alternatives_patched) && !__is_defined(MODULE)) + return vmware_hypercall_slow(cmd, in1, in3, 0, 0, + NULL, out2, out3, out4, out5); + + asm_inline volatile (VMWARE_HYPERCALL + : "=a" (out0), "=c" (*out2), "=d" (*out3), "=S" (*out4), + "=D" (*out5) + : [port] "i" (VMWARE_HYPERVISOR_PORT), + "a" (VMWARE_HYPERVISOR_MAGIC), + "b" (in1), + "c" (cmd), + "d" (in3) + : "cc", "memory"); + return out0; +} + +static inline +unsigned long vmware_hypercall7(unsigned long cmd, unsigned long in1, + unsigned long in3, unsigned long in4, + unsigned long in5, u32 *out1, + u32 *out2, u32 *out3) +{ + unsigned long out0; + + if (cpu_feature_enabled(X86_FEATURE_TDX_GUEST)) + return vmware_tdx_hypercall(cmd, in1, in3, in4, in5, + out1, out2, out3, NULL, NULL); + + if (unlikely(!alternatives_patched) && !__is_defined(MODULE)) + return vmware_hypercall_slow(cmd, in1, in3, in4, in5, + out1, out2, out3, NULL, NULL); + + asm_inline volatile (VMWARE_HYPERCALL + : "=a" (out0), "=b" (*out1), "=c" (*out2), "=d" (*out3) + : [port] "i" (VMWARE_HYPERVISOR_PORT), + "a" (VMWARE_HYPERVISOR_MAGIC), + "b" (in1), + "c" (cmd), + "d" (in3), + "S" (in4), + "D" (in5) + : "cc", "memory"); + return out0; +} + +#ifdef CONFIG_X86_64 +#define VMW_BP_CONSTRAINT "r" +#else +#define VMW_BP_CONSTRAINT "m" +#endif + +/* + * High bandwidth calls are not supported on encrypted memory guests. + * The caller should check cc_platform_has(CC_ATTR_MEM_ENCRYPT) and use + * low bandwidth hypercall if memory encryption is set. + * This assumption simplifies HB hypercall implementation to just I/O port + * based approach without alternative patching. + */ +static inline +unsigned long vmware_hypercall_hb_out(unsigned long cmd, unsigned long in2, + unsigned long in3, unsigned long in4, + unsigned long in5, unsigned long in6, + u32 *out1) +{ + unsigned long out0; + + asm_inline volatile ( + UNWIND_HINT_SAVE + "push %%" _ASM_BP "\n\t" + UNWIND_HINT_UNDEFINED + "mov %[in6], %%" _ASM_BP "\n\t" + "rep outsb\n\t" + "pop %%" _ASM_BP "\n\t" + UNWIND_HINT_RESTORE + : "=a" (out0), "=b" (*out1) + : "a" (VMWARE_HYPERVISOR_MAGIC), + "b" (cmd), + "c" (in2), + "d" (in3 | VMWARE_HYPERVISOR_PORT_HB), + "S" (in4), + "D" (in5), + [in6] VMW_BP_CONSTRAINT (in6) + : "cc", "memory"); + return out0; +} + +static inline +unsigned long vmware_hypercall_hb_in(unsigned long cmd, unsigned long in2, + unsigned long in3, unsigned long in4, + unsigned long in5, unsigned long in6, + u32 *out1) +{ + unsigned long out0; + + asm_inline volatile ( + UNWIND_HINT_SAVE + "push %%" _ASM_BP "\n\t" + UNWIND_HINT_UNDEFINED + "mov %[in6], %%" _ASM_BP "\n\t" + "rep insb\n\t" + "pop %%" _ASM_BP "\n\t" + UNWIND_HINT_RESTORE + : "=a" (out0), "=b" (*out1) + : "a" (VMWARE_HYPERVISOR_MAGIC), + "b" (cmd), + "c" (in2), + "d" (in3 | VMWARE_HYPERVISOR_PORT_HB), + "S" (in4), + "D" (in5), + [in6] VMW_BP_CONSTRAINT (in6) + : "cc", "memory"); + return out0; +} +#undef VMW_BP_CONSTRAINT +#undef VMWARE_HYPERCALL + #endif --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/x86_init.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/x86_init.h @@ -30,12 +30,13 @@ * @reserve_resources: reserve the standard resources for the * platform * @memory_setup: platform specific memory setup - * + * @dmi_setup: platform specific DMI setup */ struct x86_init_resources { void (*probe_roms)(void); void (*reserve_resources)(void); char *(*memory_setup)(void); + void (*dmi_setup)(void); }; /** @@ -148,12 +149,22 @@ * @enc_status_change_finish Notify HV after the encryption status of a range is changed * @enc_tlb_flush_required Returns true if a TLB flush is needed before changing page encryption status * @enc_cache_flush_required Returns true if a cache flush is needed before changing page encryption status + * @enc_kexec_begin Begin the two-step process of converting shared memory back + * to private. It stops the new conversions from being started + * and waits in-flight conversions to finish, if possible. + * @enc_kexec_finish Finish the two-step process of converting shared memory to + * private. All memory is private after the call when + * the function returns. + * It is called on only one CPU while the others are shut down + * and with interrupts disabled. */ struct x86_guest { - bool (*enc_status_change_prepare)(unsigned long vaddr, int npages, bool enc); - bool (*enc_status_change_finish)(unsigned long vaddr, int npages, bool enc); + int (*enc_status_change_prepare)(unsigned long vaddr, int npages, bool enc); + int (*enc_status_change_finish)(unsigned long vaddr, int npages, bool enc); bool (*enc_tlb_flush_required)(bool enc); bool (*enc_cache_flush_required)(void); + void (*enc_kexec_begin)(void); + void (*enc_kexec_finish)(void); }; /** --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/xen/hypercall.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/xen/hypercall.h @@ -39,9 +39,11 @@ #include #include #include +#include #include +#include #include #include #include @@ -86,11 +88,20 @@ * there aren't more than 5 arguments...) */ -extern struct { char _entry[32]; } hypercall_page[]; +void xen_hypercall_func(void); +DECLARE_STATIC_CALL(xen_hypercall, xen_hypercall_func); -#define __HYPERCALL "call hypercall_page+%c[offset]" -#define __HYPERCALL_ENTRY(x) \ - [offset] "i" (__HYPERVISOR_##x * sizeof(hypercall_page[0])) +#ifdef MODULE +#define __ADDRESSABLE_xen_hypercall +#else +#define __ADDRESSABLE_xen_hypercall __ADDRESSABLE_ASM_STR(__SCK__xen_hypercall) +#endif + +#define __HYPERCALL \ + __ADDRESSABLE_xen_hypercall \ + "call __SCT__xen_hypercall" + +#define __HYPERCALL_ENTRY(x) "a" (x) #ifdef CONFIG_X86_32 #define __HYPERCALL_RETREG "eax" @@ -148,7 +159,7 @@ __HYPERCALL_0ARG(); \ asm volatile (__HYPERCALL \ : __HYPERCALL_0PARAM \ - : __HYPERCALL_ENTRY(name) \ + : __HYPERCALL_ENTRY(__HYPERVISOR_ ## name) \ : __HYPERCALL_CLOBBER0); \ (type)__res; \ }) @@ -159,7 +170,7 @@ __HYPERCALL_1ARG(a1); \ asm volatile (__HYPERCALL \ : __HYPERCALL_1PARAM \ - : __HYPERCALL_ENTRY(name) \ + : __HYPERCALL_ENTRY(__HYPERVISOR_ ## name) \ : __HYPERCALL_CLOBBER1); \ (type)__res; \ }) @@ -170,7 +181,7 @@ __HYPERCALL_2ARG(a1, a2); \ asm volatile (__HYPERCALL \ : __HYPERCALL_2PARAM \ - : __HYPERCALL_ENTRY(name) \ + : __HYPERCALL_ENTRY(__HYPERVISOR_ ## name) \ : __HYPERCALL_CLOBBER2); \ (type)__res; \ }) @@ -181,7 +192,7 @@ __HYPERCALL_3ARG(a1, a2, a3); \ asm volatile (__HYPERCALL \ : __HYPERCALL_3PARAM \ - : __HYPERCALL_ENTRY(name) \ + : __HYPERCALL_ENTRY(__HYPERVISOR_ ## name) \ : __HYPERCALL_CLOBBER3); \ (type)__res; \ }) @@ -192,7 +203,7 @@ __HYPERCALL_4ARG(a1, a2, a3, a4); \ asm volatile (__HYPERCALL \ : __HYPERCALL_4PARAM \ - : __HYPERCALL_ENTRY(name) \ + : __HYPERCALL_ENTRY(__HYPERVISOR_ ## name) \ : __HYPERCALL_CLOBBER4); \ (type)__res; \ }) @@ -206,12 +217,9 @@ __HYPERCALL_DECLS; __HYPERCALL_5ARG(a1, a2, a3, a4, a5); - if (call >= PAGE_SIZE / sizeof(hypercall_page[0])) - return -EINVAL; - - asm volatile(CALL_NOSPEC + asm volatile(__HYPERCALL : __HYPERCALL_5PARAM - : [thunk_target] "a" (&hypercall_page[call]) + : __HYPERCALL_ENTRY(call) : __HYPERCALL_CLOBBER5); return (long)__res; --- linux-xilinx-6.8.0.orig/arch/x86/include/asm/xen/hypervisor.h +++ linux-xilinx-6.8.0/arch/x86/include/asm/xen/hypervisor.h @@ -62,6 +62,11 @@ #ifdef CONFIG_PVH void __init xen_pvh_init(struct boot_params *boot_params); void __init mem_map_via_hcall(struct boot_params *boot_params_p); +#ifdef CONFIG_XEN_PVH +void __init xen_reserve_extra_memory(struct boot_params *bootp); +#else +static inline void xen_reserve_extra_memory(struct boot_params *bootp) { } +#endif #endif /* Lazy mode for batching updates / context switch */ --- linux-xilinx-6.8.0.orig/arch/x86/include/uapi/asm/bootparam.h +++ linux-xilinx-6.8.0/arch/x86/include/uapi/asm/bootparam.h @@ -38,6 +38,7 @@ #define XLF_EFI_KEXEC (1<<4) #define XLF_5LEVEL (1<<5) #define XLF_5LEVEL_ENABLED (1<<6) +#define XLF_MEM_ENCRYPTION (1<<7) #ifndef __ASSEMBLY__ --- linux-xilinx-6.8.0.orig/arch/x86/kernel/acpi/boot.c +++ linux-xilinx-6.8.0/arch/x86/kernel/acpi/boot.c @@ -263,6 +263,28 @@ } static int __init +acpi_check_lapic(union acpi_subtable_headers *header, const unsigned long end) +{ + struct acpi_madt_local_apic *processor = NULL; + + processor = (struct acpi_madt_local_apic *)header; + + if (BAD_MADT_ENTRY(processor, end)) + return -EINVAL; + + /* Ignore invalid ID */ + if (processor->id == 0xff) + return 0; + + /* Ignore processors that can not be onlined */ + if (!acpi_is_processor_usable(processor->lapic_flags)) + return 0; + + has_lapic_cpus = true; + return 0; +} + +static int __init acpi_parse_lapic(union acpi_subtable_headers * header, const unsigned long end) { struct acpi_madt_local_apic *processor = NULL; @@ -293,7 +315,6 @@ processor->processor_id, /* ACPI ID */ processor->lapic_flags & ACPI_MADT_ENABLED); - has_lapic_cpus = true; return 0; } @@ -1125,6 +1146,8 @@ static int __init acpi_parse_madt_lapic_entries(void) { int count, x2count = 0; + struct acpi_subtable_proc madt_proc[2]; + int ret; if (!boot_cpu_has(X86_FEATURE_APIC)) return -ENODEV; @@ -1133,10 +1156,27 @@ acpi_parse_sapic, MAX_LOCAL_APIC); if (!count) { - count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC, - acpi_parse_lapic, MAX_LOCAL_APIC); - x2count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_X2APIC, - acpi_parse_x2apic, MAX_LOCAL_APIC); + /* Check if there are valid LAPIC entries */ + acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC, acpi_check_lapic, MAX_LOCAL_APIC); + + /* + * Enumerate the APIC IDs in the order that they appear in the + * MADT, no matter LAPIC entry or x2APIC entry is used. + */ + memset(madt_proc, 0, sizeof(madt_proc)); + madt_proc[0].id = ACPI_MADT_TYPE_LOCAL_APIC; + madt_proc[0].handler = acpi_parse_lapic; + madt_proc[1].id = ACPI_MADT_TYPE_LOCAL_X2APIC; + madt_proc[1].handler = acpi_parse_x2apic; + ret = acpi_table_parse_entries_array(ACPI_SIG_MADT, + sizeof(struct acpi_table_madt), + madt_proc, ARRAY_SIZE(madt_proc), MAX_LOCAL_APIC); + if (ret < 0) { + pr_err("Error parsing LAPIC/X2APIC entries\n"); + return ret; + } + count = madt_proc[0].count; + x2count = madt_proc[1].count; } if (!count && !x2count) { pr_err("No LAPIC entries present\n"); @@ -1897,3 +1937,14 @@ { return boot_params.acpi_rsdp_addr; } + +#ifdef CONFIG_XEN_PV +void __iomem *x86_acpi_os_ioremap(acpi_physical_address phys, acpi_size size) +{ + return ioremap_cache(phys, size); +} + +void __iomem * (*acpi_os_ioremap)(acpi_physical_address phys, acpi_size size) = + x86_acpi_os_ioremap; +EXPORT_SYMBOL_GPL(acpi_os_ioremap); +#endif --- linux-xilinx-6.8.0.orig/arch/x86/kernel/acpi/cppc.c +++ linux-xilinx-6.8.0/arch/x86/kernel/acpi/cppc.c @@ -20,7 +20,7 @@ (boot_cpu_data.x86_model >= 0x20 && boot_cpu_data.x86_model <= 0x2f))) return true; else if (boot_cpu_data.x86 == 0x17 && - boot_cpu_data.x86_model >= 0x70 && boot_cpu_data.x86_model <= 0x7f) + boot_cpu_data.x86_model >= 0x30 && boot_cpu_data.x86_model <= 0x7f) return true; return boot_cpu_has(X86_FEATURE_CPPC); } --- linux-xilinx-6.8.0.orig/arch/x86/kernel/amd_nb.c +++ linux-xilinx-6.8.0/arch/x86/kernel/amd_nb.c @@ -26,6 +26,7 @@ #define PCI_DEVICE_ID_AMD_19H_M70H_ROOT 0x14e8 #define PCI_DEVICE_ID_AMD_1AH_M00H_ROOT 0x153a #define PCI_DEVICE_ID_AMD_1AH_M20H_ROOT 0x1507 +#define PCI_DEVICE_ID_AMD_1AH_M60H_ROOT 0x1122 #define PCI_DEVICE_ID_AMD_MI200_ROOT 0x14bb #define PCI_DEVICE_ID_AMD_MI300_ROOT 0x14f8 @@ -43,6 +44,9 @@ #define PCI_DEVICE_ID_AMD_19H_M70H_DF_F4 0x14f4 #define PCI_DEVICE_ID_AMD_19H_M78H_DF_F4 0x12fc #define PCI_DEVICE_ID_AMD_1AH_M00H_DF_F4 0x12c4 +#define PCI_DEVICE_ID_AMD_1AH_M20H_DF_F4 0x16fc +#define PCI_DEVICE_ID_AMD_1AH_M60H_DF_F4 0x124c +#define PCI_DEVICE_ID_AMD_1AH_M70H_DF_F4 0x12bc #define PCI_DEVICE_ID_AMD_MI200_DF_F4 0x14d4 #define PCI_DEVICE_ID_AMD_MI300_DF_F4 0x152c @@ -63,6 +67,7 @@ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M70H_ROOT) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M00H_ROOT) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M20H_ROOT) }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M60H_ROOT) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_MI200_ROOT) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_MI300_ROOT) }, {} @@ -95,6 +100,8 @@ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M78H_DF_F3) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M00H_DF_F3) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M20H_DF_F3) }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M60H_DF_F3) }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M70H_DF_F3) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_MI200_DF_F3) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_MI300_DF_F3) }, {} @@ -121,6 +128,9 @@ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M78H_DF_F4) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F4) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M00H_DF_F4) }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M20H_DF_F4) }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M60H_DF_F4) }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M70H_DF_F4) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_MI200_DF_F4) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_MI300_DF_F4) }, {} @@ -214,7 +224,14 @@ int amd_smn_read(u16 node, u32 address, u32 *value) { - return __amd_smn_rw(node, address, value, false); + int err = __amd_smn_rw(node, address, value, false); + + if (PCI_POSSIBLE_ERROR(*value)) { + err = -ENODEV; + *value = 0; + } + + return err; } EXPORT_SYMBOL_GPL(amd_smn_read); @@ -531,6 +548,10 @@ static __init int init_amd_nbs(void) { + if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD && + boot_cpu_data.x86_vendor != X86_VENDOR_HYGON) + return 0; + amd_cache_northbridges(); amd_cache_gart(); --- linux-xilinx-6.8.0.orig/arch/x86/kernel/aperture_64.c +++ linux-xilinx-6.8.0/arch/x86/kernel/aperture_64.c @@ -136,32 +136,6 @@ } -/* Find a PCI capability */ -static u32 __init find_cap(int bus, int slot, int func, int cap) -{ - int bytes; - u8 pos; - - if (!(read_pci_config_16(bus, slot, func, PCI_STATUS) & - PCI_STATUS_CAP_LIST)) - return 0; - - pos = read_pci_config_byte(bus, slot, func, PCI_CAPABILITY_LIST); - for (bytes = 0; bytes < 48 && pos >= 0x40; bytes++) { - u8 id; - - pos &= ~3; - id = read_pci_config_byte(bus, slot, func, pos+PCI_CAP_LIST_ID); - if (id == 0xff) - break; - if (id == cap) - return pos; - pos = read_pci_config_byte(bus, slot, func, - pos+PCI_CAP_LIST_NEXT); - } - return 0; -} - /* Read a standard AGPv3 bridge header */ static u32 __init read_agp(int bus, int slot, int func, int cap, u32 *order) { @@ -250,8 +224,8 @@ case PCI_CLASS_BRIDGE_HOST: case PCI_CLASS_BRIDGE_OTHER: /* needed? */ /* AGP bridge? */ - cap = find_cap(bus, slot, func, - PCI_CAP_ID_AGP); + cap = pci_early_find_cap(bus, slot, + func, PCI_CAP_ID_AGP); if (!cap) break; *valid_agp = 1; --- linux-xilinx-6.8.0.orig/arch/x86/kernel/apic/apic.c +++ linux-xilinx-6.8.0/arch/x86/kernel/apic/apic.c @@ -473,7 +473,19 @@ v = apic_read(APIC_LVTT); v |= (APIC_LVT_MASKED | LOCAL_TIMER_VECTOR); apic_write(APIC_LVTT, v); - apic_write(APIC_TMICT, 0); + + /* + * Setting APIC_LVT_MASKED (above) should be enough to tell + * the hardware that this timer will never fire. But AMD + * erratum 411 and some Intel CPU behavior circa 2024 say + * otherwise. Time for belt and suspenders programming: mask + * the timer _and_ zero the counter registers: + */ + if (v & APIC_LVT_TIMER_TSCDEADLINE) + wrmsrl(MSR_IA32_TSC_DEADLINE, 0); + else + apic_write(APIC_TMICT, 0); + return 0; } @@ -1724,11 +1736,11 @@ static bool x2apic_hw_locked(void) { - u64 ia32_cap; + u64 x86_arch_cap_msr; u64 msr; - ia32_cap = x86_read_arch_cap_msr(); - if (ia32_cap & ARCH_CAP_XAPIC_DISABLE) { + x86_arch_cap_msr = x86_read_arch_cap_msr(); + if (x86_arch_cap_msr & ARCH_CAP_XAPIC_DISABLE) { rdmsrl(MSR_IA32_XAPIC_DISABLE_STATUS, msr); return (msr & LEGACY_XAPIC_DISABLED); } @@ -1808,16 +1820,13 @@ __x2apic_enable(); } -static __init void apic_set_fixmap(void); +static __init void apic_set_fixmap(bool read_apic); static __init void x2apic_disable(void) { - u32 x2apic_id, state = x2apic_state; - - x2apic_mode = 0; - x2apic_state = X2APIC_DISABLED; + u32 x2apic_id; - if (state != X2APIC_ON) + if (x2apic_state < X2APIC_ON) return; x2apic_id = read_apic_id(); @@ -1830,7 +1839,16 @@ } __x2apic_disable(); - apic_set_fixmap(); + + x2apic_mode = 0; + x2apic_state = X2APIC_DISABLED; + + /* + * Don't reread the APIC ID as it was already done from + * check_x2apic() and the APIC driver still is a x2APIC variant, + * which fails to do the read after x2APIC was disabled. + */ + apic_set_fixmap(false); } static __init void x2apic_enable(void) @@ -2095,13 +2113,14 @@ } } -static __init void apic_set_fixmap(void) +static __init void apic_set_fixmap(bool read_apic) { set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr); apic_mmio_base = APIC_BASE; apic_printk(APIC_VERBOSE, "mapped APIC to %16lx (%16lx)\n", apic_mmio_base, mp_lapic_addr); - apic_read_boot_cpu_id(false); + if (read_apic) + apic_read_boot_cpu_id(false); } void __init register_lapic_address(unsigned long address) @@ -2111,7 +2130,7 @@ mp_lapic_addr = address; if (!x2apic_mode) - apic_set_fixmap(); + apic_set_fixmap(true); } /* --- linux-xilinx-6.8.0.orig/arch/x86/kernel/apic/apic_flat_64.c +++ linux-xilinx-6.8.0/arch/x86/kernel/apic/apic_flat_64.c @@ -8,55 +8,13 @@ * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and * James Cleverdon. */ -#include #include -#include -#include #include #include "local.h" -static struct apic apic_physflat; -static struct apic apic_flat; - -struct apic *apic __ro_after_init = &apic_flat; -EXPORT_SYMBOL_GPL(apic); - -static int flat_acpi_madt_oem_check(char *oem_id, char *oem_table_id) -{ - return 1; -} - -static void _flat_send_IPI_mask(unsigned long mask, int vector) -{ - unsigned long flags; - - local_irq_save(flags); - __default_send_IPI_dest_field(mask, vector, APIC_DEST_LOGICAL); - local_irq_restore(flags); -} - -static void flat_send_IPI_mask(const struct cpumask *cpumask, int vector) -{ - unsigned long mask = cpumask_bits(cpumask)[0]; - - _flat_send_IPI_mask(mask, vector); -} - -static void -flat_send_IPI_mask_allbutself(const struct cpumask *cpumask, int vector) -{ - unsigned long mask = cpumask_bits(cpumask)[0]; - int cpu = smp_processor_id(); - - if (cpu < BITS_PER_LONG) - __clear_bit(cpu, &mask); - - _flat_send_IPI_mask(mask, vector); -} - -static u32 flat_get_apic_id(u32 x) +static u32 physflat_get_apic_id(u32 x) { return (x >> 24) & 0xFF; } @@ -71,79 +29,14 @@ return initial_apic_id >> index_msb; } -static int flat_probe(void) +static int physflat_probe(void) { return 1; } -static struct apic apic_flat __ro_after_init = { - .name = "flat", - .probe = flat_probe, - .acpi_madt_oem_check = flat_acpi_madt_oem_check, - .apic_id_registered = default_apic_id_registered, - - .dest_mode_logical = true, - - .disable_esr = 0, - - .init_apic_ldr = default_init_apic_ldr, - .cpu_present_to_apicid = default_cpu_present_to_apicid, - .phys_pkg_id = flat_phys_pkg_id, - - .max_apic_id = 0xFE, - .get_apic_id = flat_get_apic_id, - .set_apic_id = set_apic_id, - - .calc_dest_apicid = apic_flat_calc_apicid, - - .send_IPI = default_send_IPI_single, - .send_IPI_mask = flat_send_IPI_mask, - .send_IPI_mask_allbutself = flat_send_IPI_mask_allbutself, - .send_IPI_allbutself = default_send_IPI_allbutself, - .send_IPI_all = default_send_IPI_all, - .send_IPI_self = default_send_IPI_self, - .nmi_to_offline_cpu = true, - - .read = native_apic_mem_read, - .write = native_apic_mem_write, - .eoi = native_apic_mem_eoi, - .icr_read = native_apic_icr_read, - .icr_write = native_apic_icr_write, - .wait_icr_idle = apic_mem_wait_icr_idle, - .safe_wait_icr_idle = apic_mem_wait_icr_idle_timeout, -}; - -/* - * Physflat mode is used when there are more than 8 CPUs on a system. - * We cannot use logical delivery in this case because the mask - * overflows, so use physical mode. - */ static int physflat_acpi_madt_oem_check(char *oem_id, char *oem_table_id) { -#ifdef CONFIG_ACPI - /* - * Quirk: some x86_64 machines can only use physical APIC mode - * regardless of how many processors are present (x86_64 ES7000 - * is an example). - */ - if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID && - (acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL)) { - printk(KERN_DEBUG "system APIC only can use physical flat"); - return 1; - } - - if (!strncmp(oem_id, "IBM", 3) && !strncmp(oem_table_id, "EXA", 3)) { - printk(KERN_DEBUG "IBM Summit detected, will use apic physical"); - return 1; - } -#endif - - return 0; -} - -static int physflat_probe(void) -{ - return apic == &apic_physflat || num_possible_cpus() > 8 || jailhouse_paravirt(); + return 1; } static struct apic apic_physflat __ro_after_init = { @@ -161,7 +54,7 @@ .phys_pkg_id = flat_phys_pkg_id, .max_apic_id = 0xFE, - .get_apic_id = flat_get_apic_id, + .get_apic_id = physflat_get_apic_id, .set_apic_id = set_apic_id, .calc_dest_apicid = apic_default_calc_apicid, @@ -182,8 +75,7 @@ .wait_icr_idle = apic_mem_wait_icr_idle, .safe_wait_icr_idle = apic_mem_wait_icr_idle_timeout, }; +apic_driver(apic_physflat); -/* - * We need to check for physflat first, so this order is important. - */ -apic_drivers(apic_physflat, apic_flat); +struct apic *apic __ro_after_init = &apic_physflat; +EXPORT_SYMBOL_GPL(apic); --- linux-xilinx-6.8.0.orig/arch/x86/kernel/apic/io_apic.c +++ linux-xilinx-6.8.0/arch/x86/kernel/apic/io_apic.c @@ -352,27 +352,26 @@ * shared ISA-space IRQs, so we have to support them. We are super * fast in the common case, and fast for shared ISA-space IRQs. */ -static int __add_pin_to_irq_node(struct mp_chip_data *data, - int node, int apic, int pin) +static bool add_pin_to_irq_node(struct mp_chip_data *data, int node, int apic, int pin) { struct irq_pin_list *entry; - /* don't allow duplicates */ - for_each_irq_pin(entry, data->irq_2_pin) + /* Don't allow duplicates */ + for_each_irq_pin(entry, data->irq_2_pin) { if (entry->apic == apic && entry->pin == pin) - return 0; + return true; + } entry = kzalloc_node(sizeof(struct irq_pin_list), GFP_ATOMIC, node); if (!entry) { - pr_err("can not alloc irq_pin_list (%d,%d,%d)\n", - node, apic, pin); - return -ENOMEM; + pr_err("Cannot allocate irq_pin_list (%d,%d,%d)\n", node, apic, pin); + return false; } + entry->apic = apic; entry->pin = pin; list_add_tail(&entry->list, &data->irq_2_pin); - - return 0; + return true; } static void __remove_pin_from_irq(struct mp_chip_data *data, int apic, int pin) @@ -387,13 +386,6 @@ } } -static void add_pin_to_irq_node(struct mp_chip_data *data, - int node, int apic, int pin) -{ - if (__add_pin_to_irq_node(data, node, apic, pin)) - panic("IO-APIC: failed to add irq-pin. Can not proceed\n"); -} - /* * Reroute an IRQ to a different pin. */ @@ -1002,8 +994,7 @@ if (irq_data && irq_data->parent_data) { if (!mp_check_pin_attr(irq, info)) return -EBUSY; - if (__add_pin_to_irq_node(irq_data->chip_data, node, ioapic, - info->ioapic.pin)) + if (!add_pin_to_irq_node(irq_data->chip_data, node, ioapic, info->ioapic.pin)) return -ENOMEM; } else { info->flags |= X86_IRQ_ALLOC_LEGACY; @@ -3037,10 +3028,8 @@ return -ENOMEM; ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, info); - if (ret < 0) { - kfree(data); - return ret; - } + if (ret < 0) + goto free_data; INIT_LIST_HEAD(&data->irq_2_pin); irq_data->hwirq = info->ioapic.pin; @@ -3049,7 +3038,10 @@ irq_data->chip_data = data; mp_irqdomain_get_attr(mp_pin_to_gsi(ioapic, pin), data, info); - add_pin_to_irq_node(data, ioapic_alloc_attr_node(info), ioapic, pin); + if (!add_pin_to_irq_node(data, ioapic_alloc_attr_node(info), ioapic, pin)) { + ret = -ENOMEM; + goto free_irqs; + } mp_preconfigure_entry(data); mp_register_handler(virq, data->is_level); @@ -3064,6 +3056,12 @@ ioapic, mpc_ioapic_id(ioapic), pin, virq, data->is_level, data->active_low); return 0; + +free_irqs: + irq_domain_free_irqs_parent(domain, virq, nr_irqs); +free_data: + kfree(data); + return ret; } void mp_irqdomain_free(struct irq_domain *domain, unsigned int virq, --- linux-xilinx-6.8.0.orig/arch/x86/kernel/apic/vector.c +++ linux-xilinx-6.8.0/arch/x86/kernel/apic/vector.c @@ -1036,7 +1036,8 @@ add_timer_on(&cl->timer, cpu); } } else { - apicd->prev_vector = 0; + pr_warn("IRQ %u schedule cleanup for offline CPU %u\n", apicd->irq, cpu); + free_moved_vector(apicd); } raw_spin_unlock(&vector_lock); } @@ -1073,6 +1074,7 @@ */ void irq_force_complete_move(struct irq_desc *desc) { + unsigned int cpu = smp_processor_id(); struct apic_chip_data *apicd; struct irq_data *irqd; unsigned int vector; @@ -1097,10 +1099,11 @@ goto unlock; /* - * If prev_vector is empty, no action required. + * If prev_vector is empty or the descriptor is neither currently + * nor previously on the outgoing CPU no action required. */ vector = apicd->prev_vector; - if (!vector) + if (!vector || (apicd->cpu != cpu && apicd->prev_cpu != cpu)) goto unlock; /* --- linux-xilinx-6.8.0.orig/arch/x86/kernel/callthunks.c +++ linux-xilinx-6.8.0/arch/x86/kernel/callthunks.c @@ -141,11 +141,6 @@ dest < (void*)relocate_kernel + KEXEC_CONTROL_CODE_MAX_SIZE) return true; #endif -#ifdef CONFIG_XEN - if (dest >= (void *)hypercall_page && - dest < (void*)hypercall_page + PAGE_SIZE) - return true; -#endif return false; } --- linux-xilinx-6.8.0.orig/arch/x86/kernel/cet.c +++ linux-xilinx-6.8.0/arch/x86/kernel/cet.c @@ -81,6 +81,34 @@ static __ro_after_init bool ibt_fatal = true; +/* + * By definition, all missing-ENDBRANCH #CPs are a result of WFE && !ENDBR. + * + * For the kernel IBT no ENDBR selftest where #CPs are deliberately triggered, + * the WFE state of the interrupted context needs to be cleared to let execution + * continue. Otherwise when the CPU resumes from the instruction that just + * caused the previous #CP, another missing-ENDBRANCH #CP is raised and the CPU + * enters a dead loop. + * + * This is not a problem with IDT because it doesn't preserve WFE and IRET doesn't + * set WFE. But FRED provides space on the entry stack (in an expanded CS area) + * to save and restore the WFE state, thus the WFE state is no longer clobbered, + * so software must clear it. + */ +static void ibt_clear_fred_wfe(struct pt_regs *regs) +{ + /* + * No need to do any FRED checks. + * + * For IDT event delivery, the high-order 48 bits of CS are pushed + * as 0s into the stack, and later IRET ignores these bits. + * + * For FRED, a test to check if fred_cs.wfe is set would be dropped + * by compilers. + */ + regs->fred_cs.wfe = 0; +} + static void do_kernel_cp_fault(struct pt_regs *regs, unsigned long error_code) { if ((error_code & CP_EC) != CP_ENDBR) { @@ -90,6 +118,7 @@ if (unlikely(regs->ip == (unsigned long)&ibt_selftest_noendbr)) { regs->ax = 0; + ibt_clear_fred_wfe(regs); return; } @@ -97,6 +126,7 @@ if (!ibt_fatal) { printk(KERN_DEFAULT CUT_HERE); __warn(__FILE__, __LINE__, (void *)regs->ip, TAINT_WARN, regs, NULL); + ibt_clear_fred_wfe(regs); return; } BUG(); --- linux-xilinx-6.8.0.orig/arch/x86/kernel/cpu/amd.c +++ linux-xilinx-6.8.0/arch/x86/kernel/cpu/amd.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -572,10 +573,9 @@ case 0x1a: switch (c->x86_model) { - case 0x00 ... 0x0f: - case 0x20 ... 0x2f: + case 0x00 ... 0x2f: case 0x40 ... 0x4f: - case 0x70 ... 0x7f: + case 0x60 ... 0x7f: setup_force_cpu_cap(X86_FEATURE_ZEN5); break; default: @@ -926,6 +926,12 @@ clear_rdrand_cpuid_bit(c); } +static const struct x86_cpu_desc erratum_1386_microcode[] = { + AMD_CPU_DESC(0x17, 0x1, 0x2, 0x0800126e), + AMD_CPU_DESC(0x17, 0x31, 0x0, 0x08301052), + {}, +}; + static void fix_erratum_1386(struct cpuinfo_x86 *c) { /* @@ -935,7 +941,13 @@ * * Affected parts all have no supervisor XSAVE states, meaning that * the XSAVEC instruction (which works fine) is equivalent. + * + * Clear the feature flag only on microcode revisions which + * don't have the fix. */ + if (x86_cpu_has_min_microcode_rev(erratum_1386_microcode)) + return; + clear_cpu_cap(c, X86_FEATURE_XSAVES); } @@ -989,11 +1001,11 @@ u32 good_rev = 0; switch (boot_cpu_data.x86_model) { - case 0x30 ... 0x3f: good_rev = 0x0830107a; break; - case 0x60 ... 0x67: good_rev = 0x0860010b; break; - case 0x68 ... 0x6f: good_rev = 0x08608105; break; - case 0x70 ... 0x7f: good_rev = 0x08701032; break; - case 0xa0 ... 0xaf: good_rev = 0x08a00008; break; + case 0x30 ... 0x3f: good_rev = 0x0830107b; break; + case 0x60 ... 0x67: good_rev = 0x0860010c; break; + case 0x68 ... 0x6f: good_rev = 0x08608107; break; + case 0x70 ... 0x7f: good_rev = 0x08701033; break; + case 0xa0 ... 0xaf: good_rev = 0x08a00009; break; default: return false; @@ -1050,6 +1062,17 @@ if (!cpu_has(c, X86_FEATURE_HYPERVISOR)) msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT); + + /* + * These Zen4 SoCs advertise support for virtualized VMLOAD/VMSAVE + * in some BIOS versions but they can lead to random host reboots. + */ + switch (c->x86_model) { + case 0x18 ... 0x1f: + case 0x60 ... 0x7f: + clear_cpu_cap(c, X86_FEATURE_V_VMSAVE_VMLOAD); + break; + } } static void init_amd_zen5(struct cpuinfo_x86 *c) @@ -1178,7 +1201,7 @@ */ if (spectre_v2_in_eibrs_mode(spectre_v2_enabled) && cpu_has(c, X86_FEATURE_AUTOIBRS)) - WARN_ON_ONCE(msr_set_bit(MSR_EFER, _EFER_AUTOIBRS)); + WARN_ON_ONCE(msr_set_bit(MSR_EFER, _EFER_AUTOIBRS) < 0); /* AMD CPUs don't need fencing after x2APIC/TSC_DEADLINE MSR writes. */ clear_cpu_cap(c, X86_FEATURE_APIC_MSRS_FENCE); @@ -1343,7 +1366,8 @@ if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) return; - on_each_cpu(zenbleed_check_cpu, NULL, 1); + if (cpu_feature_enabled(X86_FEATURE_ZEN2)) + on_each_cpu(zenbleed_check_cpu, NULL, 1); } /* --- linux-xilinx-6.8.0.orig/arch/x86/kernel/cpu/bugs.c +++ linux-xilinx-6.8.0/arch/x86/kernel/cpu/bugs.c @@ -61,6 +61,8 @@ u64 x86_pred_cmd __ro_after_init = PRED_CMD_IBPB; EXPORT_SYMBOL_GPL(x86_pred_cmd); +static u64 __ro_after_init x86_arch_cap_msr; + static DEFINE_MUTEX(spec_ctrl_mutex); void (*x86_return_thunk)(void) __ro_after_init = __x86_return_thunk; @@ -144,6 +146,8 @@ x86_spec_ctrl_base &= ~SPEC_CTRL_MITIGATIONS_MASK; } + x86_arch_cap_msr = x86_read_arch_cap_msr(); + /* Select the proper CPU mitigations before patching alternatives: */ spectre_v1_select_mitigation(); spectre_v2_select_mitigation(); @@ -301,8 +305,6 @@ static void __init taa_select_mitigation(void) { - u64 ia32_cap; - if (!boot_cpu_has_bug(X86_BUG_TAA)) { taa_mitigation = TAA_MITIGATION_OFF; return; @@ -341,9 +343,8 @@ * On MDS_NO=1 CPUs if ARCH_CAP_TSX_CTRL_MSR is not set, microcode * update is required. */ - ia32_cap = x86_read_arch_cap_msr(); - if ( (ia32_cap & ARCH_CAP_MDS_NO) && - !(ia32_cap & ARCH_CAP_TSX_CTRL_MSR)) + if ( (x86_arch_cap_msr & ARCH_CAP_MDS_NO) && + !(x86_arch_cap_msr & ARCH_CAP_TSX_CTRL_MSR)) taa_mitigation = TAA_MITIGATION_UCODE_NEEDED; /* @@ -401,8 +402,6 @@ static void __init mmio_select_mitigation(void) { - u64 ia32_cap; - if (!boot_cpu_has_bug(X86_BUG_MMIO_STALE_DATA) || boot_cpu_has_bug(X86_BUG_MMIO_UNKNOWN) || cpu_mitigations_off()) { @@ -413,8 +412,6 @@ if (mmio_mitigation == MMIO_MITIGATION_OFF) return; - ia32_cap = x86_read_arch_cap_msr(); - /* * Enable CPU buffer clear mitigation for host and VMM, if also affected * by MDS or TAA. Otherwise, enable mitigation for VMM only. @@ -422,6 +419,13 @@ if (boot_cpu_has_bug(X86_BUG_MDS) || (boot_cpu_has_bug(X86_BUG_TAA) && boot_cpu_has(X86_FEATURE_RTM))) setup_force_cpu_cap(X86_FEATURE_CLEAR_CPU_BUF); + + /* + * X86_FEATURE_CLEAR_CPU_BUF could be enabled by other VERW based + * mitigations, disable KVM-only mitigation in that case. + */ + if (boot_cpu_has(X86_FEATURE_CLEAR_CPU_BUF)) + static_branch_disable(&mmio_stale_data_clear); else static_branch_enable(&mmio_stale_data_clear); @@ -430,7 +434,7 @@ * be propagated to uncore buffers, clearing the Fill buffers on idle * is required irrespective of SMT state. */ - if (!(ia32_cap & ARCH_CAP_FBSDP_NO)) + if (!(x86_arch_cap_msr & ARCH_CAP_FBSDP_NO)) static_branch_enable(&mds_idle_clear); /* @@ -440,10 +444,10 @@ * FB_CLEAR or by the presence of both MD_CLEAR and L1D_FLUSH on MDS * affected systems. */ - if ((ia32_cap & ARCH_CAP_FB_CLEAR) || + if ((x86_arch_cap_msr & ARCH_CAP_FB_CLEAR) || (boot_cpu_has(X86_FEATURE_MD_CLEAR) && boot_cpu_has(X86_FEATURE_FLUSH_L1D) && - !(ia32_cap & ARCH_CAP_MDS_NO))) + !(x86_arch_cap_msr & ARCH_CAP_MDS_NO))) mmio_mitigation = MMIO_MITIGATION_VERW; else mmio_mitigation = MMIO_MITIGATION_UCODE_NEEDED; @@ -474,6 +478,57 @@ early_param("mmio_stale_data", mmio_stale_data_parse_cmdline); #undef pr_fmt +#define pr_fmt(fmt) "Register File Data Sampling: " fmt + +enum rfds_mitigations { + RFDS_MITIGATION_OFF, + RFDS_MITIGATION_VERW, + RFDS_MITIGATION_UCODE_NEEDED, +}; + +/* Default mitigation for Register File Data Sampling */ +static enum rfds_mitigations rfds_mitigation __ro_after_init = + IS_ENABLED(CONFIG_MITIGATION_RFDS) ? RFDS_MITIGATION_VERW : RFDS_MITIGATION_OFF; + +static const char * const rfds_strings[] = { + [RFDS_MITIGATION_OFF] = "Vulnerable", + [RFDS_MITIGATION_VERW] = "Mitigation: Clear Register File", + [RFDS_MITIGATION_UCODE_NEEDED] = "Vulnerable: No microcode", +}; + +static void __init rfds_select_mitigation(void) +{ + if (!boot_cpu_has_bug(X86_BUG_RFDS) || cpu_mitigations_off()) { + rfds_mitigation = RFDS_MITIGATION_OFF; + return; + } + if (rfds_mitigation == RFDS_MITIGATION_OFF) + return; + + if (x86_arch_cap_msr & ARCH_CAP_RFDS_CLEAR) + setup_force_cpu_cap(X86_FEATURE_CLEAR_CPU_BUF); + else + rfds_mitigation = RFDS_MITIGATION_UCODE_NEEDED; +} + +static __init int rfds_parse_cmdline(char *str) +{ + if (!str) + return -EINVAL; + + if (!boot_cpu_has_bug(X86_BUG_RFDS)) + return 0; + + if (!strcmp(str, "off")) + rfds_mitigation = RFDS_MITIGATION_OFF; + else if (!strcmp(str, "on")) + rfds_mitigation = RFDS_MITIGATION_VERW; + + return 0; +} +early_param("reg_file_data_sampling", rfds_parse_cmdline); + +#undef pr_fmt #define pr_fmt(fmt) "" fmt static void __init md_clear_update_mitigation(void) @@ -498,11 +553,19 @@ taa_mitigation = TAA_MITIGATION_VERW; taa_select_mitigation(); } - if (mmio_mitigation == MMIO_MITIGATION_OFF && - boot_cpu_has_bug(X86_BUG_MMIO_STALE_DATA)) { + /* + * MMIO_MITIGATION_OFF is not checked here so that mmio_stale_data_clear + * gets updated correctly as per X86_FEATURE_CLEAR_CPU_BUF state. + */ + if (boot_cpu_has_bug(X86_BUG_MMIO_STALE_DATA)) { mmio_mitigation = MMIO_MITIGATION_VERW; mmio_select_mitigation(); } + if (rfds_mitigation == RFDS_MITIGATION_OFF && + boot_cpu_has_bug(X86_BUG_RFDS)) { + rfds_mitigation = RFDS_MITIGATION_VERW; + rfds_select_mitigation(); + } out: if (boot_cpu_has_bug(X86_BUG_MDS)) pr_info("MDS: %s\n", mds_strings[mds_mitigation]); @@ -512,6 +575,8 @@ pr_info("MMIO Stale Data: %s\n", mmio_strings[mmio_mitigation]); else if (boot_cpu_has_bug(X86_BUG_MMIO_UNKNOWN)) pr_info("MMIO Stale Data: Unknown: No mitigations\n"); + if (boot_cpu_has_bug(X86_BUG_RFDS)) + pr_info("Register File Data Sampling: %s\n", rfds_strings[rfds_mitigation]); } static void __init md_clear_select_mitigation(void) @@ -519,11 +584,12 @@ mds_select_mitigation(); taa_select_mitigation(); mmio_select_mitigation(); + rfds_select_mitigation(); /* - * As MDS, TAA and MMIO Stale Data mitigations are inter-related, update - * and print their mitigation after MDS, TAA and MMIO Stale Data - * mitigation selection is done. + * As these mitigations are inter-related and rely on VERW instruction + * to clear the microarchitural buffers, update and print their status + * after mitigation selection is done for each of these vulnerabilities. */ md_clear_update_mitigation(); } @@ -590,8 +656,6 @@ static void __init srbds_select_mitigation(void) { - u64 ia32_cap; - if (!boot_cpu_has_bug(X86_BUG_SRBDS)) return; @@ -600,8 +664,7 @@ * are only exposed to SRBDS when TSX is enabled or when CPU is affected * by Processor MMIO Stale Data vulnerability. */ - ia32_cap = x86_read_arch_cap_msr(); - if ((ia32_cap & ARCH_CAP_MDS_NO) && !boot_cpu_has(X86_FEATURE_RTM) && + if ((x86_arch_cap_msr & ARCH_CAP_MDS_NO) && !boot_cpu_has(X86_FEATURE_RTM) && !boot_cpu_has_bug(X86_BUG_MMIO_STALE_DATA)) srbds_mitigation = SRBDS_MITIGATION_TSX_OFF; else if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) @@ -744,7 +807,7 @@ /* Will verify below that mitigation _can_ be disabled */ /* No microcode */ - if (!(x86_read_arch_cap_msr() & ARCH_CAP_GDS_CTRL)) { + if (!(x86_arch_cap_msr & ARCH_CAP_GDS_CTRL)) { if (gds_mitigation == GDS_MITIGATION_FORCE) { /* * This only needs to be done on the boot CPU so do it @@ -1051,6 +1114,22 @@ setup_force_cpu_cap(X86_FEATURE_ENTRY_IBPB); setup_force_cpu_cap(X86_FEATURE_IBPB_ON_VMEXIT); mitigate_smt = true; + + /* + * IBPB on entry already obviates the need for + * software-based untraining so clear those in case some + * other mitigation like SRSO has selected them. + */ + setup_clear_cpu_cap(X86_FEATURE_UNRET); + setup_clear_cpu_cap(X86_FEATURE_RETHUNK); + + /* + * There is no need for RSB filling: entry_ibpb() ensures + * all predictions, including the RSB, are invalidated, + * regardless of IBPB implementation. + */ + setup_clear_cpu_cap(X86_FEATURE_RSB_VMEXIT); + break; case RETBLEED_MITIGATION_STUFF: @@ -1474,20 +1553,25 @@ return SPECTRE_V2_RETPOLINE; } +static bool __ro_after_init rrsba_disabled; + /* Disable in-kernel use of non-RSB RET predictors */ static void __init spec_ctrl_disable_kernel_rrsba(void) { - u64 ia32_cap; + if (rrsba_disabled) + return; - if (!boot_cpu_has(X86_FEATURE_RRSBA_CTRL)) + if (!(x86_arch_cap_msr & ARCH_CAP_RRSBA)) { + rrsba_disabled = true; return; + } - ia32_cap = x86_read_arch_cap_msr(); + if (!boot_cpu_has(X86_FEATURE_RRSBA_CTRL)) + return; - if (ia32_cap & ARCH_CAP_RRSBA) { - x86_spec_ctrl_base |= SPEC_CTRL_RRSBA_DIS_S; - update_spec_ctrl(x86_spec_ctrl_base); - } + x86_spec_ctrl_base |= SPEC_CTRL_RRSBA_DIS_S; + update_spec_ctrl(x86_spec_ctrl_base); + rrsba_disabled = true; } static void __init spectre_v2_determine_rsb_fill_type_at_vmexit(enum spectre_v2_mitigation mode) @@ -1537,6 +1621,74 @@ dump_stack(); } +/* + * Set BHI_DIS_S to prevent indirect branches in kernel to be influenced by + * branch history in userspace. Not needed if BHI_NO is set. + */ +static bool __init spec_ctrl_bhi_dis(void) +{ + if (!boot_cpu_has(X86_FEATURE_BHI_CTRL)) + return false; + + x86_spec_ctrl_base |= SPEC_CTRL_BHI_DIS_S; + update_spec_ctrl(x86_spec_ctrl_base); + setup_force_cpu_cap(X86_FEATURE_CLEAR_BHB_HW); + + return true; +} + +enum bhi_mitigations { + BHI_MITIGATION_OFF, + BHI_MITIGATION_ON, +}; + +static enum bhi_mitigations bhi_mitigation __ro_after_init = + IS_ENABLED(CONFIG_MITIGATION_SPECTRE_BHI) ? BHI_MITIGATION_ON : BHI_MITIGATION_OFF; + +static int __init spectre_bhi_parse_cmdline(char *str) +{ + if (!str) + return -EINVAL; + + if (!strcmp(str, "off")) + bhi_mitigation = BHI_MITIGATION_OFF; + else if (!strcmp(str, "on")) + bhi_mitigation = BHI_MITIGATION_ON; + else + pr_err("Ignoring unknown spectre_bhi option (%s)", str); + + return 0; +} +early_param("spectre_bhi", spectre_bhi_parse_cmdline); + +static void __init bhi_select_mitigation(void) +{ + if (bhi_mitigation == BHI_MITIGATION_OFF) + return; + + /* Retpoline mitigates against BHI unless the CPU has RRSBA behavior */ + if (boot_cpu_has(X86_FEATURE_RETPOLINE) && + !boot_cpu_has(X86_FEATURE_RETPOLINE_LFENCE)) { + spec_ctrl_disable_kernel_rrsba(); + if (rrsba_disabled) + return; + } + + if (spec_ctrl_bhi_dis()) + return; + + if (!IS_ENABLED(CONFIG_X86_64)) + return; + + /* Mitigate KVM by default */ + setup_force_cpu_cap(X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT); + pr_info("Spectre BHI mitigation: SW BHB clearing on vm exit\n"); + + /* Mitigate syscalls when the mitigation is forced =on */ + setup_force_cpu_cap(X86_FEATURE_CLEAR_BHB_LOOP); + pr_info("Spectre BHI mitigation: SW BHB clearing on syscall\n"); +} + static void __init spectre_v2_select_mitigation(void) { enum spectre_v2_mitigation_cmd cmd = spectre_v2_parse_cmdline(); @@ -1648,6 +1800,9 @@ mode == SPECTRE_V2_RETPOLINE) spec_ctrl_disable_kernel_rrsba(); + if (boot_cpu_has(X86_BUG_BHI)) + bhi_select_mitigation(); + spectre_v2_enabled = mode; pr_info("%s\n", spectre_v2_strings[mode]); @@ -1762,8 +1917,6 @@ /* Update the static key controlling the MDS CPU buffer clear in idle */ static void update_mds_branch_idle(void) { - u64 ia32_cap = x86_read_arch_cap_msr(); - /* * Enable the idle clearing if SMT is active on CPUs which are * affected only by MSBDS and not any other MDS variant. @@ -1778,7 +1931,7 @@ if (sched_smt_active()) { static_branch_enable(&mds_idle_clear); } else if (mmio_mitigation == MMIO_MITIGATION_OFF || - (ia32_cap & ARCH_CAP_FBSDP_NO)) { + (x86_arch_cap_msr & ARCH_CAP_FBSDP_NO)) { static_branch_disable(&mds_idle_clear); } } @@ -2407,10 +2560,9 @@ { bool has_microcode = boot_cpu_has(X86_FEATURE_IBPB_BRTYPE); - if (cpu_mitigations_off()) - return; - - if (!boot_cpu_has_bug(X86_BUG_SRSO)) { + if (!boot_cpu_has_bug(X86_BUG_SRSO) || + cpu_mitigations_off() || + srso_cmd == SRSO_CMD_OFF) { if (boot_cpu_has(X86_FEATURE_SBPB)) x86_pred_cmd = PRED_CMD_SBPB; return; @@ -2441,11 +2593,6 @@ } switch (srso_cmd) { - case SRSO_CMD_OFF: - if (boot_cpu_has(X86_FEATURE_SBPB)) - x86_pred_cmd = PRED_CMD_SBPB; - return; - case SRSO_CMD_MICROCODE: if (has_microcode) { srso_mitigation = SRSO_MITIGATION_MICROCODE; @@ -2482,7 +2629,23 @@ if (IS_ENABLED(CONFIG_CPU_IBPB_ENTRY)) { if (has_microcode) { setup_force_cpu_cap(X86_FEATURE_ENTRY_IBPB); + setup_force_cpu_cap(X86_FEATURE_IBPB_ON_VMEXIT); srso_mitigation = SRSO_MITIGATION_IBPB; + + /* + * IBPB on entry already obviates the need for + * software-based untraining so clear those in case some + * other mitigation like Retbleed has selected them. + */ + setup_clear_cpu_cap(X86_FEATURE_UNRET); + setup_clear_cpu_cap(X86_FEATURE_RETHUNK); + + /* + * There is no need for RSB filling: entry_ibpb() ensures + * all predictions, including the RSB, are invalidated, + * regardless of IBPB implementation. + */ + setup_clear_cpu_cap(X86_FEATURE_RSB_VMEXIT); } } else { pr_err("WARNING: kernel not compiled with CPU_IBPB_ENTRY.\n"); @@ -2490,15 +2653,24 @@ break; case SRSO_CMD_IBPB_ON_VMEXIT: - if (IS_ENABLED(CONFIG_CPU_SRSO)) { - if (!boot_cpu_has(X86_FEATURE_ENTRY_IBPB) && has_microcode) { + if (IS_ENABLED(CONFIG_CPU_IBPB_ENTRY)) { + if (has_microcode) { setup_force_cpu_cap(X86_FEATURE_IBPB_ON_VMEXIT); srso_mitigation = SRSO_MITIGATION_IBPB_ON_VMEXIT; + + /* + * There is no need for RSB filling: entry_ibpb() ensures + * all predictions, including the RSB, are invalidated, + * regardless of IBPB implementation. + */ + setup_clear_cpu_cap(X86_FEATURE_RSB_VMEXIT); } } else { - pr_err("WARNING: kernel not compiled with CPU_SRSO.\n"); + pr_err("WARNING: kernel not compiled with CPU_IBPB_ENTRY.\n"); } break; + default: + break; } out: @@ -2612,6 +2784,11 @@ sched_smt_active() ? "vulnerable" : "disabled"); } +static ssize_t rfds_show_state(char *buf) +{ + return sysfs_emit(buf, "%s\n", rfds_strings[rfds_mitigation]); +} + static char *stibp_state(void) { if (spectre_v2_in_eibrs_mode(spectre_v2_enabled) && @@ -2620,15 +2797,15 @@ switch (spectre_v2_user_stibp) { case SPECTRE_V2_USER_NONE: - return ", STIBP: disabled"; + return "; STIBP: disabled"; case SPECTRE_V2_USER_STRICT: - return ", STIBP: forced"; + return "; STIBP: forced"; case SPECTRE_V2_USER_STRICT_PREFERRED: - return ", STIBP: always-on"; + return "; STIBP: always-on"; case SPECTRE_V2_USER_PRCTL: case SPECTRE_V2_USER_SECCOMP: if (static_key_enabled(&switch_to_cond_stibp)) - return ", STIBP: conditional"; + return "; STIBP: conditional"; } return ""; } @@ -2637,10 +2814,10 @@ { if (boot_cpu_has(X86_FEATURE_IBPB)) { if (static_key_enabled(&switch_mm_always_ibpb)) - return ", IBPB: always-on"; + return "; IBPB: always-on"; if (static_key_enabled(&switch_mm_cond_ibpb)) - return ", IBPB: conditional"; - return ", IBPB: disabled"; + return "; IBPB: conditional"; + return "; IBPB: disabled"; } return ""; } @@ -2650,14 +2827,32 @@ if (boot_cpu_has_bug(X86_BUG_EIBRS_PBRSB)) { if (boot_cpu_has(X86_FEATURE_RSB_VMEXIT_LITE) || boot_cpu_has(X86_FEATURE_RSB_VMEXIT)) - return ", PBRSB-eIBRS: SW sequence"; + return "; PBRSB-eIBRS: SW sequence"; else - return ", PBRSB-eIBRS: Vulnerable"; + return "; PBRSB-eIBRS: Vulnerable"; } else { - return ", PBRSB-eIBRS: Not affected"; + return "; PBRSB-eIBRS: Not affected"; } } +static const char *spectre_bhi_state(void) +{ + if (!boot_cpu_has_bug(X86_BUG_BHI)) + return "; BHI: Not affected"; + else if (boot_cpu_has(X86_FEATURE_CLEAR_BHB_HW)) + return "; BHI: BHI_DIS_S"; + else if (boot_cpu_has(X86_FEATURE_CLEAR_BHB_LOOP)) + return "; BHI: SW loop, KVM: SW loop"; + else if (boot_cpu_has(X86_FEATURE_RETPOLINE) && + !boot_cpu_has(X86_FEATURE_RETPOLINE_LFENCE) && + rrsba_disabled) + return "; BHI: Retpoline"; + else if (boot_cpu_has(X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT)) + return "; BHI: Vulnerable, KVM: SW loop"; + + return "; BHI: Vulnerable"; +} + static ssize_t spectre_v2_show_state(char *buf) { if (spectre_v2_enabled == SPECTRE_V2_LFENCE) @@ -2670,13 +2865,15 @@ spectre_v2_enabled == SPECTRE_V2_EIBRS_LFENCE) return sysfs_emit(buf, "Vulnerable: eIBRS+LFENCE with unprivileged eBPF and SMT\n"); - return sysfs_emit(buf, "%s%s%s%s%s%s%s\n", + return sysfs_emit(buf, "%s%s%s%s%s%s%s%s\n", spectre_v2_strings[spectre_v2_enabled], ibpb_state(), - boot_cpu_has(X86_FEATURE_USE_IBRS_FW) ? ", IBRS_FW" : "", + boot_cpu_has(X86_FEATURE_USE_IBRS_FW) ? "; IBRS_FW" : "", stibp_state(), - boot_cpu_has(X86_FEATURE_RSB_CTXSW) ? ", RSB filling" : "", + boot_cpu_has(X86_FEATURE_RSB_CTXSW) ? "; RSB filling" : "", pbrsb_eibrs_state(), + spectre_bhi_state(), + /* this should always be at the end */ spectre_v2_module_string()); } @@ -2771,6 +2968,9 @@ case X86_BUG_GDS: return gds_show_state(buf); + case X86_BUG_RFDS: + return rfds_show_state(buf); + default: break; } @@ -2845,4 +3045,9 @@ { return cpu_show_common(dev, attr, buf, X86_BUG_GDS); } + +ssize_t cpu_show_reg_file_data_sampling(struct device *dev, struct device_attribute *attr, char *buf) +{ + return cpu_show_common(dev, attr, buf, X86_BUG_RFDS); +} #endif --- linux-xilinx-6.8.0.orig/arch/x86/kernel/cpu/cacheinfo.c +++ linux-xilinx-6.8.0/arch/x86/kernel/cpu/cacheinfo.c @@ -178,7 +178,16 @@ struct amd_northbridge *nb; }; -static unsigned short num_cache_leaves; +static inline unsigned int get_num_cache_leaves(unsigned int cpu) +{ + return get_cpu_cacheinfo(cpu)->num_leaves; +} + +static inline void +set_num_cache_leaves(unsigned int nr_leaves, unsigned int cpu) +{ + get_cpu_cacheinfo(cpu)->num_leaves = nr_leaves; +} /* AMD doesn't have CPUID4. Emulate it here to report the same information to the user. This makes some assumptions about the machine: @@ -718,19 +727,21 @@ void init_amd_cacheinfo(struct cpuinfo_x86 *c) { + unsigned int cpu = c->cpu_index; + if (boot_cpu_has(X86_FEATURE_TOPOEXT)) { - num_cache_leaves = find_num_cache_leaves(c); + set_num_cache_leaves(find_num_cache_leaves(c), cpu); } else if (c->extended_cpuid_level >= 0x80000006) { if (cpuid_edx(0x80000006) & 0xf000) - num_cache_leaves = 4; + set_num_cache_leaves(4, cpu); else - num_cache_leaves = 3; + set_num_cache_leaves(3, cpu); } } void init_hygon_cacheinfo(struct cpuinfo_x86 *c) { - num_cache_leaves = find_num_cache_leaves(c); + set_num_cache_leaves(find_num_cache_leaves(c), c->cpu_index); } void init_intel_cacheinfo(struct cpuinfo_x86 *c) @@ -742,19 +753,19 @@ unsigned int l2_id = 0, l3_id = 0, num_threads_sharing, index_msb; if (c->cpuid_level > 3) { - static int is_initialized; - - if (is_initialized == 0) { - /* Init num_cache_leaves from boot CPU */ - num_cache_leaves = find_num_cache_leaves(c); - is_initialized++; - } + /* + * There should be at least one leaf. A non-zero value means + * that the number of leaves has been initialized. + */ + if (!get_num_cache_leaves(c->cpu_index)) + set_num_cache_leaves(find_num_cache_leaves(c), + c->cpu_index); /* * Whenever possible use cpuid(4), deterministic cache * parameters cpuid leaf to find the cache details */ - for (i = 0; i < num_cache_leaves; i++) { + for (i = 0; i < get_num_cache_leaves(c->cpu_index); i++) { struct _cpuid4_info_regs this_leaf = {}; int retval; @@ -790,14 +801,14 @@ * Don't use cpuid2 if cpuid4 is supported. For P4, we use cpuid2 for * trace cache */ - if ((num_cache_leaves == 0 || c->x86 == 15) && c->cpuid_level > 1) { + if ((!get_num_cache_leaves(c->cpu_index) || c->x86 == 15) && c->cpuid_level > 1) { /* supports eax=2 call */ int j, n; unsigned int regs[4]; unsigned char *dp = (unsigned char *)regs; int only_trace = 0; - if (num_cache_leaves != 0 && c->x86 == 15) + if (get_num_cache_leaves(c->cpu_index) && c->x86 == 15) only_trace = 1; /* Number of times to iterate */ @@ -991,14 +1002,6 @@ int init_cache_level(unsigned int cpu) { - struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); - - if (!num_cache_leaves) - return -ENOENT; - if (!this_cpu_ci) - return -EINVAL; - this_cpu_ci->num_levels = 3; - this_cpu_ci->num_leaves = num_cache_leaves; return 0; } --- linux-xilinx-6.8.0.orig/arch/x86/kernel/cpu/common.c +++ linux-xilinx-6.8.0/arch/x86/kernel/cpu/common.c @@ -909,7 +909,7 @@ #endif } -static void get_cpu_vendor(struct cpuinfo_x86 *c) +void get_cpu_vendor(struct cpuinfo_x86 *c) { char *v = c->x86_vendor_id; int i; @@ -1096,18 +1096,9 @@ void get_cpu_address_sizes(struct cpuinfo_x86 *c) { u32 eax, ebx, ecx, edx; - bool vp_bits_from_cpuid = true; if (!cpu_has(c, X86_FEATURE_CPUID) || - (c->extended_cpuid_level < 0x80000008)) - vp_bits_from_cpuid = false; - - if (vp_bits_from_cpuid) { - cpuid(0x80000008, &eax, &ebx, &ecx, &edx); - - c->x86_virt_bits = (eax >> 8) & 0xff; - c->x86_phys_bits = eax & 0xff; - } else { + (c->extended_cpuid_level < 0x80000008)) { if (IS_ENABLED(CONFIG_X86_64)) { c->x86_clflush_size = 64; c->x86_phys_bits = 36; @@ -1121,7 +1112,17 @@ cpu_has(c, X86_FEATURE_PSE36)) c->x86_phys_bits = 36; } + } else { + cpuid(0x80000008, &eax, &ebx, &ecx, &edx); + + c->x86_virt_bits = (eax >> 8) & 0xff; + c->x86_phys_bits = eax & 0xff; + + /* Provide a sane default if not enumerated: */ + if (!c->x86_clflush_size) + c->x86_clflush_size = 32; } + c->x86_cache_bits = c->x86_phys_bits; c->x86_cache_alignment = c->x86_clflush_size; } @@ -1163,6 +1164,7 @@ #define NO_SPECTRE_V2 BIT(8) #define NO_MMIO BIT(9) #define NO_EIBRS_PBRSB BIT(10) +#define NO_BHI BIT(11) #define VULNWL(vendor, family, model, whitelist) \ X86_MATCH_VENDOR_FAM_MODEL(vendor, family, model, whitelist) @@ -1205,8 +1207,8 @@ VULNWL_INTEL(CORE_YONAH, NO_SSB), - VULNWL_INTEL(ATOM_AIRMONT_MID, NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT), - VULNWL_INTEL(ATOM_AIRMONT_NP, NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT), + VULNWL_INTEL(ATOM_AIRMONT_MID, NO_SSB | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | MSBDS_ONLY), + VULNWL_INTEL(ATOM_AIRMONT_NP, NO_SSB | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT), VULNWL_INTEL(ATOM_GOLDMONT, NO_MDS | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO), VULNWL_INTEL(ATOM_GOLDMONT_D, NO_MDS | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO), @@ -1225,18 +1227,18 @@ VULNWL_INTEL(ATOM_TREMONT_D, NO_ITLB_MULTIHIT | NO_EIBRS_PBRSB), /* AMD Family 0xf - 0x12 */ - VULNWL_AMD(0x0f, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO), - VULNWL_AMD(0x10, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO), - VULNWL_AMD(0x11, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO), - VULNWL_AMD(0x12, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO), + VULNWL_AMD(0x0f, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO | NO_BHI), + VULNWL_AMD(0x10, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO | NO_BHI), + VULNWL_AMD(0x11, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO | NO_BHI), + VULNWL_AMD(0x12, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO | NO_BHI), /* FAMILY_ANY must be last, otherwise 0x0f - 0x12 matches won't work */ - VULNWL_AMD(X86_FAMILY_ANY, NO_MELTDOWN | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO | NO_EIBRS_PBRSB), - VULNWL_HYGON(X86_FAMILY_ANY, NO_MELTDOWN | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO | NO_EIBRS_PBRSB), + VULNWL_AMD(X86_FAMILY_ANY, NO_MELTDOWN | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO | NO_EIBRS_PBRSB | NO_BHI), + VULNWL_HYGON(X86_FAMILY_ANY, NO_MELTDOWN | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO | NO_EIBRS_PBRSB | NO_BHI), /* Zhaoxin Family 7 */ - VULNWL(CENTAUR, 7, X86_MODEL_ANY, NO_SPECTRE_V2 | NO_SWAPGS | NO_MMIO), - VULNWL(ZHAOXIN, 7, X86_MODEL_ANY, NO_SPECTRE_V2 | NO_SWAPGS | NO_MMIO), + VULNWL(CENTAUR, 7, X86_MODEL_ANY, NO_SPECTRE_V2 | NO_SWAPGS | NO_MMIO | NO_BHI), + VULNWL(ZHAOXIN, 7, X86_MODEL_ANY, NO_SPECTRE_V2 | NO_SWAPGS | NO_MMIO | NO_BHI), {} }; @@ -1267,6 +1269,8 @@ #define SRSO BIT(5) /* CPU is affected by GDS */ #define GDS BIT(6) +/* CPU is affected by Register File Data Sampling */ +#define RFDS BIT(7) static const struct x86_cpu_id cpu_vuln_blacklist[] __initconst = { VULNBL_INTEL_STEPPINGS(IVYBRIDGE, X86_STEPPING_ANY, SRBDS), @@ -1294,9 +1298,18 @@ VULNBL_INTEL_STEPPINGS(TIGERLAKE, X86_STEPPING_ANY, GDS), VULNBL_INTEL_STEPPINGS(LAKEFIELD, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RETBLEED), VULNBL_INTEL_STEPPINGS(ROCKETLAKE, X86_STEPPING_ANY, MMIO | RETBLEED | GDS), - VULNBL_INTEL_STEPPINGS(ATOM_TREMONT, X86_STEPPING_ANY, MMIO | MMIO_SBDS), - VULNBL_INTEL_STEPPINGS(ATOM_TREMONT_D, X86_STEPPING_ANY, MMIO), - VULNBL_INTEL_STEPPINGS(ATOM_TREMONT_L, X86_STEPPING_ANY, MMIO | MMIO_SBDS), + VULNBL_INTEL_STEPPINGS(ALDERLAKE, X86_STEPPING_ANY, RFDS), + VULNBL_INTEL_STEPPINGS(ALDERLAKE_L, X86_STEPPING_ANY, RFDS), + VULNBL_INTEL_STEPPINGS(RAPTORLAKE, X86_STEPPING_ANY, RFDS), + VULNBL_INTEL_STEPPINGS(RAPTORLAKE_P, X86_STEPPING_ANY, RFDS), + VULNBL_INTEL_STEPPINGS(RAPTORLAKE_S, X86_STEPPING_ANY, RFDS), + VULNBL_INTEL_STEPPINGS(ATOM_GRACEMONT, X86_STEPPING_ANY, RFDS), + VULNBL_INTEL_STEPPINGS(ATOM_TREMONT, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RFDS), + VULNBL_INTEL_STEPPINGS(ATOM_TREMONT_D, X86_STEPPING_ANY, MMIO | RFDS), + VULNBL_INTEL_STEPPINGS(ATOM_TREMONT_L, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RFDS), + VULNBL_INTEL_STEPPINGS(ATOM_GOLDMONT, X86_STEPPING_ANY, RFDS), + VULNBL_INTEL_STEPPINGS(ATOM_GOLDMONT_D, X86_STEPPING_ANY, RFDS), + VULNBL_INTEL_STEPPINGS(ATOM_GOLDMONT_PLUS, X86_STEPPING_ANY, RFDS), VULNBL_AMD(0x15, RETBLEED), VULNBL_AMD(0x16, RETBLEED), @@ -1315,28 +1328,46 @@ u64 x86_read_arch_cap_msr(void) { - u64 ia32_cap = 0; + u64 x86_arch_cap_msr = 0; if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES)) - rdmsrl(MSR_IA32_ARCH_CAPABILITIES, ia32_cap); + rdmsrl(MSR_IA32_ARCH_CAPABILITIES, x86_arch_cap_msr); - return ia32_cap; + return x86_arch_cap_msr; } -static bool arch_cap_mmio_immune(u64 ia32_cap) +static bool arch_cap_mmio_immune(u64 x86_arch_cap_msr) { - return (ia32_cap & ARCH_CAP_FBSDP_NO && - ia32_cap & ARCH_CAP_PSDP_NO && - ia32_cap & ARCH_CAP_SBDR_SSDP_NO); + return (x86_arch_cap_msr & ARCH_CAP_FBSDP_NO && + x86_arch_cap_msr & ARCH_CAP_PSDP_NO && + x86_arch_cap_msr & ARCH_CAP_SBDR_SSDP_NO); +} + +static bool __init vulnerable_to_rfds(u64 x86_arch_cap_msr) +{ + /* The "immunity" bit trumps everything else: */ + if (x86_arch_cap_msr & ARCH_CAP_RFDS_NO) + return false; + + /* + * VMMs set ARCH_CAP_RFDS_CLEAR for processors not in the blacklist to + * indicate that mitigation is needed because guest is running on a + * vulnerable hardware or may migrate to such hardware: + */ + if (x86_arch_cap_msr & ARCH_CAP_RFDS_CLEAR) + return true; + + /* Only consult the blacklist when there is no enumeration: */ + return cpu_matches(cpu_vuln_blacklist, RFDS); } static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c) { - u64 ia32_cap = x86_read_arch_cap_msr(); + u64 x86_arch_cap_msr = x86_read_arch_cap_msr(); /* Set ITLB_MULTIHIT bug if cpu is not in the whitelist and not mitigated */ if (!cpu_matches(cpu_vuln_whitelist, NO_ITLB_MULTIHIT) && - !(ia32_cap & ARCH_CAP_PSCHANGE_MC_NO)) + !(x86_arch_cap_msr & ARCH_CAP_PSCHANGE_MC_NO)) setup_force_cpu_bug(X86_BUG_ITLB_MULTIHIT); if (cpu_matches(cpu_vuln_whitelist, NO_SPECULATION)) @@ -1348,7 +1379,7 @@ setup_force_cpu_bug(X86_BUG_SPECTRE_V2); if (!cpu_matches(cpu_vuln_whitelist, NO_SSB) && - !(ia32_cap & ARCH_CAP_SSB_NO) && + !(x86_arch_cap_msr & ARCH_CAP_SSB_NO) && !cpu_has(c, X86_FEATURE_AMD_SSB_NO)) setup_force_cpu_bug(X86_BUG_SPEC_STORE_BYPASS); @@ -1356,15 +1387,15 @@ * AMD's AutoIBRS is equivalent to Intel's eIBRS - use the Intel feature * flag and protect from vendor-specific bugs via the whitelist. */ - if ((ia32_cap & ARCH_CAP_IBRS_ALL) || cpu_has(c, X86_FEATURE_AUTOIBRS)) { + if ((x86_arch_cap_msr & ARCH_CAP_IBRS_ALL) || cpu_has(c, X86_FEATURE_AUTOIBRS)) { setup_force_cpu_cap(X86_FEATURE_IBRS_ENHANCED); if (!cpu_matches(cpu_vuln_whitelist, NO_EIBRS_PBRSB) && - !(ia32_cap & ARCH_CAP_PBRSB_NO)) + !(x86_arch_cap_msr & ARCH_CAP_PBRSB_NO)) setup_force_cpu_bug(X86_BUG_EIBRS_PBRSB); } if (!cpu_matches(cpu_vuln_whitelist, NO_MDS) && - !(ia32_cap & ARCH_CAP_MDS_NO)) { + !(x86_arch_cap_msr & ARCH_CAP_MDS_NO)) { setup_force_cpu_bug(X86_BUG_MDS); if (cpu_matches(cpu_vuln_whitelist, MSBDS_ONLY)) setup_force_cpu_bug(X86_BUG_MSBDS_ONLY); @@ -1383,9 +1414,9 @@ * TSX_CTRL check alone is not sufficient for cases when the microcode * update is not present or running as guest that don't get TSX_CTRL. */ - if (!(ia32_cap & ARCH_CAP_TAA_NO) && + if (!(x86_arch_cap_msr & ARCH_CAP_TAA_NO) && (cpu_has(c, X86_FEATURE_RTM) || - (ia32_cap & ARCH_CAP_TSX_CTRL_MSR))) + (x86_arch_cap_msr & ARCH_CAP_TSX_CTRL_MSR))) setup_force_cpu_bug(X86_BUG_TAA); /* @@ -1411,7 +1442,7 @@ * Set X86_BUG_MMIO_UNKNOWN for CPUs that are neither in the blacklist, * nor in the whitelist and also don't enumerate MSR ARCH_CAP MMIO bits. */ - if (!arch_cap_mmio_immune(ia32_cap)) { + if (!arch_cap_mmio_immune(x86_arch_cap_msr)) { if (cpu_matches(cpu_vuln_blacklist, MMIO)) setup_force_cpu_bug(X86_BUG_MMIO_STALE_DATA); else if (!cpu_matches(cpu_vuln_whitelist, NO_MMIO)) @@ -1419,7 +1450,7 @@ } if (!cpu_has(c, X86_FEATURE_BTC_NO)) { - if (cpu_matches(cpu_vuln_blacklist, RETBLEED) || (ia32_cap & ARCH_CAP_RSBA)) + if (cpu_matches(cpu_vuln_blacklist, RETBLEED) || (x86_arch_cap_msr & ARCH_CAP_RSBA)) setup_force_cpu_bug(X86_BUG_RETBLEED); } @@ -1437,15 +1468,28 @@ * disabling AVX2. The only way to do this in HW is to clear XCR0[2], * which means that AVX will be disabled. */ - if (cpu_matches(cpu_vuln_blacklist, GDS) && !(ia32_cap & ARCH_CAP_GDS_NO) && + if (cpu_matches(cpu_vuln_blacklist, GDS) && !(x86_arch_cap_msr & ARCH_CAP_GDS_NO) && boot_cpu_has(X86_FEATURE_AVX)) setup_force_cpu_bug(X86_BUG_GDS); + if (vulnerable_to_rfds(x86_arch_cap_msr)) + setup_force_cpu_bug(X86_BUG_RFDS); + + /* When virtualized, eIBRS could be hidden, assume vulnerable */ + if (!(x86_arch_cap_msr & ARCH_CAP_BHI_NO) && + !cpu_matches(cpu_vuln_whitelist, NO_BHI) && + (boot_cpu_has(X86_FEATURE_IBRS_ENHANCED) || + boot_cpu_has(X86_FEATURE_HYPERVISOR))) + setup_force_cpu_bug(X86_BUG_BHI); + + if (cpu_has(c, X86_FEATURE_AMD_IBPB) && !cpu_has(c, X86_FEATURE_AMD_IBPB_RET)) + setup_force_cpu_bug(X86_BUG_IBPB_NO_RET); + if (cpu_matches(cpu_vuln_whitelist, NO_MELTDOWN)) return; /* Rogue Data Cache Load? No! */ - if (ia32_cap & ARCH_CAP_RDCL_NO) + if (x86_arch_cap_msr & ARCH_CAP_RDCL_NO) return; setup_force_cpu_bug(X86_BUG_CPU_MELTDOWN); @@ -1587,6 +1631,7 @@ if (have_cpuid_p()) { cpu_detect(c); get_cpu_vendor(c); + intel_unlock_cpuid_leafs(c); get_cpu_cap(c); setup_force_cpu_cap(X86_FEATURE_CPUID); get_cpu_address_sizes(c); @@ -1637,15 +1682,11 @@ detect_nopl(); } -void __init early_cpu_init(void) +void __init init_cpu_devs(void) { const struct cpu_dev *const *cdev; int count = 0; -#ifdef CONFIG_PROCESSOR_SELECT - pr_info("KERNEL supported cpus:\n"); -#endif - for (cdev = __x86_cpu_dev_start; cdev < __x86_cpu_dev_end; cdev++) { const struct cpu_dev *cpudev = *cdev; @@ -1653,20 +1694,30 @@ break; cpu_devs[count] = cpudev; count++; + } +} +void __init early_cpu_init(void) +{ #ifdef CONFIG_PROCESSOR_SELECT - { - unsigned int j; + unsigned int i, j; - for (j = 0; j < 2; j++) { - if (!cpudev->c_ident[j]) - continue; - pr_info(" %s %s\n", cpudev->c_vendor, - cpudev->c_ident[j]); - } - } + pr_info("KERNEL supported cpus:\n"); #endif + + init_cpu_devs(); + +#ifdef CONFIG_PROCESSOR_SELECT + for (i = 0; i < X86_VENDOR_NUM && cpu_devs[i]; i++) { + for (j = 0; j < 2; j++) { + if (!cpu_devs[i]->c_ident[j]) + continue; + pr_info(" %s %s\n", cpu_devs[i]->c_vendor, + cpu_devs[i]->c_ident[j]); + } } +#endif + early_identify_cpu(&boot_cpu_data); } @@ -1743,7 +1794,7 @@ cpu_detect(c); get_cpu_vendor(c); - + intel_unlock_cpuid_leafs(c); get_cpu_cap(c); get_cpu_address_sizes(c); @@ -2108,8 +2159,10 @@ #ifdef CONFIG_STACKPROTECTOR DEFINE_PER_CPU(unsigned long, __stack_chk_guard); +#ifndef CONFIG_SMP EXPORT_PER_CPU_SYMBOL(__stack_chk_guard); #endif +#endif #endif /* CONFIG_X86_64 */ --- linux-xilinx-6.8.0.orig/arch/x86/kernel/cpu/cpu.h +++ linux-xilinx-6.8.0/arch/x86/kernel/cpu/cpu.h @@ -56,9 +56,11 @@ extern void __init tsx_init(void); void tsx_ap_init(void); +void intel_unlock_cpuid_leafs(struct cpuinfo_x86 *c); #else static inline void tsx_init(void) { } static inline void tsx_ap_init(void) { } +static inline void intel_unlock_cpuid_leafs(struct cpuinfo_x86 *c) { } #endif /* CONFIG_CPU_SUP_INTEL */ extern void init_spectral_chicken(struct cpuinfo_x86 *c); --- linux-xilinx-6.8.0.orig/arch/x86/kernel/cpu/cpuid-deps.c +++ linux-xilinx-6.8.0/arch/x86/kernel/cpu/cpuid-deps.c @@ -44,7 +44,10 @@ { X86_FEATURE_F16C, X86_FEATURE_XMM2, }, { X86_FEATURE_AES, X86_FEATURE_XMM2 }, { X86_FEATURE_SHA_NI, X86_FEATURE_XMM2 }, + { X86_FEATURE_GFNI, X86_FEATURE_XMM2 }, { X86_FEATURE_FMA, X86_FEATURE_AVX }, + { X86_FEATURE_VAES, X86_FEATURE_AVX }, + { X86_FEATURE_VPCLMULQDQ, X86_FEATURE_AVX }, { X86_FEATURE_AVX2, X86_FEATURE_AVX, }, { X86_FEATURE_AVX512F, X86_FEATURE_AVX, }, { X86_FEATURE_AVX512IFMA, X86_FEATURE_AVX512F }, @@ -56,9 +59,6 @@ { X86_FEATURE_AVX512VL, X86_FEATURE_AVX512F }, { X86_FEATURE_AVX512VBMI, X86_FEATURE_AVX512F }, { X86_FEATURE_AVX512_VBMI2, X86_FEATURE_AVX512VL }, - { X86_FEATURE_GFNI, X86_FEATURE_AVX512VL }, - { X86_FEATURE_VAES, X86_FEATURE_AVX512VL }, - { X86_FEATURE_VPCLMULQDQ, X86_FEATURE_AVX512VL }, { X86_FEATURE_AVX512_VNNI, X86_FEATURE_AVX512VL }, { X86_FEATURE_AVX512_BITALG, X86_FEATURE_AVX512VL }, { X86_FEATURE_AVX512_4VNNIW, X86_FEATURE_AVX512F }, --- linux-xilinx-6.8.0.orig/arch/x86/kernel/cpu/intel.c +++ linux-xilinx-6.8.0/arch/x86/kernel/cpu/intel.c @@ -72,19 +72,19 @@ */ static void check_memory_type_self_snoop_errata(struct cpuinfo_x86 *c) { - switch (c->x86_model) { - case INTEL_FAM6_CORE_YONAH: - case INTEL_FAM6_CORE2_MEROM: - case INTEL_FAM6_CORE2_MEROM_L: - case INTEL_FAM6_CORE2_PENRYN: - case INTEL_FAM6_CORE2_DUNNINGTON: - case INTEL_FAM6_NEHALEM: - case INTEL_FAM6_NEHALEM_G: - case INTEL_FAM6_NEHALEM_EP: - case INTEL_FAM6_NEHALEM_EX: - case INTEL_FAM6_WESTMERE: - case INTEL_FAM6_WESTMERE_EP: - case INTEL_FAM6_SANDYBRIDGE: + switch (c->x86_vfm) { + case INTEL_CORE_YONAH: + case INTEL_CORE2_MEROM: + case INTEL_CORE2_MEROM_L: + case INTEL_CORE2_PENRYN: + case INTEL_CORE2_DUNNINGTON: + case INTEL_NEHALEM: + case INTEL_NEHALEM_G: + case INTEL_NEHALEM_EP: + case INTEL_NEHALEM_EX: + case INTEL_WESTMERE: + case INTEL_WESTMERE_EP: + case INTEL_SANDYBRIDGE: setup_clear_cpu_cap(X86_FEATURE_SELFSNOOP); } } @@ -106,9 +106,9 @@ */ if (c->x86 != 6) return; - switch (c->x86_model) { - case INTEL_FAM6_XEON_PHI_KNL: - case INTEL_FAM6_XEON_PHI_KNM: + switch (c->x86_vfm) { + case INTEL_XEON_PHI_KNL: + case INTEL_XEON_PHI_KNM: break; default: return; @@ -134,32 +134,32 @@ * - Release note from 20180108 microcode release */ struct sku_microcode { - u8 model; + u32 vfm; u8 stepping; u32 microcode; }; static const struct sku_microcode spectre_bad_microcodes[] = { - { INTEL_FAM6_KABYLAKE, 0x0B, 0x80 }, - { INTEL_FAM6_KABYLAKE, 0x0A, 0x80 }, - { INTEL_FAM6_KABYLAKE, 0x09, 0x80 }, - { INTEL_FAM6_KABYLAKE_L, 0x0A, 0x80 }, - { INTEL_FAM6_KABYLAKE_L, 0x09, 0x80 }, - { INTEL_FAM6_SKYLAKE_X, 0x03, 0x0100013e }, - { INTEL_FAM6_SKYLAKE_X, 0x04, 0x0200003c }, - { INTEL_FAM6_BROADWELL, 0x04, 0x28 }, - { INTEL_FAM6_BROADWELL_G, 0x01, 0x1b }, - { INTEL_FAM6_BROADWELL_D, 0x02, 0x14 }, - { INTEL_FAM6_BROADWELL_D, 0x03, 0x07000011 }, - { INTEL_FAM6_BROADWELL_X, 0x01, 0x0b000025 }, - { INTEL_FAM6_HASWELL_L, 0x01, 0x21 }, - { INTEL_FAM6_HASWELL_G, 0x01, 0x18 }, - { INTEL_FAM6_HASWELL, 0x03, 0x23 }, - { INTEL_FAM6_HASWELL_X, 0x02, 0x3b }, - { INTEL_FAM6_HASWELL_X, 0x04, 0x10 }, - { INTEL_FAM6_IVYBRIDGE_X, 0x04, 0x42a }, + { INTEL_KABYLAKE, 0x0B, 0x80 }, + { INTEL_KABYLAKE, 0x0A, 0x80 }, + { INTEL_KABYLAKE, 0x09, 0x80 }, + { INTEL_KABYLAKE_L, 0x0A, 0x80 }, + { INTEL_KABYLAKE_L, 0x09, 0x80 }, + { INTEL_SKYLAKE_X, 0x03, 0x0100013e }, + { INTEL_SKYLAKE_X, 0x04, 0x0200003c }, + { INTEL_BROADWELL, 0x04, 0x28 }, + { INTEL_BROADWELL_G, 0x01, 0x1b }, + { INTEL_BROADWELL_D, 0x02, 0x14 }, + { INTEL_BROADWELL_D, 0x03, 0x07000011 }, + { INTEL_BROADWELL_X, 0x01, 0x0b000025 }, + { INTEL_HASWELL_L, 0x01, 0x21 }, + { INTEL_HASWELL_G, 0x01, 0x18 }, + { INTEL_HASWELL, 0x03, 0x23 }, + { INTEL_HASWELL_X, 0x02, 0x3b }, + { INTEL_HASWELL_X, 0x04, 0x10 }, + { INTEL_IVYBRIDGE_X, 0x04, 0x42a }, /* Observed in the wild */ - { INTEL_FAM6_SANDYBRIDGE_X, 0x06, 0x61b }, - { INTEL_FAM6_SANDYBRIDGE_X, 0x07, 0x712 }, + { INTEL_SANDYBRIDGE_X, 0x06, 0x61b }, + { INTEL_SANDYBRIDGE_X, 0x07, 0x712 }, }; static bool bad_spectre_microcode(struct cpuinfo_x86 *c) @@ -173,11 +173,8 @@ if (cpu_has(c, X86_FEATURE_HYPERVISOR)) return false; - if (c->x86 != 6) - return false; - for (i = 0; i < ARRAY_SIZE(spectre_bad_microcodes); i++) { - if (c->x86_model == spectre_bad_microcodes[i].model && + if (c->x86_vfm == spectre_bad_microcodes[i].vfm && c->x86_stepping == spectre_bad_microcodes[i].stepping) return (c->microcode <= spectre_bad_microcodes[i].microcode); } @@ -268,19 +265,26 @@ c->x86_phys_bits -= keyid_bits; } +void intel_unlock_cpuid_leafs(struct cpuinfo_x86 *c) +{ + if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) + return; + + if (c->x86 < 6 || (c->x86 == 6 && c->x86_model < 0xd)) + return; + + /* + * The BIOS can have limited CPUID to leaf 2, which breaks feature + * enumeration. Unlock it and update the maximum leaf info. + */ + if (msr_clear_bit(MSR_IA32_MISC_ENABLE, MSR_IA32_MISC_ENABLE_LIMIT_CPUID_BIT) > 0) + c->cpuid_level = cpuid_eax(0); +} + static void early_init_intel(struct cpuinfo_x86 *c) { u64 misc_enable; - /* Unmask CPUID levels if masked: */ - if (c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xd)) { - if (msr_clear_bit(MSR_IA32_MISC_ENABLE, - MSR_IA32_MISC_ENABLE_LIMIT_CPUID_BIT) > 0) { - c->cpuid_level = cpuid_eax(0); - get_cpu_cap(c); - } - } - if ((c->x86 == 0xf && c->x86_model >= 0x03) || (c->x86 == 0x6 && c->x86_model >= 0x0e)) set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC); @@ -312,7 +316,7 @@ * need the microcode to have already been loaded... so if it is * not, recommend a BIOS update and disable large pages. */ - if (c->x86 == 6 && c->x86_model == 0x1c && c->x86_stepping <= 2 && + if (c->x86_vfm == INTEL_ATOM_BONNELL && c->x86_stepping <= 2 && c->microcode < 0x20e) { pr_warn("Atom PSE erratum detected, BIOS microcode update recommended\n"); clear_cpu_cap(c, X86_FEATURE_PSE); @@ -344,17 +348,13 @@ } /* Penwell and Cloverview have the TSC which doesn't sleep on S3 */ - if (c->x86 == 6) { - switch (c->x86_model) { - case INTEL_FAM6_ATOM_SALTWELL_MID: - case INTEL_FAM6_ATOM_SALTWELL_TABLET: - case INTEL_FAM6_ATOM_SILVERMONT_MID: - case INTEL_FAM6_ATOM_AIRMONT_NP: - set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC_S3); - break; - default: - break; - } + switch (c->x86_vfm) { + case INTEL_ATOM_SALTWELL_MID: + case INTEL_ATOM_SALTWELL_TABLET: + case INTEL_ATOM_SILVERMONT_MID: + case INTEL_ATOM_AIRMONT_NP: + set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC_S3); + break; } /* @@ -393,7 +393,7 @@ * should be false so that __flush_tlb_all() causes CR3 instead of CR4.PGE * to be modified. */ - if (c->x86 == 5 && c->x86_model == 9) { + if (c->x86_vfm == INTEL_QUARK_X1000) { pr_info("Disabling PGE capability bit\n"); setup_clear_cpu_cap(X86_FEATURE_PGE); } @@ -650,12 +650,15 @@ set_cpu_cap(c, X86_FEATURE_PEBS); } - if (c->x86 == 6 && boot_cpu_has(X86_FEATURE_CLFLUSH) && - (c->x86_model == 29 || c->x86_model == 46 || c->x86_model == 47)) + if (boot_cpu_has(X86_FEATURE_CLFLUSH) && + (c->x86_vfm == INTEL_CORE2_DUNNINGTON || + c->x86_vfm == INTEL_NEHALEM_EX || + c->x86_vfm == INTEL_WESTMERE_EX)) set_cpu_bug(c, X86_BUG_CLFLUSH_MONITOR); - if (c->x86 == 6 && boot_cpu_has(X86_FEATURE_MWAIT) && - ((c->x86_model == INTEL_FAM6_ATOM_GOLDMONT))) + if (boot_cpu_has(X86_FEATURE_MWAIT) && + (c->x86_vfm == INTEL_ATOM_GOLDMONT || + c->x86_vfm == INTEL_LUNARLAKE_M)) set_cpu_bug(c, X86_BUG_MONITOR); #ifdef CONFIG_X86_64 @@ -1271,9 +1274,9 @@ * feature even though they do not enumerate IA32_CORE_CAPABILITIES. */ static const struct x86_cpu_id split_lock_cpu_ids[] __initconst = { - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, 0), - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, 0), - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, 0), + X86_MATCH_VFM(INTEL_ICELAKE_X, 0), + X86_MATCH_VFM(INTEL_ICELAKE_L, 0), + X86_MATCH_VFM(INTEL_ICELAKE_D, 0), {} }; --- linux-xilinx-6.8.0.orig/arch/x86/kernel/cpu/match.c +++ linux-xilinx-6.8.0/arch/x86/kernel/cpu/match.c @@ -17,8 +17,7 @@ * * A typical table entry would be to match a specific CPU * - * X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, INTEL_FAM6_BROADWELL, - * X86_FEATURE_ANY, NULL); + * X86_MATCH_VFM_FEATURE(INTEL_BROADWELL, X86_FEATURE_ANY, NULL); * * Fields can be wildcarded with %X86_VENDOR_ANY, %X86_FAMILY_ANY, * %X86_MODEL_ANY, %X86_FEATURE_ANY (except for vendor) @@ -39,9 +38,7 @@ const struct x86_cpu_id *m; struct cpuinfo_x86 *c = &boot_cpu_data; - for (m = match; - m->vendor | m->family | m->model | m->steppings | m->feature; - m++) { + for (m = match; m->flags & X86_CPU_ID_FLAG_ENTRY_VALID; m++) { if (m->vendor != X86_VENDOR_ANY && c->x86_vendor != m->vendor) continue; if (m->family != X86_FAMILY_ANY && c->x86 != m->family) --- linux-xilinx-6.8.0.orig/arch/x86/kernel/cpu/mce/core.c +++ linux-xilinx-6.8.0/arch/x86/kernel/cpu/mce/core.c @@ -2474,12 +2474,14 @@ return -EINVAL; b = &per_cpu(mce_banks_array, s->id)[bank]; - if (!b->init) return -ENODEV; b->ctl = new; + + mutex_lock(&mce_sysfs_mutex); mce_restart(); + mutex_unlock(&mce_sysfs_mutex); return size; } --- linux-xilinx-6.8.0.orig/arch/x86/kernel/cpu/microcode/amd.c +++ linux-xilinx-6.8.0/arch/x86/kernel/cpu/microcode/amd.c @@ -465,7 +465,7 @@ return !__apply_microcode_amd(mc); } -static bool get_builtin_microcode(struct cpio_data *cp, unsigned int family) +static bool get_builtin_microcode(struct cpio_data *cp, u8 family) { char fw_name[36] = "amd-ucode/microcode_amd.bin"; struct firmware fw; --- linux-xilinx-6.8.0.orig/arch/x86/kernel/cpu/mshyperv.c +++ linux-xilinx-6.8.0/arch/x86/kernel/cpu/mshyperv.c @@ -199,8 +199,8 @@ * Call hv_cpu_die() on all the CPUs, otherwise later the hypervisor * corrupts the old VP Assist Pages and can crash the kexec kernel. */ - if (kexec_in_progress && hyperv_init_cpuhp > 0) - cpuhp_remove_state(hyperv_init_cpuhp); + if (kexec_in_progress) + cpuhp_remove_state(CPUHP_AP_HYPERV_ONLINE); /* The function calls stop_other_cpus(). */ native_machine_shutdown(); @@ -222,6 +222,63 @@ hyperv_cleanup(); } #endif /* CONFIG_KEXEC_CORE */ + +static u64 hv_ref_counter_at_suspend; +static void (*old_save_sched_clock_state)(void); +static void (*old_restore_sched_clock_state)(void); + +/* + * Hyper-V clock counter resets during hibernation. Save and restore clock + * offset during suspend/resume, while also considering the time passed + * before suspend. This is to make sure that sched_clock using hv tsc page + * based clocksource, proceeds from where it left off during suspend and + * it shows correct time for the timestamps of kernel messages after resume. + */ +static void save_hv_clock_tsc_state(void) +{ + hv_ref_counter_at_suspend = hv_read_reference_counter(); +} + +static void restore_hv_clock_tsc_state(void) +{ + /* + * Adjust the offsets used by hv tsc clocksource to + * account for the time spent before hibernation. + * adjusted value = reference counter (time) at suspend + * - reference counter (time) now. + */ + hv_adj_sched_clock_offset(hv_ref_counter_at_suspend - hv_read_reference_counter()); +} + +/* + * Functions to override save_sched_clock_state and restore_sched_clock_state + * functions of x86_platform. The Hyper-V clock counter is reset during + * suspend-resume and the offset used to measure time needs to be + * corrected, post resume. + */ +static void hv_save_sched_clock_state(void) +{ + old_save_sched_clock_state(); + save_hv_clock_tsc_state(); +} + +static void hv_restore_sched_clock_state(void) +{ + restore_hv_clock_tsc_state(); + old_restore_sched_clock_state(); +} + +static void __init x86_setup_ops_for_tsc_pg_clock(void) +{ + if (!(ms_hyperv.features & HV_MSR_REFERENCE_TSC_AVAILABLE)) + return; + + old_save_sched_clock_state = x86_platform.save_sched_clock_state; + x86_platform.save_sched_clock_state = hv_save_sched_clock_state; + + old_restore_sched_clock_state = x86_platform.restore_sched_clock_state; + x86_platform.restore_sched_clock_state = hv_restore_sched_clock_state; +} #endif /* CONFIG_HYPERV */ static uint32_t __init ms_hyperv_platform(void) @@ -426,6 +483,7 @@ ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) { x86_platform.calibrate_tsc = hv_get_tsc_khz; x86_platform.calibrate_cpu = hv_get_tsc_khz; + setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); } if (ms_hyperv.priv_high & HV_ISOLATION) { @@ -451,9 +509,23 @@ ms_hyperv.hints &= ~HV_X64_APIC_ACCESS_RECOMMENDED; if (!ms_hyperv.paravisor_present) { - /* To be supported: more work is required. */ + /* + * Mark the Hyper-V TSC page feature as disabled + * in a TDX VM without paravisor so that the + * Invariant TSC, which is a better clocksource + * anyway, is used instead. + */ ms_hyperv.features &= ~HV_MSR_REFERENCE_TSC_AVAILABLE; + /* + * The Invariant TSC is expected to be available + * in a TDX VM without paravisor, but if not, + * print a warning message. The slower Hyper-V MSR-based + * Ref Counter should end up being the clocksource. + */ + if (!(ms_hyperv.features & HV_ACCESS_TSC_INVARIANT)) + pr_warn("Hyper-V: Invariant TSC is unavailable\n"); + /* HV_REGISTER_CRASH_CTL is unsupported. */ ms_hyperv.misc_features &= ~HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE; @@ -574,6 +646,7 @@ /* Register Hyper-V specific clocksource */ hv_init_clocksource(); + x86_setup_ops_for_tsc_pg_clock(); hv_vtl_init_platform(); #endif /* --- linux-xilinx-6.8.0.orig/arch/x86/kernel/cpu/mtrr/mtrr.c +++ linux-xilinx-6.8.0/arch/x86/kernel/cpu/mtrr/mtrr.c @@ -609,7 +609,7 @@ { int first_cpu; - if (!mtrr_enabled()) + if (!mtrr_enabled() || !mtrr_state.have_fixed) return; first_cpu = cpumask_first(cpu_online_mask); --- linux-xilinx-6.8.0.orig/arch/x86/kernel/cpu/resctrl/core.c +++ linux-xilinx-6.8.0/arch/x86/kernel/cpu/resctrl/core.c @@ -194,7 +194,7 @@ return false; } -static bool __get_mem_config_intel(struct rdt_resource *r) +static __init bool __get_mem_config_intel(struct rdt_resource *r) { struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r); union cpuid_0x10_3_eax eax; @@ -228,12 +228,10 @@ return true; } -static bool __rdt_get_mem_config_amd(struct rdt_resource *r) +static __init bool __rdt_get_mem_config_amd(struct rdt_resource *r) { struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r); - union cpuid_0x10_3_eax eax; - union cpuid_0x10_x_edx edx; - u32 ebx, ecx, subleaf; + u32 eax, ebx, ecx, edx, subleaf; /* * Query CPUID_Fn80000020_EDX_x01 for MBA and @@ -241,9 +239,9 @@ */ subleaf = (r->rid == RDT_RESOURCE_SMBA) ? 2 : 1; - cpuid_count(0x80000020, subleaf, &eax.full, &ebx, &ecx, &edx.full); - hw_res->num_closid = edx.split.cos_max + 1; - r->default_ctrl = MAX_MBA_BW_AMD; + cpuid_count(0x80000020, subleaf, &eax, &ebx, &ecx, &edx); + hw_res->num_closid = edx + 1; + r->default_ctrl = 1 << eax; /* AMD does not use delay */ r->membw.delay_linear = false; --- linux-xilinx-6.8.0.orig/arch/x86/kernel/cpu/resctrl/ctrlmondata.c +++ linux-xilinx-6.8.0/arch/x86/kernel/cpu/resctrl/ctrlmondata.c @@ -27,10 +27,10 @@ * hardware. The allocated bandwidth percentage is rounded to the next * control step available on the hardware. */ -static bool bw_validate(char *buf, unsigned long *data, struct rdt_resource *r) +static bool bw_validate(char *buf, u32 *data, struct rdt_resource *r) { - unsigned long bw; int ret; + u32 bw; /* * Only linear delay values is supported for current Intel SKUs. @@ -40,16 +40,21 @@ return false; } - ret = kstrtoul(buf, 10, &bw); + ret = kstrtou32(buf, 10, &bw); if (ret) { - rdt_last_cmd_printf("Non-decimal digit in MB value %s\n", buf); + rdt_last_cmd_printf("Invalid MB value %s\n", buf); return false; } - if ((bw < r->membw.min_bw || bw > r->default_ctrl) && - !is_mba_sc(r)) { - rdt_last_cmd_printf("MB value %ld out of range [%d,%d]\n", bw, - r->membw.min_bw, r->default_ctrl); + /* Nothing else to do if software controller is enabled. */ + if (is_mba_sc(r)) { + *data = bw; + return true; + } + + if (bw < r->membw.min_bw || bw > r->default_ctrl) { + rdt_last_cmd_printf("MB value %u out of range [%d,%d]\n", + bw, r->membw.min_bw, r->default_ctrl); return false; } @@ -63,7 +68,7 @@ struct resctrl_staged_config *cfg; u32 closid = data->rdtgrp->closid; struct rdt_resource *r = s->res; - unsigned long bw_val; + u32 bw_val; cfg = &d->staged_config[s->conf_type]; if (cfg->have_new_ctrl) { --- linux-xilinx-6.8.0.orig/arch/x86/kernel/cpu/resctrl/internal.h +++ linux-xilinx-6.8.0/arch/x86/kernel/cpu/resctrl/internal.h @@ -18,7 +18,6 @@ #define MBM_OVERFLOW_INTERVAL 1000 #define MAX_MBA_BW 100u #define MBA_IS_LINEAR 0x4 -#define MAX_MBA_BW_AMD 0x800 #define MBM_CNTR_WIDTH_OFFSET_AMD 20 #define RMID_VAL_ERROR BIT_ULL(63) @@ -296,14 +295,10 @@ * struct mbm_state - status for each MBM counter in each domain * @prev_bw_bytes: Previous bytes value read for bandwidth calculation * @prev_bw: The most recent bandwidth in MBps - * @delta_bw: Difference between the current and previous bandwidth - * @delta_comp: Indicates whether to compute the delta_bw */ struct mbm_state { u64 prev_bw_bytes; u32 prev_bw; - u32 delta_bw; - bool delta_comp; }; /** @@ -395,6 +390,8 @@ * @msr_update: Function pointer to update QOS MSRs * @mon_scale: cqm counter * mon_scale = occupancy in bytes * @mbm_width: Monitor width, to detect and correct for overflow. + * @mbm_cfg_mask: Bandwidth sources that can be tracked when Bandwidth + * Monitoring Event Configuration (BMEC) is supported. * @cdp_enabled: CDP state of this resource * * Members of this structure are either private to the architecture @@ -409,6 +406,7 @@ struct rdt_resource *r); unsigned int mon_scale; unsigned int mbm_width; + unsigned int mbm_cfg_mask; bool cdp_enabled; }; --- linux-xilinx-6.8.0.orig/arch/x86/kernel/cpu/resctrl/monitor.c +++ linux-xilinx-6.8.0/arch/x86/kernel/cpu/resctrl/monitor.c @@ -440,9 +440,6 @@ cur_bw = bytes / SZ_1M; - if (m->delta_comp) - m->delta_bw = abs(cur_bw - m->prev_bw); - m->delta_comp = false; m->prev_bw = cur_bw; } @@ -520,11 +517,11 @@ { u32 closid, rmid, cur_msr_val, new_msr_val; struct mbm_state *pmbm_data, *cmbm_data; - u32 cur_bw, delta_bw, user_bw; struct rdt_resource *r_mba; struct rdt_domain *dom_mba; struct list_head *head; struct rdtgroup *entry; + u32 cur_bw, user_bw; if (!is_mbm_local_enabled()) return; @@ -543,7 +540,6 @@ cur_bw = pmbm_data->prev_bw; user_bw = dom_mba->mbps_val[closid]; - delta_bw = pmbm_data->delta_bw; /* MBA resource doesn't support CDP */ cur_msr_val = resctrl_arch_get_config(r_mba, dom_mba, closid, CDP_NONE); @@ -555,49 +551,31 @@ list_for_each_entry(entry, head, mon.crdtgrp_list) { cmbm_data = &dom_mbm->mbm_local[entry->mon.rmid]; cur_bw += cmbm_data->prev_bw; - delta_bw += cmbm_data->delta_bw; } /* * Scale up/down the bandwidth linearly for the ctrl group. The * bandwidth step is the bandwidth granularity specified by the * hardware. - * - * The delta_bw is used when increasing the bandwidth so that we - * dont alternately increase and decrease the control values - * continuously. - * - * For ex: consider cur_bw = 90MBps, user_bw = 100MBps and if - * bandwidth step is 20MBps(> user_bw - cur_bw), we would keep - * switching between 90 and 110 continuously if we only check - * cur_bw < user_bw. + * Always increase throttling if current bandwidth is above the + * target set by user. + * But avoid thrashing up and down on every poll by checking + * whether a decrease in throttling is likely to push the group + * back over target. E.g. if currently throttling to 30% of bandwidth + * on a system with 10% granularity steps, check whether moving to + * 40% would go past the limit by multiplying current bandwidth by + * "(30 + 10) / 30". */ if (cur_msr_val > r_mba->membw.min_bw && user_bw < cur_bw) { new_msr_val = cur_msr_val - r_mba->membw.bw_gran; } else if (cur_msr_val < MAX_MBA_BW && - (user_bw > (cur_bw + delta_bw))) { + (user_bw > (cur_bw * (cur_msr_val + r_mba->membw.min_bw) / cur_msr_val))) { new_msr_val = cur_msr_val + r_mba->membw.bw_gran; } else { return; } resctrl_arch_update_one(r_mba, dom_mba, closid, CDP_NONE, new_msr_val); - - /* - * Delta values are updated dynamically package wise for each - * rdtgrp every time the throttle MSR changes value. - * - * This is because (1)the increase in bandwidth is not perfectly - * linear and only "approximately" linear even when the hardware - * says it is linear.(2)Also since MBA is a core specific - * mechanism, the delta values vary based on number of cores used - * by the rdtgrp. - */ - pmbm_data->delta_comp = true; - list_for_each_entry(entry, head, mon.crdtgrp_list) { - cmbm_data = &dom_mbm->mbm_local[entry->mon.rmid]; - cmbm_data->delta_comp = true; - } } static void mbm_update(struct rdt_resource *r, struct rdt_domain *d, int rmid) @@ -813,6 +791,12 @@ return ret; if (rdt_cpu_has(X86_FEATURE_BMEC)) { + u32 eax, ebx, ecx, edx; + + /* Detect list of bandwidth sources that can be tracked */ + cpuid_count(0x80000020, 3, &eax, &ebx, &ecx, &edx); + hw_res->mbm_cfg_mask = ecx & MAX_EVT_CONFIG_BITS; + if (rdt_cpu_has(X86_FEATURE_CQM_MBM_TOTAL)) { mbm_total_event.configurable = true; mbm_config_rftype_init("mbm_total_bytes_config"); --- linux-xilinx-6.8.0.orig/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ linux-xilinx-6.8.0/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -1620,12 +1620,6 @@ struct mon_config_info mon_info = {0}; int ret = 0; - /* mon_config cannot be more than the supported set of events */ - if (val > MAX_EVT_CONFIG_BITS) { - rdt_last_cmd_puts("Invalid event configuration\n"); - return -EINVAL; - } - /* * Read the current config value first. If both are the same then * no need to write it again. @@ -1663,6 +1657,7 @@ static int mon_config_write(struct rdt_resource *r, char *tok, u32 evtid) { + struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r); char *dom_str = NULL, *id_str; unsigned long dom_id, val; struct rdt_domain *d; @@ -1686,6 +1681,13 @@ return -EINVAL; } + /* Value from user cannot be more than the supported set of events */ + if ((val & hw_res->mbm_cfg_mask) != val) { + rdt_last_cmd_printf("Invalid event configuration: max valid mask is 0x%02x\n", + hw_res->mbm_cfg_mask); + return -EINVAL; + } + list_for_each_entry(d, &r->domains, list) { if (d->id == dom_id) { ret = mbm_config_write_domain(r, d, evtid, val); --- linux-xilinx-6.8.0.orig/arch/x86/kernel/cpu/scattered.c +++ linux-xilinx-6.8.0/arch/x86/kernel/cpu/scattered.c @@ -28,6 +28,7 @@ { X86_FEATURE_EPB, CPUID_ECX, 3, 0x00000006, 0 }, { X86_FEATURE_INTEL_PPIN, CPUID_EBX, 0, 0x00000007, 1 }, { X86_FEATURE_RRSBA_CTRL, CPUID_EDX, 2, 0x00000007, 2 }, + { X86_FEATURE_BHI_CTRL, CPUID_EDX, 4, 0x00000007, 2 }, { X86_FEATURE_CQM_LLC, CPUID_EDX, 1, 0x0000000f, 0 }, { X86_FEATURE_CQM_OCCUP_LLC, CPUID_EDX, 0, 0x0000000f, 1 }, { X86_FEATURE_CQM_MBM_TOTAL, CPUID_EDX, 1, 0x0000000f, 1 }, --- linux-xilinx-6.8.0.orig/arch/x86/kernel/cpu/sgx/main.c +++ linux-xilinx-6.8.0/arch/x86/kernel/cpu/sgx/main.c @@ -474,24 +474,25 @@ { struct sgx_epc_page *page; int nid_of_current = numa_node_id(); - int nid = nid_of_current; + int nid_start, nid; - if (node_isset(nid_of_current, sgx_numa_mask)) { - page = __sgx_alloc_epc_page_from_node(nid_of_current); - if (page) - return page; - } - - /* Fall back to the non-local NUMA nodes: */ - while (true) { - nid = next_node_in(nid, sgx_numa_mask); - if (nid == nid_of_current) - break; + /* + * Try local node first. If it doesn't have an EPC section, + * fall back to the non-local NUMA nodes. + */ + if (node_isset(nid_of_current, sgx_numa_mask)) + nid_start = nid_of_current; + else + nid_start = next_node_in(nid_of_current, sgx_numa_mask); + nid = nid_start; + do { page = __sgx_alloc_epc_page_from_node(nid); if (page) return page; - } + + nid = next_node_in(nid, sgx_numa_mask); + } while (nid != nid_start); return ERR_PTR(-ENOMEM); } --- linux-xilinx-6.8.0.orig/arch/x86/kernel/cpu/vmware.c +++ linux-xilinx-6.8.0/arch/x86/kernel/cpu/vmware.c @@ -41,80 +41,97 @@ #define CPUID_VMWARE_INFO_LEAF 0x40000000 #define CPUID_VMWARE_FEATURES_LEAF 0x40000010 -#define CPUID_VMWARE_FEATURES_ECX_VMMCALL BIT(0) -#define CPUID_VMWARE_FEATURES_ECX_VMCALL BIT(1) -#define VMWARE_HYPERVISOR_MAGIC 0x564D5868 - -#define VMWARE_CMD_GETVERSION 10 -#define VMWARE_CMD_GETHZ 45 -#define VMWARE_CMD_GETVCPU_INFO 68 -#define VMWARE_CMD_LEGACY_X2APIC 3 -#define VMWARE_CMD_VCPU_RESERVED 31 -#define VMWARE_CMD_STEALCLOCK 91 +#define GETVCPU_INFO_LEGACY_X2APIC BIT(3) +#define GETVCPU_INFO_VCPU_RESERVED BIT(31) #define STEALCLOCK_NOT_AVAILABLE (-1) #define STEALCLOCK_DISABLED 0 #define STEALCLOCK_ENABLED 1 -#define VMWARE_PORT(cmd, eax, ebx, ecx, edx) \ - __asm__("inl (%%dx), %%eax" : \ - "=a"(eax), "=c"(ecx), "=d"(edx), "=b"(ebx) : \ - "a"(VMWARE_HYPERVISOR_MAGIC), \ - "c"(VMWARE_CMD_##cmd), \ - "d"(VMWARE_HYPERVISOR_PORT), "b"(UINT_MAX) : \ - "memory") - -#define VMWARE_VMCALL(cmd, eax, ebx, ecx, edx) \ - __asm__("vmcall" : \ - "=a"(eax), "=c"(ecx), "=d"(edx), "=b"(ebx) : \ - "a"(VMWARE_HYPERVISOR_MAGIC), \ - "c"(VMWARE_CMD_##cmd), \ - "d"(0), "b"(UINT_MAX) : \ - "memory") - -#define VMWARE_VMMCALL(cmd, eax, ebx, ecx, edx) \ - __asm__("vmmcall" : \ - "=a"(eax), "=c"(ecx), "=d"(edx), "=b"(ebx) : \ - "a"(VMWARE_HYPERVISOR_MAGIC), \ - "c"(VMWARE_CMD_##cmd), \ - "d"(0), "b"(UINT_MAX) : \ - "memory") - -#define VMWARE_CMD(cmd, eax, ebx, ecx, edx) do { \ - switch (vmware_hypercall_mode) { \ - case CPUID_VMWARE_FEATURES_ECX_VMCALL: \ - VMWARE_VMCALL(cmd, eax, ebx, ecx, edx); \ - break; \ - case CPUID_VMWARE_FEATURES_ECX_VMMCALL: \ - VMWARE_VMMCALL(cmd, eax, ebx, ecx, edx); \ - break; \ - default: \ - VMWARE_PORT(cmd, eax, ebx, ecx, edx); \ - break; \ - } \ - } while (0) - struct vmware_steal_time { union { - uint64_t clock; /* stolen time counter in units of vtsc */ + u64 clock; /* stolen time counter in units of vtsc */ struct { /* only for little-endian */ - uint32_t clock_low; - uint32_t clock_high; + u32 clock_low; + u32 clock_high; }; }; - uint64_t reserved[7]; + u64 reserved[7]; }; static unsigned long vmware_tsc_khz __ro_after_init; static u8 vmware_hypercall_mode __ro_after_init; +unsigned long vmware_hypercall_slow(unsigned long cmd, + unsigned long in1, unsigned long in3, + unsigned long in4, unsigned long in5, + u32 *out1, u32 *out2, u32 *out3, + u32 *out4, u32 *out5) +{ + unsigned long out0, rbx, rcx, rdx, rsi, rdi; + + switch (vmware_hypercall_mode) { + case CPUID_VMWARE_FEATURES_ECX_VMCALL: + asm_inline volatile ("vmcall" + : "=a" (out0), "=b" (rbx), "=c" (rcx), + "=d" (rdx), "=S" (rsi), "=D" (rdi) + : "a" (VMWARE_HYPERVISOR_MAGIC), + "b" (in1), + "c" (cmd), + "d" (in3), + "S" (in4), + "D" (in5) + : "cc", "memory"); + break; + case CPUID_VMWARE_FEATURES_ECX_VMMCALL: + asm_inline volatile ("vmmcall" + : "=a" (out0), "=b" (rbx), "=c" (rcx), + "=d" (rdx), "=S" (rsi), "=D" (rdi) + : "a" (VMWARE_HYPERVISOR_MAGIC), + "b" (in1), + "c" (cmd), + "d" (in3), + "S" (in4), + "D" (in5) + : "cc", "memory"); + break; + default: + asm_inline volatile ("movw %[port], %%dx; inl (%%dx), %%eax" + : "=a" (out0), "=b" (rbx), "=c" (rcx), + "=d" (rdx), "=S" (rsi), "=D" (rdi) + : [port] "i" (VMWARE_HYPERVISOR_PORT), + "a" (VMWARE_HYPERVISOR_MAGIC), + "b" (in1), + "c" (cmd), + "d" (in3), + "S" (in4), + "D" (in5) + : "cc", "memory"); + break; + } + + if (out1) + *out1 = rbx; + if (out2) + *out2 = rcx; + if (out3) + *out3 = rdx; + if (out4) + *out4 = rsi; + if (out5) + *out5 = rdi; + + return out0; +} + static inline int __vmware_platform(void) { - uint32_t eax, ebx, ecx, edx; - VMWARE_CMD(GETVERSION, eax, ebx, ecx, edx); - return eax != (uint32_t)-1 && ebx == VMWARE_HYPERVISOR_MAGIC; + u32 eax, ebx, ecx; + + eax = vmware_hypercall3(VMWARE_CMD_GETVERSION, 0, &ebx, &ecx); + return eax != UINT_MAX && ebx == VMWARE_HYPERVISOR_MAGIC; } static unsigned long vmware_get_tsc_khz(void) @@ -166,21 +183,12 @@ pr_info("using clock offset of %llu ns\n", d->cyc2ns_offset); } -static int vmware_cmd_stealclock(uint32_t arg1, uint32_t arg2) +static int vmware_cmd_stealclock(u32 addr_hi, u32 addr_lo) { - uint32_t result, info; + u32 info; - asm volatile (VMWARE_HYPERCALL : - "=a"(result), - "=c"(info) : - "a"(VMWARE_HYPERVISOR_MAGIC), - "b"(0), - "c"(VMWARE_CMD_STEALCLOCK), - "d"(0), - "S"(arg1), - "D"(arg2) : - "memory"); - return result; + return vmware_hypercall5(VMWARE_CMD_STEALCLOCK, 0, 0, addr_hi, addr_lo, + &info); } static bool stealclock_enable(phys_addr_t pa) @@ -215,15 +223,15 @@ * Return: * The steal clock reading in ns. */ -static uint64_t vmware_steal_clock(int cpu) +static u64 vmware_steal_clock(int cpu) { struct vmware_steal_time *steal = &per_cpu(vmw_steal_time, cpu); - uint64_t clock; + u64 clock; if (IS_ENABLED(CONFIG_64BIT)) clock = READ_ONCE(steal->clock); else { - uint32_t initial_high, low, high; + u32 initial_high, low, high; do { initial_high = READ_ONCE(steal->clock_high); @@ -235,7 +243,7 @@ high = READ_ONCE(steal->clock_high); } while (initial_high != high); - clock = ((uint64_t)high << 32) | low; + clock = ((u64)high << 32) | low; } return mul_u64_u32_shr(clock, vmware_cyc2ns.cyc2ns_mul, @@ -389,13 +397,13 @@ static void __init vmware_platform_setup(void) { - uint32_t eax, ebx, ecx, edx; - uint64_t lpj, tsc_khz; + u32 eax, ebx, ecx; + u64 lpj, tsc_khz; - VMWARE_CMD(GETHZ, eax, ebx, ecx, edx); + eax = vmware_hypercall3(VMWARE_CMD_GETHZ, UINT_MAX, &ebx, &ecx); if (ebx != UINT_MAX) { - lpj = tsc_khz = eax | (((uint64_t)ebx) << 32); + lpj = tsc_khz = eax | (((u64)ebx) << 32); do_div(tsc_khz, 1000); WARN_ON(tsc_khz >> 32); pr_info("TSC freq read from hypervisor : %lu.%03lu MHz\n", @@ -446,7 +454,7 @@ * If !boot_cpu_has(X86_FEATURE_HYPERVISOR), vmware_hypercall_mode * intentionally defaults to 0. */ -static uint32_t __init vmware_platform(void) +static u32 __init vmware_platform(void) { if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) { unsigned int eax; @@ -474,12 +482,65 @@ /* Checks if hypervisor supports x2apic without VT-D interrupt remapping. */ static bool __init vmware_legacy_x2apic_available(void) { - uint32_t eax, ebx, ecx, edx; - VMWARE_CMD(GETVCPU_INFO, eax, ebx, ecx, edx); - return !(eax & BIT(VMWARE_CMD_VCPU_RESERVED)) && - (eax & BIT(VMWARE_CMD_LEGACY_X2APIC)); + u32 eax; + + eax = vmware_hypercall1(VMWARE_CMD_GETVCPU_INFO, 0); + return !(eax & GETVCPU_INFO_VCPU_RESERVED) && + (eax & GETVCPU_INFO_LEGACY_X2APIC); } +#ifdef CONFIG_INTEL_TDX_GUEST +/* + * TDCALL[TDG.VP.VMCALL] uses %rax (arg0) and %rcx (arg2). Therefore, + * we remap those registers to %r12 and %r13, respectively. + */ +unsigned long vmware_tdx_hypercall(unsigned long cmd, + unsigned long in1, unsigned long in3, + unsigned long in4, unsigned long in5, + u32 *out1, u32 *out2, u32 *out3, + u32 *out4, u32 *out5) +{ + struct tdx_module_args args = {}; + + if (!hypervisor_is_type(X86_HYPER_VMWARE)) { + pr_warn_once("Incorrect usage\n"); + return ULONG_MAX; + } + + if (cmd & ~VMWARE_CMD_MASK) { + pr_warn_once("Out of range command %lx\n", cmd); + return ULONG_MAX; + } + + args.rbx = in1; + args.rdx = in3; + args.rsi = in4; + args.rdi = in5; + args.r10 = VMWARE_TDX_VENDOR_LEAF; + args.r11 = VMWARE_TDX_HCALL_FUNC; + args.r12 = VMWARE_HYPERVISOR_MAGIC; + args.r13 = cmd; + /* CPL */ + args.r15 = 0; + + __tdx_hypercall(&args); + + if (out1) + *out1 = args.rbx; + if (out2) + *out2 = args.r13; + if (out3) + *out3 = args.rdx; + if (out4) + *out4 = args.rsi; + if (out5) + *out5 = args.rdi; + + return args.r12; +} +EXPORT_SYMBOL_GPL(vmware_tdx_hypercall); +#endif + #ifdef CONFIG_AMD_MEM_ENCRYPT static void vmware_sev_es_hcall_prepare(struct ghcb *ghcb, struct pt_regs *regs) --- linux-xilinx-6.8.0.orig/arch/x86/kernel/crash.c +++ linux-xilinx-6.8.0/arch/x86/kernel/crash.c @@ -124,6 +124,18 @@ #ifdef CONFIG_HPET_TIMER hpet_disable(); #endif + + /* + * Non-crash kexec calls enc_kexec_begin() while scheduling is still + * active. This allows the callback to wait until all in-flight + * shared<->private conversions are complete. In a crash scenario, + * enc_kexec_begin() gets called after all but one CPU have been shut + * down and interrupts have been disabled. This allows the callback to + * detect a race with the conversion and report it. + */ + x86_platform.guest.enc_kexec_begin(); + x86_platform.guest.enc_kexec_finish(); + crash_save_cpu(regs, safe_smp_processor_id()); } --- linux-xilinx-6.8.0.orig/arch/x86/kernel/devicetree.c +++ linux-xilinx-6.8.0/arch/x86/kernel/devicetree.c @@ -82,7 +82,7 @@ ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); if (ret) - return ret; + return pcibios_err_to_errno(ret); if (!pin) return 0; @@ -283,22 +283,24 @@ u32 size, map_len; void *dt; - if (!initial_dtb) - return; + if (initial_dtb) { + map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK), (u64)128); - map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK), (u64)128); + dt = early_memremap(initial_dtb, map_len); + size = fdt_totalsize(dt); + if (map_len < size) { + early_memunmap(dt, map_len); + dt = early_memremap(initial_dtb, size); + map_len = size; + } - dt = early_memremap(initial_dtb, map_len); - size = fdt_totalsize(dt); - if (map_len < size) { - early_memunmap(dt, map_len); - dt = early_memremap(initial_dtb, size); - map_len = size; + early_init_dt_verify(dt, __pa(dt)); } - early_init_dt_verify(dt); unflatten_and_copy_device_tree(); - early_memunmap(dt, map_len); + + if (initial_dtb) + early_memunmap(dt, map_len); } #endif --- linux-xilinx-6.8.0.orig/arch/x86/kernel/early-quirks.c +++ linux-xilinx-6.8.0/arch/x86/kernel/early-quirks.c @@ -29,6 +29,37 @@ #include #include +static void __init early_pci_clear_msi(int bus, int slot, int func) +{ + int pos; + u16 ctrl; + + if (likely(!pci_early_clear_msi)) + return; + + pr_info_once("Clearing MSI/MSI-X enable bits early in boot (quirk)\n"); + + pos = pci_early_find_cap(bus, slot, func, PCI_CAP_ID_MSI); + if (pos) { + ctrl = read_pci_config_16(bus, slot, func, pos + PCI_MSI_FLAGS); + ctrl &= ~PCI_MSI_FLAGS_ENABLE; + write_pci_config_16(bus, slot, func, pos + PCI_MSI_FLAGS, ctrl); + + /* Read again to flush previous write */ + ctrl = read_pci_config_16(bus, slot, func, pos + PCI_MSI_FLAGS); + } + + pos = pci_early_find_cap(bus, slot, func, PCI_CAP_ID_MSIX); + if (pos) { + ctrl = read_pci_config_16(bus, slot, func, pos + PCI_MSIX_FLAGS); + ctrl &= ~PCI_MSIX_FLAGS_ENABLE; + write_pci_config_16(bus, slot, func, pos + PCI_MSIX_FLAGS, ctrl); + + /* Read again to flush previous write */ + ctrl = read_pci_config_16(bus, slot, func, pos + PCI_MSIX_FLAGS); + } +} + static void __init fix_hypertransport_config(int num, int slot, int func) { u32 htcfg; @@ -728,6 +759,7 @@ PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet}, { PCI_VENDOR_ID_BROADCOM, 0x4331, PCI_CLASS_NETWORK_OTHER, PCI_ANY_ID, 0, apple_airport_reset}, + { PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, early_pci_clear_msi}, {} }; @@ -780,6 +812,10 @@ PCI_HEADER_TYPE); if ((type & PCI_HEADER_TYPE_MASK) == PCI_HEADER_TYPE_BRIDGE) { + /* pci_early_clear_msi scans the buses differently. */ + if (pci_early_clear_msi) + return -1; + sec = read_pci_config_byte(num, slot, func, PCI_SECONDARY_BUS); if (sec > num) early_pci_scan_bus(sec); @@ -806,8 +842,13 @@ void __init early_quirks(void) { + int bus; + if (!early_pci_allowed()) return; early_pci_scan_bus(0); + /* pci_early_clear_msi scans more buses. */ + for (bus = 1; pci_early_clear_msi && bus < 256; bus++) + early_pci_scan_bus(bus); } --- linux-xilinx-6.8.0.orig/arch/x86/kernel/eisa.c +++ linux-xilinx-6.8.0/arch/x86/kernel/eisa.c @@ -2,6 +2,7 @@ /* * EISA specific code */ +#include #include #include #include @@ -12,7 +13,7 @@ { void __iomem *p; - if (xen_pv_domain() && !xen_initial_domain()) + if ((xen_pv_domain() && !xen_initial_domain()) || cc_platform_has(CC_ATTR_GUEST_SEV_SNP)) return 0; p = ioremap(0x0FFFD9, 4); --- linux-xilinx-6.8.0.orig/arch/x86/kernel/fpu/core.c +++ linux-xilinx-6.8.0/arch/x86/kernel/fpu/core.c @@ -145,8 +145,8 @@ asm volatile( "fnclex\n\t" "emms\n\t" - "fildl %P[addr]" /* set F?P to defined value */ - : : [addr] "m" (fpstate)); + "fildl %[addr]" /* set F?P to defined value */ + : : [addr] "m" (*fpstate)); } if (use_xsave()) { --- linux-xilinx-6.8.0.orig/arch/x86/kernel/fpu/regset.c +++ linux-xilinx-6.8.0/arch/x86/kernel/fpu/regset.c @@ -190,7 +190,8 @@ struct fpu *fpu = &target->thread.fpu; struct cet_user_state *cetregs; - if (!cpu_feature_enabled(X86_FEATURE_USER_SHSTK)) + if (!cpu_feature_enabled(X86_FEATURE_USER_SHSTK) || + !ssp_active(target, regset)) return -ENODEV; sync_fpstate(fpu); --- linux-xilinx-6.8.0.orig/arch/x86/kernel/fpu/signal.c +++ linux-xilinx-6.8.0/arch/x86/kernel/fpu/signal.c @@ -156,7 +156,7 @@ return !err; } -static inline int copy_fpregs_to_sigframe(struct xregs_state __user *buf) +static inline int copy_fpregs_to_sigframe(struct xregs_state __user *buf, u32 pkru) { if (use_xsave()) return xsave_to_user_sigframe(buf); @@ -185,7 +185,7 @@ * For [f]xsave state, update the SW reserved fields in the [f]xsave frame * indicating the absence/presence of the extended state to the user. */ -bool copy_fpstate_to_sigframe(void __user *buf, void __user *buf_fx, int size) +bool copy_fpstate_to_sigframe(void __user *buf, void __user *buf_fx, int size, u32 pkru) { struct task_struct *tsk = current; struct fpstate *fpstate = tsk->thread.fpu.fpstate; @@ -228,7 +228,7 @@ fpregs_restore_userregs(); pagefault_disable(); - ret = copy_fpregs_to_sigframe(buf_fx); + ret = copy_fpregs_to_sigframe(buf_fx, pkru); pagefault_enable(); fpregs_unlock(); --- linux-xilinx-6.8.0.orig/arch/x86/kernel/fpu/xstate.c +++ linux-xilinx-6.8.0/arch/x86/kernel/fpu/xstate.c @@ -178,10 +178,11 @@ * Must happen after CR4 setup and before xsetbv() to allow KVM * lazy passthrough. Write independent of the dynamic state static * key as that does not work on the boot CPU. This also ensures - * that any stale state is wiped out from XFD. + * that any stale state is wiped out from XFD. Reset the per CPU + * xfd cache too. */ if (cpu_feature_enabled(X86_FEATURE_XFD)) - wrmsrl(MSR_IA32_XFD, init_fpstate.xfd); + xfd_set_state(init_fpstate.xfd); /* * XCR_XFEATURE_ENABLED_MASK (aka. XCR0) sets user features @@ -787,6 +788,9 @@ goto out_disable; } + fpu_kernel_cfg.independent_features = fpu_kernel_cfg.max_features & + XFEATURE_MASK_INDEPENDENT; + /* * Clear XSAVE features that are disabled in the normal CPUID. */ --- linux-xilinx-6.8.0.orig/arch/x86/kernel/fpu/xstate.h +++ linux-xilinx-6.8.0/arch/x86/kernel/fpu/xstate.h @@ -64,9 +64,9 @@ static inline u64 xfeatures_mask_independent(void) { if (!cpu_feature_enabled(X86_FEATURE_ARCH_LBR)) - return XFEATURE_MASK_INDEPENDENT & ~XFEATURE_MASK_LBR; + return fpu_kernel_cfg.independent_features & ~XFEATURE_MASK_LBR; - return XFEATURE_MASK_INDEPENDENT; + return fpu_kernel_cfg.independent_features; } /* XSAVE/XRSTOR wrapper functions */ @@ -148,20 +148,26 @@ #endif #ifdef CONFIG_X86_64 +static inline void xfd_set_state(u64 xfd) +{ + wrmsrl(MSR_IA32_XFD, xfd); + __this_cpu_write(xfd_state, xfd); +} + static inline void xfd_update_state(struct fpstate *fpstate) { if (fpu_state_size_dynamic()) { u64 xfd = fpstate->xfd; - if (__this_cpu_read(xfd_state) != xfd) { - wrmsrl(MSR_IA32_XFD, xfd); - __this_cpu_write(xfd_state, xfd); - } + if (__this_cpu_read(xfd_state) != xfd) + xfd_set_state(xfd); } } extern int __xfd_enable_feature(u64 which, struct fpu_guest *guest_fpu); #else +static inline void xfd_set_state(u64 xfd) { } + static inline void xfd_update_state(struct fpstate *fpstate) { } static inline int __xfd_enable_feature(u64 which, struct fpu_guest *guest_fpu) { --- linux-xilinx-6.8.0.orig/arch/x86/kernel/i8253.c +++ linux-xilinx-6.8.0/arch/x86/kernel/i8253.c @@ -8,6 +8,7 @@ #include #include +#include #include #include #include @@ -39,9 +40,15 @@ bool __init pit_timer_init(void) { - if (!use_pit()) + if (!use_pit()) { + /* + * Don't just ignore the PIT. Ensure it's stopped, because + * VMMs otherwise steal CPU time just to pointlessly waggle + * the (masked) IRQ. + */ + clockevent_i8253_disable(); return false; - + } clockevent_i8253_init(true); global_clock_event = &i8253_clockevent; return true; --- linux-xilinx-6.8.0.orig/arch/x86/kernel/jailhouse.c +++ linux-xilinx-6.8.0/arch/x86/kernel/jailhouse.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include --- linux-xilinx-6.8.0.orig/arch/x86/kernel/kprobes/core.c +++ linux-xilinx-6.8.0/arch/x86/kernel/kprobes/core.c @@ -335,7 +335,16 @@ kprobe_opcode_t *arch_adjust_kprobe_addr(unsigned long addr, unsigned long offset, bool *on_func_entry) { - if (is_endbr(*(u32 *)addr)) { + u32 insn; + + /* + * Since 'addr' is not guaranteed to be safe to access, use + * copy_from_kernel_nofault() to read the instruction: + */ + if (copy_from_kernel_nofault(&insn, (void *)addr, sizeof(u32))) + return NULL; + + if (is_endbr(insn)) { *on_func_entry = !offset || offset == 4; if (*on_func_entry) offset = 4; --- linux-xilinx-6.8.0.orig/arch/x86/kernel/kprobes/ftrace.c +++ linux-xilinx-6.8.0/arch/x86/kernel/kprobes/ftrace.c @@ -21,6 +21,9 @@ struct kprobe_ctlblk *kcb; int bit; + if (unlikely(kprobe_ftrace_disabled)) + return; + bit = ftrace_test_recursion_trylock(ip, parent_ip); if (bit < 0) return; --- linux-xilinx-6.8.0.orig/arch/x86/kernel/machine_kexec_64.c +++ linux-xilinx-6.8.0/arch/x86/kernel/machine_kexec_64.c @@ -28,6 +28,7 @@ #include #include #include +#include #ifdef CONFIG_ACPI /* @@ -87,6 +88,8 @@ { #ifdef CONFIG_EFI unsigned long mstart, mend; + void *kaddr; + int ret; if (!efi_enabled(EFI_BOOT)) return 0; @@ -102,6 +105,30 @@ if (!mstart) return 0; + ret = kernel_ident_mapping_init(info, level4p, mstart, mend); + if (ret) + return ret; + + kaddr = memremap(mstart, mend - mstart, MEMREMAP_WB); + if (!kaddr) { + pr_err("Could not map UEFI system table\n"); + return -ENOMEM; + } + + mstart = efi_config_table; + + if (efi_enabled(EFI_64BIT)) { + efi_system_table_64_t *stbl = (efi_system_table_64_t *)kaddr; + + mend = mstart + sizeof(efi_config_table_64_t) * stbl->nr_tables; + } else { + efi_system_table_32_t *stbl = (efi_system_table_32_t *)kaddr; + + mend = mstart + sizeof(efi_config_table_32_t) * stbl->nr_tables; + } + + memunmap(kaddr); + return kernel_ident_mapping_init(info, level4p, mstart, mend); #endif return 0; @@ -119,7 +146,8 @@ image->arch.pte = NULL; } -static int init_transition_pgtable(struct kimage *image, pgd_t *pgd) +static int init_transition_pgtable(struct kimage *image, pgd_t *pgd, + unsigned long control_page) { pgprot_t prot = PAGE_KERNEL_EXEC_NOENC; unsigned long vaddr, paddr; @@ -130,7 +158,7 @@ pte_t *pte; vaddr = (unsigned long)relocate_kernel; - paddr = __pa(page_address(image->control_code_page)+PAGE_SIZE); + paddr = control_page; pgd += pgd_index(vaddr); if (!pgd_present(*pgd)) { p4d = (p4d_t *)get_zeroed_page(GFP_KERNEL); @@ -189,7 +217,7 @@ return p; } -static int init_pgtable(struct kimage *image, unsigned long start_pgtable) +static int init_pgtable(struct kimage *image, unsigned long control_page) { struct x86_mapping_info info = { .alloc_pgt_page = alloc_pgt_page, @@ -198,12 +226,12 @@ .kernpg_flag = _KERNPG_TABLE_NOENC, }; unsigned long mstart, mend; - pgd_t *level4p; int result; int i; - level4p = (pgd_t *)__va(start_pgtable); - clear_page(level4p); + image->arch.pgd = alloc_pgt_page(image); + if (!image->arch.pgd) + return -ENOMEM; if (cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT)) { info.page_flag |= _PAGE_ENC; @@ -217,8 +245,8 @@ mstart = pfn_mapped[i].start << PAGE_SHIFT; mend = pfn_mapped[i].end << PAGE_SHIFT; - result = kernel_ident_mapping_init(&info, - level4p, mstart, mend); + result = kernel_ident_mapping_init(&info, image->arch.pgd, + mstart, mend); if (result) return result; } @@ -233,8 +261,8 @@ mstart = image->segment[i].mem; mend = mstart + image->segment[i].memsz; - result = kernel_ident_mapping_init(&info, - level4p, mstart, mend); + result = kernel_ident_mapping_init(&info, image->arch.pgd, + mstart, mend); if (result) return result; @@ -244,15 +272,19 @@ * Prepare EFI systab and ACPI tables for kexec kernel since they are * not covered by pfn_mapped. */ - result = map_efi_systab(&info, level4p); + result = map_efi_systab(&info, image->arch.pgd); if (result) return result; - result = map_acpi_tables(&info, level4p); + result = map_acpi_tables(&info, image->arch.pgd); if (result) return result; - return init_transition_pgtable(image, level4p); + /* + * This must be last because the intermediate page table pages it + * allocates will not be control pages and may overlap the image. + */ + return init_transition_pgtable(image, image->arch.pgd, control_page); } static void load_segments(void) @@ -269,14 +301,14 @@ int machine_kexec_prepare(struct kimage *image) { - unsigned long start_pgtable; + unsigned long control_page; int result; /* Calculate the offsets */ - start_pgtable = page_to_pfn(image->control_code_page) << PAGE_SHIFT; + control_page = page_to_pfn(image->control_code_page) << PAGE_SHIFT; /* Setup the identity mapped 64bit page table */ - result = init_pgtable(image, start_pgtable); + result = init_pgtable(image, control_page); if (result) return result; @@ -295,8 +327,15 @@ void machine_kexec(struct kimage *image) { unsigned long page_list[PAGES_NR]; - void *control_page; + unsigned int host_mem_enc_active; int save_ftrace_enabled; + void *control_page; + + /* + * This must be done before load_segments() since if call depth tracking + * is used then GS must be valid to make any function calls. + */ + host_mem_enc_active = cc_platform_has(CC_ATTR_HOST_MEM_ENCRYPT); #ifdef CONFIG_KEXEC_JUMP if (image->preserve_context) @@ -323,13 +362,12 @@ #endif } - control_page = page_address(image->control_code_page) + PAGE_SIZE; + control_page = page_address(image->control_code_page); __memcpy(control_page, relocate_kernel, KEXEC_CONTROL_CODE_MAX_SIZE); page_list[PA_CONTROL_PAGE] = virt_to_phys(control_page); page_list[VA_CONTROL_PAGE] = (unsigned long)control_page; - page_list[PA_TABLE_PAGE] = - (unsigned long)__pa(page_address(image->control_code_page)); + page_list[PA_TABLE_PAGE] = (unsigned long)__pa(image->arch.pgd); if (image->type == KEXEC_TYPE_DEFAULT) page_list[PA_SWAP_PAGE] = (page_to_pfn(image->swap_page) @@ -358,7 +396,7 @@ (unsigned long)page_list, image->start, image->preserve_context, - cc_platform_has(CC_ATTR_HOST_MEM_ENCRYPT)); + host_mem_enc_active); #ifdef CONFIG_KEXEC_JUMP if (image->preserve_context) @@ -537,8 +575,7 @@ /* Don't touch the control code page used in crash_kexec().*/ control = PFN_PHYS(page_to_pfn(kexec_crash_image->control_code_page)); - /* Control code page is located in the 2nd page. */ - kexec_mark_range(crashk_res.start, control + PAGE_SIZE - 1, protect); + kexec_mark_range(crashk_res.start, control - 1, protect); control += KEXEC_CONTROL_PAGE_SIZE; kexec_mark_range(control, crashk_res.end, protect); } --- linux-xilinx-6.8.0.orig/arch/x86/kernel/mmconf-fam10h_64.c +++ linux-xilinx-6.8.0/arch/x86/kernel/mmconf-fam10h_64.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include --- linux-xilinx-6.8.0.orig/arch/x86/kernel/nmi.c +++ linux-xilinx-6.8.0/arch/x86/kernel/nmi.c @@ -636,7 +636,7 @@ msgp = nmi_check_stall_msg[idx]; if (nsp->idt_ignored_snap != READ_ONCE(nsp->idt_ignored) && (idx & 0x1)) modp = ", but OK because ignore_nmis was set"; - if (nmi_seq & ~0x1) + if (nmi_seq & 0x1) msghp = " (CPU currently in NMI handler function)"; else if (nsp->idt_nmi_seq_snap + 1 == nmi_seq) msghp = " (CPU exited one NMI handler function)"; --- linux-xilinx-6.8.0.orig/arch/x86/kernel/paravirt.c +++ linux-xilinx-6.8.0/arch/x86/kernel/paravirt.c @@ -51,13 +51,12 @@ DEFINE_ASM_FUNC(pv_native_read_cr2, "mov %cr2, %rax", .noinstr.text); #endif -DEFINE_STATIC_KEY_TRUE(virt_spin_lock_key); +DEFINE_STATIC_KEY_FALSE(virt_spin_lock_key); void __init native_pv_lock_init(void) { - if (IS_ENABLED(CONFIG_PARAVIRT_SPINLOCKS) && - !boot_cpu_has(X86_FEATURE_HYPERVISOR)) - static_branch_disable(&virt_spin_lock_key); + if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) + static_branch_enable(&virt_spin_lock_key); } static void native_tlb_remove_table(struct mmu_gather *tlb, void *table) --- linux-xilinx-6.8.0.orig/arch/x86/kernel/probe_roms.c +++ linux-xilinx-6.8.0/arch/x86/kernel/probe_roms.c @@ -203,16 +203,6 @@ unsigned char c; int i; - /* - * The ROM memory range is not part of the e820 table and is therefore not - * pre-validated by BIOS. The kernel page table maps the ROM region as encrypted - * memory, and SNP requires encrypted memory to be validated before access. - * Do that here. - */ - snp_prep_memory(video_rom_resource.start, - ((system_rom_resource.end + 1) - video_rom_resource.start), - SNP_PAGE_STATE_PRIVATE); - /* video rom */ upper = adapter_rom_resources[0].start; for (start = video_rom_resource.start; start < upper; start += 2048) { --- linux-xilinx-6.8.0.orig/arch/x86/kernel/process.c +++ linux-xilinx-6.8.0/arch/x86/kernel/process.c @@ -1030,7 +1030,10 @@ unsigned long arch_randomize_brk(struct mm_struct *mm) { - return randomize_page(mm->brk, 0x02000000); + if (mmap_is_ia32()) + return randomize_page(mm->brk, SZ_32M); + + return randomize_page(mm->brk, SZ_1G); } /* --- linux-xilinx-6.8.0.orig/arch/x86/kernel/process_64.c +++ linux-xilinx-6.8.0/arch/x86/kernel/process_64.c @@ -117,7 +117,7 @@ printk("%sFS: %016lx(%04x) GS:%016lx(%04x) knlGS:%016lx\n", log_lvl, fs, fsindex, gs, gsindex, shadowgs); - printk("%sCS: %04lx DS: %04x ES: %04x CR0: %016lx\n", + printk("%sCS: %04x DS: %04x ES: %04x CR0: %016lx\n", log_lvl, regs->cs, ds, es, cr0); printk("%sCR2: %016lx CR3: %016lx CR4: %016lx\n", log_lvl, cr2, cr3, cr4); @@ -138,7 +138,7 @@ log_lvl, d3, d6, d7); } - if (cpu_feature_enabled(X86_FEATURE_OSPKE)) + if (cr4 & X86_CR4_PKE) printk("%sPKRU: %08x\n", log_lvl, read_pkru()); } @@ -750,6 +750,27 @@ #define LAM_U57_BITS 6 +static void enable_lam_func(void *__mm) +{ + struct mm_struct *mm = __mm; + + if (this_cpu_read(cpu_tlbstate.loaded_mm) == mm) { + write_cr3(__read_cr3() | mm->context.lam_cr3_mask); + set_tlbstate_lam_mode(mm); + } +} + +static void mm_enable_lam(struct mm_struct *mm) +{ + /* + * Even though the process must still be single-threaded at this + * point, kernel threads may be using the mm. IPI those kernel + * threads if they exist. + */ + on_each_cpu_mask(mm_cpumask(mm), enable_lam_func, mm, true); + set_bit(MM_CONTEXT_LOCK_LAM, &mm->context.flags); +} + static int prctl_enable_tagged_addr(struct mm_struct *mm, unsigned long nr_bits) { if (!cpu_feature_enabled(X86_FEATURE_LAM)) @@ -766,6 +787,10 @@ if (mmap_write_lock_killable(mm)) return -EINTR; + /* + * MM_CONTEXT_LOCK_LAM is set on clone. Prevent LAM from + * being enabled unless the process is single threaded: + */ if (test_bit(MM_CONTEXT_LOCK_LAM, &mm->context.flags)) { mmap_write_unlock(mm); return -EBUSY; @@ -782,9 +807,7 @@ return -EINVAL; } - write_cr3(__read_cr3() | mm->context.lam_cr3_mask); - set_tlbstate_lam_mode(mm); - set_bit(MM_CONTEXT_LOCK_LAM, &mm->context.flags); + mm_enable_lam(mm); mmap_write_unlock(mm); --- linux-xilinx-6.8.0.orig/arch/x86/kernel/reboot.c +++ linux-xilinx-6.8.0/arch/x86/kernel/reboot.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -487,7 +488,46 @@ DMI_MATCH(DMI_PRODUCT_NAME, "VGN-Z540N"), }, }, - + { /* Handle problems with rebooting on the Latitude E6520. */ + .callback = set_pci_reboot, + .ident = "Dell Latitude E6520", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "Latitude E6520"), + }, + }, + { /* Handle problems with rebooting on the OptiPlex 790. */ + .callback = set_pci_reboot, + .ident = "Dell OptiPlex 790", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 790"), + }, + }, + { /* Handle problems with rebooting on the OptiPlex 990. */ + .callback = set_pci_reboot, + .ident = "Dell OptiPlex 990", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 990"), + }, + }, + { /* Handle problems with rebooting on the Latitude E6220. */ + .callback = set_pci_reboot, + .ident = "Dell Latitude E6220", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "Latitude E6220"), + }, + }, + { /* Handle problems with rebooting on the OptiPlex 390. */ + .callback = set_pci_reboot, + .ident = "Dell OptiPlex 390", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 390"), + }, + }, { } }; @@ -716,6 +756,14 @@ void native_machine_shutdown(void) { + /* + * Call enc_kexec_begin() while all CPUs are still active and + * interrupts are enabled. This will allow all in-flight memory + * conversions to finish cleanly. + */ + if (kexec_in_progress) + x86_platform.guest.enc_kexec_begin(); + /* Stop the cpus and apics */ #ifdef CONFIG_X86_IO_APIC /* @@ -752,6 +800,9 @@ #ifdef CONFIG_X86_64 x86_platform.iommu_shutdown(); #endif + + if (kexec_in_progress) + x86_platform.guest.enc_kexec_finish(); } static void __machine_emergency_restart(int emergency) --- linux-xilinx-6.8.0.orig/arch/x86/kernel/relocate_kernel_64.S +++ linux-xilinx-6.8.0/arch/x86/kernel/relocate_kernel_64.S @@ -11,6 +11,7 @@ #include #include #include +#include /* * Must be relocatable PIC code callable as a C function, in particular @@ -240,6 +241,13 @@ movq CR0(%r8), %r8 movq %rax, %cr3 movq %r8, %cr0 + +#ifdef CONFIG_KEXEC_JUMP + /* Saved in save_processor_state. */ + movq $saved_context, %rax + lgdt saved_context_gdt_desc(%rax) +#endif + movq %rbp, %rax popf --- linux-xilinx-6.8.0.orig/arch/x86/kernel/setup.c +++ linux-xilinx-6.8.0/arch/x86/kernel/setup.c @@ -9,7 +9,6 @@ #include #include #include -#include #include #include #include @@ -21,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -36,6 +36,7 @@ #include #include #include +#include #include #include #include @@ -902,7 +903,15 @@ efi_init(); reserve_ibft_region(); - dmi_setup(); + + efi_set_secure_boot(boot_params.secure_boot); + +#ifdef CONFIG_LOCK_DOWN_IN_SECURE_BOOT + if (efi_enabled(EFI_SECURE_BOOT)) + security_lock_kernel_down("EFI Secure Boot mode", LOCKDOWN_INTEGRITY_MAX); +#endif + + x86_init.resources.dmi_setup(); /* * VMware detection requires dmi to be available, so this @@ -994,6 +1003,7 @@ * memory size. */ mem_encrypt_setup_arch(); + cc_random_init(); efi_fake_memmap(); efi_find_mirror(); @@ -1064,19 +1074,7 @@ /* Allocate bigger log buffer */ setup_log_buf(1); - if (efi_enabled(EFI_BOOT)) { - switch (boot_params.secure_boot) { - case efi_secureboot_mode_disabled: - pr_info("Secure boot disabled\n"); - break; - case efi_secureboot_mode_enabled: - pr_info("Secure boot enabled\n"); - break; - default: - pr_info("Secure boot could not be determined\n"); - break; - } - } + efi_set_secure_boot(boot_params.secure_boot); reserve_initrd(); --- linux-xilinx-6.8.0.orig/arch/x86/kernel/sev-shared.c +++ linux-xilinx-6.8.0/arch/x86/kernel/sev-shared.c @@ -10,11 +10,15 @@ */ #ifndef __BOOT_COMPRESSED -#define error(v) pr_err(v) -#define has_cpuflag(f) boot_cpu_has(f) +#define error(v) pr_err(v) +#define has_cpuflag(f) boot_cpu_has(f) +#define sev_printk(fmt, ...) printk(fmt, ##__VA_ARGS__) +#define sev_printk_rtl(fmt, ...) printk_ratelimited(fmt, ##__VA_ARGS__) #else #undef WARN #define WARN(condition, format...) (!!(condition)) +#define sev_printk(fmt, ...) +#define sev_printk_rtl(fmt, ...) #endif /* I/O parameters for CPUID-related helpers */ @@ -89,7 +93,8 @@ return true; } -static void __noreturn sev_es_terminate(unsigned int set, unsigned int reason) +static void __head __noreturn +sev_es_terminate(unsigned int set, unsigned int reason) { u64 val = GHCB_MSR_TERM_REQ; @@ -326,13 +331,7 @@ */ static const struct snp_cpuid_table *snp_cpuid_get_table(void) { - void *ptr; - - asm ("lea cpuid_table_copy(%%rip), %0" - : "=r" (ptr) - : "p" (&cpuid_table_copy)); - - return ptr; + return &RIP_REL_REF(cpuid_table_copy); } /* @@ -391,7 +390,7 @@ return xsave_size; } -static bool +static bool __head snp_cpuid_get_validated_func(struct cpuid_leaf *leaf) { const struct snp_cpuid_table *cpuid_table = snp_cpuid_get_table(); @@ -528,7 +527,8 @@ * Returns -EOPNOTSUPP if feature not enabled. Any other non-zero return value * should be treated as fatal by caller. */ -static int snp_cpuid(struct ghcb *ghcb, struct es_em_ctxt *ctxt, struct cpuid_leaf *leaf) +static int __head +snp_cpuid(struct ghcb *ghcb, struct es_em_ctxt *ctxt, struct cpuid_leaf *leaf) { const struct snp_cpuid_table *cpuid_table = snp_cpuid_get_table(); @@ -556,9 +556,9 @@ leaf->eax = leaf->ebx = leaf->ecx = leaf->edx = 0; /* Skip post-processing for out-of-range zero leafs. */ - if (!(leaf->fn <= cpuid_std_range_max || - (leaf->fn >= 0x40000000 && leaf->fn <= cpuid_hyp_range_max) || - (leaf->fn >= 0x80000000 && leaf->fn <= cpuid_ext_range_max))) + if (!(leaf->fn <= RIP_REL_REF(cpuid_std_range_max) || + (leaf->fn >= 0x40000000 && leaf->fn <= RIP_REL_REF(cpuid_hyp_range_max)) || + (leaf->fn >= 0x80000000 && leaf->fn <= RIP_REL_REF(cpuid_ext_range_max)))) return 0; } @@ -570,10 +570,11 @@ * page yet, so it only supports the MSR based communication with the * hypervisor and only the CPUID exit-code. */ -void __init do_vc_no_ghcb(struct pt_regs *regs, unsigned long exit_code) +void __head do_vc_no_ghcb(struct pt_regs *regs, unsigned long exit_code) { unsigned int subfn = lower_bits(regs->cx, 32); unsigned int fn = lower_bits(regs->ax, 32); + u16 opcode = *(unsigned short *)regs->ip; struct cpuid_leaf leaf; int ret; @@ -581,6 +582,10 @@ if (exit_code != SVM_EXIT_CPUID) goto fail; + /* Is it really a CPUID insn? */ + if (opcode != 0xa20f) + goto fail; + leaf.fn = fn; leaf.subfn = subfn; @@ -1016,7 +1021,8 @@ * Search for a Confidential Computing blob passed in as a setup_data entry * via the Linux Boot Protocol. */ -static struct cc_blob_sev_info *find_cc_blob_setup_data(struct boot_params *bp) +static __head +struct cc_blob_sev_info *find_cc_blob_setup_data(struct boot_params *bp) { struct cc_setup_data *sd = NULL; struct setup_data *hdr; @@ -1043,7 +1049,7 @@ * mapping needs to be updated in sync with all the changes to virtual memory * layout and related mapping facilities throughout the boot process. */ -static void __init setup_cpuid_table(const struct cc_blob_sev_info *cc_info) +static void __head setup_cpuid_table(const struct cc_blob_sev_info *cc_info) { const struct snp_cpuid_table *cpuid_table_fw, *cpuid_table; int i; @@ -1063,11 +1069,11 @@ const struct snp_cpuid_fn *fn = &cpuid_table->fn[i]; if (fn->eax_in == 0x0) - cpuid_std_range_max = fn->eax; + RIP_REL_REF(cpuid_std_range_max) = fn->eax; else if (fn->eax_in == 0x40000000) - cpuid_hyp_range_max = fn->eax; + RIP_REL_REF(cpuid_hyp_range_max) = fn->eax; else if (fn->eax_in == 0x80000000) - cpuid_ext_range_max = fn->eax; + RIP_REL_REF(cpuid_ext_range_max) = fn->eax; } } @@ -1170,3 +1176,94 @@ out: return ret; } + +static enum es_result vc_check_opcode_bytes(struct es_em_ctxt *ctxt, + unsigned long exit_code) +{ + unsigned int opcode = (unsigned int)ctxt->insn.opcode.value; + u8 modrm = ctxt->insn.modrm.value; + + switch (exit_code) { + + case SVM_EXIT_IOIO: + case SVM_EXIT_NPF: + /* handled separately */ + return ES_OK; + + case SVM_EXIT_CPUID: + if (opcode == 0xa20f) + return ES_OK; + break; + + case SVM_EXIT_INVD: + if (opcode == 0x080f) + return ES_OK; + break; + + case SVM_EXIT_MONITOR: + /* MONITOR and MONITORX instructions generate the same error code */ + if (opcode == 0x010f && (modrm == 0xc8 || modrm == 0xfa)) + return ES_OK; + break; + + case SVM_EXIT_MWAIT: + /* MWAIT and MWAITX instructions generate the same error code */ + if (opcode == 0x010f && (modrm == 0xc9 || modrm == 0xfb)) + return ES_OK; + break; + + case SVM_EXIT_MSR: + /* RDMSR */ + if (opcode == 0x320f || + /* WRMSR */ + opcode == 0x300f) + return ES_OK; + break; + + case SVM_EXIT_RDPMC: + if (opcode == 0x330f) + return ES_OK; + break; + + case SVM_EXIT_RDTSC: + if (opcode == 0x310f) + return ES_OK; + break; + + case SVM_EXIT_RDTSCP: + if (opcode == 0x010f && modrm == 0xf9) + return ES_OK; + break; + + case SVM_EXIT_READ_DR7: + if (opcode == 0x210f && + X86_MODRM_REG(ctxt->insn.modrm.value) == 7) + return ES_OK; + break; + + case SVM_EXIT_VMMCALL: + if (opcode == 0x010f && modrm == 0xd9) + return ES_OK; + + break; + + case SVM_EXIT_WRITE_DR7: + if (opcode == 0x230f && + X86_MODRM_REG(ctxt->insn.modrm.value) == 7) + return ES_OK; + break; + + case SVM_EXIT_WBINVD: + if (opcode == 0x90f) + return ES_OK; + break; + + default: + break; + } + + sev_printk(KERN_ERR "Wrong/unhandled opcode bytes: 0x%x, exit_code: 0x%lx, rIP: 0x%lx\n", + opcode, exit_code, ctxt->regs->ip); + + return ES_UNSUPPORTED; +} --- linux-xilinx-6.8.0.orig/arch/x86/kernel/sev.c +++ linux-xilinx-6.8.0/arch/x86/kernel/sev.c @@ -23,8 +23,10 @@ #include #include #include +#include #include +#include #include #include #include @@ -682,8 +684,9 @@ return ret; } -static void early_set_pages_state(unsigned long vaddr, unsigned long paddr, - unsigned long npages, enum psc_op op) +static void __head +early_set_pages_state(unsigned long vaddr, unsigned long paddr, + unsigned long npages, enum psc_op op) { unsigned long paddr_end; u64 val; @@ -739,7 +742,7 @@ sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_PSC); } -void __init early_snp_set_memory_private(unsigned long vaddr, unsigned long paddr, +void __head early_snp_set_memory_private(unsigned long vaddr, unsigned long paddr, unsigned long npages) { /* @@ -748,7 +751,7 @@ * This eliminates worries about jump tables or checking boot_cpu_data * in the cc_platform_has() function. */ - if (!(sev_status & MSR_AMD64_SEV_SNP_ENABLED)) + if (!(RIP_REL_REF(sev_status) & MSR_AMD64_SEV_SNP_ENABLED)) return; /* @@ -767,28 +770,13 @@ * This eliminates worries about jump tables or checking boot_cpu_data * in the cc_platform_has() function. */ - if (!(sev_status & MSR_AMD64_SEV_SNP_ENABLED)) + if (!(RIP_REL_REF(sev_status) & MSR_AMD64_SEV_SNP_ENABLED)) return; /* Ask hypervisor to mark the memory pages shared in the RMP table. */ early_set_pages_state(vaddr, paddr, npages, SNP_PAGE_STATE_SHARED); } -void __init snp_prep_memory(unsigned long paddr, unsigned int sz, enum psc_op op) -{ - unsigned long vaddr, npages; - - vaddr = (unsigned long)__va(paddr); - npages = PAGE_ALIGN(sz) >> PAGE_SHIFT; - - if (op == SNP_PAGE_STATE_PRIVATE) - early_snp_set_memory_private(vaddr, paddr, npages); - else if (op == SNP_PAGE_STATE_SHARED) - early_snp_set_memory_shared(vaddr, paddr, npages); - else - WARN(1, "invalid memory op %d\n", op); -} - static unsigned long __set_pages_state(struct snp_psc_desc *data, unsigned long vaddr, unsigned long vaddr_end, int op) { @@ -1752,7 +1740,10 @@ struct ghcb *ghcb, unsigned long exit_code) { - enum es_result result; + enum es_result result = vc_check_opcode_bytes(ctxt, exit_code); + + if (result != ES_OK) + return result; switch (exit_code) { case SVM_EXIT_READ_DR7: @@ -2059,7 +2050,7 @@ * * Scan for the blob in that order. */ -static __init struct cc_blob_sev_info *find_cc_blob(struct boot_params *bp) +static __head struct cc_blob_sev_info *find_cc_blob(struct boot_params *bp) { struct cc_blob_sev_info *cc_info; @@ -2085,7 +2076,7 @@ return cc_info; } -bool __init snp_init(struct boot_params *bp) +bool __head snp_init(struct boot_params *bp) { struct cc_blob_sev_info *cc_info; @@ -2107,11 +2098,22 @@ return true; } -void __init __noreturn snp_abort(void) +void __head __noreturn snp_abort(void) { sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SNP_UNSUPPORTED); } +/* + * SEV-SNP guests should only execute dmi_setup() if EFI_CONFIG_TABLES are + * enabled, as the alternative (fallback) logic for DMI probing in the legacy + * ROM region can cause a crash since this region is not pre-validated. + */ +void __init snp_dmi_setup(void) +{ + if (efi_enabled(EFI_CONFIG_TABLES)) + dmi_setup(); +} + static void dump_cpuid_table(void) { const struct snp_cpuid_table *cpuid_table = snp_cpuid_get_table(); --- linux-xilinx-6.8.0.orig/arch/x86/kernel/shstk.c +++ linux-xilinx-6.8.0/arch/x86/kernel/shstk.c @@ -577,3 +577,14 @@ return wrss_control(true); return -EINVAL; } + +int shstk_update_last_frame(unsigned long val) +{ + unsigned long ssp; + + if (!features_enabled(ARCH_SHSTK_SHSTK)) + return 0; + + ssp = get_user_shstk_addr(); + return write_user_shstk_64((u64 __user *)ssp, (u64)val); +} --- linux-xilinx-6.8.0.orig/arch/x86/kernel/signal.c +++ linux-xilinx-6.8.0/arch/x86/kernel/signal.c @@ -84,6 +84,7 @@ unsigned long math_size = 0; unsigned long sp = regs->sp; unsigned long buf_fx = 0; + u32 pkru = read_pkru(); /* redzone */ if (!ia32_frame) @@ -139,7 +140,7 @@ } /* save i387 and extended state */ - if (!copy_fpstate_to_sigframe(*fpstate, (void __user *)buf_fx, math_size)) + if (!copy_fpstate_to_sigframe(*fpstate, (void __user *)buf_fx, math_size, pkru)) return (void __user *)-1L; return (void __user *)sp; --- linux-xilinx-6.8.0.orig/arch/x86/kernel/signal_64.c +++ linux-xilinx-6.8.0/arch/x86/kernel/signal_64.c @@ -260,13 +260,13 @@ set_current_blocked(&set); - if (!restore_sigcontext(regs, &frame->uc.uc_mcontext, uc_flags)) + if (restore_altstack(&frame->uc.uc_stack)) goto badframe; - if (restore_signal_shadow_stack()) + if (!restore_sigcontext(regs, &frame->uc.uc_mcontext, uc_flags)) goto badframe; - if (restore_altstack(&frame->uc.uc_stack)) + if (restore_signal_shadow_stack()) goto badframe; return regs->ax; --- linux-xilinx-6.8.0.orig/arch/x86/kernel/smpboot.c +++ linux-xilinx-6.8.0/arch/x86/kernel/smpboot.c @@ -60,6 +60,7 @@ #include #include #include +#include #include #include @@ -613,14 +614,6 @@ } #endif -static int x86_die_flags(void) -{ - if (cpu_feature_enabled(X86_FEATURE_HYBRID_CPU)) - return x86_sched_itmt_flags(); - - return 0; -} - /* * Set if a package/die has multiple NUMA nodes inside. * AMD Magny-Cours, Intel Cluster-on-Die, and Intel @@ -656,7 +649,7 @@ */ if (!x86_has_numa_in_package) { x86_topology[i++] = (struct sched_domain_topology_level){ - cpu_cpu_mask, x86_die_flags, SD_INIT_NAME(PKG) + cpu_cpu_mask, x86_sched_itmt_flags, SD_INIT_NAME(PKG) }; } --- linux-xilinx-6.8.0.orig/arch/x86/kernel/static_call.c +++ linux-xilinx-6.8.0/arch/x86/kernel/static_call.c @@ -172,6 +172,14 @@ } EXPORT_SYMBOL_GPL(arch_static_call_transform); +noinstr void __static_call_update_early(void *tramp, void *func) +{ + BUG_ON(system_state != SYSTEM_BOOTING); + BUG_ON(static_call_initialized); + __text_gen_insn(tramp, JMP32_INSN_OPCODE, tramp, func, JMP32_INSN_SIZE); + sync_core(); +} + #ifdef CONFIG_RETHUNK /* * This is called by apply_returns() to fix up static call trampolines, --- linux-xilinx-6.8.0.orig/arch/x86/kernel/time.c +++ linux-xilinx-6.8.0/arch/x86/kernel/time.c @@ -27,25 +27,7 @@ unsigned long profile_pc(struct pt_regs *regs) { - unsigned long pc = instruction_pointer(regs); - - if (!user_mode(regs) && in_lock_functions(pc)) { -#ifdef CONFIG_FRAME_POINTER - return *(unsigned long *)(regs->bp + sizeof(long)); -#else - unsigned long *sp = (unsigned long *)regs->sp; - /* - * Return address is either directly at stack pointer - * or above a saved flags. Eflags has bits 22-31 zero, - * kernel addresses don't. - */ - if (sp[0] >> 22) - return sp[0]; - if (sp[1] >> 22) - return sp[1]; -#endif - } - return pc; + return instruction_pointer(regs); } EXPORT_SYMBOL(profile_pc); --- linux-xilinx-6.8.0.orig/arch/x86/kernel/traps.c +++ linux-xilinx-6.8.0/arch/x86/kernel/traps.c @@ -42,6 +42,7 @@ #include #include #include +#include #include #include @@ -90,6 +91,47 @@ return *(unsigned short *)addr == INSN_UD2; } +/* + * Check for UD1 or UD2, accounting for Address Size Override Prefixes. + * If it's a UD1, get the ModRM byte to pass along to UBSan. + */ +__always_inline int decode_bug(unsigned long addr, u32 *imm) +{ + u8 v; + + if (addr < TASK_SIZE_MAX) + return BUG_NONE; + + v = *(u8 *)(addr++); + if (v == INSN_ASOP) + v = *(u8 *)(addr++); + if (v != OPCODE_ESCAPE) + return BUG_NONE; + + v = *(u8 *)(addr++); + if (v == SECOND_BYTE_OPCODE_UD2) + return BUG_UD2; + + if (!IS_ENABLED(CONFIG_UBSAN_TRAP) || v != SECOND_BYTE_OPCODE_UD1) + return BUG_NONE; + + /* Retrieve the immediate (type value) for the UBSAN UD1 */ + v = *(u8 *)(addr++); + if (X86_MODRM_RM(v) == 4) + addr++; + + *imm = 0; + if (X86_MODRM_MOD(v) == 1) + *imm = *(u8 *)addr; + else if (X86_MODRM_MOD(v) == 2) + *imm = *(u32 *)addr; + else + WARN_ONCE(1, "Unexpected MODRM_MOD: %u\n", X86_MODRM_MOD(v)); + + return BUG_UD1; +} + + static nokprobe_inline int do_trap_no_signal(struct task_struct *tsk, int trapnr, const char *str, struct pt_regs *regs, long error_code) @@ -215,14 +257,11 @@ static noinstr bool handle_bug(struct pt_regs *regs) { bool handled = false; + int ud_type; + u32 imm; - /* - * Normally @regs are unpoisoned by irqentry_enter(), but handle_bug() - * is a rare case that uses @regs without passing them to - * irqentry_enter(). - */ - kmsan_unpoison_entry_regs(regs); - if (!is_valid_bugaddr(regs->ip)) + ud_type = decode_bug(regs->ip, &imm); + if (ud_type == BUG_NONE) return handled; /* @@ -230,15 +269,25 @@ */ instrumentation_begin(); /* + * Normally @regs are unpoisoned by irqentry_enter(), but handle_bug() + * is a rare case that uses @regs without passing them to + * irqentry_enter(). + */ + kmsan_unpoison_entry_regs(regs); + /* * Since we're emulating a CALL with exceptions, restore the interrupt * state to what it was at the exception site. */ if (regs->flags & X86_EFLAGS_IF) raw_local_irq_enable(); - if (report_bug(regs->ip, regs) == BUG_TRAP_TYPE_WARN || - handle_cfi_failure(regs) == BUG_TRAP_TYPE_WARN) { - regs->ip += LEN_UD2; - handled = true; + if (ud_type == BUG_UD2) { + if (report_bug(regs->ip, regs) == BUG_TRAP_TYPE_WARN || + handle_cfi_failure(regs) == BUG_TRAP_TYPE_WARN) { + regs->ip += LEN_UD2; + handled = true; + } + } else if (IS_ENABLED(CONFIG_UBSAN_TRAP)) { + pr_crit("%s at %pS\n", report_ubsan_failure(regs, imm), (void *)regs->ip); } if (regs->flags & X86_EFLAGS_IF) raw_local_irq_disable(); --- linux-xilinx-6.8.0.orig/arch/x86/kernel/tsc_sync.c +++ linux-xilinx-6.8.0/arch/x86/kernel/tsc_sync.c @@ -193,11 +193,9 @@ cur->warned = false; /* - * If a non-zero TSC value for socket 0 may be valid then the default - * adjusted value cannot assumed to be zero either. + * The default adjust value cannot be assumed to be zero on any socket. */ - if (tsc_async_resets) - cur->adjusted = bootval; + cur->adjusted = bootval; /* * Check whether this CPU is the first in a package to come up. In --- linux-xilinx-6.8.0.orig/arch/x86/kernel/unwind_orc.c +++ linux-xilinx-6.8.0/arch/x86/kernel/unwind_orc.c @@ -723,7 +723,7 @@ state->sp = task->thread.sp + sizeof(*frame); state->bp = READ_ONCE_NOCHECK(frame->bp); state->ip = READ_ONCE_NOCHECK(frame->ret_addr); - state->signal = (void *)state->ip == ret_from_fork; + state->signal = (void *)state->ip == ret_from_fork_asm; } if (get_stack_info((unsigned long *)state->sp, state->task, --- linux-xilinx-6.8.0.orig/arch/x86/kernel/uprobes.c +++ linux-xilinx-6.8.0/arch/x86/kernel/uprobes.c @@ -1076,8 +1076,13 @@ return orig_ret_vaddr; nleft = copy_to_user((void __user *)regs->sp, &trampoline_vaddr, rasize); - if (likely(!nleft)) + if (likely(!nleft)) { + if (shstk_update_last_frame(trampoline_vaddr)) { + force_sig(SIGSEGV); + return -1; + } return orig_ret_vaddr; + } if (nleft != rasize) { pr_err("return address clobbered: pid=%d, %%sp=%#lx, %%ip=%#lx\n", --- linux-xilinx-6.8.0.orig/arch/x86/kernel/vmlinux.lds.S +++ linux-xilinx-6.8.0/arch/x86/kernel/vmlinux.lds.S @@ -489,6 +489,9 @@ . = ASSERT((_end - LOAD_OFFSET <= KERNEL_IMAGE_SIZE), "kernel image bigger than KERNEL_IMAGE_SIZE"); +/* needed for Clang - see arch/x86/entry/entry.S */ +PROVIDE(__ref_stack_chk_guard = __stack_chk_guard); + #ifdef CONFIG_X86_64 /* * Per-cpu symbols which need to be offset from __per_cpu_load --- linux-xilinx-6.8.0.orig/arch/x86/kernel/x86_init.c +++ linux-xilinx-6.8.0/arch/x86/kernel/x86_init.c @@ -3,10 +3,12 @@ * * For licencing details see kernel-base/COPYING */ +#include #include #include #include #include +#include #include #include @@ -66,6 +68,7 @@ .probe_roms = probe_roms, .reserve_resources = reserve_standard_io_resources, .memory_setup = e820__memory_setup_default, + .dmi_setup = dmi_setup, }, .mpparse = { @@ -131,10 +134,12 @@ static void default_nmi_init(void) { }; -static bool enc_status_change_prepare_noop(unsigned long vaddr, int npages, bool enc) { return true; } -static bool enc_status_change_finish_noop(unsigned long vaddr, int npages, bool enc) { return true; } +static int enc_status_change_prepare_noop(unsigned long vaddr, int npages, bool enc) { return 0; } +static int enc_status_change_finish_noop(unsigned long vaddr, int npages, bool enc) { return 0; } static bool enc_tlb_flush_required_noop(bool enc) { return false; } static bool enc_cache_flush_required_noop(void) { return false; } +static void enc_kexec_begin_noop(void) {} +static void enc_kexec_finish_noop(void) {} static bool is_private_mmio_noop(u64 addr) {return false; } struct x86_platform_ops x86_platform __ro_after_init = { @@ -158,6 +163,8 @@ .enc_status_change_finish = enc_status_change_finish_noop, .enc_tlb_flush_required = enc_tlb_flush_required_noop, .enc_cache_flush_required = enc_cache_flush_required_noop, + .enc_kexec_begin = enc_kexec_begin_noop, + .enc_kexec_finish = enc_kexec_finish_noop, }, }; --- linux-xilinx-6.8.0.orig/arch/x86/kvm/Kconfig +++ linux-xilinx-6.8.0/arch/x86/kvm/Kconfig @@ -32,6 +32,7 @@ select IRQ_BYPASS_MANAGER select HAVE_KVM_IRQ_BYPASS select HAVE_KVM_IRQ_ROUTING + select VHOST_TASK select KVM_ASYNC_PF select USER_RETURN_NOTIFIER select KVM_MMIO --- linux-xilinx-6.8.0.orig/arch/x86/kvm/cpuid.c +++ linux-xilinx-6.8.0/arch/x86/kvm/cpuid.c @@ -36,6 +36,26 @@ u32 kvm_cpu_caps[NR_KVM_CPU_CAPS] __read_mostly; EXPORT_SYMBOL_GPL(kvm_cpu_caps); +struct cpuid_xstate_sizes { + u32 eax; + u32 ebx; + u32 ecx; +}; + +static struct cpuid_xstate_sizes xstate_sizes[XFEATURE_MAX] __ro_after_init; + +void __init kvm_init_xstate_sizes(void) +{ + u32 ign; + int i; + + for (i = XFEATURE_YMM; i < ARRAY_SIZE(xstate_sizes); i++) { + struct cpuid_xstate_sizes *xs = &xstate_sizes[i]; + + cpuid_count(0xD, i, &xs->eax, &xs->ebx, &xs->ecx, &ign); + } +} + u32 xstate_required_size(u64 xstate_bv, bool compacted) { int feature_bit = 0; @@ -44,14 +64,15 @@ xstate_bv &= XFEATURE_MASK_EXTEND; while (xstate_bv) { if (xstate_bv & 0x1) { - u32 eax, ebx, ecx, edx, offset; - cpuid_count(0xD, feature_bit, &eax, &ebx, &ecx, &edx); + struct cpuid_xstate_sizes *xs = &xstate_sizes[feature_bit]; + u32 offset; + /* ECX[1]: 64B alignment in compacted form */ if (compacted) - offset = (ecx & 0x2) ? ALIGN(ret, 64) : ret; + offset = (xs->ecx & 0x2) ? ALIGN(ret, 64) : ret; else - offset = ebx; - ret = max(ret, offset + eax); + offset = xs->ebx; + ret = max(ret, offset + xs->eax); } xstate_bv >>= 1; @@ -366,6 +387,7 @@ kvm_update_pv_runtime(vcpu); + vcpu->arch.is_amd_compatible = guest_cpuid_is_amd_or_hygon(vcpu); vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu); vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu); @@ -1221,9 +1243,8 @@ entry->eax = entry->ebx = entry->ecx = 0; break; case 0x80000008: { - unsigned g_phys_as = (entry->eax >> 16) & 0xff; - unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U); - unsigned phys_as = entry->eax & 0xff; + unsigned int virt_as = max((entry->eax >> 8) & 0xff, 48U); + unsigned int phys_as; /* * If TDP (NPT) is disabled use the adjusted host MAXPHYADDR as @@ -1231,16 +1252,16 @@ * reductions in MAXPHYADDR for memory encryption affect shadow * paging, too. * - * If TDP is enabled but an explicit guest MAXPHYADDR is not - * provided, use the raw bare metal MAXPHYADDR as reductions to - * the HPAs do not affect GPAs. + * If TDP is enabled, use the raw bare metal MAXPHYADDR as + * reductions to the HPAs do not affect GPAs. */ - if (!tdp_enabled) - g_phys_as = boot_cpu_data.x86_phys_bits; - else if (!g_phys_as) - g_phys_as = phys_as; + if (!tdp_enabled) { + phys_as = boot_cpu_data.x86_phys_bits; + } else { + phys_as = entry->eax & 0xff; + } - entry->eax = g_phys_as | (virt_as << 8); + entry->eax = phys_as | (virt_as << 8); entry->ecx &= ~(GENMASK(31, 16) | GENMASK(11, 8)); entry->edx = 0; cpuid_entry_override(entry, CPUID_8000_0008_EBX); --- linux-xilinx-6.8.0.orig/arch/x86/kvm/cpuid.h +++ linux-xilinx-6.8.0/arch/x86/kvm/cpuid.h @@ -32,6 +32,7 @@ bool kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool exact_only); +void __init kvm_init_xstate_sizes(void); u32 xstate_required_size(u64 xstate_bv, bool compacted); int cpuid_query_maxphyaddr(struct kvm_vcpu *vcpu); @@ -120,6 +121,16 @@ return best && is_guest_vendor_intel(best->ebx, best->ecx, best->edx); } +static inline bool guest_cpuid_is_amd_compatible(struct kvm_vcpu *vcpu) +{ + return vcpu->arch.is_amd_compatible; +} + +static inline bool guest_cpuid_is_intel_compatible(struct kvm_vcpu *vcpu) +{ + return !guest_cpuid_is_amd_compatible(vcpu); +} + static inline int guest_cpuid_family(struct kvm_vcpu *vcpu) { struct kvm_cpuid_entry2 *best; --- linux-xilinx-6.8.0.orig/arch/x86/kvm/hyperv.c +++ linux-xilinx-6.8.0/arch/x86/kvm/hyperv.c @@ -2225,6 +2225,9 @@ u32 vector; bool all_cpus; + if (!lapic_in_kernel(vcpu)) + return HV_STATUS_INVALID_HYPERCALL_INPUT; + if (hc->code == HVCALL_SEND_IPI) { if (!hc->fast) { if (unlikely(kvm_read_guest(kvm, hc->ingpa, &send_ipi, @@ -2851,7 +2854,8 @@ ent->eax |= HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED; ent->eax |= HV_X64_APIC_ACCESS_RECOMMENDED; ent->eax |= HV_X64_RELAXED_TIMING_RECOMMENDED; - ent->eax |= HV_X64_CLUSTER_IPI_RECOMMENDED; + if (!vcpu || lapic_in_kernel(vcpu)) + ent->eax |= HV_X64_CLUSTER_IPI_RECOMMENDED; ent->eax |= HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED; if (evmcs_ver) ent->eax |= HV_X64_ENLIGHTENED_VMCS_RECOMMENDED; --- linux-xilinx-6.8.0.orig/arch/x86/kvm/lapic.c +++ linux-xilinx-6.8.0/arch/x86/kvm/lapic.c @@ -41,6 +41,7 @@ #include "ioapic.h" #include "trace.h" #include "x86.h" +#include "xen.h" #include "cpuid.h" #include "hyperv.h" #include "smm.h" @@ -337,10 +338,8 @@ * reversing the LDR calculation to get cluster of APICs, i.e. no * additional work is required. */ - if (apic_x2apic_mode(apic)) { - WARN_ON_ONCE(ldr != kvm_apic_calc_x2apic_ldr(kvm_x2apic_id(apic))); + if (apic_x2apic_mode(apic)) return; - } if (WARN_ON_ONCE(!kvm_apic_map_get_logical_dest(new, ldr, &cluster, &mask))) { @@ -499,8 +498,10 @@ } /* Check if there are APF page ready requests pending */ - if (enabled) + if (enabled) { kvm_make_request(KVM_REQ_APF_READY, apic->vcpu); + kvm_xen_sw_enable_lapic(apic->vcpu); + } } static inline void kvm_apic_set_xapic_id(struct kvm_lapic *apic, u8 id) @@ -749,7 +750,7 @@ * just set SVI. */ if (unlikely(apic->apicv_active)) - static_call_cond(kvm_x86_hwapic_isr_update)(vec); + static_call_cond(kvm_x86_hwapic_isr_update)(apic->vcpu, vec); else { ++apic->isr_count; BUG_ON(apic->isr_count > MAX_APIC_VECTOR); @@ -794,7 +795,7 @@ * and must be left alone. */ if (unlikely(apic->apicv_active)) - static_call_cond(kvm_x86_hwapic_isr_update)(apic_find_highest_isr(apic)); + static_call_cond(kvm_x86_hwapic_isr_update)(apic->vcpu, apic_find_highest_isr(apic)); else { --apic->isr_count; BUG_ON(apic->isr_count < 0); @@ -802,6 +803,17 @@ } } +void kvm_apic_update_hwapic_isr(struct kvm_vcpu *vcpu) +{ + struct kvm_lapic *apic = vcpu->arch.apic; + + if (WARN_ON_ONCE(!lapic_in_kernel(vcpu)) || !apic->apicv_active) + return; + + static_call(kvm_x86_hwapic_isr_update)(vcpu, apic_find_highest_isr(apic)); +} +EXPORT_SYMBOL_GPL(kvm_apic_update_hwapic_isr); + int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu) { /* This may race with setting of irr in __apic_accept_irq() and @@ -2439,6 +2451,43 @@ } EXPORT_SYMBOL_GPL(kvm_lapic_set_eoi); +#define X2APIC_ICR_RESERVED_BITS (GENMASK_ULL(31, 20) | GENMASK_ULL(17, 16) | BIT(13)) + +int kvm_x2apic_icr_write(struct kvm_lapic *apic, u64 data) +{ + if (data & X2APIC_ICR_RESERVED_BITS) + return 1; + + /* + * The BUSY bit is reserved on both Intel and AMD in x2APIC mode, but + * only AMD requires it to be zero, Intel essentially just ignores the + * bit. And if IPI virtualization (Intel) or x2AVIC (AMD) is enabled, + * the CPU performs the reserved bits checks, i.e. the underlying CPU + * behavior will "win". Arbitrarily clear the BUSY bit, as there is no + * sane way to provide consistent behavior with respect to hardware. + */ + data &= ~APIC_ICR_BUSY; + + kvm_apic_send_ipi(apic, (u32)data, (u32)(data >> 32)); + if (kvm_x86_ops.x2apic_icr_is_split) { + kvm_lapic_set_reg(apic, APIC_ICR, data); + kvm_lapic_set_reg(apic, APIC_ICR2, data >> 32); + } else { + kvm_lapic_set_reg64(apic, APIC_ICR, data); + } + trace_kvm_apic_write(APIC_ICR, data); + return 0; +} + +static u64 kvm_x2apic_icr_read(struct kvm_lapic *apic) +{ + if (kvm_x86_ops.x2apic_icr_is_split) + return (u64)kvm_lapic_get_reg(apic, APIC_ICR) | + (u64)kvm_lapic_get_reg(apic, APIC_ICR2) << 32; + + return kvm_lapic_get_reg64(apic, APIC_ICR); +} + /* emulate APIC access in a trap manner */ void kvm_apic_write_nodecode(struct kvm_vcpu *vcpu, u32 offset) { @@ -2456,7 +2505,7 @@ * maybe-unecessary write, and both are in the noise anyways. */ if (apic_x2apic_mode(apic) && offset == APIC_ICR) - kvm_x2apic_icr_write(apic, kvm_lapic_get_reg64(apic, APIC_ICR)); + WARN_ON_ONCE(kvm_x2apic_icr_write(apic, kvm_x2apic_icr_read(apic))); else kvm_lapic_reg_write(apic, offset, kvm_lapic_get_reg(apic, offset)); } @@ -2576,19 +2625,26 @@ { struct kvm_lapic *apic = vcpu->arch.apic; - if (apic->apicv_active) { - /* irr_pending is always true when apicv is activated. */ - apic->irr_pending = true; + /* + * When APICv is enabled, KVM must always search the IRR for a pending + * IRQ, as other vCPUs and devices can set IRR bits even if the vCPU + * isn't running. If APICv is disabled, KVM _should_ search the IRR + * for a pending IRQ. But KVM currently doesn't ensure *all* hardware, + * e.g. CPUs and IOMMUs, has seen the change in state, i.e. searching + * the IRR at this time could race with IRQ delivery from hardware that + * still sees APICv as being enabled. + * + * FIXME: Ensure other vCPUs and devices observe the change in APICv + * state prior to updating KVM's metadata caches, so that KVM + * can safely search the IRR and set irr_pending accordingly. + */ + apic->irr_pending = true; + + if (apic->apicv_active) apic->isr_count = 1; - } else { - /* - * Don't clear irr_pending, searching the IRR can race with - * updates from the CPU as APICv is still active from hardware's - * perspective. The flag will be cleared as appropriate when - * KVM injects the interrupt. - */ + else apic->isr_count = count_vectors(apic->regs + APIC_ISR); - } + apic->highest_isr_cache = -1; } @@ -2726,7 +2782,7 @@ if (apic->apicv_active) { static_call_cond(kvm_x86_apicv_post_state_restore)(vcpu); static_call_cond(kvm_x86_hwapic_irr_update)(vcpu, -1); - static_call_cond(kvm_x86_hwapic_isr_update)(-1); + static_call_cond(kvm_x86_hwapic_isr_update)(vcpu, -1); } vcpu->arch.apic_arb_prio = 0; @@ -2768,7 +2824,8 @@ trig_mode = reg & APIC_LVT_LEVEL_TRIGGER; r = __apic_accept_irq(apic, mode, vector, 1, trig_mode, NULL); - if (r && lvt_type == APIC_LVTPC) + if (r && lvt_type == APIC_LVTPC && + guest_cpuid_is_intel_compatible(apic->vcpu)) kvm_lapic_set_reg(apic, APIC_LVTPC, reg | APIC_LVT_MASKED); return r; } @@ -2929,34 +2986,48 @@ struct kvm_lapic_state *s, bool set) { if (apic_x2apic_mode(vcpu->arch.apic)) { + u32 x2apic_id = kvm_x2apic_id(vcpu->arch.apic); u32 *id = (u32 *)(s->regs + APIC_ID); u32 *ldr = (u32 *)(s->regs + APIC_LDR); u64 icr; if (vcpu->kvm->arch.x2apic_format) { - if (*id != vcpu->vcpu_id) + if (*id != x2apic_id) return -EINVAL; } else { + /* + * Ignore the userspace value when setting APIC state. + * KVM's model is that the x2APIC ID is readonly, e.g. + * KVM only supports delivering interrupts to KVM's + * version of the x2APIC ID. However, for backwards + * compatibility, don't reject attempts to set a + * mismatched ID for userspace that hasn't opted into + * x2apic_format. + */ if (set) - *id >>= 24; + *id = x2apic_id; else - *id <<= 24; + *id = x2apic_id << 24; } /* * In x2APIC mode, the LDR is fixed and based on the id. And - * ICR is internally a single 64-bit register, but needs to be - * split to ICR+ICR2 in userspace for backwards compatibility. + * if the ICR is _not_ split, ICR is internally a single 64-bit + * register, but needs to be split to ICR+ICR2 in userspace for + * backwards compatibility. */ - if (set) { - *ldr = kvm_apic_calc_x2apic_ldr(*id); + if (set) + *ldr = kvm_apic_calc_x2apic_ldr(x2apic_id); - icr = __kvm_lapic_get_reg(s->regs, APIC_ICR) | - (u64)__kvm_lapic_get_reg(s->regs, APIC_ICR2) << 32; - __kvm_lapic_set_reg64(s->regs, APIC_ICR, icr); - } else { - icr = __kvm_lapic_get_reg64(s->regs, APIC_ICR); - __kvm_lapic_set_reg(s->regs, APIC_ICR2, icr >> 32); + if (!kvm_x86_ops.x2apic_icr_is_split) { + if (set) { + icr = __kvm_lapic_get_reg(s->regs, APIC_ICR) | + (u64)__kvm_lapic_get_reg(s->regs, APIC_ICR2) << 32; + __kvm_lapic_set_reg64(s->regs, APIC_ICR, icr); + } else { + icr = __kvm_lapic_get_reg64(s->regs, APIC_ICR); + __kvm_lapic_set_reg(s->regs, APIC_ICR2, icr >> 32); + } } } @@ -3011,7 +3082,7 @@ if (apic->apicv_active) { static_call_cond(kvm_x86_apicv_post_state_restore)(vcpu); static_call_cond(kvm_x86_hwapic_irr_update)(vcpu, apic_find_highest_irr(apic)); - static_call_cond(kvm_x86_hwapic_isr_update)(apic_find_highest_isr(apic)); + static_call_cond(kvm_x86_hwapic_isr_update)(vcpu, apic_find_highest_isr(apic)); } kvm_make_request(KVM_REQ_EVENT, vcpu); if (ioapic_in_kernel(vcpu->kvm)) @@ -3148,22 +3219,12 @@ return 0; } -int kvm_x2apic_icr_write(struct kvm_lapic *apic, u64 data) -{ - data &= ~APIC_ICR_BUSY; - - kvm_apic_send_ipi(apic, (u32)data, (u32)(data >> 32)); - kvm_lapic_set_reg64(apic, APIC_ICR, data); - trace_kvm_apic_write(APIC_ICR, data); - return 0; -} - static int kvm_lapic_msr_read(struct kvm_lapic *apic, u32 reg, u64 *data) { u32 low; if (reg == APIC_ICR) { - *data = kvm_lapic_get_reg64(apic, APIC_ICR); + *data = kvm_x2apic_icr_read(apic); return 0; } --- linux-xilinx-6.8.0.orig/arch/x86/kvm/lapic.h +++ linux-xilinx-6.8.0/arch/x86/kvm/lapic.h @@ -119,11 +119,10 @@ struct kvm_lapic_irq *irq, int *r, struct dest_map *dest_map); void kvm_apic_send_ipi(struct kvm_lapic *apic, u32 icr_low, u32 icr_high); -u64 kvm_get_apic_base(struct kvm_vcpu *vcpu); int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info); int kvm_apic_get_state(struct kvm_vcpu *vcpu, struct kvm_lapic_state *s); int kvm_apic_set_state(struct kvm_vcpu *vcpu, struct kvm_lapic_state *s); -enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu); +void kvm_apic_update_hwapic_isr(struct kvm_vcpu *vcpu); int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu); u64 kvm_get_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu); @@ -273,6 +272,11 @@ return apic_base & (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE); } +static inline enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu) +{ + return kvm_apic_mode(vcpu->arch.apic_base); +} + static inline u8 kvm_xapic_id(struct kvm_lapic *apic) { return kvm_lapic_get_reg(apic, APIC_ID) >> 24; --- linux-xilinx-6.8.0.orig/arch/x86/kvm/mmu/mmu.c +++ linux-xilinx-6.8.0/arch/x86/kvm/mmu/mmu.c @@ -3126,7 +3126,7 @@ if (pud_none(pud) || !pud_present(pud)) goto out; - if (pud_large(pud)) { + if (pud_leaf(pud)) { level = PG_LEVEL_1G; goto out; } @@ -4490,6 +4490,7 @@ static int direct_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) { + kvm_pfn_t orig_pfn; int r; /* Dummy roots are used only for shadowing bad guest roots. */ @@ -4511,6 +4512,8 @@ if (r != RET_PF_CONTINUE) return r; + orig_pfn = fault->pfn; + r = RET_PF_RETRY; write_lock(&vcpu->kvm->mmu_lock); @@ -4525,7 +4528,7 @@ out_unlock: write_unlock(&vcpu->kvm->mmu_lock); - kvm_release_pfn_clean(fault->pfn); + kvm_release_pfn_clean(orig_pfn); return r; } @@ -4574,6 +4577,7 @@ static int kvm_tdp_mmu_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) { + kvm_pfn_t orig_pfn; int r; if (page_fault_handle_page_track(vcpu, fault)) @@ -4591,6 +4595,8 @@ if (r != RET_PF_CONTINUE) return r; + orig_pfn = fault->pfn; + r = RET_PF_RETRY; read_lock(&vcpu->kvm->mmu_lock); @@ -4601,7 +4607,7 @@ out_unlock: read_unlock(&vcpu->kvm->mmu_lock); - kvm_release_pfn_clean(fault->pfn); + kvm_release_pfn_clean(orig_pfn); return r; } #endif @@ -4922,7 +4928,7 @@ context->cpu_role.base.level, is_efer_nx(context), guest_can_use(vcpu, X86_FEATURE_GBPAGES), is_cr4_pse(context), - guest_cpuid_is_amd_or_hygon(vcpu)); + guest_cpuid_is_amd_compatible(vcpu)); } static void __reset_rsvds_bits_mask_ept(struct rsvd_bits_validate *rsvd_check, @@ -5417,7 +5423,7 @@ union kvm_mmu_page_role root_role; /* NPT requires CR0.PG=1. */ - WARN_ON_ONCE(cpu_role.base.direct); + WARN_ON_ONCE(cpu_role.base.direct || !cpu_role.base.guest_mode); root_role = cpu_role.base; root_role.level = kvm_mmu_get_tdp_level(vcpu); @@ -6929,6 +6935,19 @@ kmem_cache_destroy(mmu_page_header_cache); } +static void kvm_wake_nx_recovery_thread(struct kvm *kvm) +{ + /* + * The NX recovery thread is spawned on-demand at the first KVM_RUN and + * may not be valid even though the VM is globally visible. Do nothing, + * as such a VM can't have any possible NX huge pages. + */ + struct vhost_task *nx_thread = READ_ONCE(kvm->arch.nx_huge_page_recovery_thread); + + if (nx_thread) + vhost_task_wake(nx_thread); +} + static int get_nx_huge_pages(char *buffer, const struct kernel_param *kp) { if (nx_hugepage_mitigation_hard_disabled) @@ -6989,7 +7008,7 @@ kvm_mmu_zap_all_fast(kvm); mutex_unlock(&kvm->slots_lock); - wake_up_process(kvm->arch.nx_huge_page_recovery_thread); + kvm_wake_nx_recovery_thread(kvm); } mutex_unlock(&kvm_lock); } @@ -7137,7 +7156,7 @@ mutex_lock(&kvm_lock); list_for_each_entry(kvm, &vm_list, vm_list) - wake_up_process(kvm->arch.nx_huge_page_recovery_thread); + kvm_wake_nx_recovery_thread(kvm); mutex_unlock(&kvm_lock); } @@ -7240,62 +7259,68 @@ srcu_read_unlock(&kvm->srcu, rcu_idx); } -static long get_nx_huge_page_recovery_timeout(u64 start_time) +static void kvm_nx_huge_page_recovery_worker_kill(void *data) +{ +} + +static bool kvm_nx_huge_page_recovery_worker(void *data) { + struct kvm *kvm = data; bool enabled; uint period; + long remaining_time; enabled = calc_nx_huge_pages_recovery_period(&period); + if (!enabled) + return false; - return enabled ? start_time + msecs_to_jiffies(period) - get_jiffies_64() - : MAX_SCHEDULE_TIMEOUT; + remaining_time = kvm->arch.nx_huge_page_last + msecs_to_jiffies(period) + - get_jiffies_64(); + if (remaining_time > 0) { + schedule_timeout(remaining_time); + /* check for signals and come back */ + return true; + } + + __set_current_state(TASK_RUNNING); + kvm_recover_nx_huge_pages(kvm); + kvm->arch.nx_huge_page_last = get_jiffies_64(); + return true; } -static int kvm_nx_huge_page_recovery_worker(struct kvm *kvm, uintptr_t data) +static int kvm_mmu_start_lpage_recovery(struct once *once) { - u64 start_time; - long remaining_time; + struct kvm_arch *ka = container_of(once, struct kvm_arch, nx_once); + struct kvm *kvm = container_of(ka, struct kvm, arch); + struct vhost_task *nx_thread; - while (true) { - start_time = get_jiffies_64(); - remaining_time = get_nx_huge_page_recovery_timeout(start_time); - - set_current_state(TASK_INTERRUPTIBLE); - while (!kthread_should_stop() && remaining_time > 0) { - schedule_timeout(remaining_time); - remaining_time = get_nx_huge_page_recovery_timeout(start_time); - set_current_state(TASK_INTERRUPTIBLE); - } + kvm->arch.nx_huge_page_last = get_jiffies_64(); + nx_thread = vhost_task_create(kvm_nx_huge_page_recovery_worker, + kvm_nx_huge_page_recovery_worker_kill, + kvm, "kvm-nx-lpage-recovery"); - set_current_state(TASK_RUNNING); + if (IS_ERR(nx_thread)) + return PTR_ERR(nx_thread); - if (kthread_should_stop()) - return 0; + vhost_task_start(nx_thread); - kvm_recover_nx_huge_pages(kvm); - } + /* Make the task visible only once it is fully started. */ + WRITE_ONCE(kvm->arch.nx_huge_page_recovery_thread, nx_thread); + return 0; } int kvm_mmu_post_init_vm(struct kvm *kvm) { - int err; - if (nx_hugepage_mitigation_hard_disabled) return 0; - err = kvm_vm_create_worker_thread(kvm, kvm_nx_huge_page_recovery_worker, 0, - "kvm-nx-lpage-recovery", - &kvm->arch.nx_huge_page_recovery_thread); - if (!err) - kthread_unpark(kvm->arch.nx_huge_page_recovery_thread); - - return err; + return call_once(&kvm->arch.nx_once, kvm_mmu_start_lpage_recovery); } void kvm_mmu_pre_destroy_vm(struct kvm *kvm) { if (kvm->arch.nx_huge_page_recovery_thread) - kthread_stop(kvm->arch.nx_huge_page_recovery_thread); + vhost_task_stop(kvm->arch.nx_huge_page_recovery_thread); } #ifdef CONFIG_KVM_GENERIC_MEMORY_ATTRIBUTES @@ -7388,7 +7413,8 @@ * by the memslot, KVM can't use a hugepage due to the * misaligned address regardless of memory attributes. */ - if (gfn >= slot->base_gfn) { + if (gfn >= slot->base_gfn && + gfn + nr_pages <= slot->base_gfn + slot->npages) { if (hugepage_has_attrs(kvm, slot, gfn, level, attrs)) hugepage_clear_mixed(slot, gfn, level); else --- linux-xilinx-6.8.0.orig/arch/x86/kvm/mmu/paging_tmpl.h +++ linux-xilinx-6.8.0/arch/x86/kvm/mmu/paging_tmpl.h @@ -777,6 +777,7 @@ static int FNAME(page_fault)(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) { struct guest_walker walker; + kvm_pfn_t orig_pfn; int r; WARN_ON_ONCE(fault->is_tdp); @@ -835,6 +836,8 @@ walker.pte_access &= ~ACC_EXEC_MASK; } + orig_pfn = fault->pfn; + r = RET_PF_RETRY; write_lock(&vcpu->kvm->mmu_lock); @@ -848,7 +851,7 @@ out_unlock: write_unlock(&vcpu->kvm->mmu_lock); - kvm_release_pfn_clean(fault->pfn); + kvm_release_pfn_clean(orig_pfn); return r; } --- linux-xilinx-6.8.0.orig/arch/x86/kvm/mmu/spte.c +++ linux-xilinx-6.8.0/arch/x86/kvm/mmu/spte.c @@ -206,12 +206,20 @@ spte |= PT_WRITABLE_MASK | shadow_mmu_writable_mask; /* - * Optimization: for pte sync, if spte was writable the hash - * lookup is unnecessary (and expensive). Write protection - * is responsibility of kvm_mmu_get_page / kvm_mmu_sync_roots. - * Same reasoning can be applied to dirty page accounting. + * When overwriting an existing leaf SPTE, and the old SPTE was + * writable, skip trying to unsync shadow pages as any relevant + * shadow pages must already be unsync, i.e. the hash lookup is + * unnecessary (and expensive). + * + * The same reasoning applies to dirty page/folio accounting; + * KVM will mark the folio dirty using the old SPTE, thus + * there's no need to immediately mark the new SPTE as dirty. + * + * Note, both cases rely on KVM not changing PFNs without first + * zapping the old SPTE, which is guaranteed by both the shadow + * MMU and the TDP MMU. */ - if (is_writable_pte(old_spte)) + if (is_last_spte(old_spte, level) && is_writable_pte(old_spte)) goto out; /* --- linux-xilinx-6.8.0.orig/arch/x86/kvm/mmu/tdp_mmu.c +++ linux-xilinx-6.8.0/arch/x86/kvm/mmu/tdp_mmu.c @@ -1498,6 +1498,16 @@ } } +static bool tdp_mmu_need_write_protect(struct kvm_mmu_page *sp) +{ + /* + * All TDP MMU shadow pages share the same role as their root, aside + * from level, so it is valid to key off any shadow page to determine if + * write protection is needed for an entire tree. + */ + return kvm_mmu_page_ad_need_write_protect(sp) || !kvm_ad_enabled(); +} + /* * Clear the dirty status of all the SPTEs mapping GFNs in the memslot. If * AD bits are enabled, this will involve clearing the dirty bit on each SPTE. @@ -1508,7 +1518,8 @@ static bool clear_dirty_gfn_range(struct kvm *kvm, struct kvm_mmu_page *root, gfn_t start, gfn_t end) { - u64 dbit = kvm_ad_enabled() ? shadow_dirty_mask : PT_WRITABLE_MASK; + const u64 dbit = tdp_mmu_need_write_protect(root) ? PT_WRITABLE_MASK : + shadow_dirty_mask; struct tdp_iter iter; bool spte_set = false; @@ -1523,7 +1534,7 @@ if (tdp_mmu_iter_cond_resched(kvm, &iter, false, true)) continue; - KVM_MMU_WARN_ON(kvm_ad_enabled() && + KVM_MMU_WARN_ON(dbit == shadow_dirty_mask && spte_ad_need_write_protect(iter.old_spte)); if (!(iter.old_spte & dbit)) @@ -1570,8 +1581,8 @@ static void clear_dirty_pt_masked(struct kvm *kvm, struct kvm_mmu_page *root, gfn_t gfn, unsigned long mask, bool wrprot) { - u64 dbit = (wrprot || !kvm_ad_enabled()) ? PT_WRITABLE_MASK : - shadow_dirty_mask; + const u64 dbit = (wrprot || tdp_mmu_need_write_protect(root)) ? PT_WRITABLE_MASK : + shadow_dirty_mask; struct tdp_iter iter; lockdep_assert_held_write(&kvm->mmu_lock); @@ -1583,7 +1594,7 @@ if (!mask) break; - KVM_MMU_WARN_ON(kvm_ad_enabled() && + KVM_MMU_WARN_ON(dbit == shadow_dirty_mask && spte_ad_need_write_protect(iter.old_spte)); if (iter.level > PG_LEVEL_4K || --- linux-xilinx-6.8.0.orig/arch/x86/kvm/pmu.c +++ linux-xilinx-6.8.0/arch/x86/kvm/pmu.c @@ -741,6 +741,8 @@ */ void kvm_pmu_refresh(struct kvm_vcpu *vcpu) { + struct kvm_pmu *pmu = vcpu_to_pmu(vcpu); + if (KVM_BUG_ON(kvm_vcpu_has_run(vcpu), vcpu->kvm)) return; @@ -750,8 +752,34 @@ */ kvm_pmu_reset(vcpu); - bitmap_zero(vcpu_to_pmu(vcpu)->all_valid_pmc_idx, X86_PMC_IDX_MAX); + pmu->version = 0; + pmu->nr_arch_gp_counters = 0; + pmu->nr_arch_fixed_counters = 0; + pmu->counter_bitmask[KVM_PMC_GP] = 0; + pmu->counter_bitmask[KVM_PMC_FIXED] = 0; + pmu->reserved_bits = 0xffffffff00200000ull; + pmu->raw_event_mask = X86_RAW_EVENT_MASK; + pmu->global_ctrl_mask = ~0ull; + pmu->global_status_mask = ~0ull; + pmu->fixed_ctr_ctrl_mask = ~0ull; + pmu->pebs_enable_mask = ~0ull; + pmu->pebs_data_cfg_mask = ~0ull; + bitmap_zero(pmu->all_valid_pmc_idx, X86_PMC_IDX_MAX); + + if (!vcpu->kvm->arch.enable_pmu) + return; + static_call(kvm_x86_pmu_refresh)(vcpu); + + /* + * At RESET, both Intel and AMD CPUs set all enable bits for general + * purpose counters in IA32_PERF_GLOBAL_CTRL (so that software that + * was written for v1 PMUs don't unknowingly leave GP counters disabled + * in the global controls). Emulate that behavior when refreshing the + * PMU so that userspace doesn't need to manually set PERF_GLOBAL_CTRL. + */ + if (kvm_pmu_has_perf_global_ctrl(pmu) && pmu->nr_arch_gp_counters) + pmu->global_ctrl = GENMASK_ULL(pmu->nr_arch_gp_counters - 1, 0); } void kvm_pmu_init(struct kvm_vcpu *vcpu) --- linux-xilinx-6.8.0.orig/arch/x86/kvm/reverse_cpuid.h +++ linux-xilinx-6.8.0/arch/x86/kvm/reverse_cpuid.h @@ -52,7 +52,7 @@ #define X86_FEATURE_IPRED_CTRL KVM_X86_FEATURE(CPUID_7_2_EDX, 1) #define KVM_X86_FEATURE_RRSBA_CTRL KVM_X86_FEATURE(CPUID_7_2_EDX, 2) #define X86_FEATURE_DDPD_U KVM_X86_FEATURE(CPUID_7_2_EDX, 3) -#define X86_FEATURE_BHI_CTRL KVM_X86_FEATURE(CPUID_7_2_EDX, 4) +#define KVM_X86_FEATURE_BHI_CTRL KVM_X86_FEATURE(CPUID_7_2_EDX, 4) #define X86_FEATURE_MCDT_NO KVM_X86_FEATURE(CPUID_7_2_EDX, 5) /* CPUID level 0x80000007 (EDX). */ @@ -102,10 +102,12 @@ */ static __always_inline void reverse_cpuid_check(unsigned int x86_leaf) { + BUILD_BUG_ON(NR_CPUID_WORDS != NCAPINTS); BUILD_BUG_ON(x86_leaf == CPUID_LNX_1); BUILD_BUG_ON(x86_leaf == CPUID_LNX_2); BUILD_BUG_ON(x86_leaf == CPUID_LNX_3); BUILD_BUG_ON(x86_leaf == CPUID_LNX_4); + BUILD_BUG_ON(x86_leaf == CPUID_LNX_5); BUILD_BUG_ON(x86_leaf >= ARRAY_SIZE(reverse_cpuid)); BUILD_BUG_ON(reverse_cpuid[x86_leaf].function == 0); } @@ -126,6 +128,7 @@ KVM_X86_TRANSLATE_FEATURE(CONSTANT_TSC); KVM_X86_TRANSLATE_FEATURE(PERFMON_V2); KVM_X86_TRANSLATE_FEATURE(RRSBA_CTRL); + KVM_X86_TRANSLATE_FEATURE(BHI_CTRL); default: return x86_feature; } --- linux-xilinx-6.8.0.orig/arch/x86/kvm/svm/nested.c +++ linux-xilinx-6.8.0/arch/x86/kvm/svm/nested.c @@ -63,8 +63,12 @@ u64 pdpte; int ret; + /* + * Note, nCR3 is "assumed" to be 32-byte aligned, i.e. the CPU ignores + * nCR3[4:0] when loading PDPTEs from memory. + */ ret = kvm_vcpu_read_guest_page(vcpu, gpa_to_gfn(cr3), &pdpte, - offset_in_page(cr3) + index * 8, 8); + (cr3 & GENMASK(11, 5)) + index * 8, 8); if (ret) return 0; return pdpte; @@ -642,6 +646,11 @@ u32 pause_count12; u32 pause_thresh12; + nested_svm_transition_tlb_flush(vcpu); + + /* Enter Guest-Mode */ + enter_guest_mode(vcpu); + /* * Filled at exit: exit_code, exit_code_hi, exit_info_1, exit_info_2, * exit_int_info, exit_int_info_err, next_rip, insn_len, insn_bytes. @@ -758,11 +767,6 @@ } } - nested_svm_transition_tlb_flush(vcpu); - - /* Enter Guest-Mode */ - enter_guest_mode(vcpu); - /* * Merge guest and host intercepts - must be called with vcpu in * guest-mode to take effect. --- linux-xilinx-6.8.0.orig/arch/x86/kvm/svm/sev.c +++ linux-xilinx-6.8.0/arch/x86/kvm/svm/sev.c @@ -84,9 +84,10 @@ }; /* Called with the sev_bitmap_lock held, or on shutdown */ -static int sev_flush_asids(int min_asid, int max_asid) +static int sev_flush_asids(unsigned int min_asid, unsigned int max_asid) { - int ret, asid, error = 0; + int ret, error = 0; + unsigned int asid; /* Check if there are any ASIDs to reclaim before performing a flush */ asid = find_next_bit(sev_reclaim_asid_bitmap, nr_asids, min_asid); @@ -116,7 +117,7 @@ } /* Must be called with the sev_bitmap_lock held */ -static bool __sev_recycle_asids(int min_asid, int max_asid) +static bool __sev_recycle_asids(unsigned int min_asid, unsigned int max_asid) { if (sev_flush_asids(min_asid, max_asid)) return false; @@ -143,8 +144,20 @@ static int sev_asid_new(struct kvm_sev_info *sev) { - int asid, min_asid, max_asid, ret; + /* + * SEV-enabled guests must use asid from min_sev_asid to max_sev_asid. + * SEV-ES-enabled guest can use from 1 to min_sev_asid - 1. + * Note: min ASID can end up larger than the max if basic SEV support is + * effectively disabled by disallowing use of ASIDs for SEV guests. + */ + unsigned int min_asid = sev->es_active ? 1 : min_sev_asid; + unsigned int max_asid = sev->es_active ? min_sev_asid - 1 : max_sev_asid; + unsigned int asid; bool retry = true; + int ret; + + if (min_asid > max_asid) + return -ENOTTY; WARN_ON(sev->misc_cg); sev->misc_cg = get_current_misc_cg(); @@ -157,12 +170,6 @@ mutex_lock(&sev_bitmap_lock); - /* - * SEV-enabled guests must use asid from min_sev_asid to max_sev_asid. - * SEV-ES-enabled guest can use from 1 to min_sev_asid - 1. - */ - min_asid = sev->es_active ? 1 : min_sev_asid; - max_asid = sev->es_active ? min_sev_asid - 1 : max_sev_asid; again: asid = find_next_zero_bit(sev_asid_bitmap, max_asid + 1, min_asid); if (asid > max_asid) { @@ -187,7 +194,7 @@ return ret; } -static int sev_get_asid(struct kvm *kvm) +static unsigned int sev_get_asid(struct kvm *kvm) { struct kvm_sev_info *sev = &to_kvm_svm(kvm)->sev_info; @@ -284,8 +291,8 @@ static int sev_bind_asid(struct kvm *kvm, unsigned int handle, int *error) { + unsigned int asid = sev_get_asid(kvm); struct sev_data_activate activate; - int asid = sev_get_asid(kvm); int ret; /* activate ASID on the given handle */ @@ -657,6 +664,14 @@ return ret; vcpu->arch.guest_state_protected = true; + + /* + * SEV-ES guest mandates LBR Virtualization to be _always_ ON. Enable it + * only after setting guest_state_protected because KVM_SET_MSRS allows + * dynamic toggling of LBRV (for performance reason) on write access to + * MSR_IA32_DEBUGCTLMSR when guest_state_protected is not set. + */ + svm_enable_lbrv(vcpu); return 0; } @@ -2237,8 +2252,10 @@ goto out; } - sev_asid_count = max_sev_asid - min_sev_asid + 1; - WARN_ON_ONCE(misc_cg_set_capacity(MISC_CG_RES_SEV, sev_asid_count)); + if (min_sev_asid <= max_sev_asid) { + sev_asid_count = max_sev_asid - min_sev_asid + 1; + WARN_ON_ONCE(misc_cg_set_capacity(MISC_CG_RES_SEV, sev_asid_count)); + } sev_supported = true; /* SEV-ES support requested? */ @@ -2258,6 +2275,12 @@ if (!boot_cpu_has(X86_FEATURE_SEV_ES)) goto out; + if (!lbrv) { + WARN_ONCE(!boot_cpu_has(X86_FEATURE_LBRV), + "LBRV must be present for SEV-ES support"); + goto out; + } + /* Has the system been allocated ASIDs for SEV-ES? */ if (min_sev_asid == 1) goto out; @@ -2269,7 +2292,9 @@ out: if (boot_cpu_has(X86_FEATURE_SEV)) pr_info("SEV %s (ASIDs %u - %u)\n", - sev_supported ? "enabled" : "disabled", + sev_supported ? min_sev_asid <= max_sev_asid ? "enabled" : + "unusable" : + "disabled", min_sev_asid, max_sev_asid); if (boot_cpu_has(X86_FEATURE_SEV_ES)) pr_info("SEV-ES %s (ASIDs %u - %u)\n", @@ -2317,7 +2342,7 @@ */ static void sev_flush_encrypted_page(struct kvm_vcpu *vcpu, void *va) { - int asid = to_kvm_svm(vcpu->kvm)->sev_info.asid; + unsigned int asid = sev_get_asid(vcpu->kvm); /* * Note! The address must be a kernel address, as regular page walk @@ -2635,7 +2660,7 @@ void pre_sev_run(struct vcpu_svm *svm, int cpu) { struct svm_cpu_data *sd = per_cpu_ptr(&svm_data, cpu); - int asid = sev_get_asid(svm->vcpu.kvm); + unsigned int asid = sev_get_asid(svm->vcpu.kvm); /* Assign the asid allocated with this SEV guest */ svm->asid = asid; @@ -3021,7 +3046,6 @@ struct kvm_vcpu *vcpu = &svm->vcpu; svm->vmcb->control.nested_ctl |= SVM_NESTED_CTL_SEV_ES_ENABLE; - svm->vmcb->control.virt_ext |= LBR_CTL_ENABLE_MASK; /* * An SEV-ES guest requires a VMSA area that is a separate from the @@ -3073,10 +3097,6 @@ /* Clear intercepts on selected MSRs */ set_msr_interception(vcpu, svm->msrpm, MSR_EFER, 1, 1); set_msr_interception(vcpu, svm->msrpm, MSR_IA32_CR_PAT, 1, 1); - set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTBRANCHFROMIP, 1, 1); - set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTBRANCHTOIP, 1, 1); - set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTINTFROMIP, 1, 1); - set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTINTTOIP, 1, 1); } void sev_init_vmcb(struct vcpu_svm *svm) --- linux-xilinx-6.8.0.orig/arch/x86/kvm/svm/svm.c +++ linux-xilinx-6.8.0/arch/x86/kvm/svm/svm.c @@ -99,6 +99,7 @@ { .index = MSR_IA32_SPEC_CTRL, .always = false }, { .index = MSR_IA32_PRED_CMD, .always = false }, { .index = MSR_IA32_FLUSH_CMD, .always = false }, + { .index = MSR_IA32_DEBUGCTLMSR, .always = false }, { .index = MSR_IA32_LASTBRANCHFROMIP, .always = false }, { .index = MSR_IA32_LASTBRANCHTOIP, .always = false }, { .index = MSR_IA32_LASTINTFROMIP, .always = false }, @@ -215,7 +216,7 @@ module_param(vgif, int, 0444); /* enable/disable LBR virtualization */ -static int lbrv = true; +int lbrv = true; module_param(lbrv, int, 0444); static int tsc_scaling = true; @@ -990,7 +991,7 @@ vmcb_mark_dirty(to_vmcb, VMCB_LBR); } -static void svm_enable_lbrv(struct kvm_vcpu *vcpu) +void svm_enable_lbrv(struct kvm_vcpu *vcpu) { struct vcpu_svm *svm = to_svm(vcpu); @@ -1000,6 +1001,9 @@ set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTINTFROMIP, 1, 1); set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTINTTOIP, 1, 1); + if (sev_es_guest(vcpu->kvm)) + set_msr_interception(vcpu, svm->msrpm, MSR_IA32_DEBUGCTLMSR, 1, 1); + /* Move the LBR msrs to the vmcb02 so that the guest can see them. */ if (is_guest_mode(vcpu)) svm_copy_lbrs(svm->vmcb, svm->vmcb01.ptr); @@ -1009,6 +1013,8 @@ { struct vcpu_svm *svm = to_svm(vcpu); + KVM_BUG_ON(sev_es_guest(vcpu->kvm), vcpu->kvm); + svm->vmcb->control.virt_ext &= ~LBR_CTL_ENABLE_MASK; set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTBRANCHFROMIP, 0, 0); set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTBRANCHTOIP, 0, 0); @@ -1990,11 +1996,11 @@ svm->asid = sd->next_asid++; } -static void svm_set_dr6(struct vcpu_svm *svm, unsigned long value) +static void svm_set_dr6(struct kvm_vcpu *vcpu, unsigned long value) { - struct vmcb *vmcb = svm->vmcb; + struct vmcb *vmcb = to_svm(vcpu)->vmcb; - if (svm->vcpu.arch.guest_state_protected) + if (vcpu->arch.guest_state_protected) return; if (unlikely(value != vmcb->save.dr6)) { @@ -2844,6 +2850,12 @@ case MSR_CSTAR: msr_info->data = svm->vmcb01.ptr->save.cstar; break; + case MSR_GS_BASE: + msr_info->data = svm->vmcb01.ptr->save.gs.base; + break; + case MSR_FS_BASE: + msr_info->data = svm->vmcb01.ptr->save.fs.base; + break; case MSR_KERNEL_GS_BASE: msr_info->data = svm->vmcb01.ptr->save.kernel_gs_base; break; @@ -3065,6 +3077,12 @@ case MSR_CSTAR: svm->vmcb01.ptr->save.cstar = data; break; + case MSR_GS_BASE: + svm->vmcb01.ptr->save.gs.base = data; + break; + case MSR_FS_BASE: + svm->vmcb01.ptr->save.fs.base = data; + break; case MSR_KERNEL_GS_BASE: svm->vmcb01.ptr->save.kernel_gs_base = data; break; @@ -3845,16 +3863,27 @@ struct vcpu_svm *svm = to_svm(vcpu); /* - * KVM should never request an NMI window when vNMI is enabled, as KVM - * allows at most one to-be-injected NMI and one pending NMI, i.e. if - * two NMIs arrive simultaneously, KVM will inject one and set - * V_NMI_PENDING for the other. WARN, but continue with the standard - * single-step approach to try and salvage the pending NMI. + * If NMIs are outright masked, i.e. the vCPU is already handling an + * NMI, and KVM has not yet intercepted an IRET, then there is nothing + * more to do at this time as KVM has already enabled IRET intercepts. + * If KVM has already intercepted IRET, then single-step over the IRET, + * as NMIs aren't architecturally unmasked until the IRET completes. + * + * If vNMI is enabled, KVM should never request an NMI window if NMIs + * are masked, as KVM allows at most one to-be-injected NMI and one + * pending NMI. If two NMIs arrive simultaneously, KVM will inject one + * NMI and set V_NMI_PENDING for the other, but if and only if NMIs are + * unmasked. KVM _will_ request an NMI window in some situations, e.g. + * if the vCPU is in an STI shadow or if GIF=0, KVM can't immediately + * inject the NMI. In those situations, KVM needs to single-step over + * the STI shadow or intercept STGI. */ - WARN_ON_ONCE(is_vnmi_enabled(svm)); + if (svm_get_nmi_mask(vcpu)) { + WARN_ON_ONCE(is_vnmi_enabled(svm)); - if (svm_get_nmi_mask(vcpu) && !svm->awaiting_iret_completion) - return; /* IRET will cause a vm exit */ + if (!svm->awaiting_iret_completion) + return; /* IRET will cause a vm exit */ + } /* * SEV-ES guests are responsible for signaling when a vCPU is ready to @@ -4158,10 +4187,8 @@ * Run with all-zero DR6 unless needed, so that we can get the exact cause * of a #DB. */ - if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) - svm_set_dr6(svm, vcpu->arch.dr6); - else - svm_set_dr6(svm, DR6_ACTIVE_LOW); + if (likely(!(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT))) + svm_set_dr6(vcpu, DR6_ACTIVE_LOW); clgi(); kvm_load_guest_xsave_state(vcpu); @@ -4943,6 +4970,7 @@ .set_idt = svm_set_idt, .get_gdt = svm_get_gdt, .set_gdt = svm_set_gdt, + .set_dr6 = svm_set_dr6, .set_dr7 = svm_set_dr7, .sync_dirty_debug_regs = svm_sync_dirty_debug_regs, .cache_reg = svm_cache_reg, @@ -4976,6 +5004,8 @@ .enable_nmi_window = svm_enable_nmi_window, .enable_irq_window = svm_enable_irq_window, .update_cr8_intercept = svm_update_cr8_intercept, + + .x2apic_icr_is_split = true, .set_virtual_apic_mode = avic_refresh_virtual_apic_mode, .refresh_apicv_exec_ctrl = avic_refresh_apicv_exec_ctrl, .apicv_post_state_restore = avic_apicv_post_state_restore, @@ -5147,6 +5177,9 @@ /* CPUID 0x8000001F (SME/SEV features) */ sev_set_cpu_caps(); + + /* Don't advertise Bus Lock Detect to guest if SVM support is absent */ + kvm_cpu_cap_clear(X86_FEATURE_BUS_LOCK_DETECT); } static __init int svm_hardware_setup(void) @@ -5236,6 +5269,12 @@ nrips = nrips && boot_cpu_has(X86_FEATURE_NRIPS); + if (lbrv) { + if (!boot_cpu_has(X86_FEATURE_LBRV)) + lbrv = false; + else + pr_info("LBR virtualization supported\n"); + } /* * Note, SEV setup consumes npt_enabled and enable_mmio_caching (which * may be modified by svm_adjust_mmio_mask()), as well as nrips. @@ -5289,14 +5328,6 @@ svm_x86_ops.set_vnmi_pending = NULL; } - - if (lbrv) { - if (!boot_cpu_has(X86_FEATURE_LBRV)) - lbrv = false; - else - pr_info("LBR virtualization supported\n"); - } - if (!enable_pmu) pr_info("PMU virtualization is disabled\n"); --- linux-xilinx-6.8.0.orig/arch/x86/kvm/svm/svm.h +++ linux-xilinx-6.8.0/arch/x86/kvm/svm/svm.h @@ -30,7 +30,7 @@ #define IOPM_SIZE PAGE_SIZE * 3 #define MSRPM_SIZE PAGE_SIZE * 2 -#define MAX_DIRECT_ACCESS_MSRS 47 +#define MAX_DIRECT_ACCESS_MSRS 48 #define MSRPM_OFFSETS 32 extern u32 msrpm_offsets[MSRPM_OFFSETS] __read_mostly; extern bool npt_enabled; @@ -39,6 +39,7 @@ extern bool intercept_smi; extern bool x2avic_enabled; extern bool vnmi; +extern int lbrv; /* * Clean bits in VMCB. @@ -543,6 +544,7 @@ void svm_vcpu_init_msrpm(struct kvm_vcpu *vcpu, u32 *msrpm); void svm_vcpu_free_msrpm(u32 *msrpm); void svm_copy_lbrs(struct vmcb *to_vmcb, struct vmcb *from_vmcb); +void svm_enable_lbrv(struct kvm_vcpu *vcpu); void svm_update_lbrv(struct kvm_vcpu *vcpu); int svm_set_efer(struct kvm_vcpu *vcpu, u64 efer); --- linux-xilinx-6.8.0.orig/arch/x86/kvm/trace.h +++ linux-xilinx-6.8.0/arch/x86/kvm/trace.h @@ -732,13 +732,13 @@ * Tracepoint for nested #vmexit because of interrupt pending */ TRACE_EVENT(kvm_invlpga, - TP_PROTO(__u64 rip, int asid, u64 address), + TP_PROTO(__u64 rip, unsigned int asid, u64 address), TP_ARGS(rip, asid, address), TP_STRUCT__entry( - __field( __u64, rip ) - __field( int, asid ) - __field( __u64, address ) + __field( __u64, rip ) + __field( unsigned int, asid ) + __field( __u64, address ) ), TP_fast_assign( @@ -747,7 +747,7 @@ __entry->address = address; ), - TP_printk("rip: 0x%016llx asid: %d address: 0x%016llx", + TP_printk("rip: 0x%016llx asid: %u address: 0x%016llx", __entry->rip, __entry->asid, __entry->address) ); --- linux-xilinx-6.8.0.orig/arch/x86/kvm/vmx/nested.c +++ linux-xilinx-6.8.0/arch/x86/kvm/vmx/nested.c @@ -12,6 +12,7 @@ #include "mmu.h" #include "nested.h" #include "pmu.h" +#include "posted_intr.h" #include "sgx.h" #include "trace.h" #include "vmx.h" @@ -1174,11 +1175,14 @@ kvm_hv_nested_transtion_tlb_flush(vcpu, enable_ept); /* - * If vmcs12 doesn't use VPID, L1 expects linear and combined mappings - * for *all* contexts to be flushed on VM-Enter/VM-Exit, i.e. it's a - * full TLB flush from the guest's perspective. This is required even - * if VPID is disabled in the host as KVM may need to synchronize the - * MMU in response to the guest TLB flush. + * If VPID is disabled, then guest TLB accesses use VPID=0, i.e. the + * same VPID as the host, and so architecturally, linear and combined + * mappings for VPID=0 must be flushed at VM-Enter and VM-Exit. KVM + * emulates L2 sharing L1's VPID=0 by using vpid01 while running L2, + * and so KVM must also emulate TLB flush of VPID=0, i.e. vpid01. This + * is required if VPID is disabled in KVM, as a TLB flush (there are no + * VPIDs) still occurs from L1's perspective, and KVM may need to + * synchronize the MMU in response to the guest TLB flush. * * Note, using TLB_FLUSH_GUEST is correct even if nested EPT is in use. * EPT is a special snowflake, as guest-physical mappings aren't @@ -2265,6 +2269,17 @@ vmcs_write64(VMCS_LINK_POINTER, INVALID_GPA); + /* + * If VPID is disabled, then guest TLB accesses use VPID=0, i.e. the + * same VPID as the host. Emulate this behavior by using vpid01 for L2 + * if VPID is disabled in vmcs12. Note, if VPID is disabled, VM-Enter + * and VM-Exit are architecturally required to flush VPID=0, but *only* + * VPID=0. I.e. using vpid02 would be ok (so long as KVM emulates the + * required flushes), but doing so would cause KVM to over-flush. E.g. + * if L1 runs L2 X with VPID12=1, then runs L2 Y with VPID12 disabled, + * and then runs L2 X again, then KVM can and should retain TLB entries + * for VPID12=1. + */ if (enable_vpid) { if (nested_cpu_has_vpid(vmcs12) && vmx->nested.vpid02) vmcs_write16(VIRTUAL_PROCESSOR_ID, vmx->nested.vpid02); @@ -3874,8 +3889,8 @@ if (!pi_test_and_clear_on(vmx->nested.pi_desc)) return 0; - max_irr = find_last_bit((unsigned long *)vmx->nested.pi_desc->pir, 256); - if (max_irr != 256) { + max_irr = pi_find_highest_vector(vmx->nested.pi_desc); + if (max_irr > 0) { vapic_page = vmx->nested.virtual_apic_map.hva; if (!vapic_page) goto mmio_needed; @@ -4006,10 +4021,42 @@ to_vmx(vcpu)->nested.preemption_timer_expired; } -static bool vmx_has_nested_events(struct kvm_vcpu *vcpu) +static bool vmx_has_nested_events(struct kvm_vcpu *vcpu, bool for_injection) { - return nested_vmx_preemption_timer_pending(vcpu) || - to_vmx(vcpu)->nested.mtf_pending; + struct vcpu_vmx *vmx = to_vmx(vcpu); + void *vapic = vmx->nested.virtual_apic_map.hva; + int max_irr, vppr; + + if (nested_vmx_preemption_timer_pending(vcpu) || + vmx->nested.mtf_pending) + return true; + + /* + * Virtual Interrupt Delivery doesn't require manual injection. Either + * the interrupt is already in GUEST_RVI and will be recognized by CPU + * at VM-Entry, or there is a KVM_REQ_EVENT pending and KVM will move + * the interrupt from the PIR to RVI prior to entering the guest. + */ + if (for_injection) + return false; + + if (!nested_cpu_has_vid(get_vmcs12(vcpu)) || + __vmx_interrupt_blocked(vcpu)) + return false; + + if (!vapic) + return false; + + vppr = *((u32 *)(vapic + APIC_PROCPRI)); + + if (vmx->nested.pi_pending && vmx->nested.pi_desc && + pi_test_on(vmx->nested.pi_desc)) { + max_irr = pi_find_highest_vector(vmx->nested.pi_desc); + if (max_irr > 0 && (max_irr & 0xf0) > (vppr & 0xf0)) + return true; + } + + return false; } /* @@ -4899,6 +4946,11 @@ kvm_make_request(KVM_REQ_APICV_UPDATE, vcpu); } + if (vmx->nested.update_vmcs01_hwapic_isr) { + vmx->nested.update_vmcs01_hwapic_isr = false; + kvm_apic_update_hwapic_isr(vcpu); + } + if ((vm_exit_reason != -1) && (enable_shadow_vmcs || nested_vmx_is_evmptr12_valid(vmx))) vmx->nested.need_vmcs12_to_shadow_sync = true; @@ -5828,6 +5880,12 @@ return nested_vmx_fail(vcpu, VMXERR_INVALID_OPERAND_TO_INVEPT_INVVPID); + /* + * Always flush the effective vpid02, i.e. never flush the current VPID + * and never explicitly flush vpid01. INVVPID targets a VPID, not a + * VMCS, and so whether or not the current vmcs12 has VPID enabled is + * irrelevant (and there may not be a loaded vmcs12). + */ vpid02 = nested_get_vpid02(vcpu); switch (type) { case VMX_VPID_EXTENT_INDIVIDUAL_ADDR: --- linux-xilinx-6.8.0.orig/arch/x86/kvm/vmx/pmu_intel.c +++ linux-xilinx-6.8.0/arch/x86/kvm/vmx/pmu_intel.c @@ -491,19 +491,6 @@ u64 counter_mask; int i; - pmu->nr_arch_gp_counters = 0; - pmu->nr_arch_fixed_counters = 0; - pmu->counter_bitmask[KVM_PMC_GP] = 0; - pmu->counter_bitmask[KVM_PMC_FIXED] = 0; - pmu->version = 0; - pmu->reserved_bits = 0xffffffff00200000ull; - pmu->raw_event_mask = X86_RAW_EVENT_MASK; - pmu->global_ctrl_mask = ~0ull; - pmu->global_status_mask = ~0ull; - pmu->fixed_ctr_ctrl_mask = ~0ull; - pmu->pebs_enable_mask = ~0ull; - pmu->pebs_data_cfg_mask = ~0ull; - memset(&lbr_desc->records, 0, sizeof(lbr_desc->records)); /* @@ -515,8 +502,9 @@ return; entry = kvm_find_cpuid_entry(vcpu, 0xa); - if (!entry || !vcpu->kvm->arch.enable_pmu) + if (!entry) return; + eax.full = entry->eax; edx.full = entry->edx; --- linux-xilinx-6.8.0.orig/arch/x86/kvm/vmx/posted_intr.h +++ linux-xilinx-6.8.0/arch/x86/kvm/vmx/posted_intr.h @@ -2,97 +2,8 @@ #ifndef __KVM_X86_VMX_POSTED_INTR_H #define __KVM_X86_VMX_POSTED_INTR_H -#define POSTED_INTR_ON 0 -#define POSTED_INTR_SN 1 - -#define PID_TABLE_ENTRY_VALID 1 - -/* Posted-Interrupt Descriptor */ -struct pi_desc { - u32 pir[8]; /* Posted interrupt requested */ - union { - struct { - /* bit 256 - Outstanding Notification */ - u16 on : 1, - /* bit 257 - Suppress Notification */ - sn : 1, - /* bit 271:258 - Reserved */ - rsvd_1 : 14; - /* bit 279:272 - Notification Vector */ - u8 nv; - /* bit 287:280 - Reserved */ - u8 rsvd_2; - /* bit 319:288 - Notification Destination */ - u32 ndst; - }; - u64 control; - }; - u32 rsvd[6]; -} __aligned(64); - -static inline bool pi_test_and_set_on(struct pi_desc *pi_desc) -{ - return test_and_set_bit(POSTED_INTR_ON, - (unsigned long *)&pi_desc->control); -} - -static inline bool pi_test_and_clear_on(struct pi_desc *pi_desc) -{ - return test_and_clear_bit(POSTED_INTR_ON, - (unsigned long *)&pi_desc->control); -} - -static inline bool pi_test_and_clear_sn(struct pi_desc *pi_desc) -{ - return test_and_clear_bit(POSTED_INTR_SN, - (unsigned long *)&pi_desc->control); -} - -static inline bool pi_test_and_set_pir(int vector, struct pi_desc *pi_desc) -{ - return test_and_set_bit(vector, (unsigned long *)pi_desc->pir); -} - -static inline bool pi_is_pir_empty(struct pi_desc *pi_desc) -{ - return bitmap_empty((unsigned long *)pi_desc->pir, NR_VECTORS); -} - -static inline void pi_set_sn(struct pi_desc *pi_desc) -{ - set_bit(POSTED_INTR_SN, - (unsigned long *)&pi_desc->control); -} - -static inline void pi_set_on(struct pi_desc *pi_desc) -{ - set_bit(POSTED_INTR_ON, - (unsigned long *)&pi_desc->control); -} - -static inline void pi_clear_on(struct pi_desc *pi_desc) -{ - clear_bit(POSTED_INTR_ON, - (unsigned long *)&pi_desc->control); -} - -static inline void pi_clear_sn(struct pi_desc *pi_desc) -{ - clear_bit(POSTED_INTR_SN, - (unsigned long *)&pi_desc->control); -} - -static inline bool pi_test_on(struct pi_desc *pi_desc) -{ - return test_bit(POSTED_INTR_ON, - (unsigned long *)&pi_desc->control); -} - -static inline bool pi_test_sn(struct pi_desc *pi_desc) -{ - return test_bit(POSTED_INTR_SN, - (unsigned long *)&pi_desc->control); -} +#include +#include void vmx_vcpu_pi_load(struct kvm_vcpu *vcpu, int cpu); void vmx_vcpu_pi_put(struct kvm_vcpu *vcpu); @@ -103,4 +14,12 @@ uint32_t guest_irq, bool set); void vmx_pi_start_assignment(struct kvm *kvm); +static inline int pi_find_highest_vector(struct pi_desc *pi_desc) +{ + int vec; + + vec = find_last_bit((unsigned long *)pi_desc->pir, 256); + return vec < 256 ? vec : -1; +} + #endif /* __KVM_X86_VMX_POSTED_INTR_H */ --- linux-xilinx-6.8.0.orig/arch/x86/kvm/vmx/vmenter.S +++ linux-xilinx-6.8.0/arch/x86/kvm/vmx/vmenter.S @@ -275,6 +275,8 @@ call vmx_spec_ctrl_restore_host + CLEAR_BRANCH_HISTORY_VMEXIT + /* Put return value in AX */ mov %_ASM_BX, %_ASM_AX --- linux-xilinx-6.8.0.orig/arch/x86/kvm/vmx/vmx.c +++ linux-xilinx-6.8.0/arch/x86/kvm/vmx/vmx.c @@ -67,6 +67,7 @@ #include "x86.h" #include "smm.h" #include "vmx_onhyperv.h" +#include "posted_intr.h" MODULE_AUTHOR("Qumranet"); MODULE_LICENSE("GPL"); @@ -211,9 +212,11 @@ static unsigned int ple_window_max = KVM_VMX_DEFAULT_PLE_WINDOW_MAX; module_param(ple_window_max, uint, 0444); -/* Default is SYSTEM mode, 1 for host-guest mode */ +/* Default is SYSTEM mode, 1 for host-guest mode (which is BROKEN) */ int __read_mostly pt_mode = PT_MODE_SYSTEM; +#ifdef CONFIG_BROKEN module_param(pt_mode, int, S_IRUGO); +#endif static DEFINE_STATIC_KEY_FALSE(vmx_l1d_should_flush); static DEFINE_STATIC_KEY_FALSE(vmx_l1d_flush_cond); @@ -2518,30 +2521,6 @@ return cpuid_eax(0) >= 0x12 && (cpuid_eax(0x12) & BIT(0)); } -/* - * Some cpus support VM_{ENTRY,EXIT}_IA32_PERF_GLOBAL_CTRL but they - * can't be used due to errata where VM Exit may incorrectly clear - * IA32_PERF_GLOBAL_CTRL[34:32]. Work around the errata by using the - * MSR load mechanism to switch IA32_PERF_GLOBAL_CTRL. - */ -static bool cpu_has_perf_global_ctrl_bug(void) -{ - if (boot_cpu_data.x86 == 0x6) { - switch (boot_cpu_data.x86_model) { - case INTEL_FAM6_NEHALEM_EP: /* AAK155 */ - case INTEL_FAM6_NEHALEM: /* AAP115 */ - case INTEL_FAM6_WESTMERE: /* AAT100 */ - case INTEL_FAM6_WESTMERE_EP: /* BC86,AAY89,BD102 */ - case INTEL_FAM6_NEHALEM_EX: /* BA97 */ - return true; - default: - break; - } - } - - return false; -} - static int adjust_vmx_controls(u32 ctl_min, u32 ctl_opt, u32 msr, u32 *result) { u32 vmx_msr_low, vmx_msr_high; @@ -2697,6 +2676,27 @@ _vmexit_control &= ~x_ctrl; } + /* + * Some cpus support VM_{ENTRY,EXIT}_IA32_PERF_GLOBAL_CTRL but they + * can't be used due to an errata where VM Exit may incorrectly clear + * IA32_PERF_GLOBAL_CTRL[34:32]. Workaround the errata by using the + * MSR load mechanism to switch IA32_PERF_GLOBAL_CTRL. + */ + switch (boot_cpu_data.x86_vfm) { + case INTEL_NEHALEM_EP: /* AAK155 */ + case INTEL_NEHALEM: /* AAP115 */ + case INTEL_WESTMERE: /* AAT100 */ + case INTEL_WESTMERE_EP: /* BC86,AAY89,BD102 */ + case INTEL_NEHALEM_EX: /* BA97 */ + _vmentry_control &= ~VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL; + _vmexit_control &= ~VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL; + pr_warn_once("VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL " + "does not work properly. Using workaround\n"); + break; + default: + break; + } + rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high); /* IA-32 SDM Vol 3B: VMCS size is never greater than 4kB. */ @@ -3186,7 +3186,7 @@ static inline int vmx_get_current_vpid(struct kvm_vcpu *vcpu) { - if (is_guest_mode(vcpu)) + if (is_guest_mode(vcpu) && nested_cpu_has_vpid(get_vmcs12(vcpu))) return nested_get_vpid02(vcpu); return to_vmx(vcpu)->vpid; } @@ -4406,9 +4406,6 @@ VM_ENTRY_LOAD_IA32_EFER | VM_ENTRY_IA32E_MODE); - if (cpu_has_perf_global_ctrl_bug()) - vmentry_ctrl &= ~VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL; - return vmentry_ctrl; } @@ -4426,10 +4423,6 @@ if (vmx_pt_mode_is_system()) vmexit_ctrl &= ~(VM_EXIT_PT_CONCEAL_PIP | VM_EXIT_CLEAR_IA32_RTIT_CTL); - - if (cpu_has_perf_global_ctrl_bug()) - vmexit_ctrl &= ~VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL; - /* Loading of EFER and PERF_GLOBAL_CTRL are toggled dynamically */ return vmexit_ctrl & ~(VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL | VM_EXIT_LOAD_IA32_EFER); @@ -5047,14 +5040,19 @@ return !vmx_nmi_blocked(vcpu); } +bool __vmx_interrupt_blocked(struct kvm_vcpu *vcpu) +{ + return !(vmx_get_rflags(vcpu) & X86_EFLAGS_IF) || + (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & + (GUEST_INTR_STATE_STI | GUEST_INTR_STATE_MOV_SS)); +} + bool vmx_interrupt_blocked(struct kvm_vcpu *vcpu) { if (is_guest_mode(vcpu) && nested_exit_on_intr(vcpu)) return false; - return !(vmx_get_rflags(vcpu) & X86_EFLAGS_IF) || - (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & - (GUEST_INTR_STATE_STI | GUEST_INTR_STATE_MOV_SS)); + return __vmx_interrupt_blocked(vcpu); } static int vmx_interrupt_allowed(struct kvm_vcpu *vcpu, bool for_injection) @@ -5607,6 +5605,12 @@ set_debugreg(DR6_RESERVED, 6); } +static void vmx_set_dr6(struct kvm_vcpu *vcpu, unsigned long val) +{ + lockdep_assert_irqs_disabled(); + set_debugreg(vcpu->arch.dr6, 6); +} + static void vmx_set_dr7(struct kvm_vcpu *vcpu, unsigned long val) { vmcs_writel(GUEST_DR7, val); @@ -6814,11 +6818,32 @@ kvm_release_pfn_clean(pfn); } -static void vmx_hwapic_isr_update(int max_isr) +static void vmx_hwapic_isr_update(struct kvm_vcpu *vcpu, int max_isr) { u16 status; u8 old; + /* + * If L2 is active, defer the SVI update until vmcs01 is loaded, as SVI + * is only relevant for if and only if Virtual Interrupt Delivery is + * enabled in vmcs12, and if VID is enabled then L2 EOIs affect L2's + * vAPIC, not L1's vAPIC. KVM must update vmcs01 on the next nested + * VM-Exit, otherwise L1 with run with a stale SVI. + */ + if (is_guest_mode(vcpu)) { + /* + * KVM is supposed to forward intercepted L2 EOIs to L1 if VID + * is enabled in vmcs12; as above, the EOIs affect L2's vAPIC. + * Note, userspace can stuff state while L2 is active; assert + * that VID is disabled if and only if the vCPU is in KVM_RUN + * to avoid false positives if userspace is setting APIC state. + */ + WARN_ON_ONCE(vcpu->wants_to_run && + nested_cpu_has_vid(get_vmcs12(vcpu))); + to_vmx(vcpu)->nested.update_vmcs01_hwapic_isr = true; + return; + } + if (max_isr == -1) max_isr = 0; @@ -7345,10 +7370,6 @@ vmx->loaded_vmcs->host_state.cr4 = cr4; } - /* When KVM_DEBUGREG_WONT_EXIT, dr6 is accessible in guest. */ - if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) - set_debugreg(vcpu->arch.dr6, 6); - /* When single-stepping over STI and MOV SS, we must clear the * corresponding interruptibility bits in the guest state. Otherwise * vmentry fails as it then expects bit 14 (BS) in pending debug @@ -7857,8 +7878,28 @@ if (vmx_pebs_supported()) { perf_cap |= host_perf_cap & PERF_CAP_PEBS_MASK; - if ((perf_cap & PERF_CAP_PEBS_FORMAT) < 4) - perf_cap &= ~PERF_CAP_PEBS_BASELINE; + + /* + * Disallow adaptive PEBS as it is functionally broken, can be + * used by the guest to read *host* LBRs, and can be used to + * bypass userspace event filters. To correctly and safely + * support adaptive PEBS, KVM needs to: + * + * 1. Account for the ADAPTIVE flag when (re)programming fixed + * counters. + * + * 2. Gain support from perf (or take direct control of counter + * programming) to support events without adaptive PEBS + * enabled for the hardware counter. + * + * 3. Ensure LBR MSRs cannot hold host data on VM-Entry with + * adaptive PEBS enabled and MSR_PEBS_DATA_CFG.LBRS=1. + * + * 4. Document which PMU events are effectively exposed to the + * guest via adaptive PEBS, and make adaptive PEBS mutually + * exclusive with KVM_SET_PMU_EVENT_FILTER if necessary. + */ + perf_cap &= ~PERF_CAP_PEBS_BASELINE; } return perf_cap; @@ -8306,6 +8347,7 @@ .set_idt = vmx_set_idt, .get_gdt = vmx_get_gdt, .set_gdt = vmx_set_gdt, + .set_dr6 = vmx_set_dr6, .set_dr7 = vmx_set_dr7, .sync_dirty_debug_regs = vmx_sync_dirty_debug_regs, .cache_reg = vmx_cache_reg, @@ -8337,6 +8379,8 @@ .enable_nmi_window = vmx_enable_nmi_window, .enable_irq_window = vmx_enable_irq_window, .update_cr8_intercept = vmx_update_cr8_intercept, + + .x2apic_icr_is_split = false, .set_virtual_apic_mode = vmx_set_virtual_apic_mode, .set_apic_access_page_addr = vmx_set_apic_access_page_addr, .refresh_apicv_exec_ctrl = vmx_refresh_apicv_exec_ctrl, @@ -8489,10 +8533,6 @@ if (setup_vmcs_config(&vmcs_config, &vmx_capability) < 0) return -EIO; - if (cpu_has_perf_global_ctrl_bug()) - pr_warn_once("VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL " - "does not work properly. Using workaround\n"); - if (boot_cpu_has(X86_FEATURE_NX)) kvm_enable_efer_bits(EFER_NX); --- linux-xilinx-6.8.0.orig/arch/x86/kvm/vmx/vmx.h +++ linux-xilinx-6.8.0/arch/x86/kvm/vmx/vmx.h @@ -7,10 +7,10 @@ #include #include #include +#include #include "capabilities.h" #include "../kvm_cache_regs.h" -#include "posted_intr.h" #include "vmcs.h" #include "vmx_ops.h" #include "../cpuid.h" @@ -177,6 +177,7 @@ bool reload_vmcs01_apic_access_page; bool update_vmcs01_cpu_dirty_logging; bool update_vmcs01_apicv_status; + bool update_vmcs01_hwapic_isr; /* * Enlightened VMCS has been enabled. It does not mean that L1 has to @@ -402,6 +403,7 @@ bool vmx_guest_inject_ac(struct kvm_vcpu *vcpu); void vmx_update_exception_bitmap(struct kvm_vcpu *vcpu); bool vmx_nmi_blocked(struct kvm_vcpu *vcpu); +bool __vmx_interrupt_blocked(struct kvm_vcpu *vcpu); bool vmx_interrupt_blocked(struct kvm_vcpu *vcpu); bool vmx_get_nmi_mask(struct kvm_vcpu *vcpu); void vmx_set_nmi_mask(struct kvm_vcpu *vcpu, bool masked); --- linux-xilinx-6.8.0.orig/arch/x86/kvm/x86.c +++ linux-xilinx-6.8.0/arch/x86/kvm/x86.c @@ -471,17 +471,6 @@ kvm_on_user_return(&msrs->urn); } -u64 kvm_get_apic_base(struct kvm_vcpu *vcpu) -{ - return vcpu->arch.apic_base; -} - -enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu) -{ - return kvm_apic_mode(kvm_get_apic_base(vcpu)); -} -EXPORT_SYMBOL_GPL(kvm_get_apic_mode); - int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info) { enum lapic_mode old_mode = kvm_get_apic_mode(vcpu); @@ -1623,7 +1612,8 @@ ARCH_CAP_SKIP_VMENTRY_L1DFLUSH | ARCH_CAP_SSB_NO | ARCH_CAP_MDS_NO | \ ARCH_CAP_PSCHANGE_MC_NO | ARCH_CAP_TSX_CTRL_MSR | ARCH_CAP_TAA_NO | \ ARCH_CAP_SBDR_SSDP_NO | ARCH_CAP_FBSDP_NO | ARCH_CAP_PSDP_NO | \ - ARCH_CAP_FB_CLEAR | ARCH_CAP_RRSBA | ARCH_CAP_PBRSB_NO | ARCH_CAP_GDS_NO) + ARCH_CAP_FB_CLEAR | ARCH_CAP_RRSBA | ARCH_CAP_PBRSB_NO | ARCH_CAP_GDS_NO | \ + ARCH_CAP_RFDS_NO | ARCH_CAP_RFDS_CLEAR | ARCH_CAP_BHI_NO) static u64 kvm_get_arch_capabilities(void) { @@ -1655,6 +1645,8 @@ data |= ARCH_CAP_SSB_NO; if (!boot_cpu_has_bug(X86_BUG_MDS)) data |= ARCH_CAP_MDS_NO; + if (!boot_cpu_has_bug(X86_BUG_RFDS)) + data |= ARCH_CAP_RFDS_NO; if (!boot_cpu_has(X86_FEATURE_RTM)) { /* @@ -3419,7 +3411,7 @@ static bool can_set_mci_status(struct kvm_vcpu *vcpu) { /* McStatusWrEn enabled? */ - if (guest_cpuid_is_amd_or_hygon(vcpu)) + if (guest_cpuid_is_amd_compatible(vcpu)) return !!(vcpu->arch.msr_hwcr & BIT_ULL(18)); return false; @@ -4284,7 +4276,7 @@ msr_info->data = 1 << 24; break; case MSR_IA32_APICBASE: - msr_info->data = kvm_get_apic_base(vcpu); + msr_info->data = vcpu->arch.apic_base; break; case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff: return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data); @@ -5984,7 +5976,9 @@ if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events))) break; + kvm_vcpu_srcu_read_lock(vcpu); r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events); + kvm_vcpu_srcu_read_unlock(vcpu); break; } case KVM_GET_DEBUGREGS: { @@ -10006,7 +10000,7 @@ { u64 ret = vcpu->run->hypercall.ret; - if (!is_64_bit_mode(vcpu)) + if (!is_64_bit_hypercall(vcpu)) ret = (u32)ret; kvm_rax_write(vcpu, ret); ++vcpu->stat.hypercalls; @@ -10154,7 +10148,7 @@ kvm_run->if_flag = static_call(kvm_x86_get_if_flag)(vcpu); kvm_run->cr8 = kvm_get_cr8(vcpu); - kvm_run->apic_base = kvm_get_apic_base(vcpu); + kvm_run->apic_base = vcpu->arch.apic_base; kvm_run->ready_for_interrupt_injection = pic_in_kernel(vcpu->kvm) || @@ -10437,7 +10431,7 @@ if (is_guest_mode(vcpu) && kvm_x86_ops.nested_ops->has_events && - kvm_x86_ops.nested_ops->has_events(vcpu)) + kvm_x86_ops.nested_ops->has_events(vcpu, true)) *req_immediate_exit = true; /* @@ -10639,13 +10633,12 @@ bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256); + static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu); + if (irqchip_split(vcpu->kvm)) kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors); - else { - static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu); - if (ioapic_in_kernel(vcpu->kvm)) - kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors); - } + else if (ioapic_in_kernel(vcpu->kvm)) + kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors); if (is_guest_mode(vcpu)) vcpu->arch.load_eoi_exitmap_pending = true; @@ -10959,6 +10952,9 @@ set_debugreg(vcpu->arch.eff_db[1], 1); set_debugreg(vcpu->arch.eff_db[2], 2); set_debugreg(vcpu->arch.eff_db[3], 3); + /* When KVM_DEBUGREG_WONT_EXIT, dr6 is accessible in guest. */ + if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) + static_call(kvm_x86_set_dr6)(vcpu, vcpu->arch.dr6); } else if (unlikely(hw_breakpoint_active())) { set_debugreg(0, 7); } @@ -11310,6 +11306,10 @@ struct kvm_run *kvm_run = vcpu->run; int r; + r = kvm_mmu_post_init_vm(vcpu->kvm); + if (r) + return r; + vcpu_load(vcpu); kvm_sigset_activate(vcpu); kvm_run->flags = 0; @@ -11317,7 +11317,7 @@ kvm_vcpu_srcu_read_lock(vcpu); if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) { - if (kvm_run->immediate_exit) { + if (!vcpu->wants_to_run) { r = -EINTR; goto out; } @@ -11395,7 +11395,7 @@ WARN_ON_ONCE(vcpu->mmio_needed); } - if (kvm_run->immediate_exit) { + if (!vcpu->wants_to_run) { r = -EINTR; goto out; } @@ -11535,7 +11535,7 @@ sregs->cr4 = kvm_read_cr4(vcpu); sregs->cr8 = kvm_get_cr8(vcpu); sregs->efer = vcpu->arch.efer; - sregs->apic_base = kvm_get_apic_base(vcpu); + sregs->apic_base = vcpu->arch.apic_base; } static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) @@ -12581,7 +12581,8 @@ int kvm_arch_post_init_vm(struct kvm *kvm) { - return kvm_mmu_post_init_vm(kvm); + once_init(&kvm->arch.nx_once); + return 0; } static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu) @@ -13081,7 +13082,7 @@ if (is_guest_mode(vcpu) && kvm_x86_ops.nested_ops->has_events && - kvm_x86_ops.nested_ops->has_events(vcpu)) + kvm_x86_ops.nested_ops->has_events(vcpu, false)) return true; if (kvm_xen_has_pending_events(vcpu)) @@ -13913,6 +13914,8 @@ static int __init kvm_x86_init(void) { + kvm_init_xstate_sizes(); + kvm_mmu_x86_module_init(); mitigate_smt_rsb &= boot_cpu_has_bug(X86_BUG_SMT_RSB) && cpu_smt_possible(); return 0; --- linux-xilinx-6.8.0.orig/arch/x86/kvm/xen.c +++ linux-xilinx-6.8.0/arch/x86/kvm/xen.c @@ -493,7 +493,7 @@ kvm_xen_update_runstate_guest(v, state == RUNSTATE_runnable); } -static void kvm_xen_inject_vcpu_vector(struct kvm_vcpu *v) +void kvm_xen_inject_vcpu_vector(struct kvm_vcpu *v) { struct kvm_lapic_irq irq = { }; int r; --- linux-xilinx-6.8.0.orig/arch/x86/kvm/xen.h +++ linux-xilinx-6.8.0/arch/x86/kvm/xen.h @@ -18,6 +18,7 @@ int __kvm_xen_has_interrupt(struct kvm_vcpu *vcpu); void kvm_xen_inject_pending_events(struct kvm_vcpu *vcpu); +void kvm_xen_inject_vcpu_vector(struct kvm_vcpu *vcpu); int kvm_xen_vcpu_set_attr(struct kvm_vcpu *vcpu, struct kvm_xen_vcpu_attr *data); int kvm_xen_vcpu_get_attr(struct kvm_vcpu *vcpu, struct kvm_xen_vcpu_attr *data); int kvm_xen_hvm_set_attr(struct kvm *kvm, struct kvm_xen_hvm_attr *data); @@ -36,6 +37,19 @@ const struct kvm_irq_routing_entry *ue); void kvm_xen_update_tsc_info(struct kvm_vcpu *vcpu); +static inline void kvm_xen_sw_enable_lapic(struct kvm_vcpu *vcpu) +{ + /* + * The local APIC is being enabled. If the per-vCPU upcall vector is + * set and the vCPU's evtchn_upcall_pending flag is set, inject the + * interrupt. + */ + if (static_branch_unlikely(&kvm_xen_enabled.key) && + vcpu->arch.xen.vcpu_info_cache.active && + vcpu->arch.xen.upcall_vector && __kvm_xen_has_interrupt(vcpu)) + kvm_xen_inject_vcpu_vector(vcpu); +} + static inline bool kvm_xen_msr_enabled(struct kvm *kvm) { return static_branch_unlikely(&kvm_xen_enabled.key) && @@ -101,6 +115,10 @@ { } +static inline void kvm_xen_sw_enable_lapic(struct kvm_vcpu *vcpu) +{ +} + static inline bool kvm_xen_msr_enabled(struct kvm *kvm) { return false; --- linux-xilinx-6.8.0.orig/arch/x86/lib/Makefile +++ linux-xilinx-6.8.0/arch/x86/lib/Makefile @@ -14,19 +14,6 @@ CFLAGS_REMOVE_delay.o = $(CC_FLAGS_FTRACE) endif -# Early boot use of cmdline; don't instrument it -ifdef CONFIG_AMD_MEM_ENCRYPT -KCOV_INSTRUMENT_cmdline.o := n -KASAN_SANITIZE_cmdline.o := n -KCSAN_SANITIZE_cmdline.o := n - -ifdef CONFIG_FUNCTION_TRACER -CFLAGS_REMOVE_cmdline.o = -pg -endif - -CFLAGS_cmdline.o := -fno-stack-protector -fno-jump-tables -endif - inat_tables_script = $(srctree)/arch/x86/tools/gen-insn-attr-x86.awk inat_tables_maps = $(srctree)/arch/x86/lib/x86-opcode-map.txt quiet_cmd_inat_tables = GEN $@ --- linux-xilinx-6.8.0.orig/arch/x86/lib/getuser.S +++ linux-xilinx-6.8.0/arch/x86/lib/getuser.S @@ -44,7 +44,11 @@ or %rdx, %rax .else cmp $TASK_SIZE_MAX-\size+1, %eax +.if \size != 8 jae .Lbad_get_user +.else + jae .Lbad_get_user_8 +.endif sbb %edx, %edx /* array_index_mask_nospec() */ and %edx, %eax .endif @@ -154,7 +158,7 @@ #ifdef CONFIG_X86_32 SYM_CODE_START_LOCAL(__get_user_8_handle_exception) ASM_CLAC -bad_get_user_8: +.Lbad_get_user_8: xor %edx,%edx xor %ecx,%ecx mov $(-EFAULT),%_ASM_AX --- linux-xilinx-6.8.0.orig/arch/x86/lib/iomem.c +++ linux-xilinx-6.8.0/arch/x86/lib/iomem.c @@ -25,6 +25,9 @@ static void string_memcpy_fromio(void *to, const volatile void __iomem *from, size_t n) { + const void *orig_to = to; + const size_t orig_n = n; + if (unlikely(!n)) return; @@ -39,7 +42,7 @@ } rep_movs(to, (const void *)from, n); /* KMSAN must treat values read from devices as initialized. */ - kmsan_unpoison_memory(to, n); + kmsan_unpoison_memory(orig_to, orig_n); } static void string_memcpy_toio(volatile void __iomem *to, const void *from, size_t n) --- linux-xilinx-6.8.0.orig/arch/x86/lib/retpoline.S +++ linux-xilinx-6.8.0/arch/x86/lib/retpoline.S @@ -163,6 +163,7 @@ lfence jmp srso_alias_return_thunk SYM_FUNC_END(srso_alias_untrain_ret) +__EXPORT_THUNK(srso_alias_untrain_ret) .popsection .pushsection .text..__x86.rethunk_safe @@ -224,10 +225,16 @@ SYM_CODE_END(srso_return_thunk) #define JMP_SRSO_UNTRAIN_RET "jmp srso_untrain_ret" -#define JMP_SRSO_ALIAS_UNTRAIN_RET "jmp srso_alias_untrain_ret" #else /* !CONFIG_CPU_SRSO */ #define JMP_SRSO_UNTRAIN_RET "ud2" -#define JMP_SRSO_ALIAS_UNTRAIN_RET "ud2" +/* Dummy for the alternative in CALL_UNTRAIN_RET. */ +SYM_CODE_START(srso_alias_untrain_ret) + ANNOTATE_UNRET_SAFE + ANNOTATE_NOENDBR + ret + int3 +SYM_FUNC_END(srso_alias_untrain_ret) +__EXPORT_THUNK(srso_alias_untrain_ret) #endif /* CONFIG_CPU_SRSO */ #ifdef CONFIG_CPU_UNRET_ENTRY @@ -319,9 +326,7 @@ #if defined(CONFIG_CPU_UNRET_ENTRY) || defined(CONFIG_CPU_SRSO) SYM_FUNC_START(entry_untrain_ret) - ALTERNATIVE_2 JMP_RETBLEED_UNTRAIN_RET, \ - JMP_SRSO_UNTRAIN_RET, X86_FEATURE_SRSO, \ - JMP_SRSO_ALIAS_UNTRAIN_RET, X86_FEATURE_SRSO_ALIAS + ALTERNATIVE JMP_RETBLEED_UNTRAIN_RET, JMP_SRSO_UNTRAIN_RET, X86_FEATURE_SRSO SYM_FUNC_END(entry_untrain_ret) __EXPORT_THUNK(entry_untrain_ret) --- linux-xilinx-6.8.0.orig/arch/x86/lib/x86-opcode-map.txt +++ linux-xilinx-6.8.0/arch/x86/lib/x86-opcode-map.txt @@ -148,7 +148,7 @@ 65: SEG=GS (Prefix) 66: Operand-Size (Prefix) 67: Address-Size (Prefix) -68: PUSH Iz (d64) +68: PUSH Iz 69: IMUL Gv,Ev,Iz 6a: PUSH Ib (d64) 6b: IMUL Gv,Ev,Ib @@ -698,10 +698,10 @@ 4d: vrcp14ss/d Vsd,Hpd,Wsd (66),(ev) 4e: vrsqrt14ps/d Vpd,Wpd (66),(ev) 4f: vrsqrt14ss/d Vsd,Hsd,Wsd (66),(ev) -50: vpdpbusd Vx,Hx,Wx (66),(ev) -51: vpdpbusds Vx,Hx,Wx (66),(ev) -52: vdpbf16ps Vx,Hx,Wx (F3),(ev) | vpdpwssd Vx,Hx,Wx (66),(ev) | vp4dpwssd Vdqq,Hdqq,Wdq (F2),(ev) -53: vpdpwssds Vx,Hx,Wx (66),(ev) | vp4dpwssds Vdqq,Hdqq,Wdq (F2),(ev) +50: vpdpbusd Vx,Hx,Wx (66) +51: vpdpbusds Vx,Hx,Wx (66) +52: vdpbf16ps Vx,Hx,Wx (F3),(ev) | vpdpwssd Vx,Hx,Wx (66) | vp4dpwssd Vdqq,Hdqq,Wdq (F2),(ev) +53: vpdpwssds Vx,Hx,Wx (66) | vp4dpwssds Vdqq,Hdqq,Wdq (F2),(ev) 54: vpopcntb/w Vx,Wx (66),(ev) 55: vpopcntd/q Vx,Wx (66),(ev) 58: vpbroadcastd Vx,Wx (66),(v) --- linux-xilinx-6.8.0.orig/arch/x86/mm/fault.c +++ linux-xilinx-6.8.0/arch/x86/mm/fault.c @@ -376,7 +376,7 @@ goto bad; pr_cont("PUD %lx ", pud_val(*pud)); - if (!pud_present(*pud) || pud_large(*pud)) + if (!pud_present(*pud) || pud_leaf(*pud)) goto out; pmd = pmd_offset(pud, address); @@ -717,39 +717,8 @@ WARN_ON_ONCE(user_mode(regs)); /* Are we prepared to handle this kernel fault? */ - if (fixup_exception(regs, X86_TRAP_PF, error_code, address)) { - /* - * Any interrupt that takes a fault gets the fixup. This makes - * the below recursive fault logic only apply to a faults from - * task context. - */ - if (in_interrupt()) - return; - - /* - * Per the above we're !in_interrupt(), aka. task context. - * - * In this case we need to make sure we're not recursively - * faulting through the emulate_vsyscall() logic. - */ - if (current->thread.sig_on_uaccess_err && signal) { - sanitize_error_code(address, &error_code); - - set_signal_archinfo(address, error_code); - - if (si_code == SEGV_PKUERR) { - force_sig_pkuerr((void __user *)address, pkey); - } else { - /* XXX: hwpoison faults will set the wrong code. */ - force_sig_fault(signal, si_code, (void __user *)address); - } - } - - /* - * Barring that, we can do the fixup and be happy. - */ + if (fixup_exception(regs, X86_TRAP_PF, error_code, address)) return; - } /* * AMD erratum #91 manifests as a spurious page fault on a PREFETCH @@ -1037,7 +1006,7 @@ if (!pud_present(*pud)) return 0; - if (pud_large(*pud)) + if (pud_leaf(*pud)) return spurious_kernel_fault_check(error_code, (pte_t *) pud); pmd = pmd_offset(pud, address); --- linux-xilinx-6.8.0.orig/arch/x86/mm/ident_map.c +++ linux-xilinx-6.8.0/arch/x86/mm/ident_map.c @@ -33,7 +33,7 @@ next = end; /* if this is already a gbpage, this portion is already mapped */ - if (pud_large(*pud)) + if (pud_leaf(*pud)) continue; /* Is using a gbpage allowed? */ @@ -101,7 +101,7 @@ if (result) return result; - set_p4d(p4d, __p4d(__pa(pud) | info->kernpg_flag)); + set_p4d(p4d, __p4d(__pa(pud) | info->kernpg_flag | _PAGE_NOPTISHADOW)); } return 0; @@ -145,14 +145,14 @@ if (result) return result; if (pgtable_l5_enabled()) { - set_pgd(pgd, __pgd(__pa(p4d) | info->kernpg_flag)); + set_pgd(pgd, __pgd(__pa(p4d) | info->kernpg_flag | _PAGE_NOPTISHADOW)); } else { /* * With p4d folded, pgd is equal to p4d. * The pgd entry has to point to the pud page table in this case. */ pud_t *pud = pud_offset(p4d, 0); - set_pgd(pgd, __pgd(__pa(pud) | info->kernpg_flag)); + set_pgd(pgd, __pgd(__pa(pud) | info->kernpg_flag | _PAGE_NOPTISHADOW)); } } --- linux-xilinx-6.8.0.orig/arch/x86/mm/init.c +++ linux-xilinx-6.8.0/arch/x86/mm/init.c @@ -261,21 +261,17 @@ } } -#define INTEL_MATCH(_model) { .vendor = X86_VENDOR_INTEL, \ - .family = 6, \ - .model = _model, \ - } /* * INVLPG may not properly flush Global entries * on these CPUs when PCIDs are enabled. */ static const struct x86_cpu_id invlpg_miss_ids[] = { - INTEL_MATCH(INTEL_FAM6_ALDERLAKE ), - INTEL_MATCH(INTEL_FAM6_ALDERLAKE_L ), - INTEL_MATCH(INTEL_FAM6_ATOM_GRACEMONT ), - INTEL_MATCH(INTEL_FAM6_RAPTORLAKE ), - INTEL_MATCH(INTEL_FAM6_RAPTORLAKE_P), - INTEL_MATCH(INTEL_FAM6_RAPTORLAKE_S), + X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, 0), + X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, 0), + X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, 0), + X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, 0), + X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, 0), + X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, 0), {} }; --- linux-xilinx-6.8.0.orig/arch/x86/mm/init_64.c +++ linux-xilinx-6.8.0/arch/x86/mm/init_64.c @@ -617,7 +617,7 @@ } if (!pud_none(*pud)) { - if (!pud_large(*pud)) { + if (!pud_leaf(*pud)) { pmd = pmd_offset(pud, 0); paddr_last = phys_pmd_init(pmd, paddr, paddr_end, @@ -950,8 +950,12 @@ int add_pages(int nid, unsigned long start_pfn, unsigned long nr_pages, struct mhp_params *params) { + unsigned long end = ((start_pfn + nr_pages) << PAGE_SHIFT) - 1; int ret; + if (WARN_ON_ONCE(end > PHYSMEM_END)) + return -ERANGE; + ret = __add_pages(nid, start_pfn, nr_pages, params); WARN_ON_ONCE(ret); @@ -1163,7 +1167,7 @@ if (!pud_present(*pud)) continue; - if (pud_large(*pud) && + if (pud_leaf(*pud) && IS_ALIGNED(addr, PUD_SIZE) && IS_ALIGNED(next, PUD_SIZE)) { spin_lock(&init_mm.page_table_lock); --- linux-xilinx-6.8.0.orig/arch/x86/mm/ioremap.c +++ linux-xilinx-6.8.0/arch/x86/mm/ioremap.c @@ -655,7 +655,8 @@ paddr_next = data->next; len = data->len; - if ((phys_addr > paddr) && (phys_addr < (paddr + len))) { + if ((phys_addr > paddr) && + (phys_addr < (paddr + sizeof(struct setup_data) + len))) { memunmap(data); return true; } @@ -717,7 +718,8 @@ paddr_next = data->next; len = data->len; - if ((phys_addr > paddr) && (phys_addr < (paddr + len))) { + if ((phys_addr > paddr) && + (phys_addr < (paddr + sizeof(struct setup_data) + len))) { early_memunmap(data, sizeof(*data)); return true; } --- linux-xilinx-6.8.0.orig/arch/x86/mm/kasan_init_64.c +++ linux-xilinx-6.8.0/arch/x86/mm/kasan_init_64.c @@ -115,7 +115,7 @@ pud = pud_offset(p4d, addr); do { next = pud_addr_end(addr, end); - if (!pud_large(*pud)) + if (!pud_leaf(*pud)) kasan_populate_pud(pud, addr, next, nid); } while (pud++, addr = next, addr != end); } --- linux-xilinx-6.8.0.orig/arch/x86/mm/kaslr.c +++ linux-xilinx-6.8.0/arch/x86/mm/kaslr.c @@ -47,13 +47,24 @@ */ static __initdata struct kaslr_memory_region { unsigned long *base; + unsigned long *end; unsigned long size_tb; } kaslr_regions[] = { - { &page_offset_base, 0 }, - { &vmalloc_base, 0 }, - { &vmemmap_base, 0 }, + { + .base = &page_offset_base, + .end = &physmem_end, + }, + { + .base = &vmalloc_base, + }, + { + .base = &vmemmap_base, + }, }; +/* The end of the possible address space for physical memory */ +unsigned long physmem_end __ro_after_init; + /* Get size in bytes used by the memory region */ static inline unsigned long get_padding(struct kaslr_memory_region *region) { @@ -82,6 +93,8 @@ BUILD_BUG_ON(vaddr_end != CPU_ENTRY_AREA_BASE); BUILD_BUG_ON(vaddr_end > __START_KERNEL_map); + /* Preset the end of the possible address space for physical memory */ + physmem_end = ((1ULL << MAX_PHYSMEM_BITS) - 1); if (!kaslr_memory_enabled()) return; @@ -128,11 +141,18 @@ vaddr += entropy; *kaslr_regions[i].base = vaddr; + /* Calculate the end of the region */ + vaddr += get_padding(&kaslr_regions[i]); /* - * Jump the region and add a minimum padding based on - * randomization alignment. + * KASLR trims the maximum possible size of the + * direct-map. Update the physmem_end boundary. + * No rounding required as the region starts + * PUD aligned and size is in units of TB. */ - vaddr += get_padding(&kaslr_regions[i]); + if (kaslr_regions[i].end) + *kaslr_regions[i].end = __pa_nodebug(vaddr - 1); + + /* Add a minimum padding based on randomization alignment. */ vaddr = round_up(vaddr + 1, PUD_SIZE); remain_entropy -= entropy; } --- linux-xilinx-6.8.0.orig/arch/x86/mm/mem_encrypt_amd.c +++ linux-xilinx-6.8.0/arch/x86/mm/mem_encrypt_amd.c @@ -283,7 +283,7 @@ #endif } -static bool amd_enc_status_change_prepare(unsigned long vaddr, int npages, bool enc) +static int amd_enc_status_change_prepare(unsigned long vaddr, int npages, bool enc) { /* * To maintain the security guarantees of SEV-SNP guests, make sure @@ -292,11 +292,11 @@ if (cc_platform_has(CC_ATTR_GUEST_SEV_SNP) && !enc) snp_set_memory_shared(vaddr, npages); - return true; + return 0; } /* Return true unconditionally: return value doesn't matter for the SEV side */ -static bool amd_enc_status_change_finish(unsigned long vaddr, int npages, bool enc) +static int amd_enc_status_change_finish(unsigned long vaddr, int npages, bool enc) { /* * After memory is mapped encrypted in the page table, validate it @@ -308,7 +308,7 @@ if (!cc_platform_has(CC_ATTR_HOST_MEM_ENCRYPT)) enc_dec_hypercall(vaddr, npages << PAGE_SHIFT, enc); - return true; + return 0; } static void __init __set_clr_pte_enc(pte_t *kpte, int level, bool enc) @@ -492,6 +492,24 @@ */ if (sev_status & MSR_AMD64_SEV_ENABLED) ia32_disable(); + + /* + * Override init functions that scan the ROM region in SEV-SNP guests, + * as this memory is not pre-validated and would thus cause a crash. + */ + if (sev_status & MSR_AMD64_SEV_SNP_ENABLED) { + x86_init.mpparse.find_smp_config = x86_init_noop; + x86_init.pci.init_irq = x86_init_noop; + x86_init.resources.probe_roms = x86_init_noop; + + /* + * DMI setup behavior for SEV-SNP guests depends on + * efi_enabled(EFI_CONFIG_TABLES), which hasn't been + * parsed yet. snp_dmi_setup() will run after that + * parsing has happened. + */ + x86_init.resources.dmi_setup = snp_dmi_setup; + } } void __init mem_encrypt_free_decrypted_mem(void) --- linux-xilinx-6.8.0.orig/arch/x86/mm/mem_encrypt_identity.c +++ linux-xilinx-6.8.0/arch/x86/mm/mem_encrypt_identity.c @@ -41,9 +41,9 @@ #include #include +#include #include #include -#include #include #include @@ -95,11 +95,7 @@ */ static char sme_workarea[2 * PMD_SIZE] __section(".init.scratch"); -static char sme_cmdline_arg[] __initdata = "mem_encrypt"; -static char sme_cmdline_on[] __initdata = "on"; -static char sme_cmdline_off[] __initdata = "off"; - -static void __init sme_clear_pgd(struct sme_populate_pgd_data *ppd) +static void __head sme_clear_pgd(struct sme_populate_pgd_data *ppd) { unsigned long pgd_start, pgd_end, pgd_size; pgd_t *pgd_p; @@ -114,7 +110,7 @@ memset(pgd_p, 0, pgd_size); } -static pud_t __init *sme_prepare_pgd(struct sme_populate_pgd_data *ppd) +static pud_t __head *sme_prepare_pgd(struct sme_populate_pgd_data *ppd) { pgd_t *pgd; p4d_t *p4d; @@ -145,13 +141,13 @@ set_pud(pud, __pud(PUD_FLAGS | __pa(pmd))); } - if (pud_large(*pud)) + if (pud_leaf(*pud)) return NULL; return pud; } -static void __init sme_populate_pgd_large(struct sme_populate_pgd_data *ppd) +static void __head sme_populate_pgd_large(struct sme_populate_pgd_data *ppd) { pud_t *pud; pmd_t *pmd; @@ -167,7 +163,7 @@ set_pmd(pmd, __pmd(ppd->paddr | ppd->pmd_flags)); } -static void __init sme_populate_pgd(struct sme_populate_pgd_data *ppd) +static void __head sme_populate_pgd(struct sme_populate_pgd_data *ppd) { pud_t *pud; pmd_t *pmd; @@ -193,7 +189,7 @@ set_pte(pte, __pte(ppd->paddr | ppd->pte_flags)); } -static void __init __sme_map_range_pmd(struct sme_populate_pgd_data *ppd) +static void __head __sme_map_range_pmd(struct sme_populate_pgd_data *ppd) { while (ppd->vaddr < ppd->vaddr_end) { sme_populate_pgd_large(ppd); @@ -203,7 +199,7 @@ } } -static void __init __sme_map_range_pte(struct sme_populate_pgd_data *ppd) +static void __head __sme_map_range_pte(struct sme_populate_pgd_data *ppd) { while (ppd->vaddr < ppd->vaddr_end) { sme_populate_pgd(ppd); @@ -213,7 +209,7 @@ } } -static void __init __sme_map_range(struct sme_populate_pgd_data *ppd, +static void __head __sme_map_range(struct sme_populate_pgd_data *ppd, pmdval_t pmd_flags, pteval_t pte_flags) { unsigned long vaddr_end; @@ -237,22 +233,22 @@ __sme_map_range_pte(ppd); } -static void __init sme_map_range_encrypted(struct sme_populate_pgd_data *ppd) +static void __head sme_map_range_encrypted(struct sme_populate_pgd_data *ppd) { __sme_map_range(ppd, PMD_FLAGS_ENC, PTE_FLAGS_ENC); } -static void __init sme_map_range_decrypted(struct sme_populate_pgd_data *ppd) +static void __head sme_map_range_decrypted(struct sme_populate_pgd_data *ppd) { __sme_map_range(ppd, PMD_FLAGS_DEC, PTE_FLAGS_DEC); } -static void __init sme_map_range_decrypted_wp(struct sme_populate_pgd_data *ppd) +static void __head sme_map_range_decrypted_wp(struct sme_populate_pgd_data *ppd) { __sme_map_range(ppd, PMD_FLAGS_DEC_WP, PTE_FLAGS_DEC_WP); } -static unsigned long __init sme_pgtable_calc(unsigned long len) +static unsigned long __head sme_pgtable_calc(unsigned long len) { unsigned long entries = 0, tables = 0; @@ -289,7 +285,7 @@ return entries + tables; } -void __init sme_encrypt_kernel(struct boot_params *bp) +void __head sme_encrypt_kernel(struct boot_params *bp) { unsigned long workarea_start, workarea_end, workarea_len; unsigned long execute_start, execute_end, execute_len; @@ -305,7 +301,8 @@ * instrumentation or checking boot_cpu_data in the cc_platform_has() * function. */ - if (!sme_get_me_mask() || sev_status & MSR_AMD64_SEV_ENABLED) + if (!sme_get_me_mask() || + RIP_REL_REF(sev_status) & MSR_AMD64_SEV_ENABLED) return; /* @@ -323,9 +320,8 @@ * memory from being cached. */ - /* Physical addresses gives us the identity mapped virtual addresses */ - kernel_start = __pa_symbol(_text); - kernel_end = ALIGN(__pa_symbol(_end), PMD_SIZE); + kernel_start = (unsigned long)RIP_REL_REF(_text); + kernel_end = ALIGN((unsigned long)RIP_REL_REF(_end), PMD_SIZE); kernel_len = kernel_end - kernel_start; initrd_start = 0; @@ -343,14 +339,6 @@ #endif /* - * We're running identity mapped, so we must obtain the address to the - * SME encryption workarea using rip-relative addressing. - */ - asm ("lea sme_workarea(%%rip), %0" - : "=r" (workarea_start) - : "p" (sme_workarea)); - - /* * Calculate required number of workarea bytes needed: * executable encryption area size: * stack page (PAGE_SIZE) @@ -359,7 +347,7 @@ * pagetable structures for the encryption of the kernel * pagetable structures for workarea (in case not currently mapped) */ - execute_start = workarea_start; + execute_start = workarea_start = (unsigned long)RIP_REL_REF(sme_workarea); execute_end = execute_start + (PAGE_SIZE * 2) + PMD_SIZE; execute_len = execute_end - execute_start; @@ -502,14 +490,11 @@ native_write_cr3(__native_read_cr3()); } -void __init sme_enable(struct boot_params *bp) +void __head sme_enable(struct boot_params *bp) { - const char *cmdline_ptr, *cmdline_arg, *cmdline_on, *cmdline_off; unsigned int eax, ebx, ecx, edx; unsigned long feature_mask; - bool active_by_default; unsigned long me_mask; - char buffer[16]; bool snp; u64 msr; @@ -543,15 +528,18 @@ me_mask = 1UL << (ebx & 0x3f); /* Check the SEV MSR whether SEV or SME is enabled */ - sev_status = __rdmsr(MSR_AMD64_SEV); - feature_mask = (sev_status & MSR_AMD64_SEV_ENABLED) ? AMD_SEV_BIT : AMD_SME_BIT; + RIP_REL_REF(sev_status) = msr = __rdmsr(MSR_AMD64_SEV); + feature_mask = (msr & MSR_AMD64_SEV_ENABLED) ? AMD_SEV_BIT : AMD_SME_BIT; /* The SEV-SNP CC blob should never be present unless SEV-SNP is enabled. */ - if (snp && !(sev_status & MSR_AMD64_SEV_SNP_ENABLED)) + if (snp && !(msr & MSR_AMD64_SEV_SNP_ENABLED)) snp_abort(); /* Check if memory encryption is enabled */ if (feature_mask == AMD_SME_BIT) { + if (!(bp->hdr.xloadflags & XLF_MEM_ENCRYPTION)) + return; + /* * No SME if Hypervisor bit is set. This check is here to * prevent a guest from trying to enable SME. For running as a @@ -571,48 +559,10 @@ msr = __rdmsr(MSR_AMD64_SYSCFG); if (!(msr & MSR_AMD64_SYSCFG_MEM_ENCRYPT)) return; - } else { - /* SEV state cannot be controlled by a command line option */ - sme_me_mask = me_mask; - goto out; } - /* - * Fixups have not been applied to phys_base yet and we're running - * identity mapped, so we must obtain the address to the SME command - * line argument data using rip-relative addressing. - */ - asm ("lea sme_cmdline_arg(%%rip), %0" - : "=r" (cmdline_arg) - : "p" (sme_cmdline_arg)); - asm ("lea sme_cmdline_on(%%rip), %0" - : "=r" (cmdline_on) - : "p" (sme_cmdline_on)); - asm ("lea sme_cmdline_off(%%rip), %0" - : "=r" (cmdline_off) - : "p" (sme_cmdline_off)); - - if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT)) - active_by_default = true; - else - active_by_default = false; - - cmdline_ptr = (const char *)((u64)bp->hdr.cmd_line_ptr | - ((u64)bp->ext_cmd_line_ptr << 32)); - - if (cmdline_find_option(cmdline_ptr, cmdline_arg, buffer, sizeof(buffer)) < 0) - return; - - if (!strncmp(buffer, cmdline_on, sizeof(buffer))) - sme_me_mask = me_mask; - else if (!strncmp(buffer, cmdline_off, sizeof(buffer))) - sme_me_mask = 0; - else - sme_me_mask = active_by_default ? me_mask : 0; -out: - if (sme_me_mask) { - physical_mask &= ~sme_me_mask; - cc_vendor = CC_VENDOR_AMD; - cc_set_mask(sme_me_mask); - } + RIP_REL_REF(sme_me_mask) = me_mask; + physical_mask &= ~me_mask; + cc_vendor = CC_VENDOR_AMD; + cc_set_mask(me_mask); } --- linux-xilinx-6.8.0.orig/arch/x86/mm/numa.c +++ linux-xilinx-6.8.0/arch/x86/mm/numa.c @@ -493,7 +493,7 @@ for_each_reserved_mem_region(mb_region) { int nid = memblock_get_region_node(mb_region); - if (nid != MAX_NUMNODES) + if (nid != NUMA_NO_NODE) node_set(nid, reserved_nodemask); } @@ -614,9 +614,9 @@ nodes_clear(node_online_map); memset(&numa_meminfo, 0, sizeof(numa_meminfo)); WARN_ON(memblock_set_node(0, ULLONG_MAX, &memblock.memory, - MAX_NUMNODES)); + NUMA_NO_NODE)); WARN_ON(memblock_set_node(0, ULLONG_MAX, &memblock.reserved, - MAX_NUMNODES)); + NUMA_NO_NODE)); /* In case that parsing SRAT failed. */ WARN_ON(memblock_clear_hotplug(0, ULLONG_MAX)); numa_reset_distance(); @@ -929,6 +929,8 @@ } EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid); +#endif + static int __init cmp_memblk(const void *a, const void *b) { const struct numa_memblk *ma = *(const struct numa_memblk **)a; @@ -1001,5 +1003,3 @@ } return 0; } - -#endif --- linux-xilinx-6.8.0.orig/arch/x86/mm/pat/memtype.c +++ linux-xilinx-6.8.0/arch/x86/mm/pat/memtype.c @@ -950,6 +950,38 @@ memtype_free(paddr, paddr + size); } +static int get_pat_info(struct vm_area_struct *vma, resource_size_t *paddr, + pgprot_t *pgprot) +{ + unsigned long prot; + + VM_WARN_ON_ONCE(!(vma->vm_flags & VM_PAT)); + + /* + * We need the starting PFN and cachemode used for track_pfn_remap() + * that covered the whole VMA. For most mappings, we can obtain that + * information from the page tables. For COW mappings, we might now + * suddenly have anon folios mapped and follow_phys() will fail. + * + * Fallback to using vma->vm_pgoff, see remap_pfn_range_notrack(), to + * detect the PFN. If we need the cachemode as well, we're out of luck + * for now and have to fail fork(). + */ + if (!follow_phys(vma, vma->vm_start, 0, &prot, paddr)) { + if (pgprot) + *pgprot = __pgprot(prot); + return 0; + } + if (is_cow_mapping(vma->vm_flags)) { + if (pgprot) + return -EINVAL; + *paddr = (resource_size_t)vma->vm_pgoff << PAGE_SHIFT; + return 0; + } + WARN_ON_ONCE(1); + return -EINVAL; +} + /* * track_pfn_copy is called when vma that is covering the pfnmap gets * copied through copy_page_range(). @@ -960,20 +992,13 @@ int track_pfn_copy(struct vm_area_struct *vma) { resource_size_t paddr; - unsigned long prot; unsigned long vma_size = vma->vm_end - vma->vm_start; pgprot_t pgprot; if (vma->vm_flags & VM_PAT) { - /* - * reserve the whole chunk covered by vma. We need the - * starting address and protection from pte. - */ - if (follow_phys(vma, vma->vm_start, 0, &prot, &paddr)) { - WARN_ON_ONCE(1); + if (get_pat_info(vma, &paddr, &pgprot)) return -EINVAL; - } - pgprot = __pgprot(prot); + /* reserve the whole chunk covered by vma. */ return reserve_pfn_range(paddr, vma_size, &pgprot, 1); } @@ -1048,7 +1073,6 @@ unsigned long size, bool mm_wr_locked) { resource_size_t paddr; - unsigned long prot; if (vma && !(vma->vm_flags & VM_PAT)) return; @@ -1056,11 +1080,8 @@ /* free the chunk starting from pfn or the whole chunk */ paddr = (resource_size_t)pfn << PAGE_SHIFT; if (!paddr && !size) { - if (follow_phys(vma, vma->vm_start, 0, &prot, &paddr)) { - WARN_ON_ONCE(1); + if (get_pat_info(vma, &paddr, NULL)) return; - } - size = vma->vm_end - vma->vm_start; } free_pfn_range(paddr, size); --- linux-xilinx-6.8.0.orig/arch/x86/mm/pat/set_memory.c +++ linux-xilinx-6.8.0/arch/x86/mm/pat/set_memory.c @@ -619,7 +619,8 @@ * Validate strict W^X semantics. */ static inline pgprot_t verify_rwx(pgprot_t old, pgprot_t new, unsigned long start, - unsigned long pfn, unsigned long npg) + unsigned long pfn, unsigned long npg, + bool nx, bool rw) { unsigned long end; @@ -641,6 +642,10 @@ if ((pgprot_val(new) & (_PAGE_RW | _PAGE_NX)) != _PAGE_RW) return new; + /* Non-leaf translation entries can disable writing or execution. */ + if (!rw || nx) + return new; + end = start + npg * PAGE_SIZE - 1; WARN_ONCE(1, "CPA detected W^X violation: %016llx -> %016llx range: 0x%016lx - 0x%016lx PFN %lx\n", (unsigned long long)pgprot_val(old), @@ -657,20 +662,26 @@ /* * Lookup the page table entry for a virtual address in a specific pgd. - * Return a pointer to the entry and the level of the mapping. + * Return a pointer to the entry, the level of the mapping, and the effective + * NX and RW bits of all page table levels. */ -pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address, - unsigned int *level) +pte_t *lookup_address_in_pgd_attr(pgd_t *pgd, unsigned long address, + unsigned int *level, bool *nx, bool *rw) { p4d_t *p4d; pud_t *pud; pmd_t *pmd; *level = PG_LEVEL_NONE; + *nx = false; + *rw = true; if (pgd_none(*pgd)) return NULL; + *nx |= pgd_flags(*pgd) & _PAGE_NX; + *rw &= pgd_flags(*pgd) & _PAGE_RW; + p4d = p4d_offset(pgd, address); if (p4d_none(*p4d)) return NULL; @@ -679,14 +690,20 @@ if (p4d_large(*p4d) || !p4d_present(*p4d)) return (pte_t *)p4d; + *nx |= p4d_flags(*p4d) & _PAGE_NX; + *rw &= p4d_flags(*p4d) & _PAGE_RW; + pud = pud_offset(p4d, address); if (pud_none(*pud)) return NULL; *level = PG_LEVEL_1G; - if (pud_large(*pud) || !pud_present(*pud)) + if (pud_leaf(*pud) || !pud_present(*pud)) return (pte_t *)pud; + *nx |= pud_flags(*pud) & _PAGE_NX; + *rw &= pud_flags(*pud) & _PAGE_RW; + pmd = pmd_offset(pud, address); if (pmd_none(*pmd)) return NULL; @@ -695,12 +712,27 @@ if (pmd_large(*pmd) || !pmd_present(*pmd)) return (pte_t *)pmd; + *nx |= pmd_flags(*pmd) & _PAGE_NX; + *rw &= pmd_flags(*pmd) & _PAGE_RW; + *level = PG_LEVEL_4K; return pte_offset_kernel(pmd, address); } /* + * Lookup the page table entry for a virtual address in a specific pgd. + * Return a pointer to the entry and the level of the mapping. + */ +pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address, + unsigned int *level) +{ + bool nx, rw; + + return lookup_address_in_pgd_attr(pgd, address, level, &nx, &rw); +} + +/* * Lookup the page table entry for a virtual address. Return a pointer * to the entry and the level of the mapping. * @@ -715,13 +747,16 @@ EXPORT_SYMBOL_GPL(lookup_address); static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address, - unsigned int *level) + unsigned int *level, bool *nx, bool *rw) { - if (cpa->pgd) - return lookup_address_in_pgd(cpa->pgd + pgd_index(address), - address, level); + pgd_t *pgd; - return lookup_address(address, level); + if (!cpa->pgd) + pgd = pgd_offset_k(address); + else + pgd = cpa->pgd + pgd_index(address); + + return lookup_address_in_pgd_attr(pgd, address, level, nx, rw); } /* @@ -743,7 +778,7 @@ return NULL; pud = pud_offset(p4d, address); - if (pud_none(*pud) || pud_large(*pud) || !pud_present(*pud)) + if (pud_none(*pud) || pud_leaf(*pud) || !pud_present(*pud)) return NULL; return pmd_offset(pud, address); @@ -849,12 +884,13 @@ pgprot_t old_prot, new_prot, req_prot, chk_prot; pte_t new_pte, *tmp; enum pg_level level; + bool nx, rw; /* * Check for races, another CPU might have split this page * up already: */ - tmp = _lookup_address_cpa(cpa, address, &level); + tmp = _lookup_address_cpa(cpa, address, &level, &nx, &rw); if (tmp != kpte) return 1; @@ -965,7 +1001,8 @@ new_prot = static_protections(req_prot, lpaddr, old_pfn, numpages, psize, CPA_DETECT); - new_prot = verify_rwx(old_prot, new_prot, lpaddr, old_pfn, numpages); + new_prot = verify_rwx(old_prot, new_prot, lpaddr, old_pfn, numpages, + nx, rw); /* * If there is a conflict, split the large page. @@ -1046,6 +1083,7 @@ pte_t *pbase = (pte_t *)page_address(base); unsigned int i, level; pgprot_t ref_prot; + bool nx, rw; pte_t *tmp; spin_lock(&pgd_lock); @@ -1053,7 +1091,7 @@ * Check for races, another CPU might have split this page * up for us already: */ - tmp = _lookup_address_cpa(cpa, address, &level); + tmp = _lookup_address_cpa(cpa, address, &level, &nx, &rw); if (tmp != kpte) { spin_unlock(&pgd_lock); return 1; @@ -1278,7 +1316,7 @@ */ while (end - start >= PUD_SIZE) { - if (pud_large(*pud)) + if (pud_leaf(*pud)) pud_clear(pud); else unmap_pmd_range(pud, start, start + PUD_SIZE); @@ -1594,10 +1632,11 @@ int do_split, err; unsigned int level; pte_t *kpte, old_pte; + bool nx, rw; address = __cpa_addr(cpa, cpa->curpage); repeat: - kpte = _lookup_address_cpa(cpa, address, &level); + kpte = _lookup_address_cpa(cpa, address, &level, &nx, &rw); if (!kpte) return __cpa_process_fault(cpa, address, primary); @@ -1619,7 +1658,8 @@ new_prot = static_protections(new_prot, address, pfn, 1, 0, CPA_PROTECT); - new_prot = verify_rwx(old_prot, new_prot, address, pfn, 1); + new_prot = verify_rwx(old_prot, new_prot, address, pfn, 1, + nx, rw); new_prot = pgprot_clear_protnone_bits(new_prot); @@ -2156,8 +2196,9 @@ cpa_flush(&cpa, x86_platform.guest.enc_cache_flush_required()); /* Notify hypervisor that we are about to set/clr encryption attribute. */ - if (!x86_platform.guest.enc_status_change_prepare(addr, numpages, enc)) - return -EIO; + ret = x86_platform.guest.enc_status_change_prepare(addr, numpages, enc); + if (ret) + goto vmm_fail; ret = __change_page_attr_set_clr(&cpa, 1); @@ -2170,21 +2211,65 @@ */ cpa_flush(&cpa, 0); + if (ret) + return ret; + /* Notify hypervisor that we have successfully set/clr encryption attribute. */ - if (!ret) { - if (!x86_platform.guest.enc_status_change_finish(addr, numpages, enc)) - ret = -EIO; - } + ret = x86_platform.guest.enc_status_change_finish(addr, numpages, enc); + if (ret) + goto vmm_fail; + + return 0; + +vmm_fail: + WARN_ONCE(1, "CPA VMM failure to convert memory (addr=%p, numpages=%d) to %s: %d\n", + (void *)addr, numpages, enc ? "private" : "shared", ret); return ret; } +/* + * The lock serializes conversions between private and shared memory. + * + * It is taken for read on conversion. A write lock guarantees that no + * concurrent conversions are in progress. + */ +static DECLARE_RWSEM(mem_enc_lock); + +/* + * Stop new private<->shared conversions. + * + * Taking the exclusive mem_enc_lock waits for in-flight conversions to complete. + * The lock is not released to prevent new conversions from being started. + */ +bool set_memory_enc_stop_conversion(void) +{ + /* + * In a crash scenario, sleep is not allowed. Try to take the lock. + * Failure indicates that there is a race with the conversion. + */ + if (oops_in_progress) + return down_write_trylock(&mem_enc_lock); + + down_write(&mem_enc_lock); + + return true; +} + static int __set_memory_enc_dec(unsigned long addr, int numpages, bool enc) { - if (cc_platform_has(CC_ATTR_MEM_ENCRYPT)) - return __set_memory_enc_pgtable(addr, numpages, enc); + int ret = 0; - return 0; + if (cc_platform_has(CC_ATTR_MEM_ENCRYPT)) { + if (!down_read_trylock(&mem_enc_lock)) + return -EBUSY; + + ret = __set_memory_enc_pgtable(addr, numpages, enc); + + up_read(&mem_enc_lock); + } + + return ret; } int set_memory_encrypted(unsigned long addr, int numpages) --- linux-xilinx-6.8.0.orig/arch/x86/mm/pgtable.c +++ linux-xilinx-6.8.0/arch/x86/mm/pgtable.c @@ -631,6 +631,8 @@ pmd_t pmdp_invalidate_ad(struct vm_area_struct *vma, unsigned long address, pmd_t *pmdp) { + VM_WARN_ON_ONCE(!pmd_present(*pmdp)); + /* * No flush is necessary. Once an invalid PTE is established, the PTE's * access and dirty bits cannot be updated. @@ -777,7 +779,7 @@ */ int pud_clear_huge(pud_t *pud) { - if (pud_large(*pud)) { + if (pud_leaf(*pud)) { pud_clear(pud); return 1; } --- linux-xilinx-6.8.0.orig/arch/x86/mm/pti.c +++ linux-xilinx-6.8.0/arch/x86/mm/pti.c @@ -132,7 +132,7 @@ * Top-level entries added to init_mm's usermode pgd after boot * will not be automatically propagated to other mms. */ - if (!pgdp_maps_userspace(pgdp)) + if (!pgdp_maps_userspace(pgdp) || (pgd.pgd & _PAGE_NOPTISHADOW)) return pgd; /* @@ -217,7 +217,7 @@ pud = pud_offset(p4d, address); /* The user page tables do not use large mappings: */ - if (pud_large(*pud)) { + if (pud_leaf(*pud)) { WARN_ON(1); return NULL; } @@ -241,7 +241,7 @@ * * Returns a pointer to a PTE on success, or NULL on failure. */ -static pte_t *pti_user_pagetable_walk_pte(unsigned long address) +static pte_t *pti_user_pagetable_walk_pte(unsigned long address, bool late_text) { gfp_t gfp = (GFP_KERNEL | __GFP_NOTRACK | __GFP_ZERO); pmd_t *pmd; @@ -251,10 +251,15 @@ if (!pmd) return NULL; - /* We can't do anything sensible if we hit a large mapping. */ + /* Large PMD mapping found */ if (pmd_large(*pmd)) { - WARN_ON(1); - return NULL; + /* Clear the PMD if we hit a large mapping from the first round */ + if (late_text) { + set_pmd(pmd, __pmd(0)); + } else { + WARN_ON_ONCE(1); + return NULL; + } } if (pmd_none(*pmd)) { @@ -283,7 +288,7 @@ if (!pte || WARN_ON(level != PG_LEVEL_4K) || pte_none(*pte)) return; - target_pte = pti_user_pagetable_walk_pte(VSYSCALL_ADDR); + target_pte = pti_user_pagetable_walk_pte(VSYSCALL_ADDR, false); if (WARN_ON(!target_pte)) return; @@ -301,7 +306,7 @@ static void pti_clone_pgtable(unsigned long start, unsigned long end, - enum pti_clone_level level) + enum pti_clone_level level, bool late_text) { unsigned long addr; @@ -374,14 +379,14 @@ */ *target_pmd = *pmd; - addr += PMD_SIZE; + addr = round_up(addr + 1, PMD_SIZE); } else if (level == PTI_CLONE_PTE) { /* Walk the page-table down to the pte level */ pte = pte_offset_kernel(pmd, addr); if (pte_none(*pte)) { - addr += PAGE_SIZE; + addr = round_up(addr + 1, PAGE_SIZE); continue; } @@ -390,7 +395,7 @@ return; /* Allocate PTE in the user page-table */ - target_pte = pti_user_pagetable_walk_pte(addr); + target_pte = pti_user_pagetable_walk_pte(addr, late_text); if (WARN_ON(!target_pte)) return; @@ -401,7 +406,7 @@ /* Clone the PTE */ *target_pte = *pte; - addr += PAGE_SIZE; + addr = round_up(addr + 1, PAGE_SIZE); } else { BUG(); @@ -452,7 +457,7 @@ phys_addr_t pa = per_cpu_ptr_to_phys((void *)va); pte_t *target_pte; - target_pte = pti_user_pagetable_walk_pte(va); + target_pte = pti_user_pagetable_walk_pte(va, false); if (WARN_ON(!target_pte)) return; @@ -475,7 +480,7 @@ start = CPU_ENTRY_AREA_BASE; end = start + (PAGE_SIZE * CPU_ENTRY_AREA_PAGES); - pti_clone_pgtable(start, end, PTI_CLONE_PMD); + pti_clone_pgtable(start, end, PTI_CLONE_PMD, false); } #endif /* CONFIG_X86_64 */ @@ -492,11 +497,11 @@ /* * Clone the populated PMDs of the entry text and force it RO. */ -static void pti_clone_entry_text(void) +static void pti_clone_entry_text(bool late) { pti_clone_pgtable((unsigned long) __entry_text_start, (unsigned long) __entry_text_end, - PTI_CLONE_PMD); + PTI_LEVEL_KERNEL_IMAGE, late); } /* @@ -571,7 +576,7 @@ * pti_set_kernel_image_nonglobal() did to clear the * global bit. */ - pti_clone_pgtable(start, end_clone, PTI_LEVEL_KERNEL_IMAGE); + pti_clone_pgtable(start, end_clone, PTI_LEVEL_KERNEL_IMAGE, false); /* * pti_clone_pgtable() will set the global bit in any PMDs @@ -638,8 +643,15 @@ /* Undo all global bits from the init pagetables in head_64.S: */ pti_set_kernel_image_nonglobal(); + /* Replace some of the global bits just for shared entry text: */ - pti_clone_entry_text(); + /* + * This is very early in boot. Device and Late initcalls can do + * modprobe before free_initmem() and mark_readonly(). This + * pti_clone_entry_text() allows those user-mode-helpers to function, + * but notably the text is still RW. + */ + pti_clone_entry_text(false); pti_setup_espfix64(); pti_setup_vsyscall(); } @@ -656,10 +668,11 @@ if (!boot_cpu_has(X86_FEATURE_PTI)) return; /* - * We need to clone everything (again) that maps parts of the - * kernel image. + * This is after free_initmem() (all initcalls are done) and we've done + * mark_readonly(). Text is now NX which might've split some PMDs + * relative to the early clone. */ - pti_clone_entry_text(); + pti_clone_entry_text(true); pti_clone_kernel_text(); debug_checkwx_user(); --- linux-xilinx-6.8.0.orig/arch/x86/mm/tlb.c +++ linux-xilinx-6.8.0/arch/x86/mm/tlb.c @@ -19,6 +19,7 @@ #include #include #include +#include #include "mm_internal.h" @@ -497,9 +498,9 @@ { struct mm_struct *real_prev = this_cpu_read(cpu_tlbstate.loaded_mm); u16 prev_asid = this_cpu_read(cpu_tlbstate.loaded_mm_asid); - unsigned long new_lam = mm_lam_cr3_mask(next); bool was_lazy = this_cpu_read(cpu_tlbstate_shared.is_lazy); unsigned cpu = smp_processor_id(); + unsigned long new_lam; u64 next_tlb_gen; bool need_flush; u16 new_asid; @@ -622,20 +623,23 @@ cpumask_clear_cpu(cpu, mm_cpumask(real_prev)); } - /* - * Start remote flushes and then read tlb_gen. - */ + /* Start receiving IPIs and then read tlb_gen (and LAM below) */ if (next != &init_mm) cpumask_set_cpu(cpu, mm_cpumask(next)); next_tlb_gen = atomic64_read(&next->context.tlb_gen); choose_new_asid(next, next_tlb_gen, &new_asid, &need_flush); - /* Let nmi_uaccess_okay() know that we're changing CR3. */ + /* + * Indicate that CR3 is about to change. nmi_uaccess_okay() + * and others are sensitive to the window where mm_cpumask(), + * CR3 and cpu_tlbstate.loaded_mm are not all in sync. + */ this_cpu_write(cpu_tlbstate.loaded_mm, LOADED_MM_SWITCHING); barrier(); } + new_lam = mm_lam_cr3_mask(next); set_tlbstate_lam_mode(next); if (need_flush) { this_cpu_write(cpu_tlbstate.ctxs[new_asid].ctx_id, next->context.ctx_id); @@ -898,9 +902,51 @@ nr_invalidate); } -static bool tlb_is_not_lazy(int cpu, void *data) +static bool should_flush_tlb(int cpu, void *data) +{ + struct mm_struct *loaded_mm = per_cpu(cpu_tlbstate.loaded_mm, cpu); + struct flush_tlb_info *info = data; + + /* + * Order the 'loaded_mm' and 'is_lazy' against their + * write ordering in switch_mm_irqs_off(). Ensure + * 'is_lazy' is at least as new as 'loaded_mm'. + */ + smp_rmb(); + + /* Lazy TLB will get flushed at the next context switch. */ + if (per_cpu(cpu_tlbstate_shared.is_lazy, cpu)) + return false; + + /* No mm means kernel memory flush. */ + if (!info->mm) + return true; + + /* + * While switching, the remote CPU could have state from + * either the prev or next mm. Assume the worst and flush. + */ + if (loaded_mm == LOADED_MM_SWITCHING) + return true; + + /* The target mm is loaded, and the CPU is not lazy. */ + if (loaded_mm == info->mm) + return true; + + /* In cpumask, but not the loaded mm? Periodically remove by flushing. */ + if (info->trim_cpumask) + return true; + + return false; +} + +static bool should_trim_cpumask(struct mm_struct *mm) { - return !per_cpu(cpu_tlbstate_shared.is_lazy, cpu); + if (time_after(jiffies, READ_ONCE(mm->context.next_trim_cpumask))) { + WRITE_ONCE(mm->context.next_trim_cpumask, jiffies + HZ); + return true; + } + return false; } DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state_shared, cpu_tlbstate_shared); @@ -934,7 +980,7 @@ if (info->freed_tables) on_each_cpu_mask(cpumask, flush_tlb_func, (void *)info, true); else - on_each_cpu_cond_mask(tlb_is_not_lazy, flush_tlb_func, + on_each_cpu_cond_mask(should_flush_tlb, flush_tlb_func, (void *)info, 1, cpumask); } @@ -985,6 +1031,7 @@ info->freed_tables = freed_tables; info->new_tlb_gen = new_tlb_gen; info->initiating_cpu = smp_processor_id(); + info->trim_cpumask = 0; return info; } @@ -1027,6 +1074,7 @@ * flush_tlb_func_local() directly in this case. */ if (cpumask_any_but(mm_cpumask(mm), cpu) < nr_cpu_ids) { + info->trim_cpumask = should_trim_cpumask(mm); flush_tlb_multi(mm_cpumask(mm), info); } else if (mm == this_cpu_read(cpu_tlbstate.loaded_mm)) { lockdep_assert_irqs_enabled(); @@ -1146,7 +1194,7 @@ bool cpu_pcide; /* Flush 'addr' from the kernel PCID: */ - asm volatile("invlpg (%0)" ::"r" (addr) : "memory"); + invlpg(addr); /* If PTI is off there is no user PCID and nothing to flush. */ if (!static_cpu_has(X86_FEATURE_PTI)) --- linux-xilinx-6.8.0.orig/arch/x86/net/bpf_jit_comp.c +++ linux-xilinx-6.8.0/arch/x86/net/bpf_jit_comp.c @@ -64,6 +64,56 @@ return value <= 127 && value >= -128; } +/* + * Let us limit the positive offset to be <= 123. + * This is to ensure eventual jit convergence For the following patterns: + * ... + * pass4, final_proglen=4391: + * ... + * 20e: 48 85 ff test rdi,rdi + * 211: 74 7d je 0x290 + * 213: 48 8b 77 00 mov rsi,QWORD PTR [rdi+0x0] + * ... + * 289: 48 85 ff test rdi,rdi + * 28c: 74 17 je 0x2a5 + * 28e: e9 7f ff ff ff jmp 0x212 + * 293: bf 03 00 00 00 mov edi,0x3 + * Note that insn at 0x211 is 2-byte cond jump insn for offset 0x7d (-125) + * and insn at 0x28e is 5-byte jmp insn with offset -129. + * + * pass5, final_proglen=4392: + * ... + * 20e: 48 85 ff test rdi,rdi + * 211: 0f 84 80 00 00 00 je 0x297 + * 217: 48 8b 77 00 mov rsi,QWORD PTR [rdi+0x0] + * ... + * 28d: 48 85 ff test rdi,rdi + * 290: 74 1a je 0x2ac + * 292: eb 84 jmp 0x218 + * 294: bf 03 00 00 00 mov edi,0x3 + * Note that insn at 0x211 is 6-byte cond jump insn now since its offset + * becomes 0x80 based on previous round (0x293 - 0x213 = 0x80). + * At the same time, insn at 0x292 is a 2-byte insn since its offset is + * -124. + * + * pass6 will repeat the same code as in pass4 and this will prevent + * eventual convergence. + * + * To fix this issue, we need to break je (2->6 bytes) <-> jmp (5->2 bytes) + * cycle in the above. In the above example je offset <= 0x7c should work. + * + * For other cases, je <-> je needs offset <= 0x7b to avoid no convergence + * issue. For jmp <-> je and jmp <-> jmp cases, jmp offset <= 0x7c should + * avoid no convergence issue. + * + * Overall, let us limit the positive offset for 8bit cond/uncond jmp insn + * to maximum 123 (0x7b). This way, the jit pass can eventually converge. + */ +static bool is_imm8_jmp_offset(int value) +{ + return value <= 123 && value >= -128; +} + static bool is_simm32(s64 value) { return value == (s64)(s32)value; @@ -259,7 +309,7 @@ /* Number of bytes emit_patch() needs to generate instructions */ #define X86_PATCH_SIZE 5 /* Number of bytes that will be skipped on tailcall */ -#define X86_TAIL_CALL_OFFSET (11 + ENDBR_INSN_SIZE) +#define X86_TAIL_CALL_OFFSET (12 + ENDBR_INSN_SIZE) static void push_r12(u8 **pprog) { @@ -389,6 +439,37 @@ *pprog = prog; } +static void emit_prologue_tail_call(u8 **pprog, bool is_subprog) +{ + u8 *prog = *pprog; + + if (!is_subprog) { + /* cmp rax, MAX_TAIL_CALL_CNT */ + EMIT4(0x48, 0x83, 0xF8, MAX_TAIL_CALL_CNT); + EMIT2(X86_JA, 6); /* ja 6 */ + /* rax is tail_call_cnt if <= MAX_TAIL_CALL_CNT. + * case1: entry of main prog. + * case2: tail callee of main prog. + */ + EMIT1(0x50); /* push rax */ + /* Make rax as tail_call_cnt_ptr. */ + EMIT3(0x48, 0x89, 0xE0); /* mov rax, rsp */ + EMIT2(0xEB, 1); /* jmp 1 */ + /* rax is tail_call_cnt_ptr if > MAX_TAIL_CALL_CNT. + * case: tail callee of subprog. + */ + EMIT1(0x50); /* push rax */ + /* push tail_call_cnt_ptr */ + EMIT1(0x50); /* push rax */ + } else { /* is_subprog */ + /* rax is tail_call_cnt_ptr. */ + EMIT1(0x50); /* push rax */ + EMIT1(0x50); /* push rax */ + } + + *pprog = prog; +} + /* * Emit x86-64 prologue code for BPF program. * bpf_tail_call helper will skip the first X86_TAIL_CALL_OFFSET bytes @@ -410,10 +491,10 @@ /* When it's the entry of the whole tailcall context, * zeroing rax means initialising tail_call_cnt. */ - EMIT2(0x31, 0xC0); /* xor eax, eax */ + EMIT3(0x48, 0x31, 0xC0); /* xor rax, rax */ else /* Keep the same instruction layout. */ - EMIT2(0x66, 0x90); /* nop2 */ + emit_nops(&prog, 3); /* nop3 */ } /* Exception callback receives FP as third parameter */ if (is_exception_cb) { @@ -439,7 +520,7 @@ if (stack_depth) EMIT3_off32(0x48, 0x81, 0xEC, round_up(stack_depth, 8)); if (tail_call_reachable) - EMIT1(0x50); /* push rax */ + emit_prologue_tail_call(&prog, is_subprog); *pprog = prog; } @@ -466,7 +547,7 @@ static int emit_rsb_call(u8 **pprog, void *func, void *ip) { OPTIMIZER_HIDE_VAR(func); - x86_call_depth_emit_accounting(pprog, func); + ip += x86_call_depth_emit_accounting(pprog, func); return emit_patch(pprog, func, ip, 0xE8); } @@ -575,13 +656,15 @@ *pprog = prog; } +#define BPF_TAIL_CALL_CNT_PTR_STACK_OFF(stack) (-16 - round_up(stack, 8)) + /* * Generate the following code: * * ... bpf_tail_call(void *ctx, struct bpf_array *array, u64 index) ... * if (index >= array->map.max_entries) * goto out; - * if (tail_call_cnt++ >= MAX_TAIL_CALL_CNT) + * if ((*tcc_ptr)++ >= MAX_TAIL_CALL_CNT) * goto out; * prog = array->ptrs[index]; * if (prog == NULL) @@ -594,7 +677,7 @@ u32 stack_depth, u8 *ip, struct jit_context *ctx) { - int tcc_off = -4 - round_up(stack_depth, 8); + int tcc_ptr_off = BPF_TAIL_CALL_CNT_PTR_STACK_OFF(stack_depth); u8 *prog = *pprog, *start = *pprog; int offset; @@ -616,16 +699,14 @@ EMIT2(X86_JBE, offset); /* jbe out */ /* - * if (tail_call_cnt++ >= MAX_TAIL_CALL_CNT) + * if ((*tcc_ptr)++ >= MAX_TAIL_CALL_CNT) * goto out; */ - EMIT2_off32(0x8B, 0x85, tcc_off); /* mov eax, dword ptr [rbp - tcc_off] */ - EMIT3(0x83, 0xF8, MAX_TAIL_CALL_CNT); /* cmp eax, MAX_TAIL_CALL_CNT */ + EMIT3_off32(0x48, 0x8B, 0x85, tcc_ptr_off); /* mov rax, qword ptr [rbp - tcc_ptr_off] */ + EMIT4(0x48, 0x83, 0x38, MAX_TAIL_CALL_CNT); /* cmp qword ptr [rax], MAX_TAIL_CALL_CNT */ offset = ctx->tail_call_indirect_label - (prog + 2 - start); EMIT2(X86_JAE, offset); /* jae out */ - EMIT3(0x83, 0xC0, 0x01); /* add eax, 1 */ - EMIT2_off32(0x89, 0x85, tcc_off); /* mov dword ptr [rbp - tcc_off], eax */ /* prog = array->ptrs[index]; */ EMIT4_off32(0x48, 0x8B, 0x8C, 0xD6, /* mov rcx, [rsi + rdx * 8 + offsetof(...)] */ @@ -640,6 +721,9 @@ offset = ctx->tail_call_indirect_label - (prog + 2 - start); EMIT2(X86_JE, offset); /* je out */ + /* Inc tail_call_cnt if the slot is populated. */ + EMIT4(0x48, 0x83, 0x00, 0x01); /* add qword ptr [rax], 1 */ + if (bpf_prog->aux->exception_boundary) { pop_callee_regs(&prog, all_callee_regs_used); pop_r12(&prog); @@ -647,6 +731,11 @@ pop_callee_regs(&prog, callee_regs_used); } + /* Pop tail_call_cnt_ptr. */ + EMIT1(0x58); /* pop rax */ + /* Pop tail_call_cnt, if it's main prog. + * Pop tail_call_cnt_ptr, if it's subprog. + */ EMIT1(0x58); /* pop rax */ if (stack_depth) EMIT3_off32(0x48, 0x81, 0xC4, /* add rsp, sd */ @@ -675,21 +764,19 @@ bool *callee_regs_used, u32 stack_depth, struct jit_context *ctx) { - int tcc_off = -4 - round_up(stack_depth, 8); + int tcc_ptr_off = BPF_TAIL_CALL_CNT_PTR_STACK_OFF(stack_depth); u8 *prog = *pprog, *start = *pprog; int offset; /* - * if (tail_call_cnt++ >= MAX_TAIL_CALL_CNT) + * if ((*tcc_ptr)++ >= MAX_TAIL_CALL_CNT) * goto out; */ - EMIT2_off32(0x8B, 0x85, tcc_off); /* mov eax, dword ptr [rbp - tcc_off] */ - EMIT3(0x83, 0xF8, MAX_TAIL_CALL_CNT); /* cmp eax, MAX_TAIL_CALL_CNT */ + EMIT3_off32(0x48, 0x8B, 0x85, tcc_ptr_off); /* mov rax, qword ptr [rbp - tcc_ptr_off] */ + EMIT4(0x48, 0x83, 0x38, MAX_TAIL_CALL_CNT); /* cmp qword ptr [rax], MAX_TAIL_CALL_CNT */ offset = ctx->tail_call_direct_label - (prog + 2 - start); EMIT2(X86_JAE, offset); /* jae out */ - EMIT3(0x83, 0xC0, 0x01); /* add eax, 1 */ - EMIT2_off32(0x89, 0x85, tcc_off); /* mov dword ptr [rbp - tcc_off], eax */ poke->tailcall_bypass = ip + (prog - start); poke->adj_off = X86_TAIL_CALL_OFFSET; @@ -699,6 +786,9 @@ emit_jump(&prog, (u8 *)poke->tailcall_target + X86_PATCH_SIZE, poke->tailcall_bypass); + /* Inc tail_call_cnt if the slot is populated. */ + EMIT4(0x48, 0x83, 0x00, 0x01); /* add qword ptr [rax], 1 */ + if (bpf_prog->aux->exception_boundary) { pop_callee_regs(&prog, all_callee_regs_used); pop_r12(&prog); @@ -706,6 +796,11 @@ pop_callee_regs(&prog, callee_regs_used); } + /* Pop tail_call_cnt_ptr. */ + EMIT1(0x58); /* pop rax */ + /* Pop tail_call_cnt, if it's main prog. + * Pop tail_call_cnt_ptr, if it's subprog. + */ EMIT1(0x58); /* pop rax */ if (stack_depth) EMIT3_off32(0x48, 0x81, 0xC4, round_up(stack_depth, 8)); @@ -1133,9 +1228,11 @@ #define INSN_SZ_DIFF (((addrs[i] - addrs[i - 1]) - (prog - temp))) -/* mov rax, qword ptr [rbp - rounded_stack_depth - 8] */ -#define RESTORE_TAIL_CALL_CNT(stack) \ - EMIT3_off32(0x48, 0x8B, 0x85, -round_up(stack, 8) - 8) +#define __LOAD_TCC_PTR(off) \ + EMIT3_off32(0x48, 0x8B, 0x85, off) +/* mov rax, qword ptr [rbp - rounded_stack_depth - 16] */ +#define LOAD_TAIL_CALL_CNT_PTR(stack) \ + __LOAD_TCC_PTR(BPF_TAIL_CALL_CNT_PTR_STACK_OFF(stack)) static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image, u8 *rw_image, int oldproglen, struct jit_context *ctx, bool jmp_padding) @@ -1585,36 +1682,41 @@ if (BPF_MODE(insn->code) == BPF_PROBE_MEM || BPF_MODE(insn->code) == BPF_PROBE_MEMSX) { /* Conservatively check that src_reg + insn->off is a kernel address: - * src_reg + insn->off >= TASK_SIZE_MAX + PAGE_SIZE - * src_reg is used as scratch for src_reg += insn->off and restored - * after emit_ldx if necessary + * src_reg + insn->off > TASK_SIZE_MAX + PAGE_SIZE + * and + * src_reg + insn->off < VSYSCALL_ADDR */ - u64 limit = TASK_SIZE_MAX + PAGE_SIZE; + u64 limit = TASK_SIZE_MAX + PAGE_SIZE - VSYSCALL_ADDR; u8 *end_of_jmp; - /* At end of these emitted checks, insn->off will have been added - * to src_reg, so no need to do relative load with insn->off offset - */ - insn_off = 0; + /* movabsq r10, VSYSCALL_ADDR */ + emit_mov_imm64(&prog, BPF_REG_AX, (long)VSYSCALL_ADDR >> 32, + (u32)(long)VSYSCALL_ADDR); - /* movabsq r11, limit */ - EMIT2(add_1mod(0x48, AUX_REG), add_1reg(0xB8, AUX_REG)); - EMIT((u32)limit, 4); - EMIT(limit >> 32, 4); + /* mov src_reg, r11 */ + EMIT_mov(AUX_REG, src_reg); if (insn->off) { - /* add src_reg, insn->off */ - maybe_emit_1mod(&prog, src_reg, true); - EMIT2_off32(0x81, add_1reg(0xC0, src_reg), insn->off); + /* add r11, insn->off */ + maybe_emit_1mod(&prog, AUX_REG, true); + EMIT2_off32(0x81, add_1reg(0xC0, AUX_REG), insn->off); } - /* cmp src_reg, r11 */ - maybe_emit_mod(&prog, src_reg, AUX_REG, true); - EMIT2(0x39, add_2reg(0xC0, src_reg, AUX_REG)); + /* sub r11, r10 */ + maybe_emit_mod(&prog, AUX_REG, BPF_REG_AX, true); + EMIT2(0x29, add_2reg(0xC0, AUX_REG, BPF_REG_AX)); + + /* movabsq r10, limit */ + emit_mov_imm64(&prog, BPF_REG_AX, (long)limit >> 32, + (u32)(long)limit); + + /* cmp r10, r11 */ + maybe_emit_mod(&prog, AUX_REG, BPF_REG_AX, true); + EMIT2(0x39, add_2reg(0xC0, AUX_REG, BPF_REG_AX)); - /* if unsigned '>=', goto load */ - EMIT2(X86_JAE, 0); + /* if unsigned '>', goto load */ + EMIT2(X86_JA, 0); end_of_jmp = prog; /* xor dst_reg, dst_reg */ @@ -1640,18 +1742,6 @@ /* populate jmp_offset for JMP above */ start_of_ldx[-1] = prog - start_of_ldx; - if (insn->off && src_reg != dst_reg) { - /* sub src_reg, insn->off - * Restore src_reg after "add src_reg, insn->off" in prev - * if statement. But if src_reg == dst_reg, emit_ldx - * above already clobbered src_reg, so no need to restore. - * If add src_reg, insn->off was unnecessary, no need to - * restore either. - */ - maybe_emit_1mod(&prog, src_reg, true); - EMIT2_off32(0x81, add_1reg(0xE8, src_reg), insn->off); - } - if (!bpf_prog->aux->extable) break; @@ -1754,7 +1844,7 @@ func = (u8 *) __bpf_call_base + imm32; if (tail_call_reachable) { - RESTORE_TAIL_CALL_CNT(bpf_prog->aux->stack_depth); + LOAD_TAIL_CALL_CNT_PTR(bpf_prog->aux->stack_depth); if (!imm32) return -EINVAL; offs = 7 + x86_call_depth_emit_accounting(&prog, func); @@ -1910,7 +2000,7 @@ return -EFAULT; } jmp_offset = addrs[i + insn->off] - addrs[i]; - if (is_imm8(jmp_offset)) { + if (is_imm8_jmp_offset(jmp_offset)) { if (jmp_padding) { /* To keep the jmp_offset valid, the extra bytes are * padded before the jump insn, so we subtract the @@ -1992,7 +2082,7 @@ break; } emit_jmp: - if (is_imm8(jmp_offset)) { + if (is_imm8_jmp_offset(jmp_offset)) { if (jmp_padding) { /* To avoid breaking jmp_offset, the extra bytes * are padded before the actual jmp insn, so @@ -2430,6 +2520,10 @@ return 0; } +/* mov rax, qword ptr [rbp - rounded_stack_depth - 8] */ +#define LOAD_TRAMP_TAIL_CALL_CNT_PTR(stack) \ + __LOAD_TCC_PTR(-round_up(stack, 8) - 8) + /* Example: * __be16 eth_type_trans(struct sk_buff *skb, struct net_device *dev); * its 'struct btf_func_model' will be nr_args=2 @@ -2550,7 +2644,7 @@ * [ ... ] * [ stack_arg2 ] * RBP - arg_stack_off [ stack_arg1 ] - * RSP [ tail_call_cnt ] BPF_TRAMP_F_TAIL_CALL_CTX + * RSP [ tail_call_cnt_ptr ] BPF_TRAMP_F_TAIL_CALL_CTX */ /* room for return value of orig_call or fentry prog */ @@ -2679,10 +2773,10 @@ save_args(m, &prog, arg_stack_off, true); if (flags & BPF_TRAMP_F_TAIL_CALL_CTX) { - /* Before calling the original function, restore the - * tail_call_cnt from stack to rax. + /* Before calling the original function, load the + * tail_call_cnt_ptr from stack to rax. */ - RESTORE_TAIL_CALL_CNT(stack_size); + LOAD_TRAMP_TAIL_CALL_CNT_PTR(stack_size); } if (flags & BPF_TRAMP_F_ORIG_STACK) { @@ -2741,10 +2835,10 @@ goto cleanup; } } else if (flags & BPF_TRAMP_F_TAIL_CALL_CTX) { - /* Before running the original function, restore the - * tail_call_cnt from stack to rax. + /* Before running the original function, load the + * tail_call_cnt_ptr from stack to rax. */ - RESTORE_TAIL_CALL_CNT(stack_size); + LOAD_TRAMP_TAIL_CALL_CNT_PTR(stack_size); } /* restore return value of orig_call or fentry prog back into RAX */ --- linux-xilinx-6.8.0.orig/arch/x86/net/bpf_jit_comp32.c +++ linux-xilinx-6.8.0/arch/x86/net/bpf_jit_comp32.c @@ -2600,8 +2600,7 @@ if (bpf_jit_enable > 1) bpf_jit_dump(prog->len, proglen, pass + 1, image); - if (image) { - bpf_jit_binary_lock_ro(header); + if (image && !bpf_jit_binary_lock_ro(header)) { prog->bpf_func = (void *)image; prog->jited = 1; prog->jited_len = proglen; --- linux-xilinx-6.8.0.orig/arch/x86/pci/acpi.c +++ linux-xilinx-6.8.0/arch/x86/pci/acpi.c @@ -250,6 +250,125 @@ pr_info("Please notify linux-pci@vger.kernel.org so future kernels can do this automatically\n"); } +/* + * Check if pdev is part of a PCIe switch that is directly below the + * specified bridge. + */ +static bool pcie_switch_directly_under(struct pci_dev *bridge, + struct pci_dev *pdev) +{ + struct pci_dev *parent = pci_upstream_bridge(pdev); + + /* If the device doesn't have a parent, it's not under anything */ + if (!parent) + return false; + + /* + * If the device has a PCIe type, check if it is below the + * corresponding PCIe switch components (if applicable). Then check + * if its upstream port is directly beneath the specified bridge. + */ + switch (pci_pcie_type(pdev)) { + case PCI_EXP_TYPE_UPSTREAM: + return parent == bridge; + + case PCI_EXP_TYPE_DOWNSTREAM: + if (pci_pcie_type(parent) != PCI_EXP_TYPE_UPSTREAM) + return false; + parent = pci_upstream_bridge(parent); + return parent == bridge; + + case PCI_EXP_TYPE_ENDPOINT: + if (pci_pcie_type(parent) != PCI_EXP_TYPE_DOWNSTREAM) + return false; + parent = pci_upstream_bridge(parent); + if (!parent || pci_pcie_type(parent) != PCI_EXP_TYPE_UPSTREAM) + return false; + parent = pci_upstream_bridge(parent); + return parent == bridge; + } + + return false; +} + +static bool pcie_has_usb4_host_interface(struct pci_dev *pdev) +{ + struct fwnode_handle *fwnode; + + /* + * For USB4, the tunneled PCIe Root or Downstream Ports are marked + * with the "usb4-host-interface" ACPI property, so we look for + * that first. This should cover most cases. + */ + fwnode = fwnode_find_reference(dev_fwnode(&pdev->dev), + "usb4-host-interface", 0); + if (!IS_ERR(fwnode)) { + fwnode_handle_put(fwnode); + return true; + } + + /* + * Any integrated Thunderbolt 3/4 PCIe Root Ports from Intel + * before Alder Lake do not have the "usb4-host-interface" + * property so we use their PCI IDs instead. All these are + * tunneled. This list is not expected to grow. + */ + if (pdev->vendor == PCI_VENDOR_ID_INTEL) { + switch (pdev->device) { + /* Ice Lake Thunderbolt 3 PCIe Root Ports */ + case 0x8a1d: + case 0x8a1f: + case 0x8a21: + case 0x8a23: + /* Tiger Lake-LP Thunderbolt 4 PCIe Root Ports */ + case 0x9a23: + case 0x9a25: + case 0x9a27: + case 0x9a29: + /* Tiger Lake-H Thunderbolt 4 PCIe Root Ports */ + case 0x9a2b: + case 0x9a2d: + case 0x9a2f: + case 0x9a31: + return true; + } + } + + return false; +} + +bool arch_pci_dev_is_removable(struct pci_dev *pdev) +{ + struct pci_dev *parent, *root; + + /* pdev without a parent or Root Port is never tunneled */ + parent = pci_upstream_bridge(pdev); + if (!parent) + return false; + root = pcie_find_root_port(pdev); + if (!root) + return false; + + /* Internal PCIe devices are not tunneled */ + if (!root->external_facing) + return false; + + /* Anything directly behind a "usb4-host-interface" is tunneled */ + if (pcie_has_usb4_host_interface(parent)) + return true; + + /* + * Check if this is a discrete Thunderbolt/USB4 controller that is + * directly behind the non-USB4 PCIe Root Port marked as + * "ExternalFacingPort". Those are not behind a PCIe tunnel. + */ + if (pcie_switch_directly_under(root, pdev)) + return false; + + /* PCIe devices after the discrete chip are tunneled */ + return true; +} + #ifdef CONFIG_PCI_MMCONFIG static int check_segment(u16 seg, struct device *dev, char *estr) { --- linux-xilinx-6.8.0.orig/arch/x86/pci/common.c +++ linux-xilinx-6.8.0/arch/x86/pci/common.c @@ -34,6 +34,7 @@ #endif int pcibios_last_bus = -1; unsigned long pirq_table_addr; +unsigned int pci_early_clear_msi; const struct pci_raw_ops *__read_mostly raw_pci_ops; const struct pci_raw_ops *__read_mostly raw_pci_ext_ops; @@ -614,6 +615,9 @@ } else if (!strcmp(str, "skip_isa_align")) { pci_probe |= PCI_CAN_SKIP_ISA_ALIGN; return NULL; + } else if (!strcmp(str, "clearmsi")) { + pci_early_clear_msi = 1; + return NULL; } else if (!strcmp(str, "noioapicquirk")) { noioapicquirk = 1; return NULL; --- linux-xilinx-6.8.0.orig/arch/x86/pci/early.c +++ linux-xilinx-6.8.0/arch/x86/pci/early.c @@ -51,6 +51,31 @@ outw(val, 0xcfc + (offset&2)); } +u32 pci_early_find_cap(int bus, int slot, int func, int cap) +{ + int bytes; + u8 pos; + + if (!(read_pci_config_16(bus, slot, func, PCI_STATUS) & + PCI_STATUS_CAP_LIST)) + return 0; + + pos = read_pci_config_byte(bus, slot, func, PCI_CAPABILITY_LIST); + for (bytes = 0; bytes < 48 && pos >= 0x40; bytes++) { + u8 id; + + pos &= ~3; + id = read_pci_config_byte(bus, slot, func, pos+PCI_CAP_LIST_ID); + if (id == 0xff) + break; + if (id == cap) + return pos; + pos = read_pci_config_byte(bus, slot, func, + pos+PCI_CAP_LIST_NEXT); + } + return 0; +} + int early_pci_allowed(void) { return (pci_probe & (PCI_PROBE_CONF1|PCI_PROBE_NOEARLY)) == --- linux-xilinx-6.8.0.orig/arch/x86/pci/fixup.c +++ linux-xilinx-6.8.0/arch/x86/pci/fixup.c @@ -907,6 +907,54 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x5ad6, chromeos_save_apl_pci_l1ss_capability); DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, 0x5ad6, chromeos_fixup_apl_pci_l1ss_capability); +/* + * Disable D3cold on Asus B1400 PCI-NVMe bridge + * + * On this platform with VMD off, the NVMe device cannot successfully power + * back on from D3cold. This appears to be an untested transition by the + * vendor: Windows leaves the NVMe and parent bridge in D0 during suspend. + * + * We disable D3cold on the parent bridge for simplicity, and the fact that + * both parent bridge and NVMe device share the same power resource. + * + * This is only needed on BIOS versions before 308; the newer versions flip + * StorageD3Enable from 1 to 0. + */ +static const struct dmi_system_id asus_nvme_broken_d3cold_table[] = { + { + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), + DMI_MATCH(DMI_BIOS_VERSION, "B1400CEAE.304"), + }, + }, + { + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), + DMI_MATCH(DMI_BIOS_VERSION, "B1400CEAE.305"), + }, + }, + { + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), + DMI_MATCH(DMI_BIOS_VERSION, "B1400CEAE.306"), + }, + }, + { + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), + DMI_MATCH(DMI_BIOS_VERSION, "B1400CEAE.307"), + }, + }, + {} +}; + +static void asus_disable_nvme_d3cold(struct pci_dev *pdev) +{ + if (dmi_check_system(asus_nvme_broken_d3cold_table) > 0) + pci_d3cold_disable(pdev); +} +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x9a09, asus_disable_nvme_d3cold); + #ifdef CONFIG_SUSPEND /* * Root Ports on some AMD SoCs advertise PME_Support for D3hot and D3cold, but @@ -932,7 +980,7 @@ return; rp = pcie_find_root_port(dev); - if (!rp->pm_cap) + if (!rp || !rp->pm_cap) return; rp->pme_support &= ~((PCI_PM_CAP_PME_D3hot|PCI_PM_CAP_PME_D3cold) >> @@ -946,7 +994,7 @@ u16 pmc; rp = pcie_find_root_port(dev); - if (!rp->pm_cap) + if (!rp || !rp->pm_cap) return; pci_read_config_word(rp, rp->pm_cap + PCI_PM_PMC, &pmc); @@ -962,4 +1010,34 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_AMD, 0x1668, amd_rp_pme_resume); DECLARE_PCI_FIXUP_SUSPEND(PCI_VENDOR_ID_AMD, 0x1669, amd_rp_pme_suspend); DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_AMD, 0x1669, amd_rp_pme_resume); + +/* + * Putting PCIe root ports on Ryzen SoCs with USB4 controllers into D3hot + * may cause problems when the system attempts wake up from s2idle. + * + * On the TUXEDO Sirius 16 Gen 1 with a specific old BIOS this manifests as + * a system hang. + */ +static const struct dmi_system_id quirk_tuxeo_rp_d3_dmi_table[] = { + { + .matches = { + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "TUXEDO"), + DMI_EXACT_MATCH(DMI_BOARD_NAME, "APX958"), + DMI_EXACT_MATCH(DMI_BIOS_VERSION, "V1.00A00_20240108"), + }, + }, + {} +}; + +static void quirk_tuxeo_rp_d3(struct pci_dev *pdev) +{ + struct pci_dev *root_pdev; + + if (dmi_check_system(quirk_tuxeo_rp_d3_dmi_table)) { + root_pdev = pcie_find_root_port(pdev); + if (root_pdev) + root_pdev->dev_flags |= PCI_DEV_FLAGS_NO_D3; + } +} +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x1502, quirk_tuxeo_rp_d3); #endif /* CONFIG_SUSPEND */ --- linux-xilinx-6.8.0.orig/arch/x86/pci/intel_mid_pci.c +++ linux-xilinx-6.8.0/arch/x86/pci/intel_mid_pci.c @@ -233,9 +233,9 @@ return 0; ret = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi); - if (ret < 0) { + if (ret) { dev_warn(&dev->dev, "Failed to read interrupt line: %d\n", ret); - return ret; + return pcibios_err_to_errno(ret); } id = x86_match_cpu(intel_mid_cpu_ids); --- linux-xilinx-6.8.0.orig/arch/x86/pci/mmconfig-shared.c +++ linux-xilinx-6.8.0/arch/x86/pci/mmconfig-shared.c @@ -518,7 +518,34 @@ { struct resource *conflict; - if (!early && !acpi_disabled) { + if (early) { + + /* + * Don't try to do this check unless configuration type 1 + * is available. How about type 2? + */ + + /* + * 946f2ee5c731 ("Check that MCFG points to an e820 + * reserved area") added this E820 check in 2006 to work + * around BIOS defects. + * + * Per PCI Firmware r3.3, sec 4.1.2, ECAM space must be + * reserved by a PNP0C02 resource, but it need not be + * mentioned in E820. Before the ACPI interpreter is + * available, we can't check for PNP0C02 resources, so + * there's no reliable way to verify the region in this + * early check. Keep it only for the old machines that + * motivated 946f2ee5c731. + */ + if (dmi_get_bios_year() < 2016 && raw_pci_ops) + return is_mmconf_reserved(e820__mapped_all, cfg, dev, + "E820 entry"); + + return true; + } + + if (!acpi_disabled) { if (is_mmconf_reserved(is_acpi_reserved, cfg, dev, "ACPI motherboard resource")) return true; @@ -551,16 +578,7 @@ * For MCFG information constructed from hotpluggable host bridge's * _CBA method, just assume it's reserved. */ - if (pci_mmcfg_running_state) - return true; - - /* Don't try to do this check unless configuration - type 1 is available. how about type 2 ?*/ - if (raw_pci_ops) - return is_mmconf_reserved(e820__mapped_all, cfg, dev, - "E820 entry"); - - return false; + return pci_mmcfg_running_state; } static void __init pci_mmcfg_reject_broken(int early) --- linux-xilinx-6.8.0.orig/arch/x86/pci/xen.c +++ linux-xilinx-6.8.0/arch/x86/pci/xen.c @@ -38,10 +38,10 @@ u8 gsi; rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi); - if (rc < 0) { + if (rc) { dev_warn(&dev->dev, "Xen PCI: failed to read interrupt line: %d\n", rc); - return rc; + return pcibios_err_to_errno(rc); } /* In PV DomU the Xen PCI backend puts the PIRQ in the interrupt line.*/ pirq = gsi; --- linux-xilinx-6.8.0.orig/arch/x86/platform/efi/memmap.c +++ linux-xilinx-6.8.0/arch/x86/platform/efi/memmap.c @@ -92,12 +92,22 @@ */ int __init efi_memmap_install(struct efi_memory_map_data *data) { + unsigned long size = efi.memmap.desc_size * efi.memmap.nr_map; + unsigned long flags = efi.memmap.flags; + u64 phys = efi.memmap.phys_map; + int ret; + efi_memmap_unmap(); if (efi_enabled(EFI_PARAVIRT)) return 0; - return __efi_memmap_init(data); + ret = __efi_memmap_init(data); + if (ret) + return ret; + + __efi_memmap_free(phys, size, flags); + return 0; } /** --- linux-xilinx-6.8.0.orig/arch/x86/platform/intel/iosf_mbi.c +++ linux-xilinx-6.8.0/arch/x86/platform/intel/iosf_mbi.c @@ -62,7 +62,7 @@ fail_read: dev_err(&mbi_pdev->dev, "PCI config access failed with %d\n", result); - return result; + return pcibios_err_to_errno(result); } static int iosf_mbi_pci_write_mdr(u32 mcrx, u32 mcr, u32 mdr) @@ -91,7 +91,7 @@ fail_write: dev_err(&mbi_pdev->dev, "PCI config access failed with %d\n", result); - return result; + return pcibios_err_to_errno(result); } int iosf_mbi_read(u8 port, u8 opcode, u32 offset, u32 *mdr) --- linux-xilinx-6.8.0.orig/arch/x86/platform/pvh/enlighten.c +++ linux-xilinx-6.8.0/arch/x86/platform/pvh/enlighten.c @@ -74,6 +74,9 @@ } else xen_raw_printk("Warning: Can fit ISA range into e820\n"); + if (xen_guest) + xen_reserve_extra_memory(&pvh_bootparams); + pvh_bootparams.hdr.cmd_line_ptr = pvh_start_info.cmdline_paddr; --- linux-xilinx-6.8.0.orig/arch/x86/power/hibernate.c +++ linux-xilinx-6.8.0/arch/x86/power/hibernate.c @@ -170,7 +170,7 @@ goto out; } pud = pud_offset(p4d, relocated_restore_code); - if (pud_large(*pud)) { + if (pud_leaf(*pud)) { set_pud(pud, __pud(pud_val(*pud) & ~_PAGE_NX)); goto out; } --- linux-xilinx-6.8.0.orig/arch/x86/purgatory/Makefile +++ linux-xilinx-6.8.0/arch/x86/purgatory/Makefile @@ -42,7 +42,8 @@ # make up the standalone purgatory.ro PURGATORY_CFLAGS_REMOVE := -mcmodel=kernel -PURGATORY_CFLAGS := -mcmodel=large -ffreestanding -fno-zero-initialized-in-bss -g0 +PURGATORY_CFLAGS := -mcmodel=small -ffreestanding -fno-zero-initialized-in-bss -g0 +PURGATORY_CFLAGS += -fpic -fvisibility=hidden PURGATORY_CFLAGS += $(DISABLE_STACKLEAK_PLUGIN) -DDISABLE_BRANCH_PROFILING PURGATORY_CFLAGS += -fno-stack-protector --- linux-xilinx-6.8.0.orig/arch/x86/tools/relocs.c +++ linux-xilinx-6.8.0/arch/x86/tools/relocs.c @@ -653,6 +653,14 @@ if (!(sec_applies->shdr.sh_flags & SHF_ALLOC)) { continue; } + /* + * Do not perform relocations in .notes section; any + * values there are meant for pre-boot consumption (e.g. + * startup_xen). + */ + if (sec_applies->shdr.sh_type == SHT_NOTE) { + continue; + } sh_symtab = sec_symtab->symtab; sym_strtab = sec_symtab->link->strtab; for (j = 0; j < sec->shdr.sh_size/sizeof(Elf_Rel); j++) { @@ -738,6 +746,15 @@ if (!(sec_applies->shdr.sh_flags & SHF_ALLOC)) { continue; } + + /* + * Do not perform relocations in .notes sections; any + * values there are meant for pre-boot consumption (e.g. + * startup_xen). + */ + if (sec_applies->shdr.sh_type == SHT_NOTE) + continue; + sh_symtab = sec_symtab->symtab; sym_strtab = sec_symtab->link->strtab; for (j = 0; j < sec->shdr.sh_size/sizeof(Elf_Rel); j++) { --- linux-xilinx-6.8.0.orig/arch/x86/um/shared/sysdep/archsetjmp.h +++ linux-xilinx-6.8.0/arch/x86/um/shared/sysdep/archsetjmp.h @@ -1,6 +1,13 @@ /* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __X86_UM_SYSDEP_ARCHSETJMP_H +#define __X86_UM_SYSDEP_ARCHSETJMP_H + #ifdef __i386__ #include "archsetjmp_32.h" #else #include "archsetjmp_64.h" #endif + +unsigned long get_thread_reg(int reg, jmp_buf *buf); + +#endif /* __X86_UM_SYSDEP_ARCHSETJMP_H */ --- linux-xilinx-6.8.0.orig/arch/x86/um/sys_call_table_32.c +++ linux-xilinx-6.8.0/arch/x86/um/sys_call_table_32.c @@ -9,6 +9,10 @@ #include #include +extern asmlinkage long sys_ni_syscall(unsigned long, unsigned long, + unsigned long, unsigned long, + unsigned long, unsigned long); + /* * Below you can see, in terms of #define's, the differences between the x86-64 * and the UML syscall table. @@ -22,15 +26,13 @@ #define sys_vm86 sys_ni_syscall #define __SYSCALL_WITH_COMPAT(nr, native, compat) __SYSCALL(nr, native) +#define __SYSCALL_NORETURN __SYSCALL #define __SYSCALL(nr, sym) extern asmlinkage long sym(unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long); #include +#undef __SYSCALL -#undef __SYSCALL #define __SYSCALL(nr, sym) sym, - -extern asmlinkage long sys_ni_syscall(unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long); - const sys_call_ptr_t sys_call_table[] ____cacheline_aligned = { #include }; --- linux-xilinx-6.8.0.orig/arch/x86/um/sys_call_table_64.c +++ linux-xilinx-6.8.0/arch/x86/um/sys_call_table_64.c @@ -9,6 +9,10 @@ #include #include +extern asmlinkage long sys_ni_syscall(unsigned long, unsigned long, + unsigned long, unsigned long, + unsigned long, unsigned long); + /* * Below you can see, in terms of #define's, the differences between the x86-64 * and the UML syscall table. @@ -18,14 +22,13 @@ #define sys_iopl sys_ni_syscall #define sys_ioperm sys_ni_syscall +#define __SYSCALL_NORETURN __SYSCALL + #define __SYSCALL(nr, sym) extern asmlinkage long sym(unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long); #include +#undef __SYSCALL -#undef __SYSCALL #define __SYSCALL(nr, sym) sym, - -extern asmlinkage long sys_ni_syscall(unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long); - const sys_call_ptr_t sys_call_table[] ____cacheline_aligned = { #include }; --- linux-xilinx-6.8.0.orig/arch/x86/xen/enlighten.c +++ linux-xilinx-6.8.0/arch/x86/xen/enlighten.c @@ -5,7 +5,9 @@ #endif #include #include +#include #include +#include #include #include @@ -25,7 +27,8 @@ #include "smp.h" #include "pmu.h" -EXPORT_SYMBOL_GPL(hypercall_page); +DEFINE_STATIC_CALL(xen_hypercall, xen_hypercall_hvm); +EXPORT_STATIC_CALL_TRAMP(xen_hypercall); /* * Pointer to the xen_vcpu_info structure or @@ -72,6 +75,67 @@ */ struct shared_info *HYPERVISOR_shared_info = &xen_dummy_shared_info; +static __ref void xen_get_vendor(void) +{ + init_cpu_devs(); + cpu_detect(&boot_cpu_data); + get_cpu_vendor(&boot_cpu_data); +} + +void xen_hypercall_setfunc(void) +{ + if (static_call_query(xen_hypercall) != xen_hypercall_hvm) + return; + + if ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD || + boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)) + static_call_update(xen_hypercall, xen_hypercall_amd); + else + static_call_update(xen_hypercall, xen_hypercall_intel); +} + +/* + * Evaluate processor vendor in order to select the correct hypercall + * function for HVM/PVH guests. + * Might be called very early in boot before vendor has been set by + * early_cpu_init(). + */ +noinstr void *__xen_hypercall_setfunc(void) +{ + void (*func)(void); + + /* + * Xen is supported only on CPUs with CPUID, so testing for + * X86_FEATURE_CPUID is a test for early_cpu_init() having been + * run. + * + * Note that __xen_hypercall_setfunc() is noinstr only due to a nasty + * dependency chain: it is being called via the xen_hypercall static + * call when running as a PVH or HVM guest. Hypercalls need to be + * noinstr due to PV guests using hypercalls in noinstr code. So we + * can safely tag the function body as "instrumentation ok", since + * the PV guest requirement is not of interest here (xen_get_vendor() + * calls noinstr functions, and static_call_update_early() might do + * so, too). + */ + instrumentation_begin(); + + if (!boot_cpu_has(X86_FEATURE_CPUID)) + xen_get_vendor(); + + if ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD || + boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)) + func = xen_hypercall_amd; + else + func = xen_hypercall_intel; + + static_call_update_early(xen_hypercall, func); + + instrumentation_end(); + + return func; +} + static int xen_cpu_up_online(unsigned int cpu) { xen_init_lock_cpu(cpu); @@ -350,3 +414,67 @@ } EXPORT_SYMBOL(xen_arch_unregister_cpu); #endif + +/* Amount of extra memory space we add to the e820 ranges */ +struct xen_memory_region xen_extra_mem[XEN_EXTRA_MEM_MAX_REGIONS] __initdata; + +void __init xen_add_extra_mem(unsigned long start_pfn, unsigned long n_pfns) +{ + unsigned int i; + + /* + * No need to check for zero size, should happen rarely and will only + * write a new entry regarded to be unused due to zero size. + */ + for (i = 0; i < XEN_EXTRA_MEM_MAX_REGIONS; i++) { + /* Add new region. */ + if (xen_extra_mem[i].n_pfns == 0) { + xen_extra_mem[i].start_pfn = start_pfn; + xen_extra_mem[i].n_pfns = n_pfns; + break; + } + /* Append to existing region. */ + if (xen_extra_mem[i].start_pfn + xen_extra_mem[i].n_pfns == + start_pfn) { + xen_extra_mem[i].n_pfns += n_pfns; + break; + } + } + if (i == XEN_EXTRA_MEM_MAX_REGIONS) + printk(KERN_WARNING "Warning: not enough extra memory regions\n"); + + memblock_reserve(PFN_PHYS(start_pfn), PFN_PHYS(n_pfns)); +} + +#ifdef CONFIG_XEN_UNPOPULATED_ALLOC +int __init arch_xen_unpopulated_init(struct resource **res) +{ + unsigned int i; + + if (!xen_domain()) + return -ENODEV; + + /* Must be set strictly before calling xen_free_unpopulated_pages(). */ + *res = &iomem_resource; + + /* + * Initialize with pages from the extra memory regions (see + * arch/x86/xen/setup.c). + */ + for (i = 0; i < XEN_EXTRA_MEM_MAX_REGIONS; i++) { + unsigned int j; + + for (j = 0; j < xen_extra_mem[i].n_pfns; j++) { + struct page *pg = + pfn_to_page(xen_extra_mem[i].start_pfn + j); + + xen_free_unpopulated_pages(1, &pg); + } + + /* Zero so region is not also added to the balloon driver. */ + xen_extra_mem[i].n_pfns = 0; + } + + return 0; +} +#endif --- linux-xilinx-6.8.0.orig/arch/x86/xen/enlighten_hvm.c +++ linux-xilinx-6.8.0/arch/x86/xen/enlighten_hvm.c @@ -108,15 +108,8 @@ /* PVH set up hypercall page in xen_prepare_pvh(). */ if (xen_pvh_domain()) pv_info.name = "Xen PVH"; - else { - u64 pfn; - uint32_t msr; - + else pv_info.name = "Xen HVM"; - msr = cpuid_ebx(base + 2); - pfn = __pa(hypercall_page); - wrmsr_safe(msr, (u32)pfn, (u32)(pfn >> 32)); - } xen_setup_features(); @@ -298,6 +291,10 @@ if (xen_pv_domain()) return 0; + /* Set correct hypercall function. */ + if (xen_domain) + xen_hypercall_setfunc(); + if (xen_pvh_domain() && nopv) { /* Guest booting via the Xen-PVH boot entry goes here */ pr_info("\"nopv\" parameter is ignored in PVH guest\n"); --- linux-xilinx-6.8.0.orig/arch/x86/xen/enlighten_pv.c +++ linux-xilinx-6.8.0/arch/x86/xen/enlighten_pv.c @@ -1329,6 +1329,9 @@ xen_domain_type = XEN_PV_DOMAIN; xen_start_flags = xen_start_info->flags; + /* Interrupts are guaranteed to be off initially. */ + early_boot_irqs_disabled = true; + static_call_update_early(xen_hypercall, xen_hypercall_pv); xen_setup_features(); @@ -1419,7 +1422,6 @@ WARN_ON(xen_cpuhp_setup(xen_cpu_up_prepare_pv, xen_cpu_dead_pv)); local_irq_disable(); - early_boot_irqs_disabled = true; xen_raw_console_write("mapping kernel into physical memory\n"); xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base, --- linux-xilinx-6.8.0.orig/arch/x86/xen/enlighten_pvh.c +++ linux-xilinx-6.8.0/arch/x86/xen/enlighten_pvh.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 #include #include +#include #include @@ -27,17 +28,10 @@ void __init xen_pvh_init(struct boot_params *boot_params) { - u32 msr; - u64 pfn; - xen_pvh = 1; xen_domain_type = XEN_HVM_DOMAIN; xen_start_flags = pvh_start_info.flags; - msr = cpuid_ebx(xen_cpuid_base() + 2); - pfn = __pa(hypercall_page); - wrmsr_safe(msr, (u32)pfn, (u32)(pfn >> 32)); - if (xen_initial_domain()) x86_init.oem.arch_setup = xen_add_preferred_consoles; x86_init.oem.banner = xen_banner; @@ -72,3 +66,70 @@ } boot_params_p->e820_entries = memmap.nr_entries; } + +/* + * Reserve e820 UNUSABLE regions to inflate the memory balloon. + * + * On PVH dom0 the host memory map is used, RAM regions available to dom0 are + * located as the same place as in the native memory map, but since dom0 gets + * less memory than the total amount of host RAM the ranges that can't be + * populated are converted from RAM -> UNUSABLE. Use such regions (up to the + * ratio signaled in EXTRA_MEM_RATIO) in order to inflate the balloon driver at + * boot. Doing so prevents the guest (even if just temporary) from using holes + * in the memory map in order to map grants or foreign addresses, and + * hopefully limits the risk of a clash with a device MMIO region. Ideally the + * hypervisor should notify us which memory ranges are suitable for creating + * foreign mappings, but that's not yet implemented. + */ +void __init xen_reserve_extra_memory(struct boot_params *bootp) +{ + unsigned int i, ram_pages = 0, extra_pages; + + for (i = 0; i < bootp->e820_entries; i++) { + struct boot_e820_entry *e = &bootp->e820_table[i]; + + if (e->type != E820_TYPE_RAM) + continue; + ram_pages += PFN_DOWN(e->addr + e->size) - PFN_UP(e->addr); + } + + /* Max amount of extra memory. */ + extra_pages = EXTRA_MEM_RATIO * ram_pages; + + /* + * Convert UNUSABLE ranges to RAM and reserve them for foreign mapping + * purposes. + */ + for (i = 0; i < bootp->e820_entries && extra_pages; i++) { + struct boot_e820_entry *e = &bootp->e820_table[i]; + unsigned long pages; + + if (e->type != E820_TYPE_UNUSABLE) + continue; + + pages = min(extra_pages, + PFN_DOWN(e->addr + e->size) - PFN_UP(e->addr)); + + if (pages != (PFN_DOWN(e->addr + e->size) - PFN_UP(e->addr))) { + struct boot_e820_entry *next; + + if (bootp->e820_entries == + ARRAY_SIZE(bootp->e820_table)) + /* No space left to split - skip region. */ + continue; + + /* Split entry. */ + next = e + 1; + memmove(next, e, + (bootp->e820_entries - i) * sizeof(*e)); + bootp->e820_entries++; + next->addr = PAGE_ALIGN(e->addr) + PFN_PHYS(pages); + e->size = next->addr - e->addr; + next->size -= e->size; + } + e->type = E820_TYPE_RAM; + extra_pages -= pages; + + xen_add_extra_mem(PFN_UP(e->addr), pages); + } +} --- linux-xilinx-6.8.0.orig/arch/x86/xen/mmu_pv.c +++ linux-xilinx-6.8.0/arch/x86/xen/mmu_pv.c @@ -113,6 +113,51 @@ */ static DEFINE_SPINLOCK(xen_reservation_lock); +/* Protected by xen_reservation_lock. */ +#define MIN_CONTIG_ORDER 9 /* 2MB */ +static unsigned int discontig_frames_order = MIN_CONTIG_ORDER; +static unsigned long discontig_frames_early[1UL << MIN_CONTIG_ORDER] __initdata; +static unsigned long *discontig_frames __refdata = discontig_frames_early; +static bool discontig_frames_dyn; + +static int alloc_discontig_frames(unsigned int order) +{ + unsigned long *new_array, *old_array; + unsigned int old_order; + unsigned long flags; + + BUG_ON(order < MIN_CONTIG_ORDER); + BUILD_BUG_ON(sizeof(discontig_frames_early) != PAGE_SIZE); + + new_array = (unsigned long *)__get_free_pages(GFP_KERNEL, + order - MIN_CONTIG_ORDER); + if (!new_array) + return -ENOMEM; + + spin_lock_irqsave(&xen_reservation_lock, flags); + + old_order = discontig_frames_order; + + if (order > discontig_frames_order || !discontig_frames_dyn) { + if (!discontig_frames_dyn) + old_array = NULL; + else + old_array = discontig_frames; + + discontig_frames = new_array; + discontig_frames_order = order; + discontig_frames_dyn = true; + } else { + old_array = new_array; + } + + spin_unlock_irqrestore(&xen_reservation_lock, flags); + + free_pages((unsigned long)old_array, old_order - MIN_CONTIG_ORDER); + + return 0; +} + /* * Note about cr3 (pagetable base) values: * @@ -782,6 +827,7 @@ { struct page *page; + spin_lock(&init_mm.page_table_lock); spin_lock(&pgd_lock); list_for_each_entry(page, &pgd_list, lru) { @@ -792,6 +838,7 @@ } spin_unlock(&pgd_lock); + spin_unlock(&init_mm.page_table_lock); } static void __init xen_mark_pinned(struct mm_struct *mm, struct page *page, @@ -813,6 +860,9 @@ SetPagePinned(virt_to_page(level3_user_vsyscall)); #endif xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP); + + if (alloc_discontig_frames(MIN_CONTIG_ORDER)) + BUG(); } static void xen_unpin_page(struct mm_struct *mm, struct page *page, @@ -888,6 +938,7 @@ { struct page *page; + spin_lock(&init_mm.page_table_lock); spin_lock(&pgd_lock); list_for_each_entry(page, &pgd_list, lru) { @@ -899,6 +950,7 @@ } spin_unlock(&pgd_lock); + spin_unlock(&init_mm.page_table_lock); } static void xen_enter_mmap(struct mm_struct *mm) @@ -1082,7 +1134,7 @@ pmd_t *pmd_tbl; int i; - if (pud_large(*pud)) { + if (pud_leaf(*pud)) { pa = pud_val(*pud) & PHYSICAL_PAGE_MASK; xen_free_ro_pages(pa, PUD_SIZE); return; @@ -1863,7 +1915,7 @@ if (!pud_present(pud)) return 0; pa = pud_val(pud) & PTE_PFN_MASK; - if (pud_large(pud)) + if (pud_leaf(pud)) return pa + (vaddr & ~PUD_MASK); pmd = native_make_pmd(xen_read_phys_ulong(pa + pmd_index(vaddr) * @@ -2019,10 +2071,7 @@ void __init xen_pt_check_e820(void) { - if (xen_is_e820_reserved(xen_pt_base, xen_pt_size)) { - xen_raw_console_write("Xen hypervisor allocated page table memory conflicts with E820 map\n"); - BUG(); - } + xen_chk_is_e820_usable(xen_pt_base, xen_pt_size, "page table"); } static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss; @@ -2202,10 +2251,6 @@ memset(dummy_mapping, 0xff, PAGE_SIZE); } -/* Protected by xen_reservation_lock. */ -#define MAX_CONTIG_ORDER 9 /* 2MB */ -static unsigned long discontig_frames[1< MAX_CONTIG_ORDER)) - return -ENOMEM; + if (unlikely(order > discontig_frames_order)) { + if (!discontig_frames_dyn) + return -ENOMEM; + + if (alloc_discontig_frames(order)) + return -ENOMEM; + } memset((void *) vstart, 0, PAGE_SIZE << order); spin_lock_irqsave(&xen_reservation_lock, flags); + in_frames = discontig_frames; + /* 1. Zap current PTEs, remembering MFNs. */ xen_zap_pfn_range(vstart, order, in_frames, NULL); @@ -2357,12 +2409,12 @@ void xen_destroy_contiguous_region(phys_addr_t pstart, unsigned int order) { - unsigned long *out_frames = discontig_frames, in_frame; + unsigned long *out_frames, in_frame; unsigned long flags; int success; unsigned long vstart; - if (unlikely(order > MAX_CONTIG_ORDER)) + if (unlikely(order > discontig_frames_order)) return; vstart = (unsigned long)phys_to_virt(pstart); @@ -2370,6 +2422,8 @@ spin_lock_irqsave(&xen_reservation_lock, flags); + out_frames = discontig_frames; + /* 1. Find start MFN of contiguous extent. */ in_frame = virt_to_mfn((void *)vstart); --- linux-xilinx-6.8.0.orig/arch/x86/xen/p2m.c +++ linux-xilinx-6.8.0/arch/x86/xen/p2m.c @@ -70,6 +70,7 @@ #include #include #include +#include #include #include @@ -80,6 +81,7 @@ #include #include #include +#include #include "multicalls.h" #include "xen-ops.h" @@ -731,7 +733,7 @@ * immediate unmapping. */ map_ops[i].status = GNTST_general_error; - unmap[0].host_addr = map_ops[i].host_addr, + unmap[0].host_addr = map_ops[i].host_addr; unmap[0].handle = map_ops[i].handle; map_ops[i].handle = INVALID_GRANT_HANDLE; if (map_ops[i].flags & GNTMAP_device_map) @@ -741,7 +743,7 @@ if (kmap_ops) { kmap_ops[i].status = GNTST_general_error; - unmap[1].host_addr = kmap_ops[i].host_addr, + unmap[1].host_addr = kmap_ops[i].host_addr; unmap[1].handle = kmap_ops[i].handle; kmap_ops[i].handle = INVALID_GRANT_HANDLE; if (kmap_ops[i].flags & GNTMAP_device_map) @@ -794,6 +796,102 @@ return ret; } +/* Remapped non-RAM areas */ +#define NR_NONRAM_REMAP 4 +static struct nonram_remap { + phys_addr_t maddr; + phys_addr_t paddr; + size_t size; +} xen_nonram_remap[NR_NONRAM_REMAP] __ro_after_init; +static unsigned int nr_nonram_remap __ro_after_init; + +/* + * Do the real remapping of non-RAM regions as specified in the + * xen_nonram_remap[] array. + * In case of an error just crash the system. + */ +void __init xen_do_remap_nonram(void) +{ + unsigned int i; + unsigned int remapped = 0; + const struct nonram_remap *remap = xen_nonram_remap; + unsigned long pfn, mfn, end_pfn; + + for (i = 0; i < nr_nonram_remap; i++) { + end_pfn = PFN_UP(remap->paddr + remap->size); + pfn = PFN_DOWN(remap->paddr); + mfn = PFN_DOWN(remap->maddr); + while (pfn < end_pfn) { + if (!set_phys_to_machine(pfn, mfn)) + panic("Failed to set p2m mapping for pfn=%lx mfn=%lx\n", + pfn, mfn); + + pfn++; + mfn++; + remapped++; + } + + remap++; + } + + pr_info("Remapped %u non-RAM page(s)\n", remapped); +} + +#ifdef CONFIG_ACPI +/* + * Xen variant of acpi_os_ioremap() taking potentially remapped non-RAM + * regions into account. + * Any attempt to map an area crossing a remap boundary will produce a + * WARN() splat. + * phys is related to remap->maddr on input and will be rebased to remap->paddr. + */ +static void __iomem *xen_acpi_os_ioremap(acpi_physical_address phys, + acpi_size size) +{ + unsigned int i; + const struct nonram_remap *remap = xen_nonram_remap; + + for (i = 0; i < nr_nonram_remap; i++) { + if (phys + size > remap->maddr && + phys < remap->maddr + remap->size) { + WARN_ON(phys < remap->maddr || + phys + size > remap->maddr + remap->size); + phys += remap->paddr - remap->maddr; + break; + } + } + + return x86_acpi_os_ioremap(phys, size); +} +#endif /* CONFIG_ACPI */ + +/* + * Add a new non-RAM remap entry. + * In case of no free entry found, just crash the system. + */ +void __init xen_add_remap_nonram(phys_addr_t maddr, phys_addr_t paddr, + unsigned long size) +{ + BUG_ON((maddr & ~PAGE_MASK) != (paddr & ~PAGE_MASK)); + + if (nr_nonram_remap == NR_NONRAM_REMAP) { + xen_raw_console_write("Number of required E820 entry remapping actions exceed maximum value\n"); + BUG(); + } + +#ifdef CONFIG_ACPI + /* Switch to the Xen acpi_os_ioremap() variant. */ + if (nr_nonram_remap == 0) + acpi_os_ioremap = xen_acpi_os_ioremap; +#endif + + xen_nonram_remap[nr_nonram_remap].maddr = maddr; + xen_nonram_remap[nr_nonram_remap].paddr = paddr; + xen_nonram_remap[nr_nonram_remap].size = size; + + nr_nonram_remap++; +} + #ifdef CONFIG_XEN_DEBUG_FS #include #include "debugfs.h" --- linux-xilinx-6.8.0.orig/arch/x86/xen/setup.c +++ linux-xilinx-6.8.0/arch/x86/xen/setup.c @@ -15,12 +15,12 @@ #include #include #include +#include #include #include #include #include -#include #include #include #include @@ -38,9 +38,6 @@ #define GB(x) ((uint64_t)(x) * 1024 * 1024 * 1024) -/* Amount of extra memory space we add to the e820 ranges */ -struct xen_memory_region xen_extra_mem[XEN_EXTRA_MEM_MAX_REGIONS] __initdata; - /* Number of pages released from the initial allocation. */ unsigned long xen_released_pages; @@ -50,6 +47,9 @@ /* E820 map used during setting up memory. */ static struct e820_table xen_e820_table __initdata; +/* Number of initially usable memory pages. */ +static unsigned long ini_nr_pages __initdata; + /* * Buffer used to remap identity mapped pages. We only need the virtual space. * The physical page behind this address is remapped as needed to different @@ -64,18 +64,6 @@ } xen_remap_buf __initdata __aligned(PAGE_SIZE); static unsigned long xen_remap_mfn __initdata = INVALID_P2M_ENTRY; -/* - * The maximum amount of extra memory compared to the base size. The - * main scaling factor is the size of struct page. At extreme ratios - * of base:extra, all the base memory can be filled with page - * structures for the extra memory, leaving no space for anything - * else. - * - * 10x seems like a reasonable balance between scaling flexibility and - * leaving a practically usable system. - */ -#define EXTRA_MEM_RATIO (10) - static bool xen_512gb_limit __initdata = IS_ENABLED(CONFIG_XEN_512GB); static void __init xen_parse_512gb(void) @@ -96,35 +84,6 @@ xen_512gb_limit = val; } -static void __init xen_add_extra_mem(unsigned long start_pfn, - unsigned long n_pfns) -{ - int i; - - /* - * No need to check for zero size, should happen rarely and will only - * write a new entry regarded to be unused due to zero size. - */ - for (i = 0; i < XEN_EXTRA_MEM_MAX_REGIONS; i++) { - /* Add new region. */ - if (xen_extra_mem[i].n_pfns == 0) { - xen_extra_mem[i].start_pfn = start_pfn; - xen_extra_mem[i].n_pfns = n_pfns; - break; - } - /* Append to existing region. */ - if (xen_extra_mem[i].start_pfn + xen_extra_mem[i].n_pfns == - start_pfn) { - xen_extra_mem[i].n_pfns += n_pfns; - break; - } - } - if (i == XEN_EXTRA_MEM_MAX_REGIONS) - printk(KERN_WARNING "Warning: not enough extra memory regions\n"); - - memblock_reserve(PFN_PHYS(start_pfn), PFN_PHYS(n_pfns)); -} - static void __init xen_del_extra_mem(unsigned long start_pfn, unsigned long n_pfns) { @@ -257,7 +216,7 @@ * as a fallback if the remapping fails. */ static void __init xen_set_identity_and_release_chunk(unsigned long start_pfn, - unsigned long end_pfn, unsigned long nr_pages) + unsigned long end_pfn) { unsigned long pfn, end; int ret; @@ -265,7 +224,7 @@ WARN_ON(start_pfn > end_pfn); /* Release pages first. */ - end = min(end_pfn, nr_pages); + end = min(end_pfn, ini_nr_pages); for (pfn = start_pfn; pfn < end; pfn++) { unsigned long mfn = pfn_to_mfn(pfn); @@ -386,15 +345,14 @@ * to Xen and not remapped. */ static unsigned long __init xen_set_identity_and_remap_chunk( - unsigned long start_pfn, unsigned long end_pfn, unsigned long nr_pages, - unsigned long remap_pfn) + unsigned long start_pfn, unsigned long end_pfn, unsigned long remap_pfn) { unsigned long pfn; unsigned long i = 0; unsigned long n = end_pfn - start_pfn; if (remap_pfn == 0) - remap_pfn = nr_pages; + remap_pfn = ini_nr_pages; while (i < n) { unsigned long cur_pfn = start_pfn + i; @@ -403,19 +361,19 @@ unsigned long remap_range_size; /* Do not remap pages beyond the current allocation */ - if (cur_pfn >= nr_pages) { + if (cur_pfn >= ini_nr_pages) { /* Identity map remaining pages */ set_phys_range_identity(cur_pfn, cur_pfn + size); break; } - if (cur_pfn + size > nr_pages) - size = nr_pages - cur_pfn; + if (cur_pfn + size > ini_nr_pages) + size = ini_nr_pages - cur_pfn; remap_range_size = xen_find_pfn_range(&remap_pfn); if (!remap_range_size) { pr_warn("Unable to find available pfn range, not remapping identity pages\n"); xen_set_identity_and_release_chunk(cur_pfn, - cur_pfn + left, nr_pages); + cur_pfn + left); break; } /* Adjust size to fit in current e820 RAM region */ @@ -442,18 +400,18 @@ } static unsigned long __init xen_count_remap_pages( - unsigned long start_pfn, unsigned long end_pfn, unsigned long nr_pages, + unsigned long start_pfn, unsigned long end_pfn, unsigned long remap_pages) { - if (start_pfn >= nr_pages) + if (start_pfn >= ini_nr_pages) return remap_pages; - return remap_pages + min(end_pfn, nr_pages) - start_pfn; + return remap_pages + min(end_pfn, ini_nr_pages) - start_pfn; } -static unsigned long __init xen_foreach_remap_area(unsigned long nr_pages, +static unsigned long __init xen_foreach_remap_area( unsigned long (*func)(unsigned long start_pfn, unsigned long end_pfn, - unsigned long nr_pages, unsigned long last_val)) + unsigned long last_val)) { phys_addr_t start = 0; unsigned long ret_val = 0; @@ -481,8 +439,7 @@ end_pfn = PFN_UP(entry->addr); if (start_pfn < end_pfn) - ret_val = func(start_pfn, end_pfn, nr_pages, - ret_val); + ret_val = func(start_pfn, end_pfn, ret_val); start = end; } } @@ -539,6 +496,8 @@ set_pte_mfn(buf, mfn_save, PAGE_KERNEL); pr_info("Remapped %ld page(s)\n", remapped); + + xen_do_remap_nonram(); } static unsigned long __init xen_get_pages_limit(void) @@ -612,7 +571,7 @@ } } -bool __init xen_is_e820_reserved(phys_addr_t start, phys_addr_t size) +static bool __init xen_is_e820_reserved(phys_addr_t start, phys_addr_t size) { struct e820_entry *entry; unsigned mapcnt; @@ -670,6 +629,111 @@ } /* + * Swap a non-RAM E820 map entry with RAM above ini_nr_pages. + * Note that the E820 map is modified accordingly, but the P2M map isn't yet. + * The adaption of the P2M must be deferred until page allocation is possible. + */ +static void __init xen_e820_swap_entry_with_ram(struct e820_entry *swap_entry) +{ + struct e820_entry *entry; + unsigned int mapcnt; + phys_addr_t mem_end = PFN_PHYS(ini_nr_pages); + phys_addr_t swap_addr, swap_size, entry_end; + + swap_addr = PAGE_ALIGN_DOWN(swap_entry->addr); + swap_size = PAGE_ALIGN(swap_entry->addr - swap_addr + swap_entry->size); + entry = xen_e820_table.entries; + + for (mapcnt = 0; mapcnt < xen_e820_table.nr_entries; mapcnt++) { + entry_end = entry->addr + entry->size; + if (entry->type == E820_TYPE_RAM && entry->size >= swap_size && + entry_end - swap_size >= mem_end) { + /* Reduce RAM entry by needed space (whole pages). */ + entry->size -= swap_size; + + /* Add new entry at the end of E820 map. */ + entry = xen_e820_table.entries + + xen_e820_table.nr_entries; + xen_e820_table.nr_entries++; + + /* Fill new entry (keep size and page offset). */ + entry->type = swap_entry->type; + entry->addr = entry_end - swap_size + + swap_addr - swap_entry->addr; + entry->size = swap_entry->size; + + /* Convert old entry to RAM, align to pages. */ + swap_entry->type = E820_TYPE_RAM; + swap_entry->addr = swap_addr; + swap_entry->size = swap_size; + + /* Remember PFN<->MFN relation for P2M update. */ + xen_add_remap_nonram(swap_addr, entry_end - swap_size, + swap_size); + + /* Order E820 table and merge entries. */ + e820__update_table(&xen_e820_table); + + return; + } + + entry++; + } + + xen_raw_console_write("No suitable area found for required E820 entry remapping action\n"); + BUG(); +} + +/* + * Look for non-RAM memory types in a specific guest physical area and move + * those away if possible (ACPI NVS only for now). + */ +static void __init xen_e820_resolve_conflicts(phys_addr_t start, + phys_addr_t size) +{ + struct e820_entry *entry; + unsigned int mapcnt; + phys_addr_t end; + + if (!size) + return; + + end = start + size; + entry = xen_e820_table.entries; + + for (mapcnt = 0; mapcnt < xen_e820_table.nr_entries; mapcnt++) { + if (entry->addr >= end) + return; + + if (entry->addr + entry->size > start && + entry->type == E820_TYPE_NVS) + xen_e820_swap_entry_with_ram(entry); + + entry++; + } +} + +/* + * Check for an area in physical memory to be usable for non-movable purposes. + * An area is considered to usable if the used E820 map lists it to be RAM or + * some other type which can be moved to higher PFNs while keeping the MFNs. + * In case the area is not usable, crash the system with an error message. + */ +void __init xen_chk_is_e820_usable(phys_addr_t start, phys_addr_t size, + const char *component) +{ + xen_e820_resolve_conflicts(start, size); + + if (!xen_is_e820_reserved(start, size)) + return; + + xen_raw_console_write("Xen hypervisor allocated "); + xen_raw_console_write(component); + xen_raw_console_write(" memory conflicts with E820 map\n"); + BUG(); +} + +/* * Like memcpy, but with physical addresses for dest and src. */ static void __init xen_phys_memcpy(phys_addr_t dest, phys_addr_t src, @@ -728,20 +792,20 @@ **/ char * __init xen_memory_setup(void) { - unsigned long max_pfn, pfn_s, n_pfns; + unsigned long pfn_s, n_pfns; phys_addr_t mem_end, addr, size, chunk_size; u32 type; int rc; struct xen_memory_map memmap; unsigned long max_pages; unsigned long extra_pages = 0; + unsigned long maxmem_pages; int i; int op; xen_parse_512gb(); - max_pfn = xen_get_pages_limit(); - max_pfn = min(max_pfn, xen_start_info->nr_pages); - mem_end = PFN_PHYS(max_pfn); + ini_nr_pages = min(xen_get_pages_limit(), xen_start_info->nr_pages); + mem_end = PFN_PHYS(ini_nr_pages); memmap.nr_entries = ARRAY_SIZE(xen_e820_table.entries); set_xen_guest_handle(memmap.buffer, xen_e820_table.entries); @@ -791,13 +855,35 @@ /* Make sure the Xen-supplied memory map is well-ordered. */ e820__update_table(&xen_e820_table); + /* + * Check whether the kernel itself conflicts with the target E820 map. + * Failing now is better than running into weird problems later due + * to relocating (and even reusing) pages with kernel text or data. + */ + xen_chk_is_e820_usable(__pa_symbol(_text), + __pa_symbol(_end) - __pa_symbol(_text), + "kernel"); + + /* + * Check for a conflict of the xen_start_info memory with the target + * E820 map. + */ + xen_chk_is_e820_usable(__pa(xen_start_info), sizeof(*xen_start_info), + "xen_start_info"); + + /* + * Check for a conflict of the hypervisor supplied page tables with + * the target E820 map. + */ + xen_pt_check_e820(); + max_pages = xen_get_max_pages(); /* How many extra pages do we need due to remapping? */ - max_pages += xen_foreach_remap_area(max_pfn, xen_count_remap_pages); + max_pages += xen_foreach_remap_area(xen_count_remap_pages); - if (max_pages > max_pfn) - extra_pages += max_pages - max_pfn; + if (max_pages > ini_nr_pages) + extra_pages += max_pages - ini_nr_pages; /* * Clamp the amount of extra memory to a EXTRA_MEM_RATIO @@ -806,8 +892,8 @@ * Make sure we have no memory above max_pages, as this area * isn't handled by the p2m management. */ - extra_pages = min3(EXTRA_MEM_RATIO * min(max_pfn, PFN_DOWN(MAXMEM)), - extra_pages, max_pages - max_pfn); + maxmem_pages = EXTRA_MEM_RATIO * min(ini_nr_pages, PFN_DOWN(MAXMEM)); + extra_pages = min3(maxmem_pages, extra_pages, max_pages - ini_nr_pages); i = 0; addr = xen_e820_table.entries[0].addr; size = xen_e820_table.entries[0].size; @@ -863,23 +949,6 @@ e820__update_table(e820_table); - /* - * Check whether the kernel itself conflicts with the target E820 map. - * Failing now is better than running into weird problems later due - * to relocating (and even reusing) pages with kernel text or data. - */ - if (xen_is_e820_reserved(__pa_symbol(_text), - __pa_symbol(__bss_stop) - __pa_symbol(_text))) { - xen_raw_console_write("Xen hypervisor allocated kernel memory conflicts with E820 map\n"); - BUG(); - } - - /* - * Check for a conflict of the hypervisor supplied page tables with - * the target E820 map. - */ - xen_pt_check_e820(); - xen_reserve_xen_mfnlist(); /* Check for a conflict of the initrd with the target E820 map. */ @@ -907,7 +976,7 @@ * Set identity map on non-RAM pages and prepare remapping the * underlying RAM. */ - xen_foreach_remap_area(max_pfn, xen_set_identity_and_remap_chunk); + xen_foreach_remap_area(xen_set_identity_and_remap_chunk); pr_info("Released %ld page(s)\n", xen_released_pages); --- linux-xilinx-6.8.0.orig/arch/x86/xen/xen-asm.S +++ linux-xilinx-6.8.0/arch/x86/xen/xen-asm.S @@ -20,10 +20,33 @@ #include #include +#include #include <../entry/calling.h> .pushsection .noinstr.text, "ax" /* + * PV hypercall interface to the hypervisor. + * + * Called via inline asm(), so better preserve %rcx and %r11. + * + * Input: + * %eax: hypercall number + * %rdi, %rsi, %rdx, %r10, %r8: args 1..5 for the hypercall + * Output: %rax + */ +SYM_FUNC_START(xen_hypercall_pv) + ANNOTATE_NOENDBR + push %rcx + push %r11 + UNWIND_HINT_SAVE + syscall + UNWIND_HINT_RESTORE + pop %r11 + pop %rcx + RET +SYM_FUNC_END(xen_hypercall_pv) + +/* * Disabling events is simply a matter of making the event mask * non-zero. */ @@ -176,7 +199,6 @@ SYM_CODE_END(xen_early_idt_handler_array) __FINIT -hypercall_iret = hypercall_page + __HYPERVISOR_iret * 32 /* * Xen64 iret frame: * @@ -186,17 +208,28 @@ * cs * rip <-- standard iret frame * - * flags + * flags <-- xen_iret must push from here on * - * rcx } - * r11 }<-- pushed by hypercall page - * rsp->rax } + * rcx + * r11 + * rsp->rax */ +.macro xen_hypercall_iret + pushq $0 /* Flags */ + push %rcx + push %r11 + push %rax + mov $__HYPERVISOR_iret, %eax + syscall /* Do the IRET. */ +#ifdef CONFIG_SLS + int3 +#endif +.endm + SYM_CODE_START(xen_iret) UNWIND_HINT_UNDEFINED ANNOTATE_NOENDBR - pushq $0 - jmp hypercall_iret + xen_hypercall_iret SYM_CODE_END(xen_iret) /* @@ -301,8 +334,7 @@ ENDBR lea 16(%rsp), %rsp /* strip %rcx, %r11 */ mov $-ENOSYS, %rax - pushq $0 - jmp hypercall_iret + xen_hypercall_iret SYM_CODE_END(xen_entry_SYSENTER_compat) SYM_CODE_END(xen_entry_SYSCALL_compat) --- linux-xilinx-6.8.0.orig/arch/x86/xen/xen-head.S +++ linux-xilinx-6.8.0/arch/x86/xen/xen-head.S @@ -6,9 +6,11 @@ #include #include +#include #include #include +#include #include #include #include @@ -20,28 +22,6 @@ #include #include -.pushsection .noinstr.text, "ax" - .balign PAGE_SIZE -SYM_CODE_START(hypercall_page) - .rept (PAGE_SIZE / 32) - UNWIND_HINT_FUNC - ANNOTATE_NOENDBR - ANNOTATE_UNRET_SAFE - ret - /* - * Xen will write the hypercall page, and sort out ENDBR. - */ - .skip 31, 0xcc - .endr - -#define HYPERCALL(n) \ - .equ xen_hypercall_##n, hypercall_page + __HYPERVISOR_##n * 32; \ - .type xen_hypercall_##n, @function; .size xen_hypercall_##n, 32 -#include -#undef HYPERCALL -SYM_CODE_END(hypercall_page) -.popsection - #ifdef CONFIG_XEN_PV __INIT SYM_CODE_START(startup_xen) @@ -87,6 +67,88 @@ #endif #endif + .pushsection .noinstr.text, "ax" +/* + * Xen hypercall interface to the hypervisor. + * + * Input: + * %eax: hypercall number + * 32-bit: + * %ebx, %ecx, %edx, %esi, %edi: args 1..5 for the hypercall + * 64-bit: + * %rdi, %rsi, %rdx, %r10, %r8: args 1..5 for the hypercall + * Output: %[er]ax + */ +SYM_FUNC_START(xen_hypercall_hvm) + ENDBR + FRAME_BEGIN + /* Save all relevant registers (caller save and arguments). */ +#ifdef CONFIG_X86_32 + push %eax + push %ebx + push %ecx + push %edx + push %esi + push %edi +#else + push %rax + push %rcx + push %rdx + push %rdi + push %rsi + push %r11 + push %r10 + push %r9 + push %r8 +#ifdef CONFIG_FRAME_POINTER + pushq $0 /* Dummy push for stack alignment. */ +#endif +#endif + /* Set the vendor specific function. */ + call __xen_hypercall_setfunc + /* Set ZF = 1 if AMD, Restore saved registers. */ +#ifdef CONFIG_X86_32 + lea xen_hypercall_amd, %ebx + cmp %eax, %ebx + pop %edi + pop %esi + pop %edx + pop %ecx + pop %ebx + pop %eax +#else + lea xen_hypercall_amd(%rip), %rcx + cmp %rax, %rcx +#ifdef CONFIG_FRAME_POINTER + pop %rax /* Dummy pop. */ +#endif + pop %r8 + pop %r9 + pop %r10 + pop %r11 + pop %rsi + pop %rdi + pop %rdx + pop %rcx + pop %rax +#endif + FRAME_END + /* Use correct hypercall function. */ + jz xen_hypercall_amd + jmp xen_hypercall_intel +SYM_FUNC_END(xen_hypercall_hvm) + +SYM_FUNC_START(xen_hypercall_amd) + vmmcall + RET +SYM_FUNC_END(xen_hypercall_amd) + +SYM_FUNC_START(xen_hypercall_intel) + vmcall + RET +SYM_FUNC_END(xen_hypercall_intel) + .popsection + ELFNOTE(Xen, XEN_ELFNOTE_GUEST_OS, .asciz "linux") ELFNOTE(Xen, XEN_ELFNOTE_GUEST_VERSION, .asciz "2.6") ELFNOTE(Xen, XEN_ELFNOTE_XEN_VERSION, .asciz "xen-3.0") @@ -115,7 +177,6 @@ #else # define FEATURES_DOM0 0 #endif - ELFNOTE(Xen, XEN_ELFNOTE_HYPERCALL_PAGE, _ASM_PTR hypercall_page) ELFNOTE(Xen, XEN_ELFNOTE_SUPPORTED_FEATURES, .long FEATURES_PV | FEATURES_PVH | FEATURES_DOM0) ELFNOTE(Xen, XEN_ELFNOTE_LOADER, .asciz "generic") --- linux-xilinx-6.8.0.orig/arch/x86/xen/xen-ops.h +++ linux-xilinx-6.8.0/arch/x86/xen/xen-ops.h @@ -43,8 +43,12 @@ #ifdef CONFIG_X86_64 void __init xen_relocate_p2m(void); #endif +void __init xen_do_remap_nonram(void); +void __init xen_add_remap_nonram(phys_addr_t maddr, phys_addr_t paddr, + unsigned long size); -bool __init xen_is_e820_reserved(phys_addr_t start, phys_addr_t size); +void __init xen_chk_is_e820_usable(phys_addr_t start, phys_addr_t size, + const char *component); unsigned long __ref xen_chk_extra_mem(unsigned long pfn); void __init xen_inv_extra_mem(void); void __init xen_remap_memory(void); @@ -163,4 +167,27 @@ static inline void xen_hvm_post_suspend(int suspend_cancelled) {} #endif +/* + * The maximum amount of extra memory compared to the base size. The + * main scaling factor is the size of struct page. At extreme ratios + * of base:extra, all the base memory can be filled with page + * structures for the extra memory, leaving no space for anything + * else. + * + * 10x seems like a reasonable balance between scaling flexibility and + * leaving a practically usable system. + */ +#define EXTRA_MEM_RATIO (10) + +void xen_add_extra_mem(unsigned long start_pfn, unsigned long n_pfns); + +#ifdef CONFIG_XEN_PV +void xen_hypercall_pv(void); +#endif +void xen_hypercall_hvm(void); +void xen_hypercall_amd(void); +void xen_hypercall_intel(void); +void xen_hypercall_setfunc(void); +void *__xen_hypercall_setfunc(void); + #endif /* XEN_OPS_H */ --- linux-xilinx-6.8.0.orig/arch/xtensa/Kconfig +++ linux-xilinx-6.8.0/arch/xtensa/Kconfig @@ -13,6 +13,7 @@ select ARCH_HAS_DMA_SET_UNCACHED if MMU select ARCH_HAS_STRNCPY_FROM_USER if !KASAN select ARCH_HAS_STRNLEN_USER + select ARCH_NEED_CMPXCHG_1_EMU select ARCH_USE_MEMTEST select ARCH_USE_QUEUED_RWLOCKS select ARCH_USE_QUEUED_SPINLOCKS --- linux-xilinx-6.8.0.orig/arch/xtensa/include/asm/cmpxchg.h +++ linux-xilinx-6.8.0/arch/xtensa/include/asm/cmpxchg.h @@ -15,6 +15,7 @@ #include #include +#include /* * cmpxchg @@ -74,6 +75,7 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size) { switch (size) { + case 1: return cmpxchg_emu_u8(ptr, old, new); case 4: return __cmpxchg_u32(ptr, old, new); default: __cmpxchg_called_with_bad_pointer(); return old; --- linux-xilinx-6.8.0.orig/arch/xtensa/include/asm/processor.h +++ linux-xilinx-6.8.0/arch/xtensa/include/asm/processor.h @@ -115,9 +115,9 @@ #define MAKE_RA_FOR_CALL(ra,ws) (((ra) & 0x3fffffff) | (ws) << 30) /* Convert return address to a valid pc - * Note: We assume that the stack pointer is in the same 1GB ranges as the ra + * Note: 'text' is the address within the same 1GB range as the ra */ -#define MAKE_PC_FROM_RA(ra,sp) (((ra) & 0x3fffffff) | ((sp) & 0xc0000000)) +#define MAKE_PC_FROM_RA(ra, text) (((ra) & 0x3fffffff) | ((unsigned long)(text) & 0xc0000000)) #elif defined(__XTENSA_CALL0_ABI__) @@ -127,9 +127,9 @@ #define MAKE_RA_FOR_CALL(ra, ws) (ra) /* Convert return address to a valid pc - * Note: We assume that the stack pointer is in the same 1GB ranges as the ra + * Note: 'text' is not used as 'ra' is always the full address */ -#define MAKE_PC_FROM_RA(ra, sp) (ra) +#define MAKE_PC_FROM_RA(ra, text) (ra) #else #error Unsupported Xtensa ABI --- linux-xilinx-6.8.0.orig/arch/xtensa/include/asm/ptrace.h +++ linux-xilinx-6.8.0/arch/xtensa/include/asm/ptrace.h @@ -87,7 +87,7 @@ # define user_mode(regs) (((regs)->ps & 0x00000020)!=0) # define instruction_pointer(regs) ((regs)->pc) # define return_pointer(regs) (MAKE_PC_FROM_RA((regs)->areg[0], \ - (regs)->areg[1])) + (regs)->pc)) # ifndef CONFIG_SMP # define profile_pc(regs) instruction_pointer(regs) --- linux-xilinx-6.8.0.orig/arch/xtensa/kernel/process.c +++ linux-xilinx-6.8.0/arch/xtensa/kernel/process.c @@ -47,6 +47,7 @@ #include #include #include +#include #include extern void ret_from_fork(void); @@ -380,7 +381,7 @@ int count = 0; sp = p->thread.sp; - pc = MAKE_PC_FROM_RA(p->thread.ra, p->thread.sp); + pc = MAKE_PC_FROM_RA(p->thread.ra, _text); do { if (sp < stack_page + sizeof(struct task_struct) || @@ -392,7 +393,7 @@ /* Stack layout: sp-4: ra, sp-3: sp' */ - pc = MAKE_PC_FROM_RA(SPILL_SLOT(sp, 0), sp); + pc = MAKE_PC_FROM_RA(SPILL_SLOT(sp, 0), _text); sp = SPILL_SLOT(sp, 1); } while (count++ < 16); return 0; --- linux-xilinx-6.8.0.orig/arch/xtensa/kernel/setup.c +++ linux-xilinx-6.8.0/arch/xtensa/kernel/setup.c @@ -216,7 +216,7 @@ void __init early_init_devtree(void *params) { - early_init_dt_scan(params); + early_init_dt_scan(params, __pa(params)); of_scan_flat_dt(xtensa_dt_io_area, NULL); if (!command_line[0]) --- linux-xilinx-6.8.0.orig/arch/xtensa/kernel/stacktrace.c +++ linux-xilinx-6.8.0/arch/xtensa/kernel/stacktrace.c @@ -13,6 +13,7 @@ #include #include +#include #include #include #include @@ -189,7 +190,7 @@ if (a1 <= (unsigned long)sp) break; - frame.pc = MAKE_PC_FROM_RA(a0, a1); + frame.pc = MAKE_PC_FROM_RA(a0, _text); frame.sp = a1; if (fn(&frame, data)) --- linux-xilinx-6.8.0.orig/block/bdev.c +++ linux-xilinx-6.8.0/block/bdev.c @@ -639,6 +639,14 @@ bdev_write_inode(bdev); } +static void blkdev_put_whole(struct block_device *bdev) +{ + if (atomic_dec_and_test(&bdev->bd_openers)) + blkdev_flush_mapping(bdev); + if (bdev->bd_disk->fops->release) + bdev->bd_disk->fops->release(bdev->bd_disk); +} + static int blkdev_get_whole(struct block_device *bdev, blk_mode_t mode) { struct gendisk *disk = bdev->bd_disk; @@ -657,20 +665,21 @@ if (!atomic_read(&bdev->bd_openers)) set_init_blocksize(bdev); - if (test_bit(GD_NEED_PART_SCAN, &disk->state)) - bdev_disk_changed(disk, false); atomic_inc(&bdev->bd_openers); + if (test_bit(GD_NEED_PART_SCAN, &disk->state)) { + /* + * Only return scanning errors if we are called from contexts + * that explicitly want them, e.g. the BLKRRPART ioctl. + */ + ret = bdev_disk_changed(disk, false); + if (ret && (mode & BLK_OPEN_STRICT_SCAN)) { + blkdev_put_whole(bdev); + return ret; + } + } return 0; } -static void blkdev_put_whole(struct block_device *bdev) -{ - if (atomic_dec_and_test(&bdev->bd_openers)) - blkdev_flush_mapping(bdev); - if (bdev->bd_disk->fops->release) - bdev->bd_disk->fops->release(bdev->bd_disk); -} - static int blkdev_get_part(struct block_device *part, blk_mode_t mode) { struct gendisk *disk = part->bd_disk; @@ -738,17 +747,17 @@ static bool bdev_writes_blocked(struct block_device *bdev) { - return bdev->bd_writers == -1; + return bdev->bd_writers < 0; } static void bdev_block_writes(struct block_device *bdev) { - bdev->bd_writers = -1; + bdev->bd_writers--; } static void bdev_unblock_writes(struct block_device *bdev) { - bdev->bd_writers = 0; + bdev->bd_writers++; } static bool bdev_may_open(struct block_device *bdev, blk_mode_t mode) @@ -864,7 +873,7 @@ goto abort_claiming; ret = -EBUSY; if (!bdev_may_open(bdev, mode)) - goto abort_claiming; + goto put_module; if (bdev_is_partition(bdev)) ret = blkdev_get_part(bdev, mode); else --- linux-xilinx-6.8.0.orig/block/bfq-iosched.c +++ linux-xilinx-6.8.0/block/bfq-iosched.c @@ -582,23 +582,31 @@ #define BFQ_LIMIT_INLINE_DEPTH 16 #ifdef CONFIG_BFQ_GROUP_IOSCHED -static bool bfqq_request_over_limit(struct bfq_queue *bfqq, int limit) +static bool bfqq_request_over_limit(struct bfq_data *bfqd, + struct bfq_io_cq *bic, blk_opf_t opf, + unsigned int act_idx, int limit) { - struct bfq_data *bfqd = bfqq->bfqd; - struct bfq_entity *entity = &bfqq->entity; struct bfq_entity *inline_entities[BFQ_LIMIT_INLINE_DEPTH]; struct bfq_entity **entities = inline_entities; - int depth, level, alloc_depth = BFQ_LIMIT_INLINE_DEPTH; - int class_idx = bfqq->ioprio_class - 1; + int alloc_depth = BFQ_LIMIT_INLINE_DEPTH; struct bfq_sched_data *sched_data; + struct bfq_entity *entity; + struct bfq_queue *bfqq; unsigned long wsum; bool ret = false; - - if (!entity->on_st_or_in_serv) - return false; + int depth; + int level; retry: spin_lock_irq(&bfqd->lock); + bfqq = bic_to_bfqq(bic, op_is_sync(opf), act_idx); + if (!bfqq) + goto out; + + entity = &bfqq->entity; + if (!entity->on_st_or_in_serv) + goto out; + /* +1 for bfqq entity, root cgroup not included */ depth = bfqg_to_blkg(bfqq_group(bfqq))->blkcg->css.cgroup->level + 1; if (depth > alloc_depth) { @@ -643,7 +651,7 @@ * class. */ wsum = 0; - for (i = 0; i <= class_idx; i++) { + for (i = 0; i <= bfqq->ioprio_class - 1; i++) { wsum = wsum * IOPRIO_BE_NR + sched_data->service_tree[i].wsum; } @@ -666,7 +674,9 @@ return ret; } #else -static bool bfqq_request_over_limit(struct bfq_queue *bfqq, int limit) +static bool bfqq_request_over_limit(struct bfq_data *bfqd, + struct bfq_io_cq *bic, blk_opf_t opf, + unsigned int act_idx, int limit) { return false; } @@ -704,8 +714,9 @@ } for (act_idx = 0; bic && act_idx < bfqd->num_actuators; act_idx++) { - struct bfq_queue *bfqq = - bic_to_bfqq(bic, op_is_sync(opf), act_idx); + /* Fast path to check if bfqq is already allocated. */ + if (!bic_to_bfqq(bic, op_is_sync(opf), act_idx)) + continue; /* * Does queue (or any parent entity) exceed number of @@ -713,7 +724,7 @@ * limit depth so that it cannot consume more * available requests and thus starve other entities. */ - if (bfqq && bfqq_request_over_limit(bfqq, limit)) { + if (bfqq_request_over_limit(bfqd, bic, opf, act_idx, limit)) { depth = 1; break; } @@ -2911,8 +2922,12 @@ struct bfq_iocq_bfqq_data *bfqq_data = &bic->bfqq_data[a_idx]; /* if a merge has already been setup, then proceed with that first */ - if (bfqq->new_bfqq) - return bfqq->new_bfqq; + new_bfqq = bfqq->new_bfqq; + if (new_bfqq) { + while (new_bfqq->new_bfqq) + new_bfqq = new_bfqq->new_bfqq; + return new_bfqq; + } /* * Check delayed stable merge for rotational or non-queueing @@ -3125,10 +3140,12 @@ bfq_put_queue(bfqq); } -static void -bfq_merge_bfqqs(struct bfq_data *bfqd, struct bfq_io_cq *bic, - struct bfq_queue *bfqq, struct bfq_queue *new_bfqq) +static struct bfq_queue *bfq_merge_bfqqs(struct bfq_data *bfqd, + struct bfq_io_cq *bic, + struct bfq_queue *bfqq) { + struct bfq_queue *new_bfqq = bfqq->new_bfqq; + bfq_log_bfqq(bfqd, bfqq, "merging with queue %lu", (unsigned long)new_bfqq->pid); /* Save weight raising and idle window of the merged queues */ @@ -3222,6 +3239,8 @@ bfq_reassign_last_bfqq(bfqq, new_bfqq); bfq_release_process_ref(bfqd, bfqq); + + return new_bfqq; } static bool bfq_allow_bio_merge(struct request_queue *q, struct request *rq, @@ -3257,14 +3276,8 @@ * fulfilled, i.e., bic can be redirected to new_bfqq * and bfqq can be put. */ - bfq_merge_bfqqs(bfqd, bfqd->bio_bic, bfqq, - new_bfqq); - /* - * If we get here, bio will be queued into new_queue, - * so use new_bfqq to decide whether bio and rq can be - * merged. - */ - bfqq = new_bfqq; + while (bfqq != new_bfqq) + bfqq = bfq_merge_bfqqs(bfqd, bfqd->bio_bic, bfqq); /* * Change also bqfd->bio_bfqq, as @@ -5699,9 +5712,7 @@ * state before killing it. */ bfqq->bic = bic; - bfq_merge_bfqqs(bfqd, bic, bfqq, new_bfqq); - - return new_bfqq; + return bfq_merge_bfqqs(bfqd, bic, bfqq); } /* @@ -6156,6 +6167,7 @@ bool waiting, idle_timer_disabled = false; if (new_bfqq) { + struct bfq_queue *old_bfqq = bfqq; /* * Release the request's reference to the old bfqq * and make sure one is taken to the shared queue. @@ -6172,18 +6184,18 @@ * new_bfqq. */ if (bic_to_bfqq(RQ_BIC(rq), true, - bfq_actuator_index(bfqd, rq->bio)) == bfqq) - bfq_merge_bfqqs(bfqd, RQ_BIC(rq), - bfqq, new_bfqq); + bfq_actuator_index(bfqd, rq->bio)) == bfqq) { + while (bfqq != new_bfqq) + bfqq = bfq_merge_bfqqs(bfqd, RQ_BIC(rq), bfqq); + } - bfq_clear_bfqq_just_created(bfqq); + bfq_clear_bfqq_just_created(old_bfqq); /* * rq is about to be enqueued into new_bfqq, * release rq reference on bfqq */ - bfq_put_queue(bfqq); + bfq_put_queue(old_bfqq); rq->elv.priv[1] = new_bfqq; - bfqq = new_bfqq; } bfq_update_io_thinktime(bfqd, bfqq); @@ -6721,7 +6733,7 @@ { bfq_log_bfqq(bfqq->bfqd, bfqq, "splitting queue"); - if (bfqq_process_refs(bfqq) == 1) { + if (bfqq_process_refs(bfqq) == 1 && !bfqq->new_bfqq) { bfqq->pid = current->pid; bfq_clear_bfqq_coop(bfqq); bfq_clear_bfqq_split_coop(bfqq); @@ -6819,6 +6831,39 @@ rq->elv.priv[0] = rq->elv.priv[1] = NULL; } +static struct bfq_queue *bfq_waker_bfqq(struct bfq_queue *bfqq) +{ + struct bfq_queue *new_bfqq = bfqq->new_bfqq; + struct bfq_queue *waker_bfqq = bfqq->waker_bfqq; + + if (!waker_bfqq) + return NULL; + + while (new_bfqq) { + if (new_bfqq == waker_bfqq) { + /* + * If waker_bfqq is in the merge chain, and current + * is the only process, waker_bfqq can be freed. + */ + if (bfqq_process_refs(waker_bfqq) == 1) + return NULL; + + return waker_bfqq; + } + + new_bfqq = new_bfqq->new_bfqq; + } + + /* + * If waker_bfqq is not in the merge chain, and it's procress reference + * is 0, waker_bfqq can be freed. + */ + if (bfqq_process_refs(waker_bfqq) == 0) + return NULL; + + return waker_bfqq; +} + /* * If needed, init rq, allocate bfq data structures associated with * rq, and increment reference counters in the destination bfq_queue @@ -6880,7 +6925,7 @@ /* If the queue was seeky for too long, break it apart. */ if (bfq_bfqq_coop(bfqq) && bfq_bfqq_split_coop(bfqq) && !bic->bfqq_data[a_idx].stably_merged) { - struct bfq_queue *old_bfqq = bfqq; + struct bfq_queue *waker_bfqq = bfq_waker_bfqq(bfqq); /* Update bic before losing reference to bfqq */ if (bfq_bfqq_in_large_burst(bfqq)) @@ -6900,7 +6945,7 @@ bfqq_already_existing = true; if (!bfqq_already_existing) { - bfqq->waker_bfqq = old_bfqq->waker_bfqq; + bfqq->waker_bfqq = waker_bfqq; bfqq->tentative_waker_bfqq = NULL; /* @@ -6910,7 +6955,7 @@ * woken_list of the waker. See * bfq_check_waker for details. */ - if (bfqq->waker_bfqq) + if (waker_bfqq) hlist_add_head(&bfqq->woken_list_node, &bfqq->waker_bfqq->woken_list); } @@ -6932,7 +6977,8 @@ * addition, if the queue has also just been split, we have to * resume its state. */ - if (likely(bfqq != &bfqd->oom_bfqq) && bfqq_process_refs(bfqq) == 1) { + if (likely(bfqq != &bfqd->oom_bfqq) && !bfqq->new_bfqq && + bfqq_process_refs(bfqq) == 1) { bfqq->bic = bic; if (split) { /* --- linux-xilinx-6.8.0.orig/block/bio-integrity.c +++ linux-xilinx-6.8.0/block/bio-integrity.c @@ -105,17 +105,18 @@ static void bio_integrity_uncopy_user(struct bio_integrity_payload *bip) { - unsigned short nr_vecs = bip->bip_max_vcnt - 1; - struct bio_vec *copy = &bip->bip_vec[1]; - size_t bytes = bip->bip_iter.bi_size; - struct iov_iter iter; + unsigned short orig_nr_vecs = bip->bip_max_vcnt - 1; + struct bio_vec *orig_bvecs = &bip->bip_vec[1]; + struct bio_vec *bounce_bvec = &bip->bip_vec[0]; + size_t bytes = bounce_bvec->bv_len; + struct iov_iter orig_iter; int ret; - iov_iter_bvec(&iter, ITER_DEST, copy, nr_vecs, bytes); - ret = copy_to_iter(bvec_virt(bip->bip_vec), bytes, &iter); + iov_iter_bvec(&orig_iter, ITER_DEST, orig_bvecs, orig_nr_vecs, bytes); + ret = copy_to_iter(bvec_virt(bounce_bvec), bytes, &orig_iter); WARN_ON_ONCE(ret != bytes); - bio_integrity_unpin_bvec(copy, nr_vecs, true); + bio_integrity_unpin_bvec(orig_bvecs, orig_nr_vecs, true); } static void bio_integrity_unmap_user(struct bio_integrity_payload *bip) @@ -431,6 +432,7 @@ unsigned long start, end; unsigned int len, nr_pages; unsigned int bytes, offset, i; + gfp_t gfp = GFP_NOIO; if (!bi) return true; @@ -453,11 +455,19 @@ if (!bi->profile->generate_fn || !(bi->flags & BLK_INTEGRITY_GENERATE)) return true; + + /* + * Zero the memory allocated to not leak uninitialized kernel + * memory to disk. For PI this only affects the app tag, but + * for non-integrity metadata it affects the entire metadata + * buffer. + */ + gfp |= __GFP_ZERO; } /* Allocate kernel buffer for protection data */ len = bio_integrity_bytes(bi, bio_sectors(bio)); - buf = kmalloc(len, GFP_NOIO); + buf = kmalloc(len, gfp); if (unlikely(buf == NULL)) { printk(KERN_ERR "could not allocate integrity buffer\n"); goto err_end_io; --- linux-xilinx-6.8.0.orig/block/bio.c +++ linux-xilinx-6.8.0/block/bio.c @@ -1152,7 +1152,7 @@ bio_for_each_folio_all(fi, bio) { struct page *page; - size_t done = 0; + size_t nr_pages; if (mark_dirty) { folio_lock(fi.folio); @@ -1160,10 +1160,11 @@ folio_unlock(fi.folio); } page = folio_page(fi.folio, fi.offset / PAGE_SIZE); + nr_pages = (fi.offset + fi.length - 1) / PAGE_SIZE - + fi.offset / PAGE_SIZE + 1; do { bio_release_page(bio, page++); - done += PAGE_SIZE; - } while (done < fi.length); + } while (--nr_pages != 0); } } EXPORT_SYMBOL_GPL(__bio_release_pages); @@ -1602,8 +1603,18 @@ } blk_throtl_bio_endio(bio); - /* release cgroup info */ - bio_uninit(bio); +#ifdef CONFIG_BLK_CGROUP + /* + * Release cgroup info. We shouldn't have to do this here, but quite + * a few callers of bio_init fail to call bio_uninit, so we cover up + * for that here at least for now. + */ + if (bio->bi_blkg) { + blkg_put(bio->bi_blkg); + bio->bi_blkg = NULL; + } +#endif + if (bio->bi_end_io) bio->bi_end_io(bio); } --- linux-xilinx-6.8.0.orig/block/blk-cgroup.c +++ linux-xilinx-6.8.0/block/blk-cgroup.c @@ -323,6 +323,7 @@ blkg->q = disk->queue; INIT_LIST_HEAD(&blkg->q_node); blkg->blkcg = blkcg; + blkg->iostat.blkg = blkg; #ifdef CONFIG_BLK_CGROUP_PUNT_BIO spin_lock_init(&blkg->async_bio_lock); bio_list_init(&blkg->async_bios); @@ -619,12 +620,45 @@ spin_unlock_irq(&q->queue_lock); } +static void blkg_iostat_set(struct blkg_iostat *dst, struct blkg_iostat *src) +{ + int i; + + for (i = 0; i < BLKG_IOSTAT_NR; i++) { + dst->bytes[i] = src->bytes[i]; + dst->ios[i] = src->ios[i]; + } +} + +static void __blkg_clear_stat(struct blkg_iostat_set *bis) +{ + struct blkg_iostat cur = {0}; + unsigned long flags; + + flags = u64_stats_update_begin_irqsave(&bis->sync); + blkg_iostat_set(&bis->cur, &cur); + blkg_iostat_set(&bis->last, &cur); + u64_stats_update_end_irqrestore(&bis->sync, flags); +} + +static void blkg_clear_stat(struct blkcg_gq *blkg) +{ + int cpu; + + for_each_possible_cpu(cpu) { + struct blkg_iostat_set *s = per_cpu_ptr(blkg->iostat_cpu, cpu); + + __blkg_clear_stat(s); + } + __blkg_clear_stat(&blkg->iostat); +} + static int blkcg_reset_stats(struct cgroup_subsys_state *css, struct cftype *cftype, u64 val) { struct blkcg *blkcg = css_to_blkcg(css); struct blkcg_gq *blkg; - int i, cpu; + int i; mutex_lock(&blkcg_pol_mutex); spin_lock_irq(&blkcg->lock); @@ -635,18 +669,7 @@ * anyway. If you get hit by a race, retry. */ hlist_for_each_entry(blkg, &blkcg->blkg_list, blkcg_node) { - for_each_possible_cpu(cpu) { - struct blkg_iostat_set *bis = - per_cpu_ptr(blkg->iostat_cpu, cpu); - memset(bis, 0, sizeof(*bis)); - - /* Re-initialize the cleared blkg_iostat_set */ - u64_stats_init(&bis->sync); - bis->blkg = blkg; - } - memset(&blkg->iostat, 0, sizeof(blkg->iostat)); - u64_stats_init(&blkg->iostat.sync); - + blkg_clear_stat(blkg); for (i = 0; i < BLKCG_MAX_POLS; i++) { struct blkcg_policy *pol = blkcg_policy[i]; @@ -949,16 +972,6 @@ } EXPORT_SYMBOL_GPL(blkg_conf_exit); -static void blkg_iostat_set(struct blkg_iostat *dst, struct blkg_iostat *src) -{ - int i; - - for (i = 0; i < BLKG_IOSTAT_NR; i++) { - dst->bytes[i] = src->bytes[i]; - dst->ios[i] = src->ios[i]; - } -} - static void blkg_iostat_add(struct blkg_iostat *dst, struct blkg_iostat *src) { int i; @@ -1024,7 +1037,19 @@ struct blkg_iostat cur; unsigned int seq; + /* + * Order assignment of `next_bisc` from `bisc->lnode.next` in + * llist_for_each_entry_safe and clearing `bisc->lqueued` for + * avoiding to assign `next_bisc` with new next pointer added + * in blk_cgroup_bio_start() in case of re-ordering. + * + * The pair barrier is implied in llist_add() in blk_cgroup_bio_start(). + */ + smp_mb(); + WRITE_ONCE(bisc->lqueued, false); + if (bisc == &blkg->iostat) + goto propagate_up; /* propagate up to parent only */ /* fetch the current per-cpu values */ do { @@ -1034,10 +1059,24 @@ blkcg_iostat_update(blkg, &cur, &bisc->last); +propagate_up: /* propagate global delta to parent (unless that's root) */ - if (parent && parent->parent) + if (parent && parent->parent) { blkcg_iostat_update(parent, &blkg->iostat.cur, &blkg->iostat.last); + /* + * Queue parent->iostat to its blkcg's lockless + * list to propagate up to the grandparent if the + * iostat hasn't been queued yet. + */ + if (!parent->iostat.lqueued) { + struct llist_head *plhead; + + plhead = per_cpu_ptr(parent->blkcg->lhead, cpu); + llist_add(&parent->iostat.lnode, plhead); + parent->iostat.lqueued = true; + } + } } raw_spin_unlock_irqrestore(&blkg_stat_lock, flags); out: @@ -1100,6 +1139,7 @@ blkg_iostat_set(&blkg->iostat.cur, &tmp); u64_stats_update_end_irqrestore(&blkg->iostat.sync, flags); } + class_dev_iter_exit(&iter); } static void blkcg_print_one_stat(struct blkcg_gq *blkg, struct seq_file *s) @@ -1286,10 +1326,14 @@ struct blkcg *blkcg = css_to_blkcg(blkcg_css); do { + struct blkcg *parent; + if (!refcount_dec_and_test(&blkcg->online_pin)) break; + + parent = blkcg_parent(blkcg); blkcg_destroy_blkgs(blkcg); - blkcg = blkcg_parent(blkcg); + blkcg = parent; } while (blkcg); } @@ -1409,6 +1453,12 @@ return 0; } +void blkg_init_queue(struct request_queue *q) +{ + INIT_LIST_HEAD(&q->blkg_list); + mutex_init(&q->blkcg_mutex); +} + int blkcg_init_disk(struct gendisk *disk) { struct request_queue *q = disk->queue; @@ -1416,9 +1466,6 @@ bool preloaded; int ret; - INIT_LIST_HEAD(&q->blkg_list); - mutex_init(&q->blkcg_mutex); - new_blkg = blkg_alloc(&blkcg_root, disk, GFP_KERNEL); if (!new_blkg) return -ENOMEM; --- linux-xilinx-6.8.0.orig/block/blk-cgroup.h +++ linux-xilinx-6.8.0/block/blk-cgroup.h @@ -188,6 +188,7 @@ extern struct blkcg blkcg_root; extern bool blkcg_debug_stats; +void blkg_init_queue(struct request_queue *q); int blkcg_init_disk(struct gendisk *disk); void blkcg_exit_disk(struct gendisk *disk); @@ -481,6 +482,7 @@ }; static inline struct blkcg_gq *blkg_lookup(struct blkcg *blkcg, void *key) { return NULL; } +static inline void blkg_init_queue(struct request_queue *q) { } static inline int blkcg_init_disk(struct gendisk *disk) { return 0; } static inline void blkcg_exit_disk(struct gendisk *disk) { } static inline int blkcg_policy_register(struct blkcg_policy *pol) { return 0; } --- linux-xilinx-6.8.0.orig/block/blk-core.c +++ linux-xilinx-6.8.0/block/blk-core.c @@ -273,6 +273,8 @@ blk_mq_release(q); ida_free(&blk_queue_ida, q->id); + lockdep_unregister_key(&q->io_lock_cls_key); + lockdep_unregister_key(&q->q_lock_cls_key); call_rcu(&q->rcu_head, blk_free_queue_rcu); } @@ -290,18 +292,20 @@ } EXPORT_SYMBOL(blk_put_queue); -void blk_queue_start_drain(struct request_queue *q) +bool blk_queue_start_drain(struct request_queue *q) { /* * When queue DYING flag is set, we need to block new req * entering queue, so we call blk_freeze_queue_start() to * prevent I/O from crossing blk_queue_enter(). */ - blk_freeze_queue_start(q); + bool freeze = __blk_freeze_queue_start(q, current); if (queue_is_mq(q)) blk_mq_wake_waiters(q); /* Make blk_queue_enter() reexamine the DYING flag. */ wake_up_all(&q->mq_freeze_wq); + + return freeze; } /** @@ -333,6 +337,8 @@ return -ENODEV; } + rwsem_acquire_read(&q->q_lockdep_map, 0, 0, _RET_IP_); + rwsem_release(&q->q_lockdep_map, _RET_IP_); return 0; } @@ -364,6 +370,8 @@ goto dead; } + rwsem_acquire_read(&q->io_lockdep_map, 0, 0, _RET_IP_); + rwsem_release(&q->io_lockdep_map, _RET_IP_); return 0; dead: bio_io_error(bio); @@ -431,6 +439,8 @@ init_waitqueue_head(&q->mq_freeze_wq); mutex_init(&q->mq_freeze_lock); + blkg_init_queue(q); + /* * Init percpu_ref in atomic mode so that it's faster to shutdown. * See blk_register_queue() for details. @@ -439,6 +449,12 @@ blk_queue_usage_counter_release, PERCPU_REF_INIT_ATOMIC, GFP_KERNEL)) goto fail_stats; + lockdep_register_key(&q->io_lock_cls_key); + lockdep_register_key(&q->q_lock_cls_key); + lockdep_init_map(&q->io_lockdep_map, "&q->q_usage_counter(io)", + &q->io_lock_cls_key, 0); + lockdep_init_map(&q->q_lockdep_map, "&q->q_usage_counter(queue)", + &q->q_lock_cls_key, 0); blk_set_default_limits(&q->limits); q->nr_requests = BLKDEV_DEFAULT_RQ; @@ -974,10 +990,11 @@ unsigned long stamp; again: stamp = READ_ONCE(part->bd_stamp); - if (unlikely(time_after(now, stamp))) { - if (likely(try_cmpxchg(&part->bd_stamp, &stamp, now))) - __part_stat_add(part, io_ticks, end ? now - stamp : 1); - } + if (unlikely(time_after(now, stamp)) && + likely(try_cmpxchg(&part->bd_stamp, &stamp, now)) && + (end || part_in_flight(part))) + __part_stat_add(part, io_ticks, now - stamp); + if (part->bd_partno) { part = bdev_whole(part); goto again; --- linux-xilinx-6.8.0.orig/block/blk-flush.c +++ linux-xilinx-6.8.0/block/blk-flush.c @@ -183,7 +183,7 @@ /* queue for flush */ if (list_empty(pending)) fq->flush_pending_since = jiffies; - list_move_tail(&rq->queuelist, pending); + list_add_tail(&rq->queuelist, pending); break; case REQ_FSEQ_DATA: @@ -261,6 +261,7 @@ unsigned int seq = blk_flush_cur_seq(rq); BUG_ON(seq != REQ_FSEQ_PREFLUSH && seq != REQ_FSEQ_POSTFLUSH); + list_del_init(&rq->queuelist); blk_flush_complete_seq(rq, fq, seq, error); } --- linux-xilinx-6.8.0.orig/block/blk-integrity.c +++ linux-xilinx-6.8.0/block/blk-integrity.c @@ -396,8 +396,6 @@ if (!bi->profile) return; - /* ensure all bios are off the integrity workqueue */ - blk_flush_integrity(); blk_queue_flag_clear(QUEUE_FLAG_STABLE_WRITES, disk->queue); memset(bi, 0, sizeof(*bi)); } --- linux-xilinx-6.8.0.orig/block/blk-iocost.c +++ linux-xilinx-6.8.0/block/blk-iocost.c @@ -1098,7 +1098,14 @@ inuse = DIV64_U64_ROUND_UP(active * iocg->child_inuse_sum, iocg->child_active_sum); } else { - inuse = clamp_t(u32, inuse, 1, active); + /* + * It may be tempting to turn this into a clamp expression with + * a lower limit of 1 but active may be 0, which cannot be used + * as an upper limit in that situation. This expression allows + * active to clamp inuse unless it is 0, in which case inuse + * becomes 1. + */ + inuse = min(inuse, active) ?: 1; } iocg->last_inuse = iocg->inuse; @@ -1347,7 +1354,7 @@ { struct ioc *ioc = iocg->ioc; struct blkcg_gq *blkg = iocg_to_blkg(iocg); - u64 tdelta, delay, new_delay; + u64 tdelta, delay, new_delay, shift; s64 vover, vover_pct; u32 hwa; @@ -1362,8 +1369,9 @@ /* calculate the current delay in effect - 1/2 every second */ tdelta = now->now - iocg->delay_at; - if (iocg->delay) - delay = iocg->delay >> div64_u64(tdelta, USEC_PER_SEC); + shift = div64_u64(tdelta, USEC_PER_SEC); + if (iocg->delay && shift < BITS_PER_LONG) + delay = iocg->delay >> shift; else delay = 0; @@ -1438,8 +1446,11 @@ lockdep_assert_held(&iocg->ioc->lock); lockdep_assert_held(&iocg->waitq.lock); - /* make sure that nobody messed with @iocg */ - WARN_ON_ONCE(list_empty(&iocg->active_list)); + /* + * make sure that nobody messed with @iocg. Check iocg->pd.online + * to avoid warn when removing blkcg or disk. + */ + WARN_ON_ONCE(list_empty(&iocg->active_list) && iocg->pd.online); WARN_ON_ONCE(iocg->inuse > 1); iocg->abs_vdebt -= min(abs_vpay, iocg->abs_vdebt); @@ -2072,7 +2083,7 @@ struct ioc_now *now) { struct ioc_gq *iocg; - u64 dur, usage_pct, nr_cycles; + u64 dur, usage_pct, nr_cycles, nr_cycles_shift; /* if no debtor, reset the cycle */ if (!nr_debtors) { @@ -2134,10 +2145,12 @@ old_debt = iocg->abs_vdebt; old_delay = iocg->delay; + nr_cycles_shift = min_t(u64, nr_cycles, BITS_PER_LONG - 1); if (iocg->abs_vdebt) - iocg->abs_vdebt = iocg->abs_vdebt >> nr_cycles ?: 1; + iocg->abs_vdebt = iocg->abs_vdebt >> nr_cycles_shift ?: 1; + if (iocg->delay) - iocg->delay = iocg->delay >> nr_cycles ?: 1; + iocg->delay = iocg->delay >> nr_cycles_shift ?: 1; iocg_kick_waitq(iocg, true, now); --- linux-xilinx-6.8.0.orig/block/blk-map.c +++ linux-xilinx-6.8.0/block/blk-map.c @@ -600,9 +600,7 @@ if (nsegs >= nr_segs || bytes > UINT_MAX - bv->bv_len) goto put_bio; if (bytes + bv->bv_len > nr_iter) - goto put_bio; - if (bv->bv_offset + bv->bv_len > PAGE_SIZE) - goto put_bio; + break; nsegs++; bytes += bv->bv_len; --- linux-xilinx-6.8.0.orig/block/blk-merge.c +++ linux-xilinx-6.8.0/block/blk-merge.c @@ -252,6 +252,14 @@ return len > 0 || bv->bv_len > max_len; } +static unsigned int bio_split_alignment(struct bio *bio, + const struct queue_limits *lim) +{ + if (op_is_write(bio_op(bio)) && lim->zone_write_granularity) + return lim->zone_write_granularity; + return lim->logical_block_size; +} + /** * bio_split_rw - split a bio in two bios * @bio: [in] bio to be split @@ -322,7 +330,7 @@ * split size so that each bio is properly block size aligned, even if * we do not use the full hardware limits. */ - bytes = ALIGN_DOWN(bytes, lim->logical_block_size); + bytes = ALIGN_DOWN(bytes, bio_split_alignment(bio, lim)); /* * Bio splitting may cause subtle trouble such as hang when doing sync @@ -779,6 +787,8 @@ if (blk_do_io_stat(req)) { part_stat_lock(); part_stat_inc(req->part, merges[op_stat_group(req_op(req))]); + part_stat_local_dec(req->part, + in_flight[op_is_write(req_op(req))]); part_stat_unlock(); } } --- linux-xilinx-6.8.0.orig/block/blk-mq-tag.c +++ linux-xilinx-6.8.0/block/blk-mq-tag.c @@ -38,6 +38,7 @@ void __blk_mq_tag_busy(struct blk_mq_hw_ctx *hctx) { unsigned int users; + unsigned long flags; struct blk_mq_tags *tags = hctx->tags; /* @@ -56,11 +57,11 @@ return; } - spin_lock_irq(&tags->lock); + spin_lock_irqsave(&tags->lock, flags); users = tags->active_queues + 1; WRITE_ONCE(tags->active_queues, users); blk_mq_update_wake_batch(tags, users); - spin_unlock_irq(&tags->lock); + spin_unlock_irqrestore(&tags->lock, flags); } /* --- linux-xilinx-6.8.0.orig/block/blk-mq.c +++ linux-xilinx-6.8.0/block/blk-mq.c @@ -43,6 +43,7 @@ static DEFINE_PER_CPU(struct llist_head, blk_cpu_done); static DEFINE_PER_CPU(call_single_data_t, blk_cpu_csd); +static DEFINE_MUTEX(blk_mq_cpuhp_lock); static void blk_mq_insert_request(struct request *rq, blk_insert_t flags); static void blk_mq_request_bypass_insert(struct request *rq, @@ -120,9 +121,59 @@ inflight[1] = mi.inflight[1]; } -void blk_freeze_queue_start(struct request_queue *q) +#ifdef CONFIG_LOCKDEP +static bool blk_freeze_set_owner(struct request_queue *q, + struct task_struct *owner) +{ + if (!owner) + return false; + + if (!q->mq_freeze_depth) { + q->mq_freeze_owner = owner; + q->mq_freeze_owner_depth = 1; + return true; + } + + if (owner == q->mq_freeze_owner) + q->mq_freeze_owner_depth += 1; + return false; +} + +/* verify the last unfreeze in owner context */ +static bool blk_unfreeze_check_owner(struct request_queue *q) +{ + if (!q->mq_freeze_owner) + return false; + if (q->mq_freeze_owner != current) + return false; + if (--q->mq_freeze_owner_depth == 0) { + q->mq_freeze_owner = NULL; + return true; + } + return false; +} + +#else + +static bool blk_freeze_set_owner(struct request_queue *q, + struct task_struct *owner) +{ + return false; +} + +static bool blk_unfreeze_check_owner(struct request_queue *q) { + return false; +} +#endif + +bool __blk_freeze_queue_start(struct request_queue *q, + struct task_struct *owner) +{ + bool freeze; + mutex_lock(&q->mq_freeze_lock); + freeze = blk_freeze_set_owner(q, owner); if (++q->mq_freeze_depth == 1) { percpu_ref_kill(&q->q_usage_counter); mutex_unlock(&q->mq_freeze_lock); @@ -131,6 +182,14 @@ } else { mutex_unlock(&q->mq_freeze_lock); } + + return freeze; +} + +void blk_freeze_queue_start(struct request_queue *q) +{ + if (__blk_freeze_queue_start(q, current)) + blk_freeze_acquire_lock(q, false, false); } EXPORT_SYMBOL_GPL(blk_freeze_queue_start); @@ -176,8 +235,10 @@ } EXPORT_SYMBOL_GPL(blk_mq_freeze_queue); -void __blk_mq_unfreeze_queue(struct request_queue *q, bool force_atomic) +bool __blk_mq_unfreeze_queue(struct request_queue *q, bool force_atomic) { + bool unfreeze; + mutex_lock(&q->mq_freeze_lock); if (force_atomic) q->q_usage_counter.data->force_atomic = true; @@ -187,16 +248,40 @@ percpu_ref_resurrect(&q->q_usage_counter); wake_up_all(&q->mq_freeze_wq); } + unfreeze = blk_unfreeze_check_owner(q); mutex_unlock(&q->mq_freeze_lock); + + return unfreeze; } void blk_mq_unfreeze_queue(struct request_queue *q) { - __blk_mq_unfreeze_queue(q, false); + if (__blk_mq_unfreeze_queue(q, false)) + blk_unfreeze_release_lock(q, false, false); } EXPORT_SYMBOL_GPL(blk_mq_unfreeze_queue); /* + * non_owner variant of blk_freeze_queue_start + * + * Unlike blk_freeze_queue_start, the queue doesn't need to be unfrozen + * by the same task. This is fragile and should not be used if at all + * possible. + */ +void blk_freeze_queue_start_non_owner(struct request_queue *q) +{ + __blk_freeze_queue_start(q, NULL); +} +EXPORT_SYMBOL_GPL(blk_freeze_queue_start_non_owner); + +/* non_owner variant of blk_mq_unfreeze_queue */ +void blk_mq_unfreeze_queue_non_owner(struct request_queue *q) +{ + __blk_mq_unfreeze_queue(q, false); +} +EXPORT_SYMBOL_GPL(blk_mq_unfreeze_queue_non_owner); + +/* * FIXME: replace the scsi_internal_device_*block_nowait() calls in the * mpt3sas driver such that this function can be removed. */ @@ -283,8 +368,9 @@ if (!blk_queue_skip_tagset_quiesce(q)) blk_mq_quiesce_queue_nowait(q); } - blk_mq_wait_quiesce_done(set); mutex_unlock(&set->tag_list_lock); + + blk_mq_wait_quiesce_done(set); } EXPORT_SYMBOL_GPL(blk_mq_quiesce_tagset); @@ -448,6 +534,10 @@ if (data->cmd_flags & REQ_NOWAIT) data->flags |= BLK_MQ_REQ_NOWAIT; +retry: + data->ctx = blk_mq_get_ctx(q); + data->hctx = blk_mq_map_queue(q, data->cmd_flags, data->ctx); + if (q->elevator) { /* * All requests use scheduler tags when an I/O scheduler is @@ -469,13 +559,9 @@ if (ops->limit_depth) ops->limit_depth(data->cmd_flags, data); } - } - -retry: - data->ctx = blk_mq_get_ctx(q); - data->hctx = blk_mq_map_queue(q, data->cmd_flags, data->ctx); - if (!(data->rq_flags & RQF_SCHED_TAGS)) + } else { blk_mq_tag_busy(data->hctx); + } if (data->flags & BLK_MQ_REQ_RESERVED) data->rq_flags |= RQF_RESV; @@ -771,16 +857,11 @@ /* * Partial zone append completions cannot be supported as the * BIO fragments may end up not being written sequentially. - * For such case, force the completed nbytes to be equal to - * the BIO size so that bio_advance() sets the BIO remaining - * size to 0 and we end up calling bio_endio() before returning. */ - if (bio->bi_iter.bi_size != nbytes) { + if (bio->bi_iter.bi_size != nbytes) bio->bi_status = BLK_STS_IOERR; - nbytes = bio->bi_iter.bi_size; - } else { + else bio->bi_iter.bi_sector = rq->__sector; - } } bio_advance(bio, nbytes); @@ -1003,6 +1084,8 @@ update_io_ticks(req->part, jiffies, true); part_stat_inc(req->part, ios[sgrp]); part_stat_add(req->part, nsecs[sgrp], now - req->start_time_ns); + part_stat_local_dec(req->part, + in_flight[op_is_write(req_op(req))]); part_stat_unlock(); } } @@ -1025,6 +1108,8 @@ part_stat_lock(); update_io_ticks(req->part, jiffies, false); + part_stat_local_inc(req->part, + in_flight[op_is_write(req_op(req))]); part_stat_unlock(); } } @@ -2242,6 +2327,24 @@ } EXPORT_SYMBOL(blk_mq_delay_run_hw_queue); +static inline bool blk_mq_hw_queue_need_run(struct blk_mq_hw_ctx *hctx) +{ + bool need_run; + + /* + * When queue is quiesced, we may be switching io scheduler, or + * updating nr_hw_queues, or other things, and we can't run queue + * any more, even blk_mq_hctx_has_pending() can't be called safely. + * + * And queue will be rerun in blk_mq_unquiesce_queue() if it is + * quiesced. + */ + __blk_mq_run_dispatch_ops(hctx->queue, false, + need_run = !blk_queue_quiesced(hctx->queue) && + blk_mq_hctx_has_pending(hctx)); + return need_run; +} + /** * blk_mq_run_hw_queue - Start to run a hardware queue. * @hctx: Pointer to the hardware queue to run. @@ -2262,20 +2365,23 @@ might_sleep_if(!async && hctx->flags & BLK_MQ_F_BLOCKING); - /* - * When queue is quiesced, we may be switching io scheduler, or - * updating nr_hw_queues, or other things, and we can't run queue - * any more, even __blk_mq_hctx_has_pending() can't be called safely. - * - * And queue will be rerun in blk_mq_unquiesce_queue() if it is - * quiesced. - */ - __blk_mq_run_dispatch_ops(hctx->queue, false, - need_run = !blk_queue_quiesced(hctx->queue) && - blk_mq_hctx_has_pending(hctx)); + need_run = blk_mq_hw_queue_need_run(hctx); + if (!need_run) { + unsigned long flags; - if (!need_run) - return; + /* + * Synchronize with blk_mq_unquiesce_queue(), because we check + * if hw queue is quiesced locklessly above, we need the use + * ->queue_lock to make sure we see the up-to-date status to + * not miss rerunning the hw queue. + */ + spin_lock_irqsave(&hctx->queue->queue_lock, flags); + need_run = blk_mq_hw_queue_need_run(hctx); + spin_unlock_irqrestore(&hctx->queue->queue_lock, flags); + + if (!need_run) + return; + } if (async || !cpumask_test_cpu(raw_smp_processor_id(), hctx->cpumask)) { blk_mq_delay_run_hw_queue(hctx, 0); @@ -2432,6 +2538,12 @@ return; clear_bit(BLK_MQ_S_STOPPED, &hctx->state); + /* + * Pairs with the smp_mb() in blk_mq_hctx_stopped() to order the + * clearing of BLK_MQ_S_STOPPED above and the checking of dispatch + * list in the subsequent routine. + */ + smp_mb__after_atomic(); blk_mq_run_hw_queue(hctx, async); } EXPORT_SYMBOL_GPL(blk_mq_start_stopped_hw_queue); @@ -2658,6 +2770,7 @@ if (blk_mq_hctx_stopped(hctx) || blk_queue_quiesced(rq->q)) { blk_mq_insert_request(rq, 0); + blk_mq_run_hw_queue(hctx, false); return; } @@ -2688,6 +2801,7 @@ if (blk_mq_hctx_stopped(hctx) || blk_queue_quiesced(rq->q)) { blk_mq_insert_request(rq, 0); + blk_mq_run_hw_queue(hctx, false); return BLK_STS_OK; } @@ -3581,13 +3695,91 @@ return 0; } -static void blk_mq_remove_cpuhp(struct blk_mq_hw_ctx *hctx) +static void __blk_mq_remove_cpuhp(struct blk_mq_hw_ctx *hctx) { - if (!(hctx->flags & BLK_MQ_F_STACKING)) + lockdep_assert_held(&blk_mq_cpuhp_lock); + + if (!(hctx->flags & BLK_MQ_F_STACKING) && + !hlist_unhashed(&hctx->cpuhp_online)) { cpuhp_state_remove_instance_nocalls(CPUHP_AP_BLK_MQ_ONLINE, &hctx->cpuhp_online); - cpuhp_state_remove_instance_nocalls(CPUHP_BLK_MQ_DEAD, - &hctx->cpuhp_dead); + INIT_HLIST_NODE(&hctx->cpuhp_online); + } + + if (!hlist_unhashed(&hctx->cpuhp_dead)) { + cpuhp_state_remove_instance_nocalls(CPUHP_BLK_MQ_DEAD, + &hctx->cpuhp_dead); + INIT_HLIST_NODE(&hctx->cpuhp_dead); + } +} + +static void blk_mq_remove_cpuhp(struct blk_mq_hw_ctx *hctx) +{ + mutex_lock(&blk_mq_cpuhp_lock); + __blk_mq_remove_cpuhp(hctx); + mutex_unlock(&blk_mq_cpuhp_lock); +} + +static void __blk_mq_add_cpuhp(struct blk_mq_hw_ctx *hctx) +{ + lockdep_assert_held(&blk_mq_cpuhp_lock); + + if (!(hctx->flags & BLK_MQ_F_STACKING) && + hlist_unhashed(&hctx->cpuhp_online)) + cpuhp_state_add_instance_nocalls(CPUHP_AP_BLK_MQ_ONLINE, + &hctx->cpuhp_online); + + if (hlist_unhashed(&hctx->cpuhp_dead)) + cpuhp_state_add_instance_nocalls(CPUHP_BLK_MQ_DEAD, + &hctx->cpuhp_dead); +} + +static void __blk_mq_remove_cpuhp_list(struct list_head *head) +{ + struct blk_mq_hw_ctx *hctx; + + lockdep_assert_held(&blk_mq_cpuhp_lock); + + list_for_each_entry(hctx, head, hctx_list) + __blk_mq_remove_cpuhp(hctx); +} + +/* + * Unregister cpuhp callbacks from exited hw queues + * + * Safe to call if this `request_queue` is live + */ +static void blk_mq_remove_hw_queues_cpuhp(struct request_queue *q) +{ + LIST_HEAD(hctx_list); + + spin_lock(&q->unused_hctx_lock); + list_splice_init(&q->unused_hctx_list, &hctx_list); + spin_unlock(&q->unused_hctx_lock); + + mutex_lock(&blk_mq_cpuhp_lock); + __blk_mq_remove_cpuhp_list(&hctx_list); + mutex_unlock(&blk_mq_cpuhp_lock); + + spin_lock(&q->unused_hctx_lock); + list_splice(&hctx_list, &q->unused_hctx_list); + spin_unlock(&q->unused_hctx_lock); +} + +/* + * Register cpuhp callbacks from all hw queues + * + * Safe to call if this `request_queue` is live + */ +static void blk_mq_add_hw_queues_cpuhp(struct request_queue *q) +{ + struct blk_mq_hw_ctx *hctx; + unsigned long i; + + mutex_lock(&blk_mq_cpuhp_lock); + queue_for_each_hw_ctx(q, hctx, i) + __blk_mq_add_cpuhp(hctx); + mutex_unlock(&blk_mq_cpuhp_lock); } /* @@ -3638,8 +3830,6 @@ if (set->ops->exit_hctx) set->ops->exit_hctx(hctx, hctx_idx); - blk_mq_remove_cpuhp(hctx); - xa_erase(&q->hctx_table, hctx_idx); spin_lock(&q->unused_hctx_lock); @@ -3656,6 +3846,7 @@ queue_for_each_hw_ctx(q, hctx, i) { if (i == nr_queue) break; + blk_mq_remove_cpuhp(hctx); blk_mq_exit_hctx(q, set, hctx, i); } } @@ -3666,16 +3857,11 @@ { hctx->queue_num = hctx_idx; - if (!(hctx->flags & BLK_MQ_F_STACKING)) - cpuhp_state_add_instance_nocalls(CPUHP_AP_BLK_MQ_ONLINE, - &hctx->cpuhp_online); - cpuhp_state_add_instance_nocalls(CPUHP_BLK_MQ_DEAD, &hctx->cpuhp_dead); - hctx->tags = set->tags[hctx_idx]; if (set->ops->init_hctx && set->ops->init_hctx(hctx, set->driver_data, hctx_idx)) - goto unregister_cpu_notifier; + goto fail; if (blk_mq_init_request(set, hctx->fq->flush_rq, hctx_idx, hctx->numa_node)) @@ -3692,8 +3878,7 @@ exit_hctx: if (set->ops->exit_hctx) set->ops->exit_hctx(hctx, hctx_idx); - unregister_cpu_notifier: - blk_mq_remove_cpuhp(hctx); + fail: return -1; } @@ -3719,6 +3904,8 @@ INIT_DELAYED_WORK(&hctx->run_work, blk_mq_run_work_fn); spin_lock_init(&hctx->lock); INIT_LIST_HEAD(&hctx->dispatch); + INIT_HLIST_NODE(&hctx->cpuhp_dead); + INIT_HLIST_NODE(&hctx->cpuhp_online); hctx->queue = q; hctx->flags = set->flags & ~BLK_MQ_F_TAG_QUEUE_SHARED; @@ -4162,6 +4349,15 @@ } EXPORT_SYMBOL(blk_mq_alloc_disk_for_queue); +/* + * Only hctx removed from cpuhp list can be reused + */ +static bool blk_mq_hctx_is_reusable(struct blk_mq_hw_ctx *hctx) +{ + return hlist_unhashed(&hctx->cpuhp_online) && + hlist_unhashed(&hctx->cpuhp_dead); +} + static struct blk_mq_hw_ctx *blk_mq_alloc_and_init_hctx( struct blk_mq_tag_set *set, struct request_queue *q, int hctx_idx, int node) @@ -4171,7 +4367,7 @@ /* reuse dead hctx first */ spin_lock(&q->unused_hctx_lock); list_for_each_entry(tmp, &q->unused_hctx_list, hctx_list) { - if (tmp->numa_node == node) { + if (tmp->numa_node == node && blk_mq_hctx_is_reusable(tmp)) { hctx = tmp; break; } @@ -4237,6 +4433,12 @@ xa_for_each_start(&q->hctx_table, j, hctx, j) blk_mq_exit_hctx(q, set, hctx, j); mutex_unlock(&q->sysfs_lock); + + /* unregister cpuhp callbacks for exited hctxs */ + blk_mq_remove_hw_queues_cpuhp(q); + + /* register cpuhp for new initialized hctxs */ + blk_mq_add_hw_queues_cpuhp(q); } static void blk_mq_update_poll_flag(struct request_queue *q) @@ -4256,6 +4458,12 @@ /* mark the queue as mq asap */ q->mq_ops = set->ops; + /* + * ->tag_set has to be setup before initialize hctx, which cpuphp + * handler needs it for checking queue mapping + */ + q->tag_set = set; + if (blk_mq_alloc_ctxs(q)) goto err_exit; @@ -4274,8 +4482,6 @@ INIT_WORK(&q->timeout_work, blk_mq_timeout_work); blk_queue_rq_timeout(q, set->timeout ? set->timeout : 30 * HZ); - q->tag_set = set; - q->queue_flags |= QUEUE_FLAG_MQ_DEFAULT; blk_mq_update_poll_flag(q); --- linux-xilinx-6.8.0.orig/block/blk-mq.h +++ linux-xilinx-6.8.0/block/blk-mq.h @@ -228,6 +228,19 @@ static inline bool blk_mq_hctx_stopped(struct blk_mq_hw_ctx *hctx) { + /* Fast path: hardware queue is not stopped most of the time. */ + if (likely(!test_bit(BLK_MQ_S_STOPPED, &hctx->state))) + return false; + + /* + * This barrier is used to order adding of dispatch list before and + * the test of BLK_MQ_S_STOPPED below. Pairs with the memory barrier + * in blk_mq_start_stopped_hw_queue() so that dispatch code could + * either see BLK_MQ_S_STOPPED is cleared or dispatch list is not + * empty to avoid missing dispatching requests. + */ + smp_mb(); + return test_bit(BLK_MQ_S_STOPPED, &hctx->state); } --- linux-xilinx-6.8.0.orig/block/blk-rq-qos.c +++ linux-xilinx-6.8.0/block/blk-rq-qos.c @@ -219,8 +219,8 @@ data->got_token = true; smp_wmb(); - list_del_init(&curr->entry); wake_up_process(data->task); + list_del_init_careful(&curr->entry); return 1; } --- linux-xilinx-6.8.0.orig/block/blk-settings.c +++ linux-xilinx-6.8.0/block/blk-settings.c @@ -559,6 +559,8 @@ unsigned int top, bottom, alignment, ret = 0; t->max_sectors = min_not_zero(t->max_sectors, b->max_sectors); + t->max_user_sectors = min_not_zero(t->max_user_sectors, + b->max_user_sectors); t->max_hw_sectors = min_not_zero(t->max_hw_sectors, b->max_hw_sectors); t->max_dev_sectors = min_not_zero(t->max_dev_sectors, b->max_dev_sectors); t->max_write_zeroes_sectors = min(t->max_write_zeroes_sectors, @@ -689,6 +691,10 @@ t->zone_write_granularity = max(t->zone_write_granularity, b->zone_write_granularity); t->zoned = max(t->zoned, b->zoned); + if (!t->zoned) { + t->zone_write_granularity = 0; + t->max_zone_append_sectors = 0; + } return ret; } EXPORT_SYMBOL(blk_stack_limits); --- linux-xilinx-6.8.0.orig/block/blk-stat.c +++ linux-xilinx-6.8.0/block/blk-stat.c @@ -27,7 +27,7 @@ /* src is a per-cpu stat, mean isn't initialized */ void blk_rq_stat_sum(struct blk_rq_stat *dst, struct blk_rq_stat *src) { - if (!src->nr_samples) + if (dst->nr_samples + src->nr_samples <= dst->nr_samples) return; dst->min = min(dst->min, src->min); --- linux-xilinx-6.8.0.orig/block/blk-sysfs.c +++ linux-xilinx-6.8.0/block/blk-sysfs.c @@ -839,10 +839,8 @@ * faster to shut down and is made fully functional here as * request_queues for non-existent devices never get registered. */ - if (!blk_queue_init_done(q)) { - blk_queue_flag_set(QUEUE_FLAG_INIT_DONE, q); - percpu_ref_switch_to_percpu(&q->q_usage_counter); - } + blk_queue_flag_set(QUEUE_FLAG_INIT_DONE, q); + percpu_ref_switch_to_percpu(&q->q_usage_counter); return ret; --- linux-xilinx-6.8.0.orig/block/blk.h +++ linux-xilinx-6.8.0/block/blk.h @@ -3,6 +3,7 @@ #define BLK_INTERNAL_H #include +#include #include /* for max_pfn/max_low_pfn */ #include #include "blk-crypto-internal.h" @@ -32,8 +33,10 @@ void blk_free_flush_queue(struct blk_flush_queue *q); void blk_freeze_queue(struct request_queue *q); -void __blk_mq_unfreeze_queue(struct request_queue *q, bool force_atomic); -void blk_queue_start_drain(struct request_queue *q); +bool __blk_mq_unfreeze_queue(struct request_queue *q, bool force_atomic); +bool blk_queue_start_drain(struct request_queue *q); +bool __blk_freeze_queue_start(struct request_queue *q, + struct task_struct *owner); int __bio_queue_enter(struct request_queue *q, struct bio *bio); void submit_bio_noacct_nocheck(struct bio *bio); @@ -65,8 +68,11 @@ { struct request_queue *q = bdev_get_queue(bio->bi_bdev); - if (blk_try_enter_queue(q, false)) + if (blk_try_enter_queue(q, false)) { + rwsem_acquire_read(&q->io_lockdep_map, 0, 0, _RET_IP_); + rwsem_release(&q->io_lockdep_map, _RET_IP_); return 0; + } return __bio_queue_enter(q, bio); } @@ -344,6 +350,7 @@ } void update_io_ticks(struct block_device *part, unsigned long now, bool end); +unsigned int part_in_flight(struct block_device *part); static inline void req_set_nomerge(struct request_queue *q, struct request *req) { @@ -516,4 +523,22 @@ return atomic_read(&req->ref); } +static inline void blk_freeze_acquire_lock(struct request_queue *q, bool + disk_dead, bool queue_dying) +{ + if (!disk_dead) + rwsem_acquire(&q->io_lockdep_map, 0, 1, _RET_IP_); + if (!queue_dying) + rwsem_acquire(&q->q_lockdep_map, 0, 1, _RET_IP_); +} + +static inline void blk_unfreeze_release_lock(struct request_queue *q, bool + disk_dead, bool queue_dying) +{ + if (!queue_dying) + rwsem_release(&q->q_lockdep_map, _RET_IP_); + if (!disk_dead) + rwsem_release(&q->io_lockdep_map, _RET_IP_); +} + #endif /* BLK_INTERNAL_H */ --- linux-xilinx-6.8.0.orig/block/elevator.c +++ linux-xilinx-6.8.0/block/elevator.c @@ -558,7 +558,7 @@ static inline bool elv_support_iosched(struct request_queue *q) { if (!queue_is_mq(q) || - (q->tag_set && (q->tag_set->flags & BLK_MQ_F_NO_SCHED))) + (q->tag_set->flags & BLK_MQ_F_NO_SCHED)) return false; return true; } @@ -569,7 +569,7 @@ */ static struct elevator_type *elevator_get_default(struct request_queue *q) { - if (q->tag_set && q->tag_set->flags & BLK_MQ_F_NO_SCHED_BY_DEFAULT) + if (q->tag_set->flags & BLK_MQ_F_NO_SCHED_BY_DEFAULT) return NULL; if (q->nr_hw_queues != 1 && @@ -635,13 +635,19 @@ * drain any dispatch activities originated from passthrough * requests, then no need to quiesce queue which may add long boot * latency, especially when lots of disks are involved. + * + * Disk isn't added yet, so verifying queue lock only manually. */ - blk_mq_freeze_queue(q); + blk_freeze_queue_start_non_owner(q); + blk_freeze_acquire_lock(q, true, false); + blk_mq_freeze_queue_wait(q); + blk_mq_cancel_work_sync(q); err = blk_mq_init_sched(q, e); - blk_mq_unfreeze_queue(q); + blk_unfreeze_release_lock(q, true, false); + blk_mq_unfreeze_queue_non_owner(q); if (err) { pr_warn("\"%s\" elevator initialization failed, " --- linux-xilinx-6.8.0.orig/block/fops.c +++ linux-xilinx-6.8.0/block/fops.c @@ -387,7 +387,7 @@ iomap->bdev = bdev; iomap->offset = ALIGN_DOWN(offset, bdev_logical_block_size(bdev)); - if (iomap->offset >= isize) + if (offset >= isize) return -EIO; iomap->type = IOMAP_MAPPED; iomap->addr = iomap->offset; @@ -745,11 +745,12 @@ file_accessed(iocb->ki_filp); ret = blkdev_direct_IO(iocb, to); - if (ret >= 0) { + if (ret > 0) { iocb->ki_pos += ret; count -= ret; } - iov_iter_revert(to, count - iov_iter_count(to)); + if (ret != -EIOCBQUEUED) + iov_iter_revert(to, count - iov_iter_count(to)); if (ret < 0 || !count) goto reexpand; } --- linux-xilinx-6.8.0.orig/block/genhd.c +++ linux-xilinx-6.8.0/block/genhd.c @@ -118,7 +118,7 @@ } } -static unsigned int part_in_flight(struct block_device *part) +unsigned int part_in_flight(struct block_device *part) { unsigned int inflight = 0; int cpu; @@ -345,9 +345,7 @@ struct bdev_handle *handle; int ret = 0; - if (disk->flags & (GENHD_FL_NO_PART | GENHD_FL_HIDDEN)) - return -EINVAL; - if (test_bit(GD_SUPPRESS_PART_SCAN, &disk->state)) + if (!disk_has_partscan(disk)) return -EINVAL; if (disk->open_partitions) return -EBUSY; @@ -503,8 +501,7 @@ goto out_unregister_bdi; /* Make sure the first partition scan will be proceed */ - if (get_capacity(disk) && !(disk->flags & GENHD_FL_NO_PART) && - !test_bit(GD_SUPPRESS_PART_SCAN, &disk->state)) + if (get_capacity(disk) && disk_has_partscan(disk)) set_bit(GD_NEED_PART_SCAN, &disk->state); bdev_add(disk->part0, ddev->devt); @@ -583,13 +580,13 @@ rcu_read_unlock(); } -static void __blk_mark_disk_dead(struct gendisk *disk) +static bool __blk_mark_disk_dead(struct gendisk *disk) { /* * Fail any new I/O. */ if (test_and_set_bit(GD_DEAD, &disk->state)) - return; + return false; if (test_bit(GD_OWNS_QUEUE, &disk->state)) blk_queue_flag_set(QUEUE_FLAG_DYING, disk->queue); @@ -602,7 +599,7 @@ /* * Prevent new I/O from crossing bio_queue_enter(). */ - blk_queue_start_drain(disk->queue); + return blk_queue_start_drain(disk->queue); } /** @@ -643,6 +640,7 @@ struct request_queue *q = disk->queue; struct block_device *part; unsigned long idx; + bool start_drain, queue_dying; might_sleep(); @@ -665,12 +663,15 @@ */ if (!test_bit(GD_DEAD, &disk->state)) blk_report_disk_dead(disk, false); - __blk_mark_disk_dead(disk); /* * Drop all partitions now that the disk is marked dead. */ mutex_lock(&disk->open_mutex); + start_drain = __blk_mark_disk_dead(disk); + queue_dying = blk_queue_dying(q); + if (start_drain) + blk_freeze_acquire_lock(q, true, queue_dying); xa_for_each_start(&disk->part_tbl, idx, part, 1) drop_partition(part); mutex_unlock(&disk->open_mutex); @@ -720,13 +721,13 @@ * If the disk does not own the queue, allow using passthrough requests * again. Else leave the queue frozen to fail all I/O. */ - if (!test_bit(GD_OWNS_QUEUE, &disk->state)) { - blk_queue_flag_clear(QUEUE_FLAG_INIT_DONE, q); + if (!test_bit(GD_OWNS_QUEUE, &disk->state)) __blk_mq_unfreeze_queue(q, true); - } else { - if (queue_is_mq(q)) - blk_mq_exit_queue(q); - } + else if (queue_is_mq(q)) + blk_mq_exit_queue(q); + + if (start_drain) + blk_unfreeze_release_lock(q, true, queue_dying); } EXPORT_SYMBOL(del_gendisk); @@ -776,7 +777,7 @@ } #ifdef CONFIG_BLOCK_LEGACY_AUTOLOAD -void blk_request_module(dev_t devt) +static bool blk_probe_dev(dev_t devt) { unsigned int major = MAJOR(devt); struct blk_major_name **n; @@ -786,14 +787,26 @@ if ((*n)->major == major && (*n)->probe) { (*n)->probe(devt); mutex_unlock(&major_names_lock); - return; + return true; } } mutex_unlock(&major_names_lock); + return false; +} - if (request_module("block-major-%d-%d", MAJOR(devt), MINOR(devt)) > 0) - /* Make old-style 2.4 aliases work */ - request_module("block-major-%d", MAJOR(devt)); +void blk_request_module(dev_t devt) +{ + int error; + + if (blk_probe_dev(devt)) + return; + + error = request_module("block-major-%d-%d", MAJOR(devt), MINOR(devt)); + /* Make old-style 2.4 aliases work */ + if (error > 0) + error = request_module("block-major-%d", MAJOR(devt)); + if (!error) + blk_probe_dev(devt); } #endif /* CONFIG_BLOCK_LEGACY_AUTOLOAD */ @@ -1047,6 +1060,12 @@ return sprintf(buf, "%llu\n", disk->diskseq); } +static ssize_t partscan_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + return sprintf(buf, "%u\n", disk_has_partscan(dev_to_disk(dev))); +} + static DEVICE_ATTR(range, 0444, disk_range_show, NULL); static DEVICE_ATTR(ext_range, 0444, disk_ext_range_show, NULL); static DEVICE_ATTR(removable, 0444, disk_removable_show, NULL); @@ -1060,6 +1079,7 @@ static DEVICE_ATTR(inflight, 0444, part_inflight_show, NULL); static DEVICE_ATTR(badblocks, 0644, disk_badblocks_show, disk_badblocks_store); static DEVICE_ATTR(diskseq, 0444, diskseq_show, NULL); +static DEVICE_ATTR(partscan, 0444, partscan_show, NULL); #ifdef CONFIG_FAIL_MAKE_REQUEST ssize_t part_fail_show(struct device *dev, @@ -1106,6 +1126,7 @@ &dev_attr_events_async.attr, &dev_attr_events_poll_msecs.attr, &dev_attr_diskseq.attr, + &dev_attr_partscan.attr, #ifdef CONFIG_FAIL_MAKE_REQUEST &dev_attr_fail.attr, #endif --- linux-xilinx-6.8.0.orig/block/holder.c +++ linux-xilinx-6.8.0/block/holder.c @@ -8,6 +8,8 @@ int refcnt; }; +static DEFINE_MUTEX(blk_holder_mutex); + static struct bd_holder_disk *bd_find_holder_disk(struct block_device *bdev, struct gendisk *disk) { @@ -80,7 +82,7 @@ kobject_get(bdev->bd_holder_dir); mutex_unlock(&bdev->bd_disk->open_mutex); - mutex_lock(&disk->open_mutex); + mutex_lock(&blk_holder_mutex); WARN_ON_ONCE(!bdev->bd_holder); holder = bd_find_holder_disk(bdev, disk); @@ -108,7 +110,7 @@ goto out_del_symlink; list_add(&holder->list, &disk->slave_bdevs); - mutex_unlock(&disk->open_mutex); + mutex_unlock(&blk_holder_mutex); return 0; out_del_symlink: @@ -116,7 +118,7 @@ out_free_holder: kfree(holder); out_unlock: - mutex_unlock(&disk->open_mutex); + mutex_unlock(&blk_holder_mutex); if (ret) kobject_put(bdev->bd_holder_dir); return ret; @@ -140,7 +142,7 @@ if (WARN_ON_ONCE(!disk->slave_dir)) return; - mutex_lock(&disk->open_mutex); + mutex_lock(&blk_holder_mutex); holder = bd_find_holder_disk(bdev, disk); if (!WARN_ON_ONCE(holder == NULL) && !--holder->refcnt) { del_symlink(disk->slave_dir, bdev_kobj(bdev)); @@ -149,6 +151,6 @@ list_del_init(&holder->list); kfree(holder); } - mutex_unlock(&disk->open_mutex); + mutex_unlock(&blk_holder_mutex); } EXPORT_SYMBOL_GPL(bd_unlink_disk_holder); --- linux-xilinx-6.8.0.orig/block/ioctl.c +++ linux-xilinx-6.8.0/block/ioctl.c @@ -33,7 +33,7 @@ if (op == BLKPG_DEL_PARTITION) return bdev_del_partition(disk, p.pno); - if (p.start < 0 || p.length <= 0 || p.start + p.length < 0) + if (p.start < 0 || p.length <= 0 || LLONG_MAX - p.length < p.start) return -EINVAL; /* Check that the partition is aligned to the block size */ if (!IS_ALIGNED(p.start | p.length, bdev_logical_block_size(bdev))) @@ -89,7 +89,7 @@ unsigned long arg) { uint64_t range[2]; - uint64_t start, len; + uint64_t start, len, end; struct inode *inode = bdev->bd_inode; int err; @@ -110,11 +110,12 @@ if (len & 511) return -EINVAL; - if (start + len > bdev_nr_bytes(bdev)) + if (check_add_overflow(start, len, &end) || + end > bdev_nr_bytes(bdev)) return -EINVAL; filemap_invalidate_lock(inode->i_mapping); - err = truncate_bdev_range(bdev, mode, start, start + len - 1); + err = truncate_bdev_range(bdev, mode, start, end - 1); if (err) goto fail; err = blkdev_issue_discard(bdev, start >> 9, len >> 9, GFP_KERNEL); @@ -126,7 +127,7 @@ static int blk_ioctl_secure_erase(struct block_device *bdev, blk_mode_t mode, void __user *argp) { - uint64_t start, len; + uint64_t start, len, end; uint64_t range[2]; int err; @@ -141,11 +142,12 @@ len = range[1]; if ((start & 511) || (len & 511)) return -EINVAL; - if (start + len > bdev_nr_bytes(bdev)) + if (check_add_overflow(start, len, &end) || + end > bdev_nr_bytes(bdev)) return -EINVAL; filemap_invalidate_lock(bdev->bd_inode->i_mapping); - err = truncate_bdev_range(bdev, mode, start, start + len - 1); + err = truncate_bdev_range(bdev, mode, start, end - 1); if (!err) err = blkdev_issue_secure_erase(bdev, start >> 9, len >> 9, GFP_KERNEL); @@ -556,7 +558,8 @@ return -EACCES; if (bdev_is_partition(bdev)) return -EINVAL; - return disk_scan_partitions(bdev->bd_disk, mode); + return disk_scan_partitions(bdev->bd_disk, + mode | BLK_OPEN_STRICT_SCAN); case BLKTRACESTART: case BLKTRACESTOP: case BLKTRACETEARDOWN: --- linux-xilinx-6.8.0.orig/block/mq-deadline.c +++ linux-xilinx-6.8.0/block/mq-deadline.c @@ -622,6 +622,20 @@ } /* + * 'depth' is a number in the range 1..INT_MAX representing a number of + * requests. Scale it with a factor (1 << bt->sb.shift) / q->nr_requests since + * 1..(1 << bt->sb.shift) is the range expected by sbitmap_get_shallow(). + * Values larger than q->nr_requests have the same effect as q->nr_requests. + */ +static int dd_to_word_depth(struct blk_mq_hw_ctx *hctx, unsigned int qdepth) +{ + struct sbitmap_queue *bt = &hctx->sched_tags->bitmap_tags; + const unsigned int nrr = hctx->queue->nr_requests; + + return ((qdepth << bt->sb.shift) + nrr - 1) / nrr; +} + +/* * Called by __blk_mq_alloc_request(). The shallow_depth value set by this * function is used by __blk_mq_get_tag(). */ @@ -637,7 +651,7 @@ * Throttle asynchronous requests and writes such that these requests * do not block the allocation of synchronous requests. */ - data->shallow_depth = dd->async_depth; + data->shallow_depth = dd_to_word_depth(data->hctx, dd->async_depth); } /* Called by blk_mq_update_nr_requests(). */ @@ -646,11 +660,10 @@ struct request_queue *q = hctx->queue; struct deadline_data *dd = q->elevator->elevator_data; struct blk_mq_tags *tags = hctx->sched_tags; - unsigned int shift = tags->bitmap_tags.sb.shift; - dd->async_depth = max(1U, 3 * (1U << shift) / 4); + dd->async_depth = q->nr_requests; - sbitmap_queue_min_shallow_depth(&tags->bitmap_tags, dd->async_depth); + sbitmap_queue_min_shallow_depth(&tags->bitmap_tags, 1); } /* Called by blk_mq_init_hctx() and blk_mq_init_sched(). */ --- linux-xilinx-6.8.0.orig/block/partitions/cmdline.c +++ linux-xilinx-6.8.0/block/partitions/cmdline.c @@ -70,8 +70,8 @@ } if (*partdef == '(') { - int length; - char *next = strchr(++partdef, ')'); + partdef++; + char *next = strsep(&partdef, ")"); if (!next) { pr_warn("cmdline partition format is invalid."); @@ -79,11 +79,7 @@ goto fail; } - length = min_t(int, next - partdef, - sizeof(new_subpart->name) - 1); - strscpy(new_subpart->name, partdef, length); - - partdef = ++next; + strscpy(new_subpart->name, next, sizeof(new_subpart->name)); } else new_subpart->name[0] = '\0'; @@ -117,14 +113,12 @@ } } -static int parse_parts(struct cmdline_parts **parts, const char *bdevdef) +static int parse_parts(struct cmdline_parts **parts, char *bdevdef) { int ret = -EINVAL; char *next; - int length; struct cmdline_subpart **next_subpart; struct cmdline_parts *newparts; - char buf[BDEVNAME_SIZE + 32 + 4]; *parts = NULL; @@ -132,28 +126,19 @@ if (!newparts) return -ENOMEM; - next = strchr(bdevdef, ':'); + next = strsep(&bdevdef, ":"); if (!next) { pr_warn("cmdline partition has no block device."); goto fail; } - length = min_t(int, next - bdevdef, sizeof(newparts->name) - 1); - strscpy(newparts->name, bdevdef, length); + strscpy(newparts->name, next, sizeof(newparts->name)); newparts->nr_subparts = 0; next_subpart = &newparts->subpart; - while (next && *(++next)) { - bdevdef = next; - next = strchr(bdevdef, ','); - - length = (!next) ? (sizeof(buf) - 1) : - min_t(int, next - bdevdef, sizeof(buf) - 1); - - strscpy(buf, bdevdef, length); - - ret = parse_subpart(next_subpart, buf); + while ((next = strsep(&bdevdef, ","))) { + ret = parse_subpart(next_subpart, next); if (ret) goto fail; @@ -199,24 +184,17 @@ *parts = NULL; - next = pbuf = buf = kstrdup(cmdline, GFP_KERNEL); + pbuf = buf = kstrdup(cmdline, GFP_KERNEL); if (!buf) return -ENOMEM; next_parts = parts; - while (next && *pbuf) { - next = strchr(pbuf, ';'); - if (next) - *next = '\0'; - - ret = parse_parts(next_parts, pbuf); + while ((next = strsep(&pbuf, ";"))) { + ret = parse_parts(next_parts, next); if (ret) goto fail; - if (next) - pbuf = ++next; - next_parts = &(*next_parts)->next_parts; } @@ -250,7 +228,6 @@ static int add_part(int slot, struct cmdline_subpart *subpart, struct parsed_partitions *state) { - int label_min; struct partition_meta_info *info; char tmp[sizeof(info->volname) + 4]; @@ -262,9 +239,7 @@ info = &state->parts[slot].info; - label_min = min_t(int, sizeof(info->volname) - 1, - sizeof(subpart->name)); - strscpy(info->volname, subpart->name, label_min); + strscpy(info->volname, subpart->name, sizeof(info->volname)); snprintf(tmp, sizeof(tmp), "(%s)", info->volname); strlcat(state->pp_buf, tmp, PAGE_SIZE); --- linux-xilinx-6.8.0.orig/block/partitions/core.c +++ linux-xilinx-6.8.0/block/partitions/core.c @@ -566,9 +566,11 @@ part = add_partition(disk, p, from, size, state->parts[p].flags, &state->parts[p].info); - if (IS_ERR(part) && PTR_ERR(part) != -ENXIO) { - printk(KERN_ERR " %s: p%d could not be added: %pe\n", - disk->disk_name, p, part); + if (IS_ERR(part)) { + if (PTR_ERR(part) != -ENXIO) { + printk(KERN_ERR " %s: p%d could not be added: %pe\n", + disk->disk_name, p, part); + } return true; } @@ -584,10 +586,7 @@ struct parsed_partitions *state; int ret = -EAGAIN, p; - if (disk->flags & GENHD_FL_NO_PART) - return 0; - - if (test_bit(GD_SUPPRESS_PART_SCAN, &disk->state)) + if (!disk_has_partscan(disk)) return 0; state = check_partition(disk); --- linux-xilinx-6.8.0.orig/block/partitions/ldm.h +++ linux-xilinx-6.8.0/block/partitions/ldm.h @@ -1,5 +1,5 @@ // SPDX-License-Identifier: GPL-2.0-or-later -/** +/* * ldm - Part of the Linux-NTFS project. * * Copyright (C) 2001,2002 Richard Russon --- linux-xilinx-6.8.0.orig/block/partitions/mac.c +++ linux-xilinx-6.8.0/block/partitions/mac.c @@ -51,13 +51,25 @@ } secsize = be16_to_cpu(md->block_size); put_dev_sector(sect); + + /* + * If the "block size" is not a power of 2, things get weird - we might + * end up with a partition straddling a sector boundary, so we wouldn't + * be able to read a partition entry with read_part_sector(). + * Real block sizes are probably (?) powers of two, so just require + * that. + */ + if (!is_power_of_2(secsize)) + return -1; datasize = round_down(secsize, 512); data = read_part_sector(state, datasize / 512, §); if (!data) return -1; partoffset = secsize % 512; - if (partoffset + sizeof(*part) > datasize) + if (partoffset + sizeof(*part) > datasize) { + put_dev_sector(sect); return -1; + } part = (struct mac_partition *) (data + partoffset); if (be16_to_cpu(part->signature) != MAC_PARTITION_MAGIC) { put_dev_sector(sect); @@ -110,8 +122,8 @@ int i, l; goodness++; - l = strlen(part->name); - if (strcmp(part->name, "/") == 0) + l = strnlen(part->name, sizeof(part->name)); + if (strncmp(part->name, "/", sizeof(part->name)) == 0) goodness++; for (i = 0; i <= l - 4; ++i) { if (strncasecmp(part->name + i, "root", --- linux-xilinx-6.8.0.orig/block/sed-opal.c +++ linux-xilinx-6.8.0/block/sed-opal.c @@ -314,7 +314,7 @@ &key_type_user, key_name, true); if (IS_ERR(kref)) - ret = PTR_ERR(kref); + return PTR_ERR(kref); key = key_ref_to_ptr(kref); down_read(&key->sem); --- linux-xilinx-6.8.0.orig/certs/blacklist.c +++ linux-xilinx-6.8.0/certs/blacklist.c @@ -276,6 +276,9 @@ if (IS_ERR(key)) { pr_err("Problem with revocation key (%ld)\n", PTR_ERR(key)); return PTR_ERR(key); + } else { + pr_notice("Revoked X.509 cert '%s'\n", + key_ref_to_ptr(key)->description); } return 0; --- linux-xilinx-6.8.0.orig/crypto/Kconfig +++ linux-xilinx-6.8.0/crypto/Kconfig @@ -1269,10 +1269,11 @@ A non-physical non-deterministic ("true") RNG (e.g., an entropy source compliant with NIST SP800-90B) intended to provide a seed to a - deterministic RNG (e.g. per NIST SP800-90C). + deterministic RNG (e.g., per NIST SP800-90C). This RNG does not perform any cryptographic whitening of the generated + random numbers. - See https://www.chronox.de/jent.html + See https://www.chronox.de/jent/ if CRYPTO_JITTERENTROPY if CRYPTO_FIPS && EXPERT --- linux-xilinx-6.8.0.orig/crypto/aead.c +++ linux-xilinx-6.8.0/crypto/aead.c @@ -45,8 +45,7 @@ alignbuffer = (u8 *)ALIGN((unsigned long)buffer, alignmask + 1); memcpy(alignbuffer, key, keylen); ret = crypto_aead_alg(tfm)->setkey(tfm, alignbuffer, keylen); - memset(alignbuffer, 0, keylen); - kfree(buffer); + kfree_sensitive(buffer); return ret; } --- linux-xilinx-6.8.0.orig/crypto/aegis128-neon-inner.c +++ linux-xilinx-6.8.0/crypto/aegis128-neon-inner.c @@ -148,8 +148,8 @@ kiv, vld1q_u8(const1), vld1q_u8(const0), - k ^ vld1q_u8(const0), - k ^ vld1q_u8(const1), + (uint8x16_t) (k ^ vld1q_u8(const0)), + (uint8x16_t) (k ^ vld1q_u8(const1)), }}; int i; --- linux-xilinx-6.8.0.orig/crypto/algapi.c +++ linux-xilinx-6.8.0/crypto/algapi.c @@ -396,7 +396,7 @@ q->cra_flags |= CRYPTO_ALG_DEAD; alg = test->adult; - if (list_empty(&alg->cra_list)) + if (crypto_is_dead(alg)) goto complete; if (err == -ECANCELED) @@ -1059,6 +1059,8 @@ if (IS_ENABLED(CONFIG_CRYPTO_MANAGER_DISABLE_TESTS)) return; + set_crypto_boot_test_finished(); + for (;;) { struct crypto_larval *larval = NULL; struct crypto_alg *q; @@ -1091,8 +1093,6 @@ crypto_wait_for_test(larval); } - - set_crypto_boot_test_finished(); } static int __init crypto_algapi_init(void) --- linux-xilinx-6.8.0.orig/crypto/asymmetric_keys/Kconfig +++ linux-xilinx-6.8.0/crypto/asymmetric_keys/Kconfig @@ -15,6 +15,7 @@ select MPILIB select CRYPTO_HASH_INFO select CRYPTO_AKCIPHER + select CRYPTO_SIG select CRYPTO_HASH help This option provides support for asymmetric public key type handling. @@ -85,5 +86,7 @@ depends on ASYMMETRIC_KEY_TYPE depends on PKCS7_MESSAGE_PARSER=X509_CERTIFICATE_PARSER depends on X509_CERTIFICATE_PARSER + depends on CRYPTO_RSA + depends on CRYPTO_SHA256 endif # ASYMMETRIC_KEY_TYPE --- linux-xilinx-6.8.0.orig/crypto/asymmetric_keys/asymmetric_type.c +++ linux-xilinx-6.8.0/crypto/asymmetric_keys/asymmetric_type.c @@ -60,17 +60,18 @@ char *req, *p; int len; - WARN_ON(!id_0 && !id_1 && !id_2); - if (id_0) { lookup = id_0->data; len = id_0->len; } else if (id_1) { lookup = id_1->data; len = id_1->len; - } else { + } else if (id_2) { lookup = id_2->data; len = id_2->len; + } else { + WARN_ON(1); + return ERR_PTR(-EINVAL); } /* Construct an identifier "id:". */ --- linux-xilinx-6.8.0.orig/crypto/asymmetric_keys/mscode_parser.c +++ linux-xilinx-6.8.0/crypto/asymmetric_keys/mscode_parser.c @@ -75,6 +75,9 @@ oid = look_up_OID(value, vlen); switch (oid) { + case OID_sha1: + ctx->digest_algo = "sha1"; + break; case OID_sha256: ctx->digest_algo = "sha256"; break; --- linux-xilinx-6.8.0.orig/crypto/asymmetric_keys/pkcs7_parser.c +++ linux-xilinx-6.8.0/crypto/asymmetric_keys/pkcs7_parser.c @@ -227,6 +227,9 @@ struct pkcs7_parse_context *ctx = context; switch (ctx->last_oid) { + case OID_sha1: + ctx->sinfo->sig->hash_algo = "sha1"; + break; case OID_sha256: ctx->sinfo->sig->hash_algo = "sha256"; break; @@ -278,6 +281,7 @@ ctx->sinfo->sig->pkey_algo = "rsa"; ctx->sinfo->sig->encoding = "pkcs1"; break; + case OID_id_ecdsa_with_sha1: case OID_id_ecdsa_with_sha224: case OID_id_ecdsa_with_sha256: case OID_id_ecdsa_with_sha384: --- linux-xilinx-6.8.0.orig/crypto/asymmetric_keys/public_key.c +++ linux-xilinx-6.8.0/crypto/asymmetric_keys/public_key.c @@ -115,7 +115,8 @@ */ if (!hash_algo) return -EINVAL; - if (strcmp(hash_algo, "sha224") != 0 && + if (strcmp(hash_algo, "sha1") != 0 && + strcmp(hash_algo, "sha224") != 0 && strcmp(hash_algo, "sha256") != 0 && strcmp(hash_algo, "sha384") != 0 && strcmp(hash_algo, "sha512") != 0 && @@ -233,6 +234,7 @@ info->key_size = len * 8; if (strncmp(pkey->pkey_algo, "ecdsa", 5) == 0) { + int slen = len; /* * ECDSA key sizes are much smaller than RSA, and thus could * operate on (hashed) inputs that are larger than key size. @@ -246,8 +248,19 @@ * Verify takes ECDSA-Sig (described in RFC 5480) as input, * which is actually 2 'key_size'-bit integers encoded in * ASN.1. Account for the ASN.1 encoding overhead here. + * + * NIST P192/256/384 may prepend a '0' to a coordinate to + * indicate a positive integer. NIST P521 never needs it. */ - info->max_sig_size = 2 * (len + 3) + 2; + if (strcmp(pkey->pkey_algo, "ecdsa-nist-p521") != 0) + slen += 1; + /* Length of encoding the x & y coordinates */ + slen = 2 * (slen + 2); + /* + * If coordinate encoding takes at least 128 bytes then an + * additional byte for length encoding is needed. + */ + info->max_sig_size = 1 + (slen >= 128) + 1 + slen; } else { info->max_data_size = len; info->max_sig_size = len; --- linux-xilinx-6.8.0.orig/crypto/asymmetric_keys/signature.c +++ linux-xilinx-6.8.0/crypto/asymmetric_keys/signature.c @@ -115,7 +115,7 @@ * Sign the specified data blob using the private key specified by params->key. * The signature is wrapped in an encoding if params->encoding is specified * (eg. "pkcs1"). If the encoding needs to know the digest type, this can be - * passed through params->hash_algo (eg. "sha512"). + * passed through params->hash_algo (eg. "sha1"). * * Returns the length of the data placed in the signature buffer or an error. */ --- linux-xilinx-6.8.0.orig/crypto/asymmetric_keys/x509_cert_parser.c +++ linux-xilinx-6.8.0/crypto/asymmetric_keys/x509_cert_parser.c @@ -198,6 +198,10 @@ default: return -ENOPKG; /* Unsupported combination */ + case OID_sha1WithRSAEncryption: + ctx->cert->sig->hash_algo = "sha1"; + goto rsa_pkcs1; + case OID_sha256WithRSAEncryption: ctx->cert->sig->hash_algo = "sha256"; goto rsa_pkcs1; @@ -214,6 +218,10 @@ ctx->cert->sig->hash_algo = "sha224"; goto rsa_pkcs1; + case OID_id_ecdsa_with_sha1: + ctx->cert->sig->hash_algo = "sha1"; + goto ecdsa; + case OID_id_rsassa_pkcs1_v1_5_with_sha3_256: ctx->cert->sig->hash_algo = "sha3-256"; goto rsa_pkcs1; @@ -538,6 +546,9 @@ case OID_id_ansip384r1: ctx->cert->pub->pkey_algo = "ecdsa-nist-p384"; break; + case OID_id_ansip521r1: + ctx->cert->pub->pkey_algo = "ecdsa-nist-p521"; + break; default: return -ENOPKG; } --- linux-xilinx-6.8.0.orig/crypto/asymmetric_keys/x509_loader.c +++ linux-xilinx-6.8.0/crypto/asymmetric_keys/x509_loader.c @@ -41,6 +41,7 @@ if (IS_ERR(key)) { pr_err("Problem loading in-kernel X.509 certificate (%ld)\n", PTR_ERR(key)); + WARN_ON_ONCE(1); } else { pr_notice("Loaded X.509 cert '%s'\n", key_ref_to_ptr(key)->description); --- linux-xilinx-6.8.0.orig/crypto/cipher.c +++ linux-xilinx-6.8.0/crypto/cipher.c @@ -34,8 +34,7 @@ alignbuffer = (u8 *)ALIGN((unsigned long)buffer, alignmask + 1); memcpy(alignbuffer, key, keylen); ret = cia->cia_setkey(crypto_cipher_tfm(tfm), alignbuffer, keylen); - memset(alignbuffer, 0, keylen); - kfree(buffer); + kfree_sensitive(buffer); return ret; } --- linux-xilinx-6.8.0.orig/crypto/ecc.c +++ linux-xilinx-6.8.0/crypto/ecc.c @@ -60,12 +60,36 @@ return &nist_p256; case ECC_CURVE_NIST_P384: return &nist_p384; + case ECC_CURVE_NIST_P521: + return &nist_p521; default: return NULL; } } EXPORT_SYMBOL(ecc_get_curve); +void ecc_digits_from_bytes(const u8 *in, unsigned int nbytes, + u64 *out, unsigned int ndigits) +{ + int diff = ndigits - DIV_ROUND_UP(nbytes, sizeof(u64)); + unsigned int o = nbytes & 7; + __be64 msd = 0; + + /* diff > 0: not enough input bytes: set most significant digits to 0 */ + if (diff > 0) { + ndigits -= diff; + memset(&out[ndigits - 1], 0, diff * sizeof(u64)); + } + + if (o) { + memcpy((u8 *)&msd + sizeof(msd) - o, in, o); + out[--ndigits] = be64_to_cpu(msd); + in += o; + } + ecc_swap_digits(in, out, ndigits); +} +EXPORT_SYMBOL(ecc_digits_from_bytes); + static u64 *ecc_alloc_digits_space(unsigned int ndigits) { size_t len = ndigits * sizeof(u64); @@ -689,7 +713,7 @@ static void vli_mmod_fast_192(u64 *result, const u64 *product, const u64 *curve_prime, u64 *tmp) { - const unsigned int ndigits = 3; + const unsigned int ndigits = ECC_CURVE_NIST_P192_DIGITS; int carry; vli_set(result, product, ndigits); @@ -717,7 +741,7 @@ const u64 *curve_prime, u64 *tmp) { int carry; - const unsigned int ndigits = 4; + const unsigned int ndigits = ECC_CURVE_NIST_P256_DIGITS; /* t */ vli_set(result, product, ndigits); @@ -800,7 +824,7 @@ const u64 *curve_prime, u64 *tmp) { int carry; - const unsigned int ndigits = 6; + const unsigned int ndigits = ECC_CURVE_NIST_P384_DIGITS; /* t */ vli_set(result, product, ndigits); @@ -902,6 +926,28 @@ #undef AND64H #undef AND64L +/* + * Computes result = product % curve_prime + * from "Recommendations for Discrete Logarithm-Based Cryptography: + * Elliptic Curve Domain Parameters" section G.1.4 + */ +static void vli_mmod_fast_521(u64 *result, const u64 *product, + const u64 *curve_prime, u64 *tmp) +{ + const unsigned int ndigits = ECC_CURVE_NIST_P521_DIGITS; + size_t i; + + /* Initialize result with lowest 521 bits from product */ + vli_set(result, product, ndigits); + result[8] &= 0x1ff; + + for (i = 0; i < ndigits; i++) + tmp[i] = (product[8 + i] >> 9) | (product[9 + i] << 55); + tmp[8] &= 0x1ff; + + vli_mod_add(result, result, tmp, curve_prime, ndigits); +} + /* Computes result = product % curve_prime for different curve_primes. * * Note that curve_primes are distinguished just by heuristic check and @@ -932,15 +978,18 @@ } switch (ndigits) { - case 3: + case ECC_CURVE_NIST_P192_DIGITS: vli_mmod_fast_192(result, product, curve_prime, tmp); break; - case 4: + case ECC_CURVE_NIST_P256_DIGITS: vli_mmod_fast_256(result, product, curve_prime, tmp); break; - case 6: + case ECC_CURVE_NIST_P384_DIGITS: vli_mmod_fast_384(result, product, curve_prime, tmp); break; + case ECC_CURVE_NIST_P521_DIGITS: + vli_mmod_fast_521(result, product, curve_prime, tmp); + break; default: pr_err_ratelimited("ecc: unsupported digits size!\n"); return false; @@ -1295,7 +1344,10 @@ carry = vli_add(sk[0], scalar, curve->n, ndigits); vli_add(sk[1], sk[0], curve->n, ndigits); scalar = sk[!carry]; - num_bits = sizeof(u64) * ndigits * 8 + 1; + if (curve->nbits == 521) /* NIST P521 */ + num_bits = curve->nbits + 2; + else + num_bits = sizeof(u64) * ndigits * 8 + 1; vli_set(rx[1], point->x, ndigits); vli_set(ry[1], point->y, ndigits); --- linux-xilinx-6.8.0.orig/crypto/ecc_curve_defs.h +++ linux-xilinx-6.8.0/crypto/ecc_curve_defs.h @@ -17,6 +17,7 @@ 0x64210519E59C80E7ull }; static struct ecc_curve nist_p192 = { .name = "nist_192", + .nbits = 192, .g = { .x = nist_p192_g_x, .y = nist_p192_g_y, @@ -43,6 +44,7 @@ 0xB3EBBD55769886BCull, 0x5AC635D8AA3A93E7ull }; static struct ecc_curve nist_p256 = { .name = "nist_256", + .nbits = 256, .g = { .x = nist_p256_g_x, .y = nist_p256_g_y, @@ -75,6 +77,7 @@ 0x988e056be3f82d19ull, 0xb3312fa7e23ee7e4ull }; static struct ecc_curve nist_p384 = { .name = "nist_384", + .nbits = 384, .g = { .x = nist_p384_g_x, .y = nist_p384_g_y, @@ -86,6 +89,51 @@ .b = nist_p384_b }; +/* NIST P-521 */ +static u64 nist_p521_g_x[] = { 0xf97e7e31c2e5bd66ull, 0x3348b3c1856a429bull, + 0xfe1dc127a2ffa8deull, 0xa14b5e77efe75928ull, + 0xf828af606b4d3dbaull, 0x9c648139053fb521ull, + 0x9e3ecb662395b442ull, 0x858e06b70404e9cdull, + 0xc6ull }; +static u64 nist_p521_g_y[] = { 0x88be94769fd16650ull, 0x353c7086a272c240ull, + 0xc550b9013fad0761ull, 0x97ee72995ef42640ull, + 0x17afbd17273e662cull, 0x98f54449579b4468ull, + 0x5c8a5fb42c7d1bd9ull, 0x39296a789a3bc004ull, + 0x118ull }; +static u64 nist_p521_p[] = { 0xffffffffffffffffull, 0xffffffffffffffffull, + 0xffffffffffffffffull, 0xffffffffffffffffull, + 0xffffffffffffffffull, 0xffffffffffffffffull, + 0xffffffffffffffffull, 0xffffffffffffffffull, + 0x1ffull }; +static u64 nist_p521_n[] = { 0xbb6fb71e91386409ull, 0x3bb5c9b8899c47aeull, + 0x7fcc0148f709a5d0ull, 0x51868783bf2f966bull, + 0xfffffffffffffffaull, 0xffffffffffffffffull, + 0xffffffffffffffffull, 0xffffffffffffffffull, + 0x1ffull }; +static u64 nist_p521_a[] = { 0xfffffffffffffffcull, 0xffffffffffffffffull, + 0xffffffffffffffffull, 0xffffffffffffffffull, + 0xffffffffffffffffull, 0xffffffffffffffffull, + 0xffffffffffffffffull, 0xffffffffffffffffull, + 0x1ffull }; +static u64 nist_p521_b[] = { 0xef451fd46b503f00ull, 0x3573df883d2c34f1ull, + 0x1652c0bd3bb1bf07ull, 0x56193951ec7e937bull, + 0xb8b489918ef109e1ull, 0xa2da725b99b315f3ull, + 0x929a21a0b68540eeull, 0x953eb9618e1c9a1full, + 0x051ull }; +static struct ecc_curve nist_p521 = { + .name = "nist_521", + .nbits = 521, + .g = { + .x = nist_p521_g_x, + .y = nist_p521_g_y, + .ndigits = 9, + }, + .p = nist_p521_p, + .n = nist_p521_n, + .a = nist_p521_a, + .b = nist_p521_b +}; + /* curve25519 */ static u64 curve25519_g_x[] = { 0x0000000000000009, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000 }; @@ -95,6 +143,7 @@ 0x0000000000000000, 0x0000000000000000 }; static const struct ecc_curve ecc_25519 = { .name = "curve25519", + .nbits = 255, .g = { .x = curve25519_g_x, .ndigits = 4, --- linux-xilinx-6.8.0.orig/crypto/ecdh.c +++ linux-xilinx-6.8.0/crypto/ecdh.c @@ -33,6 +33,8 @@ params.key_size > sizeof(u64) * ctx->ndigits) return -EINVAL; + memset(ctx->private_key, 0, sizeof(ctx->private_key)); + if (!params.key || !params.key_size) return ecc_gen_privkey(ctx->curve_id, ctx->ndigits, ctx->private_key); --- linux-xilinx-6.8.0.orig/crypto/ecdsa.c +++ linux-xilinx-6.8.0/crypto/ecdsa.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include @@ -23,55 +24,37 @@ struct ecc_point pub_key; }; -struct ecdsa_signature_ctx { - const struct ecc_curve *curve; - u64 r[ECC_MAX_DIGITS]; - u64 s[ECC_MAX_DIGITS]; -}; - /* * Get the r and s components of a signature from the X509 certificate. */ -static int ecdsa_get_signature_rs(u64 *dest, size_t hdrlen, unsigned char tag, - const void *value, size_t vlen, unsigned int ndigits) +int ecdsa_get_signature_rs(u64 *dest, size_t hdrlen, unsigned char tag, + const void *value, size_t vlen, unsigned int ndigits) { - size_t keylen = ndigits * sizeof(u64); - ssize_t diff = vlen - keylen; + size_t bufsize = ndigits * sizeof(u64); const char *d = value; - u8 rs[ECC_MAX_BYTES]; - if (!value || !vlen) + if (!value || !vlen || vlen > bufsize + 1) return -EINVAL; - /* diff = 0: 'value' has exacly the right size - * diff > 0: 'value' has too many bytes; one leading zero is allowed that - * makes the value a positive integer; error on more - * diff < 0: 'value' is missing leading zeros, which we add + /* + * vlen may be 1 byte larger than bufsize due to a leading zero byte + * (necessary if the most significant bit of the integer is set). */ - if (diff > 0) { + if (vlen > bufsize) { /* skip over leading zeros that make 'value' a positive int */ if (*d == 0) { vlen -= 1; - diff--; d++; - } - if (diff) + } else { return -EINVAL; - } - if (-diff >= keylen) - return -EINVAL; - - if (diff) { - /* leading zeros not given in 'value' */ - memset(rs, 0, -diff); + } } - memcpy(&rs[-diff], d, vlen); - - ecc_swap_digits((u64 *)rs, dest, ndigits); + ecc_digits_from_bytes(d, vlen, dest, ndigits); return 0; } +EXPORT_SYMBOL(ecdsa_get_signature_rs); int ecdsa_get_signature_r(void *context, size_t hdrlen, unsigned char tag, const void *value, size_t vlen) @@ -122,7 +105,7 @@ /* res.x = res.x mod n (if res.x > order) */ if (unlikely(vli_cmp(res.x, curve->n, ndigits) == 1)) - /* faster alternative for NIST p384, p256 & p192 */ + /* faster alternative for NIST p521, p384, p256 & p192 */ vli_sub(res.x, res.x, curve->n, ndigits); if (!vli_cmp(res.x, r, ndigits)) @@ -138,7 +121,7 @@ { struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); struct ecc_ctx *ctx = akcipher_tfm_ctx(tfm); - size_t keylen = ctx->curve->g.ndigits * sizeof(u64); + size_t bufsize = ctx->curve->g.ndigits * sizeof(u64); struct ecdsa_signature_ctx sig_ctx = { .curve = ctx->curve, }; @@ -165,14 +148,14 @@ goto error; /* if the hash is shorter then we will add leading zeros to fit to ndigits */ - diff = keylen - req->dst_len; + diff = bufsize - req->dst_len; if (diff >= 0) { if (diff) memset(rawhash, 0, diff); memcpy(&rawhash[diff], buffer + req->src_len, req->dst_len); } else if (diff < 0) { /* given hash is longer, we take the left-most bytes */ - memcpy(&rawhash, buffer + req->src_len, keylen); + memcpy(&rawhash, buffer + req->src_len, bufsize); } ecc_swap_digits((u64 *)rawhash, hash, ctx->curve->g.ndigits); @@ -222,28 +205,32 @@ static int ecdsa_set_pub_key(struct crypto_akcipher *tfm, const void *key, unsigned int keylen) { struct ecc_ctx *ctx = akcipher_tfm_ctx(tfm); + unsigned int digitlen, ndigits; const unsigned char *d = key; - const u64 *digits = (const u64 *)&d[1]; - unsigned int ndigits; int ret; ret = ecdsa_ecc_ctx_reset(ctx); if (ret < 0) return ret; - if (keylen < 1 || (((keylen - 1) >> 1) % sizeof(u64)) != 0) + if (keylen < 1 || ((keylen - 1) & 1) != 0) return -EINVAL; /* we only accept uncompressed format indicated by '4' */ if (d[0] != 4) return -EINVAL; keylen--; - ndigits = (keylen >> 1) / sizeof(u64); + digitlen = keylen >> 1; + + ndigits = DIV_ROUND_UP(digitlen, sizeof(u64)); if (ndigits != ctx->curve->g.ndigits) return -EINVAL; - ecc_swap_digits(digits, ctx->pub_key.x, ndigits); - ecc_swap_digits(&digits[ndigits], ctx->pub_key.y, ndigits); + d++; + + ecc_digits_from_bytes(d, digitlen, ctx->pub_key.x, ndigits); + ecc_digits_from_bytes(&d[digitlen], digitlen, ctx->pub_key.y, ndigits); + ret = ecc_is_pubkey_valid_full(ctx->curve, &ctx->pub_key); ctx->pub_key_set = ret == 0; @@ -262,9 +249,31 @@ { struct ecc_ctx *ctx = akcipher_tfm_ctx(tfm); - return ctx->pub_key.ndigits << ECC_DIGITS_TO_BYTES_SHIFT; + return DIV_ROUND_UP(ctx->curve->nbits, 8); } +static int ecdsa_nist_p521_init_tfm(struct crypto_akcipher *tfm) +{ + struct ecc_ctx *ctx = akcipher_tfm_ctx(tfm); + + return ecdsa_ecc_ctx_init(ctx, ECC_CURVE_NIST_P521); +} + +static struct akcipher_alg ecdsa_nist_p521 = { + .verify = ecdsa_verify, + .set_pub_key = ecdsa_set_pub_key, + .max_size = ecdsa_max_size, + .init = ecdsa_nist_p521_init_tfm, + .exit = ecdsa_exit_tfm, + .base = { + .cra_name = "ecdsa-nist-p521", + .cra_driver_name = "ecdsa-nist-p521-generic", + .cra_priority = 100, + .cra_module = THIS_MODULE, + .cra_ctxsize = sizeof(struct ecc_ctx), + }, +}; + static int ecdsa_nist_p384_init_tfm(struct crypto_akcipher *tfm) { struct ecc_ctx *ctx = akcipher_tfm_ctx(tfm); @@ -348,8 +357,15 @@ if (ret) goto nist_p384_error; + ret = crypto_register_akcipher(&ecdsa_nist_p521); + if (ret) + goto nist_p521_error; + return 0; +nist_p521_error: + crypto_unregister_akcipher(&ecdsa_nist_p384); + nist_p384_error: crypto_unregister_akcipher(&ecdsa_nist_p256); @@ -365,6 +381,7 @@ crypto_unregister_akcipher(&ecdsa_nist_p192); crypto_unregister_akcipher(&ecdsa_nist_p256); crypto_unregister_akcipher(&ecdsa_nist_p384); + crypto_unregister_akcipher(&ecdsa_nist_p521); } subsys_initcall(ecdsa_init); @@ -373,4 +390,7 @@ MODULE_LICENSE("GPL"); MODULE_AUTHOR("Stefan Berger "); MODULE_DESCRIPTION("ECDSA generic algorithm"); +MODULE_ALIAS_CRYPTO("ecdsa-nist-p192"); +MODULE_ALIAS_CRYPTO("ecdsa-nist-p256"); +MODULE_ALIAS_CRYPTO("ecdsa-nist-p384"); MODULE_ALIAS_CRYPTO("ecdsa-generic"); --- linux-xilinx-6.8.0.orig/crypto/ecrdsa.c +++ linux-xilinx-6.8.0/crypto/ecrdsa.c @@ -294,4 +294,5 @@ MODULE_LICENSE("GPL"); MODULE_AUTHOR("Vitaly Chikunov "); MODULE_DESCRIPTION("EC-RDSA generic algorithm"); +MODULE_ALIAS_CRYPTO("ecrdsa"); MODULE_ALIAS_CRYPTO("ecrdsa-generic"); --- linux-xilinx-6.8.0.orig/crypto/ecrdsa_defs.h +++ linux-xilinx-6.8.0/crypto/ecrdsa_defs.h @@ -47,6 +47,7 @@ static struct ecc_curve gost_cp256a = { .name = "cp256a", + .nbits = 256, .g = { .x = cp256a_g_x, .y = cp256a_g_y, @@ -80,6 +81,7 @@ static struct ecc_curve gost_cp256b = { .name = "cp256b", + .nbits = 256, .g = { .x = cp256b_g_x, .y = cp256b_g_y, @@ -117,6 +119,7 @@ static struct ecc_curve gost_cp256c = { .name = "cp256c", + .nbits = 256, .g = { .x = cp256c_g_x, .y = cp256c_g_y, @@ -166,6 +169,7 @@ static struct ecc_curve gost_tc512a = { .name = "tc512a", + .nbits = 512, .g = { .x = tc512a_g_x, .y = tc512a_g_y, @@ -211,6 +215,7 @@ static struct ecc_curve gost_tc512b = { .name = "tc512b", + .nbits = 512, .g = { .x = tc512b_g_x, .y = tc512b_g_y, --- linux-xilinx-6.8.0.orig/crypto/fips.c +++ linux-xilinx-6.8.0/crypto/fips.c @@ -14,7 +14,8 @@ #include #include -int fips_enabled; +/* LP: #2049082 UBUNTU: SAUCE: FIPS kernels default to FIPS mode */ +int fips_enabled = 1; EXPORT_SYMBOL_GPL(fips_enabled); ATOMIC_NOTIFIER_HEAD(fips_fail_notif_chain); --- linux-xilinx-6.8.0.orig/crypto/pcrypt.c +++ linux-xilinx-6.8.0/crypto/pcrypt.c @@ -117,8 +117,10 @@ err = padata_do_parallel(ictx->psenc, padata, &ctx->cb_cpu); if (!err) return -EINPROGRESS; - if (err == -EBUSY) - return -EAGAIN; + if (err == -EBUSY) { + /* try non-parallel mode */ + return crypto_aead_encrypt(creq); + } return err; } @@ -166,8 +168,10 @@ err = padata_do_parallel(ictx->psdec, padata, &ctx->cb_cpu); if (!err) return -EINPROGRESS; - if (err == -EBUSY) - return -EAGAIN; + if (err == -EBUSY) { + /* try non-parallel mode */ + return crypto_aead_decrypt(creq); + } return err; } --- linux-xilinx-6.8.0.orig/crypto/simd.c +++ linux-xilinx-6.8.0/crypto/simd.c @@ -136,27 +136,19 @@ return 0; } -struct simd_skcipher_alg *simd_skcipher_create_compat(const char *algname, +struct simd_skcipher_alg *simd_skcipher_create_compat(struct skcipher_alg *ialg, + const char *algname, const char *drvname, const char *basename) { struct simd_skcipher_alg *salg; - struct crypto_skcipher *tfm; - struct skcipher_alg *ialg; struct skcipher_alg *alg; int err; - tfm = crypto_alloc_skcipher(basename, CRYPTO_ALG_INTERNAL, - CRYPTO_ALG_INTERNAL | CRYPTO_ALG_ASYNC); - if (IS_ERR(tfm)) - return ERR_CAST(tfm); - - ialg = crypto_skcipher_alg(tfm); - salg = kzalloc(sizeof(*salg), GFP_KERNEL); if (!salg) { salg = ERR_PTR(-ENOMEM); - goto out_put_tfm; + goto out; } salg->ialg_name = basename; @@ -195,30 +187,16 @@ if (err) goto out_free_salg; -out_put_tfm: - crypto_free_skcipher(tfm); +out: return salg; out_free_salg: kfree(salg); salg = ERR_PTR(err); - goto out_put_tfm; + goto out; } EXPORT_SYMBOL_GPL(simd_skcipher_create_compat); -struct simd_skcipher_alg *simd_skcipher_create(const char *algname, - const char *basename) -{ - char drvname[CRYPTO_MAX_ALG_NAME]; - - if (snprintf(drvname, CRYPTO_MAX_ALG_NAME, "simd-%s", basename) >= - CRYPTO_MAX_ALG_NAME) - return ERR_PTR(-ENAMETOOLONG); - - return simd_skcipher_create_compat(algname, drvname, basename); -} -EXPORT_SYMBOL_GPL(simd_skcipher_create); - void simd_skcipher_free(struct simd_skcipher_alg *salg) { crypto_unregister_skcipher(&salg->alg); @@ -246,7 +224,7 @@ algname = algs[i].base.cra_name + 2; drvname = algs[i].base.cra_driver_name + 2; basename = algs[i].base.cra_driver_name; - simd = simd_skcipher_create_compat(algname, drvname, basename); + simd = simd_skcipher_create_compat(algs + i, algname, drvname, basename); err = PTR_ERR(simd); if (IS_ERR(simd)) goto err_unregister; @@ -383,27 +361,19 @@ return 0; } -struct simd_aead_alg *simd_aead_create_compat(const char *algname, - const char *drvname, - const char *basename) +static struct simd_aead_alg *simd_aead_create_compat(struct aead_alg *ialg, + const char *algname, + const char *drvname, + const char *basename) { struct simd_aead_alg *salg; - struct crypto_aead *tfm; - struct aead_alg *ialg; struct aead_alg *alg; int err; - tfm = crypto_alloc_aead(basename, CRYPTO_ALG_INTERNAL, - CRYPTO_ALG_INTERNAL | CRYPTO_ALG_ASYNC); - if (IS_ERR(tfm)) - return ERR_CAST(tfm); - - ialg = crypto_aead_alg(tfm); - salg = kzalloc(sizeof(*salg), GFP_KERNEL); if (!salg) { salg = ERR_PTR(-ENOMEM); - goto out_put_tfm; + goto out; } salg->ialg_name = basename; @@ -442,36 +412,20 @@ if (err) goto out_free_salg; -out_put_tfm: - crypto_free_aead(tfm); +out: return salg; out_free_salg: kfree(salg); salg = ERR_PTR(err); - goto out_put_tfm; -} -EXPORT_SYMBOL_GPL(simd_aead_create_compat); - -struct simd_aead_alg *simd_aead_create(const char *algname, - const char *basename) -{ - char drvname[CRYPTO_MAX_ALG_NAME]; - - if (snprintf(drvname, CRYPTO_MAX_ALG_NAME, "simd-%s", basename) >= - CRYPTO_MAX_ALG_NAME) - return ERR_PTR(-ENAMETOOLONG); - - return simd_aead_create_compat(algname, drvname, basename); + goto out; } -EXPORT_SYMBOL_GPL(simd_aead_create); -void simd_aead_free(struct simd_aead_alg *salg) +static void simd_aead_free(struct simd_aead_alg *salg) { crypto_unregister_aead(&salg->alg); kfree(salg); } -EXPORT_SYMBOL_GPL(simd_aead_free); int simd_register_aeads_compat(struct aead_alg *algs, int count, struct simd_aead_alg **simd_algs) @@ -493,7 +447,7 @@ algname = algs[i].base.cra_name + 2; drvname = algs[i].base.cra_driver_name + 2; basename = algs[i].base.cra_driver_name; - simd = simd_aead_create_compat(algname, drvname, basename); + simd = simd_aead_create_compat(algs + i, algname, drvname, basename); err = PTR_ERR(simd); if (IS_ERR(simd)) goto err_unregister; --- linux-xilinx-6.8.0.orig/crypto/testmgr.c +++ linux-xilinx-6.8.0/crypto/testmgr.c @@ -5098,6 +5098,13 @@ .akcipher = __VECS(ecdsa_nist_p384_tv_template) } }, { + .alg = "ecdsa-nist-p521", + .test = alg_test_akcipher, + .fips_allowed = 1, + .suite = { + .akcipher = __VECS(ecdsa_nist_p521_tv_template) + } + }, { .alg = "ecrdsa", .test = alg_test_akcipher, .suite = { --- linux-xilinx-6.8.0.orig/crypto/testmgr.h +++ linux-xilinx-6.8.0/crypto/testmgr.h @@ -653,6 +653,30 @@ static const struct akcipher_testvec ecdsa_nist_p192_tv_template[] = { { .key = + "\x04\xf7\x46\xf8\x2f\x15\xf6\x22\x8e\xd7\x57\x4f\xcc\xe7\xbb\xc1" + "\xd4\x09\x73\xcf\xea\xd0\x15\x07\x3d\xa5\x8a\x8a\x95\x43\xe4\x68" + "\xea\xc6\x25\xc1\xc1\x01\x25\x4c\x7e\xc3\x3c\xa6\x04\x0a\xe7\x08" + "\x98", + .key_len = 49, + .params = + "\x30\x13\x06\x07\x2a\x86\x48\xce\x3d\x02\x01\x06\x08\x2a\x86\x48" + "\xce\x3d\x03\x01\x01", + .param_len = 21, + .m = + "\xcd\xb9\xd2\x1c\xb7\x6f\xcd\x44\xb3\xfd\x63\xea\xa3\x66\x7f\xae" + "\x63\x85\xe7\x82", + .m_size = 20, + .algo = OID_id_ecdsa_with_sha1, + .c = + "\x30\x35\x02\x19\x00\xba\xe5\x93\x83\x6e\xb6\x3b\x63\xa0\x27\x91" + "\xc6\xf6\x7f\xc3\x09\xad\x59\xad\x88\x27\xd6\x92\x6b\x02\x18\x10" + "\x68\x01\x9d\xba\xce\x83\x08\xef\x95\x52\x7b\xa0\x0f\xe4\x18\x86" + "\x80\x6f\xa5\x79\x77\xda\xd0", + .c_size = 55, + .public_key_vec = true, + .siggen_sigver_test = true, + }, { + .key = "\x04\xb6\x4b\xb1\xd1\xac\xba\x24\x8f\x65\xb2\x60\x00\x90\xbf\xbd" "\x78\x05\x73\xe9\x79\x1d\x6f\x7c\x0b\xd2\xc3\x93\xa7\x28\xe1\x75" "\xf7\xd5\x95\x1d\x28\x10\xc0\x75\x50\x5c\x1a\x4f\x3f\x8f\xa5\xee" @@ -756,6 +780,32 @@ static const struct akcipher_testvec ecdsa_nist_p256_tv_template[] = { { .key = + "\x04\xb9\x7b\xbb\xd7\x17\x64\xd2\x7e\xfc\x81\x5d\x87\x06\x83\x41" + "\x22\xd6\x9a\xaa\x87\x17\xec\x4f\x63\x55\x2f\x94\xba\xdd\x83\xe9" + "\x34\x4b\xf3\xe9\x91\x13\x50\xb6\xcb\xca\x62\x08\xe7\x3b\x09\xdc" + "\xc3\x63\x4b\x2d\xb9\x73\x53\xe4\x45\xe6\x7c\xad\xe7\x6b\xb0\xe8" + "\xaf", + .key_len = 65, + .params = + "\x30\x13\x06\x07\x2a\x86\x48\xce\x3d\x02\x01\x06\x08\x2a\x86\x48" + "\xce\x3d\x03\x01\x07", + .param_len = 21, + .m = + "\xc2\x2b\x5f\x91\x78\x34\x26\x09\x42\x8d\x6f\x51\xb2\xc5\xaf\x4c" + "\x0b\xde\x6a\x42", + .m_size = 20, + .algo = OID_id_ecdsa_with_sha1, + .c = + "\x30\x46\x02\x21\x00\xf9\x25\xce\x9f\x3a\xa6\x35\x81\xcf\xd4\xe7" + "\xb7\xf0\x82\x56\x41\xf7\xd4\xad\x8d\x94\x5a\x69\x89\xee\xca\x6a" + "\x52\x0e\x48\x4d\xcc\x02\x21\x00\xd7\xe4\xef\x52\x66\xd3\x5b\x9d" + "\x8a\xfa\x54\x93\x29\xa7\x70\x86\xf1\x03\x03\xf3\x3b\xe2\x73\xf7" + "\xfb\x9d\x8b\xde\xd4\x8d\x6f\xad", + .c_size = 72, + .public_key_vec = true, + .siggen_sigver_test = true, + }, { + .key = "\x04\x8b\x6d\xc0\x33\x8e\x2d\x8b\x67\xf5\xeb\xc4\x7f\xa0\xf5\xd9" "\x7b\x03\xa5\x78\x9a\xb5\xea\x14\xe4\x23\xd0\xaf\xd7\x0e\x2e\xa0" "\xc9\x8b\xdb\x95\xf8\xb3\xaf\xac\x00\x2c\x2c\x1f\x7a\xfd\x95\x88" @@ -866,6 +916,36 @@ static const struct akcipher_testvec ecdsa_nist_p384_tv_template[] = { { + .key = /* secp384r1(sha1) */ + "\x04\x89\x25\xf3\x97\x88\xcb\xb0\x78\xc5\x72\x9a\x14\x6e\x7a\xb1" + "\x5a\xa5\x24\xf1\x95\x06\x9e\x28\xfb\xc4\xb9\xbe\x5a\x0d\xd9\x9f" + "\xf3\xd1\x4d\x2d\x07\x99\xbd\xda\xa7\x66\xec\xbb\xea\xba\x79\x42" + "\xc9\x34\x89\x6a\xe7\x0b\xc3\xf2\xfe\x32\x30\xbe\xba\xf9\xdf\x7e" + "\x4b\x6a\x07\x8e\x26\x66\x3f\x1d\xec\xa2\x57\x91\x51\xdd\x17\x0e" + "\x0b\x25\xd6\x80\x5c\x3b\xe6\x1a\x98\x48\x91\x45\x7a\x73\xb0\xc3" + "\xf1", + .key_len = 97, + .params = + "\x30\x10\x06\x07\x2a\x86\x48\xce\x3d\x02\x01\x06\x05\x2b\x81\x04" + "\x00\x22", + .param_len = 18, + .m = + "\x12\x55\x28\xf0\x77\xd5\xb6\x21\x71\x32\x48\xcd\x28\xa8\x25\x22" + "\x3a\x69\xc1\x93", + .m_size = 20, + .algo = OID_id_ecdsa_with_sha1, + .c = + "\x30\x66\x02\x31\x00\xf5\x0f\x24\x4c\x07\x93\x6f\x21\x57\x55\x07" + "\x20\x43\x30\xde\xa0\x8d\x26\x8e\xae\x63\x3f\xbc\x20\x3a\xc6\xf1" + "\x32\x3c\xce\x70\x2b\x78\xf1\x4c\x26\xe6\x5b\x86\xcf\xec\x7c\x7e" + "\xd0\x87\xd7\xd7\x6e\x02\x31\x00\xcd\xbb\x7e\x81\x5d\x8f\x63\xc0" + "\x5f\x63\xb1\xbe\x5e\x4c\x0e\xa1\xdf\x28\x8c\x1b\xfa\xf9\x95\x88" + "\x74\xa0\x0f\xbf\xaf\xc3\x36\x76\x4a\xa1\x59\xf1\x1c\xa4\x58\x26" + "\x79\x12\x2a\xb7\xc5\x15\x92\xc5", + .c_size = 104, + .public_key_vec = true, + .siggen_sigver_test = true, + }, { .key = /* secp384r1(sha224) */ "\x04\x69\x6c\xcf\x62\xee\xd0\x0d\xe5\xb5\x2f\x70\x54\xcf\x26\xa0" "\xd9\x98\x8d\x92\x2a\xab\x9b\x11\xcb\x48\x18\xa1\xa9\x0d\xd5\x18" @@ -989,6 +1069,152 @@ .public_key_vec = true, .siggen_sigver_test = true, }, +}; + +static const struct akcipher_testvec ecdsa_nist_p521_tv_template[] = { + { + .key = /* secp521r1(sha224) */ + "\x04\x01\x4f\x43\x18\xb6\xa9\xc9\x5d\x68\xd3\xa9\x42\xf8\x98\xc0" + "\xd2\xd1\xa9\x50\x3b\xe8\xc4\x40\xe6\x11\x78\x88\x4b\xbd\x76\xa7" + "\x9a\xe0\xdd\x31\xa4\x67\x78\x45\x33\x9e\x8c\xd1\xc7\x44\xac\x61" + "\x68\xc8\x04\xe7\x5c\x79\xb1\xf1\x41\x0c\x71\xc0\x53\xa8\xbc\xfb" + "\xf5\xca\xd4\x01\x40\xfd\xa3\x45\xda\x08\xe0\xb4\xcb\x28\x3b\x0a" + "\x02\x35\x5f\x02\x9f\x3f\xcd\xef\x08\x22\x40\x97\x74\x65\xb7\x76" + "\x85\xc7\xc0\x5c\xfb\x81\xe1\xa5\xde\x0c\x4e\x8b\x12\x31\xb6\x47" + "\xed\x37\x0f\x99\x3f\x26\xba\xa3\x8e\xff\x79\x34\x7c\x3a\xfe\x1f" + "\x3b\x83\x82\x2f\x14", + .key_len = 133, + .params = + "\x30\x10\x06\x07\x2a\x86\x48\xce\x3d\x02\x01\x06\x05\x2b\x81\x04" + "\x00\x23", + .param_len = 18, + .m = + "\xa2\x3a\x6a\x8c\x7b\x3c\xf2\x51\xf8\xbe\x5f\x4f\x3b\x15\x05\xc4" + "\xb5\xbc\x19\xe7\x21\x85\xe9\x23\x06\x33\x62\xfb", + .m_size = 28, + .algo = OID_id_ecdsa_with_sha224, + .c = + "\x30\x81\x86\x02\x41\x01\xd6\x43\xe7\xff\x42\xb2\xba\x74\x35\xf6" + "\xdc\x6d\x02\x7b\x22\xac\xe2\xef\x07\x92\xee\x60\x94\x06\xf8\x3f" + "\x59\x0f\x74\xf0\x3f\xd8\x18\xc6\x37\x8a\xcb\xa7\xd8\x7d\x98\x85" + "\x29\x88\xff\x0b\x94\x94\x6c\xa6\x9b\x89\x8b\x1e\xfd\x09\x46\x6b" + "\xc7\xaf\x7a\xb9\x19\x0a\x02\x41\x3a\x26\x0d\x55\xcd\x23\x1e\x7d" + "\xa0\x5e\xf9\x88\xf3\xd2\x32\x90\x57\x0f\xf8\x65\x97\x6b\x09\x4d" + "\x22\x26\x0b\x5f\x49\x32\x6b\x91\x99\x30\x90\x0f\x1c\x8f\x78\xd3" + "\x9f\x0e\x64\xcc\xc4\xe8\x43\xd9\x0e\x1c\xad\x22\xda\x82\x00\x35" + "\xa3\x50\xb1\xa5\x98\x92\x2a\xa5\x52", + .c_size = 137, + .public_key_vec = true, + .siggen_sigver_test = true, + }, + { + .key = /* secp521r1(sha256) */ + "\x04\x01\x05\x3a\x6b\x3b\x5a\x0f\xa7\xb9\xb7\x32\x53\x4e\xe2\xae" + "\x0a\x52\xc5\xda\xdd\x5a\x79\x1c\x30\x2d\x33\x07\x79\xd5\x70\x14" + "\x61\x0c\xec\x26\x4d\xd8\x35\x57\x04\x1d\x88\x33\x4d\xce\x05\x36" + "\xa5\xaf\x56\x84\xfa\x0b\x9e\xff\x7b\x30\x4b\x92\x1d\x06\xf8\x81" + "\x24\x1e\x51\x00\x09\x21\x51\xf7\x46\x0a\x77\xdb\xb5\x0c\xe7\x9c" + "\xff\x27\x3c\x02\x71\xd7\x85\x36\xf1\xaa\x11\x59\xd8\xb8\xdc\x09" + "\xdc\x6d\x5a\x6f\x63\x07\x6c\xe1\xe5\x4d\x6e\x0f\x6e\xfb\x7c\x05" + "\x8a\xe9\x53\xa8\xcf\xce\x43\x0e\x82\x20\x86\xbc\x88\x9c\xb7\xe3" + "\xe6\x77\x1e\x1f\x8a", + .key_len = 133, + .params = + "\x30\x10\x06\x07\x2a\x86\x48\xce\x3d\x02\x01\x06\x05\x2b\x81\x04" + "\x00\x23", + .param_len = 18, + .m = + "\xcc\x97\x73\x0c\x73\xa2\x53\x2b\xfa\xd7\x83\x1d\x0c\x72\x1b\x39" + "\x80\x71\x8d\xdd\xc5\x9b\xff\x55\x32\x98\x25\xa2\x58\x2e\xb7\x73", + .m_size = 32, + .algo = OID_id_ecdsa_with_sha256, + .c = + "\x30\x81\x88\x02\x42\x00\xcd\xa5\x5f\x57\x52\x27\x78\x3a\xb5\x06" + "\x0f\xfd\x83\xfc\x0e\xd9\xce\x50\x9f\x7d\x1f\xca\x8b\xa8\x2d\x56" + "\x3c\xf6\xf0\xd8\xe1\xb7\x5d\x95\x35\x6f\x02\x0e\xaf\xe1\x4c\xae" + "\xce\x54\x76\x9a\xc2\x8f\xb8\x38\x1f\x46\x0b\x04\x64\x34\x79\xde" + "\x7e\xd7\x59\x10\xe9\xd9\xd5\x02\x42\x01\xcf\x50\x85\x38\xf9\x15" + "\x83\x18\x04\x6b\x35\xae\x65\xb5\x99\x12\x0a\xa9\x79\x24\xb9\x37" + "\x35\xdd\xa0\xe0\x87\x2c\x44\x4b\x5a\xee\xaf\xfa\x10\xdd\x9b\xfb" + "\x36\x1a\x31\x03\x42\x02\x5f\x50\xf0\xa2\x0d\x1c\x57\x56\x8f\x12" + "\xb7\x1d\x91\x55\x38\xb6\xf6\x34\x65\xc7\xbd", + .c_size = 139, + .public_key_vec = true, + .siggen_sigver_test = true, + }, + { + .key = /* secp521r1(sha384) */ + "\x04\x00\x2e\xd6\x21\x04\x75\xc3\xdc\x7d\xff\x0e\xf3\x70\x25\x2b" + "\xad\x72\xfc\x5a\x91\xf1\xd5\x9c\x64\xf3\x1f\x47\x11\x10\x62\x33" + "\xfd\x2e\xe8\x32\xca\x9e\x6f\x0a\x4c\x5b\x35\x9a\x46\xc5\xe7\xd4" + "\x38\xda\xb2\xf0\xf4\x87\xf3\x86\xf4\xea\x70\xad\x1e\xd4\x78\x8c" + "\x36\x18\x17\x00\xa2\xa0\x34\x1b\x2e\x6a\xdf\x06\xd6\x99\x2d\x47" + "\x50\x92\x1a\x8a\x72\x9c\x23\x44\xfa\xa7\xa9\xed\xa6\xef\x26\x14" + "\xb3\x9d\xfe\x5e\xa3\x8c\xd8\x29\xf8\xdf\xad\xa6\xab\xfc\xdd\x46" + "\x22\x6e\xd7\x35\xc7\x23\xb7\x13\xae\xb6\x34\xff\xd7\x80\xe5\x39" + "\xb3\x3b\x5b\x1b\x94", + .key_len = 133, + .params = + "\x30\x10\x06\x07\x2a\x86\x48\xce\x3d\x02\x01\x06\x05\x2b\x81\x04" + "\x00\x23", + .param_len = 18, + .m = + "\x36\x98\xd6\x82\xfa\xad\xed\x3c\xb9\x40\xb6\x4d\x9e\xb7\x04\x26" + "\xad\x72\x34\x44\xd2\x81\xb4\x9b\xbe\x01\x04\x7a\xd8\x50\xf8\x59" + "\xba\xad\x23\x85\x6b\x59\xbe\xfb\xf6\x86\xd4\x67\xa8\x43\x28\x76", + .m_size = 48, + .algo = OID_id_ecdsa_with_sha384, + .c = + "\x30\x81\x88\x02\x42\x00\x93\x96\x76\x3c\x27\xea\xaa\x9c\x26\xec" + "\x51\xdc\xe8\x35\x5e\xae\x16\xf2\x4b\x64\x98\xf7\xec\xda\xc7\x7e" + "\x42\x71\x86\x57\x2d\xf1\x7d\xe4\xdf\x9b\x7d\x9e\x47\xca\x33\x32" + "\x76\x06\xd0\xf9\xc0\xe4\xe6\x84\x59\xfd\x1a\xc4\x40\xdd\x43\xb8" + "\x6a\xdd\xfb\xe6\x63\x4e\x28\x02\x42\x00\xff\xc3\x6a\x87\x6e\xb5" + "\x13\x1f\x20\x55\xce\x37\x97\xc9\x05\x51\xe5\xe4\x3c\xbc\x93\x65" + "\x57\x1c\x30\xda\xa7\xcd\x26\x28\x76\x3b\x52\xdf\xc4\xc0\xdb\x54" + "\xdb\x8a\x0d\x6a\xc3\xf3\x7a\xd1\xfa\xe7\xa7\xe5\x5a\x94\x56\xcf" + "\x8f\xb4\x22\xc6\x4f\xab\x2b\x62\xc1\x42\xb1", + .c_size = 139, + .public_key_vec = true, + .siggen_sigver_test = true, + }, + { + .key = /* secp521r1(sha512) */ + "\x04\x00\xc7\x65\xee\x0b\x86\x7d\x8f\x02\xf1\x74\x5b\xb0\x4c\x3f" + "\xa6\x35\x60\x9f\x55\x23\x11\xcc\xdf\xb8\x42\x99\xee\x6c\x96\x6a" + "\x27\xa2\x56\xb2\x2b\x03\xad\x0f\xe7\x97\xde\x09\x5d\xb4\xc5\x5f" + "\xbd\x87\x37\xbf\x5a\x16\x35\x56\x08\xfd\x6f\x06\x1a\x1c\x84\xee" + "\xc3\x64\xb3\x00\x9e\xbd\x6e\x60\x76\xee\x69\xfd\x3a\xb8\xcd\x7e" + "\x91\x68\x53\x57\x44\x13\x2e\x77\x09\x2a\xbe\x48\xbd\x91\xd8\xf6" + "\x21\x16\x53\x99\xd5\xf0\x40\xad\xa6\xf8\x58\x26\xb6\x9a\xf8\x77" + "\xfe\x3a\x05\x1a\xdb\xa9\x0f\xc0\x6c\x76\x30\x8c\xd8\xde\x44\xae" + "\xd0\x17\xdf\x49\x6a", + .key_len = 133, + .params = + "\x30\x10\x06\x07\x2a\x86\x48\xce\x3d\x02\x01\x06\x05\x2b\x81\x04" + "\x00\x23", + .param_len = 18, + .m = + "\x5c\xa6\xbc\x79\xb8\xa0\x1e\x11\x83\xf7\xe9\x05\xdf\xba\xf7\x69" + "\x97\x22\x32\xe4\x94\x7c\x65\xbd\x74\xc6\x9a\x8b\xbd\x0d\xdc\xed" + "\xf5\x9c\xeb\xe1\xc5\x68\x40\xf2\xc7\x04\xde\x9e\x0d\x76\xc5\xa3" + "\xf9\x3c\x6c\x98\x08\x31\xbd\x39\xe8\x42\x7f\x80\x39\x6f\xfe\x68", + .m_size = 64, + .algo = OID_id_ecdsa_with_sha512, + .c = + "\x30\x81\x88\x02\x42\x01\x5c\x71\x86\x96\xac\x21\x33\x7e\x4e\xaa" + "\x86\xec\xa8\x05\x03\x52\x56\x63\x0e\x02\xcc\x94\xa9\x05\xb9\xfb" + "\x62\x1e\x42\x03\x6c\x74\x8a\x1f\x12\x3e\xb7\x7e\x51\xff\x7f\x27" + "\x93\xe8\x6c\x49\x7d\x28\xfc\x80\xa6\x13\xfc\xb6\x90\xf7\xbb\x28" + "\xb5\x04\xb0\xb6\x33\x1c\x7e\x02\x42\x01\x70\x43\x52\x1d\xe3\xc6" + "\xbd\x5a\x40\x95\x35\x89\x4f\x41\x5f\x9e\x19\x88\x05\x3e\x43\x39" + "\x01\xbd\xb7\x7a\x76\x37\x51\x47\x49\x98\x12\x71\xd0\xe9\xca\xa7" + "\xc0\xcb\xaa\x00\x55\xbb\x6a\xb4\x73\x00\xd2\x72\x74\x13\x63\x39" + "\xa6\xe5\x25\x46\x1e\x77\x44\x78\xe0\xd1\x04", + .c_size = 139, + .public_key_vec = true, + .siggen_sigver_test = true, + }, }; /* --- linux-xilinx-6.8.0.orig/crypto/xor.c +++ linux-xilinx-6.8.0/crypto/xor.c @@ -83,33 +83,30 @@ do_xor_speed(struct xor_block_template *tmpl, void *b1, void *b2) { int speed; - int i, j; - ktime_t min, start, diff; + unsigned long reps; + ktime_t min, start, t0; tmpl->next = template_list; template_list = tmpl; preempt_disable(); - min = (ktime_t)S64_MAX; - for (i = 0; i < 3; i++) { - start = ktime_get(); - for (j = 0; j < REPS; j++) { - mb(); /* prevent loop optimization */ - tmpl->do_2(BENCH_SIZE, b1, b2); - mb(); - } - diff = ktime_sub(ktime_get(), start); - if (diff < min) - min = diff; - } + reps = 0; + t0 = ktime_get(); + /* delay start until time has advanced */ + while ((start = ktime_get()) == t0) + cpu_relax(); + do { + mb(); /* prevent loop optimization */ + tmpl->do_2(BENCH_SIZE, b1, b2); + mb(); + } while (reps++ < REPS || (t0 = ktime_get()) == start); + min = ktime_sub(t0, start); preempt_enable(); // bytes/ns == GB/s, multiply by 1000 to get MB/s [not MiB/s] - if (!min) - min = 1; - speed = (1000 * REPS * BENCH_SIZE) / (unsigned int)ktime_to_ns(min); + speed = (1000 * reps * BENCH_SIZE) / (unsigned int)ktime_to_ns(min); tmpl->speed = speed; pr_info(" %-16s: %5d MB/sec\n", tmpl->name, speed); --- linux-xilinx-6.8.0.orig/debian.master/changelog +++ linux-xilinx-6.8.0/debian.master/changelog @@ -0,0 +1,38110 @@ +linux (6.8.0-72.72) noble; urgency=medium + + * noble/linux: 6.8.0-72.72 -proposed tracker (LP: #2117691) + + * Packaging resync (LP: #1786013) + - [Packaging] update annotations scripts + - [Packaging] debian.master/dkms-versions -- update from kernel-versions + (main/2025.07.14) + + * NVMe namespace ID mismatch on repeated map/unmap (LP: #2115209) + - nvme: requeue namespace scan on missed AENs + - nvme: re-read ANA log page after ns scan completes + - nvme: fixup scan failure for non-ANA multipath controllers + + * integrated I219-LM network adapter appears to be running too fast, causing + synchronization issues when using the I219-LM PTP feature (LP: #2116072) + - e1000e: set fixed clock frequency indication for Nahum 11 and Nahum 13 + + * intel_rapl: support ARL-H hardware (LP: #2115652) + - powercap: intel_rapl_msr: Add PL4 support for ArrowLake-H + + * Ubuntu 24.04+ arm64: screen resolution fixed to 1024x768 with last kernel + update (LP: #2115068) + - [Config] Replace FB_HYPERV with DRM_HYPERV + + * Noble update: upstream stable patchset 2025-07-09 (LP: #2116212) + - arm64: mte: Do not allow PROT_MTE on MAP_HUGETLB user mappings + - xfs: assert a valid limit in xfs_rtfind_forw + - xfs: validate inumber in xfs_iget + - xfs: fix a sloppy memory handling bug in xfs_iroot_realloc + - xfs: fix a typo + - xfs: skip background cowblock trims on inodes open for write + - xfs: don't free cowblocks from under dirty pagecache on unshare + - xfs: merge xfs_attr_leaf_try_add into xfs_attr_leaf_addname + - xfs: return bool from xfs_attr3_leaf_add + - xfs: distinguish extra split from real ENOSPC from xfs_attr3_leaf_split + - xfs: distinguish extra split from real ENOSPC from + xfs_attr_node_try_addname + - xfs: fold xfs_bmap_alloc_userdata into xfs_bmapi_allocate + - xfs: don't ifdef around the exact minlen allocations + - xfs: call xfs_bmap_exact_minlen_extent_alloc from xfs_bmap_btalloc + - xfs: support lowmode allocations in xfs_bmap_exact_minlen_extent_alloc + - xfs: Use try_cmpxchg() in xlog_cil_insert_pcp_aggregate() + - xfs: Remove empty declartion in header file + - xfs: pass the exact range to initialize to xfs_initialize_perag + - xfs: update the file system geometry after recoverying superblock + buffers + - xfs: error out when a superblock buffer update reduces the agcount + - xfs: don't use __GFP_RETRY_MAYFAIL in xfs_initialize_perag + - xfs: update the pag for the last AG at recovery time + - xfs: Reduce unnecessary searches when searching for the best extents + - xfs: streamline xfs_filestream_pick_ag + - xfs: Check for delayed allocations before setting extsize + - md/md-bitmap: replace md_bitmap_status() with a new helper + md_bitmap_get_stats() + - md/md-cluster: fix spares warnings for __le64 + - md/md-bitmap: add 'sync_size' into struct md_bitmap_stats + - mm: update mark_victim tracepoints fields + - cpufreq: dt-platdev: add missing MODULE_DESCRIPTION() macro + - cpufreq: fix using cpufreq-dt as module + - Bluetooth: qca: Support downloading board id specific NVM for WCN7850 + - Bluetooth: qca: Update firmware-name to support board specific nvm + - Bluetooth: qca: Fix poor RF performance for WCN6855 + - Input: serio - define serio_pause_rx guard to pause and resume serio + ports + - ASoC: renesas: rz-ssi: Add a check for negative sample_space + - ASoC: rockchip: i2s-tdm: fix shift config for SND_SOC_DAIFMT_DSP_[AB] + - powerpc/64s/mm: Move __real_pte stubs into hash-4k.h + - powerpc/64s: Rewrite __real_pte() and __rpte_to_hidx() as static inline + - ALSA: seq: Drop UMP events when no UMP-conversion is set + - ibmvnic: Return error code on TX scrq flush fail + - ibmvnic: Introduce send sub-crq direct + - ibmvnic: Add stat for tx direct vs tx batched + - vsock/bpf: Warn on socket without transport + - tcp: adjust rcvq_space after updating scaling ratio + - geneve: Suppress list corruption splat in geneve_destroy_tunnels(). + - flow_dissector: Fix handling of mixed port and port-range keys + - flow_dissector: Fix port range key handling in BPF conversion + - net: Add non-RCU dev_getbyhwaddr() helper + - arp: switch to dev_getbyhwaddr() in arp_req_set_public() + - net: axienet: Set mac_managed_pm + - bpf: unify VM_WRITE vs VM_MAYWRITE use in BPF map mmaping logic + - strparser: Add read_sock callback + - bpf: Fix wrong copied_seq calculation + - bpf: Disable non stream socket for strparser + - power: supply: da9150-fg: fix potential overflow + - nouveau/svm: fix missing folio unlock + put after + make_device_exclusive_range() + - drm/msm: Avoid rounding up to one jiffy + - nvme/ioctl: add missing space in err message + - bpf: skip non exist keys in generic_map_lookup_batch + - drm/nouveau/pmu: Fix gp10b firmware guard + - drm/msm/dpu: Disable dither in phys encoder cleanup + - drm/i915: Make sure all planes in use by the joiner have their crtc + included + - drm/i915/dp: Fix error handling during 128b/132b link training + - soc: loongson: loongson2_guts: Add check for devm_kstrdup() + - lib/iov_iter: fix import_iovec_ubuf iovec management + - ASoC: fsl_micfil: Enable default case in micfil_set_quality() + - ALSA: hda: Add error check for snd_ctl_rename_id() in + snd_hda_create_dig_out_ctls() + - ALSA: hda/conexant: Add quirk for HP ProBook 450 G4 mute LED + - ASoC: SOF: pcm: Clear the susbstream pointer to NULL on close + - acct: block access to kernel internal filesystems + - mm,madvise,hugetlb: check for 0-length range after end address + adjustment + - mtd: rawnand: cadence: fix error code in cadence_nand_init() + - mtd: rawnand: cadence: use dma_map_resource for sdma address + - mtd: rawnand: cadence: fix incorrect device in dma_unmap_single + - EDAC/qcom: Correct interrupt enable register configuration + - ftrace: Correct preemption accounting for function tracing. + - ftrace: Do not add duplicate entries in subops manager ops + - arm64: dts: rockchip: change eth phy mode to rgmii-id for orangepi r1 + plus lts + - x86/cpu/kvm: SRSO: Fix possible missing IBPB on VM-Exit + - KVM: x86: Get vcpu->arch.apic_base directly and drop kvm_get_apic_base() + - KVM: x86: Inline kvm_get_apic_mode() in lapic.h + - KVM: Introduce vcpu->wants_to_run + - KVM: nVMX: Defer SVI update to vmcs01 on EOI when L2 is active w/o VID + - drm/amd/display: Refactoring if and endif statements to enable DC_LOGGER + - arm64: dts: mt8183: add dpi node to mt8183 + - arm64: dts: mt8183: Add port node to dpi node + - arm64: dts: mediatek: mt8183-kukui: Disable DPI display interface + - arm64: dts: mediatek: mt8183: Disable DPI display output by default + - arm64: dts: mediatek: mt8183-pumpkin: add HDMI support + - arm64: dts: mediatek: mt8183: Disable DSI display output by default + - accel/ivpu: Limit FW version string length + - accel/ivpu: Add coredump support + - accel/ivpu: Add FW state dump on TDR + - accel/ivpu: Fix error handling in recovery/reset + - ASoC: SOF: topology: dynamically allocate and store DAI widget->private + - ASoC: SOF: topology: Parse DAI type token for dspless mode + - ASoC: imx-audmix: remove cpu_mclk which is from cpu dai device + - vsock/virtio: fix variables initialization during resuming + - drm/msm/dpu: skip watchdog timer programming through TOP on >= SM8450 + - drm/msm/dpu: Don't leak bits_per_component into random DSC_ENC fields + - drm/msm/dsi/phy: Protect PHY_CMN_CLK_CFG0 updated from driver side + - drm/msm/dsi/phy: Protect PHY_CMN_CLK_CFG1 against clock driver + - drm/msm/dsi/phy: Do not overwite PHY_CMN_CLK_CFG1 when choosing bitclk + source + - nvme: tcp: Fix compilation warning with W=1 + - nvme-tcp: fix connect failure on receiving partial ICResp PDU + - drm: panel: jd9365da-h3: fix reset signal polarity + - io_uring/rw: forbid multishot async reads + - arm64: dts: rockchip: Fix broken tsadc pinctrl names for rk3588 + - arm64: dts: rockchip: Move uart5 pin configuration to px30 ringneck SoM + - arm64: dts: rockchip: Disable DMA for uart5 on px30-ringneck + - s390/boot: Fix ESSA detection + - xfs: fix online repair probing when CONFIG_XFS_ONLINE_REPAIR=n + - smb: client: fix chmod(2) regression with ATTR_READONLY + - tracing: Fix using ret variable in tracing_set_tracer() + - selftests/mm: build with -O2 + - Upstream stable to v6.6.80, v6.12.17 + + * Noble update: upstream stable patchset 2025-07-09 (LP: #2116212) // + CVE-2025-21861 + - mm/migrate_device: don't add folio to be freed to LRU in + migrate_device_finalize() + + * Noble update: upstream stable patchset 2025-07-09 (LP: #2116212) // + CVE-2025-21868 + - net: allow small head cache usage with large MAX_SKB_FRAGS values + + * Noble update: upstream stable patchset 2025-07-09 (LP: #2116212) // + CVE-2025-21869 + - powerpc/code-patching: Disable KASAN report during patching via + temporary mm + + * Noble update: upstream stable patchset 2025-07-09 (LP: #2116212) // + CVE-2025-21870 + - ASoC: SOF: ipc4-topology: Harden loops for looking up ALH copiers + + * Noble update: upstream stable patchset 2025-07-09 (LP: #2116212) // + CVE-2025-21844 + - smb: client: Add check for next_buffer in receive_encrypted_standard() + + * Noble update: upstream stable patchset 2025-07-09 (LP: #2116212) // + CVE-2025-21846 + - acct: perform last write from workqueue + + * Noble update: upstream stable patchset 2025-07-09 (LP: #2116212) // + CVE-2025-21847 + - ASoC: SOF: stream-ipc: Check for cstream nullity in sof_ipc_msg_data() + + * Noble update: upstream stable patchset 2025-07-09 (LP: #2116212) // + CVE-2025-21848 + - nfp: bpf: Add check for nfp_app_ctrl_msg_alloc() + + * Noble update: upstream stable patchset 2025-07-09 (LP: #2116212) // + CVE-2025-21862 + - drop_monitor: fix incorrect initialization order + + * Noble update: upstream stable patchset 2025-07-09 (LP: #2116212) // + CVE-2025-21871 + - tee: optee: Fix supplicant wait loop + + * Noble update: upstream stable patchset 2025-07-09 (LP: #2116212) // + CVE-2025-21863 + - io_uring: prevent opcode speculation + + * Noble update: upstream stable patchset 2025-07-09 (LP: #2116212) // + CVE-2024-58088 + - bpf: Fix deadlock when freeing cgroup storage + + * Noble update: upstream stable patchset 2025-07-09 (LP: #2116212) // + CVE-2025-21853 + - bpf: avoid holding freeze_mutex during mmap operation + + * Noble update: upstream stable patchset 2025-07-09 (LP: #2116212) // + CVE-2025-21867 + - bpf, test_run: Fix use-after-free issue in eth_skb_pkt_type() + + * Noble update: upstream stable patchset 2025-07-09 (LP: #2116212) // + CVE-2025-21864 + - tcp: drop secpath at the same time as we currently drop dst + + * Noble update: upstream stable patchset 2025-07-09 (LP: #2116212) // + CVE-2025-21854 + - sockmap, vsock: For connectible sockets allow only connected + + * Noble update: upstream stable patchset 2025-07-09 (LP: #2116212) // + CVE-2025-21855 + - ibmvnic: Don't reference skb after sending to VIOS + + * Noble update: upstream stable patchset 2025-07-09 (LP: #2116212) // + CVE-2025-21856 + - s390/ism: add release function for struct device + + * Noble update: upstream stable patchset 2025-07-09 (LP: #2116212) // + CVE-2025-21857 + - net/sched: cls_api: fix error handling causing NULL dereference + + * Noble update: upstream stable patchset 2025-07-09 (LP: #2116212) // + CVE-2025-21858 + - geneve: Fix use-after-free in geneve_find_dev(). + + * Noble update: upstream stable patchset 2025-07-09 (LP: #2116212) // + CVE-2025-21866 + - powerpc/code-patching: Fix KASAN hit by not flagging text patching area + as VM_ALLOC + + * Noble update: upstream stable patchset 2025-07-09 (LP: #2116212) // + CVE-2025-21859 + - USB: gadget: f_midi: f_midi_complete to call queue_work + + * Noble update: upstream stable patchset 2025-07-09 (LP: #2116212) // + CVE-2025-21746 + - Input: synaptics - fix crash when enabling pass-through port + + * Noble update: upstream stable patchset 2025-07-09 (LP: #2116212) // + CVE-2024-57977 + - memcg: fix soft lockup in the OOM process + + * Noble update: upstream stable patchset 2025-07-09 (LP: #2116212) // + CVE-2025-21712 + - md/md-bitmap: Synchronize bitmap_get_stats() with bitmap lifetime + + * CVE-2024-58093 + - PCI/ASPM: Fix link state exit during switch upstream function removal + + * [SRU]Request E825-C driver into latest LTS of Ubuntu OS 24.04 + (LP: #2114785) + - ice: add support for 3k signing DDP sections for E825C + - ice: Add helper function ice_is_generic_mac + - ice: introduce new E825C devices family + + * [UBUNTU 22.04] kernel: Fix z17 elf platform recognition (LP: #2114450) + - s390: Add z17 elf platform + + * [UBUNTU 24.04] Kernel: Add CPUMF extended counter set for z17 + (LP: #2114258) + - s390/cpumf: Update CPU Measurement facility extended counter set support + + * Noble update: upstream stable patchset 2025-06-29 (LP: #2115616) + - nfsd: clear acl_access/acl_default after releasing them + - NFSD: fix hang in nfsd4_shutdown_callback + - pinctrl: cy8c95x0: Respect IRQ trigger settings from firmware + - HID: multitouch: Add NULL check in mt_input_configured + - HID: hid-thrustmaster: fix stack-out-of-bounds read in + usb_check_int_endpoints() + - spi: sn-f-ospi: Fix division by zero + - ax25: Fix refcount leak caused by setting SO_BINDTODEVICE sockopt + - ndisc: ndisc_send_redirect() must use dev_get_by_index_rcu() + - vrf: use RCU protection in l3mdev_l3_out() + - vxlan: check vxlan_vnigroup_init() return value + - LoongArch: Fix idle VS timer enqueue + - LoongArch: csum: Fix OoB access in IP checksum code for negative lengths + - team: better TEAM_OPTION_TYPE_STRING validation + - arm64: cacheinfo: Avoid out-of-bounds write to cacheinfo array + - cgroup: Remove steal time from usage_usec + - drm/i915/selftests: avoid using uninitialized context + - gpio: bcm-kona: Fix GPIO lock/unlock for banks above bank 0 + - gpio: bcm-kona: Make sure GPIO bits are unlocked when requesting IRQ + - gpio: bcm-kona: Add missing newline to dev_err format string + - drm/amdgpu: bail out when failed to load fw in psp_init_cap_microcode() + - xen/swiotlb: relax alignment requirements + - x86/xen: allow larger contiguous memory regions in PV guests + - block: cleanup and fix batch completion adding conditions + - gpiolib: Fix crash on error in gpiochip_get_ngpios() + - tools: fix annoying "mkdir -p ..." logs when building tools in parallel + - RDMA/efa: Reset device on probe failure + - fbdev: omap: use threaded IRQ for LCD DMA + - soc/tegra: fuse: Update Tegra234 nvmem keepout list + - media: cxd2841er: fix 64-bit division on gcc-9 + - media: i2c: ds90ub913: Add error handling to ub913_hw_init() + - media: i2c: ds90ub953: Add error handling for i2c reads/writes + - media: uvcvideo: Implement dual stream quirk to fix loss of usb packets + - media: uvcvideo: Add new quirk definition for the Sonix Technology Co. + 292a camera + - media: uvcvideo: Add Kurokesu C1 PRO camera + - media: vidtv: Fix a null-ptr-deref in vidtv_mux_stop_thread + - PCI/DPC: Quirk PIO log size for Intel Raptor Lake-P + - PCI: switchtec: Add Microchip PCI100X device IDs + - scsi: ufs: bsg: Set bsg_queue to NULL after removal + - rtla/timerlat_hist: Abort event processing on second signal + - rtla/timerlat_top: Abort event processing on second signal + - vfio/pci: Enable iowrite64 and ioread64 for vfio pci + - NFS: Fix potential buffer overflowin nfs_sysfs_link_rpc_client() + - Grab mm lock before grabbing pt lock + - selftests: gpio: gpio-sim: Fix missing chip disablements + - ACPI: x86: Add skip i2c clients quirk for Vexia EDU ATLA 10 tablet 5V + - x86/mm/tlb: Only trim the mm_cpumask once a second + - orangefs: fix a oob in orangefs_debug_write + - ASoC: Intel: bytcr_rt5640: Add DMI quirk for Vexia Edu Atla 10 tablet 5V + - batman-adv: fix panic during interface removal + - batman-adv: Ignore neighbor throughput metrics in error case + - batman-adv: Drop unmanaged ELP metric worker + - drm/amdgpu: avoid buffer overflow attach in smu_sys_set_pp_table() + - KVM: x86: Reject Hyper-V's SEND_IPI hypercalls if local APIC isn't in- + kernel + - KVM: nSVM: Enter guest mode before initializing nested NPT MMU + - perf/x86/intel: Ensure LBRs are disabled when a CPU is starting + - usb: gadget: f_midi: Fixing wMaxPacketSize exceeded issue during MIDI + bind retries + - usb: dwc3: Fix timeout issue during controller enter/exit from halt + state + - usb: roles: set switch registered flag early on + - usb: gadget: udc: renesas_usb3: Fix compiler warning + - usb: dwc2: gadget: remove of_node reference upon udc_stop + - USB: pci-quirks: Fix HCCPARAMS register error for LS7A EHCI + - usb: core: fix pipe creation for get_bMaxPacketSize0 + - USB: quirks: add USB_QUIRK_NO_LPM quirk for Teclast dist + - USB: Add USB_QUIRK_NO_LPM quirk for sony xperia xz1 smartphone + - usb: gadget: f_midi: fix MIDI Streaming descriptor lengths + - USB: hub: Ignore non-compliant devices with too many configs or + interfaces + - USB: cdc-acm: Fill in Renesas R-Car D3 USB Download mode quirk + - usb: cdc-acm: Check control transfer buffer size before access + - usb: cdc-acm: Fix handling of oversized fragments + - USB: serial: option: add MeiG Smart SLM828 + - USB: serial: option: add Telit Cinterion FN990B compositions + - USB: serial: option: fix Telit Cinterion FN990A name + - USB: serial: option: drop MeiG Smart defines + - can: ctucanfd: handle skb allocation failure + - can: c_can: fix unbalanced runtime PM disable in error path + - can: j1939: j1939_sk_send_loop(): fix unable to send messages with data + length zero + - can: etas_es58x: fix potential NULL pointer dereference on udev->serial + - alpha: make stack 16-byte aligned (most cases) + - wifi: ath12k: fix handling of 6 GHz rules + - kbuild: userprogs: fix bitsize and target detection on clang + - efi: Avoid cold plugged memory for placing the kernel + - cgroup: fix race between fork and cgroup.kill + - serial: port: Assign ->iotype correctly when ->iobase is set + - serial: port: Always update ->iotype in __uart_read_properties() + - serial: 8250: Fix fifo underflow on flush + - alpha: align stack for page fault and user unaligned trap handlers + - gpiolib: acpi: Add a quirk for Acer Nitro ANV14 + - gpio: stmpe: Check return value of stmpe_reg_read in + stmpe_gpio_irq_sync_unlock + - partitions: mac: fix handling of bogus partition table + - regulator: qcom_smd: Add l2, l5 sub-node to mp5496 regulator + - regmap-irq: Add missing kfree() + - arm64: Handle .ARM.attributes section in linker scripts + - mmc: mtk-sd: Fix register settings for hs400(es) mode + - igc: Set buffer type for empty frames in igc_init_empty_frame + - mlxsw: Add return value check for mlxsw_sp_port_get_stats_raw() + - btrfs: fix hole expansion when writing at an offset beyond EOF + - clocksource: Use pr_info() for "Checking clocksource synchronization" + message + - clocksource: Use migrate_disable() to avoid calling get_random_u32() in + atomic context + - ipv4: add RCU protection to ip4_dst_hoplimit() + - net: add dev_net_rcu() helper + - ipv4: use RCU protection in ipv4_default_advmss() + - ipv4: use RCU protection in rt_is_expired() + - ipv4: use RCU protection in inet_select_addr() + - net: ipv4: Cache pmtu for all packet paths if multipath enabled + - ipv4: use RCU protection in __ip_rt_update_pmtu() + - ipv4: icmp: convert to dev_net_rcu() + - flow_dissector: use RCU protection to fetch dev_net() + - ipv6: use RCU protection in ip6_default_advmss() + - ipv6: icmp: convert to dev_net_rcu() + - HID: hid-steam: Add Deck IMU support + - HID: hid-steam: Make sure rumble work is canceled on removal + - HID: hid-steam: Move hidraw input (un)registering to work + - ndisc: use RCU protection in ndisc_alloc_skb() + - neighbour: delete redundant judgment statements + - neighbour: use RCU protection in __neigh_notify() + - arp: use RCU protection in arp_xmit() + - openvswitch: use RCU protection in ovs_vport_cmd_fill_info() + - ndisc: extend RCU protection in ndisc_send_skb() + - ipv6: mcast: extend RCU protection in igmp6_send() + - ipv6: mcast: add RCU protection to mld_newpack() + - drm/tidss: Fix issue in irq handling causing irq-flood issue + - drm/tidss: Clear the interrupt status for interrupts being disabled + - drm/rcar-du: dsi: Fix PHY lock bit check + - drm/v3d: Stop active perfmon if it is being destroyed + - netdevsim: print human readable IP address + - selftests: rtnetlink: update netdevsim ipsec output format + - md/md-bitmap: factor behind write counters out from + bitmap_{start/end}write() + - md/md-bitmap: remove the last parameter for bimtap_ops->endwrite() + - md/md-bitmap: move bitmap_{start, end}write to md upper layer + - mm: gup: fix infinite loop within __get_longterm_locked + - alpha: replace hardcoded stack offsets with autogenerated ones + - HID: hid-steam: Don't use cancel_delayed_work_sync in IRQ context + - io_uring/kbuf: reallocate buf lists on upgrade + - x86/i8253: Disable PIT timer 0 when not in use + - pinctrl: cy8c95x0: Rename PWMSEL to SELPWM + - pinctrl: pinconf-generic: print hex value + - pinctrl: pinconf-generic: Print unsigned value if a format is registered + - idpf: fix handling rsc packet with a single segment + - idpf: call set_real_num_queues in idpf_open + - igc: Fix HW RX timestamp when passed by ZC XDP + - LoongArch: KVM: Fix typo issue about GCFG feature detection + - workqueue: Put the pwq after detaching the rescuer from the pool + - perf/x86/intel: Clean up PEBS-via-PT on hybrid + - drm/xe/client: bo->client does not need bos_lock + - io_uring/waitid: don't abuse io_tw_state + - drm: Fix DSC BPP increment decoding + - i3c: mipi-i3c-hci: Add Intel specific quirk to ring resuming + - i3c: mipi-i3c-hci: Add support for MIPI I3C HCI on PCI bus + - [Config] updateconfigs for MIPI_I3C_HCI_PCI + - serial: 8250_pci: Resolve WCH vendor ID ambiguity + - serial: 8250_pci: Share WCH IDs with parport_serial driver + - fs/ntfs3: Unify inode corruption marking with _ntfs_bad_inode() + - kbuild: suppress stdout from merge_config for silent builds + - KVM: x86: Load DR6 with guest value only before entering .vcpu_run() + loop + - perf/x86/intel: Fix ARCH_PERFMON_NUM_COUNTER_LEAF + - USB: gadget: core: create sysfs link between udc and gadget + - usb: gadget: core: flush gadget workqueue after device removal + - include: net: add static inline dst_dev_overhead() to dst.h + - net: ipv6: ioam6_iptunnel: mitigate 2-realloc issue + - net: ipv6: seg6_iptunnel: mitigate 2-realloc issue + - net: ipv6: rpl_iptunnel: mitigate 2-realloc issue + - net: ipv6: fix dst ref loops in rpl, seg6 and ioam6 lwtunnels + - scsi: ufs: core: Introduce ufshcd_has_pending_tasks() + - scsi: ufs: core: Prepare to introduce a new clock_gating lock + - scsi: ufs: core: Introduce a new clock_gating lock + - scsi: ufs: Fix toggling of clk_gating.state when clock gating is not + allowed + - ipv4: use RCU protection in ip_dst_mtu_maybe_forward() + - drm/tidss: Fix race condition while handling interrupt registers + - drm/msm/gem: prevent integer overflow in msm_ioctl_gem_submit() + - wifi: rtw89: pci: disable PCIE wake bit when PCIE deinit + - net: ipv6: fix dst refleaks in rpl, seg6 and ioam6 lwtunnels + - scsi: ufs: core: Ensure clk_gating.lock is used only after + initialization + - serial: 8250_dma: terminate correct DMA in tx_dma_flush() + - x86/mm: Eliminate window where TLB flushes may be inadvertently skipped + - HID: hid-steam: Fix use-after-free when detaching device + - block: change blk_mq_add_to_batch() third argument type to bool + - nvme: move error logging from nvme_end_req() to __nvme_end_req() + - Upstream stable to v6.6.79, v6.12.16 + + * Noble update: upstream stable patchset 2025-06-17 (LP: #2114849) + - ice: Add check for devm_kzalloc() + - io_uring/rw: commit provided buffer state on async + - mptcp: pm: only set fullmesh for subflow endp + - selftests: mptcp: join: fix AF_INET6 variable + - xfs: don't lose solo dquot update transactions + - Upstream stable to v6.6.78, v6.12.15 + + * [Regression Updates] "PCI: Explicitly put devices into D0 when + initializing" breaks pci-pass-through in QEMU/KVM (LP: #2117494) + - PCI/PM: Set up runtime PM even for devices without PCI PM + + * CVE-2025-38083 + - net_sched: prio: fix a race in prio_tune() + + * CVE-2025-37797 + - net_sched: hfsc: Fix a UAF vulnerability in class handling + + -- Stefan Bader Wed, 23 Jul 2025 12:34:12 +0200 + +linux (6.8.0-64.67) noble; urgency=medium + + * noble/linux: 6.8.0-64.67 -proposed tracker (LP: #2114668) + + * Unexpected system reboot at loading GUI session on some AMD platforms + (LP: #2112462) + - drm/amdgpu/hdp4: use memcfg register to post the write for HDP flush + - drm/amdgpu/hdp5: use memcfg register to post the write for HDP flush + - drm/amdgpu/hdp5.2: use memcfg register to post the write for HDP flush + - drm/amdgpu/hdp6: use memcfg register to post the write for HDP flush + + * [UBUNTU 24.04] s390/pci: Fix immediate re-add of PCI function after remove + (LP: #2114174) + - s390/pci: rename lock member in struct zpci_dev + - s390/pci: introduce lock to synchronize state of zpci_dev's + - s390/pci: remove hotplug slot when releasing the device + - s390/pci: Remove redundant bus removal and disable from + zpci_release_device() + - s390/pci: Prevent self deletion in disable_slot() + - s390/pci: Allow re-add of a reserved but not yet removed device + - s390/pci: Serialize device addition and removal + + * [UBUNTU 24.04] s390/pci: Fix immediate re-add of PCI function after remove + (LP: #2114174) // CVE-2025-37946 + - s390/pci: Fix duplicate pci_dev_put() in disable_slot() when PF has + child VFs + + * [UBUNTU 24.04] s390/pci: Fix immediate re-add of PCI function after remove + (LP: #2114174) // CVE-2025-37974 + - s390/pci: Fix missing check for zpci_create_device() error return + + * [UBUNTU 24.04] s390/pci: Fix immediate re-add of PCI function after remove + (LP: #2114174) // CVE-2024-56699 + - s390/pci: Fix potential double remove of hotplug slot + + * System will restart while resuming with SATA HDD or nvme installed with + password set (LP: #2110090) + - PCI: Explicitly put devices into D0 when initializing + + * Noble update: upstream stable patchset 2025-06-12 (LP: #2114239) + - btrfs: fix assertion failure when splitting ordered extent after + transaction abort + - btrfs: fix use-after-free when attempting to join an aborted transaction + - arm64/mm: Ensure adequate HUGE_MAX_HSTATE + - exec: fix up /proc/pid/comm in the execveat(AT_EMPTY_PATH) case + - s390/stackleak: Use exrl instead of ex in __stackleak_poison() + - btrfs: fix data race when accessing the inode's disk_i_size at + btrfs_drop_extents() + - btrfs: convert BUG_ON in btrfs_reloc_cow_block() to proper error + handling + - sched: Don't try to catch up excess steal time. + - locking/ww_mutex/test: Use swap() macro + - lockdep: Fix upper limit for LOCKDEP_*_BITS configs + - x86/amd_nb: Restrict init function to AMD-based systems + - drm/virtio: New fence for every plane update + - drm: Add panel backlight quirks + - drm: panel-backlight-quirks: Add Framework 13 matte panel + - drm: panel-backlight-quirks: Add Framework 13 glossy and 2.8k panels + - nvkm/gsp: correctly advance the read pointer of GSP message queue + - nvkm: correctly calculate the available space of the GSP cmdq buffer + - drm/amd/display: Populate chroma prefetch parameters, DET buffer fix + - drm/amd/display: Overwriting dualDPP UBF values before usage + - printk: Fix signed integer overflow when defining LOG_BUF_LEN_MAX + - drm/connector: add mutex to protect ELD from concurrent access + - drm/bridge: anx7625: use eld_mutex to protect access to connector->eld + - drm/bridge: ite-it66121: use eld_mutex to protect access to + connector->eld + - drm/amd/display: use eld_mutex to protect access to connector->eld + - drm/exynos: hdmi: use eld_mutex to protect access to connector->eld + - drm/radeon: use eld_mutex to protect access to connector->eld + - drm/sti: hdmi: use eld_mutex to protect access to connector->eld + - drm/vc4: hdmi: use eld_mutex to protect access to connector->eld + - drm/amd/display: Fix Mode Cutoff in DSC Passthrough to DP2.1 Monitor + - drm/amdgpu: Don't enable sdma 4.4.5 CTXEMPTY interrupt + - drm/amdkfd: Queue interrupt work to different CPU + - drm/bridge: it6505: Change definition MAX_HDCP_DOWN_STREAM_COUNT + - drm/bridge: it6505: fix HDCP Bstatus check + - drm/bridge: it6505: fix HDCP encryption when R0 ready + - drm/bridge: it6505: fix HDCP CTS compare V matching + - drm/bridge: it6505: fix HDCP V match check is not performed correctly + - drm/bridge: it6505: fix HDCP CTS KSV list wait timer + - safesetid: check size of policy writes + - drm/amd/display: Increase sanitizer frame larger than limit when compile + testing with clang + - drm/amd/display: Limit Scaling Ratio on DCN3.01 + - wifi: rtw89: add crystal_cap check to avoid setting as overflow value + - tun: fix group permission check + - mmc: core: Respect quirk_max_rate for non-UHS SDIO card + - mmc: sdhci-esdhc-imx: enable 'SDHCI_QUIRK_NO_LED' quirk for S32G + - wifi: brcmsmac: add gain range check to wlc_phy_iqcal_gainparams_nphy() + - tomoyo: don't emit warning in tomoyo_write_control() + - mfd: lpc_ich: Add another Gemini Lake ISA bridge PCI device-id + - wifi: rtw88: add __packed attribute to efuse layout struct + - clk: qcom: Make GCC_8150 depend on QCOM_GDSC + - HID: multitouch: Add quirk for Hantick 5288 touchpad + - HID: Wacom: Add PCI Wacom device support + - net/mlx5: use do_aux_work for PHC overflow checks + - wifi: brcmfmac: Check the return value of + of_property_read_string_index() + - wifi: iwlwifi: pcie: Add support for new device ids + - wifi: iwlwifi: avoid memory leak + - i2c: Force ELAN06FA touchpad I2C bus freq to 100KHz + - APEI: GHES: Have GHES honor the panic= setting + - Bluetooth: btusb: Add new VID/PID 13d3/3610 for MT7922 + - Bluetooth: btusb: Add new VID/PID 13d3/3628 for MT7925 + - Bluetooth: MGMT: Fix slab-use-after-free Read in + mgmt_remove_adv_monitor_sync + - net: wwan: iosm: Fix hibernation by re-binding the driver around it + - mmc: sdhci-msm: Correctly set the load for the regulator + - octeon_ep: update tx/rx stats locally for persistence + - tipc: re-order conditions in tipc_crypto_key_rcv() + - selftests/net/ipsec: Fix Null pointer dereference in rtattr_pack() + - x86/kexec: Allocate PGD for x86_64 transition page tables separately + - iommu/arm-smmu-qcom: add sdm670 adreno iommu compatible + - iommu/arm-smmu-v3: Clean up more on probe failure + - platform/x86: int3472: Check for adev == NULL + - platform/x86: acer-wmi: Add support for Acer PH14-51 + - ASoC: soc-pcm: don't use soc_pcm_ret() on .prepare callback + - platform/x86: acer-wmi: Add support for Acer Predator PH16-72 + - ASoC: amd: Add ACPI dependency to fix build error + - Input: allocate keycode for phone linking + - platform/x86: acer-wmi: add support for Acer Nitro AN515-58 + - platform/x86: acer-wmi: Ignore AC events + - xfs: report realtime block quota limits on realtime directories + - xfs: don't over-report free space or inodes in statvfs + - tty: xilinx_uartps: split sysrq handling + - tty: vt: pass proper pointers from tioclinux() + - tty: Permit some TIOCL_SETSEL modes without CAP_SYS_ADMIN + - tty: Require CAP_SYS_ADMIN for all usages of TIOCL_SELMOUSEREPORT + - platform/x86: serdev_helpers: Check for serial_ctrl_uid == NULL + - nvme: handle connectivity loss in nvme_set_queue_count + - firmware: iscsi_ibft: fix ISCSI_IBFT Kconfig entry + - gpu: drm_dp_cec: fix broken CEC adapter properties check + - ice: put Rx buffers after being done with current frame + - ice: gather page_count()'s of each frag right before XDP prog call + - ice: stop storing XDP verdict within ice_rx_buf + - nvme-fc: use ctrl state getter + - net: bcmgenet: Correct overlaying of PHY and MAC Wake-on-LAN + - vmxnet3: Fix tx queue race condition with XDP + - tg3: Disable tg3 PCIe AER on system reboot + - udp: gso: do not drop small packets when PMTU reduces + - rxrpc: Fix the rxrpc_connection attend queue handling + - gpio: pca953x: Improve interrupt support + - net: atlantic: fix warning during hot unplug + - net: rose: lock the socket in rose_bind() + - ACPI: property: Fix return value for nval == 0 in acpi_data_prop_read() + - tun: revert fix group permission check + - net: sched: Fix truncation of offloaded action statistics + - rxrpc: Fix call state set to not include the SERVER_SECURING state + - cpufreq: s3c64xx: Fix compilation warning + - leds: lp8860: Write full EEPROM, not only half of it + - ALSA: hda/realtek: Enable Mute LED on HP Laptop 14s-fq1xxx + - drm/modeset: Handle tiled displays in pan_display_atomic. + - drm/client: Handle tiled displays better + - smb: client: fix order of arguments of tracepoints + - smb: client: change lease epoch type from unsigned int to __u16 + - s390/futex: Fix FUTEX_OP_ANDN implementation + - arm64: Filter out SVE hwcaps when FEAT_SVE isn't implemented + - m68k: vga: Fix I/O defines + - fs/proc: do_task_stat: Fix ESP not readable during coredump + - binfmt_flat: Fix integer overflow bug on 32 bit systems + - accel/ivpu: Fix Qemu crash when running in passthrough + - arm64/kvm: Configure HYP TCR.PS/DS based on host stage1 + - arm64/sme: Move storage of reg_smidr to __cpuinfo_store_cpu() + - KVM: arm64: timer: Always evaluate the need for a soft timer + - drm/rockchip: cdn-dp: Use drm_connector_helper_hpd_irq_event() + - arm64: dts: rockchip: increase gmac rx_delay on rk3399-puma + - remoteproc: omap: Handle ARM dma_iommu_mapping + - KVM: Explicitly verify target vCPU is online in kvm_get_vcpu() + - KVM: s390: vsie: fix some corner-cases when grabbing vsie pages + - ksmbd: fix integer overflows on 32 bit systems + - drm/amd/display: Optimize cursor position updates + - drm/amd/pm: Mark MM activity as unsupported + - drm/amdkfd: only flush the validate MES contex + - drm/i915/guc: Debug print LRC state entries only if the context is + pinned + - drm/i915: Fix page cleanup on DMA remap failure + - drm/komeda: Add check for komeda_get_layer_fourcc_list() + - drm/i915/dp: Iterate DSC BPP from high to low on all platforms + - drm/i915: Drop 64bpp YUV formats from ICL+ SDR planes + - drm/amd/display: Fix seamless boot sequence + - Bluetooth: L2CAP: accept zero as a special value for MTU auto-selection + - clk: sunxi-ng: a100: enable MMC clock reparenting + - clk: mmp2: call pm_genpd_init() only after genpd.name is set + - media: i2c: ds90ub960: Fix UB9702 refclk register access + - clk: qcom: clk-alpha-pll: fix alpha mode configuration + - clk: qcom: gcc-sm8550: Do not turn off PCIe GDSCs during gdsc_disable() + - clk: qcom: gcc-sm8650: Do not turn off PCIe GDSCs during gdsc_disable() + - clk: qcom: gcc-sm6350: Add missing parent_map for two clocks + - clk: qcom: dispcc-sm6350: Add missing parent_map for a clock + - clk: qcom: gcc-mdm9607: Fix cmd_rcgr offset for blsp1_uart6 rcg + - clk: qcom: clk-rpmh: prevent integer overflow in recalc_rate + - clk: mediatek: mt2701-vdec: fix conversion to mtk_clk_simple_probe + - clk: mediatek: mt2701-aud: fix conversion to mtk_clk_simple_probe + - clk: mediatek: mt2701-bdp: add missing dummy clk + - clk: mediatek: mt2701-img: add missing dummy clk + - clk: mediatek: mt2701-mm: add missing dummy clk + - blk-cgroup: Fix class @block_class's subsystem refcount leakage + - efi: libstub: Use '-std=gnu11' to fix build with GCC 15 + - perf bench: Fix undefined behavior in cmpworker() + - scsi: ufs: core: Fix the HIGH/LOW_TEMP Bit Definitions + - of: Correct child specifier used as input of the 2nd nexus node + - of: Fix of_find_node_opts_by_path() handling of alias+path+options + - Input: bbnsm_pwrkey - add remove hook + - HID: hid-sensor-hub: don't use stale platform-data on remove + - ring-buffer: Do not allow events in NMI with generic atomic64 cmpxchg() + - atomic64: Use arch_spin_locks instead of raw_spin_locks + - wifi: rtlwifi: rtl8821ae: Fix media status report + - wifi: brcmfmac: fix NULL pointer dereference in brcmf_txfinalize() + - wifi: mt76: mt7921u: Add VID/PID for TP-Link TXE50UH + - wifi: rtw88: sdio: Fix disconnection after beacon loss + - wifi: mt76: mt7915: add module param to select 5 GHz or 6 GHz on MT7916 + - usb: gadget: f_tcm: Translate error to sense + - usb: gadget: f_tcm: Decrement command ref count on cleanup + - usb: gadget: f_tcm: ep_autoconfig with fullspeed endpoint + - usb: gadget: f_tcm: Don't prepare BOT write request twice + - usbnet: ipheth: fix possible overflow in DPE length check + - usbnet: ipheth: use static NDP16 location in URB + - usbnet: ipheth: check that DPE points past NCM header + - usbnet: ipheth: refactor NCM datagram loop + - usbnet: ipheth: break up NCM header size computation + - usbnet: ipheth: fix DPE OoB read + - usbnet: ipheth: document scope of NCM implementation + - ASoC: acp: Support microphone from Lenovo Go S + - soc: qcom: socinfo: Avoid out of bounds read of serial number + - serial: sh-sci: Drop __initdata macro for port_cfg + - serial: sh-sci: Do not probe the serial port if its slot in sci_ports[] + is in use + - MIPS: Loongson64: remove ROM Size unit in boardinfo + - LoongArch: Extend the maximum number of watchpoints + - powerpc/pseries/eeh: Fix get PE state translation + - dm-crypt: don't update io->sector after kcryptd_crypt_write_io_submit() + - dm-crypt: track tag_offset in convert_context + - mips/math-emu: fix emulation of the prefx instruction + - MIPS: pci-legacy: Override pci_address_to_pio + - block: don't revert iter for -EIOCBQUEUED + - firmware: qcom: scm: Fix missing read barrier in qcom_scm_is_available() + - ALSA: hda/realtek: Enable headset mic on Positivo C6400 + - ALSA: hda: Fix headset detection failure due to unstable sort + - ALSA: hda/realtek: Fix built-in mic on another ASUS VivoBook model + - ALSA: hda/realtek: Fix built-in mic breakage on ASUS VivoBook X515JA + - arm64: tegra: Fix Tegra234 PCIe interrupt-map + - PCI: endpoint: Finish virtual EP removal in pci_epf_remove_vepf() + - PCI: dwc: ep: Write BAR_MASK before iATU registers in pci_epc_set_bar() + - PCI: dwc: ep: Prevent changing BAR size/flags in pci_epc_set_bar() + - scsi: st: Don't set pos_unknown just after device recognition + - scsi: qla2xxx: Move FCE Trace buffer allocation to user control + - scsi: ufs: qcom: Fix crypto key eviction + - scsi: ufs: core: Fix use-after free in init error and remove paths + - scsi: storvsc: Set correct data length for sending SCSI command without + payload + - scsi: core: Do not retry I/Os during depopulation + - kbuild: Move -Wenum-enum-conversion to W=2 + - rust: init: use explicit ABI to clean warning in future compilers + - x86/boot: Use '-std=gnu11' to fix build with GCC 15 + - ubi: Add a check for ubi_num + - ARM: dts: dra7: Add bus_dma_limit for l4 cfg bus + - ARM: dts: ti/omap: gta04: fix pm issues caused by spi module + - arm64: dts: qcom: sm6115: Fix MPSS memory length + - arm64: dts: qcom: sm6115: Fix CDSP memory length + - arm64: dts: qcom: sm6115: Fix ADSP memory base and length + - arm64: dts: qcom: sm6350: Fix ADSP memory length + - arm64: dts: qcom: sm6350: Fix MPSS memory length + - arm64: dts: qcom: sm6350: Fix uart1 interconnect path + - arm64: dts: qcom: sm6375: Fix ADSP memory length + - arm64: dts: qcom: sm6375: Fix CDSP memory base and length + - arm64: dts: qcom: sm6375: Fix MPSS memory base and length + - arm64: dts: qcom: sm8350: Fix ADSP memory base and length + - arm64: dts: qcom: sm8350: Fix CDSP memory base and length + - arm64: dts: qcom: sm8350: Fix MPSS memory length + - arm64: dts: qcom: sm8450: Fix CDSP memory length + - arm64: dts: qcom: sm8450: Fix MPSS memory length + - arm64: dts: qcom: sm8550: Fix CDSP memory length + - arm64: dts: qcom: sm8550: Fix MPSS memory length + - arm64: dts: qcom: sm8450: add missing qcom,non-secure-domain property + - arm64: dts: qcom: sm8450: Fix ADSP memory base and length + - arm64: dts: qcom: sm8550: add missing qcom,non-secure-domain property + - arm64: dts: qcom: sm8550: Add dma-coherent property + - arm64: dts: qcom: sm8550: Fix ADSP memory base and length + - arm64: dts: qcom: sm8650: Fix CDSP memory length + - arm64: dts: qcom: sm8650: Fix MPSS memory length + - arm64: dts: qcom: sm8550: correct MDSS interconnects + - arm64: dts: qcom: sm8650: correct MDSS interconnects + - crypto: qce - fix priority to be less than ARMv8 CE + - arm64: tegra: Fix typo in Tegra234 dce-fabric compatible + - arm64: tegra: Disable Tegra234 sce-fabric node + - parisc: Temporarily disable jump label support + - pwm: microchip-core: fix incorrect comparison with max period + - xfs: Propagate errors from xfs_reflink_cancel_cow_range in + xfs_dax_write_iomap_end + - xfs: Add error handling for xfs_reflink_cancel_cow_range + - ACPI: PRM: Remove unnecessary strict handler address checks + - tpm: Change to kvalloc() in eventlog/acpi.c + - rv: Reset per-task monitors also for idle tasks + - hrtimers: Force migrate away hrtimers queued after + CPUHP_AP_HRTIMERS_DYING + - kfence: skip __GFP_THISNODE allocations on NUMA systems + - media: ccs: Clean up parsed CCS static data on parse failure + - mm/hugetlb: fix avoid_reserve to allow taking folio from subpool + - iio: light: as73211: fix channel handling in only-color triggered buffer + - soc: mediatek: mtk-devapc: Fix leaking IO map on error paths + - soc: mediatek: mtk-devapc: Fix leaking IO map on driver remove + - soc: qcom: smem_state: fix missing of_node_put in error path + - media: mmp: Bring back registration of the device + - media: mc: fix endpoint iteration + - media: nuvoton: Fix an error check in npcm_video_ece_init() + - media: imx296: Add standby delay during probe + - media: ov5640: fix get_light_freq on auto + - media: stm32: dcmipp: correct dma_set_mask_and_coherent mask value + - media: ccs: Fix CCS static data parsing for large block sizes + - media: ccs: Fix cleanup order in ccs_probe() + - media: i2c: ds90ub9x3: Fix extra fwnode_handle_put() + - media: i2c: ds90ub960: Fix use of non-existing registers on UB9702 + - media: i2c: ds90ub960: Fix UB9702 VC map + - media: i2c: ds90ub960: Fix logging SP & EQ status only for UB9702 + - media: uvcvideo: Fix crash during unbind if gpio unit is in use + - media: uvcvideo: Fix event flags in uvc_ctrl_send_events + - media: uvcvideo: Support partial control reads + - media: uvcvideo: Remove redundant NULL assignment + - media: uvcvideo: Refactor iterators + - media: uvcvideo: Only save async fh if success + - media: uvcvideo: Remove dangling pointers + - mm: kmemleak: fix upper boundary check for physical address objects + - mm/compaction: fix UBSAN shift-out-of-bounds warning + - ata: libata-sff: Ensure that we cannot write outside the allocated + buffer + - crypto: qce - fix goto jump in error path + - crypto: qce - unregister previously registered algos in error path + - nvmem: qcom-spmi-sdam: Set size in struct nvmem_config + - nvmem: core: improve range check for nvmem_cell_write() + - nvmem: imx-ocotp-ele: simplify read beyond device check + - nvmem: imx-ocotp-ele: fix MAC address byte order + - nvmem: imx-ocotp-ele: fix reading from non zero offset + - nvmem: imx-ocotp-ele: set word length to 1 + - io_uring: fix multishots with selected buffers + - io_uring/net: don't retry connect operation on EPOLLERR + - selftests: mptcp: connect: -f: no reconnect + - pnfs/flexfiles: retry getting layout segment for reads + - ocfs2: fix incorrect CPU endianness conversion causing mount failure + - ocfs2: handle a symlink read error correctly + - nilfs2: fix possible int overflows in nilfs_fiemap() + - nfs: Make NFS_FSCACHE select NETFS_SUPPORT instead of depending on it + - NFSD: Encode COMPOUND operation status on page boundaries + - mailbox: tegra-hsp: Clear mailbox before using message + - NFC: nci: Add bounds checking in nci_hci_create_pipe() + - irqchip/apple-aic: Only handle PMC interrupt as FIQ when configured so + - mtd: onenand: Fix uninitialized retlen in do_otp_read() + - misc: misc_minor_alloc to use ida for all dynamic/misc dynamic minors + - char: misc: deallocate static minor in error path + - misc: fastrpc: Deregister device nodes properly in error scenarios + - misc: fastrpc: Fix registered buffer page address + - misc: fastrpc: Fix copy buffer page size + - net/ncsi: wait for the last response to Deselect Package before + configuring channel + - net: phy: c45-tjaxx: add delay between MDIO write and read in soft_reset + - maple_tree: simplify split calculation + - scripts/gdb: fix aarch64 userspace detection in get_current_task + - tracing/osnoise: Fix resetting of tracepoints + - rtla/osnoise: Distinguish missing workload option + - rtla: Add trace_instance_stop + - rtla/timerlat_hist: Stop timerlat tracer on signal + - rtla/timerlat_top: Stop timerlat tracer on signal + - pinctrl: samsung: fix fwnode refcount cleanup if + platform_get_irq_optional() fails + - ptp: Ensure info->enable callback is always set + - RDMA/mlx5: Fix a race for an ODP MR which leads to CQE with error + - rtc: zynqmp: Fix optional clock name property + - MIPS: ftrace: Declare ftrace_get_parent_ra_addr() as static + - xfs: avoid nested calls to __xfs_trans_commit + - xfs: don't lose solo superblock counter update transactions + - spi: atmel-quadspi: Create `atmel_qspi_ops` to support newer SoC + families + - spi: atmel-qspi: Memory barriers after memory-mapped I/O + - btrfs: avoid monopolizing a core when activating a swap file + - mptcp: prevent excessive coalescing on receive + - Revert "drm/amd/display: Fix green screen issue after suspend" + - statmount: let unset strings be empty + - arm64: dts: rockchip: add reset-names for combphy on rk3568 + - ocfs2: check dir i_size in ocfs2_find_entry + - Upstream stable to v6.6.77, v6.12.14 + + * kvmppc_set_passthru_irq_hv: Could not assign IRQ map traces are seen when + pci device is attached to kvm guest when "xive=off" is set (LP: #2109951) + - KVM: PPC: Book3S HV: Fix IRQ map warnings with XICS on pSeries KVM Guest + + * Latitude 5450 is experiencing packet loss on Ethernet in Ubuntu 22.04 + (LP: #2106558) + - e1000e: change k1 configuration on MTP and later platforms + + * cpufreq amd-pstate: cpuinfo_max_freq reports incorrect value + (LP: #2109609) + - SAUCE: Revert "Revert "cpufreq: amd-pstate: Fix the inconsistency in max + frequency units"" + + * Backport pci=config_acs parameter with fix commit (LP: #2100340) + - PCI: Extend ACS configurability + - PCI: Fix pci_enable_acs() support for the ACS quirks + - PCI/ACS: Fix 'pci=config_acs=' parameter + + * [UBUNTU 24.04] s390/pci: Fix zpci_bus_is_isolated_vf() for non-VF + (LP: #2111599) + - s390/pci: Fix zpci_bus_is_isolated_vf() for non-VFs + + * nvme/tcp hangs IO on arm (LP: #2106381) + - nvmet-tcp: Fix a possible sporadic response drops in weakly ordered arch + + * CVE-2025-37750 + - smb: client: fix UAF in decryption with multichannel + + * CVE-2025-40364 + - io_uring: fix io_req_prep_async with provided buffers + + * CVE-2024-49887 + - f2fs: fix to handle segment allocation failure correctly + - f2fs: fix to don't panic system for no free segment fault injection + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) + - powerpc/book3s64/hugetlb: Fix disabling hugetlb when fadump is active + - dlm: fix srcu_read_lock() return type to int + - afs: Fix EEXIST error returned from afs_rmdir() to be ENOTEMPTY + - afs: Fix directory format encoding struct + - afs: Fix cleanup of immediately failed async calls + - fs: fix proc_handler for sysctl_nr_open + - block: retry call probe after request_module in blk_request_module + - pstore/blk: trivial typo fixes + - nvme: Add error check for xa_store in nvme_get_effects_log + - selftests/powerpc: Fix argument order to timer_sub() + - nvme: Add error path for xa_store in nvme_init_effects + - partitions: ldm: remove the initial kernel-doc notation + - select: Fix unbalanced user_access_end() + - nvme: fix bogus kzalloc() return check in nvme_init_effects_log() + - afs: Fix the fallback handling for the YFS.RemoveFile2 RPC call + - perf/core: Save raw sample data conditionally based on sample type + - sched/fair: Fix value reported by hot tasks pulled in /proc/schedstat + - x86/cpu: Enable SD_ASYM_PACKING for PKG domain on AMD + - x86/topology: Use x86_sched_itmt_flags for PKG domain unconditionally + - drm/msm/dp: set safe_to_exit_level before printing it + - drm/etnaviv: Fix page property being used for non writecombine buffers + - drm/amd/pm: Fix an error handling path in + vega10_enable_se_edc_force_stall_config() + - drm/rockchip: vop2: Fix cluster windows alpha ctrl regsiters offset + - drm/rockchip: vop2: Fix the mixer alpha setup for layer 0 + - drm/rockchip: vop2: Fix the windows switch between different layers + - drm/rockchip: vop2: Check linear format for Cluster windows on rk3566/8 + - drm/rockchip: vop2: include rockchip_drm_drv.h + - drm/msm/dpu: link DSPP_2/_3 blocks on SM8150 + - drm/msm/dpu: link DSPP_2/_3 blocks on SC8180X + - drm/msm/dpu: link DSPP_2/_3 blocks on SM8250 + - drm/msm/dpu: link DSPP_2/_3 blocks on SM8350 + - drm/msm/dpu: link DSPP_2/_3 blocks on SM8550 + - drm/msm: Check return value of of_dma_configure() + - drm/bridge: it6505: Change definition of AUX_FIFO_MAX_SIZE + - drm/amdgpu: tear down ttm range manager for doorbell in + amdgpu_ttm_fini() + - genirq: Make handle_enforce_irqctx() unconditionally available + - wifi: ath11k: Fix unexpected return buffer manager error for + WCN6750/WCN6855 + - wifi: rtlwifi: do not complete firmware loading needlessly + - wifi: rtlwifi: rtl8192se: rise completion of firmware loading as last + step + - wifi: rtlwifi: wait for firmware loading before releasing memory + - wifi: rtlwifi: fix init_sw_vars leak when probe fails + - wifi: rtlwifi: usb: fix workqueue leak when probe fails + - net_sched: sch_sfq: annotate data-races around q->perturb_period + - net_sched: sch_sfq: handle bigger packets + - spi: zynq-qspi: Add check for clk_enable() + - dt-bindings: mmc: controller: clarify the address-cells description + - of: remove internal arguments from of_property_for_each_u32() + - clk: fix an OF node reference leak in of_clk_get_parent_name() + - dt-bindings: leds: class-multicolor: Fix path to color definitions + - wifi: rtlwifi: destroy workqueue at rtl_deinit_core + - wifi: rtlwifi: pci: wait for firmware loading before releasing memory + - HID: multitouch: fix support for Goodix PID 0x01e9 + - regulator: dt-bindings: mt6315: Drop regulator-compatible property + - wifi: brcmfmac: add missing header include for brcmf_dbg + - ACPI: fan: cleanup resources in the error path of .probe() + - cpupower: fix TSC MHz calculation + - dt-bindings: mfd: bd71815: Fix rsense and typos + - leds: netxbig: Fix an OF node reference leak in + netxbig_leds_get_of_pdata() + - inetpeer: remove create argument of inet_getpeer_v[46]() + - inetpeer: remove create argument of inet_getpeer() + - inetpeer: update inetpeer timestamp in inet_getpeer() + - inetpeer: do not get a refcount in inet_getpeer() + - pwm: stm32-lp: Add check for clk_enable() + - cpufreq: schedutil: Fix superfluous updates caused by need_freq_update + - gpio: pca953x: log an error when failing to get the reset GPIO + - cpufreq: qcom: Fix qcom_cpufreq_hw_recalc_rate() to query LUT if LMh IRQ + is not available + - cpufreq: qcom: Implement clk_ops::determine_rate() for qcom_cpufreq* + clocks + - clk: imx8mp: Fix clkout1/2 support + - dt-bindings: clock: sunxi: Export PLL_VIDEO_2X and PLL_MIPI + - clk: sunxi-ng: a64: drop redundant CLK_PLL_VIDEO0_2X and CLK_PLL_MIPI + - clk: sunxi-ng: a64: stop force-selecting PLL-MIPI as TCON0 parent + - regulator: of: Implement the unwind path of of_regulator_match() + - OPP: OF: Fix an OF node leak in _opp_add_static_v2() + - ipmi: ssif_bmc: Fix new request loss when bmc ready for a response + - wifi: ath12k: fix tx power, max reg power update to firmware + - clk: qcom: gcc-sdm845: Do not use shared clk_ops for QUPs + - HID: fix generic desktop D-Pad controls + - leds: cht-wcove: Use devm_led_classdev_register() to avoid memory leak + - mfd: syscon: Remove extern from function prototypes + - mfd: syscon: Add of_syscon_register_regmap() API + - mfd: syscon: Use scoped variables with memory allocators to simplify + error paths + - mfd: syscon: Fix race in device_node_get_regmap() + - samples/landlock: Fix possible NULL dereference in parse_path() + - wifi: wlcore: fix unbalanced pm_runtime calls + - wifi: mt76: mt7915: Fix mesh scan on MT7916 DBDC + - wifi: mac80211: fix tid removal during mesh forwarding + - wifi: mac80211: Fix common size calculation for ML element + - net/smc: fix data error when recvmsg with MSG_PEEK flag + - wifi: mt76: mt76u_vendor_request: Do not print error messages when + -EPROTO + - wifi: mt76: mt7921: fix using incorrect group cipher after + disconnection. + - wifi: mt76: mt7915: fix overflows seen when writing limit attributes + - wifi: mt76: mt7996: fix rx filter setting for bfee functionality + - wifi: mt76: mt7915: firmware restart on devices with a second pcie link + - wifi: mt76: connac: move mt7615_mcu_del_wtbl_all to connac + - wifi: mt76: mt7915: improve hardware restart reliability + - wifi: mt76: mt7915: fix omac index assignment after hardware reset + - wifi: mt76: mt7915: fix register mapping + - wifi: mt76: mt7996: fix register mapping + - wifi: mt76: mt7996: add max mpdu len capability + - wifi: mt76: mt7996: fix the capability of reception of EHT MU PPDU + - wifi: mt76: mt7996: fix HE Phy capability + - wifi: mt76: mt7996: fix incorrect indexing of MIB FW event + - wifi: mt76: mt7996: fix ldpc setting + - cpufreq: ACPI: Fix max-frequency computation + - selftests: timers: clocksource-switch: Adapt progress to kselftest + framework + - selftests: harness: fix printing of mismatch values in __EXPECT() + - wifi: cfg80211: adjust allocation of colocated AP data + - inet: ipmr: fix data-races + - clk: analogbits: Fix incorrect calculation of vco rate delta + - pwm: stm32: Add check for clk_enable() + - selftests/landlock: Fix error message + - net/mlxfw: Drop hard coded max FW flash image size + - octeon_ep: remove firmware stats fetch in ndo_get_stats64 + - netfilter: nf_tables: fix set size with rbtree backend + - netfilter: nft_flow_offload: update tcp state flags under lock + - tcp_cubic: fix incorrect HyStart round start detection + - libbpf: don't adjust USDT semaphore address if .stapsdt.base addr is + missing + - tools/testing/selftests/bpf/test_tc_tunnel.sh: Fix wait for server bind + - libbpf: Fix segfault due to libelf functions not setting errno + - ASoC: sun4i-spdif: Add clock multiplier settings + - selftests/bpf: Fix fill_link_info selftest on powerpc + - crypto: caam - use JobR's space to access page 0 regs + - perf header: Fix one memory leakage in process_bpf_btf() + - perf header: Fix one memory leakage in process_bpf_prog_info() + - perf bpf: Fix two memory leakages when calling + perf_env__insert_bpf_prog_info() + - ASoC: renesas: rz-ssi: Use only the proper amount of dividers + - perf expr: Initialize is_test value in expr__ctx_new() + - ktest.pl: Remove unused declarations in run_bisect_test function + - crypto: hisilicon/sec2 - fix for aead icv error + - crypto: hisilicon/sec2 - fix for aead invalid authsize + - crypto: ixp4xx - fix OF node reference leaks in init_ixp_crypto() + - ALSA: seq: remove redundant 'tristate' for SND_SEQ_UMP_CLIENT + - ALSA: seq: Make dependency on UMP clearer + - padata: fix sysfs store callback check + - perf top: Don't complain about lack of vmlinux when not resolving some + kernel samples + - perf machine: Don't ignore _etext when not a text symbol + - perf namespaces: Introduce nsinfo__set_in_pidns() + - perf namespaces: Fixup the nsinfo__in_pidns() return type, its bool + - ASoC: Intel: avs: Prefix SKL/APL-specific members + - ASoC: Intel: avs: Abstract IPC handling + - ASoC: Intel: avs: Do not readq() u32 registers + - ASoC: Intel: avs: Fix theoretical infinite loop + - perf report: Fix misleading help message about --demangle + - pinctrl: stm32: Add check for clk_enable() + - pinctrl: amd: Take suspend type into consideration which pins are non- + wake + - bpf: tcp: Mark bpf_load_hdr_opt() arg2 as read-write + - ALSA: hda/realtek - Fixed headphone distorted sound on Acer Aspire + A115-31 laptop + - perf lock: Fix parse_lock_type which only retrieve one lock flag + - padata: add pd get/put refcnt helper + - cifs: Use cifs_autodisable_serverino() for disabling + CIFS_MOUNT_SERVER_INUM in readdir.c + - soc: atmel: fix device_node release in atmel_soc_device_init() + - ARM: at91: pm: change BU Power Switch to automatic mode + - arm64: dts: mediatek: mt8186: Move wakeup to MTU3 to get working suspend + - arm64: dts: mt8183: set DMIC one-wire mode on Damu + - arm64: dts: mediatek: mt8516: fix GICv2 range + - arm64: dts: mediatek: mt8516: fix wdt irq type + - arm64: dts: mediatek: mt8516: add i2c clock-div property + - arm64: dts: mediatek: mt8516: reserve 192 KiB for TF-A + - ARM: dts: stm32: Fix IPCC EXTI declaration on stm32mp151 + - RDMA/mlx4: Avoid false error about access to uninitialized gids array + - arm64: dts: mediatek: mt8173-evb: Drop regulator-compatible property + - arm64: dts: mediatek: mt8173-elm: Drop regulator-compatible property + - arm64: dts: mediatek: mt8192-asurada: Drop regulator-compatible property + - arm64: dts: mediatek: mt8195-cherry: Drop regulator-compatible property + - arm64: dts: mediatek: mt8195-demo: Drop regulator-compatible property + - arm64: dts: mediatek: mt8173-elm: Fix MT6397 PMIC sub-node names + - arm64: dts: mediatek: mt8173-evb: Fix MT6397 PMIC sub-node names + - ARM: dts: aspeed: yosemite4: correct the compatible string of adm1272 + - ARM: dts: aspeed: yosemite4: Add required properties for IOE on fan + boards + - ARM: dts: aspeed: yosemite4: correct the compatible string for max31790 + - arm: dts: socfpga: use reset-name "stmmaceth-ocp" instead of "ahb" + - RDMA/rxe: Improve newline in printing messages + - RDMA/rxe: Fix mismatched max_msg_sz + - arm64: dts: mediatek: mt8183: kenzo: Support second source touchscreen + - arm64: dts: mediatek: mt8183: willow: Support second source touchscreen + - RDMA/srp: Fix error handling in srp_add_port + - arm64: dts: mediatek: mt8195: Remove suspend-breaking reset from pcie1 + - ARM: dts: stm32: Deduplicate serial aliases and chosen node for + STM32MP15xx DHCOM SoM + - ARM: dts: stm32: Swap USART3 and UART8 alias on STM32MP15xx DHCOM SoM + - arm64: dts: mediatek: mt8183-kukui-jacuzzi: Drop pp3300_panel voltage + settings + - arm64: dts: qcom: msm8996-xiaomi-gemini: Fix LP5562 LED1 reg property + - arm64: dts: qcom: move common parts for sa8775p-ride variants into a + .dtsi + - arm64: dts: qcom: sa8775p: Update sleep_clk frequency + - arm64: dts: qcom: msm8996: Fix up USB3 interrupts + - arm64: dts: qcom: msm8994: Describe USB interrupts + - arm64: dts: qcom: sm7225-fairphone-fp4: Drop extra qcom,msm-id value + - arm64: dts: qcom: msm8916: correct sleep clock frequency + - arm64: dts: qcom: msm8939: correct sleep clock frequency + - arm64: dts: qcom: msm8994: correct sleep clock frequency + - arm64: dts: qcom: qcs404: correct sleep clock frequency + - arm64: dts: qcom: q[dr]u1000: correct sleep clock frequency + - arm64: dts: qcom: qrb4210-rb2: correct sleep clock frequency + - arm64: dts: qcom: sc7280: correct sleep clock frequency + - arm64: dts: qcom: sdx75: correct sleep clock frequency + - arm64: dts: qcom: sm4450: correct sleep clock frequency + - arm64: dts: qcom: sm6125: correct sleep clock frequency + - arm64: dts: qcom: sm6375: correct sleep clock frequency + - arm64: dts: qcom: sm8250: correct sleep clock frequency + - arm64: dts: qcom: sm8350: correct sleep clock frequency + - arm64: dts: qcom: sm8450: correct sleep clock frequency + - ARM: dts: microchip: sama5d27_wlsom1_ek: Add no-1-8-v property to sdmmc0 + node + - arm64: dts: ti: k3-am62: Remove duplicate GICR reg + - arm64: dts: ti: k3-am62a: Remove duplicate GICR reg + - arm64: dts: allwinner: a64: explicitly assign clock parent for TCON0 + - RDMA/bnxt_re: Fix to drop reference to the mmap entry in case of error + - ARM: omap1: Fix up the Retu IRQ on Nokia 770 + - arm64: dts: qcom: sdm845-db845c-navigation-mezzanine: Convert mezzanine + riser to dtso + - arm64: dts: qcom: sdm845-db845c-navigation-mezzanine: remove disabled + ov7251 camera + - arm64: dts: qcom: sc7180-trogdor-quackingstick: add missing avee-supply + - arm64: dts: qcom: sc7180-*: Remove thermal zone polling delays + - arm64: dts: qcom: sc7180-trogdor-pompom: rename 5v-choke thermal zone + - arm64: dts: qcom: sc7180: change labels to lower-case + - arm64: dts: qcom: sc7180: fix psci power domain node names + - arm64: dts: qcom: sm8150-microsoft-surface-duo: fix typos in da7280 + properties + - arm64: dts: qcom: sc8280xp: Fix up remoteproc register space sizes + - dts: arm64: mediatek: mt8195: Remove MT8183 compatible for OVL + - arm64: dts: mediatek: add per-SoC compatibles for keypad nodes + - arm64: dts: qcom: sdm845: Fix interrupt types of camss interrupts + - arm64: dts: qcom: sm8250: Fix interrupt types of camss interrupts + - ARM: dts: mediatek: mt7623: fix IR nodename + - fbdev: omapfb: Fix an OF node leak in dss_of_port_get_parent_device() + - arm64: tegra: Fix DMA ID for SPI2 + - i3c: dw: Add hot-join support. + - RDMA/mlx5: Fix indirect mkey ODP page count + - of: reserved-memory: Do not make kmemleak ignore freed address + - efi: sysfb_efi: fix W=1 warnings when EFI is not set + - spi: omap2-mcspi: Correctly handle devm_clk_get_optional() errors + - media: rc: iguanair: handle timeouts + - media: lmedm04: Handle errors for lme2510_int_read + - PCI: endpoint: Destroy the EPC device in devm_pci_epc_destroy() + - media: marvell: Add check for clk_enable() + - media: i2c: imx290: Register 0x3011 varies between imx327 and imx290 + - media: i2c: imx412: Add missing newline to prints + - media: i2c: ov9282: Correct the exposure offset + - media: mipi-csis: Add check for clk_enable() + - media: camif-core: Add check for clk_enable() + - media: uvcvideo: Propagate buf->error to userspace + - mtd: rawnand: brcmnand: fix status read of brcmnand_waitfunc + - mtd: hyperbus: hbmc-am654: fix an OF node reference leak + - media: nxp: imx8-isi: fix v4l2-compliance test errors + - watchdog: rti_wdt: Fix an OF node leak in rti_wdt_probe() + - staging: media: imx: fix OF node leak in imx_media_add_of_subdevs() + - media: dvb-usb-v2: af9035: fix ISO C90 compilation error on + af9035_i2c_master_xfer + - PCI: endpoint: pci-epf-test: Set dma_chan_rx pointer to NULL on error + - PCI: endpoint: pci-epf-test: Fix check for DMA MEMCPY test + - scsi: mpt3sas: Set ioc->manu_pg11.EEDPTagMode directly to 1 + - scsi: ufs: bsg: Delete bsg_dev when setting up bsg fails + - ocfs2: mark dquot as inactive if failed to start trans while releasing + dquot + - module: Extend the preempt disabled section in + dereference_symbol_descriptor(). + - serial: 8250: Adjust the timeout for FIFO mode + - NFSv4.2: fix COPY_NOTIFY xdr buf size calculation + - NFSv4.2: mark OFFLOAD_CANCEL MOVEABLE + - tools/bootconfig: Fix the wrong format specifier + - xfrm: replay: Fix the update of replay_esn->oseq_hi for GSO + - dmaengine: ti: edma: fix OF node reference leaks in edma_driver + - rtc: loongson: clear TOY_MATCH0_REG in loongson_rtc_isr() + - regulator: core: Add missing newline character + - gpio: mxc: remove dead code after switch to DT-only + - net: fec: implement TSO descriptor cleanup + - PM: hibernate: Add error handling for syscore_suspend() + - iavf: allow changing VLAN state without calling PF + - net: netdevsim: try to close UDP port harness races + - ptp: Properly handle compat ioctls + - net: stmmac: Limit the number of MTL queues to hardware capability + - net: stmmac: Limit FIFO size by hardware capability + - perf trace: Fix runtime error of index out of bounds + - Bluetooth: btnxpuart: Fix glitches seen in dual A2DP streaming + - vsock: Allow retrying on connect() failure + - bgmac: reduce max frame size to support just MTU 1500 + - net: sh_eth: Fix missing rtnl lock in suspend/resume path + - genksyms: fix memory leak when the same symbol is added from source + - genksyms: fix memory leak when the same symbol is read from *.symref + file + - RISC-V: Mark riscv_v_init() as __init + - ASoC: rockchip: i2s_tdm: Re-add the set_sysclk callback + - io_uring/uring_cmd: use cached cmd_op in io_uring_cmd_sock() + - cifs: Fix getting and setting SACLs over SMB1 + - kconfig: fix file name in warnings when loading KCONFIG_DEFCONFIG_LIST + - kconfig: fix memory leak in sym_warn_unmet_dep() + - hexagon: fix using plain integer as NULL pointer warning in cmpxchg + - hexagon: Fix unbalanced spinlock in die() + - f2fs: Introduce linear search for dentries + - Revert "SUNRPC: Reduce thread wake-up rate when receiving large RPC + messages" + - kbuild: switch from lz4c to lz4 for compression + - selftests/rseq: Fix handling of glibc without rseq support + - ktest.pl: Check kernelrelease return in get_version + - ALSA: usb-audio: Add delay quirk for iBasso DC07 Pro + - usb: gadget: f_tcm: Fix Get/SetInterface return value + - usb: dwc3-am62: Fix an OF node leak in phy_syscon_pll_refclk() + - usb: dwc3: core: Defer the probe until USB power supply ready + - usb: typec: tcpm: set SRC_SEND_CAPABILITIES timeout to + PD_T_SENDER_RESPONSE + - usb: typec: tcpci: Prevent Sink disconnection before vPpsShutdown in SPR + PPS + - btrfs: output the reason for open_ctree() failure + - s390: Add '-std=gnu11' to decompressor and purgatory CFLAGS + - LoongArch: Change 8 to 14 for LOONGARCH_MAX_{BRP,WRP} + - block: copy back bounce buffer to user-space correctly in case of split + - nvme-tcp: Fix I/O queue cpu spreading for multiple controllers + - sched/fair: Untangle NEXT_BUDDY and pick_next_task() + - sched: Fix race between yield_to() and try_to_wake_up() + - drm/v3d: Fix performance counter source settings on V3D 7.x + - drm/rockchip: vop2: fix rk3588 dp+dsi maxclk verification + - drm/rockchip: vop2: Set AXI id for rk3588 + - drm/rockchip: vop2: Setup delay cycle for Esmart2/3 + - drm/rockchip: vop2: Add check for 32 bpp format for rk3588 + - drm/msm/dpu: provide DSPP and correct LM config for SDM670 + - drm/msm/dpu: link DSPP_2/_3 blocks on SM8650 + - drm/msm: don't clean up priv->kms prematurely + - drm/msm/mdp4: correct LCDC regulator name + - wifi: rtlwifi: rtl8821ae: phy: restore removed code to fix infinite loop + - selftests/bpf: Actuate tx_metadata_len in xdp_hw_metadata + - selftests: ktap_helpers: Fix uninitialized variable + - inet: constify inet_sk_bound_dev_eq() net parameter + - inet: constify 'struct net' parameter of various lookup helpers + - udp: constify 'struct net' parameter of socket lookups + - inet6: constify 'struct net' parameter of various lookup helpers + - ipv6: udp: constify 'struct net' parameter of socket lookups + - dt-bindings: clock: imx93: Drop IMX93_CLK_END macro definition + - dt-bindings: clock: Add i.MX91 clock support + - dt-bindings: clock: imx93: Add SPDIF IPG clk + - clk: imx93: Move IMX93_CLK_END macro to clk driver + - clk: imx: add i.MX91 clk + - clk: imx93: Add IMX93_CLK_SPDIF_IPG clock + - arm64: dts: imx93: Use IMX93_CLK_SPDIF_IPG as SPDIF IPG clock + - clk: imx: Apply some clks only for i.MX93 + - wifi: rtw89: mcc: consider time limits not divisible by 1024 + - wifi: iwlwifi: cleanup uefi variables loading + - wifi: iwlwifi: fw: read STEP table from correct UEFI var + - wifi: mt76: mt7996: fix overflows seen when writing limit attributes + - wifi: mt76: mt7996: fix definition of tx descriptor + - Bluetooth: btbcm: Fix NULL deref in btbcm_get_board_name() + - platform/mellanox: mlxbf-pmc: incorrect type in assignment + - platform/x86: x86-android-tablets: make platform data be static + - crypto: api - Fix boot-up self-test race + - pinctrl: nomadik: Add check for clk_enable() + - rhashtable: Fix potential deadlock by moving schedule_work outside lock + - crypto: iaa - Fix IAA disabling that occurs when sync_mode is set to + 'async' + - perf maps: Fix display of kernel symbols + - perf MANIFEST: Add arch/*/include/uapi/asm/bpf_perf_event.h to the perf + tarball + - ALSA: hda: Fix compilation of snd_hdac_adsp_xxx() helpers + - tools: Sync if_xdp.h uapi tooling header + - rhashtable: Fix rhashtable_try_insert test + - ARM: dts: imx7-tqma7: add missing vs-supply for LM75A (rev. 01xxx) + - arm64: dts: renesas: rzg3s-smarc: Fix the debug serial alias + - arm64: dts: mediatek: mt8395-genio-1200-evk: Drop regulator-compatible + property + - arm64: dts: qcom: sm8550: correct sleep clock frequency + - arm64: dts: qcom: sm8650: correct sleep clock frequency + - arm64: dts: qcom: x1e80100: correct sleep clock frequency + - ARM: dts: microchip: sama5d29_curiosity: Add no-1-8-v property to sdmmc0 + node + - RDMA/hns: Clean up the legacy CONFIG_INFINIBAND_HNS + - [Config] updateconfigs for INFINIBAND_HNS + - RDMA/cxgb4: Notify rdma stack for IB_EVENT_QP_LAST_WQE_REACHED event + - iommu: iommufd: fix WARNING in iommufd_device_unbind + - remoteproc: mtk_scp: Only populate devices for SCP cores + - PCI: imx6: Deassert apps_reset in imx_pcie_deassert_core_reset() + - PCI: dwc: Always stop link in the dw_pcie_suspend_noirq + - PCI: microchip: Add support for using either Root Port 1 or 2 + - PCI: microchip: Set inbound address translation for coherent or non- + coherent mode + - erofs: get rid of erofs_{find,insert}_workgroup + - erofs: move erofs_workgroup operations into zdata.c + - erofs: sunset `struct erofs_workgroup` + - erofs: fix potential return value overflow of z_erofs_shrink_scan() + - tty: mips_ejtag_fdc: fix one more u8 warning + - xfrm: Add support for per cpu xfrm state handling. + - xfrm: Cache used outbound xfrm states at the policy. + - xfrm: Add an inbound percpu state cache. + - xfrm: Don't disable preemption while looking up cache state. + - idpf: add read memory barrier when checking descriptor done bit + - net/ncsi: use dev_set_mac_address() for Get MC MAC Address handling + - tools: ynl: c: correct reverse decode of empty attrs + - selftests: mptcp: extend CFLAGS to keep options from environment + - selftests: net/{lib,openvswitch}: extend CFLAGS to keep options from + environment + - net: ethtool: only allow set_rxnfc with rss + ring_cookie if driver opts + in + - ethtool: Fix set RXNFC command with symmetric RSS hash + - tools/power turbostat: Fix forked child affinity regression + - md: add a new callback pers->bitmap_sector() + - md/raid5: implement pers->bitmap_sector() + - xfs: check for dead buffers in xfs_buf_find_insert + - xfs: don't shut down the filesystem for media failures beyond end of log + - usb: dwc3: Skip resume if pm_runtime_set_active() fails + - clk: qcom: gcc-x1e80100: Do not turn off usb_2 controller GDSC + - xfrm: Add error handling when nla_put_u32() returns an error + - xfrm: Fix acquire state insertion. + - ethtool: Fix access to uninitialized fields in set RXNFC command + - ASoC: da7213: Initialize the mutex + - drm/amd/display: Add hubp cache reset when powergating + - KVM: x86: Plumb in the vCPU to kvm_x86_ops.hwapic_isr_update() + - ethtool: ntuple: fix rss + ring_cookie check + - Upstream stable to v6.6.76, v6.12.13 + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-57975 + - btrfs: do proper folio cleanup when run_delalloc_nocow() failed + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21714 + - RDMA/mlx5: Fix implicit ODP use after free + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21801 + - net: ravb: Fix missing rtnl lock in suspend/resume path + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21809 + - rxrpc, afs: Fix peer hash locking vs RCU callback + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-58057 + - idpf: convert workqueues to unbound + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-57953 + - rtc: tps6594: Fix integer overflow on 32bit systems + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-57982 + - xfrm: state: fix out-of-bounds read during lookup + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21721 + - nilfs2: handle errors that nilfs_prepare_chunk() may return + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21722 + - nilfs2: do not force clear folio if buffer is referenced + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21798 + - firewire: test: Fix potential null dereference in firewire kunit test + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21723 + - scsi: mpi3mr: Fix possible crash when setting up bsg fails + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21724 + - iommufd/iova_bitmap: Fix shift-out-of-bounds in + iova_bitmap_offset_to_index() + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21825 + - bpf: Cancel the running bpf_timer through kworker for PREEMPT_RT + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-57990 + - wifi: mt76: mt7925: fix off by one in mt7925_load_clc() + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-57974 + - udp: Deal with race between UDP socket address change and rehash + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-57994 + - ptr_ring: do not block hard interrupts in ptr_ring_resize_multiple() + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-57999 + - powerpc/pseries/iommu: IOMMU incorrectly marks MMIO range in DDW + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-58054 + - staging: media: max96712: fix kernel oops when removing module + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-58055 + - usb: gadget: f_tcm: Don't free command immediately + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-57979 + - pps: Fix a use-after-free + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-57980 + - media: uvcvideo: Fix double free in error path + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-58056 + - remoteproc: core: Fix ida_free call while not allocated + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21705 + - mptcp: handle fastopen disconnect correctly + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21707 + - mptcp: consolidate suboption status + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-57981 + - usb: xhci: Fix NULL pointer dereference on certain command aborts + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21708 + - net: usb: rtl8150: enable basic endpoint checking + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21826 + - netfilter: nf_tables: reject mismatching sum of field_len with set key + length + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21808 + - net: xdp: Disallow attaching device-bound programs in generic mode + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21710 + - tcp: correct handling of extreme memory squeeze + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21715 + - net: davicom: fix UAF in dm9000_drv_remove + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21716 + - vxlan: Fix uninit-value in vxlan_vnifilter_dump() + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21718 + - net: rose: fix timer races against user threads + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21719 + - ipmr: do not call mr_mfc_uses_dev() for unres entries + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21802 + - net: hns3: fix oops when unload drivers paralleling + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-58058 + - ubifs: skip dumping tnc tree when zroot is null + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-58069 + - rtc: pcf85063: fix potential OOB write in PCF85063 NVMEM read + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21720 + - xfrm: delete intermediate secpath entry in packet offload mode + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21803 + - LoongArch: Fix warnings during S3 suspend + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21810 + - driver core: class: Fix wild pointer dereferences in API + class_dev_iter_next() + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21811 + - nilfs2: protect access to buffers with no active references + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21804 + - PCI: rcar-ep: Fix incorrect variable used when calling + devm_request_mem_region() + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21829 + - RDMA/rxe: Fix the warning "__rxe_cleanup+0x12c/0x170 [rdma_rxe]" + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-57984 + - i3c: dw: Fix use-after-free in dw_i3c_master driver due to race + condition + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-58034 + - memory: tegra20-emc: fix an OF node reference bug in + tegra_emc_find_node_by_ram_code() + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-57973 + - rdma/cxgb4: Prevent potential integer overflow on 32bit + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21725 + - smb: client: fix oops due to unset link speed + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21726 + - padata: avoid UAF for reorder_work + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21727 + - padata: fix UAF in padata_reorder + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21728 + - bpf: Send signals asynchronously if !preemptible + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-58070 + - bpf: bpf_local_storage: Always use bpf_mem_alloc in PREEMPT_RT + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21711 + - net/rose: prevent integer overflows in rose_setsockopt() + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21799 + - net: ethernet: ti: am65-cpsw: fix freeing IRQ in + am65_cpsw_nuss_remove_tx_chns() + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21806 + - net: let net.core.dev_weight always be non-zero + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21830 + - landlock: Handle weird files + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21828 + - wifi: mac80211: don't flush non-uploaded STAs + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-58061 + - wifi: mac80211: prohibit deactivating all links + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-57993 + - HID: hid-thrustmaster: Fix warning in thrustmaster_probe by adding + endpoint check + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21812 + - ax25: rcu protect dev->ax25_ptr + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-58071 + - team: prevent adding a device which is already a team device lower + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-58063 + - wifi: rtlwifi: fix memory leaks and invalid access at probe error path + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-58072 + - wifi: rtlwifi: remove unused check_buddy_priv + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-58053 + - rxrpc: Fix handling of received connection abort + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-57996 + - net_sched: sch_sfq: don't allow 1 packet limit + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-57997 + - wifi: wcn36xx: fix channel survey memory allocation size + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-58051 + - ipmi: ipmb: Add check devm_kasprintf() returned value + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-58068 + - OPP: fix dev_pm_opp_find_bw_*() when bandwidth table not initialized + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-57998 + - OPP: add index check to assert to avoid buffer overflow in _read_freq() + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-58052 + - drm/amdgpu: Fix potential NULL pointer dereference in + atomctrl_get_smc_sclk_range_table + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2024-57986 + - HID: core: Fix assumption that Resolution Multipliers must be in Logical + Collections + + * Noble update: upstream stable patchset 2025-05-29 (LP: #2111953) // + CVE-2025-21731 + - nbd: don't allow reconnect after disconnect + + * CVE-2025-37798 + - sch_htb: make htb_qlen_notify() idempotent + - sch_htb: make htb_deactivate() idempotent + - sch_drr: make drr_qlen_notify() idempotent + - sch_hfsc: make hfsc_qlen_notify() idempotent + - sch_qfq: make qfq_qlen_notify() idempotent + - sch_ets: make est_qlen_notify() idempotent + - codel: remove sch->q.qlen check before qdisc_tree_reduce_backlog() + + * CVE-2025-37997 + - netfilter: ipset: fix region locking in hash types + + * CVE-2025-22088 + - RDMA/erdma: Prevent use-after-free in erdma_accept_newconn() + + * CVE-2025-37890 + - net_sched: hfsc: Fix a UAF vulnerability in class with netem as child + qdisc + - sch_hfsc: Fix qlen accounting bug when using peek in hfsc_enqueue() + - net_sched: hfsc: Address reentrant enqueue adding class to eltree twice + + * raid1: Fix NULL pointer dereference in process_checks() (LP: #2112519) + - md/raid1: Add check for missing source disk in process_checks() + + * Packaging resync (LP: #1786013) + - [Packaging] update variants + - [Packaging] update annotations scripts + + -- Mehmet Basaran Sun, 15 Jun 2025 10:53:51 +0300 + +linux (6.8.0-62.65) noble; urgency=medium + + * noble/linux: 6.8.0-62.65 -proposed tracker (LP: #2110737) + + * Rotate the Canonical Livepatch key (LP: #2111244) + - [Config] Prepare for Canonical Livepatch key rotation + + * KVM bug causes Firecracker crash when it runs the vCPU for the first time + (LP: #2109859) + - vhost: return task creation error instead of NULL + - kvm: retry nx_huge_page_recovery_thread creation + + * CVE-2025-2312 cifs.upcall could access incorrect kerberos credentials cache + (LP: #2099914) // CVE-2025-2312 + - CIFS: New mount option for cifs.upcall namespace resolution + + * Noble update: upstream stable patchset 2025-04-29 (LP: #2109640) + - ASoC: wm8994: Add depends on MFD core + - ASoC: samsung: Add missing selects for MFD_WM8994 + - seccomp: Stub for !CONFIG_SECCOMP + - scsi: iscsi: Fix redundant response for ISCSI_UEVENT_GET_HOST_STATS request + - of/unittest: Add test that of_address_to_resource() fails on non- + translatable address + - irqchip/sunxi-nmi: Add missing SKIP_WAKE flag + - hwmon: (drivetemp) Set scsi command timeout to 10s + - ASoC: samsung: Add missing depends on I2C + - ata: libata-core: Set ATA_QCFLAG_RTF_FILLED in fill_result_tf() + - Revert "libfs: fix infinite directory reads for offset dir" + - libfs: Replace simple_offset end-of-directory detection + - Revert "HID: multitouch: Add support for lenovo Y9000P Touchpad" + - ALSA: usb-audio: Add delay quirk for USB Audio Device + - Input: xpad - add support for Nacon Pro Compact + - Input: atkbd - map F23 key to support default copilot shortcut + - Input: xpad - add unofficial Xbox 360 wireless receiver clone + - Input: xpad - add QH Electronics VID/PID + - Input: xpad - improve name of 8BitDo controller 2dc8:3106 + - Input: xpad - add support for Nacon Evol-X Xbox One Controller + - Input: xpad - add support for wooting two he (arm) + - ASoC: codecs: es8316: Fix HW rate calculation for 48Mhz MCLK + - ASoC: cs42l43: Add codec force suspend/resume ops + - ALSA: hda/realtek: Fix volume adjustment issue on Lenovo ThinkBook 16P Gen5 + - libfs: Return ENOSPC when the directory offset range is exhausted + - Revert "libfs: Add simple_offset_empty()" + - libfs: Use d_children list to iterate simple_offset directories + - wifi: rtl8xxxu: add more missing rtl8192cu USB IDs + - HID: wacom: Initialize brightness of LED trigger + - Upstream stable to v6.6.75, v6.12.12 + + * Noble update: upstream stable patchset 2025-04-29 (LP: #2109640) // + CVE-2025-21689 + - USB: serial: quatech2: fix null-ptr-deref in qt2_process_read_urb() + + * Noble update: upstream stable patchset 2025-04-29 (LP: #2109640) // + CVE-2025-21690 + - scsi: storvsc: Ratelimit warning logs to prevent VM denial of service + + * Noble update: upstream stable patchset 2025-04-29 (LP: #2109640) // + CVE-2025-21691 + - cachestat: fix page cache statistics permission checking + + * Noble update: upstream stable patchset 2025-04-29 (LP: #2109640) // + CVE-2025-21692 + - net: sched: fix ets qdisc OOB Indexing + + * Noble update: upstream stable patchset 2025-04-29 (LP: #2109640) // + CVE-2025-21699 + - gfs2: Truncate address space when flipping GFS2_DIF_JDATA flag + + * Noble update: upstream stable patchset 2025-04-29 (LP: #2109640) // + CVE-2024-50157 + - RDMA/bnxt_re: Avoid CPU lockups due fifo occupancy check loop + + * rtw89: Support hardware rfkill (LP: #2077384) + - wifi: rtw89: add support for hardware rfkill + + * Introduce configfs-based interface for gpio-aggregator (LP: #2103496) + - gpio: introduce utilities for synchronous fake device creation + - bitmap: Define a cleanup function for bitmaps + - gpio: aggregator: simplify aggr_parse() with scoped bitmap + - gpio: aggregator: protect driver attr handlers against module unload + - gpio: aggregator: reorder functions to prepare for configfs introduction + - gpio: aggregator: unify function naming + - gpio: aggregator: add gpio_aggregator_{alloc, free}() + - gpio: aggregator: introduce basic configfs interface + - [Config] Enable DEV_SYNC_PROBE as module + - SAUCE: gpio: aggregator: Fix error code in gpio_aggregator_activate() + - gpio: aggregator: rename 'name' to 'key' in gpio_aggregator_parse() + - gpio: aggregator: expose aggregator created via legacy sysfs to configfs + - SAUCE: gpio: aggregator: fix "_sysfs" prefix check in + gpio_aggregator_make_group() + - SAUCE: gpio: aggregator: Fix gpio_aggregator_line_alloc() checking + - SAUCE: gpio: aggregator: Return an error if there are no GPIOs in + gpio_aggregator_parse() + - SAUCE: gpio: aggregator: Fix leak in gpio_aggregator_parse() + - gpio: aggregator: cancel deferred probe for devices created via configfs + - Documentation: gpio: document configfs interface for gpio-aggregator + - selftests: gpio: add test cases for gpio-aggregator + - SAUCE: selftests: gpio: gpio-aggregator: add a test case for _sysfs prefix + reservation + + * Noble update: upstream stable patchset 2025-04-16 (LP: #2107449) + - net: ethernet: ti: cpsw_ale: Fix cpsw_ale_get_field() + - net: add exit_batch_rtnl() method + - gtp: use exit_batch_rtnl() method + - gtp: Use for_each_netdev_rcu() in gtp_genl_dump_pdp(). + - gtp: Suppress list corruption splat in gtp_net_exit_batch_rtnl(). + - nfp: bpf: prevent integer overflow in nfp_bpf_event_output() + - net: xilinx: axienet: Fix IRQ coalescing packet count overflow + - net/mlx5: Fix RDMA TX steering prio + - net/mlx5e: Rely on reqid in IPsec tunnel mode + - net/mlx5e: Always start IPsec sequence number from 1 + - drm/vmwgfx: Add new keep_resv BO param + - drm/v3d: Assign job pointer to NULL before signaling the fence + - soc: ti: pruss: Fix pruss APIs + - hwmon: (tmp513) Fix division of negative numbers + - i2c: mux: demux-pinctrl: check initial mux selection, too + - i2c: rcar: fix NACK handling when being a target + - hfs: Sanity check the root record + - fs: fix missing declaration of init_files + - kheaders: Ignore silly-rename files + - cachefiles: Parse the "secctx" immediately + - scsi: ufs: core: Honor runtime/system PM levels if set by host controller + drivers + - selftests: tc-testing: reduce rshift value + - ACPI: resource: acpi_dev_irq_override(): Check DMI match last + - poll_wait: add mb() to fix theoretical race between waitqueue_active() and + .poll() + - RDMA/bnxt_re: Fix to export port num to ib_query_qp + - nvmet: propagate npwg topology + - ALSA: hda/realtek: Add support for Ayaneo System using CS35L41 HDA + - i2c: atr: Fix client detach + - mptcp: be sure to send ack when mptcp-level window re-opens + - mptcp: fix spurious wake-up on under memory pressure + - selftests: mptcp: avoid spurious errors on disconnect + - net: ethernet: xgbe: re-add aneg to supported features in PHY quirks + - vsock/virtio: cancel close work in the destructor + - vsock: reset socket state when de-assigning the transport + - nouveau/fence: handle cross device fences properly + - irqchip: Plug a OF node reference leak in platform_irqchip_probe() + - irqchip/gic-v3: Handle CPU_PM_ENTER_FAILED correctly + - drm/i915/fb: Relax clear color alignment to 64 bytes + - drm/amdgpu: always sync the GFX pipe on ctx switch + - ocfs2: fix deadlock in ocfs2_get_system_file_inode + - nfsd: add list_head nf_gc to struct nfsd_file + - x86/xen: fix SLS mitigation in xen_hypercall_iret() + - efi/zboot: Limit compression options to GZIP and ZSTD + - [Config] updateconfigs for HAVE_KERNEL_(LZ4|LZMA|LZO|XZ) + - net: ravb: Fix max TX frame size for RZ/V2M + - net/mlx5: SF, Fix add port error handling + - drm/vmwgfx: Unreserve BO on error + - i2c: testunit: on errors, repeat NACK until STOP + - hwmon: (ltc2991) Fix mixed signed/unsigned in DIV_ROUND_CLOSEST + - fs/qnx6: Fix building with GCC 15 + - gpio: sim: lock up configfs that an instantiated device depends on + - gpio: sim: lock hog configfs items if present + - platform/x86: ISST: Add Clearwater Forest to support list + - drm/nouveau/disp: Fix missing backlight control on Macbook 5,1 + - net/ncsi: fix locking in Get MAC Address handling + - drm/amd/display: Do not elevate mem_type change to full update + - drm/xe: Mark ComputeCS read mode as UC on iGPU + - drm/amdgpu/smu13: update powersave optimizations + - drm/amdgpu: fix fw attestation for MP0_14_0_{2/3} + - drm/amdgpu: disable gfxoff with the compute workload on gfx12 + - drm/amd/display: Fix PSR-SU not support but still call the + amdgpu_dm_psr_enable + - Upstream stable to v6.6.73, v6.6.74, v6.12.11 + + * Noble update: upstream stable patchset 2025-04-16 (LP: #2107449) // + CVE-2025-21672 + - afs: Fix merge preference rule failure condition + + * Noble update: upstream stable patchset 2025-04-16 (LP: #2107449) // + CVE-2025-21682 + - eth: bnxt: always recalculate features after XDP clearing, fix null-deref + + * Noble update: upstream stable patchset 2025-04-16 (LP: #2107449) // + CVE-2024-53124 + - net: fix data-races around sk->sk_forward_alloc + + * Noble update: upstream stable patchset 2025-04-16 (LP: #2107449) // + CVE-2024-57924 + - fs: relax assertions on failure to encode file handles + + * Noble update: upstream stable patchset 2025-04-16 (LP: #2107449) // + CVE-2024-57951 + - hrtimers: Handle CPU state correctly on hotplug + + * Noble update: upstream stable patchset 2025-04-16 (LP: #2107449) // + CVE-2024-57949 + - irqchip/gic-v3-its: Don't enable interrupts in its_irq_set_vcpu_affinity() + + * Noble update: upstream stable patchset 2025-04-16 (LP: #2107449) // + CVE-2025-21668 + - pmdomain: imx8mp-blk-ctrl: add missing loop break condition + + * Noble update: upstream stable patchset 2025-04-16 (LP: #2107449) // + CVE-2025-21684 + - gpio: xilinx: Convert gpio_lock to raw spinlock + + * Noble update: upstream stable patchset 2025-04-16 (LP: #2107449) // + CVE-2025-21694 + - fs/proc: fix softlockup in __read_vmcore (part 2) + + * Noble update: upstream stable patchset 2025-04-16 (LP: #2107449) // + CVE-2025-21665 + - filemap: avoid truncating 64-bit offset to 32 bits + + * Noble update: upstream stable patchset 2025-04-16 (LP: #2107449) // + CVE-2025-21666 + - vsock: prevent null-ptr-deref in vsock_*[has_data|has_space] + + * Noble update: upstream stable patchset 2025-04-16 (LP: #2107449) // + CVE-2025-21669 + - vsock/virtio: discard packets if the transport changes + + * Noble update: upstream stable patchset 2025-04-16 (LP: #2107449) // + CVE-2025-21670 + - vsock/bpf: return early if transport is not assigned + + * Noble update: upstream stable patchset 2025-04-16 (LP: #2107449) // + CVE-2025-21667 + - iomap: avoid avoid truncating 64-bit offset to 32 bits + + * Noble update: upstream stable patchset 2025-04-16 (LP: #2107449) // + CVE-2024-57948 + - mac802154: check local interfaces before deleting sdata list + + * Noble update: upstream stable patchset 2025-04-16 (LP: #2107449) // + CVE-2025-21673 + - smb: client: fix double free of TCP_Server_Info::hostname + + * Noble update: upstream stable patchset 2025-04-16 (LP: #2107449) // + CVE-2025-21697 + - drm/v3d: Ensure job pointer is set to NULL after job completion + + * Noble update: upstream stable patchset 2025-04-16 (LP: #2107449) // + CVE-2025-21674 + - net/mlx5e: Fix inversion dependency warning while enabling IPsec tunnel + + * Noble update: upstream stable patchset 2025-04-16 (LP: #2107449) // + CVE-2025-21675 + - net/mlx5: Clear port select structure when fail to create + + * Noble update: upstream stable patchset 2025-04-16 (LP: #2107449) // + CVE-2025-21676 + - net: fec: handle page_pool_dev_alloc_pages error + + * Noble update: upstream stable patchset 2025-04-16 (LP: #2107449) // + CVE-2025-21678 + - gtp: Destroy device along with udp socket's netns dismantle. + + * Noble update: upstream stable patchset 2025-04-16 (LP: #2107449) // + CVE-2025-21680 + - pktgen: Avoid out-of-bounds access in get_imix_entries + + * Noble update: upstream stable patchset 2025-04-16 (LP: #2107449) // + CVE-2025-21681 + - openvswitch: fix lockup on tx to unregistering netdev with carrier + + * Noble update: upstream stable patchset 2025-04-16 (LP: #2107449) // + CVE-2025-21683 + - bpf: Fix bpf_sk_select_reuseport() memory leak + + * Packaging resync (LP: #1786013) + - [Packaging] update annotations scripts + + -- Stefan Bader Mon, 19 May 2025 12:55:33 +0200 + +linux (6.8.0-60.63) noble; urgency=medium + + * noble/linux: 6.8.0-60.63 -proposed tracker (LP: #2107138) + + * Packaging resync (LP: #1786013) + - [Packaging] debian.master/dkms-versions -- update from kernel-versions + (main/2025.04.14) + + * Missing upstream commits for LP: #2102181 (LP: #2107336) + - libperf cpumap: Add any, empty and min helpers + - libperf cpumap: Ensure empty cpumap is NULL from alloc + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) + - memblock: use numa_valid_node() helper to check for invalid node ID + - jbd2: increase IO priority for writing revoke records + - jbd2: flush filesystem device before updating tail sequence + - dm array: fix unreleased btree blocks on closing a faulty array cursor + - dm array: fix cursor index when skipping across block boundaries + - exfat: fix the infinite loop in __exfat_free_cluster() + - erofs: fix PSI memstall accounting + - ASoC: rt722: add delay time to wait for the calibration procedure + - ASoC: mediatek: disable buffer pre-allocation + - selftests/alsa: Fix circular dependency involving global-timer + - ieee802154: ca8210: Add missing check for kfifo_alloc() in ca8210_probe() + - net: 802: LLC+SNAP OID:PID lookup on start of skb data + - tcp/dccp: complete lockless accesses to sk->sk_max_ack_backlog + - tcp/dccp: allow a connection when sk_max_ack_backlog is zero + - net: libwx: fix firmware mailbox abnormal return + - pds_core: limit loop over fw name list + - bnxt_en: Fix possible memory leak when hwrm_req_replace fails + - cxgb4: Avoid removal of uninserted tid + - ice: fix incorrect PHY settings for 100 GB/s + - igc: return early when failing to read EECD register + - tls: Fix tls_sw_sendmsg error handling + - eth: gve: use appropriate helper to set xdp_features + - Bluetooth: hci_sync: Fix not setting Random Address when required + - Bluetooth: MGMT: Fix Add Device to responding before completing + - Bluetooth: btnxpuart: Fix driver sending truncated data + - tcp: Annotate data-race around sk->sk_mark in tcp_v4_send_reset + - riscv: Fix early ftrace nop patching + - memblock tests: fix implicit declaration of function 'numa_valid_node' + - iio: imu: inv_icm42600: fix timestamps after suspend if sensor is on + - netfilter: nf_tables: imbalance in flowtable binding + - drm/mediatek: stop selecting foreign drivers + - [Config] updateconfigs for MTK_SMI + - drm/mediatek: Fix YCbCr422 color format issue for DP + - drm/mediatek: Fix mode valid issue for dp + - drm/mediatek: Add return value check when reading DPCD + - cpuidle: riscv-sbi: fix device node release in early exit of + for_each_possible_cpu + - scsi: ufs: qcom: Power off the PHY if it was already powered on in + ufs_qcom_power_up_sequence() + - dm-ebs: don't set the flag DM_TARGET_PASSES_INTEGRITY + - ksmbd: Implement new SMB3 POSIX type + - thermal: of: fix OF node leak in of_thermal_zone_find() + - smb: client: sync the root session and superblock context passwords before + automounting + - ACPI: resource: Add TongFang GM5HG0A to irq1_edge_low_force_override[] + - ACPI: resource: Add Asus Vivobook X1504VAP to irq1_level_low_skip_override[] + - drm/amd/display: increase MAX_SURFACES to the value supported by hw + - io_uring/timeout: fix multishot updates + - dm-verity FEC: Fix RS FEC repair for roots unaligned to block size (take 2) + - USB: serial: option: add MeiG Smart SRM815 + - USB: serial: option: add Neoway N723-EA support + - staging: iio: ad9834: Correct phase range check + - staging: iio: ad9832: Correct phase range check + - usb-storage: Add max sectors quirk for Nokia 208 + - USB: serial: cp210x: add Phoenix Contact UPS Device + - usb: dwc3: gadget: fix writing NYET threshold + - misc: microchip: pci1xxxx: Resolve return code mismatch during GPIO set + config + - tty: serial: 8250: Fix another runtime PM usage counter underflow + - usb: dwc3-am62: Disable autosuspend during remove + - USB: usblp: return error when setting unsupported protocol + - USB: core: Disable LPM only for non-suspended ports + - usb: fix reference leak in usb_new_device() + - usb: gadget: midi2: Reverse-select at the right place + - usb: chipidea: ci_hdrc_imx: decrement device's refcount in .remove() and in + the error path of .probe() + - usb: gadget: f_uac2: Fix incorrect setting of bNumEndpoints + - usb: typec: tcpm/tcpci_maxim: fix error code in + max_contaminant_read_resistance_kohm() + - usb: gadget: configfs: Ignore trailing LF for user strings to cdev + - iio: gyro: fxas21002c: Fix missing data update in trigger handler + - iio: adc: ti-ads124s08: Use gpiod_set_value_cansleep() + - iio: inkern: call iio_device_put() only on mapped devices + - iio: adc: ad7124: Disable all channels at probe time + - riscv: kprobes: Fix incorrect address calculation + - ARM: dts: imxrt1050: Fix clocks for mmc + - arm64: dts: rockchip: add hevc power domain clock to rk3328 + - pmdomain: imx: gpcv2: Simplify with scoped for each OF child loop + - pmdomain: imx: gpcv2: fix an OF node reference leak in imx_gpcv2_probe() + - workqueue: Add rcu lock check at the end of work item execution + - workqueue: Update lock debugging code + - mm/hugetlb: enforce that PMD PT sharing has split PMD PT locks + - riscv: Fix text patching when IPI are used + - drm/mediatek: Only touch DISP_REG_OVL_PITCH_MSB if AFBC is supported + - ovl: pass realinode to ovl_encode_real_fh() instead of realdentry + - net: don't dump Tx and uninitialized NAPIs + - ice: fix max values for dpll pin phase adjust + - net: hns3: fixed reset failure issues caused by the incorrect reset type + - net: hns3: fix missing features due to dev->features configuration too early + - net: hns3: Resolved the issue that the debugfs query result is inconsistent. + - net: hns3: initialize reset_timer before hclgevf_misc_irq_init() + - mctp i3c: fix MCTP I3C driver multi-thread issue + - drm/mediatek: Move mtk_crtc_finish_page_flip() to ddp_cmdq_cb() + - drm/mediatek: Add support for 180-degree rotation in the display driver + - drm/mediatek: mtk_dsi: Add registers to pdata to fix MT8186/MT8188 + - platform/x86: intel/pmc: Fix ioremap() of bad address + - riscv: module: remove relocation_head rel_entry member allocation + - cgroup/cpuset: Prevent leakage of isolated CPUs into sched domains + - fs: kill MNT_ONRB + - gpio: loongson: Fix Loongson-2K2000 ACPI GPIO register offset + - drm/amd/pm: fix BUG: scheduling while atomic + - drm/amdkfd: wq_release signals dma_fence only when available + - drm/amd/display: fix divide error in DM plane scale calcs + - drm/amd/display: fix page fault due to max surface definition mismatch + - serial: stm32: use port lock wrappers for break control + - usb: host: xhci-plat: set skip_phy_initialization if software node has + XHCI_SKIP_PHY_INIT property + - iio: imu: inv_icm42600: add register caching in the regmap + - iio: imu: inv_icm42600: fix spi burst write not supported + - Upstream stable to v6.6.71, v6.6.72, v6.12.10 + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2025-21659 + - netdev: prevent accessing NAPI instances from another namespace + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2025-21634 + - cgroup/cpuset: remove kernfs active break + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2025-21635 + - rds: sysctl: rds_tcp_{rcv,snd}buf: avoid using current->nsproxy + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2025-21643 + - netfs: Fix kernel async DIO + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2025-21649 + - net: hns3: fix kernel crash when 1588 is sent on HIP08 devices + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2025-21650 + - net: hns3: fixed hclge_fetch_pf_reg accesses bar space out of bounds issue + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2025-21651 + - net: hns3: don't auto enable misc vector + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2025-21654 + - ovl: support encoding fid from inode with no alias + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2024-57883 + - mm: hugetlb: independent PMD page table shared count + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2024-57888 + - workqueue: Do not warn when cancelling WQ_MEM_RECLAIM work from + !WQ_MEM_RECLAIM worker + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2025-21631 + - block, bfq: fix waker_bfqq UAF after bfq_split_bfqq() + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2025-21656 + - hwmon: (drivetemp) Fix driver producing garbage data when SCSI errors occur + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2025-21655 + - io_uring/eventfd: ensure io_eventfd_signal() defers another RCU period + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2024-57904 + - iio: adc: at91: call input_free_device() on allocated iio_dev + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2024-57906 + - iio: adc: ti-ads8688: fix information leak in triggered buffer + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2024-57907 + - iio: adc: rockchip_saradc: fix information leak in triggered buffer + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2024-57908 + - iio: imu: kmx61: fix information leak in triggered buffer + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2024-57910 + - iio: light: vcnl4035: fix information leak in triggered buffer + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2024-57911 + - iio: dummy: iio_simply_dummy_buffer: fix information leak in triggered + buffer + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2024-57912 + - iio: pressure: zpa2326: fix information leak in triggered buffer + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2024-57913 + - usb: gadget: f_fs: Remove WARN_ON in functionfs_bind + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2025-21632 + - x86/fpu: Ensure shadow stack is active before "getting" registers + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2024-57916 + - misc: microchip: pci1xxxx: Resolve kernel panic during GPIO IRQ handling + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2024-57917 + - topology: Keep the cpumask unchanged when printing cpumap + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2024-57939 + - riscv: Fix sleeping in invalid context in die() + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2025-21636 + - sctp: sysctl: plpmtud_probe_interval: avoid using current->nsproxy + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2025-21637 + - sctp: sysctl: udp_port: avoid using current->nsproxy + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2025-21638 + - sctp: sysctl: auth_enable: avoid using current->nsproxy + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2025-21639 + - sctp: sysctl: rto_min/max: avoid using current->nsproxy + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2025-21640 + - sctp: sysctl: cookie_hmac_alg: avoid using current->nsproxy + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2025-21642 + - mptcp: sysctl: sched: avoid using current->nsproxy + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2025-21664 + - dm thin: make get_first_thin use rcu-safe list first function + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2024-57945 + - riscv: mm: Fix the out of bound issue of vmemmap address + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2025-21660 + - ksmbd: fix unexpectedly changed path in ksmbd_vfs_kern_path_locked + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2025-21645 + - platform/x86/amd/pmc: Only disable IRQ1 wakeup where i8042 actually enabled + it + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2025-21646 + - afs: Fix the maximum cell name length + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2024-57925 + - ksmbd: fix a missing return value check bug + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2024-57926 + - drm/mediatek: Set private->all_drm_private[i]->drm to NULL if mtk_drm_bind + returns err + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2025-21662 + - net/mlx5: Fix variable not being completed when function returns + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2025-21663 + - net: stmmac: dwmac-tegra: Read iommu stream id from device tree + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2025-21647 + - sched: sch_cake: add bounds checks to host bulk flow fairness counts + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2025-21648 + - netfilter: conntrack: clamp maximum hashtable size to INT_MAX + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2025-21652 + - ipvlan: Fix use-after-free in ipvlan_get_iflink(). + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2025-21658 + - btrfs: avoid NULL pointer dereference if no valid extent tree + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2025-21653 + - net_sched: cls_flow: validate TCA_FLOW_RSHIFT attribute + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2024-47736 + - erofs: handle overlapped pclusters out of crafted images properly + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2024-57940 + - exfat: fix the infinite loop in exfat_readdir() + + * Noble update: upstream stable patchset 2025-04-10 (LP: #2106770) // + CVE-2024-57929 + - dm array: fix releasing a faulty array block twice in dm_array_cursor_end + + * intel_idle: add Granite Rapids Xeon (D) support (LP: #2106638) + - intel_idle: add Granite Rapids Xeon support + - intel_idle: add Granite Rapids Xeon D support + + * [SRU] Enable speaker/mic mute LEDs on Lenovo ideapad and thinkbook + (LP: #2106449) + - ALSA: hda: Support for Ideapad hotkey mute LEDs + - platform/x86:lenovo-wmi-hotkey-utilities.c: Support for mic and audio mute + LEDs + - [Config] Enable Lenovo wmi hotkey driver + + * Backport "PCI: Wait for device readiness with Configuration RRS" to N/O + (LP: #2106251) + - PCI: Wait for device readiness with Configuration RRS + - PCI: Avoid FLR for Mediatek MT7922 WiFi + + * Enable OOB P-state control for Intel Sierra Forest/Granite Rapids + (LP: #2106275) + - cpufreq: intel_pstate: Support Granite Rapids and Sierra Forest OOB mode + + * mptcp BUG 'scheduling while atomic' in mptcp_pm_nl_append_new_local_addr + (LP: #2101120) + - mptcp: fix 'scheduling while atomic' in mptcp_pm_nl_append_new_local_addr + + * CVE-2025-21971 + - net_sched: Prevent creation of classes with TC_H_ROOT + + * Noble update: upstream stable patchset 2025-04-09 (LP: #2106632) + - smb/client: rename cifs_ntsd to smb_ntsd + - smb/client: rename cifs_sid to smb_sid + - smb/client: rename cifs_acl to smb_acl + - smb/client: rename cifs_ace to smb_ace + - fs/smb/client: implement chmod() for SMB3 POSIX Extensions + - smb: client: stop flooding dmesg in smb2_calc_signature() + - media: uvcvideo: Force UVC version to 1.0a for 0408:4033 + - Bluetooth: btusb: Add new VID/PID 13d3/3602 for MT7925 + - watchdog: rzg2l_wdt: Remove reset de-assert from probe + - watchdog: rzg2l_wdt: Rely on the reset driver for doing proper reset + - watchdog: rzg2l_wdt: Power on the watchdog domain in the restart handler + - ALSA: ump: Use guard() for locking + - ALSA: ump: Don't open legacy substream for an inactive group + - scsi: mpi3mr: Use ida to manage mrioc ID + - scsi: mpi3mr: Start controller indexing from 0 + - ACPI/IORT: Add PMCG platform information for HiSilicon HIP10/11 + - ACPI/IORT: Add PMCG platform information for HiSilicon HIP09A + - x86/ptrace: Cleanup the definition of the pt_regs structure + - x86/ptrace: Add FRED additional information to the pt_regs structure + - Bluetooth: btusb: add callback function in btusb suspend/resume + - Bluetooth: btusb: mediatek: add callback function in btusb_disconnect + - platform/x86: mlx-platform: call pci_dev_put() to balance the refcount + - mmc: sdhci-msm: fix crypto key eviction + - tracing: Handle old buffer mappings for event strings and functions + - tracing: Fix trace_check_vprintf() when tp_printk is used + - tracing: Check "%s" dereference via the field and not the TP_printk format + - RDMA/bnxt_re: Allow MSN table capability check + - RDMA/bnxt_re: Remove always true dattr validity check + - RDMA/mlx5: Enforce same type port association for multiport RoCE + - RDMA/bnxt_re: Avoid initializing the software queue for user queues + - RDMA/bnxt_re: Avoid sending the modify QP workaround for latest adapters + - nvme-pci: 512 byte aligned dma pool segment quirk + - RDMA/bnxt_re: Fix the check for 9060 condition + - RDMA/bnxt_re: Add check for path mtu in modify_qp + - RDMA/bnxt_re: Fix reporting hw_ver in query_device + - RDMA/bnxt_re: Fix max_qp_wrs reported + - RDMA/bnxt_re: Add support for Variable WQE in Genp7 adapters + - RDMA/bnxt_re: Disable use of reserved wqes + - RDMA/bnxt_re: Add send queue size check for variable wqe + - RDMA/bnxt_re: Fix MSN table size for variable wqe mode + - drm/bridge: adv7511_audio: Update Audio InfoFrame properly + - net: dsa: microchip: Fix KSZ9477 set_ageing_time function + - net: dsa: microchip: Fix LAN937X set_ageing_time function + - RDMA/hns: Refactor mtr find + - RDMA/hns: Remove unused parameters and variables + - RDMA/hns: Fix mapping error of zero-hop WQE buffer + - RDMA/hns: Fix warning storm caused by invalid input in IO path + - RDMA/hns: Fix missing flush CQE for DWQE + - ip_tunnel: annotate data-races around t->parms.link + - ipv4: ip_tunnel: Unmask upper DSCP bits in ip_tunnel_bind_dev() + - ipv4: ip_tunnel: Unmask upper DSCP bits in ip_md_tunnel_xmit() + - ipv4: ip_tunnel: Unmask upper DSCP bits in ip_tunnel_xmit() + - net: Fix netns for ip_tunnel_init_flow() + - net/mlx5: DR, select MSIX vector 0 for completion queue creation + - net/mlx5e: macsec: Maintain TX SA from encoding_sa + - drm/i915/dg1: Fix power gate sequence. + - net: llc: reset skb->transport_header + - ALSA: usb-audio: US16x08: Initialize array before use + - eth: bcmsysport: fix call balance of priv->clk handling routines + - net: mv643xx_eth: fix an OF node reference leak + - net: sfc: Correct key_len for efx_tc_ct_zone_ht_params + - net: wwan: iosm: Properly check for valid exec stage in ipc_mmio_init() + - net: ti: icssg-prueth: Fix clearing of IEP_CMP_CFG registers during iep_init + - wifi: mac80211: wake the queues in case of failure in resume + - ALSA: hda/ca0132: Use standard HD-audio quirk matching helpers + - ALSA: hda/realtek: Add new alc2xx-fixup-headset-mic model + - sound: usb: enable DSD output for ddHiFi TC44C + - sound: usb: format: don't warn that raw DSD is unsupported + - bpf: fix potential error return + - ksmbd: retry iterate_dir in smb2_query_dir + - smb: client: destroy cfid_put_wq on module exit + - net: usb: qmi_wwan: add Telit FE910C04 compositions + - irqchip/gic: Correct declaration of *percpu_base pointer in union gic_base + - ARC: build: Try to guess GCC variant of cross compiler + - RDMA/bnxt_re: Fix the max WQE size for static WQE support + - modpost: fix input MODULE_DEVICE_TABLE() built for 64-bit on 32-bit host + - modpost: fix the missed iteration for the max bit in do_input() + - ALSA: seq: Check UMP support for midi_version change + - ALSA hda/realtek: Add quirk for Framework F111:000C + - kcov: mark in_softirq_really() as __always_inline + - scripts/sorttable: fix orc_sort_cmp() to maintain symmetry and transitivity + - sky2: Add device ID 11ab:4373 for Marvell 88E8075 + - drm: adv7511: Drop dsi single lane support + - dt-bindings: display: adi,adv7533: Drop single lane support + - fs/proc/task_mmu: fix pagemap flags with PMD THP entries on 32bit + - mm/readahead: fix large folio support in async readahead + - mptcp: fix recvbuffer adjust on sleeping rcvmsg + - mptcp: don't always assume copied data in mptcp_cleanup_rbuf() + - RDMA/bnxt_re: Fix max SGEs for the Work Request + - scsi: hisi_sas: Remove redundant checks for automatic debugfs dump + - platform/x86: hp-wmi: Add thermal profile support for 8BAD boards + - platform/x86: hp-wmi: Fix platform profile option switch bug on Omen and + Victus laptops + - platform/x86: hp-wmi: Fix implementation of the platform_profile_omen_get + function + - platform/x86: hp-wmi: mark 8A15 board for timed OMEN thermal profile + - RDMA/core: Fix ENODEV error for iWARP test over vlan + - net: phy: micrel: Dynamically control external clock of KSZ PHY + - netdev-genl: avoid empty messages in napi get + - net: stmmac: restructure the error path of stmmac_probe_config_dt() + - net/mlx5e: Fix netif state handling + - net/mlx5e: Keep netdev when leave switchdev for devlink set legacy only + - drm/i915/cx0_phy: Fix C10 pll programming sequence + - RDMA/bnxt_re: Fix error recovery sequence + - btrfs: allow swap activation to be interruptible + - perf/x86/intel: Add Arrow Lake U support + - ALSA: hda: cs35l56: Remove calls to + cs35l56_force_sync_asp1_registers_from_cache() + - ALSA: hda/realtek - Add support for ASUS Zen AIO 27 Z272SD_A272SD audio + - spi: spi-cadence-qspi: Disable STIG mode for Altera SoCFPGA. + - ARC: build: disallow invalid PAE40 + 4K page config + - bpf: refactor bpf_helper_changes_pkt_data to use helper number + - bpf: consider that tail calls invalidate packet pointers + - maple_tree: reload mas before the second call for mas_empty_area + - io_uring/rw: fix downgraded mshot read + - wifi: iwlwifi: mvm: Fix __counted_by usage in cfg80211_wowlan_nd_* + - net: ethernet: ti: am65-cpsw: default to round-robin for host port receive + - gve: process XSK TX descriptors as part of RX NAPI + - gve: trigger RX NAPI instead of TX NAPI in gve_xsk_wakeup + - mm: reinstate ability to map write-sealed memfd mappings read-only + - Upstream stable to v6.6.70, v6.12.9 + + * Noble update: upstream stable patchset 2025-04-09 (LP: #2106632) // + CVE-2024-57898 + - wifi: cfg80211: clear link ID from bitmap during link delete after clean up + + * Noble update: upstream stable patchset 2025-04-09 (LP: #2106632) // + CVE-2024-57882 + - mptcp: fix TCP options overflow. + + * Noble update: upstream stable patchset 2025-04-09 (LP: #2106632) // + CVE-2024-57884 + - mm: vmscan: account for free pages to prevent infinite Loop in + throttle_direct_reclaim() + + * Noble update: upstream stable patchset 2025-04-09 (LP: #2106632) // + CVE-2024-57885 + - mm/kmemleak: fix sleeping function called from invalid context at print + message + + * Noble update: upstream stable patchset 2025-04-09 (LP: #2106632) // + CVE-2024-57932 + - gve: guard XDP xmit NDO on existence of xdp queues + + * Noble update: upstream stable patchset 2025-04-09 (LP: #2106632) // + CVE-2024-57933 + - gve: guard XSK operations on the existence of queues + + * Noble update: upstream stable patchset 2025-04-09 (LP: #2106632) // + CVE-2024-57887 + - drm: adv7511: Fix use-after-free in adv7533_attach_dsi() + + * Noble update: upstream stable patchset 2025-04-09 (LP: #2106632) // + CVE-2024-57938 + - net/sctp: Prevent autoclose integer overflow in sctp_association_init() + + * Noble update: upstream stable patchset 2025-04-09 (LP: #2106632) // + CVE-2024-57889 + - pinctrl: mcp23s08: Fix sleeping in atomic context due to regmap locking + + * Noble update: upstream stable patchset 2025-04-09 (LP: #2106632) // + CVE-2024-57890 + - RDMA/uverbs: Prevent integer overflow issue + + * Noble update: upstream stable patchset 2025-04-09 (LP: #2106632) // + CVE-2024-57892 + - ocfs2: fix slab-use-after-free due to dangling pointer dqi_priv + + * Noble update: upstream stable patchset 2025-04-09 (LP: #2106632) // + CVE-2024-57893 + - ALSA: seq: oss: Fix races at processing SysEx messages + + * Noble update: upstream stable patchset 2025-04-09 (LP: #2106632) // + CVE-2024-57895 + - ksmbd: set ATTR_CTIME flags when setting mtime + + * Noble update: upstream stable patchset 2025-04-09 (LP: #2106632) // + CVE-2024-57896 + - btrfs: flush delalloc workers queue before stopping cleaner kthread during + unmount + + * Noble update: upstream stable patchset 2025-04-09 (LP: #2106632) // + CVE-2024-57897 + - drm/amdkfd: Correct the migration DMA map direction + + * Noble update: upstream stable patchset 2025-04-09 (LP: #2106632) // + CVE-2024-57899 + - wifi: mac80211: fix mbss changed flags corruption on 32 bit systems + + * Noble update: upstream stable patchset 2025-04-09 (LP: #2106632) // + CVE-2024-57900 + - ila: serialize calls to nf_register_net_hooks() + + * Noble update: upstream stable patchset 2025-04-09 (LP: #2106632) // + CVE-2024-57901 + - af_packet: fix vlan_get_protocol_dgram() vs MSG_PEEK + + * Noble update: upstream stable patchset 2025-04-09 (LP: #2106632) // + CVE-2024-57902 + - af_packet: fix vlan_get_tci() vs MSG_PEEK + + * Noble update: upstream stable patchset 2025-04-09 (LP: #2106632) // + CVE-2024-57903 + - net: restrict SO_REUSEPORT to inet sockets + + * Noble update: upstream stable patchset 2025-04-09 (LP: #2106632) // + CVE-2024-36476 + - RDMA/rtrs: Ensure 'ib_sge list' is accessible + + * Noble update: upstream stable patchset 2025-04-09 (LP: #2106632) // + CVE-2024-39282 + - net: wwan: t7xx: Fix FSM command timeout issue + + * Noble update: upstream stable patchset 2025-04-09 (LP: #2106632) // + CVE-2024-57801 + - net/mlx5e: Skip restore TC rules for vport rep without loaded flag + + * Noble update: upstream stable patchset 2025-04-09 (LP: #2106632) // + CVE-2024-57802 + - netrom: check buffer length before accessing it + + * Noble update: upstream stable patchset 2025-04-09 (LP: #2106632) // + CVE-2024-57841 + - net: fix memory leak in tcp_conn_request() + + * Noble update: upstream stable patchset 2025-04-09 (LP: #2106632) // + CVE-2024-57931 + - selinux: ignore unknown extended permissions + + * Noble update: upstream stable patchset 2025-04-09 (LP: #2106632) // + CVE-2024-56761 + - x86/fred: Clear WFE in missing-ENDBRANCH #CPs + + * Noble update: upstream stable patchset 2025-04-09 (LP: #2106632) // + CVE-2024-53179 + - smb: client: fix use-after-free of signing key + + * uprobe-related panics during profiling (LP: #2104210) + - uprobes: Fix race in uprobe_free_utask + + * ubuntu_bpf failed to build on Noble / Oracular (LP: #2069407) + - selftests/bpf: Fix compilation failure when CONFIG_NET_FOU!=y + + * nfsd hangs and never recovers after NFS4ERR_DELAY and a connection loss + (LP: #2103564) + - NFSD: Reset cb_seq_status after NFS4ERR_DELAY + + * thermal: Fix temperature readings on intel hardware (LP: #2103427) + - thermal: intel: intel_tcc: Add model checks for temperature registers + - thermal: intel: intel_tcc_cooling: Use a model-specific bitmask for TCC + offset + - hwmon: (coretemp) Extend the bitmask to read temperature to 0xff + + * [SRU] Fix Lenovo M70/90 gen6 micmute key and led (LP: #2101811) + - ALSA: hda/realtek - add supported Mic Mute LED for Lenovo platform + - ALSA: hda: realtek: fix incorrect IS_REACHABLE() usage + + * Noble update: upstream stable patchset 2025-03-22 (LP: #2103869) + - ceph: allocate sparse_ext map only for sparse reads + - mm/vmstat: fix a W=1 clang compiler warning + - tcp_bpf: Charge receive socket buffer in bpf_tcp_ingress() + - tcp_bpf: Add sk_rmem_alloc related logic for tcp_bpf ingress redirection + - bpf: Check negative offsets in __bpf_skb_min_len() + - mtd: diskonchip: Cast an operand to prevent potential overflow + - mtd: rawnand: arasan: Fix double assertion of chip-select + - mtd: rawnand: arasan: Fix missing de-registration of NAND + - phy: qcom-qmp: Fix register name in RX Lane config of SC8280XP + - phy: core: Fix an OF node refcount leakage in _of_phy_get() + - phy: core: Fix an OF node refcount leakage in of_phy_provider_lookup() + - phy: core: Fix that API devm_phy_put() fails to release the phy + - phy: core: Fix that API devm_of_phy_provider_unregister() fails to + unregister the phy provider + - phy: core: Fix that API devm_phy_destroy() fails to destroy the phy + - phy: usb: Toggle the PHY power during init + - phy: rockchip: naneng-combphy: fix phy reset + - dmaengine: mv_xor: fix child node refcount handling in early exit + - dmaengine: dw: Select only supported masters for ACPI devices + - dmaengine: tegra: Return correct DMA status when paused + - dmaengine: fsl-edma: implement the cleanup path of fsl_edma3_attach_pd() + - dmaengine: apple-admac: Avoid accessing registers in probe + - stddef: make __struct_group() UAPI C++-friendly + - tracing/kprobe: Make trace_kprobe's module callback called after jump_label + update + - watchdog: it87_wdt: add PWRGD enable quirk for Qotom QCML04 + - watchdog: mediatek: Add support for MT6735 TOPRGU/WDT + - scsi: qla1280: Fix hw revision numbering for ISP1020/1040 + - udf: Skip parent dir link count update if corrupted + - ALSA: hda/conexant: fix Z60MR100 startup pop issue + - ALSA: sh: Use standard helper for buffer accesses + - smb: server: Fix building with GCC 15 + - regmap: Use correct format specifier for logging range errors + - LoongArch: Fix reserving screen info memory for above-4G firmware + - LoongArch: BPF: Adjust the parameter of emit_jirl() + - platform/x86: asus-nb-wmi: Ignore unknown event 0xCF + - spi: intel: Add Panther Lake SPI controller support + - scsi: mpt3sas: Diag-Reset when Doorbell-In-Use bit is set during driver load + time + - scsi: storvsc: Do not flag MAINTENANCE_IN return of SRB_STATUS_DATA_OVERRUN + as an error + - spi: omap2-mcspi: Fix the IS_ERR() bug for devm_clk_get_optional_enabled() + - blk-mq: register cpuhp callback after hctx is added to xarray table + - blk-mq: move cpuhp callback registering out of q->sysfs_lock + - MIPS: Probe toolchain support of -msym32 + - MIPS: mipsregs: Set proper ISA level for virt extensions + - freezer, sched: Report frozen tasks as 'D' instead of 'R' + - tracing: Constify string literal data member in struct trace_event_call + - io_uring/sqpoll: fix sqpoll error handling races + - i2c: microchip-core: actually use repeated sends + - i2c: imx: add imx7d compatible string for applying erratum ERR007805 + - i2c: microchip-core: fix "ghost" detections + - btrfs: sysfs: fix direct super block member reads + - ALSA: sh: Fix wrong argument order for copy_from_iter() + - block: avoid to reuse `hctx` not removed from cpuhp callback list + - fork: avoid inappropriate uprobe access to invalid mm + - ASoC: SOF: Intel: hda-dai: Do not release the link DMA on STOP + - power: supply: bq24190: Fix BQ24296 Vbus regulator support + - udf: Verify inode link counts before performing rename + - ALSA: ump: Indicate the inactive group in legacy substream names + - ALSA: ump: Update legacy substream names upon FB info update + - scsi: mpi3mr: Synchronize access to ioctl data buffer + - scsi: mpi3mr: Handling of fault code for insufficient power + - objtool: Add bch2_trans_unlocked_error() to bcachefs noreturns + - dmaengine: loongson2-apb: Change GENMASK to GENMASK_ULL + - perf/x86/intel/ds: Add PEBS format 6 + - btrfs: add and use helper to verify the calling task has locked the inode + - btrfs: fix race with memory mapped writes when activating swap file + - btrfs: fix swap file activation failure due to extents that used to be + shared + - ALSA: ump: Shut up truncated string warning + - Upstream stable to v6.6.69, v6.12.8 + + * Noble update: upstream stable patchset 2025-03-22 (LP: #2103869) // + CVE-2024-56758 + - btrfs: check folio mapping after unlock in relocate_one_folio() + + * Noble update: upstream stable patchset 2025-03-22 (LP: #2103869) // + CVE-2024-56759 + - btrfs: fix use-after-free when COWing tree bock and tracing is enabled + + * Noble update: upstream stable patchset 2025-03-22 (LP: #2103869) // + CVE-2024-57806 + - btrfs: fix transaction atomicity bug when enabling simple quotas + + * Noble update: upstream stable patchset 2025-03-22 (LP: #2103869) // + CVE-2024-57793 + - virt: tdx-guest: Just leak decrypted memory on unrecoverable errors + + * Noble update: upstream stable patchset 2025-03-22 (LP: #2103869) // + CVE-2024-56764 + - ublk: detach gendisk from ublk device if add_disk() fails + + * Noble update: upstream stable patchset 2025-03-22 (LP: #2103869) // + CVE-2024-57804 + - scsi: mpi3mr: Fix corrupt config pages PHY state is switched in sysfs + + * Noble update: upstream stable patchset 2025-03-22 (LP: #2103869) // + CVE-2024-57792 + - power: supply: gpio-charger: Fix set charge current limits + + * Noble update: upstream stable patchset 2025-03-22 (LP: #2103869) // + CVE-2024-56760 + - PCI/MSI: Handle lack of irqdomain gracefully + + * Noble update: upstream stable patchset 2025-03-22 (LP: #2103869) // + CVE-2024-56763 + - tracing: Prevent bad count for tracing_cpumask_write + + * Noble update: upstream stable patchset 2025-03-22 (LP: #2103869) // + CVE-2024-57946 + - virtio-blk: don't keep queue frozen during system suspend + + * Noble update: upstream stable patchset 2025-03-22 (LP: #2103869) // + CVE-2024-57807 + - scsi: megaraid_sas: Fix for a potential deadlock + + * Noble update: upstream stable patchset 2025-03-22 (LP: #2103869) // + CVE-2024-56767 + - dmaengine: at_xdmac: avoid null_prt_deref in at_xdmac_prep_dma_memset + + * Noble update: upstream stable patchset 2025-03-22 (LP: #2103869) // + CVE-2024-56769 + - media: dvb-frontends: dib3000mb: fix uninit-value in dib3000_write_reg + + * Noble update: upstream stable patchset 2025-03-14 (LP: #2102266) + - usb: dwc2: gadget: Don't write invalid mapped sg entries into dma_desc with + iommu enabled + - PCI: vmd: Create domain symlink before pci_bus_add_devices() + - PCI: Add ACS quirk for Broadcom BCM5760X NIC + - usb: cdns3-ti: Add workaround for Errata i2409 + - MIPS: Loongson64: DTS: Fix msi node for ls7a + - ASoC: Intel: sof_sdw: fix jack detection on ADL-N variant RVP + - ASoC: Intel: sof_sdw: add quirk for Dell SKU 0B8C + - usb: cdns3: Add quirk flag to enable suspend residency + - platform/x86: p2sb: Make p2sb_get_devfn() return void + - p2sb: Factor out p2sb_read_from_cache() + - p2sb: Introduce the global flag p2sb_hidden_by_bios + - p2sb: Move P2SB hide and unhide code to p2sb_scan_and_cache() + - p2sb: Do not scan and remove the P2SB device when it is unhidden + - i2c: pnx: Fix timeout in wait functions + - xfs: fix the contact address for the sysfs ABI documentation + - xfs: verify buffer, inode, and dquot items every tx commit + - xfs: use consistent uid/gid when grabbing dquots for inodes + - xfs: declare xfs_file.c symbols in xfs_file.h + - xfs: create a new helper to return a file's allocation unit + - xfs: Fix xfs_flush_unmap_range() range for RT + - xfs: Fix xfs_prepare_shift() range for RT + - xfs: convert comma to semicolon + - xfs: fix file_path handling in tracepoints + - xfs: remove unused parameter in macro XFS_DQUOT_LOGRES + - xfs: attr forks require attr, not attr2 + - xfs: conditionally allow FS_XFLAG_REALTIME changes if S_DAX is set + - xfs: Fix the owner setting issue for rmap query in xfs fsmap + - xfs: use XFS_BUF_DADDR_NULL for daddrs in getfsmap code + - xfs: take m_growlock when running growfsrt + - xfs: reset rootdir extent size hint after growfsrt + - tools: hv: change permissions of NetworkManager configuration file + - cxl/pci: Fix potential bogus return value upon successful probing + - cxl/region: Fix region creation for greater than x2 switches + - net/smc: check sndbuf_space again after NOSPACE flag is set in smc_poll + - ionic: use ee->offset when returning sprom data + - net: renesas: rswitch: rework ts tags management + - net: hinic: Fix cleanup in create_rxqs/txqs() + - net: ethernet: bgmac-platform: fix an OF node reference leak + - ipvs: Fix clamp() of ip_vs_conn_tab on small memory systems + - netfilter: ipset: Fix for recursive locking warning + - selftests: openvswitch: fix tcpdump execution + - net: mdiobus: fix an OF node reference leak + - mmc: sdhci-tegra: Remove SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC quirk + - mmc: mtk-sd: disable wakeup in .remove() and in the error path of .probe() + - EDAC/amd64: Simplify ECC check on unified memory controllers + - chelsio/chtls: prevent potential integer overflow on 32bit + - i2c: riic: Always round-up when calculating bus period + - efivarfs: Fix error on non-existent file + - hexagon: Disable constant extender optimization for LLVM prior to 19.1.0 + - USB: serial: option: add TCL IK512 MBIM & ECM + - USB: serial: option: add MeiG Smart SLM770A + - USB: serial: option: add Netprisma LCUK54 modules for WWAN Ready + - USB: serial: option: add MediaTek T7XX compositions + - USB: serial: option: add Telit FE910C04 rmnet compositions + - thunderbolt: Improve redrive mode handling + - drm/panel: novatek-nt35950: fix return value check in nt35950_probe() + - i915/guc: Reset engine utilization buffer before registration + - i915/guc: Ensure busyness counter increases motonically + - i915/guc: Accumulate active runtime on gt reset + - hwmon: (tmp513) Fix interpretation of values of Shunt Voltage and Limit + Registers + - hwmon: (tmp513) Fix Current Register value interpretation + - hwmon: (tmp513) Fix interpretation of values of Temperature Result and Limit + Registers + - zram: refuse to use zero sized block device as backing device + - zram: fix uninitialized ZRAM not releasing backing device + - zram: fix potential UAF of zram table + - vmalloc: fix accounting with i915 + - btrfs: tree-checker: reject inline extent items with 0 ref count + - smb: client: fix TCP timers deadlock after rmmod + - tracing: Fix test_event_printk() to process entire print argument + - tracing: Add missing helper functions in event pointer dereference check + - tracing: Add "%s" check in test_event_printk() + - tracing: Have process_string() also allow arrays + - selftests/memfd: run sysctl tests when PID namespace support is enabled + - selftests/bpf: Use asm constraint "m" for LoongArch + - io_uring: Fix registered ring file refcount leak + - NFS/pnfs: Fix a live lock between recalled layouts and layoutget + - of/irq: Fix interrupt-map cell length check in of_irq_parse_imap_parent() + - of/irq: Fix using uninitialized variable @addr_len in API of_irq_parse_one() + - nilfs2: fix buffer head leaks in calls to truncate_inode_pages() + - udmabuf: also check for F_SEAL_FUTURE_WRITE + - of: Fix error path in of_parse_phandle_with_args_map() + - of: Fix refcount leakage for OF node returned by __of_get_dma_parent() + - ceph: validate snapdirname option length when mounting + - ceph: improve error handling and short/overflow-read logic in + __ceph_sync_read() + - ceph: fix memory leaks in __ceph_sync_read() + - epoll: Add synchronous wakeup support for ep_poll_callback + - io_uring/rw: avoid punting to io-wq directly + - drm/amdgpu: Handle NULL bo->tbo.resource (again) in amdgpu_vm_bo_update + - xfs: sb_spino_align is not verified + - xfs: fix sparse inode limits on runt AG + - xfs: fix sb_spino_align checks for large fsblock sizes + - xfs: fix zero byte checking in the superblock scrubber + - netdev: fix repeated netlink messages in queue dump + - team: Fix feature exposure when no ports are present + - can: m_can: fix missed interrupts with m_can_pci + - netdev-genl: avoid empty messages in queue dump + - KVM: arm64: Do not allow ID_AA64MMFR0_EL1.ASIDbits to be overridden + - KVM: arm64: Fix set_id_regs selftest for ASIDBITS becoming unwritable + - net: mctp: handle skb cleanup on sock_queue failures + - xhci: retry Stop Endpoint on buggy NEC controllers + - usb: xhci: Limit Stop Endpoint retries + - usb: xhci: Avoid queuing redundant Stop Endpoint commands + - xhci: Turn NEC specific quirk for handling Stop Endpoint errors generic + - thunderbolt: Add support for Intel Panther Lake-M/P + - thunderbolt: Don't display nvm_version unless upgrade supported + - drm/panel: st7701: Add prepare_prev_first flag to drm_panel + - drm/panel: synaptics-r63353: Fix regulator unbalance + - drm/amdgpu/nbio7.11: fix IP version check + - drm/amdgpu/nbio7.7: fix IP version check + - fgraph: Still initialize idle shadow stacks when starting + - x86/hyperv: Fix hv tsc page based sched_clock for hibernation + - ocfs2: fix the space leak in LA when releasing LA + - of: property: fw_devlink: Do not use interrupt-parent directly + - of: address: Preserve the flags portion on 1:1 dma-ranges mapping + - Upstream stable to v6.6.68, v6.12.7 + + * Noble update: upstream stable patchset 2025-03-14 (LP: #2102266) // + CVE-2024-56710 + - ceph: fix memory leak in ceph_direct_read_write() + + * Noble update: upstream stable patchset 2025-03-14 (LP: #2102266) // + CVE-2024-53685 + - ceph: give up on paths longer than PATH_MAX + + * Noble update: upstream stable patchset 2025-03-14 (LP: #2102266) // + CVE-2024-54193 + - accel/ivpu: Fix WARN in ivpu_ipc_send_receive_internal() + + * Noble update: upstream stable patchset 2025-03-14 (LP: #2102266) // + CVE-2024-54455 + - accel/ivpu: Fix general protection fault in ivpu_bo_list() + + * Noble update: upstream stable patchset 2025-03-14 (LP: #2102266) // + CVE-2024-53690 + - nilfs2: prevent use of deleted inode + + * Noble update: upstream stable patchset 2025-03-14 (LP: #2102266) // + CVE-2024-56709 + - io_uring: check if iowq is killed before queuing + + * Noble update: upstream stable patchset 2025-03-14 (LP: #2102266) // + CVE-2024-55881 + - KVM: x86: Play nice with protected guests in complete_hypercall_exit() + + * Noble update: upstream stable patchset 2025-03-14 (LP: #2102266) // + CVE-2024-55916 + - Drivers: hv: util: Avoid accessing a ringbuffer not initialized yet + + * Noble update: upstream stable patchset 2025-03-14 (LP: #2102266) // + CVE-2024-56369 + - drm/modes: Avoid divide by zero harder in drm_mode_vrefresh() + + * Noble update: upstream stable patchset 2025-03-14 (LP: #2102266) // + CVE-2024-56372 + - net: tun: fix tun_napi_alloc_frags() + + * Noble update: upstream stable patchset 2025-03-14 (LP: #2102266) // + CVE-2024-56715 + - ionic: Fix netdev notifier unregister on failure + + * Noble update: upstream stable patchset 2025-03-14 (LP: #2102266) // + CVE-2024-56716 + - netdevsim: prevent bad user input in nsim_dev_health_break_write() + + * Noble update: upstream stable patchset 2025-03-14 (LP: #2102266) // + CVE-2024-56717 + - net: mscc: ocelot: fix incorrect IFH SRC_PORT field in + ocelot_ifh_set_basic() + + * Noble update: upstream stable patchset 2025-03-14 (LP: #2102266) // + CVE-2024-57791 + - net/smc: check return value of sock_recvmsg when draining clc data + + * Noble update: upstream stable patchset 2025-03-14 (LP: #2102266) // + CVE-2024-47408 + - net/smc: check smcd_v2_ext_offset when receiving proposal msg + + * Noble update: upstream stable patchset 2025-03-14 (LP: #2102266) // + CVE-2024-49568 + - net/smc: check v2_ext_offset/eid_cnt/ism_gid_cnt when receiving proposal msg + + * Noble update: upstream stable patchset 2025-03-14 (LP: #2102266) // + CVE-2024-49571 + - net/smc: check iparea_offset and ipv6_prefixes_cnt when receiving proposal + msg + + * Noble update: upstream stable patchset 2025-03-14 (LP: #2102266) // + CVE-2024-56718 + - net/smc: protect link down work from execute after lgr freed + + * Noble update: upstream stable patchset 2025-03-14 (LP: #2102266) // + CVE-2024-41013 + - xfs: don't walk off the end of a directory data block + + * Noble update: upstream stable patchset 2025-03-13 (LP: #2102181) + - perf/x86/intel/ds: Unconditionally drain PEBS DS when changing PEBS_DATA_CFG + - ksmbd: fix racy issue from session lookup and expire + - splice: do not checksum AF_UNIX sockets + - tcp: check space before adding MPTCP SYN options + - ALSA: usb-audio: Add implicit feedback quirk for Yamaha THR5 + - usb: host: max3421-hcd: Correctly abort a USB request. + - ata: sata_highbank: fix OF node reference leak in highbank_initialize_phys() + - usb: dwc2: Fix HCD resume + - usb: dwc2: hcd: Fix GetPortStatus & SetPortFeature + - usb: dwc2: Fix HCD port connection race + - scsi: ufs: core: Update compl_time_stamp_local_clock after completing a cqe + - usb: gadget: midi2: Fix interpretation of is_midi1 bits + - usb: ehci-hcd: fix call balance of clocks handling routines + - usb: typec: anx7411: fix fwnode_handle reference leak + - usb: typec: anx7411: fix OF node reference leaks in + anx7411_typec_switch_probe() + - usb: dwc3: xilinx: make sure pipe clock is deselected in usb2 only mode + - drm/i915: Fix memory leak by correcting cache object name in error handler + - xfs: update btree keys correctly when _insrec splits an inode root block + - xfs: don't drop errno values when we fail to ficlone the entire range + - xfs: return from xfs_symlink_verify early on V4 filesystems + - xfs: fix scrub tracepoints when inode-rooted btrees are involved + - xfs: only run precommits once per transaction object + - bpf: Check size for BTF-based ctx access of pointer members + - bpf: Fix theoretical prog_array UAF in __uprobe_perf_func() + - bpf,perf: Fix invalid prog_array access in perf_event_detach_bpf_prog + - bpf, sockmap: Fix update element with same + - wifi: mac80211: init cnt before accessing elem in + ieee80211_copy_mbssid_beacon + - wifi: mac80211: clean up 'ret' in sta_link_apply_parameters() + - wifi: mac80211: fix station NSS capability initialization order + - batman-adv: Do not send uninitialized TT changes + - batman-adv: Remove uninitialized data in full table TT response + - batman-adv: Do not let TT changes list grows indefinitely + - wifi: cfg80211: sme: init n_channels before channels[] access + - selftests: mlxsw: sharedbuffer: Remove h1 ingress test case + - selftests: mlxsw: sharedbuffer: Remove duplicate test cases + - selftests: mlxsw: sharedbuffer: Ensure no extra packets are counted + - ptp: kvm: x86: Return EOPNOTSUPP instead of ENODEV from kvm_arch_ptp_init() + - net: mscc: ocelot: fix memory leak on ocelot_port_add_txtstamp_skb() + - net: mscc: ocelot: improve handling of TX timestamp for unknown skb + - net: mscc: ocelot: ocelot->ts_id_lock and ocelot_port->tx_skbs.lock are IRQ- + safe + - net: mscc: ocelot: be resilient to loss of PTP packets during transmission + - net: mscc: ocelot: perform error cleanup in ocelot_hwstamp_set() + - spi: aspeed: Fix an error handling path in aspeed_spi_[read|write]_user() + - net: sparx5: fix FDMA performance issue + - net: sparx5: fix the maximum frame length register + - ACPI: resource: Fix memory resource type union access + - cxgb4: use port number to set mac addr + - qca_spi: Fix clock speed for multiple QCA7000 + - qca_spi: Make driver probing reliable + - ASoC: amd: yc: Fix the wrong return value + - Documentation: PM: Clarify pm_runtime_resume_and_get() return value + - net: renesas: rswitch: fix race window between tx start and complete + - net: renesas: rswitch: fix leaked pointer on error path + - net: renesas: rswitch: handle stop vs interrupt race + - net: dsa: felix: fix stuck CPU-injected packets with short taprio windows + - netem: Update sch->q.qlen before qdisc_tree_reduce_backlog() + - bonding: Fix feature propagation of NETIF_F_GSO_ENCAP_ALL + - team: Fix feature propagation of NETIF_F_GSO_ENCAP_ALL + - ACPICA: events/evxfregn: don't release the ContextMutex that was never + acquired + - Bluetooth: iso: Fix recursive locking warning + - Bluetooth: SCO: Add support for 16 bits transparent voice setting + - net: renesas: rswitch: fix initial MPIC register setting + - net: dsa: microchip: KSZ9896 register regmap alignment to 32 bit boundaries + - blk-iocost: Avoid using clamp() on inuse in __propagate_weights() + - kselftest/arm64: abi: fix SVCR detection + - KVM: arm64: Disable MPAM visibility by default and ignore VMM writes + - selftests/bpf: remove use of __xlated() + - xen/netfront: fix crash when removing device + - x86: make get_cpu_vendor() accessible from Xen code + - objtool/x86: allow syscall instruction + - x86/static-call: provide a way to do very early static-call updates + - x86/xen: don't do PV iret hypercall through hypercall page + - x86/xen: add central hypercall functions + - x86/xen: fix xen_hypercall_hvm() to not clobber %rbx + - x86/xen: add FRAME_END to xen_hypercall_hvm() + - x86/xen: use new hypercall functions instead of hypercall page + - x86/xen: remove hypercall page + - x86/static-call: fix 32-bit build + - x86/asm: Make serialize() always_inline + - x86/static-call: Remove early_boot_irqs_disabled check to fix Xen PVH dom0 + - serial: sh-sci: Check if TX data was written to device in .tx_empty() + - gpio: ljca: Initialize num before accessing item in ljca_gpio_config + - ALSA: hda/realtek: Fix headset mic on Acer Nitro 5 + - drm/amdkfd: Use device based logging for errors + - drm/amdkfd: pause autosuspend when creating pdd + - drm/amdkfd: fixed page fault when enable MES shader debugger + - drm/i915/color: Stop using non-posted DSB writes for legacy LUT + - drm/amd/pm: Set SMU v13.0.7 default workload type + - xfs: return a 64-bit block count from xfs_btree_count_blocks + - perf machine: Initialize machine->env to address a segfault + - bnxt_en: Fix GSO type for HW GRO packets on 5750X chips + - net: renesas: rswitch: fix possible early skb release + - Bluetooth: Improve setsockopt() handling of malformed user input + - libperf: evlist: Fix --cpu argument on hybrid platform + - selftests: netfilter: Stabilize rpath.sh + - net, team, bonding: Add netdev_base_features helper + - bonding: Fix initial {vlan,mpls}_feature set in bond_compute_features + - team: Fix initial vlan_feature set in __team_compute_features + - drm/xe: fix the ERR_PTR() returned on failure to allocate tiny pt + - Upstream stable to v6.6.67, v6.12.6 + + * Noble update: upstream stable patchset 2025-03-13 (LP: #2102181) // + CVE-2024-56652 + - drm/xe/reg_sr: Remove register pool + + * Noble update: upstream stable patchset 2025-03-13 (LP: #2102181) // + CVE-2024-54460 + - Bluetooth: iso: Fix circular lock in iso_listen_bis + + * Noble update: upstream stable patchset 2025-03-13 (LP: #2102181) // + CVE-2024-57879 + - Bluetooth: iso: Always release hdev at the end of iso_listen_bis + + * Noble update: upstream stable patchset 2025-03-13 (LP: #2102181) // + CVE-2024-56656 + - bnxt_en: Fix aggregation ID mask to prevent oops on 5760X chips + + * Noble update: upstream stable patchset 2025-03-13 (LP: #2102181) // + CVE-2024-53125 + - bpf: sync_linked_regs() must preserve subreg_def + + * Noble update: upstream stable patchset 2025-03-13 (LP: #2102181) // + CVE-2024-56654 + - Bluetooth: hci_event: Fix using rcu_read_(un)lock while iterating + + * Noble update: upstream stable patchset 2025-03-13 (LP: #2102181) // + CVE-2024-56770 + - net/sched: netem: account for backlog updates from child qdisc + + * Noble update: upstream stable patchset 2025-03-13 (LP: #2102181) // + CVE-2024-54683 + - netfilter: IDLETIMER: Fix for possible ABBA deadlock + + * Noble update: upstream stable patchset 2025-03-13 (LP: #2102181) // + CVE-2024-55639 + - net: renesas: rswitch: avoid use-after-put for a device tree node + + * Noble update: upstream stable patchset 2025-03-13 (LP: #2102181) // + CVE-2024-56657 + - ALSA: control: Avoid WARN() for symlink errors + + * Noble update: upstream stable patchset 2025-03-13 (LP: #2102181) // + CVE-2024-56659 + - net: lapb: increase LAPB_HEADER_LEN + + * Noble update: upstream stable patchset 2025-03-13 (LP: #2102181) // + CVE-2024-56660 + - net/mlx5: DR, prevent potential error pointer dereference + + * Noble update: upstream stable patchset 2025-03-13 (LP: #2102181) // + CVE-2024-56662 + - acpi: nfit: vmalloc-out-of-bounds Read in acpi_nfit_ctl + + * Noble update: upstream stable patchset 2025-03-13 (LP: #2102181) // + CVE-2024-56664 + - bpf, sockmap: Fix race between element replace and close() + + * Noble update: upstream stable patchset 2025-03-13 (LP: #2102181) // + CVE-2024-56667 + - drm/i915: Fix NULL pointer dereference in capture_engine + + * Noble update: upstream stable patchset 2025-03-13 (LP: #2102181) // + CVE-2024-56670 + - usb: gadget: u_serial: Fix the issue that gs_start_io crashed due to + accessing null pointer + + * Noble update: upstream stable patchset 2025-03-13 (LP: #2102181) // + CVE-2024-53687 + - riscv: Fix IPIs usage in kfence_protect_page() + + * Noble update: upstream stable patchset 2025-03-13 (LP: #2102181) // + CVE-2024-56675 + - bpf: Fix UAF via mismatching bpf_prog/attachment RCU flavors + + * Noble update: upstream stable patchset 2025-02-04 (LP: #2097393) + - selftests: net: Remove executable bits from library scripts + + * CVE-2024-56653 + - Bluetooth: btmtk: avoid UAF in btmtk_process_coredump + + -- Mehmet Basaran Tue, 15 Apr 2025 20:24:36 +0300 + +linux (6.8.0-58.60) noble; urgency=medium + + * noble/linux: 6.8.0-58.60 -proposed tracker (LP: #2102529) + + * Packaging resync (LP: #1786013) + - [Packaging] update variants + - [Packaging] debian.master/dkms-versions -- update from kernel-versions + (main/2025.03.17) + + * wdat_wdt.ko should be pulled in by linux-image-virtual (LP: #2098554) + - [Packaging]: wdat_wdt.ko is moved from "linux-modules-extra-*-generic" to + "linux-modules-*-generic" + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) + - openrisc: Use asm-generic's version of fix_to_virt() & virt_to_fix() + - iTCO_wdt: mask NMI_NOW bit for update_no_reboot_bit() call + - watchdog: xilinx_wwdt: Calculate max_hw_heartbeat_ms using clock frequency + - watchdog: apple: Actually flush writes after requesting watchdog restart + - watchdog: mediatek: Make sure system reset gets asserted in + mtk_wdt_restart() + - can: gs_usb: add VID/PID for Xylanta SAINT3 product family + - can: gs_usb: add usb endpoint address detection at driver probe step + - can: sun4i_can: sun4i_can_err(): call can_change_state() even if cf is NULL + - can: m_can: m_can_handle_lec_err(): fix {rx,tx}_errors statistics + - can: ifi_canfd: ifi_canfd_handle_lec_err(): fix {rx,tx}_errors statistics + - can: hi311x: hi3110_can_ist(): fix {rx,tx}_errors statistics + - can: sja1000: sja1000_err(): fix {rx,tx}_errors statistics + - can: sun4i_can: sun4i_can_err(): fix {rx,tx}_errors statistics + - can: ems_usb: ems_usb_rx_err(): fix {rx,tx}_errors statistics + - can: f81604: f81604_handle_can_bus_errors(): fix {rx,tx}_errors statistics + - ipvs: fix UB due to uninitialized stack access in ip_vs_protocol_init() + - selftests: hid: fix typo and exit code + - ptp: Add error handling for adjfine callback in ptp_clock_adjtime + - net/sched: tbf: correct backlog statistic for GSO packets + - net: hsr: fix fill_frame_info() regression vs VLAN packets + - platform/x86: asus-wmi: add support for vivobook fan profiles + - platform/x86: asus-wmi: Fix inconsistent use of thermal policies + - platform/x86: asus-wmi: Ignore return value when writing thermal policy + - net/smc: mark optional smcd_ops and check for support when called + - net/smc: add operations to merge sndbuf with peer DMB + - net/smc: {at|de}tach sndbuf to peer DMB if supported + - net/smc: refactoring initialization of smc sock + - net/qed: allow old cards not supporting "num_images" to work + - ixgbevf: stop attempting IPSEC offload on Mailbox API 1.5 + - ixgbe: downgrade logging of unsupported VF API version to debug + - net: sched: fix erspan_opt settings in cls_flower + - netfilter: nft_set_hash: skip duplicated elements pending gc run + - netfilter: nft_set_hash: unaligned atomic read on struct nft_set_ext + - ethtool: Fix wrong mod state in case of verbose and no_mask bitset + - mlxsw: spectrum_acl_flex_keys: Constify struct mlxsw_afk_element_inst + - mlxsw: spectrum_acl_flex_keys: Use correct key block on Spectrum-4 + - net/mlx5e: Remove workaround to avoid syndrome for internal port + - xhci: Allow RPM on the USB controller (1022:43f7) by default + - gpio: grgpio: use a helper variable to store the address of ofdev->dev + - usb: dwc3: gadget: Rewrite endpoint allocation flow + - usb: dwc3: ep0: Don't reset resource alloc flag (including ep0) + - usb: dwc3: ep0: Don't clear ep0 DWC3_EP_TRANSFER_STARTED + - mmc: mtk-sd: use devm_mmc_alloc_host + - mmc: mtk-sd: Fix error handle of probe function + - mmc: mtk-sd: fix devm_clk_get_optional usage + - mmc: mtk-sd: Fix MMC_CAP2_CRYPTO flag setting + - zram: do not mark idle slots that cannot be idle + - zram: clear IDLE flag in mark_idle() + - powerpc/vdso: Refactor CFLAGS for CVDSO build + - powerpc/vdso: Drop -mstack-protector-guard flags in 32-bit files with clang + - ntp: Remove invalid cast in time offset math + - driver core: Add FWLINK_FLAG_IGNORE to completely ignore a fwnode link + - driver core: fw_devlink: Stop trying to optimize cycle detection logic + - drivers: core: fix device leak in __fw_devlink_relax_cycles() + - i3c: master: support to adjust first broadcast address speed + - i3c: master: svc: use slow speed for first broadcast address + - i3c: master: svc: Modify enabled_events bit 7:0 to act as IBI enable counter + - i3c: master: Replace hard code 2 with macro I3C_ADDR_SLOT_STATUS_BITS + - i3c: master: Extend address status bit to 4 and add + I3C_ADDR_SLOT_EXT_DESIRED + - i3c: master: Fix dynamic address leak when 'assigned-address' is present + - i3c: master: Fix missing 'ret' assignment in set_speed() + - drm/bridge: it6505: update usleep_range for RC circuit charge time + - drm/bridge: it6505: Fix inverted reset polarity + - scsi: ufs: core: Always initialize the UIC done completion + - scsi: ufs: core: Add ufshcd_send_bsg_uic_cmd() for UFS BSG + - bpf, vsock: Fix poll() missing a queue + - bpf, vsock: Invoke proto::close on close() + - xsk: always clear DMA mapping information when unmapping the pool + - bpftool: fix potential NULL pointer dereferencing in prog_dump() + - drm/sti: Add __iomem for mixer_dbg_mxn's parameter + - ALSA: seq: ump: Use automatic cleanup of kfree() + - ALSA: ump: Update substream name from assigned FB names + - ALSA: seq: ump: Fix seq port updates per FB info notify + - ALSA: usb-audio: Notify xrun for low-latency mode + - tools: Override makefile ARCH variable if defined, but empty + - ASoC: SOF: ipc3-topology: Convert the topology pin index to ALH dai index + - ASoC: SOF: ipc3-topology: fix resource leaks in + sof_ipc3_widget_setup_comp_dai() + - bpf: Fix narrow scalar spill onto 64-bit spilled scalar slots + - scsi: scsi_debug: Fix hrtimer support for ndelay + - ASoC: mediatek: mt8188-mt6359: Remove hardcoded dmic codec + - drm/v3d: Enable Performance Counters before clearing them + - scatterlist: fix incorrect func name in kernel-doc + - iio: magnetometer: yas530: use signed integer type for clamp limits + - bpf: Handle BPF_EXIST and BPF_NOEXIST for LPM trie + - bpf: Remove unnecessary kfree(im_node) in lpm_trie_update_elem + - bpf: Handle in-place update for full LPM trie correctly + - bpf: Fix exact match conditions in trie_get_next_key() + - x86/CPU/AMD: WARN when setting EFER.AUTOIBRS if and only if the WRMSR fails + - watchdog: rti: of: honor timeout-sec property + - can: mcp251xfd: mcp251xfd_get_tef_len(): work around erratum DS80000789E 6. + - tracing: Fix cmp_entries_dup() to respect sort() comparison rules + - arm64: Ensure bits ASID[15:8] are masked out when the kernel uses 8-bit + ASIDs + - ALSA: usb-audio: add mixer mapping for Corsair HS80 + - ALSA: hda/realtek: Enable mute and micmute LED on HP ProBook 430 G8 + - ALSA: hda/realtek: Add support for Samsung Galaxy Book3 360 (NP730QFG) + - scsi: qla2xxx: Fix abort in bsg timeout + - scsi: qla2xxx: Fix NVMe and NPIV connect issue + - scsi: qla2xxx: Supported speed displayed incorrectly for VPorts + - scsi: qla2xxx: Remove check req_sg_cnt should be equal to rsp_sg_cnt + - scsi: ufs: core: Add missing post notify for power mode change + - fs/smb/client: cifs_prime_dcache() for SMB3 POSIX reparse points + - drm/dp_mst: Verify request type in the corresponding down message reply + - drm/amdgpu/hdp5.2: do a posting read when flushing HDP + - modpost: Add .irqentry.text to OTHER_SECTIONS + - x86/kexec: Restore GDT on return from ::preserve_context kexec + - dma-buf: fix dma_fence_array_signaled v4 + - dma-fence: Fix reference leak on fence merge failure path + - dma-fence: Use kernel's sort for merging fences + - regmap: detach regmap from dev on regmap_exit + - mmc: sdhci-pci: Add DMI quirk for missing CD GPIO on Vexia Edu Atla 10 + tablet + - mmc: core: Further prevent card detect during shutdown + - ocfs2: update seq_file index in ocfs2_dlm_seq_next + - lib: stackinit: hide never-taken branch from compiler + - kasan: make report_lock a raw spinlock + - x86/mm: Add _PAGE_NOPTISHADOW bit to avoid updating userspace page tables + - epoll: annotate racy check + - kselftest/arm64: Log fp-stress child startup errors to stdout + - btrfs: avoid unnecessary device path update for the same device + - btrfs: do not clear read-only when adding sprout device + - kselftest/arm64: Don't leak pipe fds in pac.exec_sign_all() + - hwmon: (nct6775) Add 665-ACE/600M-CL to ASUS WMI monitoring list + - ACPI: x86: Make UART skip quirks work on PCI UARTs without an UID + - perf/x86/amd: Warn only on new bits set + - spi: spi-fsl-lpspi: Adjust type of scldiv + - HID: add per device quirk to force bind to hid-generic + - media: uvcvideo: RealSense D421 Depth module metadata + - media: uvcvideo: Add a quirk for the Kaiweets KTI-W02 infrared camera + - media: cx231xx: Add support for Dexatek USB Video Grabber 1d19:6108 + - mmc: core: Add SD card quirk for broken poweroff notification + - mmc: sdhci-esdhc-imx: enable quirks SDHCI_QUIRK_NO_LED + - regmap: maple: Provide lockdep (sub)class for maple tree's internal lock + - selftests/resctrl: Protect against array overflow when reading strings + - drm/vc4: hdmi: Avoid log spam for audio start failure + - drm/vc4: hvs: Set AXI panic modes for the HVS + - drm: panel-orientation-quirks: Add quirk for AYA NEO 2 model + - drm: panel-orientation-quirks: Add quirk for AYA NEO Founder edition + - drm: panel-orientation-quirks: Add quirk for AYA NEO GEEK + - drm/bridge: it6505: Enable module autoloading + - drm/mcde: Enable module autoloading + - drm/radeon/r600_cs: Fix possible int overflow in r600_packet3_check() + - drm/display: Fix building with GCC 15 + - ALSA: hda: Use own quirk lookup helper + - ALSA: hda/conexant: Use the new codec SSID matching + - r8169: don't apply UDP padding quirk on RTL8126A + - samples/bpf: Fix a resource leak + - net: fec_mpc52xx_phy: Use %pa to format resource_size_t + - net: ethernet: fs_enet: Use %pa to format resource_size_t + - net/sched: cbs: Fix integer overflow in cbs_set_port_rate() + - Bluetooth: L2CAP: handle NULL sock pointer in l2cap_sock_alloc + - wifi: ath5k: add PCI ID for SX76X + - wifi: ath5k: add PCI ID for Arcadyan devices + - fanotify: allow reporting errors on failure to open fd + - drm/panel: simple: Add Microchip AC69T88A LVDS Display panel + - net: sfp: change quirks for Alcatel Lucent G-010S-P + - net: stmmac: Programming sequence for VLAN packets with split header + - drm/sched: memset() 'job' in drm_sched_job_init() + - amdgpu/uvd: get ring reference from rq scheduler + - drm/amdgpu: don't access invalid sched + - drm/amdgpu: clear RB_OVERFLOW bit when enabling interrupts for vega20_ih + - drm/amdgpu: Dereference the ATCS ACPI buffer + - netlink: specs: Add missing bitset attrs to ethtool spec + - drm/amdgpu: refine error handling in amdgpu_ttm_tt_pin_userptr + - fsl/fman: Validate cell-index value obtained from Device Tree + - drm/amdgpu: skip amdgpu_device_cache_pci_state under sriov + - ALSA: usb-audio: Make mic volume workarounds globally applicable + - wifi: ipw2x00: libipw_rx_any(): fix bad alignment + - dsa: qca8k: Use nested lock to avoid splat + - Bluetooth: btusb: Add RTL8852BE device 0489:e123 to device tables + - Bluetooth: Add new quirks for ATS2851 + - Bluetooth: Support new quirks for ATS2851 + - Bluetooth: Set quirks for ATS2851 + - ASoC: hdmi-codec: reorder channel allocation list + - rocker: fix link status detection in rocker_carrier_init() + - net/neighbor: clear error in case strict check is not set + - netpoll: Use rcu_access_pointer() in __netpoll_setup + - pinctrl: freescale: fix COMPILE_TEST error with PINCTRL_IMX_SCU + - tracing/ftrace: disable preemption in syscall probe + - tracing: Use atomic64_inc_return() in trace_clock_counter() + - tools/rtla: fix collision with glibc sched_attr/sched_set_attr + - rtla/timerlat: Make timerlat_top_cpu->*_count unsigned long long + - scsi: ufs: core: Make DMA mask configuration more flexible + - scsi: lpfc: Call lpfc_sli4_queue_unset() in restart and rmmod paths + - clk: qcom: rcg2: add clk_rcg2_shared_floor_ops + - clk: qcom: rpmh: add support for SAR2130P + - clk: qcom: tcsrcc-sm8550: add SAR2130P support + - scsi: st: Don't modify unknown block number in MTIOCGET + - scsi: st: Add MTIOCGET and MTLOAD to ioctls allowed after device reset + - pinctrl: qcom-pmic-gpio: add support for PM8937 + - pinctrl: qcom: spmi-mpp: Add PM8937 compatible + - thermal/drivers/qcom/tsens-v1: Add support for MSM8937 tsens + - nvdimm: rectify the illogical code within nd_dax_probe() + - smb: client: memcpy() with surrounding object base address + - verification/dot2: Improve dot parser robustness + - KMSAN: uninit-value in inode_go_dump (5) + - PCI: qcom: Add support for IPQ9574 + - PCI: vmd: Add DID 8086:B06F and 8086:B60B for Intel client SKUs + - PCI: vmd: Set devices to D0 before enabling PM L1 Substates + - PCI: Detect and trust built-in Thunderbolt chips + - PCI: Add 'reset_subordinate' to reset hierarchy below bridge + - PCI: Add ACS quirk for Wangxun FF5xxx NICs + - f2fs: print message if fscorrupted was found in f2fs_new_node_page() + - ACPI: x86: Add skip i2c clients quirk for Acer Iconia One 8 A1-840 + - ACPI: x86: Clean up Asus entries in acpi_quirk_skip_dmi_ids[] + - fs/ntfs3: Fix case when unmarked clusters intersect with zone + - usb: chipidea: udc: handle USB Error Interrupt if IOC not set + - iio: light: ltr501: Add LTER0303 to the supported devices + - ASoC: amd: yc: fix internal mic on Redmi G 2022 + - drm/amdgpu/vcn: reset fw_shared when VCPU buffers corrupted on vcn v4.0.3 + - drm/amdgpu/vcn: reset fw_shared under SRIOV + - ASoC: amd: yc: Add quirk for microphone on Lenovo Thinkpad T14s Gen 6 + 21M1CTO1WW + - misc: eeprom: eeprom_93cx6: Add quirk for extra read clock cycle + - rtc: cmos: avoid taking rtc_lock for extended period of time + - serial: 8250_dw: Add Sophgo SG2044 quirk + - smb: client: don't try following DFS links in cifs_tree_connect() + - setlocalversion: work around "git describe" performance + - sched/core: Remove the unnecessary need_resched() check in nohz_csd_func() + - sched/fair: Check idle_cpu() before need_resched() to detect ilb CPU turning + busy + - sched/core: Prevent wakeup of ksoftirqd during idle load balance + - btrfs: fix missing snapshot drew unlock when root is dead during swap + activation + - clk: en7523: Initialize num before accessing hws in en7523_register_clocks() + - tracing/eprobe: Fix to release eprobe when failed to add dyn_event + - x86: Fix build regression with CONFIG_KEXEC_JUMP enabled + - Revert "unicode: Don't special case ignorable code points" + - vfio/mlx5: Align the page tracking max message size with the device + capability + - selftests/ftrace: adjust offset for kprobe syntax error test + - KVM: x86/mmu: Ensure that kvm_release_pfn_clean() takes exact pfn from + kvm_faultin_pfn() + - jffs2: Fix rtime decompressor + - mm/damon/vaddr: fix issue in damon_va_evenly_split_region() + - iio: invensense: fix multiple odr switch when FIFO is off + - ocfs2: Revert "ocfs2: fix the la space leak when unmounting an ocfs2 volume" + - ALSA: hda: Fix build error without CONFIG_SND_DEBUG + - usb: dwc3: ep0: Don't reset resource alloc flag + - ALSA: usb-audio: Update UMP group attributes for GTB blocks, too + - platform/x86: asus-wmi: Fix thermal profile initialization + - i3c: master: svc: fix possible assignment of the same address to two devices + - btrfs: drop unused parameter file_offset from + btrfs_encoded_read_regular_fill_pages() + - md/raid5: Wait sync io to finish before changing group cnt + - media: platform: rga: fix 32-bit DMA limitation + - net: phy: dp83869: fix status reporting for 1000base-x autonegotiation + - remoteproc: qcom_q6v5_pas: disable auto boot for wpss + - mtd: spinand: winbond: Fix 512GW and 02JW OOB layout + - PCI: Pass domain number to pci_bus_release_domain_nr() explicitly + - dt-bindings: net: fec: add pps channel property + - net: fec: refactor PPS channel configuration + - net: fec: make PPS channel configurable + - drm/xe/xe_guc_ads: save/restore OA registers and allowlist regs + - drm/xe/migrate: use XE_BO_FLAG_PAGETABLE + - drm/amd: Add some missing straps from NBIO 7.11.0 + - drm/amd: Fix initialization mistake for NBIO 7.11 devices + - drm/amdgpu/pm: Don't use OD table on Arcturus + - drm/amd/pm: Remove arcturus min power limit + - drm/amd/display: update pipe selection policy to check head pipe + - drm/amd/display: Remove PIPE_DTO_SRC_SEL programming from set_dtbclk_dto + - Revert "drm/xe/xe_guc_ads: save/restore OA registers and allowlist regs" + - ipv6: avoid possible NULL deref in modify_prefix_route() + - net: phy: microchip: Reset LAN88xx PHY to ensure clean link state on + LAN7800/7850 + - ice: fix PHY Clock Recovery availability check + - vsock/test: fix failures due to wrong SO_RCVLOWAT parameter + - vsock/test: fix parameter types in SO_VM_SOCKETS_* calls + - mmc: core Convert UNSTUFF_BITS macro to inline function + - mmc: sd: SDUC Support Recognition + - mmc: core: Adjust ACMD22 to SDUC + - mmc: core: Use GFP_NOIO in ACMD22 + - f2fs: clean up w/ F2FS_{BLK_TO_BYTES,BTYES_TO_BLK} + - f2fs: fix to adjust appropriate length for fiemap + - f2fs: fix to requery extent which cross boundary of inquiry + - drm/amd/display: calculate final viewport before TAP optimization + - drm/amd/display: Ignore scalar validation failure if pipe is phantom + - pmdomain: core: Add missing put_device() + - pmdomain: core: Fix error path in pm_genpd_init() when ida alloc fails + - pmdomain: core: add dummy release function to genpd device + - bpf: Ensure reg is PTR_TO_STACK in process_iter_arg + - bpf: Don't mark STACK_INVALID as STACK_MISC in mark_stack_slot_misc + - LoongArch: KVM: Protect kvm_check_requests() with SRCU + - net :mana :Request a V2 response version for MANA_QUERY_GF_STAT + - ALSA: usb-audio: Add extra PID for RME Digiface USB + - ALSA: hda/realtek: fix micmute LEDs don't work on HP Laptops + - scsi: ufs: pltfrm: Disable runtime PM during removal of glue drivers + - io_uring/cmd: document some uring_cmd related helpers + - io_uring: Change res2 parameter type in io_uring_cmd_done + - selftests/damon: add _damon_sysfs.py to TEST_FILES + - drm/amd/display: Correct prefetch calculation + - drm/amd/amdgpu: allow use kiq to do hdp flush under sriov + - drm/amdgpu/hdp6.0: do a posting read when flushing HDP + - drm/amdgpu/hdp4.0: do a posting read when flushing HDP + - drm/amdgpu/hdp5.0: do a posting read when flushing HDP + - x86/cpu/intel: Switch to new Intel CPU model defines + - x86/cpu/intel: Drop stray FAM6 check with new Intel CPU model defines + - x86/cpu: Add Lunar Lake to list of CPUs with a broken MONITOR implementation + - mm/damon: fix order of arguments in damos_before_apply tracepoint + - mm: respect mmap hint address when aligning for THP + - scsi: ufs: pltfrm: Drop PM runtime reference count after ufshcd_remove() + - memblock: allow zero threshold in validate_numa_converage() + - s390/pci: Sort PCI functions prior to creating virtual busses + - s390/pci: Use topology ID for multi-function devices + - s390/pci: Ignore RID for isolated VFs + - s390/pci: Fix SR-IOV for PFs initially in standby + - s390/pci: Pull search for parent PF out of zpci_iov_setup_virtfn() + - s390/pci: Fix handling of isolated VFs + - ext4: partial zero eof block on unaligned inode size extension + - crypto: ecdsa - Convert byte arrays with key coordinates to digits + - crypto: ecc - Prevent ecc_digits_from_bytes from reading too many bytes + - crypto: ecdsa - Rename keylen to bufsize where necessary + - crypto: ecdsa - Use ecc_digits_from_bytes to convert signature + - crypto: ecdsa - Avoid signed integer overflow on signature decoding + - ACPI: video: force native for Apple MacbookPro11,2 and Air7,2 + - cleanup: Adjust scoped_guard() macros to avoid potential warning + - gpio: free irqs that are still requested when the chip is being removed + - media: uvcvideo: Force UVC version to 1.0a for 0408:4035 + - media: uvcvideo: Force UVC version to 1.0a for 0408:4033 + - wifi: mac80211: export ieee80211_purge_tx_queue() for drivers + - drm/amd/display: skip disable CRTC in seemless bootup case + - drm/amd/display: disable SG displays on cyan skillfish + - wifi: mac80211: Add non-atomic station iterator + - accel/qaic: Add AIC080 support + - mptcp: annotate data-races around subflow->fully_established + - net/tcp: Add missing lockdep annotations for TCP-AO hlist traversals + - drm/amd/display: Prune Invalid Modes For HDMI Output + - i2c: i801: Add support for Intel Arrow Lake-H + - i2c: i801: Add support for Intel Panther Lake + - Bluetooth: hci_conn: Reduce hci_conn_drop() calls in two functions + - Bluetooth: btusb: Add new VID/PID 13d3/3602 for MT7925 + - Bluetooth: btusb: Add USB HW IDs for MT7921/MT7922/MT7925 + - Bluetooth: btusb: Add new VID/PID 0489/e111 for MT7925 + - Bluetooth: btusb: Add new VID/PID 0489/e124 for MT7925 + - Bluetooth: btusb: Add 3 HWIDs for MT7925 + - rtla/timerlat: Make timerlat_hist_cpu->*_count unsigned long long + - ring-buffer: Correct stale comments related to non-consuming readers + - ring-buffer: Limit time with disabled interrupts in rb_check_pages() + - scsi: lpfc: Check SLI_ACTIVE flag in FDMI cmpl before submitting follow up + FDMI + - scsi: lpfc: Prevent NDLP reference count underflow in dev_loss_tmo callback + - clk: qcom: clk-alpha-pll: Add support for zonda ole pll configure + - clk: qcom: clk-alpha-pll: Add NSS HUAYRA ALPHA PLL support for ipq9574 + - mailbox: pcc: Check before sending MCTP PCC response ACK + - remoteproc: qcom: pas: Add support for SA8775p ADSP, CDSP and GPDSP + - remoteproc: qcom: pas: enable SAR2130P audio DSP support + - fs/ntfs3: Implement fallocate for compressed files + - fs/ntfs3: Fix warning in ni_fiemap + - regulator: qcom-rpmh: Update ranges for FTSMPS525 + - usb: chipidea: add CI_HDRC_HAS_SHORT_PKT_LIMIT flag + - usb: chipidea: udc: limit usb request length to max 16KB + - usb: chipidea: udc: create bounce buffer for problem sglist entries if + possible + - iio: adc: ad7192: Convert from of specific to fwnode property handling + - iio: adc: ad7192: properly check spi_get_device_match_data() + - usb: typec: ucsi: add callback for connector status updates + - usb: typec: ucsi: glink: move GPIO reading into connector_status callback + - usb: typec: ucsi: add update_connector callback + - usb: typec: ucsi: glink: set orientation aware if supported + - usb: typec: ucsi: glink: be more precise on orientation-aware ports + - usb: typec: ucsi: glink: fix off-by-one in connector_status + - usb: typec: ucsi: Set orientation as none when connector is unplugged + - nvme: use helper nvme_ctrl_state in nvme_keep_alive_finish function + - Revert "nvme: make keep-alive synchronous operation" + - irqchip/gic-v3-its: Avoid explicit cpumask allocation on stack + - irqchip/gicv3-its: Add workaround for hip09 ITS erratum 162100801 + - [Config] updateconfigs for HISILICON_ERRATUM_162100801 + - drm/amd/display: Add option to retrieve detile buffer size + - btrfs: drop unused parameter options from open_ctree() + - btrfs: drop unused parameter data from btrfs_fill_super() + - btrfs: fix mount failure due to remount races + - net/mlx5: unique names for per device caches + - s390/pci: Fix leak of struct zpci_dev when zpci_add_device() fails + - ALSA: hda/realtek: Fix spelling mistake "Firelfy" -> "Firefly" + - softirq: Allow raising SCHED_SOFTIRQ from SMP-call-function on RT kernel + - Upstream stable to v6.6.65, v6.6.66, v6.12.4, v6.12.5 + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-41932 + - sched: fix warning in sched_setaffinity + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-57872 + - scsi: ufs: pltfrm: Dellocate HBA during ufshcd_pltfrm_remove() + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56588 + - scsi: hisi_sas: Create all dump files during debugfs initialization + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-47794 + - bpf: Prevent tailcall infinite loop caused by freplace + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56599 + - wifi: ath10k: avoid NULL pointer error during sdio remove + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56607 + - wifi: ath12k: fix atomic calls in ath12k_mac_op_set_bitrate_mask() + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56608 + - drm/amd/display: Fix out-of-bounds access in 'dcn21_link_encoder_create' + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56609 + - wifi: rtw88: use ieee80211_purge_tx_queue() to purge TX skb + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56782 + - ACPI: x86: Add adev NULL check to acpi_quirk_skip_serdev_enumeration() + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-48876 + - stackdepot: fix stack_depot_save_flags() in NMI context + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56620 + - scsi: ufs: qcom: Only free platform MSIs when ESI is enabled + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56621 + - scsi: ufs: core: Cancel RTC work during ufshcd_remove() + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-49569 + - nvme-rdma: unquiesce admin_q before destroy it + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56632 + - nvme-tcp: fix the memleak while create new ctrl failed + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56647 + - net: Fix icmp host relookup triggering ip_rt_bug + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56775 + - drm/amd/display: Fix handling of plane refcount + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56561 + - PCI: endpoint: Fix PCI domain ID release in pci_epc_destroy() + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56550 + - s390/stacktrace: Use break instead of return statement + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56771 + - mtd: spinand: winbond: Fix 512GW, 01GW, 01JW and 02JW ECC information + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56568 + - iommu/arm-smmu: Defer probe of clients after smmu device bound + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56772 + - kunit: string-stream: Fix a UAF bug in kunit_init_suite() + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56773 + - kunit: Fix potential null dereference in kunit_device_driver_test() + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56580 + - media: qcom: camss: fix error path on configuration of power domains + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-57850 + - jffs2: Prevent rtime decompress memory corruption + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56583 + - sched/deadline: Fix warning in migrate_enable for boosted tasks + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56611 + - mm/mempolicy: fix migrate_to_node() assuming there is at least one VMA in a + MM + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56613 + - sched/numa: fix memory leak due to the overwritten vma->numab_state + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56584 + - io_uring/tctx: work around xa_store() allocation error issue + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56781 + - powerpc/prom_init: Fixup missing powermac #size-cells + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56785 + - MIPS: Loongson64: DTS: Really fix PCIe port nodes for ls7a + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56585 + - LoongArch: Fix sleeping in atomic context for PREEMPT_RT + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-41935 + - f2fs: fix to shrink read extent node in batches + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-43098 + - i3c: Use i3cdev->desc->info instead of calling i3c_device_get_info() to + avoid deadlock + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-45828 + - i3c: mipi-i3c-hci: Mask ring interrupts before ring stop request + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56586 + - f2fs: fix f2fs_bug_on when uninstalling filesystem call f2fs_evict_inode. + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56587 + - leds: class: Protect brightness_show() with led_cdev->led_access mutex + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56786 + - bpf: put bpf_link's program when link is safe to be deallocated + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-47141 + - pinmux: Use sequential access to access desc->pinmux data + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56589 + - scsi: hisi_sas: Add cond_resched() for no forced preemption model + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56590 + - Bluetooth: hci_core: Fix not checking skb length on hci_acldata_packet + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56592 + - bpf: Call free_htab_elem() after htab_unlock_bucket() + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56593 + - wifi: brcmfmac: Fix oops due to NULL pointer dereference in + brcmf_sdiod_sglist_rw() + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56594 + - drm/amdgpu: set the right AMDGPU sg segment limitation + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-57843 + - virtio-net: fix overflow inside virtnet_rq_alloc + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56596 + - jfs: fix array-index-out-of-bounds in jfs_readdir + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56597 + - jfs: fix shift-out-of-bounds in dbSplit + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-47143 + - dma-debug: fix a possible deadlock on radix_lock + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56601 + - net: inet: do not leave a dangling sk pointer in inet_create() + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56602 + - net: ieee802154: do not leave a dangling sk pointer in ieee802154_create() + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56603 + - net: af_can: do not leave a dangling sk pointer in can_create() + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56604 + - Bluetooth: RFCOMM: avoid leaving dangling sk pointer in rfcomm_sock_alloc() + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56605 + - Bluetooth: L2CAP: do not leave dangling sk pointer on error in + l2cap_sock_create() + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56606 + - af_packet: avoid erroring out after sock_init_data() in packet_create() + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-47809 + - dlm: fix possible lkb_resource null dereference + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-48873 + - wifi: rtw89: check return value of ieee80211_probereq_get() for RNR + + * Missing support for USB-C Apple Magic Trackpad (LP: #2098063) // Noble + update: upstream stable patchset 2025-03-12 (LP: #2102118) + - HID: magicmouse: Apple Magic Trackpad 2 USB-C driver support + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56787 + - soc: imx8m: Probe the SoC driver as platform driver + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56610 + - kcsan: Turn report_filterlist_lock into a raw_spinlock + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-48875 + - btrfs: don't take dev_replace rwsem on task already holding it + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-57849 + - s390/cpum_sf: Handle CPU hotplug remove during sampling + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-57876 + - drm/dp_mst: Fix resetting msg rx state after topology removal + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56616 + - drm/dp_mst: Fix MST sideband message body length check + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-48881 + - bcache: revert replacing IS_ERR_OR_NULL with IS_ERR again + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56619 + - nilfs2: fix potential out-of-bounds memory access in nilfs_find_entry() + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56622 + - scsi: ufs: core: sysfs: Prevent div by zero + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56623 + - scsi: qla2xxx: Fix use after free on unload + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-57874 + - arm64: ptrace: fix partial SETREGSET for NT_ARM_TAGGED_ADDR_CTRL + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56625 + - can: dev: can_set_termination(): allow sleeping GPIOs + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56626 + - ksmbd: fix Out-of-Bounds Write in ksmbd_vfs_stream_write + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56628 + - LoongArch: Add architecture specific huge_pte_clear() + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56629 + - HID: wacom: fix when get product name maybe null pointer + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56630 + - ocfs2: free inode when ocfs2_get_init_inode() fails + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56631 + - scsi: sg: Fix slab-use-after-free read in sg_release() + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-50051 + - spi: mpc52xx: Add cancel_work_sync before module remove + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56633 + - tcp_bpf: Fix the sk_mem_uncharge logic in tcp_bpf_sendmsg + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56565 + - f2fs: fix to drop all discards after creating snapshot on lvm device + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56634 + - gpio: grgpio: Add NULL check in grgpio_probe + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56635 + - net: avoid potential UAF in default_operstate() + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56636 + - geneve: do not assume mac header is set in geneve_xmit_skb() + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56637 + - netfilter: ipset: Hold module reference while requesting a module + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56638 + - netfilter: nft_inner: incorrect percpu area handling under softirq + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-52332 + - igb: Fix potential invalid memory access in igb_init_module() + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56640 + - net/smc: fix LGR and link use-after-free issue + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56641 + - net/smc: initialize close_work early to avoid warning + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56643 + - dccp: Fix memory leak in dccp_feat_change_recv + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56644 + - net/ipv6: release expired exception dst cached in socket + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56645 + - can: j1939: j1939_session_new(): fix skb reference counting + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56648 + - net: hsr: avoid potential out-of-bound access in fill_frame_info() + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56649 + - net: enetc: Do not configure preemptible TCs if SIs do not support + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56783 + - netfilter: nft_socket: remove WARN_ON_ONCE on maximum cgroup level + + * Noble update: upstream stable patchset 2025-03-12 (LP: #2102118) // + CVE-2024-56650 + - netfilter: x_tables: fix LED ID check in led_tg_check() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) + - wifi: radiotap: Avoid -Wflex-array-member-not-at-end warnings + - ASoC: codecs: rt5640: Always disable IRQs from rt5640_cancel_work() + - ASoC: Intel: bytcr_rt5640: Add support for non ACPI instantiated codec + - ASoC: Intel: bytcr_rt5640: Add DMI quirk for Vexia Edu Atla 10 tablet + - ASoC: Intel: sst: Support LPE0F28 ACPI HID + - wifi: iwlwifi: mvm: Use the sync timepoint API in suspend + - mac80211: fix user-power when emulating chanctx + - usb: add support for new USB device ID 0x17EF:0x3098 for the r8152 driver + - selftests/watchdog-test: Fix system accidentally reset after watchdog-test + - ALSA: hda/realtek: Add subwoofer quirk for Infinix ZERO BOOK 13 + - x86/amd_nb: Fix compile-testing without CONFIG_AMD_NB + - bpf: fix filed access without lock + - net: usb: qmi_wwan: add Quectel RG650V + - soc: qcom: Add check devm_kasprintf() returned value + - firmware: arm_scmi: Reject clear channel request on A2P + - regulator: rk808: Add apply_bit for BUCK3 on RK809 + - platform/x86: dell-smbios-base: Extends support to Alienware products + - platform/x86: dell-wmi-base: Handle META key Lock/Unlock events + - ASoC: tas2781: Add new driver version for tas2563 & tas2781 qfn chip + - tools/lib/thermal: Remove the thermal.h soft link when doing make clean + - can: j1939: fix error in J1939 documentation. + - platform/x86: thinkpad_acpi: Fix for ThinkPad's with ECFW showing incorrect + fan speed + - ASoC: amd: yc: Support dmic on another model of Lenovo Thinkpad E14 Gen 6 + - ASoC: stm: Prevent potential division by zero in stm32_sai_mclk_round_rate() + - ASoC: stm: Prevent potential division by zero in stm32_sai_get_clk_div() + - drm: panel-orientation-quirks: Make Lenovo Yoga Tab 3 X90F DMI match less + strict + - proc/softirqs: replace seq_printf with seq_put_decimal_ull_width + - ASoC: audio-graph-card2: Purge absent supplies for device tree nodes + - LoongArch: Define a default value for VM_DATA_DEFAULT_FLAGS + - ALSA: usb-audio: Fix Yamaha P-125 Quirk Entry + - ARM: 9420/1: smp: Fix SMP for xip kernels + - ipmr: Fix access to mfc_cache_list without lock held + - mptcp: fix possible integer overflow in mptcp_reset_tout_timer + - arm64: probes: Disable kprobes/uprobes on MOPS instructions + - kselftest/arm64: mte: fix printf type warnings about __u64 + - kselftest/arm64: mte: fix printf type warnings about longs + - s390/cio: Do not unregister the subchannel based on DNV + - s390/pageattr: Implement missing kernel_page_present() + - ext4: avoid remount errors with 'abort' mount option + - mips: asm: fix warning when disabling MIPS_FP_SUPPORT + - m68k: mvme147: Fix SCSI controller IRQ numbers + - m68k: mvme147: Reinstate early console + - arm64: fix .data.rel.ro size assertion when CONFIG_LTO_CLANG + - acpi/arm64: Adjust error handling procedure in gtdt_parse_timer_block() + - cachefiles: Fix missing pos updates in cachefiles_ondemand_fd_write_iter() + - block: fix bio_split_rw_at to take zone_write_granularity into account + - s390/syscalls: Avoid creation of arch/arch/ directory + - ext4: remove calls to to set/clear the folio error flag + - ext4: pipeline buffer reads in mext_page_mkuptodate() + - ext4: remove array of buffer_heads from mext_page_mkuptodate() + - ext4: fix race in buffer_head read fault injection + - nvme-pci: reverse request order in nvme_queue_rqs + - virtio_blk: reverse request order in virtio_queue_rqs + - crypto: qat - remove check after debugfs_create_dir() + - firmware: google: Unregister driver_info on failure + - crypto: qat - remove faulty arbiter config reset + - thermal: core: Initialize thermal zones before registering them + - EDAC/fsl_ddr: Fix bad bit shift operations + - EDAC/skx_common: Differentiate memory error sources + - EDAC/{skx_common,i10nm}: Fix incorrect far-memory error source indicator + - crypto: cavium - Fix the if condition to exit loop after timeout + - amd-pstate: Set min_perf to nominal_perf for active mode performance gov + - crypto: hisilicon/qm - disable same error report before resetting + - crypto: inside-secure - Fix the return value of safexcel_xcbcmac_cra_init() + - doc: rcu: update printed dynticks counter bits + - hwmon: (pmbus_core) Allow to hook PMBUS_SMBALERT_MASK + - hwmon: (pmbus/core) clear faults after setting smbalert mask + - hwmon: (nct6775-core) Fix overflows seen when writing limit attributes + - ACPI: CPPC: Fix _CPC register setting issue + - crypto: caam - add error check to caam_rsa_set_priv_key_form + - crypto: cavium - Fix an error handling path in cpt_ucode_load_fw() + - rcuscale: Do a proper cleanup if kfree_scale_init() fails + - tools/lib/thermal: Make more generic the command encoding function + - thermal/lib: Fix memory leak on error in thermal_genl_auto() + - x86/unwind/orc: Fix unwind for newly forked tasks + - time: Partially revert cleanup on msecs_to_jiffies() documentation + - time: Fix references to _msecs_to_jiffies() handling of values + - kcsan, seqlock: Support seqcount_latch_t + - kcsan, seqlock: Fix incorrect assumption in read_seqbegin() + - clocksource/drivers:sp804: Make user selectable + - clocksource/drivers/timer-ti-dm: Fix child node refcount handling + - spi: spi-fsl-lpspi: Use IRQF_NO_AUTOEN flag in request_irq() + - microblaze: Export xmb_manager functions + - arm64: dts: mt8195: Fix dtbs_check error for mutex node + - arm64: dts: mt8195: Fix dtbs_check error for infracfg_ao node + - soc: ti: smartreflex: Use IRQF_NO_AUTOEN flag in request_irq() + - arm64: dts: qcom: sm6350: Fix GPU frequencies missing on some speedbins + - ARM: dts: microchip: sam9x60: Add missing property atmel,usart-mode + - mmc: mmc_spi: drop buggy snprintf() + - openrisc: Implement fixmap to fix earlycon + - efi/libstub: fix efi_parse_options() ignoring the default command line + - tpm: fix signed/unsigned bug when checking event logs + - media: i2c: ds90ub960: Fix missing return check on ub960_rxport_read call + - arm64: dts: mt8183: krane: Fix the address of eeprom at i2c4 + - arm64: dts: mt8183: kukui: Fix the address of eeprom at i2c4 + - arm64: dts: mediatek: mt8173-elm-hana: Add vdd-supply to second source + trackpad + - Revert "cgroup: Fix memory leak caused by missing cgroup_bpf_offline" + - cgroup/bpf: only cgroup v2 can be attached by bpf programs + - regulator: rk808: Restrict DVS GPIOs to the RK808 variant only + - arm64: dts: mt8183: fennel: add i2c2's i2c-scl-internal-delay-ns + - arm64: dts: mt8183: burnet: add i2c2's i2c-scl-internal-delay-ns + - arm64: dts: mt8183: cozmo: add i2c2's i2c-scl-internal-delay-ns + - arm64: dts: mt8183: Damu: add i2c2's i2c-scl-internal-delay-ns + - pwm: imx27: Workaround of the pwm output bug when decrease the duty cycle + - ARM: dts: cubieboard4: Fix DCDC5 regulator constraints + - arm64: dts: ti: k3-j7200: use ti,j7200-padconf compatible + - arm64: dts: ti: k3-j7200: Fix register map for main domain pmx + - arm64: dts: ti: k3-j7200: Fix clock ids for MCSPI instances + - arm64: dts: ti: k3-j721e: Fix clock IDs for MCSPI instances + - arm64: dts: ti: k3-j721s2: Fix clock IDs for MCSPI instances + - um: Unconditionally call unflatten_device_tree() + - x86/of: Unconditionally call unflatten_and_copy_device_tree() + - of/fdt: add dt_phys arg to early_init_dt_scan and early_init_dt_verify + - riscv: Fix wrong usage of __pa() on a fixmap address + - pmdomain: ti-sci: Add missing of_node_put() for args.np + - spi: tegra210-quad: Avoid shift-out-of-bounds + - spi: zynqmp-gqspi: Undo runtime PM changes at driver exit time​ + - regmap: irq: Set lockdep class for hierarchical IRQ domains + - arm64: dts: renesas: hihope: Drop #sound-dai-cells + - arm64: dts: mediatek: Add ADC node on MT6357, MT6358, MT6359 PMICs + - arm64: dts: mediatek: mt6358: fix dtbs_check error + - arm64: dts: mediatek: mt8183-kukui-jacuzzi: Fix DP bridge supply names + - arm64: dts: mediatek: mt8183-kukui-jacuzzi: Add supplies for fixed + regulators + - selftests/resctrl: Split fill_buf to allow tests finer-grained control + - selftests/resctrl: Refactor fill_buf functions + - selftests/resctrl: Fix memory overflow due to unhandled wraparound + - selftests/resctrl: Protect against array overrun during iMC config parsing + - arm64: dts: rockchip: correct analog audio name on Indiedroid Nova + - platform/x86: panasonic-laptop: Return errno correctly in show callback + - drm/mm: Mark drm_mm_interval_tree*() functions with __maybe_unused + - drm/vc4: hvs: Don't write gamma luts on 2711 + - drm/vc4: hvs: Fix dlist debug not resetting the next entry pointer + - drm/vc4: hvs: Remove incorrect limit from hvs_dlist debugfs function + - drm/vc4: hvs: Correct logic on stopping an HVS channel + - drm/omap: Fix possible NULL dereference + - drm/omap: Fix locking in omap_gem_new_dmabuf() + - wifi: p54: Use IRQF_NO_AUTOEN flag in request_irq() + - wifi: mwifiex: Use IRQF_NO_AUTOEN flag in request_irq() + - drm/imx/dcss: Use IRQF_NO_AUTOEN flag in request_irq() + - drm/imx/ipuv3: Use IRQF_NO_AUTOEN flag in request_irq() + - drm/v3d: Address race-condition in MMU flush + - wifi: ath10k: fix invalid VHT parameters in supported_vht_mcs_rate_nss1 + - wifi: ath10k: fix invalid VHT parameters in supported_vht_mcs_rate_nss2 + - dt-bindings: vendor-prefixes: Add NeoFidelity, Inc + - ASoC: fsl_micfil: fix regmap_write_bits usage + - ASoC: dt-bindings: mt6359: Update generic node name and dmic-mode + - drm/bridge: anx7625: Drop EDID cache on bridge power off + - drm/bridge: it6505: Drop EDID cache on bridge power off + - libbpf: Fix expected_attach_type set handling in program load callback + - libbpf: Fix output .symtab byte-order during linking + - bpf: Fix the xdp_adjust_tail sample prog issue + - wifi: ath11k: Fix CE offset address calculation for WCN6750 in SSR + - ice: consistently use q_idx in ice_vc_cfg_qs_msg() + - drm/vc4: Match drm_dev_enter and exit calls in vc4_hvs_atomic_flush + - libbpf: fix sym_is_subprog() logic for weak global subprogs + - ASoC: rt722-sdca: Remove logically deadcode in rt722-sdca.c + - libbpf: never interpret subprogs in .text as entry programs + - netdevsim: copy addresses for both in and out paths + - drm/bridge: tc358767: Fix link properties discovery + - selftests/bpf: Fix msg_verify_data in test_sockmap + - selftests/bpf: Fix txmsg_redir of test_txmsg_pull in test_sockmap + - drm: fsl-dcu: enable PIXCLK on LS1021A + - drm/msm/dpu: on SDM845 move DSPP_3 to LM_5 block + - drm/msm/dpu: drop LM_3 / LM_4 on SDM845 + - drm/msm/dpu: drop LM_3 / LM_4 on MSM8998 + - selftests/bpf: fix test_spin_lock_fail.c's global vars usage + - drm/panfrost: Remove unused id_mask from struct panfrost_model + - bpf, arm64: Remove garbage frame for struct_ops trampoline + - drm/msm/adreno: Use IRQF_NO_AUTOEN flag in request_irq() + - drm/msm/gpu: Check the status of registration to PM QoS + - drm/etnaviv: Request pages from DMA32 zone on addressing_limited + - drm/etnaviv: hold GPU lock across perfmon sampling + - wifi: wfx: Fix error handling in wfx_core_init() + - drm/msm/dpu: cast crtc_clk calculation to u64 in _dpu_core_perf_calc_clk() + - bpf, bpftool: Fix incorrect disasm pc + - drm/vkms: Drop unnecessary call to drm_crtc_cleanup() + - drm: use ATOMIC64_INIT() for atomic64_t + - netfilter: nf_tables: avoid false-positive lockdep splat on rule deletion + - netfilter: nf_tables: must hold rcu read lock while iterating expression + type list + - netfilter: nf_tables: skip transaction if update object is not implemented + - netfilter: nf_tables: must hold rcu read lock while iterating object type + list + - netlink: typographical error in nlmsg_type constants definition + - selftests/bpf: Add txmsg_pass to pull/push/pop in test_sockmap + - selftests/bpf: Fix SENDPAGE data logic in test_sockmap + - selftests/bpf: Fix total_bytes in msg_loop_rx in test_sockmap + - selftests/bpf: Add push/pop checking for msg_verify_data in test_sockmap + - bpf, sockmap: Several fixes to bpf_msg_push_data + - bpf, sockmap: Fix sk_msg_reset_curr + - sock_diag: add module pointer to "struct sock_diag_handler" + - sock_diag: allow concurrent operations + - sock_diag: allow concurrent operation in sock_diag_rcv_msg() + - net: use unrcu_pointer() helper + - selftests: net: really check for bg process completion + - drm/amdkfd: Fix wrong usage of INIT_WORK() + - bpf: Force uprobe bpf program to always return 0 + - net: rfkill: gpio: Add check for clk_enable() + - netpoll: Use rcu_access_pointer() in netpoll_poll_lock + - wireguard: selftests: load nf_conntrack if not present + - cppc_cpufreq: Use desired perf if feedback ctrs are 0 or unchanged + - clk: mediatek: drop two dead config options + - [Config] drop COMMON_CLK_MT8195_AUDSYS and COMMON_CLK_MT8195_MSDC + - trace/trace_event_perf: remove duplicate samples on the first tracepoint + event + - pinctrl: zynqmp: drop excess struct member description + - scsi: hisi_sas: Enable all PHYs that are not disabled by user during + controller reset + - mfd: tps65010: Use IRQF_NO_AUTOEN flag in request_irq() to fix race + - mfd: da9052-spi: Change read-mask to write-mask + - cpufreq: loongson2: Unregister platform_driver on failure + - powerpc/fadump: Refactor and prepare fadump_cma_init for late init + - mtd: hyperbus: rpc-if: Add missing MODULE_DEVICE_TABLE + - mtd: rawnand: atmel: Fix possible memory leak + - mtd: rawnand: fix double free in atmel_pmecc_create_user() + - mtd: spi-nor: spansion: Use nor->addr_nbytes in octal DTR mode in + RD_ANY_REG_OP + - RDMA/hns: Fix an AEQE overflow error caused by untimely update of eq_db_ci + - RDMA/hns: Use dev_* printings in hem code instead of ibdev_* + - RDMA/bnxt_re: Check cqe flags to know imm_data vs inv_irkey + - clk: sunxi-ng: d1: Fix PLL_AUDIO0 preset + - clk: renesas: rzg2l: Fix FOUTPOSTDIV clk + - RDMA/rxe: Set queue pair cur_qp_state when being queried + - RISC-V: KVM: Fix APLIC in_clrip and clripnum write emulation + - clk: imx: lpcg-scu: SW workaround for errata (e10858) + - clk: imx: fracn-gppll: correct PLL initialization flow + - clk: imx: fracn-gppll: fix pll power up + - clk: imx: clk-scu: fix clk enable state save and restore + - clk: imx: imx8-acm: Fix return value check in + clk_imx_acm_attach_pm_domains() + - iommu/vt-d: Fix checks and print in dmar_fault_dump_ptes() + - iommu/vt-d: Fix checks and print in pgtable_walk() + - checkpatch: check for missing Fixes tags + - checkpatch: always parse orig_commit in fixes tag + - mfd: rt5033: Fix missing regmap_del_irq_chip() + - fs/proc/kcore.c: fix coccinelle reported ERROR instances + - scsi: fusion: Remove unused variable 'rc' + - scsi: sg: Enable runtime power management + - x86/tdx: Introduce wrappers to read and write TD metadata + - x86/tdx: Rename tdx_parse_tdinfo() to tdx_setup() + - x86/tdx: Dynamically disable SEPT violations from causing #VEs + - RDMA/hns: Fix out-of-order issue of requester when setting FENCE + - cpufreq: CPPC: Fix wrong return value in cppc_get_cpu_cost() + - cpufreq: CPPC: Fix wrong return value in cppc_get_cpu_power() + - dax: delete a stale directory pmem + - KVM: PPC: Book3S HV: Stop using vc->dpdes for nested KVM guests + - KVM: PPC: Book3S HV: Avoid returning to nested hypervisor on pending + doorbells + - powerpc/sstep: make emulate_vsx_load and emulate_vsx_store static + - powerpc/kexec: Fix return of uninitialized variable + - IB/mlx5: Allocate resources just before first QP/SRQ is created + - clk: ralink: mtmips: fix clock plan for Ralink SoC RT3883 + - clk: ralink: mtmips: remove duplicated 'xtal' clock for Ralink SoC RT3883 + - dt-bindings: clock: axi-clkgen: include AXI clk + - clk: clk-axi-clkgen: make sure to enable the AXI bus clock + - arm64: dts: qcom: sc8180x: Add a SoC-specific compatible to cpufreq-hw + - pinctrl: k210: Undef K210_PC_DEFAULT + - smb: cached directories can be more than root file handle + - mailbox: arm_mhuv2: clean up loop in get_irq_chan_comb() + - perf cs-etm: Don't flush when packet_queue fills up + - gfs2: Get rid of gfs2_glock_queue_put in signal_our_withdraw + - gfs2: Replace gfs2_glock_queue_put with gfs2_glock_put_async + - gfs2: Rename GLF_VERIFY_EVICT to GLF_VERIFY_DELETE + - gfs2: Allow immediate GLF_VERIFY_DELETE work + - gfs2: Fix unlinked inode cleanup + - perf stat: Close cork_fd when create_perf_stat_counter() failed + - perf stat: Fix affinity memory leaks on error path + - perf trace: Keep exited threads for summary + - perf test attr: Add back missing topdown events + - f2fs: compress: fix inconsistent update of i_blocks in + release_compress_blocks and reserve_compress_blocks + - perf probe: Fix libdw memory leak + - perf probe: Correct demangled symbols in C++ program + - rust: macros: fix documentation of the paste! macro + - PCI: cpqphp: Use PCI_POSSIBLE_ERROR() to check config reads + - PCI: cpqphp: Fix PCIBIOS_* return value confusion + - perf ftrace latency: Fix unit on histogram first entry when using --use-nsec + - f2fs: fix the wrong f2fs_bug_on condition in f2fs_do_replace_block + - f2fs: check curseg->inited before write_sum_page in change_curseg + - f2fs: fix to avoid use GC_AT when setting gc_mode as GC_URGENT_LOW or + GC_URGENT_MID + - PCI: cadence: Extract link setup sequence from cdns_pcie_host_setup() + - PCI: cadence: Set cdns_pcie_host_init() global + - PCI: j721e: Add reset GPIO to struct j721e_pcie + - PCI: j721e: Use T_PERST_CLK_US macro + - PCI: j721e: Add suspend and resume support + - PCI: j721e: Deassert PERST# after a delay of PCIE_T_PVPERL_MS milliseconds + - f2fs: fix to avoid forcing direct write to use buffered IO on inline_data + inode + - perf trace: avoid garbage when not printing a trace event's arguments + - m68k: mcfgpio: Fix incorrect register offset for CONFIG_M5441x + - m68k: coldfire/device.c: only build FEC when HW macros are defined + - perf list: Fix topic and pmu_name argument order + - perf trace: Fix tracing itself, creating feedback loops + - perf trace: Do not lose last events in a race + - perf trace: Avoid garbage when not printing a syscall's arguments + - remoteproc: qcom: pas: add minidump_id to SM8350 resources + - rpmsg: glink: use only lower 16-bits of param2 for CMD_OPEN name length + - remoteproc: qcom_q6v5_mss: Re-order writes to the IMEM region + - nfsd: restore callback functionality for NFSv4.0 + - NFSD: Cap the number of bytes copied by nfs4_reset_recoverydir() + - NFSD: Fix nfsd4_shutdown_copy() + - hwmon: (tps23861) Fix reporting of negative temperatures + - vdpa/mlx5: Fix suboptimal range on iotlb iteration + - selftests/mount_setattr: Fix failures on 64K PAGE_SIZE kernels + - gpio: zevio: Add missed label initialisation + - fs_parser: update mount_api doc to match function signature + - LoongArch: Fix build failure with GCC 15 (-std=gnu23) + - LoongArch: BPF: Sign-extend return values + - power: supply: core: Remove might_sleep() from power_supply_put() + - power: supply: bq27xxx: Fix registers of bq27426 + - power: supply: rt9471: Fix wrong WDT function regfield declaration + - power: supply: rt9471: Use IC status regfield to report real charger status + - net: usb: lan78xx: Fix memory leak on device unplug by freeing PHY device + - tg3: Set coherent DMA mask bits to 31 for BCM57766 chipsets + - net: usb: lan78xx: Fix refcounting and autosuspend on invalid WoL + configuration + - net: microchip: vcap: Add typegroup table terminators in kunit tests + - net/ipv6: delete temporary address if mngtmpaddr is removed or unmanaged + - net: mdio-ipq4019: add missing error check + - marvell: pxa168_eth: fix call balance of pep->clk handling routines + - net: stmmac: dwmac-socfpga: Set RX watchdog interrupt as broken + - octeontx2-af: RPM: Fix mismatch in lmac type + - octeontx2-af: RPM: Fix low network performance + - octeontx2-pf: Reset MAC stats during probe + - octeontx2-af: RPM: fix stale RSFEC counters + - octeontx2-af: RPM: fix stale FCFEC counters + - octeontx2-af: Quiesce traffic before NIX block reset + - spi: atmel-quadspi: Fix register name in verbose logging function + - net: hsr: fix hsr_init_sk() vs network/transport headers. + - bnxt_en: Reserve rings after PCIe AER recovery if NIC interface is down + - bnxt_en: Refactor bnxt_ptp_init() + - bnxt_en: Unregister PTP during PCI shutdown and suspend + - llc: Improve setsockopt() handling of malformed user input + - rxrpc: Improve setsockopt() handling of malformed user input + - tcp: Fix use-after-free of nreq in reqsk_timer_handler(). + - ip6mr: fix tables suspicious RCU usage + - ipmr: fix tables suspicious RCU usage + - iio: light: al3010: Fix an error handling path in al3010_probe() + - usb: using mutex lock and supporting O_NONBLOCK flag in iowarrior_read() + - usb: yurex: make waiting on yurex_write interruptible + - USB: chaoskey: fail open after removal + - USB: chaoskey: Fix possible deadlock chaoskey_list_lock + - misc: apds990x: Fix missing pm_runtime_disable() + - counter: stm32-timer-cnt: Add check for clk_enable() + - counter: ti-ecap-capture: Add check for clk_enable() + - ALSA: hda/realtek: Update ALC256 depop procedure + - drm/radeon: add helper rdev_to_drm(rdev) + - drm/radeon: change rdev->ddev to rdev_to_drm(rdev) + - drm/radeon: Fix spurious unplug event on radeon HDMI + - apparmor: fix 'Do simple duplicate message elimination' + - ASoC: amd: yc: Fix for enabling DMIC on acp6x via _DSD entry + - gfs2: Don't set GLF_LOCK in gfs2_dispose_glock_lru + - gfs2: Remove and replace gfs2_glock_queue_work + - f2fs: fix fiemap failure issue when page size is 16KB + - usb: ehci-spear: fix call balance of sehci clk handling routines + - ALSA: usb-audio: Fix a DMA to stack memory bug + - ASoC: Intel: sst: Fix used of uninitialized ctx to log an error + - soc: qcom: socinfo: fix revision check in qcom_socinfo_probe() + - ext4: supress data-race warnings in ext4_free_inodes_{count,set}() + - ext4: fix FS_IOC_GETFSMAP handling + - jfs: xattr: check invalid xattr size more strictly + - ASoC: amd: yc: Add a quirk for microfone on Lenovo ThinkPad P14s Gen 5 + 21MES00B00 + - ASoC: codecs: Fix atomicity violation in snd_soc_component_get_drvdata() + - perf/x86/intel/pt: Fix buffer full but size is 0 case + - crypto: x86/aegis128 - access 32-bit arguments as 32-bit + - KVM: x86/mmu: Skip the "try unsync" path iff the old SPTE was a leaf SPTE + - powerpc/pseries: Fix KVM guest detection for disabling hardlockup detector + - KVM: arm64: vgic-v3: Sanitise guest writes to GICR_INVLPIR + - KVM: arm64: Ignore PMCNTENSET_EL0 while checking for overflow status + - KVM: arm64: vgic-its: Clear ITE when DISCARD frees an ITE + - KVM: arm64: vgic-its: Add a data length check in vgic_its_save_* + - KVM: arm64: vgic-its: Clear DTE when MAPD unmaps a device + - fsnotify: fix sending inotify event with unexpected filename + - tty: ldsic: fix tty_ldisc_autoload sysctl's proc_handler + - locking/lockdep: Avoid creating new name string literals in + lockdep_set_subclass() + - tools/nolibc: s390: include std.h + - pinctrl: qcom: spmi: fix debugfs drive strength + - dt-bindings: iio: dac: ad3552r: fix maximum spi speed + - exfat: fix uninit-value in __exfat_get_dentry_set + - Bluetooth: Fix type of len in rfcomm_sock_getsockopt{,_old}() + - Compiler Attributes: disable __counted_by for clang < 19.1.3 + - usb: xhci: Fix TD invalidation under pending Set TR Dequeue + - ARM: dts: omap36xx: declare 1GHz OPP as turbo again + - wifi: brcmfmac: release 'root' node in all execution paths + - Revert "usb: gadget: composite: fix OS descriptors w_value logic" + - gpio: exar: set value when external pull-up or pull-down is present + - spi: Fix acpi deferred irq probe + - cpufreq: mediatek-hw: Fix wrong return value in mtk_cpufreq_get_cpu_power() + - cifs: support mounting with alternate password to allow password rotation + - parisc/ftrace: Fix function graph tracing disablement + - platform/chrome: cros_ec_typec: fix missing fwnode reference decrement + - ubi: wl: Put source PEB into correct list if trying locking LEB failed + - dt-bindings: serial: rs485: Fix rs485-rts-delay property + - serial: 8250_fintek: Add support for F81216E + - serial: 8250: omap: Move pm_runtime_get_sync + - iio: gts: Fix uninitialized symbol 'ret' + - ublk: fix ublk_ch_mmap() for 64K page size + - arm64: tls: Fix context-switching of tpidrro_el0 when kpti is enabled + - block: fix missing dispatching request when queue is started or unquiesced + - block: fix ordering between checking QUEUE_FLAG_QUIESCED request adding + - block: fix ordering between checking BLK_MQ_S_STOPPED request adding + - blk-mq: Make blk_mq_quiesce_tagset() hold the tag list mutex less long + - HID: wacom: Interpret tilt data from Intuos Pro BT as signed values + - soc: fsl: rcpm: fix missing of_node_put() in copy_ippdexpcr1_setting() + - media: v4l2-core: v4l2-dv-timings: check cvt/gtf result + - ALSA: ump: Fix evaluation of MIDI 1.0 FB info + - ALSA: hda/realtek: Update ALC225 depop procedure + - ALSA: hda/realtek: Fixup ALC225 depop procedure + - ALSA: hda/realtek: Set PCBeep to default value for ALC274 + - ALSA: hda/realtek: Fix Internal Speaker and Mic boost of Infinix Y4 Max + - ALSA: hda/realtek: Apply quirk for Medion E15433 + - smb3: request handle caching when caching directories + - smb: client: handle max length for SMB symlinks + - cifs: Add tracing for the cifs_tcon struct refcounting + - usb: dwc3: gadget: Fix checking for number of TRBs left + - ublk: fix error code for unsupported command + - lib: string_helpers: silence snprintf() output truncation warning + - um: Fix the return value of elf_core_copy_task_fpregs + - um: Always dump trace for specified task in show_stack + - rtc: st-lpc: Use IRQF_NO_AUTOEN flag in request_irq() + - rtc: abx80x: Fix WDT bit position of the status register + - ubi: fastmap: wl: Schedule fm_work if wear-leveling pool is empty + - ubifs: Correct the total block count by deducting journal reservation + - jffs2: fix use of uninitialized variable + - rtc: rzn1: fix BCD to rtc_time conversion errors + - nvme-multipath: prepare for "queue-depth" iopolicy + - nvme-multipath: implement "queue-depth" iopolicy + - nvme-multipath: avoid hang on inaccessible namespaces + - nvme/multipath: Fix RCU list traversal to use SRCU primitive + - block: return unsigned int from bdev_io_min + - 9p/xen: fix init sequence + - perf/arm-smmuv3: Fix lockdep assert in ->event_init() + - perf/arm-cmn: Ensure port and device id bits are set properly + - smb: client: disable directory caching when dir_cache_timeout is zero + - cifs: Fix parsing native symlinks relative to the export + - cifs: Fix parsing reparse point with native symlink in SMB1 non-UNICODE + session + - rtc: ab-eoz9: don't fail temperature reads on undervoltage notification + - init/modpost: conditionally check section mismatch to __meminit* + - Rename .data.unlikely to .data..unlikely + - Rename .data.once to .data..once to fix resetting WARN*_ONCE + - modpost: remove incorrect code in do_eisa_entry() + - cifs: during remount, make sure passwords are in sync + - cifs: unlock on error in smb3_reconfigure() + - nfs: ignore SB_RDONLY when mounting nfs + - SUNRPC: timeout and cancel TLS handshake with -ETIMEDOUT + - xfs: remove unknown compat feature check in superblock write validation + - btrfs: don't loop for nowait writes when checking for cross references + - md/md-bitmap: Add missing destroy_work_on_stack() + - arm64: dts: allwinner: pinephone: Add mount matrix to accelerometer + - arm64: dts: freescale: imx8mm-verdin: Fix SD regulator startup delay + - arm64: dts: ti: k3-am62-verdin: Fix SD regulator startup delay + - media: i2c: dw9768: Fix pm_runtime_set_suspended() with runtime pm enabled + - arm64: dts: freescale: imx8mp-verdin: Fix SD regulator startup delay + - media: imx-jpeg: Fix potential error pointer dereference in detach_pm() + - media: verisilicon: av1: Fix reference video buffer pointer assignment + - media: platform: exynos4-is: Fix an OF node reference leak in + fimc_md_is_isp_available + - media: amphion: Fix pm_runtime_set_suspended() with runtime pm enabled + - media: venus: Fix pm_runtime_set_suspended() with runtime pm enabled + - media: gspca: ov534-ov772x: Fix off-by-one error in set_frame_rate() + - media: uvcvideo: Stop stream during unregister + - maple_tree: refine mas_store_root() on storing NULL + - vmstat: call fold_vm_zone_numa_events() before show per zone NUMA event + - zram: clear IDLE flag after recompression + - iommu/io-pgtable-arm: Fix stage-2 map/unmap for concatenated tables + - leds: lp55xx: Remove redundant test for invalid channel number + - clk: qcom: gcc-qcs404: fix initial rate of GPLL3 + - ARM: 9429/1: ioremap: Sync PGDs for VMALLOC shadow + - ARM: 9430/1: entry: Do a dummy read from VMAP shadow + - ARM: 9431/1: mm: Pair atomic_set_release() with _read_acquire() + - ceph: extract entity name from device id + - util_macros.h: fix/rework find_closest() macros + - scsi: ufs: exynos: Fix hibern8 notify callbacks + - i3c: master: svc: Fix pm_runtime_set_suspended() with runtime pm enabled + - PCI: keystone: Set mode as Root Complex for "ti,keystone-pcie" compatible + - PCI: keystone: Add link up check to ks_pcie_other_map_bus() + - PCI: endpoint: Clear secondary (not primary) EPC in pci_epc_remove_epf() + - fs/proc/kcore.c: Clear ret value in read_kcore_iter after successful + iov_iter_zero + - thermal: int3400: Fix reading of current_uuid for active policy + - leds: flash: mt6360: Fix device_for_each_child_node() refcounting in error + paths + - ovl: properly handle large files in ovl_security_fileattr + - dm: Fix typo in error message + - dm thin: Add missing destroy_work_on_stack() + - PCI: of_property: Assign PCI instead of CPU bus address to dynamic PCI nodes + - PCI: rockchip-ep: Fix address translation unit programming + - iio: accel: kx022a: Fix raw read format + - iio: Fix fwnode_handle in __fwnode_iio_channel_get_by_name() + - iio: gts: fix infinite loop for gain_to_scaletables() + - powerpc: Fix stack protector Kconfig test for clang + - powerpc: Adjust adding stack protector flags to KBUILD_CLAGS for clang + - udmabuf: use vmf_insert_pfn and VM_PFNMAP for handling mmap + - drm/mediatek: Fix child node refcount handling in early exit + - drm/etnaviv: flush shader L1 cache after user commandstream + - drm: xlnx: zynqmp_dpsub: fix hotplug detection + - drm/amdkfd: Use the correct wptr size + - drm/amd/pm: update current_socclk and current_uclk in gpu_metrics on smu + v13.0.7 + - posix-timers: Target group sigqueue to current task only if not exiting + - wifi: cfg80211: Add wiphy_delayed_work_pending() + - wifi: mac80211: Convert color collision detection to wiphy work + - spi: stm32: fix missing device mode capability in stm32mp25 + - usb: typec: use cleanup facility for 'altmodes_node' + - platform/x86: ideapad-laptop: add missing Ideapad Pro 5 fn keys + - integrity: Avoid -Wflex-array-member-not-at-end warnings + - integrity: Use static_assert() to check struct sizes + - ASoC: max9768: Fix event generation for playback mute + - ARM: 9434/1: cfi: Fix compilation corner case + - drm/amd/display: Skip Invalid Streams from DSC Policy + - drm/amd/display: Fix DSC-re-computing + - drm/amd/display: Fix incorrect DSC recompute trigger + - s390/facilities: Fix warning about shadow of global variable + - cachefiles: Fix incorrect length return value in + cachefiles_ondemand_fd_write_iter() + - thermal: core: Drop thermal_zone_device_is_enabled() + - thermal: core: Synchronize suspend-prepare and post-suspend actions + - thermal: core: Rearrange PM notification code + - thermal: core: Represent suspend-related thermal zone flags as bits + - thermal: core: Mark thermal zones as initializing to start with + - thermal: core: Fix race between zone registration and system suspend + - crypto: qat - Fix missing destroy_workqueue in adf_init_aer() + - sched/cpufreq: Ensure sd is rebuilt for EAS check + - cleanup: Remove address space of returned pointer + - ARM: dts: renesas: genmai: Fix partition size for QSPI NOR Flash + - arm64: dts: mediatek: mt8395-genio-1200-evk: Fix dtbs_check error for phy + - scripts/kernel-doc: Do not track section counter across processed files + - arm64: dts: qcom: x1e80100: Resize GIC Redistributor register region + - scripts/kernel-doc: add modeline for vim users + - scripts/kernel-doc: simplify function printing + - scripts/kernel-doc: separate out function signature + - scripts/kernel-doc: simplify signature printing + - doc: kerneldoc.py: fix indentation + - kernel-doc: allow object-like macros in ReST output + - arm64: dts: mediatek: mt8188: Fix USB3 PHY port default status + - arm64: dts: rockchip: Remove 'enable-active-low' from two boards + - arm64: dts: qcom: x1e80100: Update C4/C5 residency/exit numbers + - dt-bindings: cache: qcom,llcc: Fix X1E80100 reg entries + - pwm: Assume a disabled PWM to emit a constant inactive output + - drm/imagination: Convert to use time_before macro + - drm/imagination: Use pvr_vm_context_get() + - drm/v3d: Flush the MMU before we supply more memory to the binner + - drm/amdgpu: Fix JPEG v4.0.3 register write + - ASoC: fsl-asoc-card: Add missing handling of {hp,mic}-dt-gpios + - wifi: rtl8xxxu: Perform update_beacon_work when beaconing is enabled + - selftests/bpf: netns_new() and netns_free() helpers. + - selftests/bpf: Fix backtrace printing for selftests crashes + - selftests/bpf: add missing header include for htons + - drm/vc4: hdmi: Increase audio MAI fifo dreq threshold + - drm/vc4: Introduce generation number enum + - drm/vc4: Match drm_dev_enter and exit calls in vc4_hvs_lut_load + - drm/vc4: Correct generation check in vc4_hvs_lut_load + - bpf: Tighten tail call checks for lingering locks, RCU, preempt_disable + - drm/panfrost: Add missing OPP table refcnt decremental + - selftests: netfilter: Fix missing return values in conntrack_dump_flush + - Bluetooth: btintel: Do no pass vendor events to stack + - Bluetooth: btbcm: fix missing of_node_put() in btbcm_get_board_name() + - Bluetooth: ISO: Use kref to track lifetime of iso_conn + - Bluetooth: ISO: Do not emit LE PA Create Sync if previous is pending + - Bluetooth: hci_conn: Use __counted_by() to avoid -Wfamnae warning + - Bluetooth: hci_conn: Use struct_size() in hci_le_big_create_sync() + - Bluetooth: ISO: Do not emit LE BIG Create Sync if previous is pending + - Bluetooth: ISO: Send BIG Create Sync via hci_sync + - Bluetooth: iso: Fix circular lock in iso_conn_big_sync + - net: txgbe: remove GPIO interrupt controller + - net: txgbe: fix null pointer to pcs + - RDMA/core: Provide rdma_user_mmap_disassociate() to disassociate mmap pages + - RDMA/hns: Disassociate mmap pages for all uctx when HW is being reset + - iommu/amd: Remove amd_iommu_domain_update() from page table freeing + - iommu/amd/pgtbl_v2: Take protection domain lock before invalidating TLB + - RDMA/hns: Fix flush cqe error when racing with destroy qp + - RDMA/hns: Modify debugfs name + - leds: max5970: Fix unreleased fwnode_handle in probe function + - kasan: move checks to do_strncpy_from_user + - kunit: skb: use "gfp" variable instead of hardcoding GFP_KERNEL + - RDMA/hns: Fix different dgids mapping to the same dip_idx + - RDMA/hns: Fix accessing invalid dip_ctx during destroying QP + - rust: kernel: add srctree-relative doclinks + - rust: kernel: fix THIS_MODULE header path in ThisModule doc comment + - i3c: master: Remove i3c_dev_disable_ibi_locked(olddev) on device hotjoin + - remoteproc: qcom: pas: Remove subdevs on the error path of adsp_probe() + - remoteproc: qcom: adsp: Remove subdevs on the error path of adsp_probe() + - nfsd: Revert "nfsd: release svc_expkey/svc_export with rcu_work" + - f2fs: clean up val{>>,<<}F2FS_BLKSIZE_BITS + - f2fs: fix to do cast in F2FS_{BLK_TO_BYTES, BTYES_TO_BLK} to avoid overflow + - vfio/mlx5: Fix unwind flows in mlx5vf_pci_save/resume_device_data() + - exfat: fix file being changed by unaligned direct write + - bnxt_en: Set backplane link modes correctly for ethtool + - devres: Fix page faults when tracing devres from unloaded modules + - usb: gadget: uvc: wake pump everytime we update the free list + - drm/xe/ufence: Wake up waiters after setting ufence->signalled + - net_sched: sch_fq: don't follow the fast path if Tx is behind now + - ASoC: da7213: Populate max_register to regmap_config + - KVM: x86: switch hugepage recovery thread to vhost_task + - kvm: defer huge page recovery vhost task to later + - KVM: x86/mmu: Ensure NX huge page recovery thread is alive before waking + - KVM: arm64: Change kvm_handle_mmio_return() return polarity + - dt-bindings: pinctrl: samsung: Fix interrupt constraint for variants with + fallbacks + - xhci: Fix control transfer error on Etron xHCI host + - xhci: Combine two if statements for Etron xHCI host + - xhci: Don't perform Soft Retry for Etron xHCI host + - xhci: Don't issue Reset Device command to Etron xHCI host + - mtd: spi-nor: core: replace dummy buswidth from addr to data + - Revert "mtd: spi-nor: core: replace dummy buswidth from addr to data" + - RISC-V: Scalar unaligned access emulated on hotplug CPUs + - serial: amba-pl011: Fix RX stall when DMA is used + - serial: amba-pl011: fix build regression + - i40e: Fix handling changed priv flags + - netdev-genl: Hold rcu_read_lock in napi_get + - usb: misc: ljca: set small runtime autosuspend delay + - usb: misc: ljca: move usb_autopm_put_interface() after wait for response + - blk-mq: add non_owner variant of start_freeze/unfreeze queue APIs + - block: model freeze & enter queue as lock for supporting lockdep + - block: always verify unfreeze lock on the owner task + - x86/Documentation: Update algo in init_size description of boot protocol + - kbuild: deb-pkg: Don't fail if modules.order is missing + - tools/power turbostat: Fix trailing '\n' parsing + - block: don't verify IO lock for freeze/unfreeze in elevator_init_mq() + - zram: permit only one post-processing operation at a time + - perf jevents: Don't stop at the first matched pmu when searching a events + table + - docs: media: update location of the media patches + - Revert "KVM: VMX: Move LOAD_IA32_PERF_GLOBAL_CTRL errata handling out of + setup_vmcs_config()" + - soc: fsl: cpm1: qmc: Fix blank line and spaces + - soc: fsl: cpm1: qmc: Re-order probe() operations + - soc: fsl: cpm1: qmc: Introduce qmc_init_resource() and its CPM1 version + - soc: fsl: cpm1: qmc: Introduce qmc_{init,exit}_xcc() and their CPM1 version + - soc: fsl: cpm1: qmc: Set the ret error code on platform_get_irq() failure + - x86/mm: Carve out INVLPG inline asm for use by others + - ALSA: hda/realtek: Enable mic on Vaio VJFH52 + - ALSA: hda/realtek: Enable speaker pins for Medion E15443 platform + - ALSA: hda/realtek: fix mute/micmute LEDs don't work for EliteBook X G1i + - usb: dwc3: gadget: Add missing check for single port RAM in TxFIFO resizing + logic + - sched: Initialize idle tasks only once + - Upstream stable to v6.6.64, v6.11.11, v6.12.1, v6.12.2, v6.12.3 + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53222 + - zram: fix NULL pointer in comp_algorithm_show() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53169 + - nvme-fabrics: fix kernel crash while shutting down controller + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56721 + - x86/CPU/AMD: Terminate the erratum_1386_microcode array + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53187 + - io_uring: check for overflows in io_pin_pages + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53147 + - exfat: fix out-of-bounds access of directory entries + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53196 + - KVM: arm64: Don't retire aborted MMIO instruction + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56685 + - ASoC: mediatek: Check num_codecs is not zero to avoid panic during probe + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53201 + - drm/amd/display: Fix null check for pipe_ctx->plane_state in + dcn20_program_pipe + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53203 + - usb: typec: fix potential array underflow in ucsi_ccg_sync_control() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53209 + - bnxt_en: Fix receive ring space parameters when XDP is active + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56742 + - vfio/mlx5: Fix an unwind issue in mlx5vf_add_migration_pages() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53216 + - nfsd: release svc_expkey/svc_export with rcu_work + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53219 + - virtiofs: use pages instead of pointer for kernel direct IO + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53221 + - f2fs: fix null-ptr-deref in f2fs_submit_page_bio() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53228 + - riscv: kvm: Fix out-of-bounds array access + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53232 + - iommu/s390: Implement blocking domain + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53236 + - xsk: Free skb when TX metadata options are invalid + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56703 + - ipv6: Fix soft lockups in fib6_select_path under high next hop churn + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56540 + - accel/ivpu: Prevent recovery invocation during probe and resume + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53163 + - crypto: qat/qat_420xx - fix off by one in uof_get_name() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56755 + - netfs/fscache: Add a memory barrier for FSCACHE_VOLUME_CREATING + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56549 + - cachefiles: Fix NULL pointer dereference in object->file + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56551 + - drm/amdgpu: fix usage slab after free + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56776 + - drm/sti: avoid potential dereference of error pointers + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56777 + - drm/sti: avoid potential dereference of error pointers in + sti_gdp_atomic_check + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56778 + - drm/sti: avoid potential dereference of error pointers in + sti_hqvdp_atomic_check + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56557 + - iio: adc: ad7923: Fix buffer overflow for tx_buf and ring_xfer + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56779 + - nfsd: fix nfs4_openowner leak when concurrent nfsd4_open occur + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56558 + - nfsd: make sure exp active before svc_export_show + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56562 + - i3c: master: Fix miss free init_dyn_addr at i3c_master_put_i3c_addrs() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56566 + - mm/slub: Avoid list corruption when removing a slab from the full list + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-57838 + - s390/entry: Mark IRQ entries to fix stack depot warnings + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56567 + - ad7780: fix division by zero in ad7780_write_raw() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56569 + - ftrace: Fix regression with module command in stack_trace_filter + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56570 + - ovl: Filter invalid inodes with missing lookup function + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56572 + - media: platform: allegro-dvt: Fix possible memory leak in + allocate_buffers_internal() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56573 + - efi/libstub: Free correct pointer on failure + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56574 + - media: ts2020: fix null-ptr-deref in ts2020_probe() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56575 + - media: imx-jpeg: Ensure power suppliers be suspended before detach them + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56576 + - media: i2c: tc358743: Fix crash in the probe error path when using polling + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56577 + - media: mtk-jpeg: Fix null-ptr-deref during unload module + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56578 + - media: imx-jpeg: Set video drvdata before register video device + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56579 + - media: amphion: Set video drvdata before register video device + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56581 + - btrfs: ref-verify: fix use-after-free after invalid ref action + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56774 + - btrfs: add a sanity check for btrfs root in btrfs_search_slot() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56780 + - quota: flush quota_release_work upon quota writeback + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53168 + - sunrpc: fix one UAF issue caused by sunrpc kernel tcp socket + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56688 + - sunrpc: clear XPRT_SOCK_UPD_TIMEOUT when reset transport + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56729 + - smb: Initialize cfid->tcon before performing network ops + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56704 + - 9p/xen: fix release of IRQ + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53171 + - ubifs: authentication: Fix use-after-free in ubifs_tnc_end_commit + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53172 + - ubi: fastmap: Fix duplicate slab cache names while attaching + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56739 + - rtc: check if __rtc_read_time was successful in rtc_timer_do_work() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53173 + - NFSv4.0: Fix a use-after-free problem in the asynchronous open() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53145 + - um: Fix potential integer overflow during physmem setup + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53174 + - SUNRPC: make sure cache entry active before cache_show + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53146 + - NFSD: Prevent a potential integer overflow + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53175 + - ipc: fix memleak if msg_init_ns failed in create_ipc_ns + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56692 + - f2fs: fix to do sanity check on node blkaddr in truncate_node() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56698 + - usb: dwc3: gadget: Fix looping of queued SG entries + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56687 + - usb: musb: Fix hardware lockup on first Rx endpoint request + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53176 + - smb: During unmount, ensure all cached dir instances drop their dentry + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53177 + - smb: prevent use-after-free due to open_cached_dir error paths + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53178 + - smb: Don't leak cfid when reconnect races with open_cached_dir + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53180 + - ALSA: pcm: Add sanity NULL check for the default mmap fault handler + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56700 + - media: wl128x: Fix atomicity violation in fmc_send_cmd() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2022-49034 + - sh: cpuinfo: Fix a warning for CONFIG_CPUMASK_OFFSTACK + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53181 + - um: vector: Do not use drvdata in release + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53183 + - um: net: Do not use drvdata in release + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53184 + - um: ubd: Do not use drvdata in release + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53185 + - smb: client: fix NULL ptr deref in crypto_aead_setkey() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53188 + - wifi: ath12k: fix crash when unbinding + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53190 + - wifi: rtlwifi: Drastically reduce the attempts to read efuse in case of + failures + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53191 + - wifi: ath12k: fix warning when unbinding + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56741 + - apparmor: test: Fix memory leak for aa_unpack_strdup() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53148 + - comedi: Flush partial mappings in error case + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53194 + - PCI: Fix use-after-free of slot->bus on hot remove + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53195 + - KVM: arm64: Get rid of userspace_irqchip_in_use + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53197 + - ALSA: usb-audio: Fix potential out-of-bound accesses for Extigy and Mbox + devices + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-42122 + - drm/amd/display: Add NULL pointer check for kzalloc + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-49906 + - drm/amd/display: Check null pointer before try to access it + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53150 + - ALSA: usb-audio: Fix out of bounds reads when finding clock sources + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53198 + - xen: Fix the issue of resource not being properly released in + xenbus_dev_probe() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-41014 + - xfs: add bounds checking to xlog_recover_process_data + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53200 + - drm/amd/display: Fix null check for pipe_ctx->plane_state in hwss_setup_dpp + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53202 + - firmware_loader: Fix possible resource leak in fw_log_firmware_info() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53208 + - Bluetooth: MGMT: Fix slab-use-after-free Read in set_powered_sync + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53210 + - s390/iucv: MSG_PEEK causes memory leak in iucv_sock_destruct() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53213 + - net: usb: lan78xx: Fix double free issue with interrupt buffer allocation + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53214 + - vfio/pci: Properly hide first-in-list PCIe extended capability + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53215 + - svcrdma: fix miss destroy percpu_counter in svc_rdma_proc_init() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53217 + - NFSD: Prevent NULL dereference in nfsd4_process_cb_update() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56689 + - PCI: endpoint: epf-mhi: Avoid NULL dereference if DT lacks 'mmio' + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53151 + - svcrdma: Address an integer overflow + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53218 + - f2fs: fix race in concurrent f2fs_stop_gc_thread + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56744 + - f2fs: fix to avoid potential deadlock in f2fs_record_stop_reason() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53220 + - f2fs: fix to account dirty data in __get_secs_required() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56745 + - PCI: Fix reset_method_store() memory leak + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53223 + - clk: ralink: mtmips: fix clocks probe order in oldest ralink SoCs + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53154 + - clk: clk-apple-nco: Add NULL check in applnco_probe + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53224 + - RDMA/mlx5: Move events notifier registration to be after device registration + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56746 + - fbdev: sh7760fb: Fix a possible memory leak in sh7760fb_alloc_mem() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53155 + - ocfs2: fix uninitialized value in ocfs2_file_read_iter() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53226 + - RDMA/hns: Fix NULL pointer derefernce in hns_roce_map_mr_sg() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56747 + - scsi: qedi: Fix a possible memory leak in qedi_alloc_and_init_sb() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56748 + - scsi: qedf: Fix a possible memory leak in qedf_alloc_and_init_sb() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53229 + - RDMA/rxe: Fix the qp flush warnings in req + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56722 + - RDMA/hns: Fix cpu stuck caused by printings during reset + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53230 + - cpufreq: CPPC: Fix possible null-ptr-deref for cppc_get_cpu_cost() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53231 + - cpufreq: CPPC: Fix possible null-ptr-deref for cpufreq_cpu_get_raw() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56701 + - powerpc/pseries: Fix dtl_access_lock to be a rw_semaphore + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56678 + - powerpc/mm/fault: Fix kfence page fault reporting + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56677 + - powerpc/fadump: Move fadump_cma_init to setup_arch() after initmem_init() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56723 + - mfd: intel_soc_pmic_bxtwc: Use IRQ domain for PMIC devices + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56724 + - mfd: intel_soc_pmic_bxtwc: Use IRQ domain for TMU device + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56691 + - mfd: intel_soc_pmic_bxtwc: Use IRQ domain for USB Type-C device + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53233 + - unicode: Fix utf8_load() error path + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56694 + - bpf: fix recursive lock when verdict program return SK_PASS + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53234 + - erofs: handle NONHEAD !delta[1] lclusters gracefully + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53239 + - ALSA: 6fire: Release resources at card release + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56531 + - ALSA: caiaq: Use snd_card_free_when_closed() at disconnection + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56532 + - ALSA: us122l: Use snd_card_free_when_closed() at disconnection + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56533 + - ALSA: usx2y: Use snd_card_free_when_closed() at disconnection + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56751 + - ipv6: release nexthop on device removal + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56720 + - bpf, sockmap: Several fixes to bpf_msg_pop_data + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56538 + - drm: zynqmp_kms: Unplug DRM device before removal + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56752 + - drm/nouveau/gr/gf100: Fix missing unlock in gf100_gr_chan_new() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56725 + - octeontx2-pf: handle otx2_mbox_get_rsp errors in otx2_dcbnl.c + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56707 + - octeontx2-pf: handle otx2_mbox_get_rsp errors in otx2_dmac_flt.c + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56726 + - octeontx2-pf: handle otx2_mbox_get_rsp errors in cn10k.c + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56727 + - octeontx2-pf: handle otx2_mbox_get_rsp errors in otx2_flows.c + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56728 + - octeontx2-pf: handle otx2_mbox_get_rsp errors in otx2_ethtool.c + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56679 + - octeontx2-pf: handle otx2_mbox_get_rsp errors in otx2_common.c + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56539 + - wifi: mwifiex: Fix memcpy() field-spanning write warning in + mwifiex_config_scan() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56543 + - wifi: ath12k: Skip Rx TID cleanup for self peer + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56683 + - drm/vc4: hdmi: Avoid hang with debug registers when suspended + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56545 + - HID: hyperv: streamline driver probe to avoid devres issues + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56705 + - media: atomisp: Add check for rgby_data memory allocation failure + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53157 + - firmware: arm_scpi: Check the DVFS OPP count returned by the firmware + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53158 + - soc: qcom: geni-se: fix array underflow in geni_se_clk_tbl_get() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56546 + - drivers: soc: xilinx: add the missing kfree in xlnx_add_cb_for_suspend() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56681 + - crypto: bcm - add error check in the ahash_hmac_init function + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53160 + - rcu/kvfree: Fix data-race in __mod_timer / kvfree_call_rcu + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56708 + - EDAC/igen6: Avoid segmentation fault on module unload + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56690 + - crypto: pcrypt - Call crypto layer directly when padata_do_parallel() return + -EBUSY + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53161 + - EDAC/bluefield: Fix potential integer overflow + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53162 + - crypto: qat/qat_4xxx - fix off by one in uof_get_name() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56754 + - crypto: caam - Fix the pointer passed to caam_qi_shutdown() + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56548 + - hfsplus: don't query the device logical block size multiple times + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56756 + - nvme-pci: fix freeing of the HMB descriptor table + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-53142 + - initramfs: avoid filename buffer overrun + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-56693 + - brd: defer automatic disk creation until module initialization succeeds + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-44955 + - drm/amd/display: Don't refer to dc_sink in is_dsc_need_re_compute + + * Noble update: upstream stable patchset 2025-03-11 (LP: #2101915) // + CVE-2024-49899 + - drm/amd/display: Initialize denominators' default to 1 + + * Noble update: upstream stable patchset 2025-03-06 (LP: #2101042) + - sctp: fix possible UAF in sctp_v6_available() + - net: vertexcom: mse102x: Fix tx_bytes calculation + - drm/rockchip: vop: Fix a dereferenced before check warning + - mptcp: error out earlier on disconnect + - mptcp: cope racing subflow creation in mptcp_rcv_space_adjust + - net/mlx5: fs, lock FTE when checking if active + - net/mlx5e: kTLS, Fix incorrect page refcounting + - net/mlx5e: clear xdp features on non-uplink representors + - net/mlx5e: CT: Fix null-ptr-deref in add rule err flow + - virtio/vsock: Fix accept_queue memory leak + - Bluetooth: btintel: Direct exception event to bluetooth stack + - net: sched: cls_u32: Fix u32's systematic failure to free IDR entries for + hnodes. + - samples: pktgen: correct dev to DEV + - net: stmmac: dwmac-mediatek: Fix inverted handling of mediatek,mac-wol + - net: Make copy_safe_from_sockptr() match documentation + - stmmac: dwmac-intel-plat: fix call balance of tx_clk handling routines + - net: ti: icssg-prueth: Fix 1 PPS sync + - bonding: add ns target multicast address to slave device + - ARM: 9419/1: mm: Fix kernel memory mapping for xip kernels + - x86/mm: Fix a kdump kernel failure on SME system when CONFIG_IMA_KEXEC=y + - mm: fix NULL pointer dereference in alloc_pages_bulk_noprof + - ocfs2: uncache inode which has failed entering the group + - vdpa: solidrun: Fix UB bug with devres + - vdpa/mlx5: Fix PA offset with unaligned starting iotlb map + - vp_vdpa: fix id_table array not null terminated error + - ima: fix buffer overrun in ima_eventdigest_init_common + - KVM: nVMX: Treat vpid01 as current if L2 is active, but with VPID disabled + - KVM: x86: Unconditionally set irr_pending when updating APICv state + - KVM: VMX: Bury Intel PT virtualization (guest/host mode) behind + CONFIG_BROKEN + - nilfs2: fix null-ptr-deref in block_touch_buffer tracepoint + - nommu: pass NULL argument to vma_iter_prealloc() + - ALSA: hda/realtek - Fixed Clevo platform headset Mic issue + - ocfs2: fix UBSAN warning in ocfs2_verify_volume() + - nilfs2: fix null-ptr-deref in block_dirty_buffer tracepoint + - LoongArch: Fix early_numa_add_cpu() usage for FDT systems + - LoongArch: Disable KASAN if PGDIR_SIZE is too large for cpu_vabits + - LoongArch: Make KASAN work with 5-level page-tables + - Revert "mmc: dw_mmc: Fix IDMAC operation with pages bigger than 4K" + - mmc: sunxi-mmc: Fix A100 compatible description + - drm/bridge: tc358768: Fix DSI command tx + - pmdomain: imx93-blk-ctrl: correct remove path + - nouveau: fw: sync dma after setup is called. + - drm/amd: Fix initialization mistake for NBIO 7.7.0 + - drm/amd/display: Adjust VSDB parser for replay feature + - lib/buildid: Fix build ID parsing logic + - media: dvbdev: fix the logic when DVB_DYNAMIC_MINORS is not set + - mptcp: add userspace_pm_lookup_addr_by_id helper + - mptcp: update local address flags when setting it + - mptcp: hold pm lock when deleting entry + - mptcp: drop lookup_by_id in lookup_addr + - mptcp: pm: use _rcu variant under rcu_read_lock + - mm: avoid unsafe VMA hook invocation when error arises on mmap hook + - mm: unconditionally close VMAs on error + - mm: refactor map_deny_write_exec() + - mm: refactor arch_calc_vm_flag_bits() and arm64 MTE handling + - mm: resolve faulty mmap_region() error path behaviour + - net/mlx5: Fix msix vectors to respect platform limit + - vsock: Fix sk_error_queue memory leak + - virtio/vsock: Improve MSG_ZEROCOPY error handling + - net: phylink: ensure PHY momentary link-fails are handled + - drm/vmwgfx: avoid null_ptr_deref in vmw_framebuffer_surface_create_handle + - ARM: fix cacheflush with PAN + - drm/amd/display: Run idle optimizations at end of vblank handler + - drm/amd/display: Change some variable name of psr + - x86/CPU/AMD: Clear virtualized VMLOAD/VMSAVE on Zen4 client + - x86/stackprotector: Work around strict Clang TLS symbol requirements + - sched/task_stack: fix object_is_on_stack() for KASAN tagged pointers + - fs/proc/task_mmu: prevent integer overflow in pagemap_scan_get_args() + - mm/mremap: fix address wraparound in move_page_tables() + - KVM: selftests: Disable strict aliasing + - mm: page_alloc: move mlocked flag clearance into free_pages_prepare() + - LoongArch: Add WriteCombine shadow mapping in KASAN + - drm/xe: handle flat ccs during hibernation on igpu + - pmdomain: arm: Use FLAG_DEV_NAME_FW to ensure unique names + - pmdomain: core: Add GENPD_FLAG_DEV_NAME_FW flag + - nouveau: handle EBUSY and EAGAIN for GSP aux errors. + - nouveau/dp: handle retries for AUX CH transfers with GSP. + - drm/amdgpu: fix check in gmc_v9_0_get_vm_pte() + - drm/amdgpu: Fix video caps for H264 and HEVC encode maximum size + - drm/amd/pm: print pp_dpm_mclk in ascending order on SMU v14.0.0 + - drm/amd/display: Handle dml allocation failure to avoid crash + - drm/amd/display: Fix failure to read vram info due to static BP_RESULT + - drm/xe: Restore system memory GGTT mappings + - drm/xe: improve hibernation on igpu + - net: sched: u32: Add test case for systematic hnode IDR leaks + - Upstream stable to v6.6.63, v6.11.10 + + * Noble update: upstream stable patchset 2025-03-04 (LP: #2100894) + - 9p: v9fs_fid_find: also lookup by inode if not found dentry + - 9p: Avoid creating multiple slab caches with the same name + - selftests/bpf: Verify that sync_linked_regs preserves subreg_def + - irqchip/ocelot: Fix trigger register address + - nvme: tcp: avoid race between queue_lock lock and destroy + - block: Fix elevator_get_default() checking for NULL q->tag_set + - HID: multitouch: Add support for B2402FVA track point + - HID: multitouch: Add quirk for HONOR MagicBook Art 14 touchpad + - iommu/arm-smmu: Clarify MMU-500 CPRE workaround + - nvme: disable CC.CRIME (NVME_CC_CRIME) + - bpf: use kvzmalloc to allocate BPF verifier environment + - crypto: api - Fix liveliness check in crypto_alg_tested + - crypto: marvell/cesa - Disable hash algorithms + - sound: Make CONFIG_SND depend on INDIRECT_IOMEM instead of UML + - drm/vmwgfx: Limit display layout ioctl array size to + VMWGFX_NUM_DISPLAY_UNITS + - RDMA/siw: Add sendpage_ok() check to disable MSG_SPLICE_PAGES + - nvme-multipath: defer partition scanning + - drm/amdkfd: Accounting pdd vram_usage for svm + - powerpc/powernv: Free name on error in opal_event_init() + - net: phy: mdio-bcm-unimac: Add BCM6846 support + - nvme-loop: flush off pending I/O while shutting down loop controller + - smb: client: Fix use-after-free of network namespace. + - nvme/host: Fix RCU list traversal to use SRCU primitive + - vDPA/ifcvf: Fix pci_read_config_byte() return code handling + - bpf: Add sk_is_inet and IS_ICSK check in tls_sw_has_ctx_tx/rx + - bpf: Fix mismatched RCU unlock flavour in bpf_out_neigh_v6 + - ASoC: amd: yc: Add quirk for ASUS Vivobook S15 M3502RA + - ASoC: amd: yc: Fix non-functional mic on ASUS E1404FA + - fs: Fix uninitialized value issue in from_kuid and from_kgid + - HID: multitouch: Add quirk for Logitech Bolt receiver w/ Casa touchpad + - HID: lenovo: Add support for Thinkpad X1 Tablet Gen 3 keyboard + - RISCV: KVM: use raw_spinlock for critical section in imsic + - ASoC: rt722-sdca: increase clk_stop_timeout to fix clock stop issue + - LoongArch: Use "Exception return address" to comment ERA + - ASoC: fsl_micfil: Add sample rate constraint + - net: usb: qmi_wwan: add Fibocom FG132 0x0112 composition + - bpf: Check validity of link->type in bpf_link_show_fdinfo() + - mm: support order-1 folios in the page cache + - mm: always initialise folio->_deferred_list + - mm: refactor folio_undo_large_rmappable() + - mm/thp: fix deferred split unqueue naming and locking + - 9p: fix slab cache name creation for real + - nvmet-passthru: clear EUID/NGUID/UUID while using loop target + - pinctrl: intel: platform: Add Panther Lake to the list of supported + - s390/ap: Fix CCA crypto card behavior within protected execution environment + - selftests/bpf: Assert link info uprobe_multi count & path_size if unset + - ALSA: hda/tas2781: Add new quirk for Lenovo, ASUS, Dell projects + - drm/xe/query: Increase timestamp width + - nvme: make keep-alive synchronous operation + - samples/landlock: Fix port parsing in sandboxer + - ASoC: Intel: avs: Update stream status in a separate thread + - ASoC: codecs: Fix error handling in aw_dev_get_dsp_status function + - netfs: Downgrade i_rwsem for a buffered write + - afs: Fix lock recursion + - HID: i2c-hid: Delayed i2c resume wakeup for 0x0d42 Goodix touchpad + - LoongArch: KVM: Mark hrtimer to expire in hard interrupt context + - drm/xe: Don't restart parallel queues multiple times on GT reset + - Upstream stable to v6.6.62, v6.11.9 + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) + - arm64: dts: rockchip: Fix rt5651 compatible value on rk3399-eaidk-610 + - arm64: dts: rockchip: Fix rt5651 compatible value on rk3399-sapphire- + excavator + - arm64: dts: rockchip: Remove hdmi's 2nd interrupt on rk3328 + - arm64: dts: rockchip: Fix wakeup prop names on PineNote BT node + - arm64: dts: rockchip: Fix reset-gpios property on brcm BT nodes + - arm64: dts: rockchip: fix i2c2 pinctrl-names property on anbernic-rg353p/v + - arm64: dts: rockchip: Fix bluetooth properties on rk3566 box demo + - arm64: dts: rockchip: Fix bluetooth properties on Rock960 boards + - arm64: dts: rockchip: Add DTS for FriendlyARM NanoPi R2S Plus + - arm64: dts: rockchip: Remove undocumented supports-emmc property + - arm64: dts: rockchip: Remove #cooling-cells from fan on Theobroma lion + - arm64: dts: rockchip: Fix LED triggers on rk3308-roc-cc + - arm64: dts: rockchip: remove num-slots property from rk3328-nanopi-r2s-plus + - arm64: dts: imx8-ss-vpu: Fix imx8qm VPU IRQs + - arm64: dts: imx8mp: correct sdhc ipg clk + - arm64: dts: rockchip: remove orphaned pinctrl-names from pinephone pro + - ARM: dts: rockchip: fix rk3036 acodec node + - ARM: dts: rockchip: drop grf reference from rk3036 hdmi + - ARM: dts: rockchip: Fix the spi controller on rk3036 + - ARM: dts: rockchip: Fix the realtek audio codec on rk3036-kylin + - arm64: dts: rockchip: Correct GPIO polarity on brcm BT nodes + - sunrpc: handle -ENOTCONN in xs_tcp_setup_socket() + - NFSv3: only use NFS timeout for MOUNT when protocols are compatible + - nfs: avoid i_lock contention in nfs_clear_invalid_mapping + - net: enetc: set MAC address to the VF net_device + - dt-bindings: net: xlnx,axi-ethernet: Correct phy-mode property value + - can: c_can: fix {rx,tx}_errors statistics + - can: c_can: c_can_handle_bus_err(): update statistics if skb allocation + fails + - ice: change q_index variable type to s16 to store -1 value + - e1000e: Remove Meteor Lake SMBUS workarounds + - net: phy: ti: add PHY_RST_AFTER_CLK_EN flag + - net: stmmac: Fix unbalanced IRQ wake disable warning on single irq case + - netfilter: nf_tables: pass nft_chain to destroy function, not nft_ctx + - netfilter: nf_tables: wait for rcu grace period on net_device removal + - netfilter: nf_tables: do not defer rule destruction via call_rcu + - net: arc: rockchip: fix emac mdio node support + - drivers: net: ionic: add missed debugfs cleanup to ionic_probe() error path + - Revert "ALSA: hda/conexant: Mute speakers at suspend / shutdown" + - media: stb0899_algo: initialize cfr before using it + - media: dvb_frontend: don't play tricks with underflow values + - media: adv7604: prevent underflow condition when reporting colorspace + - scsi: sd_zbc: Use kvzalloc() to allocate REPORT ZONES buffer + - ALSA: firewire-lib: fix return value on fail in amdtp_tscm_init() + - tools/lib/thermal: Fix sampling handler context ptr + - thermal/of: support thermal zones w/o trips subnode + - ASoC: SOF: sof-client-probes-ipc4: Set param_size extension bits + - media: pulse8-cec: fix data timestamp at pulse8_setup() + - media: v4l2-ctrls-api: fix error handling for v4l2_g_ctrl() + - can: m_can: m_can_close(): don't call free_irq() for IRQ-less devices + - can: mcp251xfd: mcp251xfd_get_tef_len(): fix length calculation + - can: mcp251xfd: mcp251xfd_ring_alloc(): fix coalescing configuration when + switching CAN modes + - ksmbd: count all requests in req_running counter + - ksmbd: fix broken transfers when exceeding max simultaneous operations + - pwm: imx-tpm: Use correct MODULO value for EPWM mode + - rpmsg: glink: Handle rejected intent request better + - drm/amdgpu: Adjust debugfs eviction and IB access permissions + - drm/amdgpu: Adjust debugfs register access permissions + - drm/amdgpu: Fix DPX valid mode check on GC 9.4.3 + - thermal/drivers/qcom/lmh: Remove false lockdep backtrace + - dm cache: correct the number of origin blocks to match the target length + - dm cache: optimize dirty bit checking with find_next_bit when resizing + - dm-unstriped: cast an operand to sector_t to prevent potential uint32_t + overflow + - ALSA: usb-audio: Add quirk for HP 320 FHD Webcam + - net: wwan: t7xx: Fix off-by-one error in t7xx_dpmaif_rx_buf_alloc() + - mptcp: use sock_kfree_s instead of kfree + - arm64: Kconfig: Make SME depend on BROKEN for now + - [Config] updateconfigs for ARM64_SME + - arm64: smccc: Remove broken support for SMCCCv1.3 SVE discard hint + - Revert "wifi: mac80211: fix RCU list iterations" + - i2c: designware: do not hold SCL low when I2C_DYNAMIC_TAR_UPDATE is not set + - fs/proc: fix compile warning about variable 'vmcore_mmap_ops' + - usb: dwc3: fix fault at system suspend if device was already runtime + suspended + - USB: serial: qcserial: add support for Sierra Wireless EM86xx + - USB: serial: option: add Fibocom FG132 0x0112 composition + - USB: serial: option: add Quectel RG650V + - irqchip/gic-v3: Force propagation of the active state with a read-back + - ucounts: fix counter leak in inc_rlimit_get_ucounts() + - ASoC: amd: yc: fix internal mic on Xiaomi Book Pro 14 2022 + - arm64: dts: rockchip: Designate Turing RK1's system power controller + - EDAC/qcom: Make irq configuration optional + - arm64: dts: rockchip: Drop regulator-init-microvolt from two boards + - net: dpaa_eth: print FD status in CPU endianness in dpaa_eth_fd tracepoint + - virtio_net: Sync rss config to device when virtnet_probe + - drm/xe: Set mask bits for CCS_MODE register + - drm/amd/display: Fix brightness level not retained over reboot + - drm/imagination: Add a per-file PVR context list + - mptcp: no admin perm to list endpoints + - btrfs: fix the length of reserved qgroup to free + - btrfs: fix per-subvolume RO/RW flags with new mount API + - clk: qcom: gcc-x1e80100: Fix USB MP SS1 PHY GDSC pwrsts flags + - clk: qcom: clk-alpha-pll: Fix pll post div mask when width is not set + - objpool: fix to make percpu slot allocation more robust + - mm/damon/core: handle zero {aggregation,ops_update} intervals + - mm/damon/core: handle zero schemes apply interval + - mm/mlock: set the correct prev on failure + - clk: qcom: gcc-x1e80100: Fix halt_check for pipediv2 clocks + - staging: vchiq_arm: Get the rid off struct vchiq_2835_state + - staging: vchiq_arm: Use devm_kzalloc() for vchiq_arm_state allocation + - drm/xe/guc/ct: Flush g2h worker in case of g2h response timeout + - drm/xe: Move LNL scheduling WA to xe_device.h + - drm/xe/ufence: Flush xe ordered_wq in case of ufence timeout + - drm/xe/guc/tlb: Flush g2h worker in case of tlb timeout + - xtensa: Emulate one-byte cmpxchg + - Upstream stable to v6.6.61, v6.11.8 + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50270 + - mm/damon/core: avoid overflow in damon_feed_loop_next_input() + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50274 + - idpf: avoid vport access in idpf_get_link_ksettings + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-53067 + - scsi: ufs: core: Start the RTC update work later + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-53084 + - drm/imagination: Break an object reference loop + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-53085 + - tpm: Lock TPM chip in tpm_pm_suspend() first + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-53086 + - drm/xe: Drop VM dma-resv lock on xe_sync_in_fence_get failure in exec IOCTL + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-53087 + - drm/xe: Fix possible exec queue leak in exec IOCTL + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50288 + - media: vivid: fix buffer overwrite when using > 32 buffers + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50289 + - media: av7110: fix a spectre vulnerability + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-53062 + - media: mgb4: protect driver against spectre + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50291 + - media: dvb-core: add missing buffer index check + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50297 + - net: xilinx: axienet: Enqueue Tx packets in dql before dmaengine starts + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50267 + - USB: serial: io_edgeport: fix use after free in debug printk + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50268 + - usb: typec: fix potential out of bounds in ucsi_ccg_update_set_new_cam_cmd() + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-53083 + - usb: typec: qcom-pmic: init value of hdr_len/txbuf_len earlier + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50269 + - usb: musb: sunxi: Fix accessing an released usb phy + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50271 + - signal: restore the override_rlimit logic + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50272 + - filemap: Fix bounds checking in filemap_read() + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50273 + - btrfs: reinitialize delayed ref list after deleting it from the list + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50275 + - arm64/sve: Discard stale CPU state when handling SVE traps + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50276 + - net: vertexcom: mse102x: Fix possible double free of TX skb + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-53066 + - nfs: Fix KMSAN warning in decode_getfattr_attrs() + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50278 + - dm cache: fix potential out-of-bounds access on the first resume + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50279 + - dm cache: fix out-of-bounds access to the dirty bitset when resizing + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50280 + - dm cache: fix flushing uninitialized delayed_work on cache_ctr error + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-53060 + - drm/amdgpu: prevent NULL pointer dereference if ATIF is not supported + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50282 + - drm/amdgpu: add missing size check in amdgpu_debugfs_gprwave_read() + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50283 + - ksmbd: fix slab-use-after-free in smb3_preauth_hash_rsp + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50284 + - ksmbd: Fix the missing xa_store error check + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50285 + - ksmbd: check outstanding simultaneous SMB operations + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50286 + - ksmbd: fix slab-use-after-free in ksmbd_smb2_session_create + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50287 + - media: v4l2-tpg: prevent the risk of a division by zero + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50290 + - media: cx24116: prevent overflows on SNR calculus + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-53061 + - media: s5p-jpeg: prevent buffer overflows + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-53081 + - media: ar0521: don't overflow when checking PLL values + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50292 + - ASoC: stm32: spdifrx: fix dma channel release in stm32_spdifrx_remove + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50294 + - rxrpc: Fix missing locking causing hanging calls + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50295 + - net: arc: fix the device for dma_map_single/dma_unmap_single + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-53082 + - virtio_net: Add hash_key_length check + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50296 + - net: hns3: fix kernel crash when uninstalling driver + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-53088 + - i40e: fix race condition by adding filter's intermediate sync state + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50298 + - net: enetc: allocate vf_state during PF probes + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50299 + - sctp: properly validate chunk size in sctp_sf_ootb() + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50300 + - regulator: rtq2208: Fix uninitialized use of regulator_config + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-50301 + - security/keys: fix slab-out-of-bounds in key_task_permission + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-53072 + - platform/x86/amd/pmc: Detect when STB is not available + + * Noble update: upstream stable patchset 2025-02-27 (LP: #2100292) // + CVE-2024-53068 + - firmware: arm_scmi: Fix slab-use-after-free in scmi_bus_notifier() + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) + - Input: xpad - sort xpad_device by vendor and product ID + - Input: xpad - add support for 8BitDo Ultimate 2C Wireless Controller + - cgroup: Fix potential overflow issue when checking max_depth + - spi: geni-qcom: Fix boot warning related to pm_runtime and devres + - wifi: iwlegacy: Fix "field-spanning write" warning in il_enqueue_hcmd() + - mac80211: MAC80211_MESSAGE_TRACING should depend on TRACING + - wifi: mac80211: skip non-uploaded keys in ieee80211_iter_keys + - wifi: ath11k: Fix invalid ring usage in full monitor mode + - wifi: brcm80211: BRCM_TRACING should depend on TRACING + - RDMA/cxgb4: Dump vendor specific QP details + - RDMA/mlx5: Round max_rd_atomic/max_dest_rd_atomic up instead of down + - RDMA/bnxt_re: Fix the usage of control path spin locks + - RDMA/bnxt_re: synchronize the qp-handle table array + - RDMA/bnxt_re: Fix the locking while accessing the QP table + - wifi: iwlwifi: mvm: disconnect station vifs if recovery failed + - wifi: iwlwifi: mvm: don't add default link in fw restart flow + - ASoC: cs42l51: Fix some error handling paths in cs42l51_probe() + - net: stmmac: dwmac4: Fix high address display by updating reg_space[] from + register values + - net: stmmac: fix TSO DMA API usage causing oops + - gtp: allow -1 to be specified as file description from userspace + - bpf: Force checkpoint when jmp history is too long + - net: skip offload for NETIF_F_IPV6_CSUM if ipv6 header contains extension + - net: reenable NETIF_F_IPV6_CSUM offload for BIG TCP packets + - mlxsw: spectrum_ptp: Add missing verification before pushing Tx header + - bpf, test_run: Fix LIVE_FRAME frame update after a page has been recycled + - iomap: improve shared block detection in iomap_unshare_iter + - iomap: don't bother unsharing delalloc extents + - iomap: share iomap_unshare_iter predicate code with fsdax + - fsdax: remove zeroing code from dax_unshare_iter + - iomap: turn iomap_want_unshare_iter into an inline function + - kasan: Fix Software Tag-Based KASAN with GCC + - firmware: arm_sdei: Fix the input parameter of cpuhp_remove_state() + - afs: Fix missing subdir edit when renamed between parent dirs + - smb: client: set correct device number on nfs reparse points + - cxl/events: Fix Trace DRAM Event Record + - fs/ntfs3: Fix warning possible deadlock in ntfs_set_state + - fs/ntfs3: Stale inode instead of bad + - scsi: scsi_transport_fc: Allow setting rport state to current state + - cifs: Fix creating native symlinks pointing to current or parent directory + - thermal: intel: int340x: processor: Remove MMIO RAPL CPU hotplug support + - thermal: intel: int340x: processor: Add MMIO RAPL PL4 support + - net: amd: mvme147: Fix probe banner message + - NFS: remove revoked delegation from server's delegation list + - misc: sgi-gru: Don't disable preemption in GRU driver + - usb: gadget: dummy_hcd: Switch to hrtimer transfer scheduler + - usb: gadget: dummy_hcd: Set transfer interval to 1 microframe + - usb: gadget: dummy_hcd: execute hrtimer callback in softirq context + - USB: gadget: dummy-hcd: Fix "task hung" problem + - ALSA: usb-audio: Add quirks for Dell WD19 dock + - usbip: tools: Fix detach_port() invalid port error path + - usb: phy: Fix API devm_usb_put_phy() can not release the phy + - usb: typec: fix unreleased fwnode_handle in typec_port_register_altmodes() + - usb: typec: qcom-pmic-typec: use fwnode_handle_put() to release fwnodes + - xhci: Fix Link TRB DMA in command ring stopped completion event + - xhci: Use pm_runtime_get to prevent RPM on unsupported systems + - Revert "driver core: Fix uevent_show() vs driver detach race" + - iio: light: veml6030: fix microlux value calculation + - RISC-V: ACPI: fix early_ioremap to early_memremap + - tools/mm: -Werror fixes in page-types/slabinfo + - tools/mm: fix compile error + - thunderbolt: Honor TMU requirements in the domain when setting TMU mode + - mmc: sdhci-pci-gli: GL9767: Fix low power mode on the set clock function + - mmc: sdhci-pci-gli: GL9767: Fix low power mode in the SD Express process + - block: fix sanity checks in blk_rq_map_user_bvec + - cgroup/bpf: use a dedicated workqueue for cgroup bpf destruction + - phy: freescale: imx8m-pcie: Do CMN_RST just before PHY PLL lock check + - riscv: vdso: Prevent the compiler from inserting calls to memset() + - Input: edt-ft5x06 - fix regmap leak when probe fails + - ALSA: hda/realtek: Limit internal Mic boost on Dell platform + - riscv: efi: Set NX compat flag in PE/COFF header + - riscv: Use '%u' to format the output of 'cpu' + - riscv: Remove unused GENERATING_ASM_OFFSETS + - riscv: Remove duplicated GET_RM + - cxl/port: Fix cxl_bus_rescan() vs bus_rescan_devices() + - cxl/acpi: Ensure ports ready at cxl_acpi_probe() return + - mei: use kvmalloc for read buffer + - mm/page_alloc: let GFP_ATOMIC order-0 allocs access highatomic reserves + - x86/traps: Enable UBSAN traps on x86 + - x86/traps: move kmsan check after instrumentation_begin + - kasan: remove vmalloc_percpu test + - vmscan,migrate: fix page count imbalance on node stats when demoting pages + - io_uring: always lock __io_cqring_overflow_flush + - mm: huge_memory: add vma_thp_disabled() and thp_disabled_by_hw() + - mm: don't install PMD mappings when THPs are disabled by the hw/process/vma + - perf trace: Fix non-listed archs in the syscalltbl routines + - dpll: add Embedded SYNC feature for a pin + - ice: add callbacks for Embedded SYNC enablement on dpll pins + - bpf: Add bpf_mem_alloc_check_size() helper + - net: ethernet: mtk_wed: fix path of MT7988 WO firmware + - drm/mediatek: ovl: Remove the color format comment for ovl_fmt_convert() + - drm/mediatek: Fix get efuse issue for MT8188 DPTX + - ACPI: resource: Fold Asus Vivobook Pro N6506M* DMI quirks together + - powercap: intel_rapl_msr: Add PL4 support for Arrowlake-U + - usb: typec: qcom-pmic-typec: fix missing fwnode removal in error path + - mm: shrinker: avoid memleak in alloc_shrinker_info + - firmware: microchip: auto-update: fix poll_complete() to not report spurious + timeout errors + - soc: qcom: pmic_glink: Handle GLINK intent allocation rejections + - cxl/port: Fix CXL port initialization order when the subsystem is built-in + - btrfs: merge btrfs_orig_bbio_end_io() into btrfs_bio_end_io() + - posix-cpu-timers: Clear TICK_DEP_BIT_POSIX_TIMER on clone + - mm/ksm: remove redundant code in ksm_fork + - nvme: re-fix error-handling for io_uring nvme-passthrough + - btrfs: fix extent map merging not happening for adjacent extents + - btrfs: fix defrag not merging contiguous extents due to merged extent maps + - mm, mmap: limit THP alignment of anonymous mappings to PMD-aligned sizes + - mm: multi-gen LRU: ignore non-leaf pmd_young for force_scan=true + - mm: multi-gen LRU: remove MM_LEAF_OLD and MM_NONLEAF_TOTAL stats + - mm: shrink skip folio mapped by an exiting process + - mm: multi-gen LRU: use {ptep,pmdp}_clear_young_notify() + - drm/i915: Skip programming FIA link enable bits for MTL+ + - drm/i915/display: WA for Re-initialize dispcnlunitt1 xosc clock + - drm/i915/dp: Clear VSC SDP during post ddi disable routine + - drm/i915/pps: Disable DPLS_GATING around pps sequence + - drm/i915: move rawclk from runtime to display runtime info + - drm/xe/display: drop unused rawclk_freq and RUNTIME_INFO() + - drm/xe: Support 'nomodeset' kernel command-line option + - drm/xe/xe2hpg: Introduce performance tuning changes for Xe2_HPG + - drm/amdgpu/swsmu: fix ordering for setting workload_mask + - drm/amdgpu/swsmu: default to fullscreen 3D profile for dGPUs + - drm/amdgpu: handle default profile on on devices without fullscreen 3D + - MIPS: export __cmpxchg_small() + - rcu/kvfree: Add kvfree_rcu_barrier() API + - rcu/kvfree: Refactor kvfree_rcu_queue_batch() + - Upstream stable to v6.6.60, v6.11.7 + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-53050 + - drm/i915/hdcp: Add encoder check in hdcp2_get_capability + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-53051 + - drm/i915/hdcp: Add encoder check in intel_hdcp_get_capability + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50303 + - resource,kexec: walk_system_ram_res_rev must retain resource flags + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50263 + - fork: only invoke khugepaged, ksm hooks if no error + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50220 + - fork: do not invoke uffd on fork if error occurs + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50221 + - drm/amd/pm: Vangogh: Fix kernel memory out of bounds write + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-53053 + - scsi: ufs: core: Fix another deadlock during RTC update + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50225 + - btrfs: fix error propagation of split bios + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50230 + - nilfs2: fix kernel bug due to missing clearing of checked flag + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50238 + - phy: qcom: qmp-usbc: fix NULL-deref on runtime suspend + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-53044 + - net/sched: sch_api: fix xa_insert() error path in tcf_block_get_ext() + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50304 + - ipv4: ip_tunnel: Fix suspicious RCU usage warning in ip_tunnel_find() + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-53048 + - ice: fix crash on probe for DPLL enabled E810 LOM + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-53045 + - ASoC: dapm: fix bounds checker error in dapm_widget_list_create + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-53055 + - wifi: iwlwifi: mvm: fix 6 GHz scan construction + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-53046 + - arm64: dts: imx8ulp: correct the flexspi compatible string + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-53052 + - io_uring/rw: fix missing NOWAIT check for O_DIRECT start write + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50215 + - nvmet-auth: assign dh_key to NULL after kfree_sensitive + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50216 + - xfs: fix finding a last resort AG in xfs_filestream_pick_ag + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-53043 + - mctp i2c: handle NULL header address + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50218 + - ocfs2: pass u64 to ocfs2_truncate_inline maybe overflow + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-53047 + - mptcp: init: protect sched with rcu_read_lock + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50222 + - iov_iter: fix copy_page_from_iter_atomic() if KMAP_LOCAL_FORCE_MAP + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50223 + - sched/numa: Fix the potential null pointer dereference in task_numa_work() + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50224 + - spi: spi-fsl-dspi: Fix crash when not using GPIO chip select + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50226 + - cxl/port: Fix use-after-free, permit out-of-order decoder shutdown + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50231 + - iio: gts-helper: Fix memory leaks in iio_gts_build_avail_scale_table() + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-53076 + - iio: gts-helper: Fix memory leaks for the error path of + iio_gts_build_avail_scale_table() + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50232 + - iio: adc: ad7124: fix division by zero in ad7124_set_channel_odr() + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50234 + - wifi: iwlegacy: Clear stale interrupts before resuming device + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50235 + - wifi: cfg80211: clear wdev->cqm_config pointer on free + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50236 + - wifi: ath10k: Fix memory leak in management tx + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50237 + - wifi: mac80211: do not pass a stopped vif to the driver in .get_txpower + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50239 + - phy: qcom: qmp-usb-legacy: fix NULL-deref on runtime suspend + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50240 + - phy: qcom: qmp-usb: fix NULL-deref on runtime suspend + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50242 + - fs/ntfs3: Additional check in ntfs_file_release + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50243 + - fs/ntfs3: Fix general protection fault in run_is_mapped_full + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50244 + - fs/ntfs3: Additional check in ni_clear() + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50245 + - fs/ntfs3: Fix possible deadlock in mi_read + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50246 + - fs/ntfs3: Add rough attr alloc_size check + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50247 + - fs/ntfs3: Check if more than chunk-size bytes are written + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50250 + - fsdax: dax_unshare_iter needs to copy entire blocks + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50251 + - netfilter: nft_payload: sanitize offset and length before calling + skb_checksum() + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50252 + - mlxsw: spectrum_ipip: Fix memory leak when changing remote IPv6 address + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50255 + - Bluetooth: hci: fix null-ptr-deref in hci_read_supported_codecs + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50257 + - netfilter: Fix use-after-free in get_info() + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50258 + - net: fix crash when config small gso_max_size/gso_ipv4_max_size + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50262 + - bpf: Fix out-of-bounds write in trie_get_next_key() + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50259 + - netdevsim: Add trailing zero to terminate the string in + nsim_nexthop_bucket_activity_write() + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-53042 + - ipv4: ip_tunnel: Fix suspicious RCU usage warning in ip_tunnel_init_flow() + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-53058 + - net: stmmac: TSO: Fix unbalanced DMA map/unmap for non-paged SKB data + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-50261 + - macsec: Fix use-after-free while sending the offloading packet + + * Noble update: upstream stable patchset 2025-02-25 (LP: #2099996) // + CVE-2024-53059 + - wifi: iwlwifi: mvm: Fix response handling in iwl_mvm_send_recovery_cmd() + + * Noble update: upstream stable patchset 2025-02-07 (LP: #2097575) + - irqchip/gic-v3-its: Fix VSYNC referencing an unmapped VPE on GIC v4.1 + - xfs: fix error returns from xfs_bmapi_write + - xfs: fix xfs_bmap_add_extent_delay_real for partial conversions + - xfs: remove a racy if_bytes check in xfs_reflink_end_cow_extent + - xfs: require XFS_SB_FEAT_INCOMPAT_LOG_XATTRS for attr log intent item + recovery + - xfs: check opcode and iovec count match in xlog_recover_attri_commit_pass2 + - xfs: fix missing check for invalid attr flags + - xfs: check shortform attr entry flags specifically + - xfs: validate recovered name buffers when recovering xattr items + - xfs: enforce one namespace per attribute + - xfs: revert commit 44af6c7e59b12 + - xfs: use dontcache for grabbing inodes during scrub + - xfs: match lock mode in xfs_buffered_write_iomap_begin() + - xfs: make the seq argument to xfs_bmapi_convert_delalloc() optional + - xfs: make xfs_bmapi_convert_delalloc() to allocate the target offset + - xfs: convert delayed extents to unwritten when zeroing post eof blocks + - xfs: allow symlinks with short remote targets + - xfs: make sure sb_fdblocks is non-negative + - xfs: fix unlink vs cluster buffer instantiation race + - xfs: fix freeing speculative preallocations for preallocated files + - xfs: allow unlinked symlinks and dirs with zero size + - xfs: restrict when we try to align cow fork delalloc to cowextsz hints + - selftests: mptcp: join: change capture/checksum as bool + - selftests: mptcp: join: test for prohibited MPC to port-based endp + - selftests: mptcp: remove duplicated variables + - iio: accel: bma400: Fix uninitialized variable field_value in tap event + handling. + - bpf: Make sure internal and UAPI bpf_redirect flags don't overlap + - bpf: devmap: provide rxq after redirect + - cpufreq/amd-pstate: Fix amd_pstate mode switch on shared memory systems + - lib/Kconfig.debug: fix grammar in RUST_BUILD_ASSERT_ALLOW + - bpf: Fix memory leak in bpf_core_apply + - RDMA/bnxt_re: Fix a possible memory leak + - RDMA/bnxt_re: Fix incorrect AVID type in WQE structure + - RDMA/bnxt_re: Add a check for memory allocation + - x86/resctrl: Avoid overflow in MB settings in bw_validate() + - ARM: dts: bcm2837-rpi-cm3-io3: Fix HDMI hpd-gpio pin + - bpf: Add cookie to perf_event bpf_link_info records + - bpf: fix unpopulated name_len field in perf_event link info + - selftests/bpf: Add cookies check for perf_event fill_link_info test + - selftests/bpf: fix perf_event link info name_len assertion + - s390/pci: Handle PCI error codes other than 0x3a + - bpf: fix kfunc btf caching for modules + - iio: frequency: {admv4420,adrf6780}: format Kconfig entries + - iio: frequency: admv4420: fix missing select REMAP_SPI in Kconfig + - drm/vmwgfx: Handle possible ENOMEM in vmw_stdu_connector_atomic_check + - selftests/bpf: Fix cross-compiling urandom_read + - task_work: Add TWA_NMI_CURRENT as an additional notify mode. + - sched/core: Disable page allocation in task_tick_mm_cid() + - ALSA: hda/cs8409: Fix possible NULL dereference + - firmware: arm_scmi: Fix the double free in scmi_debugfs_common_setup() + - RDMA/cxgb4: Fix RDMA_CM_EVENT_UNREACHABLE error for iWARP + - RDMA/irdma: Fix misspelling of "accept*" + - RDMA/srpt: Make slab cache names unique + - ipv4: give an IPv4 dev to blackhole_netdev + - RDMA/bnxt_re: Fix the max CQ WQEs for older adapters + - RDMA/bnxt_re: Fix out of bound check + - RDMA/bnxt_re: Return more meaningful error + - RDMA/bnxt_re: Fix a bug while setting up Level-2 PBL pages + - RDMA/bnxt_re: Fix the GID table length + - accel/qaic: Fix the for loop used to walk SG table + - drm/msm/dpu: make sure phys resources are properly initialized + - drm/msm/dpu: check for overflow in _dpu_crtc_setup_lm_bounds() + - drm/msm/dsi: improve/fix dsc pclk calculation + - drm/msm/dsi: fix 32-bit signed integer extension in pclk_rate calculation + - drm/msm: Avoid NULL dereference in msm_disp_state_print_regs() + - drm/msm: Allocate memory for disp snapshot with kvzalloc() + - firmware: arm_scmi: Queue in scmi layer for mailbox implementation + - net/smc: Fix memory leak when using percpu refs + - net: usb: usbnet: fix race in probe failure + - net: stmmac: dwmac-tegra: Fix link bring-up sequence + - octeontx2-af: Fix potential integer overflows on integer shifts + - drm/amd/amdgpu: Fix double unlock in amdgpu_mes_add_ring + - macsec: don't increment counters for an unrelated SA + - netdevsim: use cond_resched() in nsim_dev_trap_report_work() + - net: ethernet: aeroflex: fix potential memory leak in + greth_start_xmit_gbit() + - net/smc: Fix searching in list of known pnetids in smc_pnet_add_pnetid + - net: xilinx: axienet: fix potential memory leak in axienet_start_xmit() + - bpf: Fix truncation bug in coerce_reg_to_size_sx() + - irqchip/renesas-rzg2l: Fix missing put_device + - drm/msm/dpu: don't always program merge_3d block + - net: bcmasp: fix potential memory leak in bcmasp_xmit() + - tcp/dccp: Don't use timer_pending() in reqsk_queue_unlink(). + - net: dsa: mv88e6xxx: Fix the max_vid definition for the MV88E6361 + - genetlink: hold RCU in genlmsg_mcast() + - ravb: Remove setting of RX software timestamp + - net: ravb: Only advertise Rx/Tx timestamps if hardware supports it + - scsi: target: core: Fix null-ptr-deref in target_alloc_device() + - smb: client: fix possible double free in smb2_set_ea() + - smb: client: fix OOBs when building SMB2_IOCTL request + - usb: typec: altmode should keep reference to parent + - s390: Initialize psw mask in perf_arch_fetch_caller_regs() + - bpf: Fix link info netfilter flags to populate defrag flag + - vmxnet3: Fix packet corruption in vmxnet3_xdp_xmit_frame + - net/mlx5: Check for invalid vector index on EQ creation + - net/mlx5: Fix command bitmask initialization + - net/mlx5: Unregister notifier on eswitch init failure + - bpf, sockmap: SK_DROP on attempted redirects of unsupported af_vsock + - vsock: Update rx_bytes on read_skb() + - vsock: Update msg_count on read_skb() + - bpf, vsock: Drop static vsock_bpf_prot initialization + - riscv, bpf: Make BPF_CMPXCHG fully ordered + - nvme-pci: fix race condition between reset and nvme_dev_disable() + - bpf: Fix iter/task tid filtering + - cdrom: Avoid barrier_nospec() in cdrom_ioctl_media_changed() + - khugepaged: inline hpage_collapse_alloc_folio() + - khugepaged: convert alloc_charge_hpage to alloc_charge_folio + - khugepaged: remove hpage from collapse_file() + - mm: khugepaged: fix the arguments order in khugepaged_collapse_file trace + point + - iio: adc: ti-lmp92064: add missing select IIO_(TRIGGERED_)BUFFER in Kconfig + - xhci: dbgtty: remove kfifo_out() wrapper + - xhci: dbgtty: use kfifo from tty_port struct + - xhci: dbc: honor usb transfer size boundaries. + - usb: gadget: f_uac2: fix non-newline-terminated function name + - usb: gadget: f_uac2: fix return value for UAC2_ATTRIBUTE_STRING store + - XHCI: Separate PORT and CAPs macros into dedicated file + - usb: dwc3: core: Fix system suspend on TI AM62 platforms + - tracing/fprobe-event: cleanup: Fix a wrong comment in fprobe event + - tracing/probes: cleanup: Set trace_probe::nr_args at trace_probe_init + - tracing/probes: Support $argN in return probe (kprobe and fprobe) + - uprobes: encapsulate preparation of uprobe args buffer + - uprobes: prepare uprobe args buffer lazily + - uprobes: prevent mutex_lock() under rcu_read_lock() + - uprobe: avoid out-of-bounds memory access of fetching args + - exec: don't WARN for racy path_noexec check + - ASoC: amd: yc: Add quirk for HP Dragonfly pro one + - ASoC: codecs: lpass-rx-macro: add missing CDC_RX_BCL_VBAT_RF_PROC2 to + default regs values + - ASoC: fsl_sai: Enable 'FIFO continue on error' FCONT bit + - arm64: Force position-independent veneers + - udf: refactor udf_current_aext() to handle error + - udf: refactor udf_next_aext() to handle error + - udf: refactor inode_bmap() to handle error + - udf: fix uninit-value use in udf_get_fileshortad + - ASoC: qcom: sm8250: add qrb4210-rb2-sndcard compatible string + - cifs: Validate content of NFS reparse point buffer + - platform/x86: dell-sysman: add support for alienware products + - LoongArch: Don't crash in stack_top() for tasks without vDSO + - jfs: Fix sanity check in dbMount + - tracing/probes: Fix MAX_TRACE_ARGS limit handling + - tracing: Consider the NULL character when validating the event length + - xfrm: extract dst lookup parameters into a struct + - xfrm: respect ip protocols rules criteria when performing dst lookups + - netfilter: bpf: must hold reference on net namespace + - net/sun3_82586: fix potential memory leak in sun3_82586_send_packet() + - net: plip: fix break; causing plip to never transmit + - octeon_ep: Implement helper for iterating packets in Rx queue + - octeon_ep: Add SKB allocation failures handling in __octep_oq_process_rx() + - net: dsa: mv88e6xxx: Fix error when setting port policy on mv88e6393x + - fsl/fman: Save device references taken in mac_probe() + - fsl/fman: Fix refcount handling of fman-related devices + - netfilter: xtables: fix typo causing some targets not to load on IPv6 + - net: wwan: fix global oob in wwan_rtnl_policy + - net/sched: adjust device watchdog timer to detect stopped queue at right + time + - net: fix races in netdev_tx_sent_queue()/dev_watchdog() + - net: usb: usbnet: fix name regression + - bpf: Add MEM_WRITE attribute + - bpf: Fix overloading of MEM_UNINIT's meaning + - bpf: Remove MEM_UNINIT from skb/xdp MTU helpers + - net/sched: act_api: deny mismatched skip_sw/skip_hw flags for actions + created by classifiers + - net: sched: fix use-after-free in taprio_change() + - net: sched: use RCU read-side critical section in taprio_dump() + - posix-clock: posix-clock: Fix unbalanced locking in pc_clock_settime() + - Bluetooth: SCO: Fix UAF on sco_sock_timeout + - Bluetooth: ISO: Fix UAF on iso_sock_timeout + - bpf,perf: Fix perf_event_detach_bpf_prog error handling + - net: dsa: mv88e6xxx: group cycle counter coefficients + - net: dsa: mv88e6xxx: read cycle counter period from hardware + - net: dsa: mv88e6xxx: support 4000ps cycle counter period + - ASoC: dt-bindings: davinci-mcasp: Fix interrupts property + - ASoC: dt-bindings: davinci-mcasp: Fix interrupt properties + - ASoC: loongson: Fix component check failed on FDT systems + - ASoC: max98388: Fix missing increment of variable slot_found + - ASoC: rsnd: Fix probe failure on HiHope boards due to endpoint parsing + - ASoC: fsl_micfil: Add a flag to distinguish with different volume control + types + - ALSA: firewire-lib: Avoid division by zero in apply_constraint_to_size() + - powercap: dtpm_devfreq: Fix error check against dev_pm_qos_add_request() + - nfsd: cancel nfsd_shrinker_work using sync mode in nfs4_state_shutdown_net + - ALSA: hda/realtek: Update default depop procedure + - smb: client: Handle kstrdup failures for passwords + - cpufreq: CPPC: fix perf_to_khz/khz_to_perf conversion exception + - btrfs: fix passing 0 to ERR_PTR in btrfs_search_dir_index_item() + - btrfs: zoned: fix zone unusable accounting for freed reserved extent + - ACPI: resource: Add LG 16T90SP to irq1_level_low_skip_override[] + - ACPI: PRM: Find EFI_MEMORY_RUNTIME block for PRM handler and context + - ACPI: button: Add DMI quirk for Samsung Galaxy Book2 to fix initial lid + detection issue + - nilfs2: fix kernel bug due to missing clearing of buffer delay flag + - openat2: explicitly return -E2BIG for (usize > PAGE_SIZE) + - KVM: nSVM: Ignore nCR3[4:0] when loading PDPTEs from memory + - KVM: arm64: Fix shift-out-of-bounds bug + - KVM: arm64: Don't eagerly teardown the vgic on init error + - x86/lam: Disable ADDRESS_MASKING in most cases + - [Config] disable ADDRESS_MASKING + - ALSA: hda/tas2781: select CRC32 instead of CRC32_SARWATE + - ALSA: hda/realtek: Add subwoofer quirk for Acer Predator G9-593 + - LoongArch: Get correct cores_per_package for SMT systems + - LoongArch: Enable IRQ if do_ale() triggered in irq-enabled context + - LoongArch: Make KASAN usable for variable cpu_vabits + - xfrm: fix one more kernel-infoleak in algo dumping + - hv_netvsc: Fix VF namespace also in synthetic NIC NETDEV_REGISTER event + - drm/amd/display: Disable PSR-SU on Parade 08-01 TCON too + - selinux: improve error checking in sel_write_load() + - net: phy: dp83822: Fix reset pin definitions + - ata: libata: Set DID_TIME_OUT for commands that actually timed out + - ASoC: qcom: Fix NULL Dereference in asoc_qcom_lpass_cpu_platform_probe() + - platform/x86: dell-wmi: Ignore suspend notifications + - ACPI: PRM: Clean up guid type in struct prm_handler_info + - tracing: probes: Fix to zero initialize a local variable + - task_work: make TWA_NMI_CURRENT handling conditional on IRQ_WORK + - xfrm: validate new SA's prefixlen using SA family when sel.family is unset + - bpf: Use raw_spinlock_t in ringbuf + - reset: starfive: jh71x0: Fix accessing the empty member on JH7110 SoC + - bpf: Fix unpopulated path_size when uprobe_multi fields unset + - RDMA/bnxt_re: Fix incorrect dereference of srq in async event + - RDMA/bnxt_re: Get the toggle bits from SRQ events + - RDMA/bnxt_re: Change the sequence of updating the CQ toggle value + - drm/msm/dpu: move CRTC resource assignment to dpu_encoder_virt_atomic_check + - ring-buffer: Fix reader locking when changing the sub buffer order + - drm/msm/dpu: Don't always set merge_3d pending flush + - drm/msm/a6xx+: Insert a fence wait before SMMU table update + - drm/xe: Take job list lock in xe_sched_add_pending_job + - drm/xe: Use bookkeep slots for external BO's in exec IOCTL + - net: ethernet: mtk_eth_soc: fix memory corruption during fq dma init + - net/mlx5e: Don't call cleanup on profile rollback failure + - bpf: Fix print_reg_state's constant scalar dump + - fsnotify: optimize the case of no parent watcher + - fsnotify: Avoid data race between fsnotify_recalc_mask() and + fsnotify_object_watched() + - drm/xe/mcr: Use Xe2_LPM steering tables for Xe2_HPM + - objpool: fix choosing allocation for percpu slots + - bnxt_en: replace ptp_lock with irqsave variant + - bpf, arm64: Fix address emission with tag-based KASAN enabled + - net: dsa: microchip: disable EEE for KSZ879x/KSZ877x/KSZ876x + - ASoC: topology: Bump minimal topology ABI version + - fbdev: wm8505fb: select CONFIG_FB_IOMEM_FOPS + - btrfs: qgroup: set a more sane default value for subtree drop threshold + - btrfs: clear force-compress on remount when compress mount option is given + - x86/amd_nb: Add new PCI IDs for AMD family 1Ah model 60h-70h + - x86/amd_nb: Add new PCI ID for AMD family 1Ah model 20h + - btrfs: reject ro->rw reconfiguration if there are hard ro requirements + - xfs: don't fail repairs on metadata files with no attr fork + - drm/bridge: Fix assignment of the of_node of the parent to aux bridge + - platform/x86/intel/pmc: Fix pmc_core_iounmap to call iounmap for valid + addresses + - fgraph: Fix missing unlock in register_ftrace_graph() + - fgraph: Change the name of cpuhp state to "fgraph:online" + - ASoC: SOF: Intel: hda: Always clean up link DMA during stop + - ASoC: dapm: avoid container_of() to get component + - ASoC: qcom: sc7280: Fix missing Soundwire runtime stream alloc + - ASoC: qcom: sdm845: add missing soundwire runtime stream alloc + - soundwire: intel_ace2x: Send PDI stream number during prepare + - x86: support user address masking instead of non-speculative conditional + - ASoC: qcom: Select missing common Soundwire module code on SDM845 + - SAUCE: Revert "iio: adc: ti-lmp92064: add missing select + IIO_(TRIGGERED_)BUFFER in Kconfig" + - Upstream stable to v6.6.58, v6.6.59, v6.11.6 + + * CVE-2025-21756 + - vsock: Keep the binding until socket destruction + - vsock: Orphan socket after transport release + + * Fix NIC name changes for ice (LP: #2100264) + - ice: Remove ndo_get_phys_port_name + + * CVE-2024-50256 + - netfilter: nf_reject_ipv6: fix potential crash in nf_send_reset6() + + * CVE-2025-21702 + - pfifo_tail_enqueue: Drop new packet when sch->limit == 0 + + * CVE-2024-50167 + - be2net: fix potential memory leak in be_xmit() + + * Fix line-out playback on some platforms with Cirrus Logic “Dolphin” hardware + (LP: #2099880) + - ALSA: hda/cirrus: Correct the full scale volume set logic + + * Enable Large Language Model (LLM) workloads using Intel NPU (LP: #2098972) + - accel/ivpu: Increase DMA address range + + * Patchset for TUXEDO devices (LP: #2098104) + - wifi: ath12k: add fallback board name without variant while searching + board-2.bin + - wifi: ath12k: remove unused ATH12K_BD_IE_BOARD_EXT + - wifi: ath12k: add support to search regdb data in board-2.bin for WCN7850 + - wifi: ath12k: support default regdb while searching board-2.bin for WCN7850 + - ACPI: resource: Use IRQ override on Maibenben X565 + - ACPI: resource: Do IRQ override on TongFang GXxHRXx and GMxHGxx + - ALSA: hda/realtek: Fix headset mic on TUXEDO Gemini 17 Gen3 + - ALSA: hda/realtek: Fix headset mic on TUXEDO Stellaris 16 Gen6 mb1 + - PCI: Avoid putting some root ports into D3 on TUXEDO Sirius Gen1 + - nvme-pci: Add TUXEDO InfinityFlex to Samsung sleep quirk + - nvme-pci: Add TUXEDO IBP Gen9 to Samsung sleep quirk + + * Introduce and use sendpages_ok() instead of sendpage_ok() in nvme-tcp and + drbd (LP: #2093871) + - net: introduce helper sendpages_ok() + - nvme-tcp: use sendpages_ok() instead of sendpage_ok() + - drbd: use sendpages_ok() instead of sendpage_ok() + + * CVE-2024-56765 + - powerpc/pseries/vas: Add close() callback in vas_vm_ops struct + + * CVE-2025-21700 + - net: sched: Disallow replacing of child qdisc from one parent to another + + * CVE-2024-56615 + - bpf: fix OOB devmap writes when deleting elements + + * CVE-2024-56651 + - can: hi311x: hi3110_can_ist(): fix potential use-after-free + + * CVE-2024-56627 + - ksmbd: fix Out-of-Bounds Read in ksmbd_vfs_stream_read + + * CVE-2024-56600 + - net: inet6: do not leave a dangling sk pointer in inet6_create() + + * CVE-2024-56661 + - tipc: fix NULL deref in cleanup_bearer() + + * CVE-2024-56642 + - tipc: Fix use-after-free of kernel socket in cleanup_bearer(). + + * CVE-2024-53227 + - scsi: bfa: Fix use-after-free in bfad_im_module_exit() + + * CVE-2024-53237 + - Bluetooth: fix use-after-free in device_for_each_child() + + * CVE-2024-53166 + - block, bfq: fix bfqq uaf in bfq_limit_depth() + + * CVE-2024-50265 + - ocfs2: remove entry once instead of null-ptr-dereference in + ocfs2_xa_remove() + + * CVE-2024-50249 + - ACPI: CPPC: Make rmw_lock a raw_spin_lock + + * iBFT iSCSI out-of-bounds shift UBSAN warning (LP: #2097824) + - iscsi_ibft: Fix UBSAN shift-out-of-bounds warning in ibft_attr_show_nic() + + * [Ubuntu 24.04] MultiVM - L2 guest(s) running stress-ng getting stuck at + booting after triggering crash (LP: #2077722) + - KVM: PPC: Book3S HV: Mask off LPCR_MER for a vCPU before running it to avoid + spurious interrupts + + * btrfs will WARN_ON() in btrfs_remove_qgroup() unnecessarily (LP: #2091719) + - btrfs: improve the warning and error message for btrfs_remove_qgroup() + + * CVE-2024-50248 + - ntfs3: Add bounds checking to mi_enum_attr() + - fs/ntfs3: Sequential field availability check in mi_enum_attr() + + * CVE-2025-21701 + - net: avoid race between device unregistration and ethnl ops + + * CVE-2024-57798 + - drm/dp_mst: Ensure mst_primary pointer is valid in + drm_dp_mst_handle_up_req() + + * CVE-2024-56672 + - blk-cgroup: Fix UAF in blkcg_unpin_online() + + * CVE-2024-56658 + - net: defer final 'struct net' free in netns dismantle + + * CVE-2024-56598 + - jfs: array-index-out-of-bounds fix in dtReadFirst + + * CVE-2024-56595 + - jfs: add a check to prevent array-index-out-of-bounds in dbAdjTree + + * CVE-2024-53140 + - netlink: terminate outstanding dump on socket close + + * CVE-2024-53063 + - media: dvbdev: prevent the risk of out of memory access + + * CVE-2024-50302 + - HID: core: zero-initialize the report buffer + + -- Stefan Bader Fri, 14 Mar 2025 15:25:38 +0100 + +linux (6.8.0-56.58) noble; urgency=medium + + * noble/linux: 6.8.0-56.58 -proposed tracker (LP: #2098244) + + * Noble update: upstream stable patchset 2024-07-19 (LP: #2073603) + - Revert "drm: Make drivers depends on DRM_DW_HDMI" + - Revert "UBUNTU: [Config] Drivers now depend on DRM_DW_HDMI" + + * drm/amd/display: Add check for granularity in dml ceil/floor helpers + (LP: #2098080) + - drm/amd/display: Add check for granularity in dml ceil/floor helpers + + * optimized default EPP for GNR family (LP: #2097554) + - cpufreq: intel_pstate: Update Balance-performance EPP for Granite Rapids + + * Incorrect LAPIC/x2APIC parsing order (LP: #2097455) + - x86/acpi: Fix LAPIC/x2APIC parsing order + + * MGLRU: page allocation failure on NUMA-enabled systems (LP: #2097214) + - mm/vmscan: wake up flushers conditionally to avoid cgroup OOM + + * Upstream commit 65357e2c164a: "RDMA/mana_ib: set node_guid" applied + incorrectly (LP: #2096885) + - Revert "RDMA/mana_ib: set node_guid" + + * AppArmor early policy load not funcitoning (LP: #2095370) + - SAUCE: Revert "UBUNTU: SAUCE: apparmor4.0.0 [67/90]: userns - add the + ability to reference a global variable for a feature value" + + * apparmor unconfined profile blocks pivot_root (LP: #2067900) + - SAUCE: Revert "UBUNTU: SAUCE: apparmor4.0.0 [81/90]: apparmor: convert easy + uses of unconfined() to label_mediates()" + + * CVE-2024-50117 + - drm/amd: Guard against bad data for ATIF ACPI method + + * CVE-2024-56582 + - btrfs: fix use-after-free in btrfs_encoded_read_endio() + + * CVE-2024-53165 + - sh: intc: Fix use-after-free bug in register_intc_controller() + + * CVE-2024-53156 + - wifi: ath9k: add range check for conn_rsp_epid in htc_connect_service() + + * CVE-2024-56663 + - wifi: nl80211: fix NL80211_ATTR_MLO_LINK_ID off-by-one + + * CVE-2024-56614 + - xsk: fix OOB map writes when deleting elements + + * VM boots slowly with large-BAR GPU Passthrough due to pci/probe.c redundancy + (LP: #2097389) + - PCI: Batch BAR sizing operations + + * Noble update: upstream stable patchset 2025-02-04 (LP: #2097393) + - Revert "PCI/MSI: Provide stubs for IMS functions" + - gfs2: Revert "introduce qd_bh_get_or_undo" + - gfs2: qd_check_sync cleanups + - gfs2: Revert "ignore negated quota changes" + - Revert "powerpc/ps3_defconfig: Disable PPC64_BIG_ENDIAN_ELF_ABI_V2" + - tracing: Have saved_cmdlines arrays all in one allocation + - spi: spi-fsl-lpspi: remove redundant spi_controller_put call + - ata: ahci: Add mask_port_map module parameter + - ASoC: tas2781: mark dvc_tlv with __maybe_unused + - scsi: sd: Do not repeat the starting disk message + - bootconfig: Fix the kerneldoc of _xbc_exit() + - perf sched: Move start_work_mutex and work_done_wait_mutex initialization to + perf_sched__replay() + - perf sched: Fix memory leak in perf_sched__map() + - perf sched: Move curr_thread initialization to perf_sched__map() + - perf sched: Move curr_pid and cpu_last_switched initialization to + perf_sched__{lat|map|replay}() + - libsubcmd: Don't free the usage string + - selftests: Introduce Makefile variable to list shared bash scripts + - jbd2: fix kernel-doc for j_transaction_overhead_buffers + - lib/build_OID_registry: avoid non-destructive substitution for Perl < 5.13.2 + compat + - drm/amd/display: Remove a redundant check in authenticated_dp + - drm/amd/display: Revert "Check HDCP returned status" + - zram: don't free statically defined names + - x86/amd_nb: Add new PCI IDs for AMD family 0x1a + - rtnetlink: change nlk->cb_mutex role + - rtnetlink: add RTNL_FLAG_DUMP_UNLOCKED flag + - mpls: no longer hold RTNL in mpls_netconf_dump_devconf() + - phonet: no longer hold RTNL in route_dumpit() + - rcu/nocb: Make IRQs disablement symmetric + - HID: asus: add ROG Ally N-Key ID and keycodes + - HID: asus: add ROG Z13 lightbar + - hid-asus: add ROG Ally X prod ID to quirk list + - scsi: Revert "scsi: sd: Do not repeat the starting disk message" + - btrfs: fix uninitialized pointer free in add_inode_ref() + - btrfs: fix uninitialized pointer free on read_alloc_one_name() error + - ksmbd: fix user-after-free from session log off + - ALSA: hda/conexant - Fix audio routing for HP EliteOne 1000 G2 + - mptcp: pm: fix UaF read in mptcp_pm_nl_rm_addr_or_subflow + - net: enetc: remove xdp_drops statistic from enetc_xdp_drop() + - net: enetc: block concurrent XDP transmissions during ring reconfiguration + - net: enetc: disable Tx BD rings after they are empty + - net: enetc: disable NAPI after all rings are disabled + - net: enetc: add missing static descriptor and inline keyword + - posix-clock: Fix missing timespec64 check in pc_clock_settime() + - udp: Compute L4 checksum as usual when not segmenting the skb + - arm64: probes: Remove broken LDR (literal) uprobe support + - arm64: probes: Fix simulate_ldr*_literal() + - arm64: probes: Fix uprobes for big-endian kernels + - net: macb: Avoid 20s boot delay by skipping MDIO bus registration for fixed- + link PHY + - net: microchip: vcap api: Fix memory leaks in vcap_api_encode_rule_test() + - maple_tree: correct tree corruption on spanning store + - nilfs2: propagate directory read errors from nilfs_find_entry() + - fat: fix uninitialized variable + - mm/mremap: fix move_normal_pmd/retract_page_tables race + - mm/swapfile: skip HugeTLB pages for unuse_vma + - mm/damon/tests/sysfs-kunit.h: fix memory leak in + damon_sysfs_test_add_targets() + - tcp: fix mptcp DSS corruption due to large pmtu xmit + - net: fec: Move `fec_ptp_read()` to the top of the file + - net: fec: Remove duplicated code + - mptcp: prevent MPC handshake on port-based signal endpoints + - iommu/vt-d: Fix incorrect pci_for_each_dma_alias() for non-PCI devices + - s390/sclp: Deactivate sclp after all its users + - s390/sclp_vt220: Convert newlines to CRLF instead of LFCR + - KVM: s390: gaccess: Check if guest address is in memslot + - KVM: s390: Change virtual to physical address access in diag 0x258 handler + - x86/cpufeatures: Define X86_FEATURE_AMD_IBPB_RET + - x86/cpufeatures: Add a IBPB_NO_RET BUG flag + - x86/entry: Have entry_ibpb() invalidate return predictions + - x86/bugs: Skip RSB fill at VMEXIT + - x86/bugs: Do not use UNTRAIN_RET with IBPB on entry + - fgraph: Use CPU hotplug mechanism to initialize idle shadow stacks + - blk-rq-qos: fix crash on rq_qos_wait vs. rq_qos_wake_function race + - io_uring/sqpoll: close race on waiting for sqring entries + - blk-mq: setup queue ->tag_set before initializing hctx + - ublk: don't allow user copy for unprivileged device + - selftest: hid: add the missing tests directory + - Input: xpad - add support for MSI Claw A1M + - scsi: mpi3mr: Correct a test in mpi3mr_sas_port_add() + - scsi: mpi3mr: Validate SAS port assignments + - scsi: ufs: core: Set SDEV_OFFLINE when UFS is shut down + - scsi: ufs: core: Fix the issue of ICU failure + - scsi: ufs: core: Requeue aborted request + - drm/radeon: Fix encoder->possible_clones + - drm/i915/dp_mst: Handle error during DSC BW overhead/slice calculation + - drm/i915/dp_mst: Don't require DSC hblank quirk for a non-DSC compatible + mode + - drm/xe/xe_sync: initialise ufence.signalled + - drm/xe/ufence: ufence can be signaled right after wait_woken + - drm/vmwgfx: Cleanup kms setup without 3d + - drm/vmwgfx: Handle surface check failure correctly + - drm/amdgpu/pm: Fix code alignment issue + - drm/amdgpu/smu13: always apply the powersave optimization + - drm/amdgpu/swsmu: Only force workload setup on init + - iio: dac: ad5770r: add missing select REGMAP_SPI in Kconfig + - iio: dac: ltc1660: add missing select REGMAP_SPI in Kconfig + - iio: dac: stm32-dac-core: add missing select REGMAP_MMIO in Kconfig + - iio: adc: ti-ads8688: add missing select IIO_(TRIGGERED_)BUFFER in Kconfig + - iio: hid-sensors: Fix an error handling path in + _hid_sensor_set_report_latency() + - iio: light: veml6030: fix ALS sensor resolution + - iio: light: veml6030: fix IIO device retrieval from embedded device + - iio: light: opt3001: add missing full-scale range value + - iio: amplifiers: ada4250: add missing select REGMAP_SPI in Kconfig + - iio: frequency: adf4377: add missing select REMAP_SPI in Kconfig + - iio: light: bu27008: add missing select IIO_(TRIGGERED_)BUFFER in Kconfig + - iio: resolver: ad2s1210 add missing select REGMAP in Kconfig + - iio: pressure: bm1390: add missing select IIO_(TRIGGERED_)BUFFER in Kconfig + - iio: dac: ad5766: add missing select IIO_(TRIGGERED_)BUFFER in Kconfig + - iio: proximity: mb1232: add missing select IIO_(TRIGGERED_)BUFFER in Kconfig + - iio: dac: ad3552r: add missing select IIO_(TRIGGERED_)BUFFER in Kconfig + - iio: adc: ti-lmp92064: add missing select IIO_(TRIGGERED_)BUFFER in Kconfig + - iio: adc: ti-lmp92064: add missing select REGMAP_SPI in Kconfig + - iio: adc: ti-ads124s08: add missing select IIO_(TRIGGERED_)BUFFER in Kconfig + - iio: resolver: ad2s1210: add missing select (TRIGGERED_)BUFFER in Kconfig + - iio: accel: kx022a: add missing select IIO_(TRIGGERED_)BUFFER in Kconfig + - Bluetooth: Call iso_exit() on module unload + - Bluetooth: Remove debugfs directory on module init failure + - Bluetooth: ISO: Fix multiple init when debugfs is disabled + - Bluetooth: btusb: Fix not being able to reconnect after suspend + - Bluetooth: btusb: Fix regression with fake CSR controllers 0a12:0001 + - vt: prevent kernel-infoleak in con_font_get() + - xhci: tegra: fix checked USB2 port number + - xhci: Fix incorrect stream context type macro + - xhci: Mitigate failed set dequeue pointer commands + - USB: serial: option: add support for Quectel EG916Q-GL + - USB: serial: option: add Telit FN920C04 MBIM compositions + - usb: typec: qcom-pmic-typec: fix sink status being overwritten with RP_DEF + - usb: dwc3: Wait for EndXfer completion before restoring GUSB2PHYCFG + - misc: microchip: pci1xxxx: add support for NVMEM_DEVID_AUTO for EEPROM + device + - misc: microchip: pci1xxxx: add support for NVMEM_DEVID_AUTO for OTP device + - serial: imx: Update mctrl old_status on RTSD interrupt + - parport: Proper fix for array out-of-bounds access + - x86/resctrl: Annotate get_mem_config() functions as __init + - x86/apic: Always explicitly disarm TSC-deadline timer + - x86/CPU/AMD: Only apply Zenbleed fix for Zen2 during late microcode load + - x86/entry_32: Do not clobber user EFLAGS.ZF + - x86/entry_32: Clear CPU buffers after register restore in NMI return + - tty: n_gsm: Fix use-after-free in gsm_cleanup_mux + - x86/bugs: Use code segment selector for VERW operand + - pinctrl: intel: platform: fix error path in device_for_each_child_node() + - pinctrl: ocelot: fix system hang on level based interrupts + - pinctrl: stm32: check devm_kasprintf() returned value + - pinctrl: apple: check devm_kasprintf() returned value + - irqchip/gic-v4: Don't allow a VMOVP on a dying VPE + - irqchip/sifive-plic: Unmask interrupt in plic_irq_enable() + - serial: qcom-geni: fix polled console initialisation + - serial: qcom-geni: revert broken hibernation support + - serial: qcom-geni: fix shutdown race + - serial: qcom-geni: fix dma rx cancellation + - serial: qcom-geni: fix receiver enable + - mm: vmscan.c: fix OOM on swap stress test + - ALSA: hda/conexant - Use cached pin control for Node 0x1d on HP EliteOne + 1000 G2 + - Upstream stable to v6.6.57, v6.11.5 + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) + - Revert "perf callchain: Fix stitch LBR memory leaks" + - ASoC: amd: acp: add ZSC control register programming sequence + - virtio: rename virtio_config_enabled to virtio_config_core_enabled + - virtio: allow driver to disable the configure change notification + - virtio-net: synchronize operstate with admin state on up/down + - virtio-net: synchronize probe with ndo_set_features + - wifi: rtw89: limit the PPDU length for VHT rate to 0x40000 + - af_unix: Don't call skb_get() for OOB skb. + - af_unix: Remove single nest in manage_oob(). + - af_unix: Rename unlinked_skb in manage_oob(). + - af_unix: Move spin_lock() in manage_oob(). + - iommu/amd: Move allocation of the top table into v1_alloc_pgtable + - iommu/amd: Set the pgsize_bitmap correctly + - drm/xe: Move and export xe_hw_engine lookup. + - drm/msm/dp: rename wide_bus_en to wide_bus_supported + - drm/msm/dp: enable widebus on all relevant chipsets + - bpf, arm64: Fix tailcall hierarchy + - libbpf: Don't take direct pointers into BTF data from st_ops + - s390/entry: Move early program check handler to entry.S + - selftests/bpf: fix to avoid __msg tag de-duplication by clang + - libbpf: Ensure new BTF objects inherit input endianness + - PCI: dwc: ep: Rename dw_pcie_ep_exit() to dw_pcie_ep_deinit() + - PCI: qcom-ep: Enable controller resources like PHY only after refclk is + available + - net: ravb: Fix maximum TX frame size for GbEth devices + - ravb: Make it clear the information relates to maximum frame size + - net: ravb: Fix R-Car RX frame size limit + - netfilter: nf_tables: missing objects with no memcg accounting + - PCI: dra7xx: Fix error handling when IRQ request fails in probe + - KVM: x86: Re-split x2APIC ICR into ICR+ICR2 for AMD (x2AVIC) + - intel_idle: fix ACPI _CST matching for newer Xeon platforms + - wifi: mt76: mt7925: fix a potential association failure upon resuming + - cifs: Remove intermediate object of failed create reparse call + - drm/amd/display: Disable replay if VRR capability is false + - drm/amd/display: Fix VRR cannot enable + - l2tp: free sessions using rcu + - net: skbuff: sprinkle more __GFP_NOWARN on ingress allocs + - nvme: fix metadata handling in nvme-passthrough + - wifi: wilc1000: Do not operate uninitialized hardware during suspend/resume + - x86/apic: Remove logical destination mode for 64-bit + - pmdomain: core: Use dev_name() instead of kobject_get_path() in debugfs + - drm/xe: Name and document Wa_14019789679 + - drm/xe: Add timeout to preempt fences + - drm/amd/display: Fix possible overflow in integer multiplication + - ext4: fix error message when rejecting the default hash + - power: supply: Drop use_cnt check from power_supply_property_is_writeable() + - ALSA: hda/realtek: fix mute/micmute LED for HP mt645 G8 + - drm/xe: Generate oob before compiling anything + - clk: qcom: gcc-sc8180x: Register QUPv3 RCGs for DFS on sc8180x + - drm/amd/display: Restore Optimized pbn Value if Failed to Disable DSC + - Revert "drm/amd/display: Skip Recompute DSC Params if no Stream on Link" + - pmdomain: core: Reduce debug summary table width + - fs/ntfs3: Do not call file_modified if collapse range failed + - fs/ntfs3: Optimize large writes into sparse file + - fs/ntfs3: Fix sparse warning in ni_fiemap + - fs/ntfs3: Refactor enum_rstbl to suppress static checker + - virtio_console: fix misc probe bugs + - ntfs3: Change to non-blocking allocation in ntfs_d_hash + - bpf: Call the missed btf_record_free() when map creation fails + - selftests/bpf: Fix ARG_PTR_TO_LONG {half-,}uninitialized test + - bpf: Check percpu map value size first + - s390/facility: Disable compile time optimization for decompressor code + - s390/mm: Add cond_resched() to cmm_alloc/free_pages() + - bpf, x64: Fix a jit convergence issue + - ext4: nested locking for xattr inode + - s390/cpum_sf: Remove WARN_ON_ONCE statements + - ktest.pl: Avoid false positives with grub2 skip regex + - soundwire: intel_bus_common: enable interrupts before exiting reset + - PCI: Add function 0 DMA alias quirk for Glenfly Arise chip + - clk: bcm: bcm53573: fix OF node leak in init + - PCI: Add ACS quirk for Qualcomm SA8775P + - i2c: i801: Use a different adapter-name for IDF adapters + - PCI: Mark Creative Labs EMU20k2 INTx masking as broken + - RISC-V: Don't have MAX_PHYSMEM_BITS exceed phys_addr_t + - mfd: intel_soc_pmic_chtwc: Make Lenovo Yoga Tab 3 X90F DMI match less strict + - mfd: intel-lpss: Add Intel Arrow Lake-H LPSS PCI IDs + - mfd: intel-lpss: Rename SPI intel_lpss_platform_info structs + - mfd: intel-lpss: Add Intel Panther Lake LPSS PCI IDs + - riscv: Omit optimized string routines when using KASAN + - riscv: avoid Imbalance in RAS + - RDMA/mlx5: Enforce umem boundaries for explicit ODP page faults + - PCI: qcom: Disable mirroring of DBI and iATU register space in BAR region + - PCI: endpoint: Assign PCI domain number for endpoint controllers + - soundwire: cadence: re-check Peripheral status with delayed_work + - riscv/kexec_file: Fix relocation type R_RISCV_ADD16 and R_RISCV_SUB16 + unknown + - media: videobuf2-core: clear memory related fields in + __vb2_plane_dmabuf_put() + - remoteproc: imx_rproc: Use imx specific hook for find_loaded_rsc_table + - usb: chipidea: udc: enable suspend interrupt after usb reset + - usb: dwc2: Adjust the timing of USB Driver Interrupt Registration in the + Crashkernel Scenario + - xhci: dbc: Fix STALL transfer event handling + - usb: host: xhci-plat: Parse xhci-missing_cas_quirk and apply quirk + - comedi: ni_routing: tools: Check when the file could not be opened + - LoongArch: Fix memleak in pci_acpi_scan_root() + - netfilter: nf_nat: don't try nat source port reallocation for reverse dir + clash + - netfilter: nf_reject: Fix build warning when CONFIG_BRIDGE_NETFILTER=n + - tools/iio: Add memory allocation failure check for trigger_name + - staging: vme_user: added bound check to geoid + - driver core: bus: Return -EIO instead of 0 when show/store invalid bus + attribute + - scsi: lpfc: Add ELS_RSP cmd to the list of WQEs to flush in + lpfc_els_flush_cmd() + - scsi: lpfc: Revise TRACE_EVENT log flag severities from KERN_ERR to + KERN_WARNING + - NFSD: Mark filecache "down" if init fails + - nfsd: nfsd_destroy_serv() must call svc_destroy() even if nfsd_startup_net() + failed + - ice: set correct dst VSI in only LAN filters + - ice: clear port vlan config during reset + - ice: disallow DPLL_PIN_STATE_SELECTABLE for dpll output pins + - ice: fix VLAN replay after reset + - SUNRPC: Fix integer overflow in decode_rc_list() + - tcp: fix to allow timestamp undo if no retransmits were sent + - tcp: fix tcp_enter_recovery() to zero retrans_stamp when it's safe + - tcp: fix TFO SYN_RECV to not zero retrans_stamp with retransmits out + - rxrpc: Fix uninitialised variable in rxrpc_send_data() + - selftests: net: no_forwarding: fix VID for $swp2 in one_bridge_two_pvids() + test + - Bluetooth: btusb: Don't fail external suspend requests + - net: phy: bcm84881: Fix some error handling paths + - Revert "net: stmmac: set PP_FLAG_DMA_SYNC_DEV only if XDP is enabled" + - net: ethernet: adi: adin1110: Fix some error handling path in + adin1110_read_fifo() + - net: dsa: b53: fix jumbo frame mtu check + - net: dsa: b53: fix max MTU for 1g switches + - net: dsa: b53: fix max MTU for BCM5325/BCM5365 + - net: dsa: b53: allow lower MTUs on BCM5325/5365 + - net: dsa: b53: fix jumbo frames on 10/100 ports + - drm/nouveau: pass cli to nouveau_channel_new() instead of drm+device + - nouveau/dmem: Fix privileged error in copy engine channel + - gpio: aspeed: Add the flush write to ensure the write complete. + - gpio: aspeed: Use devm_clk api to manage clock source + - powercap: intel_rapl_tpmi: Ignore minor version change + - ice: Fix netif_is_ice() in Safe Mode + - ice: Flush FDB entries before reset + - e1000e: change I219 (19) devices to ADP + - net: ibm: emac: mal: fix wrong goto + - btrfs: zoned: fix missing RCU locking in error message when loading zone + info + - sctp: ensure sk_state is set to CLOSED if hashing fails in sctp_listen_start + - netfilter: fib: check correct rtable in vrf setups + - net: ibm: emac: mal: add dcr_unmap to _remove + - net: dsa: refuse cross-chip mirroring operations + - rtnetlink: Add bulk registration helpers for rtnetlink message handlers. + - vxlan: Handle error of rtnl_register_module(). + - bridge: Handle error of rtnl_register_module(). + - mctp: Handle error of rtnl_register_module(). + - mpls: Handle error of rtnl_register_module(). + - phonet: Handle error of rtnl_register_module(). + - rcu/nocb: Fix rcuog wake-up from offline softirq + - x86/amd_nb: Add new PCI IDs for AMD family 1Ah model 60h + - HID: multitouch: Add support for lenovo Y9000P Touchpad + - hwmon: intel-m10-bmc-hwmon: relabel Columbiaville to CVL Die Temperature + - hwmon: (tmp513) Add missing dependency on REGMAP_I2C + - hwmon: (mc34vr500) Add missing dependency on REGMAP_I2C + - hwmon: (adm9240) Add missing dependency on REGMAP_I2C + - hwmon: (adt7470) Add missing dependency on REGMAP_I2C + - hwmon: (ltc2991) Add missing dependency on REGMAP_I2C + - HID: plantronics: Workaround for an unexcepted opposite volume key + - Revert "usb: yurex: Replace snprintf() with the safer scnprintf() variant" + - usb: dwc3: core: Stop processing of pending events if controller is halted + - usb: xhci: Fix problem with xhci resume from suspend + - usb: storage: ignore bogus device raised by JieLi BR21 USB sound chip + - usb: dwc3: re-enable runtime PM after failed resume + - usb: gadget: core: force synchronous registration + - hid: intel-ish-hid: Fix uninitialized variable 'rv' in + ish_fw_xfer_direct_dma + - ACPI: resource: Make Asus ExpertBook B2402 matches cover more models + - ACPI: resource: Make Asus ExpertBook B2502 matches cover more models + - drm/amdkfd: Fix an eviction fence leak + - drm/amd/display: fix hibernate entry for DCN35+ + - drm/xe/guc_submit: fix xa_store() error checking + - drm/i915/hdcp: fix connector refcounting + - drm/xe/ct: fix xa_store() error checking + - scsi: ufs: Use pre-calculated offsets in ufshcd_init_lrb() + - mmc: sdhci-of-dwcmshc: Prevent stale command interrupt handling + - mptcp: fallback when MPTCP opts are dropped after 1st data + - ata: libata: avoid superfluous disk spin down + spin up during hibernation + - OPP: fix error code in dev_pm_opp_set_config() + - net: dsa: lan9303: ensure chip reset and wait for READY status + - mptcp: pm: do not remove closing subflows + - powercap: intel_rapl_tpmi: Fix bogus register reading + - selftests/mm: fix incorrect buffer->mirror size in hmm2 double_map test + - selftests/rseq: Fix mm_cid test failure + - btrfs: split remaining space to discard in chunks + - btrfs: add cancellation points to trim loops + - fs/proc/kcore.c: allow translation of physical memory addresses + - io_uring/rw: fix cflags posting for single issue multishot read + - Upstream stable to v6.6.56, v6.11.1, v6.11.2, v6.11.3, v6.11.4 + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50182 + - secretmem: disable memfd_secret() if arch cannot set direct map + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50019 + - kthread: unpark only parked kthread + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50096 + - nouveau/dmem: Fix vulnerability in migrate_to_ram upon copy error + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50020 + - ice: Fix improper handling of refcount in ice_sriov_set_msix_vec_count() + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50021 + - ice: Fix improper handling of refcount in ice_dpll_init_rclk_pins() + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50022 + - device-dax: correct pgoff align in dax_set_mapping() + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50185 + - mptcp: handle consistently DSS corruption + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50023 + - net: phy: Remove LED entry from LEDs list on unregister + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50024 + - net: Fix an unsafe loop on the list + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50186 + - net: explicitly clear the sk pointer, when pf->create fails + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50025 + - scsi: fnic: Move flush_work initialization out of if block + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50026 + - scsi: wd33c93: Don't use stale scsi_pointer value + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50027 + - thermal: core: Free tzp copy along with the thermal zone + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50028 + - thermal: core: Reference count the zone in thermal_zone_get_by_id() + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50029 + - Bluetooth: hci_conn: Fix UAF in hci_enhanced_setup_sync + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50030 + - drm/xe/ct: prevent UAF in send_recv() + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50187 + - drm/vc4: Stop the active perfmon before being destroyed + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50031 + - drm/v3d: Stop the active perfmon before being destroyed + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50189 + - HID: amd_sfh: Switch to device-managed dmam_alloc_coherent() + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50033 + - slip: make slhc_remember() more robust against malicious packets + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50035 + - ppp: fix ppp_async_encode() illegal access + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50036 + - net: do not delay dst_entries_add() in dst_release() + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50038 + - netfilter: xtables: avoid NFPROTO_UNSPEC where needed + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50039 + - net/sched: accept TCA_STAB only for root qdisc + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50040 + - igb: Do not bring the device up after non-fatal error + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50041 + - i40e: Fix macvlan leak by synchronizing access to mac_filter_hash + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50042 + - ice: Fix increasing MSI-X on VF + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50093 + - thermal: intel: int340x: processor: Fix warning during module unload + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50044 + - Bluetooth: RFCOMM: FIX possible deadlock in rfcomm_sk_state_change + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50045 + - netfilter: br_netfilter: fix panic with metadata_dst skb + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50188 + - net: phy: dp83869: fix memory corruption when enabling fiber + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50046 + - NFSv4: Prevent NULL-pointer dereference in nfs42_complete_copies() + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50180 + - fbdev: sisfb: Fix strbuf array overflow + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50047 + - smb: client: fix UAF in async decryption + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50048 + - fbcon: Fix a NULL pointer dereference issue in fbcon_putcs + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50049 + - drm/amd/display: Check null pointer before dereferencing se + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50090 + - drm/xe/oa: Fix overflow in oa batch buffer + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50183 + - scsi: lpfc: Ensure DA_ID handling completion before deleting an NPIV + instance + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50055 + - driver core: bus: Fix double free in driver API bus_register() + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50056 + - usb: gadget: uvc: Fix ERR_PTR dereference in uvc_v4l2.c + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50184 + - virtio_pmem: Check device status before requesting flush + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50057 + - usb: typec: tipd: Free IRQ only if it was requested before + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50058 + - serial: protect uart_port_dtr_rts() in uart_shutdown() too + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50181 + - clk: imx: Remove CLK_SET_PARENT_GATE for DRAM mux for i.MX7D + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50059 + - ntb: ntb_hw_switchtec: Fix use after free vulnerability in + switchtec_ntb_remove due to race condition + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50060 + - io_uring: check if we need to reschedule during overflow flush + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50061 + - i3c: master: cdns: Fix use after free vulnerability in cdns_i3c_master + Driver Due to Race Condition + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50062 + - RDMA/rtrs-srv: Avoid null pointer deref during path establishment + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50095 + - RDMA/mad: Improve handling of timed out WRs of mad agent + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50063 + - bpf: Prevent tail call between progs attached to different hooks + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50191 + - ext4: don't set SB_RDONLY after filesystem errors + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50064 + - zram: free secondary algorithms names + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50089 + - unicode: Don't special case ignorable code points + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-49865 + - drm/xe/vm: move xa_alloc to prevent UAF + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-49968 + - ext4: filesystems without casefold feature cannot be mounted with siphash + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-49893 + - drm/amd/display: Check stream_status before it is used + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-49972 + - drm/amd/display: Deallocate DML memory if allocation fails + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-49914 + - drm/amd/display: Add null check for pipe_ctx->plane_state in + dcn20_program_pipe + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-49920 + - drm/amd/display: Check null pointers before multiple uses + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-49921 + - drm/amd/display: Check null pointers before used + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-50009 + - cpufreq: amd-pstate: add check for cpufreq_cpu_get's return value + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-47726 + - f2fs: fix to wait dio completion + + * Noble update: upstream stable patchset 2025-02-03 (LP: #2097301) // + CVE-2024-47711 + - af_unix: Don't return OOB skb in manage_oob(). + + * CVE-2024-53170 + - block: fix uaf for flush rq while iterating tags + + * CVE-2024-50148 + - Bluetooth: bnep: fix wild-memory-access in proto_unregister + + * CVE-2024-50134 + - drm/vboxvideo: Replace fake VLA at end of vbva_mouse_pointer_shape with real + VLA + + * CVE-2024-50171 + - net: systemport: fix potential memory leak in bcm_sysport_xmit() + + * CVE-2024-50229 + - nilfs2: fix potential deadlock with newly created symlinks + + * CVE-2024-50233 + - staging: iio: frequency: ad9832: fix division by zero in + ad9832_calc_freqreg() + + * [Lenovo Ubuntu 24.04 Bug] dmesg show "spi-nor: probe of spi0.0 failed with + error -95" (LP: #2070339) + - mtd: core: Don't fail mtd_otp_nvmem_add() if OTP is unsupported + - mtd: core: Align comment with an action in mtd_otp_nvmem_add() + + * python perf module missing in realtime kernel (LP: #2089411) + - [Packaging] linux-tools: Add missing python perf symlink + - [Packaging] linux-tools: Fix python perf library packaging + - [Packaging] linux-tools: Fall back to old python perf path + + * CVE-2024-53104 + - media: uvcvideo: Skip parsing frames of type UVC_VS_UNDEFINED in + uvc_parse_format + + -- Mehmet Basaran Fri, 14 Feb 2025 16:04:25 +0300 + +linux (6.8.0-54.56) noble; urgency=medium + + * CVE-2025-0927 + - SAUCE: fs: hfs/hfsplus: add key_len boundary check to hfs_bnode_read_key + + -- Manuel Diewald Fri, 07 Feb 2025 22:09:50 +0100 + +linux (6.8.0-53.55) noble; urgency=medium + + * noble/linux: 6.8.0-53.55 -proposed tracker (LP: #2093677) + + * Packaging resync (LP: #1786013) + - [Packaging] debian.master/dkms-versions -- update from kernel-versions + (main/2025.01.13) + + * generate and ship vmlinux.h to allow packages to build BPF CO-RE + (LP: #2050083) + - [Packaging] add linux-bpf-dev package + - [Packaging] do not attempt to generate BTF header on armhf + + * Unable to boot as a guest on VMware ESX (LP: #2091941) + - ptp/vmware: Use VMware hypercall API + - input/vmmouse: Use VMware hypercall API + - drm/vmwgfx: Use VMware hypercall API + - x86/vmware: Use VMware hypercall API + - x86/vmware: Correct macro names + - x86/vmware: Remove legacy VMWARE_HYPERCALL* macros + + * When /dev/vmbus/hv_kvp is not present, disable hv-kvp-daemon (LP: #2091744) + - [Packaging] disable hv-kvp-daemon if needed + + * Backport "netkit: Add option for scrubbing skb meta data" to 6.8 + (LP: #2091184) + - netkit: Add option for scrubbing skb meta data + + * KVM: Cache CPUID at KVM.ko module init to reduce latency of VM-Enter and VM- + Exit (LP: #2093146) + - KVM: x86: Cache CPUID.0xD XSTATE offsets+sizes during module init + + * [SRU] add support of QCA BT 0489:e0fc (LP: #2085406) + - Bluetooth: btusb: add Foxconn 0xe0fc for Qualcomm WCN785x + + * ice driver RTNL assertion failed warning on shutdown/reboot (LP: #2091107) + - ice: Remove and readd netdev during devlink reload + + * vfio_pci soft lockup on VM start while using PCIe passthrough (LP: #2089306) + - SAUCE: Revert "vfio/pci: Insert full vma on mmap'd MMIO fault" + - SAUCE: Revert "vfio/pci: Use unmap_mapping_range()" + + * [SRU] Fix error of resume on rtl8168fp (LP: #2087507) + - r8169: avoid unsolicited interrupts + + * [SRU] power: intel_pstate: HWP interrupt support for maximum ratio changed + (LP: #2090852) + - x86/cpufeatures: Add HWP highest perf change feature flag + - cpufreq: intel_pstate: Support highest performance change interrupt + + * Noble update: upstream stable patchset 2024-11-29 (LP: #2089884) + - static_call: Handle module init failure correctly in + static_call_del_module() + - static_call: Replace pointless WARN_ON() in static_call_module_notify() + - jump_label: Simplify and clarify static_key_fast_inc_cpus_locked() + - jump_label: Fix static_key_slow_dec() yet again + - scsi: st: Fix input/output error on empty drive reset + - scsi: pm8001: Do not overwrite PCI queue mapping + - drm/amdgpu: Fix get each xcp macro + - mailbox: rockchip: fix a typo in module autoloading + - mailbox: bcm2835: Fix timeout during suspend mode + - ceph: remove the incorrect Fw reference check when dirtying pages + - ieee802154: Fix build error + - net: sparx5: Fix invalid timestamps + - net/mlx5: Fix error path in multi-packet WQE transmit + - net/mlx5: Added cond_resched() to crdump collection + - net/mlx5e: Fix NULL deref in mlx5e_tir_builder_alloc() + - net/mlx5e: Fix crash caused by calling __xfrm_state_delete() twice + - netfilter: uapi: NFTA_FLOWTABLE_HOOK is NLA_NESTED + - net: ieee802154: mcr20a: Use IRQF_NO_AUTOEN flag in request_irq() + - net: wwan: qcom_bam_dmux: Fix missing pm_runtime_disable() + - selftests: netfilter: Fix nft_audit.sh for newer nft binaries + - netfilter: nf_tables: prevent nf_skb_duplicated corruption + - Bluetooth: MGMT: Fix possible crash on mgmt_index_removed + - Bluetooth: MGMT: Fix possible deadlocks + - Bluetooth: L2CAP: Fix uaf in l2cap_connect + - Bluetooth: hci_core: Fix calling mgmt_device_connected + - Bluetooth: btmrvl: Use IRQF_NO_AUTOEN flag in request_irq() + - net: Add netif_get_gro_max_size helper for GRO + - net: Fix gso_features_check to check for both dev->gso_{ipv4_,}max_size + - net: ethernet: lantiq_etop: fix memory disclosure + - net: fec: Restart PPS after link state change + - net: fec: Reload PTP registers after link-state change + - net: avoid potential underflow in qdisc_pkt_len_init() with UFO + - net: add more sanity checks to qdisc_pkt_len_init() + - net: stmmac: dwmac4: extend timeout for VLAN Tag register busy bit check + - ipv4: ip_gre: Fix drops of small packets in ipgre_xmit + - net: test for not too small csum_start in virtio_net_hdr_to_skb() + - ppp: do not assume bh is held in ppp_channel_bridge_input() + - iomap: constrain the file range passed to iomap_file_unshare + - dt-bindings: net: xlnx,axi-ethernet: Add missing reg minItems + - sctp: set sk_state back to CLOSED if autobind fails in sctp_listen_start + - i2c: xiic: improve error message when transfer fails to start + - i2c: xiic: Try re-initialization on bus busy timeout + - loop: don't set QUEUE_FLAG_NOMERGES + - ASoC: atmel: mchp-pdmc: Skip ALSA restoration if substream runtime is + uninitialized + - ALSA: mixer_oss: Remove some incorrect kfree_const() usages + - ALSA: hda/realtek: Fix the push button function for the ALC257 + - ALSA: hda/generic: Unconditionally prefer preferred_dacs pairs + - ASoC: imx-card: Set card.owner to avoid a warning calltrace if SND=m + - cifs: Fix buffer overflow when parsing NFS reparse points + - cifs: Do not convert delimiter when parsing NFS-style symlinks + - ALSA: gus: Fix some error handling paths related to get_bpos() usage + - ALSA: hda/conexant: Fix conflicting quirk for System76 Pangolin + - wifi: ath9k: fix possible integer overflow in ath9k_get_et_stats() + - wifi: rtw89: avoid to add interface to list twice when SER + - wifi: ath9k_htc: Use __skb_set_length() for resetting urb before resubmit + - crypto: x86/sha256 - Add parentheses around macros' single arguments + - crypto: octeontx - Fix authenc setkey + - crypto: octeontx2 - Fix authenc setkey + - ice: Adjust over allocation of memory in ice_sched_add_root_node() and + ice_sched_add_node() + - wifi: iwlwifi: mvm: Fix a race in scan abort flow + - wifi: iwlwifi: mvm: drop wrong STA selection in TX + - wifi: cfg80211: Set correct chandef when starting CAC + - net/xen-netback: prevent UAF in xenvif_flush_hash() + - net: hisilicon: hip04: fix OF node leak in probe() + - net: hisilicon: hns_dsaf_mac: fix OF node leak in hns_mac_get_info() + - net: hisilicon: hns_mdio: fix OF node leak in probe() + - ACPI: PAD: fix crash in exit_round_robin() + - ACPICA: Fix memory leak if acpi_ps_get_next_namepath() fails + - ACPICA: Fix memory leak if acpi_ps_get_next_field() fails + - e1000e: avoid failing the system during pm_suspend + - wifi: mt76: mt7915: disable tx worker during tx BA session enable/disable + - net: sched: consistently use rcu_replace_pointer() in taprio_change() + - Bluetooth: btusb: Add Realtek RTL8852C support ID 0x0489:0xe122 + - Bluetooth: btrtl: Set msft ext address filter quirk for RTL8852B + - ACPI: video: Add force_vendor quirk for Panasonic Toughbook CF-18 + - ACPI: CPPC: Add support for setting EPP register in FFH + - blk_iocost: fix more out of bound shifts + - wifi: ath12k: fix array out-of-bound access in SoC stats + - wifi: ath11k: fix array out-of-bound access in SoC stats + - wifi: rtw88: select WANT_DEV_COREDUMP + - ACPI: EC: Do not release locks during operation region accesses + - ACPICA: check null return of ACPI_ALLOCATE_ZEROED() in + acpi_db_convert_to_package() + - tipc: guard against string buffer overrun + - net: mvpp2: Increase size of queue_name buffer + - bnxt_en: Extend maximum length of version string by 1 byte + - ipv4: Check !in_dev earlier for ioctl(SIOCSIFADDR). + - wifi: rtw89: correct base HT rate mask for firmware + - ipv4: Mask upper DSCP bits and ECN bits in NETLINK_FIB_LOOKUP family + - net: atlantic: Avoid warning about potential string truncation + - crypto: simd - Do not call crypto_alloc_tfm during registration + - netpoll: Ensure clean state on setup failures + - tcp: avoid reusing FIN_WAIT2 when trying to find port in connect() process + - wifi: iwlwifi: mvm: use correct key iteration + - wifi: iwlwifi: mvm: avoid NULL pointer dereference + - ACPICA: iasl: handle empty connection_node + - proc: add config & param to block forcing mem writes + - [Config] updateconfigs to select PROC_MEM_ALWAYS_FORCE + - drivers/perf: arm_spe: Use perf_allow_kernel() for permissions + - can: netlink: avoid call to do_set_data_bittiming callback with stale + can_priv::ctrlmode + - wifi: mt76: mt7915: add dummy HW offload of IEEE 802.11 fragmentation + - wifi: mt76: mt7915: hold dev->mt76.mutex while disabling tx worker + - wifi: mwifiex: Fix memcpy() field-spanning write warning in + mwifiex_cmd_802_11_scan_ext() + - nfp: Use IRQF_NO_AUTOEN flag in request_irq() + - ALSA: usb-audio: Add input value sanity checks for standard types + - x86/ioapic: Handle allocation failures gracefully + - ALSA: usb-audio: Define macros for quirk table entries + - ALSA: usb-audio: Replace complex quirk lines with macros + - ALSA: usb-audio: Add logitech Audio profile quirk + - ASoC: codecs: wsa883x: Handle reading version failure + - tools/x86/kcpuid: Protect against faulty "max subleaf" values + - x86/pkeys: Add PKRU as a parameter in signal handling functions + - x86/pkeys: Restore altstack access in sigreturn() + - x86/kexec: Add EFI config table identity mapping for kexec kernel + - ALSA: asihpi: Fix potential OOB array access + - ALSA: hdsp: Break infinite MIDI input flush loop + - tools/nolibc: powerpc: limit stack-protector workaround to GCC + - selftests/nolibc: avoid passing NULL to printf("%s") + - x86/syscall: Avoid memcpy() for ia32 syscall_get_arguments() + - hwmon: (nct6775) add G15CF to ASUS WMI monitoring list + - fbdev: efifb: Register sysfs groups through driver core + - fbdev: pxafb: Fix possible use after free in pxafb_task() + - rcuscale: Provide clear error when async specified without primitives + - power: reset: brcmstb: Do not go into infinite loop if reset fails + - iommu/vt-d: Always reserve a domain ID for identity setup + - iommu/vt-d: Fix potential lockup if qi_submit_sync called with 0 count + - drm/stm: Avoid use-after-free issues with crtc and plane + - drm/amdgpu: disallow multiple BO_HANDLES chunks in one submit + - drm/amdgpu: prevent BO_HANDLES error from being overwritten + - drm/amdkfd: amdkfd_free_gtt_mem clear the correct pointer + - drm/amd/display: Add null check for top_pipe_to_program in + commit_planes_for_stream + - ata: pata_serverworks: Do not use the term blacklist + - ata: sata_sil: Rename sil_blacklist to sil_quirks + - HID: Ignore battery for all ELAN I2C-HID devices + - drm/amd/display: Handle null 'stream_status' in + 'planes_changed_for_existing_stream' + - drm/amd/display: Check null pointers before using dc->clk_mgr + - drm/amd/display: Add null check for 'afb' in + amdgpu_dm_plane_handle_cursor_update (v2) + - drm/amd/display: fix double free issue during amdgpu module unload + - jfs: UBSAN: shift-out-of-bounds in dbFindBits + - jfs: Fix uaf in dbFreeBits + - jfs: check if leafidx greater than num leaves per dmap tree + - scsi: smartpqi: correct stream detection + - drm/msm/adreno: Assign msm_gpu->pdev earlier to avoid nullptrs + - jfs: Fix uninit-value access of new_ea in ea_buffer + - drm/amdgpu: add raven1 gfxoff quirk + - drm/amdgpu: enable gfxoff quirk on HP 705G4 + - drm/amdkfd: Fix resource leak in criu restore queue + - HID: multitouch: Add support for Thinkpad X12 Gen 2 Kbd Portfolio + - platform/x86: touchscreen_dmi: add nanote-next quirk + - drm/stm: ltdc: reset plane transparency after plane disable + - drm/amd/display: Check stream before comparing them + - drm/amd/display: Check link_res->hpo_dp_link_enc before using it + - drm/amd/display: Fix index out of bounds in DCN30 degamma hardware format + translation + - drm/amd/display: Fix index out of bounds in degamma hardware format + translation + - drm/amd/display: Fix index out of bounds in DCN30 color transformation + - drm/amd/display: Avoid overflow assignment in link_dp_cts + - drm/amd/display: Initialize get_bytes_per_element's default to 1 + - drm/printer: Allow NULL data in devcoredump printer + - perf,x86: avoid missing caller address in stack traces captured in uprobe + - scsi: lpfc: Update PRLO handling in direct attached topology + - drm/amdgpu: fix unchecked return value warning for amdgpu_gfx + - perf: Fix event_function_call() locking + - scsi: NCR5380: Initialize buffer for MSG IN and STATUS transfers + - drm/radeon/r100: Handle unknown family in r100_cp_init_microcode() + - drm/amdgpu: Block MMR_READ IOCTL in reset + - drm/amdgpu/gfx9: use rlc safe mode for soft recovery + - drm/amd/pm: ensure the fw_info is not null before using it + - of/irq: Refer to actual buffer size in of_irq_parse_one() + - powerpc/pseries: Use correct data types from pseries_hp_errorlog struct + - drm/amdgpu/gfx11: use rlc safe mode for soft recovery + - drm/amdgpu/gfx10: use rlc safe mode for soft recovery + - platform/x86: lenovo-ymc: Ignore the 0x0 state + - ksmbd: add refcnt to ksmbd_conn struct + - ksmbd: fix use-after-free in SMB request handling + - bpf: Make the pointer returned by iter next method valid + - ext4: ext4_search_dir should return a proper error + - ext4: avoid use-after-free in ext4_ext_show_leaf() + - ext4: fix i_data_sem unlock order in ext4_ind_migrate() + - bpftool: Fix undefined behavior caused by shifting into the sign bit + - iomap: handle a post-direct I/O invalidate race in + iomap_write_delalloc_release + - bpftool: Fix undefined behavior in qsort(NULL, 0, ...) + - spi: spi-imx: Fix pm_runtime_set_suspended() with runtime pm enabled + - spi: spi-cadence: Fix pm_runtime_set_suspended() with runtime pm enabled + - spi: spi-cadence: Fix missing spi_controller_is_target() check + - selftest: hid: add missing run-hid-tools-tests.sh + - spi: s3c64xx: fix timeout counters in flush_fifo + - selftests: breakpoints: use remaining time to check if suspend succeed + - accel/ivpu: Add missing MODULE_FIRMWARE metadata + - spi: rpc-if: Add missing MODULE_DEVICE_TABLE + - perf: Really fix event_function_call() locking + - selftests: vDSO: fix vDSO name for powerpc + - selftests: vDSO: fix vdso_config for powerpc + - selftests: vDSO: fix vDSO symbols lookup for powerpc64 + - powerpc/vdso: Flag VDSO64 entry points as functions + - selftests/mm: fix charge_reserved_hugetlb.sh test + - powerpc/vdso: Fix VDSO data access when running in a non-root time namespace + - selftests: vDSO: fix ELF hash table entry size for s390x + - selftests: vDSO: fix vdso_config for s390 + - Revert "ALSA: hda: Conditionally use snooping for AMD HDMI" + - platform/x86: ISST: Fix the KASAN report slab-out-of-bounds bug + - i2c: stm32f7: Do not prepare/unprepare clock during runtime suspend/resume + - i2c: qcom-geni: Use IRQF_NO_AUTOEN flag in request_irq() + - i2c: xiic: Wait for TX empty to avoid missed TX NAKs + - media: i2c: ar0521: Use cansleep version of gpiod_set_value() + - i2c: xiic: Fix pm_runtime_set_suspended() with runtime pm enabled + - i2c: designware: fix controller is holding SCL low while ENABLE bit is + disabled + - rust: sync: require `T: Sync` for `LockedBy::access` + - ovl: fail if trusted xattrs are needed but caller lacks permission + - firmware: tegra: bpmp: Drop unused mbox_client_to_bpmp() + - memory: tegra186-emc: drop unused to_tegra186_emc() + - dt-bindings: clock: exynos7885: Fix duplicated binding + - spi: bcm63xx: Fix module autoloading + - spi: bcm63xx: Fix missing pm_runtime_disable() + - power: supply: hwmon: Fix missing temp1_max_alarm attribute + - perf/core: Fix small negative period being ignored + - parisc: Fix itlb miss handler for 64-bit programs + - drm/mediatek: ovl_adaptor: Add missing of_node_put() + - drm: Consistently use struct drm_mode_rect for FB_DAMAGE_CLIPS + - ALSA: hda/tas2781: Add new quirk for Lenovo Y990 Laptop + - ALSA: core: add isascii() check to card ID generator + - ALSA: usb-audio: Add delay quirk for VIVO USB-C HEADSET + - ALSA: usb-audio: Add native DSD support for Luxman D-08u + - ALSA: line6: add hw monitor volume control to POD HD500X + - ALSA: hda/realtek: Add quirk for Huawei MateBook 13 KLV-WX9 + - ALSA: hda/realtek: Add a quirk for HP Pavilion 15z-ec200 + - ext4: correct encrypted dentry name hash when not casefolded + - ext4: fix slab-use-after-free in ext4_split_extent_at() + - ext4: propagate errors from ext4_find_extent() in ext4_insert_range() + - ext4: fix incorrect tid assumption in ext4_fc_mark_ineligible() + - ext4: dax: fix overflowing extents beyond inode size when partially writing + - ext4: fix incorrect tid assumption in __jbd2_log_wait_for_space() + - ext4: drop ppath from ext4_ext_replay_update_ex() to avoid double-free + - ext4: aovid use-after-free in ext4_ext_insert_extent() + - ext4: fix double brelse() the buffer of the extents path + - ext4: fix timer use-after-free on failed mount + - ext4: update orig_path in ext4_find_extent() + - ext4: fix incorrect tid assumption in ext4_wait_for_tail_page_commit() + - ext4: fix incorrect tid assumption in jbd2_journal_shrink_checkpoint_list() + - ext4: fix fast commit inode enqueueing during a full journal commit + - ext4: use handle to mark fc as ineligible in __track_dentry_update() + - ext4: mark fc as ineligible using an handle in ext4_xattr_set() + - parisc: Fix 64-bit userspace syscall path + - parisc: Allow mmap(MAP_STACK) memory to automatically expand upwards + - parisc: Fix stack start for ADDR_NO_RANDOMIZE personality + - drm/rockchip: vop: clear DMA stop bit on RK3066 + - of: address: Report error on resource bounds overflow + - of/irq: Support #msi-cells=<0> in of_msi_get_domain + - drm: omapdrm: Add missing check for alloc_ordered_workqueue + - resource: fix region_intersects() vs add_memory_driver_managed() + - jbd2: stop waiting for space when jbd2_cleanup_journal_tail() returns error + - jbd2: correctly compare tids with tid_geq function in jbd2_fc_begin_commit + - mm: krealloc: consider spare memory for __GFP_ZERO + - mm: krealloc: Fix MTE false alarm in __do_krealloc + - ocfs2: fix the la space leak when unmounting an ocfs2 volume + - ocfs2: fix uninit-value in ocfs2_get_block() + - ocfs2: reserve space for inline xattr before attaching reflink tree + - ocfs2: cancel dqi_sync_work before freeing oinfo + - ocfs2: remove unreasonable unlock in ocfs2_read_blocks + - ocfs2: fix null-ptr-deref when journal load failed. + - ocfs2: fix possible null-ptr-deref in ocfs2_set_buffer_uptodate + - arm64: fix selection of HAVE_DYNAMIC_FTRACE_WITH_ARGS + - arm64: Subscribe Microsoft Azure Cobalt 100 to erratum 3194386 + - riscv: define ILLEGAL_POINTER_VALUE for 64bit + - [Config] updateconfigs to set ILLEGAL_POINTER_VALUE for riscv64 + - exfat: fix memory leak in exfat_load_bitmap() + - perf python: Disable -Wno-cast-function-type-mismatch if present on clang + - perf hist: Update hist symbol when updating maps + - nfsd: fix delegation_blocked() to block correctly for at least 30 seconds + - nfsd: map the EBADMSG to nfserr_io to avoid warning + - NFSD: Fix NFSv4's PUTPUBFH operation + - i3c: master: svc: Fix use after free vulnerability in svc_i3c_master Driver + Due to Race Condition + - RDMA/mana_ib: use the correct page size for mapping user-mode doorbell page + - riscv: Fix kernel stack size when KASAN is enabled + - aoe: fix the potential use-after-free problem in more places + - media: ov5675: Fix power on/off delay timings + - clk: rockchip: fix error for unknown clocks + - remoteproc: k3-r5: Fix error handling when power-up failed + - clk: qcom: dispcc-sm8250: use CLK_SET_RATE_PARENT for branch clocks + - media: sun4i_csi: Implement link validate for sun4i_csi subdev + - clk: qcom: gcc-sm8450: Do not turn off PCIe GDSCs during gdsc_disable() + - media: uapi/linux/cec.h: cec_msg_set_reply_to: zero flags + - clk: qcom: clk-rpmh: Fix overflow in BCM vote + - clk: samsung: exynos7885: Update CLKS_NR_FSYS after bindings fix + - clk: qcom: gcc-sm8150: De-register gcc_cpuss_ahb_clk_src + - media: venus: fix use after free bug in venus_remove due to race condition + - clk: qcom: gcc-sm8250: Do not turn off PCIe GDSCs during gdsc_disable() + - media: qcom: camss: Remove use_count guard in stop_streaming + - media: qcom: camss: Fix ordering of pm_runtime_enable + - clk: qcom: gcc-sc8180x: Fix the sdcc2 and sdcc4 clocks freq table + - clk: qcom: clk-alpha-pll: Fix CAL_L_VAL override for LUCID EVO PLL + - smb: client: use actual path when queryfs + - smb3: fix incorrect mode displayed for read-only files + - iio: magnetometer: ak8975: Fix reading for ak099xx sensors + - vrf: revert "vrf: Remove unnecessary RCU-bh critical section" + - gso: fix udp gso fraglist segmentation after pull from frag_list + - tomoyo: fallback to realpath if symlink's pathname does not exist + - net: stmmac: Fix zero-division error when disabling tc cbs + - rtc: at91sam9: fix OF node leak in probe() error path + - Input: adp5589-keys - fix NULL pointer dereference + - Input: adp5589-keys - fix adp5589_gpio_get_value() + - cachefiles: fix dentry leak in cachefiles_open_file() + - btrfs: fix a NULL pointer dereference when failed to start a new trasacntion + - btrfs: send: fix invalid clone operation for file that got its size + decreased + - btrfs: wait for fixup workers before stopping cleaner kthread during umount + - cpufreq: Avoid a bad reference count on CPU node + - gpio: davinci: fix lazy disable + - net: pcs: xpcs: fix the wrong register that was written back + - Bluetooth: hci_event: Align BR/EDR JUST_WORKS paring with LE + - mac802154: Fix potential RCU dereference issue in mac802154_scan_worker + - ceph: fix cap ref leak via netfs init_request + - tracing/hwlat: Fix a race during cpuhp processing + - tracing/timerlat: Drop interface_lock in stop_kthread() + - tracing/timerlat: Fix a race during cpuhp processing + - tracing/timerlat: Fix duplicated kthread creation due to CPU online/offline + - rtla: Fix the help text in osnoise and timerlat top tools + - drm/i915/gem: fix bitwise and logical AND mixup + - drm/sched: Add locking to drm_sched_entity_modify_sched + - drm/amd/display: Add HDR workaround for specific eDP + - cpufreq: intel_pstate: Make hwp_notify_lock a raw spinlock + - kconfig: qconf: fix buffer overflow in debug links + - platform/x86: x86-android-tablets: Fix use after free on + platform_device_register() errors + - i2c: core: Lock address during client device instantiation + - i2c: synquacer: Remove a clk reference from struct synquacer_i2c + - i2c: synquacer: Deal with optional PCLK correctly + - arm64: cputype: Add Neoverse-N3 definitions + - arm64: errata: Expand speculative SSBS workaround once more + - io_uring/net: harden multishot termination case for recv + - uprobes: fix kernel info leak via "[uprobes]" vma + - mm: z3fold: deprecate CONFIG_Z3FOLD + - [Config] updateconfigs for deprecated CONFIG_Z3FOLD + - drm/amd/display: Allow backlight to go below + `AMDGPU_DM_DEFAULT_MIN_BACKLIGHT` + - build-id: require program headers to be right after ELF header + - lib/buildid: harden build ID parsing logic + - sched: psi: fix bogus pressure spikes from aggregation race + - net: mana: Enable MANA driver on ARM64 with 4K page size + - net: mana: Add support for page sizes other than 4KB on ARM64 + - [Config] updateconfigs for MICROSOFT_MANA + - RDMA/mana_ib: use the correct page table index based on hardware page size + - media: imx335: Fix reset-gpio handling + - remoteproc: k3-r5: Acquire mailbox handle during probe routine + - remoteproc: k3-r5: Delay notification of wakeup event + - dt-bindings: clock: qcom: Add missing UFS QREF clocks + - dt-bindings: clock: qcom: Add GPLL9 support on gcc-sc8180x + - iio: pressure: bmp280: Improve indentation and line wrapping + - iio: pressure: bmp280: Use BME prefix for BME280 specifics + - iio: pressure: bmp280: Fix regmap for BMP280 device + - iio: pressure: bmp280: Fix waiting time for BMP3xx configuration + - r8169: Fix spelling mistake: "tx_underun" -> "tx_underrun" + - r8169: add tally counter fields added with RTL8125 + - clk: qcom: gcc-sc8180x: Add GPLL9 support + - ACPI: battery: Simplify battery hook locking + - ACPI: battery: Fix possible crash when unregistering a battery hook + - btrfs: drop the backref cache during relocation if we commit + - drm/rockchip: vop: enable VOP_FEATURE_INTERNAL_RGB on RK3066 + - rxrpc: Fix a race between socket set up and I/O thread creation + - vhost/scsi: null-ptr-dereference in vhost_scsi_get_req() + - crypto: octeontx* - Select CRYPTO_AUTHENC + - drm/amd/display: Revert Avoid overflow assignment + - perf report: Fix segfault when 'sym' sort key is not used + - drm/amd/display: enable_hpo_dp_link_output: Check link_res->hpo_dp_link_enc + before using it + - Revert "ubifs: ubifs_symlink: Fix memleak of inode->i_link in error path" + - perf python: Allow checking for the existence of warning options in clang + - drm/i915/dp: Fix AUX IO power enabling for eDP PSR + - drm/amd/display: handle nulled pipe context in DCE110's set_drr() + - selftests: netfilter: Add missing return value + - afs: Fix the setting of the server responding flag + - net: dsa: improve shutdown sequence + - bridge: mcast: Fail MDB get request on empty entry + - net/ncsi: Disable the ncsi work before freeing the associated structure + - drm/xe: Restore pci state upon resume + - drm/xe: Resume TDR after GT reset + - drm/xe: Prevent null pointer access in xe_migrate_copy + - fs/inode: Prevent dump_mapping() accessing invalid dentry.d_name.name + - ACPI: resource: Skip IRQ override on Asus Vivobook Go E1404GAB + - nvme-keyring: restrict match length for version '1' identifiers + - nvme-tcp: sanitize TLS key handling + - nvme-fabrics: typo in nvmf_parse_key() + - nvme-tcp: check for invalidated or revoked key + - net: fec: don't save PTP state if PTP is unsupported + - wifi: mac80211: fix RCU list iterations + - netdev-genl: Set extack and fix error on napi-get + - block: fix integer overflow in BLKSECDISCARD + - arm64: trans_pgd: mark PTEs entries as valid to avoid dead kexec() + - net: phy: Check for read errors in SIOCGMIIREG + - wifi: rtw89: avoid reading out of bounds when loading TX power FW elements + - x86/bugs: Add missing NO_SSB flag + - x86/bugs: Fix handling when SRSO mitigation is disabled + - net: napi: Prevent overflow of napi_defer_hard_irqs + - crypto: hisilicon - fix missed error branch + - ALSA: usb-audio: Add quirk for RME Digiface USB + - ALSA: usb-audio: Add mixer quirk for RME Digiface USB + - ALSA: control: Use automatic cleanup of kfree() + - ALSA: control: Fix unannotated kfree() cleanup + - ALSA: control: Use guard() for locking + - ALSA: control: Take power_ref lock primarily + - x86/mm/ident_map: Use gbpages only where full GB page should be mapped. + - ASoC: Intel: boards: always check the result of + acpi_dev_get_first_match_dev() + - rcu-tasks: Add data to eliminate RCU-tasks/do_exit() deadlocks + - rcu-tasks: Initialize data to eliminate RCU-tasks/do_exit() deadlocks + - rcu-tasks: Fix access non-existent percpu rtpcp variable in + rcu_tasks_need_gpcb() + - pmdomain: core: Don't hold the genpd-lock when calling dev_pm_domain_set() + - iommu/vt-d: Unconditionally flush device TLB for pasid table updates + - iommu/arm-smmu-v3: Do not use devm for the cd table allocations + - drm/amd/display: Pass non-null to dcn20_validate_apply_pipe_split_flags + - drm/amd/display: Check null pointers before using them + - drm/amd/display: Add null check for head_pipe in + dcn201_acquire_free_pipe_for_layer + - drm/amd/display: Add null check for head_pipe in + dcn32_acquire_idle_pipe_for_head_pipe_in_layer + - drm/amd/display: Add NULL check for clk_mgr and clk_mgr->funcs in + dcn30_init_hw + - drm/amd/display: Add NULL check for clk_mgr in dcn32_init_hw + - drm/amd/display: Use gpuvm_min_page_size_kbytes for DML2 surfaces + - scsi: smartpqi: Add new controller PCI IDs + - drm/amd/display: Add NULL check for function pointer in + dcn20_set_output_transfer_func + - drm/amd/display: Add NULL check for function pointer in + dcn32_set_output_transfer_func + - scsi: smartpqi: add new controller PCI IDs + - drm/amd/display: Check null-initialized variables + - drm/amd/display: Check phantom_stream before it is used + - drm/amdgpu/gfx9: properly handle error ints on all pipes + - scsi: lpfc: Validate hdwq pointers before dereferencing in reset/errata + paths + - scsi: lpfc: Fix unsolicited FLOGI kref imbalance when in direct attached + topology + - drm/amdgpu: check PS, WS index + - drm/amdgpu: fix wrong sizeof argument + - drm/amdgpu: fix unchecked return value warning for amdgpu_atombios + - drm/amdgpu/gfx11: enter safe mode before touching CP_INT_CNTL + - drm/xe: Invert page fault queue head / tail + - drm/xe: Add helper macro to loop each DSS + - drm/xe: fix multicast support for Xe_LP platforms + - drm/xe: Use topology to determine page fault queue size + - drm/xe: Drop warn on xe_guc_pc_gucrc_disable in guc pc fini + - ovl: fsync after metadata copy-up + - HID: i2c-hid: ensure various commands do not interfere with each other + - platform/mellanox: mlxbf-pmc: Replace uintN_t with kernel-style types + - platform/mellanox: mlxbf-pmc: Cleanup signed/unsigned mix-up + - platform/mellanox: mlxbf-pmc: fix signedness bugs + - platform/mellanox: mlxbf-pmc: fix lockdep warning + - bpf: Fix a sdiv overflow issue + - ALSA: control: Fix power_ref lock order for compat code, too + - perf callchain: Fix stitch LBR memory leaks + - drm/xe: fixup xe_alloc_pf_queue + - drm/xe: Fix memory leak on xe_alloc_pf_queue failure + - nvme-tcp: fix link failure for TCP auth + - f2fs: fix zoned block device information initialization + - f2fs: add write priority option based on zone UFS + - f2fs: make BG GC more aggressive for zoned devices + - f2fs: introduce migration_window_granularity + - f2fs: increase BG GC migration window granularity when boosted for zoned + devices + - f2fs: do FG_GC when GC boosting is required for zoned devices + - f2fs: forcibly migrate to secure space for zoned device file pinning + - mm, slub: avoid zeroing kmalloc redzone + - drm/v3d: Prevent out of bounds access in performance query extensions + - ext4: fix access to uninitialised lock in fc replay path + - ext4: fix off by one issue in alloc_flex_gd() + - scripts/gdb: add iteration function for rbtree + - scripts/gdb: fix lx-mounts command error + - sched/deadline: Comment sched_dl_entity::dl_server variable + - sched/core: Add clearing of ->dl_server in put_prev_task_balance() + - sched/core: Clear prev->dl_server in CFS pick fast path + - drivers/perf: riscv: Align errno for unsupported perf event + - ACPI: resource: Remove duplicate Asus E1504GAB IRQ override + - ACPI: resource: Loosen the Asus E1404GAB DMI match to also cover the E1404GA + - ACPI: resource: Add Asus Vivobook X1704VAP to irq1_level_low_skip_override[] + - ACPI: resource: Add Asus ExpertBook B2502CVA to + irq1_level_low_skip_override[] + - firmware/sysfb: Disable sysfb for firmware buffers with unknown parent + - close_range(): fix the logics in descriptor table trimming + - drm/sched: Fix dynamic job-flow control race + - drm/sched: Always wake up correct scheduler in drm_sched_entity_push_job + - drm/sched: Always increment correct scheduler score + - drm/xe: Delete unused GuC submission_state.suspend + - drm/xe: Use ordered wq for preempt fence waiting + - drm/xe: fix UAF around queue destruction + - sunrpc: change sp_nrthreads from atomic_t to unsigned int. + - NFSD: Async COPY result needs to return a write verifier + - NFSD: Limit the number of concurrent async COPY operations + - NFSD: Initialize struct nfsd4_copy earlier + - NFSD: Never decrement pending_async_copies on error + - drm/sched: revert "Always increment correct scheduler score" + - ALSA: control: Fix leftover snd_power_unref() + - Upstream stable to v6.6.55, v6.10.14 + + * By always inlining _compound_head(), clone() sees 3%+ performance increase + (LP: #2089327) + - mm: always inline _compound_head() with + CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP=y + + * Random flickering with Intel i915 (Comet Lake and Kaby Lake) on Linux 6.8+ + (LP: #2086587) + - SAUCE: iommu/intel: disable DMAR for KBL and CML integrated gfx + + * Add list of source files to linux-buildinfo (LP: #2086606) + - [Packaging] Sort build dependencies alphabetically + - [Packaging] Add list of used source files to buildinfo package + + * UFS: uspi->s_3apb UBSAN: shift-out-of-bounds (LP: #2087853) + - ufs: ufs_sb_private_info: remove unused s_{2, 3}apb fields + + * Mute/mic LEDs don't function on HP EliteBook 645 G10 (LP: #2087983) + - ALSA: hda/realtek: fix mute/micmute LEDs for a HP EliteBook 645 G10 + + * Noble update: upstream stable patchset 2024-11-22 (LP: #2089340) + - EDAC/synopsys: Fix ECC status and IRQ control race condition + - EDAC/synopsys: Fix error injection on Zynq UltraScale+ + - wifi: rtw88: always wait for both firmware loading attempts + - crypto: xor - fix template benchmarking + - ACPI: PMIC: Remove unneeded check in tps68470_pmic_opregion_probe() + - wifi: brcmfmac: export firmware interface functions + - wifi: brcmfmac: introducing fwil query functions + - wifi: ath9k: Remove error checks when creating debugfs entries + - wifi: ath12k: fix BSS chan info request WMI command + - wifi: ath12k: match WMI BSS chan info structure with firmware definition + - wifi: ath12k: fix invalid AMPDU factor calculation in + ath12k_peer_assoc_h_he() + - net: stmmac: dwmac-loongson: Init ref and PTP clocks rate + - arm64: signal: Fix some under-bracketed UAPI macros + - wifi: rtw88: remove CPT execution branch never used + - RISC-V: KVM: Fix sbiret init before forwarding to userspace + - RISC-V: KVM: Allow legacy PMU access from guest + - RISC-V: KVM: Fix to allow hpmcounter31 from the guest + - mount: handle OOM on mnt_warn_timestamp_expiry + - ARM: 9410/1: vfp: Use asm volatile in fmrx/fmxr macros + - powercap: intel_rapl: Fix off by one in get_rpi() + - kselftest/arm64: signal: fix/refactor SVE vector length enumeration + - drivers/perf: Fix ali_drw_pmu driver interrupt status clearing + - wifi: mac80211: don't use rate mask for offchannel TX either + - wifi: iwlwifi: remove AX101, AX201 and AX203 support from LNL + - wifi: iwlwifi: config: label 'gl' devices as discrete + - wifi: iwlwifi: mvm: increase the time between ranging measurements + - padata: Honor the caller's alignment in case of chunk_size 0 + - drivers/perf: hisi_pcie: Record hardware counts correctly + - drivers/perf: hisi_pcie: Fix TLP headers bandwidth counting + - kselftest/arm64: Actually test SME vector length changes via sigreturn + - can: j1939: use correct function name in comment + - ACPI: CPPC: Fix MASK_VAL() usage + - netfilter: nf_tables: elements with timeout below CONFIG_HZ never expire + - netfilter: nf_tables: reject element expiration with no timeout + - netfilter: nf_tables: reject expiration higher than timeout + - netfilter: nf_tables: remove annotation to access set timeout while holding + lock + - perf/arm-cmn: Improve debugfs pretty-printing for large configs + - perf/arm-cmn: Refactor node ID handling. Again. + - perf/arm-cmn: Fix CCLA register offset + - perf/arm-cmn: Ensure dtm_idx is big enough + - cpufreq: ti-cpufreq: Introduce quirks to handle syscon fails appropriately + - wifi: mt76: mt7915: fix oops on non-dbdc mt7986 + - wifi: mt76: mt7996: use hweight16 to get correct tx antenna + - wifi: mt76: mt7996: fix traffic delay when switching back to working channel + - wifi: mt76: mt7996: fix wmm set of station interface to 3 + - wifi: mt76: mt7996: fix HE and EHT beamforming capabilities + - wifi: mt76: mt7996: fix EHT beamforming capability check + - x86/sgx: Fix deadlock in SGX NUMA node search + - pm:cpupower: Add missing powercap_set_enabled() stub function + - crypto: hisilicon/hpre - mask cluster timeout error + - crypto: hisilicon/qm - reset device before enabling it + - crypto: hisilicon/qm - inject error before stopping queue + - wifi: mt76: mt7603: fix mixed declarations and code + - wifi: cfg80211: fix UBSAN noise in cfg80211_wext_siwscan() + - wifi: mt76: mt7915: fix rx filter setting for bfee functionality + - wifi: mt76: mt7996: ensure 4-byte alignment for beacon commands + - wifi: mt76: mt7996: fix uninitialized TLV data + - wifi: cfg80211: fix two more possible UBSAN-detected off-by-one errors + - wifi: mac80211: use two-phase skb reclamation in ieee80211_do_stop() + - wifi: wilc1000: fix potential RCU dereference issue in + wilc_parse_join_bss_param + - Bluetooth: hci_core: Fix sending MGMT_EV_CONNECT_FAILED + - Bluetooth: hci_sync: Ignore errors from HCI_OP_REMOTE_NAME_REQ_CANCEL + - sock_map: Add a cond_resched() in sock_hash_free() + - can: bcm: Clear bo->bcm_proc_read after remove_proc_entry(). + - can: m_can: enable NAPI before enabling interrupts + - can: m_can: m_can_close(): stop clocks after device has been shut down + - Bluetooth: btusb: Fix not handling ZPL/short-transfer + - bareudp: Pull inner IP header in bareudp_udp_encap_recv(). + - bareudp: Pull inner IP header on xmit. + - net: enetc: Use IRQF_NO_AUTOEN flag in request_irq() + - net: ipv6: rpl_iptunnel: Fix memory leak in rpl_input + - net: tipc: avoid possible garbage value + - ipv6: avoid possible NULL deref in rt6_uncached_list_flush_dev() + - ublk: move zone report data out of request pdu + - nbd: fix race between timeout and normal completion + - block, bfq: fix possible UAF for bfqq->bic with merge chain + - block, bfq: choose the last bfqq from merge chain in bfq_setup_cooperator() + - block, bfq: don't break merge chain in bfq_split_bfqq() + - cachefiles: Fix non-taking of sb_writers around set/removexattr + - erofs: fix incorrect symlink detection in fast symlink + - block, bfq: fix uaf for accessing waker_bfqq after splitting + - block, bfq: fix procress reference leakage for bfqq in merge chain + - io_uring/io-wq: do not allow pinning outside of cpuset + - io_uring/io-wq: inherit cpuset of cgroup in io worker + - block: fix potential invalid pointer dereference in blk_add_partition + - spi: ppc4xx: handle irq_of_parse_and_map() errors + - arm64: dts: exynos: exynos7885-jackpotlte: Correct RAM amount to 4GB + - arm64: dts: mediatek: mt8186: Fix supported-hw mask for GPU OPPs + - firmware: arm_scmi: Fix double free in OPTEE transport + - spi: ppc4xx: Avoid returning 0 when failed to parse and map IRQ + - regulator: Return actual error in of_regulator_bulk_get_all() + - arm64: dts: renesas: r9a07g043u: Correct GICD and GICR sizes + - arm64: dts: renesas: r9a07g054: Correct GICD and GICR sizes + - arm64: dts: renesas: r9a07g044: Correct GICD and GICR sizes + - ARM: dts: microchip: sam9x60: Fix rtc/rtt clocks + - arm64: dts: rockchip: Correct vendor prefix for Hardkernel ODROID-M1 + - arm64: dts: ti: k3-j721e-sk: Fix reversed C6x carveout locations + - arm64: dts: ti: k3-j721e-beagleboneai64: Fix reversed C6x carveout locations + - spi: bcmbca-hsspi: Fix missing pm_runtime_disable() + - ARM: dts: microchip: sama7g5: Fix RTT clock + - ARM: dts: imx7d-zii-rmu2: fix Ethernet PHY pinctrl property + - ARM: versatile: fix OF node leak in CPUs prepare + - reset: berlin: fix OF node leak in probe() error path + - reset: k210: fix OF node leak in probe() error path + - clocksource/drivers/qcom: Add missing iounmap() on errors in + msm_dt_timer_init() + - arm64: dts: mediatek: mt8195: Correct clock order for dp_intf* + - x86/mm: Use IPIs to synchronize LAM enablement + - ASoC: rt5682s: Return devm_of_clk_add_hw_provider to transfer the error + - ASoC: tas2781: remove unused acpi_subysystem_id + - ASoC: tas2781: Use of_property_read_reg() + - ASoC: tas2781-i2c: Drop weird GPIO code + - ASoC: tas2781-i2c: Get the right GPIO line + - selftests/ftrace: Add required dependency for kprobe tests + - ALSA: hda: cs35l41: fix module autoloading + - m68k: Fix kernel_clone_args.flags in m68k_clone() + - ASoC: loongson: fix error release + - hwmon: (max16065) Fix overflows seen when writing limits + - hwmon: (max16065) Remove use of i2c_match_id() + - hwmon: (max16065) Fix alarm attributes + - mtd: slram: insert break after errors in parsing the map + - hwmon: (ntc_thermistor) fix module autoloading + - power: supply: axp20x_battery: Remove design from min and max voltage + - power: supply: max17042_battery: Fix SOC threshold calc w/ no current sense + - fbdev: hpfb: Fix an error handling path in hpfb_dio_probe() + - iommu/amd: Do not set the D bit on AMD v2 table entries + - mtd: powernv: Add check devm_kasprintf() returned value + - rcu/nocb: Fix RT throttling hrtimer armed from offline CPU + - mtd: rawnand: mtk: Use for_each_child_of_node_scoped() + - mtd: rawnand: mtk: Factorize out the logic cleaning mtk chips + - mtd: rawnand: mtk: Fix init error path + - iommu/arm-smmu-qcom: hide last LPASS SMMU context bank from linux + - iommu/arm-smmu-qcom: Work around SDM845 Adreno SMMU w/ 16K pages + - iommu/arm-smmu-qcom: apply num_context_bank fixes for SDM630 / SDM660 + - pmdomain: core: Harden inter-column space in debug summary + - drm/stm: Fix an error handling path in stm_drm_platform_probe() + - drm/stm: ltdc: check memory returned by devm_kzalloc() + - drm/amd/display: Add null check for set_output_gamma in + dcn30_set_output_transfer_func + - drm/amdgpu: properly handle vbios fake edid sizing + - drm/radeon: properly handle vbios fake edid sizing + - scsi: smartpqi: revert propagate-the-multipath-failure-to-SML-quickly + - scsi: NCR5380: Check for phase match during PDMA fixup + - drm/amd/amdgpu: Properly tune the size of struct + - drm/rockchip: vop: Allow 4096px width scaling + - drm/rockchip: dw_hdmi: Fix reading EDID when using a forced mode + - drm/radeon/evergreen_cs: fix int overflow errors in cs track offsets + - drm/bridge: lontium-lt8912b: Validate mode in drm_bridge_funcs::mode_valid() + - drm/vc4: hdmi: Handle error case of pm_runtime_resume_and_get + - scsi: elx: libefc: Fix potential use after free in efc_nport_vport_del() + - jfs: fix out-of-bounds in dbNextAG() and diAlloc() + - drm/mediatek: Fix missing configuration flags in mtk_crtc_ddp_config() + - drm/mediatek: Use spin_lock_irqsave() for CRTC event lock + - powerpc/8xx: Fix initial memory mapping + - powerpc/8xx: Fix kernel vs user address comparison + - powerpc/vdso: Inconditionally use CFUNC macro + - drm/msm: Fix incorrect file name output in adreno_request_fw() + - drm/msm/a5xx: disable preemption in submits by default + - drm/msm/a5xx: properly clear preemption records on resume + - drm/msm/a5xx: fix races in preemption evaluation stage + - drm/msm/a5xx: workaround early ring-buffer emptiness check + - ipmi: docs: don't advertise deprecated sysfs entries + - drm/msm/dsi: correct programming sequence for SM8350 / SM8450 + - drm/msm: fix %s null argument error + - drivers:drm:exynos_drm_gsc:Fix wrong assignment in gsc_bind() + - xen: use correct end address of kernel for conflict checking + - HID: wacom: Support sequence numbers smaller than 16-bit + - HID: wacom: Do not warn about dropped packets for first packet + - ata: libata: Clear DID_TIME_OUT for ATA PT commands with sense data + - minmax: avoid overly complex min()/max() macro arguments in xen + - xen: introduce generic helper checking for memory map conflicts + - xen: move max_pfn in xen_memory_setup() out of function scope + - xen: add capability to remap non-RAM pages to different PFNs + - xen: tolerate ACPI NVS memory overlapping with Xen allocated memory + - xen/swiotlb: add alignment check for dma buffers + - xen/swiotlb: fix allocated size + - tpm: Clean up TPM space after command failure + - sched/fair: Make SCHED_IDLE entity be preempted in strict hierarchy + - selftests/bpf: Workaround strict bpf_lsm return value check. + - selftests/bpf: Fix error linking uprobe_multi on mips + - bpf: Use -Wno-error in certain tests when building with GCC + - bpf: Disable some `attribute ignored' warnings in GCC + - bpf: Temporarily define BPF_NO_PRESEVE_ACCESS_INDEX for GCC + - selftests/bpf: Add CFLAGS per source file and runner + - selftests/bpf: Fix wrong binary in Makefile log output + - tools/runqslower: Fix LDFLAGS and add LDLIBS support + - selftests/bpf: Use pid_t consistently in test_progs.c + - selftests/bpf: Fix compile error from rlim_t in sk_storage_map.c + - selftests/bpf: Fix error compiling bpf_iter_setsockopt.c with musl libc + - selftests/bpf: Drop unneeded error.h includes + - selftests/bpf: Fix missing ARRAY_SIZE() definition in bench.c + - selftests/bpf: Fix missing UINT_MAX definitions in benchmarks + - selftests/bpf: Fix missing BUILD_BUG_ON() declaration + - selftests/bpf: Replace CHECK with ASSERT_* in ns_current_pid_tgid test + - selftests/bpf: Refactor out some functions in ns_current_pid_tgid test + - selftests/bpf: Add a cgroup prog bpf_get_ns_current_pid_tgid() test + - selftests/bpf: Fix include of + - selftests/bpf: Fix compiling parse_tcp_hdr_opt.c with musl-libc + - selftests/bpf: Fix compiling kfree_skb.c with musl-libc + - selftests/bpf: Fix compiling flow_dissector.c with musl-libc + - selftests/bpf: Fix compiling tcp_rtt.c with musl-libc + - selftests/bpf: Fix compiling core_reloc.c with musl-libc + - selftests/bpf: Fix errors compiling lwt_redirect.c with musl libc + - selftests/bpf: Fix errors compiling decap_sanity.c with musl libc + - selftests/bpf: Fix errors compiling cg_storage_multi.h with musl libc + - selftests/bpf: Fix arg parsing in veristat, test_progs + - selftests/bpf: Fix error compiling test_lru_map.c + - selftests/bpf: Fix C++ compile error from missing _Bool type + - selftests/bpf: Fix flaky selftest lwt_redirect/lwt_reroute + - selftests/bpf: Fix redefinition errors compiling lwt_reroute.c + - selftests/bpf: Fix compile if backtrace support missing in libc + - selftests/bpf: Fix error compiling tc_redirect.c with musl libc + - samples/bpf: Fix compilation errors with cf-protection option + - bpf: correctly handle malformed BPF_CORE_TYPE_ID_LOCAL relos + - xz: cleanup CRC32 edits from 2018 + - kthread: fix task state in kthread worker if being frozen + - ext4: clear EXT4_GROUP_INFO_WAS_TRIMMED_BIT even mount with discard + - smackfs: Use rcu_assign_pointer() to ensure safe assignment in smk_set_cipso + - ext4: avoid buffer_head leak in ext4_mark_inode_used() + - ext4: avoid potential buffer_head leak in __ext4_new_inode() + - ext4: avoid negative min_clusters in find_group_orlov() + - ext4: return error on ext4_find_inline_entry + - ext4: avoid OOB when system.data xattr changes underneath the filesystem + - ext4: check stripe size compatibility on remount as well + - sched/numa: Fix the vma scan starving issue + - nilfs2: fix potential null-ptr-deref in nilfs_btree_insert() + - nilfs2: determine empty node blocks as corrupted + - nilfs2: fix potential oob read in nilfs_btree_check_delete() + - bpf: Fix bpf_strtol and bpf_strtoul helpers for 32bit + - bpf: Fix helper writes to read-only maps + - bpf: Improve check_raw_mode_ok test for MEM_UNINIT-tagged types + - bpf: Zero former ARG_PTR_TO_{LONG,INT} args in case of error + - perf mem: Free the allocated sort string, fixing a leak + - perf inject: Fix leader sampling inserting additional samples + - perf report: Fix --total-cycles --stdio output error + - perf sched timehist: Fix missing free of session in perf_sched__timehist() + - perf stat: Display iostat headers correctly + - perf sched timehist: Fixed timestamp error when unable to confirm event + sched_in time + - perf time-utils: Fix 32-bit nsec parsing + - clk: imx: clk-audiomix: Correct parent clock for earc_phy and audpll + - clk: imx: imx6ul: fix default parent for enet*_ref_sel + - clk: imx: composite-8m: Less function calls in __imx8m_clk_hw_composite() + after error detection + - clk: imx: composite-8m: Enable gate clk with mcore_booted + - clk: imx: composite-93: keep root clock on when mcore enabled + - clk: imx: composite-7ulp: Check the PCC present bit + - clk: imx: fracn-gppll: fix fractional part of PLL getting lost + - clk: imx: imx8mp: fix clock tree update of TF-A managed clocks + - clk: imx: imx8qxp: Register dc0_bypass0_clk before disp clk + - clk: imx: imx8qxp: Parent should be initialized earlier than the clock + - remoteproc: imx_rproc: Correct ddr alias for i.MX8M + - remoteproc: imx_rproc: Initialize workqueue earlier + - clk: rockchip: Set parent rate for DCLK_VOP clock on RK3228 + - clk: qcom: dispcc-sm8550: fix several supposed typos + - clk: qcom: dispcc-sm8550: use rcg2_ops for mdss_dptx1_aux_clk_src + - clk: qcom: dispcc-sm8650: Update the GDSC flags + - clk: qcom: dispcc-sm8550: use rcg2_shared_ops for ESC RCGs + - leds: bd2606mvv: Fix device child node usage in bd2606mvv_probe() + - pinctrl: ti: iodelay: Use scope based of_node_put() cleanups + - pinctrl: ti: ti-iodelay: Fix some error handling paths + - Input: ilitek_ts_i2c - avoid wrong input subsystem sync + - Input: ilitek_ts_i2c - add report id message validation + - drivers: media: dvb-frontends/rtl2832: fix an out-of-bounds write error + - drivers: media: dvb-frontends/rtl2830: fix an out-of-bounds write error + - PCI: Wait for Link before restoring Downstream Buses + - firewire: core: correct range of block for case of switch statement + - PCI: keystone: Fix if-statement expression in ks_pcie_quirk() + - clk: qcom: ipq5332: Register gcc_qdss_tsctr_clk_src + - clk: qcom: dispcc-sm8250: use special function for Lucid 5LPE PLL + - leds: leds-pca995x: Add support for NXP PCA9956B + - leds: pca995x: Use device_for_each_child_node() to access device child nodes + - leds: pca995x: Fix device child node usage in pca995x_probe() + - x86/PCI: Check pcie_find_root_port() return for NULL + - nvdimm: Fix devs leaks in scan_labels() + - PCI: xilinx-nwl: Fix register misspelling + - PCI: xilinx-nwl: Clean up clock on probe failure/removal + - media: platform: rzg2l-cru: rzg2l-csi2: Add missing MODULE_DEVICE_TABLE + - RDMA/iwcm: Fix WARNING:at_kernel/workqueue.c:#check_flush_dependency + - pinctrl: single: fix missing error code in pcs_probe() + - clk: at91: sama7g5: Allocate only the needed amount of memory for PLLs + - media: mediatek: vcodec: Fix H264 multi stateless decoder smatch warning + - media: mediatek: vcodec: Fix VP8 stateless decoder smatch warning + - media: mediatek: vcodec: Fix H264 stateless decoder smatch warning + - RDMA/rtrs: Reset hb_missed_cnt after receiving other traffic from peer + - RDMA/rtrs-clt: Reset cid to con_num - 1 to stay in bounds + - clk: ti: dra7-atl: Fix leak of of_nodes + - clk: starfive: Use pm_runtime_resume_and_get to fix pm_runtime_get_sync() + usage + - clk: rockchip: rk3588: Fix 32k clock name for pmu_24m_32k_100m_src_p + - nfsd: remove unneeded EEXIST error check in nfsd_do_file_acquire + - nfsd: fix refcount leak when file is unhashed after being found + - pinctrl: mvebu: Fix devinit_dove_pinctrl_probe function + - IB/core: Fix ib_cache_setup_one error flow cleanup + - PCI: kirin: Fix buffer overflow in kirin_pcie_parse_port() + - RDMA/erdma: Return QP state in erdma_query_qp + - RDMA/mlx5: Limit usage of over-sized mkeys from the MR cache + - watchdog: imx_sc_wdt: Don't disable WDT in suspend + - RDMA/hns: Don't modify rq next block addr in HIP09 QPC + - RDMA/hns: Fix Use-After-Free of rsv_qp on HIP08 + - RDMA/hns: Fix the overflow risk of hem_list_calc_ba_range() + - RDMA/hns: Fix spin_unlock_irqrestore() called with IRQs enabled + - RDMA/hns: Fix VF triggering PF reset in abnormal interrupt handler + - RDMA/hns: Fix 1bit-ECC recovery address in non-4K OS + - RDMA/hns: Optimize hem allocation performance + - RDMA/hns: Fix restricted __le16 degrades to integer issue + - RDMA/mlx5: Obtain upper net device only when needed + - riscv: Fix fp alignment bug in perf_callchain_user() + - RDMA/cxgb4: Added NULL check for lookup_atid + - RDMA/irdma: fix error message in irdma_modify_qp_roce() + - ntb: intel: Fix the NULL vs IS_ERR() bug for debugfs_create_dir() + - ntb_perf: Fix printk format + - ntb: Force physically contiguous allocation of rx ring buffers + - nfsd: call cache_put if xdr_reserve_space returns NULL + - nfsd: return -EINVAL when namelen is 0 + - crypto: caam - Pad SG length when allocating hash edesc + - crypto: powerpc/p10-aes-gcm - Disable CRYPTO_AES_GCM_P10 + - f2fs: atomic: fix to avoid racing w/ GC + - f2fs: reduce expensive checkpoint trigger frequency + - f2fs: fix to avoid racing in between read and OPU dio write + - f2fs: Create COW inode from parent dentry for atomic write + - f2fs: fix to wait page writeback before setting gcing flag + - f2fs: atomic: fix to truncate pagecache before on-disk metadata truncation + - f2fs: support .shutdown in f2fs_sops + - f2fs: fix to avoid use-after-free in f2fs_stop_gc_thread() + - f2fs: compress: don't redirty sparse cluster during {,de}compress + - f2fs: prevent atomic file from being dirtied before commit + - f2fs: get rid of online repaire on corrupted directory + - f2fs: fix to don't set SB_RDONLY in f2fs_handle_critical_error() + - spi: atmel-quadspi: Undo runtime PM changes at driver exit time + - spi: spi-fsl-lpspi: Undo runtime PM changes at driver exit time + - lib/sbitmap: define swap_lock as raw_spinlock_t + - spi: atmel-quadspi: Avoid overwriting delay register settings + - nvme-multipath: system fails to create generic nvme device + - iio: adc: ad7606: fix oversampling gpio array + - iio: adc: ad7606: fix standby gpio state to match the documentation + - driver core: Fix error handling in driver API device_rename() + - ABI: testing: fix admv8818 attr description + - iio: chemical: bme680: Fix read/write ops to device by adding mutexes + - iio: magnetometer: ak8975: drop incorrect AK09116 compatible + - dt-bindings: iio: asahi-kasei,ak8975: drop incorrect AK09116 compatible + - driver core: Fix a potential null-ptr-deref in module_add_driver() + - serial: 8250: omap: Cleanup on error in request_irq + - coresight: tmc: sg: Do not leak sg_table + - interconnect: icc-clk: Add missed num_nodes initialization + - cxl/pci: Fix to record only non-zero ranges + - vhost_vdpa: assign irq bypass producer token correctly + - ep93xx: clock: Fix off by one in ep93xx_div_recalc_rate() + - Revert "dm: requeue IO if mapping table not yet available" + - net: xilinx: axienet: Schedule NAPI in two steps + - net: xilinx: axienet: Fix packet counting + - netfilter: nf_reject_ipv6: fix nf_reject_ip6_tcphdr_put() + - net: seeq: Fix use after free vulnerability in ether3 Driver Due to Race + Condition + - net: ipv6: select DST_CACHE from IPV6_RPL_LWTUNNEL + - tcp: check skb is non-NULL in tcp_rto_delta_us() + - net: qrtr: Update packets cloning when broadcasting + - bonding: Fix unnecessary warnings and logs from bond_xdp_get_xmit_slave() + - virtio_net: Fix mismatched buf address when unmapping for small packets + - netfilter: nf_tables: Keep deleted flowtable hooks until after RCU + - netfilter: ctnetlink: compile ctnetlink_label_size with + CONFIG_NF_CONNTRACK_EVENTS + - netfilter: nf_tables: use rcu chain hook list iterator from netlink dump + path + - io_uring/sqpoll: do not allow pinning outside of cpuset + - io_uring: check for presence of task_work rather than TIF_NOTIFY_SIGNAL + - mm: call the security_mmap_file() LSM hook in remap_file_pages() + - drm/amd/display: Fix Synaptics Cascaded Panamera DSC Determination + - Revert "net: libwx: fix alloc msix vectors failed" + - xen: move checks for e820 conflicts further up + - xen: allow mapping ACPI data using a different physical address + - io_uring/sqpoll: retain test for whether the CPU is valid + - io_uring/sqpoll: do not put cpumask on stack + - Remove *.orig pattern from .gitignore + - PCI: Revert to the original speed after PCIe failed link retraining + - PCI: Clear the LBMS bit after a link retrain + - PCI: dra7xx: Fix threaded IRQ request for "dra7xx-pcie-main" IRQ + - PCI: imx6: Fix missing call to phy_power_off() in error handling + - PCI: Correct error reporting with PCIe failed link retraining + - PCI: Use an error code with PCIe failed link retraining + - PCI: xilinx-nwl: Fix off-by-one in INTx IRQ handler + - Revert "soc: qcom: smd-rpm: Match rpmsg channel instead of compatible" + - ASoC: rt5682: Return devm_of_clk_add_hw_provider to transfer the error + - soc: fsl: cpm1: tsa: Fix tsa_write8() + - soc: versatile: integrator: fix OF node leak in probe() error path + - Revert "media: tuners: fix error return code of + hybrid_tuner_request_state()" + - iommufd: Protect against overflow of ALIGN() during iova allocation + - Input: adp5588-keys - fix check on return code + - Input: i8042 - add TUXEDO Stellaris 16 Gen5 AMD to i8042 quirk table + - Input: i8042 - add TUXEDO Stellaris 15 Slim Gen6 AMD to i8042 quirk table + - Input: i8042 - add another board name for TUXEDO Stellaris Gen5 AMD line + - KVM: arm64: Add memory length checks and remove inline in do_ffa_mem_xfer + - KVM: x86: Enforce x2APIC's must-be-zero reserved ICR bits + - KVM: x86: Move x2APIC ICR helper above kvm_apic_write_nodecode() + - KVM: Use dedicated mutex to protect kvm_usage_count to avoid deadlock + - drm/amd/display: Add HDMI DSC native YCbCr422 support + - drm/amd/display: Round calculated vtotal + - drm/amd/display: Validate backlight caps are sane + - KEYS: prevent NULL pointer dereference in find_asymmetric_key() + - powerpc/atomic: Use YZ constraints for DS-form instructions + - fs: Create a generic is_dot_dotdot() utility + - ksmbd: make __dir_empty() compatible with POSIX + - ksmbd: allow write with FILE_APPEND_DATA + - ksmbd: handle caseless file creation + - ata: libata-scsi: Fix ata_msense_control() CDL page reporting + - scsi: sd: Fix off-by-one error in sd_read_block_characteristics() + - scsi: ufs: qcom: Update MODE_MAX cfg_bw value + - scsi: mac_scsi: Revise printk(KERN_DEBUG ...) messages + - scsi: mac_scsi: Refactor polling loop + - scsi: mac_scsi: Disallow bus errors during PDMA send + - can: esd_usb: Remove CAN_CTRLMODE_3_SAMPLES for CAN-USB/3-FD + - wifi: rtw88: Fix USB/SDIO devices not transmitting beacons + - usbnet: fix cyclical race on disconnect with work queue + - USB: appledisplay: close race between probe and completion handler + - USB: misc: cypress_cy7c63: check for short transfer + - USB: class: CDC-ACM: fix race between get_serial and set_serial + - usb: cdnsp: Fix incorrect usb_request status + - usb: dwc2: drd: fix clock gating on USB role switch + - bus: integrator-lm: fix OF node leak in probe() + - bus: mhi: host: pci_generic: Fix the name for the Telit FE990A + - firmware_loader: Block path traversal + - tty: rp2: Fix reset with non forgiving PCIe host bridges + - xhci: Set quirky xHC PCI hosts to D3 _after_ stopping and freeing them. + - serial: qcom-geni: fix fifo polling timeout + - crypto: ccp - Properly unregister /dev/sev on sev PLATFORM_STATUS failure + - drbd: Fix atomicity violation in drbd_uuid_set_bm() + - drbd: Add NULL check for net_conf to prevent dereference in state validation + - ACPI: sysfs: validate return type of _STR method + - ACPI: resource: Add another DMI match for the TongFang GMxXGxx + - efistub/tpm: Use ACPI reclaim memory for event log to avoid corruption + - perf/x86/intel/pt: Fix sampling synchronization + - wifi: mt76: mt7921: Check devm_kasprintf() returned value + - wifi: mt76: mt7915: check devm_kasprintf() returned value + - wifi: mt76: mt7996: fix NULL pointer dereference in mt7996_mcu_sta_bfer_he + - wifi: rtw88: 8821cu: Remove VID/PID 0bda:c82c + - wifi: rtw88: 8822c: Fix reported RX band width + - wifi: mt76: mt7615: check devm_kasprintf() returned value + - debugobjects: Fix conditions in fill_pool() + - btrfs: tree-checker: fix the wrong output of data backref objectid + - btrfs: always update fstrim_range on failure in FITRIM ioctl + - f2fs: fix several potential integer overflows in file offsets + - f2fs: prevent possible int overflow in dir_block_index() + - f2fs: avoid potential int overflow in sanity_check_area_boundary() + - f2fs: Require FMODE_WRITE for atomic write ioctls + - f2fs: fix to check atomic_file in f2fs ioctl interfaces + - hwrng: mtk - Use devm_pm_runtime_enable + - hwrng: bcm2835 - Add missing clk_disable_unprepare in bcm2835_rng_init + - hwrng: cctrng - Add missing clk_disable_unprepare in cctrng_resume + - arm64: esr: Define ESR_ELx_EC_* constants as UL + - arm64: errata: Enable the AC03_CPU_38 workaround for ampere1a + - arm64: dts: rockchip: Raise Pinebook Pro's panel backlight PWM frequency + - arm64: dts: qcom: sa8775p: Mark APPS and PCIe SMMUs as DMA coherent + - arm64: dts: rockchip: Correct the Pinebook Pro battery design capacity + - vfs: fix race between evice_inodes() and find_inode()&iput() + - fs: Fix file_set_fowner LSM hook inconsistencies + - nfs: fix memory leak in error path of nfs4_do_reclaim + - EDAC/igen6: Fix conversion of system address to physical memory address + - icmp: change the order of rate limits + - cpuidle: riscv-sbi: Use scoped device node handling to fix missing + of_node_put + - padata: use integer wrap around to prevent deadlock on seq_nr overflow + - spi: fspi: involve lut_num for struct nxp_fspi_devtype_data + - ARM: dts: imx6ul-geam: fix fsl,pins property in tscgrp pinctrl + - soc: versatile: realview: fix memory leak during device remove + - soc: versatile: realview: fix soc_dev leak during device remove + - USB: misc: yurex: fix race between read and write + - xhci: Add a quirk for writing ERST in high-low order + - usb: xhci: fix loss of data on Cadence xHC + - pps: remove usage of the deprecated ida_simple_xx() API + - pps: add an error check in parport_attach + - serial: don't use uninitialized value in uart_poll_init() + - x86/idtentry: Incorporate definitions/declarations of the FRED entries + - x86/entry: Remove unwanted instrumentation in common_interrupt() + - lib/bitmap: add bitmap_{read,write}() + - btrfs: subpage: fix the bitmap dump which can cause bitmap corruption + - btrfs: fix race setting file private on concurrent lseek using same fd + - dt-bindings: spi: nxp-fspi: support i.MX93 and i.MX95 + - dt-bindings: spi: nxp-fspi: add imx8ulp support + - thunderbolt: Improve DisplayPort tunnel setup process to be more robust + - bpf: lsm: Set bpf_lsm_blob_sizes.lbs_task to 0 + - dm-verity: restart or panic on an I/O error + - lockdep: fix deadlock issue between lockdep and rcu + - mm: only enforce minimum stack gap size if it's sensible + - spi: fspi: add support for imx8ulp + - module: Fix KCOV-ignored file name + - mm/damon/vaddr: protect vma traversal in __damon_va_thre_regions() with rcu + read lock + - i2c: aspeed: Update the stop sw state when the bus recovery occurs + - i2c: isch: Add missed 'else' + - Documentation: KVM: fix warning in "make htmldocs" + - bpf: Fix use-after-free in bpf_uprobe_multi_link_attach() + - wifi: brcmfmac: add linefeed at end of file + - x86/tdx: Fix "in-kernel MMIO" check + - spi: atmel-quadspi: Fix wrong register value written to MR + - Revert: "dm-verity: restart or panic on an I/O error" + - wifi: ath11k: use work queue to process beacon tx event + - crypto: qat - disable IOV in adf_dev_stop() + - crypto: qat - fix recovery flow for VFs + - crypto: qat - ensure correct order in VF restarting handler + - crypto: iaa - Fix potential use after free bug + - autofs: fix missing fput for FSCONFIG_SET_FD + - arm64: smp: smp_send_stop() and crash_smp_send_stop() should try non-NMI + first + - thermal: core: Fold two functions into their respective callers + - thermal: core: Fix rounding of delay jiffies + - perf/dwc_pcie: Fix registration issue in multi PCIe controller instances + - perf/dwc_pcie: Always register for PCIe bus notifier + - ACPI: video: force native for some T2 macbooks + - ACPI: video: force native for Apple MacbookPro9,2 + - wifi: cfg80211: fix bug of mapping AF3x to incorrect User Priority + - wifi: mac80211: fix the comeback long retry times + - ACPICA: Implement ACPI_WARNING_ONCE and ACPI_ERROR_ONCE + - ACPICA: executer/exsystem: Don't nag user about every Stall() violating the + spec + - netfilter: nft_dynset: annotate data-races around set timeout + - wifi: mt76: mt7921: fix wrong UNII-4 freq range check for the channel usage + - crypto: ccp - do not request interrupt on cmd completion when irqs disabled + - wifi: mt76: connac: fix checksum offload fields of connac3 RXD + - net: hsr: Use the seqnr lock for frames received via interlink port. + - crypto: n2 - Set err to EINVAL if snprintf fails for hmac + - firmware: qcom: scm: Disable SDI and write no dump to dump mode + - arm64: dts: renesas: r9a08g045: Correct GICD and GICR sizes + - arm64: tegra: Correct location of power-sensors for IGX Orin + - arm64: dts: ti: k3-am654-idk: Fix dtbs_check warning in ICSSG dmas + - selftests/ftrace: Fix eventfs ownership testcase to find mount point + - iommu/amd: Introduce struct protection_domain.pd_mode + - iommu/amd: Allocate the page table root using GFP_KERNEL + - iommu/amd: Convert comma to semicolon + - platform/x86: ideapad-laptop: Make the scope_guard() clear of its scope + - kselftest: dt: Ignore nodes that have ancestors disabled + - bpf, x64: Fix tailcall hierarchy + - bpf, lsm: Add check for BPF LSM return value + - bpf: Fix compare error in function retval_range_within + - bpf: Fail verification for sign-extension of packet data/data_end/data_meta + - selftests/bpf: Support checks against a regular expression + - selftests/bpf: no need to track next_match_pos in struct test_loader + - selftests/bpf: extract test_loader->expect_msgs as a data structure + - selftests/bpf: allow checking xlated programs in verifier_* tests + - selftests/bpf: __arch_* macro to limit test cases to specific archs + - libbpf: Fix bpf_object__open_skeleton()'s mishandling of options + - s390/ap: Fix deadlock caused by recursive lock of the AP bus scan mutex + - sched/deadline: Fix schedstats vs deadline servers + - perf scripts python cs-etm: Restore first sample log in verbose mode + - perf lock contention: Change stack_id type to s32 + - quota: avoid missing put_quota_format when DQUOT_SUSPENDED is passed + - media: staging: media: starfive: camss: Drop obsolete return value + documentation + - leds: gpio: Set num_leds after allocation + - iommufd/selftest: Fix buffer read overrrun in the dirty test + - iommufd: Check the domain owner of the parent before creating a nesting + domain + - RDMA/mlx5: Fix counter update on MR cache mkey creation + - RDMA/mlx5: Drop redundant work canceling from clean_keys() + - RDMA/mlx5: Fix MR cache temp entries cleanup + - RDMA/hns: Fix ah error counter in sw stat not increasing + - Coresight: Set correct cs_mode for TPDM to fix disable issue + - Coresight: Set correct cs_mode for dummy source to fix disable issue + - interconnect: qcom: sm8250: Enable sync_state + - vdpa/mlx5: Fix invalid mr resource destroy + - net: stmmac: set PP_FLAG_DMA_SYNC_DEV only if XDP is enabled + - selftests: netfilter: Avoid hanging ipvs.sh + - io_uring/rw: treat -EOPNOTSUPP for IOCB_NOWAIT like -EAGAIN + - mm: migrate: annotate data-race in migrate_folio_unmap() + - selftests/bpf: correctly move 'log' upon successful match + - soc: fsl: cpm1: qmc: Update TRNSYNC only in transparent mode + - drm/amdgpu/vcn: enable AV1 on both instances + - drm/amd/display: Clean up dsc blocks in accelerated mode + - drm/amd/display: Skip to enable dsc if it has been off + - arm64: dts: mediatek: mt8195-cherry: Mark USB 3.0 on xhci1 as disabled + - usb: xHCI: add XHCI_RESET_ON_RESUME quirk for Phytium xHCI host + - serial: qcom-geni: fix false console tx restart + - crypto: qcom-rng - fix support for ACPI-based systems + - ACPI: resource: Do IRQ override on MECHREV GM7XG0M + - perf/x86/intel: Allow to setup LBR for counting event for BPF + - f2fs: check discard support for conventional zones + - netfs: Delete subtree of 'fs/netfs' when netfs module exits + - md: Don't flush sync_work in md_write_start() + - tools/nolibc: include arch.h from string.h + - KVM: x86: Make x2APIC ID 100% readonly + - x86/mm/cpa: Warn for set_memory_XXcrypted() VMM fails + - x86/mm: Make x86_platform.guest.enc_status_change_*() return an error + - x86/tdx: Account shared memory + - x86/mm: Add callbacks to prepare encrypted memory for kexec + - x86/tdx: Convert shared memory back to private on kexec + - soc: qcom: geni-se: add GP_LENGTH/IRQ_EN_SET/IRQ_EN_CLEAR registers + - serial: qcom-geni: fix arg types for qcom_geni_serial_poll_bit() + - serial: qcom-geni: introduce qcom_geni_serial_poll_bitfield() + - idpf: stop using macros for accessing queue descriptors + - fs_parse: add uid & gid option option parsing helpers + - compiler.h: specify correct attribute for .rodata..c_jump_table + - exfat: resolve memory leak from exfat_create_upcase_table() + - s390/ftrace: Avoid calling unwinder in ftrace_return_address() + - fbdev: xen-fbfront: Assign fb_info->device + - [Config] update configs for CONFIG_CRYPTO_AES_GCM_P10 + - Upstream stable to v6.6.54, v6.10.13 + + * Backport some AppArmor complain-mode profile bugfixes from Oracular + (LP: #2086210) + - SAUCE: apparmor4.0.0 [94/99]: apparmor: allocate xmatch for nullpdf inside + aa_alloc_null + - SAUCE: apparmor4.0.0 [95/99]: apparmor: properly handle cx/px lookup failure + for complain mode profiles + + * Noble update: upstream stable patchset 2024-11-08 (LP: #2087519) + - ASoC: SOF: mediatek: Add missing board compatible + - ASoC: mediatek: mt8188: Mark AFE_DAC_CON0 register as volatile + - ASoC: allow module autoloading for table db1200_pids + - ASoC: allow module autoloading for table board_ids + - scsi: lpfc: Fix overflow build issue + - pinctrl: at91: make it work with current gpiolib + - hwmon: (asus-ec-sensors) remove VRM temp X570-E GAMING + - microblaze: don't treat zero reserved memory regions as error + - platform/x86: x86-android-tablets: Make Lenovo Yoga Tab 3 X90F DMI match + less strict + - net: ftgmac100: Ensure tx descriptor updates are visible + - LoongArch: Define ARCH_IRQ_INIT_FLAGS as IRQ_NOPROBE + - wifi: iwlwifi: lower message level for FW buffer destination + - wifi: iwlwifi: mvm: fix iwl_mvm_scan_fits() calculation + - wifi: iwlwifi: mvm: fix iwl_mvm_max_scan_ie_fw_cmd_room() + - wifi: iwlwifi: mvm: pause TCM when the firmware is stopped + - wifi: iwlwifi: mvm: don't wait for tx queues if firmware is dead + - wifi: mac80211: free skb on error path in ieee80211_beacon_get_ap() + - wifi: iwlwifi: clear trans->state earlier upon error + - can: mcp251xfd: mcp251xfd_ring_init(): check TX-coalescing configuration + - ASoC: Intel: soc-acpi-cht: Make Lenovo Yoga Tab 3 X90F DMI match less strict + - ASoC: intel: fix module autoloading + - ASoC: google: fix module autoloading + - ASoC: tda7419: fix module autoloading + - ASoC: fix module autoloading + - spi: spidev: Add an entry for elgin,jg10309-01 + - ASoC: amd: yc: Add a quirk for MSI Bravo 17 (D7VEK) + - ALSA: hda: add HDMI codec ID for Intel PTL + - drm: komeda: Fix an issue related to normalized zpos + - spi: bcm63xx: Enable module autoloading + - smb: client: fix hang in wait_for_response() for negproto + - x86/hyperv: Set X86_FEATURE_TSC_KNOWN_FREQ when Hyper-V provides frequency + - tools: hv: rm .*.cmd when make clean + - spi: spidev: Add missing spi_device_id for jg10309-01 + - ocfs2: add bounds checking to ocfs2_xattr_find_entry() + - ocfs2: strict bound check before memcmp in ocfs2_xattr_find_entry() + - drm: Use XArray instead of IDR for minors + - accel: Use XArray instead of IDR for minors + - drm: Expand max DRM device number to full MINORBITS + - powercap/intel_rapl: Add support for AMD family 1Ah + - netfilter: nft_socket: make cgroupsv2 matching work with namespaces + - netfilter: nft_socket: Fix a NULL vs IS_ERR() bug in + nft_socket_cgroup_subtree_level() + - nvme-pci: qdepth 1 quirk + - x86/mm: Switch to new Intel CPU model defines + - can: mcp251xfd: properly indent labels + - can: mcp251xfd: move mcp251xfd_timestamp_start()/stop() into + mcp251xfd_chip_start/stop() + - USB: serial: pl2303: add device id for Macrosilicon MS3020 + - USB: usbtmc: prevent kernel-usb-infoleak + - platform/x86: asus-wmi: Fix spurious rfkill on UX8406MA + - ASoC: mediatek: mt8188-mt6359: Modify key + - clk: qcom: gcc-sm8650: Don't use shared clk_ops for QUPs + - ice: check for XDP rings instead of bpf program when unconfiguring + - powercap/intel_rapl: Fix the energy-pkg event for AMD CPUs + - powercap: intel_rapl: Change an error pointer to NULL + - Upstream stable to v6.6.53, v6.10.12 + + -- Mehmet Basaran Fri, 17 Jan 2025 15:05:44 +0300 + +linux (6.8.0-52.53) noble; urgency=medium + + * noble/linux: 6.8.0-52.53 -proposed tracker (LP: #2093521) + + * CVE-2024-53164 + - net: sched: fix ordering of qlen adjustment + + * CVE-2024-53141 + - netfilter: ipset: add missing range check in bitmap_ip_uadt + + * CVE-2024-53103 + - hv_sock: Initializing vsk->trans to NULL to prevent a dangling pointer + + -- Manuel Diewald Fri, 10 Jan 2025 18:18:33 +0100 + +linux (6.8.0-51.52) noble; urgency=medium + + * noble/linux: 6.8.0-51.52 -proposed tracker (LP: #2090369) + + * Packaging resync (LP: #1786013) + - [Packaging] resync git-ubuntu-log + - [Packaging] update variants + + * MGLRU: kswapd uses 100% CPU when MGLRU is enabled and under memory pressure + (LP: #2087886) + - mm/mglru: only clear kswapd_failures if reclaimable + + * CVE-2024-50264 + - vsock/virtio: Initialization of the dangling pointer occurring in vsk->trans + + * CVE-2024-53057 + - net/sched: stop qdisc_tree_reduce_backlog on TC_H_ROOT + + * CVE-2024-49967 + - ext4: no need to continue when the number of entries is 1 + + -- Manuel Diewald Sat, 30 Nov 2024 19:21:46 +0100 + +linux (6.8.0-50.51) noble; urgency=medium + + * noble/linux: 6.8.0-50.51 -proposed tracker (LP: #2086301) + + * Packaging resync (LP: #1786013) + - [Packaging] debian.master/dkms-versions -- update from kernel-versions + (main/2024.10.28) + + * Noble update: upstream stable patchset 2024-10-31 (LP: #2086138) + - device property: Add cleanup.h based fwnode_handle_put() scope based + cleanup. + - device property: Introduce device_for_each_child_node_scoped() + - iio: adc: ad7124: Switch from of specific to fwnode based property handling + - ksmbd: override fsids for share path check + - ksmbd: override fsids for smb2_query_info() + - usbnet: ipheth: remove extraneous rx URB length check + - usbnet: ipheth: drop RX URBs with no payload + - usbnet: ipheth: do not stop RX on failing RX callback + - usbnet: ipheth: fix carrier detection in modes 1 and 4 + - net: ethernet: use ip_hdrlen() instead of bit shift + - drm: panel-orientation-quirks: Add quirk for Ayn Loki Zero + - drm: panel-orientation-quirks: Add quirk for Ayn Loki Max + - net: phy: vitesse: repair vsc73xx autonegotiation + - powerpc/mm: Fix boot warning with hugepages and CONFIG_DEBUG_VIRTUAL + - wifi: mt76: mt7921: fix NULL pointer access in mt7921_ipv6_addr_change + - net: hns3: use correct release function during uninitialization + - btrfs: update target inode's ctime on unlink + - Input: ads7846 - ratelimit the spi_sync error message + - Input: synaptics - enable SMBus for HP Elitebook 840 G2 + - HID: multitouch: Add support for GT7868Q + - scripts: kconfig: merge_config: config files: add a trailing newline + - platform/surface: aggregator_registry: Add Support for Surface Pro 10 + - platform/surface: aggregator_registry: Add support for Surface Laptop Go 3 + - drm/msm/adreno: Fix error return if missing firmware-name + - Input: i8042 - add Fujitsu Lifebook E756 to i8042 quirk table + - smb/server: fix return value of smb2_open() + - NFSv4: Fix clearing of layout segments in layoutreturn + - NFS: Avoid unnecessary rescanning of the per-server delegation list + - platform/x86: panasonic-laptop: Fix SINF array out of bounds accesses + - platform/x86: panasonic-laptop: Allocate 1 entry extra in the sinf array + - mptcp: pm: Fix uaf in __timer_delete_sync + - arm64: dts: rockchip: fix eMMC/SPI corruption when audio has been used on + RK3399 Puma + - arm64: dts: rockchip: override BIOS_DISABLE signal via GPIO hog on RK3399 + Puma + - minmax: reduce min/max macro expansion in atomisp driver + - net: tighten bad gso csum offset check in virtio_net_hdr + - dm-integrity: fix a race condition when accessing recalc_sector + - x86/hyperv: fix kexec crash due to VP assist page corruption + - mm: avoid leaving partial pfn mappings around in error case + - arm64: dts: rockchip: fix PMIC interrupt pin in pinctrl for ROCK Pi E + - drm/amd/display: Disable error correction if it's not supported + - drm/amd/display: Fix FEC_READY write on DP LT + - eeprom: digsy_mtc: Fix 93xx46 driver probe failure + - cxl/core: Fix incorrect vendor debug UUID define + - selftests/bpf: Support SOCK_STREAM in unix_inet_redir_to_connected() + - hwmon: (pmbus) Conditionally clear individual status bits for pmbus rev >= + 1.2 + - ice: Fix lldp packets dropping after changing the number of channels + - ice: fix accounting for filters shared by multiple VSIs + - ice: fix VSI lists confusion when adding VLANs + - igb: Always call igb_xdp_ring_update_tail() under Tx lock + - net/mlx5: Update the list of the PCI supported devices + - net/mlx5e: Add missing link modes to ptys2ethtool_map + - net/mlx5e: Add missing link mode to ptys2ext_ethtool_map + - net/mlx5: Explicitly set scheduling element and TSAR type + - net/mlx5: Add missing masks and QoS bit masks for scheduling elements + - net/mlx5: Correct TASR typo into TSAR + - net/mlx5: Verify support for scheduling element and TSAR type + - net/mlx5: Fix bridge mode operations when there are no VFs + - fou: fix initialization of grc + - octeontx2-af: Modify SMQ flush sequence to drop packets + - net: ftgmac100: Enable TX interrupt to avoid TX timeout + - selftests: net: csum: Fix checksums for packets with non-zero padding + - netfilter: nft_socket: fix sk refcount leaks + - net: dsa: felix: ignore pending status of TAS module when it's disabled + - net: dpaa: Pad packets to ETH_ZLEN + - tracing/osnoise: Fix build when timerlat is not enabled + - spi: nxp-fspi: fix the KASAN report out-of-bounds bug + - drm/syncobj: Fix syncobj leak in drm_syncobj_eventfd_ioctl + - dma-buf: heaps: Fix off-by-one in CMA heap fault handler + - drm/nouveau/fb: restore init() for ramgp102 + - drm/amdgpu/atomfirmware: Silence UBSAN warning + - drm/amd/amdgpu: apply command submission parser for JPEG v1 + - spi: geni-qcom: Undo runtime PM changes at driver exit time + - spi: geni-qcom: Fix incorrect free_irq() sequence + - drm/i915/guc: prevent a possible int overflow in wq offsets + - ASoC: codecs: avoid possible garbage value in peb2466_reg_read() + - cifs: Fix signature miscalculation + - pinctrl: meteorlake: Add Arrow Lake-H/U ACPI ID + - ASoC: meson: axg-card: fix 'use-after-free' + - drm/mediatek: Set sensible cursor width/height values to fix crash + - Input: edt-ft5x06 - add support for FocalTech FT5452 and FT8719 + - Input: edt-ft5x06 - add support for FocalTech FT8201 + - cgroup/cpuset: Eliminate unncessary sched domains rebuilds in hotplug + - spi: zynqmp-gqspi: Scale timeout by data size + - drm/xe: use devm instead of drmm for managed bo + - net: libwx: fix number of Rx and Tx descriptors + - clocksource: hyper-v: Use lapic timer in a TDX VM without paravisor + - bcachefs: Fix bch2_extents_match() false positive + - bcachefs: Don't delete open files in online fsck + - firmware: qcom: uefisecapp: Fix deadlock in qcuefi_acquire() + - riscv: dts: starfive: jh7110-common: Fix lower rate of CPUfreq by setting + PLL0 rate to 1.5GHz + - cxl: Restore XOR'd position bits during address translation + - netlink: specs: mptcp: fix port endianness + - drm/amd/display: Avoid race between dcn10_set_drr() and dc_state_destruct() + - drm/amd/display: Avoid race between dcn35_set_drr() and dc_state_destruct() + - drm/amd/amdgpu: apply command submission parser for JPEG v2+ + - drm/xe/client: fix deadlock in show_meminfo() + - drm/xe/client: remove bogus rcu list usage + - drm/xe/client: add missing bo locking in show_meminfo() + - tracing/kprobes: Fix build error when find_module() is not available + - drm/xe/display: fix compat IS_DISPLAY_STEP() range end + - Upstream stable to v6.6.52, v6.10.11 + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) + - KVM: SVM: fix emulation of msr reads/writes of MSR_FS_BASE and MSR_GS_BASE + - KVM: SVM: Don't advertise Bus Lock Detect to guest if SVM support is missing + - ALSA: hda/conexant: Add pincfg quirk to enable top speakers on Sirius + devices + - ALSA: hda/realtek: add patch for internal mic in Lenovo V145 + - ALSA: hda/realtek: Support mute LED on HP Laptop 14-dq2xxx + - ksmbd: Unlock on in ksmbd_tcp_set_interfaces() + - ata: libata: Fix memory leak for error path in ata_host_alloc() + - irqchip/gic-v2m: Fix refcount leak in gicv2m_of_init() + - x86/kaslr: Expose and use the end of the physical memory address space + - nvme-pci: Add sleep quirk for Samsung 990 Evo + - rust: types: Make Opaque::get const + - rust: macros: provide correct provenance when constructing THIS_MODULE + - Revert "Bluetooth: MGMT/SMP: Fix address type when using SMP over BREDR/LE" + - Bluetooth: MGMT: Ignore keys being loaded with invalid type + - mmc: core: apply SD quirks earlier during probe + - mmc: dw_mmc: Fix IDMAC operation with pages bigger than 4K + - mmc: sdhci-of-aspeed: fix module autoloading + - mmc: cqhci: Fix checking of CQHCI_HALT state + - fuse: update stats for pages in dropped aux writeback list + - fuse: use unsigned type for getxattr/listxattr size truncation + - fuse: fix memory leak in fuse_create_open + - clk: starfive: jh7110-sys: Add notifier for PLL0 clock + - clk: qcom: clk-alpha-pll: Fix the pll post div mask + - clk: qcom: clk-alpha-pll: Fix the trion pll postdiv set rate API + - kexec_file: fix elfcorehdr digest exclusion when CONFIG_CRASH_HOTPLUG=y + - tracing: Avoid possible softlockup in tracing_iter_reset() + - tracing/timerlat: Add interface_lock around clearing of kthread in + stop_kthread() + - net: mctp-serial: Fix missing escapes on transmit + - x86/fpu: Avoid writing LBR bit to IA32_XSS unless supported + - x86/apic: Make x2apic_disable() work correctly + - drm/i915: Do not attempt to load the GSC multiple times + - ALSA: control: Apply sanity check of input values for user elements + - ALSA: hda: Add input value sanity checks to HDMI channel map controls + - wifi: ath12k: fix uninitialize symbol error on ath12k_peer_assoc_h_he() + - smack: unix sockets: fix accept()ed socket label + - bpf, verifier: Correct tail_call_reachable for bpf prog + - accel/habanalabs/gaudi2: unsecure edma max outstanding register + - irqchip/armada-370-xp: Do not allow mapping IRQ 0 and 1 + - af_unix: Remove put_pid()/put_cred() in copy_peercred(). + - x86/kmsan: Fix hook for unaligned accesses + - iommu: sun50i: clear bypass register + - netfilter: nf_conncount: fix wrong variable type + - fs/ntfs3: One more reason to mark inode bad + - riscv: kprobes: Use patch_text_nosync() for insn slots + - media: vivid: fix wrong sizeimage value for mplane + - leds: spi-byte: Call of_node_put() on error path + - wifi: brcmsmac: advertise MFP_CAPABLE to enable WPA3 + - usb: uas: set host status byte on data completion error + - drm/amd/display: Check HDCP returned status + - drm/amdgpu: clear RB_OVERFLOW bit when enabling interrupts + - media: vivid: don't set HDMI TX controls if there are no HDMI outputs + - vfio/spapr: Always clear TCEs before unsetting the window + - ice: Check all ice_vsi_rebuild() errors in function + - Input: ili210x - use kvmalloc() to allocate buffer for firmware update + - media: qcom: camss: Add check for v4l2_fwnode_endpoint_parse + - pcmcia: Use resource_size function on resource object + - drm/amdgpu: check for LINEAR_ALIGNED correctly in check_tiling_flags_gfx6 + - can: m_can: Release irq on error in m_can_open + - can: mcp251xfd: fix ring configuration when switching from CAN-CC to CAN-FD + mode + - rust: kbuild: fix export of bss symbols + - cifs: Fix FALLOC_FL_ZERO_RANGE to preflush buffered part of target region + - igb: Fix not clearing TimeSync interrupts for 82580 + - platform/x86: dell-smbios: Fix error path in dell_smbios_init() + - regulator: core: Stub devm_regulator_bulk_get_const() if !CONFIG_REGULATOR + - can: kvaser_pciefd: Skip redundant NULL pointer check in ISR + - can: kvaser_pciefd: Remove unnecessary comment + - can: kvaser_pciefd: Rename board_irq to pci_irq + - can: kvaser_pciefd: Move reset of DMA RX buffers to the end of the ISR + - can: kvaser_pciefd: Use a single write when releasing RX buffers + - Bluetooth: qca: If memdump doesn't work, re-enable IBS + - Bluetooth: hci_sync: Introduce hci_cmd_sync_run/hci_cmd_sync_run_once + - Bluetooth: MGMT: Fix not generating command complete for MGMT_OP_DISCONNECT + - igc: Unlock on error in igc_io_resume() + - ice: do not bring the VSI up, if it was down before the XDP setup + - usbnet: modern method to get random MAC + - bpf, net: Fix a potential race in do_sock_getsockopt() + - bareudp: Fix device stats updates. + - r8152: fix the firmware doesn't work + - net: bridge: br_fdb_external_learn_add(): always set EXT_LEARN + - net: dsa: vsc73xx: fix possible subblocks range of CAPT block + - selftests: net: enable bind tests + - firmware: cs_dsp: Don't allow writes to read-only controls + - phy: zynqmp: Take the phy mutex in xlate + - ASoC: topology: Properly initialize soc_enum values + - dm init: Handle minors larger than 255 + - iommu/vt-d: Handle volatile descriptor status read + - cgroup: Protect css->cgroup write under css_set_lock + - devres: Initialize an uninitialized struct member + - virtio_ring: fix KMSAN error for premapped mode + - crypto: qat - fix unintentional re-enabling of error interrupts + - ASoc: TAS2781: replace beXX_to_cpup with get_unaligned_beXX for potentially + broken alignment + - libbpf: Add NULL checks to bpf_object__{prev_map,next_map} + - drm/amdgpu: Set no_hw_access when VF request full GPU fails + - ext4: fix possible tid_t sequence overflows + - jbd2: avoid mount failed when commit block is partial submitted + - dma-mapping: benchmark: Don't starve others when doing the test + - drm/amdgpu: reject gang submit on reserved VMIDs + - smp: Add missing destroy_work_on_stack() call in smp_call_on_cpu() + - fs/ntfs3: Check more cases when directory is corrupted + - btrfs: replace BUG_ON with ASSERT in walk_down_proc() + - cxl/region: Verify target positions using the ordered target list + - riscv: set trap vector earlier + - tcp: Don't drop SYN+ACK for simultaneous connect(). + - net: dpaa: avoid on-stack arrays of NR_CPUS elements + - LoongArch: Use correct API to map cmdline in relocate_kernel() + - regmap: maple: work around gcc-14.1 false-positive warning + - vfs: Fix potential circular locking through setxattr() and removexattr() + - i3c: master: svc: resend target address when get NACK + - kselftests: dmabuf-heaps: Ensure the driver name is null-terminated + - btrfs: initialize location to fix -Wmaybe-uninitialized in + btrfs_lookup_dentry() + - s390/vmlinux.lds.S: Move ro_after_init section behind rodata section + - usbnet: ipheth: race between ipheth_close and error handling + - spi: spi-fsl-lpspi: limit PRESCALE bit in TCR register + - ata: pata_macio: Use WARN instead of BUG + - NFSv4: Add missing rescheduling points in + nfs_client_return_marked_delegations + - ACPI: CPPC: Add helper to get the highest performance value + - cpufreq: amd-pstate: Enable amd-pstate preferred core support + - cpufreq: amd-pstate: fix the highest frequency issue which limits + performance + - tcp: process the 3rd ACK with sk_socket for TFO/MPTCP + - iio: buffer-dmaengine: fix releasing dma channel on error + - iio: fix scale application in iio_convert_raw_to_processed_unlocked + - iio: adc: ad7124: fix config comparison + - iio: adc: ad7606: remove frstdata check for serial mode + - iio: adc: ad7124: fix chip ID mismatch + - usb: dwc3: core: update LC timer as per USB Spec V3.2 + - usb: cdns2: Fix controller reset issue + - usb: dwc3: Avoid waking up gadget during startxfer + - nvmem: Fix return type of devm_nvmem_device_get() in kerneldoc + - Drivers: hv: vmbus: Fix rescind handling in uio_hv_generic + - clocksource/drivers/imx-tpm: Fix return -ETIME when delta exceeds INT_MAX + - clocksource/drivers/imx-tpm: Fix next event not taking effect sometime + - clocksource/drivers/timer-of: Remove percpu irq related code + - uprobes: Use kzalloc to allocate xol area + - Revert "mm: skip CMA pages when they are not available" + - workqueue: wq_watchdog_touch is always called with valid CPU + - workqueue: Improve scalability of workqueue watchdog touch + - ACPI: processor: Return an error if acpi_processor_get_info() fails in + processor_add() + - ACPI: processor: Fix memory leaks in error paths of processor_add() + - arm64: acpi: Move get_cpu_for_acpi_id() to a header + - can: mcp251xfd: mcp251xfd_handle_rxif_ring_uinc(): factor out in separate + function + - can: mcp251xfd: rx: prepare to workaround broken RX FIFO head index erratum + - can: mcp251xfd: clarify the meaning of timestamp + - can: mcp251xfd: rx: add workaround for erratum DS80000789E 6 of mcp2518fd + - drm/amd: Add gfx12 swizzle mode defs + - drm/amdgpu: handle gfx12 in amdgpu_display_verify_sizes + - ata: libata-scsi: Remove redundant sense_buffer memsets + - ata: libata-scsi: Check ATA_QCFLAG_RTF_FILLED before using result_tf + - crypto: starfive - Align rsa input data to 32-bit + - crypto: starfive - Fix nent assignment in rsa dec + - clk: qcom: ipq9574: Update the alpha PLL type for GPLLs + - powerpc/64e: remove unused IBM HTW code + - powerpc/64e: split out nohash Book3E 64-bit code + - powerpc/64e: Define mmu_pte_psize static + - powerpc/vdso: Don't discard rela sections + - ASoC: tegra: Fix CBB error during probe() + - nvme-pci: allocate tagset on reset if necessary + - ASoc: SOF: topology: Clear SOF link platform name upon unload + - ASoC: sunxi: sun4i-i2s: fix LRCLK polarity in i2s mode + - clk: qcom: gcc-sm8550: Don't use parking clk_ops for QUPs + - clk: qcom: gcc-sm8550: Don't park the USB RCG at registration time + - drm/i915/fence: Mark debug_fence_init_onstack() with __maybe_unused + - drm/i915/fence: Mark debug_fence_free() with __maybe_unused + - gpio: rockchip: fix OF node leak in probe() + - gpio: modepin: Enable module autoloading + - riscv: Fix toolchain vector detection + - riscv: Do not restrict memory size because of linear mapping on nommu + - membarrier: riscv: Add full memory barrier in switch_mm() + - [Config] updateconfigs for ARCH_HAS_MEMBARRIER_CALLBACKS + - x86/mm: Fix PTI for i386 some more + - btrfs: fix race between direct IO write and fsync when using same fd + - spi: spi-fsl-lpspi: Fix off-by-one in prescale max + - ALSA: hda/realtek: Enable Mute Led for HP Victus 15-fb1xxx + - ALSA: hda/realtek - Fix inactive headset mic jack for ASUS Vivobook 15 + X1504VAP + - fuse: clear PG_uptodate when using a stolen page + - riscv: misaligned: remove CONFIG_RISCV_M_MODE specific code + - parisc: Delay write-protection until mark_rodata_ro() call + - pinctrl: qcom: x1e80100: Bypass PDC wakeup parent for now + - maple_tree: remove rcu_read_lock() from mt_validate() + - Revert "wifi: ath11k: restore country code during resume" + - btrfs: qgroup: don't use extent changeset when not needed + - btrfs: zoned: handle broken write pointer on zones + - drm/xe/gsc: Do not attempt to load the GSC multiple times + - drm/amdgpu: always allocate cleared VRAM for GEM allocations + - drm/amd/display: Lock DC and exit IPS when changing backlight + - ALSA: hda/realtek: extend quirks for Clevo V5[46]0 + - cgroup/cpuset: Delay setting of CS_CPU_EXCLUSIVE until valid partition + - virt: sev-guest: Mark driver struct with __refdata to prevent section + mismatch + - media: b2c2: flexcop-usb: fix flexcop_usb_memory_req + - gve: Add adminq mutex lock + - wifi: rtw89: wow: prevent to send unexpected H2C during download Firmware + - drm/amdgpu: add missing error handling in function + amdgpu_gmc_flush_gpu_tlb_pasid + - crypto: qat - initialize user_input.lock for rate_limiting + - locking: Add rwsem_assert_held() and rwsem_assert_held_write() + - fs: don't copy to userspace under namespace semaphore + - fs: relax permissions for statmount() + - seccomp: release task filters when the task exits + - drm/amdgpu/display: handle gfx12 in amdgpu_dm_plane_format_mod_supported + - can: m_can: Remove m_can_rx_peripheral indirection + - can: m_can: Do not cancel timer from within timer + - mm: Provide a means of invalidation without using launder_folio + - cifs: Fix copy offload to flush destination region + - hwmon: ltc2991: fix register bits defines + - scripts: fix gfp-translate after ___GFP_*_BITS conversion to an enum + - ptp: ocp: convert serial ports to array + - ptp: ocp: adjust sysfs entries to expose tty information + - ice: check ICE_VSI_DOWN under rtnl_lock when preparing for reset + - ice: remove ICE_CFG_BUSY locking from AF_XDP code + - net: xilinx: axienet: Fix race in axienet_stop + - iommu/vt-d: Remove control over Execute-Requested requests + - block: don't call bio_uninit from bio_endio + - tracing/kprobes: Add symbol counting check when module loads + - perf/x86/intel: Hide Topdown metrics events if the feature is not enumerated + - PCI: qcom: Override NO_SNOOP attribute for SA8775P RC + - staging: vchiq_core: Bubble up wait_event_interruptible() return value + - watchdog: imx7ulp_wdt: keep already running watchdog enabled + - btrfs: slightly loosen the requirement for qgroup removal + - drm/amdgpu: add PSP RAS address query command + - drm/amdgpu: add mutex to protect ras shared memory + - s390/boot: Do not assume the decompressor range is reserved + - drm/amdgpu: Fix two reset triggered in a row + - drm/amdgpu: Add reset_context flag for host FLR + - drm/amdgpu: Fix amdgpu_device_reset_sriov retry logic + - fs: only copy to userspace on success in listmount() + - iio: adc: ad7124: fix DT configuration parsing + - nvmem: u-boot-env: error if NVMEM device is too small + - mm: zswap: rename is_zswap_enabled() to zswap_is_enabled() + - mm/memcontrol: respect zswap.writeback setting from parent cg too + - path: add cleanup helper + - fs: simplify error handling + - fs: relax permissions for listmount() + - hid: bpf: add BPF_JIT dependency + - net/mlx5e: SHAMPO, Use KSMs instead of KLMs + - net/mlx5e: SHAMPO, Fix page leak + - drm/xe/xe2: Add workaround 14021402888 + - drm/xe/xe2lpg: Extend workaround 14021402888 + - clk: qcom: gcc-x1e80100: Fix USB 0 and 1 PHY GDSC pwrsts flags + - clk: qcom: gcc-x1e80100: Don't use parking clk_ops for QUPs + - nouveau: fix the fwsec sb verification register. + - riscv: Add tracepoints for SBI calls and returns + - riscv: Improve sbi_ecall() code generation by reordering arguments + - riscv: Fix RISCV_ALTERNATIVE_EARLY + - cifs: Fix zero_point init on inode initialisation + - nvme: rename nvme_sc_to_pr_err to nvme_status_to_pr_err + - nvme: fix status magic numbers + - nvme: rename CDR/MORE/DNR to NVME_STATUS_* + - nvmet: Identify-Active Namespace ID List command should reject invalid nsid + - drm/i915/display: Add mechanism to use sink model when applying quirk + - drm/i915/display: Increase Fast Wake Sync length as a quirk + - LoongArch: Use accessors to page table entries instead of direct dereference + - Upstream stable to v6.6.51, v6.10.10 + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46823 + - kunit/overflow: Fix UB in overflow_allocation_test + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46834 + - ethtool: fail closed if we can't get max channel used in indirection tables + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46751 + - btrfs: don't BUG_ON() when 0 reference count at btrfs_lookup_extent_info() + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46753 + - btrfs: handle errors from btrfs_dec_ref() properly + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46841 + - btrfs: don't BUG_ON on ENOMEM from btrfs_lookup_extent_info() in + walk_down_proc() + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46754 + - bpf: Remove tst_run from lwt_seg6local_prog_ops. + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46824 + - iommufd: Require drivers to supply the cache_invalidate_user ops + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46842 + - scsi: lpfc: Handle mailbox timeouts in lpfc_get_sfp_info + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46766 + - ice: move netif_queue_set_napi to rtnl-protected sections + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46772 + - drm/amd/display: Check denominator crb_pipes before used + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46774 + - powerpc/rtas: Prevent Spectre v1 gadget construction in sys_rtas() + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46775 + - drm/amd/display: Validate function returns + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46778 + - drm/amd/display: Check UnboundedRequestEnabled's value + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46779 + - drm/imagination: Free pvr_vm_gpuva after unlink + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46792 + - riscv: misaligned: Restrict user access to kernel memory + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46793 + - ASoC: Intel: Boards: Fix NULL pointer deref in BYT/CHT boards harder + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46735 + - ublk_drv: fix NULL pointer dereference in ublk_ctrl_start_recovery() + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46737 + - nvmet-tcp: fix kernel crash if commands allocation fails + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46822 + - arm64: acpi: Harden get_cpu_for_acpi_id() against missing CPU entry + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46713 + - perf/aux: Fix AUX buffer serialization + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46739 + - uio_hv_generic: Fix kernel NULL pointer dereference in hv_uio_rescind + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46740 + - binder: fix UAF caused by offsets overwrite + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46741 + - misc: fastrpc: Fix double free of 'buf' in error path + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-47663 + - staging: iio: frequency: ad9834: Validate frequency parameter value + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46832 + - MIPS: cevt-r4k: Don't call get_c0_compare_int if timer irq is installed + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-47668 + - lib/generic-radix-tree.c: Fix rare race in __genradix_ptr_alloc() + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46744 + - Squashfs: sanity check symbolic link size + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46745 + - Input: uinput - reject requests with unreasonable number of slots + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46746 + - HID: amd_sfh: free driver_data after destroying hid device + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-47664 + - spi: hisi-kunpeng: Add verification for the max_frequency provided by the + firmware + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-47665 + - i3c: mipi-i3c-hci: Error out instead on BUG_ON() in IBI DMA setup + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46749 + - Bluetooth: btnxpuart: Fix Null pointer dereference in btnxpuart_flush() + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46750 + - PCI: Add missing bridge lock to pci_bus_lock() + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46752 + - btrfs: replace BUG_ON() with error handling at update_ref_for_cow() + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46840 + - btrfs: clean up our handling of refs == 0 in snapshot delete + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46755 + - wifi: mwifiex: Do not return unused priv in mwifiex_get_priv_by_id() + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-47666 + - scsi: pm80xx: Set phy->enable_completion only when we wait for it + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46843 + - scsi: ufs: core: Remove SCSI host only if added + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46760 + - wifi: rtw88: usb: schedule rx work after everything is set up + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46761 + - pci/hotplug/pnv_php: Fix hotplug driver crash on Powernv + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46844 + - um: line: always fill *error_out in setup_one_line() + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46762 + - xen: privcmd: Fix possible access to a freed kirqfd instance + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46763 + - fou: Fix null-ptr-deref in GRO. + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46765 + - ice: protect XDP configuration with a mutex + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46767 + - net: phy: Fix missing of_node_put() for leds + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46768 + - hwmon: (hp-wmi-sensors) Check if WMI event data exists + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46770 + - ice: Add netif_device_attach/detach into PF reset flow + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46771 + - can: bcm: Remove proc entry when dev is unregistered. + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46773 + - drm/amd/display: Check denominator pbn_div before used + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-47667 + - PCI: keystone: Add workaround for Errata #i2037 (AM65x SR 1.0) + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46835 + - drm/amdgpu: Fix smatch static checker warning + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46776 + - drm/amd/display: Run DC_LOG_DC after checking link->link_enc + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46836 + - usb: gadget: aspeed_udc: validate endpoint index for ast udc + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46777 + - udf: Avoid excessive partition lengths + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46825 + - wifi: iwlwifi: mvm: use IWL_FW_CHECK for link ID check + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46826 + - ELF: fix kernel.randomize_va_space double read + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46827 + - wifi: ath12k: fix firmware crash due to invalid peer nss + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-47669 + - nilfs2: fix state management in error path of log writing function + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46780 + - nilfs2: protect references to superblock parameters exposed in sysfs + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46781 + - nilfs2: fix missing cleanup on rollforward recovery error + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46828 + - sched: sch_cake: fix bulk flow accounting logic for host fairness + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46782 + - ila: call nf_unregister_net_hooks() sooner + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46783 + - tcp_bpf: fix return value of tcp_bpf_sendmsg() + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46784 + - net: mana: Fix error handling in mana_create_txq/rxq's NAPI cleanup + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46785 + - eventfs: Use list_del_rcu() for SRCU protected list variable + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46786 + - fscache: delete fscache_cookie_lru_timer when fscache exits to avoid UAF + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46787 + - userfaultfd: fix checks for huge PMDs + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46838 + - userfaultfd: don't BUG_ON() if khugepaged yanks our page table + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46845 + - tracing/timerlat: Only clear timer if a kthread exists + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46788 + - tracing/osnoise: Use a cpumask to know what threads are kthreads + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46846 + - spi: rockchip: Resolve unbalanced runtime PM / system PM handling + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46847 + - mm: vmalloc: ensure vmap_block is initialised before adding to queue + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46791 + - can: mcp251x: fix deadlock if an interrupt occurs during mcp251x_open + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46829 + - rtmutex: Drop rt_mutex::wait_lock before scheduling + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46848 + - perf/x86/intel: Limit the period on Haswell + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46794 + - x86/tdx: Fix data leak in mmio_read() + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46795 + - ksmbd: unset the binding mark of a reused connection + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46797 + - powerpc/qspinlock: Fix deadlock in MCS queue + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46830 + - KVM: x86: Acquire kvm->srcu when handling KVM_SET_VCPU_EVENTS + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46798 + - ASoC: dapm: Fix UAF for snd_soc_pcm_runtime object + + * Noble update: upstream stable patchset 2024-10-29 (LP: #2085849) // + CVE-2024-46831 + - net: microchip: vcap: Fix use-after-free error in kunit test + + * Navi24 RX6300 light up issue on 6.8 kernel (LP: #2084513) + - drm/amd/display: Ensure populate uclk in bb construction + + * Noble update: upstream stable patchset 2024-10-18 (LP: #2084941) + - drm/fb-helper: Don't schedule_work() to flush frame buffer during panic() + - drm: panel-orientation-quirks: Add quirk for OrangePi Neo + - scsi: ufs: core: Check LSDBS cap when !mcq + - scsi: ufs: core: Bypass quick recovery if force reset is needed + - btrfs: tree-checker: validate dref root and objectid + - ALSA: hda/generic: Add a helper to mute speakers at suspend/shutdown + - ALSA: hda/conexant: Mute speakers at suspend / shutdown + - ALSA: ump: Transmit RPN/NRPN message at each MSB/LSB data reception + - ALSA: ump: Explicitly reset RPN with Null RPN + - ALSA: seq: ump: Use the common RPN/bank conversion context + - ALSA: seq: ump: Transmit RPN/NRPN message at each MSB/LSB data reception + - ALSA: seq: ump: Explicitly reset RPN with Null RPN + - net/mlx5: DR, Fix 'stack guard page was hit' error in dr_rule + - ASoC: amd: yc: Support mic on HP 14-em0002la + - spi: hisi-kunpeng: Add validation for the minimum value of speed_hz + - i2c: Fix conditional for substituting empty ACPI functions + - dma-debug: avoid deadlock between dma debug vs printk and netconsole + - net: usb: qmi_wwan: add MeiG Smart SRM825L + - ASoC: amd: yc: Support mic on Lenovo Thinkpad E14 Gen 6 + - ASoC: codecs: ES8326: button detect issue + - selftests: mptcp: userspace pm create id 0 subflow + - selftests: mptcp: dump userspace addrs list + - selftests: mptcp: userspace pm get addr tests + - selftests: mptcp: declare event macros in mptcp_lib + - selftests: mptcp: join: cannot rm sf if closed + - selftests: mptcp: add explicit test case for remove/readd + - selftests: mptcp: join: check re-using ID of unused ADD_ADDR + - selftests: mptcp: join: check re-adding init endp with != id + - selftests: mptcp: add mptcp_lib_events helper + - selftests: mptcp: join: validate event numbers + - selftests: mptcp: join: check re-re-adding ID 0 signal + - selftests: mptcp: join: test for flush/re-add endpoints + - selftests: mptcp: join: disable get and dump addr checks + - selftests: mptcp: join: stop transfer when check is done (part 2.2) + - drm/amdgpu: Fix uninitialized variable warning in amdgpu_afmt_acr + - drm/amd/display: Assign linear_pitch_alignment even for VM + - drm/amdgpu: fix overflowed array index read warning + - drm/amdgpu/pm: Check the return value of smum_send_msg_to_smc + - drm/amd/pm: fix uninitialized variable warning + - drm/amd/pm: fix uninitialized variable warning for smu8_hwmgr + - drm/amd/pm: fix warning using uninitialized value of max_vid_step + - drm/amd/pm: Fix negative array index read + - drm/amd/pm: fix the Out-of-bounds read warning + - drm/amd/pm: fix uninitialized variable warnings for vega10_hwmgr + - drm/amdgpu: avoid reading vf2pf info size from FB + - drm/amd/display: Check gpio_id before used as array index + - drm/amd/display: Stop amdgpu_dm initialize when stream nums greater than 6 + - drm/amd/display: Check index for aux_rd_interval before using + - drm/amd/display: Add array index check for hdcp ddc access + - drm/amd/display: Check num_valid_sets before accessing reader_wm_sets[] + - drm/amd/display: Check msg_id before processing transcation + - drm/amd/display: Fix Coverity INTERGER_OVERFLOW within + construct_integrated_info + - drm/amd/display: Fix Coverity INTEGER_OVERFLOW within + dal_gpio_service_create + - drm/amd/display: Spinlock before reading event + - drm/amd/display: Fix Coverity INTEGER_OVERFLOW within + decide_fallback_link_setting_max_bw_policy + - drm/amd/display: Ensure index calculation will not overflow + - drm/amd/display: Skip inactive planes within + ModeSupportAndSystemConfiguration + - drm/amd/display: Fix index may exceed array range within + fpu_update_bw_bounding_box + - drm/amd/amdgpu: Check tbo resource pointer + - drm/amd/pm: fix uninitialized variable warnings for vangogh_ppt + - drm/amdgpu/pm: Fix uninitialized variable warning for smu10 + - drm/amdgpu/pm: Fix uninitialized variable agc_btc_response + - drm/amdgpu: Fix the uninitialized variable warning + - drm/amdkfd: Check debug trap enable before write dbg_ev_file + - drm/amdkfd: Reconcile the definition and use of oem_id in struct + kfd_topology_device + - apparmor: fix possible NULL pointer dereference + - wifi: ath12k: initialize 'ret' in ath12k_qmi_load_file_target_mem() + - wifi: ath11k: initialize 'ret' in ath11k_qmi_load_file_target_mem() + - drm/amdgpu/pm: Check input value for CUSTOM profile mode setting on legacy + SOCs + - drm/amdgpu: Fix the warning division or modulo by zero + - drm/amdgpu: fix dereference after null check + - drm/amdgpu: fix the waring dereferencing hive + - drm/amd/pm: check specific index for aldebaran + - drm/amd/pm: check specific index for smu13 + - drm/amdgpu: the warning dereferencing obj for nbio_v7_4 + - drm/amd/pm: check negtive return for table entries + - wifi: rtw89: ser: avoid multiple deinit on same CAM + - drm/kfd: Correct pinned buffer handling at kfd restore and validate process + - drm/amdgpu: update type of buf size to u32 for eeprom functions + - wifi: iwlwifi: remove fw_running op + - cpufreq: scmi: Avoid overflow of target_freq in fast switch + - PCI: al: Check IORESOURCE_BUS existence during probe + - wifi: mac80211: check ieee80211_bss_info_change_notify() against MLD + - hwspinlock: Introduce hwspin_lock_bust() + - soc: qcom: smem: Add qcom_smem_bust_hwspin_lock_by_host() + - RDMA/efa: Properly handle unexpected AQ completions + - ionic: fix potential irq name truncation + - pwm: xilinx: Fix u32 overflow issue in 32-bit width PWM mode. + - rcu/nocb: Remove buggy bypass lock contention mitigation + - media: v4l2-cci: Always assign *val + - usbip: Don't submit special requests twice + - usb: typec: ucsi: Fix null pointer dereference in trace + - fsnotify: clear PARENT_WATCHED flags lazily + - net: remove NULL-pointer net parameter in ip_metrics_convert + - drm/amdgu: fix Unintentional integer overflow for mall size + - regmap: spi: Fix potential off-by-one when calculating reserved size + - smack: tcp: ipv4, fix incorrect labeling + - platform/chrome: cros_ec_lpc: MEC access can use an AML mutex + - net/mlx5e: SHAMPO, Fix incorrect page release + - drm/meson: plane: Add error handling + - crypto: stm32/cryp - call finalize with bh disabled + - gfs2: Revert "Add quota_change type" + - drm/bridge: tc358767: Check if fully initialized before signalling HPD event + via IRQ + - dmaengine: altera-msgdma: use irq variant of spin_lock/unlock while invoking + callbacks + - dmaengine: altera-msgdma: properly free descriptor in msgdma_free_descriptor + - hwmon: (k10temp) Check return value of amd_smn_read() + - wifi: cfg80211: make hash table duplicates more survivable + - f2fs: fix to do sanity check on blocks for inline_data inode + - driver: iio: add missing checks on iio_info's callback access + - block: remove the blk_flush_integrity call in blk_integrity_unregister + - drm/amdgpu: add skip_hw_access checks for sriov + - drm/amdgpu: add lock in amdgpu_gart_invalidate_tlb + - drm/amdgpu: add lock in kfd_process_dequeue_from_device + - drm/amd/display: Don't use fsleep for PSR exit waits on dmub replay + - drm/amd/display: added NULL check at start of dc_validate_stream + - drm/amd/display: Correct the defined value for AMDGPU_DMUB_NOTIFICATION_MAX + - drm/amd/display: use preferred link settings for dp signal only + - drm/amd/display: Check BIOS images before it is used + - drm/amd/display: Skip wbscl_set_scaler_filter if filter is null + - media: uvcvideo: Enforce alignment of frame and interval + - virtio_net: Fix napi_skb_cache_put warning + - i2c: Use IS_REACHABLE() for substituting empty ACPI functions + - btrfs: factor out stripe length calculation into a helper + - btrfs: scrub: update last_physical after scrubbing one stripe + - btrfs: fix qgroup reserve leaks in cow_file_range + - virtio-net: check feature before configuring the vq coalescing command + - drm/amd/display: Handle the case which quad_part is equal 0 + - drm/amdgpu: Handle sg size limit for contiguous allocation + - drm/amd/pm: fix uninitialized variable warning for smu_v13 + - drm/amdgpu: fix uninitialized scalar variable warning + - drm/amd/display: Ensure array index tg_inst won't be -1 + - drm/amd/display: handle invalid connector indices + - drm/amd/display: Increase MAX_LINKS by 2 + - drm/amd/display: Stop amdgpu_dm initialize when link nums greater than + max_links + - drm/amd/display: Fix incorrect size calculation for loop + - drm/amd/display: Use kcalloc() instead of kzalloc() + - drm/amd/display: Add missing NULL pointer check within + dpcd_extend_address_range + - drm/amd/display: Release state memory if amdgpu_dm_create_color_properties + fail + - drm/amd/display: Check link_index before accessing dc->links[] + - drm/amd/display: Add otg_master NULL check within + resource_log_pipe_topology_update + - drm/amd/display: Release clck_src memory if clk_src_construct fails + - drm/amd/display: Fix writeback job lock evasion within dm_crtc_high_irq + - drm/xe: Demote CCS_MODE info to debug only + - drm/drm-bridge: Drop conditionals around of_node pointers + - drm/amdgpu: fix uninitialized variable warning for amdgpu_xgmi + - drm/amdgpu: fix uninitialized variable warning for jpeg_v4 + - drm/amdgpu: Fix uninitialized variable warning in amdgpu_info_ioctl + - wifi: ath12k: initialize 'ret' in ath12k_dp_rxdma_ring_sel_config_wcn7850() + - drm/amdgpu/pm: Check input value for power profile setting on smu11, smu13 + and smu14 + - drm/xe: Fix the warning conditions + - drm/amd/display: Fix pipe addition logic in calc_blocks_to_ungate DCN35 + - wifi: cfg80211: restrict operation during radar detection + - remoteproc: qcom_q6v5_pas: Add hwspinlock bust on stop + - tcp: annotate data-races around tw->tw_ts_recent and tw->tw_ts_recent_stamp + - drm/xe: Don't overmap identity VRAM mapping + - net: tcp/dccp: prepare for tw_timer un-pinning + - drm/xe: Ensure caller uses sole domain for xe_force_wake_assert_held + - drm/xe: Check valid domain is passed in xe_force_wake_ref + - thermal: trip: Use READ_ONCE() for lockless access to trip properties + - drm/xe: Add GuC state asserts to deregister_exec_queue + - drm/amdgpu: fix overflowed constant warning in mmhub_set_clockgating() + - drm/amd/display: Remove register from DCN35 DMCUB diagnostic collection + - drm/amd/display: Disable DMCUB timeout for DCN35 + - drm/amd/display: Avoid overflow from uint32_t to uint8_t + - pinctrl: core: reset gpio_device in loop in pinctrl_pins_show() + - Upstream stable to v6.6.50, v6.10.9 + + * CVE-2024-46747 + - HID: cougar: fix slab-out-of-bounds Read in cougar_report_fixup + + * CVE-2024-46725 + - drm/amdgpu: Fix out-of-bounds write warning + + * CVE-2024-46724 + - drm/amdgpu: Fix out-of-bounds read of df_v1_7_channel_number + + * [SRU] Fix AST DP output after resume (LP: #2083022) + - drm/ast: Inline drm_simple_encoder_init() + - drm/ast: Implement atomic enable/disable for encoders + - drm/ast: Program mode for AST DP in atomic_mode_set + - drm/ast: Move mode-setting code into mode_set_nofb CRTC helper + - drm/ast: Handle primary-plane format setup in atomic_update + - drm/ast: Remove gamma LUT updates from DPMS code + - drm/ast: Only set VGA SCREEN_DISABLE bit in CRTC code + - drm/ast: Inline ast_crtc_dpms() into callers + - drm/ast: Use drm_atomic_helper_commit_tail() helper + + * UBSAN array-index-out-of-bounds reported with N-6.8 on P9 node baltar + (LP: #2078038) + - scripts/kernel-doc: reindent + - compiler_types: add Endianness-dependent __counted_by_{le, be} + - scsi: aacraid: union aac_init: Replace 1-element array with flexible array + - scsi: aacraid: struct aac_ciss_phys_luns_resp: Replace 1-element array with + flexible array + - scsi: aacraid: Rearrange order of struct aac_srb_unit + - scsi: aacraid: struct {user, }sgmap{, 64, raw}: Replace 1-element arrays + with flexible arrays + + * r8169: transmit queue 0 timed out error when re-plugging the Ethernet cable + (LP: #2084526) + - r8169: disable ALDPS per default for RTL8125 + + * [SRU] cpufreq: intel_pstate: Support Emerald Rapids OOB mode (LP: #2084834) + - cpufreq: intel_pstate: Support Emerald Rapids OOB mode + + * CVE-2024-46723 + - drm/amdgpu: fix ucode out-of-bounds read warning + + * CVE-2024-46743 + - of/irq: Prevent device address out-of-bounds read in interrupt map walk + + * CVE-2024-46757 + - hwmon: (nct6775-core) Fix underflows seen when writing limit attributes + + * [SRU] Ubuntu 24.04 - GPU cannot be installed with DL380a Gen12 (2P, SRF-SP) + (LP: #2081079) + - perf/x86/uncore: Save the unit control address of all units + - perf/x86/uncore: Support per PMU cpumask + - perf/x86/uncore: Retrieve the unit ID from the unit control RB tree + - perf/x86/uncore: Apply the unit control RB tree to MMIO uncore units + - perf/x86/uncore: Apply the unit control RB tree to MSR uncore units + - perf/x86/uncore: Apply the unit control RB tree to PCI uncore units + - perf/x86/uncore: Cleanup unused unit structure + - perf/x86/intel/uncore: Support HBM and CXL PMON counters + + * Noble update: upstream stable patchset 2024-10-11 (LP: #2084225) + - ALSA: seq: Skip event type filtering for UMP events + - LoongArch: Remove the unused dma-direct.h + - btrfs: fix a use-after-free when hitting errors inside btrfs_submit_chunk() + - btrfs: run delayed iputs when flushing delalloc + - smb/client: avoid dereferencing rdata=NULL in smb2_new_read_req() + - pinctrl: rockchip: correct RK3328 iomux width flag for GPIO2-B pins + - pinctrl: single: fix potential NULL dereference in pcs_get_function() + - wifi: wfx: repair open network AP mode + - wifi: mwifiex: duplicate static structs used in driver instances + - net: mana: Fix race of mana_hwc_post_rx_wqe and new hwc response + - mptcp: close subflow when receiving TCP+FIN + - mptcp: sched: check both backup in retrans + - mptcp: pm: reuse ID 0 after delete and re-add + - mptcp: pm: skip connecting to already established sf + - mptcp: pm: reset MPC endp ID when re-added + - mptcp: pm: send ACK on an active subflow + - mptcp: pm: do not remove already closed subflows + - mptcp: pm: fix ID 0 endp usage after multiple re-creations + - mptcp: pm: ADD_ADDR 0 is not a new address + - selftests: mptcp: join: check removing ID 0 endpoint + - selftests: mptcp: join: no extra msg if no counter + - selftests: mptcp: join: check re-re-adding ID 0 endp + - drm/amdgpu/swsmu: always force a state reprogram on init + - drm/vmwgfx: Fix prime with external buffers + - usb: typec: fix up incorrectly backported "usb: typec: tcpm: unregister + existing source caps before re-registration" + - ASoC: amd: acp: fix module autoloading + - ASoC: SOF: amd: Fix for acp init sequence + - pinctrl: mediatek: common-v2: Fix broken bias-disable for + PULL_PU_PD_RSEL_TYPE + - pinctrl: starfive: jh7110: Correct the level trigger configuration of iev + register + - ovl: pass string to ovl_parse_layer() + - ovl: fix wrong lowerdir number check for parameter Opt_lowerdir + - ovl: ovl_parse_param_lowerdir: Add missed '\n' for pr_err + - mm: Fix missing folio invalidation calls during truncation + - cifs: Fix FALLOC_FL_PUNCH_HOLE support + - selinux,smack: don't bypass permissions check in inode_setsecctx hook + - iommufd: Do not allow creating areas without READ or WRITE + - phy: fsl-imx8mq-usb: fix tuning parameter name + - dmaengine: dw-edma: Fix unmasking STOP and ABORT interrupts for HDMA + - dmaengine: dw-edma: Do not enable watermark interrupts for HDMA + - phy: xilinx: phy-zynqmp: Fix SGMII linkup failure on resume + - dmaengine: dw: Add peripheral bus width verification + - dmaengine: dw: Add memory bus width verification + - Bluetooth: btnxpuart: Resolve TX timeout error in power save stress test + - Bluetooth: btnxpuart: Handle FW Download Abort scenario + - Bluetooth: btnxpuart: Fix random crash seen while removing driver + - Bluetooth: hci_core: Fix not handling hibernation actions + - iommu: Do not return 0 from map_pages if it doesn't do anything + - netfilter: nf_tables: restore IP sanity checks for netdev/egress + - wifi: iwlwifi: fw: fix wgds rev 3 exact size + - ethtool: check device is present when getting link settings + - netfilter: nf_tables_ipv6: consider network offset in netdev/egress + validation + - selftests: forwarding: no_forwarding: Down ports on cleanup + - selftests: forwarding: local_termination: Down ports on cleanup + - bonding: implement xdo_dev_state_free and call it after deletion + - bonding: extract the use of real_device into local variable + - bonding: change ipsec_lock from spin lock to mutex + - gtp: fix a potential NULL pointer dereference + - sctp: fix association labeling in the duplicate COOKIE-ECHO case + - drm/amd/display: avoid using null object of framebuffer + - net: busy-poll: use ktime_get_ns() instead of local_clock() + - nfc: pn533: Add poll mod list filling check + - soc: qcom: cmd-db: Map shared memory as WC, not WB + - soc: qcom: pmic_glink: Actually communicate when remote goes down + - soc: qcom: pmic_glink: Fix race during initialization + - cdc-acm: Add DISABLE_ECHO quirk for GE HealthCare UI Controller + - scsi: sd: Ignore command SYNCHRONIZE CACHE error if format in progress + - USB: serial: option: add MeiG Smart SRM825L + - ARM: dts: imx6dl-yapp43: Increase LED current to match the yapp4 HW design + - usb: dwc3: omap: add missing depopulate in probe error path + - usb: dwc3: core: Prevent USB core invalid event buffer address access + - usb: dwc3: st: fix probed platform device ref count on probe error path + - usb: dwc3: st: add missing depopulate in probe error path + - usb: core: sysfs: Unmerge @usb3_hardware_lpm_attr_group in + remove_power_attributes() + - usb: cdnsp: fix incorrect index in cdnsp_get_hw_deq function + - usb: cdnsp: fix for Link TRB with TC + - ARM: dts: omap3-n900: correct the accelerometer orientation + - arm64: dts: imx8mp-beacon-kit: Fix Stereo Audio on WM8962 + - arm64: dts: imx93: add nvmem property for fec1 + - arm64: dts: imx93: add nvmem property for eqos + - arm64: dts: imx93: update default value for snps,clk-csr + - arm64: dts: freescale: imx93-tqma9352: fix CMA alloc-ranges + - arm64: dts: freescale: imx93-tqma9352-mba93xxla: fix typo + - scsi: aacraid: Fix double-free on probe failure + - apparmor: fix policy_unpack_test on big endian systems + - mptcp: pr_debug: add missing \n at the end + - mptcp: make pm_remove_addrs_and_subflows static + - mptcp: pm: fix RM_ADDR ID for the initial subflow + - mptcp: avoid duplicated SUB_CLOSED events + - drm/i915/dsi: Make Lenovo Yoga Tab 3 X90F DMI match less strict + - drm/vmwgfx: Prevent unmapping active read buffers + - drm/vmwgfx: Disable coherent dumb buffers without 3d + - firmware/sysfb: Set firmware-framebuffer parent device + - firmware/sysfb: Create firmware device only for enabled PCI devices + - video/aperture: optionally match the device in sysfb_disable() + - drm/xe: Prepare display for D3Cold + - drm/xe/display: Make display suspend/resume work on discrete + - drm/xe/vm: Simplify if condition + - drm/xe/exec_queue: Rename xe_exec_queue::compute to xe_exec_queue::lr + - drm/xe: prevent UAF around preempt fence + - pinctrl: qcom: x1e80100: Update PDC hwirq map + - ASoC: SOF: amd: move iram-dram fence register programming sequence + - nfsd: ensure that nfsd4_fattr_args.context is zeroed out + - backing-file: convert to using fops->splice_write + - pinctrl: qcom: x1e80100: Fix special pin offsets + - afs: Fix post-setattr file edit to do truncation correctly + - netfs: Fix netfs_release_folio() to say no if folio dirty + - netfs: Fix missing iterator reset on retry of short read + - dmaengine: ti: omap-dma: Initialize sglen after allocation + - pktgen: use cpus_read_lock() in pg_net_init() + - net_sched: sch_fq: fix incorrect behavior for small weights + - tcp: fix forever orphan socket caused by tcp_abort + - drm/xe/hwmon: Fix WRITE_I1 param from u32 to u16 + - usb: typec: fsa4480: Relax CHIP_ID check + - firmware: qcom: scm: Mark get_wq_ctx() as atomic call + - usb: gadget: uvc: queue pump work in uvcg_video_enable() + - usb: dwc3: xilinx: add missing depopulate in probe error path + - usb: typec: ucsi: Move unregister out of atomic section + - firmware: microchip: fix incorrect error report of programming:timeout on + success + - Upstream stable to v6.6.49, v6.10.8 + + * Fix blank screen on external display after reconnecting the USB type-C + (LP: #2081786) // Noble update: upstream stable patchset 2024-10-11 + (LP: #2084225) + - drm/i915/display: add intel_display -> drm_device backpointer + - drm/i915/display: add generic to_intel_display() macro + - drm/i915/dp_mst: Fix MST state after a sink reset + + * Noble update: upstream stable patchset 2024-10-09 (LP: #2084005) + - tty: serial: fsl_lpuart: mark last busy before uart_add_one_port + - tty: atmel_serial: use the correct RTS flag. + - Revert "ACPI: EC: Evaluate orphan _REG under EC device" + - Revert "misc: fastrpc: Restrict untrusted app to attach to privileged PD" + - Revert "usb: typec: tcpm: clear pd_event queue in PORT_RESET" + - selinux: revert our use of vma_is_initial_heap() + - fuse: Initialize beyond-EOF page contents before setting uptodate + - char: xillybus: Don't destroy workqueue from work item running on it + - char: xillybus: Refine workqueue handling + - char: xillybus: Check USB endpoints when probing device + - ALSA: usb-audio: Add delay quirk for VIVO USB-C-XE710 HEADSET + - ALSA: usb-audio: Support Yamaha P-125 quirk entry + - xhci: Fix Panther point NULL pointer deref at full-speed re-enumeration + - thunderbolt: Mark XDomain as unplugged when router is removed + - ALSA: hda/tas2781: fix wrong calibrated data order + - s390/dasd: fix error recovery leading to data corruption on ESE devices + - KVM: s390: fix validity interception issue when gisa is switched off + - riscv: change XIP's kernel_map.size to be size of the entire kernel + - i2c: tegra: Do not mark ACPI devices as irq safe + - ACPICA: Add a depth argument to acpi_execute_reg_methods() + - ACPI: EC: Evaluate _REG outside the EC scope more carefully + - arm64: ACPI: NUMA: initialize all values of acpi_early_node_map to + NUMA_NO_NODE + - dm resume: don't return EINVAL when signalled + - dm persistent data: fix memory allocation failure + - fs/ntfs3: add prefix to bitmap_size() and use BITS_TO_U64() + - s390/cio: rename bitmap_size() -> idset_bitmap_size() + - btrfs: rename bitmap_set_bits() -> btrfs_bitmap_set_bits() + - bitmap: introduce generic optimized bitmap_size() + - fix bitmap corruption on close_range() with CLOSE_RANGE_UNSHARE + - i2c: qcom-geni: Add missing geni_icc_disable in geni_i2c_runtime_resume + - rtla/osnoise: Prevent NULL dereference in error handling + - net: mana: Fix RX buf alloc_size alignment and atomic op panic + - net: mana: Fix doorbell out of order violation and avoid unnecessary + doorbell rings + - wifi: brcmfmac: cfg80211: Handle SSID based pmksa deletion + - selinux: fix potential counting error in avc_add_xperms_decision() + - selinux: add the processing of the failure of avc_add_xperms_decision() + - mm/memory-failure: use raw_spinlock_t in struct memory_failure_cpu + - btrfs: tree-checker: reject BTRFS_FT_UNKNOWN dir type + - btrfs: zoned: properly take lock to read/update block group's zoned + variables + - btrfs: tree-checker: add dev extent item checks + - drm/amdgpu: Actually check flags for all context ops. + - memcg_write_event_control(): fix a user-triggerable oops + - drm/amdgpu/jpeg2: properly set atomics vmid field + - drm/amdgpu/jpeg4: properly set atomics vmid field + - s390/uv: Panic for set and remove shared access UVC errors + - bpf: Fix updating attached freplace prog in prog_array map + - igc: Fix packet still tx after gate close by reducing i226 MAC retry buffer + - igc: Fix qbv_config_change_errors logics + - igc: Fix reset adapter logics when tx mode change + - net/mlx5e: Take state lock during tx timeout reporter + - net/mlx5e: Correctly report errors for ethtool rx flows + - net: axienet: Fix register defines comment description + - net: dsa: vsc73xx: pass value in phy_write operation + - net: dsa: vsc73xx: use read_poll_timeout instead delay loop + - net: dsa: vsc73xx: check busy flag in MDIO operations + - net: ethernet: mtk_wed: fix use-after-free panic in + mtk_wed_setup_tc_block_cb() + - mlxbf_gige: disable RX filters until RX path initialized + - mptcp: correct MPTCP_SUBFLOW_ATTR_SSN_OFFSET reserved size + - tcp: Update window clamping condition + - netfilter: allow ipv6 fragments to arrive on different devices + - netfilter: flowtable: initialise extack before use + - netfilter: nf_queue: drop packets with cloned unconfirmed conntracks + - netfilter: nf_tables: Audit log dump reset after the fact + - netfilter: nf_tables: Introduce nf_tables_getobj_single + - netfilter: nf_tables: Add locking for NFT_MSG_GETOBJ_RESET requests + - vsock: fix recursive ->recvmsg calls + - selftests: net: lib: ignore possible errors + - selftests: net: lib: kill PIDs before del netns + - net: hns3: fix wrong use of semaphore up + - net: hns3: use the user's cfg after reset + - net: hns3: fix a deadlock problem when config TC during resetting + - gpio: mlxbf3: Support shutdown() function + - ALSA: hda/realtek: Fix noise from speakers on Lenovo IdeaPad 3 15IAU7 + - rust: work around `bindgen` 0.69.0 issue + - rust: suppress error messages from CONFIG_{RUSTC,BINDGEN}_VERSION_TEXT + - rust: fix the default format for CONFIG_{RUSTC,BINDGEN}_VERSION_TEXT + - cpu/SMT: Enable SMT only if a core is online + - powerpc/topology: Check if a core is online + - arm64: Fix KASAN random tag seed initialization + - block: Fix lockdep warning in blk_mq_mark_tag_wait + - wifi: ath12k: Add missing qmi_txn_cancel() calls + - quota: Remove BUG_ON from dqget() + - riscv: blacklist assembly symbols for kprobe + - kernfs: fix false-positive WARN(nr_mmapped) in kernfs_drain_open_files + - media: pci: cx23885: check cx23885_vdev_init() return + - fs: binfmt_elf_efpic: don't use missing interpreter's properties + - scsi: lpfc: Initialize status local variable in lpfc_sli4_repost_sgl_list() + - media: drivers/media/dvb-core: copy user arrays safely + - wifi: iwlwifi: mvm: avoid garbage iPN + - net/sun3_82586: Avoid reading past buffer in debug output + - drm/lima: set gp bus_stop bit before hard reset + - gpio: sysfs: extend the critical section for unregistering sysfs devices + - hrtimer: Select housekeeping CPU during migration + - virtiofs: forbid newlines in tags + - accel/habanalabs: fix debugfs files permissions + - clocksource/drivers/arm_global_timer: Guard against division by zero + - tick: Move got_idle_tick away from common flags + - netlink: hold nlk->cb_mutex longer in __netlink_dump_start() + - md: clean up invalid BUG_ON in md_ioctl + - x86: Increase brk randomness entropy for 64-bit systems + - memory: stm32-fmc2-ebi: check regmap_read return value + - parisc: Use irq_enter_rcu() to fix warning at kernel/context_tracking.c:367 + - rxrpc: Don't pick values out of the wire header when setting up security + - f2fs: stop checkpoint when get a out-of-bounds segment + - powerpc/boot: Handle allocation failure in simple_realloc() + - powerpc/boot: Only free if realloc() succeeds + - btrfs: delayed-inode: drop pointless BUG_ON in __btrfs_remove_delayed_item() + - btrfs: defrag: change BUG_ON to assertion in btrfs_defrag_leaves() + - btrfs: change BUG_ON to assertion when checking for delayed_node root + - btrfs: push errors up from add_async_extent() + - btrfs: handle invalid root reference found in may_destroy_subvol() + - btrfs: send: handle unexpected data in header buffer in begin_cmd() + - btrfs: send: handle unexpected inode in header process_recorded_refs() + - btrfs: change BUG_ON to assertion in tree_move_down() + - btrfs: delete pointless BUG_ON check on quota root in + btrfs_qgroup_account_extent() + - f2fs: fix to do sanity check in update_sit_entry + - usb: gadget: fsl: Increase size of name buffer for endpoints + - nvme: clear caller pointer on identify failure + - Bluetooth: bnep: Fix out-of-bound access + - firmware: cirrus: cs_dsp: Initialize debugfs_root to invalid + - rtc: nct3018y: fix possible NULL dereference + - net: hns3: add checking for vf id of mailbox + - nvmet-tcp: do not continue for invalid icreq + - NFS: avoid infinite loop in pnfs_update_layout. + - openrisc: Call setup_memory() earlier in the init sequence + - s390/iucv: fix receive buffer virtual vs physical address confusion + - irqchip/renesas-rzg2l: Do not set TIEN and TINT source at the same time + - platform/x86: lg-laptop: fix %s null argument warning + - usb: dwc3: core: Skip setting event buffers for host only controllers + - irqchip/gic-v3-its: Remove BUG_ON in its_vpe_irq_domain_alloc + - ext4: set the type of max_zeroout to unsigned int to avoid overflow + - nvmet-rdma: fix possible bad dereference when freeing rsps + - selftests/bpf: Fix a few tests for GCC related warnings. + - Revert "bpf, sockmap: Prevent lock inversion deadlock in map delete elem" + - nvme: use srcu for iterating namespace list + - drm/amdgpu: fix dereference null return value for the function + amdgpu_vm_pt_parent + - hrtimer: Prevent queuing of hrtimer without a function callback + - nvme: fix namespace removal list + - gtp: pull network headers in gtp_dev_xmit() + - riscv: entry: always initialize regs->a0 to -ENOSYS + - smb3: fix lock breakage for cached writes + - dm suspend: return -ERESTARTSYS instead of -EINTR + - selftests: memfd_secret: don't build memfd_secret test on unsupported arches + - mm/vmalloc: fix page mapping if vm_area_alloc_pages() with high order + fallback to order 0 + - btrfs: send: allow cloning non-aligned extent if it ends at i_size + - drm/amd/amdgpu: command submission parser for JPEG + - platform/surface: aggregator: Fix warning when controller is destroyed in + probe + - ALSA: hda/tas2781: Use correct endian conversion + - Bluetooth: hci_core: Fix LE quote calculation + - Bluetooth: SMP: Fix assumption of Central always being Initiator + - net: mscc: ocelot: use ocelot_xmit_get_vlan_info() also for FDMA and + register injection + - net: mscc: ocelot: fix QoS class for injected packets with "ocelot-8021q" + - net: mscc: ocelot: serialize access to the injection/extraction groups + - tc-testing: don't access non-existent variable on exception + - selftests: udpgro: report error when receive failed + - tcp/dccp: bypass empty buckets in inet_twsk_purge() + - tcp/dccp: do not care about families in inet_twsk_purge() + - tcp: prevent concurrent execution of tcp_sk_exit_batch + - net: mctp: test: Use correct skb for route input check + - kcm: Serialise kcm_sendmsg() for the same socket. + - netfilter: nft_counter: Disable BH in nft_counter_offload_stats(). + - netfilter: nft_counter: Synchronize nft_counter_reset() against reader. + - ip6_tunnel: Fix broken GRO + - bonding: fix bond_ipsec_offload_ok return type + - bonding: fix null pointer deref in bond_ipsec_offload_ok + - bonding: fix xfrm real_dev null pointer dereference + - bonding: fix xfrm state handling when clearing active slave + - ice: fix page reuse when PAGE_SIZE is over 8k + - ice: fix ICE_LAST_OFFSET formula + - ice: fix truesize operations for PAGE_SIZE >= 8192 + - dpaa2-switch: Fix error checking in dpaa2_switch_seed_bp() + - igb: cope with large MAX_SKB_FRAGS + - net: dsa: mv88e6xxx: Fix out-of-bound access + - udp: fix receiving fraglist GSO packets + - ipv6: fix possible UAF in ip6_finish_output2() + - ipv6: prevent possible UAF in ip6_xmit() + - bnxt_en: Fix double DMA unmapping for XDP_REDIRECT + - netfilter: flowtable: validate vlan header + - octeontx2-af: Fix CPT AF register offset calculation + - net: xilinx: axienet: Always disable promiscuous mode + - net: xilinx: axienet: Fix dangling multicast addresses + - net: ovs: fix ovs_drop_reasons error + - drm/msm/dpu: don't play tricks with debug macros + - drm/msm/dp: fix the max supported bpp logic + - drm/msm/dpu: split dpu_encoder_wait_for_event into two functions + - drm/msm/dpu: capture snapshot on the first commit_done timeout + - drm/msm/dpu: move dpu_encoder's connector assignment to atomic_enable() + - drm/msm/dp: reset the link phy params before link training + - drm/msm/dpu: cleanup FB if dpu_format_populate_layout fails + - drm/msm/dpu: take plane rotation into account for wide planes + - drm/msm: fix the highest_bank_bit for sc7180 + - mmc: mmc_test: Fix NULL dereference on allocation failure + - Bluetooth: MGMT: Add error handling to pair_device() + - scsi: core: Fix the return value of scsi_logical_block_count() + - ksmbd: the buffer of smb2 query dir response has at least 1 byte + - drm/amdgpu: Validate TA binary size + - net: dsa: microchip: fix PTP config failure when using multiple ports + - MIPS: Loongson64: Set timer mode in cpu-probe + - HID: wacom: Defer calculation of resolution until resolution_code is known + - Input: i8042 - add forcenorestore quirk to leave controller untouched even + on s3 + - Input: i8042 - use new forcenorestore quirk to replace old buggy quirk + combination + - cxgb4: add forgotten u64 ivlan cast before shift + - KVM: arm64: Make ICC_*SGI*_EL1 undef in the absence of a vGICv3 + - mmc: mtk-sd: receive cmd8 data when hs400 tuning fail + - mmc: dw_mmc: allow biu and ciu clocks to defer + - smb3: fix broken cached reads when posix locks + - pmdomain: imx: scu-pd: Remove duplicated clocks + - pmdomain: imx: wait SSAR when i.MX93 power domain on + - nouveau/firmware: use dma non-coherent allocator + - mptcp: pm: re-using ID of unused removed ADD_ADDR + - mptcp: pm: re-using ID of unused removed subflows + - mptcp: pm: re-using ID of unused flushed subflows + - mptcp: pm: remove mptcp_pm_remove_subflow() + - mptcp: pm: only mark 'subflow' endp as available + - mptcp: pm: only decrement add_addr_accepted for MPJ req + - mptcp: pm: check add_addr_accept_max before accepting new ADD_ADDR + - mptcp: pm: only in-kernel cannot have entries with ID 0 + - mptcp: pm: fullmesh: select the right ID later + - mptcp: pm: avoid possible UaF when selecting endp + - selftests: mptcp: join: validate fullmesh endp on 1st sf + - selftests: mptcp: join: restrict fullmesh endp on 1st sf + - selftests: mptcp: join: check re-using ID of closed subflow + - tcp: do not export tcp_twsk_purge() + - drm/msm/mdss: specify cfg bandwidth for SDM670 + - drm/panel: nt36523: Set 120Hz fps for xiaomi,elish panels + - igc: Fix qbv tx latency by setting gtxoffset + - ALSA: timer: Relax start tick time check for slave timer elements + - bpf: Fix a kernel verifier crash in stacksafe() + - selftests/bpf: Add a test to verify previous stacksafe() fix + - Revert "s390/dasd: Establish DMA alignment" + - Input: MT - limit max slots + - tools: move alignment-related macros to new + - Revert "serial: 8250_omap: Set the console genpd always on if no console + suspend" + - usb: misc: ljca: Add Lunar Lake ljca GPIO HID to ljca_gpio_hids[] + - usb: xhci: Check for xhci->interrupters being allocated in + xhci_mem_clearup() + - vfs: Don't evict inode under the inode lru traversing context + - tracing: Return from tracing_buffers_read() if the file has been closed + - mm: fix endless reclaim on machines with unaccepted memory + - fs/netfs/fscache_cookie: add missing "n_accesses" check + - mm/numa: no task_numa_fault() call if PMD is changed + - mm/numa: no task_numa_fault() call if PTE is changed + - btrfs: check delayed refs when we're checking if a ref exists + - drm/amd/display: Adjust cursor position + - drm/amd/display: fix s2idle entry for DCN3.5+ + - drm/amd/display: Enable otg synchronization logic for DCN321 + - drm/amd/display: fix cursor offset on rotation 180 + - netfs: Fault in smaller chunks for non-large folio mappings + - libfs: fix infinite directory reads for offset dir + - kallsyms: Avoid weak references for kallsyms symbols + - kbuild: avoid unneeded kallsyms step 3 + - kbuild: refactor variables in scripts/link-vmlinux.sh + - kbuild: remove PROVIDE() for kallsyms symbols + - kallsyms: get rid of code for absolute kallsyms + - [Config] Remove CONFIG_KALLSYMS_BASE_RELATIVE + - kallsyms: Do not cleanup .llvm. suffix before sorting symbols + - bpf: Replace deprecated strncpy with strscpy + - kallsyms: replace deprecated strncpy with strscpy + - kallsyms: rework symbol lookup return codes + - kallsyms: Match symbols exactly with CONFIG_LTO_CLANG + - drm/v3d: Fix out-of-bounds read in `v3d_csd_job_run()` + - drm/amd/display: Don't register panel_power_savings on OLED panels + - wifi: ath12k: use 128 bytes aligned iova in transmit path for WCN7850 + - kbuild: merge temporary vmlinux for BTF and kallsyms + - kbuild: avoid scripts/kallsyms parsing /dev/null + - Bluetooth: HCI: Invert LE State quirk to be opt-out rather then opt-in + - net/mlx5: Fix IPsec RoCE MPV trace call + - selftests: udpgro: no need to load xdp for gro + - ice: use internal pf id instead of function number + - drm/msm/dpu: limit QCM2290 to RGB formats only + - drm/msm/dpu: relax YUV requirements + - spi: spi-cadence-quadspi: Fix OSPI NOR failures during system resume + - drm/xe/display: stop calling domains_driver_remove twice + - drm/xe: Fix opregion leak + - drm/xe/mmio: move mmio_fini over to devm + - drm/xe: reset mmio mappings with devm + - drm/xe: Fix tile fini sequence + - drm/xe: Fix missing workqueue destroy in xe_gt_pagefault + - drm/xe: Free job before xe_exec_queue_put + - thermal/debugfs: Fix the NULL vs IS_ERR() confusion in debugfs_create_dir() + - nvme: move stopping keep-alive into nvme_uninit_ctrl() + - drm/amdgpu/sdma5.2: limit wptr workaround to sdma 5.2.1 + - s390/ap: Refine AP bus bindings complete processing + - net: ngbe: Fix phy mode set to external phy + - iommufd/device: Fix hwpt at err_unresv in iommufd_device_do_replace() + - cgroup/cpuset: fix panic caused by partcmd_update + - cgroup/cpuset: Clear effective_xcpus on cpus_allowed clearing only if + cpus.exclusive not set + - of: Introduce for_each_*_child_of_node_scoped() to automate of_node_put() + handling + - thermal: of: Fix OF node leak in thermal_of_trips_init() error path + - thermal: of: Fix OF node leak in thermal_of_zone_register() + - thermal: of: Fix OF node leak in of_thermal_zone_find() error paths + - Upstream stable to v6.6.48, v6.10.7 + + * Unable to list directories using CIFS on 6.8 kernel (LP: #2082423) // Noble + update: upstream stable patchset 2024-10-09 (LP: #2084005) + - smb: client: ignore unhandled reparse tags + + * CVE-2024-46759 + - hwmon: (adc128d818) Fix underflows seen when writing limit attributes + + * CVE-2024-46758 + - hwmon: (lm95234) Fix underflows seen when writing limit attributes + + * CVE-2024-46756 + - hwmon: (w83627ehf) Fix underflows seen when writing limit attributes + + * CVE-2024-46738 + - VMCI: Fix use-after-free when removing resource in vmci_resource_remove() + + * CVE-2024-46722 + - drm/amdgpu: fix mc_data out-of-bounds read warning + + * LXD fan bridge causes blocked tasks (LP: #2064176) + - SAUCE: fan: release rcu_read_lock on skb discard path + - SAUCE: fan: fix racy device stat update + + * x86/CPU/AMD: Add models 0x10-0x1f to the Zen5 range (LP: #2081863) + - x86/CPU/AMD: Add models 0x60-0x6f to the Zen5 range + + * UBSAN: array-index-out-of-bounds in module mt76 (LP: #2081785) + - wifi: mt76: mt7925: fix a potential array-index-out-of-bounds issue for clc + + * The system hangs after resume with thunderbolt monitor(AMD GPU [1002:1900]) + (LP: #2083182) + - SAUCE: drm/amd/display: Fix system hang while resume with TBT monitor + + * [SRU] GPU: support additional device ids for DG2 driver (LP: #2083701) + - drm/i915: Add new PCI IDs to DG2 platform in driver + + * [SRU]Intel Arrow Lake IBECC feature backport request for ubuntu 22.04.5 and + 24.04.1 server (LP: #2077861) + - EDAC/igen6: Add Intel Arrow Lake-U/H SoCs support + + * Noble update: upstream stable patchset 2024-10-07 (LP: #2083794) + - ASoC: topology: Clean up route loading + - ASoC: topology: Fix route memory corruption + - LoongArch: Define __ARCH_WANT_NEW_STAT in unistd.h + - sunrpc: don't change ->sv_stats if it doesn't exist + - nfsd: stop setting ->pg_stats for unused stats + - sunrpc: pass in the sv_stats struct through svc_create_pooled + - sunrpc: remove ->pg_stats from svc_program + - nfsd: remove nfsd_stats, make th_cnt a global counter + - nfsd: make svc_stat per-network namespace instead of global + - mm: gup: stop abusing try_grab_folio + - nvme/pci: Add APST quirk for Lenovo N60z laptop + - genirq/cpuhotplug: Skip suspended interrupts when restoring affinity + - genirq/cpuhotplug: Retry with cpu_online_mask when migration fails + - quota: Detect loops in quota tree + - bpf: Replace bpf_lpm_trie_key 0-length array with flexible array + - fs: Annotate struct file_handle with __counted_by() and use struct_size() + - mISDN: fix MISDN_TIME_STAMP handling + - mm/page_table_check: support userfault wr-protect entries + - bpf, net: Use DEV_STAT_INC() + - f2fs: fix to do sanity check on F2FS_INLINE_DATA flag in inode during GC + - f2fs: fix to cover read extent cache access with lock + - fou: remove warn in gue_gro_receive on unsupported protocol + - jfs: fix null ptr deref in dtInsertEntry + - jfs: Fix shift-out-of-bounds in dbDiscardAG + - fs/ntfs3: Do copy_to_user out of run_lock + - ALSA: usb: Fix UBSAN warning in parse_audio_unit() + - binfmt_flat: Fix corruption when not offsetting data start + - mm/debug_vm_pgtable: drop RANDOM_ORVALUE trick + - KVM: arm64: Don't defer TLB invalidation when zapping table entries + - KVM: arm64: Don't pass a TLBI level hint when zapping table entries + - drm/amd/display: Defer handling mst up request in resume + - drm/amd/display: Guard cursor idle reallow by DC debug option + - drm/amd/display: Separate setting and programming of cursor + - drm/amd/display: Prevent IPX From Link Detect and Set Mode + - ASoC: cs35l56: Patch CS35L56_IRQ1_MASK_18 to the default value + - platform/x86/amd/pmf: Fix to Update HPD Data When ALS is Disabled + - platform/x86: ideapad-laptop: introduce a generic notification chain + - platform/x86: ideapad-laptop: move ymc_trigger_ec from lenovo-ymc + - platform/x86: ideapad-laptop: add a mutex to synchronize VPC commands + - drm/amd/display: Solve mst monitors blank out problem after resume + - drm/amdgpu/display: Fix null pointer dereference in + dc_stream_program_cursor_position + - Upstream stable to v6.6.47, v6.10.6 + + * Noble update: upstream stable patchset 2024-10-04 (LP: #2083656) + - irqchip/mbigen: Fix mbigen node address layout + - platform/x86/intel/ifs: Initialize union ifs_status to zero + - jump_label: Fix the fix, brown paper bags galore + - x86/mm: Fix pti_clone_pgtable() alignment assumption + - x86/mm: Fix pti_clone_entry_text() for i386 + - smb: client: move most of reparse point handling code to common file + - smb: client: set correct d_type for reparse DFS/DFSR and mount point + - smb: client: handle lack of FSCTL_GET_REPARSE_POINT support + - sctp: Fix null-ptr-deref in reuseport_add_sock(). + - net: usb: qmi_wwan: fix memory leak for not ip packets + - net: bridge: mcast: wait for previous gc cycles when removing port + - net: linkwatch: use system_unbound_wq + - ice: Fix reset handler + - Bluetooth: l2cap: always unlock channel in l2cap_conless_channel() + - Bluetooth: hci_sync: avoid dup filtering when passive scanning with adv + monitor + - net/smc: add the max value of fallback reason count + - net: dsa: bcm_sf2: Fix a possible memory leak in bcm_sf2_mdio_register() + - l2tp: fix lockdep splat + - net: bcmgenet: Properly overlay PHY and MAC Wake-on-LAN capabilities + - net: fec: Stop PPS on driver remove + - gpio: prevent potential speculation leaks in gpio_device_get_desc() + - hwmon: corsair-psu: add USB id of HX1200i Series 2023 psu + - rcutorture: Fix rcu_torture_fwd_cb_cr() data race + - md: do not delete safemode_timer in mddev_suspend + - md/raid5: avoid BUG_ON() while continue reshape after reassembling + - block: change rq_integrity_vec to respect the iterator + - rcu: Fix rcu_barrier() VS post CPUHP_TEARDOWN_CPU invocation + - clocksource/drivers/sh_cmt: Address race condition for clock events + - ACPI: battery: create alarm sysfs attribute atomically + - ACPI: SBS: manage alarm sysfs attribute through psy core + - xen: privcmd: Switch from mutex to spinlock for irqfds + - wifi: nl80211: disallow setting special AP channel widths + - wifi: ath12k: fix memory leak in ath12k_dp_rx_peer_frag_setup() + - net/mlx5e: SHAMPO, Fix invalid WQ linked list unlink + - selftests/bpf: Fix send_signal test with nested CONFIG_PARAVIRT + - af_unix: Don't retry after unix_state_lock_nested() in + unix_stream_connect(). + - PCI: Add Edimax Vendor ID to pci_ids.h + - udf: prevent integer overflow in udf_bitmap_free_blocks() + - wifi: nl80211: don't give key data to userspace + - can: mcp251xfd: tef: prepare to workaround broken TEF FIFO tail index + erratum + - can: mcp251xfd: tef: update workaround for erratum DS80000789E 6 of + mcp2518fd + - net: stmmac: qcom-ethqos: enable SGMII loopback during DMA reset on + sa8775p-ride-r3 + - btrfs: do not clear page dirty inside extent_write_locked_range() + - btrfs: fix invalid mapping of extent xarray state + - btrfs: fix bitmap leak when loading free space cache on duplicate entry + - Bluetooth: btnxpuart: Shutdown timer and prevent rearming when driver + unloading + - drm/amd/display: Add delay to improve LTTPR UHBR interop + - drm/amdgpu: fix potential resource leak warning + - drm/amdgpu/pm: Fix the param type of set_power_profile_mode + - drm/amdgpu/pm: Fix the null pointer dereference for smu7 + - drm/amdgpu: Fix the null pointer dereference to ras_manager + - drm/amdgpu/pm: Fix the null pointer dereference in apply_state_adjust_rules + - drm/admgpu: fix dereferencing null pointer context + - drm/amdgpu: Add lock around VF RLCG interface + - drm/amd/pm: Fix the null pointer dereference for vega10_hwmgr + - media: amphion: Remove lock in s_ctrl callback + - drm/amd/display: Add null checker before passing variables + - media: uvcvideo: Ignore empty TS packets + - media: uvcvideo: Fix the bandwdith quirk on USB 3.x + - media: xc2028: avoid use-after-free in load_firmware_cb() + - ext4: fix uninitialized variable in ext4_inlinedir_to_tree + - jbd2: avoid memleak in jbd2_journal_write_metadata_buffer + - s390/sclp: Prevent release of buffer in I/O + - SUNRPC: Fix a race to wake a sync task + - profiling: remove profile=sleep support + - scsi: mpt3sas: Avoid IOMMU page faults on REPORT ZONES + - irqchip/meson-gpio: Convert meson_gpio_irq_controller::lock to + 'raw_spinlock_t' + - irqchip/loongarch-cpu: Fix return value of lpic_gsi_to_irq() + - sched/cputime: Fix mul_u64_u64_div_u64() precision for cputime + - net: drop bad gso csum_start and offset in virtio_net_hdr + - arm64: Add Neoverse-V2 part + - arm64: barrier: Restore spec_bar() macro + - arm64: cputype: Add Cortex-X4 definitions + - arm64: cputype: Add Neoverse-V3 definitions + - arm64: errata: Add workaround for Arm errata 3194386 and 3312417 + - arm64: cputype: Add Cortex-X3 definitions + - arm64: cputype: Add Cortex-A720 definitions + - arm64: cputype: Add Cortex-X925 definitions + - arm64: errata: Unify speculative SSBS errata logic + - [Config] Set ARM64_ERRATUM_3194386=y + - arm64: errata: Expand speculative SSBS workaround + - arm64: cputype: Add Cortex-X1C definitions + - arm64: cputype: Add Cortex-A725 definitions + - arm64: errata: Expand speculative SSBS workaround (again) + - i2c: smbus: Improve handling of stuck alerts + - ASoC: codecs: wcd938x-sdw: Correct Soundwire ports mask + - ASoC: codecs: wsa881x: Correct Soundwire ports mask + - ASoC: codecs: wsa883x: parse port-mapping information + - ASoC: codecs: wsa883x: Correct Soundwire ports mask + - ASoC: codecs: wsa884x: parse port-mapping information + - ASoC: codecs: wsa884x: Correct Soundwire ports mask + - ASoC: sti: add missing probe entry for player and reader + - spi: spidev: Add missing spi_device_id for bh2228fv + - ASoC: SOF: Remove libraries from topology lookups + - i2c: smbus: Send alert notifications to all devices if source not found + - bpf: kprobe: remove unused declaring of bpf_kprobe_override + - kprobes: Fix to check symbol prefixes correctly + - i2c: qcom-geni: Add missing clk_disable_unprepare in geni_i2c_runtime_resume + - i2c: qcom-geni: Add missing geni_icc_disable in geni_i2c_runtime_resume + - spi: spi-fsl-lpspi: Fix scldiv calculation + - ALSA: usb-audio: Re-add ScratchAmp quirk entries + - ASoC: meson: axg-fifo: fix irq scheduling issue with PREEMPT_RT + - cifs: cifs_inval_name_dfs_link_error: correct the check for fullpath + - module: warn about excessively long module waits + - module: make waiting for a concurrent module loader interruptible + - drm/i915/gem: Fix Virtual Memory mapping boundaries calculation + - drm/amd/display: Skip Recompute DSC Params if no Stream on Link + - drm/amdgpu: Forward soft recovery errors to userspace + - drm/i915/gem: Adjust vma offset for framebuffer mmap offset + - drm/client: fix null pointer dereference in drm_client_modeset_probe + - ALSA: line6: Fix racy access to midibuf + - ALSA: hda: Add HP MP9 G4 Retail System AMS to force connect list + - ALSA: hda/realtek: Add Framework Laptop 13 (Intel Core Ultra) to quirks + - ALSA: hda/hdmi: Yet more pin fix for HP EliteDesk 800 G4 + - usb: vhci-hcd: Do not drop references before new references are gained + - USB: serial: debug: do not echo input by default + - usb: gadget: core: Check for unset descriptor + - usb: gadget: midi2: Fix the response for FB info with block 0xff + - usb: gadget: u_serial: Set start_delayed during suspend + - usb: gadget: u_audio: Check return codes from usb_ep_enable and + config_ep_by_speed. + - scsi: mpi3mr: Avoid IOMMU page faults on REPORT ZONES + - scsi: ufs: core: Do not set link to OFF state while waking up from + hibernation + - scsi: ufs: core: Fix hba->last_dme_cmd_tstamp timestamp updating logic + - tick/broadcast: Move per CPU pointer access into the atomic section + - vhost-vdpa: switch to use vmf_insert_pfn() in the fault handler + - ntp: Clamp maxerror and esterror to operating range + - clocksource: Scale the watchdog read retries automatically + - clocksource: Fix brown-bag boolean thinko in cs_watchdog_read() + - driver core: Fix uevent_show() vs driver detach race + - tracefs: Fix inode allocation + - tracefs: Use generic inode RCU for synchronizing freeing + - ntp: Safeguard against time_constant overflow + - timekeeping: Fix bogus clock_was_set() invocation in do_adjtimex() + - serial: core: check uartclk for zero to avoid divide by zero + - memcg: protect concurrent access to mem_cgroup_idr + - parisc: fix unaligned accesses in BPF + - parisc: fix a possible DMA corruption + - ASoC: amd: yc: Add quirk entry for OMEN by HP Gaming Laptop 16-n0xxx + - kcov: properly check for softirq context + - irqchip/xilinx: Fix shift out of bounds + - genirq/irqdesc: Honor caller provided affinity in alloc_desc() + - LoongArch: Enable general EFI poweroff method + - power: supply: qcom_battmgr: return EAGAIN when firmware service is not up + - power: supply: axp288_charger: Fix constant_charge_voltage writes + - power: supply: axp288_charger: Round constant_charge_voltage writes down + - tracing: Fix overflow in get_free_elt() + - padata: Fix possible divide-by-0 panic in padata_mt_helper() + - smb3: fix setting SecurityFlags when encryption is required + - eventfs: Don't return NULL in eventfs_create_dir() + - eventfs: Use SRCU for freeing eventfs_inodes + - selftests: mm: add s390 to ARCH check + - btrfs: avoid using fixed char array size for tree names + - x86/paravirt: Fix incorrect virt spinlock setting on bare metal + - x86/mtrr: Check if fixed MTRRs exist before saving them + - sched/smt: Introduce sched_smt_present_inc/dec() helper + - sched/smt: Fix unbalance sched_smt_present dec/inc + - sched/core: Introduce sched_set_rq_on/offline() helper + - sched/core: Fix unbalance set_rq_online/offline() in sched_cpu_deactivate() + - drm/bridge: analogix_dp: properly handle zero sized AUX transactions + - drm/dp_mst: Skip CSN if topology probing is not done yet + - drm/lima: Mark simple_ondemand governor as softdep + - drm/mgag200: Set DDC timeout in milliseconds + - drm/mgag200: Bind I2C lifetime to DRM device + - drm/radeon: Remove __counted_by from StateArray.states[] + - mptcp: fully established after ADD_ADDR echo on MPJ + - mptcp: pm: deny endp with signal + subflow + port + - block: use the right type for stub rq_integrity_vec() + - btrfs: fix corruption after buffer fault in during direct IO append write + - tools headers arm64: Sync arm64's cputype.h with the kernel sources + - mm/hugetlb: fix potential race in __update_and_free_hugetlb_folio() + - xfs: fix log recovery buffer allocation for the legacy h_size fixup + - mptcp: pm: reduce indentation blocks + - mptcp: pm: don't try to create sf if alloc failed + - mptcp: pm: do not ignore 'subflow' if 'signal' flag is also set + - selftests: mptcp: join: ability to invert ADD_ADDR check + - selftests: mptcp: join: test both signal & subflow + - Revert "selftests: mptcp: simult flows: mark 'unbalanced' tests as flaky" + - btrfs: fix double inode unlock for direct IO sync writes + - perf/x86/intel/cstate: Switch to new Intel CPU model defines + - perf/x86/intel/cstate: Add Arrowlake support + - perf/x86/intel/cstate: Add Lunarlake support + - perf/x86/intel/cstate: Add pkg C2 residency counter for Sierra Forest + - platform/x86: intel-vbtn: Protect ACPI notify handler against recursion + - perf/x86/amd: Use try_cmpxchg() in events/amd/{un,}core.c + - perf/x86/intel: Support the PEBS event mask + - perf/x86: Support counter mask + - perf/x86: Fix smp_processor_id()-in-preemptible warnings + - virtio-net: unbreak vq resizing when coalescing is not negotiated + - net: dsa: microchip: Fix Wake-on-LAN check to not return an error + - net: dsa: microchip: disable EEE for KSZ8567/KSZ9567/KSZ9896/KSZ9897. + - regmap: kunit: Use a KUnit action to call regmap_exit() + - regmap: kunit: Replace a kmalloc/kfree() pair with KUnit-managed alloc + - regmap: kunit: Fix memory leaks in gen_regmap() and gen_raw_regmap() + - debugobjects: Annotate racy debug variables + - nvme: apple: fix device reference counting + - cpufreq: amd-pstate: Allow users to write 'default' EPP string + - cpufreq: amd-pstate: auto-load pstate driver by default + - soc: qcom: icc-bwmon: Allow for interrupts to be shared across instances + - ACPI: resource: Skip IRQ override on Asus Vivobook Pro N6506MU + - ACPI: resource: Skip IRQ override on Asus Vivobook Pro N6506MJ + - thermal: intel: hfi: Give HFI instances package scope + - wifi: ath12k: fix race due to setting ATH12K_FLAG_EXT_IRQ_ENABLED too early + - wifi: rtlwifi: handle return value of usb init TX/RX + - wifi: rtw89: pci: fix RX tag race condition resulting in wrong RX length + - wifi: mac80211: fix NULL dereference at band check in starting tx ba session + - bpf: add missing check_func_arg_reg_off() to prevent out-of-bounds memory + accesses + - mlxsw: pci: Lock configuration space of upstream bridge during reset + - btrfs: do not BUG_ON() when freeing tree block after error + - btrfs: reduce nesting for extent processing at btrfs_lookup_extent_info() + - btrfs: fix data race when accessing the last_trans field of a root + - drm/xe/preempt_fence: enlarge the fence critical section + - drm/amd/display: Handle HPD_IRQ for internal link + - drm/amd/amdkfd: Fix a resource leak in svm_range_validate_and_map() + - drm/xe/xe_guc_submit: Fix exec queue stop race condition + - drm/amd/display: Add null checks for 'stream' and 'plane' before + dereferencing + - drm/amd/display: Wake DMCUB before sending a command for replay feature + - drm/amd/display: reduce ODM slice count to initial new dc state only when + needed + - of: Add cleanup.h based auto release via __free(device_node) markings + - media: i2c: ov5647: replacing of_node_put with __free(device_node) + - drm/amd/display: Fix null pointer deref in dcn20_resource.c + - ext4: sanity check for NULL pointer after ext4_force_shutdown + - mm, slub: do not call do_slab_free for kfence object + - ASoC: cs35l56: Revert support for dual-ownership of ASP registers + - drm/atomic: allow no-op FB_ID updates for async flips + - drm/amd/display: Replace dm_execute_dmub_cmd with + dc_wake_and_execute_dmub_cmd + - drm/xe/rtp: Fix off-by-one when processing rules + - drm/xe: Use dma_fence_chain_free in chain fence unused as a sync + - drm/xe/hwmon: Fix PL1 disable flow in xe_hwmon_power_max_write + - drm/xe: Move lrc snapshot capturing to xe_lrc.c + - drm/xe: Minor cleanup in LRC handling + - drm/test: fix the gem shmem test to map the sg table. + - usb: typec: pd: no opencoding of FIELD_GET + - usb: typec: fsa4480: Check if the chip is really there + - PM: runtime: Simplify pm_runtime_get_if_active() usage + - scsi: ufs: core: Fix deadlock during RTC update + - serial: sc16is7xx: fix invalid FIFO access with special register set + - tracing: Have format file honor EVENT_FILE_FL_FREED + - mm: list_lru: fix UAF for memory cgroup + - net/tcp: Disable TCP-AO static key after RCU grace period + - Revert "drm/amd/display: Handle HPD_IRQ for internal link" + - idpf: fix memleak in vport interrupt configuration + - drm/amd/display: Add null check in resource_log_pipe_topology_update + - Upstream stable to v6.6.46, v6.10.5 + + * Noble update: upstream stable patchset 2024-10-02 (LP: #2083488) + - sysctl: allow change system v ipc sysctls inside ipc namespace + - sysctl: allow to change limits for posix messages queues + - sysctl: treewide: drop unused argument ctl_table_root::set_ownership(table) + - ext4: factor out a common helper to query extent map + - ext4: check the extent status again before inserting delalloc block + - leds: trigger: Store brightness set by led_trigger_event() + - leds: trigger: Call synchronize_rcu() before calling trig->activate() + - KVM: VMX: Move posted interrupt descriptor out of VMX code + - fbdev/vesafb: Replace references to global screen_info by local pointer + - video: Add helpers for decoding screen_info + - [Config] Update CONFIG_SCREEN_INFO + - video: Provide screen_info_get_pci_dev() to find screen_info's PCI device + - firmware/sysfb: Update screen_info for relocated EFI framebuffers + - mm: page_alloc: control latency caused by zone PCP draining + - mm/page_alloc: fix pcp->count race between drain_pages_zone() vs + __rmqueue_pcplist() + - f2fs: fix to avoid use SSR allocate when do defragment + - f2fs: assign CURSEG_ALL_DATA_ATGC if blkaddr is valid + - dmaengine: fsl-edma: add address for channel mux register in fsl_edma_chan + - dmaengine: fsl-edma: add i.MX8ULP edma support + - perf: imx_perf: fix counter start and config sequence + - MIPS: Loongson64: DTS: Fix PCIe port nodes for ls7a + - MIPS: dts: loongson: Fix liointc IRQ polarity + - MIPS: dts: loongson: Fix ls2k1000-rtc interrupt + - ARM: 9406/1: Fix callchain_trace() return value + - HID: amd_sfh: Move sensor discovery before HID device initialization + - perf tool: fix dereferencing NULL al->maps + - drm/nouveau: prime: fix refcount underflow + - drm/vmwgfx: Fix overlay when using Screen Targets + - drm/vmwgfx: Trigger a modeset when the screen moves + - sched: act_ct: take care of padding in struct zones_ht_key + - wifi: cfg80211: fix reporting failed MLO links status with + cfg80211_connect_done + - net: phy: realtek: add support for RTL8366S Gigabit PHY + - ALSA: hda: conexant: Fix headset auto detect fail in the polling mode + - Bluetooth: btintel: Fail setup on error + - Bluetooth: hci_sync: Fix suspending with wrong filter policy + - tcp: annotate data-races around tp->window_clamp + - tcp: Adjust clamping window for applications specifying SO_RCVBUF + - net: axienet: start napi before enabling Rx/Tx + - rtnetlink: Don't ignore IFLA_TARGET_NETNSID when ifname is specified in + rtnl_dellink(). + - i915/perf: Remove code to update PWR_CLK_STATE for gen12 + - ice: respect netif readiness in AF_XDP ZC related ndo's + - ice: don't busy wait for Rx queue disable in ice_qp_dis() + - ice: replace synchronize_rcu with synchronize_net + - ice: add missing WRITE_ONCE when clearing ice_rx_ring::xdp_prog + - drm/i915/hdcp: Fix HDCP2_STREAM_STATUS macro + - net: mvpp2: Don't re-use loop iterator + - net: phy: micrel: Fix the KSZ9131 MDI-X status issue + - ALSA: hda: Conditionally use snooping for AMD HDMI + - netfilter: iptables: Fix null-ptr-deref in iptable_nat_table_init(). + - netfilter: iptables: Fix potential null-ptr-deref in + ip6table_nat_table_init(). + - net/mlx5: Always drain health in shutdown callback + - net/mlx5: Fix error handling in irq_pool_request_irq + - net/mlx5: Lag, don't use the hardcoded value of the first port + - net/mlx5: Fix missing lock on sync reset reload + - net/mlx5e: Require mlx5 tc classifier action support for IPsec prio + capability + - net/mlx5e: Fix CT entry update leaks of modify header context + - net/mlx5e: Add a check for the return value from mlx5_port_set_eth_ptys + - igc: Fix double reset adapter triggered from a single taprio cmd + - ipv6: fix ndisc_is_useropt() handling for PIO + - perf: riscv: Fix selecting counters in legacy mode + - riscv/mm: Add handling for VM_FAULT_SIGSEGV in mm_fault_error() + - riscv: Fix linear mapping checks for non-contiguous memory regions + - arm64: jump_label: Ensure patched jump_labels are visible to all CPUs + - rust: SHADOW_CALL_STACK is incompatible with Rust + - platform/chrome: cros_ec_proto: Lock device when updating MKBP version + - HID: wacom: Modify pen IDs + - btrfs: zoned: fix zone_unusable accounting on making block group read-write + again + - btrfs: do not subtract delalloc from avail bytes + - protect the fetch of ->fd[fd] in do_dup2() from mispredictions + - mptcp: sched: check both directions for backup + - ALSA: usb-audio: Correct surround channels in UAC1 channel map + - ALSA: hda/realtek: Add quirk for Acer Aspire E5-574G + - ALSA: seq: ump: Optimize conversions from SysEx to UMP + - Revert "ALSA: firewire-lib: obsolete workqueue for period update" + - Revert "ALSA: firewire-lib: operate for period elapse event in process + context" + - drm/vmwgfx: Fix a deadlock in dma buf fence polling + - drm/virtio: Fix type of dma-fence context variable + - drm/i915: Fix possible int overflow in skl_ddi_calculate_wrpll() + - net: usb: sr9700: fix uninitialized variable use in sr_mdio_read + - r8169: don't increment tx_dropped in case of NETDEV_TX_BUSY + - mptcp: fix user-space PM announced address accounting + - mptcp: distinguish rcv vs sent backup flag in requests + - mptcp: fix NL PM announced address accounting + - mptcp: mib: count MPJ with backup flag + - mptcp: fix bad RCVPRUNED mib accounting + - mptcp: pm: only set request_bkup flag when sending MP_PRIO + - mptcp: fix duplicate data handling + - selftests: mptcp: always close input's FD if opened + - selftests: mptcp: join: validate backup in MPJ + - selftests: mptcp: join: check backup support in signal endp + - mm/huge_memory: mark racy access onhuge_anon_orders_always + - mm: fix khugepaged activation policy + - x86/cpu/vfm: Add/initialize x86_vfm field to struct cpuinfo_x86 + - perf/x86/intel: Switch to new Intel CPU model defines + - perf/x86/intel: Add a distinct name for Granite Rapids + - drm/gpuvm: fix missing dependency to DRM_EXEC + - netlink: specs: correct the spec of ethtool + - ethtool: rss: echo the context number back + - wifi: cfg80211: correct S1G beacon length calculation + - ethtool: fix setting key and resetting indir at once + - ice: modify error handling when setting XSK pool in ndo_bpf + - ice: toggle netif_carrier when setting up XSK pool + - ice: improve updating ice_{t,r}x_ring::xsk_pool + - ice: xsk: fix txq interrupt mapping + - drm/atomic: Allow userspace to use explicit sync with atomic async flips + - drm/atomic: Allow userspace to use damage clips with async flips + - riscv/purgatory: align riscv_kernel_entry + - perf arch events: Fix duplicate RISC-V SBI firmware event name + - RISC-V: Enable the IPI before workqueue_online_cpu() + - ceph: force sending a cap update msg back to MDS for revoke op + - drm/vmwgfx: Remove unused code + - drm/vmwgfx: Fix handling of dumb buffers + - drm/v3d: Prevent out of bounds access in performance query extensions + - drm/v3d: Fix potential memory leak in the timestamp extension + - drm/v3d: Fix potential memory leak in the performance extension + - drm/v3d: Validate passed in drm syncobj handles in the timestamp extension + - drm/v3d: Validate passed in drm syncobj handles in the performance extension + - nouveau: set placement to original placement on uvmm validate. + - wifi: ath12k: fix soft lockup on suspend + - mptcp: pm: fix backup support in signal endpoints + - selftests: mptcp: fix error path + - Upstream stable to v6.6.45, v6.10.4 + + * [SRU] Fix AST DP output after resume (LP: #2083022) // Noble update: + upstream stable patchset 2024-10-02 (LP: #2083488) + - drm/ast: astdp: Wake up during connector status detection + - drm/ast: Fix black screen after resume + + * [SRU]Fail to locate the LED of NVME disk behind Intel VMD (LP: #2077287) // + Noble update: upstream stable patchset 2024-10-02 (LP: #2083488) + - PCI: pciehp: Retain Power Indicator bits for userspace indicators + + * Noble update: upstream stable patchset 2024-09-30 (LP: #2083196) + - powerpc/configs: Update defconfig with now user-visible CONFIG_FSL_IFC + - spi: spi-microchip-core: Fix the number of chip selects supported + - spi: atmel-quadspi: Add missing check for clk_prepare + - EDAC, i10nm: make skx_common.o a separate module + - rcu/tasks: Fix stale task snaphot for Tasks Trace + - platform/chrome: cros_ec_debugfs: fix wrong EC message version + - ubd: refactor the interrupt handler + - ubd: untagle discard vs write zeroes not support handling + - block: initialize integrity buffer to zero before writing it to media + - x86/kconfig: Add as-instr64 macro to properly evaluate AS_WRUSS + - hfsplus: fix to avoid false alarm of circular locking + - x86/of: Return consistent error type from x86_of_pci_irq_enable() + - x86/pci/intel_mid_pci: Fix PCIBIOS_* return code handling + - x86/pci/xen: Fix PCIBIOS_* return code handling + - x86/platform/iosf_mbi: Convert PCIBIOS_* return codes to errnos + - cgroup/cpuset: Prevent UAF in proc_cpuset_show() + - hwmon: (adt7475) Fix default duty on fan is disabled + - block: Call .limit_depth() after .hctx has been set + - block/mq-deadline: Fix the tag reservation code + - md: Don't wait for MD_RECOVERY_NEEDED for HOT_REMOVE_DISK ioctl + - pwm: stm32: Always do lazy disabling + - nvmet-auth: fix nvmet_auth hash error handling + - drm/meson: fix canvas release in bind function + - pwm: atmel-tcb: Fix race condition and convert to guards + - hwmon: (max6697) Fix underflow when writing limit attributes + - hwmon: (max6697) Fix swapped temp{1,8} critical alarms + - arm64: dts: qcom: sc8180x: Correct PCIe slave ports + - arm64: dts: qcom: sc8180x: add power-domain to UFS PHY + - arm64: dts: qcom: sdm845: add power-domain to UFS PHY + - arm64: dts: qcom: sm6115: add power-domain to UFS PHY + - arm64: dts: qcom: sm6350: add power-domain to UFS PHY + - arm64: dts: qcom: sm8250: add power-domain to UFS PHY + - arm64: dts: qcom: sm8350: add power-domain to UFS PHY + - arm64: dts: qcom: sm8450: add power-domain to UFS PHY + - arm64: dts: qcom: msm8996-xiaomi-common: drop excton from the USB PHY + - arm64: dts: qcom: sdm850-lenovo-yoga-c630: fix IPA firmware path + - arm64: dts: qcom: msm8998: enable adreno_smmu by default + - soc: qcom: pmic_glink: Handle the return value of pmic_glink_init + - soc: qcom: rpmh-rsc: Ensure irqs aren't disabled by rpmh_rsc_send_data() + callers + - arm64: dts: rockchip: Add sdmmc related properties on rk3308-rock-pi-s + - arm64: dts: rockchip: Add pinctrl for UART0 to rk3308-rock-pi-s + - arm64: dts: rockchip: Add mdio and ethernet-phy nodes to rk3308-rock-pi-s + - arm64: dts: rockchip: Update WIFi/BT related nodes on rk3308-rock-pi-s + - arm64: dts: qcom: msm8996: specify UFS core_clk frequencies + - arm64: dts: qcom: sa8775p: mark ethernet devices as DMA-coherent + - soc: xilinx: rename cpu_number1 to dummy_cpu_number + - ARM: dts: sunxi: remove duplicated entries in makefile + - ARM: dts: stm32: Add arm,no-tick-in-suspend to STM32MP15xx STGEN timer + - arm64: dts: qcom: qrb4210-rb2: make L9A always-on + - cpufreq: ti-cpufreq: Handle deferred probe with dev_err_probe() + - OPP: ti: Fix ti_opp_supply_probe wrong return values + - memory: fsl_ifc: Make FSL_IFC config visible and selectable + - arm64: dts: ti: k3-am62x: Drop McASP AFIFOs + - arm64: dts: ti: k3-am625-beagleplay: Drop McASP AFIFOs + - arm64: dts: ti: k3-am62-verdin: Drop McASP AFIFOs + - arm64: dts: qcom: qdu1000: Add secure qfprom node + - soc: qcom: icc-bwmon: Fix refcount imbalance seen during bwmon_remove + - soc: qcom: pdr: protect locator_addr with the main mutex + - soc: qcom: pdr: fix parsing of domains lists + - arm64: dts: rockchip: Increase VOP clk rate on RK3328 + - arm64: dts: amlogic: sm1: fix spdif compatibles + - ARM: dts: imx6qdl-kontron-samx6i: fix phy-mode + - ARM: dts: imx6qdl-kontron-samx6i: fix PHY reset + - ARM: dts: imx6qdl-kontron-samx6i: fix board reset + - ARM: dts: imx6qdl-kontron-samx6i: fix SPI0 chip selects + - ARM: dts: imx6qdl-kontron-samx6i: fix PCIe reset polarity + - arm64: dts: mediatek: mt8195: Fix GPU thermal zone name for SVS + - arm64: dts: mediatek: mt8183-kukui: Drop bogus output-enable property + - arm64: dts: mediatek: mt8192-asurada: Add off-on-delay-us for + pp3300_mipibrdg + - arm64: dts: mediatek: mt7622: fix "emmc" pinctrl mux + - arm64: dts: mediatek: mt8183-kukui: Fix the value of `dlg,jack-det-rate` + mismatch + - arm64: dts: mediatek: mt8183-kukui-jacuzzi: Add ports node for anx7625 + - arm64: dts: amlogic: gx: correct hdmi clocks + - arm64: dts: amlogic: add power domain to hdmitx + - arm64: dts: amlogic: setup hdmi system clock + - arm64: dts: rockchip: Drop invalid mic-in-differential on rk3568-rock-3a + - arm64: dts: rockchip: Fix mic-in-differential usage on rk3566-roc-pc + - arm64: dts: rockchip: Fix mic-in-differential usage on rk3568-evb1-v10 + - arm64: dts: renesas: r8a779a0: Add missing hypervisor virtual timer IRQ + - arm64: dts: renesas: r8a779f0: Add missing hypervisor virtual timer IRQ + - arm64: dts: renesas: r8a779g0: Add missing hypervisor virtual timer IRQ + - arm64: dts: renesas: r9a07g043u: Add missing hypervisor virtual timer IRQ + - arm64: dts: renesas: r9a07g044: Add missing hypervisor virtual timer IRQ + - arm64: dts: renesas: r9a07g054: Add missing hypervisor virtual timer IRQ + - m68k: atari: Fix TT bootup freeze / unexpected (SCU) interrupt messages + - arm64: dts: imx8mp: Fix pgc_mlmix location + - arm64: dts: imx8mp: add HDMI power-domains + - arm64: dts: imx8mp: Fix pgc vpu locations + - x86/xen: Convert comma to semicolon + - arm64: dts: rockchip: Add missing power-domains for rk356x vop_mmu + - arm64: dts: rockchip: fix regulator name for Lunzn Fastrhino R6xS + - arm64: dts: rockchip: fix usb regulator for Lunzn Fastrhino R6xS + - arm64: dts: rockchip: fix pmu_io supply for Lunzn Fastrhino R6xS + - arm64: dts: rockchip: remove unused usb2 nodes for Lunzn Fastrhino R6xS + - arm64: dts: rockchip: disable display subsystem for Lunzn Fastrhino R6xS + - arm64: dts: rockchip: fixes PHY reset for Lunzn Fastrhino R68S + - arm64: dts: qcom: sm6350: Add missing qcom,non-secure-domain property + - cpufreq/amd-pstate: Fix the scaling_max_freq setting on shared memory CPPC + systems + - m68k: cmpxchg: Fix return value for default case in __arch_xchg() + - ARM: spitz: fix GPIO assignment for backlight + - vmlinux.lds.h: catch .bss..L* sections into BSS") + - firmware: turris-mox-rwtm: Do not complete if there are no waiters + - firmware: turris-mox-rwtm: Fix checking return value of + wait_for_completion_timeout() + - firmware: turris-mox-rwtm: Initialize completion before mailbox + - wifi: brcmsmac: LCN PHY code is used for BCM4313 2G-only device + - wifi: ath12k: Correct 6 GHz frequency value in rx status + - wifi: ath12k: Fix tx completion ring (WBM2SW) setup failure + - bpftool: Un-const bpf_func_info to fix it for llvm 17 and newer + - selftests/bpf: Fix prog numbers in test_sockmap + - net: esp: cleanup esp_output_tail_tcp() in case of unsupported ESPINTCP + - wifi: ath12k: change DMA direction while mapping reinjected packets + - wifi: ath12k: fix invalid memory access while processing fragmented packets + - wifi: ath12k: fix firmware crash during reo reinject + - wifi: ath11k: fix wrong definition of CE ring's base address + - wifi: ath12k: fix wrong definition of CE ring's base address + - tcp: add tcp_done_with_error() helper + - tcp: fix race in tcp_write_err() + - tcp: fix races in tcp_v[46]_err() + - net/smc: set rmb's SG_MAX_SINGLE_ALLOC limitation only when + CONFIG_ARCH_NO_SG_CHAIN is defined + - selftests/bpf: Check length of recv in test_sockmap + - udf: Fix lock ordering in udf_evict_inode() + - lib: objagg: Fix general protection fault + - mlxsw: spectrum_acl_erp: Fix object nesting warning + - mlxsw: spectrum_acl: Fix ACL scale regression and firmware errors + - perf/x86: Serialize set_attr_rdpmc() + - jump_label: Fix concurrency issues in static_key_slow_dec() + - wifi: ath11k: fix wrong handling of CCMP256 and GCMP ciphers + - wifi: cfg80211: fix typo in cfg80211_calculate_bitrate_he() + - wifi: cfg80211: handle 2x996 RU allocation in + cfg80211_calculate_bitrate_he() + - udf: Fix bogus checksum computation in udf_rename() + - net: fec: Refactor: #define magic constants + - net: fec: Fix FEC_ECR_EN1588 being cleared on link-down + - libbpf: Checking the btf_type kind when fixing variable offsets + - xfrm: Fix unregister netdevice hang on hardware offload. + - ipvs: Avoid unnecessary calls to skb_is_gso_sctp + - netfilter: nf_tables: rise cap on SELinux secmark context + - wifi: rtw89: 8852b: fix definition of KIP register number + - wifi: rtl8xxxu: 8188f: Limit TX power index + - xfrm: Export symbol xfrm_dev_state_delete. + - bpftool: Mount bpffs when pinmaps path not under the bpffs + - perf/x86/intel/pt: Fix pt_topa_entry_for_page() address calculation + - perf: Fix perf_aux_size() for greater-than 32-bit size + - perf: Prevent passing zero nr_pages to rb_alloc_aux() + - perf: Fix default aux_watermark calculation + - perf/x86/intel/cstate: Fix Alderlake/Raptorlake/Meteorlake + - wifi: rtw89: Fix array index mistake in rtw89_sta_info_get_iter() + - xfrm: fix netdev reference count imbalance + - xfrm: call xfrm_dev_policy_delete when kill policy + - wifi: virt_wifi: avoid reporting connection success with wrong SSID + - gss_krb5: Fix the error handling path for crypto_sync_skcipher_setkey + - wifi: virt_wifi: don't use strlen() in const context + - locking/rwsem: Add __always_inline annotation to __down_write_common() and + inlined callers + - selftests/bpf: Close fd in error path in drop_on_reuseport + - selftests/bpf: Null checks for links in bpf_tcp_ca + - selftests/bpf: Close obj in error path in xdp_adjust_tail + - selftests/resctrl: Convert perror() to ksft_perror() or ksft_print_msg() + - selftests/resctrl: Fix closing IMC fds on error and open-code R+W instead of + loops + - bpf: annotate BTF show functions with __printf + - bna: adjust 'name' buf size of bna_tcb and bna_ccb structures + - bpf: Eliminate remaining "make W=1" warnings in kernel/bpf/btf.o + - bpf: Fix null pointer dereference in resolve_prog_type() for + BPF_PROG_TYPE_EXT + - selftests: forwarding: devlink_lib: Wait for udev events after reloading + - Bluetooth: hci_bcm4377: Use correct unit for timeouts + - Bluetooth: btintel: Refactor btintel_set_ppag() + - Bluetooth: btnxpuart: Add handling for boot-signature timeout errors + - xdp: fix invalid wait context of page_pool_destroy() + - net: bridge: mst: Check vlan state for egress decision + - drm/rockchip: vop2: Fix the port mux of VP2 + - drm/arm/komeda: Fix komeda probe failing if there are no links in the + secondary pipeline + - drm/amdkfd: Fix CU Masking for GFX 9.4.3 + - drm/mipi-dsi: Fix theoretical int overflow in mipi_dsi_dcs_write_seq() + - drm/mipi-dsi: Fix theoretical int overflow in mipi_dsi_generic_write_seq() + - drm/amd/pm: Fix aldebaran pcie speed reporting + - drm/amdgpu: Fix memory range calculation + - drm/amdgpu: Check if NBIO funcs are NULL in amdgpu_device_baco_exit + - drm/amdgpu: Remove GC HW IP 9.3.0 from noretry=1 + - drm/panel: himax-hx8394: Handle errors from mipi_dsi_dcs_set_display_on() + better + - drm/panel: boe-tv101wum-nl6: If prepare fails, disable GPIO before + regulators + - drm/panel: boe-tv101wum-nl6: Check for errors on the NOP in prepare() + - drm/bridge: Fixed a DP link training bug + - drm/bridge: it6505: fix hibernate to resume no display issue + - media: pci: ivtv: Add check for DMA map result + - media: imon: Fix race getting ictx->lock + - media: i2c: Fix imx412 exposure control + - media: v4l: async: Fix NULL pointer dereference in adding ancillary links + - s390/mm: Convert make_page_secure to use a folio + - s390/mm: Convert gmap_make_secure to use a folio + - s390/uv: Don't call folio_wait_writeback() without a folio reference + - media: mediatek: vcodec: Handle invalid decoder vsi + - x86/shstk: Make return uprobe work with shadow stack + - ipmi: ssif_bmc: prevent integer overflow on 32bit systems + - saa7134: Unchecked i2c_transfer function result fixed + - media: i2c: imx219: fix msr access command sequence + - media: uvcvideo: Disable autosuspend for Insta360 Link + - media: uvcvideo: Quirk for invalid dev_sof in Logitech C922 + - media: uvcvideo: Add quirk for invalid dev_sof in Logitech C920 + - media: uvcvideo: Override default flags + - drm: zynqmp_dpsub: Fix an error handling path in zynqmp_dpsub_probe() + - drm: zynqmp_kms: Fix AUX bus not getting unregistered + - media: rcar-vin: Fix YUYV8_1X16 handling for CSI-2 + - media: rcar-csi2: Disable runtime_pm in probe error + - media: rcar-csi2: Cleanup subdevice in remove() + - media: renesas: vsp1: Fix _irqsave and _irq mix + - media: renesas: vsp1: Store RPF partition configuration per RPF instance + - drm/mediatek: Add missing plane settings when async update + - drm/mediatek: Use 8-bit alpha in ETHDR + - drm/mediatek: Fix XRGB setting error in OVL + - drm/mediatek: Fix XRGB setting error in Mixer + - drm/mediatek: Fix destination alpha error in OVL + - drm/mediatek: Turn off the layers with zero width or height + - drm/mediatek: Add OVL compatible name for MT8195 + - media: imx-jpeg: Drop initial source change event if capture has been setup + - leds: trigger: Unregister sysfs attributes before calling deactivate() + - drm/msm/dsi: set VIDEO_COMPRESSION_MODE_CTRL_WC + - drm/msm/dpu: drop validity checks for clear_pending_flush() ctl op + - perf test: Make test_arm_callgraph_fp.sh more robust + - perf pmus: Fixes always false when compare duplicates aliases + - perf report: Fix condition in sort__sym_cmp() + - drm/etnaviv: fix DMA direction handling for cached RW buffers + - drm/qxl: Add check for drm_cvt_mode + - Revert "leds: led-core: Fix refcount leak in of_led_get()" + - drm/mediatek: Remove less-than-zero comparison of an unsigned value + - ext4: fix infinite loop when replaying fast_commit + - drm/mediatek/dp: switch to ->edid_read callback + - drm/mediatek/dp: Fix spurious kfree() + - media: venus: flush all buffers in output plane streamoff + - perf intel-pt: Fix aux_watermark calculation for 64-bit size + - perf intel-pt: Fix exclude_guest setting + - mfd: rsmu: Split core code into separate module + - mfd: omap-usb-tll: Use struct_size to allocate tll + - xprtrdma: Fix rpcrdma_reqs_reset() + - SUNRPC: avoid soft lockup when transmitting UDP to reachable server. + - NFSv4.1 another fix for EXCHGID4_FLAG_USE_PNFS_DS for DS server + - ext4: don't track ranges in fast_commit if inode has inlined data + - ext4: avoid writing unitialized memory to disk in EA inodes + - leds: flash: leds-qcom-flash: Test the correct variable in init + - sparc64: Fix incorrect function signature and add prototype for + prom_cif_init + - SUNRPC: Fixup gss_status tracepoint error output + - iio: Fix the sorting functionality in iio_gts_build_avail_time_table + - PCI: Fix resource double counting on remove & rescan + - PCI: keystone: Relocate ks_pcie_set/clear_dbi_mode() + - PCI: keystone: Don't enable BAR 0 for AM654x + - PCI: keystone: Fix NULL pointer dereference in case of DT error in + ks_pcie_setup_rc_app_regs() + - PCI: rcar: Demote WARN() to dev_warn_ratelimited() in rcar_pcie_wakeup() + - scsi: ufs: mcq: Fix missing argument 'hba' in MCQ_OPR_OFFSET_n + - clk: qcom: gcc-sc7280: Update force mem core bit for UFS ICE clock + - clk: qcom: camcc-sc7280: Add parent dependency to all camera GDSCs + - iio: frequency: adrf6780: rm clk provider include + - coresight: Fix ref leak when of_coresight_parse_endpoint() fails + - RDMA/mlx5: Set mkeys for dmabuf at PAGE_SIZE + - ASoc: tas2781: Enable RCA-based playback without DSP firmware download + - ASoC: cs35l56: Accept values greater than 0 as IRQ numbers + - usb: typec-mux: nb7vpq904m: unregister typec switch on probe error and + remove + - RDMA/cache: Release GID table even if leak is detected + - clk: qcom: gpucc-sm8350: Park RCG's clk source at XO during disable + - clk: qcom: gcc-sa8775p: Update the GDSC wait_val fields and flags + - clk: qcom: gpucc-sa8775p: Remove the CLK_IS_CRITICAL and ALWAYS_ON flags + - clk: qcom: gpucc-sa8775p: Park RCG's clk source at XO during disable + - clk: qcom: gpucc-sa8775p: Update wait_val fields for GPU GDSC's + - interconnect: qcom: qcm2290: Fix mas_snoc_bimc RPM master ID + - Input: qt1050 - handle CHIP_ID reading error + - RDMA/mlx4: Fix truncated output warning in mad.c + - RDMA/mlx4: Fix truncated output warning in alias_GUID.c + - RDMA/mlx5: Use sq timestamp as QP timestamp when RoCE is disabled + - RDMA/rxe: Don't set BTH_ACK_MASK for UC or UD QPs + - ASoC: qcom: Adjust issues in case of DT error in + asoc_qcom_lpass_cpu_platform_probe() + - scsi: lpfc: Fix a possible null pointer dereference + - hwrng: core - Fix wrong quality calculation at hw rng registration + - powerpc/prom: Add CPU info to hardware description string later + - ASoC: max98088: Check for clk_prepare_enable() error + - mtd: make mtd_test.c a separate module + - RDMA/device: Return error earlier if port in not valid + - Input: elan_i2c - do not leave interrupt disabled on suspend failure + - ASoC: amd: Adjust error handling in case of absent codec device + - PCI: endpoint: Clean up error handling in vpci_scan_bus() + - PCI: endpoint: Fix error handling in epf_ntb_epc_cleanup() + - vhost/vsock: always initialize seqpacket_allow + - net: missing check virtio + - nvmem: rockchip-otp: set add_legacy_fixed_of_cells config option + - crypto: qat - extend scope of lock in adf_cfg_add_key_value_param() + - clk: qcom: kpss-xcc: Return of_clk_add_hw_provider to transfer the error + - clk: qcom: Park shared RCGs upon registration + - clk: en7523: fix rate divider for slic and spi clocks + - MIPS: Octeron: remove source file executable bit + - PCI: qcom-ep: Disable resources unconditionally during PERST# assert + - PCI: dwc: Fix index 0 incorrectly being interpreted as a free ATU slot + - powerpc/xmon: Fix disassembly CPU feature checks + - macintosh/therm_windtunnel: fix module unload. + - RDMA/hns: Check atomic wr length + - RDMA/hns: Fix unmatch exception handling when init eq table fails + - RDMA/hns: Fix missing pagesize and alignment check in FRMR + - RDMA/hns: Fix shift-out-bounds when max_inline_data is 0 + - RDMA/hns: Fix undifined behavior caused by invalid max_sge + - RDMA/hns: Fix insufficient extend DB for VFs. + - iommu/vt-d: Fix identity map bounds in si_domain_init() + - RDMA/core: Remove NULL check before dev_{put, hold} + - RDMA: Fix netdev tracker in ib_device_set_netdev + - bnxt_re: Fix imm_data endianness + - netfilter: ctnetlink: use helper function to calculate expect ID + - netfilter: nf_set_pipapo: fix initial map fill + - ipvs: properly dereference pe in ip_vs_add_service + - gve: Fix XDP TX completion handling when counters overflow + - net: flow_dissector: use DEBUG_NET_WARN_ON_ONCE + - ipv4: Fix incorrect TOS in route get reply + - ipv4: Fix incorrect TOS in fibmatch route get reply + - net: dsa: mv88e6xxx: Limit chip-wide frame size config to CPU ports + - net: dsa: b53: Limit chip-wide jumbo frame config to CPU ports + - fs/ntfs3: Merge synonym COMPRESSION_UNIT and NTFS_LZNT_CUNIT + - fs/ntfs3: Fix transform resident to nonresident for compressed files + - fs/ntfs3: Deny getting attr data block in compressed frame + - fs/ntfs3: Missed NI_FLAG_UPDATE_PARENT setting + - fs/ntfs3: Fix getting file type + - fs/ntfs3: Add missing .dirty_folio in address_space_operations + - pinctrl: rockchip: update rk3308 iomux routes + - pinctrl: core: fix possible memory leak when pinctrl_enable() fails + - pinctrl: single: fix possible memory leak when pinctrl_enable() fails + - pinctrl: ti: ti-iodelay: fix possible memory leak when pinctrl_enable() + fails + - pinctrl: freescale: mxs: Fix refcount of child + - fs/ntfs3: Replace inode_trylock with inode_lock + - fs/ntfs3: Correct undo if ntfs_create_inode failed + - fs/ntfs3: Drop stray '\' (backslash) in formatting string + - fs/ntfs3: Fix field-spanning write in INDEX_HDR + - pinctrl: renesas: r8a779g0: Fix CANFD5 suffix + - pinctrl: renesas: r8a779g0: Fix FXR_TXEN[AB] suffixes + - pinctrl: renesas: r8a779g0: Fix (H)SCIF1 suffixes + - pinctrl: renesas: r8a779g0: Fix (H)SCIF3 suffixes + - pinctrl: renesas: r8a779g0: Fix IRQ suffixes + - pinctrl: renesas: r8a779g0: FIX PWM suffixes + - pinctrl: renesas: r8a779g0: Fix TCLK suffixes + - pinctrl: renesas: r8a779g0: Fix TPU suffixes + - fs/proc/task_mmu: indicate PM_FILE for PMD-mapped file THP + - fs/proc/task_mmu.c: add_to_pagemap: remove useless parameter addr + - fs/proc/task_mmu: don't indicate PM_MMAP_EXCLUSIVE without PM_PRESENT + - fs/proc/task_mmu: properly detect PM_MMAP_EXCLUSIVE per page of PMD-mapped + THPs + - nilfs2: avoid undefined behavior in nilfs_cnt32_ge macro + - rtc: interface: Add RTC offset to alarm after fix-up + - fs/ntfs3: Fix the format of the "nocase" mount option + - fs/ntfs3: Missed error return + - fs/ntfs3: Keep runs for $MFT::$ATTR_DATA and $MFT::$ATTR_BITMAP + - powerpc/8xx: fix size given to set_huge_pte_at() + - s390/dasd: fix error checks in dasd_copy_pair_store() + - sbitmap: use READ_ONCE to access map->word + - sbitmap: fix io hung due to race on sbitmap_word::cleared + - LoongArch: Check TIF_LOAD_WATCH to enable user space watchpoint + - landlock: Don't lose track of restrictions on cred_transfer + - hugetlb: force allocating surplus hugepages on mempolicy allowed nodes + - mm/hugetlb: fix possible recursive locking detected warning + - mm/mglru: fix div-by-zero in vmpressure_calc_level() + - mm: mmap_lock: replace get_memcg_path_buf() with on-stack buffer + - mm/mglru: fix overshooting shrinker memory + - x86/efistub: Avoid returning EFI_SUCCESS on error + - x86/efistub: Revert to heap allocated boot_params for PE entrypoint + - exfat: fix potential deadlock on __exfat_get_dentry_set + - dt-bindings: thermal: correct thermal zone node name limit + - tick/broadcast: Make takeover of broadcast hrtimer reliable + - net: netconsole: Disable target before netpoll cleanup + - af_packet: Handle outgoing VLAN packets without hardware offloading + - btrfs: fix extent map use-after-free when adding pages to compressed bio + - kernel: rerun task_work while freezing in get_signal() + - ipv4: fix source address selection with route leak + - ipv6: take care of scope when choosing the src addr + - NFSD: Support write delegations in LAYOUTGET + - sched/fair: set_load_weight() must also call reweight_task() for SCHED_IDLE + tasks + - fuse: verify {g,u}id mount options correctly + - ata: libata-scsi: Fix offsets for the fixed format sense data + - char: tpm: Fix possible memory leak in tpm_bios_measurements_open() + - media: venus: fix use after free in vdec_close + - ata: libata-scsi: Do not overwrite valid sense data when CK_COND=1 + - hfs: fix to initialize fields of hfs_inode_info after hfs_alloc_inode() + - ext2: Verify bitmap and itable block numbers before using them + - io_uring/io-wq: limit retrying worker initialisation + - drm/gma500: fix null pointer dereference in cdv_intel_lvds_get_modes + - drm/gma500: fix null pointer dereference in psb_intel_lvds_get_modes + - scsi: qla2xxx: Fix optrom version displayed in FDMI + - drm/amd/display: Check for NULL pointer + - apparmor: use kvfree_sensitive to free data->data + - cifs: fix potential null pointer use in destroy_workqueue in init_cifs error + path + - cifs: fix reconnect with SMB1 UNIX Extensions + - cifs: mount with "unix" mount option for SMB1 incorrectly handled + - task_work: s/task_work_cancel()/task_work_cancel_func()/ + - task_work: Introduce task_work_cancel() again + - udf: Avoid using corrupted block bitmap buffer + - m68k: amiga: Turn off Warp1260 interrupts during boot + - ext4: check dot and dotdot of dx_root before making dir indexed + - ext4: make sure the first directory block is not a hole + - io_uring: tighten task exit cancellations + - trace/pid_list: Change gfp flags in pid_list_fill_irq() + - selftests/landlock: Add cred_transfer test + - wifi: mwifiex: Fix interface type change + - wifi: rtw88: usb: Fix disconnection after beacon loss + - drivers: soc: xilinx: check return status of get_api_version() + - leds: ss4200: Convert PCIBIOS_* return codes to errnos + - leds: mt6360: Fix memory leak in mt6360_init_isnk_properties() + - media: imx-pxp: Fix ERR_PTR dereference in pxp_probe() + - jbd2: make jbd2_journal_get_max_txn_bufs() internal + - jbd2: precompute number of transaction descriptor blocks + - jbd2: avoid infinite transaction commit loop + - media: uvcvideo: Fix integer overflow calculating timestamp + - KVM: VMX: Split out the non-virtualization part of vmx_interrupt_blocked() + - KVM: nVMX: Request immediate exit iff pending nested event needs injection + - ALSA: ump: Don't update FB name for static blocks + - ALSA: ump: Force 1 Group for MIDI1 FBs + - ALSA: usb-audio: Fix microphone sound on HD webcam. + - ALSA: usb-audio: Move HD Webcam quirk to the right place + - ALSA: usb-audio: Add a quirk for Sonix HD USB Camera + - tools/memory-model: Fix bug in lock.cat + - hwrng: amd - Convert PCIBIOS_* return codes to errnos + - parisc: Fix warning at drivers/pci/msi/msi.h:121 + - PCI: hv: Return zero, not garbage, when reading PCI_INTERRUPT_PIN + - PCI: dw-rockchip: Fix initial PERST# GPIO value + - PCI: rockchip: Use GPIOD_OUT_LOW flag while requesting ep_gpio + - PCI: loongson: Enable MSI in LS7A Root Complex + - binder: fix hang of unregistered readers + - hostfs: fix dev_t handling + - efi/libstub: Zero initialize heap allocated struct screen_info + - fs/ntfs3: Update log->page_{mask,bits} if log->page_size changed + - scsi: qla2xxx: Return ENOBUFS if sg_cnt is more than one for ELS cmds + - ASoC: fsl: fsl_qmc_audio: Check devm_kasprintf() returned value + - f2fs: fix to force buffered IO on inline_data inode + - f2fs: fix to don't dirty inode for readonly filesystem + - f2fs: fix return value of f2fs_convert_inline_inode() + - f2fs: use meta inode for GC of atomic file + - f2fs: use meta inode for GC of COW file + - clk: davinci: da8xx-cfgchip: Initialize clk_init_data before use + - ubi: eba: properly rollback inside self_check_eba + - block: fix deadlock between sd_remove & sd_release + - mm: fix old/young bit handling in the faulting path + - decompress_bunzip2: fix rare decompression failure + - kbuild: Fix '-S -c' in x86 stack protector scripts + - ASoC: SOF: ipc4-topology: Preserve the DMA Link ID for ChainDMA on unprepare + - ASoC: amd: yc: Support mic on Lenovo Thinkpad E16 Gen 2 + - kobject_uevent: Fix OOB access within zap_modalias_env() + - gve: Fix an edge case for TSO skb validity check + - ice: Add a per-VF limit on number of FDIR filters + - devres: Fix devm_krealloc() wasting memory + - devres: Fix memory leakage caused by driver API devm_free_percpu() + - irqdomain: Fixed unbalanced fwnode get and put + - irqchip/imx-irqsteer: Handle runtime power management correctly + - mm/numa_balancing: teach mpol_to_str about the balancing mode + - rtc: cmos: Fix return value of nvmem callbacks + - scsi: lpfc: Allow DEVICE_RECOVERY mode after RSCN receipt if in PRLI_ISSUE + state + - scsi: qla2xxx: During vport delete send async logout explicitly + - scsi: qla2xxx: Unable to act on RSCN for port online + - scsi: qla2xxx: Fix for possible memory corruption + - scsi: qla2xxx: Use QP lock to search for bsg + - scsi: qla2xxx: Reduce fabric scan duplicate code + - scsi: qla2xxx: Fix flash read failure + - scsi: qla2xxx: Complete command early within lock + - scsi: qla2xxx: validate nvme_local_port correctly + - perf: Fix event leak upon exit + - perf: Fix event leak upon exec and file release + - perf stat: Fix the hard-coded metrics calculation on the hybrid + - perf/x86/intel/uncore: Fix the bits of the CHA extended umask for SPR + - perf/x86/intel/ds: Fix non 0 retire latency on Raptorlake + - perf/x86/intel/pt: Fix topa_entry base length + - perf/x86/intel/pt: Fix a topa_entry base address calculation + - drm/i915/gt: Do not consider preemption during execlists_dequeue for gen8 + - drm/amdgpu/sdma5.2: Update wptr registers as well as doorbell + - drm/udl: Remove DRM_CONNECTOR_POLL_HPD + - drm/dp_mst: Fix all mstb marked as not probed after suspend/resume + - drm/amdgpu: reset vm state machine after gpu reset(vram lost) + - drm/amd/amdgpu: Fix uninitialized variable warnings + - drm/i915/dp: Reset intel_dp->link_trained before retraining the link + - drm/i915/dp: Don't switch the LTTPR mode on an active link + - rtc: isl1208: Fix return value of nvmem callbacks + - rtc: abx80x: Fix return value of nvmem callback on read + - watchdog/perf: properly initialize the turbo mode timestamp and rearm + counter + - platform: mips: cpu_hwmon: Disable driver on unsupported hardware + - RDMA/iwcm: Fix a use-after-free related to destroying CM IDs + - selftests/sigaltstack: Fix ppc64 GCC build + - dm-verity: fix dm_is_verity_target() when dm-verity is builtin + - rbd: don't assume rbd_is_lock_owner() for exclusive mappings + - remoteproc: stm32_rproc: Fix mailbox interrupts queuing + - remoteproc: imx_rproc: Skip over memory region when node value is NULL + - remoteproc: imx_rproc: Fix refcount mistake in imx_rproc_addr_init + - MIPS: dts: loongson: Add ISA node + - MIPS: ip30: ip30-console: Add missing include + - MIPS: dts: loongson: Fix GMAC phy node + - MIPS: Loongson64: env: Hook up Loongsson-2K + - MIPS: Loongson64: Remove memory node for builtin-dtb + - MIPS: Loongson64: reset: Prioritise firmware service + - MIPS: Loongson64: Test register availability before use + - drm/etnaviv: don't block scheduler when GPU is still active + - drm/panfrost: Mark simple_ondemand governor as softdep + - rbd: rename RBD_LOCK_STATE_RELEASING and releasing_wait + - rbd: don't assume RBD_LOCK_STATE_LOCKED for exclusive mappings + - lib/build_OID_registry: don't mention the full path of the script in output + - video: logo: Drop full path of the input filename in generated file + - Bluetooth: btusb: Add RTL8852BE device 0489:e125 to device tables + - Bluetooth: btusb: Add Realtek RTL8852BE support ID 0x13d3:0x3591 + - minmax: scsi: fix mis-use of 'clamp()' in sr.c + - mm/mglru: fix ineffective protection calculation + - PCI/DPC: Fix use-after-free on concurrent DPC and hot-removal + - f2fs: fix to truncate preallocated blocks in f2fs_file_open() + - kdb: address -Wformat-security warnings + - kdb: Use the passed prompt in kdb_position_cursor() + - dmaengine: ti: k3-udma: Fix BCHAN count with UHC and HC channels + - phy: cadence-torrent: Check return value on register read + - phy: zynqmp: Enable reference clock correctly + - um: time-travel: fix time-travel-start option + - um: time-travel: fix signal blocking race/hang + - f2fs: fix start segno of large section + - watchdog: rzg2l_wdt: Use pm_runtime_resume_and_get() + - watchdog: rzg2l_wdt: Check return status of pm_runtime_put() + - f2fs: fix to update user block counts in block_operations() + - kbuild: avoid build error when single DTB is turned into composite DTB + - selftests/bpf: fexit_sleep: Fix stack allocation for arm64 + - libbpf: Fix no-args func prototype BTF dumping syntax + - af_unix: Disable MSG_OOB handling for sockets in sockmap/sockhash + - dma: fix call order in dmam_free_coherent + - bpf, events: Use prog to emit ksymbol event for main program + - tools/resolve_btfids: Fix comparison of distinct pointer types warning in + resolve_btfids + - MIPS: SMP-CPS: Fix address for GCR_ACCESS register for CM3 and later + - ipv4: Fix incorrect source address in Record Route option + - net: bonding: correctly annotate RCU in bond_should_notify_peers() + - ice: Fix recipe read procedure + - netfilter: nft_set_pipapo_avx2: disable softinterrupts + - net: stmmac: Correct byte order of perfect_match + - net: nexthop: Initialize all fields in dumped nexthops + - bpf: Fix a segment issue when downgrading gso_size + - apparmor: Fix null pointer deref when receiving skb during sock creation + - powerpc: fix a file leak in kvm_vcpu_ioctl_enable_cap() + - lirc: rc_dev_get_from_fd(): fix file leak + - auxdisplay: ht16k33: Drop reference after LED registration + - ASoC: SOF: imx8m: Fix DSP control regmap retrieval + - spi: microchip-core: fix the issues in the isr + - spi: microchip-core: defer asserting chip select until just before write to + TX FIFO + - spi: microchip-core: only disable SPI controller when register value change + requires it + - spi: microchip-core: fix init function not setting the master and motorola + modes + - spi: microchip-core: ensure TX and RX FIFOs are empty at start of a transfer + - nvme-pci: Fix the instructions for disabling power management + - ASoC: sof: amd: fix for firmware reload failure in Vangogh platform + - spi: spidev: add correct compatible for Rohm BH2228FV + - ASoC: Intel: use soc_intel_is_byt_cr() only when IOSF_MBI is reachable + - ASoC: TAS2781: Fix tasdev_load_calibrated_data() + - ceph: fix incorrect kmalloc size of pagevec mempool + - s390/pci: Refactor arch_setup_msi_irqs() + - s390/pci: Allow allocation of more than 1 MSI interrupt + - s390/cpum_cf: Fix endless loop in CF_DIAG event stop + - iommu: sprd: Avoid NULL deref in sprd_iommu_hw_en + - io_uring: fix io_match_task must_hold + - nvme-pci: add missing condition check for existence of mapped data + - fs: don't allow non-init s_user_ns for filesystems without FS_USERNS_MOUNT + - md/raid0: don't free conf on raid0_run failure + - md/raid1: don't free conf on raid0_run failure + - io_uring: Fix probe of disabled operations + - cgroup/cpuset: Optimize isolated partition only generate_sched_domains() + calls + - cgroup/cpuset: Fix remote root partition creation problem + - x86/syscall: Mark exit[_group] syscall handlers __noreturn + - perf: arm_pmuv3: Avoid assigning fixed cycle counter with threshold + - md/raid5: recheck if reshape has finished with device_lock held + - hwmon: (ltc2991) re-order conditions to fix off by one bug + - arm64: smp: Fix missing IPI statistics + - arm64: dts: qcom: sc7280: Remove CTS/RTS configuration + - ARM: dts: qcom: msm8226-microsoft-common: Enable smbb explicitly + - OPP: Fix missing cleanup on error in _opp_attach_genpd() + - arm64: dts: qcom: sc8280xp-*: Remove thermal zone polling delays + - arm64: dts: ti: k3-am62-main: Fix the reg-range for main_pktdma + - arm64: dts: ti: k3-am62a-main: Fix the reg-range for main_pktdma + - arm64: dts: ti: k3-am62p-main: Fix the reg-range for main_pktdma + - arm64: dts: ti: k3-am62a7: Drop McASP AFIFOs + - arm64: dts: ti: k3-am62p5: Drop McASP AFIFOs + - arm64: dts: ti: k3-am62p5-sk: Fix pinmux for McASP1 TX + - arm64: dts: qcom: sc7180-trogdor: Disable pwmleds node where unused + - arm64: dts: mediatek: mt8192: Fix GPU thermal zone name for SVS + - arm64: dts: mediatek: mt8183-pico6: Fix wake-on-X event node names + - arm64: dts: renesas: r9a08g045: Add missing hypervisor virtual timer IRQ + - cpufreq/amd-pstate-ut: Convert nominal_freq to khz during comparisons + - wifi: mac80211: cancel multi-link reconf work on disconnect + - wifi: ath11k: refactor setting country code logic + - wifi: ath11k: restore country code during resume + - net: ethernet: cortina: Restore TSO support + - tcp: fix races in tcp_abort() + - hns3: avoid linking objects into multiple modules + - sched/core: Move preempt_model_*() helpers from sched.h to preempt.h + - sched/core: Drop spinlocks on contention iff kernel is preemptible + - net: dsa: ksz_common: Allow only up to two HSR HW offloaded ports for + KSZ9477 + - libbpf: Skip base btf sanity checks + - wifi: mac80211: add ieee80211_tdls_sta_link_id() + - wifi: iwlwifi: fix iwl_mvm_get_valid_rx_ant() + - wifi: ath12k: advertise driver capabilities for MBSSID and EMA + - riscv, bpf: Fix out-of-bounds issue when preparing trampoline image + - perf/x86/amd/uncore: Avoid PMU registration if counters are unavailable + - perf/x86/amd/uncore: Fix DF and UMC domain identification + - NFSD: Fix nfsdcld warning + - net: page_pool: fix warning code + - bpf, arm64: Fix trampoline for BPF_TRAMP_F_CALL_ORIG + - Bluetooth: hci_event: Set QoS encryption from BIGInfo report + - Bluetooth: hci_core, hci_sync: cleanup struct discovery_state + - Bluetooth: Fix usage of __hci_cmd_sync_status + - tcp: Don't access uninit tcp_rsk(req)->ao_keyid in + tcp_create_openreq_child(). + - drm/panel: ilitek-ili9882t: If prepare fails, disable GPIO before regulators + - drm/panel: ilitek-ili9882t: Check for errors on the NOP in prepare() + - drm/amd/display: Move 'struct scaler_data' off stack + - media: i2c: hi846: Fix V4L2_SUBDEV_FORMAT_TRY get_selection() + - drm/msm/dpu: fix encoder irq wait skip + - drm/msm/dpu: drop duplicate drm formats from wb2_formats arrays + - drm/msm/dp: fix runtime_pm handling in dp_wait_hpd_asserted + - perf maps: Switch from rbtree to lazily sorted array for addresses + - perf maps: Fix use after free in __maps__fixup_overlap_and_insert + - drm/bridge: samsung-dsim: Set P divider based on min/max of fin pll + - drm/i915/psr: Print Panel Replay status instead of frame lock status + - drm/mediatek: Set DRM mode configs accordingly + - drm/msm/dsi: set video mode widebus enable bit when widebus is enabled + - tools/perf: Fix the string match for "/tmp/perf-$PID.map" files in dso__load + - drm/amd/display: Add null check before access structs + - nfs: pass explicit offset/count to trace events + - PCI: endpoint: pci-epf-test: Make use of cached 'epc_features' in + pci_epf_test_core_init() + - PCI: tegra194: Set EP alignment restriction for inbound ATU + - riscv: smp: fail booting up smp if inconsistent vlen is detected + - clk: meson: s4: fix fixed_pll_dco clock + - clk: meson: s4: fix pwm_j_div parent clock + - usb: typec-mux: ptn36502: unregister typec switch on probe error and remove + - mtd: spi-nor: winbond: fix w25q128 regression + - iommufd/selftest: Fix dirty bitmap tests with u8 bitmaps + - iommufd/selftest: Fix iommufd_test_dirty() to handle Sat, 09 Nov 2024 18:54:16 +0300 + +linux (6.8.0-49.49) noble; urgency=medium + + * noble/linux: 6.8.0-49.49 -proposed tracker (LP: #2085942) + + * CVE-2024-46800 + - sch/netem: fix use after free in netem_dequeue + + * mm/folios: xfs hangs with hung task timeouts with corrupted folio pointer + lists (LP: #2085495) + - lib/xarray: introduce a new helper xas_get_order + - mm/filemap: return early if failed to allocate memory for split + - mm/filemap: optimize filemap folio adding + + * CVE-2024-43882 + - exec: Fix ToCToU between perm check and set-uid/gid usage + + -- Manuel Diewald Fri, 01 Nov 2024 11:56:32 +0100 + +linux (6.8.0-48.48) noble; urgency=medium + + * noble/linux: 6.8.0-48.48 -proposed tracker (LP: #2082437) + + * [SRU][Noble] Bad EPP defaults cause performance regressions on select Intel + CPUs (LP: #2077470) + - x86/cpu/vfm: Update arch/x86/include/asm/intel-family.h + - cpufreq: intel_pstate: Allow model specific EPPs + - cpufreq: intel_pstate: Update default EPPs for Meteor Lake + - cpufreq: intel_pstate: Switch to new Intel CPU model defines + - cpufreq: intel_pstate: Update Meteor Lake EPPs + - cpufreq: intel_pstate: Use Meteor Lake EPPs for Arrow Lake + - cpufreq: intel_pstate: Update Balance performance EPP for Emerald Rapids + + * power: Enable intel_rapl driver (LP: #2078834) + - powercap: intel_rapl: Add support for ArrowLake-H platform + + * x86/vmware: Add TDX hypercall support (LP: #2077729) + - x86/vmware: Introduce VMware hypercall API + - x86/vmware: Add TDX hypercall support + + * Guest crashes post migration with migrate_misplaced_folio+0x4cc/0x5d0 + (LP: #2076866) + - mm/mempolicy: use numa_node_id() instead of cpu_to_node() + - mm/numa_balancing: allow migrate on protnone reference with + MPOL_PREFERRED_MANY policy + - mm: convert folio_estimated_sharers() to folio_likely_mapped_shared() + - mm: factor out the numa mapping rebuilding into a new helper + - mm: support multi-size THP numa balancing + - mm/migrate: make migrate_misplaced_folio() return 0 on success + - mm/migrate: move NUMA hinting fault folio isolation + checks under PTL + - mm: fix possible OOB in numa_rebuild_large_mapping() + + * Add 'mm: hold PTL from the first PTE while reclaiming a large folio' to fix + L2 Guest hang during LTP Test (LP: #2076147) + - mm: hold PTL from the first PTE while reclaiming a large folio + + * KOP L2 guest fails to boot with 1 core - SMT8 topology (LP: #2070329) + - KVM: PPC: Book3S HV nestedv2: Add DPDES support in helper library for Guest + state buffer + - KVM: PPC: Book3S HV nestedv2: Fix doorbell emulation + + * L2 Guest migration: continuously dumping while running NFS guest migration + (LP: #2076406) + - KVM: PPC: Book3S HV: Fix the set_one_reg for MMCR3 + - KVM: PPC: Book3S HV: Fix the get_one_reg of SDAR + - KVM: PPC: Book3S HV: Add one-reg interface for DEXCR register + - KVM: PPC: Book3S HV nestedv2: Keep nested guest DEXCR in sync + - KVM: PPC: Book3S HV: Add one-reg interface for HASHKEYR register + - KVM: PPC: Book3S HV nestedv2: Keep nested guest HASHKEYR in sync + - KVM: PPC: Book3S HV: Add one-reg interface for HASHPKEYR register + - KVM: PPC: Book3S HV nestedv2: Keep nested guest HASHPKEYR in sync + + * perf build disables tracepoint support (LP: #2076190) + - [Packaging] perf: reenable libtraceevent + + * Please backport the more restrictive XSAVES deactivation for Zen1/2 arch + (LP: #2077321) + - x86/CPU/AMD: Improve the erratum 1386 workaround + + * Fix alsa scarlett2 driver in 6.8 (LP: #2076402) + - ALSA: scarlett2: Move initialisation code lower in the source + - ALSA: scarlett2: Implement handling of the ACK notification + + * rtw89: reset IDMEM mode to prevent download firmware failure (LP: #2077396) + - wifi: rtw89: 885xb: reset IDMEM mode to prevent download firmware failure + + * CVE-2024-43858 + - jfs: Fix array-index-out-of-bounds in diFree + + * CVE-2024-42280 + - mISDN: Fix a use after free in hfcmulti_tx() + + * CVE-2024-42271 + - net/iucv: fix use after free in iucv_sock_close() + + * [Ubuntu-24.04] FADump with recommended crash size is making the L1 hang + (LP: #2060039) + - powerpc/64s/radix/kfence: map __kfence_pool at page granularity + + * Noble update: upstream stable patchset 2024-09-09 (LP: #2079945) + - ocfs2: add bounds checking to ocfs2_check_dir_entry() + - jfs: don't walk off the end of ealist + - fs/ntfs3: Add a check for attr_names and oatbl + - fs/ntfs3: Validate ff offset + - usb: gadget: midi2: Fix incorrect default MIDI2 protocol setup + - ALSA: hda/realtek: Enable headset mic on Positivo SU C1400 + - ALSA: hda/realtek: Fix the speaker output on Samsung Galaxy Book Pro 360 + - arm64: dts: qcom: qrb4210-rb2: switch I2C2 to i2c-gpio + - arm64: dts: qcom: msm8996: Disable SS instance in Parkmode for USB + - arm64: dts: qcom: sm6350: Disable SS instance in Parkmode for USB + - arm64: dts: qcom: ipq6018: Disable SS instance in Parkmode for USB + - arm64: dts: qcom: sdm630: Disable SS instance in Parkmode for USB + - ALSA: pcm_dmaengine: Don't synchronize DMA channel when DMA is paused + - ALSA: seq: ump: Skip useless ports for static blocks + - filelock: Fix fcntl/close race recovery compat path + - tun: add missing verification for short frame + - tap: add missing verification for short frame + - s390/mm: Fix VM_FAULT_HWPOISON handling in do_exception() + - ALSA: hda/tas2781: Add new quirk for Lenovo Hera2 Laptop + - arm64: dts: qcom: sc7180: Disable SuperSpeed instances in park mode + - arm64: dts: qcom: sc7280: Disable SuperSpeed instances in park mode + - arm64: dts: qcom: qrb2210-rb1: switch I2C2 to i2c-gpio + - arm64: dts: qcom: msm8998: Disable SS instance in Parkmode for USB + - arm64: dts: qcom: ipq8074: Disable SS instance in Parkmode for USB + - arm64: dts: qcom: sdm845: Disable SS instance in Parkmode for USB + - Upstream stable to v6.6.43, v6.9.12 + + * Noble update: upstream stable patchset 2024-09-02 (LP: #2078304) + - filelock: Remove locks reliably when fcntl/close race is detected + - scsi: core: alua: I/O errors for ALUA state transitions + - scsi: sr: Fix unintentional arithmetic wraparound + - scsi: qedf: Don't process stag work during unload and recovery + - scsi: qedf: Wait for stag work during unload + - scsi: qedf: Set qed_slowpath_params to zero before use + - efi/libstub: zboot.lds: Discard .discard sections + - ACPI: EC: Abort address space access upon error + - ACPI: EC: Avoid returning AE_OK on errors in address space handler + - tools/power/cpupower: Fix Pstate frequency reporting on AMD Family 1Ah CPUs + - wifi: mac80211: mesh: init nonpeer_pm to active by default in mesh sdata + - wifi: mac80211: apply mcast rate only if interface is up + - wifi: mac80211: handle tasklet frames before stopping + - wifi: cfg80211: fix 6 GHz scan request building + - wifi: iwlwifi: mvm: d3: fix WoWLAN command version lookup + - wifi: iwlwifi: mvm: remove stale STA link data during restart + - wifi: iwlwifi: mvm: Handle BIGTK cipher in kek_kck cmd + - wifi: iwlwifi: mvm: handle BA session teardown in RF-kill + - wifi: iwlwifi: mvm: properly set 6 GHz channel direct probe option + - wifi: iwlwifi: mvm: Fix scan abort handling with HW rfkill + - wifi: mac80211: fix UBSAN noise in ieee80211_prep_hw_scan() + - selftests: cachestat: Fix build warnings on ppc64 + - selftests/openat2: Fix build warnings on ppc64 + - selftests/futex: pass _GNU_SOURCE without a value to the compiler + - of/irq: Factor out parsing of interrupt-map parent phandle+args from + of_irq_parse_raw() + - Input: silead - Always support 10 fingers + - net: ipv6: rpl_iptunnel: block BH in rpl_output() and rpl_input() + - ila: block BH in ila_output() + - arm64: armv8_deprecated: Fix warning in isndep cpuhp starting process + - null_blk: fix validation of block size + - kconfig: gconf: give a proper initial state to the Save button + - kconfig: remove wrong expr_trans_bool() + - input: Add event code for accessibility key + - input: Add support for "Do Not Disturb" + - HID: Ignore battery for ELAN touchscreens 2F2C and 4116 + - NFSv4: Fix memory leak in nfs4_set_security_label + - nfs: propagate readlink errors in nfs_symlink_filler + - nfs: Avoid flushing many pages with NFS_FILE_SYNC + - nfs: don't invalidate dentries on transient errors + - cachefiles: add consistency check for copen/cread + - cachefiles: Set object to close if ondemand_id < 0 in copen + - cachefiles: make on-demand read killable + - fs/file: fix the check in find_next_fd() + - mei: demote client disconnect warning on suspend to debug + - iomap: Fix iomap_adjust_read_range for plen calculation + - drm/exynos: dp: drop driver owner initialization + - drm: panel-orientation-quirks: Add quirk for Aya Neo KUN + - drm/mediatek: Call drm_atomic_helper_shutdown() at shutdown time + - nvme: avoid double free special payload + - nvmet: always initialize cqe.result + - ALSA: hda: cs35l56: Fix lifecycle of codec pointer + - wifi: cfg80211: wext: add extra SIOCSIWSCAN data check + - ALSA: hda/realtek: Support Lenovo Thinkbook 16P Gen 5 + - KVM: PPC: Book3S HV: Prevent UAF in kvm_spapr_tce_attach_iommu_group() + - drm/vmwgfx: Fix missing HYPERVISOR_GUEST dependency + - ALSA: hda/realtek: Add more codec ID to no shutup pins list + - spi: Fix OCTAL mode support + - cpumask: limit FORCE_NR_CPUS to just the UP case + - [Config] Remove FORCE_NR_CPUS + - selftests: openvswitch: Set value to nla flags. + - drm/amdgpu: Indicate CU havest info to CP + - ALSA: hda: cs35l56: Select SERIAL_MULTI_INSTANTIATE + - mips: fix compat_sys_lseek syscall + - Input: elantech - fix touchpad state on resume for Lenovo N24 + - Input: i8042 - add Ayaneo Kun to i8042 quirk table + - ASoC: rt722-sdca-sdw: add silence detection register as volatile + - Input: xpad - add support for ASUS ROG RAIKIRI PRO + - ASoC: topology: Fix references to freed memory + - ASoC: topology: Do not assign fields that are already set + - bytcr_rt5640 : inverse jack detect for Archos 101 cesium + - ALSA: dmaengine: Synchronize dma channel after drop() + - ASoC: ti: davinci-mcasp: Set min period size using FIFO config + - ASoC: ti: omap-hdmi: Fix too long driver name + - ASoC: SOF: sof-audio: Skip unprepare for in-use widgets on error rollback + - ASoC: rt722-sdca-sdw: add debounce time for type detection + - nvme: fix NVME_NS_DEAC may incorrectly identifying the disk as EXT_LBA. + - Input: ads7846 - use spi_device_id table + - can: kvaser_usb: fix return value for hif_usb_send_regout + - gpio: pca953x: fix pca953x_irq_bus_sync_unlock race + - octeontx2-pf: Fix coverity and klockwork issues in octeon PF driver + - s390/sclp: Fix sclp_init() cleanup on failure + - platform/mellanox: nvsw-sn2201: Add check for platform_device_add_resources + - platform/x86: wireless-hotkey: Add support for LG Airplane Button + - platform/x86: lg-laptop: Remove LGEX0815 hotkey handling + - platform/x86: lg-laptop: Change ACPI device id + - platform/x86: lg-laptop: Use ACPI device handle when evaluating WMAB/WMBB + - btrfs: qgroup: fix quota root leak after quota disable failure + - ibmvnic: Add tx check to prevent skb leak + - ALSA: PCM: Allow resume only for suspended streams + - ALSA: hda/relatek: Enable Mute LED on HP Laptop 15-gw0xxx + - ALSA: dmaengine_pcm: terminate dmaengine before synchronize + - ASoC: amd: yc: Fix non-functional mic on ASUS M5602RA + - net: usb: qmi_wwan: add Telit FN912 compositions + - net: mac802154: Fix racy device stats updates by DEV_STATS_INC() and + DEV_STATS_ADD() + - powerpc/pseries: Whitelist dtl slub object for copying to userspace + - powerpc/eeh: avoid possible crash when edev->pdev changes + - scsi: libsas: Fix exp-attached device scan after probe failure scanned in + again after probe failed + - tee: optee: ffa: Fix missing-field-initializers warning + - Bluetooth: hci_core: cancel all works upon hci_unregister_dev() + - Bluetooth: btnxpuart: Enable Power Save feature on startup + - bluetooth/l2cap: sync sock recv cb and release + - erofs: ensure m_llen is reset to 0 if metadata is invalid + - drm/amd/display: Add refresh rate range check + - drm/amd/display: Account for cursor prefetch BW in DML1 mode support + - drm/amd/display: Fix refresh rate range for some panel + - drm/radeon: check bo_va->bo is non-NULL before using it + - fs: better handle deep ancestor chains in is_subdir() + - wifi: iwlwifi: properly set WIPHY_FLAG_SUPPORTS_EXT_KEK_KCK + - drivers/perf: riscv: Reset the counter to hpmevent mapping while starting + cpus + - riscv: stacktrace: fix usage of ftrace_graph_ret_addr() + - spi: imx: Don't expect DMA for i.MX{25,35,50,51,53} cspi devices + - ksmbd: return FILE_DEVICE_DISK instead of super magic + - ASoC: SOF: Intel: hda-pcm: Limit the maximum number of periods by + MAX_BDL_ENTRIES + - selftest/timerns: fix clang build failures for abs() calls + - selftests/vDSO: fix clang build errors and warnings + - hfsplus: fix uninit-value in copy_name + - selftests/bpf: Extend tcx tests to cover late tcx_entry release + - spi: mux: set ctlr->bits_per_word_mask + - ALSA: hda: Use imply for suggesting CONFIG_SERIAL_MULTI_INSTANTIATE + - [Config] Update CONFIG_SERIAL_MULTI_INSTANTIATE + - cifs: fix noisy message on copy_file_range + - Bluetooth: L2CAP: Fix deadlock + - of/irq: Disable "interrupt-map" parsing for PASEMI Nemo + - wifi: cfg80211: wext: set ssids=NULL for passive scans + - wifi: mac80211: disable softirqs for queued frame handling + - wifi: iwlwifi: mvm: don't wake up rx_sync_waitq upon RFKILL + - cachefiles: fix slab-use-after-free in fscache_withdraw_volume() + - cachefiles: fix slab-use-after-free in cachefiles_withdraw_cookie() + - btrfs: ensure fast fsync waits for ordered extents after a write failure + - PNP: Hide pnp_bus_type from the non-PNP code + - ACPI: AC: Properly notify powermanagement core about changes + - selftests/overlayfs: Fix build error on ppc64 + - nvme-fabrics: use reserved tag for reg read/write command + - LoongArch: Fix GMAC's phy-mode definitions in dts + - io_uring: fix possible deadlock in io_register_iowq_max_workers() + - vfio: Create vfio_fs_type with inode per device + - vfio/pci: Use unmap_mapping_range() + - parport: amiga: Mark driver struct with __refdata to prevent section + mismatch + - drm: renesas: shmobile: Call drm_atomic_helper_shutdown() at shutdown time + - vfio/pci: Insert full vma on mmap'd MMIO fault + - ALSA: hda: cs35l41: Support Lenovo Thinkbook 16P Gen 5 + - ALSA: hda: cs35l41: Support Lenovo Thinkbook 13x Gen 4 + - ALSA: hda/realtek: Support Lenovo Thinkbook 13x Gen 4 + - wifi: mac80211: Avoid address calculations via out of bounds array indexing + - drm/amd/display: change dram_clock_latency to 34us for dcn35 + - closures: Change BUG_ON() to WARN_ON() + - ASoC: codecs: ES8326: Solve headphone detection issue + - ASoC: Intel: avs: Fix route override + - net: mvpp2: fill-in dev_port attribute + - btrfs: scrub: handle RST lookup error correctly + - clk: qcom: apss-ipq-pll: remove 'config_ctl_hi_val' from Stromer pll configs + - drm/amd/display: Update efficiency bandwidth for dcn351 + - drm/amd/display: Fix array-index-out-of-bounds in dml2/FCLKChangeSupport + - btrfs: fix uninitialized return value in the ref-verify tool + - spi: davinci: Unset POWERDOWN bit when releasing resources + - mm: page_ref: remove folio_try_get_rcu() + - ALSA: hda: cs35l41: Fix swapped l/r audio channels for Lenovo ThinBook 13x + Gen4 + - netfs, fscache: export fscache_put_volume() and add fscache_try_get_volume() + - Upstream stable to v6.6.42, v6.9.11 + + * CVE-2024-27022 + - Revert "Revert "fork: defer linking file vma until vma is fully + initialized"" + + * UBSAN: array-index-out-of-bounds in /build/linux-Z1RxaK/linux- + 6.8.0/drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/processpptables.c:124 + 9:61 (LP: #2078041) + - drm/amdgpu/pptable: convert some variable sized arrays to [] style + - drm/amdgpu: convert some variable sized arrays to [] style + - drm/amdgpu/pptable: Fix UBSAN array-index-out-of-bounds + + * alsa: Headphone and Speaker couldn't output sound intermittently + (LP: #2077690) + - ALSA: hda/realtek - Fixed ALC256 headphone no sound + - ALSA: hda/realtek - FIxed ALC285 headphone no sound + + * Fix ethernet performance on JSL and EHL (LP: #2077858) + - intel_idle: Disable promotion to C1E on Jasper Lake and Elkhart Lake + + * Noble update: upstream stable patchset 2024-08-29 (LP: #2078289) + - Revert "usb: xhci: prevent potential failure in handle_tx_event() for + Transfer events without TRB" + - Compiler Attributes: Add __uninitialized macro + - mm: prevent derefencing NULL ptr in pfn_section_valid() + - scsi: ufs: core: Fix ufshcd_clear_cmd racing issue + - scsi: ufs: core: Fix ufshcd_abort_one racing issue + - vfio/pci: Init the count variable in collecting hot-reset devices + - cachefiles: propagate errors from vfs_getxattr() to avoid infinite loop + - cachefiles: stop sending new request when dropping object + - cachefiles: cancel all requests for the object that is being dropped + - cachefiles: wait for ondemand_object_worker to finish when dropping object + - cachefiles: cyclic allocation of msg_id to avoid reuse + - cachefiles: add missing lock protection when polling + - dsa: lan9303: Fix mapping between DSA port number and PHY address + - filelock: fix potential use-after-free in posix_lock_inode + - fs/dcache: Re-use value stored to dentry->d_flags instead of re-reading + - vfs: don't mod negative dentry count when on shrinker list + - net: bcmasp: Fix error code in probe() + - tcp: fix incorrect undo caused by DSACK of TLP retransmit + - bpf: Fix too early release of tcx_entry + - net: phy: microchip: lan87xx: reinit PHY after cable test + - skmsg: Skip zero length skb in sk_msg_recvmsg + - octeontx2-af: Fix incorrect value output on error path in + rvu_check_rsrc_availability() + - net: fix rc7's __skb_datagram_iter() + - i40e: Fix XDP program unloading while removing the driver + - net: ethernet: lantiq_etop: fix double free in detach + - bpf: fix order of args in call to bpf_map_kvcalloc + - bpf: make timer data struct more generic + - bpf: replace bpf_timer_init with a generic helper + - bpf: Fail bpf_timer_cancel when callback is being cancelled + - net: ethernet: mtk-star-emac: set mac_managed_pm when probing + - ppp: reject claimed-as-LCP but actually malformed packets + - ethtool: netlink: do not return SQI value if link is down + - udp: Set SOCK_RCU_FREE earlier in udp_lib_get_port(). + - net, sunrpc: Remap EPERM in case of connection failure in + xs_tcp_setup_socket + - s390: Mark psw in __load_psw_mask() as __unitialized + - arm64: dts: qcom: sc8180x: Fix LLCC reg property again + - firmware: cs_dsp: Fix overflow checking of wmfw header + - firmware: cs_dsp: Return error if block header overflows file + - firmware: cs_dsp: Validate payload length before processing block + - firmware: cs_dsp: Prevent buffer overrun when processing V2 alg headers + - ASoC: SOF: Intel: hda: fix null deref on system suspend entry + - firmware: cs_dsp: Use strnlen() on name fields in V1 wmfw files + - ARM: davinci: Convert comma to semicolon + - octeontx2-af: replace cpt slot with lf id on reg write + - octeontx2-af: fix a issue with cpt_lf_alloc mailbox + - octeontx2-af: fix detection of IP layer + - octeontx2-af: fix issue with IPv6 ext match for RSS + - octeontx2-af: fix issue with IPv4 match for RSS + - cifs: fix setting SecurityFlags to true + - Revert "sched/fair: Make sure to try to detach at least one movable task" + - tcp: avoid too many retransmit packets + - net: ks8851: Fix deadlock with the SPI chip variant + - net: ks8851: Fix potential TX stall after interface reopen + - USB: serial: option: add Telit generic core-dump composition + - USB: serial: option: add Telit FN912 rmnet compositions + - USB: serial: option: add Fibocom FM350-GL + - USB: serial: option: add support for Foxconn T99W651 + - USB: serial: option: add Netprisma LCUK54 series modules + - USB: serial: option: add Rolling RW350-GL variants + - USB: serial: mos7840: fix crash on resume + - USB: Add USB_QUIRK_NO_SET_INTF quirk for START BP-850k + - usb: dwc3: pci: add support for the Intel Panther Lake + - usb: gadget: configfs: Prevent OOB read/write in usb_string_copy() + - USB: core: Fix duplicate endpoint bug by clearing reserved bits in the + descriptor + - misc: microchip: pci1xxxx: Fix return value of nvmem callbacks + - hpet: Support 32-bit userspace + - xhci: always resume roothubs if xHC was reset during resume + - s390/mm: Add NULL pointer check to crst_table_free() base_crst_free() + - mm: vmalloc: check if a hash-index is in cpu_possible_mask + - mm/filemap: skip to create PMD-sized page cache if needed + - mm/filemap: make MAX_PAGECACHE_ORDER acceptable to xarray + - ksmbd: discard write access to the directory open + - iio: trigger: Fix condition for own trigger + - arm64: dts: qcom: sa8775p: Correct IRQ number of EL2 non-secure physical + timer + - arm64: dts: qcom: sc8280xp-x13s: fix touchscreen power on + - nvmem: rmem: Fix return value of rmem_read() + - nvmem: meson-efuse: Fix return value of nvmem callbacks + - nvmem: core: only change name to fram for current attribute + - platform/x86: toshiba_acpi: Fix array out-of-bounds access + - tty: serial: ma35d1: Add a NULL check for of_node + - ALSA: hda/realtek: add quirk for Clevo V5[46]0TU + - ALSA: hda/realtek: Enable Mute LED on HP 250 G7 + - ALSA: hda/realtek: Limit mic boost on VAIO PRO PX + - Fix userfaultfd_api to return EINVAL as expected + - pmdomain: qcom: rpmhpd: Skip retention level for Power Domains + - libceph: fix race between delayed_work() and ceph_monc_stop() + - ACPI: processor_idle: Fix invalid comparison with insertion sort for latency + - cpufreq: ACPI: Mark boost policy as enabled when setting boost + - cpufreq: Allow drivers to advertise boost enabled + - wireguard: selftests: use acpi=off instead of -no-acpi for recent QEMU + - wireguard: allowedips: avoid unaligned 64-bit memory accesses + - wireguard: queueing: annotate intentional data race in cpu round robin + - wireguard: send: annotate intentional data race in checking empty queue + - misc: fastrpc: Fix DSP capabilities request + - misc: fastrpc: Avoid updating PD type for capability request + - misc: fastrpc: Copy the complete capability structure to user + - misc: fastrpc: Fix memory leak in audio daemon attach operation + - misc: fastrpc: Fix ownership reassignment of remote heap + - misc: fastrpc: Restrict untrusted app to attach to privileged PD + - mm/shmem: disable PMD-sized page cache if needed + - mm/damon/core: merge regions aggressively when max_nr_regions is unmet + - selftests/net: fix gro.c compilation failure due to non-existent + opt_ipproto_off + - ext4: avoid ptr null pointer dereference + - sched: Move psi_account_irqtime() out of update_rq_clock_task() hotpath + - i2c: rcar: bring hardware to known state when probing + - i2c: mark HostNotify target address as used + - i2c: rcar: ensure Gen3+ reset does not disturb local targets + - i2c: testunit: avoid re-issued work after read message + - i2c: rcar: clear NO_RXDMA flag after resetting + - x86/bhi: Avoid warning in #DB handler due to BHI mitigation + - kbuild: Make ld-version.sh more robust against version string changes + - spi: axi-spi-engine: fix sleep calculation + - minixfs: Fix minixfs_rename with HIGHMEM + - bpf: Defer work in bpf_timer_cancel_and_free + - netfilter: nf_tables: prefer nft_chain_validate + - arm64: dts: qcom: x1e80100-*: Allocate some CMA buffers + - arm64: dts: qcom: sm6115: add iommu for sdhc_1 + - arm64: dts: qcom: qdu1000: Fix LLCC reg property + - net: ethtool: Fix RSS setting + - nilfs2: fix kernel bug on rename operation of broken directory + - cachestat: do not flush stats in recency check + - mm: fix crashes from deferred split racing folio migration + - nvmem: core: limit cell sysfs permissions to main attribute ones + - serial: imx: ensure RTS signal is not left active after shutdown + - mmc: sdhci: Fix max_seg_size for 64KiB PAGE_SIZE + - mmc: davinci_mmc: Prevent transmitted data size from exceeding sgm's length + - mm/readahead: limit page cache size in page_cache_ra_order() + - Revert "dt-bindings: cache: qcom,llcc: correct QDU1000 reg entries" + - sched/deadline: Fix task_struct reference leak + - Upstream stable to v6.6.40, v6.6.41, v6.9.10 + + * [SRU][HPE 24.04] Intel FVL NIC FW flash fails with inbox driver, causing + driver not detected (LP: #2076675) // Noble update: upstream stable patchset + 2024-08-29 (LP: #2078289) + - i40e: fix: remove needless retries of NVM update + + * CVE-2024-41022 + - drm/amdgpu: Fix signedness bug in sdma_v4_0_process_trap_irq() + + * Deadlock occurs while suspending md raid (LP: #2073695) + - md: change the return value type of md_write_start to void + - md: fix deadlock between mddev_suspend and flush bio + + * Lenovo X12 Detachable Gen 2 unresponsive under light load (LP: #2076361) + - drm/i915: Enable Wa_16019325821 + - drm/i915/guc: Add support for w/a KLVs + - drm/i915/guc: Enable Wa_14019159160 + + * Regression: unable to reach low idle states on Tiger Lake (LP: #2072679) + - SAUCE: PCI: ASPM: Allow OS to configure ASPM where BIOS is incapable of + - SAUCE: PCI: vmd: Let OS control ASPM for devices under VMD domain + + * Noble update: upstream stable patchset 2024-08-22 (LP: #2077600) + - locking/mutex: Introduce devm_mutex_init() + - leds: an30259a: Use devm_mutex_init() for mutex initialization + - crypto: hisilicon/debugfs - Fix debugfs uninit process issue + - drm/lima: fix shared irq handling on driver remove + - powerpc: Avoid nmi_enter/nmi_exit in real mode interrupt. + - media: dvb: as102-fe: Fix as10x_register_addr packing + - media: dvb-usb: dib0700_devices: Add missing release_firmware() + - IB/core: Implement a limit on UMAD receive List + - scsi: qedf: Make qedf_execute_tmf() non-preemptible + - selftests/bpf: adjust dummy_st_ops_success to detect additional error + - selftests/bpf: do not pass NULL for non-nullable params in dummy_st_ops + - selftests/bpf: dummy_st_ops should reject 0 for non-nullable params + - RISC-V: KVM: Fix the initial sample period value + - crypto: aead,cipher - zeroize key buffer after use + - media: mediatek: vcodec: Only free buffer VA that is not NULL + - drm/amdgpu: Fix uninitialized variable warnings + - drm/amdgpu: Initialize timestamp for some legacy SOCs + - drm/amd/display: Check index msg_id before read or write + - drm/amd/display: Check pipe offset before setting vblank + - drm/amd/display: Skip finding free audio for unknown engine_id + - drm/amd/display: Fix uninitialized variables in DM + - drm/amdgpu: fix uninitialized scalar variable warning + - drm/amdgpu: fix the warning about the expression (int)size - len + - media: dw2102: Don't translate i2c read into write + - riscv: Apply SiFive CIP-1200 workaround to single-ASID sfence.vma + - sctp: prefer struct_size over open coded arithmetic + - firmware: dmi: Stop decoding on broken entry + - Input: ff-core - prefer struct_size over open coded arithmetic + - wifi: mt76: replace skb_put with skb_put_zero + - wifi: mt76: mt7996: add sanity checks for background radar trigger + - thermal/drivers/mediatek/lvts_thermal: Check NULL ptr on lvts_data + - media: dvb-frontends: tda18271c2dd: Remove casting during div + - media: s2255: Use refcount_t instead of atomic_t for num_channels + - media: dvb-frontends: tda10048: Fix integer overflow + - i2c: i801: Annotate apanel_addr as __ro_after_init + - powerpc/64: Set _IO_BASE to POISON_POINTER_DELTA not 0 for CONFIG_PCI=n + - orangefs: fix out-of-bounds fsid access + - kunit: Fix timeout message + - powerpc/xmon: Check cpu id in commands "c#", "dp#" and "dx#" + - selftests/net: fix uninitialized variables + - igc: fix a log entry using uninitialized netdev + - bpf: Avoid uninitialized value in BPF_CORE_READ_BITFIELD + - serial: imx: Raise TX trigger level to 8 + - jffs2: Fix potential illegal address access in jffs2_free_inode + - s390/pkey: Wipe sensitive data on failure + - btrfs: scrub: initialize ret in scrub_simple_mirror() to fix compilation + warning + - cdrom: rearrange last_media_change check to avoid unintentional overflow + - tools/power turbostat: Remember global max_die_id + - vhost: Use virtqueue mutex for swapping worker + - vhost: Release worker mutex during flushes + - vhost_task: Handle SIGKILL by flushing work and exiting + - mac802154: fix time calculation in ieee802154_configure_durations() + - net: phy: phy_device: Fix PHY LED blinking code comment + - UPSTREAM: tcp: fix DSACK undo in fast recovery to call tcp_try_to_open() + - net/mlx5: E-switch, Create ingress ACL when needed + - net/mlx5e: Add mqprio_rl cleanup and free in mlx5e_priv_cleanup() + - Bluetooth: hci_event: Fix setting of unicast qos interval + - Bluetooth: Ignore too large handle values in BIG + - Bluetooth: ISO: Check socket flag instead of hcon + - bluetooth/hci: disallow setting handle bigger than HCI_CONN_HANDLE_MAX + - KVM: s390: fix LPSWEY handling + - e1000e: Fix S0ix residency on corporate systems + - gpiolib: of: fix lookup quirk for MIPS Lantiq + - net: allow skb_datagram_iter to be called from any context + - net: txgbe: initialize num_q_vectors for MSI/INTx interrupts + - net: ntb_netdev: Move ntb_netdev_rx_handler() to call netif_rx() from + __netif_rx() + - gpio: mmio: do not calculate bgpio_bits via "ngpios" + - wifi: wilc1000: fix ies_len type in connect path + - riscv: kexec: Avoid deadlock in kexec crash path + - netfilter: nf_tables: unconditionally flush pending work before notifier + - bonding: Fix out-of-bounds read in bond_option_arp_ip_targets_set() + - selftests: fix OOM in msg_zerocopy selftest + - selftests: make order checking verbose in msg_zerocopy selftest + - inet_diag: Initialize pad field in struct inet_diag_req_v2 + - mlxsw: core_linecards: Fix double memory deallocation in case of invalid INI + file + - gpiolib: of: add polarity quirk for TSC2005 + - cpu: Fix broken cmdline "nosmp" and "maxcpus=0" + - platform/x86: toshiba_acpi: Fix quickstart quirk handling + - Revert "igc: fix a log entry using uninitialized netdev" + - nilfs2: fix inode number range checks + - nilfs2: add missing check for inode numbers on directory entries + - mm: optimize the redundant loop of mm_update_owner_next() + - mm: avoid overflows in dirty throttling logic + - btrfs: fix adding block group to a reclaim list and the unused list during + reclaim + - scsi: mpi3mr: Use proper format specifier in mpi3mr_sas_port_add() + - Bluetooth: hci_bcm4377: Fix msgid release + - Bluetooth: qca: Fix BT enable failure again for QCA6390 after warm reboot + - can: kvaser_usb: Explicitly initialize family in leafimx driver_info struct + - fsnotify: Do not generate events for O_PATH file descriptors + - Revert "mm/writeback: fix possible divide-by-zero in wb_dirty_limits(), + again" + - drm/nouveau: fix null pointer dereference in nouveau_connector_get_modes + - drm/amdgpu/atomfirmware: silence UBSAN warning + - drm: panel-orientation-quirks: Add quirk for Valve Galileo + - clk: qcom: gcc-ipq9574: Add BRANCH_HALT_VOTED flag + - clk: sunxi-ng: common: Don't call hw_to_ccu_common on hw without common + - powerpc/pseries: Fix scv instruction crash with kexec + - powerpc/64s: Fix unnecessary copy to 0 when kernel is booted at address 0 + - mtd: rawnand: Ensure ECC configuration is propagated to upper layers + - mtd: rawnand: Fix the nand_read_data_op() early check + - mtd: rawnand: Bypass a couple of sanity checks during NAND identification + - mtd: rawnand: rockchip: ensure NVDDR timings are rejected + - net: stmmac: dwmac-qcom-ethqos: fix error array size + - arm64: dts: rockchip: Fix the DCDC_REG2 minimum voltage on Quartz64 Model B + - media: dw2102: fix a potential buffer overflow + - clk: qcom: gcc-sm6350: Fix gpll6* & gpll7 parents + - clk: qcom: clk-alpha-pll: set ALPHA_EN bit for Stromer Plus PLLs + - clk: mediatek: mt8183: Only enable runtime PM on mt8183-mfgcfg + - i2c: pnx: Fix potential deadlock warning from del_timer_sync() call in isr + - fs/ntfs3: Mark volume as dirty if xattr is broken + - ALSA: hda/realtek: Enable headset mic of JP-IK LEAP W502 with ALC897 + - vhost-scsi: Handle vhost_vq_work_queue failures for events + - nvme-multipath: find NUMA path only for online numa-node + - dma-mapping: benchmark: avoid needless copy_to_user if benchmark fails + - connector: Fix invalid conversion in cn_proc.h + - nvme: adjust multiples of NVME_CTRL_PAGE_SIZE in offset + - regmap-i2c: Subtract reg size from max_write + - platform/x86: touchscreen_dmi: Add info for GlobalSpace SolT IVW 11.6" + tablet + - platform/x86: touchscreen_dmi: Add info for the EZpad 6s Pro + - nvmet: fix a possible leak when destroy a ctrl during qp establishment + - kbuild: fix short log for AS in link-vmlinux.sh + - nfc/nci: Add the inconsistency check between the input data length and count + - spi: cadence: Ensure data lines set to low during dummy-cycle period + - ALSA: ump: Set default protocol when not given explicitly + - drm/amdgpu: silence UBSAN warning + - null_blk: Do not allow runt zone with zone capacity smaller then zone size + - nilfs2: fix incorrect inode allocation from reserved inodes + - leds: mlxreg: Use devm_mutex_init() for mutex initialization + - net: dql: Avoid calling BUG() when WARN() is enough + - drm/xe: Add outer runtime_pm protection to xe_live_ktest@xe_dma_buf + - bpf: mark bpf_dummy_struct_ops.test_1 parameter as nullable + - drm/amdgpu: fix double free err_addr pointer warnings + - drm/amd/display: Fix overlapping copy within dml_core_mode_programming + - drm/amd/display: update pipe topology log to support subvp + - drm/amd/display: Do not return negative stream id for array + - drm/amd/display: ASSERT when failing to find index by plane/stream id + - usb: xhci: prevent potential failure in handle_tx_event() for Transfer + events without TRB + - media: i2c: st-mipid02: Use the correct div function + - media: tc358746: Use the correct div_ function + - crypto: hisilicon/sec2 - fix for register offset + - s390/pkey: Use kfree_sensitive() to fix Coccinelle warnings + - s390/pkey: Wipe copies of clear-key structures on failure + - s390/pkey: Wipe copies of protected- and secure-keys + - wifi: cfg80211: restrict NL80211_ATTR_TXQ_QUANTUM values + - wifi: mac80211: fix BSS_CHANGED_UNSOL_BCAST_PROBE_RESP + - net: txgbe: remove separate irq request for MSI and INTx + - net: txgbe: add extra handle for MSI/INTx into thread irq handle + - net: txgbe: free isb resources at the right time + - btrfs: always do the basic checks for btrfs_qgroup_inherit structure + - net: phy: aquantia: add missing include guards + - drm/fbdev-generic: Fix framebuffer on big endian devices + - net: stmmac: enable HW-accelerated VLAN stripping for gmac4 only + - net: rswitch: Avoid use-after-free in rswitch_poll() + - ice: use proper macro for testing bit + - drm/xe/mcr: Avoid clobbering DSS steering + - tcp: Don't flag tcp_sk(sk)->rx_opt.saw_unknown for TCP AO. + - btrfs: zoned: fix calc_available_free_space() for zoned mode + - btrfs: fix folio refcount in __alloc_dummy_extent_buffer() + - Bluetooth: Add quirk to ignore reserved PHY bits in LE Extended Adv Report + - drm/xe: fix error handling in xe_migrate_update_pgtables + - drm/ttm: Always take the bo delayed cleanup path for imported bos + - fs: don't misleadingly warn during thaw operations + - drm/amdkfd: Let VRAM allocations go to GTT domain on small APUs + - drm/amdgpu: correct hbm field in boot status + - Upstream stable to v6.6.38, v6.6.39, v6.9.9 + + * Panels show garbage or flickering when i915.psr2 enabled (LP: #2069993) + - SAUCE: drm/i915/display/psr: add a psr2 disable quirk table + - SAUCE: drm/i915/display/psr: disable psr2 for panel_0x4d_0x10_0x93_0x15 + - SAUCE: drm/i915/display/psr: disable psr2 for panel_0x30_0xe4_0x8b_0x07 + - SAUCE: drm/i915/display/psr: disable psr2 for panel_0x30_0xe4_0x78_0x07 + - SAUCE: drm/i915/display/psr: disable psr2 for panel_0x30_0xe4_0x8c_0x07 + - SAUCE: drm/i915/display/psr: disable psr2 for panel_0x06_0xaf_0x9a_0xf9 + - SAUCE: drm/i915/display/psr: disable psr2 for panel_0x4d_0x10_0x8f_0x15 + - SAUCE: drm/i915/display/psr: disable psr2 for panel_0x06_0xaf_0xa3_0xc3 + + * Random flickering with Intel i915 (Gen9 GPUs in 6th-8th gen CPUs) on Linux + 6.8 (LP: #2062951) + - SAUCE: iommu/intel: disable DMAR for SKL integrated gfx + + * [SRU][22.04.5]: mpi3mr driver update (LP: #2073583) + - scsi: mpi3mr: HDB allocation and posting for hardware and firmware buffers + - scsi: mpi3mr: Trigger support + - scsi: mpi3mr: Add ioctl support for HDB + - scsi: mpi3mr: Support PCI Error Recovery callback handlers + - scsi: mpi3mr: Prevent PCI writes from driver during PCI error recovery + - scsi: mpi3mr: Driver version update + + * Fix power consumption while using HW accelerated video decode on AMD + platforms (LP: #2073282) + - drm/amdgpu/vcn: identify unified queue in sw init + - drm/amdgpu/vcn: not pause dpg for unified queue + + * Noble update: upstream stable patchset 2024-08-09 (LP: #2076435) + - usb: typec: ucsi: Never send a lone connector change ack + - usb: typec: ucsi: Ack also failed Get Error commands + - Input: ili210x - fix ili251x_read_touch_data() return value + - pinctrl: fix deadlock in create_pinctrl() when handling -EPROBE_DEFER + - pinctrl: rockchip: fix pinmux bits for RK3328 GPIO2-B pins + - pinctrl: rockchip: fix pinmux bits for RK3328 GPIO3-B pins + - pinctrl: rockchip: use dedicated pinctrl type for RK3328 + - pinctrl: rockchip: fix pinmux reset in rockchip_pmx_set + - MIPS: pci: lantiq: restore reset gpio polarity + - ASoC: rockchip: i2s-tdm: Fix trcm mode by setting clock on right mclk + - ASoC: mediatek: mt8183-da7219-max98357: Fix kcontrol name collision + - ASoC: atmel: atmel-classd: Re-add dai_link->platform to fix card init + - workqueue: Increase worker desc's length to 32 + - ASoC: q6apm-lpass-dai: close graph on prepare errors + - bpf: Add missed var_off setting in set_sext32_default_val() + - bpf: Add missed var_off setting in coerce_subreg_to_size_sx() + - s390/pci: Add missing virt_to_phys() for directed DIBV + - ASoC: amd: acp: add a null check for chip_pdev structure + - ASoC: amd: acp: remove i2s configuration check in acp_i2s_probe() + - ASoC: fsl-asoc-card: set priv->pdev before using it + - net: dsa: microchip: fix initial port flush problem + - openvswitch: get related ct labels from its master if it is not confirmed + - mlxsw: spectrum_buffers: Fix memory corruptions on Spectrum-4 systems + - ibmvnic: Free any outstanding tx skbs during scrq reset + - net: phy: micrel: add Microchip KSZ 9477 to the device table + - net: dsa: microchip: use collision based back pressure mode + - ice: Rebuild TC queues on VSI queue reconfiguration + - xdp: Remove WARN() from __xdp_reg_mem_model() + - netfilter: fix undefined reference to 'netfilter_lwtunnel_*' when + CONFIG_SYSCTL=n + - btrfs: use NOFS context when getting inodes during logging and log replay + - Fix race for duplicate reqsk on identical SYN + - ALSA: seq: Fix missing channel at encoding RPN/NRPN MIDI2 messages + - net: dsa: microchip: fix wrong register write when masking interrupt + - sparc: fix old compat_sys_select() + - sparc: fix compat recv/recvfrom syscalls + - parisc: use correct compat recv/recvfrom syscalls + - powerpc: restore some missing spu syscalls + - tcp: fix tcp_rcv_fastopen_synack() to enter TCP_CA_Loss for failed TFO + - ALSA: seq: Fix missing MSB in MIDI2 SPP conversion + - netfilter: nf_tables: fully validate NFT_DATA_VALUE on store to data + registers + - net: mana: Fix possible double free in error handling path + - drm/panel: ilitek-ili9881c: Fix warning with GPIO controllers that sleep + - vduse: validate block features only with block devices + - vduse: Temporarily fail if control queue feature requested + - x86/fpu: Fix AMD X86_BUG_FXSAVE_LEAK fixup + - mtd: partitions: redboot: Added conversion of operands to a larger type + - wifi: ieee80211: check for NULL in ieee80211_mle_size_ok() + - bpf: Mark bpf prog stack with kmsan_unposion_memory in interpreter mode + - RDMA/restrack: Fix potential invalid address access + - net/iucv: Avoid explicit cpumask var allocation on stack + - net/dpaa2: Avoid explicit cpumask var allocation on stack + - crypto: ecdh - explicitly zeroize private_key + - ALSA: emux: improve patch ioctl data validation + - media: dvbdev: Initialize sbuf + - irqchip/loongson: Select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP for + IRQ_LOONGARCH_CPU + - soc: ti: wkup_m3_ipc: Send NULL dummy message instead of pointer message + - gfs2: Fix NULL pointer dereference in gfs2_log_flush + - drm/radeon/radeon_display: Decrease the size of allocated memory + - nvme: fixup comment for nvme RDMA Provider Type + - drm/panel: simple: Add missing display timing flags for KOE TX26D202VM0BWA + - gpio: davinci: Validate the obtained number of IRQs + - RISC-V: fix vector insn load/store width mask + - drm/amdgpu: Fix pci state save during mode-1 reset + - riscv: stacktrace: convert arch_stack_walk() to noinstr + - gpiolib: cdev: Disallow reconfiguration without direction (uAPI v1) + - randomize_kstack: Remove non-functional per-arch entropy filtering + - x86: stop playing stack games in profile_pc() + - parisc: use generic sys_fanotify_mark implementation + - Revert "MIPS: pci: lantiq: restore reset gpio polarity" + - pinctrl: qcom: spmi-gpio: drop broken pm8008 support + - ocfs2: fix DIO failure due to insufficient transaction credits + - nfs: drop the incorrect assertion in nfs_swap_rw() + - mm: fix incorrect vbq reference in purge_fragmented_block + - mmc: sdhci-pci-o2micro: Convert PCIBIOS_* return codes to errnos + - mmc: sdhci-brcmstb: check R1_STATUS for erase/trim/discard + - mmc: sdhci-pci: Convert PCIBIOS_* return codes to errnos + - mmc: sdhci: Do not invert write-protect twice + - mmc: sdhci: Do not lock spinlock around mmc_gpio_get_ro() + - iio: xilinx-ams: Don't include ams_ctrl_channels in scan_mask + - counter: ti-eqep: enable clock at probe + - kbuild: doc: Update default INSTALL_MOD_DIR from extra to updates + - kbuild: Fix build target deb-pkg: ln: failed to create hard link + - i2c: testunit: don't erase registers after STOP + - i2c: testunit: discard write requests while old command is running + - ata: libata-core: Fix null pointer dereference on error + - ata,scsi: libata-core: Do not leak memory for ata_port struct members + - iio: adc: ad7266: Fix variable checking bug + - iio: accel: fxls8962af: select IIO_BUFFER & IIO_KFIFO_BUF + - iio: chemical: bme680: Fix pressure value output + - iio: chemical: bme680: Fix calibration data variable + - iio: chemical: bme680: Fix overflows in compensate() functions + - iio: chemical: bme680: Fix sensor data read operation + - net: usb: ax88179_178a: improve link status logs + - usb: gadget: printer: SS+ support + - usb: gadget: printer: fix races against disable + - usb: musb: da8xx: fix a resource leak in probe() + - usb: atm: cxacru: fix endpoint checking in cxacru_bind() + - usb: dwc3: core: remove lock of otg mode during gadget suspend/resume to + avoid deadlock + - usb: gadget: aspeed_udc: fix device address configuration + - usb: typec: ucsi: glink: fix child node release in probe function + - usb: ucsi: stm32: fix command completion handling + - usb: dwc3: core: Add DWC31 version 2.00a controller + - usb: dwc3: core: Workaround for CSR read timeout + - Revert "serial: core: only stop transmit when HW fifo is empty" + - serial: 8250_omap: Implementation of Errata i2310 + - serial: imx: set receiver level before starting uart + - serial: core: introduce uart_port_tx_limited_flags() + - serial: bcm63xx-uart: fix tx after conversion to uart_port_tx_limited() + - tty: mcf: MCF54418 has 10 UARTS + - net: can: j1939: Initialize unused data in j1939_send_one() + - net: can: j1939: recover socket queue on CAN bus error during BAM + transmission + - net: can: j1939: enhanced error handling for tightly received RTS messages + in xtp_rx_rts_session_new + - PCI/MSI: Fix UAF in msi_capability_init + - cpufreq: intel_pstate: Use HWP to initialize ITMT if CPPC is missing + - irqchip/loongson-eiointc: Use early_cpu_to_node() instead of cpu_to_node() + - cpu/hotplug: Fix dynstate assignment in __cpuhp_setup_state_cpuslocked() + - irqchip/loongson-liointc: Set different ISRs for different cores + - kbuild: Install dtb files as 0644 in Makefile.dtbinst + - sh: rework sync_file_range ABI + - btrfs: zoned: fix initial free space detection + - csky, hexagon: fix broken sys_sync_file_range + - hexagon: fix fadvise64_64 calling conventions + - drm/drm_file: Fix pid refcounting race + - drm/nouveau/dispnv04: fix null pointer dereference in nv17_tv_get_ld_modes + - drm/fbdev-dma: Only set smem_start is enable per module option + - drm/amdgpu: avoid using null object of framebuffer + - drm/i915/gt: Fix potential UAF by revoke of fence registers + - drm/nouveau/dispnv04: fix null pointer dereference in nv17_tv_get_hd_modes + - drm/amd/display: Send DP_TOTAL_LTTPR_CNT during detection if LTTPR is + present + - drm/amdgpu/atomfirmware: fix parsing of vram_info + - batman-adv: Don't accept TT entries for out-of-spec VIDs + - can: mcp251xfd: fix infinite loop when xmit fails + - ata: ahci: Clean up sysfs file on error + - ata: libata-core: Fix double free on error + - ftruncate: pass a signed offset + - syscalls: fix compat_sys_io_pgetevents_time64 usage + - syscalls: fix sys_fanotify_mark prototype + - Revert "cpufreq: amd-pstate: Fix the inconsistency in max frequency units" + - mm/page_alloc: Separate THP PCP into movable and non-movable categories + - arm64: dts: rockchip: Fix SD NAND and eMMC init on rk3308-rock-pi-s + - arm64: dts: rockchip: Rename LED related pinctrl nodes on rk3308-rock-pi-s + - arm64: dts: rockchip: Fix the value of `dlg,jack-det-rate` mismatch on + rk3399-gru + - ARM: dts: rockchip: rk3066a: add #sound-dai-cells to hdmi node + - arm64: dts: rockchip: make poweroff(8) work on Radxa ROCK 5A + - arm64: dts: rockchip: fix PMIC interrupt pin on ROCK Pi E + - arm64: dts: rockchip: Add sound-dai-cells for RK3368 + - cxl/region: Move cxl_dpa_to_region() work to the region driver + - cxl/region: Avoid null pointer dereference in region lookup + - cxl/region: check interleave capability + - serial: imx: only set receiver level if it is zero + - serial: 8250_omap: Fix Errata i2310 with RX FIFO level check + - tracing/net_sched: NULL pointer dereference in perf_trace_qdisc_reset() + - pwm: stm32: Improve precision of calculation in .apply() + - pwm: stm32: Fix for settings using period > UINT32_MAX + - pwm: stm32: Calculate prescaler with a division instead of a loop + - pwm: stm32: Refuse too small period requests + - ASoC: cs42l43: Increase default type detect time and button delay + - ASoC: amd: acp: move chip->flag variable assignment + - bonding: fix incorrect software timestamping report + - mlxsw: pci: Fix driver initialization with Spectrum-4 + - vxlan: Pull inner IP header in vxlan_xmit_one(). + - ASoC: mediatek: mt8195: Add platform entry for ETDM1_OUT_BE dai link + - af_unix: Stop recv(MSG_PEEK) at consumed OOB skb. + - af_unix: Don't stop recv(MSG_DONTWAIT) if consumed OOB skb is at the head. + - af_unix: Don't stop recv() at consumed ex-OOB skb. + - af_unix: Fix wrong ioctl(SIOCATMARK) when consumed OOB skb is at the head. + - bpf: Take return from set_memory_ro() into account with bpf_prog_lock_ro() + - bpf: Take return from set_memory_rox() into account with + bpf_jit_binary_lock_ro() + - drm/xe: Fix potential integer overflow in page size calculation + - drm/xe: Add a NULL check in xe_ttm_stolen_mgr_init + - drm/amd/display: correct hostvm flag + - drm/amd/display: Skip pipe if the pipe idx not set properly + - bpf: Add a check for struct bpf_fib_lookup size + - drm/xe/xe_devcoredump: Check NULL before assignments + - iommu/arm-smmu-v3: Do not allow a SVA domain to be set on the wrong PASID + - evm: Enforce signatures on unsupported filesystem for EVM_INIT_X509 + - drm/xe: Check pat.ops before dumping PAT settings + - nvmet: do not return 'reserved' for empty TSAS values + - nvmet: make 'tsas' attribute idempotent for RDMA + - iommu/amd: Fix GT feature enablement again + - gpiolib: cdev: Ignore reconfiguration without direction + - kasan: fix bad call to unpoison_slab_object + - mm/memory: don't require head page for do_set_pmd() + - SUNRPC: Fix backchannel reply, again + - Revert "usb: gadget: u_ether: Re-attach netif device to mirror detachment" + - Revert "usb: gadget: u_ether: Replace netif_stop_queue with + netif_device_detach" + - tty: serial: 8250: Fix port count mismatch with the device + - tty: mxser: Remove __counted_by from mxser_board.ports[] + - nvmet-fc: Remove __counted_by from nvmet_fc_tgt_queue.fod[] + - ata: libata-core: Add ATA_HORKAGE_NOLPM for all Crucial BX SSD1 models + - bcachefs: Fix sb_field_downgrade validation + - bcachefs: Fix sb-downgrade validation + - bcachefs: Fix bch2_sb_downgrade_update() + - bcachefs: Fix setting of downgrade recovery passes/errors + - bcachefs: btree_gc can now handle unknown btrees + - pwm: stm32: Fix calculation of prescaler + - pwm: stm32: Fix error message to not describe the previous error path + - cxl/region: Convert cxl_pmem_region_alloc to scope-based resource management + - cxl/mem: Fix no cxl_nvd during pmem region auto-assembling + - arm64: dts: rockchip: Fix the i2c address of es8316 on Cool Pi 4B + - netfs: Fix netfs_page_mkwrite() to check folio->mapping is valid + - netfs: Fix netfs_page_mkwrite() to flush conflicting data, not wait + - Upstream stable to v6.6.37, v6.9.8 + + * [UBUNTU 22.04] s390/cpum_cf: make crypto counters upward compatible + (LP: #2074380) + - s390/cpum_cf: make crypto counters upward compatible across machine types + + * CVE-2024-45016 + - netem: fix return value if duplicate enqueue fails + + -- Stefan Bader Fri, 27 Sep 2024 14:22:35 +0200 + +linux (6.8.0-45.45) noble; urgency=medium + + * noble/linux: 6.8.0-45.45 -proposed tracker (LP: #2078100) + + * Packaging resync (LP: #1786013) + - [Packaging] debian.master/dkms-versions -- update from kernel-versions + (main/s2024.08.05) + + * Noble update: upstream stable patchset 2024-08-09 (LP: #2076435) // + CVE-2024-41009 + - bpf: Fix overrunning reservations in ringbuf + + * CVE-2024-42160 + - f2fs: check validation of fault attrs in f2fs_build_fault_attr() + - f2fs: Add inline to f2fs_build_fault_attr() stub + + * Noble update: upstream stable patchset 2024-08-22 (LP: #2077600) // + CVE-2024-42224 + - net: dsa: mv88e6xxx: Correct check for empty list + + * Noble update: upstream stable patchset 2024-08-22 (LP: #2077600) // + CVE-2024-42154 + - tcp_metrics: validate source addr length + + * CVE-2024-42228 + - drm/amdgpu: Using uninitialized value *size when calling amdgpu_vce_cs_reloc + + * CVE-2024-42159 + - scsi: mpi3mr: Sanitise num_phys + + -- Manuel Diewald Fri, 30 Aug 2024 10:32:37 +0200 + +linux (6.8.0-44.44) noble; urgency=medium + + * noble/linux: 6.8.0-44.44 -proposed tracker (LP: #2076647) + + * Packaging resync (LP: #1786013) + - [Packaging] debian.master/dkms-versions -- update from kernel-versions + (main/2024.08.05) + + * Disable PCI_DYNAMIC_OF_NODES in Ubuntu (LP: #2074376) + - [Config] Disable PCI_DYNAMIC_OF_NODES + + * [SRU] Turbostat support for Arrow Lake H (LP: #2074372) + - tools/power turbostat: Enhance ARL/LNL support + - x86/cpu: Add model number for another Intel Arrow Lake mobile processor + - tools/power turbostat: Add ARL-H support + + * Noble update: upstream stable patchset 2024-07-30 (LP: #2075154) + - fs/writeback: bail out if there is no more inodes for IO and queued once + - padata: Disable BH when taking works lock on MT path + - crypto: hisilicon/sec - Fix memory leak for sec resource release + - crypto: hisilicon/qm - Add the err memory release process to qm uninit + - io_uring/sqpoll: work around a potential audit memory leak + - rcutorture: Fix rcu_torture_one_read() pipe_count overflow comment + - rcutorture: Make stall-tasks directly exit when rcutorture tests end + - rcutorture: Fix invalid context warning when enable srcu barrier testing + - block/ioctl: prefer different overflow check + - ssb: Fix potential NULL pointer dereference in ssb_device_uevent() + - selftests/bpf: Prevent client connect before server bind in + test_tc_tunnel.sh + - selftests/bpf: Fix flaky test btf_map_in_map/lookup_update + - batman-adv: bypass empty buckets in batadv_purge_orig_ref() + - wifi: ath9k: work around memset overflow warning + - af_packet: avoid a false positive warning in packet_setsockopt() + - ACPI: x86: Add PNP_UART1_SKIP quirk for Lenovo Blade2 tablets + - drop_monitor: replace spin_lock by raw_spin_lock + - scsi: qedi: Fix crash while reading debugfs attribute + - net: sfp: add quirk for ATS SFP-GE-T 1000Base-TX module + - net/sched: fix false lockdep warning on qdisc root lock + - kselftest: arm64: Add a null pointer check + - net: dsa: realtek: keep default LED state in rtl8366rb + - netpoll: Fix race condition in netpoll_owner_active + - wifi: mt76: mt7921s: fix potential hung tasks during chip recovery + - HID: Add quirk for Logitech Casa touchpad + - HID: asus: fix more n-key report descriptors if n-key quirked + - ACPI: video: Add backlight=native quirk for Lenovo Slim 7 16ARH7 + - Bluetooth: ath3k: Fix multiple issues reported by checkpatch.pl + - drm/amd/display: Exit idle optimizations before HDCP execution + - platform/x86: toshiba_acpi: Add quirk for buttons on Z830 + - ASoC: Intel: sof_sdw: add JD2 quirk for HP Omen 14 + - ASoC: Intel: sof_sdw: add quirk for Dell SKU 0C0F + - drm/lima: add mask irq callback to gp and pp + - drm/lima: mask irqs in timeout path before hard reset + - ALSA: hda/realtek: Add quirks for Lenovo 13X + - powerpc/pseries: Enforce hcall result buffer validity and size + - media: intel/ipu6: Fix build with !ACPI + - media: mtk-vcodec: potential null pointer deference in SCP + - powerpc/io: Avoid clang null pointer arithmetic warnings + - platform/x86: p2sb: Don't init until unassigned resources have been assigned + - power: supply: cros_usbpd: provide ID table for avoiding fallback match + - iommu/arm-smmu-v3: Free MSIs in case of ENOMEM + - ext4: fix uninitialized ratelimit_state->lock access in __ext4_fill_super() + - kprobe/ftrace: bail out if ftrace was killed + - usb: gadget: uvc: configfs: ensure guid to be valid before set + - f2fs: remove clear SB_INLINECRYPT flag in default_options + - usb: misc: uss720: check for incompatible versions of the Belkin F5U002 + - Avoid hw_desc array overrun in dw-axi-dmac + - usb: dwc3: pci: Don't set "linux,phy_charger_detect" property on Lenovo Yoga + Tab2 1380 + - usb: typec: ucsi_glink: drop special handling for CCI_BUSY + - udf: udftime: prevent overflow in udf_disk_stamp_to_time() + - PCI/PM: Avoid D3cold for HP Pavilion 17 PC/1972 PCIe Ports + - f2fs: don't set RO when shutting down f2fs + - MIPS: Octeon: Add PCIe link status check + - serial: imx: Introduce timeout when waiting on transmitter empty + - serial: exar: adding missing CTI and Exar PCI ids + - usb: gadget: function: Remove usage of the deprecated ida_simple_xx() API + - tty: add the option to have a tty reject a new ldisc + - vfio/pci: Collect hot-reset devices to local buffer + - cpufreq: amd-pstate: fix memory leak on CPU EPP exit + - ACPI: EC: Install address space handler at the namespace root + - PCI: Do not wait for disconnected devices when resuming + - ALSA: hda: cs35l41: Possible null pointer dereference in + cs35l41_hda_unbind() + - ALSA: seq: ump: Fix missing System Reset message handling + - MIPS: Routerboard 532: Fix vendor retry check code + - mips: bmips: BCM6358: make sure CBR is correctly set + - tracing: Build event generation tests only as modules + - ALSA: hda/realtek: Remove Framework Laptop 16 from quirks + - ALSA/hda: intel-dsp-config: Document AVS as dsp_driver option + - ice: avoid IRQ collision to fix init failure on ACPI S3 resume + - btrfs: zoned: allocate dummy checksums for zoned NODATASUM writes + - net: mvpp2: use slab_build_skb for oversized frames + - cipso: fix total option length computation + - ALSA: hda: cs35l56: Component should be unbound before deconstruction + - ALSA: hda: tas2781: Component should be unbound before deconstruction + - bpf: Avoid splat in pskb_pull_reason + - ALSA: hda/realtek: Enable headset mic on IdeaPad 330-17IKB 81DM + - netrom: Fix a memory leak in nr_heartbeat_expiry() + - ipv6: prevent possible NULL deref in fib6_nh_init() + - ipv6: prevent possible NULL dereference in rt6_probe() + - xfrm6: check ip6_dst_idev() return value in xfrm6_get_saddr() + - netns: Make get_net_ns() handle zero refcount net + - qca_spi: Make interrupt remembering atomic + - net: lan743x: disable WOL upon resume to restore full data path operation + - net: lan743x: Support WOL at both the PHY and MAC appropriately + - net: phy: mxl-gpy: Remove interrupt mask clearing from config_init + - net/sched: act_api: fix possible infinite loop in tcf_idr_check_alloc() + - tipc: force a dst refcount before doing decryption + - sched: act_ct: add netns into the key of tcf_ct_flow_table + - ptp: fix integer overflow in max_vclocks_store + - selftests: openvswitch: Use bash as interpreter + - net: stmmac: No need to calculate speed divider when offload is disabled + - virtio_net: checksum offloading handling fix + - virtio_net: fixing XDP for fully checksummed packets handling + - octeontx2-pf: Add error handling to VLAN unoffload handling + - octeontx2-pf: Fix linking objects into multiple modules + - netfilter: ipset: Fix suspicious rcu_dereference_protected() + - seg6: fix parameter passing when calling NF_HOOK() in End.DX4 and End.DX6 + behaviors + - netfilter: move the sysctl nf_hooks_lwtunnel into the netfilter core + - ice: Fix VSI list rule with ICE_SW_LKUP_LAST type + - bnxt_en: Restore PTP tx_avail count in case of skb_pad() error + - net: usb: rtl8150 fix unintiatilzed variables in rtl8150_get_link_ksettings + - RDMA/bnxt_re: Fix the max msix vectors macro + - spi: cs42l43: Correct SPI root clock speed + - RDMA/rxe: Fix responder length checking for UD request packets + - regulator: core: Fix modpost error "regulator_get_regmap" undefined + - dmaengine: idxd: Fix possible Use-After-Free in irq_process_work_list + - dmaengine: ioatdma: Fix leaking on version mismatch + - dmaengine: ioatdma: Fix error path in ioat3_dma_probe() + - dmaengine: ioatdma: Fix kmemleak in ioat_pci_probe() + - dmaengine: fsl-edma: avoid linking both modules + - dmaengine: ioatdma: Fix missing kmem_cache_destroy() + - regulator: bd71815: fix ramp values + - thermal/drivers/mediatek/lvts_thermal: Return error in case of invalid efuse + data + - arm64: dts: imx8mp: Fix TC9595 input clock on DH i.MX8M Plus DHCOM SoM + - arm64: dts: freescale: imx8mp-venice-gw73xx-2x: fix BT shutdown GPIO + - arm64: dts: imx93-11x11-evk: Remove the 'no-sdio' property + - arm64: dts: freescale: imx8mm-verdin: enable hysteresis on slow input pin + - ACPICA: Revert "ACPICA: avoid Info: mapping multiple BARs. Your kernel is + fine." + - spi: spi-imx: imx51: revert burst length calculation back to bits_per_word + - io_uring/rsrc: fix incorrect assignment of iter->nr_segs in io_import_fixed + - firmware: psci: Fix return value from psci_system_suspend() + - RDMA/mlx5: Fix unwind flow as part of mlx5_ib_stage_init_init + - RDMA/mlx5: Add check for srq max_sge attribute + - RDMA/mana_ib: Ignore optional access flags for MRs + - ACPI: EC: Evaluate orphan _REG under EC device + - arm64: defconfig: enable the vf610 gpio driver + - ext4: avoid overflow when setting values via sysfs + - ext4: fix slab-out-of-bounds in ext4_mb_find_good_group_avg_frag_lists() + - net: stmmac: Assign configured channel value to EXTTS event + - net: usb: ax88179_178a: improve reset check + - net: do not leave a dangling sk pointer, when socket creation fails + - btrfs: retry block group reclaim without infinite loop + - scsi: ufs: core: Free memory allocated for model before reinit + - cifs: fix typo in module parameter enable_gcm_256 + - LoongArch: Fix watchpoint setting error + - LoongArch: Trigger user-space watchpoints correctly + - LoongArch: Fix multiple hardware watchpoint issues + - KVM: Fix a data race on last_boosted_vcpu in kvm_vcpu_on_spin() + - KVM: arm64: Disassociate vcpus from redistributor region on teardown + - KVM: x86: Always sync PIR to IRR prior to scanning I/O APIC routes + - RDMA/rxe: Fix data copy for IB_SEND_INLINE + - RDMA/mlx5: Remove extra unlock on error path + - RDMA/mlx5: Follow rb_key.ats when creating new mkeys + - ovl: fix encoding fid for lower only root + - ALSA: hda/realtek: Limit mic boost on N14AP7 + - ALSA: hda/realtek: Add quirk for Lenovo Yoga Pro 7 14AHP9 + - drm/i915/mso: using joiner is not possible with eDP MSO + - drm/radeon: fix UBSAN warning in kv_dpm.c + - drm/amdgpu: fix UBSAN warning in kv_dpm.c + - dt-bindings: dma: fsl-edma: fix dma-channels constraints + - ocfs2: fix NULL pointer dereference in ocfs2_journal_dirty() + - ocfs2: fix NULL pointer dereference in ocfs2_abort_trigger() + - gcov: add support for GCC 14 + - kcov: don't lose track of remote references during softirqs + - efi/x86: Free EFI memory map only when installing a new one. + - serial: 8250_dw: Revert "Move definitions to the shared header" + - mm: mmap: allow for the maximum number of bits for randomizing mmap_base by + default + - tcp: clear tp->retrans_stamp in tcp_rcv_fastopen_synack() + - mm/page_table_check: fix crash on ZONE_DEVICE + - i2c: ocores: set IACK bit after core is enabled + - dt-bindings: i2c: atmel,at91sam: correct path to i2c-controller schema + - dt-bindings: i2c: google,cros-ec-i2c-tunnel: correct path to i2c-controller + schema + - spi: stm32: qspi: Fix dual flash mode sanity test in stm32_qspi_setup() + - arm64: dts: imx8qm-mek: fix gpio number for reg_usdhc2_vmmc + - spi: stm32: qspi: Clamp stm32_qspi_get_mode() output to CCR_BUSWIDTH_4 + - perf: script: add raw|disasm arguments to --insn-trace option + - nbd: Improve the documentation of the locking assumptions + - nbd: Fix signal handling + - tracing: Add MODULE_DESCRIPTION() to preemptirq_delay_test + - x86/cpu/vfm: Add new macros to work with (vendor/family/model) values + - x86/cpu: Fix x86_match_cpu() to match just X86_VENDOR_INTEL + - drm/amd/display: revert Exit idle optimizations before HDCP execution + - ASoC: Intel: sof-sdw: really remove FOUR_SPEAKER quirk + - net/sched: unregister lockdep keys in qdisc_create/qdisc_alloc error path + - kprobe/ftrace: fix build error due to bad function definition + - hid: asus: asus_report_fixup: fix potential read out of bounds + - Revert "mm: mmap: allow for the maximum number of bits for randomizing + mmap_base by default" + - platform/chrome: cros_usbpd_logger: provide ID table for avoiding fallback + match + - platform/chrome: cros_usbpd_notify: provide ID table for avoiding fallback + match + - ubsan: Avoid i386 UBSAN handler crashes with Clang + - arm64: defconfig: select INTERCONNECT_QCOM_SM6115 as built-in + - bpf: Avoid kfree_rcu() under lock in bpf_lpm_trie. + - devlink: use kvzalloc() to allocate devlink instance resources + - wifi: rtw89: 8852c: add quirk to set PCI BER for certain platforms + - clocksource: Make watchdog and suspend-timing multiplication overflow safe + - ACPI: resource: Do IRQ override on GMxBGxx (XMG APEX 17 M23) + - wifi: ath12k: add string type to search board data in board-2.bin for + WCN7850 + - wifi: ath12k: add firmware-2.bin support + - wifi: ath12k: fix kernel crash during resume + - arm64/sysreg: Update PIE permission encodings + - ACPI: resource: Skip IRQ override on Asus Vivobook Pro N6506MV + - wifi: ath12k: fix the problem that down grade phy mode operation + - bpf: avoid uninitialized warnings in verifier_global_subprogs.c + - selftests: net: fix timestamp not arriving in cmsg_time.sh + - net: ena: Add validation for completion descriptors consistency + - drm/amd/display: Workaround register access in idle race with cursor + - cgroup/cpuset: Make cpuset hotplug processing synchronous + - platform/x86: x86-android-tablets: Unregister devices in reverse order + - platform/x86: x86-android-tablets: Add Lenovo Yoga Tablet 2 Pro 1380F/L data + - ALSA: hda/realtek: Add quirks for HP Omen models using CS35L41 + - ext4: fold quota accounting into ext4_xattr_inode_lookup_create() + - ext4: do not create EA inode under buffer lock + - f2fs: fix to detect inconsistent nat entry during truncation + - usb: typec: ucsi_glink: rework quirks implementation + - xhci: remove XHCI_TRUST_TX_LENGTH quirk + - clk: Add a devm variant of clk_rate_exclusive_get() + - clk: Provide !COMMON_CLK dummy for devm_clk_rate_exclusive_get() + - i2c: lpi2c: Avoid calling clk_get_rate during transfer + - cxl: Add post-reset warning if reset results in loss of previously committed + HDM decoders + - OPP: Fix required_opp_tables for multiple genpds using same table + - wifi: iwlwifi: mvm: fix ROC version check + - wifi: mac80211: Recalc offload when monitor stop + - ice: fix 200G link speed message log + - ice: implement AQ download pkg retry + - bpf: Fix reg_set_min_max corruption of fake_reg + - ALSA: hda: cs35l41: Component should be unbound before deconstruction + - netdev-genl: fix error codes when outputting XDP features + - arm64: dts: freescale: imx8mm-verdin: Fix GPU speed + - phy: qcom-qmp: qserdes-txrx: Add missing registers offsets + - phy: qcom-qmp: pcs: Add missing v6 N4 register offsets + - phy: qcom: qmp-combo: Switch from V6 to V6 N4 register offsets + - powerpc/crypto: Add generated P8 asm to .gitignore + - spi: Exctract spi_dev_check_cs() helper + - spi: Fix SPI slave probe failure + - net: phy: dp83tg720: wake up PHYs in managed mode + - net: phy: dp83tg720: get master/slave configuration in link down state + - RDMA/mlx5: Ensure created mkeys always have a populated rb_key + - drm/amdgpu: fix locking scope when flushing tlb + - drm/amd/display: Remove redundant idle optimization check + - drm/amd/display: Attempt to avoid empty TUs when endpoint is DPIA + - ata: ahci: Do not enable LPM if no LPM states are supported by the HBA + - dmaengine: xilinx: xdma: Fix data synchronisation in xdma_channel_isr() + - net/tcp_ao: Don't leak ao_info on error-path + - mm: shmem: fix getting incorrect lruvec when replacing a shmem folio + - selftests: mptcp: print_test out of verify_listener_events + - selftests: mptcp: userspace_pm: fixed subtest names + - ima: Avoid blocking in RCU read-side critical section + - virt: guest_memfd: fix reference leak on hwpoisoned page + - thermal: int340x: processor_thermal: Support shared interrupts + - thermal: core: Change PM notifier priority to the minimum + - wifi: ath12k: check M3 buffer size as well whey trying to reuse it + - Upstream stable to v6.6.36, v6.9.7 + + * [SRU] Add Dynamic Tuning Technology (DTT) support for Lunar Lake + (LP: #2073961) + - thermal: int340x: processor_thermal: Add Lunar Lake-M PCI ID + + * Kubuntu 24.04 freezes after plugging in ethernet cable (LP: #2073358) + - e1000e: move force SMBUS near the end of enable_ulp function + - e1000e: fix force smbus during suspend flow + + * Noble update: upstream stable patchset 2024-07-25 (LP: #2074091) + - wifi: mac80211: mesh: Fix leak of mesh_preq_queue objects + - wifi: mac80211: Fix deadlock in ieee80211_sta_ps_deliver_wakeup() + - wifi: cfg80211: fully move wiphy work to unbound workqueue + - wifi: cfg80211: Lock wiphy in cfg80211_get_station + - wifi: cfg80211: pmsr: use correct nla_get_uX functions + - wifi: iwlwifi: mvm: don't initialize csa_work twice + - wifi: iwlwifi: mvm: revert gen2 TX A-MPDU size to 64 + - wifi: iwlwifi: mvm: set properly mac header + - wifi: iwlwifi: dbg_ini: move iwl_dbg_tlv_free outside of debugfs ifdef + - wifi: iwlwifi: mvm: check n_ssids before accessing the ssids + - wifi: iwlwifi: mvm: don't read past the mfuart notifcation + - wifi: mac80211: correctly parse Spatial Reuse Parameter Set element + - scsi: ufs: mcq: Fix error output and clean up ufshcd_mcq_abort() + - RISC-V: KVM: No need to use mask when hart-index-bit is 0 + - RISC-V: KVM: Fix incorrect reg_subtype labels in + kvm_riscv_vcpu_set_reg_isa_ext function + - ax25: Fix refcount imbalance on inbound connections + - ax25: Replace kfree() in ax25_dev_free() with ax25_dev_put() + - net/ncsi: Fix the multi thread manner of NCSI driver + - net: phy: micrel: fix KSZ9477 PHY issues after suspend/resume + - bpf: Fix a potential use-after-free in bpf_link_free() + - KVM: SEV-ES: Disallow SEV-ES guests when X86_FEATURE_LBRV is absent + - KVM: SEV-ES: Delegate LBR virtualization to the processor + - vmxnet3: disable rx data ring on dma allocation failure + - ipv6: ioam: block BH from ioam6_output() + - ipv6: sr: block BH in seg6_output_core() and seg6_input_core() + - net: tls: fix marking packets as decrypted + - bpf: Set run context for rawtp test_run callback + - octeontx2-af: Always allocate PF entries from low prioriy zone + - net/smc: avoid overwriting when adjusting sock bufsizes + - net: phy: Micrel KSZ8061: fix errata solution not taking effect problem + - net: sched: sch_multiq: fix possible OOB write in multiq_tune() + - vxlan: Fix regression when dropping packets due to invalid src addresses + - tcp: count CLOSE-WAIT sockets for TCP_MIB_CURRESTAB + - mptcp: count CLOSE-WAIT sockets for MPTCP_MIB_CURRESTAB + - net/mlx5: Stop waiting for PCI if pci channel is offline + - net/mlx5: Always stop health timer during driver removal + - net/mlx5: Fix tainted pointer delete is case of flow rules creation fail + - net/sched: taprio: always validate TCA_TAPRIO_ATTR_PRIOMAP + - ptp: Fix error message on failed pin verification + - ice: fix iteration of TLVs in Preserved Fields Area + - ice: remove af_xdp_zc_qps bitmap + - ice: add flag to distinguish reset from .ndo_bpf in XDP rings config + - net: wwan: iosm: Fix tainted pointer delete is case of region creation fail + - af_unix: Set sk->sk_state under unix_state_lock() for truly disconencted + peer. + - af_unix: Annodate data-races around sk->sk_state for writers. + - af_unix: Annotate data-race of sk->sk_state in unix_inq_len(). + - af_unix: Annotate data-races around sk->sk_state in unix_write_space() and + poll(). + - af_unix: Annotate data-race of sk->sk_state in unix_stream_connect(). + - af_unix: Annotate data-races around sk->sk_state in sendmsg() and recvmsg(). + - af_unix: Annotate data-race of sk->sk_state in unix_stream_read_skb(). + - af_unix: Annotate data-races around sk->sk_state in UNIX_DIAG. + - af_unix: Annotate data-races around sk->sk_sndbuf. + - af_unix: Annotate data-race of net->unx.sysctl_max_dgram_qlen. + - af_unix: Use unix_recvq_full_lockless() in unix_stream_connect(). + - af_unix: Use skb_queue_empty_lockless() in unix_release_sock(). + - af_unix: Use skb_queue_len_lockless() in sk_diag_show_rqlen(). + - af_unix: Annotate data-race of sk->sk_shutdown in sk_diag_fill(). + - ipv6: fix possible race in __fib6_drop_pcpu_from() + - net: ethtool: fix the error condition in ethtool_get_phy_stats_ethtool() + - selftests/mm: log a consistent test name for check_compaction + - irqchip/riscv-intc: Allow large non-standard interrupt number + - irqchip/riscv-intc: Introduce Andes hart-level interrupt controller + - eventfs: Update all the eventfs_inodes from the events descriptor + - io_uring/rsrc: don't lock while !TASK_RUNNING + - io_uring: check for non-NULL file pointer in io_file_can_poll() + - USB: class: cdc-wdm: Fix CPU lockup caused by excessive log messages + - USB: xen-hcd: Traverse host/ when CONFIG_USB_XEN_HCD is selected + - usb: typec: tcpm: fix use-after-free case in tcpm_register_source_caps + - usb: typec: tcpm: Ignore received Hard Reset in TOGGLING state + - mei: me: release irq in mei_me_pci_resume error path + - tty: n_tty: Fix buffer offsets when lookahead is used + - serial: port: Don't block system suspend even if bytes are left to xmit + - landlock: Fix d_parent walk + - jfs: xattr: fix buffer overflow for invalid xattr + - xhci: Set correct transferred length for cancelled bulk transfers + - xhci: Apply reset resume quirk to Etron EJ188 xHCI host + - xhci: Handle TD clearing for multiple streams case + - xhci: Apply broken streams quirk to Etron EJ188 xHCI host + - thunderbolt: debugfs: Fix margin debugfs node creation condition + - scsi: core: Disable CDL by default + - scsi: mpi3mr: Fix ATA NCQ priority support + - scsi: mpt3sas: Avoid test/set_bit() operating in non-allocated memory + - scsi: sd: Use READ(16) when reading block zero on large capacity disks + - gve: Clear napi->skb before dev_kfree_skb_any() + - powerpc/uaccess: Fix build errors seen with GCC 13/14 + - HID: nvidia-shield: Add missing check for input_ff_create_memless + - cxl/test: Add missing vmalloc.h for tools/testing/cxl/test/mem.c + - cxl/region: Fix memregion leaks in devm_cxl_add_region() + - cachefiles: add output string to cachefiles_obj_[get|put]_ondemand_fd + - cachefiles: remove requests from xarray during flushing requests + - cachefiles: add spin_lock for cachefiles_ondemand_info + - cachefiles: fix slab-use-after-free in cachefiles_ondemand_get_fd() + - cachefiles: fix slab-use-after-free in cachefiles_ondemand_daemon_read() + - cachefiles: remove err_put_fd label in cachefiles_ondemand_daemon_read() + - cachefiles: never get a new anonymous fd if ondemand_id is valid + - cachefiles: defer exposing anon_fd until after copy_to_user() succeeds + - cachefiles: flush all requests after setting CACHEFILES_DEAD + - selftests/ftrace: Fix to check required event file + - clk: sifive: Do not register clkdevs for PRCI clocks + - NFSv4.1 enforce rootpath check in fs_location query + - SUNRPC: return proper error from gss_wrap_req_priv + - NFS: add barriers when testing for NFS_FSDATA_BLOCKED + - selftests/tracing: Fix event filter test to retry up to 10 times + - nvme: fix nvme_pr_* status code parsing + - drm/panel: sitronix-st7789v: Add check for of_drm_get_panel_orientation + - platform/x86: dell-smbios: Fix wrong token data in sysfs + - gpio: tqmx86: fix typo in Kconfig label + - gpio: tqmx86: introduce shadow register for GPIO output value + - gpio: tqmx86: store IRQ trigger type and unmask status separately + - gpio: tqmx86: fix broken IRQ_TYPE_EDGE_BOTH interrupt type + - HID: core: remove unnecessary WARN_ON() in implement() + - iommu/amd: Fix sysfs leak in iommu init + - iommu: Return right value in iommu_sva_bind_device() + - io_uring/io-wq: Use set_bit() and test_bit() at worker->flags + - io_uring/io-wq: avoid garbage value of 'match' in io_wq_enqueue() + - HID: logitech-dj: Fix memory leak in logi_dj_recv_switch_to_dj_mode() + - drm/vmwgfx: Refactor drm connector probing for display modes + - drm/vmwgfx: Filter modes which exceed graphics memory + - drm/vmwgfx: 3D disabled should not effect STDU memory limits + - drm/vmwgfx: Remove STDU logic from generic mode_valid function + - drm/vmwgfx: Don't memcmp equivalent pointers + - af_unix: Annotate data-race of sk->sk_state in unix_accept(). + - modpost: do not warn about missing MODULE_DESCRIPTION() for vmlinux.o + - net: sfp: Always call `sfp_sm_mod_remove()` on remove + - net: hns3: fix kernel crash problem in concurrent scenario + - net: hns3: add cond_resched() to hns3 ring buffer init process + - liquidio: Adjust a NULL pointer handling path in lio_vf_rep_copy_packet + - net: stmmac: dwmac-qcom-ethqos: Configure host DMA width + - drm/komeda: check for error-valued pointer + - drm/bridge/panel: Fix runtime warning on panel bridge release + - tcp: fix race in tcp_v6_syn_recv_sock() + - net dsa: qca8k: fix usages of device_get_named_child_node() + - geneve: Fix incorrect inner network header offset when innerprotoinherit is + set + - net/mlx5e: Fix features validation check for tunneled UDP (non-VXLAN) + packets + - Bluetooth: fix connection setup in l2cap_connect + - netfilter: nft_inner: validate mandatory meta and payload + - netfilter: ipset: Fix race between namespace cleanup and gc in the list:set + type + - x86/asm: Use %c/%n instead of %P operand modifier in asm templates + - x86/uaccess: Fix missed zeroing of ia32 u64 get_user() range checking + - scsi: ufs: core: Quiesce request queues before checking pending cmds + - net: pse-pd: Use EOPNOTSUPP error code instead of ENOTSUPP + - gve: ignore nonrelevant GSO type bits when processing TSO headers + - net: stmmac: replace priv->speed with the portTransmitRate from the tc-cbs + parameters + - block: sed-opal: avoid possible wrong address reference in + read_sed_opal_key() + - block: fix request.queuelist usage in flush + - nvmet-passthru: propagate status from id override functions + - net/ipv6: Fix the RT cache flush via sysctl using a previous delay + - net: bridge: mst: pass vlan group directly to br_mst_vlan_set_state + - net: bridge: mst: fix suspicious rcu usage in br_mst_set_state + - ionic: fix use after netif_napi_del() + - af_unix: Read with MSG_PEEK loops if the first unread byte is OOB + - bnxt_en: Adjust logging of firmware messages in case of released token in + __hwrm_send() + - misc: microchip: pci1xxxx: fix double free in the error handling of + gp_aux_bus_probe() + - ksmbd: move leading slash check to smb2_get_name() + - ksmbd: fix missing use of get_write in in smb2_set_ea() + - x86/boot: Don't add the EFI stub to targets, again + - iio: adc: ad9467: fix scan type sign + - iio: dac: ad5592r: fix temperature channel scaling value + - iio: invensense: fix odr switching to same value + - iio: imu: inv_icm42600: delete unneeded update watermark call + - drivers: core: synchronize really_probe() and dev_uevent() + - parisc: Try to fix random segmentation faults in package builds + - ACPI: x86: Force StorageD3Enable on more products + - drm/exynos/vidi: fix memory leak in .get_modes() + - drm/exynos: hdmi: report safe 640x480 mode as a fallback when no EDID found + - mptcp: ensure snd_una is properly initialized on connect + - mptcp: pm: inc RmAddr MIB counter once per RM_ADDR ID + - mptcp: pm: update add_addr counters after connect + - clkdev: Update clkdev id usage to allow for longer names + - irqchip/gic-v3-its: Fix potential race condition in its_vlpi_prop_update() + - x86/kexec: Fix bug with call depth tracking + - x86/amd_nb: Check for invalid SMN reads + - perf/core: Fix missing wakeup when waiting for context reference + - perf auxtrace: Fix multiple use of --itrace option + - riscv: fix overlap of allocated page and PTR_ERR + - tracing/selftests: Fix kprobe event name test for .isra. functions + - kheaders: explicitly define file modes for archived headers + - null_blk: Print correct max open zones limit in null_init_zoned_dev() + - sock_map: avoid race between sock_map_close and sk_psock_put + - dma-buf: handle testing kthreads creation failure + - vmci: prevent speculation leaks by sanitizing event in event_deliver() + - spmi: hisi-spmi-controller: Do not override device identifier + - knfsd: LOOKUP can return an illegal error value + - fs/proc: fix softlockup in __read_vmcore + - ocfs2: use coarse time for new created files + - ocfs2: fix races between hole punching and AIO+DIO + - PCI: rockchip-ep: Remove wrong mask on subsys_vendor_id + - dmaengine: axi-dmac: fix possible race in remove() + - remoteproc: k3-r5: Wait for core0 power-up before powering up core1 + - remoteproc: k3-r5: Do not allow core1 to power up before core0 via sysfs + - iio: adc: axi-adc: make sure AXI clock is enabled + - iio: invensense: fix interrupt timestamp alignment + - riscv: rewrite __kernel_map_pages() to fix sleeping in invalid context + - rtla/timerlat: Simplify "no value" printing on top + - rtla/auto-analysis: Replace \t with spaces + - drm/i915/gt: Disarm breadcrumbs if engines are already idle + - drm/shmem-helper: Fix BUG_ON() on mmap(PROT_WRITE, MAP_PRIVATE) + - drm/i915/dpt: Make DPT object unshrinkable + - drm/i915: Fix audio component initialization + - intel_th: pci: Add Meteor Lake-S support + - pmdomain: ti-sci: Fix duplicate PD referrals + - btrfs: zoned: fix use-after-free due to race with dev replace + - xfs: fix imprecise logic in xchk_btree_check_block_owner + - xfs: fix scrub stats file permissions + - xfs: fix SEEK_HOLE/DATA for regions with active COW extents + - xfs: shrink failure needs to hold AGI buffer + - xfs: ensure submit buffers on LSN boundaries in error handlers + - xfs: allow sunit mount option to repair bad primary sb stripe values + - xfs: don't use current->journal_info + - xfs: allow cross-linking special files without project quota + - swiotlb: Enforce page alignment in swiotlb_alloc() + - swiotlb: Reinstate page-alignment for mappings >= PAGE_SIZE + - swiotlb: extend buffer pre-padding to alloc_align_mask if necessary + - tick/nohz_full: Don't abuse smp_call_function_single() in + tick_setup_device() + - mm/huge_memory: don't unpoison huge_zero_folio + - serial: 8250_pxa: Configure tx_loadsz to match FIFO IRQ level + - Revert "fork: defer linking file vma until vma is fully initialized" + - remoteproc: k3-r5: Jump to error handling labels in start/stop errors + - greybus: Fix use-after-free bug in gb_interface_release due to race + condition. + - ima: Fix use-after-free on a dentry's dname.name + - serial: core: Add UPIO_UNKNOWN constant for unknown port type + - serial: port: Introduce a common helper to read properties + - serial: 8250_dw: Switch to use uart_read_port_properties() + - serial: 8250_dw: Replace ACPI device check by a quirk + - serial: 8250_dw: Don't use struct dw8250_data outside of 8250_dw + - usb-storage: alauda: Check whether the media is initialized + - misc: microchip: pci1xxxx: Fix a memory leak in the error handling of + gp_aux_bus_probe() + - i2c: at91: Fix the functionality flags of the slave-only interface + - i2c: designware: Fix the functionality flags of the slave-only interface + - zap_pid_ns_processes: clear TIF_NOTIFY_SIGNAL along with TIF_SIGPENDING + - wifi: ath11k: fix WCN6750 firmware crash caused by 17 num_vdevs + - cpufreq: amd-pstate: Unify computation of + {max,min,nominal,lowest_nonlinear}_freq + - cpufreq: amd-pstate: Add quirk for the pstate CPPC capabilities missing + - cpufreq: amd-pstate: remove global header file + - virtio_net: fix possible dim status unrecoverable + - net: ethernet: mtk_eth_soc: handle dma buffer size soc specific + - ice: fix reads from NVM Shadow RAM on E830 and E825-C devices + - ice: map XDP queues to vectors in ice_vsi_map_rings_to_vectors() + - x86/cpu: Get rid of an unnecessary local variable in get_cpu_address_sizes() + - x86/cpu: Provide default cache line size if not enumerated + - selftests/mm: ksft_exit functions do not return + - selftests/mm: compaction_test: fix bogus test success and reduce probability + of OOM-killer invocation + - .editorconfig: remove trim_trailing_whitespace option + - kcov, usb: disable interrupts in kcov_remote_start_usb_softirq + - ata: libata-scsi: Set the RMB bit only for removable media devices + - powerpc/85xx: fix compile error without CONFIG_CRASH_DUMP + - kselftest/alsa: Ensure _GNU_SOURCE is defined + - thermal: core: Do not fail cdev registration because of invalid initial + state + - Bluetooth: hci_sync: Fix not using correct handle + - net/sched: initialize noop_qdisc owner + - tcp: use signed arithmetic in tcp_rtx_probe0_timed_out() + - drm/nouveau: don't attempt to schedule hpd_work on headless cards + - drm/xe/xe_gt_idle: use GT forcewake domain assertion + - drm/xe: flush engine buffers before signalling user fence on all engines + - drm/xe: Remove mem_access from guc_pc calls + - drm/xe: move disable_c6 call + - bnxt_en: Cap the size of HWRM_PORT_PHY_QCFG forwarded response + - iio: imu: bmi323: Fix trigger notification in case of error + - iio: pressure: bmp280: Fix BMP580 temperature reading + - iio: temperature: mlx90635: Fix ERR_PTR dereference in mlx90635_probe() + - thermal: ACPI: Invalidate trip points with temperature of 0 or below + - x86/mm/numa: Use NUMA_NO_NODE when calling memblock_set_node() + - memblock: make memblock_set_node() also warn about use of MAX_NUMNODES + - perf script: Show also errors for --insn-trace option + - wifi: cfg80211: validate HE operation element parsing + - wifi: rtlwifi: Ignore IEEE80211_CONF_CHANGE_RETRY_LIMITS + - locking/atomic: scripts: fix ${atomic}_sub_and_test() kerneldoc + - ata: ahci: Do not apply Intel PCS quirk on Intel Alder Lake + - ata: libata-core: Add ATA_HORKAGE_NOLPM for Apacer AS340 + - ata: libata-core: Add ATA_HORKAGE_NOLPM for Crucial CT240BX500SSD1 + - ata: libata-core: Add ATA_HORKAGE_NOLPM for AMD Radeon S3 SSD + - kexec: fix the unexpected kexec_dprintk() macro + - ocfs2: update inode fsync transaction id in ocfs2_unlink and ocfs2_link + - dm-integrity: set discard_granularity to logical block size + - drm/bridge: aux-hpd-bridge: correct devm_drm_dp_hpd_bridge_add() stub + - iio: temperature: mcp9600: Fix temperature reading for negative values + - drm/mst: Fix NULL pointer dereference at drm_dp_add_payload_part2 + - riscv: force PAGE_SIZE linear mapping if debug_pagealloc is enabled + - drm/xe: Properly handle alloc_guc_id() failure + - wifi: iwlwifi: mvm: support iwl_dev_tx_power_cmd_v8 + - wifi: iwlwifi: mvm: fix a crash on 7265 + - mei: vsc: Fix wrong invocation of ACPI SID method + - Upstream stable to v6.6.35, v6.9.6 + + * [SRU] Add support for intel trace hub for last platforms (LP: #2073926) // + Noble update: upstream stable patchset 2024-07-25 (LP: #2074091) + - intel_th: pci: Add Granite Rapids support + - intel_th: pci: Add Granite Rapids SOC support + - intel_th: pci: Add Sapphire Rapids SOC support + - intel_th: pci: Add Lunar Lake support + + * Fix L2CAP/LE/CPU/BV-02-C bluetooth certification failure (LP: #2072858) // + Noble update: upstream stable patchset 2024-07-25 (LP: #2074091) + - Bluetooth: L2CAP: Fix rejecting L2CAP_CONN_PARAM_UPDATE_REQ + + * Noble update: upstream stable patchset 2024-07-22 (LP: #2073788) + - drm/i915/hwmon: Get rid of devm + - afs: Don't cross .backup mountpoint from backup volume + - erofs: avoid allocating DEFLATE streams before mounting + - vxlan: Fix regression when dropping packets due to invalid src addresses + - drm/sun4i: hdmi: Convert encoder to atomic + - drm/sun4i: hdmi: Move mode_set into enable + - f2fs: fix to do sanity check on i_xattr_nid in sanity_check_inode() + - media: lgdt3306a: Add a check against null-pointer-def + - drm/amdgpu: add error handle to avoid out-of-bounds + - wifi: rtw89: correct aSIFSTime for 6GHz band + - ata: pata_legacy: make legacy_exit() work again + - fsverity: use register_sysctl_init() to avoid kmemleak warning + - proc: Move fdinfo PTRACE_MODE_READ check into the inode .permission + operation + - platform/chrome: cros_ec: Handle events during suspend after resume + completion + - thermal/drivers/qcom/lmh: Check for SCM availability at probe + - soc: qcom: rpmh-rsc: Enhance check for VRM in-flight request + - ACPI: resource: Do IRQ override on TongFang GXxHRXx and GMxHGxx + - arm64: tegra: Correct Tegra132 I2C alias + - arm64: dts: qcom: qcs404: fix bluetooth device address + - md/raid5: fix deadlock that raid5d() wait for itself to clear + MD_SB_CHANGE_PENDING + - wifi: rtl8xxxu: Fix the TX power of RTL8192CU, RTL8723AU + - wifi: rtlwifi: rtl8192de: Fix 5 GHz TX power + - wifi: rtlwifi: rtl8192de: Fix low speed with WPA3-SAE + - wifi: rtlwifi: rtl8192de: Fix endianness issue in RX path + - arm64: dts: qcom: sc8280xp: add missing PCIe minimum OPP + - arm64: dts: hi3798cv200: fix the size of GICR + - arm64: dts: ti: verdin-am62: Set memory size to 2gb + - media: mc: Fix graph walk in media_pipeline_start + - media: mc: mark the media devnode as registered from the, start + - media: mxl5xx: Move xpt structures off stack + - media: v4l2-core: hold videodev_lock until dev reg, finishes + - media: v4l: async: Properly re-initialise notifier entry in unregister + - media: v4l: async: Don't set notifier's V4L2 device if registering fails + - media: v4l: async: Fix notifier list entry init + - mmc: core: Add mmc_gpiod_set_cd_config() function + - mmc: sdhci: Add support for "Tuning Error" interrupts + - mmc: sdhci-acpi: Sort DMI quirks alphabetically + - mmc: sdhci-acpi: Fix Lenovo Yoga Tablet 2 Pro 1380 sdcard slot not working + - mmc: sdhci-acpi: Disable write protect detection on Toshiba WT10-A + - mmc: sdhci-acpi: Add quirk to enable pull-up on the card-detect GPIO on Asus + T100TA + - drm/fbdev-generic: Do not set physical framebuffer address + - fbdev: savage: Handle err return when savagefb_check_var failed + - drm/amdgpu/atomfirmware: add intergrated info v2.3 table + - 9p: add missing locking around taking dentry fid list + - drm/amd: Fix shutdown (again) on some SMU v13.0.4/11 platforms + - Revert "drm/amdkfd: fix gfx_target_version for certain 11.0.3 devices" + - KVM: SVM: WARN on vNMI + NMI window iff NMIs are outright masked + - KVM: arm64: Fix AArch32 register narrowing on userspace write + - KVM: arm64: Allow AArch32 PSTATE.M to be restored as System mode + - KVM: arm64: AArch32: Fix spurious trapping of conditional instructions + - LoongArch: Add all CPUs enabled by fdt to NUMA node 0 + - LoongArch: Override higher address bits in JUMP_VIRT_ADDR + - clk: bcm: dvp: Assign ->num before accessing ->hws + - clk: bcm: rpi: Assign ->num before accessing ->hws + - clk: qcom: clk-alpha-pll: fix rate setting for Stromer PLLs + - crypto: ecdsa - Fix module auto-load on add-key + - crypto: ecrdsa - Fix module auto-load on add_key + - crypto: qat - Fix ADF_DEV_RESET_SYNC memory leak + - kbuild: Remove support for Clang's ThinLTO caching + - mm: fix race between __split_huge_pmd_locked() and GUP-fast + - filemap: add helper mapping_max_folio_size() + - iomap: fault in smaller chunks for non-large folio mappings + - i2c: acpi: Unbind mux adapters before delete + - HID: i2c-hid: elan: fix reset suspend current leakage + - scsi: core: Handle devices which return an unusually large VPD page count + - net/ipv6: Fix route deleting failure when metric equals 0 + - net/9p: fix uninit-value in p9_client_rpc() + - mm/ksm: fix ksm_pages_scanned accounting + - mm/ksm: fix ksm_zero_pages accounting + - kmsan: do not wipe out origin when doing partial unpoisoning + - tpm_tis: Do *not* flush uninitialized work + - intel_th: pci: Add Meteor Lake-S CPU support + - rtla/timerlat: Fix histogram report when a cpu count is 0 + - sparc64: Fix number of online CPUs + - mm/cma: drop incorrect alignment check in cma_init_reserved_mem + - mm/hugetlb: pass correct order_per_bit to cma_declare_contiguous_nid + - mm: /proc/pid/smaps_rollup: avoid skipping vma after getting mmap_lock again + - mm/vmalloc: fix vmalloc which may return null if called with __GFP_NOFAIL + - selftests/mm: compaction_test: fix incorrect write of zero to nr_hugepages + - selftests/mm: fix build warnings on ppc64 + - watchdog: rti_wdt: Set min_hw_heartbeat_ms to accommodate a safety margin + - bonding: fix oops during rmmod + - wifi: ath10k: fix QCOM_RPROC_COMMON dependency + - kdb: Fix buffer overflow during tab-complete + - kdb: Use format-strings rather than '\0' injection in kdb_read() + - kdb: Fix console handling when editing and tab-completing commands + - kdb: Merge identical case statements in kdb_read() + - kdb: Use format-specifiers rather than memset() for padding in kdb_read() + - sparc: move struct termio to asm/termios.h + - drm/amdkfd: handle duplicate BOs in reserve_bo_and_cond_vms + - ext4: Fixes len calculation in mpage_journal_page_buffers + - ext4: set type of ac_groups_linear_remaining to __u32 to avoid overflow + - ext4: fix mb_cache_entry's e_refcnt leak in ext4_xattr_block_cache_find() + - riscv: dts: starfive: Remove PMIC interrupt info for Visionfive 2 board + - ARM: dts: samsung: smdkv310: fix keypad no-autorepeat + - ARM: dts: samsung: smdk4412: fix keypad no-autorepeat + - ARM: dts: samsung: exynos4412-origen: fix keypad no-autorepeat + - parisc: Define HAVE_ARCH_HUGETLB_UNMAPPED_AREA + - parisc: Define sigset_t in parisc uapi header + - s390/ap: Fix crash in AP internal function modify_bitmap() + - s390/cpacf: Split and rework cpacf query functions + - s390/cpacf: Make use of invalid opcode produce a link error + - i3c: master: svc: fix invalidate IBI type and miss call client IBI handler + - genirq/irqdesc: Prevent use-after-free in irq_find_at_or_after() + - ASoC: SOF: ipc4-topology: Fix input format query of process modules without + base extension + - ALSA: ump: Don't clear bank selection after sending a program change + - ALSA: ump: Don't accept an invalid UMP protocol number + - EDAC/amd64: Convert PCIBIOS_* return codes to errnos + - EDAC/igen6: Convert PCIBIOS_* return codes to errnos + - nfs: fix undefined behavior in nfs_block_bits() + - NFS: Fix READ_PLUS when server doesn't support OP_READ_PLUS + - eventfs: Fix a possible null pointer dereference in eventfs_find_events() + - eventfs: Keep the directories from having the same inode number as files + - tracefs: Clear EVENT_INODE flag in tracefs_drop_inode() + - btrfs: fix crash on racing fsync and size-extending write into prealloc + - btrfs: fix leak of qgroup extent records after transaction abort + - ALSA: seq: Fix incorrect UMP type for system messages + - powerpc/bpf: enforce full ordering for ATOMIC operations with BPF_FETCH + - smb: client: fix deadlock in smb2_find_smb_tcon() + - smp: Provide 'setup_max_cpus' definition on UP too + - drm/xe/bb: assert width in xe_bb_create_job() + - crypto: starfive - Do not free stack buffer + - btrfs: qgroup: fix initialization of auto inherit array + - wifi: rtl8xxxu: enable MFP support with security flag of RX descriptor + - media: mgb4: Fix double debugfs remove + - media: ov2740: Fix LINK_FREQ and PIXEL_RATE control value reporting + - firmware: qcom_scm: disable clocks if qcom_scm_bw_enable() fails + - LoongArch: Fix built-in DTB detection + - LoongArch: Fix entry point in kernel image header + - clk: qcom: apss-ipq-pll: use stromer ops for IPQ5018 to fix boot failure + - net/tcp: Don't consider TCP_CLOSE in TCP_AO_ESTABLISHED + - selftests: net: lib: support errexit with busywait + - selftests: net: lib: avoid error removing empty netns name + - cpufreq: amd-pstate: Fix the inconsistency in max frequency units + - mm/memory-failure: fix handling of dissolved but not taken off from buddy + pages + - selftests/mm: compaction_test: fix bogus test success on Aarch64 + - irqchip/riscv-intc: Prevent memory leak when riscv_intc_init_common() fails + - Revert "perf record: Reduce memory for recording PERF_RECORD_LOST_SAMPLES + event" + - hwmon: (ltc2992) Fix memory leak in ltc2992_parse_dt() + - riscv: enable HAVE_ARCH_HUGE_VMAP for XIP kernel + - btrfs: qgroup: update rescan message levels and error codes + - btrfs: qgroup: fix qgroup id collision across mounts + - btrfs: cache folio size and shift in extent_buffer + - btrfs: protect folio::private when attaching extent buffer folios + - bpf: fix multi-uprobe PID filtering logic + - powerpc/64/bpf: fix tail calls for PCREL addressing + - nilfs2: fix potential kernel bug due to lack of writeback flag waiting + - nilfs2: fix nilfs_empty_dir() misjudgment and long loop on I/O errors + - Upstream stable to v6.6.34, v6.9.5 + + * Noble update: upstream stable patchset 2024-07-19 (LP: #2073603) + - perf record: Delete session after stopping sideband thread + - perf probe: Add missing libgen.h header needed for using basename() + - iio: core: Leave private pointer NULL when no private data supplied + - greybus: lights: check return of get_channel_from_mode + - phy: qcom: qmp-combo: fix duplicate return in qmp_v4_configure_dp_phy + - f2fs: multidev: fix to recognize valid zero block address + - f2fs: fix to wait on page writeback in __clone_blkaddrs() + - fpga: manager: add owner module and take its refcount + - fpga: bridge: add owner module and take its refcount + - counter: linux/counter.h: fix Excess kernel-doc description warning + - perf annotate: Get rid of duplicate --group option item + - usb: typec: ucsi: always register a link to USB PD device + - usb: typec: ucsi: simplify partner's PD caps registration + - perf stat: Do not fail on metrics on s390 z/VM systems + - soundwire: cadence: fix invalid PDI offset + - dmaengine: idma64: Add check for dma_set_max_seg_size + - firmware: dmi-id: add a release callback function + - perf annotate: Fix annotation_calc_lines() to pass correct address to + get_srcline() + - serial: max3100: Lock port->lock when calling uart_handle_cts_change() + - serial: max3100: Update uart_driver_registered on driver removal + - serial: max3100: Fix bitwise types + - greybus: arche-ctrl: move device table to its right location + - PCI: tegra194: Fix probe path for Endpoint mode + - serial: sc16is7xx: add proper sched.h include for sched_set_fifo() + - module: don't ignore sysfs_create_link() failures + - interconnect: qcom: qcm2290: Fix mas_snoc_bimc QoS port assignment + - arm64: dts: meson: fix S4 power-controller node + - perf tests: Make "test data symbol" more robust on Neoverse N1 + - perf tests: Apply attributes to all events in object code reading test + - perf record: Fix debug message placement for test consumption + - dt-bindings: PCI: rcar-pci-host: Add missing IOMMU properties + - perf bench uprobe: Remove lib64 from libc.so.6 binary path + - f2fs: compress: fix to relocate check condition in + f2fs_{release,reserve}_compress_blocks() + - f2fs: compress: fix to relocate check condition in + f2fs_ioc_{,de}compress_file() + - f2fs: fix to relocate check condition in f2fs_fallocate() + - f2fs: fix to check pinfile flag in f2fs_move_file_range() + - iio: adc: stm32: Fixing err code to not indicate success + - riscv: dts: starfive: visionfive 2: Remove non-existing TDM hardware + - coresight: etm4x: Fix unbalanced pm_runtime_enable() + - perf docs: Document bpf event modifier + - perf test shell arm_coresight: Increase buffer size for Coresight basic + tests + - iio: pressure: dps310: support negative temperature values + - iio: buffer-dmaengine: export buffer alloc and free functions + - iio: add the IIO backend framework + - [CONFIG] Update CONFIG_IIO_BACKEND + - iio: adc: ad9467: convert to backend framework + - [Config] Update CONFIG_AD9467 + - iio: adc: adi-axi-adc: move to backend framework + - [Config] Update CONFIG_ADI_AXI_ADC + - iio: adc: adi-axi-adc: only error out in major version mismatch + - coresight: etm4x: Do not hardcode IOMEM access for register restore + - coresight: etm4x: Do not save/restore Data trace control registers + - coresight: etm4x: Safe access for TRCQCLTR + - coresight: etm4x: Fix access to resource selector registers + - vfio/pci: fix potential memory leak in vfio_intx_enable() + - fpga: region: add owner module and take its refcount + - udf: Remove GFP_NOFS allocation in udf_expand_file_adinicb() + - udf: Convert udf_expand_file_adinicb() to use a folio + - microblaze: Remove gcc flag for non existing early_printk.c file + - microblaze: Remove early printk call from cpuinfo-static.c + - PCI: Wait for Link Training==0 before starting Link retrain + - perf intel-pt: Fix unassigned instruction op (discovered by MemorySanitizer) + - leds: pwm: Disable PWM when going to suspend + - ovl: remove upper umask handling from ovl_create_upper() + - PCI: of_property: Return error for int_map allocation failure + - VMCI: Fix an error handling path in vmci_guest_probe_device() + - dt-bindings: pinctrl: mediatek: mt7622: fix array properties + - pinctrl: qcom: pinctrl-sm7150: Fix sdc1 and ufs special pins regs + - watchdog: cpu5wdt.c: Fix use-after-free bug caused by cpu5wdt_trigger + - watchdog: bd9576: Drop "always-running" property + - watchdog: sa1100: Fix PTR_ERR_OR_ZERO() vs NULL check in sa1100dog_probe() + - dt-bindings: phy: qcom,sc8280xp-qmp-ufs-phy: fix msm899[68] power-domains + - dt-bindings: phy: qcom,usb-snps-femto-v2: use correct fallback for sc8180x + - dmaengine: idxd: Avoid unnecessary destruction of file_ida + - usb: gadget: u_audio: Fix race condition use of controls after free during + gadget unbind. + - usb: gadget: u_audio: Clear uac pointer when freed. + - stm class: Fix a double free in stm_register_device() + - ppdev: Add an error check in register_device + - i2c: cadence: Avoid fifo clear after start + - i2c: synquacer: Fix an error handling path in synquacer_i2c_probe() + - perf bench internals inject-build-id: Fix trap divide when collecting just + one DSO + - perf ui browser: Don't save pointer to stack memory + - extcon: max8997: select IRQ_DOMAIN instead of depending on it + - dt-bindings: spmi: hisilicon,hisi-spmi-controller: fix binding references + - PCI/EDR: Align EDR_PORT_DPC_ENABLE_DSM with PCI Firmware r3.3 + - PCI/EDR: Align EDR_PORT_LOCATE_DSM with PCI Firmware r3.3 + - f2fs: support printk_ratelimited() in f2fs_printk() + - f2fs: use BLKS_PER_SEG, BLKS_PER_SEC, and SEGS_PER_SEC + - f2fs: separate f2fs_gc_range() to use GC for a range + - f2fs: kill heap-based allocation + - f2fs: support file pinning for zoned devices + - f2fs: fix block migration when section is not aligned to pow2 + - perf ui browser: Avoid SEGV on title + - perf report: Avoid SEGV in report__setup_sample_type() + - perf thread: Fixes to thread__new() related to initializing comm + - perf symbols: Fix ownership of string in dso__load_vmlinux() + - f2fs: compress: fix to update i_compr_blocks correctly + - f2fs: deprecate io_bits + - f2fs: introduce get_available_block_count() for cleanup + - f2fs: compress: fix error path of inc_valid_block_count() + - f2fs: compress: fix to cover {reserve,release}_compress_blocks() w/ cp_rwsem + lock + - f2fs: fix to release node block count in error path of f2fs_new_node_page() + - f2fs: compress: don't allow unaligned truncation on released compress inode + - serial: sh-sci: protect invalidating RXDMA on shutdown + - libsubcmd: Fix parse-options memory leak + - perf daemon: Fix file leak in daemon_session__control + - f2fs: fix to add missing iput() in gc_data_segment() + - usb: fotg210: Add missing kernel doc description + - perf stat: Don't display metric header for non-leader uncore events + - perf tools: Use pmus to describe type from attribute + - perf tools: Add/use PMU reverse lookup from config to name + - perf pmu: Assume sysfs events are always the same case + - perf pmu: Count sys and cpuid JSON events separately + - LoongArch: Fix callchain parse error with kernel tracepoint events again + - s390/vdso64: filter out munaligned-symbols flag for vdso + - s390/vdso: Generate unwind information for C modules + - s390/vdso: Create .build-id links for unstripped vdso files + - s390/vdso: Use standard stack frame layout + - s390/ipl: Fix incorrect initialization of len fields in nvme reipl block + - s390/ipl: Fix incorrect initialization of nvme dump block + - s390/boot: Remove alt_stfle_fac_list from decompressor + - dt-bindings: PCI: rockchip,rk3399-pcie: Add missing maxItems to ep-gpios + - gpiolib: acpi: Fix failed in acpi_gpiochip_find() by adding parent node + match + - eventfs: Do not differentiate the toplevel events directory + - eventfs: Create eventfs_root_inode to store dentry + - eventfs/tracing: Add callback for release of an eventfs_inode + - eventfs: Free all of the eventfs_inode after RCU + - eventfs: Have "events" directory get permissions from its parent + - dt-bindings: adc: axi-adc: update bindings for backend framework + - dt-bindings: adc: axi-adc: add clocks property + - Input: ims-pcu - fix printf string overflow + - mmc: sdhci_am654: Add tuning algorithm for delay chain + - mmc: sdhci_am654: Write ITAPDLY for DDR52 timing + - mmc: sdhci_am654: Add OTAP/ITAP delay enable + - mmc: sdhci_am654: Add ITAPDLYSEL in sdhci_j721e_4bit_set_clock + - mmc: sdhci_am654: Fix ITAPDLY for HS400 timing + - Input: pm8xxx-vibrator - correct VIB_MAX_LEVELS calculation + - media: v4l: Don't turn on privacy LED if streamon fails + - media: ov2680: Clear the 'ret' variable on success + - media: ov2680: Allow probing if link-frequencies is absent + - media: ov2680: Do not fail if data-lanes property is absent + - drm/msm/dsi: Print dual-DSI-adjusted pclk instead of original mode pclk + - drm/msm/dpu: Always flush the slave INTF on the CTL + - drm/mediatek: dp: Fix mtk_dp_aux_transfer return value + - drm/meson: gate px_clk when setting rate + - um: Fix return value in ubd_init() + - um: vector: fix bpfflash parameter evaluation + - fs/ntfs3: Check 'folio' pointer for NULL + - fs/ntfs3: Use 64 bit variable to avoid 32 bit overflow + - fs/ntfs3: Use variable length array instead of fixed size + - drm/msm/dpu: Add callback function pointer check before its call + - drm/bridge: tc358775: fix support for jeida-18 and jeida-24 + - media: stk1160: fix bounds checking in stk1160_copy_video() + - Input: cyapa - add missing input core locking to suspend/resume functions + - drm/amdgpu: init microcode chip name from ip versions + - drm/amdgpu: Fix buffer size in gfx_v9_4_3_init_ cp_compute_microcode() and + rlc_microcode() + - media: mediatek: vcodec: fix possible unbalanced PM counter + - tools/arch/x86/intel_sdsi: Fix maximum meter bundle length + - tools/arch/x86/intel_sdsi: Fix meter_show display + - tools/arch/x86/intel_sdsi: Fix meter_certificate decoding + - platform/x86: thinkpad_acpi: Take hotkey_mutex during hotkey_exit() + - media: flexcop-usb: fix sanity check of bNumEndpoints + - powerpc/pseries: Add failure related checks for h_get_mpp and h_get_ppp + - um: Fix the -Wmissing-prototypes warning for __switch_mm + - um: Fix the -Wmissing-prototypes warning for get_thread_reg + - um: Fix the declaration of kasan_map_memory + - cxl/trace: Correct DPA field masks for general_media & dram events + - cxl/region: Fix cxlr_pmem leaks + - media: sunxi: a83-mips-csi2: also select GENERIC_PHY + - media: cec: cec-adap: always cancel work in cec_transmit_msg_fh + - media: cec: cec-api: add locking in cec_release() + - media: cec: core: avoid recursive cec_claim_log_addrs + - media: cec: core: avoid confusing "transmit timed out" message + - Revert "drm/bridge: ti-sn65dsi83: Fix enable error path" + - drm: zynqmp_dpsub: Always register bridge + - selftests/powerpc/dexcr: Add -no-pie to hashchk tests + - drm/msm/a6xx: Avoid a nullptr dereference when speedbin setting fails + - ASoC: tas2781: Fix a warning reported by robot kernel test + - null_blk: Fix the WARNING: modpost: missing MODULE_DESCRIPTION() + - ALSA: hda/cs_dsp_ctl: Use private_free for control cleanup + - ALSA: hda: cs35l56: Fix lifetime of cs_dsp instance + - ASoC: mediatek: mt8192: fix register configuration for tdm + - drm/nouveau: use tile_mode and pte_kind for VM_BIND bo allocations + - blk-cgroup: fix list corruption from resetting io stat + - blk-cgroup: fix list corruption from reorder of WRITE ->lqueued + - blk-cgroup: Properly propagate the iostat update up the hierarchy + - regulator: bd71828: Don't overwrite runtime voltages + - xen/x86: add extra pages to unpopulated-alloc if available + - perf/arm-dmc620: Fix lockdep assert in ->event_init() + - x86/kconfig: Select ARCH_WANT_FRAME_POINTERS again when + UNWINDER_FRAME_POINTER=y + - [Config] Update CONFIG_ARCH_WANT_FRAME_POINTERS + - net: Always descend into dsa/ folder with CONFIG_NET_DSA enabled + - ipv6: sr: fix missing sk_buff release in seg6_input_core + - selftests: net: kill smcrouted in the cleanup logic in amt.sh + - nfc: nci: Fix uninit-value in nci_rx_work + - ASoC: tas2552: Add TX path for capturing AUDIO-OUT data + - ASoC: tas2781: Fix wrong loading calibrated data sequence + - NFSv4: Fixup smatch warning for ambiguous return + - nfs: keep server info for remounts + - sunrpc: fix NFSACL RPC retry on soft mount + - rpcrdma: fix handling for RDMA_CM_EVENT_DEVICE_REMOVAL + - regulator: pickable ranges: don't always cache vsel + - regulator: tps6287x: Force writing VSEL bit + - af_unix: Update unix_sk(sk)->oob_skb under sk_receive_queue lock. + - ipv6: sr: fix memleak in seg6_hmac_init_algo + - regulator: tps6594-regulator: Correct multi-phase configuration + - tcp: Fix shift-out-of-bounds in dctcp_update_alpha(). + - pNFS/filelayout: fixup pNfs allocation modes + - openvswitch: Set the skbuff pkt_type for proper pmtud support. + - arm64: asm-bug: Add .align 2 to the end of __BUG_ENTRY + - rv: Update rv_en(dis)able_monitor doc to match kernel-doc + - net: lan966x: Remove ptp traps in case the ptp is not enabled. + - virtio: delete vq in vp_find_vqs_msix() when request_irq() fails + - i3c: master: svc: change ENXIO to EAGAIN when IBI occurs during start frame + - Revert "ixgbe: Manual AN-37 for troublesome link partners for X550 SFI" + - net: fec: avoid lock evasion when reading pps_enable + - tls: fix missing memory barrier in tls_init + - net: relax socket state check at accept time. + - nfc: nci: Fix handling of zero-length payload packets in nci_rx_work() + - drivers/xen: Improve the late XenStore init protocol + - ice: Interpret .set_channels() input differently + - kasan, fortify: properly rename memintrinsics + - tracing/probes: fix error check in parse_btf_field() + - tpm_tis_spi: Account for SPI header when allocating TPM SPI xfer buffer + - netfilter: nfnetlink_queue: acquire rcu_read_lock() in + instance_destroy_rcu() + - netfilter: ipset: Add list flush to cancel_gc + - netfilter: nft_payload: restore vlan q-in-q match support + - spi: Don't mark message DMA mapped when no transfer in it is + - dma-mapping: benchmark: fix up kthread-related error handling + - dma-mapping: benchmark: fix node id validation + - dma-mapping: benchmark: handle NUMA_NO_NODE correctly + - nvme-multipath: fix io accounting on failover + - nvmet: fix ns enable/disable possible hang + - drm/amd/display: Enable colorspace property for MST connectors + - net: phy: micrel: set soft_reset callback to genphy_soft_reset for KSZ8061 + - net/mlx5: Lag, do bond only if slaves agree on roce state + - net/mlx5: Fix MTMP register capability offset in MCAM register + - net/mlx5: Use mlx5_ipsec_rx_status_destroy to correctly delete status rules + - net/mlx5e: Fix IPsec tunnel mode offload feature check + - net/mlx5e: Use rx_missed_errors instead of rx_dropped for reporting buffer + exhaustion + - net/mlx5e: Fix UDP GSO for encapsulated packets + - dma-buf/sw-sync: don't enable IRQ from sync_print_obj() + - bpf: Fix potential integer overflow in resolve_btfids + - ALSA: jack: Use guard() for locking + - ALSA: core: Remove debugfs at disconnection + - ALSA: hda/realtek: Adjust G814JZR to use SPI init for amp + - enic: Validate length of nl attributes in enic_set_vf_port + - af_unix: Annotate data-race around unix_sk(sk)->addr. + - af_unix: Read sk->sk_hash under bindlock during bind(). + - Octeontx2-pf: Free send queue buffers incase of leaf to inner + - net: usb: smsc95xx: fix changing LED_SEL bit value updated from EEPROM + - ASoC: cs42l43: Only restrict 44.1kHz for the ASP + - bpf: Allow delete from sockmap/sockhash only if update is allowed + - net:fec: Add fec_enet_deinit() + - net: micrel: Fix lan8841_config_intr after getting out of sleep mode + - ice: fix accounting if a VLAN already exists + - selftests: mptcp: simult flows: mark 'unbalanced' tests as flaky + - selftests: mptcp: add ms units for tc-netem delay + - selftests: mptcp: join: mark 'fail' tests as flaky + - ALSA: seq: Fix missing bank setup between MIDI1/MIDI2 UMP conversion + - ALSA: seq: Don't clear bank selection at event -> UMP MIDI2 conversion + - net: ti: icssg-prueth: Fix start counter for ft1 filter + - netfilter: nft_payload: skbuff vlan metadata mangle support + - netfilter: tproxy: bail out if IP has been disabled on the device + - netfilter: nft_fib: allow from forward/input without iif selector + - net/sched: taprio: make q->picos_per_byte available to fill_sched_entry() + - net/sched: taprio: extend minimum interval restriction to entire cycle too + - kconfig: fix comparison to constant symbols, 'm', 'n' + - drm/i915/guc: avoid FIELD_PREP warning + - kheaders: use `command -v` to test for existence of `cpio` + - spi: stm32: Don't warn about spurious interrupts + - net: dsa: microchip: fix RGMII error in KSZ DSA driver + - net: ena: Reduce lines with longer column width boundary + - net: ena: Fix redundant device NUMA node override + - ipvlan: Dont Use skb->sk in ipvlan_process_v{4,6}_outbound + - ALSA: seq: Fix yet another spot for system message conversion + - powerpc/pseries/lparcfg: drop error message from guest name lookup + - drm/panel: sitronix-st7789v: fix timing for jt240mhqs_hwt_ek_e3 panel + - drm/panel: sitronix-st7789v: tweak timing for jt240mhqs_hwt_ek_e3 panel + - drm/panel: sitronix-st7789v: fix display size for jt240mhqs_hwt_ek_e3 panel + - hwmon: (intel-m10-bmc-hwmon) Fix multiplier for N6000 board power sensor + - hwmon: (shtc1) Fix property misspelling + - ALSA: seq: ump: Fix swapped song position pointer data + - ALSA: timer: Set lower bound of start tick time + - x86/efistub: Omit physical KASLR when memory reservations exist + - efi: libstub: only free priv.runtime_map when allocated + - x86/pci: Skip early E820 check for ECAM region + - KVM: x86: Don't advertise guest.MAXPHYADDR as host.MAXPHYADDR in CPUID + - genirq/cpuhotplug, x86/vector: Prevent vector leak during CPU offline + - platform/x86/intel/tpmi: Handle error from tpmi_process_info() + - platform/x86/intel-uncore-freq: Don't present root domain on error + - perf sched timehist: Fix -g/--call-graph option failure + - f2fs: write missing last sum blk of file pinning section + - f2fs: use f2fs_{err,info}_ratelimited() for cleanup + - SUNRPC: Fix loop termination condition in gss_free_in_token_pages() + - riscv: prevent pt_regs corruption for secondary idle threads + - riscv: stacktrace: fixed walk_stackframe() + - perf build: Fix out of tree build related to installation of sysreg-defs + - dt-bindings: pinctrl: qcom: update functions to match with driver + - usb: typec: ucsi: allow non-partner GET_PDOS for Qualcomm devices + - perf report: Fix PAI counter names for s390 virtual machines + - PCI: dwc: ep: Fix DBI access failure for drivers requiring refclk from host + - perf map: Remove kernel map before updating start and end addresses + - riscv: dts: starfive: visionfive 2: Remove non-existing I2S hardware + - pinctrl: renesas: rzg2l: Limit 2.5V power supply to Ethernet interfaces + - riscv: Flush the instruction cache during SMP bringup + - usb: xhci: check if 'requested segments' exceeds ERST capacity + - spmi: pmic-arb: Replace three IS_ERR() calls by null pointer checks in + spmi_pmic_arb_probe() + - perf symbols: Remove map from list before updating addresses + - perf symbols: Update kcore map before merging in remaining symbols + - s390/ftrace: Use unwinder instead of __builtin_return_address() + - s390/stacktrace: Merge perf_callchain_user() and arch_stack_walk_user() + - s390/stacktrace: Skip first user stack frame + - s390/stacktrace: Improve detection of invalid instruction pointers + - s390/vdso: Introduce and use struct stack_frame_vdso_wrapper + - s390/stackstrace: Detect vdso stack frames + - s390/ap: Fix bind complete udev event sent after each AP bus scan + - ocfs2: correctly use ocfs2_find_next_zero_bit() + - mailbox: mtk-cmdq: Fix pm_runtime_get_sync() warning in mbox shutdown + - Input: ioc3kbd - add device table + - phy: qcom: qmp-combo: fix sm8650 voltage swing table + - media: ti: j721e-csi2rx: Fix races while restarting DMA + - drm/msm/dpu: Allow configuring multiple active DSC blocks + - drm: Make drivers depends on DRM_DW_HDMI + - [Config] Drivers now depend on DRM_DW_HDMI + - string: Prepare to merge strscpy_kunit.c into string_kunit.c + - string: Prepare to merge strcat KUnit tests into string_kunit.c + - drm/msm/adreno: fix CP cycles stat retrieval on a7xx + - printk: Fix LOG_CPU_MAX_BUF_SHIFT when BASE_SMALL is enabled + - powerpc/bpf/32: Fix failing test_bpf tests + - KVM: PPC: Book3S HV nestedv2: Cancel pending DEC exception + - KVM: PPC: Book3S HV nestedv2: Fix an error handling path in + gs_msg_ops_kvmhv_nestedv2_config_fill_info() + - KVM: arm64: Destroy mpidr_data for 'late' vCPU creation + - Bluetooth: ISO: Handle PA sync when no BIGInfo reports are generated + - Bluetooth: L2CAP: Fix div-by-zero in l2cap_le_flowctl_init() + - ubsan: Restore dependency on ARCH_HAS_UBSAN + - selftests: forwarding: Have RET track kselftest framework constants + - selftests: forwarding: Convert log_test() to recognize RET values + - selftests: net: Unify code of busywait() and slowwait() + - selftests/net: use tc rule to filter the na packet + - virtio_balloon: Give the balloon its own wakeup source + - riscv: cpufeature: Fix thead vector hwcap removal + - riscv: cpufeature: Fix extension subset checking + - riscv: selftests: Add hwprobe binaries to .gitignore + - idpf: Interpret .set_channels() input differently + - null_blk: fix null-ptr-dereference while configuring 'power' and + 'submit_queues' + - netfs: Fix setting of BDP_ASYNC from iocb flags + - cifs: Set zero_point in the copy_file_range() and remap_file_range() + - cifs: Fix missing set of remote_i_size + - selftests: net: lib: set 'i' as local + - nvme: fix multipath batched completion accounting + - netkit: Fix setting mac address in l2 mode + - netkit: Fix pkt_type override upon netkit pass verdict + - null_blk: Fix return value of nullb_device_power_store() + - idpf: don't enable NAPI and interrupts prior to allocating Rx buffers + - selftests: mptcp: join: mark 'fastclose' tests as flaky + - drm/xe: Add dbg messages on the suspend resume functions. + - drm/xe: check pcode init status only on root gt of root tile + - drm/xe: Change pcode timeout to 50msec while polling again + - drm/xe: Only use reserved BCS instances for usm migrate exec queue + - sd: also set max_user_sectors when setting max_sectors + - block: stack max_user_sectors + - ipv6: introduce dst_rt6_info() helper + - inet: introduce dst_rtable() helper + - net: fix __dst_negative_advice() race + - ice: fix 200G PHY types to link speed mapping + - x86/topology/intel: Unlock CPUID before evaluating anything + - Upstream stable to v6.6.33, v6.9.4 + + * Reenable CONFIG_UBSAN for noble (LP: #2076650) + - ubsan: Remove CONFIG_UBSAN_SANITIZE_ALL + - [Config] Remove CONFIG_UBSAN_SANITIZE_ALL + + * Dangling symlink to linux-lib-rust when Rust is disabled (LP: #2072592) + - [Packaging] Check do_lib_rust before linking Rust lib files + + * kdump doesn't work with UEFI secure boot and kernel lockdown enabled on + ARM64 (LP: #2033007) + - [Config]: Enable CONFIG_KEXEC_IMAGE_VERIFY_SIG on arm64 + + * net/sched: Fix conntrack use-after-free (LP: #2073092) + - net/sched: Fix UAF when resolving a clash + + * No sound on Huawei Matebook D14 AMD since Linux 6.8.0-38 [regression] + (LP: #2073049) + - ASoC: amd: acp: fix for acp platform device creation failure + + * i915: Fixup regressions introduced with enabling single CCS engine + (LP: #2072755) + - drm/i915/gt: Fix CCS id's calculation for CCS mode setting + + * [Ubuntu 24.04] FW1060.00 (NH1060_026) sosreport is running to Kernel OOPS + crash (LP: #2070358) + - nfsd: initialise nfsd_info.mutex early. + + * 6.8 generic & amdpgu / polaris (LP: #2072428) + - drm/amdgpu: Adjust logic in amdgpu_device_partner_bandwidth() + + * md: nvme over tcp with a striped underlying md raid device leads to data + corruption (LP: #2075110) + - md/md-bitmap: fix writing non bitmap pages + + * Linux 6.8 fails to boot on ARM64 if any param is more than 146 chars + (LP: #2069534) + - SAUCE: arm64: v6.8: cmdline param >= 146 chars kills kernel + + * CVE-2024-39484 + - mmc: davinci: Don't strip remove function when driver is builtin + + * CVE-2024-39292 + - um: Add winch to winch_handlers before registering winch IRQ + + * Miscellaneous upstream changes + - bnx2x: Fix multiple UBSAN array-index-out-of-bounds + + -- Roxana Nicolescu Tue, 13 Aug 2024 12:20:36 +0200 + +linux (6.8.0-40.40) noble; urgency=medium + + * noble/linux: 6.8.0-40.40 -proposed tracker (LP: #2072201) + + * FPS of glxgear with fullscreen is too low on MTL platform (LP: #2069380) + - drm/i915: Bypass LMEMBAR/GTTMMADR for MTL stolen memory access + + * a critical typo in the code managing the ASPM settings for PCI Express + devices (LP: #2071889) + - PCI/ASPM: Restore parent state to parent, child state to child + + * [UBUNTU 24.04] IOMMU DMA mode changed in kernel config causes massive + throughput degradation for PCI-related network workloads (LP: #2071471) + - [Config] Set IOMMU_DEFAULT_DMA_STRICT=n and IOMMU_DEFAULT_DMA_LAZY=yes for + s390x + + * UBSAN: array-index-out-of-bounds in + /build/linux-D15vQj/linux-6.5.0/drivers/md/bcache/bset.c:1098:3 + (LP: #2039368) + - bcache: fix variable length array abuse in btree_iter + + * Mute/mic LEDs and speaker no function on EliteBook 645/665 G11 + (LP: #2071296) + - ALSA: hda/realtek: fix mute/micmute LEDs don't work for EliteBook 645/665 + G11. + + * failed to enable IPU6 camera sensor on kernel >= 6.8: ivsc_ace + intel_vsc-5db76cf6-0a68-4ed6-9b78-0361635e2447: switch camera to host + failed: -110 (LP: #2067364) + - mei: vsc: Don't stop/restart mei device during system suspend/resume + - SAUCE: media: ivsc: csi: don't count privacy on as error + - SAUCE: media: ivsc: csi: add separate lock for v4l2 control handler + - SAUCE: media: ivsc: csi: remove privacy status in struct mei_csi + - SAUCE: mei: vsc: Enhance IVSC chipset stability during warm reboot + - SAUCE: mei: vsc: Enhance SPI transfer of IVSC rom + - SAUCE: mei: vsc: Utilize the appropriate byte order swap function + - SAUCE: mei: vsc: Prevent timeout error with added delay post-firmware + download + + * failed to probe camera sensor on Dell XPS 9315: ov01a10 i2c-OVTI01A0:00: + failed to check hwcfg: -22 (LP: #2070251) + - ACPI: utils: Make acpi_handle_path() not static + - ACPI: property: Ignore bad graph port nodes on Dell XPS 9315 + - ACPI: property: Polish ignoring bad data nodes + - ACPI: scan: Ignore camera graph port nodes on all Dell Tiger, Alder and + Raptor Lake models + + * Update amd_sfh for AMD strix series (LP: #2058331) + - HID: amd_sfh: Increase sensor command timeout + - HID: amd_sfh: Improve boot time when SFH is available + - HID: amd_sfh: Extend MP2 register access to SFH + - HID: amd_sfh: Set the AMD SFH driver to depend on x86 + + * RFIM and SAGV Linux Support for G10 models (LP: #2070158) + - drm/i915/display: Add meaningful traces for QGV point info error handling + - drm/i915/display: Extract code required to calculate max qgv/psf gv point + - drm/i915/display: extract code to prepare qgv points mask + - drm/i915/display: Disable SAGV on bw init, to force QGV point recalculation + - drm/i915/display: handle systems with duplicate psf gv points + - drm/i915/display: force qgv check after the hw state readout + + * Update amd-pmf for AMD strix series (LP: #2058330) + - platform/x86/amd/pmf: Differentiate PMF ACPI versions + - platform/x86/amd/pmf: Disable debugfs support for querying power thermals + - platform/x86/amd/pmf: Add support to get sbios requests in PMF driver + - platform/x86/amd/pmf: Add support to notify sbios heart beat event + - platform/x86/amd/pmf: Add support to get APTS index numbers for static + slider + - platform/x86/amd/pmf: Add support to get sps default APTS index values + - platform/x86/amd/pmf: Update sps power thermals according to the platform- + profiles + + * noble:linux: ADT ubuntu-regression-suite misses fakeroot dependency + (LP: #2070042) + - [DEP-8] Add missing fakeroot dependency + + * Noble update: v6.8.12 upstream stable release (LP: #2071621) + - sunrpc: use the struct net as the svc proc private + - x86/tsc: Trust initial offset in architectural TSC-adjust MSRs + - selftests/ftrace: Fix BTFARG testcase to check fprobe is enabled correctly + - ftrace: Fix possible use-after-free issue in ftrace_location() + - Revert "arm64: fpsimd: Implement lazy restore for kernel mode FPSIMD" + - arm64/fpsimd: Avoid erroneous elide of user state reload + - Reapply "arm64: fpsimd: Implement lazy restore for kernel mode FPSIMD" + - tty: n_gsm: fix missing receive state reset after mode switch + - speakup: Fix sizeof() vs ARRAY_SIZE() bug + - serial: sc16is7xx: fix bug in sc16is7xx_set_baud() when using prescaler + - serial: 8250_bcm7271: use default_mux_rate if possible + - serial: 8520_mtk: Set RTS on shutdown for Rx in-band wakeup + - Input: try trimming too long modalias strings + - io_uring: fail NOP if non-zero op flags is passed in + - Revert "r8169: don't try to disable interrupts if NAPI is, scheduled + already" + - r8169: Fix possible ring buffer corruption on fragmented Tx packets. + - ring-buffer: Fix a race between readers and resize checks + - net: mana: Fix the extra HZ in mana_hwc_send_request + - tools/latency-collector: Fix -Wformat-security compile warns + - tools/nolibc/stdlib: fix memory error in realloc() + - net: ti: icssg_prueth: Fix NULL pointer dereference in prueth_probe() + - net: lan966x: remove debugfs directory in probe() error path + - net: smc91x: Fix m68k kernel compilation for ColdFire CPU + - nilfs2: fix use-after-free of timer for log writer thread + - nilfs2: fix unexpected freezing of nilfs_segctor_sync() + - nilfs2: fix potential hang in nilfs_detach_log_writer() + - fs/ntfs3: Remove max link count info display during driver init + - fs/ntfs3: Taking DOS names into account during link counting + - fs/ntfs3: Fix case when index is reused during tree transformation + - fs/ntfs3: Break dir enumeration if directory contents error + - ksmbd: avoid to send duplicate oplock break notifications + - ksmbd: ignore trailing slashes in share paths + - ALSA: core: Fix NULL module pointer assignment at card init + - ALSA: Fix deadlocks with kctl removals at disconnection + - KEYS: asymmetric: Add missing dependency on CRYPTO_SIG + - [Config] updateconfigs for CRYPTO_SIG + - KEYS: asymmetric: Add missing dependencies of FIPS_SIGNATURE_SELFTEST + - HID: nintendo: Fix N64 controller being identified as mouse + - dmaengine: xilinx: xdma: Clarify kdoc in XDMA driver + - wifi: mac80211: don't use rate mask for scanning + - wifi: mac80211: ensure beacon is non-S1G prior to extracting the beacon + timestamp field + - wifi: cfg80211: fix the order of arguments for trace events of the tx_rx_evt + class + - dt-bindings: rockchip: grf: Add missing type to 'pcie-phy' node + - HID: mcp-2221: cancel delayed_work only when CONFIG_IIO is enabled + - net: usb: qmi_wwan: add Telit FN920C04 compositions + - drm/amd/display: Set color_mgmt_changed to true on unsuspend + - drm/amdgpu: Update BO eviction priorities + - drm/amd/pm: Restore config space after reset + - drm/amdkfd: Add VRAM accounting for SVM migration + - drm/amdgpu: Fix the ring buffer size for queue VM flush + - Revert "net: txgbe: fix i2c dev name cannot match clkdev" + - Revert "net: txgbe: fix clk_name exceed MAX_DEV_ID limits" + - cpu: Ignore "mitigations" kernel parameter if CPU_MITIGATIONS=n + - LoongArch: Lately init pmu after smp is online + - drm/etnaviv: fix tx clock gating on some GC7000 variants + - selftests: sud_test: return correct emulated syscall value on RISC-V + - riscv: thead: Rename T-Head PBMT to MAE + - [Config] updateconfigs for ERRATA_THEAD_MAE + - riscv: T-Head: Test availability bit before enabling MAE errata + - sched/isolation: Fix boot crash when maxcpus < first housekeeping CPU + - ASoC: Intel: bytcr_rt5640: Apply Asus T100TA quirk to Asus T100TAM too + - regulator: irq_helpers: duplicate IRQ name + - ALSA: hda: cs35l56: Exit cache-only after cs35l56_wait_for_firmware_boot() + - ASoC: SOF: ipc4-pcm: Use consistent name for snd_sof_pcm_stream pointer + - ASoC: SOF: ipc4-pcm: Use consistent name for sof_ipc4_timestamp_info pointer + - ASoC: SOF: ipc4-pcm: Introduce generic sof_ipc4_pcm_stream_priv + - ASoC: SOF: pcm: Restrict DSP D0i3 during S0ix to IPC3 + - ASoC: acp: Support microphone from device Acer 315-24p + - ASoC: rt5645: Fix the electric noise due to the CBJ contacts floating + - ASoC: dt-bindings: rt5645: add cbj sleeve gpio property + - ASoC: rt722-sdca: modify channel number to support 4 channels + - ASoC: rt722-sdca: add headset microphone vrefo setting + - regulator: qcom-refgen: fix module autoloading + - regulator: vqmmc-ipq4019: fix module autoloading + - ASoC: cs35l41: Update DSP1RX5/6 Sources for DSP config + - ASoC: rt715: add vendor clear control register + - ASoC: rt715-sdca: volume step modification + - KVM: selftests: Add test for uaccesses to non-existent vgic-v2 CPUIF + - Input: xpad - add support for ASUS ROG RAIKIRI + - btrfs: take the cleaner_mutex earlier in qgroup disable + - EDAC/versal: Do not register for NOC errors + - fpga: dfl-pci: add PCI subdevice ID for Intel D5005 card + - bpf, x86: Fix PROBE_MEM runtime load check + - ALSA: emu10k1: make E-MU FPGA writes potentially more reliable + - softirq: Fix suspicious RCU usage in __do_softirq() + - platform/x86: ISST: Add Grand Ridge to HPM CPU list + - ASoC: da7219-aad: fix usage of device_get_named_child_node() + - ASoC: cs35l56: fix usages of device_get_named_child_node() + - ALSA: hda: intel-dsp-config: harden I2C/I2S codec detection + - Input: amimouse - mark driver struct with __refdata to prevent section + mismatch + - drm/amdgpu: Fix VRAM memory accounting + - drm/amd/display: Ensure that dmcub support flag is set for DCN20 + - drm/amd/display: Add dtbclk access to dcn315 + - drm/amd/display: Allocate zero bw after bw alloc enable + - drm/amd/display: Add VCO speed parameter for DCN31 FPU + - drm/amd/display: Fix DC mode screen flickering on DCN321 + - drm/amd/display: Disable seamless boot on 128b/132b encoding + - drm/amdkfd: Flush the process wq before creating a kfd_process + - x86/mm: Remove broken vsyscall emulation code from the page fault code + - nvme: find numa distance only if controller has valid numa id + - nvmet-auth: return the error code to the nvmet_auth_host_hash() callers + - nvmet-auth: replace pr_debug() with pr_err() to report an error. + - nvme: cancel pending I/O if nvme controller is in terminal state + - nvmet-tcp: fix possible memory leak when tearing down a controller + - nvmet: fix nvme status code when namespace is disabled + - nvme-tcp: strict pdu pacing to avoid send stalls on TLS + - epoll: be better about file lifetimes + - nvmet: prevent sprintf() overflow in nvmet_subsys_nsid_exists() + - openpromfs: finish conversion to the new mount API + - crypto: bcm - Fix pointer arithmetic + - firmware: qcom: qcm: fix unused qcom_scm_qseecom_allowlist + - mm/slub, kunit: Use inverted data to corrupt kmem cache + - firmware: raspberrypi: Use correct device for DMA mappings + - ecryptfs: Fix buffer size for tag 66 packet + - nilfs2: fix out-of-range warning + - parisc: add missing export of __cmpxchg_u8() + - crypto: ccp - drop platform ifdef checks + - crypto: x86/nh-avx2 - add missing vzeroupper + - crypto: x86/sha256-avx2 - add missing vzeroupper + - crypto: x86/sha512-avx2 - add missing vzeroupper + - s390/cio: fix tracepoint subchannel type field + - io_uring: use the right type for work_llist empty check + - rcu-tasks: Fix show_rcu_tasks_trace_gp_kthread buffer overflow + - rcu: Fix buffer overflow in print_cpu_stall_info() + - ARM: configs: sunxi: Enable DRM_DW_HDMI + - jffs2: prevent xattr node from overflowing the eraseblock + - libfs: Re-arrange locking in offset_iterate_dir() + - libfs: Define a minimum directory offset + - libfs: Add simple_offset_empty() + - maple_tree: Add mtree_alloc_cyclic() + - libfs: Convert simple directory offsets to use a Maple Tree + - libfs: Fix simple_offset_rename_exchange() + - libfs: Add simple_offset_rename() API + - shmem: Fix shmem_rename2() + - io-wq: write next_work before dropping acct_lock + - mm/userfaultfd: Do not place zeropages when zeropages are disallowed + - s390/mm: Re-enable the shared zeropage for !PV and !skeys KVM guests + - crypto: octeontx2 - add missing check for dma_map_single + - crypto: qat - improve error message in adf_get_arbiter_mapping() + - crypto: qat - improve error logging to be consistent across features + - soc: qcom: pmic_glink: don't traverse clients list without a lock + - soc: qcom: pmic_glink: notify clients about the current state + - firmware: qcom: scm: Fix __scm and waitq completion variable initialization + - soc: mediatek: cmdq: Fix typo of CMDQ_JUMP_RELATIVE + - null_blk: Fix missing mutex_destroy() at module removal + - crypto: qat - validate slices count returned by FW + - hwrng: stm32 - use logical OR in conditional + - hwrng: stm32 - put IP into RPM suspend on failure + - hwrng: stm32 - repair clock handling + - kunit/fortify: Fix mismatched kvalloc()/vfree() usage + - io_uring/net: remove dependency on REQ_F_PARTIAL_IO for sr->done_io + - io_uring/net: fix sendzc lazy wake polling + - soc: qcom: pmic_glink: Make client-lock non-sleeping + - lkdtm: Disable CFI checking for perms functions + - md: fix resync softlockup when bitmap size is less than array size + - crypto: qat - specify firmware files for 402xx + - block: refine the EOF check in blkdev_iomap_begin + - block: fix and simplify blkdevparts= cmdline parsing + - block: support to account io_ticks precisely + - wifi: ath10k: poll service ready message before failing + - wifi: brcmfmac: pcie: handle randbuf allocation failure + - wifi: ath11k: don't force enable power save on non-running vdevs + - bpftool: Fix missing pids during link show + - libbpf: Prevent null-pointer dereference when prog to load has no BTF + - wifi: ath12k: use correct flag field for 320 MHz channels + - wifi: mt76: mt7915: workaround too long expansion sparse warnings + - x86/boot: Ignore relocations in .notes sections in walk_relocs() too + - wifi: ieee80211: fix ieee80211_mle_basic_sta_prof_size_ok() + - wifi: iwlwifi: mvm: Do not warn on invalid link on scan complete + - wifi: iwlwifi: mvm: allocate STA links only for active links + - wifi: mac80211: don't select link ID if not provided in scan request + - wifi: iwlwifi: implement can_activate_links callback + - wifi: iwlwifi: mvm: fix active link counting during recovery + - wifi: iwlwifi: mvm: select STA mask only for active links + - wifi: iwlwifi: reconfigure TLC during HW restart + - wifi: iwlwifi: mvm: fix check in iwl_mvm_sta_fw_id_mask + - sched/fair: Add EAS checks before updating root_domain::overutilized + - ACPI: bus: Indicate support for _TFP thru _OSC + - ACPI: bus: Indicate support for more than 16 p-states thru _OSC + - ACPI: bus: Indicate support for the Generic Event Device thru _OSC + - ACPI: Fix Generic Initiator Affinity _OSC bit + - ACPI: bus: Indicate support for IRQ ResourceSource thru _OSC + - enetc: avoid truncating error message + - qed: avoid truncating work queue length + - mlx5: avoid truncating error message + - mlx5: stop warning for 64KB pages + - bitops: add missing prototype check + - dlm: fix user space lock decision to copy lvb + - wifi: carl9170: re-fix fortified-memset warning + - bpftool: Mount bpffs on provided dir instead of parent dir + - bpf: Pack struct bpf_fib_lookup + - bpf: prevent r10 register from being marked as precise + - x86/microcode/AMD: Avoid -Wformat warning with clang-15 + - scsi: ufs: qcom: Perform read back after writing reset bit + - scsi: ufs: qcom: Perform read back after writing REG_UFS_SYS1CLK_1US + - scsi: ufs: qcom: Perform read back after writing unipro mode + - scsi: ufs: qcom: Perform read back after writing CGC enable + - scsi: ufs: cdns-pltfrm: Perform read back after writing HCLKDIV + - scsi: ufs: core: Perform read back after writing UTP_TASK_REQ_LIST_BASE_H + - scsi: ufs: core: Perform read back after disabling interrupts + - scsi: ufs: core: Perform read back after disabling UIC_COMMAND_COMPL + - ACPI: LPSS: Advertise number of chip selects via property + - EDAC/skx_common: Allow decoding of SGX addresses + - locking/atomic/x86: Correct the definition of __arch_try_cmpxchg128() + - irqchip/alpine-msi: Fix off-by-one in allocation error path + - irqchip/loongson-pch-msi: Fix off-by-one on allocation error path + - ACPI: disable -Wstringop-truncation + - gfs2: Don't forget to complete delayed withdraw + - gfs2: Fix "ignore unlock failures after withdraw" + - arm64: Remove unnecessary irqflags alternative.h include + - x86/boot/64: Clear most of CR4 in startup_64(), except PAE, MCE and LA57 + - selftests/bpf: Fix umount cgroup2 error in test_sockmap + - tcp: increase the default TCP scaling ratio + - cpufreq: exit() callback is optional + - x86/pat: Introduce lookup_address_in_pgd_attr() + - x86/pat: Restructure _lookup_address_cpa() + - x86/pat: Fix W^X violation false-positives when running as Xen PV guest + - udp: Avoid call to compute_score on multiple sites + - openrisc: traps: Don't send signals to kernel mode threads + - cppc_cpufreq: Fix possible null pointer dereference + - wifi: iwlwifi: mvm: init vif works only once + - scsi: libsas: Fix the failure of adding phy with zero-address to port + - scsi: hpsa: Fix allocation size for Scsi_Host private data + - x86/purgatory: Switch to the position-independent small code model + - wifi: ath12k: fix out-of-bound access of qmi_invoke_handler() + - thermal/drivers/mediatek/lvts_thermal: Add coeff for mt8192 + - thermal/drivers/tsens: Fix null pointer dereference + - dt-bindings: thermal: loongson,ls2k-thermal: Add Loongson-2K0500 compatible + - dt-bindings: thermal: loongson,ls2k-thermal: Fix incorrect compatible + definition + - wifi: ath10k: Fix an error code problem in + ath10k_dbg_sta_write_peer_debug_trigger() + - gfs2: Remove ill-placed consistency check + - gfs2: Fix potential glock use-after-free on unmount + - gfs2: finish_xmote cleanup + - gfs2: do_xmote fixes + - thermal/debugfs: Avoid excessive updates of trip point statistics + - selftests/bpf: Fix a fd leak in error paths in open_netns + - scsi: ufs: core: mcq: Fix ufshcd_mcq_sqe_search() + - cpufreq: brcmstb-avs-cpufreq: ISO C90 forbids mixed declarations + - wifi: ath10k: populate board data for WCN3990 + - net: dsa: mv88e6xxx: Add support for model-specific pre- and post-reset + handlers + - net: dsa: mv88e6xxx: Avoid EEPROM timeout without EEPROM on 88E6250-family + switches + - tcp: avoid premature drops in tcp_add_backlog() + - thermal/debugfs: Create records for cdev states as they get used + - thermal/debugfs: Pass cooling device state to thermal_debug_cdev_add() + - pwm: sti: Prepare removing pwm_chip from driver data + - pwm: sti: Simplify probe function using devm functions + - drivers/perf: hisi_pcie: Fix out-of-bound access when valid event group + - drivers/perf: hisi: hns3: Fix out-of-bound access when valid event group + - drivers/perf: hisi: hns3: Actually use devm_add_action_or_reset() + - net: give more chances to rcu in netdev_wait_allrefs_any() + - macintosh/via-macii: Fix "BUG: sleeping function called from invalid + context" + - wifi: carl9170: add a proper sanity check for endpoints + - bpf: Fix verifier assumptions about socket->sk + - selftests/bpf: Run cgroup1_hierarchy test in own mount namespace + - wifi: ar5523: enable proper endpoint verification + - pwm: Drop useless member .of_pwm_n_cells of struct pwm_chip + - pwm: Let the of_xlate callbacks accept references without period + - pwm: Drop duplicate check against chip->npwm in of_pwm_xlate_with_flags() + - pwm: Reorder symbols in core.c + - pwm: Provide an inline function to get the parent device of a given chip + - pwm: meson: Change prototype of a few helpers to prepare further changes + - pwm: meson: Make use of pwmchip_parent() accessor + - pwm: meson: Add check for error from clk_round_rate() + - pwm: meson: Use mul_u64_u64_div_u64() for frequency calculating + - bpf: Add BPF_PROG_TYPE_CGROUP_SKB attach type enforcement in BPF_LINK_CREATE + - sh: kprobes: Merge arch_copy_kprobe() into arch_prepare_kprobe() + - Revert "sh: Handle calling csum_partial with misaligned data" + - wifi: mt76: mt7603: fix tx queue of loopback packets + - wifi: mt76: mt7603: add wpdma tx eof flag for PSE client reset + - wifi: mt76: mt7996: fix size of txpower MCU command + - wifi: mt76: mt7925: ensure 4-byte alignment for suspend & wow command + - wifi: mt76: mt7996: fix uninitialized variable in mt7996_irq_tasklet() + - wifi: mt76: mt7996: fix potential memory leakage when reading chip + temperature + - libbpf: Fix error message in attach_kprobe_multi + - wifi: nl80211: Avoid address calculations via out of bounds array indexing + - wifi: rtw89: wow: refine WoWLAN flows of HCI interrupts and low power mode + - selftests/binderfs: use the Makefile's rules, not Make's implicit rules + - selftests/resctrl: fix clang build failure: use LOCAL_HDRS + - selftests: default to host arch for LLVM builds + - kunit: Fix kthread reference + - kunit: unregister the device on error + - kunit: bail out early in __kunit_test_suites_init() if there are no suites + to test + - selftests/bpf: Fix pointer arithmetic in test_xdp_do_redirect + - HID: intel-ish-hid: ipc: Add check for pci_alloc_irq_vectors + - scsi: bfa: Ensure the copied buf is NUL terminated + - scsi: qedf: Ensure the copied buf is NUL terminated + - scsi: qla2xxx: Fix debugfs output for fw_resource_count + - gpio: nuvoton: Fix sgpio irq handle error + - x86/numa: Fix SRAT lookup of CFMWS ranges with numa_fill_memblks() + - wifi: mwl8k: initialize cmd->addr[] properly + - HID: amd_sfh: Handle "no sensors" in PM operations + - usb: aqc111: stop lying about skb->truesize + - net: usb: sr9700: stop lying about skb->truesize + - m68k: Fix spinlock race in kernel thread creation + - m68k: mac: Fix reboot hang on Mac IIci + - dm-delay: fix workqueue delay_timer race + - dm-delay: fix hung task introduced by kthread mode + - dm-delay: fix max_delay calculations + - ptp: ocp: fix DPLL functions + - net: ipv6: fix wrong start position when receive hop-by-hop fragment + - eth: sungem: remove .ndo_poll_controller to avoid deadlocks + - selftests: net: add missing config for amt.sh + - selftests: net: move amt to socat for better compatibility + - net: ethernet: mediatek: split tx and rx fields in mtk_soc_data struct + - net: ethernet: mediatek: use ADMAv1 instead of ADMAv2.0 on MT7981 and MT7986 + - ice: Fix package download algorithm + - net: ethernet: cortina: Locking fixes + - af_unix: Fix data races in unix_release_sock/unix_stream_sendmsg + - net: usb: smsc95xx: stop lying about skb->truesize + - net: openvswitch: fix overwriting ct original tuple for ICMPv6 + - ipv6: sr: add missing seg6_local_exit + - ipv6: sr: fix incorrect unregister order + - ipv6: sr: fix invalid unregister error path + - net/mlx5: Fix peer devlink set for SF representor devlink port + - net/mlx5: Reload only IB representors upon lag disable/enable + - net/mlx5: Add a timeout to acquire the command queue semaphore + - net/mlx5: Discard command completions in internal error + - s390/bpf: Emit a barrier for BPF_FETCH instructions + - riscv, bpf: make some atomic operations fully ordered + - ax25: Use kernel universal linked list to implement ax25_dev_list + - ax25: Fix reference count leak issues of ax25_dev + - ax25: Fix reference count leak issue of net_device + - dpll: fix return value check for kmemdup + - net: fec: remove .ndo_poll_controller to avoid deadlocks + - mptcp: SO_KEEPALIVE: fix getsockopt support + - mptcp: cleanup writer wake-up + - mptcp: avoid some duplicate code in socket option handling + - mptcp: implement TCP_NOTSENT_LOWAT support + - mptcp: cleanup SOL_TCP handling + - mptcp: fix full TCP keep-alive support + - net: stmmac: Offload queueMaxSDU from tc-taprio + - net: stmmac: est: Per Tx-queue error count for HLBF + - net: stmmac: Report taprio offload status + - net: stmmac: move the EST lock to struct stmmac_priv + - net: micrel: Fix receiving the timestamp in the frame for lan8841 + - Bluetooth: compute LE flow credits based on recvbuf space + - Bluetooth: qca: Fix error code in qca_read_fw_build_info() + - Bluetooth: ISO: Add hcon for listening bis sk + - Bluetooth: ISO: Clean up returns values in iso_connect_ind() + - Bluetooth: ISO: Make iso_get_sock_listen generic + - Bluetooth: Remove usage of the deprecated ida_simple_xx() API + - Bluetooth: hci_event: Remove code to removed CONFIG_BT_HS + - Bluetooth: HCI: Remove HCI_AMP support + - ice: make ice_vsi_cfg_rxq() static + - ice: make ice_vsi_cfg_txq() static + - overflow: Change DEFINE_FLEX to take __counted_by member + - Bluetooth: hci_conn, hci_sync: Use __counted_by() to avoid -Wfamnae warnings + - Bluetooth: hci_core: Fix not handling hdev->le_num_of_adv_sets=1 + - drm/bridge: Fix improper bridge init order with pre_enable_prev_first + - drm/ci: update device type for volteer devices + - drm/nouveau/dp: Fix incorrect return code in r535_dp_aux_xfer() + - drm/omapdrm: Fix console by implementing fb_dirty + - drm/omapdrm: Fix console with deferred ops + - printk: Let no_printk() use _printk() + - dev_printk: Add and use dev_no_printk() + - drm/lcdif: Do not disable clocks on already suspended hardware + - drm/dp: Don't attempt AUX transfers when eDP panels are not powered + - drm/panel: atna33xc20: Fix unbalanced regulator in the case HPD doesn't + assert + - drm/amd/display: Fix potential index out of bounds in color transformation + function + - drm/amd/display: Remove redundant condition in dcn35_calc_blocks_to_gate() + - ASoC: Intel: Disable route checks for Skylake boards + - ASoC: Intel: avs: ssm4567: Do not ignore route checks + - mtd: core: Report error if first mtd_otp_size() call fails in + mtd_otp_nvmem_add() + - mtd: rawnand: hynix: fixed typo + - drm/imagination: avoid -Woverflow warning + - ASoC: mediatek: Assign dummy when codec not specified for a DAI link + - drm/panel: ltk050h3146w: add MIPI_DSI_MODE_VIDEO to LTK050H3148W flags + - drm/panel: ltk050h3146w: drop duplicate commands from LTK050H3148W init + - fbdev: shmobile: fix snprintf truncation + - ASoC: kirkwood: Fix potential NULL dereference + - drm/meson: vclk: fix calculation of 59.94 fractional rates + - drm/mediatek: Add 0 size check to mtk_drm_gem_obj + - drm/mediatek: Init `ddp_comp` with devm_kcalloc() + - ASoC: SOF: Intel: hda-dai: fix channel map configuration for aggregated + dailink + - powerpc/fsl-soc: hide unused const variable + - ASoC: SOF: Intel: mtl: Correct rom_status_reg + - ASoC: SOF: Intel: lnl: Correct rom_status_reg + - ASoC: SOF: Intel: mtl: Disable interrupts when firmware boot failed + - ASoC: SOF: Intel: mtl: Implement firmware boot state check + - fbdev: sisfb: hide unused variables + - selftests: cgroup: skip test_cgcore_lesser_ns_open when cgroup2 mounted + without nsdelegate + - ASoC: Intel: avs: Restore stream decoupling on prepare + - ASoC: Intel: avs: Fix ASRC module initialization + - ASoC: Intel: avs: Fix potential integer overflow + - ASoC: Intel: avs: Test result of avs_get_module_entry() + - media: ngene: Add dvb_ca_en50221_init return value check + - staging: media: starfive: Remove links when unregistering devices + - media: rcar-vin: work around -Wenum-compare-conditional warning + - media: radio-shark2: Avoid led_names truncations + - drm: bridge: cdns-mhdp8546: Fix possible null pointer dereference + - platform/x86: xiaomi-wmi: Fix race condition when reporting key events + - drm/msm/dp: allow voltage swing / pre emphasis of 3 + - drm/msm/dp: Avoid a long timeout for AUX transfer if nothing connected + - media: ipu3-cio2: Request IRQ earlier + - media: dt-bindings: ovti,ov2680: Fix the power supply names + - media: i2c: et8ek8: Don't strip remove function when driver is builtin + - media: v4l2-subdev: Fix stream handling for crop API + - fbdev: sh7760fb: allow modular build + - media: atomisp: ssh_css: Fix a null-pointer dereference in + load_video_binaries + - drm/arm/malidp: fix a possible null pointer dereference + - drm: vc4: Fix possible null pointer dereference + - ASoC: tracing: Export SND_SOC_DAPM_DIR_OUT to its value + - drm/bridge: anx7625: Don't log an error when DSI host can't be found + - drm/bridge: icn6211: Don't log an error when DSI host can't be found + - drm/bridge: lt8912b: Don't log an error when DSI host can't be found + - drm/bridge: lt9611: Don't log an error when DSI host can't be found + - drm/bridge: lt9611uxc: Don't log an error when DSI host can't be found + - drm/bridge: tc358775: Don't log an error when DSI host can't be found + - drm/bridge: dpc3433: Don't log an error when DSI host can't be found + - drm/panel: novatek-nt35950: Don't log an error when DSI host can't be found + - drm/bridge: anx7625: Update audio status while detecting + - drm/panel: simple: Add missing Innolux G121X1-L03 format, flags, connector + - ALSA: hda: cs35l41: Remove Speaker ID for Lenovo Legion slim 7 16ARHA7 + - drm/mipi-dsi: use correct return type for the DSC functions + - media: uvcvideo: Add quirk for Logitech Rally Bar + - drm/rockchip: vop2: Do not divide height twice for YUV + - drm/edid: Parse topology block for all DispID structure v1.x + - media: cadence: csi2rx: configure DPHY before starting source stream + - clk: samsung: exynosautov9: fix wrong pll clock id value + - RDMA/mlx5: Uncacheable mkey has neither rb_key or cache_ent + - RDMA/mlx5: Change check for cacheable mkeys + - RDMA/mlx5: Adding remote atomic access flag to updatable flags + - clk: mediatek: pllfh: Don't log error for missing fhctl node + - iommu: Undo pasid attachment only for the devices that have succeeded + - RDMA/hns: Fix return value in hns_roce_map_mr_sg + - RDMA/hns: Fix deadlock on SRQ async events. + - RDMA/hns: Fix UAF for cq async event + - RDMA/hns: Fix GMV table pagesize + - RDMA/hns: Use complete parentheses in macros + - RDMA/hns: Modify the print level of CQE error + - clk: mediatek: mt8365-mm: fix DPI0 parent + - clk: rs9: fix wrong default value for clock amplitude + - clk: qcom: clk-alpha-pll: remove invalid Stromer register offset + - RDMA/rxe: Fix seg fault in rxe_comp_queue_pkt + - RDMA/rxe: Allow good work requests to be executed + - RDMA/rxe: Fix incorrect rxe_put in error path + - IB/mlx5: Use __iowrite64_copy() for write combining stores + - clk: renesas: r8a779a0: Fix CANFD parent clock + - clk: renesas: r9a07g043: Add clock and reset entry for PLIC + - lib/test_hmm.c: handle src_pfns and dst_pfns allocation failure + - mm/ksm: fix ksm exec support for prctl + - clk: qcom: dispcc-sm8450: fix DisplayPort clocks + - clk: qcom: dispcc-sm6350: fix DisplayPort clocks + - clk: qcom: dispcc-sm8550: fix DisplayPort clocks + - clk: qcom: dispcc-sm8650: fix DisplayPort clocks + - clk: qcom: mmcc-msm8998: fix venus clock issue + - x86/insn: Fix PUSH instruction in x86 instruction decoder opcode map + - x86/insn: Add VEX versions of VPDPBUSD, VPDPBUSDS, VPDPWSSD and VPDPWSSDS + - ext4: avoid excessive credit estimate in ext4_tmpfile() + - RDMA/mana_ib: Introduce helpers to create and destroy mana queues + - RDMA/mana_ib: Use struct mana_ib_queue for CQs + - RDMA/mana_ib: boundary check before installing cq callbacks + - virt: acrn: stop using follow_pfn + - drivers/virt/acrn: fix PFNMAP PTE checks in acrn_vm_ram_map() + - sunrpc: removed redundant procp check + - nfsd: don't create nfsv4recoverydir in nfsdfs when not used. + - ext4: fix potential unnitialized variable + - ext4: remove the redundant folio_wait_stable() + - clk: qcom: Fix SC_CAMCC_8280XP dependencies + - [Config] updateconfigs for SC_CAMCC_8280XP + - clk: qcom: Fix SM_GPUCC_8650 dependencies + - [Config] updateconfigs for SM_GPUCC_8650 + - clk: qcom: apss-ipq-pll: fix PLL rate for IPQ5018 + - of: module: add buffer overflow check in of_modalias() + - bnxt_re: avoid shift undefined behavior in bnxt_qplib_alloc_init_hwq + - SUNRPC: Fix gss_free_in_token_pages() + - selftests/damon/_damon_sysfs: check errors from nr_schemes file reads + - selftests/kcmp: remove unused open mode + - RDMA/IPoIB: Fix format truncation compilation errors + - RDMA/cma: Fix kmemleak in rdma_core observed during blktests nvme/rdma use + siw + - samples/landlock: Fix incorrect free in populate_ruleset_net + - tracing/user_events: Prepare find/delete for same name events + - tracing/user_events: Fix non-spaced field matching + - modules: Drop the .export_symbol section from the final modules + - net: bridge: xmit: make sure we have at least eth header len bytes + - selftests: net: bridge: increase IGMP/MLD exclude timeout membership + interval + - net: bridge: mst: fix vlan use-after-free + - net: qrtr: ns: Fix module refcnt + - selftests/net/lib: no need to record ns name if it already exist + - idpf: don't skip over ethtool tcp-data-split setting + - netrom: fix possible dead-lock in nr_rt_ioctl() + - af_packet: do not call packet_read_pending() from tpacket_destruct_skb() + - sched/fair: Allow disabling sched_balance_newidle with + sched_relax_domain_level + - sched/core: Fix incorrect initialization of the 'burst' parameter in + cpu_max_write() + - net: wangxun: fix to change Rx features + - net: wangxun: match VLAN CTAG and STAG features + - net: txgbe: move interrupt codes to a separate file + - net: txgbe: use irq_domain for interrupt controller + - net: txgbe: fix to control VLAN strip + - l2tp: fix ICMP error handling for UDP-encap sockets + - io_uring/net: ensure async prep handlers always initialize ->done_io + - pwm: Fix setting period with #pwm-cells = <1> and of_pwm_single_xlate() + - net: txgbe: fix to clear interrupt status after handling IRQ + - net: txgbe: fix GPIO interrupt blocking + - Linux 6.8.12 + + * Noble update: v6.8.11 upstream stable release (LP: #2070355) + - drm/amd/display: Fix division by zero in setup_dsc_config + - net: ks8851: Fix another TX stall caused by wrong ISR flag handling + - ice: pass VSI pointer into ice_vc_isvalid_q_id + - ice: remove unnecessary duplicate checks for VF VSI ID + - Bluetooth: L2CAP: Fix slab-use-after-free in l2cap_connect() + - Bluetooth: L2CAP: Fix div-by-zero in l2cap_le_flowctl_init() + - KEYS: trusted: Fix memory leak in tpm2_key_encode() + - erofs: get rid of erofs_fs_context + - erofs: reliably distinguish block based and fscache mode + - binder: fix max_thread type inconsistency + - usb: dwc3: Wait unconditionally after issuing EndXfer command + - net: usb: ax88179_178a: fix link status when link is set to down/up + - usb: typec: ucsi: displayport: Fix potential deadlock + - usb: typec: tipd: fix event checking for tps25750 + - usb: typec: tipd: fix event checking for tps6598x + - serial: kgdboc: Fix NMI-safety problems from keyboard reset code + - remoteproc: mediatek: Make sure IPI buffer fits in L2TCM + - KEYS: trusted: Do not use WARN when encode fails + - admin-guide/hw-vuln/core-scheduling: fix return type of PR_SCHED_CORE_GET + - docs: kernel_include.py: Cope with docutils 0.21 + - Docs/admin-guide/mm/damon/usage: fix wrong example of DAMOS filter matching + sysfs file + - block: add a disk_has_partscan helper + - block: add a partscan sysfs attribute for disks + - Linux 6.8.11 + + * Noble update: v6.8.10 upstream stable release (LP: #2070349) + - rust: module: place generated init_module() function in .init.text + - rust: macros: fix soundness issue in `module!` macro + - wifi: nl80211: don't free NULL coalescing rule + - pinctrl: pinctrl-aspeed-g6: Fix register offset for pinconf of GPIOR-T + - pinctrl/meson: fix typo in PDM's pin name + - pinctrl: core: delete incorrect free in pinctrl_enable() + - pinctrl: mediatek: paris: Fix PIN_CONFIG_INPUT_SCHMITT_ENABLE readback + - pinctrl: mediatek: paris: Rework support for + PIN_CONFIG_{INPUT,OUTPUT}_ENABLE + - sunrpc: add a struct rpc_stats arg to rpc_create_args + - nfs: expose /proc/net/sunrpc/nfs in net namespaces + - nfs: make the rpc_stat per net namespace + - nfs: Handle error of rpc_proc_register() in nfs_net_init(). + - pinctrl: baytrail: Fix selecting gpio pinctrl state + - power: rt9455: hide unused rt9455_boost_voltage_values + - power: supply: mt6360_charger: Fix of_match for usb-otg-vbus regulator + - pinctrl: devicetree: fix refcount leak in pinctrl_dt_to_map() + - nfsd: rename NFSD_NET_* to NFSD_STATS_* + - nfsd: expose /proc/net/sunrpc/nfsd in net namespaces + - nfsd: make all of the nfsd stats per-network namespace + - NFSD: add support for CB_GETATTR callback + - NFSD: Fix nfsd4_encode_fattr4() crasher + - regulator: mt6360: De-capitalize devicetree regulator subnodes + - regulator: change stubbed devm_regulator_get_enable to return Ok + - regulator: change devm_regulator_get_enable_optional() stub to return Ok + - bpf, kconfig: Fix DEBUG_INFO_BTF_MODULES Kconfig definition + - bpf, skmsg: Fix NULL pointer dereference in sk_psock_skb_ingress_enqueue + - regmap: Add regmap_read_bypassed() + - ASoC: SOF: Intel: add default firmware library path for LNL + - nvme: fix warn output about shared namespaces without CONFIG_NVME_MULTIPATH + - bpf: Fix a verifier verbose message + - spi: axi-spi-engine: use common AXI macros + - spi: axi-spi-engine: fix version format string + - spi: hisi-kunpeng: Delete the dump interface of data registers in debugfs + - bpf, arm64: Fix incorrect runtime stats + - riscv, bpf: Fix incorrect runtime stats + - ASoC: Intel: avs: Set name of control as in topology + - ASoC: codecs: wsa881x: set clk_stop_mode1 flag + - s390/mm: Fix storage key clearing for guest huge pages + - s390/mm: Fix clearing storage keys for huge pages + - arm32, bpf: Reimplement sign-extension mov instruction + - xdp: use flags field to disambiguate broadcast redirect + - efi/unaccepted: touch soft lockup during memory accept + - ice: ensure the copied buf is NUL terminated + - bna: ensure the copied buf is NUL terminated + - octeontx2-af: avoid off-by-one read from userspace + - thermal/debugfs: Free all thermal zone debug memory on zone removal + - thermal/debugfs: Fix two locking issues with thermal zone debug + - nsh: Restore skb->{protocol,data,mac_header} for outer header in + nsh_gso_segment(). + - net l2tp: drop flow hash on forward + - thermal/debugfs: Prevent use-after-free from occurring after cdev removal + - s390/vdso: Add CFI for RA register to asm macro vdso_func + - Fix a potential infinite loop in extract_user_to_sg() + - ALSA: emu10k1: fix E-MU card dock presence monitoring + - ALSA: emu10k1: factor out snd_emu1010_load_dock_firmware() + - ALSA: emu10k1: move the whole GPIO event handling to the workqueue + - ALSA: emu10k1: fix E-MU dock initialization + - net: qede: sanitize 'rc' in qede_add_tc_flower_fltr() + - net: qede: use return from qede_parse_flow_attr() for flower + - net: qede: use return from qede_parse_flow_attr() for flow_spec + - net: qede: use return from qede_parse_actions() + - vxlan: Fix racy device stats updates. + - vxlan: Add missing VNI filter counter update in arp_reduce(). + - ASoC: meson: axg-fifo: use FIELD helpers + - ASoC: meson: axg-fifo: use threaded irq to check periods + - ASoC: meson: axg-card: make links nonatomic + - ASoC: meson: axg-tdm-interface: manage formatters in trigger + - ASoC: meson: cards: select SND_DYNAMIC_MINORS + - ALSA: hda: intel-sdw-acpi: fix usage of device_get_named_child_node() + - s390/cio: Ensure the copied buf is NUL terminated + - cxgb4: Properly lock TX queue for the selftest. + - net: dsa: mv88e6xxx: Fix number of databases for 88E6141 / 88E6341 + - drm/amdgpu: fix doorbell regression + - spi: fix null pointer dereference within spi_sync + - net: bridge: fix multicast-to-unicast with fraglist GSO + - net: core: reject skb_copy(_expand) for fraglist GSO skbs + - rxrpc: Clients must accept conn from any address + - tipc: fix a possible memleak in tipc_buf_append + - vxlan: Pull inner IP header in vxlan_rcv(). + - s390/qeth: Fix kernel panic after setting hsuid + - drm/panel: ili9341: Correct use of device property APIs + - [Config] updateconfigs for DRM_PANEL_ILITEK_ILI9341 + - drm/panel: ili9341: Respect deferred probe + - drm/panel: ili9341: Use predefined error codes + - ipv4: Fix uninit-value access in __ip_make_skb() + - net: gro: fix udp bad offset in socket lookup by adding + {inner_}network_offset to napi_gro_cb + - net: gro: add flush check in udp_gro_receive_segment + - drm/xe/display: Fix ADL-N detection + - clk: qcom: smd-rpm: Restore msm8976 num_clk + - clk: sunxi-ng: h6: Reparent CPUX during PLL CPUX rate change + - powerpc/pseries: make max polling consistent for longer H_CALLs + - powerpc/pseries/iommu: LPAR panics during boot up with a frozen PE + - EDAC/versal: Do not log total error counts + - swiotlb: initialise restricted pool list_head when SWIOTLB_DYNAMIC=y + - KVM: arm64: vgic-v2: Check for non-NULL vCPU in vgic_v2_parse_attr() + - exfat: fix timing of synchronizing bitmap and inode + - firmware: microchip: don't unconditionally print validation success + - scsi: ufs: core: Fix MCQ MAC configuration + - scsi: lpfc: Move NPIV's transport unregistration to after resource clean up + - scsi: lpfc: Remove IRQF_ONESHOT flag from threaded IRQ handling + - scsi: lpfc: Update lpfc_ramp_down_queue_handler() logic + - scsi: lpfc: Replace hbalock with ndlp lock in lpfc_nvme_unregister_port() + - scsi: lpfc: Release hbalock before calling lpfc_worker_wake_up() + - scsi: lpfc: Use a dedicated lock for ras_fwlog state + - gfs2: Fix invalid metadata access in punch_hole + - fs/9p: fix uninitialized values during inode evict + - wifi: mac80211: fix ieee80211_bss_*_flags kernel-doc + - wifi: cfg80211: fix rdev_dump_mpp() arguments order + - wifi: mac80211: fix prep_connection error path + - wifi: iwlwifi: read txq->read_ptr under lock + - wifi: iwlwifi: mvm: guard against invalid STA ID on removal + - net: mark racy access on sk->sk_rcvbuf + - drm/xe: Fix END redefinition + - scsi: mpi3mr: Avoid memcpy field-spanning write WARNING + - scsi: bnx2fc: Remove spin_lock_bh while releasing resources after upload + - btrfs: return accurate error code on open failure in open_fs_devices() + - drm/amdkfd: Check cgroup when returning DMABuf info + - drm/amdkfd: range check cp bad op exception interrupts + - bpf: Check bloom filter map value size + - selftests/ftrace: Fix event filter target_func selection + - kbuild: Disable KCSAN for autogenerated *.mod.c intermediaries + - ASoC: SOF: Intel: hda-dsp: Skip IMR boot on ACE platforms in case of S3 + suspend + - regulator: tps65132: Add of_match table + - OSS: dmasound/paula: Mark driver struct with __refdata to prevent section + mismatch + - scsi: ufs: core: WLUN suspend dev/link state error recovery + - scsi: libsas: Align SMP request allocation to ARCH_DMA_MINALIGN + - scsi: ufs: core: Fix MCQ mode dev command timeout + - ALSA: line6: Zero-initialize message buffers + - block: fix overflow in blk_ioctl_discard() + - ASoC: codecs: ES8326: Solve error interruption issue + - ASoC: codecs: ES8326: modify clock table + - net: bcmgenet: Reset RBUF on first open + - vboxsf: explicitly deny setlease attempts + - ata: sata_gemini: Check clk_enable() result + - firewire: ohci: mask bus reset interrupts between ISR and bottom half + - tools/power turbostat: Fix added raw MSR output + - tools/power turbostat: Increase the limit for fd opened + - tools/power turbostat: Fix Bzy_MHz documentation typo + - tools/power turbostat: Do not print negative LPI residency + - tools/power turbostat: Expand probe_intel_uncore_frequency() + - tools/power turbostat: Print ucode revision only if valid + - tools/power turbostat: Fix warning upon failed /dev/cpu_dma_latency read + - btrfs: make btrfs_clear_delalloc_extent() free delalloc reserve + - btrfs: always clear PERTRANS metadata during commit + - memblock tests: fix undefined reference to `early_pfn_to_nid' + - memblock tests: fix undefined reference to `panic' + - memblock tests: fix undefined reference to `BIT' + - nouveau/gsp: Avoid addressing beyond end of rpc->entries + - scsi: target: Fix SELinux error when systemd-modules loads the target module + - scsi: hisi_sas: Handle the NCQ error returned by D2H frame + - blk-iocost: avoid out of bounds shift + - accel/ivpu: Remove d3hot_after_power_off WA + - accel/ivpu: Improve clarity of MMU error messages + - accel/ivpu: Fix missed error message after VPU rename + - platform/x86: acer-wmi: Add support for Acer PH18-71 + - gpu: host1x: Do not setup DMA for virtual devices + - MIPS: scall: Save thread_info.syscall unconditionally on entry + - tools/power/turbostat: Fix uncore frequency file string + - net: add copy_safe_from_sockptr() helper + - nfc: llcp: fix nfc_llcp_setsockopt() unsafe copies + - drm/amdgpu: Refine IB schedule error logging + - drm/amd/display: add DCN 351 version for microcode load + - drm/amdgpu: add smu 14.0.1 discovery support + - drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2 + - drm/amd/display: Skip on writeback when it's not applicable + - drm/amd/pm: fix the high voltage issue after unload + - drm/amdgpu: Fix VCN allocation in CPX partition + - amd/amdkfd: sync all devices to wait all processes being evicted + - selftests: timers: Fix valid-adjtimex signed left-shift undefined behavior + - Drivers: hv: vmbus: Leak pages if set_memory_encrypted() fails + - Drivers: hv: vmbus: Track decrypted status in vmbus_gpadl + - hv_netvsc: Don't free decrypted memory + - uio_hv_generic: Don't free decrypted memory + - Drivers: hv: vmbus: Don't free ring buffers that couldn't be re-encrypted + - drm/xe/xe_migrate: Cast to output precision before multiplying operands + - drm/xe: Label RING_CONTEXT_CONTROL as masked + - smb3: fix broken reconnect when password changing on the server by allowing + password rotation + - iommu: mtk: fix module autoloading + - fs/9p: only translate RWX permissions for plain 9P2000 + - fs/9p: translate O_TRUNC into OTRUNC + - fs/9p: fix the cache always being enabled on files with qid flags + - 9p: explicitly deny setlease attempts + - powerpc/crypto/chacha-p10: Fix failure on non Power10 + - gpio: wcove: Use -ENOTSUPP consistently + - gpio: crystalcove: Use -ENOTSUPP consistently + - clk: Don't hold prepare_lock when calling kref_put() + - fs/9p: remove erroneous nlink init from legacy stat2inode + - fs/9p: drop inodes immediately on non-.L too + - gpio: lpc32xx: fix module autoloading + - drm/nouveau/dp: Don't probe eDP ports twice harder + - platform/x86/amd: pmf: Decrease error message to debug + - platform/x86: ISST: Add Granite Rapids-D to HPM CPU list + - drm/radeon: silence UBSAN warning (v3) + - net:usb:qmi_wwan: support Rolling modules + - blk-iocost: do not WARN if iocg was already offlined + - SUNRPC: add a missing rpc_stat for TCP TLS + - qibfs: fix dentry leak + - xfrm: Preserve vlan tags for transport mode software GRO + - ARM: 9381/1: kasan: clear stale stack poison + - tcp: defer shutdown(SEND_SHUTDOWN) for TCP_SYN_RECV sockets + - tcp: Use refcount_inc_not_zero() in tcp_twsk_unique(). + - Bluetooth: Fix use-after-free bugs caused by sco_sock_timeout + - Bluetooth: msft: fix slab-use-after-free in msft_do_close() + - arm64: dts: mediatek: mt8183-pico6: Fix bluetooth node + - Bluetooth: HCI: Fix potential null-ptr-deref + - Bluetooth: l2cap: fix null-ptr-deref in l2cap_chan_timeout + - net: ks8851: Queue RX packets in IRQ handler instead of disabling BHs + - rtnetlink: Correct nested IFLA_VF_VLAN_LIST attribute validation + - hwmon: (corsair-cpro) Use a separate buffer for sending commands + - hwmon: (corsair-cpro) Use complete_all() instead of complete() in + ccp_raw_event() + - hwmon: (corsair-cpro) Protect ccp->wait_input_report with a spinlock + - phonet: fix rtm_phonet_notify() skb allocation + - netlink: specs: Add missing bridge linkinfo attrs + - nfc: nci: Fix kcov check in nci_rx_work() + - net: bridge: fix corrupted ethernet header on multicast-to-unicast + - ipv6: Fix potential uninit-value access in __ip6_make_skb() + - selftests: test_bridge_neigh_suppress.sh: Fix failures due to duplicate MAC + - rxrpc: Fix the names of the fields in the ACK trailer struct + - rxrpc: Fix congestion control algorithm + - rxrpc: Only transmit one ACK per jumbo packet received + - dt-bindings: net: mediatek: remove wrongly added clocks and SerDes + - ipv6: fib6_rules: avoid possible NULL dereference in fib6_rule_action() + - net-sysfs: convert dev->operstate reads to lockless ones + - hsr: Simplify code for announcing HSR nodes timer setup + - ipv6: annotate data-races around cnf.disable_ipv6 + - ipv6: prevent NULL dereference in ip6_output() + - net/smc: fix neighbour and rtable leak in smc_ib_find_route() + - net: hns3: using user configure after hardware reset + - net: hns3: direct return when receive a unknown mailbox message + - net: hns3: change type of numa_node_mask as nodemask_t + - net: hns3: release PTP resources if pf initialization failed + - net: hns3: use appropriate barrier function after setting a bit value + - net: hns3: fix port vlan filter not disabled issue + - net: hns3: fix kernel crash when devlink reload during initialization + - net: dsa: mv88e6xxx: add phylink_get_caps for the mv88e6320/21 family + - drm/meson: dw-hdmi: power up phy on device init + - drm/meson: dw-hdmi: add bandgap setting for g12 + - drm/connector: Add \n to message about demoting connector force-probes + - dm/amd/pm: Fix problems with reboot/shutdown for some SMU 13.0.4/13.0.11 + users + - gpiolib: cdev: Fix use after free in lineinfo_changed_notify + - gpiolib: cdev: fix uninitialised kfifo + - drm/amdgpu: Fix comparison in amdgpu_res_cpu_visible + - drm/amdgpu: once more fix the call oder in amdgpu_ttm_move() v2 + - firewire: nosy: ensure user_length is taken into account when fetching + packet contents + - Reapply "drm/qxl: simplify qxl_fence_wait" + - usb: typec: ucsi: Check for notifications after init + - usb: typec: ucsi: Fix connector check on init + - usb: Fix regression caused by invalid ep0 maxpacket in virtual SuperSpeed + device + - usb: ohci: Prevent missed ohci interrupts + - USB: core: Fix access violation during port device removal + - usb: gadget: composite: fix OS descriptors w_value logic + - usb: gadget: uvc: use correct buffer size when parsing configfs lists + - usb: gadget: f_fs: Fix race between aio_cancel() and AIO request complete + - usb: gadget: f_fs: Fix a race condition when processing setup packets. + - usb: xhci-plat: Don't include xhci.h + - usb: dwc3: core: Prevent phy suspend during init + - usb: typec: tcpm: clear pd_event queue in PORT_RESET + - usb: typec: tcpm: unregister existing source caps before re-registration + - usb: typec: tcpm: Check for port partner validity before consuming it + - ALSA: hda/realtek: Fix mute led of HP Laptop 15-da3001TU + - ALSA: hda/realtek: Fix conflicting PCI SSID 17aa:386f for Lenovo Legion + models + - firewire: ohci: fulfill timestamp for some local asynchronous transaction + - mm/slub: avoid zeroing outside-object freepointer for single free + - btrfs: add missing mutex_unlock in btrfs_relocate_sys_chunks() + - btrfs: set correct ram_bytes when splitting ordered extent + - btrfs: qgroup: do not check qgroup inherit if qgroup is disabled + - btrfs: make sure that WRITTEN is set on all metadata blocks + - maple_tree: fix mas_empty_area_rev() null pointer dereference + - mm/slab: make __free(kfree) accept error pointers + - mptcp: ensure snd_nxt is properly initialized on connect + - mptcp: only allow set existing scheduler for net.mptcp.scheduler + - workqueue: Fix selection of wake_cpu in kick_pool() + - dt-bindings: iio: health: maxim,max30102: fix compatible check + - iio:imu: adis16475: Fix sync mode setting + - iio: pressure: Fixes BME280 SPI driver data + - iio: pressure: Fixes SPI support for BMP3xx devices + - iio: accel: mxc4005: Interrupt handling fixes + - iio: accel: mxc4005: Reset chip on probe() and resume() + - kmsan: compiler_types: declare __no_sanitize_or_inline + - e1000e: change usleep_range to udelay in PHY mdic access + - tipc: fix UAF in error path + - xtensa: fix MAKE_PC_FROM_RA second argument + - net: bcmgenet: synchronize EXT_RGMII_OOB_CTRL access + - net: bcmgenet: synchronize use of bcmgenet_set_rx_mode() + - net: bcmgenet: synchronize UMAC_CMD access + - ASoC: tegra: Fix DSPK 16-bit playback + - ASoC: ti: davinci-mcasp: Fix race condition during probe + - dyndbg: fix old BUG_ON in >control parser + - slimbus: qcom-ngd-ctrl: Add timeout for wait operation + - clk: samsung: Revert "clk: Use device_get_match_data()" + - clk: sunxi-ng: common: Support minimum and maximum rate + - clk: sunxi-ng: a64: Set minimum and maximum rate for PLL-MIPI + - mei: me: add lunar lake point M DID + - drm/nouveau/firmware: Fix SG_DEBUG error with nvkm_firmware_ctor() + - Revert "drm/nouveau/firmware: Fix SG_DEBUG error with nvkm_firmware_ctor()" + - drm/amdkfd: don't allow mapping the MMIO HDP page with large pages + - drm/ttm: Print the memory decryption status just once + - drm/vmwgfx: Fix Legacy Display Unit + - drm/vmwgfx: Fix invalid reads in fence signaled events + - drm/imagination: Ensure PVR_MIPS_PT_PAGE_COUNT is never zero + - drm/amd/display: Fix idle optimization checks for multi-display and dual eDP + - drm/nouveau/gsp: Use the sg allocator for level 2 of radix3 + - drm/i915/gt: Automate CCS Mode setting during engine resets + - drm/i915/bios: Fix parsing backlight BDB data + - drm/amd/display: Handle Y carry-over in VCP X.Y calculation + - drm/amd/display: Fix incorrect DSC instance for MST + - arm64: dts: qcom: sa8155p-adp: fix SDHC2 CD pin configuration + - iommu/arm-smmu: Use the correct type in nvidia_smmu_context_fault() + - net: fix out-of-bounds access in ops_init + - hwmon: (pmbus/ucd9000) Increase delay from 250 to 500us + - misc/pvpanic-pci: register attributes via pci_driver + - x86/apic: Don't access the APIC when disabling x2APIC + - selftests/mm: fix powerpc ARCH check + - mm: use memalloc_nofs_save() in page_cache_ra_order() + - mm/userfaultfd: reset ptes when close() for wr-protected ones + - iommu/amd: Enhance def_domain_type to handle untrusted device + - fs/proc/task_mmu: fix loss of young/dirty bits during pagemap scan + - fs/proc/task_mmu: fix uffd-wp confusion in pagemap_scan_pmd_entry() + - nvme-pci: Add quirk for broken MSIs + - regulator: core: fix debugfs creation regression + - spi: microchip-core-qspi: fix setting spi bus clock rate + - ksmbd: off ipv6only for both ipv4/ipv6 binding + - ksmbd: avoid to send duplicate lease break notifications + - ksmbd: do not grant v2 lease if parent lease key and epoch are not set + - tracefs: Reset permissions on remount if permissions are options + - tracefs: Still use mount point as default permissions for instances + - eventfs: Do not treat events directory different than other directories + - Bluetooth: qca: fix invalid device address check + - Bluetooth: qca: fix wcn3991 device address check + - Bluetooth: qca: add missing firmware sanity checks + - Bluetooth: qca: fix NVM configuration parsing + - Bluetooth: qca: generalise device address check + - Bluetooth: qca: fix info leak when fetching board id + - Bluetooth: qca: fix info leak when fetching fw build id + - Bluetooth: qca: fix firmware check error path + - keys: Fix overwrite of key expiration on instantiation + - Linux 6.8.10 + + * Noble update: v6.8.9 upstream stable release (LP: #2070337) + - cifs: Fix reacquisition of volume cookie on still-live connection + - smb: client: fix rename(2) regression against samba + - cifs: reinstate original behavior again for forceuid/forcegid + - HID: intel-ish-hid: ipc: Fix dev_err usage with uninitialized dev->devc + - HID: logitech-dj: allow mice to use all types of reports + - arm64: dts: rockchip: set PHY address of MT7531 switch to 0x1f + - arm64: dts: rockchip: enable internal pull-up on Q7_USB_ID for RK3399 Puma + - arm64: dts: rockchip: fix alphabetical ordering RK3399 puma + - arm64: dts: rockchip: enable internal pull-up on PCIE_WAKE# for RK3399 Puma + - arm64: dts: rockchip: Fix the i2c address of es8316 on Cool Pi CM5 + - arm64: dts: rockchip: Remove unsupported node from the Pinebook Pro dts + - arm64: dts: mediatek: mt8183: Add power-domains properity to mfgcfg + - arm64: dts: mediatek: mt8192: Add missing gce-client-reg to mutex + - arm64: dts: mediatek: mt8195: Add missing gce-client-reg to vpp/vdosys + - arm64: dts: mediatek: mt8195: Add missing gce-client-reg to mutex + - arm64: dts: mediatek: mt8195: Add missing gce-client-reg to mutex1 + - arm64: dts: mediatek: cherry: Describe CPU supplies + - arm64: dts: mediatek: mt8192-asurada: Update min voltage constraint for + MT6315 + - arm64: dts: mediatek: mt8195-cherry: Update min voltage constraint for + MT6315 + - arm64: dts: mediatek: mt8183-kukui: Use default min voltage for MT6358 + - arm64: dts: mediatek: mt7622: fix clock controllers + - arm64: dts: mediatek: mt7622: fix IR nodename + - arm64: dts: mediatek: mt7622: fix ethernet controller "compatible" + - arm64: dts: mediatek: mt7622: drop "reset-names" from thermal block + - arm64: dts: mediatek: mt7986: reorder properties + - arm64: dts: mediatek: mt7986: drop invalid properties from ethsys + - arm64: dts: mediatek: mt7986: drop "#reset-cells" from Ethernet controller + - arm64: dts: mediatek: mt7986: reorder nodes + - arm64: dts: mediatek: mt7986: drop invalid thermal block clock + - arm64: dts: mediatek: mt7986: prefix BPI-R3 cooling maps with "map-" + - arm64: dts: mediatek: mt2712: fix validation errors + - arm64: dts: rockchip: mark system power controller and fix typo on + orangepi-5-plus + - arm64: dts: rockchip: regulator for sd needs to be always on for BPI-R2Pro + - block: fix module reference leakage from bdev_open_by_dev error path + - arm64: dts: qcom: Fix type of "wdog" IRQs for remoteprocs + - arm64: dts: qcom: x1e80100: Fix the compatible for cluster idle states + - arm64: dts: qcom: sc8180x: Fix ss_phy_irq for secondary USB controller + - gpio: tangier: Use correct type for the IRQ chip data + - ARC: [plat-hsdk]: Remove misplaced interrupt-cells property + - wifi: mac80211: clean up assignments to pointer cache. + - wifi: mac80211: split mesh fast tx cache into local/proxied/forwarded + - wifi: iwlwifi: mvm: remove old PASN station when adding a new one + - wifi: iwlwifi: mvm: return uid from iwl_mvm_build_scan_cmd + - drm/gma500: Remove lid code + - wifi: mac80211_hwsim: init peer measurement result + - wifi: mac80211: remove link before AP + - wifi: mac80211: fix unaligned le16 access + - net: libwx: fix alloc msix vectors failed + - vxlan: drop packets from invalid src-address + - net: bcmasp: fix memory leak when bringing down interface + - mlxsw: core: Unregister EMAD trap using FORWARD action + - mlxsw: core_env: Fix driver initialization with old firmware + - mlxsw: pci: Fix driver initialization with old firmware + - ARM: dts: microchip: at91-sama7g5ek: Replace regulator-suspend-voltage with + the valid property + - icmp: prevent possible NULL dereferences from icmp_build_probe() + - bridge/br_netlink.c: no need to return void function + - bnxt_en: refactor reset close code + - bnxt_en: Fix the PCI-AER routines + - bnxt_en: Fix error recovery for 5760X (P7) chips + - cxl/core: Fix potential payload size confusion in cxl_mem_get_poison() + - net: dsa: mv88e6xx: fix supported_interfaces setup in + mv88e6250_phylink_get_caps() + - NFC: trf7970a: disable all regulators on removal + - netfs: Fix writethrough-mode error handling + - ax25: Fix netdev refcount issue + - soc: mediatek: mtk-svs: Append "-thermal" to thermal zone names + - tools: ynl: don't ignore errors in NLMSG_DONE messages + - net: usb: ax88179_178a: stop lying about skb->truesize + - tcp: Fix Use-After-Free in tcp_ao_connect_init + - net: gtp: Fix Use-After-Free in gtp_dellink + - net: phy: mediatek-ge-soc: follow netdev LED trigger semantics + - gpio: tegra186: Fix tegra186_gpio_is_accessible() check + - drm/xe: Remove sysfs only once on action add failure + - drm/xe: call free_gsc_pkt only once on action add failure + - Bluetooth: hci_event: Use HCI error defines instead of magic values + - Bluetooth: hci_conn: Only do ACL connections sequentially + - Bluetooth: Remove pending ACL connection attempts + - Bluetooth: hci_conn: Always use sk_timeo as conn_timeout + - Bluetooth: hci_conn: Fix UAF Write in __hci_acl_create_connection_sync + - Bluetooth: hci_sync: Add helper functions to manipulate cmd_sync queue + - Bluetooth: hci_sync: Attempt to dequeue connection attempt + - Bluetooth: ISO: Reassemble PA data for bcast sink + - Bluetooth: hci_sync: Use advertised PHYs on hci_le_ext_create_conn_sync + - Bluetooth: btusb: Fix triggering coredump implementation for QCA + - Bluetooth: hci_event: Fix sending HCI_OP_READ_ENC_KEY_SIZE + - Bluetooth: MGMT: Fix failing to MGMT_OP_ADD_UUID/MGMT_OP_REMOVE_UUID + - Bluetooth: btusb: mediatek: Fix double free of skb in coredump + - Bluetooth: hci_sync: Using hci_cmd_sync_submit when removing Adv Monitor + - Bluetooth: qca: set power_ctrl_enabled on NULL returned by + gpiod_get_optional() + - ipvs: Fix checksumming on GSO of SCTP packets + - net: openvswitch: Fix Use-After-Free in ovs_ct_exit + - mlxsw: Use refcount_t for reference counting + - mlxsw: spectrum_acl_tcam: Fix race in region ID allocation + - mlxsw: spectrum_acl_tcam: Fix race during rehash delayed work + - mlxsw: spectrum_acl_tcam: Fix possible use-after-free during activity update + - mlxsw: spectrum_acl_tcam: Fix possible use-after-free during rehash + - mlxsw: spectrum_acl_tcam: Rate limit error message + - mlxsw: spectrum_acl_tcam: Fix memory leak during rehash + - mlxsw: spectrum_acl_tcam: Fix warning during rehash + - mlxsw: spectrum_acl_tcam: Fix incorrect list API usage + - mlxsw: spectrum_acl_tcam: Fix memory leak when canceling rehash work + - eth: bnxt: fix counting packets discarded due to OOM and netpoll + - ARM: dts: imx6ull-tarragon: fix USB over-current polarity + - netfilter: nf_tables: honor table dormant flag from netdev release event + path + - net: phy: dp83869: Fix MII mode failure + - net: ti: icssg-prueth: Fix signedness bug in prueth_init_rx_chns() + - i40e: Do not use WQ_MEM_RECLAIM flag for workqueue + - i40e: Report MFS in decimal base instead of hex + - iavf: Fix TC config comparison with existing adapter TC config + - ice: fix LAG and VF lock dependency in ice_reset_vf() + - net: ethernet: ti: am65-cpts: Fix PTPv1 message type on TX packets + - octeontx2-af: fix the double free in rvu_npc_freemem() + - dpll: check that pin is registered in __dpll_pin_unregister() + - dpll: fix dpll_pin_on_pin_register() for multiple parent pins + - tls: fix lockless read of strp->msg_ready in ->poll + - af_unix: Suppress false-positive lockdep splat for spin_lock() in + __unix_gc(). + - netfs: Fix the pre-flush when appending to a file in writethrough mode + - drm/amd/display: Check DP Alt mode DPCS state via DMUB + - Revert "drm/amd/display: fix USB-C flag update after enc10 feature init" + - xhci: move event processing for one interrupter to a separate function + - usb: xhci: correct return value in case of STS_HCE + - KVM: x86/pmu: Zero out PMU metadata on AMD if PMU is disabled + - KVM: x86/pmu: Set enable bits for GP counters in PERF_GLOBAL_CTRL at "RESET" + - drm: add drm_gem_object_is_shared_for_memory_stats() helper + - drm/amdgpu: add shared fdinfo stats + - drm/amdgpu: fix visible VRAM handling during faults + - Revert "UBUNTU: SAUCE: selftests/seccomp: fix check of fds being assigned" + - selftests/seccomp: user_notification_addfd check nextfd is available + - selftests/seccomp: Change the syscall used in KILL_THREAD test + - selftests/seccomp: Handle EINVAL on unshare(CLONE_NEWPID) + - x86/CPU/AMD: Add models 0x10-0x1f to the Zen5 range + - x86/cpu: Fix check for RDPKRU in __show_regs() + - rust: phy: implement `Send` for `Registration` + - rust: kernel: require `Send` for `Module` implementations + - rust: don't select CONSTRUCTORS + - [Config] updateconfigs to drop CONSTRUCTORS for rust + - rust: init: remove impl Zeroable for Infallible + - rust: make mutually exclusive with CFI_CLANG + - kbuild: rust: remove unneeded `@rustc_cfg` to avoid ICE + - kbuild: rust: force `alloc` extern to allow "empty" Rust files + - rust: remove `params` from `module` macro example + - Bluetooth: Fix type of len in {l2cap,sco}_sock_getsockopt_old() + - Bluetooth: btusb: Add Realtek RTL8852BE support ID 0x0bda:0x4853 + - Bluetooth: qca: fix NULL-deref on non-serdev suspend + - Bluetooth: qca: fix NULL-deref on non-serdev setup + - mtd: rawnand: qcom: Fix broken OP_RESET_DEVICE command in + qcom_misc_cmd_type_exec() + - mm/hugetlb: fix missing hugetlb_lock for resv uncharge + - mmc: sdhci-msm: pervent access to suspended controller + - mmc: sdhci-of-dwcmshc: th1520: Increase tuning loop count to 128 + - mm: create FOLIO_FLAG_FALSE and FOLIO_TYPE_OPS macros + - mm: support page_mapcount() on page_has_type() pages + - mm/hugetlb: fix DEBUG_LOCKS_WARN_ON(1) when dissolve_free_hugetlb_folio() + - smb: client: Fix struct_group() usage in __packed structs + - smb3: missing lock when picking channel + - smb3: fix lock ordering potential deadlock in cifs_sync_mid_result + - btrfs: fallback if compressed IO fails for ENOSPC + - btrfs: fix wrong block_start calculation for btrfs_drop_extent_map_range() + - btrfs: scrub: run relocation repair when/only needed + - btrfs: fix information leak in btrfs_ioctl_logical_to_ino() + - x86/tdx: Preserve shared bit on mprotect() + - cpu: Re-enable CPU mitigations by default for !X86 architectures + - [Config] updateconfigs for CPU_MITIGATIONS + - eeprom: at24: fix memory corruption race condition + - LoongArch: Fix callchain parse error with kernel tracepoint events + - LoongArch: Fix access error when read fault on a write-only VMA + - arm64: dts: qcom: sc8280xp: add missing PCIe minimum OPP + - arm64: dts: qcom: sm8450: Fix the msi-map entries + - arm64: dts: rockchip: enable internal pull-up for Q7_THRM# on RK3399 Puma + - dmaengine: Revert "dmaengine: pl330: issue_pending waits until WFP state" + - dmaengine: xilinx: xdma: Fix wrong offsets in the buffers addresses in dma + descriptor + - dmaengine: xilinx: xdma: Fix synchronization issue + - drm/amdgpu/sdma5.2: use legacy HDP flush for SDMA2/3 + - drm/amdgpu: Assign correct bits for SDMA HDP flush + - drm/atomic-helper: fix parameter order in drm_format_conv_state_copy() call + - drm/amdgpu/pm: Remove gpu_od if it's an empty directory + - drm/amdgpu/umsch: don't execute umsch test when GPU is in reset/suspend + - drm/amdgpu: Fix leak when GPU memory allocation fails + - drm/amdkfd: Fix rescheduling of restore worker + - drm/amdkfd: Fix eviction fence handling + - irqchip/gic-v3-its: Prevent double free on error + - ACPI: CPPC: Use access_width over bit_width for system memory accesses + - ACPI: CPPC: Fix bit_offset shift in MASK_VAL() macro + - ACPI: CPPC: Fix access width used for PCC registers + - net/mlx5e: Advertise mlx5 ethernet driver updates sk_buff md_dst for MACsec + - ethernet: Add helper for assigning packet type when dest address does not + match device address + - net: b44: set pause params only when interface is up + - macsec: Enable devices to advertise whether they update sk_buff md_dst + during offloads + - macsec: Detect if Rx skb is macsec-related for offloading devices that + update md_dst + - stackdepot: respect __GFP_NOLOCKDEP allocation flag + - fbdev: fix incorrect address computation in deferred IO + - udp: preserve the connected status if only UDP cmsg + - mtd: limit OTP NVMEM cell parse to non-NAND devices + - mtd: diskonchip: work around ubsan link failure + - firmware: qcom: uefisecapp: Fix memory related IO errors and crashes + - phy: qcom: qmp-combo: Fix register base for QSERDES_DP_PHY_MODE + - phy: qcom: qmp-combo: Fix VCO div offset on v3 + - mm: turn folio_test_hugetlb into a PageType + - mm: zswap: fix shrinker NULL crash with cgroup_disable=memory + - dmaengine: owl: fix register access functions + - dmaengine: tegra186: Fix residual calculation + - idma64: Don't try to serve interrupts when device is powered off + - soundwire: amd: fix for wake interrupt handling for clockstop mode + - phy: marvell: a3700-comphy: Fix hardcoded array size + - phy: freescale: imx8m-pcie: fix pcie link-up instability + - phy: rockchip-snps-pcie3: fix bifurcation on rk3588 + - phy: rockchip-snps-pcie3: fix clearing PHP_GRF_PCIESEL_CON bits + - phy: rockchip: naneng-combphy: Fix mux on rk3588 + - phy: qcom: m31: match requested regulator name with dt schema + - dmaengine: idxd: Convert spinlock to mutex to lock evl workqueue + - dmaengine: idxd: Fix oops during rmmod on single-CPU platforms + - riscv: Fix TASK_SIZE on 64-bit NOMMU + - riscv: Fix loading 64-bit NOMMU kernels past the start of RAM + - phy: ti: tusb1210: Resolve charger-det crash if charger psy is unregistered + - dt-bindings: eeprom: at24: Fix ST M24C64-D compatible schema + - sched/eevdf: Always update V if se->on_rq when reweighting + - sched/eevdf: Fix miscalculation in reweight_entity() when se is not curr + - riscv: hwprobe: fix invalid sign extension for RISCV_HWPROBE_EXT_ZVFHMIN + - RISC-V: selftests: cbo: Ensure asm operands match constraints, take 2 + - phy: qcom: qmp-combo: fix VCO div offset on v5_5nm and v6 + - bounds: Use the right number of bits for power-of-two CONFIG_NR_CPUS + - Bluetooth: hci_sync: Fix UAF in hci_acl_create_conn_sync + - Bluetooth: hci_sync: Fix UAF on create_le_conn_complete + - Bluetooth: hci_sync: Fix UAF on hci_abort_conn_sync + - Linux 6.8.9 + + * amdgpu hangs on DCN 3.5 at bootup: RIP: + 0010:dcn35_clk_mgr_construct+0x183/0x2210 [amdgpu] (LP: #2066233) + - drm/amd/display: Atom Integrated System Info v2_2 for DCN35 + + * [MTL] ACPI: PM: s2idle: Backport Linux ACPI s2idle patches to fix + suspend/resume issue (LP: #2069231) + - ACPI: PM: s2idle: Enable Low-Power S0 Idle MSFT UUID for non-AMD systems + - ACPI: PM: s2idle: Evaluate all Low-Power S0 Idle _DSM functions + + * Removing legacy virtio-pci devices causes kernel panic (LP: #2067862) + - virtio-pci: Check if is_avq is NULL + + * Mute/mic LEDs no function on ProBook 445/465 G11 (LP: #2069664) + - ALSA: hda/realtek: fix mute/micmute LEDs don't work for ProBook 445/465 G11. + + * Mute/mic LEDs no function on ProBook 440/460 G11 (LP: #2067669) + - ALSA: hda/realtek: fix mute/micmute LEDs don't work for ProBook 440/460 G11. + + * rtw89_8852ce - Lost WIFI connection after suspend (LP: #2065128) + - wifi: rtw89: reset AFEDIG register in power off sequence + - wifi: rtw89: 8852c: refine power sequence to imporve power consumption + + * CVE-2024-25742 + - x86/sev: Harden #VC instruction emulation somewhat + - x86/sev: Check for MWAITX and MONITORX opcodes in the #VC handler + + * Noble update: v6.8.9 upstream stable release (LP: #2070337) // + CVE-2024-35984 + - i2c: smbus: fix NULL function pointer dereference + + * Noble update: v6.8.9 upstream stable release (LP: #2070337) // + CVE-2024-35990 + - dma: xilinx_dpdma: Fix locking + + * Noble update: v6.8.9 upstream stable release (LP: #2070337) // + CVE-2024-35997 + - HID: i2c-hid: remove I2C_HID_READ_PENDING flag to prevent lock-up + + * CVE-2024-36016 + - tty: n_gsm: fix possible out-of-bounds in gsm0_receive() + + * CVE-2024-36008 + - ipv4: check for NULL idev in ip_route_use_hint() + + * CVE-2024-35992 + - phy: marvell: a3700-comphy: Fix out of bounds read + + -- Stefan Bader Fri, 05 Jul 2024 10:31:38 +0200 + +linux (6.8.0-38.38) noble; urgency=medium + + * noble/linux: 6.8.0-38.38 -proposed tracker (LP: #2068318) + + * race_sched in ubuntu_stress_smoke_test will cause kernel panic on 6.8 with + Azure Standard_A2_v2 instance (LP: #2068024) + - sched/eevdf: Prevent vlag from going out of bounds in reweight_eevdf() + + * Noble: btrfs: re-introduce 'norecovery' mount option (LP: #2068591) + - btrfs: re-introduce 'norecovery' mount option + + * Fix system hang while entering suspend with AMD Navi3x graphics + (LP: #2063417) + - drm/amdgpu/mes: fix use-after-free issue + + * Noble update: v6.8.8 upstream stable release (LP: #2068087) + - io_uring: Fix io_cqring_wait() not restoring sigmask on get_timespec64() + failure + - drm/i915/cdclk: Fix voltage_level programming edge case + - Revert "vmgenid: emit uevent when VMGENID updates" + - SUNRPC: Fix rpcgss_context trace event acceptor field + - selftests/ftrace: Limit length in subsystem-enable tests + - random: handle creditable entropy from atomic process context + - scsi: core: Fix handling of SCMD_FAIL_IF_RECOVERING + - net: usb: ax88179_178a: avoid writing the mac address before first reading + - btrfs: do not wait for short bulk allocation + - btrfs: zoned: do not flag ZEROOUT on non-dirty extent buffer + - r8169: fix LED-related deadlock on module removal + - r8169: add missing conditional compiling for call to r8169_remove_leds + - scsi: ufs: qcom: Add missing interconnect bandwidth values for Gear 5 + - netfilter: nf_tables: Fix potential data-race in __nft_expr_type_get() + - netfilter: nf_tables: Fix potential data-race in __nft_obj_type_get() + - netfilter: br_netfilter: skip conntrack input hook for promisc packets + - netfilter: nft_set_pipapo: constify lookup fn args where possible + - netfilter: nft_set_pipapo: walk over current view on netlink dump + - netfilter: flowtable: validate pppoe header + - netfilter: flowtable: incorrect pppoe tuple + - af_unix: Call manage_oob() for every skb in unix_stream_read_generic(). + - af_unix: Don't peek OOB data without MSG_OOB. + - net: sparx5: flower: fix fragment flags handling + - net/mlx5: Lag, restore buckets number to default after hash LAG deactivation + - net/mlx5: Restore mistakenly dropped parts in register devlink flow + - net/mlx5e: Prevent deadlock while disabling aRFS + - net: change maximum number of UDP segments to 128 + - octeontx2-pf: fix FLOW_DIS_IS_FRAGMENT implementation + - selftests/tcp_ao: Make RST tests less flaky + - selftests/tcp_ao: Zero-init tcp_ao_info_opt + - selftests/tcp_ao: Fix fscanf() call for format-security + - selftests/tcp_ao: Printing fixes to confirm with format-security + - net: stmmac: Apply half-duplex-less constraint for DW QoS Eth only + - net: stmmac: Fix max-speed being ignored on queue re-init + - net: stmmac: Fix IP-cores specific MAC capabilities + - ice: tc: check src_vsi in case of traffic from VF + - ice: tc: allow zero flags in parsing tc flower + - ice: Fix checking for unsupported keys on non-tunnel device + - tun: limit printing rate when illegal packet received by tun dev + - net: dsa: mt7530: fix mirroring frames received on local port + - net: dsa: mt7530: fix port mirroring for MT7988 SoC switch + - s390/ism: Properly fix receive message buffer allocation + - netfilter: nf_tables: missing iterator type in lookup walk + - netfilter: nf_tables: restore set elements when delete set fails + - gpiolib: swnode: Remove wrong header inclusion + - netfilter: nf_tables: fix memleak in map from abort path + - net/sched: Fix mirred deadlock on device recursion + - net: ethernet: mtk_eth_soc: fix WED + wifi reset + - ravb: Group descriptor types used in Rx ring + - net: ravb: Count packets instead of descriptors in R-Car RX path + - net: ravb: Allow RX loop to move past DMA mapping errors + - net: ethernet: ti: am65-cpsw-nuss: cleanup DMA Channels before using them + - NFSD: fix endianness issue in nfsd4_encode_fattr4 + - RDMA/rxe: Fix the problem "mutex_destroy missing" + - RDMA/cm: Print the old state when cm_destroy_id gets timeout + - RDMA/mlx5: Fix port number for counter query in multi-port configuration + - perf annotate: Make sure to call symbol__annotate2() in TUI + - perf lock contention: Add a missing NULL check + - s390/qdio: handle deferred cc1 + - s390/cio: fix race condition during online processing + - iommufd: Add missing IOMMUFD_DRIVER kconfig for the selftest + - iommufd: Add config needed for iommufd_fail_nth + - drm: nv04: Fix out of bounds access + - drm/v3d: Don't increment `enabled_ns` twice + - userfaultfd: change src_folio after ensuring it's unpinned in UFFDIO_MOVE + - thunderbolt: Introduce tb_port_reset() + - thunderbolt: Introduce tb_path_deactivate_hop() + - thunderbolt: Make tb_switch_reset() support Thunderbolt 2, 3 and USB4 + routers + - thunderbolt: Reset topology created by the boot firmware + - drm/panel: visionox-rm69299: don't unregister DSI device + - drm/radeon: make -fstrict-flex-arrays=3 happy + - ALSA: hda/realtek: Fix volumn control of ThinkBook 16P Gen4 + - thermal/debugfs: Add missing count increment to thermal_debug_tz_trip_up() + - platform/x86/amd/pmc: Extend Framework 13 quirk to more BIOSes + - interconnect: qcom: x1e80100: Remove inexistent ACV_PERF BCM + - interconnect: Don't access req_list while it's being manipulated + - clk: Remove prepare_lock hold assertion in __clk_release() + - clk: Initialize struct clk_core kref earlier + - clk: Get runtime PM before walking tree during disable_unused + - clk: Get runtime PM before walking tree for clk_summary + - clk: mediatek: Do a runtime PM get on controllers during probe + - clk: mediatek: mt7988-infracfg: fix clocks for 2nd PCIe port + - selftests/powerpc/papr-vpd: Fix missing variable initialization + - x86/bugs: Fix BHI retpoline check + - x86/cpufeatures: Fix dependencies for GFNI, VAES, and VPCLMULQDQ + - block: propagate partition scanning errors to the BLKRRPART ioctl + - net/mlx5: E-switch, store eswitch pointer before registering devlink_param + - ALSA: seq: ump: Fix conversion from MIDI2 to MIDI1 UMP messages + - ALSA: hda/tas2781: correct the register for pow calibrated data + - ALSA: hda/realtek: Add quirks for Huawei Matebook D14 NBLB-WAX9N + - ALSA: hda/realtek - Enable audio jacks of Haier Boyue G42 with ALC269VC + - usb: misc: onboard_usb_hub: Disable the USB hub clock on failure + - misc: rtsx: Fix rts5264 driver status incorrect when card removed + - thunderbolt: Avoid notify PM core about runtime PM resume + - thunderbolt: Fix wake configurations after device unplug + - thunderbolt: Do not create DisplayPort tunnels on adapters of the same + router + - comedi: vmk80xx: fix incomplete endpoint checking + - serial: mxs-auart: add spinlock around changing cts state + - serial/pmac_zilog: Remove flawed mitigation for rx irq flood + - serial: 8250_dw: Revert: Do not reclock if already at correct rate + - serial: stm32: Return IRQ_NONE in the ISR if no handling happend + - serial: stm32: Reset .throttled state in .startup() + - serial: core: Fix regression when runtime PM is not enabled + - serial: core: Clearing the circular buffer before NULLifying it + - serial: core: Fix missing shutdown and startup for serial base port + - USB: serial: option: add Fibocom FM135-GL variants + - USB: serial: option: add support for Fibocom FM650/FG650 + - USB: serial: option: add Lonsung U8300/U9300 product + - USB: serial: option: support Quectel EM060K sub-models + - USB: serial: option: add Rolling RW101-GL and RW135-GL support + - USB: serial: option: add Telit FN920C04 rmnet compositions + - Revert "usb: cdc-wdm: close race between read and workqueue" + - usb: dwc2: host: Fix dereference issue in DDMA completion flow. + - usb: Disable USB3 LPM at shutdown + - usb: gadget: f_ncm: Fix UAF ncm object at re-bind after usb ep transport + error + - usb: typec: tcpm: Correct the PDO counting in pd_set + - mei: me: disable RPL-S on SPS and IGN firmwares + - speakup: Avoid crash on very long word + - fs: sysfs: Fix reference leak in sysfs_break_active_protection() + - sched: Add missing memory barrier in switch_mm_cid + - KVM: x86: Snapshot if a vCPU's vendor model is AMD vs. Intel compatible + - KVM: x86/pmu: Disable support for adaptive PEBS + - KVM: x86/pmu: Do not mask LVTPC when handling a PMI on AMD platforms + - KVM: x86/mmu: x86: Don't overflow lpage_info when checking attributes + - KVM: x86/mmu: Write-protect L2 SPTEs in TDP MMU when clearing dirty status + - arm64/head: Disable MMU at EL2 before clearing HCR_EL2.E2H + - arm64: hibernate: Fix level3 translation fault in swsusp_save() + - init/main.c: Fix potential static_command_line memory overflow + - mm/madvise: make MADV_POPULATE_(READ|WRITE) handle VM_FAULT_RETRY properly + - mm/userfaultfd: allow hugetlb change protection upon poison entry + - mm,swapops: update check in is_pfn_swap_entry for hwpoison entries + - mm/memory-failure: fix deadlock when hugetlb_optimize_vmemmap is enabled + - mm/shmem: inline shmem_is_huge() for disabled transparent hugepages + - fuse: fix leaked ENOSYS error on first statx call + - drm/amdkfd: Fix memory leak in create_process failure + - drm/amdgpu: remove invalid resource->start check v2 + - drm/ttm: stop pooling cached NUMA pages v2 + - drm/xe: Fix bo leak in intel_fb_bo_framebuffer_init + - drm/vmwgfx: Fix prime import/export + - drm/vmwgfx: Sort primary plane formats by order of preference + - drm/vmwgfx: Fix crtc's atomic check conditional + - nouveau: fix instmem race condition around ptr stores + - bootconfig: use memblock_free_late to free xbc memory to buddy + - Squashfs: check the inode number is not the invalid value of zero + - nilfs2: fix OOB in nilfs_set_de_type + - fork: defer linking file vma until vma is fully initialized + - net: dsa: mt7530: fix improper frames on all 25MHz and 40MHz XTAL MT7530 + - net: dsa: mt7530: fix enabling EEE on MT7531 switch on all boards + - ksmbd: fix slab-out-of-bounds in smb2_allocate_rsp_buf + - ksmbd: validate request buffer size in smb2_allocate_rsp_buf() + - ksmbd: clear RENAME_NOREPLACE before calling vfs_rename + - ksmbd: common: use struct_group_attr instead of struct_group for + network_open_info + - thunderbolt: Reset only non-USB4 host routers in resume + - Linux 6.8.8 + + * Fix inaudible HDMI/DP audio on USB-C MST dock (LP: #2064689) + - drm/i915/audio: Fix audio time stamp programming for DP + + * Add Cirrus Logic CS35L56 amplifier support (LP: #2062135) + - ALSA: hda: realtek: Re-work CS35L41 fixups to re-use for other amps + - ALSA: hda/realtek: Add quirks for HP G11 Laptops using CS35L56 + + * net:fib_rule_tests.sh in ubuntu_kselftests_net fails on Noble (LP: #2066332) + - Revert "UBUNTU: SAUCE: selftests: net: fix "from" match test in + fib_rule_tests.sh" + + * mtk_t7xx WWAN module fails to probe with: Invalid device status 0x1 + (LP: #2049358) + - Revert "UBUNTU: SAUCE: net: wwan: t7xx: PCIe reset rescan" + - Revert "UBUNTU: SAUCE: net: wwan: t7xx: Add AP CLDMA" + - net: wwan: t7xx: Add AP CLDMA + - wwan: core: Add WWAN fastboot port type + - net: wwan: t7xx: Add sysfs attribute for device state machine + - net: wwan: t7xx: Infrastructure for early port configuration + - net: wwan: t7xx: Add fastboot WWAN port + + * Pull-request to address TPM bypass issue (LP: #2037688) + - [Config]: Configure TPM drivers as builtins for arm64 in annotations + + * re-enable Ubuntu FAN in the Noble kernel (LP: #2064508) + - SAUCE: fan: add VXLAN implementation + - SAUCE: fan: Fix NULL pointer dereference + - SAUCE: fan: support vxlan strict length validation + + * update for V3 kernel bits and improved multiple fan slice support + (LP: #1470091) // re-enable Ubuntu FAN in the Noble kernel (LP: #2064508) + - SAUCE: fan: tunnel multiple mapping mode (v3) + + * TCP memory leak, slow network (arm64) (LP: #2045560) + - net: make SK_MEMORY_PCPU_RESERV tunable + - net: fix sk_memory_allocated_{add|sub} vs softirqs + + * panel flickering after the i915.psr2 is enabled (LP: #2046315) + - drm/i915/alpm: Add ALPM register definitions + - drm/i915/psr: Add alpm_parameters struct + - drm/i915/alpm: Calculate ALPM Entry check + - drm/i915/alpm: Alpm aux wake configuration for lnl + - drm/i915/display: Make intel_dp_aux_fw_sync_len available for PSR code + - drm/i915/psr: Improve fast and IO wake lines calculation + - drm/i915/psr: Calculate IO wake and fast wake lines for DISPLAY_VER < 12 + - drm/i915/display: Increase number of fast wake precharge pulses + + * I2C HID device sometimes fails to initialize causing touchpad to not work + (LP: #2061040) + - HID: i2c-hid: Revert to await reset ACK before reading report descriptor + + * Fix the RTL8852CE BT FW Crash based on SER false alarm (LP: #2060904) + - wifi: rtw89: disable txptctrl IMR to avoid flase alarm + - wifi: rtw89: pci: correct TX resource checking for PCI DMA channel of + firmware command + + * [X13s] Fingerprint reader is not working (LP: #2065376) + - SAUCE: arm64: dts: qcom: sc8280xp: Add USB DWC3 Multiport controller + - SAUCE: arm64: dts: qcom: sc8280xp-x13s: enable USB MP and fingerprint reader + + * Fix random HuC/GuC initialization failure of Intel i915 driver + (LP: #2061049) + - drm/i915/huc: Allow for very slow HuC loading + + * Add support of TAS2781 amp of audio (LP: #2064064) + - ALSA: hda/tas2781: Add new vendor_id and subsystem_id to support ThinkPad + ICE-1 + + * Noble update: v6.8.7 upstream stable release (LP: #2065912) + - smb3: fix Open files on server counter going negative + - ata: libata-core: Allow command duration limits detection for ACS-4 drives + - ata: libata-scsi: Fix ata_scsi_dev_rescan() error path + - drm/amdgpu/vpe: power on vpe when hw_init + - batman-adv: Avoid infinite loop trying to resize local TT + - ceph: redirty page before returning AOP_WRITEPAGE_ACTIVATE + - ceph: switch to use cap_delay_lock for the unlink delay list + - virtio_net: Do not send RSS key if it is not supported + - arm64: tlb: Fix TLBI RANGE operand + - ARM: dts: imx7s-warp: Pass OV2680 link-frequencies + - raid1: fix use-after-free for original bio in raid1_write_request() + - ring-buffer: Only update pages_touched when a new page is touched + - Bluetooth: Fix memory leak in hci_req_sync_complete() + - drm/amd/pm: fixes a random hang in S4 for SMU v13.0.4/11 + - platform/chrome: cros_ec_uart: properly fix race condition + - ACPI: scan: Do not increase dep_unmet for already met dependencies + - PM: s2idle: Make sure CPUs will wakeup directly on resume + - media: cec: core: remove length check of Timer Status + - btrfs: tests: allocate dummy fs_info and root in test_find_delalloc() + - ARM: OMAP2+: fix bogus MMC GPIO labels on Nokia N8x0 + - ARM: OMAP2+: fix N810 MMC gpiod table + - mmc: omap: fix broken slot switch lookup + - mmc: omap: fix deferred probe + - mmc: omap: restore original power up/down steps + - ARM: OMAP2+: fix USB regression on Nokia N8x0 + - firmware: arm_ffa: Fix the partition ID check in ffa_notification_info_get() + - firmware: arm_scmi: Make raw debugfs entries non-seekable + - cxl/mem: Fix for the index of Clear Event Record Handle + - cxl/core/regs: Fix usage of map->reg_type in cxl_decode_regblock() before + assigned + - arm64: dts: freescale: imx8mp-venice-gw72xx-2x: fix USB vbus regulator + - arm64: dts: freescale: imx8mp-venice-gw73xx-2x: fix USB vbus regulator + - drm/msm: Add newlines to some debug prints + - drm/msm/dpu: don't allow overriding data from catalog + - drm/msm/dpu: make error messages at dpu_core_irq_register_callback() more + sensible + - dt-bindings: display/msm: sm8150-mdss: add DP node + - arm64: dts: imx8-ss-conn: fix usdhc wrong lpcg clock order + - cxl/core: Fix initialization of mbox_cmd.size_out in get event + - Revert "drm/qxl: simplify qxl_fence_wait" + - nouveau: fix function cast warning + - drm/msm/adreno: Set highest_bank_bit for A619 + - scsi: hisi_sas: Modify the deadline for ata_wait_after_reset() + - scsi: qla2xxx: Fix off by one in qla_edif_app_getstats() + - net: openvswitch: fix unwanted error log on timeout policy probing + - u64_stats: fix u64_stats_init() for lockdep when used repeatedly in one file + - xsk: validate user input for XDP_{UMEM|COMPLETION}_FILL_RING + - octeontx2-pf: Fix transmit scheduler resource leak + - block: fix q->blkg_list corruption during disk rebind + - lib: checksum: hide unused expected_csum_ipv6_magic[] + - geneve: fix header validation in geneve[6]_xmit_skb + - s390/ism: fix receive message buffer allocation + - bnxt_en: Fix possible memory leak in bnxt_rdma_aux_device_init() + - bnxt_en: Fix error recovery for RoCE ulp client + - bnxt_en: Reset PTP tx_avail after possible firmware reset + - ACPI: bus: allow _UID matching for integer zero + - base/node / ACPI: Enumerate node access class for 'struct access_coordinate' + - ACPI: HMAT: Introduce 2 levels of generic port access class + - ACPI: HMAT / cxl: Add retrieval of generic port coordinates for both access + classes + - cxl: Split out combine_coordinates() for common shared usage + - cxl: Split out host bridge access coordinates + - cxl: Remove checking of iter in cxl_endpoint_get_perf_coordinates() + - cxl: Fix retrieving of access_coordinates in PCIe path + - net: ks8851: Inline ks8851_rx_skb() + - net: ks8851: Handle softirqs at the end of IRQ thread to fix hang + - af_unix: Clear stale u->oob_skb. + - octeontx2-af: Fix NIX SQ mode and BP config + - ipv6: fib: hide unused 'pn' variable + - ipv4/route: avoid unused-but-set-variable warning + - ipv6: fix race condition between ipv6_get_ifaddr and ipv6_del_addr + - pds_core: use pci_reset_function for health reset + - pds_core: Fix pdsc_check_pci_health function to use work thread + - Bluetooth: ISO: Align broadcast sync_timeout with connection timeout + - Bluetooth: ISO: Don't reject BT_ISO_QOS if parameters are unset + - Bluetooth: hci_sync: Use QoS to determine which PHY to scan + - Bluetooth: hci_sync: Fix using the same interval and window for Coded PHY + - Bluetooth: SCO: Fix not validating setsockopt user input + - Bluetooth: RFCOMM: Fix not validating setsockopt user input + - Bluetooth: L2CAP: Fix not validating setsockopt user input + - Bluetooth: ISO: Fix not validating setsockopt user input + - Bluetooth: hci_sock: Fix not validating setsockopt user input + - Bluetooth: l2cap: Don't double set the HCI_CONN_MGMT_CONNECTED bit + - netfilter: complete validation of user input + - net/mlx5: SF, Stop waiting for FW as teardown was called + - net/mlx5: Register devlink first under devlink lock + - net/mlx5: offset comp irq index in name by one + - net/mlx5: Properly link new fs rules into the tree + - net/mlx5: Correctly compare pkt reformat ids + - net/mlx5e: RSS, Block changing channels number when RXFH is configured + - net/mlx5e: Fix mlx5e_priv_init() cleanup flow + - net/mlx5e: HTB, Fix inconsistencies with QoS SQs number + - net/mlx5e: Do not produce metadata freelist entries in Tx port ts WQE xmit + - net: sparx5: fix wrong config being used when reconfiguring PCS + - Revert "s390/ism: fix receive message buffer allocation" + - net: dsa: mt7530: trap link-local frames regardless of ST Port State + - af_unix: Do not use atomic ops for unix_sk(sk)->inflight. + - af_unix: Fix garbage collector racing against connect() + - net: ena: Fix potential sign extension issue + - net: ena: Wrong missing IO completions check order + - net: ena: Fix incorrect descriptor free behavior + - net: ena: Set tx_info->xdpf value to NULL + - drm/xe/display: Fix double mutex initialization + - drm/xe/hwmon: Cast result to output precision on left shift of operand + - tracing: hide unused ftrace_event_id_fops + - iommu/vt-d: Fix wrong use of pasid config + - iommu/vt-d: Allocate local memory for page request queue + - iommu/vt-d: Fix WARN_ON in iommu probe path + - io_uring: refactor DEFER_TASKRUN multishot checks + - io_uring: disable io-wq execution of multishot NOWAIT requests + - btrfs: qgroup: correctly model root qgroup rsv in convert + - btrfs: qgroup: fix qgroup prealloc rsv leak in subvolume operations + - btrfs: record delayed inode root in transaction + - btrfs: qgroup: convert PREALLOC to PERTRANS after record_root_in_trans + - io_uring/net: restore msg_control on sendzc retry + - kprobes: Fix possible use-after-free issue on kprobe registration + - fs/proc: remove redundant comments from /proc/bootconfig + - fs/proc: Skip bootloader comment if no embedded kernel parameters + - scsi: sg: Avoid sg device teardown race + - scsi: sg: Avoid race in error handling & drop bogus warn + - accel/ivpu: Check return code of ipc->lock init + - accel/ivpu: Fix PCI D0 state entry in resume + - accel/ivpu: Put NPU back to D3hot after failed resume + - accel/ivpu: Return max freq for DRM_IVPU_PARAM_CORE_CLOCK_RATE + - accel/ivpu: Fix deadlock in context_xa + - drm/vmwgfx: Enable DMA mappings with SEV + - drm/i915/vrr: Disable VRR when using bigjoiner + - drm/amdkfd: Reset GPU on queue preemption failure + - drm/ast: Fix soft lockup + - drm/panfrost: Fix the error path in panfrost_mmu_map_fault_addr() + - drm/client: Fully protect modes[] with dev->mode_config.mutex + - drm/msm/dp: fix runtime PM leak on disconnect + - drm/msm/dp: fix runtime PM leak on connect failure + - drm/amdgpu/umsch: reinitialize write pointer in hw init + - arm64: dts: imx8qm-ss-dma: fix can lpcg indices + - arm64: dts: imx8-ss-dma: fix can lpcg indices + - arm64: dts: imx8-ss-dma: fix adc lpcg indices + - arm64: dts: imx8-ss-conn: fix usb lpcg indices + - arm64: dts: imx8-ss-dma: fix pwm lpcg indices + - arm64: dts: imx8-ss-lsio: fix pwm lpcg indices + - arm64: dts: imx8-ss-dma: fix spi lpcg indices + - vhost: Add smp_rmb() in vhost_vq_avail_empty() + - vhost: Add smp_rmb() in vhost_enable_notify() + - perf/x86: Fix out of range data + - x86/cpu: Actually turn off mitigations by default for + SPECULATION_MITIGATIONS=n + - selftests/timers/posix_timers: Reimplement check_timer_distribution() + - selftests: timers: Fix posix_timers ksft_print_msg() warning + - selftests: timers: Fix abs() warning in posix_timers test + - selftests: kselftest: Mark functions that unconditionally call exit() as + __noreturn + - x86/apic: Force native_apic_mem_read() to use the MOV instruction + - irqflags: Explicitly ignore lockdep_hrtimer_exit() argument + - selftests: kselftest: Fix build failure with NOLIBC + - kernfs: annotate different lockdep class for of->mutex of writable files + - x86/bugs: Fix return type of spectre_bhi_state() + - x86/bugs: Fix BHI documentation + - x86/bugs: Cache the value of MSR_IA32_ARCH_CAPABILITIES + - x86/bugs: Rename various 'ia32_cap' variables to 'x86_arch_cap_msr' + - x86/bugs: Fix BHI handling of RRSBA + - x86/bugs: Clarify that syscall hardening isn't a BHI mitigation + - x86/bugs: Remove CONFIG_BHI_MITIGATION_AUTO and spectre_bhi=auto + - [Config] updateconfigs to remove obsolete SPECTRE_BHI_AUTO + - x86/bugs: Replace CONFIG_SPECTRE_BHI_{ON,OFF} with + CONFIG_MITIGATION_SPECTRE_BHI + - [Config] updateconfigs to enable new MITIGATION_SPECTRE_BHI + - drm/i915/cdclk: Fix CDCLK programming order when pipes are active + - drm/i915/psr: Disable PSR when bigjoiner is used + - drm/i915: Disable port sync when bigjoiner is used + - drm/i915: Disable live M/N updates when using bigjoiner + - drm/amdgpu: Reset dGPU if suspend got aborted + - drm/amdgpu: always force full reset for SOC21 + - drm/amdgpu: fix incorrect number of active RBs for gfx11 + - drm/amdgpu: differentiate external rev id for gfx 11.5.0 + - drm/amd/display: Program VSC SDP colorimetry for all DP sinks >= 1.4 + - drm/amd/display: Set VSC SDP Colorimetry same way for MST and SST + - drm/amd/display: Do not recursively call manual trigger programming + - drm/amd/display: Return max resolution supported by DWB + - drm/amd/display: always reset ODM mode in context when adding first plane + - drm/amd/display: fix disable otg wa logic in DCN316 + - Linux 6.8.7 + + * Noble update: v6.8.6 upstream stable release (LP: #2065899) + - amdkfd: use calloc instead of kzalloc to avoid integer overflow + - wifi: ath9k: fix LNA selection in ath_ant_try_scan() + - wifi: rtw89: fix null pointer access when abort scan + - bnx2x: Fix firmware version string character counts + - net: stmmac: dwmac-starfive: Add support for JH7100 SoC + - net: phy: phy_device: Prevent nullptr exceptions on ISR + - wifi: rtw89: pci: validate RX tag for RXQ and RPQ + - wifi: rtw89: pci: enlarge RX DMA buffer to consider size of RX descriptor + - VMCI: Fix memcpy() run-time warning in dg_dispatch_as_host() + - wifi: iwlwifi: pcie: Add the PCI device id for new hardware + - arm64: dts: qcom: qcm6490-idp: Add definition for three LEDs + - net: dsa: qca8k: put MDIO controller OF node if unavailable + - arm64: dts: qcom: qrb2210-rb1: disable cluster power domains + - printk: For @suppress_panic_printk check for other CPU in panic + - panic: Flush kernel log buffer at the end + - dump_stack: Do not get cpu_sync for panic CPU + - wifi: iwlwifi: pcie: Add new PCI device id and CNVI + - cpuidle: Avoid potential overflow in integer multiplication + - ARM: dts: rockchip: fix rk3288 hdmi ports node + - ARM: dts: rockchip: fix rk322x hdmi ports node + - arm64: dts: rockchip: fix rk3328 hdmi ports node + - arm64: dts: rockchip: fix rk3399 hdmi ports node + - net: add netdev_lockdep_set_classes() to virtual drivers + - arm64: dts: qcom: qcs6490-rb3gen2: Declare GCC clocks protected + - pmdomain: ti: Add a null pointer check to the omap_prm_domain_init + - pmdomain: imx8mp-blk-ctrl: imx8mp_blk: Add fdcc clock to hdmimix domain + - ACPI: resource: Add IRQ override quirk for ASUS ExpertBook B2502FBA + - ionic: set adminq irq affinity + - net: skbuff: add overflow debug check to pull/push helpers + - firmware: tegra: bpmp: Return directly after a failed kzalloc() in + get_filename() + - wifi: brcmfmac: Add DMI nvram filename quirk for ACEPC W5 Pro + - wifi: mt76: mt7915: add locking for accessing mapped registers + - wifi: mt76: mt7996: disable AMSDU for non-data frames + - wifi: mt76: mt7996: add locking for accessing mapped registers + - ACPI: x86: Move acpi_quirk_skip_serdev_enumeration() out of + CONFIG_X86_ANDROID_TABLETS + - ACPI: x86: Add DELL0501 handling to acpi_quirk_skip_serdev_enumeration() + - pstore/zone: Add a null pointer check to the psz_kmsg_read + - tools/power x86_energy_perf_policy: Fix file leak in get_pkg_num() + - net: pcs: xpcs: Return EINVAL in the internal methods + - dma-direct: Leak pages on dma_set_decrypted() failure + - wifi: ath11k: decrease MHI channel buffer length to 8KB + - iommu/arm-smmu-v3: Hold arm_smmu_asid_lock during all of attach_dev + - cpufreq: Don't unregister cpufreq cooling on CPU hotplug + - overflow: Allow non-type arg to type_max() and type_min() + - wifi: iwlwifi: Add missing MODULE_FIRMWARE() for *.pnvm + - wifi: cfg80211: check A-MSDU format more carefully + - btrfs: handle chunk tree lookup error in btrfs_relocate_sys_chunks() + - btrfs: export: handle invalid inode or root reference in btrfs_get_parent() + - btrfs: send: handle path ref underflow in header iterate_inode_ref() + - ice: use relative VSI index for VFs instead of PF VSI number + - net/smc: reduce rtnl pressure in smc_pnet_create_pnetids_list() + - netdev: let netlink core handle -EMSGSIZE errors + - Bluetooth: btintel: Fix null ptr deref in btintel_read_version + - Bluetooth: btmtk: Add MODULE_FIRMWARE() for MT7922 + - Bluetooth: Add new quirk for broken read key length on ATS2851 + - drm/vc4: don't check if plane->state->fb == state->fb + - drm/ci: uprev mesa version: fix kdl commit fetch + - drm/amdgpu: Skip do PCI error slot reset during RAS recovery + - Input: synaptics-rmi4 - fail probing if memory allocation for "phys" fails + - drm: panel-orientation-quirks: Add quirk for GPD Win Mini + - ASoC: SOF: amd: Optimize quirk for Valve Galileo + - drm/ttm: return ENOSPC from ttm_bo_mem_space v3 + - scsi: ufs: qcom: Avoid re-init quirk when gears match + - drm/amd/display: increased min_dcfclk_mhz and min_fclk_mhz + - pinctrl: renesas: checker: Limit cfg reg enum checks to provided IDs + - sysv: don't call sb_bread() with pointers_lock held + - scsi: lpfc: Fix possible memory leak in lpfc_rcv_padisc() + - drm/amd/display: Disable idle reallow as part of command/gpint execution + - isofs: handle CDs with bad root inode but good Joliet root directory + - ASoC: Intel: sof_rt5682: dmi quirk cleanup for mtl boards + - ASoC: Intel: common: DMI remap for rebranded Intel NUC M15 (LAPRC710) + laptops + - rcu/nocb: Fix WARN_ON_ONCE() in the rcu_nocb_bypass_lock() + - rcu-tasks: Repair RCU Tasks Trace quiescence check + - Julia Lawall reported this null pointer dereference, this should fix it. + - media: sta2x11: fix irq handler cast + - ALSA: firewire-lib: handle quirk to calculate payload quadlets as data block + counter + - drm/panel: simple: Add BOE BP082WX1-100 8.2" panel + - x86/vdso: Fix rethunk patching for vdso-image-{32,64}.o + - ASoC: Intel: avs: Populate board selection with new I2S entries + - ext4: add a hint for block bitmap corrupt state in mb_groups + - ext4: forbid commit inconsistent quota data when errors=remount-ro + - drm/amd/display: Fix nanosec stat overflow + - accel/habanalabs: increase HL_MAX_STR to 64 bytes to avoid warnings + - i2c: designware: Fix RX FIFO depth define on Wangxun 10Gb NIC + - HID: input: avoid polling stylus battery on Chromebook Pompom + - drm/amd/amdgpu: Fix potential ioremap() memory leaks in amdgpu_device_init() + - drm: Check output polling initialized before disabling + - drm: Check polling initialized before enabling in + drm_helper_probe_single_connector_modes + - SUNRPC: increase size of rpc_wait_queue.qlen from unsigned short to unsigned + int + - PCI: Disable D3cold on Asus B1400 PCI-NVMe bridge + - Revert "ACPI: PM: Block ASUS B1400CEAE from suspend to idle by default" + - libperf evlist: Avoid out-of-bounds access + - crypto: iaa - Fix async_disable descriptor leak + - input/touchscreen: imagis: Correct the maximum touch area value + - drivers/perf: hisi: Enable HiSilicon Erratum 162700402 quirk for HIP09 + - block: prevent division by zero in blk_rq_stat_sum() + - RDMA/cm: add timeout to cm_destroy_id wait + - Input: imagis - use FIELD_GET where applicable + - Input: allocate keycode for Display refresh rate toggle + - platform/x86: acer-wmi: Add support for Acer PH16-71 + - platform/x86: acer-wmi: Add predator_v4 module parameter + - platform/x86: touchscreen_dmi: Add an extra entry for a variant of the Chuwi + Vi8 tablet + - perf/x86/amd/lbr: Discard erroneous branch entries + - ALSA: hda/realtek: Add quirk for Lenovo Yoga 9 14IMH9 + - ktest: force $buildonly = 1 for 'make_warnings_file' test type + - Input: xpad - add support for Snakebyte GAMEPADs + - ring-buffer: use READ_ONCE() to read cpu_buffer->commit_page in concurrent + environment + - tools: iio: replace seekdir() in iio_generic_buffer + - bus: mhi: host: Add MHI_PM_SYS_ERR_FAIL state + - kernfs: RCU protect kernfs_nodes and avoid kernfs_idr_lock in + kernfs_find_and_get_node_by_id() + - usb: typec: ucsi: Add qcm6490-pmic-glink as needing PDOS quirk + - thunderbolt: Calculate DisplayPort tunnel bandwidth after DPRX capabilities + read + - usb: gadget: uvc: refactor the check for a valid buffer in the pump worker + - usb: gadget: uvc: mark incomplete frames with UVC_STREAM_ERR + - usb: typec: ucsi: Limit read size on v1.2 + - serial: 8250_of: Drop quirk fot NPCM from 8250_port + - thunderbolt: Keep the domain powered when USB4 port is in redrive mode + - usb: typec: tcpci: add generic tcpci fallback compatible + - usb: sl811-hcd: only defined function checkdone if QUIRK2 is defined + - ASoC: amd: yc: Fix non-functional mic on ASUS M7600RE + - thermal/of: Assume polling-delay(-passive) 0 when absent + - ASoC: soc-core.c: Skip dummy codec when adding platforms + - x86/xen: attempt to inflate the memory balloon on PVH + - fbdev: viafb: fix typo in hw_bitblt_1 and hw_bitblt_2 + - io_uring: clear opcode specific data for an early failure + - modpost: fix null pointer dereference + - drivers/nvme: Add quirks for device 126f:2262 + - fbmon: prevent division by zero in fb_videomode_from_videomode() + - ALSA: hda/realtek: Add quirks for some Clevo laptops + - drm/amdgpu: Init zone device and drm client after mode-1 reset on reload + - gcc-plugins/stackleak: Avoid .head.text section + - media: mediatek: vcodec: Fix oops when HEVC init fails + - media: mediatek: vcodec: adding lock to protect decoder context list + - media: mediatek: vcodec: adding lock to protect encoder context list + - randomize_kstack: Improve entropy diffusion + - platform/x86/intel/hid: Don't wake on 5-button releases + - platform/x86: intel-vbtn: Update tablet mode switch at end of probe + - nouveau: fix devinit paths to only handle display on GSP. + - Bluetooth: btintel: Fixe build regression + - net: mpls: error out if inner headers are not set + - VMCI: Fix possible memcpy() run-time warning in + vmci_datagram_invoke_guest_handler() + - x86/vdso: Fix rethunk patching for vdso-image-x32.o too + - Revert "drm/amd/amdgpu: Fix potential ioremap() memory leaks in + amdgpu_device_init()" + - Linux 6.8.6 + + * Noble update: v6.8.5 upstream stable release (LP: #2065400) + - scripts/bpf_doc: Use silent mode when exec make cmd + - xsk: Don't assume metadata is always requested in TX completion + - s390/bpf: Fix bpf_plt pointer arithmetic + - bpf, arm64: fix bug in BPF_LDX_MEMSX + - dma-buf: Fix NULL pointer dereference in sanitycheck() + - arm64: bpf: fix 32bit unconditional bswap + - nfc: nci: Fix uninit-value in nci_dev_up and nci_ntf_packet + - nfsd: Fix error cleanup path in nfsd_rename() + - tools: ynl: fix setting presence bits in simple nests + - mlxbf_gige: stop PHY during open() error paths + - wifi: iwlwifi: mvm: pick the version of SESSION_PROTECTION_NOTIF + - wifi: iwlwifi: mvm: rfi: fix potential response leaks + - wifi: iwlwifi: mvm: include link ID when releasing frames + - ALSA: hda: cs35l56: Set the init_done flag before component_add() + - ice: Refactor FW data type and fix bitmap casting issue + - ice: fix memory corruption bug with suspend and rebuild + - ixgbe: avoid sleeping allocation in ixgbe_ipsec_vf_add_sa() + - igc: Remove stale comment about Tx timestamping + - drm/xe: Remove unused xe_bo->props struct + - drm/xe: Add exec_queue.sched_props.job_timeout_ms + - drm/xe/guc_submit: use jiffies for job timeout + - drm/xe/queue: fix engine_class bounds check + - drm/xe/device: fix XE_MAX_GT_PER_TILE check + - drm/xe/device: fix XE_MAX_TILES_PER_DEVICE check + - dpll: indent DPLL option type by a tab + - s390/qeth: handle deferred cc1 + - net: hsr: hsr_slave: Fix the promiscuous mode in offload mode + - tcp: properly terminate timers for kernel sockets + - net: wwan: t7xx: Split 64bit accesses to fix alignment issues + - drm/rockchip: vop2: Remove AR30 and AB30 format support + - selftests: vxlan_mdb: Fix failures with old libnet + - gpiolib: Fix debug messaging in gpiod_find_and_request() + - ACPICA: debugger: check status of acpi_evaluate_object() in + acpi_db_walk_for_fields() + - net: hns3: fix index limit to support all queue stats + - net: hns3: fix kernel crash when devlink reload during pf initialization + - net: hns3: mark unexcuted loopback test result as UNEXECUTED + - tls: recv: process_rx_list shouldn't use an offset with kvec + - tls: adjust recv return with async crypto and failed copy to userspace + - tls: get psock ref after taking rxlock to avoid leak + - mlxbf_gige: call request_irq() after NAPI initialized + - drm/amd/display: Update P010 scaling cap + - drm/amd/display: Send DTBCLK disable message on first commit + - bpf: Protect against int overflow for stack access size + - cifs: Fix duplicate fscache cookie warnings + - netfilter: nf_tables: reject destroy command to remove basechain hooks + - netfilter: nf_tables: reject table flag and netdev basechain updates + - netfilter: nf_tables: skip netdev hook unregistration if table is dormant + - iommu: Validate the PASID in iommu_attach_device_pasid() + - net: bcmasp: Bring up unimac after PHY link up + - net: lan743x: Add set RFE read fifo threshold for PCI1x1x chips + - Octeontx2-af: fix pause frame configuration in GMP mode + - inet: inet_defrag: prevent sk release while still in use + - drm/i915: Stop doing double audio enable/disable on SDVO and g4x+ DP + - drm/i915/display: Disable AuxCCS framebuffers if built for Xe + - drm/i915/xelpg: Extend some workarounds/tuning to gfx version 12.74 + - drm/i915/mtl: Update workaround 14018575942 + - drm/i915: Do not print 'pxp init failed with 0' when it succeed + - dm integrity: fix out-of-range warning + - modpost: do not make find_tosym() return NULL + - kbuild: make -Woverride-init warnings more consistent + - mm/treewide: replace pud_large() with pud_leaf() + - Revert "x86/mm/ident_map: Use gbpages only where full GB page should be + mapped." + - gpio: cdev: sanitize the label before requesting the interrupt + - RISC-V: KVM: Fix APLIC setipnum_le/be write emulation + - RISC-V: KVM: Fix APLIC in_clrip[x] read emulation + - KVM: arm64: Fix host-programmed guest events in nVHE + - KVM: arm64: Fix out-of-IPA space translation fault handling + - selinux: avoid dereference of garbage after mount failure + - r8169: fix issue caused by buggy BIOS on certain boards with RTL8168d + - x86/cpufeatures: Add CPUID_LNX_5 to track recently added Linux-defined word + - x86/bpf: Fix IP after emitting call depth accounting + - Revert "Bluetooth: hci_qca: Set BDA quirk bit if fwnode exists in DT" + - arm64: dts: qcom: sc7180-trogdor: mark bluetooth address as broken + - Bluetooth: qca: fix device-address endianness + - Bluetooth: add quirk for broken address properties + - Bluetooth: hci_event: set the conn encrypted before conn establishes + - Bluetooth: Fix TOCTOU in HCI debugfs implementation + - netfilter: nf_tables: release batch on table validation from abort path + - netfilter: nf_tables: release mutex after nft_gc_seq_end from abort path + - selftests: mptcp: join: fix dev in check_endpoint + - net/rds: fix possible cp null dereference + - net: usb: ax88179_178a: avoid the interface always configured as random + address + - net: mana: Fix Rx DMA datasize and skb_over_panic + - vsock/virtio: fix packet delivery to tap device + - netfilter: nf_tables: reject new basechain after table flag update + - netfilter: nf_tables: flush pending destroy work before exit_net release + - netfilter: nf_tables: Fix potential data-race in __nft_flowtable_type_get() + - netfilter: nf_tables: discard table flag update with pending basechain + deletion + - netfilter: validate user input for expected length + - vboxsf: Avoid an spurious warning if load_nls_xxx() fails + - bpf, sockmap: Prevent lock inversion deadlock in map delete elem + - mptcp: prevent BPF accessing lowat from a subflow socket. + - x86/retpoline: Do the necessary fixup to the Zen3/4 srso return thunk for + !SRSO + - KVM: arm64: Use TLBI_TTL_UNKNOWN in __kvm_tlb_flush_vmid_range() + - KVM: arm64: Ensure target address is granule-aligned for range TLBI + - net/sched: act_skbmod: prevent kernel-infoleak + - net: dsa: sja1105: Fix parameters order in sja1110_pcs_mdio_write_c45() + - net/sched: fix lockdep splat in qdisc_tree_reduce_backlog() + - net: stmmac: fix rx queue priority assignment + - net: phy: micrel: lan8814: Fix when enabling/disabling 1-step timestamping + - net: txgbe: fix i2c dev name cannot match clkdev + - net: fec: Set mac_managed_pm during probe + - net: phy: micrel: Fix potential null pointer dereference + - net: dsa: mv88e6xxx: fix usable ports on 88e6020 + - selftests: net: gro fwd: update vxlan GRO test expectations + - gro: fix ownership transfer + - idpf: fix kernel panic on unknown packet types + - ice: fix enabling RX VLAN filtering + - i40e: Fix VF MAC filter removal + - tcp: Fix bind() regression for v6-only wildcard and v4-mapped-v6 non- + wildcard addresses. + - erspan: make sure erspan_base_hdr is present in skb->head + - selftests: reuseaddr_conflict: add missing new line at the end of the output + - tcp: Fix bind() regression for v6-only wildcard and v4(-mapped-v6) non- + wildcard addresses. + - ax25: fix use-after-free bugs caused by ax25_ds_del_timer + - e1000e: Workaround for sporadic MDI error on Meteor Lake systems + - ipv6: Fix infinite recursion in fib6_dump_done(). + - mlxbf_gige: stop interface during shutdown + - r8169: skip DASH fw status checks when DASH is disabled + - udp: do not accept non-tunnel GSO skbs landing in a tunnel + - udp: do not transition UDP GRO fraglist partial checksums to unnecessary + - udp: prevent local UDP tunnel packets from being GROed + - octeontx2-af: Fix issue with loading coalesced KPU profiles + - octeontx2-pf: check negative error code in otx2_open() + - octeontx2-af: Add array index check + - i40e: fix i40e_count_filters() to count only active/new filters + - i40e: fix vf may be used uninitialized in this function warning + - i40e: Enforce software interrupt during busy-poll exit + - drm/amd: Flush GFXOFF requests in prepare stage + - e1000e: Minor flow correction in e1000_shutdown function + - e1000e: move force SMBUS from enable ulp function to avoid PHY loss issue + - mean_and_variance: Drop always failing tests + - net: ravb: Let IP-specific receive function to interrogate descriptors + - net: ravb: Always process TX descriptor ring + - net: ravb: Always update error counters + - KVM: SVM: Use unsigned integers when dealing with ASIDs + - KVM: SVM: Add support for allowing zero SEV ASIDs + - selftests: mptcp: connect: fix shellcheck warnings + - selftests: mptcp: use += operator to append strings + - mptcp: don't account accept() of non-MPC client as fallback to TCP + - 9p: Fix read/write debug statements to report server reply + - ASoC: wm_adsp: Fix missing mutex_lock in wm_adsp_write_ctl() + - ASoC: cs42l43: Correct extraction of data pointer in suspend/resume + - riscv: mm: Fix prototype to avoid discarding const + - riscv: hwprobe: do not produce frtace relocation + - drivers/perf: riscv: Disable PERF_SAMPLE_BRANCH_* while not supported + - block: count BLK_OPEN_RESTRICT_WRITES openers + - RISC-V: Update AT_VECTOR_SIZE_ARCH for new AT_MINSIGSTKSZ + - ASoC: amd: acp: fix for acp pdm configuration check + - regmap: maple: Fix cache corruption in regcache_maple_drop() + - ALSA: hda: cs35l56: Add ACPI device match tables + - drm/panfrost: fix power transition timeout warnings + - nouveau/uvmm: fix addr/range calcs for remap operations + - drm/prime: Unbreak virtgpu dma-buf export + - ASoC: rt5682-sdw: fix locking sequence + - ASoC: rt711-sdca: fix locking sequence + - ASoC: rt711-sdw: fix locking sequence + - ASoC: rt712-sdca-sdw: fix locking sequence + - ASoC: rt722-sdca-sdw: fix locking sequence + - ASoC: ops: Fix wraparound for mask in snd_soc_get_volsw + - spi: s3c64xx: Extract FIFO depth calculation to a dedicated macro + - spi: s3c64xx: sort headers alphabetically + - spi: s3c64xx: explicitly include + - spi: s3c64xx: remove else after return + - spi: s3c64xx: define a magic value + - spi: s3c64xx: allow full FIFO masks + - spi: s3c64xx: determine the fifo depth only once + - spi: s3c64xx: Use DMA mode from fifo size + - ASoC: amd: acp: fix for acp_init function error handling + - regmap: maple: Fix uninitialized symbol 'ret' warnings + - ata: sata_sx4: fix pdc20621_get_from_dimm() on 64-bit + - scsi: mylex: Fix sysfs buffer lengths + - scsi: sd: Unregister device if device_add_disk() failed in sd_probe() + - Revert "ALSA: emu10k1: fix synthesizer sample playback position and caching" + - drm/i915/dp: Fix DSC state HW readout for SST connectors + - cifs: Fix caching to try to do open O_WRONLY as rdwr on server + - spi: mchp-pci1xxx: Fix a possible null pointer dereference in + pci1xxx_spi_probe + - s390/pai: fix sampling event removal for PMU device driver + - thermal: gov_power_allocator: Allow binding without cooling devices + - thermal: gov_power_allocator: Allow binding without trip points + - drm/i915/gt: Limit the reserved VM space to only the platforms that need it + - ata: sata_mv: Fix PCI device ID table declaration compilation warning + - ASoC: SOF: amd: fix for false dsp interrupts + - SUNRPC: Fix a slow server-side memory leak with RPC-over-TCP + - riscv: use KERN_INFO in do_trap + - riscv: Fix warning by declaring arch_cpu_idle() as noinstr + - riscv: Disable preemption when using patch_map() + - nfsd: hold a lighter-weight client reference over CB_RECALL_ANY + - lib/stackdepot: move stack_record struct definition into the header + - stackdepot: rename pool_index to pool_index_plus_1 + - x86/retpoline: Add NOENDBR annotation to the SRSO dummy return thunk + - Revert "drm/amd/display: Send DTBCLK disable message on first commit" + - gpio: cdev: check for NULL labels when sanitizing them for irqs + - gpio: cdev: fix missed label sanitizing in debounce_setup() + - ksmbd: don't send oplock break if rename fails + - ksmbd: validate payload size in ipc response + - ksmbd: do not set SMB2_GLOBAL_CAP_ENCRYPTION for SMB 3.1.1 + - ALSA: hda: Add pplcllpl/u members to hdac_ext_stream + - ALSA: hda/realtek - Fix inactive headset mic jack + - ALSA: hda/realtek: Add sound quirks for Lenovo Legion slim 7 16ARHA7 models + - ALSA: hda/realtek: cs35l41: Support ASUS ROG G634JYR + - ALSA: hda/realtek: Update Panasonic CF-SZ6 quirk to support headset with + microphone + - io_uring/kbuf: get rid of lower BGID lists + - io_uring/kbuf: get rid of bl->is_ready + - io_uring/kbuf: protect io_buffer_list teardown with a reference + - io_uring/rw: don't allow multishot reads without NOWAIT support + - io_uring: use private workqueue for exit work + - io_uring/kbuf: hold io_buffer_list reference over mmap + - ASoC: SOF: Add dsp_max_burst_size_in_ms member to snd_sof_pcm_stream + - ASoC: SOF: ipc4-topology: Save the DMA maximum burst size for PCMs + - ASoC: SOF: Intel: hda-pcm: Use dsp_max_burst_size_in_ms to place constraint + - ASoC: SOF: Intel: hda: Implement get_stream_position (Linear Link Position) + - ASoC: SOF: Intel: mtl/lnl: Use the generic get_stream_position callback + - ASoC: SOF: Introduce a new callback pair to be used for PCM delay reporting + - ASoC: SOF: Intel: Set the dai/host get frame/byte counter callbacks + - ASoC: SOF: Intel: hda-common-ops: Do not set the get_stream_position + callback + - ASoC: SOF: ipc4-pcm: Use the snd_sof_pcm_get_dai_frame_counter() for + pcm_delay + - ASoC: SOF: Remove the get_stream_position callback + - ASoC: SOF: ipc4-pcm: Move struct sof_ipc4_timestamp_info definition locally + - ASoC: SOF: ipc4-pcm: Combine the SOF_IPC4_PIPE_PAUSED cases in pcm_trigger + - ASoC: SOF: ipc4-pcm: Invalidate the stream_start_offset in PAUSED state + - ASoC: SOF: sof-pcm: Add pointer callback to sof_ipc_pcm_ops + - ASoC: SOF: ipc4-pcm: Correct the delay calculation + - ASoC: SOF: Intel: hda: Compensate LLP in case it is not reset + - driver core: Introduce device_link_wait_removal() + - of: dynamic: Synchronize of_changeset_destroy() with the devlink removals + - of: module: prevent NULL pointer dereference in vsnprintf() + - x86/mm/pat: fix VM_PAT handling in COW mappings + - x86/mce: Make sure to grab mce_sysfs_mutex in set_bank() + - x86/coco: Require seeding RNG with RDRAND on CoCo systems + - perf/x86/intel/ds: Don't clear ->pebs_data_cfg for the last PEBS event + - riscv: Fix vector state restore in rt_sigreturn() + - arm64/ptrace: Use saved floating point state type to determine SVE layout + - mm/secretmem: fix GUP-fast succeeding on secretmem folios + - selftests/mm: include strings.h for ffsl + - s390/entry: align system call table on 8 bytes + - riscv: Fix spurious errors from __get/put_kernel_nofault + - riscv: process: Fix kernel gp leakage + - smb: client: fix UAF in smb2_reconnect_server() + - smb: client: guarantee refcounted children from parent session + - smb: client: refresh referral without acquiring refpath_lock + - smb: client: handle DFS tcons in cifs_construct_tcon() + - smb: client: serialise cifs_construct_tcon() with cifs_mount_mutex + - smb3: retrying on failed server close + - smb: client: fix potential UAF in cifs_debug_files_proc_show() + - smb: client: fix potential UAF in cifs_stats_proc_write() + - smb: client: fix potential UAF in cifs_stats_proc_show() + - smb: client: fix potential UAF in cifs_dump_full_key() + - smb: client: fix potential UAF in smb2_is_valid_oplock_break() + - smb: client: fix potential UAF in smb2_is_valid_lease_break() + - smb: client: fix potential UAF in is_valid_oplock_break() + - smb: client: fix potential UAF in smb2_is_network_name_deleted() + - smb: client: fix potential UAF in cifs_signal_cifsd_for_reconnect() + - drm/i915/mst: Limit MST+DSC to TGL+ + - drm/i915/mst: Reject FEC+MST on ICL + - drm/i915/dp: Fix the computation for compressed_bpp for DISPLAY < 13 + - drm/i915/gt: Disable HW load balancing for CCS + - drm/i915/gt: Do not generate the command streamer for all the CCS + - drm/i915/gt: Enable only one CCS for compute workload + - drm/xe: Use ring ops TLB invalidation for rebinds + - drm/xe: Rework rebinding + - Revert "x86/mpparse: Register APIC address only once" + - bpf: put uprobe link's path and task in release callback + - bpf: support deferring bpf_link dealloc to after RCU grace period + - efi/libstub: Add generic support for parsing mem_encrypt= + - x86/boot: Move mem_encrypt= parsing to the decompressor + - x86/sme: Move early SME kernel encryption handling into .head.text + - x86/sev: Move early startup code into .head.text section + - Linux 6.8.5 + + * CVE-2024-26926 + - binder: check offset alignment in binder_get_object() + + * CVE-2024-26922 + - drm/amdgpu: validate the parameters of bo mapping operations more clearly + + * CVE-2024-26924 + - netfilter: nft_set_pipapo: do not free live element + + -- Stefan Bader Fri, 07 Jun 2024 14:51:17 +0200 + +linux (6.8.0-35.35) noble; urgency=medium + + * noble/linux: 6.8.0-35.35 -proposed tracker (LP: #2065886) + + * CVE-2024-21823 + - VFIO: Add the SPR_DSA and SPR_IAX devices to the denylist + - dmaengine: idxd: add a new security check to deal with a hardware erratum + - dmaengine: idxd: add a write() method for applications to submit work + + -- Roxana Nicolescu Mon, 20 May 2024 16:26:15 +0200 + +linux (6.8.0-34.34) noble; urgency=medium + + * noble/linux: 6.8.0-34.34 -proposed tracker (LP: #2065167) + + * Packaging resync (LP: #1786013) + - [Packaging] debian.master/dkms-versions -- update from kernel-versions + (main/2024.04.29) + + -- Roxana Nicolescu Wed, 08 May 2024 13:14:41 +0200 + +linux (6.8.0-32.32) noble; urgency=medium + + * noble/linux: 6.8.0-32.32 -proposed tracker (LP: #2064344) + + * Packaging resync (LP: #1786013) + - [Packaging] drop getabis data + - [Packaging] update variants + - [Packaging] update annotations scripts + - [Packaging] debian.master/dkms-versions -- update from kernel-versions + (main/2024.04.29) + + * Enable Nezha board (LP: #1975592) + - [Config] Enable CONFIG_REGULATOR_FIXED_VOLTAGE on riscv64 + + * Enable Nezha board (LP: #1975592) // Enable StarFive VisionFive 2 board + (LP: #2013232) + - [Config] Enable CONFIG_SERIAL_8250_DW on riscv64 + + * RISC-V kernel config is out of sync with other archs (LP: #1981437) + - [Config] Sync riscv64 config with other architectures + + * obsolete out-of-tree ivsc dkms in favor of in-tree one (LP: #2061747) + - ACPI: scan: Defer enumeration of devices with a _DEP pointing to IVSC device + - Revert "mei: vsc: Call wake_up() in the threaded IRQ handler" + - mei: vsc: Unregister interrupt handler for system suspend + - media: ipu-bridge: Add ov01a10 in Dell XPS 9315 + - SAUCE: media: ipu-bridge: Support more sensors + + * Fix after-suspend-mediacard/sdhc-insert test failed (LP: #2042500) + - PCI/ASPM: Move pci_configure_ltr() to aspm.c + - PCI/ASPM: Always build aspm.c + - PCI/ASPM: Move pci_save_ltr_state() to aspm.c + - PCI/ASPM: Save L1 PM Substates Capability for suspend/resume + - PCI/ASPM: Call pci_save_ltr_state() from pci_save_pcie_state() + - PCI/ASPM: Disable L1 before configuring L1 Substates + - PCI/ASPM: Update save_state when configuration changes + + * RTL8852BE fw security fail then lost WIFI function during suspend/resume + cycle (LP: #2063096) + - wifi: rtw89: download firmware with five times retry + + * intel_rapl_common: Add support for ARL and LNL (LP: #2061953) + - powercap: intel_rapl: Add support for Lunar Lake-M paltform + - powercap: intel_rapl: Add support for Arrow Lake + + * Kernel panic during checkbox stress_ng_test on Grace running noble 6.8 + (arm64+largemem) kernel (LP: #2058557) + - aio: Fix null ptr deref in aio_complete() wakeup + + * Avoid creating non-working backlight sysfs knob from ASUS board + (LP: #2060422) + - platform/x86: asus-wmi: Consider device is absent when the read is ~0 + + * Include cifs.ko in linux-modules package (LP: #2042546) + - [Packaging] Replace fs/cifs with fs/smb/client in inclusion list + + * Add Real-time Linux Analysis tool (rtla) to linux-tools (LP: #2059080) + - SAUCE: rtla: fix deb build + - [Packaging] add Real-time Linux Analysis tool (rtla) to linux-tools + - [Packaging] update dependencies for rtla + + * Noble update: v6.8.4 upstream stable release (LP: #2060533) + - Revert "workqueue: Shorten events_freezable_power_efficient name" + - Revert "workqueue: Don't call cpumask_test_cpu() with -1 CPU in + wq_update_node_max_active()" + - Revert "workqueue: Implement system-wide nr_active enforcement for unbound + workqueues" + - Revert "workqueue: Introduce struct wq_node_nr_active" + - Revert "workqueue: RCU protect wq->dfl_pwq and implement accessors for it" + - Revert "workqueue: Make wq_adjust_max_active() round-robin pwqs while + activating" + - Revert "workqueue: Move nr_active handling into helpers" + - Revert "workqueue: Replace pwq_activate_inactive_work() with + [__]pwq_activate_work()" + - Revert "workqueue: Factor out pwq_is_empty()" + - Revert "workqueue: Move pwq->max_active to wq->max_active" + - Revert "workqueue.c: Increase workqueue name length" + - Linux 6.8.4 + + * Noble update: v6.8.3 upstream stable release (LP: #2060531) + - drm/vmwgfx: Unmap the surface before resetting it on a plane state + - wifi: brcmfmac: Fix use-after-free bug in brcmf_cfg80211_detach + - wifi: brcmfmac: avoid invalid list operation when vendor attach fails + - media: staging: ipu3-imgu: Set fields before media_entity_pads_init() + - arm64: dts: qcom: sc7280: Add additional MSI interrupts + - remoteproc: virtio: Fix wdg cannot recovery remote processor + - clk: qcom: gcc-sdm845: Add soft dependency on rpmhpd + - smack: Set SMACK64TRANSMUTE only for dirs in smack_inode_setxattr() + - smack: Handle SMACK64TRANSMUTE in smack_inode_setsecurity() + - arm: dts: marvell: Fix maxium->maxim typo in brownstone dts + - drm/vmwgfx: Fix possible null pointer derefence with invalid contexts + - arm64: dts: qcom: sm8450-hdk: correct AMIC4 and AMIC5 microphones + - serial: max310x: fix NULL pointer dereference in I2C instantiation + - drm/vmwgfx: Fix the lifetime of the bo cursor memory + - pci_iounmap(): Fix MMIO mapping leak + - media: xc4000: Fix atomicity violation in xc4000_get_frequency + - media: mc: Add local pad to pipeline regardless of the link state + - media: mc: Fix flags handling when creating pad links + - media: nxp: imx8-isi: Check whether crossbar pad is non-NULL before access + - media: mc: Add num_links flag to media_pad + - media: mc: Rename pad variable to clarify intent + - media: mc: Expand MUST_CONNECT flag to always require an enabled link + - media: nxp: imx8-isi: Mark all crossbar sink pads as MUST_CONNECT + - md: use RCU lock to protect traversal in md_spares_need_change() + - KVM: Always flush async #PF workqueue when vCPU is being destroyed + - arm64: dts: qcom: sm8550-qrd: correct WCD9385 TX port mapping + - arm64: dts: qcom: sm8550-mtp: correct WCD9385 TX port mapping + - cpufreq: amd-pstate: Fix min_perf assignment in amd_pstate_adjust_perf() + - thermal/intel: Fix intel_tcc_get_temp() to support negative CPU temperature + - powercap: intel_rapl: Fix a NULL pointer dereference + - powercap: intel_rapl: Fix locking in TPMI RAPL + - powercap: intel_rapl_tpmi: Fix a register bug + - powercap: intel_rapl_tpmi: Fix System Domain probing + - powerpc/smp: Adjust nr_cpu_ids to cover all threads of a core + - powerpc/smp: Increase nr_cpu_ids to include the boot CPU + - sparc64: NMI watchdog: fix return value of __setup handler + - sparc: vDSO: fix return value of __setup handler + - selftests/mqueue: Set timeout to 180 seconds + - pinctrl: qcom: sm8650-lpass-lpi: correct Kconfig name + - ext4: correct best extent lstart adjustment logic + - drm/amdgpu/display: Address kdoc for 'is_psr_su' in 'fill_dc_dirty_rects' + - block: Clear zone limits for a non-zoned stacked queue + - kasan/test: avoid gcc warning for intentional overflow + - bounds: support non-power-of-two CONFIG_NR_CPUS + - fat: fix uninitialized field in nostale filehandles + - fuse: fix VM_MAYSHARE and direct_io_allow_mmap + - mfd: twl: Select MFD_CORE + - ubifs: Set page uptodate in the correct place + - ubi: Check for too small LEB size in VTBL code + - ubi: correct the calculation of fastmap size + - ubifs: ubifs_symlink: Fix memleak of inode->i_link in error path + - mtd: rawnand: meson: fix scrambling mode value in command macro + - md/md-bitmap: fix incorrect usage for sb_index + - x86/nmi: Fix the inverse "in NMI handler" check + - parisc/unaligned: Rewrite 64-bit inline assembly of emulate_ldd() + - parisc: Avoid clobbering the C/B bits in the PSW with tophys and tovirt + macros + - parisc: Fix ip_fast_csum + - parisc: Fix csum_ipv6_magic on 32-bit systems + - parisc: Fix csum_ipv6_magic on 64-bit systems + - parisc: Strip upper 32 bit of sum in csum_ipv6_magic for 64-bit builds + - md/raid5: fix atomicity violation in raid5_cache_count + - iio: adc: rockchip_saradc: fix bitmask for channels on SARADCv2 + - iio: adc: rockchip_saradc: use mask for write_enable bitfield + - docs: Restore "smart quotes" for quotes + - cpufreq: Limit resolving a frequency to policy min/max + - PM: suspend: Set mem_sleep_current during kernel command line setup + - vfio/pds: Always clear the save/restore FDs on reset + - clk: qcom: gcc-ipq5018: fix terminating of frequency table arrays + - clk: qcom: gcc-ipq6018: fix terminating of frequency table arrays + - clk: qcom: gcc-ipq8074: fix terminating of frequency table arrays + - clk: qcom: gcc-ipq9574: fix terminating of frequency table arrays + - clk: qcom: camcc-sc8280xp: fix terminating of frequency table arrays + - clk: qcom: mmcc-apq8084: fix terminating of frequency table arrays + - clk: qcom: mmcc-msm8974: fix terminating of frequency table arrays + - usb: xhci: Add error handling in xhci_map_urb_for_dma + - powerpc/fsl: Fix mfpmr build errors with newer binutils + - USB: serial: ftdi_sio: add support for GMC Z216C Adapter IR-USB + - USB: serial: add device ID for VeriFone adapter + - USB: serial: cp210x: add ID for MGP Instruments PDS100 + - wifi: mac80211: track capability/opmode NSS separately + - USB: serial: option: add MeiG Smart SLM320 product + - KVM: x86/xen: inject vCPU upcall vector when local APIC is enabled + - USB: serial: cp210x: add pid/vid for TDK NC0110013M and MM0110113M + - PM: sleep: wakeirq: fix wake irq warning in system suspend + - mmc: tmio: avoid concurrent runs of mmc_request_done() + - fuse: replace remaining make_bad_inode() with fuse_make_bad() + - fuse: fix root lookup with nonzero generation + - fuse: don't unhash root + - usb: typec: ucsi: Clean up UCSI_CABLE_PROP macros + - usb: dwc3-am62: fix module unload/reload behavior + - usb: dwc3-am62: Disable wakeup at remove + - serial: core: only stop transmit when HW fifo is empty + - serial: Lock console when calling into driver before registration + - btrfs: qgroup: always free reserved space for extent records + - btrfs: fix off-by-one chunk length calculation at contains_pending_extent() + - wifi: rtw88: Add missing VID/PIDs for 8811CU and 8821CU + - docs: Makefile: Add dependency to $(YNL_INDEX) for targets other than + htmldocs + - PCI/PM: Drain runtime-idle callbacks before driver removal + - PCI/DPC: Quirk PIO log size for Intel Raptor Lake Root Ports + - Revert "Revert "md/raid5: Wait for MD_SB_CHANGE_PENDING in raid5d"" + - md: don't clear MD_RECOVERY_FROZEN for new dm-raid until resume + - md: export helpers to stop sync_thread + - md: export helper md_is_rdwr() + - md: add a new helper reshape_interrupted() + - dm-raid: really frozen sync_thread during suspend + - md/dm-raid: don't call md_reap_sync_thread() directly + - dm-raid: add a new helper prepare_suspend() in md_personality + - dm-raid456, md/raid456: fix a deadlock for dm-raid456 while io concurrent + with reshape + - dm-raid: fix lockdep waring in "pers->hot_add_disk" + - powerpc: xor_vmx: Add '-mhard-float' to CFLAGS + - mac802154: fix llsec key resources release in mac802154_llsec_key_del + - mm: swap: fix race between free_swap_and_cache() and swapoff() + - mmc: core: Fix switch on gp3 partition + - Bluetooth: btnxpuart: Fix btnxpuart_close + - leds: trigger: netdev: Fix kernel panic on interface rename trig notify + - drm/etnaviv: Restore some id values + - landlock: Warn once if a Landlock action is requested while disabled + - io_uring: fix mshot read defer taskrun cqe posting + - hwmon: (amc6821) add of_match table + - io_uring: fix io_queue_proc modifying req->flags + - ext4: fix corruption during on-line resize + - nvmem: meson-efuse: fix function pointer type mismatch + - slimbus: core: Remove usage of the deprecated ida_simple_xx() API + - phy: tegra: xusb: Add API to retrieve the port number of phy + - usb: gadget: tegra-xudc: Fix USB3 PHY retrieval logic + - speakup: Fix 8bit characters from direct synth + - debugfs: fix wait/cancellation handling during remove + - PCI/AER: Block runtime suspend when handling errors + - io_uring/net: correctly handle multishot recvmsg retry setup + - io_uring: fix mshot io-wq checks + - PCI: qcom: Disable ASPM L0s for sc8280xp, sa8540p and sa8295p + - sparc32: Fix parport build with sparc32 + - nfs: fix UAF in direct writes + - NFS: Read unlock folio on nfs_page_create_from_folio() error + - kbuild: Move -Wenum-{compare-conditional,enum-conversion} into W=1 + - PCI: qcom: Enable BDF to SID translation properly + - PCI: dwc: endpoint: Fix advertised resizable BAR size + - PCI: hv: Fix ring buffer size calculation + - cifs: prevent updating file size from server if we have a read/write lease + - cifs: allow changing password during remount + - thermal/drivers/mediatek: Fix control buffer enablement on MT7896 + - vfio/pci: Disable auto-enable of exclusive INTx IRQ + - vfio/pci: Lock external INTx masking ops + - vfio/platform: Disable virqfds on cleanup + - vfio/platform: Create persistent IRQ handlers + - vfio/fsl-mc: Block calling interrupt handler without trigger + - tpm,tpm_tis: Avoid warning splat at shutdown + - ksmbd: replace generic_fillattr with vfs_getattr + - ksmbd: retrieve number of blocks using vfs_getattr in + set_file_allocation_info + - platform/x86/intel/tpmi: Change vsec offset to u64 + - io_uring/rw: return IOU_ISSUE_SKIP_COMPLETE for multishot retry + - io_uring: clean rings on NO_MMAP alloc fail + - ring-buffer: Do not set shortest_full when full target is hit + - ring-buffer: Fix full_waiters_pending in poll + - ring-buffer: Use wait_event_interruptible() in ring_buffer_wait() + - tracing/ring-buffer: Fix wait_on_pipe() race + - dlm: fix user space lkb refcounting + - soc: fsl: qbman: Always disable interrupts when taking cgr_lock + - soc: fsl: qbman: Use raw spinlock for cgr_lock + - s390/zcrypt: fix reference counting on zcrypt card objects + - drm/probe-helper: warn about negative .get_modes() + - drm/panel: do not return negative error codes from drm_panel_get_modes() + - drm/exynos: do not return negative values from .get_modes() + - drm/imx/ipuv3: do not return negative values from .get_modes() + - drm/vc4: hdmi: do not return negative values from .get_modes() + - clocksource/drivers/timer-riscv: Clear timer interrupt on timer + initialization + - memtest: use {READ,WRITE}_ONCE in memory scanning + - Revert "block/mq-deadline: use correct way to throttling write requests" + - lsm: use 32-bit compatible data types in LSM syscalls + - lsm: handle the NULL buffer case in lsm_fill_user_ctx() + - f2fs: mark inode dirty for FI_ATOMIC_COMMITTED flag + - f2fs: truncate page cache before clearing flags when aborting atomic write + - nilfs2: fix failure to detect DAT corruption in btree and direct mappings + - nilfs2: prevent kernel bug at submit_bh_wbc() + - cifs: make sure server interfaces are requested only for SMB3+ + - cifs: reduce warning log level for server not advertising interfaces + - cifs: open_cached_dir(): add FILE_READ_EA to desired access + - mtd: rawnand: Fix and simplify again the continuous read derivations + - mtd: rawnand: Add a helper for calculating a page index + - mtd: rawnand: Ensure all continuous terms are always in sync + - mtd: rawnand: Constrain even more when continuous reads are enabled + - cpufreq: dt: always allocate zeroed cpumask + - io_uring/futex: always remove futex entry for cancel all + - io_uring/waitid: always remove waitid entry for cancel all + - x86/CPU/AMD: Update the Zenbleed microcode revisions + - ksmbd: fix slab-out-of-bounds in smb_strndup_from_utf16() + - net: esp: fix bad handling of pages from page_pool + - NFSD: Fix nfsd_clid_class use of __string_len() macro + - drm/i915: Add missing ; to __assign_str() macros in tracepoint code + - net: hns3: tracing: fix hclgevf trace event strings + - cxl/trace: Properly initialize cxl_poison region name + - ksmbd: fix potencial out-of-bounds when buffer offset is invalid + - virtio: reenable config if freezing device failed + - LoongArch: Change __my_cpu_offset definition to avoid mis-optimization + - LoongArch: Define the __io_aw() hook as mmiowb() + - LoongArch/crypto: Clean up useless assignment operations + - wireguard: netlink: check for dangling peer via is_dead instead of empty + list + - wireguard: netlink: access device through ctx instead of peer + - wireguard: selftests: set RISCV_ISA_FALLBACK on riscv{32,64} + - ahci: asm1064: asm1166: don't limit reported ports + - drm/amd/display: Change default size for dummy plane in DML2 + - drm/amdgpu: amdgpu_ttm_gart_bind set gtt bound flag + - drm/amdgpu/pm: Fix NULL pointer dereference when get power limit + - drm/amdgpu/pm: Check the validity of overdiver power limit + - drm/amd/display: Override min required DCFCLK in dml1_validate + - drm/amd/display: Allow dirty rects to be sent to dmub when abm is active + - drm/amd/display: Init DPPCLK from SMU on dcn32 + - drm/amd/display: Update odm when ODM combine is changed on an otg master + pipe with no plane + - drm/amd/display: Fix idle check for shared firmware state + - drm/amd/display: Amend coasting vtotal for replay low hz + - drm/amd/display: Lock all enabled otg pipes even with no planes + - drm/amd/display: Implement wait_for_odm_update_pending_complete + - drm/amd/display: Return the correct HDCP error code + - drm/amd/display: Add a dc_state NULL check in dc_state_release + - drm/amd/display: Fix noise issue on HDMI AV mute + - dm snapshot: fix lockup in dm_exception_table_exit + - x86/pm: Work around false positive kmemleak report in msr_build_context() + - wifi: brcmfmac: add per-vendor feature detection callback + - wifi: brcmfmac: cfg80211: Use WSEC to set SAE password + - wifi: brcmfmac: Demote vendor-specific attach/detach messages to info + - drm/ttm: Make sure the mapped tt pages are decrypted when needed + - drm/amd/display: Unify optimize_required flags and VRR adjustments + - drm/amd/display: Add more checks for exiting idle in DC + - btrfs: add set_folio_extent_mapped() helper + - btrfs: replace sb::s_blocksize by fs_info::sectorsize + - btrfs: add helpers to get inode from page/folio pointers + - btrfs: add helpers to get fs_info from page/folio pointers + - btrfs: add helper to get fs_info from struct inode pointer + - btrfs: qgroup: validate btrfs_qgroup_inherit parameter + - vfio: Introduce interface to flush virqfd inject workqueue + - vfio/pci: Create persistent INTx handler + - drm/bridge: add ->edid_read hook and drm_bridge_edid_read() + - drm/bridge: lt8912b: use drm_bridge_edid_read() + - drm/bridge: lt8912b: clear the EDID property on failures + - drm/bridge: lt8912b: do not return negative values from .get_modes() + - drm/amd/display: Remove pixle rate limit for subvp + - drm/amd/display: Revert Remove pixle rate limit for subvp + - workqueue: Shorten events_freezable_power_efficient name + - drm/amd/display: Use freesync when `DRM_EDID_FEATURE_CONTINUOUS_FREQ` found + - netfilter: nf_tables: reject constant set with timeout + - Revert "crypto: pkcs7 - remove sha1 support" + - x86/efistub: Call mixed mode boot services on the firmware's stack + - ASoC: amd: yc: Revert "Fix non-functional mic on Lenovo 21J2" + - ASoC: amd: yc: Revert "add new YC platform variant (0x63) support" + - Fix memory leak in posix_clock_open() + - wifi: rtw88: 8821cu: Fix connection failure + - x86/Kconfig: Remove CONFIG_AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT + - x86/sev: Fix position dependent variable references in startup code + - clocksource/drivers/arm_global_timer: Fix maximum prescaler value + - ARM: 9352/1: iwmmxt: Remove support for PJ4/PJ4B cores + - ARM: 9359/1: flush: check if the folio is reserved for no-mapping addresses + - entry: Respect changes to system call number by trace_sys_enter() + - swiotlb: Fix double-allocation of slots due to broken alignment handling + - swiotlb: Honour dma_alloc_coherent() alignment in swiotlb_alloc() + - swiotlb: Fix alignment checks when both allocation and DMA masks are present + - iommu/dma: Force swiotlb_max_mapping_size on an untrusted device + - printk: Update @console_may_schedule in console_trylock_spinning() + - irqchip/renesas-rzg2l: Flush posted write in irq_eoi() + - irqchip/renesas-rzg2l: Rename rzg2l_tint_eoi() + - irqchip/renesas-rzg2l: Rename rzg2l_irq_eoi() + - irqchip/renesas-rzg2l: Prevent spurious interrupts when setting trigger type + - kprobes/x86: Use copy_from_kernel_nofault() to read from unsafe address + - efi/libstub: fix efi_random_alloc() to allocate memory at alloc_min or + higher address + - x86/mpparse: Register APIC address only once + - x86/fpu: Keep xfd_state in sync with MSR_IA32_XFD + - efi: fix panic in kdump kernel + - pwm: img: fix pwm clock lookup + - selftests/mm: Fix build with _FORTIFY_SOURCE + - btrfs: handle errors returned from unpin_extent_cache() + - btrfs: fix warning messages not printing interval at unpin_extent_range() + - btrfs: do not skip re-registration for the mounted device + - mfd: intel-lpss: Switch to generalized quirk table + - mfd: intel-lpss: Introduce QUIRK_CLOCK_DIVIDER_UNITY for XPS 9530 + - drm/i915: Replace a memset() with zero initialization + - drm/i915: Try to preserve the current shared_dpll for fastset on type-c + ports + - drm/i915: Include the PLL name in the debug messages + - drm/i915: Suppress old PLL pipe_mask checks for MG/TC/TBT PLLs + - crypto: iaa - Fix nr_cpus < nr_iaa case + - drm/amd/display: Prevent crash when disable stream + - ALSA: hda/tas2781: remove digital gain kcontrol + - ALSA: hda/tas2781: add locks to kcontrols + - mm: zswap: fix writeback shinker GFP_NOIO/GFP_NOFS recursion + - init: open /initrd.image with O_LARGEFILE + - x86/efistub: Add missing boot_params for mixed mode compat entry + - efi/libstub: Cast away type warning in use of max() + - x86/efistub: Reinstate soft limit for initrd loading + - prctl: generalize PR_SET_MDWE support check to be per-arch + - ARM: prctl: reject PR_SET_MDWE on pre-ARMv6 + - tmpfs: fix race on handling dquot rbtree + - btrfs: validate device maj:min during open + - btrfs: fix race in read_extent_buffer_pages() + - btrfs: zoned: don't skip block groups with 100% zone unusable + - btrfs: zoned: use zone aware sb location for scrub + - btrfs: zoned: fix use-after-free in do_zone_finish() + - wifi: mac80211: check/clear fast rx for non-4addr sta VLAN changes + - wifi: cfg80211: add a flag to disable wireless extensions + - wifi: iwlwifi: mvm: disable MLO for the time being + - wifi: iwlwifi: fw: don't always use FW dump trig + - wifi: iwlwifi: mvm: handle debugfs names more carefully + - Revert "drm/amd/display: Fix sending VSC (+ colorimetry) packets for DP/eDP + displays without PSR" + - fbdev: Select I/O-memory framebuffer ops for SBus + - exec: Fix NOMMU linux_binprm::exec in transfer_args_to_stack() + - hexagon: vmlinux.lds.S: handle attributes section + - mm: cachestat: fix two shmem bugs + - selftests/mm: sigbus-wp test requires UFFD_FEATURE_WP_HUGETLBFS_SHMEM + - selftests/mm: fix ARM related issue with fork after pthread_create + - mmc: sdhci-omap: re-tuning is needed after a pm transition to support emmc + HS200 mode + - mmc: core: Initialize mmc_blk_ioc_data + - mmc: core: Avoid negative index with array access + - sdhci-of-dwcmshc: disable PM runtime in dwcmshc_remove() + - block: Do not force full zone append completion in req_bio_endio() + - thermal: devfreq_cooling: Fix perf state when calculate dfc res_util + - Revert "thermal: core: Don't update trip points inside the hysteresis range" + - nouveau/dmem: handle kcalloc() allocation failure + - net: ll_temac: platform_get_resource replaced by wrong function + - net: wan: framer: Add missing static inline qualifiers + - net: phy: qcom: at803x: fix kernel panic with at8031_probe + - drm/xe/query: fix gt_id bounds check + - drm/dp: Fix divide-by-zero regression on DP MST unplug with nouveau + - drm/vmwgfx: Create debugfs ttm_resource_manager entry only if needed + - drm/amdkfd: fix TLB flush after unmap for GFX9.4.2 + - drm/amdgpu: fix deadlock while reading mqd from debugfs + - drm/amd/display: Remove MPC rate control logic from DCN30 and above + - drm/amd/display: Set DCN351 BB and IP the same as DCN35 + - drm/i915/hwmon: Fix locking inversion in sysfs getter + - drm/i915/vma: Fix UAF on destroy against retire race + - drm/i915/bios: Tolerate devdata==NULL in + intel_bios_encoder_supports_dp_dual_mode() + - drm/i915/vrr: Generate VRR "safe window" for DSB + - drm/i915/dsi: Go back to the previous INIT_OTP/DISPLAY_ON order, mostly + - drm/i915/dsb: Fix DSB vblank waits when using VRR + - drm/i915: Do not match JSL in ehl_combo_pll_div_frac_wa_needed() + - drm/i915: Pre-populate the cursor physical dma address + - drm/i915/gt: Reset queue_priority_hint on parking + - drm/amd/display: Fix bounds check for dcn35 DcfClocks + - Bluetooth: hci_sync: Fix not checking error on hci_cmd_sync_cancel_sync + - mtd: spinand: Add support for 5-byte IDs + - Revert "usb: phy: generic: Get the vbus supply" + - usb: cdc-wdm: close race between read and workqueue + - usb: misc: ljca: Fix double free in error handling path + - USB: UAS: return ENODEV when submit urbs fail with device not attached + - vfio/pds: Make sure migration file isn't accessed after reset + - ring-buffer: Make wake once of ring_buffer_wait() more robust + - btrfs: fix extent map leak in unexpected scenario at unpin_extent_cache() + - ALSA: sh: aica: reorder cleanup operations to avoid UAF bugs + - scsi: ufs: qcom: Provide default cycles_in_1us value + - scsi: sd: Fix TCG OPAL unlock on system resume + - scsi: core: Fix unremoved procfs host directory regression + - staging: vc04_services: changen strncpy() to strscpy_pad() + - staging: vc04_services: fix information leak in create_component() + - genirq: Introduce IRQF_COND_ONESHOT and use it in pinctrl-amd + - usb: dwc3: Properly set system wakeup + - USB: core: Fix deadlock in usb_deauthorize_interface() + - USB: core: Add hub_get() and hub_put() routines + - USB: core: Fix deadlock in port "disable" sysfs attribute + - usb: dwc2: host: Fix remote wakeup from hibernation + - usb: dwc2: host: Fix hibernation flow + - usb: dwc2: host: Fix ISOC flow in DDMA mode + - usb: dwc2: gadget: Fix exiting from clock gating + - usb: dwc2: gadget: LPM flow fix + - usb: udc: remove warning when queue disabled ep + - usb: typec: ucsi: Fix race between typec_switch and role_switch + - usb: typec: tcpm: fix double-free issue in tcpm_port_unregister_pd() + - usb: typec: tcpm: Correct port source pdo array in pd_set callback + - usb: typec: tcpm: Update PD of Type-C port upon pd_set + - usb: typec: Return size of buffer if pd_set operation succeeds + - usb: typec: ucsi: Clear EVENT_PENDING under PPM lock + - usb: typec: ucsi: Ack unsupported commands + - usb: typec: ucsi_acpi: Refactor and fix DELL quirk + - usb: typec: ucsi: Clear UCSI_CCI_RESET_COMPLETE before reset + - scsi: qla2xxx: Prevent command send on chip reset + - scsi: qla2xxx: Fix N2N stuck connection + - scsi: qla2xxx: Split FCE|EFT trace control + - scsi: qla2xxx: Update manufacturer detail + - scsi: qla2xxx: NVME|FCP prefer flag not being honored + - scsi: qla2xxx: Fix command flush on cable pull + - scsi: qla2xxx: Fix double free of the ha->vp_map pointer + - scsi: qla2xxx: Fix double free of fcport + - scsi: qla2xxx: Change debug message during driver unload + - scsi: qla2xxx: Delay I/O Abort on PCI error + - x86/bugs: Fix the SRSO mitigation on Zen3/4 + - crash: use macro to add crashk_res into iomem early for specific arch + - drm/amd/display: fix IPX enablement + - x86/bugs: Use fixed addressing for VERW operand + - Revert "x86/bugs: Use fixed addressing for VERW operand" + - usb: dwc3: pci: Drop duplicate ID + - scsi: lpfc: Correct size for cmdwqe/rspwqe for memset() + - scsi: lpfc: Correct size for wqe for memset() + - scsi: libsas: Add a helper sas_get_sas_addr_and_dev_type() + - scsi: libsas: Fix disk not being scanned in after being removed + - perf/x86/amd/core: Update and fix stalled-cycles-* events for Zen 2 and + later + - x86/sev: Skip ROM range scans and validation for SEV-SNP guests + - tools/resolve_btfids: fix build with musl libc + - drm/amdgpu: fix use-after-free bug + - drm/sched: fix null-ptr-deref in init entity + - Linux 6.8.3 + - [Config] updateconfigs following v6.8.3 import + + * Noble update: v6.8.3 upstream stable release (LP: #2060531) // + [Ubuntu-24.04] Hugepage memory is not getting released even after destroying + the guest! (LP: #2062556) + - block: Fix page refcounts for unaligned buffers in __bio_release_pages() + + * [SPR][EMR][GNR] TDX: efi: TD Measurement support for kernel cmdline/initrd + sections from EFI stub (LP: #2060130) + - efi/libstub: Use TPM event typedefs from the TCG PC Client spec + - efi/tpm: Use symbolic GUID name from spec for final events table + - efi/libstub: Add Confidential Computing (CC) measurement typedefs + - efi/libstub: Measure into CC protocol if TCG2 protocol is absent + - efi/libstub: Add get_event_log() support for CC platforms + - x86/efistub: Remap kernel text read-only before dropping NX attribute + + * Fix acpi_power_meter accessing IPMI region before it's ready (LP: #2059263) + - ACPI: IPMI: Add helper to wait for when SMI is selected + - hwmon: (acpi_power_meter) Ensure IPMI space handler is ready on Dell systems + + * Drop fips-checks script from trees (LP: #2055083) + - [Packaging] Remove fips-checks script + + * alsa/realtek: adjust max output valume for headphone on 2 LG machines + (LP: #2058573) + - ALSA: hda/realtek: fix the hp playback volume issue for LG machines + + * Noble update: v6.8.2 upstream stable release (LP: #2060097) + - do_sys_name_to_handle(): use kzalloc() to fix kernel-infoleak + - workqueue.c: Increase workqueue name length + - workqueue: Move pwq->max_active to wq->max_active + - workqueue: Factor out pwq_is_empty() + - workqueue: Replace pwq_activate_inactive_work() with [__]pwq_activate_work() + - workqueue: Move nr_active handling into helpers + - workqueue: Make wq_adjust_max_active() round-robin pwqs while activating + - workqueue: RCU protect wq->dfl_pwq and implement accessors for it + - workqueue: Introduce struct wq_node_nr_active + - workqueue: Implement system-wide nr_active enforcement for unbound + workqueues + - workqueue: Don't call cpumask_test_cpu() with -1 CPU in + wq_update_node_max_active() + - iomap: clear the per-folio dirty bits on all writeback failures + - fs: Fix rw_hint validation + - io_uring: remove looping around handling traditional task_work + - io_uring: remove unconditional looping in local task_work handling + - s390/dasd: Use dev_*() for device log messages + - s390/dasd: fix double module refcount decrement + - fs/hfsplus: use better @opf description + - md: fix kmemleak of rdev->serial + - rcu/exp: Fix RCU expedited parallel grace period kworker allocation failure + recovery + - rcu/exp: Handle RCU expedited grace period kworker allocation failure + - fs/select: rework stack allocation hack for clang + - block: fix deadlock between bd_link_disk_holder and partition scan + - md: Don't clear MD_CLOSING when the raid is about to stop + - kunit: Setup DMA masks on the kunit device + - ovl: Always reject mounting over case-insensitive directories + - kunit: test: Log the correct filter string in executor_test + - lib/cmdline: Fix an invalid format specifier in an assertion msg + - lib: memcpy_kunit: Fix an invalid format specifier in an assertion msg + - time: test: Fix incorrect format specifier + - rtc: test: Fix invalid format specifier. + - net: test: Fix printf format specifier in skb_segment kunit test + - drm/xe/tests: Fix printf format specifiers in xe_migrate test + - drm: tests: Fix invalid printf format specifiers in KUnit tests + - md/raid1: factor out helpers to add rdev to conf + - md/raid1: record nonrot rdevs while adding/removing rdevs to conf + - md/raid1: fix choose next idle in read_balance() + - io_uring/net: unify how recvmsg and sendmsg copy in the msghdr + - io_uring/net: move receive multishot out of the generic msghdr path + - io_uring/net: fix overflow check in io_recvmsg_mshot_prep() + - nvme: host: fix double-free of struct nvme_id_ns in ns_update_nuse() + - aoe: fix the potential use-after-free problem in aoecmd_cfg_pkts + - x86/mm: Ensure input to pfn_to_kaddr() is treated as a 64-bit type + - x86/resctrl: Remove hard-coded memory bandwidth limit + - x86/resctrl: Read supported bandwidth sources from CPUID + - x86/resctrl: Implement new mba_MBps throttling heuristic + - x86/sme: Fix memory encryption setting if enabled by default and not + overridden + - timekeeping: Fix cross-timestamp interpolation on counter wrap + - timekeeping: Fix cross-timestamp interpolation corner case decision + - timekeeping: Fix cross-timestamp interpolation for non-x86 + - x86/asm: Remove the __iomem annotation of movdir64b()'s dst argument + - sched/fair: Take the scheduling domain into account in select_idle_smt() + - sched/fair: Take the scheduling domain into account in select_idle_core() + - wifi: ath10k: fix NULL pointer dereference in + ath10k_wmi_tlv_op_pull_mgmt_tx_compl_ev() + - wifi: b43: Stop/wake correct queue in DMA Tx path when QoS is disabled + - wifi: b43: Stop/wake correct queue in PIO Tx path when QoS is disabled + - wifi: b43: Stop correct queue in DMA worker when QoS is disabled + - wifi: b43: Disable QoS for bcm4331 + - wifi: wilc1000: fix declarations ordering + - wifi: wilc1000: fix RCU usage in connect path + - wifi: ath11k: add support to select 6 GHz regulatory type + - wifi: ath11k: store cur_regulatory_info for each radio + - wifi: ath11k: fix a possible dead lock caused by ab->base_lock + - wifi: rtl8xxxu: add cancel_work_sync() for c2hcmd_work + - wifi: wilc1000: do not realloc workqueue everytime an interface is added + - wifi: wilc1000: fix multi-vif management when deleting a vif + - wifi: mwifiex: debugfs: Drop unnecessary error check for + debugfs_create_dir() + - ARM: dts: renesas: r8a73a4: Fix external clocks and clock rate + - arm64: dts: qcom: x1e80100: drop qcom,drv-count + - arm64: dts: qcom: sc8180x: Hook up VDD_CX as GCC parent domain + - arm64: dts: qcom: sc8180x: Fix up big CPU idle state entry latency + - arm64: dts: qcom: sc8180x: Add missing CPU off state + - arm64: dts: qcom: sc8180x: Fix eDP PHY power-domains + - arm64: dts: qcom: sc8180x: Don't hold MDP core clock at FMAX + - arm64: dts: qcom: sc8180x: Require LOW_SVS vote for MMCX if DISPCC is on + - arm64: dts: qcom: sc8180x: Add missing CPU<->MDP_CFG path + - arm64: dts: qcom: sc8180x: Shrink aoss_qmp register space size + - cpufreq: brcmstb-avs-cpufreq: add check for cpufreq_cpu_get's return value + - cpufreq: mediatek-hw: Wait for CPU supplies before probing + - sock_diag: annotate data-races around sock_diag_handlers[family] + - inet_diag: annotate data-races around inet_diag_table[] + - bpftool: Silence build warning about calloc() + - selftests/bpf: Fix potential premature unload in bpf_testmod + - libbpf: Apply map_set_def_max_entries() for inner_maps on creation + - selftest/bpf: Add map_in_maps with BPF_MAP_TYPE_PERF_EVENT_ARRAY values + - bpftool: Fix wrong free call in do_show_link + - wifi: ath12k: Fix issues in channel list update + - selftests/bpf: Fix the flaky tc_redirect_dtime test + - selftests/bpf: Wait for the netstamp_needed_key static key to be turned on + - wifi: cfg80211: add RNR with reporting AP information + - wifi: mac80211: use deflink and fix typo in link ID check + - wifi: iwlwifi: change link id in time event to s8 + - af_unix: Annotate data-race of gc_in_progress in wait_for_unix_gc(). + - arm64: dts: qcom: sm8450: Add missing interconnects to serial + - soc: qcom: socinfo: rename PM2250 to PM4125 + - arm64: dts: qcom: sc7280: Add static properties to cryptobam + - arm64: dts: qcom: qcm6490-fairphone-fp5: Add missing reserved-memory + - arm64: dts: qcom: sdm845-oneplus-common: improve DAI node naming + - arm64: dts: qcom: rename PM2250 to PM4125 + - cpufreq: mediatek-hw: Don't error out if supply is not found + - libbpf: Fix faccessat() usage on Android + - libbpf: fix __arg_ctx type enforcement for perf_event programs + - pmdomain: qcom: rpmhpd: Drop SA8540P gfx.lvl + - arm64: dts: qcom: sa8540p: Drop gfx.lvl as power-domain for gpucc + - arm64: dts: renesas: r8a779g0: Restore sort order + - arm64: dts: renesas: r8a779g0: Add missing SCIF_CLK2 + - selftests/bpf: Disable IPv6 for lwt_redirect test + - arm64: dts: imx8mm-kontron: Disable pullups for I2C signals on OSM-S i.MX8MM + - arm64: dts: imx8mm-kontron: Disable pullups for I2C signals on SL/BL i.MX8MM + - arm64: dts: imx8mm-kontron: Disable pullups for onboard UART signals on BL + OSM-S board + - arm64: dts: imx8mm-kontron: Disable pullups for onboard UART signals on BL + board + - arm64: dts: imx8mm-kontron: Disable pull resistors for SD card signals on BL + OSM-S board + - arm64: dts: imx8mm-kontron: Disable pull resistors for SD card signals on BL + board + - arm64: dts: imx8mm-kontron: Fix interrupt for RTC on OSM-S i.MX8MM module + - arm64: dts: imx8qm: Align edma3 power-domains resources indentation + - arm64: dts: imx8qm: Correct edma3 power-domains and interrupt numbers + - libbpf: Add missing LIBBPF_API annotation to libbpf_set_memlock_rlim API + - wifi: ath9k: delay all of ath9k_wmi_event_tasklet() until init is complete + - wifi: ath11k: change to move WMI_VDEV_PARAM_SET_HEMU_MODE before + WMI_PEER_ASSOC_CMDID + - wifi: ath12k: fix fetching MCBC flag for QCN9274 + - wifi: iwlwifi: mvm: report beacon protection failures + - wifi: iwlwifi: dbg-tlv: ensure NUL termination + - wifi: iwlwifi: acpi: fix WPFC reading + - wifi: iwlwifi: mvm: initialize rates in FW earlier + - wifi: iwlwifi: fix EWRD table validity check + - wifi: iwlwifi: mvm: d3: fix IPN byte order + - wifi: iwlwifi: always have 'uats_enabled' + - wifi: iwlwifi: mvm: fix the TLC command after ADD_STA + - wifi: iwlwifi: read BIOS PNVM only for non-Intel SKU + - gpio: vf610: allow disabling the vf610 driver + - selftests/bpf: trace_helpers.c: do not use poisoned type + - bpf: make sure scalar args don't accept __arg_nonnull tag + - bpf: don't emit warnings intended for global subprogs for static subprogs + - arm64: dts: imx8mm-venice-gw71xx: fix USB OTG VBUS + - pwm: atmel-hlcdc: Fix clock imbalance related to suspend support + - net: blackhole_dev: fix build warning for ethh set but not used + - spi: consolidate setting message->spi + - spi: move split xfers for CS_WORD emulation + - arm64: dts: ti: k3-am62p5-sk: Enable CPSW MDIO node + - arm64: dts: ti: k3-j721s2: Fix power domain for VTM node + - arm64: dts: ti: k3-j784s4: Fix power domain for VTM node + - wifi: ath11k: initialize rx_mcs_80 and rx_mcs_160 before use + - wifi: libertas: fix some memleaks in lbs_allocate_cmd_buffer() + - arm64: dts: ti: k3-am69-sk: remove assigned-clock-parents for unused VP + - libbpf: fix return value for PERF_EVENT __arg_ctx type fix up check + - arm64: dts: ti: k3-am62p-mcu/wakeup: Disable MCU and wakeup R5FSS nodes + - arm64: dts: qcom: x1e80100-qcp: Fix supplies for LDOs 3E and 2J + - libbpf: Use OPTS_SET() macro in bpf_xdp_query() + - wifi: wfx: fix memory leak when starting AP + - arm64: dts: qcom: qcm2290: declare VLS CLAMP register for USB3 PHY + - arm64: dts: qcom: sm6115: declare VLS CLAMP register for USB3 PHY + - arm64: dts: qcom: sm8650: Fix UFS PHY clocks + - wifi: ath12k: fix incorrect logic of calculating vdev_stats_id + - printk: nbcon: Relocate 32bit seq macros + - printk: ringbuffer: Do not skip non-finalized records with prb_next_seq() + - printk: Wait for all reserved records with pr_flush() + - printk: Add this_cpu_in_panic() + - printk: ringbuffer: Cleanup reader terminology + - printk: ringbuffer: Skip non-finalized records in panic + - printk: Disable passing console lock owner completely during panic() + - pwm: sti: Fix capture for st,pwm-num-chan < st,capture-num-chan + - tools/resolve_btfids: Refactor set sorting with types from btf_ids.h + - tools/resolve_btfids: Fix cross-compilation to non-host endianness + - wifi: iwlwifi: support EHT for WH + - wifi: iwlwifi: properly check if link is active + - wifi: iwlwifi: mvm: fix erroneous queue index mask + - wifi: iwlwifi: mvm: don't set the MFP flag for the GTK + - wifi: iwlwifi: mvm: don't set replay counters to 0xff + - s390/pai: fix attr_event_free upper limit for pai device drivers + - s390/vdso: drop '-fPIC' from LDFLAGS + - arm64: dts: qcom: qcm6490-idp: Correct the voltage setting for vph_pwr + - arm64: dts: qcom: qcs6490-rb3gen2: Correct the voltage setting for vph_pwr + - selftests: forwarding: Add missing config entries + - selftests: forwarding: Add missing multicast routing config entries + - arm64: dts: qcom: sm6115: drop pipe clock selection + - ipv6: mcast: remove one synchronize_net() barrier in ipv6_mc_down() + - arm64: dts: mt8183: Move CrosEC base detection node to kukui-based DTs + - arm64: dts: mediatek: mt7986: fix reference to PWM in fan node + - arm64: dts: mediatek: mt7986: drop crypto's unneeded/invalid clock name + - arm64: dts: mediatek: mt7986: fix SPI bus width properties + - arm64: dts: mediatek: mt7986: fix SPI nodename + - arm64: dts: mediatek: mt7986: drop "#clock-cells" from PWM + - arm64: dts: mediatek: mt7986: add "#reset-cells" to infracfg + - arm64: dts: mediatek: mt8192-asurada: Remove CrosEC base detection node + - arm64: dts: mediatek: mt8192: fix vencoder clock name + - arm64: dts: mediatek: mt8186: fix VENC power domain clocks + - arm64: dts: mediatek: mt7622: add missing "device_type" to memory nodes + - can: m_can: Start/Cancel polling timer together with interrupts + - wifi: iwlwifi: mvm: Fix the listener MAC filter flags + - bpf: Mark bpf_spin_{lock,unlock}() helpers with notrace correctly + - arm64: dts: qcom: sdm845: Use the Low Power Island CX/MX for SLPI + - soc: qcom: llcc: Check return value on Broadcast_OR reg read + - ARM: dts: qcom: msm8974: correct qfprom node size + - arm64: dts: mediatek: mt8186: Add missing clocks to ssusb power domains + - arm64: dts: mediatek: mt8186: Add missing xhci clock to usb controllers + - arm64: dts: ti: am65x: Fix dtbs_install for Rocktech OLDI overlay + - cpufreq: qcom-hw: add CONFIG_COMMON_CLK dependency + - wifi: wilc1000: prevent use-after-free on vif when cleaning up all + interfaces + - pwm: dwc: use pm_sleep_ptr() macro + - arm64: dts: ti: k3-am69-sk: fix PMIC interrupt number + - arm64: dts: ti: k3-j721e-sk: fix PMIC interrupt number + - arm64: dts: ti: k3-am62-main: disable usb lpm + - ACPI: processor_idle: Fix memory leak in acpi_processor_power_exit() + - bus: tegra-aconnect: Update dependency to ARCH_TEGRA + - iommu/amd: Mark interrupt as managed + - wifi: brcmsmac: avoid function pointer casts + - arm64: dts: qcom: sdm845-db845c: correct PCIe wake-gpios + - arm64: dts: qcom: sm8150: correct PCIe wake-gpios + - powercap: dtpm_cpu: Fix error check against freq_qos_add_request() + - net: ena: Remove ena_select_queue + - arm64: dts: ti: k3-j7200-common-proc-board: Modify Pinmux for wkup_uart0 and + mcu_uart0 + - arm64: dts: ti: k3-j7200-common-proc-board: Remove clock-frequency from + mcu_uart0 + - arm64: dts: ti: k3-j721s2-common-proc-board: Remove Pinmux for CTS and RTS + in wkup_uart0 + - arm64: dts: ti: k3-j784s4-evm: Remove Pinmux for CTS and RTS in wkup_uart0 + - arm64: dts: ti: k3-am64-main: Fix ITAP/OTAP values for MMC + - arm64: dts: mt8195-cherry-tomato: change watchdog reset boot flow + - arm64: dts: ti: Add common1 register space for AM65x SoC + - arm64: dts: ti: Add common1 register space for AM62x SoC + - firmware: arm_scmi: Fix double free in SMC transport cleanup path + - wifi: cfg80211: set correct param change count in ML element + - arm64: dts: ti: k3-j721e: Fix mux-reg-masks in hbmc_mux + - arm64: dts: ti: k3-j784s4-main: Fix mux-reg-masks in serdes_ln_ctrl + - arm64: dts: ti: k3-am62p: Fix memory ranges for DMSS + - wifi: wilc1000: revert reset line logic flip + - ARM: dts: arm: realview: Fix development chip ROM compatible value + - memory: tegra: Correct DLA client names + - wifi: mt76: mt7996: fix fw loading timeout + - wifi: mt76: mt7925: fix connect to 80211b mode fail in 2Ghz band + - wifi: mt76: mt7925: fix SAP no beacon issue in 5Ghz and 6Ghz band + - wifi: mt76: mt7925: fix mcu query command fail + - wifi: mt76: mt7925: fix wmm queue mapping + - wifi: mt76: mt7925: fix fw download fail + - wifi: mt76: mt7925: fix WoW failed in encrypted mode + - wifi: mt76: mt7925: fix the wrong header translation config + - wifi: mt76: mt7925: add flow to avoid chip bt function fail + - wifi: mt76: mt7925: add support to set ifs time by mcu command + - wifi: mt76: mt7925: update PCIe DMA settings + - wifi: mt76: mt7996: check txs format before getting skb by pid + - wifi: mt76: mt7996: fix TWT issues + - wifi: mt76: mt7996: fix incorrect interpretation of EHT MCS caps + - wifi: mt76: mt7996: fix HE beamformer phy cap for station vif + - wifi: mt76: mt7996: fix efuse reading issue + - wifi: mt76: mt7996: fix HIF_TXD_V2_1 value + - wifi: mt76: mt792x: fix ethtool warning + - wifi: mt76: mt7921e: fix use-after-free in free_irq() + - wifi: mt76: mt7925e: fix use-after-free in free_irq() + - wifi: mt76: mt7921: fix incorrect type conversion for CLC command + - wifi: mt76: mt792x: fix a potential loading failure of the 6Ghz channel + config from ACPI + - wifi: mt76: fix the issue of missing txpwr settings from ch153 to ch177 + - arm64: dts: renesas: rzg2l: Add missing interrupts to IRQC nodes + - arm64: dts: renesas: r9a08g045: Add missing interrupts to IRQC node + - arm64: dts: renesas: rzg3s-smarc-som: Guard Ethernet IRQ GPIO hogs + - arm64: dts: renesas: r8a779a0: Correct avb[01] reg sizes + - arm64: dts: renesas: r8a779g0: Correct avb[01] reg sizes + - net: mctp: copy skb ext data when fragmenting + - pstore: inode: Only d_invalidate() is needed + - arm64: dts: allwinner: h6: Add RX DMA channel for SPDIF + - ARM: dts: imx6dl-yapp4: Fix typo in the QCA switch register address + - ARM: dts: imx6dl-yapp4: Move the internal switch PHYs under the switch node + - arm64: dts: imx8mp: Set SPI NOR to max 40 MHz on Data Modul i.MX8M Plus eDM + SBC + - arm64: dts: imx8mp-evk: Fix hdmi@3d node + - regulator: userspace-consumer: add module device table + - gpiolib: Pass consumer device through to core in + devm_fwnode_gpiod_get_index() + - arm64: dts: marvell: reorder crypto interrupts on Armada SoCs + - ACPI: resource: Do IRQ override on Lunnen Ground laptops + - ACPI: resource: Add MAIBENBEN X577 to irq1_edge_low_force_override + - ACPI: scan: Fix device check notification handling + - arm64: dts: rockchip: add missing interrupt-names for rk356x vdpu + - arm64: dts: rockchip: fix reset-names for rk356x i2s2 controller + - arm64: dts: rockchip: drop rockchip,trcm-sync-tx-only from rk3588 i2s + - objtool: Fix UNWIND_HINT_{SAVE,RESTORE} across basic blocks + - x86, relocs: Ignore relocations in .notes section + - SUNRPC: fix a memleak in gss_import_v2_context + - SUNRPC: fix some memleaks in gssx_dec_option_array + - arm64: dts: qcom: sm8550: Fix SPMI channels size + - arm64: dts: qcom: sm8650: Fix SPMI channels size + - mmc: wmt-sdmmc: remove an incorrect release_mem_region() call in the .remove + function + - ACPI: CPPC: enable AMD CPPC V2 support for family 17h processors + - btrfs: fix race when detecting delalloc ranges during fiemap + - wifi: rtw88: 8821cu: Fix firmware upload fail + - wifi: rtw88: 8821c: Fix beacon loss and disconnect + - wifi: rtw88: 8821c: Fix false alarm count + - wifi: brcm80211: handle pmk_op allocation failure + - riscv: dts: starfive: jh7100: fix root clock names + - PCI: Make pci_dev_is_disconnected() helper public for other drivers + - iommu/vt-d: Don't issue ATS Invalidation request when device is disconnected + - iommu/vt-d: Use rbtree to track iommu probed devices + - iommu/vt-d: Improve ITE fault handling if target device isn't present + - iommu/vt-d: Use device rbtree in iopf reporting path + - iommu: Add static iommu_ops->release_domain + - iommu/vt-d: Fix NULL domain on device release + - igc: Fix missing time sync events + - igb: Fix missing time sync events + - ice: fix stats being updated by way too large values + - Bluetooth: Remove HCI_POWER_OFF_TIMEOUT + - Bluetooth: mgmt: Remove leftover queuing of power_off work + - Bluetooth: Remove superfluous call to hci_conn_check_pending() + - Bluetooth: Remove BT_HS + - Bluetooth: hci_event: Fix not indicating new connection for BIG Sync + - Bluetooth: hci_qca: don't use IS_ERR_OR_NULL() with gpiod_get_optional() + - Bluetooth: hci_core: Cancel request on command timeout + - Bluetooth: hci_sync: Fix overwriting request callback + - Bluetooth: hci_h5: Add ability to allocate memory for private data + - Bluetooth: btrtl: fix out of bounds memory access + - Bluetooth: hci_core: Fix possible buffer overflow + - Bluetooth: msft: Fix memory leak + - Bluetooth: btusb: Fix memory leak + - Bluetooth: af_bluetooth: Fix deadlock + - Bluetooth: fix use-after-free in accessing skb after sending it + - sr9800: Add check for usbnet_get_endpoints + - s390/cache: prevent rebuild of shared_cpu_list + - bpf: Fix DEVMAP_HASH overflow check on 32-bit arches + - bpf: Fix hashtab overflow check on 32-bit arches + - bpf: Fix stackmap overflow check on 32-bit arches + - net: dsa: microchip: make sure drive strength configuration is not lost by + soft reset + - dpll: spec: use proper enum for pin capabilities attribute + - iommu: Fix compilation without CONFIG_IOMMU_INTEL + - ipv6: fib6_rules: flush route cache when rule is changed + - net: ip_tunnel: make sure to pull inner header in ip_tunnel_rcv() + - octeontx2-af: Fix devlink params + - net: phy: fix phy_get_internal_delay accessing an empty array + - dpll: fix dpll_xa_ref_*_del() for multiple registrations + - net: hns3: fix wrong judgment condition issue + - net: hns3: fix kernel crash when 1588 is received on HIP08 devices + - net: hns3: fix port duplex configure error in IMP reset + - Bluetooth: Fix eir name length + - net: phy: dp83822: Fix RGMII TX delay configuration + - erofs: fix lockdep false positives on initializing erofs_pseudo_mnt + - OPP: debugfs: Fix warning around icc_get_name() + - tcp: fix incorrect parameter validation in the do_tcp_getsockopt() function + - ipmr: fix incorrect parameter validation in the ip_mroute_getsockopt() + function + - l2tp: fix incorrect parameter validation in the pppol2tp_getsockopt() + function + - udp: fix incorrect parameter validation in the udp_lib_getsockopt() function + - net: kcm: fix incorrect parameter validation in the kcm_getsockopt) function + - net/x25: fix incorrect parameter validation in the x25_getsockopt() function + - devlink: Fix length of eswitch inline-mode + - r8152: fix unknown device for choose_configuration + - nfp: flower: handle acti_netdevs allocation failure + - bpf: hardcode BPF_PROG_PACK_SIZE to 2MB * num_possible_nodes() + - dm raid: fix false positive for requeue needed during reshape + - dm: call the resume method on internal suspend + - fbdev/simplefb: change loglevel when the power domains cannot be parsed + - drm/tegra: dsi: Add missing check for of_find_device_by_node + - drm/tegra: dpaux: Fix PM disable depth imbalance in tegra_dpaux_probe + - drm/tegra: dsi: Fix some error handling paths in tegra_dsi_probe() + - drm/tegra: dsi: Fix missing pm_runtime_disable() in the error handling path + of tegra_dsi_probe() + - drm/tegra: hdmi: Fix some error handling paths in tegra_hdmi_probe() + - drm/tegra: rgb: Fix some error handling paths in tegra_dc_rgb_probe() + - drm/tegra: rgb: Fix missing clk_put() in the error handling paths of + tegra_dc_rgb_probe() + - drm/tegra: output: Fix missing i2c_put_adapter() in the error handling paths + of tegra_output_probe() + - drm/rockchip: inno_hdmi: Fix video timing + - drm: Don't treat 0 as -1 in drm_fixp2int_ceil + - drm/vkms: Avoid reading beyond LUT array + - drm/vmwgfx: fix a memleak in vmw_gmrid_man_get_node + - drm/rockchip: lvds: do not overwrite error code + - drm/rockchip: lvds: do not print scary message when probing defer + - drm/panel-edp: use put_sync in unprepare + - drm/lima: fix a memleak in lima_heap_alloc + - ASoC: amd: acp: Add missing error handling in sof-mach + - ASoC: SOF: amd: Fix memory leak in amd_sof_acp_probe() + - ASoC: SOF: core: Skip firmware test for custom loaders + - ASoC: SOF: amd: Compute file paths on firmware load + - soundwire: stream: add missing const to Documentation + - dmaengine: tegra210-adma: Update dependency to ARCH_TEGRA + - media: tc358743: register v4l2 async device only after successful setup + - media: cadence: csi2rx: use match fwnode for media link + - PCI/DPC: Print all TLP Prefixes, not just the first + - perf record: Fix possible incorrect free in record__switch_output() + - perf record: Check conflict between '--timestamp-filename' option and pipe + mode before recording + - HID: lenovo: Add middleclick_workaround sysfs knob for cptkbd + - drm/amd/display: Fix a potential buffer overflow in 'dp_dsc_clock_en_read()' + - perf pmu: Treat the msr pmu as software + - crypto: qat - avoid memcpy() overflow warning + - ALSA: hda: cs35l41: Set Channel Index correctly when system is missing _DSD + - drm/amd/display: Fix potential NULL pointer dereferences in + 'dcn10_set_output_transfer_func()' + - ASoC: sh: rz-ssi: Fix error message print + - drm/vmwgfx: Fix vmw_du_get_cursor_mob fencing of newly-created MOBs + - clk: renesas: r8a779g0: Fix PCIe clock name + - pinctrl: renesas: rzg2l: Fix locking in rzg2l_dt_subnode_to_map() + - pinctrl: renesas: r8a779g0: Add missing SCIF_CLK2 pin group/function + - clk: samsung: exynos850: Propagate SPI IPCLK rate change + - media: v4l2: cci: print leading 0 on error + - perf evsel: Fix duplicate initialization of data->id in + evsel__parse_sample() + - perf bpf: Clean up the generated/copied vmlinux.h + - clk: meson: Add missing clocks to axg_clk_regmaps + - media: em28xx: annotate unchecked call to media_device_register() + - media: v4l2-tpg: fix some memleaks in tpg_alloc + - media: v4l2-mem2mem: fix a memleak in v4l2_m2m_register_entity + - media: dt-bindings: techwell,tw9900: Fix port schema ref + - mtd: spinand: esmt: Extend IDs to 5 bytes + - media: edia: dvbdev: fix a use-after-free + - pinctrl: mediatek: Drop bogus slew rate register range for MT8186 + - pinctrl: mediatek: Drop bogus slew rate register range for MT8192 + - drm/amdgpu: Fix potential out-of-bounds access in + 'amdgpu_discovery_reg_base_init()' + - clk: qcom: reset: Commonize the de/assert functions + - clk: qcom: reset: Ensure write completion on reset de/assertion + - quota: Fix potential NULL pointer dereference + - quota: Fix rcu annotations of inode dquot pointers + - quota: Properly annotate i_dquot arrays with __rcu + - ASoC: Intel: ssp-common: Add stub for sof_ssp_get_codec_name + - PCI/P2PDMA: Fix a sleeping issue in a RCU read section + - PCI: switchtec: Fix an error handling path in switchtec_pci_probe() + - crypto: xilinx - call finalize with bh disabled + - drivers/ps3: select VIDEO to provide cmdline functions + - perf thread_map: Free strlist on normal path in thread_map__new_by_tid_str() + - perf srcline: Add missed addr2line closes + - dt-bindings: msm: qcom, mdss: Include ommited fam-b compatible + - drm/msm/dpu: fix the programming of INTF_CFG2_DATA_HCTL_EN + - drm/msm/dpu: Only enable DSC_MODE_MULTIPLEX if dsc_merge is enabled + - drm/radeon/ni: Fix wrong firmware size logging in ni_init_microcode() + - drm/amd/display: fix NULL checks for adev->dm.dc in amdgpu_dm_fini() + - clk: renesas: r8a779g0: Correct PFC/GPIO parent clocks + - clk: renesas: r8a779f0: Correct PFC/GPIO parent clock + - clk: renesas: r9a07g04[34]: Use SEL_SDHI1_STS status configuration for SD1 + mux + - ALSA: seq: fix function cast warnings + - perf expr: Fix "has_event" function for metric style events + - perf stat: Avoid metric-only segv + - perf metric: Don't remove scale from counts + - ASoC: meson: aiu: fix function pointer type mismatch + - ASoC: meson: t9015: fix function pointer type mismatch + - powerpc: Force inlining of arch_vmap_p{u/m}d_supported() + - ASoC: SOF: Add some bounds checking to firmware data + - drm: ci: use clk_ignore_unused for apq8016 + - NTB: fix possible name leak in ntb_register_device() + - media: cedrus: h265: Fix configuring bitstream size + - media: sun8i-di: Fix coefficient writes + - media: sun8i-di: Fix power on/off sequences + - media: sun8i-di: Fix chroma difference threshold + - staging: media: starfive: Set 16 bpp for capture_raw device + - media: imx: csc/scaler: fix v4l2_ctrl_handler memory leak + - media: go7007: add check of return value of go7007_read_addr() + - media: pvrusb2: remove redundant NULL check + - media: videobuf2: Add missing doc comment for waiting_in_dqbuf + - media: pvrusb2: fix pvr2_stream_callback casts + - clk: qcom: dispcc-sdm845: Adjust internal GDSC wait times + - drm/amd/display: Add 'replay' NULL check in 'edp_set_replay_allow_active()' + - drm/panel: boe-tv101wum-nl6: make use of prepare_prev_first + - drm/msm/dpu: finalise global state object + - drm/mediatek: dsi: Fix DSI RGB666 formats and definitions + - PCI: Mark 3ware-9650SE Root Port Extended Tags as broken + - drm/bridge: adv7511: fix crash on irq during probe + - pinctrl: renesas: Allow the compiler to optimize away sh_pfc_pm + - clk: hisilicon: hi3519: Release the correct number of gates in + hi3519_clk_unregister() + - clk: hisilicon: hi3559a: Fix an erroneous devm_kfree() + - clk: mediatek: mt8135: Fix an error handling path in + clk_mt8135_apmixed_probe() + - clk: mediatek: mt7622-apmixedsys: Fix an error handling path in + clk_mt8135_apmixed_probe() + - clk: mediatek: mt8183: Correct parent of CLK_INFRA_SSPM_32K_SELF + - clk: mediatek: mt7981-topckgen: flag SGM_REG_SEL as critical + - drm/tegra: put drm_gem_object ref on error in tegra_fb_create + - tty: mips_ejtag_fdc: Fix passing incompatible pointer type warning + - media: ivsc: csi: Swap SINK and SOURCE pads + - media: i2c: imx290: Fix IMX920 typo + - mfd: syscon: Call of_node_put() only when of_parse_phandle() takes a ref + - mfd: altera-sysmgr: Call of_node_put() only when of_parse_phandle() takes a + ref + - perf print-events: make is_event_supported() more robust + - crypto: arm/sha - fix function cast warnings + - crypto: ccp - Avoid discarding errors in psp_send_platform_access_msg() + - crypto: qat - remove unused macros in qat_comp_alg.c + - crypto: qat - removed unused macro in adf_cnv_dbgfs.c + - crypto: qat - avoid division by zero + - crypto: qat - remove double initialization of value + - crypto: qat - fix ring to service map for dcc in 4xxx + - crypto: qat - fix ring to service map for dcc in 420xx + - crypto: jitter - fix CRYPTO_JITTERENTROPY help text + - drm/tidss: Fix initial plane zpos values + - drm/tidss: Fix sync-lost issue with two displays + - clk: imx: imx8mp: Fix SAI_MCLK_SEL definition + - mtd: maps: physmap-core: fix flash size larger than 32-bit + - mtd: rawnand: lpc32xx_mlc: fix irq handler prototype + - mtd: rawnand: brcmnand: exec_op helper functions return type fixes + - ASoC: meson: axg-tdm-interface: fix mclk setup without mclk-fs + - ASoC: meson: axg-tdm-interface: add frame rate constraint + - drm/msm/a6xx: specify UBWC config for sc7180 + - drm/msm/a7xx: Fix LLC typo + - dt-bindings: arm-smmu: fix SM8[45]50 GPU SMMU if condition + - perf pmu: Fix a potential memory leak in perf_pmu__lookup() + - HID: amd_sfh: Update HPD sensor structure elements + - HID: amd_sfh: Avoid disabling the interrupt + - drm/amdgpu: Fix missing break in ATOM_ARG_IMM Case of atom_get_src_int() + - media: pvrusb2: fix uaf in pvr2_context_set_notify + - media: dvb-frontends: avoid stack overflow warnings with clang + - media: go7007: fix a memleak in go7007_load_encoder + - media: ttpci: fix two memleaks in budget_av_attach + - media: mediatek: vcodec: avoid -Wcast-function-type-strict warning + - arm64: ftrace: Don't forbid CALL_OPS+CC_OPTIMIZE_FOR_SIZE with Clang + - drm/tests: helpers: Include missing drm_drv header + - drm/amd/pm: Fix esm reg mask use to get pcie speed + - gpio: nomadik: fix offset bug in nmk_pmx_set() + - drm/mediatek: Fix a null pointer crash in mtk_drm_crtc_finish_page_flip + - mfd: cs42l43: Fix wrong register defaults + - powerpc/32: fix ADB_CUDA kconfig warning + - powerpc/pseries: Fix potential memleak in papr_get_attr() + - powerpc/hv-gpci: Fix the H_GET_PERF_COUNTER_INFO hcall return value checks + - clk: qcom: gcc-ipq5018: fix 'enable_reg' offset of 'gcc_gmac0_sys_clk' + - clk: qcom: gcc-ipq5018: fix 'halt_reg' offset of 'gcc_pcie1_pipe_clk' + - clk: qcom: gcc-ipq5018: fix register offset for GCC_UBI0_AXI_ARES reset + - perf vendor events amd: Fix Zen 4 cache latency events + - drm/msm/dpu: allow certain formats for CDM for DP + - drm/msm/dpu: add division of drm_display_mode's hskew parameter + - media: usbtv: Remove useless locks in usbtv_video_free() + - drm/xe: Fix ref counting leak on page fault + - drm/xe: Replace 'grouped target' in Makefile with pattern rule + - lib/stackdepot: fix first entry having a 0-handle + - lib/stackdepot: off by one in depot_fetch_stack() + - modules: wait do_free_init correctly + - mfd: cs42l43: Fix wrong GPIO_FN_SEL and SPI_CLK_CONFIG1 defaults + - power: supply: mm8013: fix "not charging" detection + - powerpc/embedded6xx: Fix no previous prototype for avr_uart_send() etc. + - powerpc/4xx: Fix warp_gpio_leds build failure + - RISC-V: KVM: Forward SEED CSR access to user space + - leds: aw2013: Unlock mutex before destroying it + - leds: sgm3140: Add missing timer cleanup and flash gpio control + - backlight: hx8357: Fix potential NULL pointer dereference + - backlight: ktz8866: Correct the check for of_property_read_u32 + - backlight: lm3630a: Initialize backlight_properties on init + - backlight: lm3630a: Don't set bl->props.brightness in get_brightness + - backlight: da9052: Fully initialize backlight_properties during probe + - backlight: lm3639: Fully initialize backlight_properties during probe + - backlight: lp8788: Fully initialize backlight_properties during probe + - sparc32: Use generic cmpdi2/ucmpdi2 variants + - mtd: maps: sun_uflash: Declare uflash_devinit static + - sparc32: Do not select GENERIC_ISA_DMA + - sparc32: Fix section mismatch in leon_pci_grpci + - clk: Fix clk_core_get NULL dereference + - clk: zynq: Prevent null pointer dereference caused by kmalloc failure + - PCI: brcmstb: Fix broken brcm_pcie_mdio_write() polling + - cifs: Fix writeback data corruption + - ALSA: hda/realtek: fix ALC285 issues on HP Envy x360 laptops + - ALSA: hda/tas2781: use dev_dbg in system_resume + - ALSA: hda/tas2781: add lock to system_suspend + - ALSA: hda/tas2781: do not reset cur_* values in runtime_suspend + - ALSA: hda/tas2781: do not call pm_runtime_force_* in system_resume/suspend + - ALSA: hda/tas2781: restore power state after system_resume + - ALSA: scarlett2: Fix Scarlett 4th Gen 4i4 low-voltage detection + - ALSA: scarlett2: Fix Scarlett 4th Gen autogain status values + - ALSA: scarlett2: Fix Scarlett 4th Gen input gain range + - ALSA: scarlett2: Fix Scarlett 4th Gen input gain range again + - mips: cm: Convert __mips_cm_l2sync_phys_base() to weak function + - platform/x86/intel/pmc/lnl: Remove SSRAM support + - platform/x86/intel/pmc/arl: Put GNA device in D3 + - platform/x86/amd/pmf: Do not use readl() for policy buffer access + - ALSA: usb-audio: Stop parsing channels bits when all channels are found. + - phy: qcom: qmp-usb: split USB-C PHY driver + - phy: qcom: qmp-usbc: add support for the Type-C handling + - phy: qcom: qmp-usbc: handle CLAMP register in a correct way + - scsi: hisi_sas: Fix a deadlock issue related to automatic dump + - RDMA/irdma: Remove duplicate assignment + - RDMA/srpt: Do not register event handler until srpt device is fully setup + - f2fs: compress: fix to guarantee persisting compressed blocks by CP + - f2fs: compress: fix to cover normal cluster write with cp_rwsem + - f2fs: compress: fix to check unreleased compressed cluster + - f2fs: compress: fix to avoid inconsistence bewteen i_blocks and dnode + - f2fs: fix to remove unnecessary f2fs_bug_on() to avoid panic + - f2fs: zone: fix to wait completion of last bio in zone correctly + - f2fs: fix NULL pointer dereference in f2fs_submit_page_write() + - f2fs: compress: fix to cover f2fs_disable_compressed_file() w/ i_sem + - f2fs: fix to avoid potential panic during recovery + - scsi: csiostor: Avoid function pointer casts + - i3c: dw: Disable IBI IRQ depends on hot-join and SIR enabling + - RDMA/hns: Fix mis-modifying default congestion control algorithm + - RDMA/device: Fix a race between mad_client and cm_client init + - RDMA/rtrs-clt: Check strnlen return len in sysfs mpath_policy_store() + - scsi: bfa: Fix function pointer type mismatch for hcb_qe->cbfn + - f2fs: fix to create selinux label during whiteout initialization + - f2fs: compress: fix to check zstd compress level correctly in mount option + - net: sunrpc: Fix an off by one in rpc_sockaddr2uaddr() + - NFSv4.2: fix nfs4_listxattr kernel BUG at mm/usercopy.c:102 + - NFSv4.2: fix listxattr maximum XDR buffer size + - f2fs: compress: fix to check compress flag w/ .i_sem lock + - f2fs: check number of blocks in a current section + - watchdog: starfive: Check pm_runtime_enabled() before decrementing usage + counter + - watchdog: stm32_iwdg: initialize default timeout + - f2fs: fix to use correct segment type in f2fs_allocate_data_block() + - f2fs: ro: compress: fix to avoid caching unaligned extent + - RDMA/mana_ib: Fix bug in creation of dma regions + - RDMA/mana_ib: Introduce mdev_to_gc helper function + - RDMA/mana_ib: Introduce mana_ib_get_netdev helper function + - RDMA/mana_ib: Introduce mana_ib_install_cq_cb helper function + - RDMA/mana_ib: Use virtual address in dma regions for MRs + - Input: iqs7222 - add support for IQS7222D v1.1 and v1.2 + - NFS: Fix nfs_netfs_issue_read() xarray locking for writeback interrupt + - NFS: Fix an off by one in root_nfs_cat() + - NFSv4.1/pnfs: fix NFS with TLS in pnfs + - ACPI: HMAT: Remove register of memory node for generic target + - f2fs: compress: relocate some judgments in f2fs_reserve_compress_blocks + - f2fs: compress: fix reserve_cblocks counting error when out of space + - f2fs: fix to truncate meta inode pages forcely + - f2fs: zone: fix to remove pow2 check condition for zoned block device + - cxl: Fix the incorrect assignment of SSLBIS entry pointer initial location + - perf/x86/amd/core: Avoid register reset when CPU is dead + - afs: Revert "afs: Hide silly-rename files from userspace" + - afs: Don't cache preferred address + - afs: Fix occasional rmdir-then-VNOVNODE with generic/011 + - f2fs: fix to avoid use-after-free issue in f2fs_filemap_fault + - nfs: fix panic when nfs4_ff_layout_prepare_ds() fails + - ovl: relax WARN_ON in ovl_verify_area() + - io_uring/net: correct the type of variable + - remoteproc: stm32: Fix incorrect type in assignment for va + - remoteproc: stm32: Fix incorrect type assignment returned by + stm32_rproc_get_loaded_rsc_tablef + - iio: pressure: mprls0025pa fix off-by-one enum + - usb: phy: generic: Get the vbus supply + - tty: vt: fix 20 vs 0x20 typo in EScsiignore + - serial: max310x: fix syntax error in IRQ error message + - tty: serial: samsung: fix tx_empty() to return TIOCSER_TEMT + - arm64: dts: broadcom: bcmbca: bcm4908: drop invalid switch cells + - coresight: Fix issue where a source device's helpers aren't disabled + - coresight: etm4x: Set skip_power_up in etm4_init_arch_data function + - xhci: Add interrupt pending autoclear flag to each interrupter + - xhci: make isoc_bei_interval variable interrupter specific. + - xhci: remove unnecessary event_ring_deq parameter from xhci_handle_event() + - xhci: update event ring dequeue pointer position to controller correctly + - coccinelle: device_attr_show: Remove useless expression STR + - kconfig: fix infinite loop when expanding a macro at the end of file + - iio: gts-helper: Fix division loop + - bus: mhi: ep: check the correct variable in mhi_ep_register_controller() + - hwtracing: hisi_ptt: Move type check to the beginning of + hisi_ptt_pmu_event_init() + - rtc: mt6397: select IRQ_DOMAIN instead of depending on it + - rtc: max31335: fix interrupt status reg + - serial: 8250_exar: Don't remove GPIO device on suspend + - staging: greybus: fix get_channel_from_mode() failure path + - mei: vsc: Call wake_up() in the threaded IRQ handler + - mei: vsc: Don't use sleeping condition in wait_event_timeout() + - usb: gadget: net2272: Use irqflags in the call to net2272_probe_fin + - char: xilinx_hwicap: Fix NULL vs IS_ERR() bug + - x86/hyperv: Use per cpu initial stack for vtl context + - ASoC: tlv320adc3xxx: Don't strip remove function when driver is builtin + - thermal/drivers/mediatek/lvts_thermal: Fix a memory leak in an error + handling path + - thermal/drivers/qoriq: Fix getting tmu range + - io_uring: don't save/restore iowait state + - spi: lpspi: Avoid potential use-after-free in probe() + - spi: Restore delays for non-GPIO chip select + - ASoC: rockchip: i2s-tdm: Fix inaccurate sampling rates + - nouveau: reset the bo resource bus info after an eviction + - tcp: Fix NEW_SYN_RECV handling in inet_twsk_purge() + - rds: tcp: Fix use-after-free of net in reqsk_timer_handler(). + - octeontx2-af: Use matching wake_up API variant in CGX command interface + - s390/vtime: fix average steal time calculation + - net/sched: taprio: proper TCA_TAPRIO_TC_ENTRY_INDEX check + - devlink: Fix devlink parallel commands processing + - riscv: Only check online cpus for emulated accesses + - soc: fsl: dpio: fix kcalloc() argument order + - cpufreq: Fix per-policy boost behavior on SoCs using cpufreq_boost_set_sw() + - io_uring: Fix release of pinned pages when __io_uaddr_map fails + - tcp: Fix refcnt handling in __inet_hash_connect(). + - vmxnet3: Fix missing reserved tailroom + - hsr: Fix uninit-value access in hsr_get_node() + - net: txgbe: fix clk_name exceed MAX_DEV_ID limits + - spi: spi-mem: add statistics support to ->exec_op() calls + - spi: Fix error code checking in spi_mem_exec_op() + - nvme: fix reconnection fail due to reserved tag allocation + - drm/xe: Invalidate userptr VMA on page pin fault + - drm/xe: Skip VMAs pin when requesting signal to the last XE_EXEC + - net: mediatek: mtk_eth_soc: clear MAC_MCR_FORCE_LINK only when MAC is up + - net: ethernet: mtk_eth_soc: fix PPE hanging issue + - io_uring: fix poll_remove stalled req completion + - ASoC: SOF: amd: Move signed_fw_image to struct acp_quirk_entry + - ASoC: SOF: amd: Skip IRAM/DRAM size modification for Steam Deck OLED + - riscv: Fix compilation error with FAST_GUP and rv32 + - xen/evtchn: avoid WARN() when unbinding an event channel + - xen/events: increment refcnt only if event channel is refcounted + - packet: annotate data-races around ignore_outgoing + - xfrm: Allow UDP encapsulation only in offload modes + - net: veth: do not manipulate GRO when using XDP + - net: dsa: mt7530: prevent possible incorrect XTAL frequency selection + - spi: spi-imx: fix off-by-one in mx51 CPU mode burst length + - drm: Fix drm_fixp2int_round() making it add 0.5 + - virtio: uapi: Drop __packed attribute in linux/virtio_pci.h + - vdpa_sim: reset must not run + - vdpa/mlx5: Allow CVQ size changes + - virtio: packed: fix unmap leak for indirect desc table + - net: move dev->state into net_device_read_txrx group + - wireguard: receive: annotate data-race around receiving_counter.counter + - rds: introduce acquire/release ordering in acquire/release_in_xmit() + - hsr: Handle failures in module init + - ipv4: raw: Fix sending packets from raw sockets via IPsec tunnels + - nouveau/gsp: don't check devinit disable on GSP. + - ceph: stop copying to iter at EOF on sync reads + - net: phy: fix phy_read_poll_timeout argument type in genphy_loopback + - dm-integrity: fix a memory leak when rechecking the data + - net/bnx2x: Prevent access to a freed page in page_pool + - devlink: fix port new reply cmd type + - octeontx2: Detect the mbox up or down message via register + - octeontx2-pf: Wait till detach_resources msg is complete + - octeontx2-pf: Use default max_active works instead of one + - octeontx2-pf: Send UP messages to VF only when VF is up. + - octeontx2-af: Use separate handlers for interrupts + - drm/amdgpu: add MMHUB 3.3.1 support + - drm/amdgpu: fix mmhub client id out-of-bounds access + - drm/amdgpu: drop setting buffer funcs in sdma442 + - netfilter: nft_set_pipapo: release elements in clone only from destroy path + - netfilter: nf_tables: do not compare internal table flags on updates + - rcu: add a helper to report consolidated flavor QS + - net: report RCU QS on threaded NAPI repolling + - bpf: report RCU QS in cpumap kthread + - net: dsa: mt7530: fix link-local frames that ingress vlan filtering ports + - net: dsa: mt7530: fix handling of all link-local frames + - netfilter: nf_tables: Fix a memory leak in nf_tables_updchain + - spi: spi-mt65xx: Fix NULL pointer access in interrupt handler + - selftests: forwarding: Fix ping failure due to short timeout + - dm io: Support IO priority + - dm-integrity: align the outgoing bio in integrity_recheck + - x86/efistub: Clear decompressor BSS in native EFI entrypoint + - x86/efistub: Don't clear BSS twice in mixed mode + - printk: Adjust mapping for 32bit seq macros + - printk: Use prb_first_seq() as base for 32bit seq macros + - Linux 6.8.2 + - [Config] updateconfig following v6.8.2 import + + * Provide python perf module (LP: #2051560) + - [Packaging] enable perf python module + - [Packaging] provide a wrapper module for python-perf + + * To support AMD Adaptive Backlight Management (ABM) for power profiles daemon + >= 2.0 (LP: #2056716) + - drm/amd/display: add panel_power_savings sysfs entry to eDP connectors + - drm/amdgpu: respect the abmlevel module parameter value if it is set + + * Miscellaneous Ubuntu changes + - [Config] Disable StarFive JH7100 support + - [Config] Disable Renesas RZ/Five support + - [Config] Disable BINFMT_FLAT for riscv64 + + -- Roxana Nicolescu Wed, 01 May 2024 16:02:05 +0200 + +linux (6.8.0-31.31) noble; urgency=medium + + * noble/linux: 6.8.0-31.31 -proposed tracker (LP: #2062933) + + * Packaging resync (LP: #1786013) + - [Packaging] debian.master/dkms-versions -- update from kernel-versions + (main/d2024.04.04) + + -- Andrea Righi Fri, 19 Apr 2024 23:46:38 +0200 + +linux (6.8.0-30.30) noble; urgency=medium + + * noble/linux: 6.8.0-30.30 -proposed tracker (LP: #2061893) + + * System unstable, kernel ring buffer flooded with "BUG: Bad page state in + process swapper/0" (LP: #2056706) + - xen-netfront: Add missing skb_mark_for_recycle + + -- Andrea Righi Tue, 16 Apr 2024 21:17:11 +0200 + +linux (6.8.0-29.29) noble; urgency=medium + + * noble/linux: 6.8.0-29.29 -proposed tracker (LP: #2061888) + + * [24.04 FEAT] [SEC2353] zcrypt: extend error recovery to deal with device + scans (LP: #2050019) + - s390/zcrypt: harmonize debug feature calls and defines + - s390/zcrypt: introduce dynamic debugging for AP and zcrypt code + - s390/pkey: harmonize pkey s390 debug feature calls + - s390/pkey: introduce dynamic debugging for pkey + - s390/ap: add debug possibility for AP messages + - s390/zcrypt: add debug possibility for CCA and EP11 messages + - s390/ap: rearm APQNs bindings complete completion + - s390/ap: clarify AP scan bus related functions and variables + - s390/ap: rework ap_scan_bus() to return true on config change + - s390/ap: introduce mutex to lock the AP bus scan + - s390/zcrypt: introduce retries on in-kernel send CPRB functions + - s390/zcrypt: improve zcrypt retry behavior + - s390/pkey: improve pkey retry behavior + + * [24.04 FEAT] Memory hotplug vmem pages (s390x) (LP: #2051835) + - mm/memory_hotplug: introduce MEM_PREPARE_ONLINE/MEM_FINISH_OFFLINE notifiers + - s390/mm: allocate vmemmap pages from self-contained memory range + - s390/sclp: remove unhandled memory notifier type + - s390/mm: implement MEM_PREPARE_ONLINE/MEM_FINISH_OFFLINE notifiers + - s390: enable MHP_MEMMAP_ON_MEMORY + - [Config] enable CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE and + CONFIG_MHP_MEMMAP_ON_MEMORY for s390x + + -- Paolo Pisati Tue, 16 Apr 2024 20:32:09 +0200 + +linux (6.8.0-28.28) noble; urgency=medium + + * noble/linux: 6.8.0-28.28 -proposed tracker (LP: #2061867) + + * linux-gcp 6.8.0-1005.5 (+ others) Noble kernel regression iwth new apparmor + profiles/features (LP: #2061851) + - SAUCE: apparmor4.0.0 [92/90]: fix address mapping for recvfrom + + -- Paolo Pisati Tue, 16 Apr 2024 18:29:17 +0200 + +linux (6.8.0-25.25) noble; urgency=medium + + * noble/linux: 6.8.0-25.25 -proposed tracker (LP: #2061083) + + * Packaging resync (LP: #1786013) + - [Packaging] debian.master/dkms-versions -- update from kernel-versions + (main/d2024.04.04) + + * Apply mitigations for the native BHI hardware vulnerabilty (LP: #2060909) + - x86/cpufeatures: Add new word for scattered features + - x86/bugs: Change commas to semicolons in 'spectre_v2' sysfs file + - x86/syscall: Don't force use of indirect calls for system calls + - x86/bhi: Add support for clearing branch history at syscall entry + - x86/bhi: Define SPEC_CTRL_BHI_DIS_S + - x86/bhi: Enumerate Branch History Injection (BHI) bug + - x86/bhi: Add BHI mitigation knob + - x86/bhi: Mitigate KVM by default + - KVM: x86: Add BHI_NO + - x86: set SPECTRE_BHI_ON as default + - [Config] enable spectre_bhi=auto by default + + * update apparmor and LSM stacking patch set (LP: #2028253) + - SAUCE: apparmor4.0.0 [01/90]: LSM stacking v39: integrity: disassociate + ima_filter_rule from security_audit_rule + - SAUCE: apparmor4.0.0 [02/90]: LSM stacking v39: SM: Infrastructure + management of the sock security + - SAUCE: apparmor4.0.0 [03/90]: LSM stacking v39: LSM: Add the lsmblob data + structure. + - SAUCE: apparmor4.0.0 [04/90]: LSM stacking v39: IMA: avoid label collisions + with stacked LSMs + - SAUCE: apparmor4.0.0 [05/90]: LSM stacking v39: LSM: Use lsmblob in + security_audit_rule_match + - SAUCE: apparmor4.0.0 [06/90]: LSM stacking v39: LSM: Add lsmblob_to_secctx + hook + - SAUCE: apparmor4.0.0 [07/90]: LSM stacking v39: Audit: maintain an lsmblob + in audit_context + - SAUCE: apparmor4.0.0 [08/90]: LSM stacking v39: LSM: Use lsmblob in + security_ipc_getsecid + - SAUCE: apparmor4.0.0 [09/90]: LSM stacking v39: Audit: Update shutdown LSM + data + - SAUCE: apparmor4.0.0 [10/90]: LSM stacking v39: LSM: Use lsmblob in + security_current_getsecid + - SAUCE: apparmor4.0.0 [11/90]: LSM stacking v39: LSM: Use lsmblob in + security_inode_getsecid + - SAUCE: apparmor4.0.0 [12/90]: LSM stacking v39: Audit: use an lsmblob in + audit_names + - SAUCE: apparmor4.0.0 [13/90]: LSM stacking v39: LSM: Create new + security_cred_getlsmblob LSM hook + - SAUCE: apparmor4.0.0 [14/90]: LSM stacking v39: Audit: Change context data + from secid to lsmblob + - SAUCE: apparmor4.0.0 [15/90]: LSM stacking v39: Netlabel: Use lsmblob for + audit data + - SAUCE: apparmor4.0.0 [16/90]: LSM stacking v39: LSM: Ensure the correct LSM + context releaser + - SAUCE: apparmor4.0.0 [17/90]: LSM stacking v39: LSM: Use lsmcontext in + security_secid_to_secctx + - SAUCE: apparmor4.0.0 [18/90]: LSM stacking v39: LSM: Use lsmcontext in + security_lsmblob_to_secctx + - SAUCE: apparmor4.0.0 [19/90]: LSM stacking v39: LSM: Use lsmcontext in + security_inode_getsecctx + - SAUCE: apparmor4.0.0 [20/90]: LSM stacking v39: LSM: Use lsmcontext in + security_dentry_init_security + - SAUCE: apparmor4.0.0 [21/90]: LSM stacking v39: LSM: + security_lsmblob_to_secctx module selection + - SAUCE: apparmor4.0.0 [22/90]: LSM stacking v39: Audit: Create audit_stamp + structure + - SAUCE: apparmor4.0.0 [23/90]: LSM stacking v39: Audit: Allow multiple + records in an audit_buffer + - SAUCE: apparmor4.0.0 [24/90]: LSM stacking v39: Audit: Add record for + multiple task security contexts + - SAUCE: apparmor4.0.0 [25/90]: LSM stacking v39: audit: multiple subject lsm + values for netlabel + - SAUCE: apparmor4.0.0 [26/90]: LSM stacking v39: Audit: Add record for + multiple object contexts + - SAUCE: apparmor4.0.0 [27/90]: LSM stacking v39: LSM: Remove unused + lsmcontext_init() + - SAUCE: apparmor4.0.0 [28/90]: LSM stacking v39: LSM: Improve logic in + security_getprocattr + - SAUCE: apparmor4.0.0 [29/90]: LSM stacking v39: LSM: secctx provider check + on release + - SAUCE: apparmor4.0.0 [31/90]: LSM stacking v39: LSM: Exclusive secmark usage + - SAUCE: apparmor4.0.0 [32/90]: LSM stacking v39: LSM: Identify which LSM + handles the context string + - SAUCE: apparmor4.0.0 [33/90]: LSM stacking v39: AppArmor: Remove the + exclusive flag + - SAUCE: apparmor4.0.0 [34/90]: LSM stacking v39: LSM: Add mount opts blob + size tracking + - SAUCE: apparmor4.0.0 [35/90]: LSM stacking v39: LSM: allocate mnt_opts blobs + instead of module specific data + - SAUCE: apparmor4.0.0 [36/90]: LSM stacking v39: LSM: Infrastructure + management of the key security blob + - SAUCE: apparmor4.0.0 [37/90]: LSM stacking v39: LSM: Infrastructure + management of the mnt_opts security blob + - SAUCE: apparmor4.0.0 [38/90]: LSM stacking v39: LSM: Correct handling of + ENOSYS in inode_setxattr + - SAUCE: apparmor4.0.0 [39/90]: LSM stacking v39: LSM: Remove lsmblob + scaffolding + - SAUCE: apparmor4.0.0 [40/90]: LSM stacking v39: LSM: Allow reservation of + netlabel + - SAUCE: apparmor4.0.0 [41/90]: LSM stacking v39: LSM: restrict + security_cred_getsecid() to a single LSM + - SAUCE: apparmor4.0.0 [42/90]: LSM stacking v39: Smack: Remove + LSM_FLAG_EXCLUSIVE + - SAUCE: apparmor4.0.0 [43/90]: LSM stacking v39: UBUNTU: SAUCE: apparmor4.0.0 + [12/95]: add/use fns to print hash string hex value + - SAUCE: apparmor4.0.0 [44/90]: patch to provide compatibility with v2.x net + rules + - SAUCE: apparmor4.0.0 [45/90]: add unpriviled user ns mediation + - SAUCE: apparmor4.0.0 [46/90]: Add sysctls for additional controls of unpriv + userns restrictions + - SAUCE: apparmor4.0.0 [47/90]: af_unix mediation + - SAUCE: apparmor4.0.0 [48/90]: Add fine grained mediation of posix mqueues + - SAUCE: apparmor4.0.0 [49/90]: setup slab cache for audit data + - SAUCE: apparmor4.0.0 [50/90]: Improve debug print infrastructure + - SAUCE: apparmor4.0.0 [51/90]: add the ability for profiles to have a + learning cache + - SAUCE: apparmor4.0.0 [52/90]: enable userspace upcall for mediation + - SAUCE: apparmor4.0.0 [53/90]: prompt - lock down prompt interface + - SAUCE: apparmor4.0.0 [54/90]: prompt - allow controlling of caching of a + prompt response + - SAUCE: apparmor4.0.0 [55/90]: prompt - add refcount to audit_node in prep or + reuse and delete + - SAUCE: apparmor4.0.0 [56/90]: prompt - refactor to moving caching to + uresponse + - SAUCE: apparmor4.0.0 [57/90]: prompt - Improve debug statements + - SAUCE: apparmor4.0.0 [58/90]: prompt - fix caching + - SAUCE: apparmor4.0.0 [59/90]: prompt - rework build to use append fn, to + simplify adding strings + - SAUCE: apparmor4.0.0 [60/90]: prompt - refcount notifications + - SAUCE: apparmor4.0.0 [61/90]: prompt - add the ability to reply with a + profile name + - SAUCE: apparmor4.0.0 [62/90]: prompt - fix notification cache when updating + - SAUCE: apparmor4.0.0 [63/90]: prompt - add tailglob on name for cache + support + - SAUCE: apparmor4.0.0 [64/90]: prompt - allow profiles to set prompts as + interruptible + - SAUCE: apparmor4.0.0 [65/90] v6.8 prompt:fixup interruptible + - SAUCE: apparmor4.0.0 [69/90]: add io_uring mediation + - SAUCE: apparmor4.0.0 [70/90]: apparmor: fix oops when racing to retrieve + notification + - SAUCE: apparmor4.0.0 [71/90]: apparmor: fix notification header size + - SAUCE: apparmor4.0.0 [72/90]: apparmor: fix request field from a prompt + reply that denies all access + - SAUCE: apparmor4.0.0 [73/90]: apparmor: open userns related sysctl so lxc + can check if restriction are in place + - SAUCE: apparmor4.0.0 [74/90]: apparmor: cleanup attachment perm lookup to + use lookup_perms() + - SAUCE: apparmor4.0.0 [75/90]: apparmor: remove redundant unconfined check. + - SAUCE: apparmor4.0.0 [76/90]: apparmor: switch signal mediation to using + RULE_MEDIATES + - SAUCE: apparmor4.0.0 [77/90]: apparmor: ensure labels with more than one + entry have correct flags + - SAUCE: apparmor4.0.0 [78/90]: apparmor: remove explicit restriction that + unconfined cannot use change_hat + - SAUCE: apparmor4.0.0 [79/90]: apparmor: cleanup: refactor file_perm() to + provide semantics of some checks + - SAUCE: apparmor4.0.0 [80/90]: apparmor: carry mediation check on label + - SAUCE: apparmor4.0.0 [81/90]: apparmor: convert easy uses of unconfined() to + label_mediates() + - SAUCE: apparmor4.0.0 [82/90]: apparmor: add additional flags to extended + permission. + - SAUCE: apparmor4.0.0 [83/90]: apparmor: add support for profiles to define + the kill signal + - SAUCE: apparmor4.0.0 [84/90]: apparmor: fix x_table_lookup when stacking is + not the first entry + - SAUCE: apparmor4.0.0 [85/90]: apparmor: allow profile to be transitioned + when a user ns is created + - SAUCE: apparmor4.0.0 [86/90]: apparmor: add ability to mediate caps with + policy state machine + - SAUCE: apparmor4.0.0 [87/90]: fixup notify + - SAUCE: apparmor4.0.0 [88/90]: apparmor: add fine grained ipv4/ipv6 mediation + - SAUCE: apparmor4.0.0 [89/90]:apparmor: disable tailglob responses for now + - SAUCE: apparmor4.0.0 [90/90]: apparmor: Fix notify build warnings + - SAUCE: apparmor4.0.0: fix reserved mem for when we save ipv6 addresses + - [Config] disable CONFIG_SECURITY_APPARMOR_RESTRICT_USERNS + + * update apparmor and LSM stacking patch set (LP: #2028253) // [FFe] + apparmor-4.0.0-alpha2 for unprivileged user namespace restrictions in mantic + (LP: #2032602) + - SAUCE: apparmor4.0.0 [66/90]: prompt - add support for advanced filtering of + notifications + - SAUCE: apparmor4.0.0 [67/90]: userns - add the ability to reference a global + variable for a feature value + - SAUCE: apparmor4.0.0 [68/90]: userns - make it so special unconfined + profiles can mediate user namespaces + + * [MTL] x86: Fix Cache info sysfs is not populated (LP: #2049793) + - SAUCE: cacheinfo: Check for null last-level cache info + - SAUCE: cacheinfo: Allocate memory for memory if not done from the primary + CPU + - SAUCE: x86/cacheinfo: Delete global num_cache_leaves + - SAUCE: x86/cacheinfo: Clean out init_cache_level() + + * Miscellaneous Ubuntu changes + - SAUCE: apparmor4.0.0: LSM stacking v39: fix build error with + CONFIG_SECURITY=n + - [Config] toolchain version update + + -- Paolo Pisati Fri, 12 Apr 2024 10:42:33 +0200 + +linux (6.8.0-22.22) noble; urgency=medium + + * noble/linux: 6.8.0-22.22 -proposed tracker (LP: #2060238) + + -- Andrea Righi Thu, 04 Apr 2024 23:00:49 +0200 + +linux (6.8.0-21.21) noble; urgency=medium + + * noble/linux: 6.8.0-21.21 -proposed tracker (LP: #2060225) + + * Miscellaneous Ubuntu changes + - [Config] update toolchain version in annotations + + -- Andrea Righi Thu, 04 Apr 2024 22:20:27 +0200 + +linux (6.8.0-20.20) noble; urgency=medium + + * noble/linux: 6.8.0-20.20 -proposed tracker (LP: #2058221) + + * Noble update: v6.8.1 upstream stable release (LP: #2058224) + - x86/mmio: Disable KVM mitigation when X86_FEATURE_CLEAR_CPU_BUF is set + - Documentation/hw-vuln: Add documentation for RFDS + - x86/rfds: Mitigate Register File Data Sampling (RFDS) + - KVM/x86: Export RFDS_NO and RFDS_CLEAR to guests + - Linux 6.8.1 + + * Autopkgtest failures on amd64 (LP: #2048768) + - [Packaging] update to clang-18 + + * Miscellaneous Ubuntu changes + - SAUCE: apparmor4.0.0: LSM stacking v39: fix build error with + CONFIG_SECURITY=n + - [Config] amd64: MITIGATION_RFDS=y + + -- Paolo Pisati Mon, 18 Mar 2024 11:08:14 +0100 + +linux (6.8.0-19.19) noble; urgency=medium + + * noble/linux: 6.8.0-19.19 -proposed tracker (LP: #2057910) + + * Miscellaneous Ubuntu changes + - [Packaging] re-introduce linux-doc as an empty package + + -- Paolo Pisati Thu, 14 Mar 2024 14:36:14 +0100 + +linux (6.8.0-18.18) noble; urgency=medium + + * noble/linux: 6.8.0-18.18 -proposed tracker (LP: #2057456) + + * Miscellaneous Ubuntu changes + - [Packaging] drop dependency on libclang-17 + + -- Paolo Pisati Tue, 12 Mar 2024 14:44:13 +0100 + +linux (6.8.0-17.17) noble; urgency=medium + + * noble/linux: 6.8.0-17.17 -proposed tracker (LP: #2056745) + + * Miscellaneous upstream changes + - Revert "UBUNTU: [Packaging] Add debian/control sanity check" + + -- Paolo Pisati Mon, 11 Mar 2024 12:46:38 +0100 + +linux (6.8.0-16.16) noble; urgency=medium + + * noble/linux: 6.8.0-16.16 -proposed tracker (LP: #2056738) + + * left-over ceph debugging printks (LP: #2056616) + - Revert "UBUNTU: SAUCE: ceph: make sure all the files successfully put before + unmounting" + + * qat: Improve error recovery flows (LP: #2056354) + - crypto: qat - add heartbeat error simulator + - crypto: qat - disable arbitration before reset + - crypto: qat - update PFVF protocol for recovery + - crypto: qat - re-enable sriov after pf reset + - crypto: qat - add fatal error notification + - crypto: qat - add auto reset on error + - crypto: qat - limit heartbeat notifications + - crypto: qat - improve aer error reset handling + - crypto: qat - change SLAs cleanup flow at shutdown + - crypto: qat - resolve race condition during AER recovery + - Documentation: qat: fix auto_reset section + + * update apparmor and LSM stacking patch set (LP: #2028253) + - SAUCE: apparmor4.0.0 [01/87]: LSM stacking v39: integrity: disassociate + ima_filter_rule from security_audit_rule + - SAUCE: apparmor4.0.0 [02/87]: LSM stacking v39: SM: Infrastructure + management of the sock security + - SAUCE: apparmor4.0.0 [03/87]: LSM stacking v39: LSM: Add the lsmblob data + structure. + - SAUCE: apparmor4.0.0 [04/87]: LSM stacking v39: IMA: avoid label collisions + with stacked LSMs + - SAUCE: apparmor4.0.0 [05/87]: LSM stacking v39: LSM: Use lsmblob in + security_audit_rule_match + - SAUCE: apparmor4.0.0 [06/87]: LSM stacking v39: LSM: Add lsmblob_to_secctx + hook + - SAUCE: apparmor4.0.0 [07/87]: LSM stacking v39: Audit: maintain an lsmblob + in audit_context + - SAUCE: apparmor4.0.0 [08/87]: LSM stacking v39: LSM: Use lsmblob in + security_ipc_getsecid + - SAUCE: apparmor4.0.0 [09/87]: LSM stacking v39: Audit: Update shutdown LSM + data + - SAUCE: apparmor4.0.0 [10/87]: LSM stacking v39: LSM: Use lsmblob in + security_current_getsecid + - SAUCE: apparmor4.0.0 [11/87]: LSM stacking v39: LSM: Use lsmblob in + security_inode_getsecid + - SAUCE: apparmor4.0.0 [12/87]: LSM stacking v39: Audit: use an lsmblob in + audit_names + - SAUCE: apparmor4.0.0 [13/87]: LSM stacking v39: LSM: Create new + security_cred_getlsmblob LSM hook + - SAUCE: apparmor4.0.0 [14/87]: LSM stacking v39: Audit: Change context data + from secid to lsmblob + - SAUCE: apparmor4.0.0 [15/87]: LSM stacking v39: Netlabel: Use lsmblob for + audit data + - SAUCE: apparmor4.0.0 [16/87]: LSM stacking v39: LSM: Ensure the correct LSM + context releaser + - SAUCE: apparmor4.0.0 [17/87]: LSM stacking v39: LSM: Use lsmcontext in + security_secid_to_secctx + - SAUCE: apparmor4.0.0 [18/87]: LSM stacking v39: LSM: Use lsmcontext in + security_lsmblob_to_secctx + - SAUCE: apparmor4.0.0 [19/87]: LSM stacking v39: LSM: Use lsmcontext in + security_inode_getsecctx + - SAUCE: apparmor4.0.0 [20/87]: LSM stacking v39: LSM: Use lsmcontext in + security_dentry_init_security + - SAUCE: apparmor4.0.0 [21/87]: LSM stacking v39: LSM: + security_lsmblob_to_secctx module selection + - SAUCE: apparmor4.0.0 [22/87]: LSM stacking v39: Audit: Create audit_stamp + structure + - SAUCE: apparmor4.0.0 [23/87]: LSM stacking v39: Audit: Allow multiple + records in an audit_buffer + - SAUCE: apparmor4.0.0 [24/87]: LSM stacking v39: Audit: Add record for + multiple task security contexts + - SAUCE: apparmor4.0.0 [25/87]: LSM stacking v39: audit: multiple subject lsm + values for netlabel + - SAUCE: apparmor4.0.0 [26/87]: LSM stacking v39: Audit: Add record for + multiple object contexts + - SAUCE: apparmor4.0.0 [27/87]: LSM stacking v39: LSM: Remove unused + lsmcontext_init() + - SAUCE: apparmor4.0.0 [28/87]: LSM stacking v39: LSM: Improve logic in + security_getprocattr + - SAUCE: apparmor4.0.0 [29/87]: LSM stacking v39: LSM: secctx provider check + on release + - SAUCE: apparmor4.0.0 [31/87]: LSM stacking v39: LSM: Exclusive secmark usage + - SAUCE: apparmor4.0.0 [32/87]: LSM stacking v39: LSM: Identify which LSM + handles the context string + - SAUCE: apparmor4.0.0 [33/87]: LSM stacking v39: AppArmor: Remove the + exclusive flag + - SAUCE: apparmor4.0.0 [34/87]: LSM stacking v39: LSM: Add mount opts blob + size tracking + - SAUCE: apparmor4.0.0 [35/87]: LSM stacking v39: LSM: allocate mnt_opts blobs + instead of module specific data + - SAUCE: apparmor4.0.0 [36/87]: LSM stacking v39: LSM: Infrastructure + management of the key security blob + - SAUCE: apparmor4.0.0 [37/87]: LSM stacking v39: LSM: Infrastructure + management of the mnt_opts security blob + - SAUCE: apparmor4.0.0 [38/87]: LSM stacking v39: LSM: Correct handling of + ENOSYS in inode_setxattr + - SAUCE: apparmor4.0.0 [39/87]: LSM stacking v39: LSM: Remove lsmblob + scaffolding + - SAUCE: apparmor4.0.0 [40/87]: LSM stacking v39: LSM: Allow reservation of + netlabel + - SAUCE: apparmor4.0.0 [41/87]: LSM stacking v39: LSM: restrict + security_cred_getsecid() to a single LSM + - SAUCE: apparmor4.0.0 [42/87]: LSM stacking v39: Smack: Remove + LSM_FLAG_EXCLUSIVE + - SAUCE: apparmor4.0.0 [43/87]: LSM stacking v39: UBUNTU: SAUCE: apparmor4.0.0 + [12/95]: add/use fns to print hash string hex value + - SAUCE: apparmor4.0.0 [44/87]: patch to provide compatibility with v2.x net + rules + - SAUCE: apparmor4.0.0 [45/87]: add unpriviled user ns mediation + - SAUCE: apparmor4.0.0 [46/87]: Add sysctls for additional controls of unpriv + userns restrictions + - SAUCE: apparmor4.0.0 [47/87]: af_unix mediation + - SAUCE: apparmor4.0.0 [48/87]: Add fine grained mediation of posix mqueues + - SAUCE: apparmor4.0.0 [49/87]: setup slab cache for audit data + - SAUCE: apparmor4.0.0 [50/87]: Improve debug print infrastructure + - SAUCE: apparmor4.0.0 [51/87]: add the ability for profiles to have a + learning cache + - SAUCE: apparmor4.0.0 [52/87]: enable userspace upcall for mediation + - SAUCE: apparmor4.0.0 [53/87]: prompt - lock down prompt interface + - SAUCE: apparmor4.0.0 [54/87]: prompt - allow controlling of caching of a + prompt response + - SAUCE: apparmor4.0.0 [55/87]: prompt - add refcount to audit_node in prep or + reuse and delete + - SAUCE: apparmor4.0.0 [56/87]: prompt - refactor to moving caching to + uresponse + - SAUCE: apparmor4.0.0 [57/87]: prompt - Improve debug statements + - SAUCE: apparmor4.0.0 [58/87]: prompt - fix caching + - SAUCE: apparmor4.0.0 [59/87]: prompt - rework build to use append fn, to + simplify adding strings + - SAUCE: apparmor4.0.0 [60/87]: prompt - refcount notifications + - SAUCE: apparmor4.0.0 [61/87]: prompt - add the ability to reply with a + profile name + - SAUCE: apparmor4.0.0 [62/87]: prompt - fix notification cache when updating + - SAUCE: apparmor4.0.0 [63/87]: prompt - add tailglob on name for cache + support + - SAUCE: apparmor4.0.0 [64/87]: prompt - allow profiles to set prompts as + interruptible + - SAUCE: apparmor4.0.0 [65/87] v6.8 prompt:fixup interruptible + - SAUCE: apparmor4.0.0 [69/87]: add io_uring mediation + - SAUCE: apparmor4.0.0 [70/87]: apparmor: fix oops when racing to retrieve + notification + - SAUCE: apparmor4.0.0 [71/87]: apparmor: fix notification header size + - SAUCE: apparmor4.0.0 [72/87]: apparmor: fix request field from a prompt + reply that denies all access + - SAUCE: apparmor4.0.0 [73/87]: apparmor: open userns related sysctl so lxc + can check if restriction are in place + - SAUCE: apparmor4.0.0 [74/87]: apparmor: cleanup attachment perm lookup to + use lookup_perms() + - SAUCE: apparmor4.0.0 [75/87]: apparmor: remove redundant unconfined check. + - SAUCE: apparmor4.0.0 [76/87]: apparmor: switch signal mediation to using + RULE_MEDIATES + - SAUCE: apparmor4.0.0 [77/87]: apparmor: ensure labels with more than one + entry have correct flags + - SAUCE: apparmor4.0.0 [78/87]: apparmor: remove explicit restriction that + unconfined cannot use change_hat + - SAUCE: apparmor4.0.0 [79/87]: apparmor: cleanup: refactor file_perm() to + provide semantics of some checks + - SAUCE: apparmor4.0.0 [80/87]: apparmor: carry mediation check on label + - SAUCE: apparmor4.0.0 [81/87]: apparmor: convert easy uses of unconfined() to + label_mediates() + - SAUCE: apparmor4.0.0 [82/87]: apparmor: add additional flags to extended + permission. + - SAUCE: apparmor4.0.0 [83/87]: apparmor: add support for profiles to define + the kill signal + - SAUCE: apparmor4.0.0 [84/87]: apparmor: fix x_table_lookup when stacking is + not the first entry + - SAUCE: apparmor4.0.0 [85/87]: apparmor: allow profile to be transitioned + when a user ns is created + - SAUCE: apparmor4.0.0 [86/87]: apparmor: add ability to mediate caps with + policy state machine + - SAUCE: apparmor4.0.0 [87/87]: fixup notify + - [Config] disable CONFIG_SECURITY_APPARMOR_RESTRICT_USERNS + + * update apparmor and LSM stacking patch set (LP: #2028253) // [FFe] + apparmor-4.0.0-alpha2 for unprivileged user namespace restrictions in mantic + (LP: #2032602) + - SAUCE: apparmor4.0.0 [66/87]: prompt - add support for advanced filtering of + notifications + - SAUCE: apparmor4.0.0 [67/87]: userns - add the ability to reference a global + variable for a feature value + - SAUCE: apparmor4.0.0 [68/87]: userns - make it so special unconfined + profiles can mediate user namespaces + + * Enable lowlatency settings in the generic kernel (LP: #2051342) + - [Config] enable low-latency settings + + * hwmon: (coretemp) Fix core count limitation (LP: #2056126) + - hwmon: (coretemp) Introduce enum for attr index + - hwmon: (coretemp) Remove unnecessary dependency of array index + - hwmon: (coretemp) Replace sensor_device_attribute with device_attribute + - hwmon: (coretemp) Remove redundant pdata->cpu_map[] + - hwmon: (coretemp) Abstract core_temp helpers + - hwmon: (coretemp) Split package temp_data and core temp_data + - hwmon: (coretemp) Remove redundant temp_data->is_pkg_data + - hwmon: (coretemp) Use dynamic allocated memory for core temp_data + + * Miscellaneous Ubuntu changes + - [Config] Disable CONFIG_CRYPTO_DEV_QAT_ERROR_INJECTION + - [Packaging] remove debian/scripts/misc/arch-has-odm-enabled.sh + - rebase on v6.8 + - [Config] toolchain version update + + * Miscellaneous upstream changes + - crypto: qat - add fatal error notify method + + * Rebase on v6.8 + + -- Paolo Pisati Mon, 11 Mar 2024 10:14:10 +0100 + +linux (6.8.0-15.15) noble; urgency=medium + + * noble/linux: 6.8.0-15.15 -proposed tracker (LP: #2055871) + + * Miscellaneous Ubuntu changes + - rebase on v6.8-rc7 + + * Miscellaneous upstream changes + - Revert "UBUNTU: [Packaging] Transition laptop-23.10 to generic" + + * Rebase on v6.8-rc7 + + -- Paolo Pisati Mon, 04 Mar 2024 11:50:51 +0100 + +linux (6.8.0-14.14) noble; urgency=medium + + * noble/linux: 6.8.0-14.14 -proposed tracker (LP: #2055551) + + * Please change CONFIG_CONSOLE_LOGLEVEL_QUIET to 3 (LP: #2049390) + - [Config] reduce verbosity when booting in quiet mode + + * linux: please move erofs.ko (CONFIG_EROFS for EROFS support) from linux- + modules-extra to linux-modules (LP: #2054809) + - UBUNTU [Packaging]: Include erofs in linux-modules instead of linux-modules- + extra + + * linux: please move dmi-sysfs.ko (CONFIG_DMI_SYSFS for SMBIOS support) from + linux-modules-extra to linux-modules (LP: #2045561) + - [Packaging] Move dmi-sysfs.ko into linux-modules + + * Enable CONFIG_INTEL_IOMMU_DEFAULT_ON and + CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON (LP: #1951440) + - [Config] enable Intel DMA remapping by default + + * disable Intel DMA remapping by default (LP: #1971699) + - [Config] update tracking bug for CONFIG_INTEL_IOMMU_DEFAULT_ON + + * Packaging resync (LP: #1786013) + - debian.master/dkms-versions -- update from kernel-versions + (main/d2024.02.29) + + * Miscellaneous Ubuntu changes + - SAUCE: modpost: Replace 0-length array with flex-array member + - [packaging] do not include debian/ directory in a binary package + - [packaging] remove debian/stamps/keep-dir + + -- Paolo Pisati Fri, 01 Mar 2024 11:45:12 +0100 + +linux (6.8.0-13.13) noble; urgency=medium + + * noble/linux: 6.8.0-13.13 -proposed tracker (LP: #2055421) + + * Packaging resync (LP: #1786013) + - debian.master/dkms-versions -- update from kernel-versions + (main/d2024.02.29) + + * Miscellaneous Ubuntu changes + - rebase on v6.8-rc6 + - [Config] updateconfifs following v6.8-rc6 rebase + + * Rebase on v6.8-rc6 + + -- Paolo Pisati Thu, 29 Feb 2024 15:02:24 +0100 + +linux (6.8.0-12.12) noble; urgency=medium + + * linux-tools-common: man page of usbip[d] is misplaced (LP: #2054094) + - [Packaging] rules: Put usbip manpages in the correct directory + + * Validate connection interval to pass Bluetooth Test Suite (LP: #2052005) + - Bluetooth: Enforce validation on max value of connection interval + + * Turning COMPAT_32BIT_TIME off on s390x (LP: #2038583) + - [Config] Turn off 31-bit COMPAT on s390x + + * Don't produce linux-source binary package (LP: #2043994) + - [Packaging] Add debian/control sanity check + + * Don't produce linux-*-source- package (LP: #2052439) + - [Packaging] Move linux-source package stub to debian/control.d + - [Packaging] Build linux-source package only for the main kernel + + * Don't produce linux-*-cloud-tools-common, linux-*-tools-common and + linux-*-tools-host binary packages (LP: #2048183) + - [Packaging] Move indep tools package stubs to debian/control.d + - [Packaging] Build indep tools packages only for the main kernel + + * Enable CONFIG_INTEL_IOMMU_DEFAULT_ON and + CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON (LP: #1951440) + - [Config] enable Intel DMA remapping by default + + * disable Intel DMA remapping by default (LP: #1971699) + - [Config] update tracking bug for CONFIG_INTEL_IOMMU_DEFAULT_ON + + * Miscellaneous Ubuntu changes + - [Packaging] Transition laptop-23.10 to generic + + -- Paolo Pisati Thu, 22 Feb 2024 14:31:00 +0100 + +linux (6.8.0-11.11) noble; urgency=medium + + * noble/linux: 6.8.0-11.11 -proposed tracker (LP: #2053094) + + * Miscellaneous Ubuntu changes + - [Packaging] riscv64: disable building unnecessary binary debs + + -- Paolo Pisati Wed, 14 Feb 2024 00:04:31 +0100 + +linux (6.8.0-10.10) noble; urgency=medium + + * noble/linux: 6.8.0-10.10 -proposed tracker (LP: #2053015) + + * Miscellaneous Ubuntu changes + - [Packaging] add Rust build-deps for riscv64 + + * Miscellaneous upstream changes + - Revert "Revert "UBUNTU: [Packaging] temporarily disable Rust dependencies on + riscv64"" + + -- Paolo Pisati Tue, 13 Feb 2024 13:23:47 +0100 + +linux (6.8.0-9.9) noble; urgency=medium + + * noble/linux: 6.8.0-9.9 -proposed tracker (LP: #2052945) + + * Miscellaneous upstream changes + - Revert "UBUNTU: [Packaging] temporarily disable Rust dependencies on + riscv64" + + -- Paolo Pisati Mon, 12 Feb 2024 15:49:20 +0100 + +linux (6.8.0-8.8) noble; urgency=medium + + * noble/linux: 6.8.0-8.8 -proposed tracker (LP: #2052918) + + * Miscellaneous Ubuntu changes + - [Packaging] riscv64: enable linux-libc-dev build + - v6.8-rc4 rebase + + * Rebase on v6.8-rc4 + + -- Paolo Pisati Mon, 12 Feb 2024 10:13:34 +0100 + +linux (6.8.0-7.7) noble; urgency=medium + + * noble/linux: 6.8.0-7.7 -proposed tracker (LP: #2052691) + + * update apparmor and LSM stacking patch set (LP: #2028253) + - SAUCE: apparmor4.0.0 [01/87]: LSM stacking v39: integrity: disassociate + ima_filter_rule from security_audit_rule + - SAUCE: apparmor4.0.0 [02/87]: LSM stacking v39: SM: Infrastructure + management of the sock security + - SAUCE: apparmor4.0.0 [03/87]: LSM stacking v39: LSM: Add the lsmblob data + structure. + - SAUCE: apparmor4.0.0 [04/87]: LSM stacking v39: IMA: avoid label collisions + with stacked LSMs + - SAUCE: apparmor4.0.0 [05/87]: LSM stacking v39: LSM: Use lsmblob in + security_audit_rule_match + - SAUCE: apparmor4.0.0 [06/87]: LSM stacking v39: LSM: Add lsmblob_to_secctx + hook + - SAUCE: apparmor4.0.0 [07/87]: LSM stacking v39: Audit: maintain an lsmblob + in audit_context + - SAUCE: apparmor4.0.0 [08/87]: LSM stacking v39: LSM: Use lsmblob in + security_ipc_getsecid + - SAUCE: apparmor4.0.0 [09/87]: LSM stacking v39: Audit: Update shutdown LSM + data + - SAUCE: apparmor4.0.0 [10/87]: LSM stacking v39: LSM: Use lsmblob in + security_current_getsecid + - SAUCE: apparmor4.0.0 [11/87]: LSM stacking v39: LSM: Use lsmblob in + security_inode_getsecid + - SAUCE: apparmor4.0.0 [12/87]: LSM stacking v39: Audit: use an lsmblob in + audit_names + - SAUCE: apparmor4.0.0 [13/87]: LSM stacking v39: LSM: Create new + security_cred_getlsmblob LSM hook + - SAUCE: apparmor4.0.0 [14/87]: LSM stacking v39: Audit: Change context data + from secid to lsmblob + - SAUCE: apparmor4.0.0 [15/87]: LSM stacking v39: Netlabel: Use lsmblob for + audit data + - SAUCE: apparmor4.0.0 [16/87]: LSM stacking v39: LSM: Ensure the correct LSM + context releaser + - SAUCE: apparmor4.0.0 [17/87]: LSM stacking v39: LSM: Use lsmcontext in + security_secid_to_secctx + - SAUCE: apparmor4.0.0 [18/87]: LSM stacking v39: LSM: Use lsmcontext in + security_lsmblob_to_secctx + - SAUCE: apparmor4.0.0 [19/87]: LSM stacking v39: LSM: Use lsmcontext in + security_inode_getsecctx + - SAUCE: apparmor4.0.0 [20/87]: LSM stacking v39: LSM: Use lsmcontext in + security_dentry_init_security + - SAUCE: apparmor4.0.0 [21/87]: LSM stacking v39: LSM: + security_lsmblob_to_secctx module selection + - SAUCE: apparmor4.0.0 [22/87]: LSM stacking v39: Audit: Create audit_stamp + structure + - SAUCE: apparmor4.0.0 [23/87]: LSM stacking v39: Audit: Allow multiple + records in an audit_buffer + - SAUCE: apparmor4.0.0 [24/87]: LSM stacking v39: Audit: Add record for + multiple task security contexts + - SAUCE: apparmor4.0.0 [25/87]: LSM stacking v39: audit: multiple subject lsm + values for netlabel + - SAUCE: apparmor4.0.0 [26/87]: LSM stacking v39: Audit: Add record for + multiple object contexts + - SAUCE: apparmor4.0.0 [27/87]: LSM stacking v39: LSM: Remove unused + lsmcontext_init() + - SAUCE: apparmor4.0.0 [28/87]: LSM stacking v39: LSM: Improve logic in + security_getprocattr + - SAUCE: apparmor4.0.0 [29/87]: LSM stacking v39: LSM: secctx provider check + on release + - SAUCE: apparmor4.0.0 [31/87]: LSM stacking v39: LSM: Exclusive secmark usage + - SAUCE: apparmor4.0.0 [32/87]: LSM stacking v39: LSM: Identify which LSM + handles the context string + - SAUCE: apparmor4.0.0 [33/87]: LSM stacking v39: AppArmor: Remove the + exclusive flag + - SAUCE: apparmor4.0.0 [34/87]: LSM stacking v39: LSM: Add mount opts blob + size tracking + - SAUCE: apparmor4.0.0 [35/87]: LSM stacking v39: LSM: allocate mnt_opts blobs + instead of module specific data + - SAUCE: apparmor4.0.0 [36/87]: LSM stacking v39: LSM: Infrastructure + management of the key security blob + - SAUCE: apparmor4.0.0 [37/87]: LSM stacking v39: LSM: Infrastructure + management of the mnt_opts security blob + - SAUCE: apparmor4.0.0 [38/87]: LSM stacking v39: LSM: Correct handling of + ENOSYS in inode_setxattr + - SAUCE: apparmor4.0.0 [39/87]: LSM stacking v39: LSM: Remove lsmblob + scaffolding + - SAUCE: apparmor4.0.0 [40/87]: LSM stacking v39: LSM: Allow reservation of + netlabel + - SAUCE: apparmor4.0.0 [41/87]: LSM stacking v39: LSM: restrict + security_cred_getsecid() to a single LSM + - SAUCE: apparmor4.0.0 [42/87]: LSM stacking v39: Smack: Remove + LSM_FLAG_EXCLUSIVE + - SAUCE: apparmor4.0.0 [43/87]: LSM stacking v39: UBUNTU: SAUCE: apparmor4.0.0 + [12/95]: add/use fns to print hash string hex value + - SAUCE: apparmor4.0.0 [44/87]: patch to provide compatibility with v2.x net + rules + - SAUCE: apparmor4.0.0 [45/87]: add unpriviled user ns mediation + - SAUCE: apparmor4.0.0 [46/87]: Add sysctls for additional controls of unpriv + userns restrictions + - SAUCE: apparmor4.0.0 [47/87]: af_unix mediation + - SAUCE: apparmor4.0.0 [48/87]: Add fine grained mediation of posix mqueues + - SAUCE: apparmor4.0.0 [49/87]: setup slab cache for audit data + - SAUCE: apparmor4.0.0 [50/87]: Improve debug print infrastructure + - SAUCE: apparmor4.0.0 [51/87]: add the ability for profiles to have a + learning cache + - SAUCE: apparmor4.0.0 [52/87]: enable userspace upcall for mediation + - SAUCE: apparmor4.0.0 [53/87]: prompt - lock down prompt interface + - SAUCE: apparmor4.0.0 [54/87]: prompt - allow controlling of caching of a + prompt response + - SAUCE: apparmor4.0.0 [55/87]: prompt - add refcount to audit_node in prep or + reuse and delete + - SAUCE: apparmor4.0.0 [56/87]: prompt - refactor to moving caching to + uresponse + - SAUCE: apparmor4.0.0 [57/87]: prompt - Improve debug statements + - SAUCE: apparmor4.0.0 [58/87]: prompt - fix caching + - SAUCE: apparmor4.0.0 [59/87]: prompt - rework build to use append fn, to + simplify adding strings + - SAUCE: apparmor4.0.0 [60/87]: prompt - refcount notifications + - SAUCE: apparmor4.0.0 [61/87]: prompt - add the ability to reply with a + profile name + - SAUCE: apparmor4.0.0 [62/87]: prompt - fix notification cache when updating + - SAUCE: apparmor4.0.0 [63/87]: prompt - add tailglob on name for cache + support + - SAUCE: apparmor4.0.0 [64/87]: prompt - allow profiles to set prompts as + interruptible + - SAUCE: apparmor4.0.0 [65/87] v6.8 prompt:fixup interruptible + - SAUCE: apparmor4.0.0 [69/87]: add io_uring mediation + - SAUCE: apparmor4.0.0 [70/87]: apparmor: fix oops when racing to retrieve + notification + - SAUCE: apparmor4.0.0 [71/87]: apparmor: fix notification header size + - SAUCE: apparmor4.0.0 [72/87]: apparmor: fix request field from a prompt + reply that denies all access + - SAUCE: apparmor4.0.0 [73/87]: apparmor: open userns related sysctl so lxc + can check if restriction are in place + - SAUCE: apparmor4.0.0 [74/87]: apparmor: cleanup attachment perm lookup to + use lookup_perms() + - SAUCE: apparmor4.0.0 [75/87]: apparmor: remove redundant unconfined check. + - SAUCE: apparmor4.0.0 [76/87]: apparmor: switch signal mediation to using + RULE_MEDIATES + - SAUCE: apparmor4.0.0 [77/87]: apparmor: ensure labels with more than one + entry have correct flags + - SAUCE: apparmor4.0.0 [78/87]: apparmor: remove explicit restriction that + unconfined cannot use change_hat + - SAUCE: apparmor4.0.0 [79/87]: apparmor: cleanup: refactor file_perm() to + provide semantics of some checks + - SAUCE: apparmor4.0.0 [80/87]: apparmor: carry mediation check on label + - SAUCE: apparmor4.0.0 [81/87]: apparmor: convert easy uses of unconfined() to + label_mediates() + - SAUCE: apparmor4.0.0 [82/87]: apparmor: add additional flags to extended + permission. + - SAUCE: apparmor4.0.0 [83/87]: apparmor: add support for profiles to define + the kill signal + - SAUCE: apparmor4.0.0 [84/87]: apparmor: fix x_table_lookup when stacking is + not the first entry + - SAUCE: apparmor4.0.0 [85/87]: apparmor: allow profile to be transitioned + when a user ns is created + - SAUCE: apparmor4.0.0 [86/87]: apparmor: add ability to mediate caps with + policy state machine + - SAUCE: apparmor4.0.0 [87/87]: fixup notify + - [Config] disable CONFIG_SECURITY_APPARMOR_RESTRICT_USERNS + + * update apparmor and LSM stacking patch set (LP: #2028253) // [FFe] + apparmor-4.0.0-alpha2 for unprivileged user namespace restrictions in mantic + (LP: #2032602) + - SAUCE: apparmor4.0.0 [66/87]: prompt - add support for advanced filtering of + notifications + - SAUCE: apparmor4.0.0 [67/87]: userns - add the ability to reference a global + variable for a feature value + - SAUCE: apparmor4.0.0 [68/87]: userns - make it so special unconfined + profiles can mediate user namespaces + + -- Paolo Pisati Thu, 08 Feb 2024 12:05:44 +0100 + +linux (6.8.0-6.6) noble; urgency=medium + + * noble/linux: 6.8.0-6.6 -proposed tracker (LP: #2052592) + + * Packaging resync (LP: #1786013) + - debian.master/dkms-versions -- update from kernel-versions + (main/d2024.02.07) + - [Packaging] update variants + + * FIPS kernels should default to fips mode (LP: #2049082) + - SAUCE: Enable fips mode by default, in FIPS kernels only + + * Fix snapcraftyaml.yaml for jammy:linux-raspi (LP: #2051468) + - [Packaging] Remove old snapcraft.yaml + + * Azure: Fix regression introduced in LP: #2045069 (LP: #2052453) + - hv_netvsc: Register VF in netvsc_probe if NET_DEVICE_REGISTER missed + + * Miscellaneous Ubuntu changes + - [Packaging] Remove in-tree abi checks + - [Packaging] drop abi files with clean + - [Packaging] Remove do_full_source variable (fixup) + - [Packaging] Remove update-dkms-versions and move dkms-versions + - [Config] updateconfigs following v6.8-rc3 rebase + - [packaging] rename to linux + - [packaging] rebase on v6.8-rc3 + - [packaging] disable signing for ppc64el + + * Rebase on v6.8-rc3 + + -- Paolo Pisati Wed, 07 Feb 2024 15:13:52 +0100 + +linux (6.8.0-5.5) noble; urgency=medium + + * noble/linux-unstable: 6.8.0-5.5 -proposed tracker (LP: #2052136) + + * Miscellaneous upstream changes + - Revert "mm/sparsemem: fix race in accessing memory_section->usage" + + -- Paolo Pisati Fri, 02 Feb 2024 12:59:09 +0100 + +linux-unstable (6.8.0-4.4) noble; urgency=medium + + * noble/linux-unstable: 6.8.0-4.4 -proposed tracker (LP: #2051502) + + * Migrate from fbdev drivers to simpledrm and DRM fbdev emulation layer + (LP: #1965303) + - [Config] enable simpledrm and DRM fbdev emulation layer + + * Miscellaneous Ubuntu changes + - [Config] toolchain update + + * Miscellaneous upstream changes + - rust: upgrade to Rust 1.75.0 + + -- Paolo Pisati Mon, 29 Jan 2024 14:49:49 +0100 + +linux-unstable (6.8.0-3.3) noble; urgency=medium + + * noble/linux-unstable: 6.8.0-3.3 -proposed tracker (LP: #2051488) + + * update apparmor and LSM stacking patch set (LP: #2028253) + - SAUCE: apparmor4.0.0 [43/87]: LSM stacking v39: UBUNTU: SAUCE: apparmor4.0.0 + [12/95]: add/use fns to print hash string hex value + - SAUCE: apparmor4.0.0 [44/87]: patch to provide compatibility with v2.x net + rules + - SAUCE: apparmor4.0.0 [45/87]: add unpriviled user ns mediation + - SAUCE: apparmor4.0.0 [46/87]: Add sysctls for additional controls of unpriv + userns restrictions + - SAUCE: apparmor4.0.0 [47/87]: af_unix mediation + - SAUCE: apparmor4.0.0 [48/87]: Add fine grained mediation of posix mqueues + - SAUCE: apparmor4.0.0 [49/87]: setup slab cache for audit data + - SAUCE: apparmor4.0.0 [50/87]: Improve debug print infrastructure + - SAUCE: apparmor4.0.0 [51/87]: add the ability for profiles to have a + learning cache + - SAUCE: apparmor4.0.0 [52/87]: enable userspace upcall for mediation + - SAUCE: apparmor4.0.0 [53/87]: prompt - lock down prompt interface + - SAUCE: apparmor4.0.0 [54/87]: prompt - allow controlling of caching of a + prompt response + - SAUCE: apparmor4.0.0 [55/87]: prompt - add refcount to audit_node in prep or + reuse and delete + - SAUCE: apparmor4.0.0 [56/87]: prompt - refactor to moving caching to + uresponse + - SAUCE: apparmor4.0.0 [57/87]: prompt - Improve debug statements + - SAUCE: apparmor4.0.0 [58/87]: prompt - fix caching + - SAUCE: apparmor4.0.0 [59/87]: prompt - rework build to use append fn, to + simplify adding strings + - SAUCE: apparmor4.0.0 [60/87]: prompt - refcount notifications + - SAUCE: apparmor4.0.0 [61/87]: prompt - add the ability to reply with a + profile name + - SAUCE: apparmor4.0.0 [62/87]: prompt - fix notification cache when updating + - SAUCE: apparmor4.0.0 [63/87]: prompt - add tailglob on name for cache + support + - SAUCE: apparmor4.0.0 [64/87]: prompt - allow profiles to set prompts as + interruptible + - SAUCE: apparmor4.0.0 [69/87]: add io_uring mediation + - [Config] disable CONFIG_SECURITY_APPARMOR_RESTRICT_USERNS + + * apparmor restricts read access of user namespace mediation sysctls to root + (LP: #2040194) + - SAUCE: apparmor4.0.0 [73/87]: apparmor: open userns related sysctl so lxc + can check if restriction are in place + + * AppArmor spams kernel log with assert when auditing (LP: #2040192) + - SAUCE: apparmor4.0.0 [72/87]: apparmor: fix request field from a prompt + reply that denies all access + + * apparmor notification files verification (LP: #2040250) + - SAUCE: apparmor4.0.0 [71/87]: apparmor: fix notification header size + + * apparmor oops when racing to retrieve a notification (LP: #2040245) + - SAUCE: apparmor4.0.0 [70/87]: apparmor: fix oops when racing to retrieve + notification + + * update apparmor and LSM stacking patch set (LP: #2028253) // [FFe] + apparmor-4.0.0-alpha2 for unprivileged user namespace restrictions in mantic + (LP: #2032602) + - SAUCE: apparmor4.0.0 [66/87]: prompt - add support for advanced filtering of + notifications + - SAUCE: apparmor4.0.0 [67/87]: userns - add the ability to reference a global + variable for a feature value + - SAUCE: apparmor4.0.0 [68/87]: userns - make it so special unconfined + profiles can mediate user namespaces + + * Miscellaneous Ubuntu changes + - SAUCE: apparmor4.0.0 [01/87]: LSM stacking v39: integrity: disassociate + ima_filter_rule from security_audit_rule + - SAUCE: apparmor4.0.0 [02/87]: LSM stacking v39: SM: Infrastructure + management of the sock security + - SAUCE: apparmor4.0.0 [03/87]: LSM stacking v39: LSM: Add the lsmblob data + structure. + - SAUCE: apparmor4.0.0 [04/87]: LSM stacking v39: IMA: avoid label collisions + with stacked LSMs + - SAUCE: apparmor4.0.0 [05/87]: LSM stacking v39: LSM: Use lsmblob in + security_audit_rule_match + - SAUCE: apparmor4.0.0 [06/87]: LSM stacking v39: LSM: Add lsmblob_to_secctx + hook + - SAUCE: apparmor4.0.0 [07/87]: LSM stacking v39: Audit: maintain an lsmblob + in audit_context + - SAUCE: apparmor4.0.0 [08/87]: LSM stacking v39: LSM: Use lsmblob in + security_ipc_getsecid + - SAUCE: apparmor4.0.0 [09/87]: LSM stacking v39: Audit: Update shutdown LSM + data + - SAUCE: apparmor4.0.0 [10/87]: LSM stacking v39: LSM: Use lsmblob in + security_current_getsecid + - SAUCE: apparmor4.0.0 [11/87]: LSM stacking v39: LSM: Use lsmblob in + security_inode_getsecid + - SAUCE: apparmor4.0.0 [12/87]: LSM stacking v39: Audit: use an lsmblob in + audit_names + - SAUCE: apparmor4.0.0 [13/87]: LSM stacking v39: LSM: Create new + security_cred_getlsmblob LSM hook + - SAUCE: apparmor4.0.0 [14/87]: LSM stacking v39: Audit: Change context data + from secid to lsmblob + - SAUCE: apparmor4.0.0 [15/87]: LSM stacking v39: Netlabel: Use lsmblob for + audit data + - SAUCE: apparmor4.0.0 [16/87]: LSM stacking v39: LSM: Ensure the correct LSM + context releaser + - SAUCE: apparmor4.0.0 [17/87]: LSM stacking v39: LSM: Use lsmcontext in + security_secid_to_secctx + - SAUCE: apparmor4.0.0 [18/87]: LSM stacking v39: LSM: Use lsmcontext in + security_lsmblob_to_secctx + - SAUCE: apparmor4.0.0 [19/87]: LSM stacking v39: LSM: Use lsmcontext in + security_inode_getsecctx + - SAUCE: apparmor4.0.0 [20/87]: LSM stacking v39: LSM: Use lsmcontext in + security_dentry_init_security + - SAUCE: apparmor4.0.0 [21/87]: LSM stacking v39: LSM: + security_lsmblob_to_secctx module selection + - SAUCE: apparmor4.0.0 [22/87]: LSM stacking v39: Audit: Create audit_stamp + structure + - SAUCE: apparmor4.0.0 [23/87]: LSM stacking v39: Audit: Allow multiple + records in an audit_buffer + - SAUCE: apparmor4.0.0 [24/87]: LSM stacking v39: Audit: Add record for + multiple task security contexts + - SAUCE: apparmor4.0.0 [25/87]: LSM stacking v39: audit: multiple subject lsm + values for netlabel + - SAUCE: apparmor4.0.0 [26/87]: LSM stacking v39: Audit: Add record for + multiple object contexts + - SAUCE: apparmor4.0.0 [27/87]: LSM stacking v39: LSM: Remove unused + lsmcontext_init() + - SAUCE: apparmor4.0.0 [28/87]: LSM stacking v39: LSM: Improve logic in + security_getprocattr + - SAUCE: apparmor4.0.0 [29/87]: LSM stacking v39: LSM: secctx provider check + on release + - SAUCE: apparmor4.0.0 [30/87]: LSM stacking v39: LSM: Single calls in + socket_getpeersec hooks + - SAUCE: apparmor4.0.0 [31/87]: LSM stacking v39: LSM: Exclusive secmark usage + - SAUCE: apparmor4.0.0 [32/87]: LSM stacking v39: LSM: Identify which LSM + handles the context string + - SAUCE: apparmor4.0.0 [33/87]: LSM stacking v39: AppArmor: Remove the + exclusive flag + - SAUCE: apparmor4.0.0 [34/87]: LSM stacking v39: LSM: Add mount opts blob + size tracking + - SAUCE: apparmor4.0.0 [35/87]: LSM stacking v39: LSM: allocate mnt_opts blobs + instead of module specific data + - SAUCE: apparmor4.0.0 [36/87]: LSM stacking v39: LSM: Infrastructure + management of the key security blob + - SAUCE: apparmor4.0.0 [37/87]: LSM stacking v39: LSM: Infrastructure + management of the mnt_opts security blob + - SAUCE: apparmor4.0.0 [38/87]: LSM stacking v39: LSM: Correct handling of + ENOSYS in inode_setxattr + - SAUCE: apparmor4.0.0 [39/87]: LSM stacking v39: LSM: Remove lsmblob + scaffolding + - SAUCE: apparmor4.0.0 [40/87]: LSM stacking v39: LSM: Allow reservation of + netlabel + - SAUCE: apparmor4.0.0 [41/87]: LSM stacking v39: LSM: restrict + security_cred_getsecid() to a single LSM + - SAUCE: apparmor4.0.0 [42/87]: LSM stacking v39: Smack: Remove + LSM_FLAG_EXCLUSIVE + - SAUCE: apparmor4.0.0 [65/87] v6.8 prompt:fixup interruptible + - SAUCE: apparmor4.0.0 [74/87]: apparmor: cleanup attachment perm lookup to + use lookup_perms() + - SAUCE: apparmor4.0.0 [75/87]: apparmor: remove redundant unconfined check. + - SAUCE: apparmor4.0.0 [76/87]: apparmor: switch signal mediation to using + RULE_MEDIATES + - SAUCE: apparmor4.0.0 [77/87]: apparmor: ensure labels with more than one + entry have correct flags + - SAUCE: apparmor4.0.0 [78/87]: apparmor: remove explicit restriction that + unconfined cannot use change_hat + - SAUCE: apparmor4.0.0 [79/87]: apparmor: cleanup: refactor file_perm() to + provide semantics of some checks + - SAUCE: apparmor4.0.0 [80/87]: apparmor: carry mediation check on label + - SAUCE: apparmor4.0.0 [81/87]: apparmor: convert easy uses of unconfined() to + label_mediates() + - SAUCE: apparmor4.0.0 [82/87]: apparmor: add additional flags to extended + permission. + - SAUCE: apparmor4.0.0 [83/87]: apparmor: add support for profiles to define + the kill signal + - SAUCE: apparmor4.0.0 [84/87]: apparmor: fix x_table_lookup when stacking is + not the first entry + - SAUCE: apparmor4.0.0 [85/87]: apparmor: allow profile to be transitioned + when a user ns is created + - SAUCE: apparmor4.0.0 [86/87]: apparmor: add ability to mediate caps with + policy state machine + - SAUCE: apparmor4.0.0 [87/87]: fixup notify + - [Config] updateconfigs following v6.8-rc2 rebase + + -- Paolo Pisati Mon, 29 Jan 2024 08:59:32 +0100 + +linux-unstable (6.8.0-2.2) noble; urgency=medium + + * noble/linux-unstable: 6.8.0-2.2 -proposed tracker (LP: #2051110) + + * Miscellaneous Ubuntu changes + - [Config] toolchain update + - [Config] enable Rust + + -- Paolo Pisati Wed, 24 Jan 2024 13:10:07 +0100 + +linux-unstable (6.8.0-1.1) noble; urgency=medium + + * noble/linux-unstable: 6.8.0-1.1 -proposed tracker (LP: #2051102) + + * Miscellaneous Ubuntu changes + - [packaging] move to v6.8-rc1 + - [Config] updateconfigs following v6.8-rc1 rebase + - SAUCE: export file_close_fd() instead of close_fd_get_file() + - SAUCE: cpufreq: s/strlcpy/strscpy/ + - debian/dkms-versions -- temporarily disable zfs dkms + - debian/dkms-versions -- temporarily disable ipu6 and isvsc dkms + - debian/dkms-versions -- temporarily disable v4l2loopback + + -- Paolo Pisati Wed, 24 Jan 2024 10:48:37 +0100 + +linux-unstable (6.8.0-0.0) noble; urgency=medium + + * Empty entry. + + -- Paolo Pisati Tue, 23 Jan 2024 11:36:40 +0100 + +linux-unstable (6.7.0-7.7) noble; urgency=medium + + * noble/linux-unstable: 6.7.0-7.7 -proposed tracker (LP: #2049357) + + * Packaging resync (LP: #1786013) + - [Packaging] update variants + + * Miscellaneous Ubuntu changes + - [Packaging] re-enable signing for s390x and ppc64el + + -- Andrea Righi Mon, 15 Jan 2024 08:41:11 +0100 + +linux-unstable (6.7.0-6.6) noble; urgency=medium + + * Empty entry. + + -- Andrea Righi Mon, 15 Jan 2024 08:30:50 +0100 + +linux (6.7.0-2.2) noble; urgency=medium + + * noble/linux: 6.7.0-2.2 -proposed tracker (LP: #2049182) + + * Packaging resync (LP: #1786013) + - [Packaging] resync getabis + + * Enforce RETPOLINE and SLS mitigrations (LP: #2046440) + - SAUCE: objtool: Make objtool check actually fatal upon fatal errors + - SAUCE: objtool: make objtool SLS validation fatal when building with + CONFIG_SLS=y + - SAUCE: objtool: make objtool RETPOLINE validation fatal when building with + CONFIG_RETPOLINE=y + - SAUCE: scripts: remove generating .o-ur objects + - [Packaging] Remove all custom retpoline-extract code + - Revert "UBUNTU: SAUCE: vga_set_mode -- avoid jump tables" + - Revert "UBUNTU: SAUCE: early/late -- annotate indirect calls in early/late + initialisation code" + - Revert "UBUNTU: SAUCE: apm -- annotate indirect calls within + firmware_restrict_branch_speculation_{start,end}" + + * Miscellaneous Ubuntu changes + - [Packaging] temporarily disable riscv64 builds + - [Packaging] temporarily disable Rust dependencies on riscv64 + + -- Andrea Righi Fri, 12 Jan 2024 09:21:57 +0100 + +linux (6.7.0-1.1) noble; urgency=medium + + * noble/linux: 6.7.0-1.1 -proposed tracker (LP: #2048859) + + * Packaging resync (LP: #1786013) + - [Packaging] update variants + - debian/dkms-versions -- update from kernel-versions (main/d2024.01.02) + + * [UBUNTU 23.04] Regression: Ubuntu 23.04/23.10 do not include uvdevice + anymore (LP: #2048919) + - [Config] Enable S390_UV_UAPI (built-in) + + * Support mipi camera on Intel Meteor Lake platform (LP: #2031412) + - SAUCE: iommu: intel-ipu: use IOMMU passthrough mode for Intel IPUs on Meteor + Lake + - SAUCE: platform/x86: int3472: Add handshake GPIO function + + * [SRU][J/L/M] UBUNTU: [Packaging] Make WWAN driver a loadable module + (LP: #2033406) + - [Packaging] Make WWAN driver loadable modules + + * usbip: error: failed to open /usr/share/hwdata//usb.ids (LP: #2039439) + - [Packaging] Make linux-tools-common depend on hwdata + + * [Mediatek] mt8195-demo: enable CONFIG_MTK_IOMMU as module for multimedia and + PCIE peripherals (LP: #2036587) + - [Config] Enable CONFIG_MTK_IOMMU on arm64 + + * linux-*: please enable dm-verity kconfigs to allow MoK/db verified root + images (LP: #2019040) + - [Config] CONFIG_DM_VERITY_VERIFY_ROOTHASH_SIG_SECONDARY_KEYRING=y + + * kexec enable to load/kdump zstd compressed zimg (LP: #2037398) + - [Packaging] Revert arm64 image format to Image.gz + + * Mantic minimized/minimal cloud images do not receive IP address during + provisioning; systemd regression with wait-online (LP: #2036968) + - [Config] Enable virtio-net as built-in to avoid race + + * Make backlight module auto detect dell_uart_backlight (LP: #2008882) + - SAUCE: ACPI: video: Dell AIO UART backlight detection + + * Linux 6.2 fails to reboot with current u-boot-nezha (LP: #2021364) + - [Config] Default to performance CPUFreq governor on riscv64 + + * Enable Nezha board (LP: #1975592) + - [Config] Build in D1 clock drivers on riscv64 + - [Config] Enable CONFIG_SUN6I_RTC_CCU on riscv64 + - [Config] Enable CONFIG_SUNXI_WATCHDOG on riscv64 + - [Config] Disable SUN50I_DE2_BUS on riscv64 + - [Config] Disable unneeded sunxi pinctrl drivers on riscv64 + + * Enable StarFive VisionFive 2 board (LP: #2013232) + - [Config] Enable CONFIG_PINCTRL_STARFIVE_JH7110_SYS on riscv64 + - [Config] Enable CONFIG_STARFIVE_WATCHDOG on riscv64 + + * rcu_sched detected stalls on CPUs/tasks (LP: #1967130) + - [Config] Enable virtually mapped stacks on riscv64 + + * Check for changes relevant for security certifications (LP: #1945989) + - [Packaging] Add a new fips-checks script + + * Installation support for SMARC RZ/G2L platform (LP: #2030525) + - [Config] build Renesas RZ/G2L USBPHY control driver statically + + * Add support for kernels compiled with CONFIG_EFI_ZBOOT (LP: #2002226) + - [Config]: Turn on CONFIG_EFI_ZBOOT on ARM64 + + * Default module signing algo should be accelerated (LP: #2034061) + - [Config] Default module signing algo should be accelerated + + * Miscellaneous Ubuntu changes + - [Config] annotations clean-up + + [ Upstream Kernel Changes ] + + * Rebase to v6.7 + + -- Andrea Righi Thu, 11 Jan 2024 11:49:07 +0100 + +linux (6.7.0-0.0) noble; urgency=medium + + * Empty entry + + -- Andrea Righi Tue, 09 Jan 2024 09:27:23 +0100 + +linux-unstable (6.7.0-5.5) noble; urgency=medium + + * noble/linux-unstable: 6.7.0-5.5 -proposed tracker (LP: #2048118) + + * Packaging resync (LP: #1786013) + - debian/dkms-versions -- update from kernel-versions (main/d2024.01.02) + + * Miscellaneous Ubuntu changes + - [Packaging] re-enable Rust support + - [Packaging] temporarily disable riscv64 builds + + -- Andrea Righi Fri, 05 Jan 2024 12:33:10 +0100 + +linux-unstable (6.7.0-4.4) noble; urgency=medium + + * noble/linux-unstable: 6.7.0-4.4 -proposed tracker (LP: #2047807) + + * unconfined profile denies userns_create for chromium based processes + (LP: #1990064) + - [Config] disable CONFIG_SECURITY_APPARMOR_RESTRICT_USERNS + + * apparmor restricts read access of user namespace mediation sysctls to root + (LP: #2040194) + - SAUCE: apparmor4.0.0 [69/69]: apparmor: open userns related sysctl so lxc + can check if restriction are in place + + * AppArmor spams kernel log with assert when auditing (LP: #2040192) + - SAUCE: apparmor4.0.0 [68/69]: apparmor: fix request field from a prompt + reply that denies all access + + * apparmor notification files verification (LP: #2040250) + - SAUCE: apparmor4.0.0 [67/69]: apparmor: fix notification header size + + * apparmor oops when racing to retrieve a notification (LP: #2040245) + - SAUCE: apparmor4.0.0 [66/69]: apparmor: fix oops when racing to retrieve + notification + + * update apparmor and LSM stacking patch set (LP: #2028253) + - SAUCE: apparmor4.0.0 [01/69]: add/use fns to print hash string hex value + - SAUCE: apparmor4.0.0 [02/69]: patch to provide compatibility with v2.x net + rules + - SAUCE: apparmor4.0.0 [03/69]: add unpriviled user ns mediation + - SAUCE: apparmor4.0.0 [04/69]: Add sysctls for additional controls of unpriv + userns restrictions + - SAUCE: apparmor4.0.0 [05/69]: af_unix mediation + - SAUCE: apparmor4.0.0 [06/69]: Add fine grained mediation of posix mqueues + - SAUCE: apparmor4.0.0 [07/69]: Stacking v38: LSM: Identify modules by more + than name + - SAUCE: apparmor4.0.0 [08/69]: Stacking v38: LSM: Add an LSM identifier for + external use + - SAUCE: apparmor4.0.0 [09/69]: Stacking v38: LSM: Identify the process + attributes for each module + - SAUCE: apparmor4.0.0 [10/69]: Stacking v38: LSM: Maintain a table of LSM + attribute data + - SAUCE: apparmor4.0.0 [11/69]: Stacking v38: proc: Use lsmids instead of lsm + names for attrs + - SAUCE: apparmor4.0.0 [12/69]: Stacking v38: integrity: disassociate + ima_filter_rule from security_audit_rule + - SAUCE: apparmor4.0.0 [13/69]: Stacking v38: LSM: Infrastructure management + of the sock security + - SAUCE: apparmor4.0.0 [14/69]: Stacking v38: LSM: Add the lsmblob data + structure. + - SAUCE: apparmor4.0.0 [15/69]: Stacking v38: LSM: provide lsm name and id + slot mappings + - SAUCE: apparmor4.0.0 [16/69]: Stacking v38: IMA: avoid label collisions with + stacked LSMs + - SAUCE: apparmor4.0.0 [17/69]: Stacking v38: LSM: Use lsmblob in + security_audit_rule_match + - SAUCE: apparmor4.0.0 [18/69]: Stacking v38: LSM: Use lsmblob in + security_kernel_act_as + - SAUCE: apparmor4.0.0 [19/69]: Stacking v38: LSM: Use lsmblob in + security_secctx_to_secid + - SAUCE: apparmor4.0.0 [20/69]: Stacking v38: LSM: Use lsmblob in + security_secid_to_secctx + - SAUCE: apparmor4.0.0 [21/69]: Stacking v38: LSM: Use lsmblob in + security_ipc_getsecid + - SAUCE: apparmor4.0.0 [22/69]: Stacking v38: LSM: Use lsmblob in + security_current_getsecid + - SAUCE: apparmor4.0.0 [23/69]: Stacking v38: LSM: Use lsmblob in + security_inode_getsecid + - SAUCE: apparmor4.0.0 [24/69]: Stacking v38: LSM: Use lsmblob in + security_cred_getsecid + - SAUCE: apparmor4.0.0 [25/69]: Stacking v38: LSM: Specify which LSM to + display + - SAUCE: apparmor4.0.0 [27/69]: Stacking v38: LSM: Ensure the correct LSM + context releaser + - SAUCE: apparmor4.0.0 [28/69]: Stacking v38: LSM: Use lsmcontext in + security_secid_to_secctx + - SAUCE: apparmor4.0.0 [29/69]: Stacking v38: LSM: Use lsmcontext in + security_inode_getsecctx + - SAUCE: apparmor4.0.0 [30/69]: Stacking v38: Use lsmcontext in + security_dentry_init_security + - SAUCE: apparmor4.0.0 [31/69]: Stacking v38: LSM: security_secid_to_secctx in + netlink netfilter + - SAUCE: apparmor4.0.0 [32/69]: Stacking v38: NET: Store LSM netlabel data in + a lsmblob + - SAUCE: apparmor4.0.0 [33/69]: Stacking v38: binder: Pass LSM identifier for + confirmation + - SAUCE: apparmor4.0.0 [34/69]: Stacking v38: LSM: security_secid_to_secctx + module selection + - SAUCE: apparmor4.0.0 [35/69]: Stacking v38: Audit: Keep multiple LSM data in + audit_names + - SAUCE: apparmor4.0.0 [36/69]: Stacking v38: Audit: Create audit_stamp + structure + - SAUCE: apparmor4.0.0 [37/69]: Stacking v38: LSM: Add a function to report + multiple LSMs + - SAUCE: apparmor4.0.0 [38/69]: Stacking v38: Audit: Allow multiple records in + an audit_buffer + - SAUCE: apparmor4.0.0 [39/69]: Stacking v38: Audit: Add record for multiple + task security contexts + - SAUCE: apparmor4.0.0 [40/69]: Stacking v38: audit: multiple subject lsm + values for netlabel + - SAUCE: apparmor4.0.0 [41/69]: Stacking v38: Audit: Add record for multiple + object contexts + - SAUCE: apparmor4.0.0 [42/69]: Stacking v38: netlabel: Use a struct lsmblob + in audit data + - SAUCE: apparmor4.0.0 [43/69]: Stacking v38: LSM: Removed scaffolding + function lsmcontext_init + - SAUCE: apparmor4.0.0 [44/69]: Stacking v38: AppArmor: Remove the exclusive + flag + - SAUCE: apparmor4.0.0 [45/69]: setup slab cache for audit data + - SAUCE: apparmor4.0.0 [46/69]: Improve debug print infrastructure + - SAUCE: apparmor4.0.0 [47/69]: add the ability for profiles to have a + learning cache + - SAUCE: apparmor4.0.0 [48/69]: enable userspace upcall for mediation + - SAUCE: apparmor4.0.0 [49/69]: prompt - lock down prompt interface + - SAUCE: apparmor4.0.0 [50/69]: prompt - allow controlling of caching of a + prompt response + - SAUCE: apparmor4.0.0 [51/69]: prompt - add refcount to audit_node in prep or + reuse and delete + - SAUCE: apparmor4.0.0 [52/69]: prompt - refactor to moving caching to + uresponse + - SAUCE: apparmor4.0.0 [53/69]: prompt - Improve debug statements + - SAUCE: apparmor4.0.0 [54/69]: prompt - fix caching + - SAUCE: apparmor4.0.0 [55/69]: prompt - rework build to use append fn, to + simplify adding strings + - SAUCE: apparmor4.0.0 [56/69]: prompt - refcount notifications + - SAUCE: apparmor4.0.0 [57/69]: prompt - add the ability to reply with a + profile name + - SAUCE: apparmor4.0.0 [58/69]: prompt - fix notification cache when updating + - SAUCE: apparmor4.0.0 [59/69]: prompt - add tailglob on name for cache + support + - SAUCE: apparmor4.0.0 [60/69]: prompt - allow profiles to set prompts as + interruptible + - SAUCE: apparmor4.0.0 [64/69]: advertise disconnected.path is available + - SAUCE: apparmor4.0.0 [65/69]: add io_uring mediation + + * update apparmor and LSM stacking patch set (LP: #2028253) // [FFe] + apparmor-4.0.0-alpha2 for unprivileged user namespace restrictions in mantic + (LP: #2032602) + - SAUCE: apparmor4.0.0 [61/69]: prompt - add support for advanced filtering of + notifications + - SAUCE: apparmor4.0.0 [62/69]: userns - add the ability to reference a global + variable for a feature value + - SAUCE: apparmor4.0.0 [63/69]: userns - make it so special unconfined + profiles can mediate user namespaces + + * udev fails to make prctl() syscall with apparmor=0 (as used by maas by + default) (LP: #2016908) // update apparmor and LSM stacking patch set + (LP: #2028253) + - SAUCE: apparmor4.0.0 [26/69]: Stacking v38: Fix prctl() syscall with + apparmor=0 + + * Fix RPL-U CPU C-state always keep at C3 when system run PHM with idle screen + on (LP: #2042385) + - SAUCE: r8169: Add quirks to enable ASPM on Dell platforms + + * [Debian] autoreconstruct - Do not generate chmod -x for deleted files + (LP: #2045562) + - [Debian] autoreconstruct - Do not generate chmod -x for deleted files + + * Disable Legacy TIOCSTI (LP: #2046192) + - [Config]: disable CONFIG_LEGACY_TIOCSTI + + * Packaging resync (LP: #1786013) + - [Packaging] update variants + - [Packaging] remove helper scripts + - [Packaging] update annotations scripts + + * Miscellaneous Ubuntu changes + - [Packaging] rules: Remove unused dkms make variables + - [Config] update annotations after rebase to v6.7-rc8 + + [ Upstream Kernel Changes ] + + * Rebase to v6.7-rc8 + + -- Andrea Righi Tue, 02 Jan 2024 14:57:21 +0100 + +linux-unstable (6.7.0-3.3) noble; urgency=medium + + * noble/linux-unstable: 6.7.0-3.3 -proposed tracker (LP: #2046060) + + * enable CONFIG_INTEL_TDX_HOST in linux >= 6.7 for noble (LP: #2046040) + - [Config] enable CONFIG_INTEL_TDX_HOST + + * linux tools packages for derived kernels refuse to install simultaneously + due to libcpupower name collision (LP: #2035971) + - [Packaging] Statically link libcpupower into cpupower tool + + * make lazy RCU a boot time option (LP: #2045492) + - SAUCE: rcu: Provide a boot time parameter to control lazy RCU + + * Build failure if run in a console (LP: #2044512) + - [Packaging] Fix kernel module compression failures + + * Turning COMPAT_32BIT_TIME off on arm64 (64k & derivatives) (LP: #2038582) + - [Config] y2038: Turn off COMPAT and COMPAT_32BIT_TIME on arm64 64k + + * Turning COMPAT_32BIT_TIME off on riscv64 (LP: #2038584) + - [Config] y2038: Disable COMPAT_32BIT_TIME on riscv64 + + * Turning COMPAT_32BIT_TIME off on ppc64el (LP: #2038587) + - [Config] y2038: Disable COMPAT and COMPAT_32BIT_TIME on ppc64le + + * [UBUNTU 23.04] Kernel config option missing for s390x PCI passthrough + (LP: #2042853) + - [Config] CONFIG_VFIO_PCI_ZDEV_KVM=y + + * back-out zstd module compression automatic for backports (LP: #2045593) + - [Packaging] make ZSTD module compression conditional + + * Miscellaneous Ubuntu changes + - [Packaging] Remove do_full_source variable + - [Packaging] Remove obsolete config handling + - [Packaging] Remove support for sub-flavors + - [Packaging] Remove old linux-libc-dev version hack + - [Packaging] Remove obsolete scripts + - [Packaging] Remove README.inclusion-list + - [Packaging] make $(stampdir)/stamp-build-perarch depend on build-arch + - [Packaging] Enable rootless builds + - [Packaging] Allow to run debian/rules without (fake)root + - [Packaging] remove unneeded trailing slash for INSTALL_MOD_PATH + - [Packaging] override KERNELRELEASE instead of KERNELVERSION + - [Config] update toolchain versions in annotations + - [Packaging] drop useless linux-doc + - [Packaging] scripts: Rewrite insert-ubuntu-changes in Python + - [Packaging] enable riscv64 builds + - [Packaging] remove the last sub-flavours bit + - [Packaging] check debian.env to determine do_libc_dev_package + - [Packaging] remove debian.*/variants + - [Packaging] remove do_libc_dev_package variable + - [Packaging] move linux-libc-dev.stub to debian/control.d/ + - [Packaging] Update check to build linux-libc-dev to the source package name + - [Packaging] rules: Remove startnewrelease target + - [Packaging] Remove debian/commit-templates + - [Config] update annotations after rebase to v6.7-rc4 + + [ Upstream Kernel Changes ] + + * Rebase to v6.7-rc4 + + -- Andrea Righi Mon, 11 Dec 2023 15:56:11 +0100 + +linux-unstable (6.7.0-2.2) noble; urgency=medium + + * noble/linux-unstable: 6.7.0-2.2 -proposed tracker (LP: #2045107) + + * Miscellaneous Ubuntu changes + - [Packaging] re-enable Rust + - [Config] enable Rust in annotations + - [Packaging] Remove do_enforce_all variable + - [Config] disable Softlogic 6x10 capture card driver on armhf + - [Packaging] disable Rust support + - [Config] update annotations after rebase to v6.7-rc3 + + [ Upstream Kernel Changes ] + + * Rebase to v6.7-rc3 + + -- Andrea Righi Wed, 29 Nov 2023 07:51:17 +0100 + +linux-unstable (6.7.0-1.1) noble; urgency=medium + + * noble/linux-unstable: 6.7.0-1.1 -proposed tracker (LP: #2044069) + + * Packaging resync (LP: #1786013) + - [Packaging] update annotations scripts + - [Packaging] update helper scripts + + * Miscellaneous Ubuntu changes + - [Config] update annotations after rebase to v6.7-rc2 + + [ Upstream Kernel Changes ] + + * Rebase to v6.7-rc2 + + -- Andrea Righi Tue, 21 Nov 2023 10:45:24 +0100 + +linux-unstable (6.7.0-0.0) noble; urgency=medium + + * Empty entry + + -- Andrea Righi Tue, 21 Nov 2023 07:26:46 +0100 + +linux-unstable (6.6.0-12.12) noble; urgency=medium + + * noble/linux-unstable: 6.6.0-12.12 -proposed tracker (LP: #2043664) + + * Miscellaneous Ubuntu changes + - [Packaging] temporarily disable zfs dkms + + -- Paolo Pisati Thu, 16 Nov 2023 10:20:26 +0100 + +linux-unstable (6.6.0-11.11) noble; urgency=medium + + * noble/linux-unstable: 6.6.0-11.11 -proposed tracker (LP: #2043480) + + * Packaging resync (LP: #1786013) + - [Packaging] resync git-ubuntu-log + - [Packaging] resync update-dkms-versions helper + - [Packaging] update variants + - debian/dkms-versions -- update from kernel-versions (main/d2023.11.14) + + * Miscellaneous Ubuntu changes + - [Packaging] move to Noble + - [Config] toolchain version update + + -- Paolo Pisati Wed, 15 Nov 2023 14:50:40 +0100 + +linux-unstable (6.6.0-10.10) noble; urgency=medium + + * mantic/linux-unstable: 6.6.0-10.10 -proposed tracker (LP: #2043088) + + * Bump arm64's CONFIG_NR_CPUS to 512 (LP: #2042897) + - [Config] Bump CONFIG_NR_CPUS to 512 for arm64 + + * Miscellaneous Ubuntu changes + - [Config] Include a note for the NR_CPUS setting on riscv64 + - SAUCE: apparmor4.0.0 [83/83]: Fix inode_init for changed prototype + + -- Paolo Pisati Thu, 09 Nov 2023 12:05:11 +0200 + +linux-unstable (6.6.0-9.9) mantic; urgency=medium + + * mantic/linux-unstable: 6.6.0-9.9 -proposed tracker (LP: #2041852) + + * Switch IMA default hash to sha256 (LP: #2041735) + - [Config] Switch IMA_DEFAULT_HASH from sha1 to sha256 + + * apparmor restricts read access of user namespace mediation sysctls to root + (LP: #2040194) + - SAUCE: apparmor4.0.0 [82/82]: apparmor: open userns related sysctl so lxc + can check if restriction are in place + + * AppArmor spams kernel log with assert when auditing (LP: #2040192) + - SAUCE: apparmor4.0.0 [81/82]: apparmor: fix request field from a prompt + reply that denies all access + + * apparmor notification files verification (LP: #2040250) + - SAUCE: apparmor4.0.0 [80/82]: apparmor: fix notification header size + + * apparmor oops when racing to retrieve a notification (LP: #2040245) + - SAUCE: apparmor4.0.0 [79/82]: apparmor: fix oops when racing to retrieve + notification + + * Disable restricting unprivileged change_profile by default, due to LXD + latest/stable not yet compatible with this new apparmor feature + (LP: #2038567) + - SAUCE: apparmor4.0.0 [78/82]: apparmor: Make + apparmor_restrict_unprivileged_unconfined opt-in + + * update apparmor and LSM stacking patch set (LP: #2028253) + - SAUCE: apparmor4.0.0 [01/82]: add/use fns to print hash string hex value + - SAUCE: apparmor4.0.0 [02/82]: rename SK_CTX() to aa_sock and make it an + inline fn + - SAUCE: apparmor4.0.0 [03/82]: patch to provide compatibility with v2.x net + rules + - SAUCE: apparmor4.0.0 [04/82]: add user namespace creation mediation + - SAUCE: apparmor4.0.0 [05/82]: Add sysctls for additional controls of unpriv + userns restrictions + - SAUCE: apparmor4.0.0 [06/82]: af_unix mediation + - SAUCE: apparmor4.0.0 [07/82]: Add fine grained mediation of posix mqueues + - SAUCE: apparmor4.0.0 [08/82]: Stacking v38: LSM: Identify modules by more + than name + - SAUCE: apparmor4.0.0 [09/82]: Stacking v38: LSM: Add an LSM identifier for + external use + - SAUCE: apparmor4.0.0 [10/82]: Stacking v38: LSM: Identify the process + attributes for each module + - SAUCE: apparmor4.0.0 [11/82]: Stacking v38: LSM: Maintain a table of LSM + attribute data + - SAUCE: apparmor4.0.0 [12/82]: Stacking v38: proc: Use lsmids instead of lsm + names for attrs + - SAUCE: apparmor4.0.0 [13/82]: Stacking v38: integrity: disassociate + ima_filter_rule from security_audit_rule + - SAUCE: apparmor4.0.0 [14/82]: Stacking v38: LSM: Infrastructure management + of the sock security + - SAUCE: apparmor4.0.0 [15/82]: Stacking v38: LSM: Add the lsmblob data + structure. + - SAUCE: apparmor4.0.0 [16/82]: Stacking v38: LSM: provide lsm name and id + slot mappings + - SAUCE: apparmor4.0.0 [17/82]: Stacking v38: IMA: avoid label collisions with + stacked LSMs + - SAUCE: apparmor4.0.0 [18/82]: Stacking v38: LSM: Use lsmblob in + security_audit_rule_match + - SAUCE: apparmor4.0.0 [19/82]: Stacking v38: LSM: Use lsmblob in + security_kernel_act_as + - SAUCE: apparmor4.0.0 [20/82]: Stacking v38: LSM: Use lsmblob in + security_secctx_to_secid + - SAUCE: apparmor4.0.0 [21/82]: Stacking v38: LSM: Use lsmblob in + security_secid_to_secctx + - SAUCE: apparmor4.0.0 [22/82]: Stacking v38: LSM: Use lsmblob in + security_ipc_getsecid + - SAUCE: apparmor4.0.0 [23/82]: Stacking v38: LSM: Use lsmblob in + security_current_getsecid + - SAUCE: apparmor4.0.0 [24/82]: Stacking v38: LSM: Use lsmblob in + security_inode_getsecid + - SAUCE: apparmor4.0.0 [25/82]: Stacking v38: LSM: Use lsmblob in + security_cred_getsecid + - SAUCE: apparmor4.0.0 [26/82]: Stacking v38: LSM: Specify which LSM to + display + - SAUCE: apparmor4.0.0 [28/82]: Stacking v38: LSM: Ensure the correct LSM + context releaser + - SAUCE: apparmor4.0.0 [29/82]: Stacking v38: LSM: Use lsmcontext in + security_secid_to_secctx + - SAUCE: apparmor4.0.0 [30/82]: Stacking v38: LSM: Use lsmcontext in + security_inode_getsecctx + - SAUCE: apparmor4.0.0 [31/82]: Stacking v38: Use lsmcontext in + security_dentry_init_security + - SAUCE: apparmor4.0.0 [32/82]: Stacking v38: LSM: security_secid_to_secctx in + netlink netfilter + - SAUCE: apparmor4.0.0 [33/82]: Stacking v38: NET: Store LSM netlabel data in + a lsmblob + - SAUCE: apparmor4.0.0 [34/82]: Stacking v38: binder: Pass LSM identifier for + confirmation + - SAUCE: apparmor4.0.0 [35/82]: Stacking v38: LSM: security_secid_to_secctx + module selection + - SAUCE: apparmor4.0.0 [36/82]: Stacking v38: Audit: Keep multiple LSM data in + audit_names + - SAUCE: apparmor4.0.0 [37/82]: Stacking v38: Audit: Create audit_stamp + structure + - SAUCE: apparmor4.0.0 [38/82]: Stacking v38: LSM: Add a function to report + multiple LSMs + - SAUCE: apparmor4.0.0 [39/82]: Stacking v38: Audit: Allow multiple records in + an audit_buffer + - SAUCE: apparmor4.0.0 [40/82]: Stacking v38: Audit: Add record for multiple + task security contexts + - SAUCE: apparmor4.0.0 [41/82]: Stacking v38: audit: multiple subject lsm + values for netlabel + - SAUCE: apparmor4.0.0 [42/82]: Stacking v38: Audit: Add record for multiple + object contexts + - SAUCE: apparmor4.0.0 [43/82]: Stacking v38: netlabel: Use a struct lsmblob + in audit data + - SAUCE: apparmor4.0.0 [44/82]: Stacking v38: LSM: Removed scaffolding + function lsmcontext_init + - SAUCE: apparmor4.0.0 [45/82]: Stacking v38: AppArmor: Remove the exclusive + flag + - SAUCE: apparmor4.0.0 [46/82]: combine common_audit_data and + apparmor_audit_data + - SAUCE: apparmor4.0.0 [47/82]: setup slab cache for audit data + - SAUCE: apparmor4.0.0 [48/82]: rename audit_data->label to + audit_data->subj_label + - SAUCE: apparmor4.0.0 [49/82]: pass cred through to audit info. + - SAUCE: apparmor4.0.0 [50/82]: Improve debug print infrastructure + - SAUCE: apparmor4.0.0 [51/82]: add the ability for profiles to have a + learning cache + - SAUCE: apparmor4.0.0 [52/82]: enable userspace upcall for mediation + - SAUCE: apparmor4.0.0 [53/82]: cache buffers on percpu list if there is lock + contention + - SAUCE: apparmor4.0.0 [54/82]: advertise availability of exended perms + - SAUCE: apparmor4.0.0 [56/82]: cleanup: provide separate audit messages for + file and policy checks + - SAUCE: apparmor4.0.0 [57/82]: prompt - lock down prompt interface + - SAUCE: apparmor4.0.0 [58/82]: prompt - ref count pdb + - SAUCE: apparmor4.0.0 [59/82]: prompt - allow controlling of caching of a + prompt response + - SAUCE: apparmor4.0.0 [60/82]: prompt - add refcount to audit_node in prep or + reuse and delete + - SAUCE: apparmor4.0.0 [61/82]: prompt - refactor to moving caching to + uresponse + - SAUCE: apparmor4.0.0 [62/82]: prompt - Improve debug statements + - SAUCE: apparmor4.0.0 [63/82]: prompt - fix caching + - SAUCE: apparmor4.0.0 [64/82]: prompt - rework build to use append fn, to + simplify adding strings + - SAUCE: apparmor4.0.0 [65/82]: prompt - refcount notifications + - SAUCE: apparmor4.0.0 [66/82]: prompt - add the ability to reply with a + profile name + - SAUCE: apparmor4.0.0 [67/82]: prompt - fix notification cache when updating + - SAUCE: apparmor4.0.0 [68/82]: prompt - add tailglob on name for cache + support + - SAUCE: apparmor4.0.0 [69/82]: prompt - allow profiles to set prompts as + interruptible + - SAUCE: apparmor4.0.0 [74/82]: advertise disconnected.path is available + - SAUCE: apparmor4.0.0 [75/82]: fix invalid reference on profile->disconnected + - SAUCE: apparmor4.0.0 [76/82]: add io_uring mediation + - SAUCE: apparmor4.0.0 [77/82]: apparmor: Fix regression in mount mediation + + * update apparmor and LSM stacking patch set (LP: #2028253) // [FFe] + apparmor-4.0.0-alpha2 for unprivileged user namespace restrictions in mantic + (LP: #2032602) + - SAUCE: apparmor4.0.0 [70/82]: prompt - add support for advanced filtering of + notifications + - SAUCE: apparmor4.0.0 [71/82]: userns - add the ability to reference a global + variable for a feature value + - SAUCE: apparmor4.0.0 [72/82]: userns - make it so special unconfined + profiles can mediate user namespaces + - SAUCE: apparmor4.0.0 [73/82]: userns - allow restricting unprivileged + change_profile + + * LSM stacking and AppArmor for 6.2: additional fixes (LP: #2017903) // update + apparmor and LSM stacking patch set (LP: #2028253) + - SAUCE: apparmor4.0.0 [55/82]: fix profile verification and enable it + + * udev fails to make prctl() syscall with apparmor=0 (as used by maas by + default) (LP: #2016908) // update apparmor and LSM stacking patch set + (LP: #2028253) + - SAUCE: apparmor4.0.0 [27/82]: Stacking v38: Fix prctl() syscall with + apparmor=0 + + * Miscellaneous Ubuntu changes + - [Config] SECURITY_APPARMOR_RESTRICT_USERNS=y + + -- Paolo Pisati Fri, 03 Nov 2023 11:59:12 +0100 + +linux-unstable (6.6.0-8.8) mantic; urgency=medium + + * mantic/linux-unstable: 6.6.0-8.8 -proposed tracker (LP: #2040243) + + * Miscellaneous Ubuntu changes + - abi: gc reference to phy-rtk-usb2/phy-rtk-usb3 + + -- Paolo Pisati Tue, 24 Oct 2023 10:55:34 +0200 + +linux-unstable (6.6.0-7.7) mantic; urgency=medium + + * mantic/linux-unstable: 6.6.0-7.7 -proposed tracker (LP: #2040147) + + * test_021_aslr_dapper_libs from ubuntu_qrt_kernel_security failed on K-5.19 / + J-OEM-6.1 / J-6.2 AMD64 (LP: #1983357) + - [Config]: set ARCH_MMAP_RND_{COMPAT_, }BITS to the maximum + + * Miscellaneous Ubuntu changes + - [Config] updateconfigs following v6.6-rc7 rebase + + -- Paolo Pisati Mon, 23 Oct 2023 11:51:14 +0200 + +linux-unstable (6.6.0-6.6) mantic; urgency=medium + + * mantic/linux-unstable: 6.6.0-6.6 -proposed tracker (LP: #2039780) + + * Miscellaneous Ubuntu changes + - rebase on v6.6-rc6 + - [Config] updateconfigs following v6.6-rc6 rebase + + [ Upstream Kernel Changes ] + + * Rebase to v6.6-rc6 + + -- Paolo Pisati Thu, 19 Oct 2023 12:09:16 +0200 + +linux-unstable (6.6.0-5.5) mantic; urgency=medium + + * mantic/linux-unstable: 6.6.0-5.5 -proposed tracker (LP: #2038899) + + * Miscellaneous Ubuntu changes + - rebase on v6.6-rc5 + - [Config] updateconfigs following v6.6-rc5 rebase + + [ Upstream Kernel Changes ] + + * Rebase to v6.6-rc5 + + -- Paolo Pisati Tue, 10 Oct 2023 11:18:41 +0200 + +linux-unstable (6.6.0-4.4) mantic; urgency=medium + + * mantic/linux-unstable: 6.6.0-4.4 -proposed tracker (LP: #2038423) + + * Miscellaneous Ubuntu changes + - rebase on v6.6-rc4 + + [ Upstream Kernel Changes ] + + * Rebase to v6.6-rc4 + + -- Paolo Pisati Wed, 04 Oct 2023 11:16:25 +0200 + +linux-unstable (6.6.0-3.3) mantic; urgency=medium + + * mantic/linux-unstable: 6.6.0-3.3 -proposed tracker (LP: #2037622) + + * Miscellaneous Ubuntu changes + - [Config] updateconfigs following v6.6-rc3 rebase + + * Miscellaneous upstream changes + - Revert "UBUNTU: SAUCE: enforce rust availability only on x86_64" + - arm64: rust: Enable Rust support for AArch64 + - arm64: rust: Enable PAC support for Rust. + - arm64: Restrict Rust support to little endian only. + + -- Paolo Pisati Thu, 28 Sep 2023 10:45:38 +0200 + +linux-unstable (6.6.0-2.2) mantic; urgency=medium + + * Miscellaneous upstream changes + - UBUBNTU: [Config] build all COMEDI drivers as modules + + -- Paolo Pisati Mon, 18 Sep 2023 14:42:56 +0200 + +linux-unstable (6.6.0-1.1) mantic; urgency=medium + + * Miscellaneous Ubuntu changes + - [Packaging] move linux to linux-unstable + - [Packaging] rebase on v6.6-rc1 + - [Config] updateconfigs following v6.6-rc1 rebase + - [packaging] skip ABI, modules and retpoline checks + - update dropped.txt + - [Config] SHIFT_FS FTBFS with Linux 6.6, disable it + - [Config] DELL_UART_BACKLIGHT FTBFS with Linux 6.6, disable it + - [Packaging] debian/dkms-versions: temporarily disable dkms + - [Packaging] temporarily disable signing for s390x + + [ Upstream Kernel Changes ] + + * Rebase to v6.6-rc1 + + -- Paolo Pisati Fri, 15 Sep 2023 14:42:18 +0200 + +linux-unstable (6.6.0-0.0) mantic; urgency=medium + + * Empty entry + + -- Paolo Pisati Thu, 14 Sep 2023 15:03:19 +0200 + +linux (6.5.0-5.5) mantic; urgency=medium + + * mantic/linux: 6.5.0-5.5 -proposed tracker (LP: #2034546) + + * Packaging resync (LP: #1786013) + - [Packaging] update helper scripts + - debian/dkms-versions -- update from kernel-versions (main/d2023.08.23) + + +linux (6.5.0-4.4) mantic; urgency=medium + + * mantic/linux: 6.5.0-4.4 -proposed tracker (LP: #2034042) + + * Packaging resync (LP: #1786013) + - debian/dkms-versions -- update from kernel-versions (main/d2023.08.23) + + -- Andrea Righi Mon, 04 Sep 2023 16:55:44 +0200 + +linux (6.5.0-3.3) mantic; urgency=medium + + * mantic/linux: 6.5.0-3.3 -proposed tracker (LP: #2033904) + + * Packaging resync (LP: #1786013) + - debian/dkms-versions -- update from kernel-versions (main/d2023.08.23) + + * [23.10] Please test secure-boot and lockdown on the early 6.5 kernel (s390x) + (LP: #2026833) + - [Packaging] re-enable signing for s390x + + * Miscellaneous upstream changes + - module/decompress: use vmalloc() for zstd decompression workspace + + -- Andrea Righi Fri, 01 Sep 2023 16:15:33 +0200 + +linux (6.5.0-2.2) mantic; urgency=medium + + * mantic/linux: 6.5.0-2.2 -proposed tracker (LP: #2033240) + + * Soundwire support for Dell SKU0C87 devices (LP: #2029281) + - SAUCE: ASoC: Intel: soc-acpi: add support for Dell SKU0C87 devices + + * Fix numerous AER related issues (LP: #2033025) + - SAUCE: PCI/AER: Disable AER service during suspend, again + - SAUCE: PCI/DPC: Disable DPC service during suspend, again + + * Support Realtek RTL8852CE WiFi 6E/BT Combo (LP: #2025672) + - wifi: rtw89: debug: Fix error handling in rtw89_debug_priv_btc_manual_set() + - Bluetooth: btrtl: Load FW v2 otherwise FW v1 for RTL8852C + + [ Upstream Kernel Changes ] + + * Rebase to v6.5 + + -- Andrea Righi Mon, 28 Aug 2023 08:53:19 +0200 + +linux (6.5.0-1.1) mantic; urgency=medium + + * mantic/linux: 6.5.0-1.1 -proposed tracker (LP: #2032750) + + * Packaging resync (LP: #1786013) + - [Packaging] resync update-dkms-versions helper + - [Packaging] update variants + - debian/dkms-versions -- update from kernel-versions (main/d2023.07.26) + + * ceph: support idmapped mounts (LP: #2032959) + - SAUCE: libceph: add spinlock around osd->o_requests + - SAUCE: libceph: define struct ceph_sparse_extent and add some helpers + - SAUCE: libceph: new sparse_read op, support sparse reads on msgr2 crc + codepath + - SAUCE: libceph: support sparse reads on msgr2 secure codepath + - SAUCE: libceph: add sparse read support to msgr1 + - SAUCE: libceph: add sparse read support to OSD client + - SAUCE: ceph: add new mount option to enable sparse reads + - SAUCE: ceph: preallocate inode for ops that may create one + - SAUCE: ceph: make ceph_msdc_build_path use ref-walk + - SAUCE: libceph: add new iov_iter-based ceph_msg_data_type and + ceph_osd_data_type + - SAUCE: ceph: use osd_req_op_extent_osd_iter for netfs reads + - SAUCE: ceph: fscrypt_auth handling for ceph + - SAUCE: ceph: implement -o test_dummy_encryption mount option + - SAUCE: ceph: add fscrypt ioctls and ceph.fscrypt.auth vxattr + - SAUCE: ceph: make ioctl cmds more readable in debug log + - SAUCE: ceph: add base64 endcoding routines for encrypted names + - SAUCE: ceph: encode encrypted name in ceph_mdsc_build_path and dentry + release + - SAUCE: ceph: send alternate_name in MClientRequest + - SAUCE: ceph: decode alternate_name in lease info + - SAUCE: ceph: set DCACHE_NOKEY_NAME flag in ceph_lookup/atomic_open() + - SAUCE: ceph: make d_revalidate call fscrypt revalidator for encrypted + dentries + - SAUCE: ceph: add helpers for converting names for userland presentation + - SAUCE: ceph: make ceph_fill_trace and ceph_get_name decrypt names + - SAUCE: ceph: pass the request to parse_reply_info_readdir() + - SAUCE: ceph: add support to readdir for encrypted names + - SAUCE: ceph: create symlinks with encrypted and base64-encoded targets + - SAUCE: ceph: add some fscrypt guardrails + - SAUCE: ceph: allow encrypting a directory while not having Ax caps + - SAUCE: ceph: mark directory as non-complete after loading key + - SAUCE: ceph: size handling in MClientRequest, cap updates and inode traces + - SAUCE: ceph: handle fscrypt fields in cap messages from MDS + - SAUCE: ceph: add infrastructure for file encryption and decryption + - SAUCE: libceph: add CEPH_OSD_OP_ASSERT_VER support + - SAUCE: libceph: allow ceph_osdc_new_request to accept a multi-op read + - SAUCE: ceph: add object version support for sync read + - SAUCE: ceph: add truncate size handling support for fscrypt + - SAUCE: ceph: don't use special DIO path for encrypted inodes + - SAUCE: ceph: align data in pages in ceph_sync_write + - SAUCE: ceph: add read/modify/write to ceph_sync_write + - SAUCE: ceph: add encryption support to writepage and writepages + - SAUCE: ceph: plumb in decryption during reads + - SAUCE: ceph: invalidate pages when doing direct/sync writes + - SAUCE: ceph: add support for encrypted snapshot names + - SAUCE: ceph: prevent snapshot creation in encrypted locked directories + - SAUCE: ceph: update documentation regarding snapshot naming limitations + - SAUCE: ceph: drop messages from MDS when unmounting + - SAUCE: ceph: wait for OSD requests' callbacks to finish when unmounting + - SAUCE: ceph: fix updating i_truncate_pagecache_size for fscrypt + - SAUCE: ceph: switch ceph_lookup/atomic_open() to use new fscrypt helper + - SAUCE: libceph: do not include crypto/algapi.h + - SAUCE: rbd: bump RBD_MAX_PARENT_CHAIN_LEN to 128 + - SAUCE: ceph: dump info about cap flushes when we're waiting too long for + them + - SAUCE: mm: BUG if filemap_alloc_folio gives us a folio with a non-NULL + ->private + - SAUCE: ceph: make sure all the files successfully put before unmounting + - SAUCE: ceph: BUG if MDS changed truncate_seq with client caps still + outstanding + - SAUCE: ceph: add the *_client debug macros support + - SAUCE: ceph: pass the mdsc to several helpers + - SAUCE: ceph: rename _to_client() to _to_fs_client() + - SAUCE: ceph: move mdsmap.h to fs/ceph/ + - SAUCE: ceph: add ceph_inode_to_client() helper support + - SAUCE: ceph: print the client global_id in all the debug logs + - SAUCE: ceph: make the members in struct ceph_mds_request_args_ext an union + - SAUCE: ceph: make num_fwd and num_retry to __u32 + - SAUCE: fs: export mnt_idmap_get/mnt_idmap_put + - SAUCE: ceph: stash idmapping in mdsc request + - SAUCE: ceph: handle idmapped mounts in create_request_message() + - SAUCE: ceph: add enable_unsafe_idmap module parameter + - SAUCE: ceph: pass an idmapping to mknod/symlink/mkdir + - SAUCE: ceph: allow idmapped getattr inode op + - SAUCE: ceph: allow idmapped permission inode op + - SAUCE: ceph: pass idmap to __ceph_setattr + - SAUCE: ceph: allow idmapped setattr inode op + - SAUCE: ceph/acl: allow idmapped set_acl inode op + - SAUCE: ceph/file: allow idmapped atomic_open inode op + - SAUCE: ceph: allow idmapped mounts + + * Got soft lockup CPU if dell_uart_backlight is probed (LP: #2032174) + - SAUCE: platform/x86: dell-uart-backlight: replace chars_in_buffer() with + flush_chars() + + * Fix ACPI TAD on some Intel based systems (LP: #2032767) + - ACPI: TAD: Install SystemCMOS address space handler for ACPI000E + + * Fix unreliable ethernet cable detection on I219 NIC (LP: #2028122) + - e1000e: Use PME poll to circumvent unreliable ACPI wake + + * Fix panel brightness issues on HP laptops (LP: #2032704) + - ACPI: video: Put ACPI video and its child devices into D0 on boot + + * FATAL:credentials.cc(127)] Check failed: . : Permission denied (13) + (LP: #2017980) + - [Config] disable CONFIG_SECURITY_APPARMOR_RESTRICT_USERNS + + * Support initrdless boot on default qemu virt models and openstack + (LP: #2030745) + - [Config] set VIRTIO_BLK=y for default qemu/openstack boot + + * Miscellaneous Ubuntu changes + - [Packaging] rust: use Rust 1.68.2 + - [Packaging] depend on clang/libclang-15 for Rust + - [Config] update toolchain versions in annotations + - [Config] update annotations after rebase to v6.5-rc6 + - [Config] update toolchain version in annotations + - [Packaging] temporarily disable Rust support + - [Packaging] temporarily disable signing for ppc64el + - [Packaging] temporarily disable signing for s390x + + -- Andrea Righi Thu, 24 Aug 2023 17:47:10 +0200 + +linux (6.5.0-0.0) mantic; urgency=medium + + * Empty entry + + -- Andrea Righi Wed, 23 Aug 2023 08:14:48 +0200 + +linux-unstable (6.5.0-4.4) mantic; urgency=medium + + * mantic/linux-unstable: 6.5.0-4.4 -proposed tracker (LP: #2029086) + + * Miscellaneous Ubuntu changes + - [Packaging] Add .NOTPARALLEL + - [Packaging] Remove meaningless $(header_arch) + - [Packaging] Fix File exists error in install-arch-headers + - [Packaging] clean debian/linux-* directories + - [Packaging] remove hmake + - [Packaging] install headers to debian/linux-libc-dev directly + - [Config] define CONFIG options for arm64 instead of arm64-generic + - [Config] update annotations after rebase to v6.5-rc4 + - [Packaging] temporarily disable Rust support + + [ Upstream Kernel Changes ] + + * Rebase to v6.5-rc4 + + -- Andrea Righi Mon, 31 Jul 2023 08:41:59 +0200 + +linux-unstable (6.5.0-3.3) mantic; urgency=medium + + * mantic/linux-unstable: 6.5.0-3.3 -proposed tracker (LP: #2028779) + + * enable Rust support in the kernel (LP: #2007654) + - SAUCE: rust: support rustc-1.69.0 + - [Packaging] depend on rustc-1.69.0 + + * Packaging resync (LP: #1786013) + - [Packaging] resync update-dkms-versions helper + - [Packaging] resync getabis + + * Fix UBSAN in Intel EDAC driver (LP: #2028746) + - EDAC/i10nm: Skip the absent memory controllers + + * Ship kernel modules Zstd compressed (LP: #2028568) + - SAUCE: Support but do not require compressed modules + - [Config] Enable support for ZSTD compressed modules + - [Packaging] ZSTD compress modules + + * update apparmor and LSM stacking patch set (LP: #2028253) + - SAUCE: apparmor3.2.0 [02/60]: rename SK_CTX() to aa_sock and make it an + inline fn + - SAUCE: apparmor3.2.0 [05/60]: Add sysctls for additional controls of unpriv + userns restrictions + - SAUCE: apparmor3.2.0 [08/60]: Stacking v38: LSM: Identify modules by more + than name + - SAUCE: apparmor3.2.0 [09/60]: Stacking v38: LSM: Add an LSM identifier for + external use + - SAUCE: apparmor3.2.0 [10/60]: Stacking v38: LSM: Identify the process + attributes for each module + - SAUCE: apparmor3.2.0 [11/60]: Stacking v38: LSM: Maintain a table of LSM + attribute data + - SAUCE: apparmor3.2.0 [12/60]: Stacking v38: proc: Use lsmids instead of lsm + names for attrs + - SAUCE: apparmor3.2.0 [13/60]: Stacking v38: integrity: disassociate + ima_filter_rule from security_audit_rule + - SAUCE: apparmor3.2.0 [14/60]: Stacking v38: LSM: Infrastructure management + of the sock security + - SAUCE: apparmor3.2.0 [15/60]: Stacking v38: LSM: Add the lsmblob data + structure. + - SAUCE: apparmor3.2.0 [16/60]: Stacking v38: LSM: provide lsm name and id + slot mappings + - SAUCE: apparmor3.2.0 [17/60]: Stacking v38: IMA: avoid label collisions with + stacked LSMs + - SAUCE: apparmor3.2.0 [18/60]: Stacking v38: LSM: Use lsmblob in + security_audit_rule_match + - SAUCE: apparmor3.2.0 [19/60]: Stacking v38: LSM: Use lsmblob in + security_kernel_act_as + - SAUCE: apparmor3.2.0 [20/60]: Stacking v38: LSM: Use lsmblob in + security_secctx_to_secid + - SAUCE: apparmor3.2.0 [21/60]: Stacking v38: LSM: Use lsmblob in + security_secid_to_secctx + - SAUCE: apparmor3.2.0 [22/60]: Stacking v38: LSM: Use lsmblob in + security_ipc_getsecid + - SAUCE: apparmor3.2.0 [23/60]: Stacking v38: LSM: Use lsmblob in + security_current_getsecid + - SAUCE: apparmor3.2.0 [24/60]: Stacking v38: LSM: Use lsmblob in + security_inode_getsecid + - SAUCE: apparmor3.2.0 [25/60]: Stacking v38: LSM: Use lsmblob in + security_cred_getsecid + - SAUCE: apparmor3.2.0 [26/60]: Stacking v38: LSM: Specify which LSM to + display + - SAUCE: apparmor3.2.0 [28/60]: Stacking v38: LSM: Ensure the correct LSM + context releaser + - SAUCE: apparmor3.2.0 [29/60]: Stacking v38: LSM: Use lsmcontext in + security_secid_to_secctx + - SAUCE: apparmor3.2.0 [30/60]: Stacking v38: LSM: Use lsmcontext in + security_inode_getsecctx + - SAUCE: apparmor3.2.0 [31/60]: Stacking v38: Use lsmcontext in + security_dentry_init_security + - SAUCE: apparmor3.2.0 [32/60]: Stacking v38: LSM: security_secid_to_secctx in + netlink netfilter + - SAUCE: apparmor3.2.0 [33/60]: Stacking v38: NET: Store LSM netlabel data in + a lsmblob + - SAUCE: apparmor3.2.0 [34/60]: Stacking v38: binder: Pass LSM identifier for + confirmation + - SAUCE: apparmor3.2.0 [35/60]: Stacking v38: LSM: security_secid_to_secctx + module selection + - SAUCE: apparmor3.2.0 [36/60]: Stacking v38: Audit: Keep multiple LSM data in + audit_names + - SAUCE: apparmor3.2.0 [37/60]: Stacking v38: Audit: Create audit_stamp + structure + - SAUCE: apparmor3.2.0 [38/60]: Stacking v38: LSM: Add a function to report + multiple LSMs + - SAUCE: apparmor3.2.0 [39/60]: Stacking v38: Audit: Allow multiple records in + an audit_buffer + - SAUCE: apparmor3.2.0 [40/60]: Stacking v38: Audit: Add record for multiple + task security contexts + - SAUCE: apparmor3.2.0 [41/60]: Stacking v38: audit: multiple subject lsm + values for netlabel + - SAUCE: apparmor3.2.0 [42/60]: Stacking v38: Audit: Add record for multiple + object contexts + - SAUCE: apparmor3.2.0 [43/60]: Stacking v38: netlabel: Use a struct lsmblob + in audit data + - SAUCE: apparmor3.2.0 [44/60]: Stacking v38: LSM: Removed scaffolding + function lsmcontext_init + - SAUCE: apparmor3.2.0 [45/60]: Stacking v38: AppArmor: Remove the exclusive + flag + - SAUCE: apparmor3.2.0 [46/60]: combine common_audit_data and + apparmor_audit_data + - SAUCE: apparmor3.2.0 [47/60]: setup slab cache for audit data + - SAUCE: apparmor3.2.0 [48/60]: rename audit_data->label to + audit_data->subj_label + - SAUCE: apparmor3.2.0 [49/60]: pass cred through to audit info. + - SAUCE: apparmor3.2.0 [50/60]: Improve debug print infrastructure + - SAUCE: apparmor3.2.0 [51/60]: add the ability for profiles to have a + learning cache + - SAUCE: apparmor3.2.0 [52/60]: enable userspace upcall for mediation + - SAUCE: apparmor3.2.0 [53/60]: cache buffers on percpu list if there is lock + contention + - SAUCE: apparmor3.2.0 [55/60]: advertise availability of exended perms + - SAUCE: apparmor3.2.0 [60/60]: [Config] enable + CONFIG_SECURITY_APPARMOR_RESTRICT_USERNS + + * LSM stacking and AppArmor for 6.2: additional fixes (LP: #2017903) // update + apparmor and LSM stacking patch set (LP: #2028253) + - SAUCE: apparmor3.2.0 [57/60]: fix profile verification and enable it + + * udev fails to make prctl() syscall with apparmor=0 (as used by maas by + default) (LP: #2016908) // update apparmor and LSM stacking patch set + (LP: #2028253) + - SAUCE: apparmor3.2.0 [27/60]: Stacking v38: Fix prctl() syscall with + apparmor=0 + + * kinetic: apply new apparmor and LSM stacking patch set (LP: #1989983) // + update apparmor and LSM stacking patch set (LP: #2028253) + - SAUCE: apparmor3.2.0 [01/60]: add/use fns to print hash string hex value + - SAUCE: apparmor3.2.0 [03/60]: patch to provide compatibility with v2.x net + rules + - SAUCE: apparmor3.2.0 [04/60]: add user namespace creation mediation + - SAUCE: apparmor3.2.0 [06/60]: af_unix mediation + - SAUCE: apparmor3.2.0 [07/60]: Add fine grained mediation of posix mqueues + + * Miscellaneous Ubuntu changes + - [Packaging] Use consistent llvm/clang for rust + + [ Upstream Kernel Changes ] + + * Rebase to v6.5-rc3 + + -- Andrea Righi Fri, 28 Jul 2023 07:44:20 +0200 + +linux-unstable (6.5.0-2.2) mantic; urgency=medium + + * mantic/linux-unstable: 6.5.0-2.2 -proposed tracker (LP: #2027953) + + * Remove non-LPAE kernel flavor (LP: #2025265) + - [Packaging] Rename armhf generic-lpae flavor to generic + + * Please enable Renesas RZ platform serial installer (LP: #2022361) + - [Config] enable hihope RZ/G2M serial console + + * Miscellaneous Ubuntu changes + - [Packaging] snap: Remove old configs handling + - [Packaging] checks/final-checks: Remove old configs handling + - [Packaging] checks/final-checks: check existance of Makefile first + - [Packaging] checks/final-checks: Fix shellcheck issues + - [Packaging] add libstdc++-dev to the build dependencies + - [Config] update annotations after rebase to v6.5-rc2 + + * Miscellaneous upstream changes + - kbuild: rust: avoid creating temporary files + - rust: fix bindgen build error with UBSAN_BOUNDS_STRICT + + [ Upstream Kernel Changes ] + + * Rebase to v6.5-rc2 + + -- Andrea Righi Tue, 18 Jul 2023 10:14:14 +0200 + +linux-unstable (6.5.0-1.1) mantic; urgency=medium + + * mantic/linux-unstable: 6.5.0-1.1 -proposed tracker (LP: #2026689) + + * CVE-2023-31248 + - netfilter: nf_tables: do not ignore genmask when looking up chain by id + + * CVE-2023-35001 + - netfilter: nf_tables: prevent OOB access in nft_byteorder_eval + + * HDMI output with More than one child device for port B in VBT error + (LP: #2025195) + - SAUCE: drm/i915/quirks: Add multiple VBT quirk for HP ZBook Power G10 + + * CVE-2023-2640 // CVE-2023-32629 + - SAUCE: overlayfs: default to userxattr when mounted from non initial user + namespace + + * Packaging resync (LP: #1786013) + - [Packaging] resync update-dkms-versions helper + + * enable Rust support in the kernel (LP: #2007654) + - SAUCE: btf, scripts: rust: drop is_rust_module.sh + - [Packaging] add rust dependencies + + * CVE-2023-2612 + - SAUCE: shiftfs: prevent lock unbalance in shiftfs_create_object() + + * Miscellaneous Ubuntu changes + - SAUCE: shiftfs: support linux 6.5 + - [Config] update annotations after rebase to v6.5-rc1 + - [Config] temporarily disable Rust + + [ Upstream Kernel Changes ] + + * Rebase to v6.5-rc1 + + -- Andrea Righi Mon, 10 Jul 2023 09:15:26 +0200 + +linux-unstable (6.5.0-0.0) mantic; urgency=medium + + * Empty entry + + -- Andrea Righi Wed, 05 Jul 2023 12:48:39 +0200 + +linux-unstable (6.4.0-8.8) mantic; urgency=medium + + * mantic/linux-unstable: 6.4.0-8.8 -proposed tracker (LP: #2025018) + + * Miscellaneous Ubuntu changes + - [Config] update toolchain version (gcc) in annotations + + [ Upstream Kernel Changes ] + + * Rebase to v6.4 + + -- Andrea Righi Mon, 26 Jun 2023 09:14:02 +0200 + +linux-unstable (6.4.0-7.7) mantic; urgency=medium + + * mantic/linux-unstable: 6.4.0-7.7 -proposed tracker (LP: #2024338) + + [ Upstream Kernel Changes ] + + * Rebase to v6.4-rc7 + + -- Andrea Righi Mon, 19 Jun 2023 08:51:27 +0200 + +linux-unstable (6.4.0-6.6) mantic; urgency=medium + + * mantic/linux-unstable: 6.4.0-6.6 -proposed tracker (LP: #2023966) + + * Packaging resync (LP: #1786013) + - [Packaging] update annotations scripts + + * enable multi-gen LRU by default (LP: #2023629) + - [Config] enable multi-gen LRU by default + + * Fix Monitor lost after replug WD19TBS to SUT port with VGA/DVI to type-C + dongle (LP: #2021949) + - thunderbolt: Do not touch CL state configuration during discovery + - thunderbolt: Increase DisplayPort Connection Manager handshake timeout + + * Neuter signing tarballs (LP: #2012776) + - [Packaging] remove the signing tarball support + + * Enable Tracing Configs for OSNOISE and TIMERLAT (LP: #2018591) + - [Config] Enable OSNOISE_TRACER and TIMERLAT_TRACER configs + + * Miscellaneous Ubuntu changes + - [Config] Add CONFIG_AS_HAS_NON_CONST_LEB128 on riscv64 + - [Packaging] introduce do_lib_rust and enable it only on generic amd64 + - [Config] update annotations after rebase to v6.4-rc6 + + [ Upstream Kernel Changes ] + + * Rebase to v6.4-rc6 + + -- Andrea Righi Thu, 15 Jun 2023 20:11:07 +0200 + +linux-unstable (6.4.0-5.5) mantic; urgency=medium + + * mantic/linux-unstable: 6.4.0-5.5 -proposed tracker (LP: #2022886) + + * Miscellaneous Ubuntu changes + - [Packaging] update getabis to support linux-unstable + - UBUNTU [Config]: disable hibernation on riscv64 + + [ Upstream Kernel Changes ] + + * Rebase to v6.4-rc5 + + -- Andrea Righi Tue, 06 Jun 2023 08:18:01 +0200 + +linux-unstable (6.4.0-4.4) mantic; urgency=medium + + * mantic/linux-unstable: 6.4.0-4.4 -proposed tracker (LP: #2021597) + + * Miscellaneous Ubuntu changes + - [Config] udpate annotations after rebase to v6.4-rc4 + + -- Andrea Righi Tue, 30 May 2023 11:55:41 +0200 + +linux-unstable (6.4.0-3.3) mantic; urgency=medium + + * mantic/linux-unstable: 6.4.0-3.3 -proposed tracker (LP: #2021497) + + * Packaging resync (LP: #1786013) + - [Packaging] resync git-ubuntu-log + - [Packaging] resync getabis + + * support python < 3.9 with annotations (LP: #2020531) + - [Packaging] kconfig/annotations.py: support older way of merging dicts + + * generate linux-lib-rust only on amd64 (LP: #2020356) + - [Packaging] generate linux-lib-rust only on amd64 + + * Miscellaneous Ubuntu changes + - [Packaging] annotations: never drop configs that have notes different than + the parent + - [Config] drop CONFIG_SMBFS_COMMON from annotations + - [Packaging] perf: build without libtraceevent + + [ Upstream Kernel Changes ] + + * Rebase to v6.4-rc4 + + -- Andrea Righi Tue, 30 May 2023 08:38:10 +0200 + +linux-unstable (6.4.0-2.2) mantic; urgency=medium + + * mantic/linux-unstable: 6.4.0-2.2 -proposed tracker (LP: #2020330) + + * Computer with Intel Atom CPU will not boot with Kernel 6.2.0-20 + (LP: #2017444) + - [Config]: Disable CONFIG_INTEL_ATOMISP + + * Fix NVME storage with RAID ON disappeared under Dell factory WINPE + environment (LP: #2011768) + - SAUCE: PCI: vmd: Reset VMD config register between soft reboots + + * Miscellaneous Ubuntu changes + - [Packaging] Drop support of old config handling + - [Config] update annotations after rebase to v6.4-rc3 + + [ Upstream Kernel Changes ] + + * Rebase to v6.4-rc3 + + -- Andrea Righi Mon, 22 May 2023 11:22:14 +0200 + +linux-unstable (6.4.0-1.1) mantic; urgency=medium + + * mantic/linux-unstable: 6.4.0-1.1 -proposed tracker (LP: #2019965) + + * Packaging resync (LP: #1786013) + - [Packaging] update variants + - [Packaging] update helper scripts + + * Kernel 6.1 bumped the disk consumption on default images by 15% + (LP: #2015867) + - [Packaging] introduce a separate linux-lib-rust package + + * Miscellaneous Ubuntu changes + - [Config] enable CONFIG_BLK_DEV_UBLK on amd64 + - [Packaging] annotations: use python3 in the shebang + - SAUCE: blk-throttle: Fix io statistics for cgroup v1 + - [Packaging] move to v6.4 and rename to linux-unstable + - [Config] update annotations after rebase to v6.4-rc1 + - [Packaging] temporarily disable perf + - [Packaging] temporarily disable bpftool + - [Config] ppc64el: reduce CONFIG_ARCH_FORCE_MAX_ORDER from 9 to 8 + - SAUCE: perf: explicitly disable libtraceevent + + [ Upstream Kernel Changes ] + + * Rebase to v6.4-rc2 + + -- Andrea Righi Thu, 18 May 2023 07:34:09 +0200 + +linux-unstable (6.4.0-0.0) mantic; urgency=medium + + * Empty entry + + -- Andrea Righi Wed, 17 May 2023 15:29:25 +0200 + +linux-unstable (6.3.0-2.2) lunar; urgency=medium + + * lunar/linux-unstable: 6.3.0-2.2 -proposed tracker (LP: #2017788) + + * Miscellaneous Ubuntu changes + - [Packaging] move python3-dev to build-depends + + -- Andrea Righi Wed, 26 Apr 2023 21:52:12 +0200 + +linux-unstable (6.3.0-1.1) lunar; urgency=medium + + * lunar/linux-unstable: 6.3.0-1.1 -proposed tracker (LP: #2017776) + + * RFC: virtio and virtio-scsi should be built in (LP: #1685291) + - [Config] Mark CONFIG_SCSI_VIRTIO built-in + + * Debian autoreconstruct Fix restoration of execute permissions (LP: #2015498) + - [Debian] autoreconstruct - fix restoration of execute permissions + + * [SRU][Jammy] CONFIG_PCI_MESON is not enabled (LP: #2007745) + - [Config] arm64: Enable PCI_MESON module + + * vmd may fail to create sysfs entry while `pci_rescan_bus()` called in some + other drivers like wwan (LP: #2011389) + - SAUCE: PCI: vmd: guard device addition and removal + + * Lunar update: v6.2.9 upstream stable release (LP: #2016877) + - [Config] ppc64: updateconfigs following v6.2.9 stable updates + + * Lunar update: v6.2.8 upstream stable release (LP: #2016876) + - [Config] ppc64: updateconfigs following v6.2.8 stable updates + + * Miscellaneous Ubuntu changes + - [Packaging] Move final-checks script to debian/scripts/checks + - [Packaging] checks/final-checks: Honor 'do_skip_checks' + - [Packaging] Drop wireguard DKMS + - [Packaging] Remove update-version-dkms + - [Packaging] debian/rules: Add DKMS info to 'printenv' output + - [Packaging] ignore KBUILD_VERBOSE in arch-has-odm-enabled.sh + - SAUCE: shiftfs: support linux 6.3 + - [Packaging] move to v6.3 and rename to linux-unstable + - [Config] latency-related optimizations + - [Config] update annotations after rebase to v6.3 + - [Packaging] temporarily disable dkms + + [ Upstream Kernel Changes ] + + * Rebase to v6.3 + + -- Andrea Righi Wed, 26 Apr 2023 14:53:52 +0200 + +linux-unstable (6.3.0-0.0) lunar; urgency=medium + + * Empty entry + + -- Andrea Righi Tue, 25 Apr 2023 10:24:12 +0200 + +linux (6.2.0-21.21) lunar; urgency=medium + + * lunar/linux: 6.2.0-21.21 -proposed tracker (LP: #2016249) + + * efivarfs:efivarfs.sh in ubuntu_kernel_selftests crash L-6.2 ARM64 node + dazzle (rcu_preempt detected stalls) (LP: #2015741) + - efi/libstub: smbios: Use length member instead of record struct size + - arm64: efi: Use SMBIOS processor version to key off Ampere quirk + - efi/libstub: smbios: Drop unused 'recsize' parameter + + * Miscellaneous Ubuntu changes + - SAUCE: selftests/bpf: ignore pointer types check with clang + - SAUCE: selftests/bpf: avoid conflicting data types in profiler.inc.h + - [Packaging] get rid of unnecessary artifacts in linux-headers + + * Miscellaneous upstream changes + - Revert "UBUNTU: SAUCE: Revert "efi: random: refresh non-volatile random seed + when RNG is initialized"" + - Revert "UBUNTU: SAUCE: Revert "efi: random: fix NULL-deref when refreshing + seed"" + + -- Andrea Righi Fri, 14 Apr 2023 12:11:49 +0200 + +linux (6.2.0-20.20) lunar; urgency=medium + + * lunar/linux: 6.2.0-20.20 -proposed tracker (LP: #2015429) + + * Packaging resync (LP: #1786013) + - debian/dkms-versions -- update from kernel-versions (main/master) + + * FTBFS with different dkms or when makeflags are set (LP: #2015361) + - [Packaging] FTBFS with different dkms or when makeflags are set + + * expoline.o is packaged unconditionally for s390x (LP: #2013209) + - [Packaging] Copy expoline.o only when produced by the build + + * net:l2tp.sh failure with lunar:linux 6.2 (LP: #2013014) + - SAUCE: l2tp: generate correct module alias strings + + * Miscellaneous Ubuntu changes + - [Packaging] annotations: prevent duplicate include lines + + -- Andrea Righi Thu, 06 Apr 2023 08:33:14 +0200 + +linux (6.2.0-19.19) lunar; urgency=medium + + * lunar/linux: 6.2.0-19.19 -proposed tracker (LP: #2012488) + + * Neuter signing tarballs (LP: #2012776) + - [Packaging] neuter the signing tarball + + * LSM stacking and AppArmor refresh for 6.2 kernel (LP: #2012136) + - Revert "UBUNTU: [Config] define CONFIG_SECURITY_APPARMOR_RESTRICT_USERNS" + - Revert "UBUNTU: SAUCE: apparmor: add user namespace creation mediation" + - Revert "UBUNTU: SAUCE: apparmor: Add fine grained mediation of posix + mqueues" + - Revert "UBUNTU: SAUCE: Revert "apparmor: make __aa_path_perm() static"" + - Revert "UBUNTU: SAUCE: LSM: Specify which LSM to display (using struct cred + as input)" + - Revert "UBUNTU: SAUCE: apparmor: Fix build error, make sk parameter const" + - Revert "UBUNTU: SAUCE: LSM: Use lsmblob in smk_netlbl_mls()" + - Revert "UBUNTU: SAUCE: LSM: change ima_read_file() to use lsmblob" + - Revert "UBUNTU: SAUCE: apparmor: rename kzfree() to kfree_sensitive()" + - Revert "UBUNTU: SAUCE: AppArmor: Remove the exclusive flag" + - Revert "UBUNTU: SAUCE: LSM: Add /proc attr entry for full LSM context" + - Revert "UBUNTU: SAUCE: Audit: Fix incorrect static inline function + declration." + - Revert "UBUNTU: SAUCE: Audit: Fix for missing NULL check" + - Revert "UBUNTU: SAUCE: Audit: Add a new record for multiple object LSM + attributes" + - Revert "UBUNTU: SAUCE: Audit: Add new record for multiple process LSM + attributes" + - Revert "UBUNTU: SAUCE: NET: Store LSM netlabel data in a lsmblob" + - Revert "UBUNTU: SAUCE: LSM: security_secid_to_secctx in netlink netfilter" + - Revert "UBUNTU: SAUCE: LSM: Use lsmcontext in security_inode_getsecctx" + - Revert "UBUNTU: SAUCE: LSM: Use lsmcontext in security_secid_to_secctx" + - Revert "UBUNTU: SAUCE: LSM: Ensure the correct LSM context releaser" + - Revert "UBUNTU: SAUCE: LSM: Specify which LSM to display" + - Revert "UBUNTU: SAUCE: IMA: Change internal interfaces to use lsmblobs" + - Revert "UBUNTU: SAUCE: LSM: Use lsmblob in security_cred_getsecid" + - Revert "UBUNTU: SAUCE: LSM: Use lsmblob in security_inode_getsecid" + - Revert "UBUNTU: SAUCE: LSM: Use lsmblob in security_task_getsecid" + - Revert "UBUNTU: SAUCE: LSM: Use lsmblob in security_ipc_getsecid" + - Revert "UBUNTU: SAUCE: LSM: Use lsmblob in security_secid_to_secctx" + - Revert "UBUNTU: SAUCE: LSM: Use lsmblob in security_secctx_to_secid" + - Revert "UBUNTU: SAUCE: net: Prepare UDS for security module stacking" + - Revert "UBUNTU: SAUCE: LSM: Use lsmblob in security_kernel_act_as" + - Revert "UBUNTU: SAUCE: LSM: Use lsmblob in security_audit_rule_match" + - Revert "UBUNTU: SAUCE: LSM: Create and manage the lsmblob data structure." + - Revert "UBUNTU: SAUCE: LSM: Infrastructure management of the sock security" + - Revert "UBUNTU: SAUCE: apparmor: LSM stacking: switch from SK_CTX() to + aa_sock()" + - Revert "UBUNTU: SAUCE: apparmor: rename aa_sock() to aa_unix_sk()" + - Revert "UBUNTU: SAUCE: apparmor: disable showing the mode as part of a secid + to secctx" + - Revert "UBUNTU: SAUCE: apparmor: fix use after free in sk_peer_label" + - Revert "UBUNTU: SAUCE: apparmor: af_unix mediation" + - Revert "UBUNTU: SAUCE: apparmor: patch to provide compatibility with v2.x + net rules" + - Revert "UBUNTU: SAUCE: apparmor: add/use fns to print hash string hex value" + - SAUCE: apparmor: rename SK_CTX() to aa_sock and make it an inline fn + - SAUCE: apparmor: Add sysctls for additional controls of unpriv userns + restrictions + - SAUCE: Stacking v38: LSM: Identify modules by more than name + - SAUCE: Stacking v38: LSM: Add an LSM identifier for external use + - SAUCE: Stacking v38: LSM: Identify the process attributes for each module + - SAUCE: Stacking v38: LSM: Maintain a table of LSM attribute data + - SAUCE: Stacking v38: proc: Use lsmids instead of lsm names for attrs + - SAUCE: Stacking v38: integrity: disassociate ima_filter_rule from + security_audit_rule + - SAUCE: Stacking v38: LSM: Infrastructure management of the sock security + - SAUCE: Stacking v38: LSM: Add the lsmblob data structure. + - SAUCE: Stacking v38: LSM: provide lsm name and id slot mappings + - SAUCE: Stacking v38: IMA: avoid label collisions with stacked LSMs + - SAUCE: Stacking v38: LSM: Use lsmblob in security_audit_rule_match + - SAUCE: Stacking v38: LSM: Use lsmblob in security_kernel_act_as + - SAUCE: Stacking v38: LSM: Use lsmblob in security_secctx_to_secid + - SAUCE: Stacking v38: LSM: Use lsmblob in security_secid_to_secctx + - SAUCE: Stacking v38: LSM: Use lsmblob in security_ipc_getsecid + - SAUCE: Stacking v38: LSM: Use lsmblob in security_current_getsecid + - SAUCE: Stacking v38: LSM: Use lsmblob in security_inode_getsecid + - SAUCE: Stacking v38: LSM: Use lsmblob in security_cred_getsecid + - SAUCE: Stacking v38: LSM: Specify which LSM to display + - SAUCE: Stacking v38: LSM: Ensure the correct LSM context releaser + - SAUCE: Stacking v38: LSM: Use lsmcontext in security_secid_to_secctx + - SAUCE: Stacking v38: LSM: Use lsmcontext in security_inode_getsecctx + - SAUCE: Stacking v38: Use lsmcontext in security_dentry_init_security + - SAUCE: Stacking v38: LSM: security_secid_to_secctx in netlink netfilter + - SAUCE: Stacking v38: NET: Store LSM netlabel data in a lsmblob + - SAUCE: Stacking v38: binder: Pass LSM identifier for confirmation + - SAUCE: Stacking v38: LSM: security_secid_to_secctx module selection + - SAUCE: Stacking v38: Audit: Keep multiple LSM data in audit_names + - SAUCE: Stacking v38: Audit: Create audit_stamp structure + - SAUCE: Stacking v38: LSM: Add a function to report multiple LSMs + - SAUCE: Stacking v38: Audit: Allow multiple records in an audit_buffer + - SAUCE: Stacking v38: Audit: Add record for multiple task security contexts + - SAUCE: Stacking v38: audit: multiple subject lsm values for netlabel + - SAUCE: Stacking v38: Audit: Add record for multiple object contexts + - SAUCE: Stacking v38: netlabel: Use a struct lsmblob in audit data + - SAUCE: Stacking v38: LSM: Removed scaffolding function lsmcontext_init + - SAUCE: Stacking v38: AppArmor: Remove the exclusive flag + - SAUCE: apparmor: combine common_audit_data and apparmor_audit_data + - SAUCE: apparmor: setup slab cache for audit data + - SAUCE: apparmor: rename audit_data->label to audit_data->subj_label + - SAUCE: apparmor: pass cred through to audit info. + - SAUCE: apparmor: Improve debug print infrastructure + - SAUCE: apparmor: add the ability for profiles to have a learning cache + - SAUCE: apparmor: enable userspace upcall for mediation + - SAUCE: apparmor: cache buffers on percpu list if there is lock contention + - SAUCE: apparmor: fix policy_compat permission remap with extended + permissions + - SAUCE: apparmor: advertise availability of exended perms + - [Config] define CONFIG_SECURITY_APPARMOR_RESTRICT_USERNS + + * kinetic: apply new apparmor and LSM stacking patch set (LP: #1989983) // LSM + stacking and AppArmor refresh for 6.2 kernel (LP: #2012136) + - SAUCE: apparmor: add/use fns to print hash string hex value + - SAUCE: apparmor: patch to provide compatibility with v2.x net rules + - SAUCE: apparmor: add user namespace creation mediation + - SAUCE: apparmor: af_unix mediation + - SAUCE: apparmor: Add fine grained mediation of posix mqueues + + * devlink_port_split from ubuntu_kernel_selftests.net fails on hirsute + (KeyError: 'flavour') (LP: #1937133) + - selftests: net: devlink_port_split.py: skip test if no suitable device + available + + * NFS deathlock with last Kernel 5.4.0-144.161 and 5.15.0-67.74 (LP: #2009325) + - NFS: Correct timing for assigning access cache timestamp + + -- Andrea Righi Sat, 25 Mar 2023 07:37:30 +0100 + +linux (6.2.0-18.18) lunar; urgency=medium + + * lunar/linux: 6.2.0-18.18 -proposed tracker (LP: #2011750) + + * lunar/linux 6.2 fails to boot on arm64 (LP: #2011748) + - SAUCE: Revert "efi: random: fix NULL-deref when refreshing seed" + - SAUCE: Revert "efi: random: refresh non-volatile random seed when RNG is + initialized" + + -- Andrea Righi Wed, 15 Mar 2023 23:54:18 +0100 + +linux (6.2.0-17.17) lunar; urgency=medium + + * lunar/linux: 6.2.0-17.17 -proposed tracker (LP: #2011593) + + * lunar/linux 6.2 fails to boot on ppc64el (LP: #2011413) + - SAUCE: Revert "powerpc: remove STACK_FRAME_OVERHEAD" + - SAUCE: Revert "powerpc/pseries: hvcall stack frame overhead" + + * Speaker / Audio/Mic mute LED don't work on a HP platform (LP: #2011379) + - SAUCE: ALSA: hda/realtek: fix speaker, mute/micmute LEDs not work on a HP + platform + + * Some QHD panels fail to refresh when PSR2 enabled (LP: #2009014) + - SAUCE: drm/i915/psr: Use calculated io and fast wake lines + + * Lunar update: v6.2.6 upstream stable release (LP: #2011431) + - tpm: disable hwrng for fTPM on some AMD designs + - wifi: cfg80211: Partial revert "wifi: cfg80211: Fix use after free for wext" + - staging: rtl8192e: Remove function ..dm_check_ac_dc_power calling a script + - staging: rtl8192e: Remove call_usermodehelper starting RadioPower.sh + - Linux 6.2.6 + + * Lunar update: v6.2.5 upstream stable release (LP: #2011430) + - net/sched: Retire tcindex classifier + - auxdisplay: hd44780: Fix potential memory leak in hd44780_remove() + - fs/jfs: fix shift exponent db_agl2size negative + - driver: soc: xilinx: fix memory leak in xlnx_add_cb_for_notify_event() + - f2fs: don't rely on F2FS_MAP_* in f2fs_iomap_begin + - f2fs: fix to avoid potential deadlock + - objtool: Fix memory leak in create_static_call_sections() + - soc: mediatek: mtk-pm-domains: Allow mt8186 ADSP default power on + - soc: qcom: socinfo: Fix soc_id order + - memory: renesas-rpc-if: Split-off private data from struct rpcif + - memory: renesas-rpc-if: Move resource acquisition to .probe() + - soc: mediatek: mtk-svs: Enable the IRQ later + - pwm: sifive: Always let the first pwm_apply_state succeed + - pwm: stm32-lp: fix the check on arr and cmp registers update + - f2fs: introduce trace_f2fs_replace_atomic_write_block + - f2fs: clear atomic_write_task in f2fs_abort_atomic_write() + - soc: mediatek: mtk-svs: restore default voltages when svs_init02() fail + - soc: mediatek: mtk-svs: reset svs when svs_resume() fail + - soc: mediatek: mtk-svs: Use pm_runtime_resume_and_get() in svs_init01() + - f2fs: fix to do sanity check on extent cache correctly + - fs: f2fs: initialize fsdata in pagecache_write() + - f2fs: allow set compression option of files without blocks + - f2fs: fix to abort atomic write only during do_exist() + - um: vector: Fix memory leak in vector_config + - ubi: ensure that VID header offset + VID header size <= alloc, size + - ubifs: Fix build errors as symbol undefined + - ubifs: Fix memory leak in ubifs_sysfs_init() + - ubifs: Rectify space budget for ubifs_symlink() if symlink is encrypted + - ubifs: Rectify space budget for ubifs_xrename() + - ubifs: Fix wrong dirty space budget for dirty inode + - ubifs: do_rename: Fix wrong space budget when target inode's nlink > 1 + - ubifs: Reserve one leb for each journal head while doing budget + - ubi: Fix use-after-free when volume resizing failed + - ubi: Fix unreferenced object reported by kmemleak in ubi_resize_volume() + - ubifs: Fix memory leak in alloc_wbufs() + - ubi: Fix possible null-ptr-deref in ubi_free_volume() + - ubifs: Re-statistic cleaned znode count if commit failed + - ubifs: dirty_cow_znode: Fix memleak in error handling path + - ubifs: ubifs_writepage: Mark page dirty after writing inode failed + - ubifs: ubifs_releasepage: Remove ubifs_assert(0) to valid this process + - ubi: fastmap: Fix missed fm_anchor PEB in wear-leveling after disabling + fastmap + - ubi: Fix UAF wear-leveling entry in eraseblk_count_seq_show() + - ubi: ubi_wl_put_peb: Fix infinite loop when wear-leveling work failed + - f2fs: fix to handle F2FS_IOC_START_ATOMIC_REPLACE in f2fs_compat_ioctl() + - f2fs: fix to avoid potential memory corruption in __update_iostat_latency() + - f2fs: fix to update age extent correctly during truncation + - f2fs: fix to update age extent in f2fs_do_zero_range() + - soc: qcom: stats: Populate all subsystem debugfs files + - f2fs: introduce IS_F2FS_IPU_* macro + - f2fs: fix to set ipu policy + - ext4: use ext4_fc_tl_mem in fast-commit replay path + - ext4: don't show commit interval if it is zero + - netfilter: nf_tables: allow to fetch set elements when table has an owner + - x86: um: vdso: Add '%rcx' and '%r11' to the syscall clobber list + - um: virtio_uml: free command if adding to virtqueue failed + - um: virtio_uml: mark device as unregistered when breaking it + - um: virtio_uml: move device breaking into workqueue + - um: virt-pci: properly remove PCI device from bus + - f2fs: synchronize atomic write aborts + - watchdog: rzg2l_wdt: Issue a reset before we put the PM clocks + - watchdog: rzg2l_wdt: Handle TYPE-B reset for RZ/V2M + - watchdog: at91sam9_wdt: use devm_request_irq to avoid missing free_irq() in + error path + - watchdog: Fix kmemleak in watchdog_cdev_register + - watchdog: pcwd_usb: Fix attempting to access uninitialized memory + - watchdog: sbsa_wdog: Make sure the timeout programming is within the limits + - netfilter: ctnetlink: fix possible refcount leak in + ctnetlink_create_conntrack() + - netfilter: conntrack: fix rmmod double-free race + - netfilter: ip6t_rpfilter: Fix regression with VRF interfaces + - netfilter: ebtables: fix table blob use-after-free + - netfilter: xt_length: use skb len to match in length_mt6 + - netfilter: ctnetlink: make event listener tracking global + - netfilter: x_tables: fix percpu counter block leak on error path when + creating new netns + - swiotlb: mark swiotlb_memblock_alloc() as __init + - ptp: vclock: use mutex to fix "sleep on atomic" bug + - drm/i915: move a Kconfig symbol to unbreak the menu presentation + - ipv6: Add lwtunnel encap size of all siblings in nexthop calculation + - drm/i915/xelpmp: Consider GSI offset when doing MCR lookups + - octeontx2-pf: Recalculate UDP checksum for ptp 1-step sync packet + - net: sunhme: Fix region request + - sctp: add a refcnt in sctp_stream_priorities to avoid a nested loop + - octeontx2-pf: Use correct struct reference in test condition + - net: fix __dev_kfree_skb_any() vs drop monitor + - 9p/xen: fix version parsing + - 9p/xen: fix connection sequence + - 9p/rdma: unmap receive dma buffer in rdma_request()/post_recv() + - spi: tegra210-quad: Fix validate combined sequence + - mlx5: fix skb leak while fifo resync and push + - mlx5: fix possible ptp queue fifo use-after-free + - net/mlx5: ECPF, wait for VF pages only after disabling host PFs + - net/mlx5e: Verify flow_source cap before using it + - net/mlx5: Geneve, Fix handling of Geneve object id as error code + - ext4: fix incorrect options show of original mount_opt and extend mount_opt2 + - nfc: fix memory leak of se_io context in nfc_genl_se_io + - net/sched: transition act_pedit to rcu and percpu stats + - net/sched: act_pedit: fix action bind logic + - net/sched: act_mpls: fix action bind logic + - net/sched: act_sample: fix action bind logic + - net: dsa: seville: ignore mscc-miim read errors from Lynx PCS + - net: dsa: felix: fix internal MDIO controller resource length + - ARM: dts: aspeed: p10bmc: Update battery node name + - ARM: dts: spear320-hmi: correct STMPE GPIO compatible + - tcp: tcp_check_req() can be called from process context + - vc_screen: modify vcs_size() handling in vcs_read() + - spi: tegra210-quad: Fix iterator outside loop + - rtc: sun6i: Always export the internal oscillator + - genirq/ipi: Fix NULL pointer deref in irq_data_get_affinity_mask() + - scsi: ipr: Work around fortify-string warning + - scsi: mpi3mr: Fix an issue found by KASAN + - scsi: mpi3mr: Use number of bits to manage bitmap sizes + - rtc: allow rtc_read_alarm without read_alarm callback + - io_uring: fix size calculation when registering buf ring + - loop: loop_set_status_from_info() check before assignment + - ASoC: adau7118: don't disable regulators on device unbind + - ASoC: apple: mca: Fix final status read on SERDES reset + - ASoC: apple: mca: Fix SERDES reset sequence + - ASoC: apple: mca: Improve handling of unavailable DMA channels + - nvme: bring back auto-removal of deleted namespaces during sequential scan + - nvme-tcp: don't access released socket during error recovery + - nvme-fabrics: show well known discovery name + - ASoC: zl38060 add gpiolib dependency + - ASoC: mediatek: mt8195: add missing initialization + - thermal: intel: quark_dts: fix error pointer dereference + - thermal: intel: BXT_PMIC: select REGMAP instead of depending on it + - cpufreq: apple-soc: Fix an IS_ERR() vs NULL check + - tracing: Add NULL checks for buffer in ring_buffer_free_read_page() + - kernel/printk/index.c: fix memory leak with using debugfs_lookup() + - firmware/efi sysfb_efi: Add quirk for Lenovo IdeaPad Duet 3 + - bootconfig: Increase max nodes of bootconfig from 1024 to 8192 for DCC + support + - mfd: arizona: Use pm_runtime_resume_and_get() to prevent refcnt leak + - IB/hfi1: Update RMT size calculation + - iommu: Remove deferred attach check from __iommu_detach_device() + - PCI/ACPI: Account for _S0W of the target bridge in acpi_pci_bridge_d3() + - media: uvcvideo: Remove format descriptions + - media: uvcvideo: Handle cameras with invalid descriptors + - media: uvcvideo: Handle errors from calls to usb_string + - media: uvcvideo: Quirk for autosuspend in Logitech B910 and C910 + - media: uvcvideo: Silence memcpy() run-time false positive warnings + - USB: fix memory leak with using debugfs_lookup() + - cacheinfo: Fix shared_cpu_map to handle shared caches at different levels + - usb: fotg210: List different variants + - dt-bindings: usb: Add device id for Genesys Logic hub controller + - staging: emxx_udc: Add checks for dma_alloc_coherent() + - tty: fix out-of-bounds access in tty_driver_lookup_tty() + - tty: serial: fsl_lpuart: disable the CTS when send break signal + - serial: sc16is7xx: setup GPIO controller later in probe + - mei: bus-fixup:upon error print return values of send and receive + - tools/iio/iio_utils:fix memory leak + - bus: mhi: ep: Fix the debug message for MHI_PKT_TYPE_RESET_CHAN_CMD cmd + - iio: accel: mma9551_core: Prevent uninitialized variable in + mma9551_read_status_word() + - iio: accel: mma9551_core: Prevent uninitialized variable in + mma9551_read_config_word() + - media: uvcvideo: Add GUID for BGRA/X 8:8:8:8 + - soundwire: bus_type: Avoid lockdep assert in sdw_drv_probe() + - PCI/portdrv: Prevent LS7A Bus Master clearing on shutdown + - PCI: loongson: Prevent LS7A MRRS increases + - staging: pi433: fix memory leak with using debugfs_lookup() + - USB: dwc3: fix memory leak with using debugfs_lookup() + - USB: chipidea: fix memory leak with using debugfs_lookup() + - USB: ULPI: fix memory leak with using debugfs_lookup() + - USB: uhci: fix memory leak with using debugfs_lookup() + - USB: sl811: fix memory leak with using debugfs_lookup() + - USB: fotg210: fix memory leak with using debugfs_lookup() + - USB: isp116x: fix memory leak with using debugfs_lookup() + - USB: isp1362: fix memory leak with using debugfs_lookup() + - USB: gadget: gr_udc: fix memory leak with using debugfs_lookup() + - USB: gadget: bcm63xx_udc: fix memory leak with using debugfs_lookup() + - USB: gadget: lpc32xx_udc: fix memory leak with using debugfs_lookup() + - USB: gadget: pxa25x_udc: fix memory leak with using debugfs_lookup() + - USB: gadget: pxa27x_udc: fix memory leak with using debugfs_lookup() + - usb: host: xhci: mvebu: Iterate over array indexes instead of using pointer + math + - USB: ene_usb6250: Allocate enough memory for full object + - usb: uvc: Enumerate valid values for color matching + - usb: gadget: uvc: Make bSourceID read/write + - PCI: Align extra resources for hotplug bridges properly + - PCI: Take other bus devices into account when distributing resources + - PCI: Distribute available resources for root buses, too + - tty: pcn_uart: fix memory leak with using debugfs_lookup() + - misc: vmw_balloon: fix memory leak with using debugfs_lookup() + - drivers: base: component: fix memory leak with using debugfs_lookup() + - drivers: base: dd: fix memory leak with using debugfs_lookup() + - kernel/fail_function: fix memory leak with using debugfs_lookup() + - PCI: loongson: Add more devices that need MRRS quirk + - PCI: Add ACS quirk for Wangxun NICs + - PCI: pciehp: Add Qualcomm quirk for Command Completed erratum + - phy: rockchip-typec: Fix unsigned comparison with less than zero + - RDMA/cma: Distinguish between sockaddr_in and sockaddr_in6 by size + - soundwire: cadence: Remove wasted space in response_buf + - soundwire: cadence: Drain the RX FIFO after an IO timeout + - eth: fealnx: bring back this old driver + - net: tls: avoid hanging tasks on the tx_lock + - x86/resctl: fix scheduler confusion with 'current' + - vDPA/ifcvf: decouple hw features manipulators from the adapter + - vDPA/ifcvf: decouple config space ops from the adapter + - vDPA/ifcvf: alloc the mgmt_dev before the adapter + - vDPA/ifcvf: decouple vq IRQ releasers from the adapter + - vDPA/ifcvf: decouple config IRQ releaser from the adapter + - vDPA/ifcvf: decouple vq irq requester from the adapter + - vDPA/ifcvf: decouple config/dev IRQ requester and vectors allocator from the + adapter + - vDPA/ifcvf: ifcvf_request_irq works on ifcvf_hw + - vDPA/ifcvf: manage ifcvf_hw in the mgmt_dev + - vDPA/ifcvf: allocate the adapter in dev_add() + - drm/display/dp_mst: Add drm_atomic_get_old_mst_topology_state() + - drm/display/dp_mst: Fix down/up message handling after sink disconnect + - drm/display/dp_mst: Fix down message handling after a packet reception error + - drm/display/dp_mst: Fix payload addition on a disconnected sink + - drm/i915/dp_mst: Add the MST topology state for modesetted CRTCs + - drm/display/dp_mst: Handle old/new payload states in drm_dp_remove_payload() + - drm/i915/dp_mst: Fix payload removal during output disabling + - drm/i915: Fix system suspend without fbdev being initialized + - media: uvcvideo: Fix race condition with usb_kill_urb + - arm64: efi: Make efi_rt_lock a raw_spinlock + - usb: gadget: uvc: fix missing mutex_unlock() if kstrtou8() fails + - Linux 6.2.5 + + * Lunar update: v6.2.4 upstream stable release (LP: #2011428) + - Revert "blk-cgroup: synchronize pd_free_fn() from blkg_free_workfn() and + blkcg_deactivate_policy()" + - Revert "blk-cgroup: dropping parent refcount after pd_free_fn() is done" + - Linux 6.2.4 + + * Lunar update: v6.2.3 upstream stable release (LP: #2011425) + - HID: asus: use spinlock to protect concurrent accesses + - HID: asus: use spinlock to safely schedule workers + - iommu/amd: Fix error handling for pdev_pri_ats_enable() + - iommu/amd: Skip attach device domain is same as new domain + - iommu/amd: Improve page fault error reporting + - iommu: Attach device group to old domain in error path + - powerpc/mm: Rearrange if-else block to avoid clang warning + - ata: ahci: Revert "ata: ahci: Add Tiger Lake UP{3,4} AHCI controller" + - ARM: OMAP2+: Fix memory leak in realtime_counter_init() + - arm64: dts: qcom: qcs404: use symbol names for PCIe resets + - arm64: dts: qcom: msm8996-tone: Fix USB taking 6 minutes to wake up + - arm64: dts: qcom: sm6115: Fix UFS node + - arm64: dts: qcom: sm6115: Provide xo clk to rpmcc + - arm64: dts: qcom: sm8150-kumano: Panel framebuffer is 2.5k instead of 4k + - arm64: dts: qcom: pmi8950: Correct rev_1250v channel label to mv + - arm64: dts: qcom: sm6350: Fix up the ramoops node + - arm64: dts: qcom: sdm670-google-sargo: keep pm660 ldo8 on + - arm64: dts: qcom: Re-enable resin on MSM8998 and SDM845 boards + - arm64: dts: qcom: sm8350-sagami: Configure SLG51000 PMIC on PDX215 + - arm64: dts: qcom: sm8350-sagami: Add GPIO line names for PMIC GPIOs + - arm64: dts: qcom: sm8350-sagami: Rectify GPIO keys + - arm64: dts: qcom: sm6350-lena: Flatten gpio-keys pinctrl state + - arm64: dts: qcom: sm6125: Reorder HSUSB PHY clocks to match bindings + - arm64: dts: qcom: sm6125-seine: Clean up gpio-keys (volume down) + - arm64: dts: imx8m: Align SoC unique ID node unit address + - ARM: zynq: Fix refcount leak in zynq_early_slcr_init + - fs: dlm: fix return value check in dlm_memory_init() + - arm64: dts: mediatek: mt8195: Add power domain to U3PHY1 T-PHY + - arm64: dts: mediatek: mt8183: Fix systimer 13 MHz clock description + - arm64: dts: mediatek: mt8192: Fix systimer 13 MHz clock description + - arm64: dts: mediatek: mt8195: Fix systimer 13 MHz clock description + - arm64: dts: mediatek: mt8186: Fix systimer 13 MHz clock description + - arm64: dts: qcom: sdm845-db845c: fix audio codec interrupt pin name + - arm64: dts: qcom: sdm845-xiaomi-beryllium: fix audio codec interrupt pin + name + - x86/acpi/boot: Do not register processors that cannot be onlined for x2APIC + - arm64: dts: qcom: sc7180: correct SPMI bus address cells + - arm64: dts: qcom: sc7280: correct SPMI bus address cells + - arm64: dts: qcom: sc8280xp: correct SPMI bus address cells + - arm64: dts: qcom: sm8450: correct Soundwire wakeup interrupt name + - arm64: dts: qcom: sdm845: make DP node follow the schema + - arm64: dts: qcom: msm8996-oneplus-common: drop vdda-supply from DSI PHY + - arm64: dts: qcom: sc8280xp: Vote for CX in USB controllers + - arm64: dts: meson-gxl: jethub-j80: Fix WiFi MAC address node + - arm64: dts: meson-gxl: jethub-j80: Fix Bluetooth MAC node name + - arm64: dts: meson-axg: jethub-j1xx: Fix MAC address node names + - arm64: dts: meson-gx: Fix Ethernet MAC address unit name + - arm64: dts: meson-g12a: Fix internal Ethernet PHY unit name + - arm64: dts: meson-gx: Fix the SCPI DVFS node name and unit address + - cpuidle, intel_idle: Fix CPUIDLE_FLAG_IRQ_ENABLE *again* + - arm64: dts: ti: k3-am62-main: Fix clocks for McSPI + - arm64: tegra: Fix duplicate regulator on Jetson TX1 + - arm64: dts: qcom: msm8992-bullhead: Fix cont_splash_mem size + - arm64: dts: qcom: msm8992-bullhead: Disable dfps_data_mem + - arm64: dts: qcom: msm8956: use SoC-specific compat for tsens + - arm64: dts: qcom: ipq8074: correct USB3 QMP PHY-s clock output names + - arm64: dts: qcom: ipq8074: fix Gen2 PCIe QMP PHY + - arm64: dts: qcom: ipq8074: fix Gen3 PCIe QMP PHY + - arm64: dts: qcom: ipq8074: correct Gen2 PCIe ranges + - arm64: dts: qcom: ipq8074: fix Gen3 PCIe node + - arm64: dts: qcom: ipq8074: correct PCIe QMP PHY output clock names + - arm64: dts: meson: remove CPU opps below 1GHz for G12A boards + - ARM: OMAP1: call platform_device_put() in error case in + omap1_dm_timer_init() + - arm64: dts: mediatek: mt8192: Mark scp_adsp clock as broken + - ARM: bcm2835_defconfig: Enable the framebuffer + - ARM: s3c: fix s3c64xx_set_timer_source prototype + - arm64: dts: ti: k3-j7200: Fix wakeup pinmux range + - ARM: dts: exynos: correct wr-active property in Exynos3250 Rinato + - ARM: imx: Call ida_simple_remove() for ida_simple_get + - arm64: dts: amlogic: meson-gx: fix SCPI clock dvfs node name + - arm64: dts: amlogic: meson-axg: fix SCPI clock dvfs node name + - arm64: dts: amlogic: meson-gx: add missing SCPI sensors compatible + - arm64: dts: amlogic: meson-axg-jethome-jethub-j1xx: fix supply name of USB + controller node + - arm64: dts: amlogic: meson-gxl-s905d-sml5442tw: drop invalid clock-names + property + - arm64: dts: amlogic: meson-gx: add missing unit address to rng node name + - arm64: dts: amlogic: meson-gxl-s905w-jethome-jethub-j80: fix invalid rtc + node name + - arm64: dts: amlogic: meson-axg-jethome-jethub-j1xx: fix invalid rtc node + name + - arm64: dts: amlogic: meson-gxl: add missing unit address to eth-phy-mux node + name + - arm64: dts: amlogic: meson-gx-libretech-pc: fix update button name + - arm64: dts: amlogic: meson-sm1-bananapi-m5: fix adc keys node names + - arm64: dts: amlogic: meson-gxl-s905d-phicomm-n1: fix led node name + - arm64: dts: amlogic: meson-gxbb-kii-pro: fix led node name + - arm64: dts: amlogic: meson-g12b-odroid-go-ultra: fix rk818 pmic properties + - arm64: dts: amlogic: meson-sm1-odroid-hc4: fix active fan thermal trip + - locking/rwsem: Disable preemption in all down_read*() and up_read() code + paths + - arm64: tegra: Mark host1x as dma-coherent on Tegra194/234 + - arm64: dts: renesas: beacon-renesom: Fix gpio expander reference + - arm64: dts: meson: radxa-zero: allow usb otg mode + - arm64: dts: meson: bananapi-m5: switch VDDIO_C pin to OPEN_DRAIN + - ARM: dts: sun8i: nanopi-duo2: Fix regulator GPIO reference + - ublk_drv: remove nr_aborted_queues from ublk_device + - ublk_drv: don't probe partitions if the ubq daemon isn't trusted + - ARM: dts: imx7s: correct iomuxc gpr mux controller cells + - sbitmap: remove redundant check in __sbitmap_queue_get_batch + - sbitmap: correct wake_batch recalculation to avoid potential IO hung + - arm64: dts: mt8195: Fix CPU map for single-cluster SoC + - arm64: dts: mt8192: Fix CPU map for single-cluster SoC + - arm64: dts: mt8186: Fix CPU map for single-cluster SoC + - arm64: dts: mediatek: mt7622: Add missing pwm-cells to pwm node + - arm64: dts: mediatek: mt8186: Fix watchdog compatible + - arm64: dts: mediatek: mt8195: Fix watchdog compatible + - arm64: dts: mediatek: mt7986: Fix watchdog compatible + - ARM: dts: stm32: Update part number NVMEM description on stm32mp131 + - arm64: dts: qcom: sm8450-nagara: Correct firmware paths + - blk-mq: avoid sleep in blk_mq_alloc_request_hctx + - blk-mq: remove stale comment for blk_mq_sched_mark_restart_hctx + - blk-mq: wait on correct sbitmap_queue in blk_mq_mark_tag_wait + - blk-mq: Fix potential io hung for shared sbitmap per tagset + - blk-mq: correct stale comment of .get_budget + - arm64: dts: qcom: msm8996: support using GPLL0 as kryocc input + - arm64: dts: qcom: msm8996 switch from RPM_SMD_BB_CLK1 to RPM_SMD_XO_CLK_SRC + - arm64: dts: qcom: sm8350: drop incorrect cells from serial + - arm64: dts: qcom: sm8450: drop incorrect cells from serial + - arm64: dts: qcom: msm8992-lg-bullhead: Correct memory overlaps with the SMEM + and MPSS memory regions + - arm64: dts: qcom: msm8953: correct TLMM gpio-ranges + - arm64: dts: qcom: sm6115: correct TLMM gpio-ranges + - arm64: dts: qcom: msm8992-lg-bullhead: Enable regulators + - s390/dasd: Fix potential memleak in dasd_eckd_init() + - io_uring,audit: don't log IORING_OP_MADVISE + - sched/rt: pick_next_rt_entity(): check list_entry + - perf/x86/intel/ds: Fix the conversion from TSC to perf time + - x86/perf/zhaoxin: Add stepping check for ZXC + - KEYS: asymmetric: Fix ECDSA use via keyctl uapi + - block: ublk: check IO buffer based on flag need_get_data + - arm64: dts: qcom: pmk8350: Use the correct PON compatible + - erofs: relinquish volume with mutex held + - block: sync mixed merged request's failfast with 1st bio's + - block: Fix io statistics for cgroup in throttle path + - block: bio-integrity: Copy flags when bio_integrity_payload is cloned + - block: use proper return value from bio_failfast() + - wifi: mt76: mt7915: add missing of_node_put() + - wifi: mt76: mt7921s: fix slab-out-of-bounds access in sdio host + - wifi: mt76: mt7915: fix mt7915_rate_txpower_get() resource leaks + - wifi: mt76: mt7996: fix insecure data handling of mt7996_mcu_ie_countdown() + - wifi: mt76: mt7996: fix insecure data handling of + mt7996_mcu_rx_radar_detected() + - wifi: mt76: mt7996: fix integer handling issue of mt7996_rf_regval_set() + - wifi: mt76: mt7915: check return value before accessing free_block_num + - wifi: mt76: mt7996: check return value before accessing free_block_num + - wifi: mt76: mt7915: drop always true condition of __mt7915_reg_addr() + - wifi: mt76: mt7996: drop always true condition of __mt7996_reg_addr() + - wifi: mt76: mt7996: fix endianness warning in mt7996_mcu_sta_he_tlv + - wifi: mt76: mt76x0: fix oob access in mt76x0_phy_get_target_power + - wifi: mt76: mt7996: fix unintended sign extension of mt7996_hw_queue_read() + - wifi: mt76: mt7915: fix unintended sign extension of mt7915_hw_queue_read() + - wifi: mt76: fix coverity uninit_use_in_call in + mt76_connac2_reverse_frag0_hdr_trans() + - wifi: mt76: mt7921: resource leaks at mt7921_check_offload_capability() + - wifi: rsi: Fix memory leak in rsi_coex_attach() + - wifi: rtlwifi: rtl8821ae: don't call kfree_skb() under spin_lock_irqsave() + - wifi: rtlwifi: rtl8188ee: don't call kfree_skb() under spin_lock_irqsave() + - wifi: rtlwifi: rtl8723be: don't call kfree_skb() under spin_lock_irqsave() + - wifi: iwlegacy: common: don't call dev_kfree_skb() under spin_lock_irqsave() + - wifi: libertas: fix memory leak in lbs_init_adapter() + - wifi: rtl8xxxu: Fix assignment to bit field priv->pi_enabled + - wifi: rtl8xxxu: Fix assignment to bit field priv->cck_agc_report_type + - wifi: rtl8xxxu: don't call dev_kfree_skb() under spin_lock_irqsave() + - wifi: rtw89: 8852c: rfk: correct DACK setting + - wifi: rtw89: 8852c: rfk: correct DPK settings + - wifi: rtlwifi: Fix global-out-of-bounds bug in + _rtl8812ae_phy_set_txpower_limit() + - libbpf: Fix single-line struct definition output in btf_dump + - libbpf: Fix btf__align_of() by taking into account field offsets + - wifi: ipw2x00: don't call dev_kfree_skb() under spin_lock_irqsave() + - wifi: ipw2200: fix memory leak in ipw_wdev_init() + - wifi: wilc1000: fix potential memory leak in wilc_mac_xmit() + - wifi: wilc1000: add missing unregister_netdev() in wilc_netdev_ifc_init() + - wifi: brcmfmac: fix potential memory leak in brcmf_netdev_start_xmit() + - wifi: brcmfmac: unmap dma buffer in brcmf_msgbuf_alloc_pktid() + - wifi: libertas_tf: don't call kfree_skb() under spin_lock_irqsave() + - wifi: libertas: if_usb: don't call kfree_skb() under spin_lock_irqsave() + - wifi: libertas: main: don't call kfree_skb() under spin_lock_irqsave() + - wifi: libertas: cmdresp: don't call kfree_skb() under spin_lock_irqsave() + - wifi: wl3501_cs: don't call kfree_skb() under spin_lock_irqsave() + - libbpf: Fix invalid return address register in s390 + - crypto: x86/ghash - fix unaligned access in ghash_setkey() + - crypto: ux500 - update debug config after ux500 cryp driver removal + - ACPICA: Drop port I/O validation for some regions + - genirq: Fix the return type of kstat_cpu_irqs_sum() + - rcu-tasks: Improve comments explaining tasks_rcu_exit_srcu purpose + - rcu-tasks: Remove preemption disablement around srcu_read_[un]lock() calls + - rcu-tasks: Fix synchronize_rcu_tasks() VS zap_pid_ns_processes() + - lib/mpi: Fix buffer overrun when SG is too long + - crypto: ccp - Avoid page allocation failure warning for SEV_GET_ID2 + - platform/chrome: cros_ec_typec: Update port DP VDO + - ACPICA: nsrepair: handle cases without a return value correctly + - libbpf: Fix map creation flags sanitization + - bpf_doc: Fix build error with older python versions + - selftests/xsk: print correct payload for packet dump + - selftests/xsk: print correct error codes when exiting + - arm64/cpufeature: Fix field sign for DIT hwcap detection + - arm64/sysreg: Fix errors in 32 bit enumeration values + - kselftest/arm64: Fix syscall-abi for systems without 128 bit SME + - workqueue: Protects wq_unbound_cpumask with wq_pool_attach_mutex + - s390/early: fix sclp_early_sccb variable lifetime + - s390/vfio-ap: fix an error handling path in vfio_ap_mdev_probe_queue() + - x86/signal: Fix the value returned by strict_sas_size() + - thermal/drivers/tsens: Drop msm8976-specific defines + - thermal/drivers/tsens: Sort out msm8976 vs msm8956 data + - thermal/drivers/tsens: fix slope values for msm8939 + - thermal/drivers/tsens: limit num_sensors to 9 for msm8939 + - wifi: rtw89: fix potential leak in rtw89_append_probe_req_ie() + - wifi: rtw89: Add missing check for alloc_workqueue + - wifi: rtl8xxxu: Fix memory leaks with RTL8723BU, RTL8192EU + - wifi: orinoco: check return value of hermes_write_wordrec() + - wifi: rtw88: Use rtw_iterate_vifs() for rtw_vif_watch_dog_iter() + - wifi: rtw88: Use non-atomic sta iterator in rtw_ra_mask_info_update() + - thermal/drivers/imx_sc_thermal: Fix the loop condition + - wifi: ath9k: htc_hst: free skb in ath9k_htc_rx_msg() if there is no callback + function + - wifi: ath9k: hif_usb: clean up skbs if ath9k_hif_usb_rx_stream() fails + - wifi: ath9k: Fix potential stack-out-of-bounds write in + ath9k_wmi_rsp_callback() + - wifi: ath11k: Fix memory leak in ath11k_peer_rx_frag_setup + - wifi: cfg80211: Fix extended KCK key length check in + nl80211_set_rekey_data() + - ACPI: battery: Fix missing NUL-termination with large strings + - selftests/bpf: Fix build errors if CONFIG_NF_CONNTRACK=m + - crypto: ccp - Failure on re-initialization due to duplicate sysfs filename + - crypto: essiv - Handle EBUSY correctly + - crypto: seqiv - Handle EBUSY correctly + - powercap: fix possible name leak in powercap_register_zone() + - bpf: Fix state pruning for STACK_DYNPTR stack slots + - bpf: Fix missing var_off check for ARG_PTR_TO_DYNPTR + - bpf: Fix partial dynptr stack slot reads/writes + - x86/microcode: Add a parameter to microcode_check() to store CPU + capabilities + - x86/microcode: Check CPU capabilities after late microcode update correctly + - x86/microcode: Adjust late loading result reporting message + - net: ethernet: ti: am65-cpsw/cpts: Fix CPTS release action + - selftests/bpf: Fix vmtest static compilation error + - crypto: xts - Handle EBUSY correctly + - leds: led-class: Add missing put_device() to led_put() + - drm/nouveau/disp: Fix nvif_outp_acquire_dp() argument size + - s390/bpf: Add expoline to tail calls + - wifi: iwlwifi: mei: fix compilation errors in rfkill() + - kselftest/arm64: Fix enumeration of systems without 128 bit SME + - can: rcar_canfd: Fix R-Car V3U CAN mode selection + - can: rcar_canfd: Fix R-Car V3U GAFLCFG field accesses + - selftests/bpf: Initialize tc in xdp_synproxy + - crypto: ccp - Flush the SEV-ES TMR memory before giving it to firmware + - bpftool: profile online CPUs instead of possible + - wifi: mt76: mt7921: fix deadlock in mt7921_abort_roc + - wifi: mt76: mt7915: call mt7915_mcu_set_thermal_throttling() only after + init_work + - wifi: mt76: mt7915: rework mt7915_mcu_set_thermal_throttling + - wifi: mt76: mt7915: rework mt7915_thermal_temp_store() + - wifi: mt76: mt7921: fix channel switch fail in monitor mode + - wifi: mt76: mt7996: fix chainmask calculation in mt7996_set_antenna() + - wifi: mt76: mt7996: update register for CFEND_RATE + - wifi: mt76: connac: fix POWER_CTRL command name typo + - wifi: mt76: mt7921: fix invalid remain_on_channel duration + - wifi: mt76: mt7915: fix memory leak in mt7915_mcu_exit + - wifi: mt76: mt7996: fix memory leak in mt7996_mcu_exit + - wifi: mt76: dma: fix memory leak running mt76_dma_tx_cleanup + - wifi: mt76: fix switch default case in mt7996_reverse_frag0_hdr_trans + - wifi: mt76: mt7915: fix WED TxS reporting + - wifi: mt76: add memory barrier to SDIO queue kick + - wifi: mt76: mt7996: rely on mt76_connac2_mac_tx_rate_val + - net/mlx5: Enhance debug print in page allocation failure + - irqchip: Fix refcount leak in platform_irqchip_probe + - irqchip/alpine-msi: Fix refcount leak in alpine_msix_init_domains + - irqchip/irq-mvebu-gicp: Fix refcount leak in mvebu_gicp_probe + - irqchip/ti-sci: Fix refcount leak in ti_sci_intr_irq_domain_probe + - s390/mem_detect: fix detect_memory() error handling + - s390/vmem: fix empty page tables cleanup under KASAN + - s390/boot: cleanup decompressor header files + - s390/mem_detect: rely on diag260() if sclp_early_get_memsize() fails + - s390/boot: fix mem_detect extended area allocation + - net: add sock_init_data_uid() + - tun: tun_chr_open(): correctly initialize socket uid + - tap: tap_open(): correctly initialize socket uid + - rxrpc: Fix overwaking on call poking + - OPP: fix error checking in opp_migrate_dentry() + - cpufreq: davinci: Fix clk use after free + - Bluetooth: hci_conn: Refactor hci_bind_bis() since it always succeeds + - Bluetooth: L2CAP: Fix potential user-after-free + - Bluetooth: hci_qca: get wakeup status from serdev device handle + - net: ipa: generic command param fix + - s390: vfio-ap: tighten the NIB validity check + - s390/ap: fix status returned by ap_aqic() + - s390/ap: fix status returned by ap_qact() + - libbpf: Fix alen calculation in libbpf_nla_dump_errormsg() + - xen/grant-dma-iommu: Implement a dummy probe_device() callback + - rds: rds_rm_zerocopy_callback() correct order for list_add_tail() + - crypto: rsa-pkcs1pad - Use akcipher_request_complete + - m68k: /proc/hardware should depend on PROC_FS + - RISC-V: time: initialize hrtimer based broadcast clock event device + - clocksource/drivers/riscv: Patch riscv_clock_next_event() jump before first + use + - wifi: iwl3945: Add missing check for create_singlethread_workqueue + - wifi: iwl4965: Add missing check for create_singlethread_workqueue() + - wifi: brcmfmac: Rename Cypress 89459 to BCM4355 + - wifi: brcmfmac: pcie: Add IDs/properties for BCM4355 + - wifi: brcmfmac: pcie: Add IDs/properties for BCM4377 + - wifi: brcmfmac: pcie: Perform correct BCM4364 firmware selection + - wifi: mwifiex: fix loop iterator in mwifiex_update_ampdu_txwinsize() + - wifi: rtw89: fix parsing offset for MCC C2H + - selftests/bpf: Fix out-of-srctree build + - ACPI: resource: Add IRQ overrides for MAINGEAR Vector Pro 2 models + - ACPI: resource: Do IRQ override on all TongFang GMxRGxx + - crypto: octeontx2 - Fix objects shared between several modules + - crypto: crypto4xx - Call dma_unmap_page when done + - vfio/ccw: remove WARN_ON during shutdown + - wifi: mac80211: move color collision detection report in a delayed work + - wifi: mac80211: make rate u32 in sta_set_rate_info_rx() + - wifi: mac80211: fix non-MLO station association + - wifi: mac80211: Don't translate MLD addresses for multicast + - wifi: mac80211: avoid u32_encode_bits() warning + - wifi: mac80211: fix off-by-one link setting + - tools/lib/thermal: Fix thermal_sampling_exit() + - thermal/drivers/hisi: Drop second sensor hi3660 + - selftests/bpf: Fix map_kptr test. + - wifi: mac80211: pass 'sta' to ieee80211_rx_data_set_sta() + - bpf: Zeroing allocated object from slab in bpf memory allocator + - selftests/bpf: Fix xdp_do_redirect on s390x + - can: esd_usb: Move mislocated storage of SJA1000_ECC_SEG bits in case of a + bus error + - can: esd_usb: Make use of can_change_state() and relocate checking skb for + NULL + - xsk: check IFF_UP earlier in Tx path + - LoongArch, bpf: Use 4 instructions for function address in JIT + - bpf: Fix global subprog context argument resolution logic + - irqchip/irq-brcmstb-l2: Set IRQ_LEVEL for level triggered interrupts + - irqchip/irq-bcm7120-l2: Set IRQ_LEVEL for level triggered interrupts + - net/smc: fix potential panic dues to unprotected smc_llc_srv_add_link() + - net/smc: fix application data exception + - selftests/net: Interpret UDP_GRO cmsg data as an int value + - l2tp: Avoid possible recursive deadlock in l2tp_tunnel_register() + - net: bcmgenet: fix MoCA LED control + - net: lan966x: Fix possible deadlock inside PTP + - net/mlx4_en: Introduce flexible array to silence overflow warning + - net/mlx5e: Align IPsec ASO result memory to be as required by hardware + - selftest: fib_tests: Always cleanup before exit + - sefltests: netdevsim: wait for devlink instance after netns removal + - drm: Fix potential null-ptr-deref due to drmm_mode_config_init() + - drm/fourcc: Add missing big-endian XRGB1555 and RGB565 formats + - drm/bridge: ti-sn65dsi83: Fix delay after reset deassert to match spec + - drm: mxsfb: DRM_IMX_LCDIF should depend on ARCH_MXC + - drm: mxsfb: DRM_MXSFB should depend on ARCH_MXS || ARCH_MXC + - drm/bridge: megachips: Fix error handling in i2c_register_driver() + - drm/vkms: Fix memory leak in vkms_init() + - drm/vkms: Fix null-ptr-deref in vkms_release() + - drm/modes: Use strscpy() to copy command-line mode name + - drm/vc4: dpi: Fix format mapping for RGB565 + - drm/bridge: it6505: Guard bridge power in IRQ handler + - drm: tidss: Fix pixel format definition + - gpu: ipu-v3: common: Add of_node_put() for reference returned by + of_graph_get_port_by_id() + - drm/ast: Init iosys_map pointer as I/O memory for damage handling + - drm/vc4: drop all currently held locks if deadlock happens + - hwmon: (ftsteutates) Fix scaling of measurements + - drm/msm/dpu: check for null return of devm_kzalloc() in dpu_writeback_init() + - drm/msm/hdmi: Add missing check for alloc_ordered_workqueue + - pinctrl: qcom: pinctrl-msm8976: Correct function names for wcss pins + - pinctrl: stm32: Fix refcount leak in stm32_pctrl_get_irq_domain + - pinctrl: rockchip: Fix refcount leak in rockchip_pinctrl_parse_groups + - drm/vc4: hvs: Configure the HVS COB allocations + - drm/vc4: hvs: Set AXI panic modes + - drm/vc4: hvs: SCALER_DISPBKGND_AUTOHS is only valid on HVS4 + - drm/vc4: hvs: Correct interrupt masking bit assignment for HVS5 + - drm/vc4: hvs: Fix colour order for xRGB1555 on HVS5 + - drm/vc4: hdmi: Correct interlaced timings again + - drm/msm: clean event_thread->worker in case of an error + - drm/panel-edp: fix name for IVO product id 854b + - scsi: qla2xxx: Fix exchange oversubscription + - scsi: qla2xxx: Fix exchange oversubscription for management commands + - scsi: qla2xxx: edif: Fix clang warning + - ASoC: fsl_sai: initialize is_dsp_mode flag + - drm/bridge: tc358767: Set default CLRSIPO count + - drm/msm/adreno: Fix null ptr access in adreno_gpu_cleanup() + - ALSA: hda/ca0132: minor fix for allocation size + - drm/amdgpu: Use the sched from entity for amdgpu_cs trace + - drm/msm/gem: Add check for kmalloc + - drm/msm/dpu: Disallow unallocated resources to be returned + - drm/bridge: lt9611: fix sleep mode setup + - drm/bridge: lt9611: fix HPD reenablement + - drm/bridge: lt9611: fix polarity programming + - drm/bridge: lt9611: fix programming of video modes + - drm/bridge: lt9611: fix clock calculation + - drm/bridge: lt9611: pass a pointer to the of node + - regulator: tps65219: use IS_ERR() to detect an error pointer + - drm/mipi-dsi: Fix byte order of 16-bit DCS set/get brightness + - drm: exynos: dsi: Fix MIPI_DSI*_NO_* mode flags + - drm/msm/dsi: Allow 2 CTRLs on v2.5.0 + - scsi: ufs: exynos: Fix DMA alignment for PAGE_SIZE != 4096 + - drm/msm/dpu: sc7180: add missing WB2 clock control + - drm/msm: use strscpy instead of strncpy + - drm/msm/dpu: Add check for cstate + - drm/msm/dpu: Add check for pstates + - drm/msm/mdp5: Add check for kzalloc + - habanalabs: bugs fixes in timestamps buff alloc + - pinctrl: bcm2835: Remove of_node_put() in bcm2835_of_gpio_ranges_fallback() + - pinctrl: mediatek: Initialize variable pullen and pullup to zero + - pinctrl: mediatek: Initialize variable *buf to zero + - gpu: host1x: Fix mask for syncpoint increment register + - gpu: host1x: Don't skip assigning syncpoints to channels + - drm/tegra: firewall: Check for is_addr_reg existence in IMM check + - drm/i915/mtl: Add initial gt workarounds + - drm/i915/xehp: GAM registers don't need to be re-applied on engine resets + - pinctrl: renesas: rzg2l: Fix configuring the GPIO pins as interrupts + - drm/i915/xehp: Annotate a couple more workaround registers as MCR + - drm/msm/dpu: set pdpu->is_rt_pipe early in dpu_plane_sspp_atomic_update() + - drm/mediatek: dsi: Reduce the time of dsi from LP11 to sending cmd + - drm/mediatek: Use NULL instead of 0 for NULL pointer + - drm/mediatek: Drop unbalanced obj unref + - drm/mediatek: mtk_drm_crtc: Add checks for devm_kcalloc + - drm/mediatek: Clean dangling pointer on bind error path + - ASoC: soc-compress.c: fixup private_data on snd_soc_new_compress() + - dt-bindings: display: mediatek: Fix the fallback for mediatek,mt8186-disp- + ccorr + - gpio: pca9570: rename platform_data to chip_data + - gpio: vf610: connect GPIO label to dev name + - ASoC: topology: Properly access value coming from topology file + - spi: dw_bt1: fix MUX_MMIO dependencies + - ASoC: mchp-spdifrx: fix controls which rely on rsr register + - ASoC: mchp-spdifrx: fix return value in case completion times out + - ASoC: mchp-spdifrx: fix controls that works with completion mechanism + - ASoC: mchp-spdifrx: disable all interrupts in mchp_spdifrx_dai_remove() + - dm: improve shrinker debug names + - regmap: apply reg_base and reg_downshift for single register ops + - accel: fix CONFIG_DRM dependencies + - ASoC: rsnd: fixup #endif position + - ASoC: mchp-spdifrx: Fix uninitialized use of mr in mchp_spdifrx_hw_params() + - ASoC: dt-bindings: meson: fix gx-card codec node regex + - regulator: tps65219: use generic set_bypass() + - hwmon: (asus-ec-sensors) add missing mutex path + - hwmon: (ltc2945) Handle error case in ltc2945_value_store + - ALSA: hda: Fix the control element identification for multiple codecs + - drm/amdgpu: fix enum odm_combine_mode mismatch + - scsi: mpt3sas: Fix a memory leak + - scsi: aic94xx: Add missing check for dma_map_single() + - HID: multitouch: Add quirks for flipped axes + - HID: retain initial quirks set up when creating HID devices + - ASoC: qcom: q6apm-lpass-dai: unprepare stream if its already prepared + - ASoC: qcom: q6apm-dai: fix race condition while updating the position + pointer + - ASoC: qcom: q6apm-dai: Add SNDRV_PCM_INFO_BATCH flag + - ASoC: codecs: lpass: register mclk after runtime pm + - ASoC: codecs: lpass: fix incorrect mclk rate + - drm/amd/display: don't call dc_interrupt_set() for disabled crtcs + - HID: logitech-hidpp: Hard-code HID++ 1.0 fast scroll support + - spi: bcm63xx-hsspi: Fix multi-bit mode setting + - hwmon: (mlxreg-fan) Return zero speed for broken fan + - ASoC: tlv320adcx140: fix 'ti,gpio-config' DT property init + - dm: remove flush_scheduled_work() during local_exit() + - nfs4trace: fix state manager flag printing + - NFS: fix disabling of swap + - drm/i915/pvc: Implement recommended caching policy + - drm/i915/pvc: Annotate two more workaround/tuning registers as MCR + - drm/i915: Fix GEN8_MISCCPCTL + - spi: synquacer: Fix timeout handling in synquacer_spi_transfer_one() + - ASoC: soc-dapm.h: fixup warning struct snd_pcm_substream not declared + - HID: bigben: use spinlock to protect concurrent accesses + - HID: bigben_worker() remove unneeded check on report_field + - HID: bigben: use spinlock to safely schedule workers + - hid: bigben_probe(): validate report count + - ALSA: hda/hdmi: Register with vga_switcheroo on Dual GPU Macbooks + - drm/shmem-helper: Fix locking for drm_gem_shmem_get_pages_sgt() + - NFSD: enhance inter-server copy cleanup + - NFSD: fix leaked reference count of nfsd4_ssc_umount_item + - nfsd: fix race to check ls_layouts + - nfsd: clean up potential nfsd_file refcount leaks in COPY codepath + - NFSD: fix problems with cleanup on errors in nfsd4_copy + - nfsd: fix courtesy client with deny mode handling in nfs4_upgrade_open + - nfsd: don't fsync nfsd_files on last close + - NFSD: copy the whole verifier in nfsd_copy_write_verifier + - cifs: Fix lost destroy smbd connection when MR allocate failed + - cifs: Fix warning and UAF when destroy the MR list + - cifs: use tcon allocation functions even for dummy tcon + - gfs2: jdata writepage fix + - perf llvm: Fix inadvertent file creation + - leds: led-core: Fix refcount leak in of_led_get() + - leds: is31fl319x: Wrap mutex_destroy() for devm_add_action_or_rest() + - leds: simatic-ipc-leds-gpio: Make sure we have the GPIO providing driver + - tools/tracing/rtla: osnoise_hist: use total duration for average calculation + - perf inject: Use perf_data__read() for auxtrace + - perf intel-pt: Do not try to queue auxtrace data on pipe + - perf stat: Hide invalid uncore event output for aggr mode + - perf jevents: Correct bad character encoding + - perf test bpf: Skip test if kernel-debuginfo is not present + - perf tools: Fix auto-complete on aarch64 + - perf stat: Avoid merging/aggregating metric counts twice + - sparc: allow PM configs for sparc32 COMPILE_TEST + - selftests: find echo binary to use -ne options + - selftests/ftrace: Fix bash specific "==" operator + - selftests: use printf instead of echo -ne + - perf record: Fix segfault with --overwrite and --max-size + - printf: fix errname.c list + - perf tests stat_all_metrics: Change true workload to sleep workload for + system wide check + - objtool: add UACCESS exceptions for __tsan_volatile_read/write + - selftests/ftrace: Fix probepoint testcase to ignore __pfx_* symbols + - sysctl: fix proc_dobool() usability + - mfd: rk808: Re-add rk808-clkout to RK818 + - mfd: cs5535: Don't build on UML + - mfd: pcf50633-adc: Fix potential memleak in pcf50633_adc_async_read() + - dmaengine: idxd: Set traffic class values in GRPCFG on DSA 2.0 + - RDMA/erdma: Fix refcount leak in erdma_mmap + - dmaengine: HISI_DMA should depend on ARCH_HISI + - RDMA/hns: Fix refcount leak in hns_roce_mmap + - iio: light: tsl2563: Do not hardcode interrupt trigger type + - usb: gadget: fusb300_udc: free irq on the error path in fusb300_probe() + - i2c: designware: fix i2c_dw_clk_rate() return size to be u32 + - i2c: qcom-geni: change i2c_master_hub to static + - soundwire: cadence: Don't overflow the command FIFOs + - driver core: fix potential null-ptr-deref in device_add() + - kobject: Fix slab-out-of-bounds in fill_kobj_path() + - alpha/boot/tools/objstrip: fix the check for ELF header + - media: uvcvideo: Check for INACTIVE in uvc_ctrl_is_accessible() + - media: uvcvideo: Implement mask for V4L2_CTRL_TYPE_MENU + - media: uvcvideo: Refactor uvc_ctrl_mappings_uvcXX + - media: uvcvideo: Refactor power_line_frequency_controls_limited + - coresight: etm4x: Fix accesses to TRCSEQRSTEVR and TRCSEQSTR + - coresight: cti: Prevent negative values of enable count + - coresight: cti: Add PM runtime call in enable_store + - usb: typec: intel_pmc_mux: Don't leak the ACPI device reference count + - PCI/IOV: Enlarge virtfn sysfs name buffer + - PCI: switchtec: Return -EFAULT for copy_to_user() errors + - PCI: endpoint: pci-epf-vntb: Add epf_ntb_mw_bar_clear() num_mws kernel-doc + - hwtracing: hisi_ptt: Only add the supported devices to the filters list + - tty: serial: fsl_lpuart: disable Rx/Tx DMA in lpuart32_shutdown() + - tty: serial: fsl_lpuart: clear LPUART Status Register in lpuart32_shutdown() + - serial: tegra: Add missing clk_disable_unprepare() in tegra_uart_hw_init() + - Revert "char: pcmcia: cm4000_cs: Replace mdelay with usleep_range in + set_protocol" + - eeprom: idt_89hpesx: Fix error handling in idt_init() + - applicom: Fix PCI device refcount leak in applicom_init() + - firmware: stratix10-svc: add missing gen_pool_destroy() in + stratix10_svc_drv_probe() + - firmware: stratix10-svc: fix error handle while alloc/add device failed + - VMCI: check context->notify_page after call to get_user_pages_fast() to + avoid GPF + - mei: pxp: Use correct macros to initialize uuid_le + - misc/mei/hdcp: Use correct macros to initialize uuid_le + - misc: fastrpc: Fix an error handling path in fastrpc_rpmsg_probe() + - iommu/exynos: Fix error handling in exynos_iommu_init() + - driver core: fix resource leak in device_add() + - driver core: location: Free struct acpi_pld_info *pld before return false + - drivers: base: transport_class: fix possible memory leak + - drivers: base: transport_class: fix resource leak when + transport_add_device() fails + - firmware: dmi-sysfs: Fix null-ptr-deref in dmi_sysfs_register_handle + - selftests: iommu: Fix test_cmd_destroy_access() call in user_copy + - iommufd: Add three missing structures in ucmd_buffer + - fotg210-udc: Add missing completion handler + - dmaengine: dw-edma: Fix missing src/dst address of interleaved xfers + - fpga: microchip-spi: move SPI I/O buffers out of stack + - fpga: microchip-spi: rewrite status polling in a time measurable way + - usb: early: xhci-dbc: Fix a potential out-of-bound memory access + - tty: serial: fsl_lpuart: Fix the wrong RXWATER setting for rx dma case + - RDMA/cxgb4: add null-ptr-check after ip_dev_find() + - usb: musb: mediatek: don't unregister something that wasn't registered + - usb: gadget: configfs: Restrict symlink creation is UDC already binded + - phy: mediatek: remove temporary variable @mask_ + - PCI: mt7621: Delay phy ports initialization + - iommu/vt-d: Set No Execute Enable bit in PASID table entry + - power: supply: remove faulty cooling logic + - RDMA/siw: Fix user page pinning accounting + - RDMA/cxgb4: Fix potential null-ptr-deref in pass_establish() + - usb: max-3421: Fix setting of I/O pins + - RDMA/irdma: Cap MSIX used to online CPUs + 1 + - serial: fsl_lpuart: fix RS485 RTS polariy inverse issue + - tty: serial: imx: disable Ageing Timer interrupt request irq + - driver core: fw_devlink: Add DL_FLAG_CYCLE support to device links + - driver core: fw_devlink: Don't purge child fwnode's consumer links + - driver core: fw_devlink: Allow marking a fwnode link as being part of a + cycle + - driver core: fw_devlink: Consolidate device link flag computation + - driver core: fw_devlink: Improve check for fwnode with no device/driver + - driver core: fw_devlink: Make cycle detection more robust + - mtd: mtdpart: Don't create platform device that'll never probe + - usb: host: fsl-mph-dr-of: reuse device_set_of_node_from_dev + - dmaengine: dw-edma: Fix readq_ch() return value truncation + - PCI: Fix dropping valid root bus resources with .end = zero + - phy: rockchip-typec: fix tcphy_get_mode error case + - PCI: qcom: Fix host-init error handling + - iw_cxgb4: Fix potential NULL dereference in c4iw_fill_res_cm_id_entry() + - iommu: Fix error unwind in iommu_group_alloc() + - iommu/amd: Do not identity map v2 capable device when snp is enabled + - dmaengine: sf-pdma: pdma_desc memory leak fix + - dmaengine: dw-axi-dmac: Do not dereference NULL structure + - dmaengine: ptdma: check for null desc before calling pt_cmd_callback + - iommu/vt-d: Fix error handling in sva enable/disable paths + - iommu/vt-d: Allow to use flush-queue when first level is default + - RDMA/rxe: Cleanup mr_check_range + - RDMA/rxe: Move rxe_map_mr_sg to rxe_mr.c + - RDMA-rxe: Isolate mr code from atomic_reply() + - RDMA-rxe: Isolate mr code from atomic_write_reply() + - RDMA/rxe: Cleanup page variables in rxe_mr.c + - RDMA/rxe: Replace rxe_map and rxe_phys_buf by xarray + - Subject: RDMA/rxe: Handle zero length rdma + - RDMA/mana_ib: Fix a bug when the PF indicates more entries for registering + memory on first packet + - RDMA/rxe: Fix missing memory barriers in rxe_queue.h + - IB/hfi1: Fix math bugs in hfi1_can_pin_pages() + - IB/hfi1: Fix sdma.h tx->num_descs off-by-one errors + - Revert "remoteproc: qcom_q6v5_mss: map/unmap metadata region before/after + use" + - remoteproc: qcom_q6v5_mss: Use a carveout to authenticate modem headers + - media: ti: cal: fix possible memory leak in cal_ctx_create() + - media: platform: ti: Add missing check for devm_regulator_get + - media: imx: imx7-media-csi: fix missing clk_disable_unprepare() in + imx7_csi_init() + - powerpc: Remove linker flag from KBUILD_AFLAGS + - s390/vdso: Drop '-shared' from KBUILD_CFLAGS_64 + - builddeb: clean generated package content + - media: max9286: Fix memleak in max9286_v4l2_register() + - media: ov2740: Fix memleak in ov2740_init_controls() + - media: ov5675: Fix memleak in ov5675_init_controls() + - media: i2c: tc358746: fix missing return assignment + - media: i2c: tc358746: fix ignoring read error in g_register callback + - media: i2c: tc358746: fix possible endianness issue + - media: ov5640: Fix soft reset sequence and timings + - media: ov5640: Handle delays when no reset_gpio set + - media: mc: Get media_device directly from pad + - media: i2c: ov772x: Fix memleak in ov772x_probe() + - media: i2c: imx219: Split common registers from mode tables + - media: i2c: imx219: Fix binning for RAW8 capture + - media: platform: mtk-mdp3: Fix return value check in mdp_probe() + - media: camss: csiphy-3ph: avoid undefined behavior + - media: platform: mtk-mdp3: fix Kconfig dependencies + - media: v4l2-jpeg: correct the skip count in jpeg_parse_app14_data + - media: v4l2-jpeg: ignore the unknown APP14 marker + - media: hantro: Fix JPEG encoder ENUM_FRMSIZE on RK3399 + - media: imx-jpeg: Apply clk_bulk api instead of operating specific clk + - media: amphion: correct the unspecified color space + - media: drivers/media/v4l2-core/v4l2-h264 : add detection of null pointers + - media: rc: Fix use-after-free bugs caused by ene_tx_irqsim() + - media: atomisp: fix videobuf2 Kconfig depenendency + - media: atomisp: Only set default_run_mode on first open of a stream/asd + - media: i2c: ov7670: 0 instead of -EINVAL was returned + - media: usb: siano: Fix use after free bugs caused by do_submit_urb + - media: saa7134: Use video_unregister_device for radio_dev + - rpmsg: glink: Avoid infinite loop on intent for missing channel + - rpmsg: glink: Release driver_override + - ARM: OMAP2+: omap4-common: Fix refcount leak bug + - arm64: dts: qcom: msm8996: Add additional A2NoC clocks + - udf: Define EFSCORRUPTED error code + - context_tracking: Fix noinstr vs KASAN + - exit: Detect and fix irq disabled state in oops + - ARM: dts: exynos: Use Exynos5420 compatible for the MIPI video phy + - fs: Use CHECK_DATA_CORRUPTION() when kernel bugs are detected + - blk-iocost: fix divide by 0 error in calc_lcoefs() + - blk-cgroup: dropping parent refcount after pd_free_fn() is done + - blk-cgroup: synchronize pd_free_fn() from blkg_free_workfn() and + blkcg_deactivate_policy() + - trace/blktrace: fix memory leak with using debugfs_lookup() + - btrfs: scrub: improve tree block error reporting + - arm64: zynqmp: Enable hs termination flag for USB dwc3 controller + - cpuidle, intel_idle: Fix CPUIDLE_FLAG_INIT_XSTATE + - x86/fpu: Don't set TIF_NEED_FPU_LOAD for PF_IO_WORKER threads + - cpuidle: drivers: firmware: psci: Dont instrument suspend code + - cpuidle: lib/bug: Disable rcu_is_watching() during WARN/BUG + - perf/x86/intel/uncore: Add Meteor Lake support + - wifi: ath9k: Fix use-after-free in ath9k_hif_usb_disconnect() + - wifi: ath11k: fix monitor mode bringup crash + - wifi: brcmfmac: Fix potential stack-out-of-bounds in brcmf_c_preinit_dcmds() + - rcu: Make RCU_LOCKDEP_WARN() avoid early lockdep checks + - rcu: Suppress smp_processor_id() complaint in + synchronize_rcu_expedited_wait() + - srcu: Delegate work to the boot cpu if using SRCU_SIZE_SMALL + - rcu-tasks: Make rude RCU-Tasks work well with CPU hotplug + - rcu-tasks: Handle queue-shrink/callback-enqueue race condition + - wifi: ath11k: debugfs: fix to work with multiple PCI devices + - thermal: intel: Fix unsigned comparison with less than zero + - timers: Prevent union confusion from unexpected restart_syscall() + - x86/bugs: Reset speculation control settings on init + - bpftool: Always disable stack protection for BPF objects + - wifi: brcmfmac: ensure CLM version is null-terminated to prevent stack-out- + of-bounds + - wifi: rtw89: fix assignation of TX BD RAM table + - wifi: mt7601u: fix an integer underflow + - inet: fix fast path in __inet_hash_connect() + - ice: restrict PTP HW clock freq adjustments to 100, 000, 000 PPB + - ice: add missing checks for PF vsi type + - Compiler attributes: GCC cold function alignment workarounds + - ACPI: Don't build ACPICA with '-Os' + - bpf, docs: Fix modulo zero, division by zero, overflow, and underflow + - thermal: intel: intel_pch: Add support for Wellsburg PCH + - clocksource: Suspend the watchdog temporarily when high read latency + detected + - crypto: hisilicon: Wipe entire pool on error + - net: bcmgenet: Add a check for oversized packets + - m68k: Check syscall_trace_enter() return code + - s390/mm,ptdump: avoid Kasan vs Memcpy Real markers swapping + - netfilter: nf_tables: NULL pointer dereference in nf_tables_updobj() + - can: isotp: check CAN address family in isotp_bind() + - gcc-plugins: drop -std=gnu++11 to fix GCC 13 build + - tools/power/x86/intel-speed-select: Add Emerald Rapid quirk + - platform/x86: dell-ddv: Add support for interface version 3 + - wifi: mt76: dma: free rx_head in mt76_dma_rx_cleanup + - ACPI: video: Fix Lenovo Ideapad Z570 DMI match + - net/mlx5: fw_tracer: Fix debug print + - coda: Avoid partial allocation of sig_inputArgs + - uaccess: Add minimum bounds check on kernel buffer size + - s390/idle: mark arch_cpu_idle() noinstr + - time/debug: Fix memory leak with using debugfs_lookup() + - PM: domains: fix memory leak with using debugfs_lookup() + - PM: EM: fix memory leak with using debugfs_lookup() + - Bluetooth: Fix issue with Actions Semi ATS2851 based devices + - Bluetooth: btusb: Add new PID/VID 0489:e0f2 for MT7921 + - Bluetooth: btusb: Add VID:PID 13d3:3529 for Realtek RTL8821CE + - wifi: rtw89: debug: avoid invalid access on RTW89_DBG_SEL_MAC_30 + - hv_netvsc: Check status in SEND_RNDIS_PKT completion message + - s390/kfence: fix page fault reporting + - devlink: Fix TP_STRUCT_entry in trace of devlink health report + - scm: add user copy checks to put_cmsg() + - drm: panel-orientation-quirks: Add quirk for Lenovo Yoga Tab 3 X90F + - drm: panel-orientation-quirks: Add quirk for DynaBook K50 + - drm/amd/display: Reduce expected sdp bandwidth for dcn321 + - drm/amd/display: Revert Reduce delay when sink device not able to ACK 00340h + write + - drm/amd/display: Fix potential null-deref in dm_resume + - drm/omap: dsi: Fix excessive stack usage + - HID: Add Mapping for System Microphone Mute + - drm/tiny: ili9486: Do not assume 8-bit only SPI controllers + - drm/amd/display: Defer DIG FIFO disable after VID stream enable + - drm/radeon: free iio for atombios when driver shutdown + - drm/amd: Avoid BUG() for case of SRIOV missing IP version + - drm/amdkfd: Page aligned memory reserve size + - scsi: lpfc: Fix use-after-free KFENCE violation during sysfs firmware write + - Revert "fbcon: don't lose the console font across generic->chip driver + switch" + - drm/amd: Avoid ASSERT for some message failures + - drm: amd: display: Fix memory leakage + - drm/amd/display: fix mapping to non-allocated address + - HID: uclogic: Add frame type quirk + - HID: uclogic: Add battery quirk + - HID: uclogic: Add support for XP-PEN Deco Pro SW + - HID: uclogic: Add support for XP-PEN Deco Pro MW + - drm/msm/dsi: Add missing check for alloc_ordered_workqueue + - drm: rcar-du: Add quirk for H3 ES1.x pclk workaround + - drm: rcar-du: Fix setting a reserved bit in DPLLCR + - drm/drm_print: correct format problem + - drm/amd/display: Set hvm_enabled flag for S/G mode + - drm/client: Test for connectors before sending hotplug event + - habanalabs: extend fatal messages to contain PCI info + - habanalabs: fix bug in timestamps registration code + - docs/scripts/gdb: add necessary make scripts_gdb step + - drm/msm/dpu: Add DSC hardware blocks to register snapshot + - ASoC: soc-compress: Reposition and add pcm_mutex + - ASoC: kirkwood: Iterate over array indexes instead of using pointer math + - regulator: max77802: Bounds check regulator id against opmode + - regulator: s5m8767: Bounds check id indexing into arrays + - Revert "drm/amdgpu: TA unload messages are not actually sent to psp when + amdgpu is uninstalled" + - drm/amd/display: fix FCLK pstate change underflow + - gfs2: Improve gfs2_make_fs_rw error handling + - hwmon: (coretemp) Simplify platform device handling + - hwmon: (nct6775) Directly call ASUS ACPI WMI method + - hwmon: (nct6775) B650/B660/X670 ASUS boards support + - pinctrl: at91: use devm_kasprintf() to avoid potential leaks + - drm/amd/display: Do not commit pipe when updating DRR + - scsi: snic: Fix memory leak with using debugfs_lookup() + - scsi: ufs: core: Fix device management cmd timeout flow + - HID: logitech-hidpp: Don't restart communication if not necessary + - drm/amd/display: Enable P-state validation checks for DCN314 + - drm: panel-orientation-quirks: Add quirk for Lenovo IdeaPad Duet 3 10IGL5 + - drm/amd/display: Disable HUBP/DPP PG on DCN314 for now + - drm/amd/display: disable SubVP + DRR to prevent underflow + - dm thin: add cond_resched() to various workqueue loops + - dm cache: add cond_resched() to various workqueue loops + - nfsd: zero out pointers after putting nfsd_files on COPY setup error + - nfsd: don't hand out delegation on setuid files being opened for write + - cifs: prevent data race in smb2_reconnect() + - drm/i915/mtl: Correct implementation of Wa_18018781329 + - drm/shmem-helper: Revert accidental non-GPL export + - driver core: fw_devlink: Avoid spurious error message + - wifi: rtl8xxxu: fixing transmisison failure for rtl8192eu + - firmware: coreboot: framebuffer: Ignore reserved pixel color bits + - block: don't allow multiple bios for IOCB_NOWAIT issue + - block: clear bio->bi_bdev when putting a bio back in the cache + - block: be a bit more careful in checking for NULL bdev while polling + - rtc: pm8xxx: fix set-alarm race + - ipmi: ipmb: Fix the MODULE_PARM_DESC associated to 'retry_time_ms' + - ipmi:ssif: resend_msg() cannot fail + - ipmi_ssif: Rename idle state and check + - ipmi:ssif: Add a timer between request retries + - io_uring: Replace 0-length array with flexible array + - io_uring: use user visible tail in io_uring_poll() + - io_uring: handle TIF_NOTIFY_RESUME when checking for task_work + - io_uring: add a conditional reschedule to the IOPOLL cancelation loop + - io_uring: add reschedule point to handle_tw_list() + - io_uring/rsrc: disallow multi-source reg buffers + - io_uring: remove MSG_NOSIGNAL from recvmsg + - io_uring/poll: allow some retries for poll triggering spuriously + - io_uring: fix fget leak when fs don't support nowait buffered read + - s390/extmem: return correct segment type in __segment_load() + - s390: discard .interp section + - s390/kprobes: fix irq mask clobbering on kprobe reenter from post_handler + - s390/kprobes: fix current_kprobe never cleared after kprobes reenter + - KVM: s390: disable migration mode when dirty tracking is disabled + - cifs: improve checking of DFS links over STATUS_OBJECT_NAME_INVALID + - cifs: Fix uninitialized memory read in smb3_qfs_tcon() + - cifs: Fix uninitialized memory reads for oparms.mode + - cifs: fix mount on old smb servers + - cifs: introduce cifs_io_parms in smb2_async_writev() + - cifs: split out smb3_use_rdma_offload() helper + - cifs: don't try to use rdma offload on encrypted connections + - cifs: Check the lease context if we actually got a lease + - cifs: return a single-use cfid if we did not get a lease + - scsi: mpi3mr: Fix missing mrioc->evtack_cmds initialization + - scsi: mpi3mr: Fix issues in mpi3mr_get_all_tgt_info() + - scsi: mpi3mr: Remove unnecessary memcpy() to alltgt_info->dmi + - btrfs: hold block group refcount during async discard + - btrfs: sysfs: update fs features directory asynchronously + - locking/rwsem: Prevent non-first waiter from spinning in down_write() + slowpath + - ksmbd: fix wrong data area length for smb2 lock request + - ksmbd: do not allow the actual frame length to be smaller than the rfc1002 + length + - ksmbd: fix possible memory leak in smb2_lock() + - torture: Fix hang during kthread shutdown phase + - ARM: dts: exynos: correct HDMI phy compatible in Exynos4 + - io_uring: mark task TASK_RUNNING before handling resume/task work + - hfs: fix missing hfs_bnode_get() in __hfs_bnode_create + - fs: hfsplus: fix UAF issue in hfsplus_put_super + - exfat: fix reporting fs error when reading dir beyond EOF + - exfat: fix unexpected EOF while reading dir + - exfat: redefine DIR_DELETED as the bad cluster number + - exfat: fix inode->i_blocks for non-512 byte sector size device + - fs: dlm: start midcomms before scand + - fs: dlm: fix use after free in midcomms commit + - fs: dlm: be sure to call dlm_send_queue_flush() + - fs: dlm: fix race setting stop tx flag + - fs: dlm: don't set stop rx flag after node reset + - fs: dlm: move sending fin message into state change handling + - fs: dlm: send FIN ack back in right cases + - f2fs: fix information leak in f2fs_move_inline_dirents() + - f2fs: retry to update the inode page given data corruption + - f2fs: fix cgroup writeback accounting with fs-layer encryption + - f2fs: fix kernel crash due to null io->bio + - f2fs: Revert "f2fs: truncate blocks in batch in __complete_revoke_list()" + - ocfs2: fix defrag path triggering jbd2 ASSERT + - ocfs2: fix non-auto defrag path not working issue + - fs/cramfs/inode.c: initialize file_ra_state + - selftests/landlock: Skip overlayfs tests when not supported + - selftests/landlock: Test ptrace as much as possible with Yama + - udf: Truncate added extents on failed expansion + - udf: Do not bother merging very long extents + - udf: Do not update file length for failed writes to inline files + - udf: Preserve link count of system files + - udf: Detect system inodes linked into directory hierarchy + - udf: Fix file corruption when appending just after end of preallocated + extent + - md: don't update recovery_cp when curr_resync is ACTIVE + - KVM: Destroy target device if coalesced MMIO unregistration fails + - KVM: VMX: Fix crash due to uninitialized current_vmcs + - KVM: Register /dev/kvm as the _very_ last thing during initialization + - KVM: x86: Purge "highest ISR" cache when updating APICv state + - KVM: x86: Blindly get current x2APIC reg value on "nodecode write" traps + - KVM: x86: Don't inhibit APICv/AVIC on xAPIC ID "change" if APIC is disabled + - KVM: x86: Don't inhibit APICv/AVIC if xAPIC ID mismatch is due to 32-bit ID + - KVM: SVM: Flush the "current" TLB when activating AVIC + - KVM: SVM: Process ICR on AVIC IPI delivery failure due to invalid target + - KVM: SVM: Don't put/load AVIC when setting virtual APIC mode + - KVM: x86: Inject #GP if WRMSR sets reserved bits in APIC Self-IPI + - KVM: x86: Inject #GP on x2APIC WRMSR that sets reserved bits 63:32 + - KVM: SVM: Fix potential overflow in SEV's send|receive_update_data() + - KVM: SVM: hyper-v: placate modpost section mismatch error + - selftests: x86: Fix incorrect kernel headers search path + - x86/virt: Force GIF=1 prior to disabling SVM (for reboot flows) + - x86/crash: Disable virt in core NMI crash handler to avoid double shootdown + - x86/reboot: Disable virtualization in an emergency if SVM is supported + - x86/reboot: Disable SVM, not just VMX, when stopping CPUs + - x86/kprobes: Fix __recover_optprobed_insn check optimizing logic + - x86/kprobes: Fix arch_check_optimized_kprobe check within optimized_kprobe + range + - x86/microcode/amd: Remove load_microcode_amd()'s bsp parameter + - x86/microcode/AMD: Add a @cpu parameter to the reloading functions + - x86/microcode/AMD: Fix mixed steppings support + - x86/speculation: Allow enabling STIBP with legacy IBRS + - Documentation/hw-vuln: Document the interaction between IBRS and STIBP + - virt/sev-guest: Return -EIO if certificate buffer is not large enough + - brd: mark as nowait compatible + - brd: return 0/-error from brd_insert_page() + - brd: check for REQ_NOWAIT and set correct page allocation mask + - ima: fix error handling logic when file measurement failed + - ima: Align ima_file_mmap() parameters with mmap_file LSM hook + - selftests/powerpc: Fix incorrect kernel headers search path + - selftests/ftrace: Fix eprobe syntax test case to check filter support + - selftests: sched: Fix incorrect kernel headers search path + - selftests: core: Fix incorrect kernel headers search path + - selftests: pid_namespace: Fix incorrect kernel headers search path + - selftests: arm64: Fix incorrect kernel headers search path + - selftests: clone3: Fix incorrect kernel headers search path + - selftests: pidfd: Fix incorrect kernel headers search path + - selftests: membarrier: Fix incorrect kernel headers search path + - selftests: kcmp: Fix incorrect kernel headers search path + - selftests: media_tests: Fix incorrect kernel headers search path + - selftests: gpio: Fix incorrect kernel headers search path + - selftests: filesystems: Fix incorrect kernel headers search path + - selftests: user_events: Fix incorrect kernel headers search path + - selftests: ptp: Fix incorrect kernel headers search path + - selftests: sync: Fix incorrect kernel headers search path + - selftests: rseq: Fix incorrect kernel headers search path + - selftests: move_mount_set_group: Fix incorrect kernel headers search path + - selftests: mount_setattr: Fix incorrect kernel headers search path + - selftests: perf_events: Fix incorrect kernel headers search path + - selftests: ipc: Fix incorrect kernel headers search path + - selftests: futex: Fix incorrect kernel headers search path + - selftests: drivers: Fix incorrect kernel headers search path + - selftests: dmabuf-heaps: Fix incorrect kernel headers search path + - selftests: vm: Fix incorrect kernel headers search path + - selftests: seccomp: Fix incorrect kernel headers search path + - irqdomain: Fix association race + - irqdomain: Fix disassociation race + - irqdomain: Look for existing mapping only once + - irqdomain: Drop bogus fwspec-mapping error handling + - irqdomain: Refactor __irq_domain_alloc_irqs() + - irqdomain: Fix mapping-creation race + - irqdomain: Fix domain registration race + - crypto: qat - fix out-of-bounds read + - mm/damon/paddr: fix missing folio_put() + - ALSA: ice1712: Do not left ice->gpio_mutex locked in aureon_add_controls() + - ALSA: hda/realtek: Add quirk for HP EliteDesk 800 G6 Tower PC + - jbd2: fix data missing when reusing bh which is ready to be checkpointed + - ext4: optimize ea_inode block expansion + - ext4: refuse to create ea block when umounted + - cxl/pmem: Fix nvdimm registration races + - Input: exc3000 - properly stop timer on shutdown + - mtd: spi-nor: sfdp: Fix index value for SCCR dwords + - mtd: spi-nor: spansion: Consider reserved bits in CFR5 register + - dm: send just one event on resize, not two + - dm: add cond_resched() to dm_wq_work() + - dm: add cond_resched() to dm_wq_requeue_work() + - wifi: rtw88: use RTW_FLAG_POWERON flag to prevent to power on/off twice + - wifi: rtl8xxxu: Use a longer retry limit of 48 + - wifi: ath11k: allow system suspend to survive ath11k + - wifi: cfg80211: Fix use after free for wext + - wifi: cfg80211: Set SSID if it is not already set + - cpuidle: add ARCH_SUSPEND_POSSIBLE dependencies + - qede: fix interrupt coalescing configuration + - thermal: intel: powerclamp: Fix cur_state for multi package system + - dm flakey: fix logic when corrupting a bio + - dm cache: free background tracker's queued work in btracker_destroy + - dm flakey: don't corrupt the zero page + - dm flakey: fix a bug with 32-bit highmem systems + - hwmon: (peci/cputemp) Fix off-by-one in coretemp_label allocation + - hwmon: (nct6775) Fix incorrect parenthesization in nct6775_write_fan_div() + - spi: intel: Check number of chip selects after reading the descriptor + - ARM: dts: qcom: sdx65: Add Qcom SMMU-500 as the fallback for IOMMU node + - ARM: dts: qcom: sdx55: Add Qcom SMMU-500 as the fallback for IOMMU node + - ARM: dts: exynos: correct TMU phandle in Exynos4210 + - ARM: dts: exynos: correct TMU phandle in Exynos4 + - ARM: dts: exynos: correct TMU phandle in Odroid XU3 family + - ARM: dts: exynos: correct TMU phandle in Exynos5250 + - ARM: dts: exynos: correct TMU phandle in Odroid XU + - ARM: dts: exynos: correct TMU phandle in Odroid HC1 + - arm64: acpi: Fix possible memory leak of ffh_ctxt + - arm64: mm: hugetlb: Disable HUGETLB_PAGE_OPTIMIZE_VMEMMAP + - arm64: Reset KASAN tag in copy_highpage with HW tags only + - fuse: add inode/permission checks to fileattr_get/fileattr_set + - rbd: avoid use-after-free in do_rbd_add() when rbd_dev_create() fails + - ceph: update the time stamps and try to drop the suid/sgid + - regulator: core: Use ktime_get_boottime() to determine how long a regulator + was off + - panic: fix the panic_print NMI backtrace setting + - mm/hwpoison: convert TTU_IGNORE_HWPOISON to TTU_HWPOISON + - genirq/msi, platform-msi: Ensure that MSI descriptors are unreferenced + - genirq/msi: Take the per-device MSI lock before validating the control + structure + - spi: spi-sn-f-ospi: fix duplicate flag while assigning to mode_bits + - alpha: fix FEN fault handling + - dax/kmem: Fix leak of memory-hotplug resources + - mips: fix syscall_get_nr + - media: ipu3-cio2: Fix PM runtime usage_count in driver unbind + - remoteproc/mtk_scp: Move clk ops outside send_lock + - vfio: Fix NULL pointer dereference caused by uninitialized group->iommufd + - docs: gdbmacros: print newest record + - mm: memcontrol: deprecate charge moving + - mm/thp: check and bail out if page in deferred queue already + - ktest.pl: Give back console on Ctrt^C on monitor + - kprobes: Fix to handle forcibly unoptimized kprobes on freeing_list + - ktest.pl: Fix missing "end_monitor" when machine check fails + - ktest.pl: Add RUN_TIMEOUT option with default unlimited + - memory tier: release the new_memtier in find_create_memory_tier() + - ring-buffer: Handle race between rb_move_tail and rb_check_pages + - tools/bootconfig: fix single & used for logical condition + - tracing/eprobe: Fix to add filter on eprobe description in README file + - iommu/amd: Add a length limitation for the ivrs_acpihid command-line + parameter + - scsi: aacraid: Allocate cmd_priv with scsicmd + - scsi: qla2xxx: Fix link failure in NPIV environment + - scsi: qla2xxx: Check if port is online before sending ELS + - scsi: qla2xxx: Fix DMA-API call trace on NVMe LS requests + - scsi: qla2xxx: Remove unintended flag clearing + - scsi: qla2xxx: Fix erroneous link down + - scsi: qla2xxx: Remove increment of interface err cnt + - scsi: ses: Don't attach if enclosure has no components + - scsi: ses: Fix slab-out-of-bounds in ses_enclosure_data_process() + - scsi: ses: Fix possible addl_desc_ptr out-of-bounds accesses + - scsi: ses: Fix possible desc_ptr out-of-bounds accesses + - scsi: ses: Fix slab-out-of-bounds in ses_intf_remove() + - RISC-V: add a spin_shadow_stack declaration + - riscv: Avoid enabling interrupts in die() + - riscv: mm: fix regression due to update_mmu_cache change + - riscv: jump_label: Fixup unaligned arch_static_branch function + - riscv: ftrace: Fixup panic by disabling preemption + - riscv, mm: Perform BPF exhandler fixup on page fault + - riscv: ftrace: Remove wasted nops for !RISCV_ISA_C + - riscv: ftrace: Reduce the detour code size to half + - MIPS: DTS: CI20: fix otg power gpio + - PCI/PM: Observe reset delay irrespective of bridge_d3 + - PCI: Unify delay handling for reset and resume + - PCI: hotplug: Allow marking devices as disconnected during bind/unbind + - PCI: Avoid FLR for AMD FCH AHCI adapters + - PCI/DPC: Await readiness of secondary bus after reset + - bus: mhi: ep: Only send -ENOTCONN status if client driver is available + - bus: mhi: ep: Move chan->lock to the start of processing queued ch ring + - bus: mhi: ep: Save channel state locally during suspend and resume + - iommufd: Make sure to zero vfio_iommu_type1_info before copying to user + - iommufd: Do not add the same hwpt to the ioas->hwpt_list twice + - iommu/vt-d: Avoid superfluous IOTLB tracking in lazy mode + - iommu/vt-d: Fix PASID directory pointer coherency + - vfio/type1: exclude mdevs from VFIO_UPDATE_VADDR + - vfio/type1: prevent underflow of locked_vm via exec() + - vfio/type1: track locked_vm per dma + - vfio/type1: restore locked_vm + - drm/amd: Fix initialization for nbio 7.5.1 + - drm/i915/quirks: Add inverted backlight quirk for HP 14-r206nv + - drm/radeon: Fix eDP for single-display iMac11,2 + - drm/i915: Don't use stolen memory for ring buffers with LLC + - drm/i915: Don't use BAR mappings for ring buffers with LLC + - drm/gud: Fix UBSAN warning + - drm/edid: fix AVI infoframe aspect ratio handling + - drm/edid: fix parsing of 3D modes from HDMI VSDB + - qede: avoid uninitialized entries in coal_entry array + - brd: use radix_tree_maybe_preload instead of radix_tree_preload + - net: avoid double iput when sock_alloc_file fails + - Linux 6.2.3 + + * Miscellaneous Ubuntu changes + - [Config] update annotations after applying 6.2.3 stable patches + - [Config] update annotations after applying 6.2.6 stable patches + + -- Andrea Righi Tue, 14 Mar 2023 16:43:44 +0100 + +linux (6.2.0-16.16) lunar; urgency=medium + + * lunar/linux: 6.2.0-16.16 -proposed tracker (LP: #2009914) + + * linux-libc-dev is no longer multi-arch safe (LP: #2009355) + - Revert "UBUNTU: [Packaging] install headers to debian/linux-libc-dev + directly" + + * linux: CONFIG_SERIAL_8250_MID=y (LP: #2009283) + - [Config] enable CONFIG_SERIAL_8250_MID=y + + * cpufreq: intel_pstate: Update Balance performance EPP for Sapphire Rapids + (LP: #2008519) + - cpufreq: intel_pstate: Adjust balance_performance EPP for Sapphire Rapids + + -- Andrea Righi Fri, 10 Mar 2023 18:34:28 +0100 + +linux (6.2.0-15.15) lunar; urgency=medium + + * Miscellaneous Ubuntu changes + - [Packaging] annotations: document annotations headers + + -- Andrea Righi Fri, 10 Mar 2023 07:36:59 +0100 + +linux (6.2.0-14.14) lunar; urgency=medium + + * lunar/linux: 6.2.0-14.14 -proposed tracker (LP: #2009856) + + * Miscellaneous Ubuntu changes + - [Packaging] rust: add rust build dependencies to all arches + - [Packaging] Support skipped dkms modules + - [Packaging] actually enforce set -e in dkms-build--nvidia-N + - [Packaging] Preserve the correct log file variable value + - [Packaging] update getabis + + -- Andrea Righi Thu, 09 Mar 2023 16:40:36 +0100 + +linux (6.2.0-13.13) lunar; urgency=medium + + * lunar/linux: 6.2.0-13.13 -proposed tracker (LP: #2009704) + + * Packaging resync (LP: #1786013) + - debian/dkms-versions -- update from kernel-versions (main/master) + + * mt7921: add support of MTFG table (LP: #2009642) + - wifi: mt76: mt7921: add support to update fw capability with MTFG table + + -- Andrea Righi Wed, 08 Mar 2023 14:40:25 +0100 + +linux (6.2.0-12.12) lunar; urgency=medium + + * lunar/linux: 6.2.0-12.12 -proposed tracker (LP: #2009698) + + * Miscellaneous Ubuntu changes + - SAUCE: enforce rust availability only on x86_64 + - [Config] update CONFIG_RUST_IS_AVAILABLE + + -- Andrea Righi Wed, 08 Mar 2023 12:50:15 +0100 + +linux (6.2.0-11.11) lunar; urgency=medium + + * lunar/linux: 6.2.0-11.11 -proposed tracker (LP: #2009697) + + * Miscellaneous Ubuntu changes + - [Packaging] do not stop the build if rust is not available + + -- Andrea Righi Wed, 08 Mar 2023 12:24:55 +0100 + +linux (6.2.0-10.10) lunar; urgency=medium + + * lunar/linux: 6.2.0-10.10 -proposed tracker (LP: #2009673) + + * Packaging resync (LP: #1786013) + - debian/dkms-versions -- update from kernel-versions (main/master) + + * enable Rust support in the kernel (LP: #2007654) + - [Packaging] propagate makefile variables to kernelconfig + - SAUCE: rust: fix regexp in scripts/is_rust_module.sh + - SAUCE: scripts: rust: drop is_rust_module.sh + - SAUCE: rust: allow to use INIT_STACK_ALL_ZERO + - SAUCE: scripts: Exclude Rust CUs with pahole + - SAUCE: modpost: support arbitrary symbol length in modversion + - SAUCE: allows to enable Rust with modversions + - SAUCE: rust: properly detect the version of libclang used by bindgen + - [Packaging] rust: add the proper make flags to enable rust support + - [Packaging] add rust dependencies + - [Packaging] bpftool: always use vmlinux to generate headers + - [Packaging] run rustavailable target as debugging before build + - [Config] enable Rust support + + * Fail to output sound to external monitor which connects via docking station + (LP: #2009024) + - [Config] Enable CONFIG_SND_HDA_INTEL_HDMI_SILENT_STREAM + + * Miscellaneous Ubuntu changes + - SAUCE: Makefile: replace rsync with tar + + -- Andrea Righi Wed, 08 Mar 2023 12:01:56 +0100 + +linux (6.2.0-1.1) lunar; urgency=medium + + * lunar/linux: 6.2.0-1.1 -proposed tracker (LP: #2009621) + + * Packaging resync (LP: #1786013) + - [Packaging] update variants + - debian/dkms-versions -- update from kernel-versions (main/master) + + * kinetic: apply new apparmor and LSM stacking patch set (LP: #1989983) + - SAUCE: apparmor: Add fine grained mediation of posix mqueues + - SAUCE: apparmor: add user namespace creation mediation + + * Lunar update: v6.2.2 upstream stable release (LP: #2009358) + - ALSA: hda: cs35l41: Correct error condition handling + - crypto: arm64/sm4-gcm - Fix possible crash in GCM cryption + - bpf: bpf_fib_lookup should not return neigh in NUD_FAILED state + - vc_screen: don't clobber return value in vcs_read + - drm/amd/display: Move DCN314 DOMAIN power control to DMCUB + - drm/amd/display: Properly reuse completion structure + - scripts/tags.sh: fix incompatibility with PCRE2 + - wifi: rtw88: usb: Set qsel correctly + - wifi: rtw88: usb: send Zero length packets if necessary + - wifi: rtw88: usb: drop now unnecessary URB size check + - usb: dwc3: pci: add support for the Intel Meteor Lake-M + - USB: serial: option: add support for VW/Skoda "Carstick LTE" + - usb: gadget: u_serial: Add null pointer check in gserial_resume + - arm64: dts: uniphier: Fix property name in PXs3 USB node + - usb: typec: pd: Remove usb_suspend_supported sysfs from sink PDO + - USB: core: Don't hold device lock while reading the "descriptors" sysfs file + - Linux 6.2.2 + + * Lunar update: v6.2.1 upstream stable release (LP: #2009127) + - uaccess: Add speculation barrier to copy_from_user() + - x86/alternatives: Introduce int3_emulate_jcc() + - x86/alternatives: Teach text_poke_bp() to patch Jcc.d32 instructions + - x86/static_call: Add support for Jcc tail-calls + - HID: mcp-2221: prevent UAF in delayed work + - wifi: mwifiex: Add missing compatible string for SD8787 + - audit: update the mailing list in MAINTAINERS + - platform/x86/amd/pmf: Add depends on CONFIG_POWER_SUPPLY + - platform/x86: nvidia-wmi-ec-backlight: Add force module parameter + - ext4: Fix function prototype mismatch for ext4_feat_ktype + - randstruct: disable Clang 15 support + - bpf: add missing header file include + - Linux 6.2.1 + + * Fix mediatek wifi driver crash when loading wrong SAR table (LP: #2009118) + - wifi: mt76: mt7921: fix error code of return in mt7921_acpi_read + + * overlayfs mounts as R/O over idmapped mount (LP: #2009065) + - SAUCE: overlayfs: handle idmapped mounts in ovl_do_(set|remove)xattr + + * RaptorLake: Fix the Screen is shaking by onboard HDMI port in mirror mode + (LP: #1993561) + - drm/i915/display: Drop check for doublescan mode in modevalid + - drm/i915/display: Prune Interlace modes for Display >=12 + + * screen flicker after PSR2 enabled (LP: #2007516) + - SAUCE: drm/i915/display/psr: Disable PSR2 sel fetch on panel SHP 5457 + + * [23.04 FEAT] Support for new IBM Z Hardware (IBM z16) - Reset DAT-Protection + facility support (LP: #1982378) + - s390/mm: add support for RDP (Reset DAT-Protection) + + * [23.04 FEAT] zcrypt DD: AP command filtering (LP: #2003637) + - s390/zcrypt: introduce ctfm field in struct CPRBX + + * rtcpie in timers from ubuntu_kernel_selftests randomly failing + (LP: #1814234) + - SAUCE: selftest: rtcpie: Force passing unreliable subtest + + * [23.04 FEAT] Support for List-Directed IPL and re-IPL from ECKD DASD + (LP: #2003394) + - s390/ipl: add DEFINE_GENERIC_LOADPARM() + - s390/ipl: add loadparm parameter to eckd ipl/reipl data + + * Miscellaneous Ubuntu changes + - SAUCE: drm/i915/sseu: fix max_subslices array-index-out-of-bounds access + - SAUCE: mtd: spi-nor: Fix shift-out-of-bounds in spi_nor_set_erase_type + - SAUCE: Revert "fbdev: Make registered_fb[] private to fbmem.c" + - [Packaging] disable signing for ppc64el + - [Config] define CONFIG_SECURITY_APPARMOR_RESTRICT_USERNS + - SAUCE: Revert "arm64/fpsimd: Make kernel_neon_ API _GPL" + + -- Andrea Righi Tue, 07 Mar 2023 18:45:31 +0100 + +linux (6.2.0-0.0) lunar; urgency=medium + + * Empty entry + + -- Andrea Righi Fri, 03 Mar 2023 08:42:43 +0100 + +linux-unstable (6.2.0-10.10) lunar; urgency=medium + + * lunar/linux-unstable: 6.2.0-10.10 -proposed tracker (LP: #2007818) + + * Built-in camera device dies after runtime suspended (LP: #2007530) + - SAUCE: usb: xhci: Workaround for runpm issue on AMD xHC + + * Miscellaneous Ubuntu changes + - [Config] update annotations after rebase to v6.2 + + [ Upstream Kernel Changes ] + + * Rebase to v6.2 + + -- Andrea Righi Mon, 20 Feb 2023 10:36:20 +0100 + +linux-unstable (6.2.0-9.9) lunar; urgency=medium + + * lunar/linux-unstable: 6.2.0-9.9 -proposed tracker (LP: #2007069) + + * Move kernel ADT tests to python3 (LP: #2004429) + - [Debian] Use a python3 compatable kernel-testing repo + + * Mediatek FM350-GL wwan module failed to init: Invalid device status 0x1 + (LP: #2002089) + - SAUCE: Revert "net: wwan: t7xx: Add AP CLDMA" + - SAUCE: net: wwan: t7xx: Add AP CLDMA + - SAUCE: net: wwan: t7xx: Infrastructure for early port configuration + - SAUCE: net: wwan: t7xx: PCIe reset rescan + - SAUCE: net: wwan: t7xx: Enable devlink based fw flashing and coredump + collection + - SAUCE: net: wwan: t7xx: Devlink documentation + + * LXD containers using shiftfs on ZFS or TMPFS broken on 5.15.0-48.54 + (LP: #1990849) + - SAUCE: shiftfs: fix -EOVERFLOW inside the container + + * Miscellaneous Ubuntu changes + - [Packaging] annotations: do not drop undefined configs in derivatives + - [Packaging]: annotations: fix _remove_entry() logic + - [Packaging] rsync no longer available on lunar + - [Packaging] annotations: Handle single-line annoation rules + - [Packaging] annotations: Preserve single-line annotation rules + - [Packaging] annotations: Fix linter errors + - [Packaging] annotations: Clean up policy writes + - [Packaging] annotations: Handle tabs in annotations file + - [Packaging] annotations: Fail on invalid lines + - [Packaging] annotations: Write out annotations with notes first + - [Packaging] annotations: Check validity of FLAVOUR_DEP + - [Config] update annotations to split configs with/without notes + - [Packaging] annotations: various code cleanups + - [Config] update annotations after rebase to v6.2-rc8 + + * Miscellaneous upstream changes + - selftests/net: mv bpf/nat6to4.c to net folder + + [ Upstream Kernel Changes ] + + * Rebase to v6.1-rc8 + + -- Andrea Righi Mon, 13 Feb 2023 09:32:18 +0100 + +linux-unstable (6.2.0-8.8) lunar; urgency=medium + + * lunar/linux-unstable: 6.2.0-8.8 -proposed tracker (LP: #2004229) + + * Miscellaneous Ubuntu changes + - [Packaging] re-enable signing for ppc64el and s390x + - SAUCE: s390/decompressor: specify __decompress() buf len to avoid overflow + + -- Andrea Righi Tue, 31 Jan 2023 08:21:21 +0100 + +linux-unstable (6.2.0-7.7) lunar; urgency=medium + + * lunar/linux-unstable: 6.2.0-7.7 -proposed tracker (LP: #2004142) + + -- Andrea Righi Mon, 30 Jan 2023 10:23:15 +0100 + +linux-unstable (6.2.0-6.6) lunar; urgency=medium + + * lunar/linux-unstable: 6.2.0-6.6 -proposed tracker (LP: #2004138) + + * Miscellaneous Ubuntu changes + - [Packaging] debian/rules: Bring back 'editconfigs' + - [Packaging] debian/rules: 1-maintainer.mk -- Use make's if-else + - [Packaging] annotations: make sure to always drop undefined configs + - [Config] update annotations after rebase to v6.2-rc6 + + [ Upstream Kernel Changes ] + + * Rebase to v6.1-rc6 + + -- Andrea Righi Mon, 30 Jan 2023 09:20:26 +0100 + +linux-unstable (6.2.0-5.5) lunar; urgency=medium + + * lunar/linux-unstable: 6.2.0-5.5 -proposed tracker (LP: #2003682) + + * [23.04] Kernel 6.2 does not boot on s390x (LP: #2003348) + - SAUCE Revert "zstd: import usptream v1.5.2" + - SAUCE: Revert "zstd: Move zstd-common module exports to + zstd_common_module.c" + + * Revoke & rotate to new signing key (LP: #2002812) + - [Packaging] Revoke and rotate to new signing key + + * CVE-2023-0179 + - netfilter: nft_payload: incorrect arithmetics when fetching VLAN header bits + + * [23.04] net/smc: Alibaba patches about tunable buffer sizes may cause errors + and need to be removed (kernel 6.2) (LP: #2003547) + - SAUCE: Revert "net/smc: Unbind r/w buffer size from clcsock and make them + tunable" + - SAUCE: Revert "net/smc: Introduce a specific sysctl for TEST_LINK time" + + * 5.15 stuck at boot on c4.large (LP: #1956780) + - SAUCE: Revert "PCI/MSI: Mask MSI-X vectors only on success" + + * Miscellaneous Ubuntu changes + - [Packaging] scripts/misc/kernelconfig: Disable config checks for mainline + builds + - [Packaging] annotations: add CONFIG_GCC_VERSION to the list of ignored + configs + + -- Andrea Righi Mon, 23 Jan 2023 08:20:26 +0100 + +linux-unstable (6.2.0-4.4) lunar; urgency=medium + + * lunar/linux-unstable: 6.2.0-4.4 -proposed tracker (LP: #2003051) + + * Miscellaneous Ubuntu changes + - [Packaging] add python3 as a build dependency + - [Packaging] scripts/misc/kernelconfig: Rewrite + + -- Andrea Righi Tue, 17 Jan 2023 09:18:54 +0100 + +linux-unstable (6.2.0-3.3) lunar; urgency=medium + + * lunar/linux-unstable: 6.2.0-3.3 -proposed tracker (LP: #2002939) + + * Enable kernel config for P2PDMA (LP: #1987394) + - [Config] Enable CONFIG_HSA_AMD_P2P + + * Miscellaneous Ubuntu changes + - SAUCE: (no-up) Remove obj- += foo.o hack + - SAUCE: (no-up) re-add ubuntu/ directory + - [Config] enable EFI handover protocol + - [Packaging] Fix module-check error when modules are compressed + - SAUCE: (no-up) do not remove debian directory by 'make mrproper' + - [Packaging] debian/rules: Drop AUTOBUILD + - [Packaging] debian/rules: Drop NOKERNLOG and PRINTSHAS env variables + - [Packaging] debian/rules: Replace skip variables with skip_checks + - [Packaging] checks/retpoline-check: Make 'skipretpoline' argument optional + - [Packaging] checks/module-signature-check: Add 'skip_checks' argument + - [Packaging] debian/rules: Rename 'skip_dbg' to 'do_dbgsym_package' + - [Packaging] debian/rules: Rename 'skip_checks' to 'do_skip_checks' + - [Packaging] debian/rules: Rename 'full_build' to 'do_full_build' + - [Packaging] debian/rules: Fix PPA debug package builds + - [Packaging] debian/rules: Remove debug package install directory earlier + - [Packaging] debian/rules: Remove unnecessary 'lockme_' variables + - [Packaging] debian/rules: Remove unused target 'diffupstream' + - [Packaging] debian/rules: Mark PHONY targets individually + - [Packaging] debian/rules: Clean up 'help' target output + - [Packaging] debian/rules: Clean up 'printenv' target output + - [Packaging] debian/rules: Add missing 'do_' variables to 'printenv' + - [Config] update annotations after rebase to v6.2-rc4 + + [ Upstream Kernel Changes ] + + * Rebase to v6.1-rc4 + + -- Andrea Righi Mon, 16 Jan 2023 16:01:40 +0100 + +linux-unstable (6.2.0-2.2) lunar; urgency=medium + + * lunar/linux-unstable: 6.2.0-2.2 -proposed tracker (LP: #2001892) + + * Soundwire support for the Intel RPL Gen 0C40/0C11 platforms (LP: #2000030) + - SAUCE: ASoC: Intel: soc-acpi: add configuration for variant of 0C40 product + - SAUCE: ASoC: Intel: soc-acpi: add configuration for variant of 0C11 product + + * Miscellaneous Ubuntu changes + - [Config] update toolchain version in annotations + + * Miscellaneous upstream changes + - Revert "UBUNTU: [Packaging] Support skipped dkms modules" + + [ Upstream Kernel Changes ] + + * Rebase to v6.1-rc2 + + -- Andrea Righi Thu, 05 Jan 2023 09:19:55 +0100 + +linux-unstable (6.2.0-1.1) lunar; urgency=medium + + * lunar/linux-unstable: 6.2.0-1.1 -proposed tracker (LP: #2000904) + + * Packaging resync (LP: #1786013) + - [Packaging] update variants + + * Miscellaneous Ubuntu changes + - [Packaging] annotations: remove configs that are undefined across all + arches/flavours + - SAUCE: Revert "apparmor: make __aa_path_perm() static" + - [Packaging] abi-check: ignore failures when abi check is skipped + - [Packaging] temporarily disable zfs dkms + - [Config] update annotations after rebase to 6.2-rc1 + + [ Upstream Kernel Changes ] + + * Rebase to v6.1-rc1 + + -- Andrea Righi Wed, 04 Jan 2023 12:08:32 +0100 + +linux-unstable (6.2.0-0.0) lunar; urgency=medium + + * Empty entry + + -- Andrea Righi Sun, 01 Jan 2023 10:16:00 +0100 + +linux (6.1.0-11.11) lunar; urgency=medium + + * lunar/linux: 6.1.0-11.11 -proposed tracker (LP: #2000704) + + * Packaging resync (LP: #1786013) + - [Packaging] update helper scripts + + * Lunar update: v6.1.1 upstream stable release (LP: #2000706) + - x86/vdso: Conditionally export __vdso_sgx_enter_enclave() + - libbpf: Fix uninitialized warning in btf_dump_dump_type_data + - PCI: mt7621: Add sentinel to quirks table + - mips: ralink: mt7621: define MT7621_SYSC_BASE with __iomem + - mips: ralink: mt7621: soc queries and tests as functions + - mips: ralink: mt7621: do not use kzalloc too early + - irqchip/ls-extirq: Fix endianness detection + - udf: Discard preallocation before extending file with a hole + - udf: Fix preallocation discarding at indirect extent boundary + - udf: Do not bother looking for prealloc extents if i_lenExtents matches + i_size + - udf: Fix extending file within last block + - usb: gadget: uvc: Prevent buffer overflow in setup handler + - USB: serial: option: add Quectel EM05-G modem + - USB: serial: cp210x: add Kamstrup RF sniffer PIDs + - USB: serial: f81232: fix division by zero on line-speed change + - USB: serial: f81534: fix division by zero on line-speed change + - xhci: Apply XHCI_RESET_TO_DEFAULT quirk to ADL-N + - staging: r8188eu: fix led register settings + - igb: Initialize mailbox message for VF reset + - usb: typec: ucsi: Resume in separate work + - usb: dwc3: pci: Update PCIe device ID for USB3 controller on CPU sub-system + for Raptor Lake + - cifs: fix oops during encryption + - KEYS: encrypted: fix key instantiation with user-provided data + - Linux 6.1.1 + + * Expose built-in trusted and revoked certificates (LP: #1996892) + - [Packaging] Expose built-in trusted and revoked certificates + + * Fix System cannot detect bluetooth after running suspend stress test + (LP: #1998727) + - wifi: rtw88: 8821c: enable BT device recovery mechanism + + * Gnome doesn't run smooth when performing normal usage with RPL-P CPU + (LP: #1998419) + - drm/i915/rpl-p: Add stepping info + + * Mute/mic LEDs no function on a HP platfrom (LP: #1998882) + - ALSA: hda/realtek: fix mute/micmute LEDs for a HP ProBook + + * Add additional Mediatek MT7922 BT device ID (LP: #1998885) + - Bluetooth: btusb: Add a new VID/PID 0489/e0f2 for MT7922 + + * Support Icicle Kit reference design v2022.10 (LP: #1993148) + - SAUCE: riscv: dts: microchip: Disable PCIe on the Icicle Kit + + * Add iommu passthrough quirk for Intel IPU6 on RaptorLake (LP: #1989041) + - SAUCE: iommu: intel-ipu: use IOMMU passthrough mode for Intel IPUs on Raptor + Lake + + * Enable Intel FM350 wwan CCCI driver port logging (LP: #1997686) + - net: wwan: t7xx: use union to group port type specific data + - net: wwan: t7xx: Add port for modem logging + + * TEE Support for CCP driver (LP: #1991608) + - crypto: ccp - Add support for TEE for PCI ID 0x14CA + + * Kinetic update: v5.19.17 upstream stable release (LP: #1994179) + - Revert "fs: check FMODE_LSEEK to control internal pipe splicing" + - kbuild: Add skip_encoding_btf_enum64 option to pahole + + * Kinetic update: v5.19.15 upstream stable release (LP: #1994078) + - Revert "clk: ti: Stop using legacy clkctrl names for omap4 and 5" + + * support independent clock and LED GPIOs for Intel IPU6 platforms + (LP: #1989046) + - SAUCE: platform/x86: int3472: support independent clock and LED GPIOs + + * Kernel livepatch support for for s390x (LP: #1639924) + - [Config] Enable EXPOLINE_EXTERN on s390x + + * Kinetic update: v5.19.7 upstream stable release (LP: #1988733) + - Revert "PCI/portdrv: Don't disable AER reporting in + get_port_device_capability()" + + * Kinetic update: v5.19.3 upstream stable release (LP: #1987345) + - Revert "mm: kfence: apply kmemleak_ignore_phys on early allocated pool" + + * Fix non-working e1000e device after resume (LP: #1951861) + - SAUCE: Revert "e1000e: Add polling mechanism to indicate CSME DPG exit" + + * Add additional Mediatek MT7921 WiFi/BT device IDs (LP: #1937004) + - SAUCE: Bluetooth: btusb: Add support for Foxconn Mediatek Chip + + * Fix system sleep on TGL systems with Intel ME (LP: #1919321) + - SAUCE: PCI: Serialize TGL e1000e PM ops + + * Fix broken e1000e device after S3 (LP: #1897755) + - SAUCE: e1000e: Increase polling timeout on MDIC ready bit + + * Fix unusable USB hub on Dell TB16 after S3 (LP: #1855312) + - SAUCE: USB: core: Make port power cycle a seperate helper function + - SAUCE: USB: core: Attempt power cycle port when it's in eSS.Disabled state + + * Set explicit CC in the headers package (LP: #1999750) + - [Packaging] Set explicit CC in the headers package + + * commit cf58599cded35cf4affed1e659c0e2c742d3fda7 seems to be missing in + kinetic master to remove "hio" reference from Makefile (LP: #1999556) + - SAUCE: remove leftover reference to ubuntu/hio driver + + * Miscellaneous Ubuntu changes + - [Packaging] kernelconfig: always complete all config checks + - [Packaging] annotations: unify same rule across all flavour within the same + arch + - [Config] annotations: compact annotations file + - [Config] disable EFI_ZBOOT + - SAUCE: input: i8042: fix section mismatch warning + - debian/dkms-versions -- re-enable zfs + - [Packaging] old-kernelconfig: update config-check path + - [Packaging] update getabis + - [Packaging] update Ubuntu.md + + * Miscellaneous upstream changes + - Revert "drm/i915/opregion: check port number bounds for SWSCI display power + state" + + -- Andrea Righi Fri, 30 Dec 2022 11:23:16 +0100 + +linux (6.1.0-10.10) lunar; urgency=medium + + * lunar/linux: 6.1.0-10.10 -proposed tracker (LP: #1999569) + + * Soundwire support for the Intel RPL Gen platforms (LP: #1997944) + - ASoC: Intel: sof_sdw: Add support for SKU 0C10 product + - ASoC: Intel: soc-acpi: add SKU 0C10 SoundWire configuration + - ASoC: Intel: sof_sdw: Add support for SKU 0C40 product + - ASoC: Intel: soc-acpi: add SKU 0C40 SoundWire configuration + - ASoC: Intel: sof_sdw: Add support for SKU 0C4F product + - ASoC: rt1318: Add RT1318 SDCA vendor-specific driver + - ASoC: intel: sof_sdw: add rt1318 codec support. + - ASoC: Intel: sof_sdw: Add support for SKU 0C11 product + - ASoC: Intel: soc-acpi: add SKU 0C11 SoundWire configuration + - SAUCE: ASoC: Intel: soc-acpi: update codec addr on 0C11/0C4F product + - [Config] enable CONFIG_SND_SOC_RT1318_SDW + + * Virtual GPU driver packaging regression (LP: #1996112) + - [Packaging] Reintroduce VM DRM drivers into modules + + -- Andrea Righi Tue, 13 Dec 2022 22:14:08 +0100 + +linux (6.1.0-9.9) lunar; urgency=medium + + * Empty entry (ABI bump) + + -- Andrea Righi Tue, 13 Dec 2022 21:31:08 +0100 + +linux (6.1.0-3.3) lunar; urgency=medium + + * lunar/linux: 6.1.0-3.3 -proposed tracker (LP: #1999534) + + * [DEP-8] Run ADT regression suite for lowlatency kernels Jammy and later + (LP: #1999528) + - [DEP-8] Fix regression suite to run on lowlatency + + * Miscellaneous Ubuntu changes + - [Packaging] annotations: do not add constraints on toolchain versions + + -- Andrea Righi Tue, 13 Dec 2022 16:45:59 +0100 + +linux (6.1.0-2.2) lunar; urgency=medium + + * lunar/linux: 6.1.0-2.2 -proposed tracker (LP: #1999411) + + * Miscellaneous Ubuntu changes + - [Packaging] annotations: do not enforce toolchain versions + + -- Andrea Righi Mon, 12 Dec 2022 17:05:59 +0100 + +linux (6.1.0-1.1) lunar; urgency=medium + + * lunar/linux: 6.1.0-1.1 -proposed tracker (LP: #1999373) + + * Packaging resync (LP: #1786013) + - [Packaging] update variants + + * Miscellaneous Ubuntu changes + - [Packaging] annotations: set and delete configs from command line + - [Packaging] migrateconfigs: ignore README.rst if it doesn't exist + - [Packaging] migrate-annotations: properly determine arches in derivatives + - [Packaging] annotations: allow to set note to config options directly + - [Packaging] annotations: assume --query as default command + - [Packaging] annotations: allow to query using CONFIG_ +# + +# Do not use make's built-in rules and variables +# (this increases performance and avoids hard-to-debug behaviour) +MAKEFLAGS += -rR + +# Allow to run debian/rules directly without root +export DEB_RULES_REQUIRES_ROOT := no + +.NOTPARALLEL: + +DEBIAN=$(shell awk -F= '($$1 == "DEBIAN") { print $$2 }' $(DEBIAN)/control.stub; + flavours="$(sort $(wildcard $(DEBIAN)/control.d/vars.*))";\ + for i in $$flavours; do \ + $(SHELL) $(DROOT)/scripts/control-create $$i "$(any_signed)" | \ + sed -e 's/PKGVER/$(release)/g' \ + -e 's/ABINUM/$(abinum)/g' \ + -e 's/SRCPKGNAME/$(src_pkg_name)/g' \ + -e 's/=HUMAN=/$(human_arch)/g' \ + -e 's/=SERIES=/$(series)/g' \ + >> $(DEBIAN)/control.stub; \ + done + +.PHONY: debian/control +debian/control: $(DEBIAN)/control.stub + cp $(DEBIAN)/control.stub debian/control + +debian/canonical-certs.pem: $(wildcard $(DROOT)/certs/*-all.pem) $(wildcard $(DROOT)/certs/*-$(arch).pem) $(wildcard $(DEBIAN)/certs/*-all.pem) $(wildcard $(DEBIAN)/certs/*-$(arch).pem) + for cert in $(sort $(notdir $^)); \ + do \ + for dir in $(DEBIAN) $(DROOT); \ + do \ + if [ -f "$$dir/certs/$$cert" ]; then \ + cat "$$dir/certs/$$cert"; \ + break; \ + fi; \ + done; \ + done >"$@" + +debian/canonical-revoked-certs.pem: $(wildcard $(DROOT)/revoked-certs/*-all.pem) $(wildcard $(DROOT)/revoked-certs/*-$(arch).pem) $(wildcard $(DEBIAN)/revoked-certs/*-all.pem) $(wildcard $(DEBIAN)/revoked-certs/*-$(arch).pem) + for cert in $(sort $(notdir $^)); \ + do \ + for dir in $(DEBIAN) $(DROOT); \ + do \ + if [ -f "$$dir/revoked-certs/$$cert" ]; then \ + cat "$$dir/revoked-certs/$$cert"; \ + break; \ + fi; \ + done; \ + done >"$@" --- linux-xilinx-6.8.0.orig/debian/rules.d/0-common-vars.mk +++ linux-xilinx-6.8.0/debian/rules.d/0-common-vars.mk @@ -0,0 +1,269 @@ +# Used when you need to 'escape' a comma. +comma = , +empty := +space := $(empty) $(empty) + +# +# The source package name will be the first token from $(DEBIAN)/changelog +# +src_pkg_name := $(shell dpkg-parsechangelog -l$(DEBIAN)/changelog -S source) + +# Get the series +series := $(shell dpkg-parsechangelog -l$(DEBIAN)/changelog -S distribution | sed -e 's/-\(security\|updates\|proposed\)$$//') + +# Get some version info +version := $(shell dpkg-parsechangelog -l$(DEBIAN)/changelog -S version) +revision ?= $(lastword $(subst -,$(space),$(version))) +release := $(patsubst %-$(revision),%,$(version)) + +prev_fullver ?= $(shell dpkg-parsechangelog -l$(DEBIAN)/changelog -o1 -c1 -S version) +prev_revision := $(lastword 0.0 $(subst -,$(space),$(prev_fullver))) + +# Get upstream version info +upstream_version := $(shell sed -n 's/^VERSION = \(.*\)$$/\1/p' Makefile) +upstream_patchlevel := $(shell sed -n 's/^PATCHLEVEL = \(.*\)$$/\1/p' Makefile) +upstream_tag := "v$(upstream_version).$(upstream_patchlevel)" + +# Get the kernels own extra version to be added to the release signature. +raw_kernelversion=$(shell make kernelversion) + +packages_enabled := $(shell dh_listpackages 2>/dev/null) +define if_package +$(if $(filter $(1),$(packages_enabled)),$(2)) +endef + +stamp = [ -d $(dir $@) ] || mkdir $(dir $@); touch $@ + +# +# do_full_build -- are we doing a full buildd style build, i.e., are we +# building in a PPA +# +ifeq ($(wildcard /CurrentlyBuilding),) + do_full_build ?= false +else + do_full_build ?= true +endif + +# +# The debug packages are ginormous, so you probably want to skip +# building them (as a developer). +# +do_dbgsym_package = true +ifeq ($(do_full_build),false) + do_dbgsym_package = false +endif +ifeq ($(filter $(DEB_BUILD_OPTIONS),noautodbgsym),noautodbgsym) + # Disable debug package builds if we're building in a PPA that has the + # 'Build debug symbols' option disabled + do_dbgsym_package = false +endif + +abinum := $(firstword $(subst .,$(space),$(revision))) +prev_abinum := $(firstword $(subst .,$(space),$(prev_revision))) +abi_release := $(release)-$(abinum) + +uploadnum := $(patsubst $(abinum).%,%,$(revision)) +ifneq ($(do_full_build),false) + uploadnum := $(uploadnum)-Ubuntu +endif + +DEB_HOST_MULTIARCH = $(shell dpkg-architecture -qDEB_HOST_MULTIARCH) +DEB_HOST_GNU_TYPE = $(shell dpkg-architecture -qDEB_HOST_GNU_TYPE) +DEB_BUILD_GNU_TYPE = $(shell dpkg-architecture -qDEB_BUILD_GNU_TYPE) +DEB_HOST_ARCH = $(shell dpkg-architecture -qDEB_HOST_ARCH) +DEB_BUILD_ARCH = $(shell dpkg-architecture -qDEB_BUILD_ARCH) + +# +# Detect invocations of the form 'fakeroot debian/rules binary arch=armhf' +# within an x86'en schroot. This only gets you part of the way since the +# packaging phase fails, but you can at least compile the kernel quickly. +# +arch := $(DEB_HOST_ARCH) +CROSS_COMPILE ?= $(DEB_HOST_GNU_TYPE)- + +# +# Set consistent toolchain +# If a given kernel wants to change this, they can do so via their own +# $(DEBIAN)/rules.d/hooks.mk and $(DEBIAN)/rules.d/$(arch).mk files +# +export gcc?=gcc-13 +GCC_BUILD_DEPENDS=\ $(gcc), $(gcc)-aarch64-linux-gnu [arm64] , $(gcc)-arm-linux-gnueabihf [armhf] , $(gcc)-powerpc64le-linux-gnu [ppc64el] , $(gcc)-riscv64-linux-gnu [riscv64] , $(gcc)-s390x-linux-gnu [s390x] , $(gcc)-x86-64-linux-gnu [amd64] , + +abidir := $(CURDIR)/$(DEBIAN)/__abi.current/$(arch) +commonconfdir := $(CURDIR)/$(DEBIAN)/config +archconfdir := $(CURDIR)/$(DEBIAN)/config/$(arch) +sharedconfdir := $(CURDIR)/debian.master/config +builddir := $(CURDIR)/debian/build +stampdir := $(CURDIR)/debian/stamps + +# +# The binary package name always starts with linux-image-$KVER-$ABI.$UPLOAD_NUM. There +# are places that you'll find linux-image hard coded, but I guess thats OK since the +# assumption that the binary package always starts with linux-image will never change. +# +bin_pkg_name_signed=linux-image-$(abi_release) +bin_pkg_name_unsigned=linux-image-unsigned-$(abi_release) +mods_pkg_name=linux-modules-$(abi_release) +mods_extra_pkg_name=linux-modules-extra-$(abi_release) +bldinfo_pkg_name=linux-buildinfo-$(abi_release) +hdrs_pkg_name=linux-headers-$(abi_release) +rust_pkg_name=$(src_pkg_name)-lib-rust-$(abi_release) +indep_hdrs_pkg_name=$(src_pkg_name)-headers-$(abi_release) +indep_lib_rust_pkg_name=$(src_pkg_name)-lib-rust-$(abi_release) + +# +# Similarly with the linux-source package, you need not build it as a developer. Its +# somewhat I/O intensive and utterly useless. +# +do_source_package=true +do_source_package_content=true +ifeq ($(do_full_build),false) +do_source_package_content=false +endif + +# common headers normally is built as an indep package, but may be arch +do_common_headers_indep=true + +# build tools +ifneq ($(wildcard $(CURDIR)/tools),) + ifeq ($(do_tools),) + ifneq ($(DEB_BUILD_GNU_TYPE),$(DEB_HOST_GNU_TYPE)) + do_tools=false + endif + endif + do_tools?=true +else + do_tools?=false +endif +tools_pkg_name=$(src_pkg_name)-tools-$(abi_release) +tools_common_pkg_name=linux-tools-common +tools_flavour_pkg_name=linux-tools-$(abi_release) +cloud_pkg_name=$(src_pkg_name)-cloud-tools-$(abi_release) +cloud_common_pkg_name=linux-cloud-tools-common +cloud_flavour_pkg_name=linux-cloud-tools-$(abi_release) +hosttools_pkg_name=linux-tools-host + +# The general flavour specific image package. +do_flavour_image_package=true + +# The general flavour specific header package. +do_flavour_header_package=true + +# DTBs +do_dtbs=false + +# ZSTD compressed kernel modules +do_zstd_ko=true +ifeq ($(series),jammy) +do_zstd_ko= +endif + +# Support parallel= in DEB_BUILD_OPTIONS (see #209008) +# +# These 2 environment variables set the -j value of the kernel build. For example, +# CONCURRENCY_LEVEL=16 fakeroot $(DEBIAN)/rules binary-debs +# or +# DEB_BUILD_OPTIONS=parallel=16 fakeroot $(DEBIAN)/rules binary-debs +# +# The default is to use the number of CPUs. +# +COMMA=, +DEB_BUILD_OPTIONS_PARA = $(subst parallel=,,$(filter parallel=%,$(subst $(COMMA), ,$(DEB_BUILD_OPTIONS)))) +ifneq (,$(DEB_BUILD_OPTIONS_PARA)) + CONCURRENCY_LEVEL := $(DEB_BUILD_OPTIONS_PARA) +endif + +ifeq ($(CONCURRENCY_LEVEL),) + # Check the environment + CONCURRENCY_LEVEL := $(shell echo $$CONCURRENCY_LEVEL) + # No? Then build with the number of CPUs on the host. + ifeq ($(CONCURRENCY_LEVEL),) + CONCURRENCY_LEVEL := $(shell expr `getconf _NPROCESSORS_ONLN` \* 1) + endif + # Oh hell, give 'em one + ifeq ($(CONCURRENCY_LEVEL),) + CONCURRENCY_LEVEL := 1 + endif +endif + +conc_level = -j$(CONCURRENCY_LEVEL) + +PYTHON ?= $(firstword $(wildcard /usr/bin/python3) $(wildcard /usr/bin/python2) $(wildcard /usr/bin/python)) + +HOSTCC ?= $(DEB_BUILD_GNU_TYPE)-$(gcc) + +# target_flavour is filled in for each step +kmake = make ARCH=$(build_arch) \ + CROSS_COMPILE=$(CROSS_COMPILE) \ + HOSTCC=$(HOSTCC) \ + CC=$(CROSS_COMPILE)$(gcc) \ + BINDGEN=bindgen-0.65 \ + KERNELRELEASE=$(abi_release)-$(target_flavour) \ + CONFIG_DEBUG_SECTION_MISMATCH=y \ + KBUILD_BUILD_VERSION="$(uploadnum)" \ + CFLAGS_MODULE="-DPKG_ABI=$(abinum)" \ + PYTHON=$(PYTHON) +ifneq ($(LOCAL_ENV_CC),) +kmake += CC="$(LOCAL_ENV_CC)" DISTCC_HOSTS="$(LOCAL_ENV_DISTCC_HOSTS)" +endif + +# Locking is required in parallel builds to prevent loss of contents +# of the debian/files. +lockme = flock -w 60 $(CURDIR)/debian/.LOCK + +# Don't fail if a link already exists. +LN = ln -sf + +# Checks if a var is overriden by the custom rules. Called with var and +# flavour as arguments. +custom_override = $(or $($(1)_$(2)),$($(1))) + +# selftests that Ubuntu cares about +ubuntu_selftests = breakpoints cpu-hotplug efivarfs memfd memory-hotplug mount net ptrace seccomp timers powerpc user ftrace + +# DKMS +all_dkms_modules = + +subst_paired = $(subst $(firstword $(subst =, ,$(1))),$(lastword $(subst =, ,$(1))),$(2)) +recursive_call = $(if $(2),$(call recursive_call,$(1),$(wordlist 2,$(words $(2)),$(2)),$(call $(1),$(firstword $(2)),$(3))),$(3)) + +$(foreach _line,$(shell gawk '{ OFS = "!"; $$1 = $$1; print }' $(DEBIAN)/dkms-versions), \ + $(eval _params = $(subst !, ,$(_line))) \ + $(eval _deb_pkgname = $(firstword $(_params))) \ + $(eval _deb_version = $(word 2,$(_params))) \ + $(if $(filter modulename=%,$(_params)), \ + $(eval _m = $(word 2,$(subst =, ,$(filter modulename=%,$(_params))))) \ + , \ + $(info modulename for $(_deb_pkgname) not specified in dkms-versions. Assume $(_deb_pkgname).) \ + $(eval _m = $(_deb_pkgname)) \ + ) \ + $(eval all_dkms_modules += $(_m)) \ + $(eval dkms_$(_m)_version = $(_deb_version)) \ + $(foreach _p,$(patsubst debpath=%,%,$(filter debpath=%,$(_params))), \ + $(eval dkms_$(_m)_debpath += $(strip \ + $(call recursive_call,subst_paired, \ + %module%=$(_m) \ + %package%=$(_deb_pkgname) \ + %version%=$(lastword $(subst :, ,$(_deb_version))) \ + , \ + $(_p) \ + ) \ + )) \ + ) \ + $(if $(dkms_$(_m)_debpath),,$(error debpath for $(_deb_pkgname) not specified.)) \ + $(if $(filter arch=%,$(_params)), \ + $(eval dkms_$(_m)_archs = $(patsubst arch=%,%,$(filter arch=%,$(_params)))) \ + , \ + $(eval dkms_$(_m)_archs = any) \ + ) \ + $(eval dkms_$(_m)_rprovides = $(patsubst rprovides=%,%,$(filter rprovides=%,$(_params)))) \ + $(eval dkms_$(_m)_type = $(word 1,$(patsubst type=%,%,$(filter type=%,$(_params))) built-in)) \ + $(eval all_$(dkms_$(_m)_type)_dkms_modules += $(_m)) \ + $(if $(filter standalone,$(dkms_$(_m)_type)), \ + $(eval dkms_$(_m)_pkg_name = linux-modules-$(_m)-$(abi_release)) \ + $(eval dkms_$(_m)_subdir = ubuntu) \ + , \ + $(eval dkms_$(_m)_pkg_name = $(mods_pkg_name)) \ + $(eval dkms_$(_m)_subdir = kernel) \ + ) \ +) --- linux-xilinx-6.8.0.orig/debian/rules.d/1-maintainer.mk +++ linux-xilinx-6.8.0/debian/rules.d/1-maintainer.mk @@ -0,0 +1,135 @@ +# The following targets are for the maintainer only! do not run if you don't +# know what they do. + +.PHONY: help +help: + @echo "These are the targets in addition to the normal $(DEBIAN) ones:" + @echo + @echo " printenv : Print some variables used in the build" + @echo " updateconfigs : Update core arch configs" + @echo " defaultconfigs : Update core arch configs using defaults" + @echo " genconfigs : Generate core arch configs in CONFIGS/*" + @echo " editconfigs : Edit core arch configs" + @echo " printchanges : Print the current changelog entries (from git)" + @echo " insertchanges : Insert current changelog entries (from git)" + @echo " compileselftests : Only compile the selftests listed on ubuntu_selftests variable" + @echo " runselftests : Run the selftests listed on ubuntu_selftests variable" + @echo + @echo "Environment variables:" + @echo + @echo " CONCURRENCY_LEVEL=X : Use -jX for kernel compile" + +.PHONY: printdebian +printdebian: + @echo "$(DEBIAN)" + +configs-targets := updateconfigs defaultconfigs genconfigs editconfigs + +.PHONY: $(configs-targets) +$(configs-targets): + dh_testdir + kmake='$(kmake)' skip_checks=$(do_skip_checks) conc_level=$(conc_level) \ + $(SHELL) $(DROOT)/scripts/misc/kernelconfig $@ + +.PHONY: printenv +printenv: + @dh_testdir + @echo "src_pkg_name = $(src_pkg_name)" + @echo "series = $(series)" + @echo "release = $(release)" + @echo "revision = $(revision)" + @echo "uploadnum = $(uploadnum)" + @echo "prev_revision = $(prev_revision)" + @echo "abinum = $(abinum)" + @echo "upstream_tag = $(upstream_tag)" + @echo "flavours = $(flavours)" + @echo "bin_pkg_name = $(bin_pkg_name)" + @echo "hdr_pkg_name = $(hdrs_pkg_name)" + @echo "rust_pkg_name = $(rust_pkg_name)" + @echo "ubuntu_selftests = $(ubuntu_selftests)" + @echo "arch = $(arch)" + @echo "kmake = $(kmake)" + @echo + @echo "CONCURRENCY_LEVEL = $(CONCURRENCY_LEVEL)" + @echo "DEB_HOST_GNU_TYPE = $(DEB_HOST_GNU_TYPE)" + @echo "DEB_BUILD_GNU_TYPE = $(DEB_BUILD_GNU_TYPE)" + @echo "DEB_HOST_ARCH = $(DEB_HOST_ARCH)" + @echo "DEB_BUILD_ARCH = $(DEB_BUILD_ARCH)" + @echo + @echo "any_signed = $(any_signed)" + @echo " uefi_signed = $(uefi_signed)" + @echo " opal_signed = $(opal_signed)" + @echo " sipl_signed = $(sipl_signed)" + @echo + @echo "do_skip_checks = $(do_skip_checks)" + @echo "do_full_build = $(do_full_build)" + @echo "do_mainline_build = $(do_mainline_build)" + @echo "do_dbgsym_package = $(do_dbgsym_package)" + @echo "do_dtbs = $(do_dtbs)" + @echo "do_source_package = $(do_source_package)" + @echo "do_source_package_content = $(do_source_package_content)" + @echo "do_extras_package = $(do_extras_package)" + @echo "do_flavour_image_package = $(do_flavour_image_package)" + @echo "do_flavour_header_package = $(do_flavour_header_package)" + @echo "do_common_headers_indep = $(do_common_headers_indep)" + @echo "do_lib_rust = $(do_lib_rust)" + @echo "do_tools = $(do_tools)" + @echo "do_tools_common = $(do_tools_common)" + @echo "do_any_tools = $(do_any_tools)" + @echo "do_linux_tools = $(do_linux_tools)" + @echo " do_tools_acpidbg = $(do_tools_acpidbg)" + @echo " do_tools_bpftool = $(do_tools_bpftool)" + @echo " do_tools_cpupower = $(do_tools_cpupower)" + @echo " do_tools_host = $(do_tools_host)" + @echo " do_tools_perf = $(do_tools_perf)" + @echo " do_tools_perf_jvmti = $(do_tools_perf_jvmti)" + @echo " do_tools_perf_python = $(do_tools_perf_python)" + @echo " do_tools_usbip = $(do_tools_usbip)" + @echo " do_tools_x86 = $(do_tools_x86)" + @echo "do_cloud_tools = $(do_cloud_tools)" + @echo " do_tools_hyperv = $(do_tools_hyperv)" + @echo + @echo "all_dkms_modules = $(all_dkms_modules)" + @$(foreach mod,$(all_dkms_modules),$(foreach var,$(do_$(mod)),\ + printf " %-24s = %s\n" "do_$(mod)" "$(var)";)) + +.PHONY: printchanges +printchanges: + @baseCommit=$$(git log --pretty=format:'%H %s' | \ + gawk '/UBUNTU: '".*Ubuntu-.*`echo $(prev_fullver) | sed 's/+/\\\\+/'`"'(~.*)?$$/ { print $$1; exit }'); \ + if [ -z "$$baseCommit" ]; then \ + echo "WARNING: couldn't find a commit for the previous version. Using the lastest one." >&2; \ + baseCommit=$$(git log --pretty=format:'%H %s' | \ + gawk '/UBUNTU:\s*Ubuntu-.*$$/ { print $$1; exit }'); \ + fi; \ + git log "$$baseCommit"..HEAD | \ + $(DROOT)/scripts/misc/git-ubuntu-log + +.PHONY: insertchanges +insertchanges: autoreconstruct finalchecks + $(DROOT)/scripts/misc/insert-changes $(DROOT) $(DEBIAN) + +.PHONY: autoreconstruct +autoreconstruct: + # No need for reconstruct for -rc kernels since we don't upload an + # orig tarball, so just remove it. + if grep -q "^EXTRAVERSION = -rc[0-9]\+$$" Makefile; then \ + echo "exit 0" >$(DEBIAN)/reconstruct; \ + else \ + $(DROOT)/scripts/misc/gen-auto-reconstruct $(upstream_tag) $(DEBIAN)/reconstruct $(DROOT)/source/options; \ + fi + +.PHONY: finalchecks +finalchecks: debian/control + $(DROOT)/scripts/checks/final-checks "$(DEBIAN)" "$(prev_fullver)" $(do_skip_checks) + +.PHONY: compileselftests +compileselftests: + # a loop is needed here to fail on errors + for test in $(ubuntu_selftests); do \ + $(kmake) -C tools/testing/selftests TARGETS="$$test"; \ + done; + +.PHONY: runselftests +runselftests: + $(kmake) -C tools/testing/selftests TARGETS="$(ubuntu_selftests)" run_tests --- linux-xilinx-6.8.0.orig/debian/rules.d/2-binary-arch.mk +++ linux-xilinx-6.8.0/debian/rules.d/2-binary-arch.mk @@ -0,0 +1,798 @@ +# We don't want make removing intermediary stamps +.SECONDARY : + +# TODO this is probably wrong, and should be using $(DEB_HOST_MULTIARCH) +shlibdeps_opts = $(if $(CROSS_COMPILE),-- -l$(CROSS_COMPILE:%-=/usr/%)/lib) + +debian/scripts/fix-filenames: debian/scripts/fix-filenames.c + $(HOSTCC) $^ -o $@ + +$(stampdir)/stamp-prepare-%: config-prepare-check-% + @echo Debug: $@ + $(stamp) + +$(stampdir)/stamp-prepare-tree-%: target_flavour = $* +$(stampdir)/stamp-prepare-tree-%: debian/scripts/fix-filenames + @echo Debug: $@ + install -d $(builddir)/build-$* + touch $(builddir)/build-$*/ubuntu-build + python3 debian/scripts/misc/annotations --export --arch $(arch) --flavour $(target_flavour) > $(builddir)/build-$*/.config + sed -i 's/.*CONFIG_VERSION_SIGNATURE.*/CONFIG_VERSION_SIGNATURE="Ubuntu $(release)-$(revision)-$* $(raw_kernelversion)"/' $(builddir)/build-$*/.config + find $(builddir)/build-$* -name "*.ko" | xargs rm -f + $(kmake) O=$(builddir)/build-$* $(conc_level) rustavailable || true + $(kmake) O=$(builddir)/build-$* $(conc_level) olddefconfig + $(stamp) + +# Used by developers as a shortcut to prepare a tree for compilation. +prepare-%: $(stampdir)/stamp-prepare-% + @echo Debug: $@ +# Used by developers to allow efficient pre-building without fakeroot. +build-%: $(stampdir)/stamp-install-% + @echo Debug: $@ + +# Do the actual build, including image and modules +$(stampdir)/stamp-build-%: target_flavour = $* +$(stampdir)/stamp-build-%: bldimg = $(call custom_override,build_image,$*) +$(stampdir)/stamp-build-%: $(stampdir)/stamp-prepare-% + @echo Debug: $@ build_image $(build_image) bldimg $(bldimg) + $(kmake) O=$(builddir)/build-$* $(conc_level) $(bldimg) modules $(if $(filter true,$(do_dtbs)),dtbs) + +ifeq ($(do_dbgsym_package),true) + # The target scripts_gdb is part of "all", so we need to call it manually + if grep -q CONFIG_GDB_SCRIPTS=y $(builddir)/build-$*/.config; then \ + $(kmake) O=$(builddir)/build-$* $(conc_level) scripts_gdb ; \ + fi +endif + + # Collect the list of kernel source files used for this build. Need to do this early before + # modules are stripped. Fail if the resulting file is empty. + find $(builddir)/build-$* -name vmlinux -o -name \*.ko -exec dwarfdump -i {} \; | \ + grep -E 'DW_AT_(call|decl)_file' | sed -n 's|.*\s/|/|p' | sort -u > \ + $(builddir)/build-$*/sources.list + test -s $(builddir)/build-$*/sources.list + + $(stamp) + +define build_dkms_sign = + $(shell set -x; if grep -q CONFIG_MODULE_SIG=y $(1)/.config; then + echo $(1)/scripts/sign-file $(MODHASHALGO) $(MODSECKEY) $(MODPUBKEY); + else + echo "-"; + fi + ) +endef +define build_dkms = + rc=0; unset MAKEFLAGS; ARCH=$(build_arch) CROSS_COMPILE=$(CROSS_COMPILE) $(SHELL) $(DROOT)/scripts/dkms-build $(dkms_dir) $(abi_release)-$* '$(call build_dkms_sign,$(builddir)/build-$*)' $(1) $(2) $(3) $(4) $(5) || rc=$$?; if [ "$$rc" = "9" -o "$$rc" = "77" ]; then echo do_$(4)_$*=false >> $(builddir)/skipped-dkms.mk; rc=0; fi; if [ "$$rc" != "0" ]; then exit $$rc; fi +endef + +define install_control = + for which in $(3); \ + do \ + template="$(DROOT)/templates/$(2).$$which.in"; \ + script="$(DROOT)/$(1).$$which"; \ + sed -e 's/@abiname@/$(abi_release)/g' \ + -e 's/@localversion@/-$*/g' \ + -e 's/@image-stem@/$(instfile)/g' \ + <"$$template" >"$$script"; \ + done +endef + +# Ensure the directory prefix is exactly 140 characters long so pathnames are the +# exact same length in any binary files produced by the builds. These will be +# commonised later. +dkms_20d=.................... +dkms_140d=$(dkms_20d)$(dkms_20d)$(dkms_20d)$(dkms_20d)$(dkms_20d)$(dkms_20d)$(dkms_20d) +dkms_140c=$(shell echo '$(dkms_140d)' | sed -e 's/\./_/g') +define dkms_dir_prefix = +$(shell echo $(1)/$(dkms_140c) | \ + sed -e 's/\($(dkms_140d)\).*/\1/' -e 's/^\(.*\)....$$/\1dkms/') +endef + +# Install the finished build +$(stampdir)/stamp-install-%: pkgdir_bin = $(CURDIR)/debian/$(bin_pkg_name)-$* +$(stampdir)/stamp-install-%: pkgdir = $(CURDIR)/debian/$(mods_pkg_name)-$* +$(stampdir)/stamp-install-%: pkgdir_ex = $(CURDIR)/debian/$(mods_extra_pkg_name)-$* +$(stampdir)/stamp-install-%: pkgdir_bldinfo = $(CURDIR)/debian/$(bldinfo_pkg_name)-$* +$(stampdir)/stamp-install-%: bindoc = $(pkgdir)/usr/share/doc/$(bin_pkg_name)-$* +$(stampdir)/stamp-install-%: dbgpkgdir = $(CURDIR)/debian/$(bin_pkg_name)-$*-dbgsym +$(stampdir)/stamp-install-%: signingv = $(CURDIR)/debian/$(bin_pkg_name)-signing/$(release)-$(revision) +$(stampdir)/stamp-install-%: toolspkgdir = $(CURDIR)/debian/$(tools_flavour_pkg_name)-$* +$(stampdir)/stamp-install-%: cloudpkgdir = $(CURDIR)/debian/$(cloud_flavour_pkg_name)-$* +$(stampdir)/stamp-install-%: basepkg = $(hdrs_pkg_name) +$(stampdir)/stamp-install-%: baserustpkg = $(rust_pkg_name) +$(stampdir)/stamp-install-%: indeppkg = $(indep_hdrs_pkg_name) +$(stampdir)/stamp-install-%: kernfile = $(call custom_override,kernel_file,$*) +$(stampdir)/stamp-install-%: instfile = $(call custom_override,install_file,$*) +$(stampdir)/stamp-install-%: hdrdir = $(CURDIR)/debian/$(basepkg)-$*/usr/src/$(basepkg)-$* +$(stampdir)/stamp-install-%: rustdir = $(CURDIR)/debian/$(baserustpkg)-$*/usr/src/$(baserustpkg)-$* +$(stampdir)/stamp-install-%: target_flavour = $* +$(stampdir)/stamp-install-%: MODHASHALGO=sha512 +$(stampdir)/stamp-install-%: MODSECKEY=$(builddir)/build-$*/certs/signing_key.pem +$(stampdir)/stamp-install-%: MODPUBKEY=$(builddir)/build-$*/certs/signing_key.x509 +$(stampdir)/stamp-install-%: build_dir=$(builddir)/build-$* +$(stampdir)/stamp-install-%: dkms_dir=$(call dkms_dir_prefix,$(builddir)/build-$*) +$(foreach _m,$(all_dkms_modules), \ + $(eval $$(stampdir)/stamp-install-%: enable_$(_m) = $$(filter true,$$(call custom_override,do_$(_m),$$*))) \ + $(eval $$(stampdir)/stamp-install-%: dkms_$(_m)_pkgdir = $$(CURDIR)/debian/$(dkms_$(_m)_pkg_name)-$$*) \ +) +$(stampdir)/stamp-install-%: dbgpkgdir_dkms = $(if $(filter true,$(do_dbgsym_package)),$(dbgpkgdir)/usr/lib/debug/lib/modules/$(abi_release)-$*/kernel,"") +$(stampdir)/stamp-install-%: $(stampdir)/stamp-build-% $(stampdir)/stamp-install-headers + @echo Debug: $@ kernel_file $(kernel_file) kernfile $(kernfile) install_file $(install_file) instfile $(instfile) + dh_testdir + dh_prep -p$(bin_pkg_name)-$* + dh_prep -p$(mods_pkg_name)-$* + dh_prep -p$(hdrs_pkg_name)-$* +ifeq ($(do_lib_rust),true) + dh_prep -p$(rust_pkg_name)-$* +endif + $(foreach _m,$(all_standalone_dkms_modules), \ + $(if $(enable_$(_m)),dh_prep -p$(dkms_$(_m)_pkg_name)-$*;)\ + ) +ifeq ($(do_dbgsym_package),true) + dh_prep -p$(bin_pkg_name)-$*-dbgsym +endif +ifeq ($(do_extras_package),true) + dh_prep -p$(mods_extra_pkg_name)-$* +endif + + # The main image + # compress_file logic required because not all architectures + # generate a zImage automatically out of the box +ifeq ($(compress_file),) + install -m600 -D $(builddir)/build-$*/$(kernfile) \ + $(pkgdir_bin)/boot/$(instfile)-$(abi_release)-$* +else + install -d $(pkgdir_bin)/boot + gzip -c9v $(builddir)/build-$*/$(kernfile) > \ + $(pkgdir_bin)/boot/$(instfile)-$(abi_release)-$* + chmod 600 $(pkgdir_bin)/boot/$(instfile)-$(abi_release)-$* +endif + install -d $(pkgdir)/boot + install -m644 $(builddir)/build-$*/.config \ + $(pkgdir)/boot/config-$(abi_release)-$* + install -m600 $(builddir)/build-$*/System.map \ + $(pkgdir)/boot/System.map-$(abi_release)-$* + +ifeq ($(do_dtbs),true) + $(kmake) O=$(builddir)/build-$* $(conc_level) dtbs_install \ + INSTALL_DTBS_PATH=$(pkgdir)/lib/firmware/$(abi_release)-$*/device-tree +endif + +ifeq ($(no_dumpfile),) + makedumpfile -g $(pkgdir)/boot/vmcoreinfo-$(abi_release)-$* \ + -x $(builddir)/build-$*/vmlinux + chmod 0600 $(pkgdir)/boot/vmcoreinfo-$(abi_release)-$* +endif + + $(kmake) O=$(builddir)/build-$* $(conc_level) modules_install $(vdso) \ + INSTALL_MOD_STRIP=1 INSTALL_MOD_PATH=$(pkgdir) + + # + # Build module blacklists: + # - blacklist all watchdog drivers (LP:1432837) + # + install -d $(pkgdir)/lib/modprobe.d + echo "# Kernel supplied blacklist for $(src_pkg_name) $(abi_release)-$* $(arch)" \ + >$(pkgdir)/lib/modprobe.d/blacklist_$(src_pkg_name)_$(abi_release)-$*.conf + for conf in $(arch)-$* $(arch) common.conf; do \ + if [ -f $(DEBIAN)/modprobe.d/$$conf ]; then \ + echo "# modprobe.d/$$conf"; \ + cat $(DEBIAN)/modprobe.d/$$conf; \ + fi; \ + done >>$(pkgdir)/lib/modprobe.d/blacklist_$(src_pkg_name)_$(abi_release)-$*.conf + echo "# Autogenerated watchdog blacklist" \ + >>$(pkgdir)/lib/modprobe.d/blacklist_$(src_pkg_name)_$(abi_release)-$*.conf + ls -1 $(pkgdir)/lib/modules/$(abi_release)-$*/kernel/drivers/watchdog/ | \ + grep -v '^bcm2835_wdt$$' | \ + sed -e 's/^/blacklist /' -e 's/.ko$$//' | \ + sort -u \ + >>$(pkgdir)/lib/modprobe.d/blacklist_$(src_pkg_name)_$(abi_release)-$*.conf + +ifeq ($(do_extras_package),true) + # + # Remove all modules not in the inclusion list. + # + if [ -f $(DEBIAN)/control.d/$(target_flavour).inclusion-list ] ; then \ + /sbin/depmod -v -b $(pkgdir) $(abi_release)-$* | \ + sed -e "s@$(pkgdir)/lib/modules/$(abi_release)-$*/kernel/@@g" | \ + awk '{ print $$1 " " $$NF}' >$(build_dir)/module-inclusion.depmap; \ + mkdir -p $(pkgdir_ex)/lib/modules/$(abi_release)-$*; \ + mv $(pkgdir)/lib/modules/$(abi_release)-$*/kernel \ + $(pkgdir_ex)/lib/modules/$(abi_release)-$*/kernel; \ + $(SHELL) $(DROOT)/scripts/module-inclusion --master \ + $(pkgdir_ex)/lib/modules/$(abi_release)-$*/kernel \ + $(pkgdir)/lib/modules/$(abi_release)-$*/kernel \ + $(DEBIAN)/control.d/$(target_flavour).inclusion-list \ + $(build_dir)/module-inclusion.depmap 2>&1 | \ + tee $(target_flavour).inclusion-list.log; \ + /sbin/depmod -b $(pkgdir) -ea -F $(pkgdir)/boot/System.map-$(abi_release)-$* \ + $(abi_release)-$* 2>&1 |tee $(target_flavour).depmod.log; \ + if [ `grep -c 'unknown symbol' $(target_flavour).depmod.log` -gt 0 ]; then \ + echo "EE: Unresolved module dependencies in base package!"; \ + exit 1; \ + fi \ + fi +endif + +ifeq ($(no_dumpfile),) + makedumpfile -g $(pkgdir)/boot/vmcoreinfo-$(abi_release)-$* \ + -x $(builddir)/build-$*/vmlinux + chmod 0600 $(pkgdir)/boot/vmcoreinfo-$(abi_release)-$* +endif + rm -f $(pkgdir)/lib/modules/$(abi_release)-$*/build + rm -f $(pkgdir)/lib/modules/$(abi_release)-$*/source + + # Some initramfs-tools specific modules + install -d $(pkgdir)/lib/modules/$(abi_release)-$*/initrd + if [ -f $(pkgdir)/lib/modules/$(abi_release)-$*/kernel/drivers/video/vesafb.ko ]; then\ + $(LN) $(pkgdir)/lib/modules/$(abi_release)-$*/kernel/drivers/video/vesafb.ko \ + $(pkgdir)/lib/modules/$(abi_release)-$*/initrd/; \ + fi + + echo "interest linux-update-$(abi_release)-$*" >"$(DROOT)/$(bin_pkg_name)-$*.triggers" + install -d $(pkgdir_bin)/usr/lib/linux/triggers + $(call install_control,$(bin_pkg_name)-$*,image,postinst postrm preinst prerm) + install -d $(pkgdir)/usr/lib/linux/triggers + $(call install_control,$(mods_pkg_name)-$*,extra,postinst postrm) +ifeq ($(do_extras_package),true) + # Install the postinit/postrm scripts in the extras package. + if [ -f $(DEBIAN)/control.d/$(target_flavour).inclusion-list ] ; then \ + install -d $(pkgdir_ex)/usr/lib/linux/triggers; \ + $(call install_control,$(mods_extra_pkg_name)-$*,extra,postinst postrm); \ + fi +endif + $(foreach _m,$(all_standalone_dkms_modules), \ + $(if $(enable_$(_m)), \ + install -d $(dkms_$(_m)_pkgdir)/usr/lib/linux/triggers; \ + $(call install_control,$(dkms_$(_m)_pkg_name)-$*,extra,postinst postrm); \ + ) \ + ) + +ifeq ($(do_dbgsym_package),true) + # Debug image is simple + install -m644 -D $(builddir)/build-$*/vmlinux \ + $(dbgpkgdir)/usr/lib/debug/boot/vmlinux-$(abi_release)-$* + if [ -d $(builddir)/build-$*/scripts/gdb/linux ]; then \ + install -m644 -D $(builddir)/build-$*/vmlinux-gdb.py \ + $(dbgpkgdir)/usr/share/gdb/auto-load/boot/vmlinux-$(abi_release)-$*/vmlinuz-$(abi_release)-$*-gdb.py; \ + install -m644 -D $(builddir)/build-$*/scripts/gdb/linux/* \ + --target-directory=$(dbgpkgdir)/usr/share/gdb/auto-load/boot/vmlinux-$(abi_release)-$*/scripts/gdb/linux; \ + fi + $(kmake) O=$(builddir)/build-$* modules_install $(vdso) \ + INSTALL_MOD_PATH=$(dbgpkgdir)/usr/lib/debug + # Add .gnu_debuglink sections only after all/DKMS modules are built. + rm -f $(dbgpkgdir)/usr/lib/debug/lib/modules/$(abi_release)-$*/build + rm -f $(dbgpkgdir)/usr/lib/debug/lib/modules/$(abi_release)-$*/source + rm -f $(dbgpkgdir)/usr/lib/debug/lib/modules/$(abi_release)-$*/modules.* + rm -fr $(dbgpkgdir)/usr/lib/debug/lib/firmware +endif +ifeq ($(do_tools_bpftool),true) + cp $(builddir)/build-$*/vmlinux tools/bpf/bpftool/ +endif + + # The flavour specific headers image + # TODO: Would be nice if we didn't have to dupe the original builddir + install -d -m755 $(hdrdir) + cp $(builddir)/build-$*/.config $(hdrdir) + chmod 644 $(hdrdir)/.config + $(kmake) O=$(hdrdir) -j1 syncconfig prepare scripts + # Makefile may need per-arch-flavour CC settings, which are + # normally set via $(kmake) during build + rm -f $(hdrdir)/Makefile + cp -a $(indep_hdrdir)/Makefile $(hdrdir)/Makefile + sed -i 's|\(^HOSTCC = \)gcc$$|\1$(gcc)|' $(hdrdir)/Makefile + sed -i 's|\(^CC = $$(CROSS_COMPILE)\)gcc$$|\1$(gcc)|' $(hdrdir)/Makefile + # Quick check for successful substitutions + grep '^HOSTCC .*$(gcc)$$' $(hdrdir)/Makefile + grep '^CC .*$(gcc)$$' $(hdrdir)/Makefile + rm -rf $(hdrdir)/include2 $(hdrdir)/source + # Copy over the compilation version. + cp "$(builddir)/build-$*/include/generated/compile.h" \ + "$(hdrdir)/include/generated/compile.h" + # Add UTS_UBUNTU_RELEASE_ABI since UTS_RELEASE is difficult to parse. + echo "#define UTS_UBUNTU_RELEASE_ABI $(abinum)" >> $(hdrdir)/include/generated/utsrelease.h + # powerpc kernel arch seems to need some .o files for external module linking. Add them in. +ifeq ($(build_arch),powerpc) + mkdir -p $(hdrdir)/arch/powerpc/lib + cp $(builddir)/build-$*/arch/powerpc/lib/*.o $(hdrdir)/arch/powerpc/lib +endif +ifeq ($(build_arch),s390) + if [ -n "$$(find $(builddir)/build-$*/arch/s390/lib/expoline -maxdepth 1 -name '*.o' -print -quit)" ]; then \ + mkdir -p $(hdrdir)/arch/s390/lib/expoline/; \ + cp $(builddir)/build-$*/arch/s390/lib/expoline/*.o $(hdrdir)/arch/s390/lib/expoline/; \ + fi +endif + # Copy over scripts/module.lds for building external modules + cp $(builddir)/build-$*/scripts/module.lds $(hdrdir)/scripts + # Script to symlink everything up + $(SHELL) $(DROOT)/scripts/link-headers "$(hdrdir)" "$(indeppkg)" "$*" + # The build symlink + install -d debian/$(basepkg)-$*/lib/modules/$(abi_release)-$* + $(LN) /usr/src/$(basepkg)-$* \ + debian/$(basepkg)-$*/lib/modules/$(abi_release)-$*/build + # And finally the symvers + install -m644 $(builddir)/build-$*/Module.symvers \ + $(hdrdir)/Module.symvers + + # Now the header scripts + $(call install_control,$(hdrs_pkg_name)-$*,headers,postinst) + + # At the end of the package prep, call the tests + DPKG_ARCH="$(arch)" KERN_ARCH="$(build_arch)" FLAVOUR="$*" \ + VERSION="$(abi_release)" REVISION="$(revision)" \ + PREV_REVISION="$(prev_revision)" ABI_NUM="$(abinum)" \ + PREV_ABI_NUM="$(prev_abinum)" BUILD_DIR="$(builddir)/build-$*" \ + INSTALL_DIR="$(pkgdir)" SOURCE_DIR="$(CURDIR)" \ + run-parts -v $(DROOT)/tests-build + + # + # Remove files which are generated at installation by postinst, + # except for modules.order and modules.builtin + # + # NOTE: need to keep this list in sync with postrm + # + mkdir $(pkgdir)/lib/modules/$(abi_release)-$*/_ + mv $(pkgdir)/lib/modules/$(abi_release)-$*/modules.order \ + $(pkgdir)/lib/modules/$(abi_release)-$*/_ + if [ -f $(pkgdir)/lib/modules/$(abi_release)-$*/modules.builtin ] ; then \ + mv $(pkgdir)/lib/modules/$(abi_release)-$*/modules.builtin \ + $(pkgdir)/lib/modules/$(abi_release)-$*/_; \ + fi + if [ -f $(pkgdir)/lib/modules/$(abi_release)-$*/modules.builtin.modinfo ] ; then \ + mv $(pkgdir)/lib/modules/$(abi_release)-$*/modules.builtin.modinfo \ + $(pkgdir)/lib/modules/$(abi_release)-$*/_; \ + fi + rm -f $(pkgdir)/lib/modules/$(abi_release)-$*/modules.* + mv $(pkgdir)/lib/modules/$(abi_release)-$*/_/* \ + $(pkgdir)/lib/modules/$(abi_release)-$* + rmdir $(pkgdir)/lib/modules/$(abi_release)-$*/_ + +ifeq ($(do_linux_tools),true) + # Create the linux-tools tool links + install -d $(toolspkgdir)/usr/lib/linux-tools/$(abi_release)-$* +ifeq ($(do_tools_usbip),true) + $(LN) ../../$(src_pkg_name)-tools-$(abi_release)/usbip $(toolspkgdir)/usr/lib/linux-tools/$(abi_release)-$* + $(LN) ../../$(src_pkg_name)-tools-$(abi_release)/usbipd $(toolspkgdir)/usr/lib/linux-tools/$(abi_release)-$* +endif +ifeq ($(do_tools_acpidbg),true) + $(LN) ../../$(src_pkg_name)-tools-$(abi_release)/acpidbg $(toolspkgdir)/usr/lib/linux-tools/$(abi_release)-$* +endif +ifeq ($(do_tools_cpupower),true) + $(LN) ../../$(src_pkg_name)-tools-$(abi_release)/cpupower $(toolspkgdir)/usr/lib/linux-tools/$(abi_release)-$* +endif +ifeq ($(do_tools_rtla),true) + $(LN) ../../$(src_pkg_name)-tools-$(abi_release)/rtla $(toolspkgdir)/usr/lib/linux-tools/$(abi_release)-$* +endif +ifeq ($(do_tools_perf),true) + $(LN) ../../$(src_pkg_name)-tools-$(abi_release)/perf $(toolspkgdir)/usr/lib/linux-tools/$(abi_release)-$* +ifeq ($(do_tools_perf_jvmti),true) + $(LN) ../../$(src_pkg_name)-tools-$(abi_release)/libperf-jvmti.so $(toolspkgdir)/usr/lib/linux-tools/$(abi_release)-$* +endif +ifeq ($(do_tools_perf_python),true) + # Link the subdirectory that contains the .so rather than the file itself. Its name is + # pseudo-random and can't be determined easily and reliably. + $(LN) ../../$(src_pkg_name)-tools-$(abi_release)/lib $(toolspkgdir)/usr/lib/linux-tools/$(abi_release)-$* +endif +endif +ifeq ($(do_tools_bpftool),true) + $(LN) ../../$(src_pkg_name)-tools-$(abi_release)/bpftool $(toolspkgdir)/usr/lib/linux-tools/$(abi_release)-$* +endif +ifeq ($(do_tools_x86),true) + $(LN) ../../$(src_pkg_name)-tools-$(abi_release)/x86_energy_perf_policy $(toolspkgdir)/usr/lib/linux-tools/$(abi_release)-$* + $(LN) ../../$(src_pkg_name)-tools-$(abi_release)/turbostat $(toolspkgdir)/usr/lib/linux-tools/$(abi_release)-$* +endif +endif +ifeq ($(do_cloud_tools),true) +ifeq ($(do_tools_hyperv),true) + # Create the linux-hyperv tool links + install -d $(cloudpkgdir)/usr/lib/linux-tools/$(abi_release)-$* + $(LN) ../../$(src_pkg_name)-tools-$(abi_release)/hv_kvp_daemon $(cloudpkgdir)/usr/lib/linux-tools/$(abi_release)-$* + $(LN) ../../$(src_pkg_name)-tools-$(abi_release)/hv_vss_daemon $(cloudpkgdir)/usr/lib/linux-tools/$(abi_release)-$* + $(LN) ../../$(src_pkg_name)-tools-$(abi_release)/hv_fcopy_daemon $(cloudpkgdir)/usr/lib/linux-tools/$(abi_release)-$* + $(LN) ../../$(src_pkg_name)-tools-$(abi_release)/lsvmbus $(cloudpkgdir)/usr/lib/linux-tools/$(abi_release)-$* +endif +endif + + # Build a temporary "installed headers" directory. + install -d $(dkms_dir) $(dkms_dir)/headers $(dkms_dir)/build $(dkms_dir)/source + cp -rp "$(hdrdir)" "$(indep_hdrdir)" "$(dkms_dir)/headers" + + $(foreach _m,$(all_dkms_modules), \ + $(if $(enable_$(_m)), \ + $(call build_dkms,$(dkms_$(_m)_pkg_name)-$*,$(dkms_$(_m)_pkgdir)/lib/modules/$(abi_release)-$*/$(dkms_$(_m)_subdir),$(dbgpkgdir_dkms),$(_m),$(dkms_$(_m)_debpath)); \ + ) \ + ) + + +ifeq ($(do_dbgsym_package),true) + # Add .gnu_debuglink sections to each stripped .ko + # pointing to unstripped verson + find $(pkgdir) \ + $(if $(filter true,$(do_extras_package)),$(pkgdir_ex)) \ + -name '*.ko' | while read path_module ; do \ + module="/lib/modules/$${path_module#*/lib/modules/}"; \ + if [[ -f "$(dbgpkgdir)/usr/lib/debug/$$module" ]] ; then \ + while IFS= read -r -d '' signature < <(tail -c 28 "$$path_module"); do \ + break; \ + done; \ + $(CROSS_COMPILE)objcopy \ + --add-gnu-debuglink=$(dbgpkgdir)/usr/lib/debug/$$module \ + $$path_module; \ + if grep -q CONFIG_MODULE_SIG=y $(builddir)/build-$*/.config && \ + [ "$$signature" = $$'~Module signature appended~\n' ]; then \ + $(builddir)/build-$*/scripts/sign-file $(MODHASHALGO) \ + $(MODSECKEY) \ + $(MODPUBKEY) \ + $$path_module; \ + fi; \ + else \ + echo "WARNING: Missing debug symbols for module '$$module'."; \ + fi; \ + done +endif + + # Build the final ABI information. + install -d $(abidir) + sed -e 's/^\(.\+\)[[:space:]]\+\(.\+\)[[:space:]]\(.\+\)$$/\3 \2 \1/' \ + $(builddir)/build-$*/Module.symvers | sort > $(abidir)/$* + + # Build the final ABI modules information. + find $(pkgdir_bin) $(pkgdir) $(pkgdir_ex) \( -name '*.ko' -o -name '*.ko.*' \) | \ + sed -e 's/.*\/\([^\/]*\)\.ko.*/\1/' | sort > $(abidir)/$*.modules + + # Build the final ABI built-in modules information. + if [ -f $(pkgdir)/lib/modules/$(abi_release)-$*/modules.builtin ] ; then \ + sed -e 's/.*\/\([^\/]*\)\.ko/\1/' $(pkgdir)/lib/modules/$(abi_release)-$*/modules.builtin | \ + sort > $(abidir)/$*.modules.builtin; \ + fi + + # Build the final ABI firmware information. + find $(pkgdir_bin) $(pkgdir) $(pkgdir_ex) -name \*.ko | \ + while read ko; do \ + /sbin/modinfo $$ko | grep ^firmware || true; \ + done | sort -u >$(abidir)/$*.fwinfo + + # Build the final ABI built-in firmware information. + if [ -f $(pkgdir)/lib/modules/$(abi_release)-$*/modules.builtin.modinfo ] ; then \ + cat $(pkgdir)/lib/modules/$(abi_release)-$*/modules.builtin.modinfo | \ + tr '\0' '\n' | sed -n 's/^.*firmware=/firmware: /p' | \ + sort -u > $(abidir)/$*.fwinfo.builtin; \ + fi + + # Build the final ABI compiler information. + ko=$$(find $(pkgdir_bin) $(pkgdir) $(pkgdir_ex) -name \*.ko | head -1); \ + readelf -p .comment "$$ko" | gawk ' \ + ($$1 == "[") { \ + printf("%s", $$3); \ + for (n=4; n<=NF; n++) { \ + printf(" %s", $$n); \ + } \ + print "" \ + }' | sort -u >$(abidir)/$*.compiler + + # Build the buildinfo package content. + install -d $(pkgdir_bldinfo)/usr/lib/linux/$(abi_release)-$* + install -m644 $(builddir)/build-$*/.config \ + $(pkgdir_bldinfo)/usr/lib/linux/$(abi_release)-$*/config + install -m644 $(abidir)/$* \ + $(pkgdir_bldinfo)/usr/lib/linux/$(abi_release)-$*/abi + install -m644 $(abidir)/$*.modules \ + $(pkgdir_bldinfo)/usr/lib/linux/$(abi_release)-$*/modules + install -m644 $(abidir)/$*.fwinfo \ + $(pkgdir_bldinfo)/usr/lib/linux/$(abi_release)-$*/fwinfo + install -m644 $(abidir)/$*.compiler \ + $(pkgdir_bldinfo)/usr/lib/linux/$(abi_release)-$*/compiler + if [ -f $(abidir)/$*.modules.builtin ] ; then \ + install -m644 $(abidir)/$*.modules.builtin \ + $(pkgdir_bldinfo)/usr/lib/linux/$(abi_release)-$*/modules.builtin; \ + fi + if [ -f $(abidir)/$*.fwinfo.builtin ] ; then \ + install -m644 $(abidir)/$*.fwinfo.builtin \ + $(pkgdir_bldinfo)/usr/lib/linux/$(abi_release)-$*/fwinfo.builtin; \ + fi + install -m644 $(DROOT)/canonical-certs.pem $(pkgdir_bldinfo)/usr/lib/linux/$(abi_release)-$*/canonical-certs.pem + install -m644 $(DROOT)/canonical-revoked-certs.pem $(pkgdir_bldinfo)/usr/lib/linux/$(abi_release)-$*/canonical-revoked-certs.pem + # List of source files used for this build + install -m644 $(builddir)/build-$*/sources.list $(pkgdir_bldinfo)/usr/lib/linux/$(abi_release)-$*/sources + + # Get rid of .o and .cmd artifacts in headers + find $(hdrdir) -name \*.o -or -name \*.cmd -exec rm -f {} \; + # Strip .so files (e.g., rust/libmacros.so) to reduce size even more + find $(hdrdir) -name libmacros.so -exec strip -s {} \; + +ifeq ($(do_lib_rust),true) + # Generate Rust lib files + install -d -m755 $(rustdir) + mv $(hdrdir)/rust $(rustdir) + # Generate symlink for Rust lib directory in headers + $(SHELL) $(DROOT)/scripts/link-lib-rust "$(hdrdir)" "$(indeppkg)" "$*" +endif + +ifneq ($(do_full_build),false) + # Clean out this flavours build directory. + rm -rf $(builddir)/build-$* +endif + $(stamp) + +headers_tmp := $(CURDIR)/debian/tmp-headers +headers_dir := $(CURDIR)/debian/linux-libc-dev + +.PHONY: install-arch-headers +install-arch-headers: + @echo Debug: $@ + dh_testdir + dh_testroot + $(call if_package, linux-libc-dev, dh_prep -plinux-libc-dev) + rm -rf $(headers_tmp) $(headers_dir) + $(kmake) O=$(headers_tmp) INSTALL_HDR_PATH=$(headers_dir)/usr $(conc_level) headers_install + mkdir $(headers_dir)/usr/include/$(DEB_HOST_MULTIARCH) + mv $(headers_dir)/usr/include/asm $(headers_dir)/usr/include/$(DEB_HOST_MULTIARCH)/ + rm -rf $(headers_tmp) + +define dh_all + dh_installchangelogs -p$(1) + dh_installdocs -p$(1) + dh_compress -p$(1) + # Compress kernel modules, on mantic+ + $(if $(do_zstd_ko),find debian/$(1) -name '*.ko' -print0 | xargs -0 -n1 -P $(CONCURRENCY_LEVEL) -r zstd -19 --quiet --rm, true) + dh_fixperms -p$(1) -X/boot/ + dh_shlibdeps -p$(1) $(shlibdeps_opts) + dh_installdeb -p$(1) + dh_installdebconf -p$(1) + $(lockme) dh_gencontrol -p$(1) -- -Vlinux:rprovides='$(rprovides)' $(2) + dh_md5sums -p$(1) + dh_builddeb -p$(1) +endef +define newline + + +endef +define dh_all_inline + $(subst ${newline},; \${newline},$(call dh_all,$(1),$(2))) +endef + +.PHONY: binary-arch-headers +binary-arch-headers: install-arch-headers + @echo Debug: $@ + dh_testdir + dh_testroot + $(call if_package, linux-libc-dev, $(call dh_all,linux-libc-dev)) + +-include $(builddir)/skipped-dkms.mk +binary-%: pkgimg = $(bin_pkg_name)-$* +binary-%: pkgimg_mods = $(mods_pkg_name)-$* +binary-%: pkgimg_ex = $(mods_extra_pkg_name)-$* +binary-%: pkgdir_ex = $(CURDIR)/debian/$(extra_pkg_name)-$* +binary-%: pkgbldinfo = $(bldinfo_pkg_name)-$* +binary-%: pkghdr = $(hdrs_pkg_name)-$* +binary-%: pkgrust = $(rust_pkg_name)-$* +binary-%: dbgpkg = $(bin_pkg_name)-$*-dbgsym +binary-%: dbgpkgdir = $(CURDIR)/debian/$(bin_pkg_name)-$*-dbgsym +binary-%: pkgtools = $(tools_flavour_pkg_name)-$* +binary-%: pkgcloud = $(cloud_flavour_pkg_name)-$* +$(foreach _m,$(all_dkms_modules), \ + $(eval binary-%: enable_$(_m) = $$(filter true,$$(call custom_override,do_$(_m),$$*))) \ +) +binary-%: rprovides = $(foreach _m,$(all_built-in_dkms_modules),$(if $(enable_$(_m)),$(foreach _r,$(dkms_$(_m)_rprovides),$(_r)$(comma) ))) +binary-%: target_flavour = $* +binary-%: checks-% + @echo Debug: $@ + dh_testdir + dh_testroot + + $(call dh_all,$(pkgimg)) -- -Znone + $(call dh_all,$(pkgimg_mods))$(if $(do_zstd_ko), -- -Znone) + +ifeq ($(do_extras_package),true) + ifeq ($(ship_extras_package),false) + # If $(ship_extras_package) is explicitly set to false, then do not + # construct the linux-image-extra package; instead just log all of the + # "extra" modules which were pointlessly built yet won't be shipped. + find $(pkgdir_ex) -name '*.ko' | sort \ + | sed 's|^$(pkgdir_ex)/|NOT-SHIPPED |' \ + | tee -a $(target_flavour).not-shipped.log; + else + if [ -f $(DEBIAN)/control.d/$(target_flavour).inclusion-list ] ; then \ + $(call dh_all_inline,$(pkgimg_ex))$(if $(do_zstd_ko), -- -Znone); \ + fi + endif +endif + + $(foreach _m,$(all_standalone_dkms_modules), \ + $(if $(enable_$(_m)),$(call dh_all,$(dkms_$(_m)_pkg_name)-$*)$(if $(do_zstd_ko), -- -Znone);)\ + ) + + $(call dh_all,$(pkgbldinfo)) + $(call dh_all,$(pkghdr)) +ifeq ($(do_lib_rust),true) + $(call dh_all,$(pkgrust)) +endif + +ifeq ($(do_dbgsym_package),true) + $(call dh_all,$(dbgpkg)) -- -Zxz + + # Hokay...here's where we do a little twiddling... + # Renaming the debug package prevents it from getting into + # the primary archive, and therefore prevents this very large + # package from being mirrored. It is instead, through some + # archive admin hackery, copied to http://ddebs.ubuntu.com. + # + mv ../$(dbgpkg)_$(release)-$(revision)_$(arch).deb \ + ../$(dbgpkg)_$(release)-$(revision)_$(arch).ddeb + $(lockme) sed -i '/^$(dbgpkg)_/s/\.deb /.ddeb /' debian/files + # Now, the package wont get into the archive, but it will get put + # into the debug system. + + # Clean out the debugging package source directory. + rm -rf $(dbgpkgdir) +endif + +ifeq ($(do_linux_tools),true) + $(call dh_all,$(pkgtools)) +endif +ifeq ($(do_cloud_tools),true) + $(call dh_all,$(pkgcloud)) +endif +ifeq ($(do_tools_bpftool),true) + $(call if_package, linux-bpf-dev, $(call dh_all,linux-bpf-dev)) +endif + +# +# per-architecture packages +# +builddirpa = $(builddir)/tools-perarch + +$(stampdir)/stamp-prepare-perarch: + @echo Debug: $@ +ifeq ($(do_any_tools),true) + rm -rf $(builddirpa) + install -d $(builddirpa) + rsync -a --exclude debian --exclude debian.master --exclude $(DEBIAN) --exclude .git -a ./ $(builddirpa)/ +endif + $(stamp) + +$(stampdir)/stamp-build-perarch: $(stampdir)/stamp-prepare-perarch install-arch-headers build-arch + @echo Debug: $@ +ifeq ($(do_linux_tools),true) +ifeq ($(do_tools_usbip),true) + chmod 755 $(builddirpa)/tools/usb/usbip/autogen.sh + cd $(builddirpa)/tools/usb/usbip && ./autogen.sh + chmod 755 $(builddirpa)/tools/usb/usbip/configure + cd $(builddirpa)/tools/usb/usbip && ./configure --prefix=$(builddirpa)/tools/usb/usbip/bin + cd $(builddirpa)/tools/usb/usbip && make install CFLAGS="-g -O2 -static" CROSS_COMPILE=$(CROSS_COMPILE) +endif +ifeq ($(do_tools_acpidbg),true) + cd $(builddirpa)/tools/power/acpi && make clean && make CFLAGS="-g -O2 -static -I$(builddirpa)/include" CROSS_COMPILE=$(CROSS_COMPILE) acpidbg +endif +ifeq ($(do_tools_rtla),true) + cd $(builddirpa)/tools/tracing/rtla && make clean && make CFLAGS='-g -O -Wall -I/usr/include/tracefs -I/usr/include/traceevent -DVERSION="\"6.8.1\""' static +endif +ifeq ($(do_tools_cpupower),true) + make -C $(builddirpa)/tools/power/cpupower \ + CROSS_COMPILE=$(CROSS_COMPILE) \ + CROSS=$(CROSS_COMPILE) \ + STATIC=true \ + CPUFREQ_BENCH=false +endif +ifeq ($(do_tools_perf),true) + cd $(builddirpa) && $(kmake) $(defconfig) + mv $(builddirpa)/.config $(builddirpa)/.config.old + sed -e 's/^# \(CONFIG_MODVERSIONS\) is not set$$/\1=y/' \ + -e 's/.*CONFIG_LOCALVERSION_AUTO.*/# CONFIG_LOCALVERSION_AUTO is not set/' \ + $(builddirpa)/.config.old > $(builddirpa)/.config + cd $(builddirpa) && $(kmake) syncconfig + cd $(builddirpa) && $(kmake) prepare + cd $(builddirpa)/tools/perf && \ + $(kmake) prefix=/usr HAVE_CPLUS_DEMANGLE_SUPPORT=1 CROSS_COMPILE=$(CROSS_COMPILE) NO_LIBPERL=1 WERROR=0 +endif +ifeq ($(do_tools_bpftool),true) + mv $(builddirpa)/tools/bpf/bpftool/vmlinux $(builddirpa)/vmlinux + $(kmake) CROSS_COMPILE=$(CROSS_COMPILE) -C $(builddirpa)/tools/bpf/bpftool +ifneq ($(do_tools_bpftool_stub),true) + $(builddirpa)/tools/bpf/bpftool/bpftool btf dump file $(builddirpa)/vmlinux format c > $(builddirpa)/vmlinux.h +else + echo '#error "Kernel does not support CONFIG_DEBUG_INFO_BTF"' > $(builddirpa)/vmlinux.h +endif + rm -f $(builddirpa)/vmlinux +endif +ifeq ($(do_tools_x86),true) + cd $(builddirpa)/tools/power/x86/x86_energy_perf_policy && make CROSS_COMPILE=$(CROSS_COMPILE) + cd $(builddirpa)/tools/power/x86/turbostat && make CROSS_COMPILE=$(CROSS_COMPILE) +endif +endif +ifeq ($(do_cloud_tools),true) +ifeq ($(do_tools_hyperv),true) + cd $(builddirpa)/tools/hv && make CFLAGS="-I$(headers_dir)/usr/include -I$(headers_dir)/usr/include/$(DEB_HOST_MULTIARCH)" CROSS_COMPILE=$(CROSS_COMPILE) hv_kvp_daemon hv_vss_daemon hv_fcopy_daemon +endif +endif + $(stamp) + +.PHONY: install-perarch +install-perarch: toolspkgdir = $(CURDIR)/debian/$(tools_pkg_name) +install-perarch: cloudpkgdir = $(CURDIR)/debian/$(cloud_pkg_name) +install-perarch: $(stampdir)/stamp-build-perarch + @echo Debug: $@ + # Add the tools. +ifeq ($(do_linux_tools),true) + install -d $(toolspkgdir)/usr/lib + install -d $(toolspkgdir)/usr/lib/$(src_pkg_name)-tools-$(abi_release) +ifeq ($(do_tools_usbip),true) + install -m755 $(addprefix $(builddirpa)/tools/usb/usbip/bin/sbin/, usbip usbipd) \ + $(toolspkgdir)/usr/lib/$(src_pkg_name)-tools-$(abi_release) +endif +ifeq ($(do_tools_acpidbg),true) + install -m755 $(builddirpa)/tools/power/acpi/acpidbg \ + $(toolspkgdir)/usr/lib/$(src_pkg_name)-tools-$(abi_release) +endif +ifeq ($(do_tools_cpupower),true) + install -m755 $(builddirpa)/tools/power/cpupower/cpupower \ + $(toolspkgdir)/usr/lib/$(src_pkg_name)-tools-$(abi_release) +endif +ifeq ($(do_tools_rtla),true) + install -m755 $(builddirpa)/tools/tracing/rtla/rtla-static \ + $(toolspkgdir)/usr/lib/$(src_pkg_name)-tools-$(abi_release)/rtla +endif +ifeq ($(do_tools_perf),true) + install -m755 $(builddirpa)/tools/perf/perf $(toolspkgdir)/usr/lib/$(src_pkg_name)-tools-$(abi_release) +ifeq ($(do_tools_perf_jvmti),true) + install -m755 $(builddirpa)/tools/perf/libperf-jvmti.so $(toolspkgdir)/usr/lib/$(src_pkg_name)-tools-$(abi_release) +endif +ifeq ($(do_tools_perf_python),true) + install -d $(toolspkgdir)/usr/lib/$(src_pkg_name)-tools-$(abi_release)/lib + install -m644 $(builddirpa)/tools/perf/python/perf.*.so $(toolspkgdir)/usr/lib/$(src_pkg_name)-tools-$(abi_release)/lib +endif +endif +ifeq ($(do_tools_bpftool),true) + install -m755 $(builddirpa)/tools/bpf/bpftool/bpftool $(toolspkgdir)/usr/lib/$(src_pkg_name)-tools-$(abi_release) +endif +ifeq ($(do_tools_bpftool),true) + install -d -m755 $(CURDIR)/debian/linux-bpf-dev/usr/include/$(DEB_HOST_MULTIARCH)/linux/ + install -m644 $(builddirpa)/vmlinux.h $(CURDIR)/debian/linux-bpf-dev/usr/include/$(DEB_HOST_MULTIARCH)/linux/vmlinux.h +endif +ifeq ($(do_tools_x86),true) + install -m755 \ + $(addprefix $(builddirpa)/tools/power/x86/, x86_energy_perf_policy/x86_energy_perf_policy turbostat/turbostat) \ + $(toolspkgdir)/usr/lib/$(src_pkg_name)-tools-$(abi_release) +endif +endif +ifeq ($(do_cloud_tools),true) +ifeq ($(do_tools_hyperv),true) + install -d $(cloudpkgdir)/usr/lib + install -d $(cloudpkgdir)/usr/lib/$(src_pkg_name)-tools-$(abi_release) + install -m755 $(addprefix $(builddirpa)/tools/hv/, hv_kvp_daemon hv_vss_daemon hv_fcopy_daemon lsvmbus) \ + $(cloudpkgdir)/usr/lib/$(src_pkg_name)-tools-$(abi_release) +endif +endif + +.PHONY: binary-perarch +binary-perarch: toolspkg = $(tools_pkg_name) +binary-perarch: cloudpkg = $(cloud_pkg_name) +binary-perarch: install-perarch + @echo Debug: $@ +ifeq ($(do_linux_tools),true) + $(call dh_all,$(toolspkg)) +endif +ifeq ($(do_cloud_tools),true) + $(call dh_all,$(cloudpkg)) +endif + +.PHONY: binary-debs +binary-debs: binary-perarch $(addprefix binary-,$(flavours)) + @echo Debug: $@ + +build-arch-deps-$(do_flavour_image_package) += $(addprefix $(stampdir)/stamp-install-,$(flavours)) + +.PHONY: build-arch +build-arch: $(build-arch-deps-true) + @echo Debug: $@ + +binary-arch-deps-$(do_flavour_image_package) += binary-debs +binary-arch-deps-true += binary-arch-headers +ifneq ($(do_common_headers_indep),true) +binary-arch-deps-$(do_flavour_header_package) += binary-headers +endif + +.PHONY: binary-arch +binary-arch: $(binary-arch-deps-true) + @echo Debug: $@ + --- linux-xilinx-6.8.0.orig/debian/rules.d/3-binary-indep.mk +++ linux-xilinx-6.8.0/debian/rules.d/3-binary-indep.mk @@ -0,0 +1,213 @@ +.PHONY: build-indep +build-indep: + @echo Debug: $@ + +# The binary-indep dependency chain is: +# +# install-headers <- install-source <- install-tools <- install-indep <- binary-indep +# install-headers <- binary-headers +# +indep_hdrpkg = $(indep_hdrs_pkg_name) +indep_hdrdir = $(CURDIR)/debian/$(indep_hdrpkg)/usr/src/$(indep_hdrpkg) + +$(stampdir)/stamp-install-headers: $(stampdir)/stamp-prepare-indep + @echo Debug: $@ + dh_testdir + +ifeq ($(do_flavour_header_package),true) + install -d $(indep_hdrdir) + find . -path './debian' -prune -o -path './$(DEBIAN)' -prune \ + -o -path './include/*' -prune \ + -o -path './scripts/*' -prune -o -type f \ + \( -name 'Makefile*' -o -name 'Kconfig*' -o -name 'Kbuild*' -o \ + -name '*.sh' -o -name '*.pl' -o -name '*.lds' \) \ + -print | cpio -pd --preserve-modification-time $(indep_hdrdir) + cp -a scripts include $(indep_hdrdir) + (find arch -name include -type d -print | \ + xargs -n1 -i: find : -type f) | \ + cpio -pd --preserve-modification-time $(indep_hdrdir) + # Do not ship .o and .cmd artifacts in headers + find $(indep_hdrdir) -name \*.o -or -name \*.cmd -exec rm -f {} \; +endif + $(stamp) + +srcpkg = linux-source-$(release) +srcdir = $(CURDIR)/debian/$(srcpkg)/usr/src/$(srcpkg) +balldir = $(CURDIR)/debian/$(srcpkg)/usr/src/$(srcpkg)/$(srcpkg) +install-source: $(stampdir)/stamp-prepare-indep + @echo Debug: $@ +ifeq ($(do_source_package),true) + + install -d $(srcdir) +ifeq ($(do_source_package_content),true) + find . -path './debian' -prune -o -path './$(DEBIAN)' -prune -o \ + -path './.*' -prune -o -print | \ + cpio -pd --preserve-modification-time $(balldir) + (cd $(srcdir); tar cf - $(srcpkg)) | bzip2 -9c > \ + $(srcdir)/$(srcpkg).tar.bz2 + rm -rf $(balldir) + $(LN) $(srcpkg)/$(srcpkg).tar.bz2 $(srcdir)/.. +endif +endif + +.PHONY: install-tools +install-tools: toolspkg = $(tools_common_pkg_name) +install-tools: toolsbin = $(CURDIR)/debian/$(toolspkg)/usr/bin +install-tools: toolssbin = $(CURDIR)/debian/$(toolspkg)/usr/sbin +install-tools: toolsman = $(CURDIR)/debian/$(toolspkg)/usr/share/man +install-tools: toolspython = $(CURDIR)/debian/$(toolspkg)/usr/lib/python3/dist-packages +install-tools: toolsbashcomp = $(CURDIR)/debian/$(toolspkg)/usr/share/bash-completion/completions +install-tools: hosttoolspkg = $(hosttools_pkg_name) +install-tools: hosttoolsbin = $(CURDIR)/debian/$(hosttoolspkg)/usr/bin +install-tools: hosttoolsman = $(CURDIR)/debian/$(hosttoolspkg)/usr/share/man +install-tools: hosttoolssystemd = $(CURDIR)/debian/$(hosttoolspkg)/lib/systemd/system +install-tools: cloudpkg = $(cloud_common_pkg_name) +install-tools: cloudbin = $(CURDIR)/debian/$(cloudpkg)/usr/bin +install-tools: cloudsbin = $(CURDIR)/debian/$(cloudpkg)/usr/sbin +install-tools: cloudman = $(CURDIR)/debian/$(cloudpkg)/usr/share/man +install-tools: $(stampdir)/stamp-prepare-indep $(stampdir)/stamp-build-perarch + @echo Debug: $@ + +ifeq ($(do_tools_common),true) + rm -rf $(builddir)/tools + install -d $(builddir)/tools + for i in *; do $(LN) $(CURDIR)/$$i $(builddir)/tools/; done + rm $(builddir)/tools/tools + rsync -a tools/ $(builddir)/tools/tools/ + + install -d $(toolsbin) + install -d $(toolssbin) + install -d $(toolsman)/man1 + install -d $(toolsman)/man8 + install -d $(toolsbashcomp) + install -d $(toolspython) + + install -m755 debian/tools/generic $(toolsbin)/usbip + install -m755 debian/tools/generic $(toolsbin)/usbipd + install -m644 $(CURDIR)/tools/usb/usbip/doc/*.8 $(toolsman)/man8/ + + install -m755 debian/tools/generic $(toolsbin)/cpupower + install -m644 $(CURDIR)/tools/power/cpupower/man/*.1 $(toolsman)/man1/ + + install -m755 debian/tools/generic $(toolsbin)/rtla + + install -m755 debian/tools/generic $(toolsbin)/perf + + install -m755 debian/tools/generic $(toolssbin)/bpftool + make -C $(builddir)/tools/tools/bpf/bpftool doc + install -m644 $(builddir)/tools/tools/bpf/bpftool/Documentation/*.8 \ + $(toolsman)/man8 + install -m644 $(builddir)/tools/tools/bpf/bpftool/bash-completion/bpftool \ + $(toolsbashcomp) + + install -m755 debian/tools/generic $(toolsbin)/x86_energy_perf_policy + install -m755 debian/tools/generic $(toolsbin)/turbostat + + cd $(builddir)/tools/tools/perf && make man + install -m644 $(builddir)/tools/tools/perf/Documentation/*.1 \ + $(toolsman)/man1 + + install -m644 $(CURDIR)/tools/power/x86/x86_energy_perf_policy/*.8 $(toolsman)/man8 + install -m644 $(CURDIR)/tools/power/x86/turbostat/*.8 $(toolsman)/man8 + +ifeq ($(do_tools_perf_python),true) + # Python wrapper module for python-perf + install -d $(toolspython)/perf + install -m644 debian/tools/python-perf.py $(toolspython)/perf/__init__.py +endif +ifeq ($(do_cloud_tools),true) +ifeq ($(do_tools_hyperv),true) + install -d $(cloudsbin) + install -m755 debian/tools/generic $(cloudsbin)/hv_kvp_daemon + install -m755 debian/tools/generic $(cloudsbin)/hv_vss_daemon + install -m755 debian/tools/generic $(cloudsbin)/hv_fcopy_daemon + install -m755 debian/tools/generic $(cloudsbin)/lsvmbus + install -m755 debian/cloud-tools/hv_get_dhcp_info $(cloudsbin) + install -m755 debian/cloud-tools/hv_get_dns_info $(cloudsbin) + install -m755 debian/cloud-tools/hv_set_ifconfig $(cloudsbin) + + install -d $(cloudman)/man8 + install -m644 $(CURDIR)/tools/hv/*.8 $(cloudman)/man8 +endif +endif + +ifeq ($(do_tools_acpidbg),true) + install -m755 debian/tools/generic $(toolsbin)/acpidbg +endif + +endif + +ifeq ($(do_tools_host),true) + install -d $(hosttoolsbin) + install -d $(hosttoolsman)/man1 + install -d $(hosttoolssystemd) + + install -m 755 $(CURDIR)/tools/kvm/kvm_stat/kvm_stat $(hosttoolsbin)/ + install -m 644 $(CURDIR)/tools/kvm/kvm_stat/kvm_stat.service \ + $(hosttoolssystemd)/ + + cd $(builddir)/tools/tools/kvm/kvm_stat && make man + install -m644 $(builddir)/tools/tools/kvm/kvm_stat/*.1 \ + $(hosttoolsman)/man1 +endif + +$(stampdir)/stamp-prepare-indep: + @echo Debug: $@ + dh_prep -i + $(stamp) + +.PHONY: install-indep +install-indep: $(stampdir)/stamp-install-headers install-source install-tools + @echo Debug: $@ + +# This is just to make it easy to call manually. Normally done in +# binary-indep target during builds. +.PHONY: binary-headers +binary-headers: $(stampdir)/stamp-prepare-indep $(stampdir)/stamp-install-headers + @echo Debug: $@ + dh_installchangelogs -p$(indep_hdrpkg) + dh_installdocs -p$(indep_hdrpkg) + dh_compress -p$(indep_hdrpkg) + dh_fixperms -p$(indep_hdrpkg) + dh_installdeb -p$(indep_hdrpkg) + $(lockme) dh_gencontrol -p$(indep_hdrpkg) + dh_md5sums -p$(indep_hdrpkg) + dh_builddeb -p$(indep_hdrpkg) + +binary-indep: cloudpkg = $(cloud_common_pkg_name) +binary-indep: hosttoolspkg = $(hosttools_pkg_name) +binary-indep: install-indep + @echo Debug: $@ + dh_installchangelogs -i + dh_installdocs -i + dh_compress -i + dh_fixperms -i +ifeq ($(do_tools_common),true) +ifeq ($(do_cloud_tools),true) +ifeq ($(do_tools_hyperv),true) + dh_installinit -p$(cloudpkg) -n --name hv-kvp-daemon + dh_installinit -p$(cloudpkg) -n --name hv-vss-daemon + dh_installinit -p$(cloudpkg) -n --name hv-fcopy-daemon + dh_installudev -p$(cloudpkg) -n --name hv-kvp-daemon + dh_installudev -p$(cloudpkg) -n --name hv-vss-daemon + dh_installudev -p$(cloudpkg) -n --name hv-fcopy-daemon + dh_systemd_enable -p$(cloudpkg) + dh_installinit -p$(cloudpkg) -o --name hv-kvp-daemon + dh_installinit -p$(cloudpkg) -o --name hv-vss-daemon + dh_installinit -p$(cloudpkg) -o --name hv-fcopy-daemon + dh_systemd_start -p$(cloudpkg) +endif + # Keep intel_sgx service disabled by default, so add it after dh_systemd_enable + # and dh_systemd_start are called: + dh_installinit -p$(cloudpkg) --no-start --no-enable --name intel-sgx-load-module +endif +endif +ifeq ($(do_tools_host),true) + # Keep kvm_stat.service disabled by default (after dh_systemd_enable + # and dh_systemd_start: + dh_installinit -p$(hosttoolspkg) --no-enable --no-start --name kvm_stat +endif + dh_installdeb -i + $(lockme) dh_gencontrol -i + dh_md5sums -i + dh_builddeb -i --- linux-xilinx-6.8.0.orig/debian/rules.d/4-checks.mk +++ linux-xilinx-6.8.0/debian/rules.d/4-checks.mk @@ -0,0 +1,18 @@ +# Check the signature of staging modules +module-signature-check-%: $(stampdir)/stamp-install-% + @echo Debug: $@ + $(DROOT)/scripts/checks/module-signature-check "$*" \ + "$(DROOT)/$(mods_pkg_name)-$*" \ + "$(DROOT)/$(mods_extra_pkg_name)-$*" \ + $(do_skip_checks) + +checks-%: module-signature-check-% + @echo Debug: $@ + +# Check the config against the known options list. +config-prepare-check-%: $(stampdir)/stamp-prepare-tree-% + @echo Debug: $@ +ifneq ($(do_skip_checks),true) + python3 $(DROOT)/scripts/misc/annotations -f $(commonconfdir)/annotations \ + --arch $(arch) --flavour $* --check $(builddir)/build-$*/.config +endif --- linux-xilinx-6.8.0.orig/debian/scripts/checks/final-checks +++ linux-xilinx-6.8.0/debian/scripts/checks/final-checks @@ -0,0 +1,47 @@ +#!/bin/bash + +debian="$1" +abi="$2" + +archs=$(awk '/^Architecture:/ { $1=""; for (i=1; i<=NF; i++) { if ($i != "all") { print $i }}}' debian/control | sort -u) + +fail=0 + +failure() +{ + echo "EE: $*" 1>&2 + fail=1 +} + +for arch in $archs +do + if [ ! -f "$debian/rules.d/$arch.mk" ]; then + continue + fi + + image_pkg=$(awk -F '\\s*=\\s*' '$1 == "do_flavour_image_package" { print $2 }' "$debian/rules.d/$arch.mk") + if [ "$image_pkg" = "false" ]; then + continue + fi + + flavours=$( + awk '/^\s*flavours\s*=/{ + sub(/^\s*flavours\s*=\s*/, ""); + print + }' "$debian/rules.d/$arch.mk") + for flavour in $flavours + do + if [ -d debian/certs ]; then + if ! python3 debian/scripts/misc/annotations --export -c CONFIG_SYSTEM_TRUSTED_KEYS --arch "$arch" --flavour "$flavour" | grep -q '^CONFIG_SYSTEM_TRUSTED_KEYS="debian/canonical-certs.pem"$' ; then + failure "'CONFIG_SYSTEM_TRUSTED_KEYS=\"debian/canonical-certs.pem\"' is required" + fi + fi + if [ -d debian/revoked-certs ]; then + if ! python3 debian/scripts/misc/annotations --export -c CONFIG_SYSTEM_REVOCATION_KEYS --arch "$arch" --flavour "$flavour" | grep -q '^CONFIG_SYSTEM_REVOCATION_KEYS="debian/canonical-revoked-certs.pem"$' ; then + failure "'CONFIG_SYSTEM_REVOCATION_KEYS=\"debian/canonical-revoked-certs.pem\"' is required" + fi + fi + done +done + +exit "$fail" --- linux-xilinx-6.8.0.orig/debian/scripts/checks/module-signature-check +++ linux-xilinx-6.8.0/debian/scripts/checks/module-signature-check @@ -0,0 +1,91 @@ +#!/bin/bash -eu + +flavor="${1}" +mods_dir="${2}" +mods_extra_dir="${3}" + +skip_checks=${4:-} +case "${skip_checks,,}" in + 1|true|yes) skip_checks=1 ;; + *) skip_checks=0 ;; +esac + +echo "II: Checking signature of staging modules for ${flavor}..." + +root=$(dirname "$(realpath -e "${0}")")/../../.. +. "${root}"/debian/debian.env + +# Collect the signature-inclusion files +sig_incs=() +for d in debian "${DEBIAN}" ; do + if [ -f "${root}"/"${d}"/signature-inclusion ] ; then + sig_incs+=("${root}"/"${d}"/signature-inclusion) + fi +done + +if [ "${#sig_incs[@]}" -gt 0 ] ; then + echo "II: Use signature inclusion file(s):" + printf " %s\n" "${sig_incs[@]}" + sig_all=0 +else + echo "WW: Signature inclusion file(s) missing" + echo "II: All modules must be signed" + sig_all=1 +fi + +if ! [ -d "${mods_dir}" ] ; then + echo "EE: Modules directory missing:" + echo " ${mods_dir}" + if [ ${skip_checks} -eq 1 ] ; then + echo "WW: Explicitly asked to ignore failures" + echo "II: Done" + exit 0 + fi + exit 1 +fi + +echo "II: Checking modules directory:" +echo " ${mods_dir}" +mods_dirs=("${mods_dir}") + +if [ -d "${mods_extra_dir}" ] ; then + echo " ${mods_extra_dir}" + mods_dirs+=("${mods_extra_dir}") +fi + +pass=0 +fail=0 +while IFS= read -r mod ; do + is=0 + if /sbin/modinfo "${mod}" | grep -q "^signature:" ; then + # Module is signed + is=1 + fi + + must=0 + if [ ${sig_all} -eq 1 ] || grep -qFx "${mod##*/}" "${sig_incs[@]}" ; then + # Module must be signed + must=1 + fi + + case "${is}${must}" in + 00) echo " PASS (unsigned) : ${mod##*/}" ; pass=$((pass + 1)) ;; + 01) echo " FAIL (unsigned) : ${mod##*/}" ; fail=$((fail + 1)) ;; + 10) echo " FAIL (signed) : ${mod##*/}" ; fail=$((fail + 1)) ;; + 11) echo " PASS (signed) : ${mod##*/}" ; pass=$((pass + 1)) ;; + esac +done < <(find "${mods_dirs[@]}" -path '*/drivers/staging/*.ko' | sort) + +echo "II: Checked $((pass + fail)) modules : ${pass} PASS, ${fail} FAIL" + +if [ ${fail} -ne 0 ] ; then + if [ ${skip_checks} -eq 1 ] ; then + echo "WW: Explicitly asked to ignore failures" + else + echo "EE: Modules signature failures" + exit 1 + fi +fi + +echo "II: Done" +exit 0 --- linux-xilinx-6.8.0.orig/debian/scripts/control-create +++ linux-xilinx-6.8.0/debian/scripts/control-create @@ -0,0 +1,62 @@ +#!/bin/bash + +. debian/debian.env + +vars=$1 +any_signed=$2 + +. $vars + +[ "$provides" != '' ] && provides="$provides, " + +flavour=$(basename $vars | sed 's/.*\.//') +stub="${DEBIAN}/control.d/flavour-control.stub debian/control.d/flavour-buildinfo.stub" +if [ "$any_signed" = 'true' ]; then + sign_me_pkg="-unsigned" + sign_me_txt=" unsigned" + sign_peer_pkg="" +else + sign_me_pkg="" + sign_me_txt="" + sign_peer_pkg="-unsigned" +fi + +cat $stub | grep -v '^#' | sed \ + -e "s#FLAVOUR#$flavour#g" \ + -e "s#DESC#$desc#g" \ + -e "s#ARCH#$arch#g" \ + -e "s#SUPPORTED#$supported#g" \ + -e "s#TARGET#$target#g" \ + -e "s#BOOTLOADER#$bootloader#g" \ + -e "s#=PROVIDES=#$provides#g" \ + -e "s#=CONFLICTS=#$conflicts#g" \ + -e "s#=SIGN-ME-PKG=#$sign_me_pkg#g" \ + -e "s#=SIGN-ME-TXT=#$sign_me_txt#g" \ + -e "s#=SIGN-PEER-PKG=#$sign_peer_pkg#g" + +while read package version extras +do + module="$package" + module_type= + + # Module arch parameters are skipped here, so a package section will + # be generated for each flavour, and its Architecture will be set to + # all architectures with that flavour. Even that is being generated, + # it doesn't follow all of them will be built. That's to work-around + # dkms_exclude/dkms_include that manipulates supported architectures + # in $(DEBIAN)/rules.d/$(arch).mk. + for param in $extras; do + case "$param" in + modulename=*) module="${param#modulename=}" ;; + type=*) module_type="${param#type=}" ;; + *) continue ;; + esac + done + + [ "$module_type" = "standalone" ] || continue + + cat debian/control.d/flavour-module.stub | grep -v '^#' | sed \ + -e "s#ARCH#$arch#g" \ + -e "s#MODULE#$module#g" \ + -e "s#FLAVOUR#$flavour#g" +done <"${DEBIAN}/dkms-versions" --- linux-xilinx-6.8.0.orig/debian/scripts/dkms-build +++ linux-xilinx-6.8.0/debian/scripts/dkms-build @@ -0,0 +1,271 @@ +#!/bin/sh +set -e + +dkms_dir="$1" +abi_flavour="$2" +sign="$3" +pkgname="$4" +pkgdir="$5" +dbgpkgdir="$6" +package="$7" +shift 7 + +here=$(dirname "$(readlink -f "${0}")") + +srcdir=$(pwd) +cd "$dkms_dir" || exit 1 + +built_using_record() +{ + local subst="$1" + local built_using="$2" + if [ ! -f "$subst" ]; then + touch "$subst" + fi + if ! grep -q -s "^linux:BuiltUsing=" "$subst"; then + echo "linux:BuiltUsing=" >>"$subst" + fi + sed -i -e "s/^\(linux:BuiltUsing=.*\)/\1$built_using, /" "$subst" +} + +# ABI: returns present in $? and located path in lpackage_path when found. +package_present() +{ + for lpackage_path in "$1"_*.deb + do + break + done + [ -f "$lpackage_path" ] +} + +# Download and extract the DKMS package -- note there may be more +# than one package to install. +for package_path in "$@" +do + package_file=$(basename "$package_path") + echo "II: dkms-build downloading $package ($package_file)" + rpackage=$( echo "$package_path" | sed -e 's@.*/@@' -e 's@_.*@@' ) + lpackage=$( echo "$rpackage" | sed -e 's@=.*@@' ) + + while true + do + if package_present "$lpackage"; then + break + fi + case "$package_path" in + pool/*) + # Attempt download from the launchpad librarian first. + "$here/file-downloader" "https://launchpad.net/ubuntu/+archive/primary/+files/$package_file" || true + if package_present "$lpackage"; then + break + fi + + # Download from the available pools. + for pool in $( grep -h '^deb ' /etc/apt/sources.list /etc/apt/sources.list.d/*.list | awk '{print $2}' | sort -u ) + do + if package_present "$lpackage"; then + break + fi + url="$pool/$package_path" + "$here/file-downloader" "$url" && break || true + # No components in PPAs. + url=$(echo "$url" | sed -e 's@/pool/[^/]*/@/pool/main/@') + "$here/file-downloader" "$url" && break || true + done + ;; + http*:*) + "$here/file-downloader" "$package_path" + ;; + */*) + cp -p "$package_path" . + ;; + *) + apt-get download "$rpackage" + ;; + esac + break + done + if ! package_present "$lpackage"; then + echo "EE: $lpackage not found" + exit 1 + fi + + dpkg -x "$lpackage"_*.deb "$package" + + lversion=$( echo "$lpackage_path" | sed -e 's@.*/@@' -e 's@_[^_]*$@@' -e 's@.*_@@') + #built_using_record "$srcdir/debian/$pkgname.substvars" "$built_using$lpackage (= $lversion)" +done + +# Pick out the package/version from the dkms.conf. +for dkms_conf in "$package/usr/src"/*/"dkms.conf" +do + break +done + +# It seems some packages have a # in the name which works fine if the +# package is installed directly, but not so much if we build it out +# of the normal location. +sed -i -e '/^PACKAGE_NAME=/ s/#//g' "$dkms_conf" + +# Run any dkms-package specfic configuration steps +dkms_config_specific="$srcdir/$0-configure--$package" +dkms_config_generic=$(echo "$dkms_config_specific" | sed -e 's/-[0-9][0-9]*$/-N/') +for dkms_config in "$dkms_config_specific" "$dkms_config_generic" +do + if [ -z "$dkms_config" -o ! -e "$dkms_config" ]; then + continue + fi + echo "II: dkms-build-configure $(basename "$dkms_config") found, executing" + "$dkms_config" \ + "$srcdir" \ + "$dkms_conf" \ + "$dkms_dir" \ + "$abi_flavour" \ + "$sign" \ + "$pkgname" \ + "$pkgdir" \ + "$dbgpkgdir" \ + "$package" \ + "$@" || exit 1 + break +done + +cat - <<'EOF' >>"$dkms_conf" +POST_BUILD="ubuntu-save-objects ${dkms_tree}/${PACKAGE_NAME}/${PACKAGE_VERSION}/build ${dkms_tree}/${PACKAGE_NAME}/${PACKAGE_VERSION}/objects $POST_BUILD" +EOF +ubuntu_script="$(dirname "$dkms_conf")/ubuntu-save-objects" +cat - <<'EOF' >"$ubuntu_script" +#!/bin/sh +from="$1" +to="$2" +script="$3" +shift 2 + +# Copy the objects. +echo "II: copying objects to '$to'" +mkdir -p "$to" +(cd "$from" && find -name \*.o -o -name \*.mod | cpio -Lpd "$to") + +# Call the original post_install script if there is one. +[ "$script" = '' ] && exit 0 + +shift +exec "$(dirname "$0")/$script" "$@" +EOF +chmod +x "$ubuntu_script" +dkms_package=$( sed -ne 's/PACKAGE_NAME="\(.*\)"/\1/p' "$dkms_conf" ) +dkms_version=$( sed -ne 's/PACKAGE_VERSION="\(.*\)"/\1/p' "$dkms_conf" ) + +# Build the DKMS binaries. +echo "II: dkms-build building $package" +fakeroot="" +[ $(id -u) -ne 0 ] && fakeroot="/usr/bin/fakeroot" +rc=0 +$fakeroot /usr/sbin/dkms build --no-prepare-kernel --no-clean-kernel \ + -k "$abi_flavour" ${ARCH:+-a $ARCH} \ + --sourcetree "$dkms_dir/source" \ + --dkmstree "$dkms_dir/build" \ + --kernelsourcedir "$dkms_dir/headers/linux-headers-$abi_flavour" \ + "$dkms_conf" || rc=$? + +# Find the log and add it to our own. +for log in "$dkms_dir/build/$dkms_package/$dkms_version/$abi_flavour"/*/"log/make.log" "$dkms_dir/build/$dkms_package/$dkms_version/build/make.log" +do + if [ -f "$log" ]; then + sed -e "s@$dkms_dir@<>@g" <"$log" + break + fi +done + +# If this build failed then exit here. +[ "$rc" != 0 ] && exit "$rc" + +# Install the modules with debug symbols we possibly built, +# and strip the original modules for the next install step. +if [ -n "$dbgpkgdir" ]; then + dbgpkgdir="$dbgpkgdir/$package" + echo "II: dkms-build installing $package into $dbgpkgdir (debug symbols)" + install -d "$dbgpkgdir" + find "$dkms_dir/build/$dkms_package/$dkms_version/$abi_version" -name \*.ko | + while read module; do + vmodule=$( basename "$module" ) + + # Check for '.debug_info' section in order to copy module. + # Useful if debug symbols are requested but not built for + # any reason (including not yet supported by DKMS package). + # Strip module just in case even if section isn't present. + if ${CROSS_COMPILE}objdump -h -j '.debug_info' "$module" >/dev/null 2>&1 + then + echo "copying $vmodule" + cp "$module" "$dbgpkgdir" + else + echo "ignoring $vmodule (missing debug symbols)" + fi + + # Just 'strip -g' as '/usr/sbin/dkms' does. + echo "stripping $vmodule" + strip -g "$module" + done +fi + +# Install and optionally sign the modules we have built. +pkgdir="$pkgdir/$package" +echo "II: dkms-build installing $package into $pkgdir" +install -d "$pkgdir" +find "$dkms_dir/build/$dkms_package/$dkms_version/$abi_version" -name \*.ko | +while read module; do + vmodule=$( basename "$module" ) + case "$sign" in + --*) + echo "copying $vmodule" + cp "$module" "$pkgdir" + ;; + *) + echo "signing $vmodule" + $sign "$module" "$pkgdir/$vmodule" + ;; + esac +done + +find "$dkms_dir/build/$dkms_package/$dkms_version/objects" -name \*.o -print | \ +while read object +do + "$srcdir/debian/scripts/fix-filenames" "$object" "$dkms_dir" +done + +# This assumes that .mod files are in the top level build tree +# If there are ever .mod files in sub-directories, the dirname of objectlist needs to be stripped as well +find "$dkms_dir/build/$dkms_package/$dkms_version/objects" -name \*.mod -print | \ +while read objectlist +do + sed "s|^$dkms_dir/build/$dkms_package/$dkms_version/build/||" -i $objectlist +done + +# Finally see if there is a dkms-package specific post processor present. Hand +# it the original source directory, destination package directory, the objects +# as squirreled away, and the log in case it is useful. Finally pass a formed +# signing command line in case we need to do that. +dkms_build_specific="$srcdir/$0--$package" +dkms_build_generic=$(echo "$dkms_build_specific" | sed -n -e 's/-[0-9][0-9]*[a-z]*$/-N/p') +for dkms_build in "$dkms_build_specific" "$dkms_build_generic" +do + if [ -z "$dkms_build" -o ! -e "$dkms_build" ]; then + continue + fi + echo "II: dkms-build override $(basename "$dkms_build") found, executing" + "$dkms_build" \ + "$srcdir" \ + "$dkms_dir/build/$dkms_package/$dkms_version/objects" \ + "$log" \ + "$dkms_dir" \ + "$abi_flavour" \ + "$sign" \ + "$pkgname" \ + "$pkgdir" \ + "$dbgpkgdir" \ + "$package" \ + "$@" || exit 1 + break +done + +echo "II: dkms-build build $package complete" --- linux-xilinx-6.8.0.orig/debian/scripts/dkms-build--nvidia-N +++ linux-xilinx-6.8.0/debian/scripts/dkms-build--nvidia-N @@ -0,0 +1,112 @@ +#!/bin/sh +set -e + +srcdir="$1" +objects="$2" +log="$3" +shift 3 + +dkms_dir="$1" +abi_flavour="$2" +sign="$3" +pkgname="$4" +pkgdir="$5" +dbgpkgdir="$6" +package="$7" +shift 7 + +build="$( dirname "$objects" )/build" + +# Copy over the objects ready for reconstruction. The objects copy +# contains the *.o files. For our purposes we only want the *.o files, +# elide the rest. And .mod files for ld linking in recentish kernels. +mkdir -p "$pkgdir/bits/scripts" +( + gcc_variant1=$(gcc --version | head -1 | sed -e 's/^gcc/GCC:/') + gcc_variant2=$(gcc --version | head -1 | sed -e 's/^\(gcc\) \((.*)\) \(.*\)$/\1 version \3 \2/') + cd "$objects" || exit 1 + find -name \*.o -o -name \*.mod | \ + while read file + do + cp --parents "$file" "$pkgdir/bits" + "$srcdir/debian/scripts/fix-filenames" "$pkgdir/bits/$file" "$gcc_variant1" + "$srcdir/debian/scripts/fix-filenames" "$pkgdir/bits/$file" "$gcc_variant2" + done +) + +# Install the support files we need. +echo "II: copying support files ..." +for lds_src in \ + "$dkms_dir/headers/linux-headers-$abi_flavour/scripts/module.lds" \ + "/usr/src/linux-headers-$abi_flavour/scripts/module.lds" \ + "$dkms_dir/headers/linux-headers-$abi_flavour/scripts/module-common.lds" \ + "/usr/src/linux-headers-$abi_flavour/scripts/module-common.lds" +do + [ ! -f "$lds_src" ] && continue + echo "II: copying support files ... found $lds_src" + cp "$lds_src" "$pkgdir/bits/scripts" + break +done + +# Build helper scripts. +cat - <<'EOL' >"$pkgdir/bits/BUILD" +[ "$1" = "unsigned" ] && { signed_only=:; shift; } +[ "$1" = "nocheck" ] && { check_only=:; shift; } +EOL +grep /usr/bin/ld.bfd "$log" | grep -v scripts/genksyms/genksyms | grep -v "warning:\|NOTE:" | sed -e "s@$build/@@g" >>"$pkgdir/bits/BUILD" +sed -e 's/.*-o *\([^ ]*\) .*/rm -f \1/g' <"$pkgdir/bits/BUILD" >"$pkgdir/bits/CLEAN" + +# As the builds contain the absolute filenames as used. Use RECONSTRUCT to +# rebuild the .ko's, sign them, pull off the signatures and then finally clean +# up again. +( + cd "$pkgdir/bits" + + # Add checksum check. + echo "\$check_only sha256sum -c SHA256SUMS || exit 1" >>"$pkgdir/bits/BUILD" + + # Add .ko handling to the CLEAN/BUILD dance. + for ko in "$pkgdir"/*.ko + do + ko=$(basename "$ko") + echo "\$signed_only cat '$ko' '$ko.sig' >'../$ko'" >>"$pkgdir/bits/BUILD" + echo "\$signed_only rm -f '$ko'" >>"$pkgdir/bits/BUILD" + echo "rm -f '../$ko'" >>"$pkgdir/bits/CLEAN" + done + + # Clear out anything we are not going to distribute and build unsigned .kos. + sh ./CLEAN + sh ./BUILD unsigned nocheck + + if [ "$sign" = "--custom" ]; then + # We are building for and archive custom signing upload. Keep everything. + : + elif [ "$sign" = "--lrm" ]; then + # We are in the LRM build; grab sha256 checksums and clean up. + sha256sum -b *.ko >"SHA256SUMS" + sh ./CLEAN + + else + # We are in the main kernel, put the .kos together as we will + # on the users machine, sign them, and keep just the signature. + : >"SHA256SUMS" + for ko in *.ko + do + echo "detached-signature $ko" + $sign "$ko" "$ko.signed" + length=$( stat --format %s "$ko" ) + dd if="$ko.signed" of="$ko.sig" bs=1 skip="$length" 2>/dev/null + + rm -f "$ko.signed" + # Keep a checksum of the pre-signed object so we can check it is + # built correctly in LRM. + sha256sum -b "$ko" >>"SHA256SUMS" + done + + # Clean out anything which not a signature. + mv "$pkgdir/bits/"*.sig "$pkgdir" + mv "$pkgdir/bits/SHA256SUMS" "$pkgdir" + find "$pkgdir" -name \*.sig -prune -o -name SHA256SUMS -prune -o -type f -print | xargs rm -f + find "$pkgdir" -depth -type d -print | xargs rmdir --ignore-fail-on-non-empty + fi +) --- linux-xilinx-6.8.0.orig/debian/scripts/dkms-build-configure--zfs +++ linux-xilinx-6.8.0/debian/scripts/dkms-build-configure--zfs @@ -0,0 +1,24 @@ +#!/bin/sh +set -e + +srcdir="$1" +dkms_conf="$2" +shift 2 + +dkms_dir="$1" +abi_flavour="$2" +sign="$3" +pkgname="$4" +pkgdir="$5" +dbgpkgdir="$6" +package="$7" +shift 7 + +# ZFS debug symbols are enabled in dkms.conf via PACKAGE_CONFIG file. +if [ -n "$dbgpkgdir" ]; then + echo "enable zfs debug symbols" + pkg_cfg="$(dirname "$dkms_conf")/pkg_cfg" + echo 'ZFS_DKMS_ENABLE_DEBUGINFO=yes' >"$pkg_cfg" + echo 'ZFS_DKMS_DISABLE_STRIP=yes' >>"$pkg_cfg" + sed -i "s,^\(PACKAGE_CONFIG=\).*,\1$pkg_cfg," $dkms_conf +fi --- linux-xilinx-6.8.0.orig/debian/scripts/file-downloader +++ linux-xilinx-6.8.0/debian/scripts/file-downloader @@ -0,0 +1,34 @@ +#!/bin/sh + +if [ "$#" -ne 1 ]; then + echo "Usage: $0 " 1>&2 + exit 1 +fi +url="$1" + +to=$(basename "$url") + +count=0 +what='fetching' +while : +do + if [ "$count" -eq 20 ]; then + echo "EE: excessive redirects" 1>&2 + exit 1 + fi + count=$(($count+1)) + + echo "II: $what $url" + + curl --silent --fail --show-error "$url" -o "$to" -D "$to.hdr" || exit 1 + redirect=$(awk '/^Location: / {gsub(/^[[:space:]]+|[[:space:]]+$/,"",$2); print $2;}' "$to.hdr") + [ -z "$redirect" ] && break + what=' following' + + url=$(echo "$redirect" | sed -e 's@https://launchpadlibrarian.net/@http://launchpadlibrarian.net/@') + if [ "$redirect" != "$url" ]; then + echo "II: fixing $redirect" + fi +done + +exit 0 --- linux-xilinx-6.8.0.orig/debian/scripts/fix-filenames.c +++ linux-xilinx-6.8.0/debian/scripts/fix-filenames.c @@ -0,0 +1,80 @@ +/* + * fix-filenames: find a specified pathname prefix and remove it from + * C strings. + * + * Copyright (C) 2018 Canonical Ltd. + * Author: Andy Whitcroft + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +int +main(int argc, char *argv[]) +{ + int rc; + char *in_name; + char *prefix; + int prefix_len; + int in_fd; + struct stat in_info; + char *in; + off_t size; + int length; + + if (argc != 3) { + fprintf(stderr, "Usage: %s \n", argv[0]); + exit(1); + } + in_name = argv[1]; + prefix = argv[2]; + prefix_len = strlen(prefix); + + in_fd = open(in_name, O_RDWR); + if (in_fd < 0) { + perror("open input failed"); + exit(1); + } + + rc = fstat(in_fd, &in_info); + if (rc < 0) { + perror("fstat input failed"); + exit(1); + } + size = in_info.st_size; + + in = mmap((void *)0, size, PROT_READ|PROT_WRITE, MAP_SHARED, in_fd, (off_t)0); + if (!in) { + perror("mmap failed"); + exit(1); + } + + for (; size > 0; size--, in++) { + if (*in != *prefix) + continue; + if (strncmp(in, prefix, prefix_len) != 0) + continue; + /* In the case of an exact match there there is nothing to move. */ + if (in[prefix_len] == '\0') + length = 0; + /* If this is a filename, strip the leading slash. */ + else if (in[prefix_len] == '/') + length = strlen(in + prefix_len + 1) + 1; + /* Otherwise just keep the suffix. */ + else + length = strlen(in + prefix_len) + 1; + + /* + * Copy the suffix portion down to the start and clear + * the remainder of the space to 0. + */ + memmove(in, in + prefix_len + 1, length); + memset(in + length, '\0', prefix_len); + } +} --- linux-xilinx-6.8.0.orig/debian/scripts/link-headers +++ linux-xilinx-6.8.0/debian/scripts/link-headers @@ -0,0 +1,42 @@ +#!/bin/bash -e + +. debian/debian.env + +hdrdir="$1" +symdir="$2" +flavour="$3" + +echo "Symlinking and copying headers for $flavour..." + +excludes="( -path ./debian -prune -o -path ./${DEBIAN} -prune -o -path ./.git ) -prune -o" + +( +find . $excludes -type f \ + \( -name 'Makefile*' -o -name 'Kconfig*' -o -name 'Kbuild*' -o \ + -name '*.sh' -o -name '*.pl' -o -name '*.lds' \) -print +find ./include ./scripts -name .gitignore -prune -o -type f -print +find ./include -mindepth 1 -maxdepth 1 $excludes -type d -print +) | ( +while read file; do + dir=$file + lastdir=$file + + if [ -e "$hdrdir/$file" -o -L "$hdrdir/$file" ]; then + continue + fi + + while [ ! -e "$hdrdir/$dir" -a ! -L "$hdrdir/$dir" ]; do + lastdir=$dir + dir=`dirname $dir` + done + # If the last item to exist is a symlink we assume all is good + if [ ! -L "$hdrdir/$dir" ]; then + # Turns things like "./foo" into "../" + deref="`echo -n $lastdir | sed -e 's/^\.//' -e's,/[^/]*,../,g'`" + item="`echo -n $lastdir | sed -e 's/^\.\///'`" + ln -s $deref$symdir/$item $hdrdir/$item + fi +done +) + +exit --- linux-xilinx-6.8.0.orig/debian/scripts/link-lib-rust +++ linux-xilinx-6.8.0/debian/scripts/link-lib-rust @@ -0,0 +1,17 @@ +#!/bin/bash -e + +. debian/debian.env + +hdrdir="$1" +symdir="$2" +flavour="$3" + +echo "Symlinking and copying Rust files for $flavour..." + +# Symlink Rust folder +item=rust +relpath=$(echo $symdir | sed s/headers/lib-rust/)-$flavour/$item +echo ln -s ../$relpath $hdrdir/$item +ln -s ../$relpath $hdrdir/$item + +exit --- linux-xilinx-6.8.0.orig/debian/scripts/misc/annotations +++ linux-xilinx-6.8.0/debian/scripts/misc/annotations @@ -0,0 +1,35 @@ +#!/usr/bin/env python3 +# -*- mode: python -*- + +# This file is not installed; it's just to run annotations from inside a source +# distribution without installing it in the system. + +import sys + +# Prevent generating .pyc files on import +# +# We may end up adding these files to our git repos by mistake, so simply +# prevent generating them in advance. +# +# There's a tiny performance penalty with this, because python needs to +# re-generate the bytecode on-the-fly every time the script is executed, but +# this overhead is absolutely negligible compared the rest of the kernel build +# time. +sys.dont_write_bytecode = True + +import os # noqa: E402 Import not at top of file + +from kconfig import run # noqa: E402 Import not at top of file + + +# Update PATH to make sure that annotations can be executed directly from the +# source directory. +def update_path(): + script_dir = os.path.dirname(os.path.abspath(__file__)) + current_path = os.environ.get("PATH", "") + new_path = f"{script_dir}:{current_path}" + os.environ["PATH"] = new_path + + +update_path() +exit(run.main()) --- linux-xilinx-6.8.0.orig/debian/scripts/misc/find-missing-sauce.sh +++ linux-xilinx-6.8.0/debian/scripts/misc/find-missing-sauce.sh @@ -0,0 +1,15 @@ +#!/bin/bash +# +# Find the 'UBUNTU: SAUCE:' patches that have been dropped from +# the previous release. +# +PREV_REL=focal +PREV_REPO=git://kernel.ubuntu.com/ubuntu/ubuntu-${PREV_REL}.git + +git fetch ${PREV_REPO} master-next +git log --pretty=oneline FETCH_HEAD|grep SAUCE|while read c m;do echo $m;done |sort > $$.prev-rel +git log --pretty=oneline |grep SAUCE|while read c m;do echo $m;done |sort > $$.curr-rel + +diff -u $$.prev-rel $$.curr-rel |grep "^-" +rm -f $$.prev-rel $$.curr-rel + --- linux-xilinx-6.8.0.orig/debian/scripts/misc/gen-auto-reconstruct +++ linux-xilinx-6.8.0/debian/scripts/misc/gen-auto-reconstruct @@ -0,0 +1,89 @@ +#!/bin/bash + +if [ "$#" -ne 3 ]; then + echo "Usage: $0 | " 1>&2 + exit 1 +fi +tag="$1" +reconstruct="$2" +options="$3" + +case "$tag" in +v*) ;; +*) tag="v${tag%.*}" ;; +esac + +# Validate the tag. +count=$( git tag -l "$tag" | wc -l ) +if [ "$count" != 1 ]; then + echo "$0: $tag: tag invalid" 1>&2 + exit 1 +fi + +#git ls-tree -r --full-tree HEAD | grep ^120 | \ +#while read mode type blobid name + +( + # Identify all new symlinks since the proffered tag. + echo "# Recreate any symlinks created since the orig." + git diff "$tag.." --raw --no-renames | awk '(/^:000000 120000/ && $5 == "A") { print $NF }' | \ + while read name + do + link=$( readlink "$name" ) + + echo "[ ! -L '$name' ] && ln -sf '$link' '$name'" + done + + # Identify files with execute permissions added since the proffered tag. + git diff "$tag.." --raw --no-renames | awk -F '[: \t]' '{print $2, $3, $NF }' | \ + while IFS=" " read old new name + do + old=$( printf "0%s" $old ) + new=$( printf "0%s" $new ) + changed=$(( (old ^ new) & 0111 )) + if [ "$changed" -ne 0 ]; then + added=$(( new & 0111 )) + if [ "$added" -ne 0 ]; then + echo "chmod +x '$name'" + elif [ "$new" -ne 0 ]; then + echo "chmod -x '$name'" + fi + fi + done + + # Identify all removed files since the proffered tag. + echo "# Remove any files deleted from the orig." + git diff "$tag.." --raw --no-renames | awk '(/^:/ && $5 == "D") { print $NF }' | \ + while read name + do + echo "rm -f '$name'" + done + + # All done, make sure this does not complete in error. + echo "exit 0" +) >"$reconstruct" + +( + # Identify all new symlinks since the proffered tag. + echo "# Ignore any symlinks created since the orig which are rebuilt by reconstruct." + git diff "$tag.." --raw --no-renames | awk '(/^:000000 120000/ && $5 == "A") { print $NF }' | \ + while read name + do + echo "extend-diff-ignore=^$name\$" + done +) >"$options.update" + + +head='^## autoreconstruct -- begin$' +foot='^## autoreconstruct -- end$' +sed -i -e " + /$head/,/$foot/{ + /$head/{ + p; + r $options.update + }; + /$foot/p; + d + } +" "$options" +rm -f "$options.update" --- linux-xilinx-6.8.0.orig/debian/scripts/misc/git-ubuntu-log +++ linux-xilinx-6.8.0/debian/scripts/misc/git-ubuntu-log @@ -0,0 +1,165 @@ +#!/usr/bin/env python3 + +import sys + +import codecs +import urllib.request +import json + +import textwrap + +sys.stdin = codecs.getreader("utf-8")(sys.stdin.detach()) +sys.stdout = codecs.getwriter("utf-8")(sys.stdout.detach()) + +entries = [] + + +def add_entry(entry): + global tracking_bug + + if entry and 'ignore' not in entry: + combo = [] + for bug in set(entry.get('bugs', [])): + combo.append(bug) + for cve in set(entry.get('cves', [])): + combo.append(cve) + combo = sorted(combo) + + if len(combo) == 0: + if entry.get('subject', "").startswith('UBUNTU'): + combo = '__packaging__' + else: + combo = '__mainline__' + else: + if entry.get('subject', "") == 'UBUNTU: link-to-tracker: update tracking bug': + tracking_bug = combo + if combo not in keys: + keys.append(combo) + + entry['key'] = combo + entries.append(entry) + + +# Suck up the git log output and extract the information we need. +keys = [] +tracking_bug = None +entry = None +subject_wait = False +for line in sys.stdin: + if line.startswith('commit '): + add_entry(entry) + entry = {} + subject_wait = True + + elif line.startswith('Author: '): + bits = line.strip().split(maxsplit=1) + entry['author'] = bits[1] + + elif subject_wait and line.startswith(' '): + subject_wait = False + entry['subject'] = line.strip() + + elif line.startswith(' BugLink: '): + bits = line.strip().split(maxsplit=2) + if len(bits) > 2: + # There is text after the URL, so use that (after stripping the + # enclosing characters) + entry.setdefault('bugs', []).append(bits[2][1:-1]) + elif 'launchpad.net' in bits[1]: + # Extract the bug number from the launchpad URL + bits = bits[1].split('/') + entry.setdefault('bugs', []).append(bits[-1]) + + elif line.startswith(' CVE-'): + entry.setdefault('cves', []).append(line.strip()) + + elif line.startswith(' Ignore:'): + entry['ignore'] = True + + elif line.startswith(' Properties:'): + for prop in line.strip().split()[1:]: + if prop in ('ignore', 'no-changelog'): + entry['ignore'] = True + +add_entry(entry) + +entries.reverse() + +# Go through the entries and clear out authors for upstream commits. +for entry in entries: + if entry['subject'].startswith('UBUNTU:'): + entry['subject'] = entry['subject'][7:].strip() + else: + del entry['author'] + +# Lump everything without a bug at the bottom. +keys.append('__packaging__') +keys.append('__mainline__') + +# Ensure we list the tracking bug updates first. +if tracking_bug is not None: + keys.remove(tracking_bug) + keys.insert(0, tracking_bug) + +emit_nl = False +for key in keys: + if key == '__packaging__': + title_set = ['Miscellaneous Ubuntu changes'] + elif key == '__mainline__': + title_set = ['Miscellaneous upstream changes'] + else: + title_set = [] + for bug in key: + if bug.startswith('CVE-'): + title_set.append(bug) + elif bug.isdigit(): + # Assume that it is an LP bug number if 'bug' contains only digits + bug_info = None + + try: + # urllib.request.urlcleanup() + request = urllib.request.Request('https://api.launchpad.net/devel/bugs/' + bug) + request.add_header('Cache-Control', 'no-cache') + with urllib.request.urlopen(request) as response: + data = response.read() + bug_info = json.loads(data.decode('utf-8')) + + title = bug_info['title'] + if 'description' in bug_info: + for line in bug_info['description'].split('\n'): + if line.startswith('Kernel-Description:'): + title = line.split(' ', 1)[1] + + except urllib.error.HTTPError: + title = 'INVALID or PRIVATE BUG' + + title += ' (LP###' + bug + ')' + title_set.append(title) + else: + # Finally treat 'bug' itself as the title + title_set.append(bug) + + emit_title = True + for entry in entries: + if entry['key'] != key: + continue + + if emit_title: + if emit_nl: + print('') + emit_nl = True + + title_lines = textwrap.wrap('#// '.join(title_set), 76) + print(' * ' + title_lines[0].replace('LP###', 'LP: #').replace('#//', ' //')) + for line in title_lines[1:]: + line = line.replace('LP###', 'LP: #').replace('#//', ' //') + print(' ' + line) + + emit_title = False + + if key != tracking_bug or (key == tracking_bug and entry['subject'] != "link-to-tracker: update tracking bug"): + title_lines = textwrap.wrap(entry['subject'], 76) + print(' - ' + title_lines[0]) + for line in title_lines[1:]: + line = line.replace('LP###', 'LP: #') + print(' ' + line) --- linux-xilinx-6.8.0.orig/debian/scripts/misc/insert-changes +++ linux-xilinx-6.8.0/debian/scripts/misc/insert-changes @@ -0,0 +1,42 @@ +#!/usr/bin/python3 + +import os +import sys + +from subprocess import check_output + +droot = 'debian' +if len(sys.argv) > 1: + droot = sys.argv[1] + +debian = 'debian.master' +if len(sys.argv) > 2: + debian = sys.argv[2] + +rules = os.path.join(droot, 'rules') +changelog = os.path.join(debian, 'changelog') +changelog_new = os.path.join(debian, 'changelog.new') + +# Generate the list of new changes +changes = check_output(['make', '-s', '-f', rules, 'printchanges']).decode('UTF-8') + +# Insert the new changes into the changelog +with open(changelog) as orig, open(changelog_new, 'w') as new: + printed = False + skip_newline = False + for line in orig: + if line.startswith(' CHANGELOG: '): + if not printed: + printed = True + if changes == '': + skip_newline = True + continue + new.write(changes) + else: + if skip_newline and line.strip() == '': + skip_newline = False + continue + new.write(line) + +# Replace the original changelog with the new one +os.rename(changelog_new, changelog) --- linux-xilinx-6.8.0.orig/debian/scripts/misc/insert-ubuntu-changes +++ linux-xilinx-6.8.0/debian/scripts/misc/insert-ubuntu-changes @@ -0,0 +1,64 @@ +#!/usr/bin/env python3 + +import re +import os +import sys + +def version_cmp(a, b): + a = re.split(r"[\.-]+", a) + b = re.split(r"[\.-]+", b) + i = 0 + while True: + if len(a) <= i: + if len(b) <= i: + return 0 + return -1 + if len(b) <= i: + return 1 + if int(a[i]) < int(b[i]): + return -1 + if int(a[i]) > int(b[i]): + return 1 + i += 1 + +if len(sys.argv) == 4: + sys.argv.append("debian.master/changelog") + +if len(sys.argv) == 5: + changelog, end, start, source_changelog = sys.argv[1:] +else: + print("Usage: insert-ubuntu-changes []") + sys.exit(1) + +changes = [] +output = False +with open(source_changelog) as fh: + for line in fh: + m = re.match(r"^\S+\s+\((.*)\)", line) + if m: + if version_cmp(m.group(1), end) <= 0: + break + if m.group(1) == start: + output = True + if output: + changes.append("\n") + changes.append(" [ Ubuntu: {} ]\n".format(m.group(1))) + changes.append("\n") + continue + + if output and re.match(r"^( * | | )\S", line): + changes.append(line) + +printed = 3 +with open(changelog + ".new", "w") as fh_new: + with open(changelog) as fh: + for line in fh: + if line.startswith(" CHANGELOG: "): + printed -= 1 + fh_new.write(line) + if printed == 0: + fh_new.write("".join(changes)) + continue + fh_new.write(line) + +os.rename(changelog + ".new", changelog) --- linux-xilinx-6.8.0.orig/debian/scripts/misc/kconfig/annotations.py +++ linux-xilinx-6.8.0/debian/scripts/misc/kconfig/annotations.py @@ -0,0 +1,521 @@ +# -*- mode: python -*- +# python module to manage Ubuntu kernel .config and annotations +# Copyright © 2022 Canonical Ltd. + +import json +import re +import shutil +import tempfile +from abc import abstractmethod +from ast import literal_eval +from os.path import abspath, dirname + +from kconfig.version import ANNOTATIONS_FORMAT_VERSION + + +class Config: + def __init__(self, fname, do_include=True): + """ + Basic configuration file object + """ + self.fname = fname + self.config = {} + self.do_include = do_include + + raw_data = self._load(fname) + self._parse(raw_data) + + @staticmethod + def _load(fname: str) -> str: + with open(fname, "rt", encoding="utf-8") as fd: + data = fd.read() + return data.rstrip() + + def __str__(self): + """Return a JSON representation of the config""" + return json.dumps(self.config, indent=4) + + @abstractmethod + def _parse(self, data: str): + pass + + +class KConfig(Config): + """ + Parse a .config file, individual config options can be accessed via + .config[] + """ + + def _parse(self, data: str): + self.config = {} + for line in data.splitlines(): + m = re.match(r"^# (CONFIG_.*) is not set$", line) + if m: + self.config[m.group(1)] = literal_eval("'n'") + continue + m = re.match(r"^(CONFIG_[A-Za-z0-9_]+)=(.*)$", line) + if m: + self.config[m.group(1)] = literal_eval("'" + m.group(2) + "'") + continue + + +class Annotation(Config): + """ + Parse body of annotations file + """ + + def __init__(self, fname, do_include=True, do_json=False): + self.do_json = do_json + super().__init__(fname, do_include=True) + + def _parse_body(self, data: str, parent=True): + for line in data.splitlines(): + # Replace tabs with spaces, squeeze multiple into singles and + # remove leading and trailing spaces + line = line.replace("\t", " ") + line = re.sub(r" +", " ", line) + line = line.strip() + + # Ignore empty lines + if not line: + continue + + # Catpure flavors of included files + if line.startswith("# FLAVOUR: "): + self.include_flavour += line.split(" ")[2:] + continue + + # Ignore comments + if line.startswith("#"): + continue + + # Handle includes (recursively) + m = re.match(r'^include\s+"?([^"]*)"?', line) + if m: + if parent: + self.include.append(m.group(1)) + if self.do_include: + include_fname = dirname(abspath(self.fname)) + "/" + m.group(1) + include_data = self._load(include_fname) + self._parse_body(include_data, parent=False) + continue + + # Handle policy and note lines + if re.match(r".* (policy|note)<", line): + try: + conf = line.split(" ")[0] + if conf in self.config: + entry = self.config[conf] + else: + entry = {"policy": {}} + + match = False + m = re.match(r".* policy<(.*?)>", line) + if m: + match = True + # Update the previous entry considering potential overrides: + # - if the new entry is adding a rule for a new + # arch/flavour, simply add that + # - if the new entry is overriding a previous + # arch-flavour item, then overwrite that item + # - if the new entry is overriding a whole arch, then + # remove all the previous flavour rules of that arch + new_entry = literal_eval(m.group(1)) + for key in new_entry: + if key in self.arch: + for flavour_key in list(entry["policy"].keys()): + if flavour_key.startswith(key): + del entry["policy"][flavour_key] + entry["policy"][key] = new_entry[key] + else: + entry["policy"][key] = new_entry[key] + + m = re.match(r".* note<(.*?)>", line) + if m: + entry["oneline"] = match + match = True + entry["note"] = "'" + m.group(1).replace("'", "") + "'" + + if not match: + raise SyntaxError("syntax error") + self.config[conf] = entry + except Exception as e: + raise SyntaxError(str(e) + f", line = {line}") from e + continue + + # Invalid line + raise SyntaxError(f"invalid line: {line}") + + def _legacy_parse(self, data: str): + """ + Parse main annotations file, individual config options can be accessed + via self.config[] + """ + self.config = {} + self.arch = [] + self.flavour = [] + self.flavour_dep = {} + self.include = [] + self.header = "" + self.include_flavour = [] + + # Parse header (only main header will considered, headers in includes + # will be treated as comments) + for line in data.splitlines(): + if re.match(r"^#.*", line): + m = re.match(r"^# ARCH: (.*)", line) + if m: + self.arch = list(m.group(1).split(" ")) + m = re.match(r"^# FLAVOUR: (.*)", line) + if m: + self.flavour = list(m.group(1).split(" ")) + m = re.match(r"^# FLAVOUR_DEP: (.*)", line) + if m: + self.flavour_dep = literal_eval(m.group(1)) + self.header += line + "\n" + else: + break + + # Return an error if architectures are not defined + if not self.arch: + raise SyntaxError("ARCH not defined in annotations") + # Return an error if flavours are not defined + if not self.flavour: + raise SyntaxError("FLAVOUR not defined in annotations") + + # Parse body + self._parse_body(data) + + # Sanity check: Verify that all FLAVOUR_DEP flavors are valid + if self.do_include: + for src, tgt in self.flavour_dep.items(): + if src not in self.flavour: + raise SyntaxError(f"Invalid source flavour in FLAVOUR_DEP: {src}") + if tgt not in self.include_flavour: + raise SyntaxError(f"Invalid target flavour in FLAVOUR_DEP: {tgt}") + + def _json_parse(self, data, is_included=False): + data = json.loads(data) + + # Check if version is supported + version = data["attributes"]["_version"] + if version > ANNOTATIONS_FORMAT_VERSION: + raise SyntaxError(f"annotations format version {version} not supported") + + # Check for top-level annotations vs imported annotations + if not is_included: + self.config = data["config"] + self.arch = data["attributes"]["arch"] + self.flavour = data["attributes"]["flavour"] + self.flavour_dep = data["attributes"]["flavour_dep"] + self.include = data["attributes"]["include"] + self.include_flavour = [] + else: + # We are procesing an imported annotations, so merge all the + # configs and attributes. + try: + self.config = data["config"] | self.config + except TypeError: + self.config = {**self.config, **data["config"]} + self.arch = list(set(self.arch) | set(data["attributes"]["arch"])) + self.flavour = list(set(self.flavour) | set(data["attributes"]["flavour"])) + self.include_flavour = list(set(self.include_flavour) | set(data["attributes"]["flavour"])) + self.flavour_dep = self.flavour_dep | data["attributes"]["flavour_dep"] + + # Handle recursive inclusions + if self.do_include: + for f in data["attributes"]["include"]: + include_fname = dirname(abspath(self.fname)) + "/" + f + data = self._load(include_fname) + self._json_parse(data, is_included=True) + + def _parse(self, data: str): + if self.do_json: + self._json_parse(data, is_included=False) + else: + self._legacy_parse(data) + + def _remove_entry(self, config: str): + if self.config[config]: + del self.config[config] + + def remove(self, config: str, arch: str = None, flavour: str = None): + if config not in self.config: + return + if arch is not None: + if flavour is not None: + flavour = f"{arch}-{flavour}" + else: + flavour = arch + del self.config[config]["policy"][flavour] + if not self.config[config]["policy"]: + self._remove_entry(config) + else: + self._remove_entry(config) + + def set( + self, + config: str, + arch: str = None, + flavour: str = None, + value: str = None, + note: str = None, + ): + if value is not None: + if config not in self.config: + self.config[config] = {"policy": {}} + if arch is not None: + if flavour is not None: + flavour = f"{arch}-{flavour}" + else: + flavour = arch + self.config[config]["policy"][flavour] = value + else: + for a in self.arch: + self.config[config]["policy"][a] = value + if note is not None: + self.config[config]["note"] = "'" + note.replace("'", "") + "'" + + def update(self, c: KConfig, arch: str, flavour: str = None, configs: list = None): + """Merge configs from a Kconfig object into Annotation object""" + + # Determine if we need to import all configs or a single config + if not configs: + configs = c.config.keys() + try: + configs |= self.search_config(arch=arch, flavour=flavour).keys() + except TypeError: + configs = { + **configs, + **self.search_config(arch=arch, flavour=flavour).keys(), + } + + # Import configs from the Kconfig object into Annotations + flavour_arg = flavour + if flavour is not None: + flavour = arch + f"-{flavour}" + else: + flavour = arch + for conf in configs: + if conf in c.config: + val = c.config[conf] + else: + val = "-" + if conf in self.config: + if "policy" in self.config[conf]: + # Add a TODO if a config with a note is changing and print + # a warning + old_val = self.search_config(config=conf, arch=arch, flavour=flavour_arg) + if old_val: + old_val = old_val[conf] + if val != old_val and "note" in self.config[conf]: + self.config[conf]["note"] = "TODO: update note" + print(f"WARNING: {conf} changed from {old_val} to {val}, updating note") + self.config[conf]["policy"][flavour] = val + else: + self.config[conf]["policy"] = {flavour: val} + else: + self.config[conf] = {"policy": {flavour: val}} + + def _compact(self): + # Try to remove redundant settings: if the config value of a flavour is + # the same as the one of the main arch simply drop it. + for conf in self.config.copy(): + if "policy" not in self.config[conf]: + continue + for flavour in self.flavour: + if flavour not in self.config[conf]["policy"]: + continue + m = re.match(r"^(.*?)-(.*)$", flavour) + if not m: + continue + arch = m.group(1) + if arch in self.config[conf]["policy"]: + if self.config[conf]["policy"][flavour] == self.config[conf]["policy"][arch]: + del self.config[conf]["policy"][flavour] + continue + if flavour not in self.flavour_dep: + continue + generic = self.flavour_dep[flavour] + if generic in self.config[conf]["policy"]: + if self.config[conf]["policy"][flavour] == self.config[conf]["policy"][generic]: + del self.config[conf]["policy"][flavour] + continue + # Remove rules for flavours / arches that are not supported (not + # listed in the annotations header). + for flavour in self.config[conf]["policy"].copy(): + if flavour not in list(set(self.arch + self.flavour)): + del self.config[conf]["policy"][flavour] + # Remove configs that are all undefined across all arches/flavours + # (unless we have includes) + if not self.include: + if "policy" in self.config[conf]: + if list(set(self.config[conf]["policy"].values())) == ["-"]: + self.config[conf]["policy"] = {} + # Drop empty rules + if not self.config[conf]["policy"]: + del self.config[conf] + else: + # Compact same value across all flavour within the same arch + for arch in self.arch: + arch_flavours = [i for i in self.flavour if i.startswith(arch)] + value = None + for flavour in arch_flavours: + if flavour not in self.config[conf]["policy"]: + break + if value is None: + value = self.config[conf]["policy"][flavour] + elif value != self.config[conf]["policy"][flavour]: + break + else: + for flavour in arch_flavours: + del self.config[conf]["policy"][flavour] + self.config[conf]["policy"][arch] = value + # After the first round of compaction we may end up having configs that + # are undefined across all arches, so do another round of compaction to + # drop these settings that are not needed anymore + # (unless we have includes). + if not self.include: + for conf in self.config.copy(): + # Remove configs that are all undefined across all arches/flavours + if "policy" in self.config[conf]: + if list(set(self.config[conf]["policy"].values())) == ["-"]: + self.config[conf]["policy"] = {} + # Drop empty rules + if not self.config[conf]["policy"]: + del self.config[conf] + + @staticmethod + def _sorted(config): + """Sort configs alphabetically but return configs with a note first""" + w_note = [] + wo_note = [] + for c in sorted(config): + if "note" in config[c]: + w_note.append(c) + else: + wo_note.append(c) + return w_note + wo_note + + def save(self, fname: str): + """Save annotations data to the annotation file""" + # Compact annotations structure + self._compact() + + # Save annotations to disk + with tempfile.NamedTemporaryFile(mode="w+t", delete=False) as tmp: + # Write header + tmp.write(self.header + "\n") + + # Write includes + for i in self.include: + tmp.write(f'include "{i}"\n') + if self.include: + tmp.write("\n") + + # Write config annotations and notes + tmp.flush() + shutil.copy(tmp.name, fname) + tmp_a = Annotation(fname) + + # Only save local differences (preserve includes) + marker = False + for conf in self._sorted(self.config): + new_val = self.config[conf] + if "policy" not in new_val: + continue + + # If new_val is a subset of old_val, skip it unless there are + # new notes that are different than the old ones. + old_val = tmp_a.config.get(conf) + if old_val and "policy" in old_val: + try: + can_skip = old_val["policy"] == old_val["policy"] | new_val["policy"] + except TypeError: + can_skip = old_val["policy"] == { + **old_val["policy"], + **new_val["policy"], + } + if can_skip: + if "note" not in new_val: + continue + if "note" in old_val and "note" in new_val: + if old_val["note"] == new_val["note"]: + continue + + # Write out the policy (and note) line(s) + val = dict(sorted(new_val["policy"].items())) + line = f"{conf: <47} policy<{val}>" + if "note" in new_val: + val = new_val["note"] + if new_val.get("oneline", False): + # Single line + line += f" note<{val}>" + else: + # Separate policy and note lines, + # followed by an empty line + line += f"\n{conf: <47} note<{val}>\n" + elif not marker: + # Write out a marker indicating the start of annotations + # without notes + tmp.write("\n# ---- Annotations without notes ----\n\n") + marker = True + tmp.write(line + "\n") + + # Replace annotations with the updated version + tmp.flush() + shutil.move(tmp.name, fname) + + def search_config(self, config: str = None, arch: str = None, flavour: str = None) -> dict: + """Return config value of a specific config option or architecture""" + if flavour is None: + flavour = "generic" + flavour = f"{arch}-{flavour}" + if flavour in self.flavour_dep: + generic = self.flavour_dep[flavour] + else: + generic = flavour + if config is None and arch is None: + # Get all config options for all architectures + return self.config + if config is None and arch is not None: + # Get config options of a specific architecture + ret = {} + for c, val in self.config.items(): + if "policy" not in val: + continue + if flavour in val["policy"]: + ret[c] = val["policy"][flavour] + elif generic != flavour and generic in val["policy"]: + ret[c] = val["policy"][generic] + elif arch in val["policy"]: + ret[c] = val["policy"][arch] + return ret + if config is not None and arch is None: + # Get a specific config option for all architectures + return self.config[config] if config in self.config else None + if config is not None and arch is not None: + # Get a specific config option for a specific architecture + if config in self.config: + if "policy" in self.config[config]: + if flavour in self.config[config]["policy"]: + return {config: self.config[config]["policy"][flavour]} + if generic != flavour and generic in self.config[config]["policy"]: + return {config: self.config[config]["policy"][generic]} + if arch in self.config[config]["policy"]: + return {config: self.config[config]["policy"][arch]} + return None + + @staticmethod + def to_config(data: dict) -> str: + """Convert annotations data to .config format""" + s = "" + for c in data: + v = data[c] + if v == "n": + s += f"# {c} is not set\n" + elif v == "-": + pass + else: + s += f"{c}={v}\n" + return s.rstrip() --- linux-xilinx-6.8.0.orig/debian/scripts/misc/kconfig/run.py +++ linux-xilinx-6.8.0/debian/scripts/misc/kconfig/run.py @@ -0,0 +1,375 @@ +# -*- mode: python -*- +# Manage Ubuntu kernel .config and annotations +# Copyright © 2022 Canonical Ltd. + +import argparse +import json +import os +import sys +from signal import SIG_DFL, SIGPIPE, signal + +try: + from argcomplete import autocomplete +except ModuleNotFoundError: + # Allow to run this program also when argcomplete is not available + def autocomplete(_unused): + pass + + +from kconfig.annotations import Annotation, KConfig # noqa: E402 Import not at top of file +from kconfig.utils import arg_fail, autodetect_annotations # noqa: E402 Import not at top of file +from kconfig.version import ANNOTATIONS_FORMAT_VERSION, VERSION # noqa: E402 Import not at top of file + +SKIP_CONFIGS = ( + # CONFIG_VERSION_SIGNATURE is dynamically set during the build + "CONFIG_VERSION_SIGNATURE", + # Allow to use a different versions of toolchain tools + "CONFIG_GCC_VERSION", + "CONFIG_CC_VERSION_TEXT", + "CONFIG_AS_VERSION", + "CONFIG_LD_VERSION", + "CONFIG_LLD_VERSION", + "CONFIG_CLANG_VERSION", + "CONFIG_PAHOLE_VERSION", + "CONFIG_RUSTC_VERSION_TEXT", + "CONFIG_BINDGEN_VERSION_TEXT", +) + + +def removeprefix(data, prefix): + if data[: len(prefix)] == prefix: + data = data[len(prefix) :] + return data + + +def make_parser(): + parser = argparse.ArgumentParser( + description="Manage Ubuntu kernel .config and annotations", + ) + parser.add_argument("--version", "-v", action="version", version=f"%(prog)s {VERSION}") + + parser.add_argument( + "--file", + "-f", + action="store", + help="Pass annotations or .config file to be parsed", + ) + parser.add_argument("--arch", "-a", action="store", help="Select architecture") + parser.add_argument("--flavour", "-l", action="store", help='Select flavour (default is "generic")') + parser.add_argument("--config", "-c", action="store", help="Select a specific config option") + parser.add_argument("--query", "-q", action="store_true", help="Query annotations") + parser.add_argument( + "--note", + "-n", + action="store", + help="Write a specific note to a config option in annotations", + ) + parser.add_argument( + "--autocomplete", + action="store_true", + help="Enable config bash autocomplete: `source <(annotations --autocomplete)`", + ) + parser.add_argument( + "--source", + "-t", + action="store_true", + help="Jump to a config definition in the kernel source code", + ) + parser.add_argument( + "--no-include", + action="store_true", + help="Do not process included annotations (stop at the main file)", + ) + parser.add_argument( + "--json", + action="store_true", + help="Try to parse annotations file in pure JSON format", + ) + + ga = parser.add_argument_group(title="Action").add_mutually_exclusive_group(required=False) + ga.add_argument( + "--write", + "-w", + action="store", + metavar="VALUE", + dest="value", + help="Set a specific config value in annotations (use 'null' to remove)", + ) + ga.add_argument( + "--export", + "-e", + action="store_true", + help="Convert annotations to .config format", + ) + ga.add_argument( + "--import", + "-i", + action="store", + metavar="FILE", + dest="import_file", + help="Import a full .config for a specific arch and flavour into annotations", + ) + ga.add_argument( + "--update", + "-u", + action="store", + metavar="FILE", + dest="update_file", + help="Import a partial .config into annotations (only resync configs specified in FILE)", + ) + ga.add_argument( + "--check", + "-k", + action="store", + metavar="FILE", + dest="check_file", + help="Validate kernel .config with annotations", + ) + return parser + + +_ARGPARSER = make_parser() + + +def export_result(data): + # Dump metadata / attributes first + out = '{\n "attributes": {\n' + for key, value in sorted(data["attributes"].items()): + out += f' "{key}": {json.dumps(value)},\n' + out = out.rstrip(",\n") + out += "\n }," + print(out) + + configs_with_note = {key: value for key, value in data["config"].items() if "note" in value} + configs_without_note = {key: value for key, value in data["config"].items() if "note" not in value} + + # Dump configs, sorted alphabetically, showing items with a note first + out = ' "config": {\n' + for key in sorted(configs_with_note) + sorted(configs_without_note): + policy = data["config"][key]["policy"] + if "note" in data["config"][key]: + note = data["config"][key]["note"] + out += f' "{key}": {{"policy": {json.dumps(policy)}, "note": {json.dumps(note)}}},\n' + else: + out += f' "{key}": {{"policy": {json.dumps(policy)}}},\n' + out = out.rstrip(",\n") + out += "\n }\n}" + print(out) + + +def print_result(config, data): + if data is not None and config is not None and config not in data: + data = {config: data} + print(json.dumps(data, sort_keys=True, indent=2)) + + +def do_query(args): + if args.arch is None and args.flavour is not None: + arg_fail(_ARGPARSER, "error: --flavour requires --arch") + a = Annotation(args.file, do_include=(not args.no_include), do_json=args.json) + res = a.search_config(config=args.config, arch=args.arch, flavour=args.flavour) + # If no arguments are specified dump the whole annotations structure + if args.config is None and args.arch is None and args.flavour is None: + res = { + "attributes": { + "arch": a.arch, + "flavour": a.flavour, + "flavour_dep": a.flavour_dep, + "include": a.include, + "_version": ANNOTATIONS_FORMAT_VERSION, + }, + "config": res, + } + export_result(res) + else: + print_result(args.config, res) + + +def do_autocomplete(args): + a = Annotation(args.file) + res = (removeprefix(c, "CONFIG_") for c in a.search_config()) + res_str = " ".join(res) + print(f'complete -W "{res_str}" annotations') + + +def do_source(args): + if args.config is None: + arg_fail(_ARGPARSER, "error: --source requires --config") + if not os.path.exists("tags"): + print("tags not found in the current directory, try: `make tags`") + sys.exit(1) + os.system(f"vim -t {args.config}") + + +def do_note(args): + if args.config is None: + arg_fail(_ARGPARSER, "error: --note requires --config") + + # Set the note in annotations + a = Annotation(args.file) + a.set(args.config, note=args.note) + + # Save back to annotations + a.save(args.file) + + # Query and print back the value + a = Annotation(args.file) + res = a.search_config(config=args.config) + print_result(args.config, res) + + +def do_write(args): + if args.config is None: + arg_fail(_ARGPARSER, "error: --write requires --config") + + # Set the value in annotations ('null' means remove) + a = Annotation(args.file) + if args.value == "null": + a.remove(args.config, arch=args.arch, flavour=args.flavour) + else: + a.set( + args.config, + arch=args.arch, + flavour=args.flavour, + value=args.value, + note=args.note, + ) + + # Save back to annotations + a.save(args.file) + + # Query and print back the value + a = Annotation(args.file) + res = a.search_config(config=args.config) + print_result(args.config, res) + + +def do_export(args): + if args.arch is None: + arg_fail(_ARGPARSER, "error: --export requires --arch") + a = Annotation(args.file) + conf = a.search_config(config=args.config, arch=args.arch, flavour=args.flavour) + if conf: + print(a.to_config(conf)) + + +def do_import(args): + if args.arch is None: + arg_fail(_ARGPARSER, "error: --arch is required with --import") + if args.flavour is None: + arg_fail(_ARGPARSER, "error: --flavour is required with --import") + if args.config is not None: + arg_fail(_ARGPARSER, "error: --config cannot be used with --import (try --update)") + + # Merge with the current annotations + a = Annotation(args.file) + c = KConfig(args.import_file) + a.update(c, arch=args.arch, flavour=args.flavour) + + # Save back to annotations + a.save(args.file) + + +def do_update(args): + if args.arch is None: + arg_fail(_ARGPARSER, "error: --arch is required with --update") + + # Merge with the current annotations + a = Annotation(args.file) + c = KConfig(args.update_file) + if args.config is None: + configs = list(set(c.config.keys()) - set(SKIP_CONFIGS)) + if configs: + a.update(c, arch=args.arch, flavour=args.flavour, configs=configs) + + # Save back to annotations + a.save(args.file) + + +def do_check(args): + # Determine arch and flavour + if args.arch is None: + arg_fail(_ARGPARSER, "error: --arch is required with --check") + + print(f"check-config: loading annotations from {args.file}") + total = good = ret = 0 + + # Load annotations settings + a = Annotation(args.file) + a_configs = a.search_config(arch=args.arch, flavour=args.flavour).keys() + + # Parse target .config + c = KConfig(args.check_file) + c_configs = c.config.keys() + + # Validate .config against annotations + for conf in sorted(a_configs | c_configs): + if conf in SKIP_CONFIGS: + continue + entry = a.search_config(config=conf, arch=args.arch, flavour=args.flavour) + expected = entry[conf] if entry else "-" + value = c.config[conf] if conf in c.config else "-" + if value != expected: + policy = a.config[conf] if conf in a.config else "undefined" + if "policy" in policy: + policy = f"policy<{policy['policy']}>" + print(f"check-config: {conf} changed from {expected} to {value}: {policy})") + ret = 1 + else: + good += 1 + total += 1 + + num = total - good + if ret: + if os.path.exists(".git"): + print(f"check-config: {num} config options have been changed, review them with `git diff`") + else: + print(f"check-config: {num} config options have changed") + else: + print("check-config: all good") + sys.exit(ret) + + +def main(): + # Prevent broken pipe errors when showing output in pipe to other tools + # (less for example) + signal(SIGPIPE, SIG_DFL) + + # Main annotations program + autocomplete(_ARGPARSER) + args = _ARGPARSER.parse_args() + + if args.file is None: + args.file = autodetect_annotations() + if args.file is None: + arg_fail( + _ARGPARSER, + "error: could not determine DEBDIR, try using: --file/-f", + show_usage=False, + ) + + if args.config and not args.config.startswith("CONFIG_"): + args.config = "CONFIG_" + args.config + + if args.value: + do_write(args) + elif args.note: + do_note(args) + elif args.export: + do_export(args) + elif args.import_file: + do_import(args) + elif args.update_file: + do_update(args) + elif args.check_file: + do_check(args) + elif args.autocomplete: + do_autocomplete(args) + elif args.source: + do_source(args) + else: + do_query(args) + + +if __name__ == "__main__": + main() --- linux-xilinx-6.8.0.orig/debian/scripts/misc/kconfig/utils.py +++ linux-xilinx-6.8.0/debian/scripts/misc/kconfig/utils.py @@ -0,0 +1,20 @@ +# -*- mode: python -*- +# Misc helpers for Kconfig and annotations +# Copyright © 2023 Canonical Ltd. + +import sys + + +def autodetect_annotations(): + try: + with open("debian/debian.env", "rt", encoding="utf-8") as fd: + return fd.read().rstrip().split("=")[1] + "/config/annotations" + except (FileNotFoundError, IndexError): + return None + + +def arg_fail(parser, message, show_usage=True): + print(message) + if show_usage: + parser.print_usage() + sys.exit(1) --- linux-xilinx-6.8.0.orig/debian/scripts/misc/kconfig/version.py +++ linux-xilinx-6.8.0/debian/scripts/misc/kconfig/version.py @@ -0,0 +1,10 @@ +# -*- mode: python -*- +# version of annotations module +# Copyright © 2022 Canonical Ltd. + +VERSION = "0.1" + +ANNOTATIONS_FORMAT_VERSION = 5 + +if __name__ == "__main__": + print(VERSION) --- linux-xilinx-6.8.0.orig/debian/scripts/misc/kernelconfig +++ linux-xilinx-6.8.0/debian/scripts/misc/kernelconfig @@ -0,0 +1,178 @@ +#!/bin/bash -u +# +# Manage kernel config annotations +# +# Supported environment variales: +# conc_level : Concurrency level for upstream make (-jX) +# skip_checks : Skip config checks if set to 'true' +# gcc : Default gcc to use (mandatory) +# + +function cleanup() +{ + rm -rf build "${TMP_DIR}" +} + +# We have to be in the top level Ubuntu kernel source directory +if ! [ -e debian/debian.env ] ; then + echo "ERROR: This is not an Ubuntu kernel source directory" >&2 + exit 1 +fi + +if [ -z "${gcc:-}" ] ; then + echo "ERROR: 'gcc' environment variable must be set" >&2 + exit 1 +fi + +if [ ${#} -ne 1 ] ; then + echo "Usage: $0 updateconfigs|defaultconfigs|genconfigs|editconfigs" + exit 2 +fi + +mode=${1} + +case "${mode}" in + updateconfigs) target="syncconfig" ;; + defaultconfigs) target="olddefconfig" ;; + genconfigs) target="oldconfig" ;; + editconfigs) ;; # Target is set later based on user input + *) echo "ERROR: Invalid mode: ${1}" >&2 + exit 1 ;; +esac + +. debian/debian.env + +annotations_file=${DEBIAN}/config/annotations +warning_partial=() + +TMP_DIR=$(mktemp -d) +trap cleanup EXIT + +# Use annotations to generate configs +FLAVOURS=$(sed -ne 's/^# FLAVOUR: //p' "${annotations_file}") + +for arch_flavour in ${FLAVOURS} ; do + arch=${arch_flavour%%-*} + flavour=${arch_flavour#*-} + tmp_conf_file=${TMP_DIR}/${arch}-config.flavour.${flavour} + + # Map debian archs to kernel archs + case "${arch}" in + amd64) kern_arch="x86_64" ;; + arm64) kern_arch="arm64" ;; + armhf) kern_arch="arm" ;; + ppc64el) kern_arch="powerpc" ;; + riscv64) kern_arch="riscv" ;; + s390x) kern_arch="s390" ;; + *) echo "WARNING: Unsupported architecture: ${arch}" + warning_partial+=("${arch}") + continue ;; + esac + + # Determine cross toolchain to use for Kconfig compiler tests + cross_compile="$(dpkg-architecture -qDEB_HOST_GNU_TYPE -a"${arch}" 2>/dev/null)-" + + # Arch-specific compiler, if any + arch_gcc=$(cat < build/.config + + # Environment variables for 'make *config' + env=(ARCH="${kern_arch}" + DEB_ARCH="${arch}" + CROSS_COMPILE="${cross_compile}" + CC="${gcc_path}") + + # Concurrency level + if [ -n "${conc_level:-}" ] ; then + env+=("${conc_level}") + fi + + # Call config target + echo + echo "* Run ${target} on ${arch}/${flavour} ..." + ${kmake} O=build "${env[@]}" "${target}" + + # Move config for further processing + mv build/.config "${tmp_conf_file}" +done + +rc=0 + +if [ "${skip_checks:-}" = "true" ] ; then + echo + echo "Skipping config-check (skip_checks=${skip_checks}) ..." +else + echo + echo "Running config-check for all configurations ..." + fail=0 + for arch_flavour in ${FLAVOURS} ; do + arch=${arch_flavour%%-*} + flavour=${arch_flavour#*-} + tmp_conf_file=${TMP_DIR}/${arch}-config.flavour.${flavour} + + echo + echo "* Run config-check for ${arch}-${flavour} ..." + python3 debian/scripts/misc/annotations -f "${annotations_file}" \ + --arch "${arch}" --flavour "${flavour}" --check "${tmp_conf_file}" || \ + fail=$((fail + 1)) + done + + if [ ${fail} -gt 0 ] ; then + rc=1 + echo "ERROR: ${fail} config-check failures detected" >&2 + fi +fi + +if [ ${#warning_partial[@]} -gt 0 ] ; then + rc=1 + echo "ERROR: Config operation not applied to all architectures (skipped ${warning_partial[*]})" >&2 +fi + +# Recreate the annotations file +if [ "${mode}" = "genconfigs" ] ; then + rm -rf CONFIGS + mv "${TMP_DIR}" CONFIGS +else + echo + echo "Importing all configurations ..." + echo + for arch_flavour in ${FLAVOURS} ; do + arch=${arch_flavour%%-*} + flavour=${arch_flavour#*-} + tmp_conf_file=${TMP_DIR}/${arch}-config.flavour.${flavour} + + echo "* Import configs for ${arch}-${flavour} ..." + python3 debian/scripts/misc/annotations -f "${annotations_file}" \ + --arch "${arch}" --flavour "${flavour}" --import "${tmp_conf_file}" + done +fi + +exit "${rc}" --- linux-xilinx-6.8.0.orig/debian/scripts/module-inclusion +++ linux-xilinx-6.8.0/debian/scripts/module-inclusion @@ -0,0 +1,104 @@ +#!/bin/bash + +# +# Build a new directory of modules based on an inclusion list. +# The includsion list format must be a bash regular expression. +# +# usage: $0 ROOT INCLUSION_LIST +# example: $0 \ +# debian/build/build-virtual-ALL debian/build/build-virtual \ +# debian.master/control.d/virtual.inclusion-list \ +# virtual.depmap +master=0 +if [ "$1" = "--master" ]; then + master=1 + shift +fi + +ROOT=$1 +NROOT=$2 +ILIST=$3 +DEPMAP=$4 + +tmp="/tmp/module-inclusion.$$" + +# +# Prep a destination directory. +# +mkdir -p ${NROOT} + +{ + # Copy over the framework into the master package. + if [ "$master" -eq 1 ]; then + (cd ${ROOT}; find . ! -name "*.ko" -type f) + fi + + # Copy over modules by name or pattern. + while read -r i + do + # + # 'find' blurts a warning if it cannot find any ko files. + # + case "$i" in + \!*) + (cd ${ROOT}; ${i#!} || true) + ;; + *\**) + (cd ${ROOT}; eval find "${i}" -name "*.ko" || true) + ;; + *) + echo "$i" + ;; + esac + done <"${ILIST}" +} >"$tmp" + +# Copy over the listed modules. +while read i +do + # If this is already moved over, all is good. + if [ -f "${NROOT}/$i" ]; then + : + + # If present in the source, moved it over. + elif [ -f "${ROOT}/$i" ]; then + mkdir -p "${NROOT}/`dirname $i`" + mv "${ROOT}/$i" "${NROOT}/$i" + + # Otherwise, it is missing. + else + echo "Warning: Could not find ${ROOT}/$i" 1>&2 + fi +done <"$tmp" + +# Copy over any dependancies, note if those are missing +# we know they are in a pre-requisite package as they must +# have existed at depmap generation time, and can only have +# moved into a package. +let n=0 || true +while [ -s "$tmp" ] +do + let n="$n+1" || true + [ "$n" = "20" ] && break || true + + echo "NOTE: pass $n: dependency scan" 1>&2 + + while read i + do + grep "^$i " "$DEPMAP" | \ + while read m d + do + if [ -f "${ROOT}/$d" ]; then + echo "NOTE: pass $n: ${i} pulls in ${d}" 1>&2 + echo "$d" + mkdir -p "${NROOT}/`dirname $d`" + mv "${ROOT}/$d" "${NROOT}/$d" + fi + done + done <"$tmp" >"$tmp.new" + mv -f "$tmp.new" "$tmp" +done + +rm -f "$tmp" + +exit 0 --- linux-xilinx-6.8.0.orig/debian/scripts/sign-module +++ linux-xilinx-6.8.0/debian/scripts/sign-module @@ -0,0 +1,40 @@ +#!/bin/bash -eu +# +# Staging drivers must not be signed if they are not listed in a +# signature-inclusion file to prevent loading of 'unsafe' drivers in a +# Secure Boot environment. +# +# Exit with status 0 if the provided module needs to be signed, 1 otherwise +# + +mod=${1} + +# Sign the module if not a staging driver +if [ "${mod/\/drivers\/staging\//}" = "${mod}" ] ; then + exit 0 +fi + +root=$(dirname "$(realpath -e "${0}")")/../.. +. "${root}"/debian/debian.env + +# Collect the signature-inclusion files +sig_incls=() +for d in debian "${DEBIAN}" ; do + if [ -f "${root}"/"${d}"/signature-inclusion ] ; then + sig_incls+=("${root}"/"${d}"/signature-inclusion) + fi +done + +# Sign the module if no signature-inclusion files +if [ ${#sig_incls[@]} -eq 0 ] ; then + exit 0 +fi + +# Sign the module if listed in signature-inclusion files +if grep -qFx "${mod##*/}" "${sig_incls[@]}" ; then + exit 0 +fi + +# Don't sign the module +echo "UBUNTU: Not signing ${1}" +exit 1 --- linux-xilinx-6.8.0.orig/debian/signature-inclusion +++ linux-xilinx-6.8.0/debian/signature-inclusion @@ -0,0 +1,12 @@ +# +# This file lists the staging drivers that are safe for signing +# and loading in a secure boot environment with signed module enforcement. +# +r8188eu.ko +r8192e_pci.ko +r8192u_usb.ko +r8712u.ko +rtllib_crypt_ccmp.ko +rtllib_crypt_tkip.ko +rtllib_crypt_wep.ko +rtllib.ko --- linux-xilinx-6.8.0.orig/debian/snapcraft.mk +++ linux-xilinx-6.8.0/debian/snapcraft.mk @@ -0,0 +1,11 @@ +ifeq ($(ARCH),) + arch := $(shell uname -m | sed -e s/i.86/i386/ -e s/x86_64/amd64/ \ + -e s/arm.*/armhf/ -e s/s390/s390x/ -e s/ppc.*/powerpc/ \ + -e s/aarch64.*/arm64/ ) +else ifeq ($(ARCH),arm) + arch := armhf +else + arch := $(ARCH) +endif +config: + python3 debian/scripts/misc/annotations --export --arch $(arch) --flavour $(flavour) >.config --- linux-xilinx-6.8.0.orig/debian/source/format +++ linux-xilinx-6.8.0/debian/source/format @@ -0,0 +1 @@ +1.0 --- linux-xilinx-6.8.0.orig/debian/source/options +++ linux-xilinx-6.8.0/debian/source/options @@ -0,0 +1,8 @@ +# Ignore vbox symlinks, we will regenerate these at clean (LP:1426113) +## autoreconstruct -- begin +# Ignore any symlinks created since the orig which are rebuilt by reconstruct. +## autoreconstruct -- end + +# force "dpkg-source -I -i" behavior +diff-ignore +tar-ignore --- linux-xilinx-6.8.0.orig/debian/templates/extra.postinst.in +++ linux-xilinx-6.8.0/debian/templates/extra.postinst.in @@ -0,0 +1,20 @@ +#!/bin/sh +set -e + +version=@abiname@@localversion@ +image_path=/boot/@image-stem@-$version + +if [ "$1" != configure ]; then + exit 0 +fi + +depmod -a -F /boot/System.map-$version $version || true +if [ -d /etc/kernel/postinst.d ]; then + cat - >/usr/lib/linux/triggers/$version </dev/null || true +# +# We should be rebuilding the initramfs here on removal to pare down the +# initramfs if it contains any of the objects we just removed. But people +# commonly remove kernels in order to free space in /boot, and rebuilding the +# initramfs now risks ENOSPC when we are trying to make space. The files we +# leave lying about could be confusing, but we trade that against safety on +# removal. +# +#if [ -d /etc/kernel/postinst.d ]; then +# # We want to behave as if linux-image (without us) was installed, therefore +# # we do not want the postinst support to know we are being removed, claim +# # this is an installation event. +# cat - >/usr/lib/linux/triggers/$version </usr/lib/linux/triggers/$version </dev/null; then + linux-update-symlinks remove $version $image_path +fi + +if [ -d /etc/kernel/postrm.d ]; then + # We cannot trigger ourselves as at the end of this we will no longer + # exist and can no longer respond to the trigger. The trigger would + # then become lost. Therefore we clear any pending trigger and apply + # postrm directly. + if [ -f /usr/lib/linux/triggers/$version ]; then + echo "$0 ... removing pending trigger" + rm -f /usr/lib/linux/triggers/$version + fi + DEB_MAINT_PARAMS="$*" run-parts --report --exit-on-error --arg=$version \ + --arg=$image_path /etc/kernel/postrm.d +fi + +if [ "$1" = purge ]; then + for extra_file in modules.dep modules.isapnpmap modules.pcimap \ + modules.usbmap modules.parportmap \ + modules.generic_string modules.ieee1394map \ + modules.ieee1394map modules.pnpbiosmap \ + modules.alias modules.ccwmap modules.inputmap \ + modules.symbols modules.ofmap \ + modules.seriomap modules.\*.bin \ + modules.softdep modules.devname; do + eval rm -f /lib/modules/$version/$extra_file + done + rmdir /lib/modules/$version || true +fi + +exit 0 --- linux-xilinx-6.8.0.orig/debian/templates/image.preinst.in +++ linux-xilinx-6.8.0/debian/templates/image.preinst.in @@ -0,0 +1,22 @@ +#!/bin/sh +set -e + +version=@abiname@@localversion@ +image_path=/boot/@image-stem@-$version + +if [ "$1" = abort-upgrade ]; then + exit 0 +fi + +if [ "$1" = install ]; then + # Create a flag file for postinst + mkdir -p /lib/modules/$version + touch /lib/modules/$version/.fresh-install +fi + +if [ -d /etc/kernel/preinst.d ]; then + DEB_MAINT_PARAMS="$*" run-parts --report --exit-on-error --arg=$version \ + --arg=$image_path /etc/kernel/preinst.d +fi + +exit 0 --- linux-xilinx-6.8.0.orig/debian/templates/image.prerm.in +++ linux-xilinx-6.8.0/debian/templates/image.prerm.in @@ -0,0 +1,18 @@ +#!/bin/sh +set -e + +version=@abiname@@localversion@ +image_path=/boot/@image-stem@-$version + +if [ "$1" != remove ]; then + exit 0 +fi + +linux-check-removal $version + +if [ -d /etc/kernel/prerm.d ]; then + DEB_MAINT_PARAMS="$*" run-parts --report --exit-on-error --arg=$version \ + --arg=$image_path /etc/kernel/prerm.d +fi + +exit 0 --- linux-xilinx-6.8.0.orig/debian/tests-build/README +++ linux-xilinx-6.8.0/debian/tests-build/README @@ -0,0 +1,21 @@ +Scripts placed in this directory get called one at a time by run-parts(8). +The scripts are expected to perform some sort of sanity checks on the +finished build. Scripts will be called once for each flavour. + +Some environment variables are exported to make life a little easier: + +DPKG_ARCH : The dpkg architecture (e.g. "amd64") +KERN_ARCH : The kernel architecture (e.g. "x86_64") +FLAVOUR : The specific flavour for this run (e.g. "generic") +VERSION : The full version of this build (e.g. 2.6.22-1) +REVISION : The exact revision of this build (e.g. 1.3) +PREV_REVISION : The revision prior to this one +ABI_NUM : The specific ABI number for this build (e.g. 2) +PREV_ABI_NUM : The previous ABI number. Can be the same as ABI_NUM. +BUILD_DIR : The directory where this build took place +INSTALL_DIR : The directory where the package is prepared +SOURCE_DIR : Where the main kernel source is + +Scripts are expected to have a zero exit status when no problems occur, +and non-zero when an error occurs that should stop the build. Scripts +should print whatever info they deem needed to deduce the problem. --- linux-xilinx-6.8.0.orig/debian/tests-build/check-aliases +++ linux-xilinx-6.8.0/debian/tests-build/check-aliases @@ -0,0 +1,26 @@ +#!/usr/bin/perl -w + +my %map; + +print "Checking for dupe aliases in $ENV{'FLAVOUR'}...\n"; + +$aliases = + "$ENV{'INSTALL_DIR'}/lib/modules/$ENV{'VERSION'}-$ENV{'FLAVOUR'}/modules.alias"; + +exit 0 unless (-e $aliases); + +open(ALIASES, "< $aliases") or die "Could not open $aliases"; + +while () { + chomp; + my ($junk, $alias, $module) = split; + + if (defined($map{$alias})) { + printf("%s %20s / %-20s : %s \n", ("$map{$alias}" eq "$module") + ? "INT" : " ", $map{$alias}, $module, $alias); + } else { + $map{$alias} = $module; + } +} + +exit(0); --- linux-xilinx-6.8.0.orig/debian/tests/control +++ linux-xilinx-6.8.0/debian/tests/control @@ -0,0 +1,7 @@ +Tests: rebuild +Depends: @builddeps@, fakeroot +Restrictions: allow-stderr, skippable + +Tests: ubuntu-regression-suite +Depends: build-essential, fakeroot, gcc-multilib [amd64 armhf i386], gdb, git, python3 +Restrictions: allow-stderr, isolation-machine, breaks-testbed, skippable --- linux-xilinx-6.8.0.orig/debian/tests/rebuild +++ linux-xilinx-6.8.0/debian/tests/rebuild @@ -0,0 +1,20 @@ +#!/bin/sh + +# If we are triggering for just linux or linux-meta we know we have +# just built the kernel and there is no point in repeating that +# build, it just wastes time. (LP: #1498862) +build_needed=0 +for trigger in ${ADT_TEST_TRIGGERS:-force} +do + case "$trigger" in + linux/*|linux-lts-*/*|linux-meta*/*|linux-oem*/*|fakeroot/*|gdb/*|git/*|bzr/*|gcc-multilib/*) ;; + *) build_needed=1 ;; + esac +done +if [ "$build_needed" -eq 0 ]; then + echo "rebuild: short circuiting build for '${ADT_TEST_TRIGGERS}'" + exit 77 +fi + +set -e +dpkg-buildpackage -rfakeroot -us -uc -b -Pautopkgtest --- linux-xilinx-6.8.0.orig/debian/tests/ubuntu-regression-suite +++ linux-xilinx-6.8.0/debian/tests/ubuntu-regression-suite @@ -0,0 +1,46 @@ +#!/bin/sh +set -e + +# Only run regression-suite on kernels we can boot in canonistack +source=`dpkg-parsechangelog -SSource` +case $source in + linux|linux-unstable|linux-hwe*|linux-lowlatency*|linux-kvm|linux-oem) + ;; + *) + echo "ubuntu-regression-suite is pointless, if one cannot boot the kernel" + exit 77 + ;; +esac + +# Only run regression-suite if we were requested to +have_meta=0 +for trigger in ${ADT_TEST_TRIGGERS} +do + case "$trigger" in + linux-meta/*|linux-meta-*/*) + have_meta=1 + ;; + esac +done +if [ -n "$ADT_TEST_TRIGGERS" ] && [ "$have_meta" -eq 0 ]; then + echo "ubuntu-regression-suite is not requested, as there is no linux-meta trigger" + exit 77 +fi + +sver=`dpkg-parsechangelog -SVersion` +read x rver x &2 + exit 1 +fi + +git clone --depth=1 -b autotest3 git://git.launchpad.net/~canonical-kernel-team/+git/kernel-testing +git -C kernel-testing/ show HEAD -q +kernel-testing/run-dep8-tests --- linux-xilinx-6.8.0.orig/debian/tools/generic +++ linux-xilinx-6.8.0/debian/tools/generic @@ -0,0 +1,60 @@ +#!/bin/bash +full_version=`uname -r` + +# First check for a fully qualified version. +this="/usr/lib/linux-tools/$full_version/`basename $0`" +if [ -f "$this" ]; then + exec "$this" "$@" +fi + +# Removing flavour from version i.e. generic or server. +flavour_abi=${full_version#*-} +flavour=${flavour_abi#*-} +version=${full_version%-$flavour} +this="$0_$version" +if [ -f "$this" ]; then + exec "$this" "$@" +fi + +# Before saucy kernels we had no flavour linkage. +if dpkg --compare-versions "$version" lt "3.11.0"; then + flavour='' +else + flavour="-$flavour" +fi +# Hint at the cloud tools if they exist (trusty and later) +if dpkg --compare-versions "$version" ge "3.13.0"; then + cld="" +else + cld=":" +fi +# Work out if this is an LTS backport or not. +codename=`lsb_release -cs` +case "$codename" in +precise) base='3.2.0-9999' ;; +trusty) base='3.13.0-9999' ;; +*) base='' ;; +esac +std="" +lts=":" +if [ "$base" != "" ]; then + if dpkg --compare-versions "$version" gt "$base"; then + std=":" + lts="" + fi +fi + +# Give them a hint as to what to install. + echo "WARNING: `basename $0` not found for kernel $version" >&2 + echo "" >&2 + echo " You may need to install the following packages for this specific kernel:" >&2 + echo " linux-tools-$version$flavour" >&2 +$cld echo " linux-cloud-tools-$version$flavour" >&2 + echo "" >&2 + echo " You may also want to install one of the following packages to keep up to date:" >&2 +$std echo " linux-tools$flavour" >&2 +$std $cld echo " linux-cloud-tools$flavour" >&2 +$lts echo " linux-tools$flavour-lts-" >&2 +$lts $cld echo " linux-cloud-tools$flavour-lts-" >&2 + +exit 2 --- linux-xilinx-6.8.0.orig/debian/tools/python-perf.py +++ linux-xilinx-6.8.0/debian/tools/python-perf.py @@ -0,0 +1,34 @@ +import os +import importlib.util +from glob import glob + + +class KernelNotFoundError(Exception): + def __init__(self): + kernel_version = os.uname().release + flavor = kernel_version.split("-", 2)[2] + super().__init__( + f"\nWARNING: python perf module not found for kernel {kernel_version}\n\n" + f" You may need to install the following package for this specific kernel:\n" + f" linux-tools-{kernel_version}\n\n" + f" You may also want to install the following package to keep up to date:\n" + f" linux-tools-{flavor}" + ) + + +# Load the actual python-perf module for the running kernel +_kernel_version = os.uname().release +_perf_dir = f"/usr/lib/linux-tools/{_kernel_version}/lib" +if not os.path.exists(_perf_dir): + _abi_version = "-".join(_kernel_version.split("-")[0:2]) + _perf_dir = f"/usr/lib/python3/dist-packages/linux-tools-{_abi_version}" + if not os.path.exists(_perf_dir): + raise KernelNotFoundError() +_perf_lib = glob(os.path.join(_perf_dir, "perf.*.so"))[-1] + +_spec = importlib.util.spec_from_file_location("perf", _perf_lib) +_perf = importlib.util.module_from_spec(_spec) +_spec.loader.exec_module(_perf) + +# Expose the 'perf' module. +__all__ = ["perf"] --- linux-xilinx-6.8.0.orig/debian/v4l2loopback-modules.ignore +++ linux-xilinx-6.8.0/debian/v4l2loopback-modules.ignore @@ -0,0 +1 @@ +v4l2loopback --- linux-xilinx-6.8.0.orig/debian/zfs-modules.ignore +++ linux-xilinx-6.8.0/debian/zfs-modules.ignore @@ -0,0 +1,11 @@ +icp +spl +splat +zavl +zcommon +zfs +zlua +znvpair +zpios +zunicode +zzstd --- linux-xilinx-6.8.0.orig/drivers/Makefile +++ linux-xilinx-6.8.0/drivers/Makefile @@ -66,14 +66,9 @@ # iommu/ comes before gpu as gpu are using iommu controllers obj-y += iommu/ -# gpu/ comes after char for AGP vs DRM startup and after iommu -obj-y += gpu/ obj-$(CONFIG_CONNECTOR) += connector/ -# i810fb depends on char/agp/ -obj-$(CONFIG_FB_I810) += video/fbdev/i810/ - obj-$(CONFIG_PARPORT) += parport/ obj-y += base/ block/ misc/ mfd/ nfc/ obj-$(CONFIG_LIBNVDIMM) += nvdimm/ @@ -85,6 +80,11 @@ obj-y += scsi/ obj-y += nvme/ obj-$(CONFIG_ATA) += ata/ + +# gpu/ comes after char for AGP vs DRM startup and after iommu +obj-y += gpu/ +# i810fb depends on char/agp/ +obj-$(CONFIG_FB_I810) += video/fbdev/i810/ obj-$(CONFIG_TARGET_CORE) += target/ obj-$(CONFIG_MTD) += mtd/ obj-$(CONFIG_SPI) += spi/ --- linux-xilinx-6.8.0.orig/drivers/accel/drm_accel.c +++ linux-xilinx-6.8.0/drivers/accel/drm_accel.c @@ -8,7 +8,7 @@ #include #include -#include +#include #include #include @@ -18,8 +18,7 @@ #include #include -static DEFINE_SPINLOCK(accel_minor_lock); -static struct idr accel_minors_idr; +DEFINE_XARRAY_ALLOC(accel_minors_xa); static struct dentry *accel_debugfs_root; @@ -118,99 +117,6 @@ } /** - * accel_minor_alloc() - Allocates a new accel minor - * - * This function access the accel minors idr and allocates from it - * a new id to represent a new accel minor - * - * Return: A new id on success or error code in case idr_alloc failed - */ -int accel_minor_alloc(void) -{ - unsigned long flags; - int r; - - spin_lock_irqsave(&accel_minor_lock, flags); - r = idr_alloc(&accel_minors_idr, NULL, 0, ACCEL_MAX_MINORS, GFP_NOWAIT); - spin_unlock_irqrestore(&accel_minor_lock, flags); - - return r; -} - -/** - * accel_minor_remove() - Remove an accel minor - * @index: The minor id to remove. - * - * This function access the accel minors idr and removes from - * it the member with the id that is passed to this function. - */ -void accel_minor_remove(int index) -{ - unsigned long flags; - - spin_lock_irqsave(&accel_minor_lock, flags); - idr_remove(&accel_minors_idr, index); - spin_unlock_irqrestore(&accel_minor_lock, flags); -} - -/** - * accel_minor_replace() - Replace minor pointer in accel minors idr. - * @minor: Pointer to the new minor. - * @index: The minor id to replace. - * - * This function access the accel minors idr structure and replaces the pointer - * that is associated with an existing id. Because the minor pointer can be - * NULL, we need to explicitly pass the index. - * - * Return: 0 for success, negative value for error - */ -void accel_minor_replace(struct drm_minor *minor, int index) -{ - unsigned long flags; - - spin_lock_irqsave(&accel_minor_lock, flags); - idr_replace(&accel_minors_idr, minor, index); - spin_unlock_irqrestore(&accel_minor_lock, flags); -} - -/* - * Looks up the given minor-ID and returns the respective DRM-minor object. The - * refence-count of the underlying device is increased so you must release this - * object with accel_minor_release(). - * - * The object can be only a drm_minor that represents an accel device. - * - * As long as you hold this minor, it is guaranteed that the object and the - * minor->dev pointer will stay valid! However, the device may get unplugged and - * unregistered while you hold the minor. - */ -static struct drm_minor *accel_minor_acquire(unsigned int minor_id) -{ - struct drm_minor *minor; - unsigned long flags; - - spin_lock_irqsave(&accel_minor_lock, flags); - minor = idr_find(&accel_minors_idr, minor_id); - if (minor) - drm_dev_get(minor->dev); - spin_unlock_irqrestore(&accel_minor_lock, flags); - - if (!minor) { - return ERR_PTR(-ENODEV); - } else if (drm_dev_is_unplugged(minor->dev)) { - drm_dev_put(minor->dev); - return ERR_PTR(-ENODEV); - } - - return minor; -} - -static void accel_minor_release(struct drm_minor *minor) -{ - drm_dev_put(minor->dev); -} - -/** * accel_open - open method for ACCEL file * @inode: device inode * @filp: file pointer. @@ -227,7 +133,7 @@ struct drm_minor *minor; int retcode; - minor = accel_minor_acquire(iminor(inode)); + minor = drm_minor_acquire(&accel_minors_xa, iminor(inode)); if (IS_ERR(minor)) return PTR_ERR(minor); @@ -246,7 +152,7 @@ err_undo: atomic_dec(&dev->open_count); - accel_minor_release(minor); + drm_minor_release(minor); return retcode; } EXPORT_SYMBOL_GPL(accel_open); @@ -257,7 +163,7 @@ struct drm_minor *minor; int err; - minor = accel_minor_acquire(iminor(inode)); + minor = drm_minor_acquire(&accel_minors_xa, iminor(inode)); if (IS_ERR(minor)) return PTR_ERR(minor); @@ -274,7 +180,7 @@ err = 0; out: - accel_minor_release(minor); + drm_minor_release(minor); return err; } @@ -290,15 +196,13 @@ unregister_chrdev(ACCEL_MAJOR, "accel"); debugfs_remove(accel_debugfs_root); accel_sysfs_destroy(); - idr_destroy(&accel_minors_idr); + WARN_ON(!xa_empty(&accel_minors_xa)); } int __init accel_core_init(void) { int ret; - idr_init(&accel_minors_idr); - ret = accel_sysfs_init(); if (ret < 0) { DRM_ERROR("Cannot create ACCEL class: %d\n", ret); --- linux-xilinx-6.8.0.orig/drivers/accel/habanalabs/common/debugfs.c +++ linux-xilinx-6.8.0/drivers/accel/habanalabs/common/debugfs.c @@ -1643,19 +1643,19 @@ &hl_data64b_fops); debugfs_create_file("set_power_state", - 0200, + 0644, root, dev_entry, &hl_power_fops); debugfs_create_file("device", - 0200, + 0644, root, dev_entry, &hl_device_fops); debugfs_create_file("clk_gate", - 0200, + 0644, root, dev_entry, &hl_clk_gate_fops); @@ -1667,13 +1667,13 @@ &hl_stop_on_err_fops); debugfs_create_file("dump_security_violations", - 0644, + 0400, root, dev_entry, &hl_security_violations_fops); debugfs_create_file("dump_razwi_events", - 0644, + 0400, root, dev_entry, &hl_razwi_check_fops); @@ -1706,7 +1706,7 @@ &hdev->reset_info.skip_reset_on_timeout); debugfs_create_file("state_dump", - 0600, + 0644, root, dev_entry, &hl_state_dump_fops); @@ -1724,7 +1724,7 @@ for (i = 0, entry = dev_entry->entry_arr ; i < count ; i++, entry++) { debugfs_create_file(hl_debugfs_list[i].name, - 0444, + 0644, root, entry, &hl_debugfs_fops); --- linux-xilinx-6.8.0.orig/drivers/accel/habanalabs/common/habanalabs.h +++ linux-xilinx-6.8.0/drivers/accel/habanalabs/common/habanalabs.h @@ -2547,7 +2547,7 @@ * DEVICES */ -#define HL_STR_MAX 32 +#define HL_STR_MAX 64 #define HL_DEV_STS_MAX (HL_DEVICE_STATUS_LAST + 1) --- linux-xilinx-6.8.0.orig/drivers/accel/habanalabs/gaudi2/gaudi2_security.c +++ linux-xilinx-6.8.0/drivers/accel/habanalabs/gaudi2/gaudi2_security.c @@ -479,6 +479,7 @@ mmDCORE0_EDMA0_CORE_CTX_TE_NUMROWS, mmDCORE0_EDMA0_CORE_CTX_IDX, mmDCORE0_EDMA0_CORE_CTX_IDX_INC, + mmDCORE0_EDMA0_CORE_WR_COMP_MAX_OUTSTAND, mmDCORE0_EDMA0_CORE_RD_LBW_RATE_LIM_CFG, mmDCORE0_EDMA0_QM_CQ_CFG0_0, mmDCORE0_EDMA0_QM_CQ_CFG0_1, --- linux-xilinx-6.8.0.orig/drivers/accel/ivpu/Kconfig +++ linux-xilinx-6.8.0/drivers/accel/ivpu/Kconfig @@ -8,6 +8,7 @@ select FW_LOADER select DRM_GEM_SHMEM_HELPER select GENERIC_ALLOCATOR + select WANT_DEV_COREDUMP help Choose this option if you have a system with an 14th generation Intel CPU (Meteor Lake) or newer. Intel NPU (formerly called Intel VPU) --- linux-xilinx-6.8.0.orig/drivers/accel/ivpu/Makefile +++ linux-xilinx-6.8.0/drivers/accel/ivpu/Makefile @@ -16,5 +16,6 @@ ivpu_pm.o intel_vpu-$(CONFIG_DEBUG_FS) += ivpu_debugfs.o +intel_vpu-$(CONFIG_DEV_COREDUMP) += ivpu_coredump.o obj-$(CONFIG_DRM_ACCEL_IVPU) += intel_vpu.o --- linux-xilinx-6.8.0.orig/drivers/accel/ivpu/ivpu_coredump.c +++ linux-xilinx-6.8.0/drivers/accel/ivpu/ivpu_coredump.c @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2020-2024 Intel Corporation + */ + +#include +#include + +#include "ivpu_coredump.h" +#include "ivpu_fw.h" +#include "ivpu_gem.h" +#include "vpu_boot_api.h" + +#define CRASH_DUMP_HEADER "Intel NPU crash dump" +#define CRASH_DUMP_HEADERS_SIZE SZ_4K + +void ivpu_dev_coredump(struct ivpu_device *vdev) +{ + struct drm_print_iterator pi = {}; + struct drm_printer p; + size_t coredump_size; + char *coredump; + + coredump_size = CRASH_DUMP_HEADERS_SIZE + FW_VERSION_HEADER_SIZE + + ivpu_bo_size(vdev->fw->mem_log_crit) + ivpu_bo_size(vdev->fw->mem_log_verb); + coredump = vmalloc(coredump_size); + if (!coredump) + return; + + pi.data = coredump; + pi.remain = coredump_size; + p = drm_coredump_printer(&pi); + + drm_printf(&p, "%s\n", CRASH_DUMP_HEADER); + drm_printf(&p, "FW version: %s\n", vdev->fw->version); + ivpu_fw_log_print(vdev, false, &p); + + dev_coredumpv(vdev->drm.dev, coredump, pi.offset, GFP_KERNEL); +} --- linux-xilinx-6.8.0.orig/drivers/accel/ivpu/ivpu_coredump.h +++ linux-xilinx-6.8.0/drivers/accel/ivpu/ivpu_coredump.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2020-2024 Intel Corporation + */ + +#ifndef __IVPU_COREDUMP_H__ +#define __IVPU_COREDUMP_H__ + +#include + +#include "ivpu_drv.h" +#include "ivpu_fw_log.h" + +#ifdef CONFIG_DEV_COREDUMP +void ivpu_dev_coredump(struct ivpu_device *vdev); +#else +static inline void ivpu_dev_coredump(struct ivpu_device *vdev) +{ + struct drm_printer p = drm_info_printer(vdev->drm.dev); + + ivpu_fw_log_print(vdev, false, &p); +} +#endif + +#endif /* __IVPU_COREDUMP_H__ */ --- linux-xilinx-6.8.0.orig/drivers/accel/ivpu/ivpu_drv.c +++ linux-xilinx-6.8.0/drivers/accel/ivpu/ivpu_drv.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (C) 2020-2023 Intel Corporation + * Copyright (C) 2020-2024 Intel Corporation */ #include @@ -14,7 +14,7 @@ #include #include -#include "vpu_boot_api.h" +#include "ivpu_coredump.h" #include "ivpu_debugfs.h" #include "ivpu_drv.h" #include "ivpu_fw.h" @@ -27,6 +27,7 @@ #include "ivpu_mmu.h" #include "ivpu_mmu_context.h" #include "ivpu_pm.h" +#include "vpu_boot_api.h" #ifndef DRIVER_VERSION_STR #define DRIVER_VERSION_STR __stringify(DRM_IVPU_DRIVER_MAJOR) "." \ @@ -131,22 +132,6 @@ return 0; } -static int ivpu_get_core_clock_rate(struct ivpu_device *vdev, u64 *clk_rate) -{ - int ret; - - ret = ivpu_rpm_get_if_active(vdev); - if (ret < 0) - return ret; - - *clk_rate = ret ? ivpu_hw_reg_pll_freq_get(vdev) : 0; - - if (ret) - ivpu_rpm_put(vdev); - - return 0; -} - static int ivpu_get_param_ioctl(struct drm_device *dev, void *data, struct drm_file *file) { struct ivpu_file_priv *file_priv = file->driver_priv; @@ -170,7 +155,7 @@ args->value = vdev->platform; break; case DRM_IVPU_PARAM_CORE_CLOCK_RATE: - ret = ivpu_get_core_clock_rate(vdev, &args->value); + args->value = ivpu_hw_ratio_to_freq(vdev, vdev->hw->pll.max_ratio); break; case DRM_IVPU_PARAM_NUM_CONTEXTS: args->value = ivpu_get_context_count(vdev); @@ -364,7 +349,7 @@ ivpu_err(vdev, "Failed to boot the firmware: %d\n", ret); ivpu_hw_diagnose_failure(vdev); ivpu_mmu_evtq_dump(vdev); - ivpu_fw_log_dump(vdev); + ivpu_dev_coredump(vdev); return ret; } @@ -387,12 +372,15 @@ { int ret; - ivpu_prepare_for_reset(vdev); + /* Save PCI state before powering down as it sometimes gets corrupted if NPU hangs */ + pci_save_state(to_pci_dev(vdev->drm.dev)); ret = ivpu_hw_power_down(vdev); if (ret) ivpu_warn(vdev, "Failed to power down HW: %d\n", ret); + pci_set_power_state(to_pci_dev(vdev->drm.dev), PCI_D3hot); + return ret; } @@ -530,7 +518,7 @@ vdev->context_xa_limit.min = IVPU_USER_CONTEXT_MIN_SSID; vdev->context_xa_limit.max = IVPU_USER_CONTEXT_MAX_SSID; atomic64_set(&vdev->unique_id_counter, 0); - xa_init_flags(&vdev->context_xa, XA_FLAGS_ALLOC); + xa_init_flags(&vdev->context_xa, XA_FLAGS_ALLOC | XA_FLAGS_LOCK_IRQ); xa_init_flags(&vdev->submitted_jobs_xa, XA_FLAGS_ALLOC1); lockdep_set_class(&vdev->submitted_jobs_xa.xa_lock, &submitted_jobs_xa_lock_class_key); INIT_LIST_HEAD(&vdev->bo_list); @@ -559,11 +547,11 @@ /* Power up early so the rest of init code can access VPU registers */ ret = ivpu_hw_power_up(vdev); if (ret) - goto err_power_down; + goto err_shutdown; ret = ivpu_mmu_global_context_init(vdev); if (ret) - goto err_power_down; + goto err_shutdown; ret = ivpu_mmu_init(vdev); if (ret) @@ -600,10 +588,8 @@ ivpu_mmu_reserved_context_fini(vdev); err_mmu_gctx_fini: ivpu_mmu_global_context_fini(vdev); -err_power_down: - ivpu_hw_power_down(vdev); - if (IVPU_WA(d3hot_after_power_off)) - pci_set_power_state(to_pci_dev(vdev->drm.dev), PCI_D3hot); +err_shutdown: + ivpu_shutdown(vdev); err_xa_destroy: xa_destroy(&vdev->submitted_jobs_xa); xa_destroy(&vdev->context_xa); @@ -626,9 +612,8 @@ static void ivpu_dev_fini(struct ivpu_device *vdev) { ivpu_pm_disable(vdev); + ivpu_prepare_for_reset(vdev); ivpu_shutdown(vdev); - if (IVPU_WA(d3hot_after_power_off)) - pci_set_power_state(to_pci_dev(vdev->drm.dev), PCI_D3hot); ivpu_jobs_abort_all(vdev); ivpu_job_done_consumer_fini(vdev); --- linux-xilinx-6.8.0.orig/drivers/accel/ivpu/ivpu_drv.h +++ linux-xilinx-6.8.0/drivers/accel/ivpu/ivpu_drv.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (C) 2020-2023 Intel Corporation + * Copyright (C) 2020-2024 Intel Corporation */ #ifndef __IVPU_DRV_H__ @@ -87,7 +87,6 @@ struct ivpu_wa_table { bool punit_disabled; bool clear_runtime_mem; - bool d3hot_after_power_off; bool interrupt_clear_with_0; bool disable_clock_relinquish; bool disable_d0i3_msg; @@ -134,6 +133,7 @@ int reschedule_suspend; int autosuspend; int d0i3_entry_msg; + int state_dump_msg; } timeout; }; --- linux-xilinx-6.8.0.orig/drivers/accel/ivpu/ivpu_fw.c +++ linux-xilinx-6.8.0/drivers/accel/ivpu/ivpu_fw.c @@ -25,7 +25,6 @@ #define FW_SHAVE_NN_MAX_SIZE SZ_2M #define FW_RUNTIME_MIN_ADDR (FW_GLOBAL_MEM_START) #define FW_RUNTIME_MAX_ADDR (FW_GLOBAL_MEM_END - FW_SHARED_MEM_SIZE) -#define FW_VERSION_HEADER_SIZE SZ_4K #define FW_FILE_IMAGE_OFFSET (VPU_FW_HEADER_SIZE + FW_VERSION_HEADER_SIZE) #define WATCHDOG_MSS_REDIRECT 32 @@ -60,6 +59,10 @@ { IVPU_HW_40XX, "intel/vpu/vpu_40xx_v0.0.bin" }, }; +/* Production fw_names from the table above */ +MODULE_FIRMWARE("intel/vpu/vpu_37xx_v0.0.bin"); +MODULE_FIRMWARE("intel/vpu/vpu_40xx_v0.0.bin"); + static int ivpu_fw_request(struct ivpu_device *vdev) { int ret = -ENOENT; @@ -179,8 +182,10 @@ ivpu_dbg(vdev, FW_BOOT, "Header version: 0x%x, format 0x%x\n", fw_hdr->header_version, fw_hdr->image_format); - ivpu_info(vdev, "Firmware: %s, version: %s", fw->name, - (const char *)fw_hdr + VPU_FW_HEADER_SIZE); + if (!scnprintf(fw->version, sizeof(fw->version), "%s", fw->file->data + VPU_FW_HEADER_SIZE)) + ivpu_warn(vdev, "Missing firmware version\n"); + + ivpu_info(vdev, "Firmware: %s, version: %s\n", fw->name, fw->version); if (IVPU_FW_CHECK_API_COMPAT(vdev, fw_hdr, BOOT, 3)) return -EINVAL; @@ -519,8 +524,10 @@ boot_params->ipc_payload_area_start = ipc_mem_rx->vpu_addr + ivpu_bo_size(ipc_mem_rx) / 2; boot_params->ipc_payload_area_size = ivpu_bo_size(ipc_mem_rx) / 2; - boot_params->global_aliased_pio_base = vdev->hw->ranges.user.start; - boot_params->global_aliased_pio_size = ivpu_hw_range_size(&vdev->hw->ranges.user); + if (ivpu_hw_gen(vdev) == IVPU_HW_37XX) { + boot_params->global_aliased_pio_base = vdev->hw->ranges.user.start; + boot_params->global_aliased_pio_size = ivpu_hw_range_size(&vdev->hw->ranges.user); + } /* Allow configuration for L2C_PAGE_TABLE with boot param value */ boot_params->autoconfig = 1; --- linux-xilinx-6.8.0.orig/drivers/accel/ivpu/ivpu_fw.h +++ linux-xilinx-6.8.0/drivers/accel/ivpu/ivpu_fw.h @@ -1,11 +1,14 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (C) 2020-2023 Intel Corporation + * Copyright (C) 2020-2024 Intel Corporation */ #ifndef __IVPU_FW_H__ #define __IVPU_FW_H__ +#define FW_VERSION_HEADER_SIZE SZ_4K +#define FW_VERSION_STR_SIZE SZ_256 + struct ivpu_device; struct ivpu_bo; struct vpu_boot_params; @@ -13,6 +16,7 @@ struct ivpu_fw_info { const struct firmware *file; const char *name; + char version[FW_VERSION_STR_SIZE]; struct ivpu_bo *mem; struct ivpu_bo *mem_shave_nn; struct ivpu_bo *mem_log_crit; --- linux-xilinx-6.8.0.orig/drivers/accel/ivpu/ivpu_fw_log.h +++ linux-xilinx-6.8.0/drivers/accel/ivpu/ivpu_fw_log.h @@ -8,8 +8,6 @@ #include -#include - #include "ivpu_drv.h" #define IVPU_FW_LOG_DEFAULT 0 @@ -28,11 +26,5 @@ void ivpu_fw_log_print(struct ivpu_device *vdev, bool only_new_msgs, struct drm_printer *p); void ivpu_fw_log_clear(struct ivpu_device *vdev); -static inline void ivpu_fw_log_dump(struct ivpu_device *vdev) -{ - struct drm_printer p = drm_info_printer(vdev->drm.dev); - - ivpu_fw_log_print(vdev, false, &p); -} #endif /* __IVPU_FW_LOG_H__ */ --- linux-xilinx-6.8.0.orig/drivers/accel/ivpu/ivpu_gem.c +++ linux-xilinx-6.8.0/drivers/accel/ivpu/ivpu_gem.c @@ -402,7 +402,7 @@ mutex_lock(&bo->lock); drm_printf(p, "%-9p %-3u 0x%-12llx %-10lu 0x%-8x %-4u", - bo, bo->ctx->id, bo->vpu_addr, bo->base.base.size, + bo, bo->ctx ? bo->ctx->id : 0, bo->vpu_addr, bo->base.base.size, bo->flags, kref_read(&bo->base.base.refcount)); if (bo->base.pages) --- linux-xilinx-6.8.0.orig/drivers/accel/ivpu/ivpu_hw.h +++ linux-xilinx-6.8.0/drivers/accel/ivpu/ivpu_hw.h @@ -21,6 +21,7 @@ u32 (*profiling_freq_get)(struct ivpu_device *vdev); void (*profiling_freq_drive)(struct ivpu_device *vdev, bool enable); u32 (*reg_pll_freq_get)(struct ivpu_device *vdev); + u32 (*ratio_to_freq)(struct ivpu_device *vdev, u32 ratio); u32 (*reg_telemetry_offset_get)(struct ivpu_device *vdev); u32 (*reg_telemetry_size_get)(struct ivpu_device *vdev); u32 (*reg_telemetry_enable_get)(struct ivpu_device *vdev); @@ -130,6 +131,11 @@ return vdev->hw->ops->reg_pll_freq_get(vdev); }; +static inline u32 ivpu_hw_ratio_to_freq(struct ivpu_device *vdev, u32 ratio) +{ + return vdev->hw->ops->ratio_to_freq(vdev, ratio); +} + static inline u32 ivpu_hw_reg_telemetry_offset_get(struct ivpu_device *vdev) { return vdev->hw->ops->reg_telemetry_offset_get(vdev); --- linux-xilinx-6.8.0.orig/drivers/accel/ivpu/ivpu_hw_37xx.c +++ linux-xilinx-6.8.0/drivers/accel/ivpu/ivpu_hw_37xx.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (C) 2020-2023 Intel Corporation + * Copyright (C) 2020-2024 Intel Corporation */ #include "ivpu_drv.h" @@ -75,7 +75,6 @@ { vdev->wa.punit_disabled = false; vdev->wa.clear_runtime_mem = false; - vdev->wa.d3hot_after_power_off = true; REGB_WR32(VPU_37XX_BUTTRESS_INTERRUPT_STAT, BUTTRESS_ALL_IRQ_MASK); if (REGB_RD32(VPU_37XX_BUTTRESS_INTERRUPT_STAT) == BUTTRESS_ALL_IRQ_MASK) { @@ -86,7 +85,6 @@ IVPU_PRINT_WA(punit_disabled); IVPU_PRINT_WA(clear_runtime_mem); - IVPU_PRINT_WA(d3hot_after_power_off); IVPU_PRINT_WA(interrupt_clear_with_0); } @@ -98,6 +96,7 @@ vdev->timeout.reschedule_suspend = 10; vdev->timeout.autosuspend = 10; vdev->timeout.d0i3_entry_msg = 5; + vdev->timeout.state_dump_msg = 10; } static int ivpu_pll_wait_for_cmd_send(struct ivpu_device *vdev) @@ -595,9 +594,9 @@ ivpu_pll_init_frequency_ratios(vdev); ivpu_hw_init_range(&hw->ranges.global, 0x80000000, SZ_512M); - ivpu_hw_init_range(&hw->ranges.user, 0xc0000000, 255 * SZ_1M); + ivpu_hw_init_range(&hw->ranges.user, 0x88000000, 511 * SZ_1M); ivpu_hw_init_range(&hw->ranges.shave, 0x180000000, SZ_2G); - ivpu_hw_init_range(&hw->ranges.dma, 0x200000000, SZ_8G); + ivpu_hw_init_range(&hw->ranges.dma, 0x200000000, SZ_128G); vdev->platform = IVPU_PLATFORM_SILICON; ivpu_hw_wa_init(vdev); @@ -805,12 +804,12 @@ /* Profiling freq - is a debug feature. Unavailable on VPU 37XX. */ } -static u32 ivpu_hw_37xx_pll_to_freq(u32 ratio, u32 config) +static u32 ivpu_hw_37xx_ratio_to_freq(struct ivpu_device *vdev, u32 ratio) { u32 pll_clock = PLL_REF_CLK_FREQ * ratio; u32 cpu_clock; - if ((config & 0xff) == PLL_RATIO_4_3) + if ((vdev->hw->config & 0xff) == PLL_RATIO_4_3) cpu_clock = pll_clock * 2 / 4; else cpu_clock = pll_clock * 2 / 5; @@ -829,7 +828,7 @@ if (!ivpu_is_silicon(vdev)) return PLL_SIMULATION_FREQ; - return ivpu_hw_37xx_pll_to_freq(pll_curr_ratio, vdev->hw->config); + return ivpu_hw_37xx_ratio_to_freq(vdev, pll_curr_ratio); } static u32 ivpu_hw_37xx_reg_telemetry_offset_get(struct ivpu_device *vdev) @@ -1052,6 +1051,7 @@ .profiling_freq_get = ivpu_hw_37xx_profiling_freq_get, .profiling_freq_drive = ivpu_hw_37xx_profiling_freq_drive, .reg_pll_freq_get = ivpu_hw_37xx_reg_pll_freq_get, + .ratio_to_freq = ivpu_hw_37xx_ratio_to_freq, .reg_telemetry_offset_get = ivpu_hw_37xx_reg_telemetry_offset_get, .reg_telemetry_size_get = ivpu_hw_37xx_reg_telemetry_size_get, .reg_telemetry_enable_get = ivpu_hw_37xx_reg_telemetry_enable_get, --- linux-xilinx-6.8.0.orig/drivers/accel/ivpu/ivpu_hw_40xx.c +++ linux-xilinx-6.8.0/drivers/accel/ivpu/ivpu_hw_40xx.c @@ -141,6 +141,7 @@ vdev->timeout.reschedule_suspend = 1000; vdev->timeout.autosuspend = -1; vdev->timeout.d0i3_entry_msg = 500; + vdev->timeout.state_dump_msg = 10; } else if (ivpu_is_simics(vdev)) { vdev->timeout.boot = 50; vdev->timeout.jsm = 500; @@ -148,6 +149,7 @@ vdev->timeout.reschedule_suspend = 10; vdev->timeout.autosuspend = -1; vdev->timeout.d0i3_entry_msg = 100; + vdev->timeout.state_dump_msg = 10; } else { vdev->timeout.boot = 1000; vdev->timeout.jsm = 500; @@ -155,6 +157,7 @@ vdev->timeout.reschedule_suspend = 10; vdev->timeout.autosuspend = 10; vdev->timeout.d0i3_entry_msg = 5; + vdev->timeout.state_dump_msg = 10; } } @@ -730,9 +733,9 @@ ivpu_pll_init_frequency_ratios(vdev); ivpu_hw_init_range(&vdev->hw->ranges.global, 0x80000000, SZ_512M); - ivpu_hw_init_range(&vdev->hw->ranges.user, 0x80000000, SZ_256M); - ivpu_hw_init_range(&vdev->hw->ranges.shave, 0x80000000 + SZ_256M, SZ_2G - SZ_256M); - ivpu_hw_init_range(&vdev->hw->ranges.dma, 0x200000000, SZ_8G); + ivpu_hw_init_range(&vdev->hw->ranges.shave, 0x80000000, SZ_2G); + ivpu_hw_init_range(&vdev->hw->ranges.user, 0x100000000, SZ_256G); + vdev->hw->ranges.dma = vdev->hw->ranges.user; ivpu_hw_read_platform(vdev); ivpu_hw_wa_init(vdev); @@ -980,6 +983,11 @@ return PLL_RATIO_TO_FREQ(pll_curr_ratio); } +static u32 ivpu_hw_40xx_ratio_to_freq(struct ivpu_device *vdev, u32 ratio) +{ + return PLL_RATIO_TO_FREQ(ratio); +} + static u32 ivpu_hw_40xx_reg_telemetry_offset_get(struct ivpu_device *vdev) { return REGB_RD32(VPU_40XX_BUTTRESS_VPU_TELEMETRY_OFFSET); @@ -1230,6 +1238,7 @@ .profiling_freq_get = ivpu_hw_40xx_profiling_freq_get, .profiling_freq_drive = ivpu_hw_40xx_profiling_freq_drive, .reg_pll_freq_get = ivpu_hw_40xx_reg_pll_freq_get, + .ratio_to_freq = ivpu_hw_40xx_ratio_to_freq, .reg_telemetry_offset_get = ivpu_hw_40xx_reg_telemetry_offset_get, .reg_telemetry_size_get = ivpu_hw_40xx_reg_telemetry_size_get, .reg_telemetry_enable_get = ivpu_hw_40xx_reg_telemetry_enable_get, --- linux-xilinx-6.8.0.orig/drivers/accel/ivpu/ivpu_ipc.c +++ linux-xilinx-6.8.0/drivers/accel/ivpu/ivpu_ipc.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (C) 2020-2023 Intel Corporation + * Copyright (C) 2020-2024 Intel Corporation */ #include @@ -292,15 +292,16 @@ return ret; } -static int +int ivpu_ipc_send_receive_internal(struct ivpu_device *vdev, struct vpu_jsm_msg *req, enum vpu_ipc_msg_type expected_resp_type, - struct vpu_jsm_msg *resp, u32 channel, - unsigned long timeout_ms) + struct vpu_jsm_msg *resp, u32 channel, unsigned long timeout_ms) { struct ivpu_ipc_consumer cons; int ret; + drm_WARN_ON(&vdev->drm, pm_runtime_status_suspended(vdev->drm.dev)); + ivpu_ipc_consumer_add(vdev, &cons, channel, NULL); ret = ivpu_ipc_send(vdev, &cons, req); @@ -326,19 +327,21 @@ return ret; } -int ivpu_ipc_send_receive_active(struct ivpu_device *vdev, struct vpu_jsm_msg *req, - enum vpu_ipc_msg_type expected_resp, struct vpu_jsm_msg *resp, - u32 channel, unsigned long timeout_ms) +int ivpu_ipc_send_receive(struct ivpu_device *vdev, struct vpu_jsm_msg *req, + enum vpu_ipc_msg_type expected_resp, struct vpu_jsm_msg *resp, + u32 channel, unsigned long timeout_ms) { struct vpu_jsm_msg hb_req = { .type = VPU_JSM_MSG_QUERY_ENGINE_HB }; struct vpu_jsm_msg hb_resp; int ret, hb_ret; - drm_WARN_ON(&vdev->drm, pm_runtime_status_suspended(vdev->drm.dev)); + ret = ivpu_rpm_get(vdev); + if (ret < 0) + return ret; ret = ivpu_ipc_send_receive_internal(vdev, req, expected_resp, resp, channel, timeout_ms); if (ret != -ETIMEDOUT) - return ret; + goto rpm_put; hb_ret = ivpu_ipc_send_receive_internal(vdev, &hb_req, VPU_JSM_MSG_QUERY_ENGINE_HB_DONE, &hb_resp, VPU_IPC_CHAN_ASYNC_CMD, @@ -346,21 +349,33 @@ if (hb_ret == -ETIMEDOUT) ivpu_pm_trigger_recovery(vdev, "IPC timeout"); +rpm_put: + ivpu_rpm_put(vdev); return ret; } -int ivpu_ipc_send_receive(struct ivpu_device *vdev, struct vpu_jsm_msg *req, - enum vpu_ipc_msg_type expected_resp, struct vpu_jsm_msg *resp, - u32 channel, unsigned long timeout_ms) +int ivpu_ipc_send_and_wait(struct ivpu_device *vdev, struct vpu_jsm_msg *req, + u32 channel, unsigned long timeout_ms) { + struct ivpu_ipc_consumer cons; int ret; ret = ivpu_rpm_get(vdev); if (ret < 0) return ret; - ret = ivpu_ipc_send_receive_active(vdev, req, expected_resp, resp, channel, timeout_ms); + ivpu_ipc_consumer_add(vdev, &cons, channel, NULL); + + ret = ivpu_ipc_send(vdev, &cons, req); + if (ret) { + ivpu_warn_ratelimited(vdev, "IPC send failed: %d\n", ret); + goto consumer_del; + } + + msleep(timeout_ms); +consumer_del: + ivpu_ipc_consumer_del(vdev, &cons); ivpu_rpm_put(vdev); return ret; } @@ -501,7 +516,11 @@ spin_lock_init(&ipc->cons_lock); INIT_LIST_HEAD(&ipc->cons_list); INIT_LIST_HEAD(&ipc->cb_msg_list); - drmm_mutex_init(&vdev->drm, &ipc->lock); + ret = drmm_mutex_init(&vdev->drm, &ipc->lock); + if (ret) { + ivpu_err(vdev, "Failed to initialize ipc->lock, ret %d\n", ret); + goto err_free_rx; + } ivpu_ipc_reset(vdev); return 0; --- linux-xilinx-6.8.0.orig/drivers/accel/ivpu/ivpu_ipc.h +++ linux-xilinx-6.8.0/drivers/accel/ivpu/ivpu_ipc.h @@ -99,12 +99,13 @@ int ivpu_ipc_receive(struct ivpu_device *vdev, struct ivpu_ipc_consumer *cons, struct ivpu_ipc_hdr *ipc_buf, struct vpu_jsm_msg *jsm_msg, unsigned long timeout_ms); - -int ivpu_ipc_send_receive_active(struct ivpu_device *vdev, struct vpu_jsm_msg *req, - enum vpu_ipc_msg_type expected_resp, struct vpu_jsm_msg *resp, - u32 channel, unsigned long timeout_ms); +int ivpu_ipc_send_receive_internal(struct ivpu_device *vdev, struct vpu_jsm_msg *req, + enum vpu_ipc_msg_type expected_resp_type, + struct vpu_jsm_msg *resp, u32 channel, unsigned long timeout_ms); int ivpu_ipc_send_receive(struct ivpu_device *vdev, struct vpu_jsm_msg *req, enum vpu_ipc_msg_type expected_resp, struct vpu_jsm_msg *resp, u32 channel, unsigned long timeout_ms); +int ivpu_ipc_send_and_wait(struct ivpu_device *vdev, struct vpu_jsm_msg *req, + u32 channel, unsigned long timeout_ms); #endif /* __IVPU_IPC_H__ */ --- linux-xilinx-6.8.0.orig/drivers/accel/ivpu/ivpu_jsm_msg.c +++ linux-xilinx-6.8.0/drivers/accel/ivpu/ivpu_jsm_msg.c @@ -273,11 +273,18 @@ req.payload.pwr_d0i3_enter.send_response = 1; - ret = ivpu_ipc_send_receive_active(vdev, &req, VPU_JSM_MSG_PWR_D0I3_ENTER_DONE, - &resp, VPU_IPC_CHAN_GEN_CMD, - vdev->timeout.d0i3_entry_msg); + ret = ivpu_ipc_send_receive_internal(vdev, &req, VPU_JSM_MSG_PWR_D0I3_ENTER_DONE, &resp, + VPU_IPC_CHAN_GEN_CMD, vdev->timeout.d0i3_entry_msg); if (ret) return ret; return ivpu_hw_wait_for_idle(vdev); } + +int ivpu_jsm_state_dump(struct ivpu_device *vdev) +{ + struct vpu_jsm_msg req = { .type = VPU_JSM_MSG_STATE_DUMP }; + + return ivpu_ipc_send_and_wait(vdev, &req, VPU_IPC_CHAN_ASYNC_CMD, + vdev->timeout.state_dump_msg); +} --- linux-xilinx-6.8.0.orig/drivers/accel/ivpu/ivpu_jsm_msg.h +++ linux-xilinx-6.8.0/drivers/accel/ivpu/ivpu_jsm_msg.h @@ -23,4 +23,6 @@ u64 trace_hw_component_mask); int ivpu_jsm_context_release(struct ivpu_device *vdev, u32 host_ssid); int ivpu_jsm_pwr_d0i3_enter(struct ivpu_device *vdev); +int ivpu_jsm_state_dump(struct ivpu_device *vdev); + #endif --- linux-xilinx-6.8.0.orig/drivers/accel/ivpu/ivpu_mmu.c +++ linux-xilinx-6.8.0/drivers/accel/ivpu/ivpu_mmu.c @@ -278,7 +278,7 @@ case IVPU_MMU_EVT_F_VMS_FETCH: return "Fetch of VMS caused external abort"; default: - return "Unknown CMDQ command"; + return "Unknown event"; } } @@ -286,15 +286,15 @@ { switch (err) { case IVPU_MMU_CERROR_NONE: - return "No CMDQ Error"; + return "No error"; case IVPU_MMU_CERROR_ILL: return "Illegal command"; case IVPU_MMU_CERROR_ABT: - return "External abort on CMDQ read"; + return "External abort on command queue read"; case IVPU_MMU_CERROR_ATC_INV_SYNC: return "Sync failed to complete ATS invalidation"; default: - return "Unknown CMDQ Error"; + return "Unknown error"; } } --- linux-xilinx-6.8.0.orig/drivers/accel/ivpu/ivpu_mmu_context.c +++ linux-xilinx-6.8.0/drivers/accel/ivpu/ivpu_mmu_context.c @@ -461,8 +461,8 @@ start = vdev->hw->ranges.global.start; end = vdev->hw->ranges.shave.end; } else { - start = vdev->hw->ranges.user.start; - end = vdev->hw->ranges.dma.end; + start = min_t(u64, vdev->hw->ranges.user.start, vdev->hw->ranges.shave.start); + end = max_t(u64, vdev->hw->ranges.user.end, vdev->hw->ranges.dma.end); } drm_mm_init(&ctx->mm, start, end - start); --- linux-xilinx-6.8.0.orig/drivers/accel/ivpu/ivpu_pm.c +++ linux-xilinx-6.8.0/drivers/accel/ivpu/ivpu_pm.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (C) 2020-2023 Intel Corporation + * Copyright (C) 2020-2024 Intel Corporation */ #include @@ -9,16 +9,17 @@ #include #include -#include "vpu_boot_api.h" +#include "ivpu_coredump.h" #include "ivpu_drv.h" -#include "ivpu_hw.h" #include "ivpu_fw.h" #include "ivpu_fw_log.h" +#include "ivpu_hw.h" #include "ivpu_ipc.h" #include "ivpu_job.h" #include "ivpu_jsm_msg.h" #include "ivpu_mmu.h" #include "ivpu_pm.h" +#include "vpu_boot_api.h" static bool ivpu_disable_recovery; module_param_named_unsafe(disable_recovery, ivpu_disable_recovery, bool, 0644); @@ -58,14 +59,11 @@ { int ret; - /* Save PCI state before powering down as it sometimes gets corrupted if NPU hangs */ - pci_save_state(to_pci_dev(vdev->drm.dev)); + ivpu_prepare_for_reset(vdev); ret = ivpu_shutdown(vdev); if (ret) - ivpu_err(vdev, "Failed to shutdown VPU: %d\n", ret); - - pci_set_power_state(to_pci_dev(vdev->drm.dev), PCI_D3hot); + ivpu_err(vdev, "Failed to shutdown NPU: %d\n", ret); return ret; } @@ -74,10 +72,10 @@ { int ret; +retry: pci_set_power_state(to_pci_dev(vdev->drm.dev), PCI_D0); pci_restore_state(to_pci_dev(vdev->drm.dev)); -retry: ret = ivpu_hw_power_up(vdev); if (ret) { ivpu_err(vdev, "Failed to power up HW: %d\n", ret); @@ -100,6 +98,7 @@ ivpu_mmu_disable(vdev); err_power_down: ivpu_hw_power_down(vdev); + pci_set_power_state(to_pci_dev(vdev->drm.dev), PCI_D3hot); if (!ivpu_fw_is_cold_boot(vdev)) { ivpu_pm_prepare_cold_boot(vdev); @@ -111,39 +110,56 @@ return ret; } -static void ivpu_pm_recovery_work(struct work_struct *work) +static void ivpu_pm_reset_begin(struct ivpu_device *vdev) { - struct ivpu_pm_info *pm = container_of(work, struct ivpu_pm_info, recovery_work); - struct ivpu_device *vdev = pm->vdev; - char *evt[2] = {"IVPU_PM_EVENT=IVPU_RECOVER", NULL}; - int ret; - - ivpu_err(vdev, "Recovering the VPU (reset #%d)\n", atomic_read(&vdev->pm->reset_counter)); - - ret = pm_runtime_resume_and_get(vdev->drm.dev); - if (ret) - ivpu_err(vdev, "Failed to resume VPU: %d\n", ret); - - ivpu_fw_log_dump(vdev); + pm_runtime_disable(vdev->drm.dev); atomic_inc(&vdev->pm->reset_counter); atomic_set(&vdev->pm->reset_pending, 1); down_write(&vdev->pm->reset_lock); +} + +static void ivpu_pm_reset_complete(struct ivpu_device *vdev) +{ + int ret; - ivpu_suspend(vdev); ivpu_pm_prepare_cold_boot(vdev); ivpu_jobs_abort_all(vdev); ret = ivpu_resume(vdev); - if (ret) + if (ret) { ivpu_err(vdev, "Failed to resume NPU: %d\n", ret); + pm_runtime_set_suspended(vdev->drm.dev); + } else { + pm_runtime_set_active(vdev->drm.dev); + } up_write(&vdev->pm->reset_lock); atomic_set(&vdev->pm->reset_pending, 0); - kobject_uevent_env(&vdev->drm.dev->kobj, KOBJ_CHANGE, evt); pm_runtime_mark_last_busy(vdev->drm.dev); - pm_runtime_put_autosuspend(vdev->drm.dev); + pm_runtime_enable(vdev->drm.dev); +} + +static void ivpu_pm_recovery_work(struct work_struct *work) +{ + struct ivpu_pm_info *pm = container_of(work, struct ivpu_pm_info, recovery_work); + struct ivpu_device *vdev = pm->vdev; + char *evt[2] = {"IVPU_PM_EVENT=IVPU_RECOVER", NULL}; + + ivpu_err(vdev, "Recovering the NPU (reset #%d)\n", atomic_read(&vdev->pm->reset_counter)); + + ivpu_pm_reset_begin(vdev); + + if (!pm_runtime_status_suspended(vdev->drm.dev)) { + ivpu_jsm_state_dump(vdev); + ivpu_dev_coredump(vdev); + ivpu_suspend(vdev); + } + + ivpu_pm_reset_complete(vdev); + + kobject_uevent_env(&vdev->drm.dev->kobj, KOBJ_CHANGE, evt); } void ivpu_pm_trigger_recovery(struct ivpu_device *vdev, const char *reason) @@ -264,7 +280,7 @@ if (!hw_is_idle) { ivpu_err(vdev, "VPU failed to enter idle, force suspended.\n"); - ivpu_fw_log_dump(vdev); + ivpu_dev_coredump(vdev); ivpu_pm_prepare_cold_boot(vdev); } else { ivpu_pm_prepare_warm_boot(vdev); @@ -309,7 +325,7 @@ { int ret; - ret = pm_runtime_get_if_active(vdev->drm.dev, false); + ret = pm_runtime_get_if_in_use(vdev->drm.dev); drm_WARN_ON(&vdev->drm, ret < 0); return ret; @@ -326,33 +342,26 @@ struct ivpu_device *vdev = pci_get_drvdata(pdev); ivpu_dbg(vdev, PM, "Pre-reset..\n"); - atomic_inc(&vdev->pm->reset_counter); - atomic_set(&vdev->pm->reset_pending, 1); - pm_runtime_get_sync(vdev->drm.dev); - down_write(&vdev->pm->reset_lock); - ivpu_prepare_for_reset(vdev); - ivpu_hw_reset(vdev); - ivpu_pm_prepare_cold_boot(vdev); - ivpu_jobs_abort_all(vdev); + ivpu_pm_reset_begin(vdev); + + if (!pm_runtime_status_suspended(vdev->drm.dev)) { + ivpu_prepare_for_reset(vdev); + ivpu_hw_reset(vdev); + } + ivpu_dbg(vdev, PM, "Pre-reset done.\n"); } void ivpu_pm_reset_done_cb(struct pci_dev *pdev) { struct ivpu_device *vdev = pci_get_drvdata(pdev); - int ret; ivpu_dbg(vdev, PM, "Post-reset..\n"); - ret = ivpu_resume(vdev); - if (ret) - ivpu_err(vdev, "Failed to set RESUME state: %d\n", ret); - up_write(&vdev->pm->reset_lock); - atomic_set(&vdev->pm->reset_pending, 0); - ivpu_dbg(vdev, PM, "Post-reset done.\n"); - pm_runtime_mark_last_busy(vdev->drm.dev); - pm_runtime_put_autosuspend(vdev->drm.dev); + ivpu_pm_reset_complete(vdev); + + ivpu_dbg(vdev, PM, "Post-reset done.\n"); } void ivpu_pm_init(struct ivpu_device *vdev) @@ -378,6 +387,7 @@ pm_runtime_use_autosuspend(dev); pm_runtime_set_autosuspend_delay(dev, delay); + pm_runtime_set_active(dev); ivpu_dbg(vdev, PM, "Autosuspend delay = %d\n", delay); } @@ -392,7 +402,6 @@ { struct device *dev = vdev->drm.dev; - pm_runtime_set_active(dev); pm_runtime_allow(dev); pm_runtime_mark_last_busy(dev); pm_runtime_put_autosuspend(dev); --- linux-xilinx-6.8.0.orig/drivers/accel/qaic/qaic_control.c +++ linux-xilinx-6.8.0/drivers/accel/qaic/qaic_control.c @@ -496,7 +496,7 @@ nents = sgt->nents; nents_dma = nents; *size = QAIC_MANAGE_EXT_MSG_LENGTH - msg_hdr_len - sizeof(**out_trans); - for_each_sgtable_sg(sgt, sg, i) { + for_each_sgtable_dma_sg(sgt, sg, i) { *size -= sizeof(*asp); /* Save 1K for possible follow-up transactions. */ if (*size < SZ_1K) { --- linux-xilinx-6.8.0.orig/drivers/accel/qaic/qaic_data.c +++ linux-xilinx-6.8.0/drivers/accel/qaic/qaic_data.c @@ -179,7 +179,7 @@ nents = 0; size = size ? size : PAGE_SIZE; - for (sg = sgt_in->sgl; sg; sg = sg_next(sg)) { + for_each_sgtable_dma_sg(sgt_in, sg, j) { len = sg_dma_len(sg); if (!len) @@ -216,7 +216,7 @@ /* copy relevant sg node and fix page and length */ sgn = sgf; - for_each_sgtable_sg(sgt, sg, j) { + for_each_sgtable_dma_sg(sgt, sg, j) { memcpy(sg, sgn, sizeof(*sg)); if (sgn == sgf) { sg_dma_address(sg) += offf; @@ -296,7 +296,7 @@ * fence. */ dev_addr = req->dev_addr; - for_each_sgtable_sg(slice->sgt, sg, i) { + for_each_sgtable_dma_sg(slice->sgt, sg, i) { slice->reqs[i].cmd = cmd; slice->reqs[i].src_addr = cpu_to_le64(slice->dir == DMA_TO_DEVICE ? sg_dma_address(sg) : dev_addr); --- linux-xilinx-6.8.0.orig/drivers/accel/qaic/qaic_drv.c +++ linux-xilinx-6.8.0/drivers/accel/qaic/qaic_drv.c @@ -32,6 +32,7 @@ MODULE_IMPORT_NS(DMA_BUF); +#define PCI_DEV_AIC080 0xa080 #define PCI_DEV_AIC100 0xa100 #define QAIC_NAME "qaic" #define QAIC_DESC "Qualcomm Cloud AI Accelerators" @@ -322,7 +323,7 @@ return NULL; qdev->dev_state = QAIC_OFFLINE; - if (id->device == PCI_DEV_AIC100) { + if (id->device == PCI_DEV_AIC080 || id->device == PCI_DEV_AIC100) { qdev->num_dbc = 16; qdev->dbc = devm_kcalloc(&pdev->dev, qdev->num_dbc, sizeof(*qdev->dbc), GFP_KERNEL); if (!qdev->dbc) @@ -561,6 +562,7 @@ }; static const struct pci_device_id qaic_ids[] = { + { PCI_DEVICE(PCI_VENDOR_ID_QCOM, PCI_DEV_AIC080), }, { PCI_DEVICE(PCI_VENDOR_ID_QCOM, PCI_DEV_AIC100), }, { } }; --- linux-xilinx-6.8.0.orig/drivers/accessibility/speakup/main.c +++ linux-xilinx-6.8.0/drivers/accessibility/speakup/main.c @@ -574,7 +574,7 @@ } attr_ch = get_char(vc, (u_short *)tmp_pos, &spk_attr); buf[cnt++] = attr_ch; - while (tmpx < vc->vc_cols - 1) { + while (tmpx < vc->vc_cols - 1 && cnt < ARRAY_SIZE(buf) - 1) { tmp_pos += 2; tmpx++; ch = get_char(vc, (u_short *)tmp_pos, &temp); --- linux-xilinx-6.8.0.orig/drivers/accessibility/speakup/synth.c +++ linux-xilinx-6.8.0/drivers/accessibility/speakup/synth.c @@ -208,8 +208,10 @@ wake_up_process(speakup_task); } -void synth_write(const char *buf, size_t count) +void synth_write(const char *_buf, size_t count) { + const unsigned char *buf = (const unsigned char *) _buf; + while (count--) synth_buffer_add(*buf++); synth_start(); --- linux-xilinx-6.8.0.orig/drivers/acpi/ac.c +++ linux-xilinx-6.8.0/drivers/acpi/ac.c @@ -145,7 +145,7 @@ dev_name(&adev->dev), event, (u32) ac->state); acpi_notifier_call_chain(adev, event, (u32) ac->state); - kobject_uevent(&ac->charger->dev.kobj, KOBJ_CHANGE); + power_supply_changed(ac->charger); } } @@ -268,7 +268,7 @@ if (acpi_ac_get_state(ac)) return 0; if (old_state != ac->state) - kobject_uevent(&ac->charger->dev.kobj, KOBJ_CHANGE); + power_supply_changed(ac->charger); return 0; } --- linux-xilinx-6.8.0.orig/drivers/acpi/acpi_ipmi.c +++ linux-xilinx-6.8.0/drivers/acpi/acpi_ipmi.c @@ -22,6 +22,8 @@ /* the IPMI timeout is 5s */ #define IPMI_TIMEOUT (5000) #define ACPI_IPMI_MAX_MSG_LENGTH 64 +/* 2s should be suffient for SMI being selected */ +#define ACPI_IPMI_SMI_SELECTION_TIMEOUT (2 * HZ) struct acpi_ipmi_device { /* the device list attached to driver_data.ipmi_devices */ @@ -54,6 +56,7 @@ * to this selected global IPMI system interface. */ struct acpi_ipmi_device *selected_smi; + struct completion smi_selection_done; }; struct acpi_ipmi_msg { @@ -463,8 +466,10 @@ if (temp->handle == handle) goto err_lock; } - if (!driver_data.selected_smi) + if (!driver_data.selected_smi) { driver_data.selected_smi = ipmi_device; + complete(&driver_data.smi_selection_done); + } list_add_tail(&ipmi_device->head, &driver_data.ipmi_devices); mutex_unlock(&driver_data.ipmi_lock); @@ -578,6 +583,20 @@ return status; } +int acpi_wait_for_acpi_ipmi(void) +{ + long ret; + + ret = wait_for_completion_interruptible_timeout(&driver_data.smi_selection_done, + ACPI_IPMI_SMI_SELECTION_TIMEOUT); + + if (ret <= 0) + return -ETIMEDOUT; + + return 0; +} +EXPORT_SYMBOL_GPL(acpi_wait_for_acpi_ipmi); + static int __init acpi_ipmi_init(void) { int result; @@ -586,6 +605,8 @@ if (acpi_disabled) return 0; + init_completion(&driver_data.smi_selection_done); + status = acpi_install_address_space_handler(ACPI_ROOT_OBJECT, ACPI_ADR_SPACE_IPMI, &acpi_ipmi_space_handler, --- linux-xilinx-6.8.0.orig/drivers/acpi/acpi_lpss.c +++ linux-xilinx-6.8.0/drivers/acpi/acpi_lpss.c @@ -325,6 +325,7 @@ static const struct property_entry bsw_spi_properties[] = { PROPERTY_ENTRY_U32("intel,spi-pxa2xx-type", LPSS_BSW_SSP), + PROPERTY_ENTRY_U32("num-cs", 2), { } }; --- linux-xilinx-6.8.0.orig/drivers/acpi/acpi_pad.c +++ linux-xilinx-6.8.0/drivers/acpi/acpi_pad.c @@ -132,8 +132,10 @@ { struct cpumask *pad_busy_cpus = to_cpumask(pad_busy_cpus_bits); - cpumask_clear_cpu(tsk_in_cpu[tsk_index], pad_busy_cpus); - tsk_in_cpu[tsk_index] = -1; + if (tsk_in_cpu[tsk_index] != -1) { + cpumask_clear_cpu(tsk_in_cpu[tsk_index], pad_busy_cpus); + tsk_in_cpu[tsk_index] = -1; + } } static unsigned int idle_pct = 5; /* percentage */ --- linux-xilinx-6.8.0.orig/drivers/acpi/acpi_processor.c +++ linux-xilinx-6.8.0/drivers/acpi/acpi_processor.c @@ -397,7 +397,7 @@ result = acpi_processor_get_info(device); if (result) /* Processor is not physically present or unavailable */ - return 0; + goto err_clear_driver_data; BUG_ON(pr->id >= nr_cpu_ids); @@ -412,7 +412,7 @@ "BIOS reported wrong ACPI id %d for the processor\n", pr->id); /* Give up, but do not abort the namespace scan. */ - goto err; + goto err_clear_driver_data; } /* * processor_device_array is not cleared on errors to allow buggy BIOS @@ -424,12 +424,12 @@ dev = get_cpu_device(pr->id); if (!dev) { result = -ENODEV; - goto err; + goto err_clear_per_cpu; } result = acpi_bind_one(dev, device); if (result) - goto err; + goto err_clear_per_cpu; pr->dev = dev; @@ -440,10 +440,11 @@ dev_err(dev, "Processor driver could not be attached\n"); acpi_unbind_one(dev); - err: - free_cpumask_var(pr->throttling.shared_cpu_map); - device->driver_data = NULL; + err_clear_per_cpu: per_cpu(processors, pr->id) = NULL; + err_clear_driver_data: + device->driver_data = NULL; + free_cpumask_var(pr->throttling.shared_cpu_map); err_free_pr: kfree(pr); return result; --- linux-xilinx-6.8.0.orig/drivers/acpi/acpica/Makefile +++ linux-xilinx-6.8.0/drivers/acpi/acpica/Makefile @@ -5,6 +5,7 @@ ccflags-y := -D_LINUX -DBUILDING_ACPICA ccflags-$(CONFIG_ACPI_DEBUG) += -DACPI_DEBUG_OUTPUT +CFLAGS_tbfind.o += $(call cc-disable-warning, stringop-truncation) # use acpi.o to put all files here into acpi.o modparam namespace obj-y += acpi.o --- linux-xilinx-6.8.0.orig/drivers/acpi/acpica/acevents.h +++ linux-xilinx-6.8.0/drivers/acpi/acpica/acevents.h @@ -188,7 +188,7 @@ u8 acpi_ns_is_locked); void -acpi_ev_execute_reg_methods(struct acpi_namespace_node *node, +acpi_ev_execute_reg_methods(struct acpi_namespace_node *node, u32 max_depth, acpi_adr_space_type space_id, u32 function); acpi_status --- linux-xilinx-6.8.0.orig/drivers/acpi/acpica/achware.h +++ linux-xilinx-6.8.0/drivers/acpi/acpica/achware.h @@ -103,8 +103,6 @@ acpi_status acpi_hw_enable_all_runtime_gpes(void); -acpi_status acpi_hw_enable_all_wakeup_gpes(void); - u8 acpi_hw_check_all_gpes(acpi_handle gpe_skip_device, u32 gpe_skip_number); acpi_status --- linux-xilinx-6.8.0.orig/drivers/acpi/acpica/dbconvert.c +++ linux-xilinx-6.8.0/drivers/acpi/acpica/dbconvert.c @@ -174,6 +174,8 @@ elements = ACPI_ALLOCATE_ZEROED(DB_DEFAULT_PKG_ELEMENTS * sizeof(union acpi_object)); + if (!elements) + return (AE_NO_MEMORY); this = string; for (i = 0; i < (DB_DEFAULT_PKG_ELEMENTS - 1); i++) { --- linux-xilinx-6.8.0.orig/drivers/acpi/acpica/dbnames.c +++ linux-xilinx-6.8.0/drivers/acpi/acpica/dbnames.c @@ -550,8 +550,12 @@ ACPI_FREE(buffer.pointer); buffer.length = ACPI_ALLOCATE_LOCAL_BUFFER; - acpi_evaluate_object(obj_handle, NULL, NULL, &buffer); - + status = acpi_evaluate_object(obj_handle, NULL, NULL, &buffer); + if (ACPI_FAILURE(status)) { + acpi_os_printf("Could Not evaluate object %p\n", + obj_handle); + return (AE_OK); + } /* * Since this is a field unit, surround the output in braces */ --- linux-xilinx-6.8.0.orig/drivers/acpi/acpica/dswexec.c +++ linux-xilinx-6.8.0/drivers/acpi/acpica/dswexec.c @@ -397,11 +397,11 @@ /* Resolve all operands */ + union acpi_operand_object **stack_ptr = NULL; + if (walk_state->num_operands > 0) + stack_ptr = ACPI_WALK_OPERANDS; status = acpi_ex_resolve_operands(walk_state->opcode, - &(walk_state-> - operands - [walk_state-> - num_operands - 1]), + stack_ptr, walk_state); } --- linux-xilinx-6.8.0.orig/drivers/acpi/acpica/evregion.c +++ linux-xilinx-6.8.0/drivers/acpi/acpica/evregion.c @@ -65,6 +65,7 @@ acpi_gbl_default_address_spaces [i])) { acpi_ev_execute_reg_methods(acpi_gbl_root_node, + ACPI_UINT32_MAX, acpi_gbl_default_address_spaces [i], ACPI_REG_CONNECT); } @@ -672,6 +673,7 @@ * FUNCTION: acpi_ev_execute_reg_methods * * PARAMETERS: node - Namespace node for the device + * max_depth - Depth to which search for _REG * space_id - The address space ID * function - Passed to _REG: On (1) or Off (0) * @@ -683,7 +685,7 @@ ******************************************************************************/ void -acpi_ev_execute_reg_methods(struct acpi_namespace_node *node, +acpi_ev_execute_reg_methods(struct acpi_namespace_node *node, u32 max_depth, acpi_adr_space_type space_id, u32 function) { struct acpi_reg_walk_info info; @@ -717,7 +719,7 @@ * regions and _REG methods. (i.e. handlers must be installed for all * regions of this Space ID before we can run any _REG methods) */ - (void)acpi_ns_walk_namespace(ACPI_TYPE_ANY, node, ACPI_UINT32_MAX, + (void)acpi_ns_walk_namespace(ACPI_TYPE_ANY, node, max_depth, ACPI_NS_WALK_UNLOCK, acpi_ev_reg_run, NULL, &info, NULL); --- linux-xilinx-6.8.0.orig/drivers/acpi/acpica/evxfregn.c +++ linux-xilinx-6.8.0/drivers/acpi/acpica/evxfregn.c @@ -85,7 +85,8 @@ /* Run all _REG methods for this address space */ if (run_reg) { - acpi_ev_execute_reg_methods(node, space_id, ACPI_REG_CONNECT); + acpi_ev_execute_reg_methods(node, ACPI_UINT32_MAX, space_id, + ACPI_REG_CONNECT); } unlock_and_exit: @@ -231,8 +232,6 @@ /* Now we can delete the handler object */ - acpi_os_release_mutex(handler_obj->address_space. - context_mutex); acpi_ut_remove_reference(handler_obj); goto unlock_and_exit; } @@ -263,6 +262,7 @@ * FUNCTION: acpi_execute_reg_methods * * PARAMETERS: device - Handle for the device + * max_depth - Depth to which search for _REG * space_id - The address space ID * * RETURN: Status @@ -271,7 +271,8 @@ * ******************************************************************************/ acpi_status -acpi_execute_reg_methods(acpi_handle device, acpi_adr_space_type space_id) +acpi_execute_reg_methods(acpi_handle device, u32 max_depth, + acpi_adr_space_type space_id) { struct acpi_namespace_node *node; acpi_status status; @@ -296,7 +297,8 @@ /* Run all _REG methods for this address space */ - acpi_ev_execute_reg_methods(node, space_id, ACPI_REG_CONNECT); + acpi_ev_execute_reg_methods(node, max_depth, space_id, + ACPI_REG_CONNECT); } else { status = AE_BAD_PARAMETER; } --- linux-xilinx-6.8.0.orig/drivers/acpi/acpica/exprep.c +++ linux-xilinx-6.8.0/drivers/acpi/acpica/exprep.c @@ -437,6 +437,9 @@ if (info->connection_node) { second_desc = info->connection_node->object; + if (second_desc == NULL) { + break; + } if (!(second_desc->common.flags & AOPOBJ_DATA_VALID)) { status = acpi_ds_get_buffer_arguments(second_desc); --- linux-xilinx-6.8.0.orig/drivers/acpi/acpica/exregion.c +++ linux-xilinx-6.8.0/drivers/acpi/acpica/exregion.c @@ -44,7 +44,6 @@ struct acpi_mem_mapping *mm = mem_info->cur_mm; u32 length; acpi_size map_length; - acpi_size page_boundary_map_length; #ifdef ACPI_MISALIGNMENT_NOT_SUPPORTED u32 remainder; #endif @@ -138,26 +137,8 @@ map_length = (acpi_size) ((mem_info->address + mem_info->length) - address); - /* - * If mapping the entire remaining portion of the region will cross - * a page boundary, just map up to the page boundary, do not cross. - * On some systems, crossing a page boundary while mapping regions - * can cause warnings if the pages have different attributes - * due to resource management. - * - * This has the added benefit of constraining a single mapping to - * one page, which is similar to the original code that used a 4k - * maximum window. - */ - page_boundary_map_length = (acpi_size) - (ACPI_ROUND_UP(address, ACPI_DEFAULT_PAGE_SIZE) - address); - if (page_boundary_map_length == 0) { - page_boundary_map_length = ACPI_DEFAULT_PAGE_SIZE; - } - - if (map_length > page_boundary_map_length) { - map_length = page_boundary_map_length; - } + if (map_length > ACPI_DEFAULT_PAGE_SIZE) + map_length = ACPI_DEFAULT_PAGE_SIZE; /* Create a new mapping starting at the address given */ --- linux-xilinx-6.8.0.orig/drivers/acpi/acpica/exsystem.c +++ linux-xilinx-6.8.0/drivers/acpi/acpica/exsystem.c @@ -133,14 +133,15 @@ * (ACPI specifies 100 usec as max, but this gives some slack in * order to support existing BIOSs) */ - ACPI_ERROR((AE_INFO, - "Time parameter is too large (%u)", how_long_us)); + ACPI_ERROR_ONCE((AE_INFO, + "Time parameter is too large (%u)", + how_long_us)); status = AE_AML_OPERAND_VALUE; } else { if (how_long_us > 100) { - ACPI_WARNING((AE_INFO, - "Time parameter %u us > 100 us violating ACPI spec, please fix the firmware.", - how_long_us)); + ACPI_WARNING_ONCE((AE_INFO, + "Time parameter %u us > 100 us violating ACPI spec, please fix the firmware.", + how_long_us)); } acpi_os_stall(how_long_us); } --- linux-xilinx-6.8.0.orig/drivers/acpi/acpica/psargs.c +++ linux-xilinx-6.8.0/drivers/acpi/acpica/psargs.c @@ -25,6 +25,8 @@ static union acpi_parse_object *acpi_ps_get_next_field(struct acpi_parse_state *parser_state); +static void acpi_ps_free_field_list(union acpi_parse_object *start); + /******************************************************************************* * * FUNCTION: acpi_ps_get_next_package_length @@ -685,6 +687,39 @@ /******************************************************************************* * + * FUNCTION: acpi_ps_free_field_list + * + * PARAMETERS: start - First Op in field list + * + * RETURN: None. + * + * DESCRIPTION: Free all Op objects inside a field list. + * + ******************************************************************************/ + +static void acpi_ps_free_field_list(union acpi_parse_object *start) +{ + union acpi_parse_object *cur = start; + union acpi_parse_object *next; + union acpi_parse_object *arg; + + while (cur) { + next = cur->common.next; + + /* AML_INT_CONNECTION_OP can have a single argument */ + + arg = acpi_ps_get_arg(cur, 0); + if (arg) { + acpi_ps_free_op(arg); + } + + acpi_ps_free_op(cur); + cur = next; + } +} + +/******************************************************************************* + * * FUNCTION: acpi_ps_get_next_arg * * PARAMETERS: walk_state - Current state @@ -751,6 +786,10 @@ while (parser_state->aml < parser_state->pkg_end) { field = acpi_ps_get_next_field(parser_state); if (!field) { + if (arg) { + acpi_ps_free_field_list(arg); + } + return_ACPI_STATUS(AE_NO_MEMORY); } @@ -820,6 +859,10 @@ acpi_ps_get_next_namepath(walk_state, parser_state, arg, ACPI_NOT_METHOD_CALL); + if (ACPI_FAILURE(status)) { + acpi_ps_free_op(arg); + return_ACPI_STATUS(status); + } } else { /* Single complex argument, nothing returned */ @@ -854,6 +897,10 @@ acpi_ps_get_next_namepath(walk_state, parser_state, arg, ACPI_POSSIBLE_METHOD_CALL); + if (ACPI_FAILURE(status)) { + acpi_ps_free_op(arg); + return_ACPI_STATUS(status); + } if (arg->common.aml_opcode == AML_INT_METHODCALL_OP) { --- linux-xilinx-6.8.0.orig/drivers/acpi/apei/ghes.c +++ linux-xilinx-6.8.0/drivers/acpi/apei/ghes.c @@ -170,8 +170,6 @@ static struct ghes_estatus_cache __rcu *ghes_estatus_caches[GHES_ESTATUS_CACHES_SIZE]; static atomic_t ghes_estatus_cache_alloced; -static int ghes_panic_timeout __read_mostly = 30; - static void __iomem *ghes_map(u64 pfn, enum fixed_addresses fixmap_idx) { phys_addr_t paddr; @@ -899,14 +897,16 @@ struct acpi_hest_generic_status *estatus, u64 buf_paddr, enum fixed_addresses fixmap_idx) { + const char *msg = GHES_PFX "Fatal hardware error"; + __ghes_print_estatus(KERN_EMERG, ghes->generic, estatus); ghes_clear_estatus(ghes, estatus, buf_paddr, fixmap_idx); - /* reboot to log the error! */ if (!panic_timeout) - panic_timeout = ghes_panic_timeout; - panic("Fatal hardware error!"); + pr_emerg("%s but panic disabled\n", msg); + + panic(msg); } static int ghes_proc(struct ghes *ghes) --- linux-xilinx-6.8.0.orig/drivers/acpi/arm64/gtdt.c +++ linux-xilinx-6.8.0/drivers/acpi/arm64/gtdt.c @@ -283,7 +283,7 @@ if (frame->virt_irq > 0) acpi_unregister_gsi(gtdt_frame->virtual_timer_interrupt); frame->virt_irq = 0; - } while (i-- >= 0 && gtdt_frame--); + } while (i-- > 0 && gtdt_frame--); return -EINVAL; } --- linux-xilinx-6.8.0.orig/drivers/acpi/arm64/iort.c +++ linux-xilinx-6.8.0/drivers/acpi/arm64/iort.c @@ -1712,6 +1712,15 @@ /* HiSilicon Hip09 Platform */ {"HISI ", "HIP09 ", 0, ACPI_SIG_IORT, greater_than_or_equal, "Erratum #162001900", IORT_SMMU_V3_PMCG_HISI_HIP09}, + {"HISI ", "HIP09A ", 0, ACPI_SIG_IORT, greater_than_or_equal, + "Erratum #162001900", IORT_SMMU_V3_PMCG_HISI_HIP09}, + /* HiSilicon Hip10/11 Platform uses the same SMMU IP with Hip09 */ + {"HISI ", "HIP10 ", 0, ACPI_SIG_IORT, greater_than_or_equal, + "Erratum #162001900", IORT_SMMU_V3_PMCG_HISI_HIP09}, + {"HISI ", "HIP10C ", 0, ACPI_SIG_IORT, greater_than_or_equal, + "Erratum #162001900", IORT_SMMU_V3_PMCG_HISI_HIP09}, + {"HISI ", "HIP11 ", 0, ACPI_SIG_IORT, greater_than_or_equal, + "Erratum #162001900", IORT_SMMU_V3_PMCG_HISI_HIP09}, { } }; --- linux-xilinx-6.8.0.orig/drivers/acpi/battery.c +++ linux-xilinx-6.8.0/drivers/acpi/battery.c @@ -678,12 +678,18 @@ return count; } -static const struct device_attribute alarm_attr = { +static struct device_attribute alarm_attr = { .attr = {.name = "alarm", .mode = 0644}, .show = acpi_battery_alarm_show, .store = acpi_battery_alarm_store, }; +static struct attribute *acpi_battery_attrs[] = { + &alarm_attr.attr, + NULL +}; +ATTRIBUTE_GROUPS(acpi_battery); + /* * The Battery Hooking API * @@ -697,28 +703,35 @@ static LIST_HEAD(battery_hook_list); static DEFINE_MUTEX(hook_mutex); -static void __battery_hook_unregister(struct acpi_battery_hook *hook, int lock) +static void battery_hook_unregister_unlocked(struct acpi_battery_hook *hook) { struct acpi_battery *battery; + /* * In order to remove a hook, we first need to * de-register all the batteries that are registered. */ - if (lock) - mutex_lock(&hook_mutex); list_for_each_entry(battery, &acpi_battery_list, list) { if (!hook->remove_battery(battery->bat, hook)) power_supply_changed(battery->bat); } - list_del(&hook->list); - if (lock) - mutex_unlock(&hook_mutex); + list_del_init(&hook->list); + pr_info("extension unregistered: %s\n", hook->name); } void battery_hook_unregister(struct acpi_battery_hook *hook) { - __battery_hook_unregister(hook, 1); + mutex_lock(&hook_mutex); + /* + * Ignore already unregistered battery hooks. This might happen + * if a battery hook was previously unloaded due to an error when + * adding a new battery. + */ + if (!list_empty(&hook->list)) + battery_hook_unregister_unlocked(hook); + + mutex_unlock(&hook_mutex); } EXPORT_SYMBOL_GPL(battery_hook_unregister); @@ -727,7 +740,6 @@ struct acpi_battery *battery; mutex_lock(&hook_mutex); - INIT_LIST_HEAD(&hook->list); list_add(&hook->list, &battery_hook_list); /* * Now that the driver is registered, we need @@ -744,7 +756,7 @@ * hooks. */ pr_err("extension failed to load: %s", hook->name); - __battery_hook_unregister(hook, 0); + battery_hook_unregister_unlocked(hook); goto end; } @@ -783,7 +795,7 @@ */ pr_err("error in extension, unloading: %s", hook_node->name); - __battery_hook_unregister(hook_node, 0); + battery_hook_unregister_unlocked(hook_node); } } mutex_unlock(&hook_mutex); @@ -816,14 +828,17 @@ * need to remove the hooks. */ list_for_each_entry_safe(hook, ptr, &battery_hook_list, list) { - __battery_hook_unregister(hook, 1); + battery_hook_unregister(hook); } mutex_destroy(&hook_mutex); } static int sysfs_add_battery(struct acpi_battery *battery) { - struct power_supply_config psy_cfg = { .drv_data = battery, }; + struct power_supply_config psy_cfg = { + .drv_data = battery, + .attr_grp = acpi_battery_groups, + }; bool full_cap_broken = false; if (!ACPI_BATTERY_CAPACITY_VALID(battery->full_charge_capacity) && @@ -868,7 +883,7 @@ return result; } battery_hook_add_battery(battery); - return device_create_file(&battery->bat->dev, &alarm_attr); + return 0; } static void sysfs_remove_battery(struct acpi_battery *battery) @@ -879,7 +894,6 @@ return; } battery_hook_remove_battery(battery); - device_remove_file(&battery->bat->dev, &alarm_attr); power_supply_unregister(battery->bat); battery->bat = NULL; mutex_unlock(&battery->sysfs_lock); --- linux-xilinx-6.8.0.orig/drivers/acpi/bus.c +++ linux-xilinx-6.8.0/drivers/acpi/bus.c @@ -316,9 +316,14 @@ capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_PAD_SUPPORT; if (IS_ENABLED(CONFIG_ACPI_PROCESSOR)) capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_PPC_OST_SUPPORT; + if (IS_ENABLED(CONFIG_ACPI_THERMAL)) + capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_FAST_THERMAL_SAMPLING_SUPPORT; capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_HOTPLUG_OST_SUPPORT; capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_PCLPI_SUPPORT; + capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_OVER_16_PSTATES_SUPPORT; + capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_GED_SUPPORT; + capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_IRQ_RESOURCE_SOURCE_SUPPORT; if (IS_ENABLED(CONFIG_ACPI_PRMT)) capbuf[OSC_SUPPORT_DWORD] |= OSC_SB_PRM_SUPPORT; if (IS_ENABLED(CONFIG_ACPI_FFH)) --- linux-xilinx-6.8.0.orig/drivers/acpi/button.c +++ linux-xilinx-6.8.0/drivers/acpi/button.c @@ -130,6 +130,17 @@ }, .driver_data = (void *)(long)ACPI_BUTTON_LID_INIT_OPEN, }, + { + /* + * Samsung galaxybook2 ,initial _LID device notification returns + * lid closed. + */ + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD."), + DMI_MATCH(DMI_PRODUCT_NAME, "750XED"), + }, + .driver_data = (void *)(long)ACPI_BUTTON_LID_INIT_OPEN, + }, {} }; --- linux-xilinx-6.8.0.orig/drivers/acpi/cppc_acpi.c +++ linux-xilinx-6.8.0/drivers/acpi/cppc_acpi.c @@ -103,6 +103,11 @@ (cpc)->cpc_entry.reg.space_id == \ ACPI_ADR_SPACE_PLATFORM_COMM) +/* Check if a CPC register is in FFH */ +#define CPC_IN_FFH(cpc) ((cpc)->type == ACPI_TYPE_BUFFER && \ + (cpc)->cpc_entry.reg.space_id == \ + ACPI_ADR_SPACE_FIXED_HARDWARE) + /* Check if a CPC register is in SystemMemory */ #define CPC_IN_SYSTEM_MEMORY(cpc) ((cpc)->type == ACPI_TYPE_BUFFER && \ (cpc)->cpc_entry.reg.space_id == \ @@ -166,6 +171,16 @@ show_cppc_data(cppc_get_perf_ctrs, cppc_perf_fb_ctrs, reference_perf); show_cppc_data(cppc_get_perf_ctrs, cppc_perf_fb_ctrs, wraparound_time); +/* Check for valid access_width, otherwise, fallback to using bit_width */ +#define GET_BIT_WIDTH(reg) ((reg)->access_width ? (8 << ((reg)->access_width - 1)) : (reg)->bit_width) + +/* Shift and apply the mask for CPC reads/writes */ +#define MASK_VAL_READ(reg, val) (((val) >> (reg)->bit_offset) & \ + GENMASK(((reg)->bit_width) - 1, 0)) +#define MASK_VAL_WRITE(reg, prev_val, val) \ + ((((val) & GENMASK(((reg)->bit_width) - 1, 0)) << (reg)->bit_offset) | \ + ((prev_val) & ~(GENMASK(((reg)->bit_width) - 1, 0) << (reg)->bit_offset))) \ + static ssize_t show_feedback_ctrs(struct kobject *kobj, struct kobj_attribute *attr, char *buf) { @@ -780,6 +795,7 @@ } else if (gas_t->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) { if (gas_t->address) { void __iomem *addr; + size_t access_width; if (!osc_cpc_flexible_adr_space_confirmed) { pr_debug("Flexible address space capability not supported\n"); @@ -787,7 +803,8 @@ goto out_free; } - addr = ioremap(gas_t->address, gas_t->bit_width/8); + access_width = GET_BIT_WIDTH(gas_t) / 8; + addr = ioremap(gas_t->address, access_width); if (!addr) goto out_free; cpc_ptr->cpc_regs[i-2].sys_mem_vaddr = addr; @@ -846,6 +863,7 @@ /* Store CPU Logical ID */ cpc_ptr->cpu_id = pr->id; + raw_spin_lock_init(&cpc_ptr->rmw_lock); /* Parse PSD data for this CPU */ ret = acpi_get_psd(cpc_ptr, handle); @@ -983,6 +1001,7 @@ static int cpc_read(int cpu, struct cpc_register_resource *reg_res, u64 *val) { void __iomem *vaddr = NULL; + int size; int pcc_ss_id = per_cpu(cpu_pcc_subspace_idx, cpu); struct cpc_reg *reg = ®_res->cpc_entry.reg; @@ -992,14 +1011,14 @@ } *val = 0; + size = GET_BIT_WIDTH(reg); if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_IO) { - u32 width = 8 << (reg->access_width - 1); u32 val_u32; acpi_status status; status = acpi_os_read_port((acpi_io_address)reg->address, - &val_u32, width); + &val_u32, size); if (ACPI_FAILURE(status)) { pr_debug("Error: Failed to read SystemIO port %llx\n", reg->address); @@ -1008,17 +1027,24 @@ *val = val_u32; return 0; - } else if (reg->space_id == ACPI_ADR_SPACE_PLATFORM_COMM && pcc_ss_id >= 0) + } else if (reg->space_id == ACPI_ADR_SPACE_PLATFORM_COMM && pcc_ss_id >= 0) { + /* + * For registers in PCC space, the register size is determined + * by the bit width field; the access size is used to indicate + * the PCC subspace id. + */ + size = reg->bit_width; vaddr = GET_PCC_VADDR(reg->address, pcc_ss_id); + } else if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) vaddr = reg_res->sys_mem_vaddr; else if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) return cpc_read_ffh(cpu, reg, val); else return acpi_os_read_memory((acpi_physical_address)reg->address, - val, reg->bit_width); + val, size); - switch (reg->bit_width) { + switch (size) { case 8: *val = readb_relaxed(vaddr); break; @@ -1032,27 +1058,40 @@ *val = readq_relaxed(vaddr); break; default: - pr_debug("Error: Cannot read %u bit width from PCC for ss: %d\n", - reg->bit_width, pcc_ss_id); + if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) { + pr_debug("Error: Cannot read %u bit width from system memory: 0x%llx\n", + size, reg->address); + } else if (reg->space_id == ACPI_ADR_SPACE_PLATFORM_COMM) { + pr_debug("Error: Cannot read %u bit width from PCC for ss: %d\n", + size, pcc_ss_id); + } return -EFAULT; } + if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) + *val = MASK_VAL_READ(reg, *val); + return 0; } static int cpc_write(int cpu, struct cpc_register_resource *reg_res, u64 val) { int ret_val = 0; + int size; + u64 prev_val; void __iomem *vaddr = NULL; int pcc_ss_id = per_cpu(cpu_pcc_subspace_idx, cpu); struct cpc_reg *reg = ®_res->cpc_entry.reg; + struct cpc_desc *cpc_desc; + unsigned long flags; + + size = GET_BIT_WIDTH(reg); if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_IO) { - u32 width = 8 << (reg->access_width - 1); acpi_status status; status = acpi_os_write_port((acpi_io_address)reg->address, - (u32)val, width); + (u32)val, size); if (ACPI_FAILURE(status)) { pr_debug("Error: Failed to write SystemIO port %llx\n", reg->address); @@ -1060,17 +1099,52 @@ } return 0; - } else if (reg->space_id == ACPI_ADR_SPACE_PLATFORM_COMM && pcc_ss_id >= 0) + } else if (reg->space_id == ACPI_ADR_SPACE_PLATFORM_COMM && pcc_ss_id >= 0) { + /* + * For registers in PCC space, the register size is determined + * by the bit width field; the access size is used to indicate + * the PCC subspace id. + */ + size = reg->bit_width; vaddr = GET_PCC_VADDR(reg->address, pcc_ss_id); + } else if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) vaddr = reg_res->sys_mem_vaddr; else if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) return cpc_write_ffh(cpu, reg, val); else return acpi_os_write_memory((acpi_physical_address)reg->address, - val, reg->bit_width); + val, size); - switch (reg->bit_width) { + if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) { + cpc_desc = per_cpu(cpc_desc_ptr, cpu); + if (!cpc_desc) { + pr_debug("No CPC descriptor for CPU:%d\n", cpu); + return -ENODEV; + } + + raw_spin_lock_irqsave(&cpc_desc->rmw_lock, flags); + switch (size) { + case 8: + prev_val = readb_relaxed(vaddr); + break; + case 16: + prev_val = readw_relaxed(vaddr); + break; + case 32: + prev_val = readl_relaxed(vaddr); + break; + case 64: + prev_val = readq_relaxed(vaddr); + break; + default: + raw_spin_unlock_irqrestore(&cpc_desc->rmw_lock, flags); + return -EFAULT; + } + val = MASK_VAL_WRITE(reg, prev_val, val); + } + + switch (size) { case 8: writeb_relaxed(val, vaddr); break; @@ -1084,12 +1158,20 @@ writeq_relaxed(val, vaddr); break; default: - pr_debug("Error: Cannot write %u bit width to PCC for ss: %d\n", - reg->bit_width, pcc_ss_id); + if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) { + pr_debug("Error: Cannot write %u bit width to system memory: 0x%llx\n", + size, reg->address); + } else if (reg->space_id == ACPI_ADR_SPACE_PLATFORM_COMM) { + pr_debug("Error: Cannot write %u bit width to PCC for ss: %d\n", + size, pcc_ss_id); + } ret_val = -EFAULT; break; } + if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) + raw_spin_unlock_irqrestore(&cpc_desc->rmw_lock, flags); + return ret_val; } @@ -1158,6 +1240,19 @@ } /** + * cppc_get_highest_perf - Get the highest performance register value. + * @cpunum: CPU from which to get highest performance. + * @highest_perf: Return address. + * + * Return: 0 for success, -EIO otherwise. + */ +int cppc_get_highest_perf(int cpunum, u64 *highest_perf) +{ + return cppc_get_perf(cpunum, HIGHEST_PERF, highest_perf); +} +EXPORT_SYMBOL_GPL(cppc_get_highest_perf); + +/** * cppc_get_epp_perf - Get the epp register value. * @cpunum: CPU from which to get epp preference value. * @epp_perf: Return address. @@ -1427,9 +1522,12 @@ /* after writing CPC, transfer the ownership of PCC to platform */ ret = send_pcc_cmd(pcc_ss_id, CMD_WRITE); up_write(&pcc_ss_data->pcc_lock); + } else if (osc_cpc_flexible_adr_space_confirmed && + CPC_SUPPORTED(epp_set_reg) && CPC_IN_FFH(epp_set_reg)) { + ret = cpc_write(cpu, epp_set_reg, perf_ctrls->energy_perf); } else { ret = -ENOTSUPP; - pr_debug("_CPC in PCC is not supported\n"); + pr_debug("_CPC in PCC and _CPC in FFH are not supported\n"); } return ret; @@ -1814,9 +1912,15 @@ u64 mul, div; if (caps->lowest_freq && caps->nominal_freq) { - mul = caps->nominal_freq - caps->lowest_freq; + /* Avoid special case when nominal_freq is equal to lowest_freq */ + if (caps->lowest_freq == caps->nominal_freq) { + mul = caps->nominal_freq; + div = caps->nominal_perf; + } else { + mul = caps->nominal_freq - caps->lowest_freq; + div = caps->nominal_perf - caps->lowest_perf; + } mul *= KHZ_PER_MHZ; - div = caps->nominal_perf - caps->lowest_perf; offset = caps->nominal_freq * KHZ_PER_MHZ - div64_u64(caps->nominal_perf * mul, div); } else { @@ -1837,11 +1941,17 @@ { s64 retval, offset = 0; static u64 max_khz; - u64 mul, div; + u64 mul, div; if (caps->lowest_freq && caps->nominal_freq) { - mul = caps->nominal_perf - caps->lowest_perf; - div = caps->nominal_freq - caps->lowest_freq; + /* Avoid special case when nominal_freq is equal to lowest_freq */ + if (caps->lowest_freq == caps->nominal_freq) { + mul = caps->nominal_perf; + div = caps->nominal_freq; + } else { + mul = caps->nominal_perf - caps->lowest_perf; + div = caps->nominal_freq - caps->lowest_freq; + } /* * We don't need to convert to kHz for computing offset and can * directly use nominal_freq and lowest_freq as the div64_u64 --- linux-xilinx-6.8.0.orig/drivers/acpi/device_sysfs.c +++ linux-xilinx-6.8.0/drivers/acpi/device_sysfs.c @@ -540,8 +540,9 @@ * If device has _STR, 'description' file is created */ if (acpi_has_method(dev->handle, "_STR")) { - status = acpi_evaluate_object(dev->handle, "_STR", - NULL, &buffer); + status = acpi_evaluate_object_typed(dev->handle, "_STR", + NULL, &buffer, + ACPI_TYPE_BUFFER); if (ACPI_FAILURE(status)) buffer.pointer = NULL; dev->pnp.str_obj = buffer.pointer; --- linux-xilinx-6.8.0.orig/drivers/acpi/ec.c +++ linux-xilinx-6.8.0/drivers/acpi/ec.c @@ -783,6 +783,9 @@ unsigned long tmp; int ret = 0; + if (t->rdata) + memset(t->rdata, 0, t->rlen); + /* start transaction */ spin_lock_irqsave(&ec->lock, tmp); /* Enable GPE for command processing (IBF=0/OBF=1) */ @@ -819,8 +822,6 @@ if (!ec || (!t) || (t->wlen && !t->wdata) || (t->rlen && !t->rdata)) return -EINVAL; - if (t->rdata) - memset(t->rdata, 0, t->rlen); mutex_lock(&ec->mutex); if (ec->global_lock) { @@ -847,7 +848,7 @@ .wdata = NULL, .rdata = &d, .wlen = 0, .rlen = 1}; - return acpi_ec_transaction(ec, &t); + return acpi_ec_transaction_unlocked(ec, &t); } static int acpi_ec_burst_disable(struct acpi_ec *ec) @@ -857,7 +858,7 @@ .wlen = 0, .rlen = 0}; return (acpi_ec_read_status(ec) & ACPI_EC_FLAG_BURST) ? - acpi_ec_transaction(ec, &t) : 0; + acpi_ec_transaction_unlocked(ec, &t) : 0; } static int acpi_ec_read(struct acpi_ec *ec, u8 address, u8 *data) @@ -873,6 +874,19 @@ return result; } +static int acpi_ec_read_unlocked(struct acpi_ec *ec, u8 address, u8 *data) +{ + int result; + u8 d; + struct transaction t = {.command = ACPI_EC_COMMAND_READ, + .wdata = &address, .rdata = &d, + .wlen = 1, .rlen = 1}; + + result = acpi_ec_transaction_unlocked(ec, &t); + *data = d; + return result; +} + static int acpi_ec_write(struct acpi_ec *ec, u8 address, u8 data) { u8 wdata[2] = { address, data }; @@ -883,6 +897,16 @@ return acpi_ec_transaction(ec, &t); } +static int acpi_ec_write_unlocked(struct acpi_ec *ec, u8 address, u8 data) +{ + u8 wdata[2] = { address, data }; + struct transaction t = {.command = ACPI_EC_COMMAND_WRITE, + .wdata = wdata, .rdata = NULL, + .wlen = 2, .rlen = 0}; + + return acpi_ec_transaction_unlocked(ec, &t); +} + int ec_read(u8 addr, u8 *val) { int err; @@ -1323,6 +1347,7 @@ struct acpi_ec *ec = handler_context; int result = 0, i, bytes = bits / 8; u8 *value = (u8 *)value64; + u32 glk; if ((address > 0xFF) || !value || !handler_context) return AE_BAD_PARAMETER; @@ -1330,17 +1355,38 @@ if (function != ACPI_READ && function != ACPI_WRITE) return AE_BAD_PARAMETER; + mutex_lock(&ec->mutex); + + if (ec->global_lock) { + acpi_status status; + + status = acpi_acquire_global_lock(ACPI_EC_UDELAY_GLK, &glk); + if (ACPI_FAILURE(status)) { + result = -ENODEV; + goto unlock; + } + } + if (ec->busy_polling || bits > 8) acpi_ec_burst_enable(ec); - for (i = 0; i < bytes; ++i, ++address, ++value) + for (i = 0; i < bytes; ++i, ++address, ++value) { result = (function == ACPI_READ) ? - acpi_ec_read(ec, address, value) : - acpi_ec_write(ec, address, *value); + acpi_ec_read_unlocked(ec, address, value) : + acpi_ec_write_unlocked(ec, address, *value); + if (result < 0) + break; + } if (ec->busy_polling || bits > 8) acpi_ec_burst_disable(ec); + if (ec->global_lock) + acpi_release_global_lock(glk); + +unlock: + mutex_unlock(&ec->mutex); + switch (result) { case -EINVAL: return AE_BAD_PARAMETER; @@ -1348,8 +1394,10 @@ return AE_NOT_FOUND; case -ETIME: return AE_TIME; - default: + case 0: return AE_OK; + default: + return AE_ERROR; } } @@ -1487,8 +1535,10 @@ acpi_ec_start(ec, false); if (!test_bit(EC_FLAGS_EC_HANDLER_INSTALLED, &ec->flags)) { + acpi_handle scope_handle = ec == first_ec ? ACPI_ROOT_OBJECT : ec->handle; + acpi_ec_enter_noirq(ec); - status = acpi_install_address_space_handler_no_reg(ec->handle, + status = acpi_install_address_space_handler_no_reg(scope_handle, ACPI_ADR_SPACE_EC, &acpi_ec_space_handler, NULL, ec); @@ -1497,11 +1547,10 @@ return -ENODEV; } set_bit(EC_FLAGS_EC_HANDLER_INSTALLED, &ec->flags); - ec->address_space_handler_holder = ec->handle; } if (call_reg && !test_bit(EC_FLAGS_EC_REG_CALLED, &ec->flags)) { - acpi_execute_reg_methods(ec->handle, ACPI_ADR_SPACE_EC); + acpi_execute_reg_methods(ec->handle, ACPI_UINT32_MAX, ACPI_ADR_SPACE_EC); set_bit(EC_FLAGS_EC_REG_CALLED, &ec->flags); } @@ -1553,10 +1602,13 @@ static void ec_remove_handlers(struct acpi_ec *ec) { + acpi_handle scope_handle = ec == first_ec ? ACPI_ROOT_OBJECT : ec->handle; + if (test_bit(EC_FLAGS_EC_HANDLER_INSTALLED, &ec->flags)) { if (ACPI_FAILURE(acpi_remove_address_space_handler( - ec->address_space_handler_holder, - ACPI_ADR_SPACE_EC, &acpi_ec_space_handler))) + scope_handle, + ACPI_ADR_SPACE_EC, + &acpi_ec_space_handler))) pr_err("failed to remove space handler\n"); clear_bit(EC_FLAGS_EC_HANDLER_INSTALLED, &ec->flags); } @@ -1595,14 +1647,18 @@ { int ret; - ret = ec_install_handlers(ec, device, call_reg); - if (ret) - return ret; - /* First EC capable of handling transactions */ if (!first_ec) first_ec = ec; + ret = ec_install_handlers(ec, device, call_reg); + if (ret) { + if (ec == first_ec) + first_ec = NULL; + + return ret; + } + pr_info("EC_CMD/EC_SC=0x%lx, EC_DATA=0x%lx\n", ec->command_addr, ec->data_addr); @@ -1709,6 +1765,12 @@ } } +void acpi_ec_register_opregions(struct acpi_device *adev) +{ + if (first_ec && first_ec->handle != adev->handle) + acpi_execute_reg_methods(adev->handle, 1, ACPI_ADR_SPACE_EC); +} + static acpi_status ec_parse_io_ports(struct acpi_resource *resource, void *context) { --- linux-xilinx-6.8.0.orig/drivers/acpi/fan_core.c +++ linux-xilinx-6.8.0/drivers/acpi/fan_core.c @@ -367,19 +367,25 @@ result = sysfs_create_link(&pdev->dev.kobj, &cdev->device.kobj, "thermal_cooling"); - if (result) + if (result) { dev_err(&pdev->dev, "Failed to create sysfs link 'thermal_cooling'\n"); + goto err_unregister; + } result = sysfs_create_link(&cdev->device.kobj, &pdev->dev.kobj, "device"); if (result) { dev_err(&pdev->dev, "Failed to create sysfs link 'device'\n"); - goto err_end; + goto err_remove_link; } return 0; +err_remove_link: + sysfs_remove_link(&pdev->dev.kobj, "thermal_cooling"); +err_unregister: + thermal_cooling_device_unregister(cdev); err_end: if (fan->acpi4) acpi_fan_delete_attributes(device); --- linux-xilinx-6.8.0.orig/drivers/acpi/internal.h +++ linux-xilinx-6.8.0/drivers/acpi/internal.h @@ -184,7 +184,6 @@ struct acpi_ec { acpi_handle handle; - acpi_handle address_space_handler_holder; int gpe; int irq; unsigned long command_addr; @@ -222,6 +221,7 @@ acpi_handle handle, acpi_ec_query_func func, void *data); void acpi_ec_remove_query_handler(struct acpi_ec *ec, u8 query_bit); +void acpi_ec_register_opregions(struct acpi_device *adev); #ifdef CONFIG_PM_SLEEP void acpi_ec_flush_work(void); @@ -301,5 +301,10 @@ void acpi_mipi_scan_crs_csi2(void); void acpi_mipi_init_crs_csi2_swnodes(void); void acpi_mipi_crs_csi2_cleanup(void); +#ifdef CONFIG_X86 +bool acpi_graph_ignore_port(acpi_handle handle); +#else +static inline bool acpi_graph_ignore_port(acpi_handle handle) { return false; } +#endif #endif /* _ACPI_INTERNAL_H_ */ --- linux-xilinx-6.8.0.orig/drivers/acpi/mipi-disco-img.c +++ linux-xilinx-6.8.0/drivers/acpi/mipi-disco-img.c @@ -19,6 +19,7 @@ */ #include +#include #include #include #include @@ -723,3 +724,83 @@ list_for_each_entry_safe(csi2, csi2_tmp, &acpi_mipi_crs_csi2_list, entry) acpi_mipi_del_crs_csi2(csi2); } + +#ifdef CONFIG_X86 +#include +#include + +/* CPU matches for Dell generations with broken ACPI MIPI DISCO info */ +static const struct x86_cpu_id dell_broken_mipi_disco_cpu_gens[] = { + X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, NULL), + X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, NULL), + X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, NULL), + X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, NULL), + X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, NULL), + X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, NULL), + X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, NULL), + {} +}; + +static const char *strnext(const char *s1, const char *s2) +{ + s1 = strstr(s1, s2); + + if (!s1) + return NULL; + + return s1 + strlen(s2); +} + +/** + * acpi_graph_ignore_port - Tell whether a port node should be ignored + * @handle: The ACPI handle of the node (which may be a port node) + * + * Return: true if a port node should be ignored and the data to that should + * come from other sources instead (Windows ACPI definitions and + * ipu-bridge). This is currently used to ignore bad port nodes related to IPU6 + * ("IPU?") and camera sensor devices ("LNK?") in certain Dell systems with + * Intel VSC. + */ +bool acpi_graph_ignore_port(acpi_handle handle) +{ + const char *path = NULL, *orig_path; + static bool dmi_tested, ignore_port; + + if (!dmi_tested) { + if (dmi_name_in_vendors("Dell Inc.") && + x86_match_cpu(dell_broken_mipi_disco_cpu_gens)) + ignore_port = true; + + dmi_tested = true; + } + + if (!ignore_port) + return false; + + /* Check if the device is either "IPU" or "LNK" (sensor). */ + orig_path = acpi_handle_path(handle); + if (!orig_path) + return false; + path = strnext(orig_path, "IPU"); + if (!path) + path = strnext(orig_path, "LNK"); + if (!path) + goto out_free; + + if (!(isdigit(path[0]) && path[1] == '.')) + goto out_free; + + /* Check if the node has a "PRT" prefix. */ + path = strnext(path, "PRT"); + if (path && isdigit(path[0]) && !path[1]) { + acpi_handle_debug(handle, "ignoring data node\n"); + + kfree(orig_path); + return true; + } + +out_free: + kfree(orig_path); + return false; +} +#endif --- linux-xilinx-6.8.0.orig/drivers/acpi/nfit/core.c +++ linux-xilinx-6.8.0/drivers/acpi/nfit/core.c @@ -454,8 +454,13 @@ if (cmd_rc) *cmd_rc = -EINVAL; - if (cmd == ND_CMD_CALL) + if (cmd == ND_CMD_CALL) { + if (!buf || buf_len < sizeof(*call_pkg)) + return -EINVAL; + call_pkg = buf; + } + func = cmd_to_func(nfit_mem, cmd, call_pkg, &family); if (func < 0) return func; --- linux-xilinx-6.8.0.orig/drivers/acpi/numa/hmat.c +++ linux-xilinx-6.8.0/drivers/acpi/numa/hmat.c @@ -59,9 +59,8 @@ }; enum { - NODE_ACCESS_CLASS_0 = 0, - NODE_ACCESS_CLASS_1, - NODE_ACCESS_CLASS_GENPORT_SINK, + NODE_ACCESS_CLASS_GENPORT_SINK_LOCAL = ACCESS_COORDINATE_MAX, + NODE_ACCESS_CLASS_GENPORT_SINK_CPU, NODE_ACCESS_CLASS_MAX, }; @@ -127,7 +126,8 @@ /** * acpi_get_genport_coordinates - Retrieve the access coordinates for a generic port * @uid: ACPI unique id - * @coord: The access coordinates written back out for the generic port + * @coord: The access coordinates written back out for the generic port. + * Expect 2 levels array. * * Return: 0 on success. Errno on failure. * @@ -143,7 +143,10 @@ if (!target) return -ENOENT; - *coord = target->coord[NODE_ACCESS_CLASS_GENPORT_SINK]; + coord[ACCESS_COORDINATE_LOCAL] = + target->coord[NODE_ACCESS_CLASS_GENPORT_SINK_LOCAL]; + coord[ACCESS_COORDINATE_CPU] = + target->coord[NODE_ACCESS_CLASS_GENPORT_SINK_CPU]; return 0; } @@ -374,11 +377,11 @@ if (target && target->processor_pxm == init_pxm) { hmat_update_target_access(target, type, value, - NODE_ACCESS_CLASS_0); + ACCESS_COORDINATE_LOCAL); /* If the node has a CPU, update access 1 */ if (node_state(pxm_to_node(init_pxm), N_CPU)) hmat_update_target_access(target, type, value, - NODE_ACCESS_CLASS_1); + ACCESS_COORDINATE_CPU); } } @@ -697,7 +700,8 @@ int i; /* Don't update for generic port if there's no device handle */ - if (access == NODE_ACCESS_CLASS_GENPORT_SINK && + if ((access == NODE_ACCESS_CLASS_GENPORT_SINK_LOCAL || + access == NODE_ACCESS_CLASS_GENPORT_SINK_CPU) && !(*(u16 *)target->gen_port_device_handle)) return; @@ -709,7 +713,8 @@ */ if (target->processor_pxm != PXM_INVAL) { cpu_nid = pxm_to_node(target->processor_pxm); - if (access == 0 || node_state(cpu_nid, N_CPU)) { + if (access == ACCESS_COORDINATE_LOCAL || + node_state(cpu_nid, N_CPU)) { set_bit(target->processor_pxm, p_nodes); return; } @@ -737,7 +742,9 @@ list_for_each_entry(initiator, &initiators, node) { u32 value; - if (access == 1 && !initiator->has_cpu) { + if ((access == ACCESS_COORDINATE_CPU || + access == NODE_ACCESS_CLASS_GENPORT_SINK_CPU) && + !initiator->has_cpu) { clear_bit(initiator->processor_pxm, p_nodes); continue; } @@ -770,20 +777,24 @@ } } -static void hmat_register_generic_target_initiators(struct memory_target *target) +static void hmat_update_generic_target(struct memory_target *target) { static DECLARE_BITMAP(p_nodes, MAX_NUMNODES); - __hmat_register_target_initiators(target, p_nodes, - NODE_ACCESS_CLASS_GENPORT_SINK); + hmat_update_target_attrs(target, p_nodes, + NODE_ACCESS_CLASS_GENPORT_SINK_LOCAL); + hmat_update_target_attrs(target, p_nodes, + NODE_ACCESS_CLASS_GENPORT_SINK_CPU); } static void hmat_register_target_initiators(struct memory_target *target) { static DECLARE_BITMAP(p_nodes, MAX_NUMNODES); - __hmat_register_target_initiators(target, p_nodes, 0); - __hmat_register_target_initiators(target, p_nodes, 1); + __hmat_register_target_initiators(target, p_nodes, + ACCESS_COORDINATE_LOCAL); + __hmat_register_target_initiators(target, p_nodes, + ACCESS_COORDINATE_CPU); } static void hmat_register_target_cache(struct memory_target *target) @@ -835,7 +846,7 @@ */ mutex_lock(&target_lock); if (*(u16 *)target->gen_port_device_handle) { - hmat_register_generic_target_initiators(target); + hmat_update_generic_target(target); target->registered = true; } mutex_unlock(&target_lock); @@ -854,8 +865,8 @@ if (!target->registered) { hmat_register_target_initiators(target); hmat_register_target_cache(target); - hmat_register_target_perf(target, NODE_ACCESS_CLASS_0); - hmat_register_target_perf(target, NODE_ACCESS_CLASS_1); + hmat_register_target_perf(target, ACCESS_COORDINATE_LOCAL); + hmat_register_target_perf(target, ACCESS_COORDINATE_CPU); target->registered = true; } mutex_unlock(&target_lock); @@ -927,7 +938,7 @@ return NOTIFY_OK; mutex_lock(&target_lock); - hmat_update_target_attrs(target, p_nodes, 1); + hmat_update_target_attrs(target, p_nodes, ACCESS_COORDINATE_CPU); mutex_unlock(&target_lock); perf = &target->coord[1]; --- linux-xilinx-6.8.0.orig/drivers/acpi/numa/srat.c +++ linux-xilinx-6.8.0/drivers/acpi/numa/srat.c @@ -206,6 +206,11 @@ return acpi_numa < 0; } +__weak int __init numa_fill_memblks(u64 start, u64 end) +{ + return NUMA_NO_MEMBLK; +} + #if defined(CONFIG_X86) || defined(CONFIG_ARM64) || defined(CONFIG_LOONGARCH) /* * Callback for SLIT parsing. pxm_to_node() returns NUMA_NO_NODE for --- linux-xilinx-6.8.0.orig/drivers/acpi/osi.c +++ linux-xilinx-6.8.0/drivers/acpi/osi.c @@ -444,6 +444,77 @@ }, /* + * The following Lenovo models have a broken workaround in the + * acpi_video backlight implementation to meet the Windows 8 + * requirement of 101 backlight levels. Reverting to pre-Win8 + * behavior fixes the problem. + */ + { + .callback = dmi_disable_osi_win8, + .ident = "Lenovo ThinkPad L430", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), + DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad L430"), + }, + }, + { + .callback = dmi_disable_osi_win8, + .ident = "Lenovo ThinkPad T430", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), + DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad T430"), + }, + }, + { + .callback = dmi_disable_osi_win8, + .ident = "Lenovo ThinkPad T430s", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), + DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad T430s"), + }, + }, + { + .callback = dmi_disable_osi_win8, + .ident = "Lenovo ThinkPad T530", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), + DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad T530"), + }, + }, + { + .callback = dmi_disable_osi_win8, + .ident = "Lenovo ThinkPad W530", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), + DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad W530"), + }, + }, + { + .callback = dmi_disable_osi_win8, + .ident = "Lenovo ThinkPad X1 Carbon", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), + DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad X1 Carbon"), + }, + }, + { + .callback = dmi_disable_osi_win8, + .ident = "Lenovo ThinkPad X230", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), + DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad X230"), + }, + }, + { + .callback = dmi_disable_osi_win8, + .ident = "Lenovo ThinkPad Edge E330", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), + DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad Edge E330"), + }, + }, + + /* * BIOS invocation of _OSI(Linux) is almost always a BIOS bug. * Linux ignores it, except for the machines enumerated below. */ --- linux-xilinx-6.8.0.orig/drivers/acpi/pmic/tps68470_pmic.c +++ linux-xilinx-6.8.0/drivers/acpi/pmic/tps68470_pmic.c @@ -376,10 +376,8 @@ struct tps68470_pmic_opregion *opregion; acpi_status status; - if (!dev || !tps68470_regmap) { - dev_warn(dev, "dev or regmap is NULL\n"); - return -EINVAL; - } + if (!tps68470_regmap) + return dev_err_probe(dev, -EINVAL, "regmap is missing\n"); if (!handle) { dev_warn(dev, "acpi handle is NULL\n"); --- linux-xilinx-6.8.0.orig/drivers/acpi/prmt.c +++ linux-xilinx-6.8.0/drivers/acpi/prmt.c @@ -52,7 +52,7 @@ static LIST_HEAD(prm_module_list); struct prm_handler_info { - guid_t guid; + efi_guid_t guid; efi_status_t (__efiapi *handler_addr)(u64, void *); u64 static_data_buffer_addr; u64 acpi_param_buffer_addr; @@ -72,17 +72,21 @@ struct prm_handler_info handlers[] __counted_by(handler_count); }; -static u64 efi_pa_va_lookup(u64 pa) +static u64 efi_pa_va_lookup(efi_guid_t *guid, u64 pa) { efi_memory_desc_t *md; u64 pa_offset = pa & ~PAGE_MASK; u64 page = pa & PAGE_MASK; for_each_efi_memory_desc(md) { - if (md->phys_addr < pa && pa < md->phys_addr + PAGE_SIZE * md->num_pages) + if ((md->attribute & EFI_MEMORY_RUNTIME) && + (md->phys_addr < pa && pa < md->phys_addr + PAGE_SIZE * md->num_pages)) { return pa_offset + md->virt_addr + page - md->phys_addr; + } } + pr_warn("Failed to find VA for GUID: %pUL, PA: 0x%llx", guid, pa); + return 0; } @@ -148,9 +152,15 @@ th = &tm->handlers[cur_handler]; guid_copy(&th->guid, (guid_t *)handler_info->handler_guid); - th->handler_addr = (void *)efi_pa_va_lookup(handler_info->handler_address); - th->static_data_buffer_addr = efi_pa_va_lookup(handler_info->static_data_buffer_address); - th->acpi_param_buffer_addr = efi_pa_va_lookup(handler_info->acpi_param_buffer_address); + th->handler_addr = + (void *)efi_pa_va_lookup(&th->guid, handler_info->handler_address); + + th->static_data_buffer_addr = + efi_pa_va_lookup(&th->guid, handler_info->static_data_buffer_address); + + th->acpi_param_buffer_addr = + efi_pa_va_lookup(&th->guid, handler_info->acpi_param_buffer_address); + } while (++cur_handler < tm->handler_count && (handler_info = get_next_handler(handler_info))); return 0; @@ -253,6 +263,11 @@ if (!handler || !module) goto invalid_guid; + if (!handler->handler_addr) { + buffer->prm_status = PRM_HANDLER_ERROR; + return AE_OK; + } + ACPI_COPY_NAMESEG(context.signature, "PRMC"); context.revision = 0x0; context.reserved = 0x0; --- linux-xilinx-6.8.0.orig/drivers/acpi/processor_idle.c +++ linux-xilinx-6.8.0/drivers/acpi/processor_idle.c @@ -16,7 +16,6 @@ #include #include #include /* need_resched() */ -#include #include #include #include @@ -386,25 +385,24 @@ acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1); } -static int acpi_cst_latency_cmp(const void *a, const void *b) +static void acpi_cst_latency_sort(struct acpi_processor_cx *states, size_t length) { - const struct acpi_processor_cx *x = a, *y = b; + int i, j, k; - if (!(x->valid && y->valid)) - return 0; - if (x->latency > y->latency) - return 1; - if (x->latency < y->latency) - return -1; - return 0; -} -static void acpi_cst_latency_swap(void *a, void *b, int n) -{ - struct acpi_processor_cx *x = a, *y = b; + for (i = 1; i < length; i++) { + if (!states[i].valid) + continue; - if (!(x->valid && y->valid)) - return; - swap(x->latency, y->latency); + for (j = i - 1, k = i; j >= 0; j--) { + if (!states[j].valid) + continue; + + if (states[j].latency > states[k].latency) + swap(states[j].latency, states[k].latency); + + k = j; + } + } } static int acpi_processor_power_verify(struct acpi_processor *pr) @@ -449,10 +447,7 @@ if (buggy_latency) { pr_notice("FW issue: working around C-state latencies out of order\n"); - sort(&pr->power.states[1], max_cstate, - sizeof(struct acpi_processor_cx), - acpi_cst_latency_cmp, - acpi_cst_latency_swap); + acpi_cst_latency_sort(&pr->power.states[1], max_cstate); } lapic_timer_propagate_broadcast(pr); @@ -1430,6 +1425,8 @@ acpi_processor_registered--; if (acpi_processor_registered == 0) cpuidle_unregister_driver(&acpi_idle_driver); + + kfree(dev); } pr->flags.power_setup_done = 0; --- linux-xilinx-6.8.0.orig/drivers/acpi/property.c +++ linux-xilinx-6.8.0/drivers/acpi/property.c @@ -80,6 +80,9 @@ struct acpi_data_node *dn; bool result; + if (acpi_graph_ignore_port(handle)) + return false; + dn = kzalloc(sizeof(*dn), GFP_KERNEL); if (!dn) return false; @@ -1179,8 +1182,6 @@ } break; } - if (nval == 0) - return -EINVAL; if (obj->type == ACPI_TYPE_BUFFER) { if (proptype != DEV_PROP_U8) @@ -1204,9 +1205,11 @@ ret = acpi_copy_property_array_uint(items, (u64 *)val, nval); break; case DEV_PROP_STRING: - ret = acpi_copy_property_array_string( - items, (char **)val, - min_t(u32, nval, obj->package.count)); + nval = min_t(u32, nval, obj->package.count); + if (nval == 0) + return -ENODATA; + + ret = acpi_copy_property_array_string(items, (char **)val, nval); break; default: ret = -EINVAL; --- linux-xilinx-6.8.0.orig/drivers/acpi/resource.c +++ linux-xilinx-6.8.0/drivers/acpi/resource.c @@ -250,6 +250,9 @@ switch (addr->resource_type) { case ACPI_MEMORY_RANGE: acpi_dev_memresource_flags(res, len, wp); + + if (addr->info.mem.caching == ACPI_PREFETCHABLE_MEMORY) + res->flags |= IORESOURCE_PREFETCH; break; case ACPI_IO_RANGE: acpi_dev_ioresource_flags(res, len, iodec, @@ -265,9 +268,6 @@ if (addr->producer_consumer == ACPI_PRODUCER) res->flags |= IORESOURCE_WINDOW; - if (addr->info.mem.caching == ACPI_PREFETCHABLE_MEMORY) - res->flags |= IORESOURCE_PREFETCH; - return !(res->flags & IORESOURCE_DISABLED); } @@ -441,6 +441,20 @@ }, }, { + /* Asus Vivobook X1504VAP */ + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), + DMI_MATCH(DMI_BOARD_NAME, "X1504VAP"), + }, + }, + { + /* Asus Vivobook X1704VAP */ + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), + DMI_MATCH(DMI_BOARD_NAME, "X1704VAP"), + }, + }, + { /* Asus ExpertBook B1402CBA */ .matches = { DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), @@ -469,38 +483,38 @@ }, }, { - /* Asus ExpertBook B2402CBA */ + /* Asus ExpertBook B2402 (B2402CBA / B2402FBA / B2402CVA / B2402FVA) */ .matches = { DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), - DMI_MATCH(DMI_BOARD_NAME, "B2402CBA"), + DMI_MATCH(DMI_BOARD_NAME, "B2402"), }, }, { - /* Asus ExpertBook B2402FBA */ + /* Asus ExpertBook B2502 (B2502CBA / B2502FBA / B2502CVA / B2502FVA) */ .matches = { DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), - DMI_MATCH(DMI_BOARD_NAME, "B2402FBA"), + DMI_MATCH(DMI_BOARD_NAME, "B2502"), }, }, { - /* Asus ExpertBook B2502 */ + /* Asus Vivobook Go E1404GA* */ .matches = { DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), - DMI_MATCH(DMI_BOARD_NAME, "B2502CBA"), + DMI_MATCH(DMI_BOARD_NAME, "E1404GA"), }, }, { - /* Asus Vivobook E1504GA */ + /* Asus Vivobook E1504GA* */ .matches = { DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), DMI_MATCH(DMI_BOARD_NAME, "E1504GA"), }, }, { - /* Asus Vivobook E1504GAB */ + /* Asus Vivobook Pro N6506M* */ .matches = { DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), - DMI_MATCH(DMI_BOARD_NAME, "E1504GAB"), + DMI_MATCH(DMI_BOARD_NAME, "N6506M"), }, }, { @@ -510,6 +524,25 @@ DMI_MATCH(DMI_BOARD_NAME, "17U70P"), }, }, + { + /* TongFang GXxHRXx/TUXEDO InfinityBook Pro Gen9 AMD */ + .matches = { + DMI_MATCH(DMI_BOARD_NAME, "GXxHRXx"), + }, + }, + { + /* TongFang GMxHGxx/TUXEDO Stellaris Slim Gen1 AMD */ + .matches = { + DMI_MATCH(DMI_BOARD_NAME, "GMxHGxx"), + }, + }, + { + /* LG Electronics 16T90SP */ + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "LG Electronics"), + DMI_MATCH(DMI_BOARD_NAME, "16T90SP"), + }, + }, { } }; @@ -520,6 +553,18 @@ */ static const struct dmi_system_id irq1_edge_low_force_override[] = { { + /* MECHREV Jiaolong17KS Series GM7XG0M */ + .matches = { + DMI_MATCH(DMI_BOARD_NAME, "GM7XG0M"), + }, + }, + { + /* XMG APEX 17 (M23) */ + .matches = { + DMI_MATCH(DMI_BOARD_NAME, "GMxBGxx"), + }, + }, + { /* TongFang GMxRGxx/XMG CORE 15 (M22)/TUXEDO Stellaris 15 Gen4 AMD */ .matches = { DMI_MATCH(DMI_BOARD_NAME, "GMxRGxx"), @@ -532,6 +577,12 @@ }, }, { + /* TongFang GMxXGxX/TUXEDO Polaris 15 Gen5 AMD */ + .matches = { + DMI_MATCH(DMI_BOARD_NAME, "GMxXGxX"), + }, + }, + { /* TongFang GMxXGxx sold as Eluktronics Inc. RP-15 */ .matches = { DMI_MATCH(DMI_SYS_VENDOR, "Eluktronics Inc."), @@ -588,6 +639,57 @@ DMI_MATCH(DMI_BOARD_NAME, "GM5RGEE0016COM"), }, }, + { + /* Lunnen Ground 15 / AMD Ryzen 5 5500U */ + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Lunnen"), + DMI_MATCH(DMI_BOARD_NAME, "LLL5DAW"), + }, + }, + { + /* Lunnen Ground 16 / AMD Ryzen 7 5800U */ + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Lunnen"), + DMI_MATCH(DMI_BOARD_NAME, "LL6FA"), + }, + }, + { + /* MAIBENBEN X577 */ + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "MAIBENBEN"), + DMI_MATCH(DMI_BOARD_NAME, "X577"), + }, + }, + { + /* Maibenben X565 */ + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "MAIBENBEN"), + DMI_MATCH(DMI_BOARD_NAME, "X565"), + }, + }, + { + /* TongFang GXxHRXx/TUXEDO InfinityBook Pro Gen9 AMD */ + .matches = { + DMI_MATCH(DMI_BOARD_NAME, "GXxHRXx"), + }, + }, + { + /* TongFang GMxHGxx/TUXEDO Stellaris Slim Gen1 AMD */ + .matches = { + DMI_MATCH(DMI_BOARD_NAME, "GMxHGxx"), + }, + }, + { + /* + * TongFang GM5HG0A in case of the SKIKK Vanaheim relabel the + * board-name is changed, so check OEM strings instead. Note + * OEM string matches are always exact matches. + * https://bugzilla.kernel.org/show_bug.cgi?id=219614 + */ + .matches = { + DMI_EXACT_MATCH(DMI_OEM_STRING, "GM5HG0A"), + }, + }, { } }; @@ -613,11 +715,11 @@ for (i = 0; i < ARRAY_SIZE(override_table); i++) { const struct irq_override_cmp *entry = &override_table[i]; - if (dmi_check_system(entry->system) && - entry->irq == gsi && + if (entry->irq == gsi && entry->triggering == triggering && entry->polarity == polarity && - entry->shareable == shareable) + entry->shareable == shareable && + dmi_check_system(entry->system)) return entry->override; } --- linux-xilinx-6.8.0.orig/drivers/acpi/sbs.c +++ linux-xilinx-6.8.0/drivers/acpi/sbs.c @@ -77,7 +77,6 @@ u16 spec; u8 id; u8 present:1; - u8 have_sysfs_alarm:1; }; #define to_acpi_battery(x) power_supply_get_drvdata(x) @@ -462,12 +461,18 @@ return count; } -static const struct device_attribute alarm_attr = { +static struct device_attribute alarm_attr = { .attr = {.name = "alarm", .mode = 0644}, .show = acpi_battery_alarm_show, .store = acpi_battery_alarm_store, }; +static struct attribute *acpi_battery_attrs[] = { + &alarm_attr.attr, + NULL +}; +ATTRIBUTE_GROUPS(acpi_battery); + /* -------------------------------------------------------------------------- Driver Interface -------------------------------------------------------------------------- */ @@ -518,7 +523,10 @@ static int acpi_battery_add(struct acpi_sbs *sbs, int id) { struct acpi_battery *battery = &sbs->battery[id]; - struct power_supply_config psy_cfg = { .drv_data = battery, }; + struct power_supply_config psy_cfg = { + .drv_data = battery, + .attr_grp = acpi_battery_groups, + }; int result; battery->id = id; @@ -548,10 +556,6 @@ goto end; } - result = device_create_file(&battery->bat->dev, &alarm_attr); - if (result) - goto end; - battery->have_sysfs_alarm = 1; end: pr_info("%s [%s]: Battery Slot [%s] (battery %s)\n", ACPI_SBS_DEVICE_NAME, acpi_device_bid(sbs->device), @@ -563,11 +567,8 @@ { struct acpi_battery *battery = &sbs->battery[id]; - if (battery->bat) { - if (battery->have_sysfs_alarm) - device_remove_file(&battery->bat->dev, &alarm_attr); + if (battery->bat) power_supply_unregister(battery->bat); - } } static int acpi_charger_add(struct acpi_sbs *sbs) @@ -610,7 +611,7 @@ if (sbs->charger_exists) { acpi_ac_get_present(sbs); if (sbs->charger_present != saved_charger_state) - kobject_uevent(&sbs->charger->dev.kobj, KOBJ_CHANGE); + power_supply_changed(sbs->charger); } if (sbs->manager_present) { @@ -622,7 +623,7 @@ acpi_battery_read(bat); if (saved_battery_state == bat->present) continue; - kobject_uevent(&bat->bat->dev.kobj, KOBJ_CHANGE); + power_supply_changed(bat->bat); } } } --- linux-xilinx-6.8.0.orig/drivers/acpi/scan.c +++ linux-xilinx-6.8.0/drivers/acpi/scan.c @@ -314,18 +314,14 @@ * again). */ if (adev->handler) { - dev_warn(&adev->dev, "Already enumerated\n"); - return -EALREADY; + dev_dbg(&adev->dev, "Already enumerated\n"); + return 0; } error = acpi_bus_scan(adev->handle); if (error) { dev_warn(&adev->dev, "Namespace scan failure\n"); return error; } - if (!adev->handler) { - dev_warn(&adev->dev, "Enumeration failure\n"); - error = -ENODEV; - } } else { error = acpi_scan_device_not_enumerated(adev); } @@ -798,6 +794,7 @@ "INTC1059", /* IVSC (TGL) driver must be loaded to allow i2c access to camera sensors */ "INTC1095", /* IVSC (ADL) driver must be loaded to allow i2c access to camera sensors */ "INTC100A", /* IVSC (RPL) driver must be loaded to allow i2c access to camera sensors */ + "INTC10CF", /* IVSC (MTL) driver must be loaded to allow i2c access to camera sensors */ NULL }; @@ -1806,7 +1803,8 @@ if (dep->honor_dep) adev->flags.honor_deps = 1; - adev->dep_unmet++; + if (!dep->met) + adev->dep_unmet++; } } } @@ -2226,6 +2224,8 @@ if (device->handler) goto ok; + acpi_ec_register_opregions(device); + if (!device->flags.initialized) { device->flags.power_manageable = device->power.states[ACPI_STATE_D0].flags.valid; --- linux-xilinx-6.8.0.orig/drivers/acpi/sleep.c +++ linux-xilinx-6.8.0/drivers/acpi/sleep.c @@ -385,18 +385,6 @@ DMI_MATCH(DMI_PRODUCT_NAME, "20GGA00L00"), }, }, - /* - * ASUS B1400CEAE hangs on resume from suspend (see - * https://bugzilla.kernel.org/show_bug.cgi?id=215742). - */ - { - .callback = init_default_s3, - .ident = "ASUS B1400CEAE", - .matches = { - DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), - DMI_MATCH(DMI_PRODUCT_NAME, "ASUS EXPERTBOOK B1400CEAE"), - }, - }, {}, }; --- linux-xilinx-6.8.0.orig/drivers/acpi/thermal.c +++ linux-xilinx-6.8.0/drivers/acpi/thermal.c @@ -167,11 +167,17 @@ static int acpi_thermal_temp(struct acpi_thermal *tz, int temp_deci_k) { + int temp; + if (temp_deci_k == THERMAL_TEMP_INVALID) return THERMAL_TEMP_INVALID; - return deci_kelvin_to_millicelsius_with_offset(temp_deci_k, + temp = deci_kelvin_to_millicelsius_with_offset(temp_deci_k, tz->kelvin_offset); + if (temp <= 0) + return THERMAL_TEMP_INVALID; + + return temp; } static bool acpi_thermal_trip_valid(struct acpi_thermal_trip *acpi_trip) --- linux-xilinx-6.8.0.orig/drivers/acpi/utils.c +++ linux-xilinx-6.8.0/drivers/acpi/utils.c @@ -559,7 +559,7 @@ * * Caller must free the returned buffer */ -static char *acpi_handle_path(acpi_handle handle) +char *acpi_handle_path(acpi_handle handle) { struct acpi_buffer buffer = { .length = ACPI_ALLOCATE_BUFFER, --- linux-xilinx-6.8.0.orig/drivers/acpi/video_detect.c +++ linux-xilinx-6.8.0/drivers/acpi/video_detect.c @@ -252,6 +252,14 @@ DMI_MATCH(DMI_PRODUCT_NAME, "PCG-FRV35"), }, }, + { + .callback = video_detect_force_vendor, + /* Panasonic Toughbook CF-18 */ + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Matsushita Electric Industrial"), + DMI_MATCH(DMI_PRODUCT_NAME, "CF-18"), + }, + }, /* * Toshiba models with Transflective display, these need to use @@ -499,6 +507,14 @@ }, { .callback = video_detect_force_native, + /* Lenovo Slim 7 16ARH7 */ + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), + DMI_MATCH(DMI_PRODUCT_NAME, "82UX"), + }, + }, + { + .callback = video_detect_force_native, /* Lenovo ThinkPad X131e (3371 AMD version) */ .matches = { DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), @@ -532,6 +548,38 @@ }, }, { + .callback = video_detect_force_native, + /* Apple MacBook Air 7,2 */ + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "MacBookAir7,2"), + }, + }, + { + .callback = video_detect_force_native, + /* Apple MacBook Air 9,1 */ + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "MacBookAir9,1"), + }, + }, + { + .callback = video_detect_force_native, + /* Apple MacBook Pro 9,2 */ + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro9,2"), + }, + }, + { + .callback = video_detect_force_native, + /* Apple MacBook Pro 11,2 */ + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro11,2"), + }, + }, + { /* https://bugzilla.redhat.com/show_bug.cgi?id=1217249 */ .callback = video_detect_force_native, /* Apple MacBook Pro 12,1 */ @@ -542,6 +590,14 @@ }, { .callback = video_detect_force_native, + /* Apple MacBook Pro 16,2 */ + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro16,2"), + }, + }, + { + .callback = video_detect_force_native, /* Dell Inspiron N4010 */ .matches = { DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), @@ -894,6 +950,7 @@ static DEFINE_MUTEX(init_mutex); static bool nvidia_wmi_ec_present; static bool apple_gmux_present; + static bool dell_uart_backlight_present; static bool native_available; static bool init_done; static long video_caps; @@ -908,6 +965,7 @@ &video_caps, NULL); nvidia_wmi_ec_present = nvidia_wmi_ec_supported(); apple_gmux_present = apple_gmux_detect(NULL, NULL); + dell_uart_backlight_present = acpi_dev_found("DELL0501"); init_done = true; } if (native) @@ -938,6 +996,9 @@ if (apple_gmux_present) return acpi_backlight_apple_gmux; + if (dell_uart_backlight_present) + return acpi_backlight_vendor; + /* Use ACPI video if available, except when native should be preferred. */ if ((video_caps & ACPI_VIDEO_BACKLIGHT) && !(native_available && prefer_native_over_acpi_video())) --- linux-xilinx-6.8.0.orig/drivers/acpi/x86/s2idle.c +++ linux-xilinx-6.8.0/drivers/acpi/x86/s2idle.c @@ -488,7 +488,19 @@ rev_id = 1; lps0_dsm_func_mask = validate_dsm(adev->handle, ACPI_LPS0_DSM_UUID, rev_id, &lps0_dsm_guid); - lps0_dsm_func_mask_microsoft = -EINVAL; + if (lps0_dsm_func_mask > 0 && lps0_dsm_func_mask_microsoft > 0) { + unsigned int func_mask; + + /* + * Log a message if the _DSM function sets for two + * different UUIDs overlap. + */ + func_mask = lps0_dsm_func_mask & lps0_dsm_func_mask_microsoft; + if (func_mask) + acpi_handle_info(adev->handle, + "Duplicate LPS0 _DSM functions (mask: 0x%x)\n", + func_mask); + } } if (lps0_dsm_func_mask < 0 && lps0_dsm_func_mask_microsoft < 0) @@ -549,19 +561,22 @@ lps0_dsm_func_mask_microsoft, lps0_dsm_guid_microsoft); /* LPS0 entry */ - if (lps0_dsm_func_mask > 0) - acpi_sleep_run_lps0_dsm(acpi_s2idle_vendor_amd() ? - ACPI_LPS0_ENTRY_AMD : - ACPI_LPS0_ENTRY, + if (lps0_dsm_func_mask > 0 && acpi_s2idle_vendor_amd()) + acpi_sleep_run_lps0_dsm(ACPI_LPS0_ENTRY_AMD, lps0_dsm_func_mask, lps0_dsm_guid); + if (lps0_dsm_func_mask_microsoft > 0) { - /* modern standby entry */ + /* Modern Standby entry */ acpi_sleep_run_lps0_dsm(ACPI_LPS0_MS_ENTRY, lps0_dsm_func_mask_microsoft, lps0_dsm_guid_microsoft); acpi_sleep_run_lps0_dsm(ACPI_LPS0_ENTRY, lps0_dsm_func_mask_microsoft, lps0_dsm_guid_microsoft); } + if (lps0_dsm_func_mask > 0 && !acpi_s2idle_vendor_amd()) + acpi_sleep_run_lps0_dsm(ACPI_LPS0_ENTRY, + lps0_dsm_func_mask, lps0_dsm_guid); + list_for_each_entry(handler, &lps0_s2idle_devops_head, list_node) { if (handler->prepare) handler->prepare(); @@ -600,14 +615,14 @@ ACPI_LPS0_EXIT_AMD : ACPI_LPS0_EXIT, lps0_dsm_func_mask, lps0_dsm_guid); - if (lps0_dsm_func_mask_microsoft > 0) + + if (lps0_dsm_func_mask_microsoft > 0) { acpi_sleep_run_lps0_dsm(ACPI_LPS0_EXIT, lps0_dsm_func_mask_microsoft, lps0_dsm_guid_microsoft); - - /* Modern standby exit */ - if (lps0_dsm_func_mask_microsoft > 0) + /* Modern Standby exit */ acpi_sleep_run_lps0_dsm(ACPI_LPS0_MS_EXIT, lps0_dsm_func_mask_microsoft, lps0_dsm_guid_microsoft); + } /* Screen on */ if (lps0_dsm_func_mask_microsoft > 0) --- linux-xilinx-6.8.0.orig/drivers/acpi/x86/utils.c +++ linux-xilinx-6.8.0/drivers/acpi/x86/utils.c @@ -12,6 +12,7 @@ #include #include +#include #include #include #include @@ -197,16 +198,16 @@ } /* - * AMD systems from Renoir and Lucienne *require* that the NVME controller + * AMD systems from Renoir onwards *require* that the NVME controller * is put into D3 over a Modern Standby / suspend-to-idle cycle. * * This is "typically" accomplished using the `StorageD3Enable` * property in the _DSD that is checked via the `acpi_storage_d3` function - * but this property was introduced after many of these systems launched - * and most OEM systems don't have it in their BIOS. + * but some OEM systems still don't have it in their BIOS. * * The Microsoft documentation for StorageD3Enable mentioned that Windows has - * a hardcoded allowlist for D3 support, which was used for these platforms. + * a hardcoded allowlist for D3 support as well as a registry key to override + * the BIOS, which has been used for these cases. * * This allows quirking on Linux in a similar fashion. * @@ -219,19 +220,15 @@ * https://bugzilla.kernel.org/show_bug.cgi?id=216773 * https://bugzilla.kernel.org/show_bug.cgi?id=217003 * 2) On at least one HP system StorageD3Enable is missing on the second NVME - disk in the system. + * disk in the system. + * 3) On at least one HP Rembrandt system StorageD3Enable is missing on the only + * NVME device. */ -static const struct x86_cpu_id storage_d3_cpu_ids[] = { - X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 24, NULL), /* Picasso */ - X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 96, NULL), /* Renoir */ - X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 104, NULL), /* Lucienne */ - X86_MATCH_VENDOR_FAM_MODEL(AMD, 25, 80, NULL), /* Cezanne */ - {} -}; - bool force_storage_d3(void) { - return x86_match_cpu(storage_d3_cpu_ids); + if (!cpu_feature_enabled(X86_FEATURE_ZEN)) + return false; + return acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0; } /* @@ -260,9 +257,10 @@ #define ACPI_QUIRK_SKIP_I2C_CLIENTS BIT(0) #define ACPI_QUIRK_UART1_SKIP BIT(1) #define ACPI_QUIRK_UART1_TTY_UART2_SKIP BIT(2) -#define ACPI_QUIRK_SKIP_ACPI_AC_AND_BATTERY BIT(3) -#define ACPI_QUIRK_USE_ACPI_AC_AND_BATTERY BIT(4) -#define ACPI_QUIRK_SKIP_GPIO_EVENT_HANDLERS BIT(5) +#define ACPI_QUIRK_PNP_UART1_SKIP BIT(3) +#define ACPI_QUIRK_SKIP_ACPI_AC_AND_BATTERY BIT(4) +#define ACPI_QUIRK_USE_ACPI_AC_AND_BATTERY BIT(5) +#define ACPI_QUIRK_SKIP_GPIO_EVENT_HANDLERS BIT(6) static const struct dmi_system_id acpi_quirk_skip_dmi_ids[] = { /* @@ -289,6 +287,7 @@ /* * 2. Devices which also have the skip i2c/serdev quirks and which * need the x86-android-tablets module to properly work. + * Sorted alphabetically. */ #if IS_ENABLED(CONFIG_X86_ANDROID_TABLETS) { @@ -302,6 +301,19 @@ ACPI_QUIRK_SKIP_GPIO_EVENT_HANDLERS), }, { + /* Acer Iconia One 8 A1-840 (non FHD version) */ + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Insyde"), + DMI_MATCH(DMI_PRODUCT_NAME, "BayTrail"), + /* Above strings are too generic also match BIOS date */ + DMI_MATCH(DMI_BIOS_DATE, "04/01/2014"), + }, + .driver_data = (void *)(ACPI_QUIRK_SKIP_I2C_CLIENTS | + ACPI_QUIRK_SKIP_ACPI_AC_AND_BATTERY | + ACPI_QUIRK_SKIP_GPIO_EVENT_HANDLERS), + }, + { + /* Asus ME176C tablet */ .matches = { DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "ME176C"), @@ -312,23 +324,24 @@ ACPI_QUIRK_SKIP_GPIO_EVENT_HANDLERS), }, { - /* Lenovo Yoga Book X90F/L */ + /* Asus TF103C transformer 2-in-1 */ .matches = { - DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Intel Corporation"), - DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "CHERRYVIEW D1 PLATFORM"), - DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "YETI-11"), + DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), + DMI_MATCH(DMI_PRODUCT_NAME, "TF103C"), }, .driver_data = (void *)(ACPI_QUIRK_SKIP_I2C_CLIENTS | - ACPI_QUIRK_UART1_SKIP | ACPI_QUIRK_SKIP_ACPI_AC_AND_BATTERY | ACPI_QUIRK_SKIP_GPIO_EVENT_HANDLERS), }, { + /* Lenovo Yoga Book X90F/L */ .matches = { - DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), - DMI_MATCH(DMI_PRODUCT_NAME, "TF103C"), + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Intel Corporation"), + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "CHERRYVIEW D1 PLATFORM"), + DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "YETI-11"), }, .driver_data = (void *)(ACPI_QUIRK_SKIP_I2C_CLIENTS | + ACPI_QUIRK_UART1_SKIP | ACPI_QUIRK_SKIP_ACPI_AC_AND_BATTERY | ACPI_QUIRK_SKIP_GPIO_EVENT_HANDLERS), }, @@ -342,6 +355,7 @@ DMI_MATCH(DMI_BIOS_VERSION, "BLADE_21"), }, .driver_data = (void *)(ACPI_QUIRK_SKIP_I2C_CLIENTS | + ACPI_QUIRK_PNP_UART1_SKIP | ACPI_QUIRK_SKIP_ACPI_AC_AND_BATTERY), }, { @@ -386,6 +400,32 @@ ACPI_QUIRK_SKIP_ACPI_AC_AND_BATTERY), }, { + /* Vexia Edu Atla 10 tablet 5V version */ + .matches = { + /* Having all 3 of these not set is somewhat unique */ + DMI_MATCH(DMI_SYS_VENDOR, "To be filled by O.E.M."), + DMI_MATCH(DMI_PRODUCT_NAME, "To be filled by O.E.M."), + DMI_MATCH(DMI_BOARD_NAME, "To be filled by O.E.M."), + /* Above strings are too generic, also match on BIOS date */ + DMI_MATCH(DMI_BIOS_DATE, "05/14/2015"), + }, + .driver_data = (void *)(ACPI_QUIRK_SKIP_I2C_CLIENTS | + ACPI_QUIRK_SKIP_ACPI_AC_AND_BATTERY), + }, + { + /* Vexia Edu Atla 10 tablet 9V version */ + .matches = { + DMI_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"), + DMI_MATCH(DMI_BOARD_NAME, "Aptio CRB"), + /* Above strings are too generic, also match on BIOS date */ + DMI_MATCH(DMI_BIOS_DATE, "08/25/2014"), + }, + .driver_data = (void *)(ACPI_QUIRK_SKIP_I2C_CLIENTS | + ACPI_QUIRK_UART1_SKIP | + ACPI_QUIRK_SKIP_ACPI_AC_AND_BATTERY | + ACPI_QUIRK_SKIP_GPIO_EVENT_HANDLERS), + }, + { /* Whitelabel (sold as various brands) TM800A550L */ .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"), @@ -405,6 +445,7 @@ { "10EC5640", 0 }, /* RealTek ALC5640 audio codec */ { "10EC5651", 0 }, /* RealTek ALC5651 audio codec */ { "INT33F4", 0 }, /* X-Powers AXP288 PMIC */ + { "INT33F5", 0 }, /* TI Dollar Cove PMIC */ { "INT33FD", 0 }, /* Intel Crystal Cove PMIC */ { "INT34D3", 0 }, /* Intel Whiskey Cove PMIC */ { "NPCE69A", 0 }, /* Asus Transformer keyboard dock */ @@ -428,27 +469,46 @@ } EXPORT_SYMBOL_GPL(acpi_quirk_skip_i2c_client_enumeration); -int acpi_quirk_skip_serdev_enumeration(struct device *controller_parent, bool *skip) +static int acpi_dmi_skip_serdev_enumeration(struct device *controller_parent, bool *skip) { struct acpi_device *adev = ACPI_COMPANION(controller_parent); const struct dmi_system_id *dmi_id; long quirks = 0; - u64 uid; - int ret; + u64 uid = 0; - *skip = false; - - ret = acpi_dev_uid_to_integer(adev, &uid); - if (ret) + dmi_id = dmi_first_match(acpi_quirk_skip_dmi_ids); + if (!dmi_id) return 0; - /* to not match on PNP enumerated debug UARTs */ - if (!dev_is_platform(controller_parent)) + quirks = (unsigned long)dmi_id->driver_data; + + /* uid is left at 0 on errors and 0 is not a valid UART UID */ + acpi_dev_uid_to_integer(adev, &uid); + + /* For PCI UARTs without an UID */ + if (!uid && dev_is_pci(controller_parent)) { + struct pci_dev *pdev = to_pci_dev(controller_parent); + + /* + * Devfn values for PCI UARTs on Bay Trail SoCs, which are + * the only devices where this fallback is necessary. + */ + if (pdev->devfn == PCI_DEVFN(0x1e, 3)) + uid = 1; + else if (pdev->devfn == PCI_DEVFN(0x1e, 4)) + uid = 2; + } + + if (!uid) return 0; - dmi_id = dmi_first_match(acpi_quirk_skip_dmi_ids); - if (dmi_id) - quirks = (unsigned long)dmi_id->driver_data; + if (!dev_is_platform(controller_parent) && !dev_is_pci(controller_parent)) { + /* PNP enumerated UARTs */ + if ((quirks & ACPI_QUIRK_PNP_UART1_SKIP) && uid == 1) + *skip = true; + + return 0; + } if ((quirks & ACPI_QUIRK_UART1_SKIP) && uid == 1) *skip = true; @@ -463,7 +523,6 @@ return 0; } -EXPORT_SYMBOL_GPL(acpi_quirk_skip_serdev_enumeration); bool acpi_quirk_skip_gpio_event_handlers(void) { @@ -478,8 +537,41 @@ return (quirks & ACPI_QUIRK_SKIP_GPIO_EVENT_HANDLERS); } EXPORT_SYMBOL_GPL(acpi_quirk_skip_gpio_event_handlers); +#else +static int acpi_dmi_skip_serdev_enumeration(struct device *controller_parent, bool *skip) +{ + return 0; +} #endif +int acpi_quirk_skip_serdev_enumeration(struct device *controller_parent, bool *skip) +{ + struct acpi_device *adev = ACPI_COMPANION(controller_parent); + + *skip = false; + + /* + * The DELL0501 ACPI HID represents an UART (CID is set to PNP0501) with + * a backlight-controller attached. There is no separate ACPI device with + * an UartSerialBusV2() resource to model the backlight-controller. + * Set skip to true so that the tty core creates a serdev ctrl device. + * The backlight driver will manually create the serdev client device. + */ + if (adev && acpi_dev_hid_match(adev, "DELL0501")) { + *skip = true; + /* + * Create a platform dev for dell-uart-backlight to bind to. + * This is a static device, so no need to store the result. + */ + platform_device_register_simple("dell-uart-backlight", PLATFORM_DEVID_NONE, + NULL, 0); + return 0; + } + + return acpi_dmi_skip_serdev_enumeration(controller_parent, skip); +} +EXPORT_SYMBOL_GPL(acpi_quirk_skip_serdev_enumeration); + /* Lists of PMIC ACPI HIDs with an (often better) native charger driver */ static const struct { const char *hid; --- linux-xilinx-6.8.0.orig/drivers/android/Kconfig +++ linux-xilinx-6.8.0/drivers/android/Kconfig @@ -2,7 +2,7 @@ menu "Android" config ANDROID_BINDER_IPC - bool "Android Binder IPC Driver" + tristate "Android Binder IPC Driver" depends on MMU default n help @@ -14,8 +14,8 @@ between said processes. config ANDROID_BINDERFS - bool "Android Binderfs filesystem" - depends on ANDROID_BINDER_IPC + tristate "Android Binderfs filesystem" + depends on (ANDROID_BINDER_IPC=y) || (ANDROID_BINDER_IPC=m && m) default n help Binderfs is a pseudo-filesystem for the Android Binder IPC driver --- linux-xilinx-6.8.0.orig/drivers/android/Makefile +++ linux-xilinx-6.8.0/drivers/android/Makefile @@ -1,6 +1,10 @@ # SPDX-License-Identifier: GPL-2.0-only ccflags-y += -I$(src) # needed for trace events -obj-$(CONFIG_ANDROID_BINDERFS) += binderfs.o -obj-$(CONFIG_ANDROID_BINDER_IPC) += binder.o binder_alloc.o -obj-$(CONFIG_ANDROID_BINDER_IPC_SELFTEST) += binder_alloc_selftest.o +binder_linux-y := binder.o binder_alloc.o +obj-$(CONFIG_ANDROID_BINDER_IPC) += binder_linux.o +binder_linux-$(CONFIG_ANDROID_BINDERFS) += binderfs.o +binder_linux-$(CONFIG_ANDROID_BINDER_IPC_SELFTEST) += binder_alloc_selftest.o + +# binder-$(CONFIG_ANDROID_BINDER_IPC) := binder.o binder_alloc.o +# binder-$(CONFIG_ANDROID_BINDERFS) += binderfs.o --- linux-xilinx-6.8.0.orig/drivers/android/binder.c +++ linux-xilinx-6.8.0/drivers/android/binder.c @@ -570,9 +570,7 @@ static bool binder_available_for_proc_work_ilocked(struct binder_thread *thread) { return !thread->transaction_stack && - binder_worklist_empty_ilocked(&thread->todo) && - (thread->looper & (BINDER_LOOPER_STATE_ENTERED | - BINDER_LOOPER_STATE_REGISTERED)); + binder_worklist_empty_ilocked(&thread->todo); } static void binder_wakeup_poll_threads_ilocked(struct binder_proc *proc, @@ -1708,8 +1706,10 @@ size_t object_size = 0; read_size = min_t(size_t, sizeof(*object), buffer->data_size - offset); - if (offset > buffer->data_size || read_size < sizeof(*hdr)) + if (offset > buffer->data_size || read_size < sizeof(*hdr) || + !IS_ALIGNED(offset, sizeof(u32))) return 0; + if (u) { if (copy_from_user(object, u + offset, read_size)) return 0; @@ -2930,8 +2930,7 @@ struct binder_context *context = proc->context; int t_debug_id = atomic_inc_return(&binder_last_id); ktime_t t_start_time = ktime_get(); - char *secctx = NULL; - u32 secctx_sz = 0; + struct lsmcontext lsmctx; struct list_head sgc_head; struct list_head pf_head; const void __user *user_buffer = (const void __user *) @@ -3210,8 +3209,8 @@ size_t added_size; security_cred_getsecid(proc->cred, &secid); - ret = security_secid_to_secctx(secid, &secctx, &secctx_sz); - if (ret) { + ret = security_secid_to_secctx(secid, &lsmctx); + if (ret < 0) { binder_txn_error("%d:%d failed to get security context\n", thread->pid, proc->pid); return_error = BR_FAILED_REPLY; @@ -3219,7 +3218,7 @@ return_error_line = __LINE__; goto err_get_secctx_failed; } - added_size = ALIGN(secctx_sz, sizeof(u64)); + added_size = ALIGN(lsmctx.len, sizeof(u64)); extra_buffers_size += added_size; if (extra_buffers_size < added_size) { binder_txn_error("%d:%d integer overflow of extra_buffers_size\n", @@ -3253,23 +3252,23 @@ t->buffer = NULL; goto err_binder_alloc_buf_failed; } - if (secctx) { + if (lsmctx.context) { int err; size_t buf_offset = ALIGN(tr->data_size, sizeof(void *)) + ALIGN(tr->offsets_size, sizeof(void *)) + ALIGN(extra_buffers_size, sizeof(void *)) - - ALIGN(secctx_sz, sizeof(u64)); + ALIGN(lsmctx.len, sizeof(u64)); t->security_ctx = t->buffer->user_data + buf_offset; err = binder_alloc_copy_to_buffer(&target_proc->alloc, t->buffer, buf_offset, - secctx, secctx_sz); + lsmctx.context, lsmctx.len); if (err) { t->security_ctx = 0; WARN_ON(1); } - security_release_secctx(secctx, secctx_sz); - secctx = NULL; + security_release_secctx(&lsmctx); + lsmctx.context = NULL; } t->buffer->debug_id = t->debug_id; t->buffer->transaction = t; @@ -3313,7 +3312,7 @@ off_end_offset = off_start_offset + tr->offsets_size; sg_buf_offset = ALIGN(off_end_offset, sizeof(void *)); sg_buf_end_offset = sg_buf_offset + extra_buffers_size - - ALIGN(secctx_sz, sizeof(u64)); + ALIGN(lsmctx.len, sizeof(u64)); off_min = 0; for (buffer_offset = off_start_offset; buffer_offset < off_end_offset; buffer_offset += sizeof(binder_size_t)) { @@ -3342,6 +3341,7 @@ */ copy_size = object_offset - user_offset; if (copy_size && (user_offset > object_offset || + object_offset > tr->data_size || binder_alloc_copy_user_to_buffer( &target_proc->alloc, t->buffer, user_offset, @@ -3691,8 +3691,8 @@ binder_alloc_free_buf(&target_proc->alloc, t->buffer); err_binder_alloc_buf_failed: err_bad_extra_size: - if (secctx) - security_release_secctx(secctx, secctx_sz); + if (lsmctx.context) + security_release_secctx(&lsmctx); err_get_secctx_failed: kfree(tcomplete); binder_stats_deleted(BINDER_STAT_TRANSACTION_COMPLETE); @@ -5365,7 +5365,7 @@ goto err; break; case BINDER_SET_MAX_THREADS: { - int max_threads; + u32 max_threads; if (copy_from_user(&max_threads, ubuf, sizeof(max_threads))) { @@ -6631,9 +6631,20 @@ return ret; } -device_initcall(binder_init); +module_init(binder_init); +/* + * binder will have no exit function since binderfs instances can be mounted + * multiple times and also in user namespaces finding and destroying them all + * is not feasible without introducing insane locking. Just ignoring existing + * instances on module unload also wouldn't work since we would loose track of + * what major numer was dynamically allocated and also what minor numbers are + * already given out. So this would get us into all kinds of issues with device + * number reuse. So simply don't allow unloading unless we are forced to do so. + */ + +MODULE_AUTHOR("Google, Inc."); +MODULE_DESCRIPTION("Driver for Android binder device"); +MODULE_LICENSE("GPL v2"); #define CREATE_TRACE_POINTS #include "binder_trace.h" - -MODULE_LICENSE("GPL v2"); --- linux-xilinx-6.8.0.orig/drivers/android/binder_alloc.c +++ linux-xilinx-6.8.0/drivers/android/binder_alloc.c @@ -38,8 +38,7 @@ }; static uint32_t binder_alloc_debug_mask = BINDER_DEBUG_USER_ERROR; -module_param_named(debug_mask, binder_alloc_debug_mask, - uint, 0644); +module_param_named(alloc_debug_mask, binder_alloc_debug_mask, uint, 0644); #define binder_alloc_debug(mask, x...) \ do { \ --- linux-xilinx-6.8.0.orig/drivers/android/binder_alloc.h +++ linux-xilinx-6.8.0/drivers/android/binder_alloc.h @@ -6,6 +6,7 @@ #ifndef _LINUX_BINDER_ALLOC_H #define _LINUX_BINDER_ALLOC_H +#include #include #include #include @@ -111,7 +112,7 @@ bool oneway_spam_detected; }; -#ifdef CONFIG_ANDROID_BINDER_IPC_SELFTEST +#if IS_ENABLED(CONFIG_ANDROID_BINDER_IPC_SELFTEST) void binder_selftest_alloc(struct binder_alloc *alloc); #else static inline void binder_selftest_alloc(struct binder_alloc *alloc) {} --- linux-xilinx-6.8.0.orig/drivers/android/binder_internal.h +++ linux-xilinx-6.8.0/drivers/android/binder_internal.h @@ -5,6 +5,7 @@ #include #include +#include #include #include #include @@ -77,7 +78,7 @@ extern char *binder_devices_param; -#ifdef CONFIG_ANDROID_BINDERFS +#if IS_ENABLED(CONFIG_ANDROID_BINDERFS) extern bool is_binderfs_device(const struct inode *inode); extern struct dentry *binderfs_create_file(struct dentry *dir, const char *name, const struct file_operations *fops, @@ -98,7 +99,7 @@ static inline void binderfs_remove_file(struct dentry *dentry) {} #endif -#ifdef CONFIG_ANDROID_BINDERFS +#if IS_ENABLED(CONFIG_ANDROID_BINDERFS) extern int __init init_binderfs(void); #else static inline int __init init_binderfs(void) @@ -421,7 +422,7 @@ struct list_head todo; struct binder_stats stats; struct list_head delivered_death; - int max_threads; + u32 max_threads; int requested_threads; int requested_threads_started; int tmp_ref; --- linux-xilinx-6.8.0.orig/drivers/android/binderfs.c +++ linux-xilinx-6.8.0/drivers/android/binderfs.c @@ -120,7 +120,7 @@ struct super_block *sb = ref_inode->i_sb; struct binderfs_info *info = sb->s_fs_info; #if defined(CONFIG_IPC_NS) - bool use_reserve = (info->ipc_ns == &init_ipc_ns); + bool use_reserve = (info->ipc_ns == show_init_ipc_ns()); #else bool use_reserve = true; #endif @@ -397,7 +397,7 @@ struct dentry *root = sb->s_root; struct binderfs_info *info = sb->s_fs_info; #if defined(CONFIG_IPC_NS) - bool use_reserve = (info->ipc_ns == &init_ipc_ns); + bool use_reserve = (info->ipc_ns == show_init_ipc_ns()); #else bool use_reserve = true; #endif @@ -683,7 +683,7 @@ return -ENOMEM; info = sb->s_fs_info; - info->ipc_ns = get_ipc_ns(current->nsproxy->ipc_ns); + info->ipc_ns = get_ipc_ns_exported(current->nsproxy->ipc_ns); info->root_gid = make_kgid(sb->s_user_ns, 0); if (!gid_valid(info->root_gid)) --- linux-xilinx-6.8.0.orig/drivers/ata/ahci.c +++ linux-xilinx-6.8.0/drivers/ata/ahci.c @@ -431,7 +431,6 @@ { PCI_VDEVICE(INTEL, 0x02d7), board_ahci_low_power }, /* Comet Lake PCH RAID */ /* Elkhart Lake IDs 0x4b60 & 0x4b62 https://sata-io.org/product/8803 not tested yet */ { PCI_VDEVICE(INTEL, 0x4b63), board_ahci_low_power }, /* Elkhart Lake AHCI */ - { PCI_VDEVICE(INTEL, 0x7ae2), board_ahci_low_power }, /* Alder Lake-P AHCI */ /* JMicron 360/1/3/5/6, match class to avoid IDE function */ { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, @@ -668,22 +667,90 @@ module_param(mobile_lpm_policy, int, 0644); MODULE_PARM_DESC(mobile_lpm_policy, "Default LPM policy for mobile chipsets"); -static void ahci_pci_save_initial_config(struct pci_dev *pdev, - struct ahci_host_priv *hpriv) +static char *ahci_mask_port_map; +module_param_named(mask_port_map, ahci_mask_port_map, charp, 0444); +MODULE_PARM_DESC(mask_port_map, + "32-bits port map masks to ignore controllers ports. " + "Valid values are: " + "\"\" to apply the same mask to all AHCI controller " + "devices, and \"=,=,...\" to " + "specify different masks for the controllers specified, " + "where is the PCI ID of an AHCI controller in the " + "form \"domain:bus:dev.func\""); + +static void ahci_apply_port_map_mask(struct device *dev, + struct ahci_host_priv *hpriv, char *mask_s) { - if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA) { - switch (pdev->device) { - case 0x1166: - dev_info(&pdev->dev, "ASM1166 has only six ports\n"); - hpriv->saved_port_map = 0x3f; + unsigned int mask; + + if (kstrtouint(mask_s, 0, &mask)) { + dev_err(dev, "Invalid port map mask\n"); + return; + } + + hpriv->mask_port_map = mask; +} + +static void ahci_get_port_map_mask(struct device *dev, + struct ahci_host_priv *hpriv) +{ + char *param, *end, *str, *mask_s; + char *name; + + if (!strlen(ahci_mask_port_map)) + return; + + str = kstrdup(ahci_mask_port_map, GFP_KERNEL); + if (!str) + return; + + /* Handle single mask case */ + if (!strchr(str, '=')) { + ahci_apply_port_map_mask(dev, hpriv, str); + goto free; + } + + /* + * Mask list case: parse the parameter to apply the mask only if + * the device name matches. + */ + param = str; + end = param + strlen(param); + while (param && param < end && *param) { + name = param; + param = strchr(name, '='); + if (!param) break; - case 0x1064: - dev_info(&pdev->dev, "ASM1064 has only four ports\n"); - hpriv->saved_port_map = 0xf; + + *param = '\0'; + param++; + if (param >= end) break; + + if (strcmp(dev_name(dev), name) != 0) { + param = strchr(param, ','); + if (param) + param++; + continue; + } + + mask_s = param; + param = strchr(mask_s, ','); + if (param) { + *param = '\0'; + param++; } + + ahci_apply_port_map_mask(dev, hpriv, mask_s); } +free: + kfree(str); +} + +static void ahci_pci_save_initial_config(struct pci_dev *pdev, + struct ahci_host_priv *hpriv) +{ if (pdev->vendor == PCI_VENDOR_ID_JMICRON && pdev->device == 0x2361) { dev_info(&pdev->dev, "JMB361 has only one port\n"); hpriv->saved_port_map = 1; @@ -703,6 +770,10 @@ "Disabling your PATA port. Use the boot option 'ahci.marvell_enable=0' to avoid this.\n"); } + /* Handle port map masks passed as module parameter. */ + if (ahci_mask_port_map) + ahci_get_port_map_mask(&pdev->dev, hpriv); + ahci_save_initial_config(&pdev->dev, hpriv); } @@ -1660,6 +1731,14 @@ if (!(hpriv->flags & AHCI_HFLAG_USE_LPM_POLICY)) return; + /* If no LPM states are supported by the HBA, do not bother with LPM */ + if ((ap->host->flags & ATA_HOST_NO_PART) && + (ap->host->flags & ATA_HOST_NO_SSC) && + (ap->host->flags & ATA_HOST_NO_DEVSLP)) { + ata_port_dbg(ap, "no LPM states supported, not enabling LPM\n"); + return; + } + /* user modified policy via module param */ if (mobile_lpm_policy != -1) { policy = mobile_lpm_policy; @@ -1904,8 +1983,10 @@ n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map)); host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports); - if (!host) - return -ENOMEM; + if (!host) { + rc = -ENOMEM; + goto err_rm_sysfs_file; + } host->private_data = hpriv; if (ahci_init_msi(pdev, n_ports, hpriv) < 0) { @@ -1958,11 +2039,11 @@ /* initialize adapter */ rc = ahci_configure_dma_masks(pdev, hpriv); if (rc) - return rc; + goto err_rm_sysfs_file; rc = ahci_pci_reset_controller(host); if (rc) - return rc; + goto err_rm_sysfs_file; ahci_pci_init_controller(host); ahci_pci_print_info(host); @@ -1971,10 +2052,15 @@ rc = ahci_host_activate(host, &ahci_sht); if (rc) - return rc; + goto err_rm_sysfs_file; pm_runtime_put_noidle(&pdev->dev); return 0; + +err_rm_sysfs_file: + sysfs_remove_file_from_group(&pdev->dev.kobj, + &dev_attr_remapped_nvme.attr, NULL); + return rc; } static void ahci_shutdown_one(struct pci_dev *pdev) --- linux-xilinx-6.8.0.orig/drivers/ata/libahci.c +++ linux-xilinx-6.8.0/drivers/ata/libahci.c @@ -2082,13 +2082,6 @@ struct ahci_port_priv *pp = qc->ap->private_data; u8 *rx_fis = pp->rx_fis; - /* - * rtf may already be filled (e.g. for successful NCQ commands). - * If that is the case, we have nothing to do. - */ - if (qc->flags & ATA_QCFLAG_RTF_FILLED) - return; - if (pp->fbs_enabled) rx_fis += qc->dev->link->pmp * AHCI_RX_FIS_SZ; @@ -2102,7 +2095,6 @@ !(qc->flags & ATA_QCFLAG_EH)) { ata_tf_from_fis(rx_fis + RX_FIS_PIO_SETUP, &qc->result_tf); qc->result_tf.status = (rx_fis + RX_FIS_PIO_SETUP)[15]; - qc->flags |= ATA_QCFLAG_RTF_FILLED; return; } @@ -2125,12 +2117,10 @@ */ qc->result_tf.status = fis[2]; qc->result_tf.error = fis[3]; - qc->flags |= ATA_QCFLAG_RTF_FILLED; return; } ata_tf_from_fis(rx_fis + RX_FIS_D2H_REG, &qc->result_tf); - qc->flags |= ATA_QCFLAG_RTF_FILLED; } static void ahci_qc_ncq_fill_rtf(struct ata_port *ap, u64 done_mask) @@ -2165,6 +2155,7 @@ if (qc && ata_is_ncq(qc->tf.protocol)) { qc->result_tf.status = status; qc->result_tf.error = error; + qc->result_tf.flags = qc->tf.flags; qc->flags |= ATA_QCFLAG_RTF_FILLED; } done_mask &= ~(1ULL << tag); @@ -2189,6 +2180,7 @@ fis += RX_FIS_SDB; qc->result_tf.status = fis[2]; qc->result_tf.error = fis[3]; + qc->result_tf.flags = qc->tf.flags; qc->flags |= ATA_QCFLAG_RTF_FILLED; } done_mask &= ~(1ULL << tag); --- linux-xilinx-6.8.0.orig/drivers/ata/libata-core.c +++ linux-xilinx-6.8.0/drivers/ata/libata-core.c @@ -2539,7 +2539,7 @@ bool cdl_enabled; u64 val; - if (ata_id_major_version(dev->id) < 12) + if (ata_id_major_version(dev->id) < 11) goto not_supported; if (!ata_log_supported(dev, ATA_LOG_IDENTIFY_DEVICE) || @@ -4180,8 +4180,8 @@ { "PIONEER BD-RW BDR-207M", NULL, ATA_HORKAGE_NOLPM }, { "PIONEER BD-RW BDR-205", NULL, ATA_HORKAGE_NOLPM }, - /* Crucial BX100 SSD 500GB has broken LPM support */ - { "CT500BX100SSD1", NULL, ATA_HORKAGE_NOLPM }, + /* Crucial devices with broken LPM support */ + { "CT*0BX*00SSD1", NULL, ATA_HORKAGE_NOLPM }, /* 512GB MX100 with MU01 firmware has both queued TRIM and LPM issues */ { "Crucial_CT512MX100*", "MU01", ATA_HORKAGE_NO_NCQ_TRIM | @@ -4199,6 +4199,12 @@ ATA_HORKAGE_ZERO_AFTER_TRIM | ATA_HORKAGE_NOLPM }, + /* Apacer models with LPM issues */ + { "Apacer AS340*", NULL, ATA_HORKAGE_NOLPM }, + + /* AMD Radeon devices with broken LPM support */ + { "R3SL240G", NULL, ATA_HORKAGE_NOLPM }, + /* These specific Samsung models/firmware-revs do not handle LPM well */ { "SAMSUNG MZMPC128HBFU-000MV", "CXM14M1Q", ATA_HORKAGE_NOLPM }, { "SAMSUNG SSD PM830 mSATA *", "CXM13D1Q", ATA_HORKAGE_NOLPM }, @@ -4838,8 +4844,16 @@ { struct ata_port *ap = qc->ap; + /* + * rtf may already be filled (e.g. for successful NCQ commands). + * If that is the case, we have nothing to do. + */ + if (qc->flags & ATA_QCFLAG_RTF_FILLED) + return; + qc->result_tf.flags = qc->tf.flags; ap->ops->qc_fill_rtf(qc); + qc->flags |= ATA_QCFLAG_RTF_FILLED; } static void ata_verify_xfer(struct ata_queued_cmd *qc) @@ -5527,6 +5541,18 @@ return ap; } +void ata_port_free(struct ata_port *ap) +{ + if (!ap) + return; + + kfree(ap->pmp_link); + kfree(ap->slave_link); + kfree(ap->ncq_sense_buf); + kfree(ap); +} +EXPORT_SYMBOL_GPL(ata_port_free); + static void ata_devres_release(struct device *gendev, void *res) { struct ata_host *host = dev_get_drvdata(gendev); @@ -5553,12 +5579,7 @@ int i; for (i = 0; i < host->n_ports; i++) { - struct ata_port *ap = host->ports[i]; - - kfree(ap->pmp_link); - kfree(ap->slave_link); - kfree(ap->ncq_sense_buf); - kfree(ap); + ata_port_free(host->ports[i]); host->ports[i] = NULL; } kfree(host); @@ -5608,12 +5629,16 @@ if (!host) return NULL; - if (!devres_open_group(dev, NULL, GFP_KERNEL)) - goto err_free; + if (!devres_open_group(dev, NULL, GFP_KERNEL)) { + kfree(host); + return NULL; + } dr = devres_alloc(ata_devres_release, 0, GFP_KERNEL); - if (!dr) + if (!dr) { + kfree(host); goto err_out; + } devres_add(dev, dr); dev_set_drvdata(dev, host); @@ -5641,8 +5666,6 @@ err_out: devres_release_group(dev, NULL); - err_free: - kfree(host); return NULL; } EXPORT_SYMBOL_GPL(ata_host_alloc); @@ -5941,7 +5964,7 @@ * allocation time. */ for (i = host->n_ports; host->ports[i]; i++) - kfree(host->ports[i]); + ata_port_free(host->ports[i]); /* give ports names and add SCSI hosts */ for (i = 0; i < host->n_ports; i++) { --- linux-xilinx-6.8.0.orig/drivers/ata/libata-eh.c +++ linux-xilinx-6.8.0/drivers/ata/libata-eh.c @@ -630,6 +630,14 @@ list_for_each_entry_safe(scmd, tmp, eh_work_q, eh_entry) { struct ata_queued_cmd *qc; + /* + * If the scmd was added to EH, via ata_qc_schedule_eh() -> + * scsi_timeout() -> scsi_eh_scmd_add(), scsi_timeout() will + * have set DID_TIME_OUT (since libata does not have an abort + * handler). Thus, to clear DID_TIME_OUT, clear the host byte. + */ + set_host_byte(scmd, DID_OK); + ata_qc_for_each_raw(ap, qc, i) { if (qc->flags & ATA_QCFLAG_ACTIVE && qc->scsicmd == scmd) @@ -640,6 +648,7 @@ /* the scmd has an associated qc */ if (!(qc->flags & ATA_QCFLAG_EH)) { /* which hasn't failed yet, timeout */ + set_host_byte(scmd, DID_TIME_OUT); qc->err_mask |= AC_ERR_TIMEOUT; qc->flags |= ATA_QCFLAG_EH; nr_timedout++; @@ -712,8 +721,10 @@ ehc->saved_ncq_enabled |= 1 << devno; /* If we are resuming, wake up the device */ - if (ap->pflags & ATA_PFLAG_RESUMING) + if (ap->pflags & ATA_PFLAG_RESUMING) { + dev->flags |= ATA_DFLAG_RESUMING; ehc->i.dev_action[devno] |= ATA_EH_SET_ACTIVE; + } } } @@ -3169,6 +3180,7 @@ return 0; err: + dev->flags &= ~ATA_DFLAG_RESUMING; *r_failed_dev = dev; return rc; } @@ -4048,10 +4060,20 @@ WARN_ON(ap->pflags & ATA_PFLAG_SUSPENDED); - /* Set all devices attached to the port in standby mode */ - ata_for_each_link(link, ap, HOST_FIRST) { - ata_for_each_dev(dev, link, ENABLED) - ata_dev_power_set_standby(dev); + /* + * We will reach this point for all of the PM events: + * PM_EVENT_SUSPEND (if runtime pm, PM_EVENT_AUTO will also be set) + * PM_EVENT_FREEZE, and PM_EVENT_HIBERNATE. + * + * We do not want to perform disk spin down for PM_EVENT_FREEZE. + * (Spin down will be performed by the subsequent PM_EVENT_HIBERNATE.) + */ + if (!(ap->pm_mesg.event & PM_EVENT_FREEZE)) { + /* Set all devices attached to the port in standby mode */ + ata_for_each_link(link, ap, HOST_FIRST) { + ata_for_each_dev(dev, link, ENABLED) + ata_dev_power_set_standby(dev); + } } /* --- linux-xilinx-6.8.0.orig/drivers/ata/libata-scsi.c +++ linux-xilinx-6.8.0/drivers/ata/libata-scsi.c @@ -230,6 +230,87 @@ SCSI_SENSE_BUFFERSIZE, information); } +/** + * ata_scsi_set_passthru_sense_fields - Set ATA fields in sense buffer + * @qc: ATA PASS-THROUGH command. + * + * Populates "ATA Status Return sense data descriptor" / "Fixed format + * sense data" with ATA taskfile fields. + * + * LOCKING: + * None. + */ +static void ata_scsi_set_passthru_sense_fields(struct ata_queued_cmd *qc) +{ + struct ata_device *dev = qc->dev; + struct scsi_cmnd *cmd = qc->scsicmd; + struct ata_taskfile *tf = &qc->result_tf; + unsigned char *sb = cmd->sense_buffer; + + if (!(qc->flags & ATA_QCFLAG_RTF_FILLED)) { + ata_dev_dbg(dev, + "missing result TF: can't set ATA PT sense fields\n"); + return; + } + + if ((sb[0] & 0x7f) >= 0x72) { + unsigned char *desc; + u8 len; + + /* descriptor format */ + len = sb[7]; + desc = (char *)scsi_sense_desc_find(sb, len + 8, 9); + if (!desc) { + if (SCSI_SENSE_BUFFERSIZE < len + 14) + return; + sb[7] = len + 14; + desc = sb + 8 + len; + } + desc[0] = 9; + desc[1] = 12; + /* + * Copy registers into sense buffer. + */ + desc[2] = 0x00; + desc[3] = tf->error; + desc[5] = tf->nsect; + desc[7] = tf->lbal; + desc[9] = tf->lbam; + desc[11] = tf->lbah; + desc[12] = tf->device; + desc[13] = tf->status; + + /* + * Fill in Extend bit, and the high order bytes + * if applicable. + */ + if (tf->flags & ATA_TFLAG_LBA48) { + desc[2] |= 0x01; + desc[4] = tf->hob_nsect; + desc[6] = tf->hob_lbal; + desc[8] = tf->hob_lbam; + desc[10] = tf->hob_lbah; + } + } else { + /* Fixed sense format */ + sb[0] |= 0x80; + sb[3] = tf->error; + sb[4] = tf->status; + sb[5] = tf->device; + sb[6] = tf->nsect; + if (tf->flags & ATA_TFLAG_LBA48) { + sb[8] |= 0x80; + if (tf->hob_nsect) + sb[8] |= 0x40; + if (tf->hob_lbal || tf->hob_lbam || tf->hob_lbah) + sb[8] |= 0x20; + } + sb[9] = tf->lbal; + sb[10] = tf->lbam; + sb[11] = tf->lbah; + } +} + static void ata_scsi_set_invalid_field(struct ata_device *dev, struct scsi_cmnd *cmd, u16 field, u8 bit) { @@ -837,10 +918,8 @@ * ata_gen_passthru_sense - Generate check condition sense block. * @qc: Command that completed. * - * This function is specific to the ATA descriptor format sense - * block specified for the ATA pass through commands. Regardless - * of whether the command errored or not, return a sense - * block. Copy all controller registers into the sense + * This function is specific to the ATA pass through commands. + * Regardless of whether the command errored or not, return a sense * block. If there was no error, we get the request from an ATA * passthrough command, so we use the following sense data: * sk = RECOVERED ERROR @@ -852,13 +931,16 @@ */ static void ata_gen_passthru_sense(struct ata_queued_cmd *qc) { + struct ata_device *dev = qc->dev; struct scsi_cmnd *cmd = qc->scsicmd; struct ata_taskfile *tf = &qc->result_tf; - unsigned char *sb = cmd->sense_buffer; - unsigned char *desc = sb + 8; u8 sense_key, asc, ascq; - memset(sb, 0, SCSI_SENSE_BUFFERSIZE); + if (!(qc->flags & ATA_QCFLAG_RTF_FILLED)) { + ata_dev_dbg(dev, + "missing result TF: can't generate ATA PT sense data\n"); + return; + } /* * Use ata_to_sense_error() to map status register bits @@ -876,62 +958,6 @@ */ scsi_build_sense(cmd, 1, RECOVERED_ERROR, 0, 0x1D); } - - if ((cmd->sense_buffer[0] & 0x7f) >= 0x72) { - u8 len; - - /* descriptor format */ - len = sb[7]; - desc = (char *)scsi_sense_desc_find(sb, len + 8, 9); - if (!desc) { - if (SCSI_SENSE_BUFFERSIZE < len + 14) - return; - sb[7] = len + 14; - desc = sb + 8 + len; - } - desc[0] = 9; - desc[1] = 12; - /* - * Copy registers into sense buffer. - */ - desc[2] = 0x00; - desc[3] = tf->error; - desc[5] = tf->nsect; - desc[7] = tf->lbal; - desc[9] = tf->lbam; - desc[11] = tf->lbah; - desc[12] = tf->device; - desc[13] = tf->status; - - /* - * Fill in Extend bit, and the high order bytes - * if applicable. - */ - if (tf->flags & ATA_TFLAG_LBA48) { - desc[2] |= 0x01; - desc[4] = tf->hob_nsect; - desc[6] = tf->hob_lbal; - desc[8] = tf->hob_lbam; - desc[10] = tf->hob_lbah; - } - } else { - /* Fixed sense format */ - desc[0] = tf->error; - desc[1] = tf->status; - desc[2] = tf->device; - desc[3] = tf->nsect; - desc[7] = 0; - if (tf->flags & ATA_TFLAG_LBA48) { - desc[8] |= 0x80; - if (tf->hob_nsect) - desc[8] |= 0x40; - if (tf->hob_lbal || tf->hob_lbam || tf->hob_lbah) - desc[8] |= 0x20; - } - desc[9] = tf->lbal; - desc[10] = tf->lbam; - desc[11] = tf->lbah; - } } /** @@ -953,14 +979,19 @@ u64 block; u8 sense_key, asc, ascq; - memset(sb, 0, SCSI_SENSE_BUFFERSIZE); - if (ata_dev_disabled(dev)) { /* Device disabled after error recovery */ /* LOGICAL UNIT NOT READY, HARD RESET REQUIRED */ ata_scsi_set_sense(dev, cmd, NOT_READY, 0x04, 0x21); return; } + + if (!(qc->flags & ATA_QCFLAG_RTF_FILLED)) { + ata_dev_dbg(dev, + "missing result TF: can't generate sense data\n"); + return; + } + /* Use ata_to_sense_error() to map status register bits * onto sense key, asc & ascq. */ @@ -1629,26 +1660,29 @@ { struct scsi_cmnd *cmd = qc->scsicmd; u8 *cdb = cmd->cmnd; - int need_sense = (qc->err_mask != 0) && - !(qc->flags & ATA_QCFLAG_SENSE_VALID); + bool have_sense = qc->flags & ATA_QCFLAG_SENSE_VALID; + bool is_ata_passthru = cdb[0] == ATA_16 || cdb[0] == ATA_12; + bool is_ck_cond_request = cdb[2] & 0x20; + bool is_error = qc->err_mask != 0; /* For ATA pass thru (SAT) commands, generate a sense block if * user mandated it or if there's an error. Note that if we - * generate because the user forced us to [CK_COND =1], a check + * generate because the user forced us to [CK_COND=1], a check * condition is generated and the ATA register values are returned * whether the command completed successfully or not. If there - * was no error, we use the following sense data: + * was no error, and CK_COND=1, we use the following sense data: * sk = RECOVERED ERROR * asc,ascq = ATA PASS-THROUGH INFORMATION AVAILABLE */ - if (((cdb[0] == ATA_16) || (cdb[0] == ATA_12)) && - ((cdb[2] & 0x20) || need_sense)) - ata_gen_passthru_sense(qc); - else if (need_sense) + if (is_ata_passthru && (is_ck_cond_request || is_error || have_sense)) { + if (!have_sense) + ata_gen_passthru_sense(qc); + ata_scsi_set_passthru_sense_fields(qc); + if (is_ck_cond_request) + set_status_byte(qc->scsicmd, SAM_STAT_CHECK_CONDITION); + } else if (is_error && !have_sense) { ata_gen_ata_sense(qc); - else - /* Keep the SCSI ML and status byte, clear host byte. */ - cmd->result &= 0x0000ffff; + } ata_qc_done(qc); } @@ -1828,11 +1862,11 @@ 2 }; - /* set scsi removable (RMB) bit per ata bit, or if the - * AHCI port says it's external (Hotplug-capable, eSATA). + /* + * Set the SCSI Removable Media Bit (RMB) if the ATA removable media + * device bit (obsolete since ATA-8 ACS) is set. */ - if (ata_id_removable(args->id) || - (args->dev->link->ap->pflags & ATA_PFLAG_EXTERNAL)) + if (ata_id_removable(args->id)) hdr[1] |= (1 << 7); if (args->dev->class == ATA_DEV_ZAC) { @@ -2313,7 +2347,7 @@ case ALL_SUB_MPAGES: n = ata_msense_control_spg0(dev, buf, changeable); n += ata_msense_control_spgt2(dev, buf + n, CDL_T2A_SUB_MPAGE); - n += ata_msense_control_spgt2(dev, buf + n, CDL_T2A_SUB_MPAGE); + n += ata_msense_control_spgt2(dev, buf + n, CDL_T2B_SUB_MPAGE); n += ata_msense_control_ata_feature(dev, buf + n); return n; default: @@ -2587,14 +2621,8 @@ /* handle completion from EH */ if (unlikely(err_mask || qc->flags & ATA_QCFLAG_SENSE_VALID)) { - if (!(qc->flags & ATA_QCFLAG_SENSE_VALID)) { - /* FIXME: not quite right; we don't want the - * translation of taskfile registers into a - * sense descriptors, since that's only - * correct for ATA, not ATAPI - */ + if (!(qc->flags & ATA_QCFLAG_SENSE_VALID)) ata_gen_passthru_sense(qc); - } /* SCSI EH automatically locks door if sdev->locked is * set. Sometimes door lock request continues to @@ -4730,6 +4758,7 @@ struct ata_link *link; struct ata_device *dev; unsigned long flags; + bool do_resume; int ret = 0; mutex_lock(&ap->scsi_scan_mutex); @@ -4744,25 +4773,34 @@ * bail out. */ if (ap->pflags & ATA_PFLAG_SUSPENDED) - goto unlock; + goto unlock_ap; if (!sdev) continue; if (scsi_device_get(sdev)) continue; + do_resume = dev->flags & ATA_DFLAG_RESUMING; + spin_unlock_irqrestore(ap->lock, flags); + if (do_resume) { + ret = scsi_resume_device(sdev); + if (ret == -EWOULDBLOCK) + goto unlock_scan; + dev->flags &= ~ATA_DFLAG_RESUMING; + } ret = scsi_rescan_device(sdev); scsi_device_put(sdev); spin_lock_irqsave(ap->lock, flags); if (ret) - goto unlock; + goto unlock_ap; } } -unlock: +unlock_ap: spin_unlock_irqrestore(ap->lock, flags); +unlock_scan: mutex_unlock(&ap->scsi_scan_mutex); /* Reschedule with a delay if scsi_rescan_device() returned an error */ --- linux-xilinx-6.8.0.orig/drivers/ata/libata-sff.c +++ linux-xilinx-6.8.0/drivers/ata/libata-sff.c @@ -602,7 +602,7 @@ { struct ata_port *ap = qc->ap; struct page *page; - unsigned int offset; + unsigned int offset, count; if (!qc->cursg) { qc->curbytes = qc->nbytes; @@ -618,25 +618,27 @@ page = nth_page(page, (offset >> PAGE_SHIFT)); offset %= PAGE_SIZE; - trace_ata_sff_pio_transfer_data(qc, offset, qc->sect_size); + /* don't overrun current sg */ + count = min(qc->cursg->length - qc->cursg_ofs, qc->sect_size); + + trace_ata_sff_pio_transfer_data(qc, offset, count); /* * Split the transfer when it splits a page boundary. Note that the * split still has to be dword aligned like all ATA data transfers. */ WARN_ON_ONCE(offset % 4); - if (offset + qc->sect_size > PAGE_SIZE) { + if (offset + count > PAGE_SIZE) { unsigned int split_len = PAGE_SIZE - offset; ata_pio_xfer(qc, page, offset, split_len); - ata_pio_xfer(qc, nth_page(page, 1), 0, - qc->sect_size - split_len); + ata_pio_xfer(qc, nth_page(page, 1), 0, count - split_len); } else { - ata_pio_xfer(qc, page, offset, qc->sect_size); + ata_pio_xfer(qc, page, offset, count); } - qc->curbytes += qc->sect_size; - qc->cursg_ofs += qc->sect_size; + qc->curbytes += count; + qc->cursg_ofs += count; if (qc->cursg_ofs == qc->cursg->length) { qc->cursg = sg_next(qc->cursg); --- linux-xilinx-6.8.0.orig/drivers/ata/pata_legacy.c +++ linux-xilinx-6.8.0/drivers/ata/pata_legacy.c @@ -173,8 +173,6 @@ static struct legacy_probe probe_list[NR_HOST]; static struct legacy_data legacy_data[NR_HOST]; static struct ata_host *legacy_host[NR_HOST]; -static int nr_legacy_host; - /** * legacy_probe_add - Add interface to probe list @@ -1276,9 +1274,11 @@ { int i; - for (i = 0; i < nr_legacy_host; i++) { + for (i = 0; i < NR_HOST; i++) { struct legacy_data *ld = &legacy_data[i]; - ata_host_detach(legacy_host[i]); + + if (legacy_host[i]) + ata_host_detach(legacy_host[i]); platform_device_unregister(ld->platform_dev); } } --- linux-xilinx-6.8.0.orig/drivers/ata/pata_macio.c +++ linux-xilinx-6.8.0/drivers/ata/pata_macio.c @@ -541,7 +541,8 @@ while (sg_len) { /* table overflow should never happen */ - BUG_ON (pi++ >= MAX_DCMDS); + if (WARN_ON_ONCE(pi >= MAX_DCMDS)) + return AC_ERR_SYSTEM; len = (sg_len < MAX_DBDMA_SEG) ? sg_len : MAX_DBDMA_SEG; table->command = cpu_to_le16(write ? OUTPUT_MORE: INPUT_MORE); @@ -553,11 +554,13 @@ addr += len; sg_len -= len; ++table; + ++pi; } } /* Should never happen according to Tejun */ - BUG_ON(!pi); + if (WARN_ON_ONCE(!pi)) + return AC_ERR_SYSTEM; /* Convert the last command to an input/output */ table--; --- linux-xilinx-6.8.0.orig/drivers/ata/pata_serverworks.c +++ linux-xilinx-6.8.0/drivers/ata/pata_serverworks.c @@ -46,10 +46,11 @@ #define SVWKS_CSB5_REVISION_NEW 0x92 /* min PCI_REVISION_ID for UDMA5 (A2.0) */ #define SVWKS_CSB6_REVISION 0xa0 /* min PCI_REVISION_ID for UDMA4 (A1.0) */ -/* Seagate Barracuda ATA IV Family drives in UDMA mode 5 - * can overrun their FIFOs when used with the CSB5 */ - -static const char *csb_bad_ata100[] = { +/* + * Seagate Barracuda ATA IV Family drives in UDMA mode 5 + * can overrun their FIFOs when used with the CSB5. + */ +static const char * const csb_bad_ata100[] = { "ST320011A", "ST340016A", "ST360021A", @@ -163,10 +164,11 @@ * @adev: ATA device * @mask: Mask of proposed modes * - * Check the blacklist and disable UDMA5 if matched + * Check the list of devices with broken UDMA5 and + * disable UDMA5 if matched. */ - -static unsigned int serverworks_csb_filter(struct ata_device *adev, unsigned int mask) +static unsigned int serverworks_csb_filter(struct ata_device *adev, + unsigned int mask) { const char *p; char model_num[ATA_ID_PROD_LEN + 1]; --- linux-xilinx-6.8.0.orig/drivers/ata/sata_gemini.c +++ linux-xilinx-6.8.0/drivers/ata/sata_gemini.c @@ -200,7 +200,10 @@ pclk = sg->sata0_pclk; else pclk = sg->sata1_pclk; - clk_enable(pclk); + ret = clk_enable(pclk); + if (ret) + return ret; + msleep(10); /* Do not keep clocking a bridge that is not online */ --- linux-xilinx-6.8.0.orig/drivers/ata/sata_highbank.c +++ linux-xilinx-6.8.0/drivers/ata/sata_highbank.c @@ -348,6 +348,7 @@ phy_nodes[phy] = phy_data.np; cphy_base[phy] = of_iomap(phy_nodes[phy], 0); if (cphy_base[phy] == NULL) { + of_node_put(phy_data.np); return 0; } phy_count += 1; --- linux-xilinx-6.8.0.orig/drivers/ata/sata_mv.c +++ linux-xilinx-6.8.0/drivers/ata/sata_mv.c @@ -787,37 +787,6 @@ }, }; -static const struct pci_device_id mv_pci_tbl[] = { - { PCI_VDEVICE(MARVELL, 0x5040), chip_504x }, - { PCI_VDEVICE(MARVELL, 0x5041), chip_504x }, - { PCI_VDEVICE(MARVELL, 0x5080), chip_5080 }, - { PCI_VDEVICE(MARVELL, 0x5081), chip_508x }, - /* RocketRAID 1720/174x have different identifiers */ - { PCI_VDEVICE(TTI, 0x1720), chip_6042 }, - { PCI_VDEVICE(TTI, 0x1740), chip_6042 }, - { PCI_VDEVICE(TTI, 0x1742), chip_6042 }, - - { PCI_VDEVICE(MARVELL, 0x6040), chip_604x }, - { PCI_VDEVICE(MARVELL, 0x6041), chip_604x }, - { PCI_VDEVICE(MARVELL, 0x6042), chip_6042 }, - { PCI_VDEVICE(MARVELL, 0x6080), chip_608x }, - { PCI_VDEVICE(MARVELL, 0x6081), chip_608x }, - - { PCI_VDEVICE(ADAPTEC2, 0x0241), chip_604x }, - - /* Adaptec 1430SA */ - { PCI_VDEVICE(ADAPTEC2, 0x0243), chip_7042 }, - - /* Marvell 7042 support */ - { PCI_VDEVICE(MARVELL, 0x7042), chip_7042 }, - - /* Highpoint RocketRAID PCIe series */ - { PCI_VDEVICE(TTI, 0x2300), chip_7042 }, - { PCI_VDEVICE(TTI, 0x2310), chip_7042 }, - - { } /* terminate list */ -}; - static const struct mv_hw_ops mv5xxx_ops = { .phy_errata = mv5_phy_errata, .enable_leds = mv5_enable_leds, @@ -4303,6 +4272,36 @@ static int mv_pci_device_resume(struct pci_dev *pdev); #endif +static const struct pci_device_id mv_pci_tbl[] = { + { PCI_VDEVICE(MARVELL, 0x5040), chip_504x }, + { PCI_VDEVICE(MARVELL, 0x5041), chip_504x }, + { PCI_VDEVICE(MARVELL, 0x5080), chip_5080 }, + { PCI_VDEVICE(MARVELL, 0x5081), chip_508x }, + /* RocketRAID 1720/174x have different identifiers */ + { PCI_VDEVICE(TTI, 0x1720), chip_6042 }, + { PCI_VDEVICE(TTI, 0x1740), chip_6042 }, + { PCI_VDEVICE(TTI, 0x1742), chip_6042 }, + + { PCI_VDEVICE(MARVELL, 0x6040), chip_604x }, + { PCI_VDEVICE(MARVELL, 0x6041), chip_604x }, + { PCI_VDEVICE(MARVELL, 0x6042), chip_6042 }, + { PCI_VDEVICE(MARVELL, 0x6080), chip_608x }, + { PCI_VDEVICE(MARVELL, 0x6081), chip_608x }, + + { PCI_VDEVICE(ADAPTEC2, 0x0241), chip_604x }, + + /* Adaptec 1430SA */ + { PCI_VDEVICE(ADAPTEC2, 0x0243), chip_7042 }, + + /* Marvell 7042 support */ + { PCI_VDEVICE(MARVELL, 0x7042), chip_7042 }, + + /* Highpoint RocketRAID PCIe series */ + { PCI_VDEVICE(TTI, 0x2300), chip_7042 }, + { PCI_VDEVICE(TTI, 0x2310), chip_7042 }, + + { } /* terminate list */ +}; static struct pci_driver mv_pci_driver = { .name = DRV_NAME, @@ -4315,6 +4314,7 @@ #endif }; +MODULE_DEVICE_TABLE(pci, mv_pci_tbl); /** * mv_print_info - Dump key info to kernel log for perusal. @@ -4487,7 +4487,6 @@ MODULE_AUTHOR("Brett Russ"); MODULE_DESCRIPTION("SCSI low-level driver for Marvell SATA controllers"); MODULE_LICENSE("GPL v2"); -MODULE_DEVICE_TABLE(pci, mv_pci_tbl); MODULE_VERSION(DRV_VERSION); MODULE_ALIAS("platform:" DRV_NAME); --- linux-xilinx-6.8.0.orig/drivers/ata/sata_sil.c +++ linux-xilinx-6.8.0/drivers/ata/sata_sil.c @@ -128,7 +128,7 @@ static const struct sil_drivelist { const char *product; unsigned int quirk; -} sil_blacklist [] = { +} sil_quirks[] = { { "ST320012AS", SIL_QUIRK_MOD15WRITE }, { "ST330013AS", SIL_QUIRK_MOD15WRITE }, { "ST340017AS", SIL_QUIRK_MOD15WRITE }, @@ -600,8 +600,8 @@ * list, and apply the fixups to only the specific * devices/hosts/firmwares that need it. * - * 20040111 - Seagate drives affected by the Mod15Write bug are blacklisted - * The Maxtor quirk is in the blacklist, but I'm keeping the original + * 20040111 - Seagate drives affected by the Mod15Write bug are quirked + * The Maxtor quirk is in sil_quirks, but I'm keeping the original * pessimistic fix for the following reasons... * - There seems to be less info on it, only one device gleaned off the * Windows driver, maybe only one is affected. More info would be greatly @@ -620,9 +620,9 @@ ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num)); - for (n = 0; sil_blacklist[n].product; n++) - if (!strcmp(sil_blacklist[n].product, model_num)) { - quirks = sil_blacklist[n].quirk; + for (n = 0; sil_quirks[n].product; n++) + if (!strcmp(sil_quirks[n].product, model_num)) { + quirks = sil_quirks[n].quirk; break; } --- linux-xilinx-6.8.0.orig/drivers/ata/sata_sx4.c +++ linux-xilinx-6.8.0/drivers/ata/sata_sx4.c @@ -957,8 +957,7 @@ offset -= (idx * window_size); idx++; - dist = ((long) (window_size - (offset + size))) >= 0 ? size : - (long) (window_size - offset); + dist = min(size, window_size - offset); memcpy_fromio(psource, dimm_mmio + offset / 4, dist); psource += dist; @@ -1005,8 +1004,7 @@ readl(mmio + PDC_DIMM_WINDOW_CTLR); offset -= (idx * window_size); idx++; - dist = ((long)(s32)(window_size - (offset + size))) >= 0 ? size : - (long) (window_size - offset); + dist = min(size, window_size - offset); memcpy_toio(dimm_mmio + offset / 4, psource, dist); writel(0x01, mmio + PDC_GENERAL_CTLR); readl(mmio + PDC_GENERAL_CTLR); --- linux-xilinx-6.8.0.orig/drivers/atm/idt77252.c +++ linux-xilinx-6.8.0/drivers/atm/idt77252.c @@ -1118,8 +1118,8 @@ rpp->len += skb->len; if (stat & SAR_RSQE_EPDU) { + unsigned int len, truesize; unsigned char *l1l2; - unsigned int len; l1l2 = (unsigned char *) ((unsigned long) skb->data + skb->len - 6); @@ -1189,14 +1189,15 @@ ATM_SKB(skb)->vcc = vcc; __net_timestamp(skb); + truesize = skb->truesize; vcc->push(vcc, skb); atomic_inc(&vcc->stats->rx); - if (skb->truesize > SAR_FB_SIZE_3) + if (truesize > SAR_FB_SIZE_3) add_rx_skb(card, 3, SAR_FB_SIZE_3, 1); - else if (skb->truesize > SAR_FB_SIZE_2) + else if (truesize > SAR_FB_SIZE_2) add_rx_skb(card, 2, SAR_FB_SIZE_2, 1); - else if (skb->truesize > SAR_FB_SIZE_1) + else if (truesize > SAR_FB_SIZE_1) add_rx_skb(card, 1, SAR_FB_SIZE_1, 1); else add_rx_skb(card, 0, SAR_FB_SIZE_0, 1); --- linux-xilinx-6.8.0.orig/drivers/auxdisplay/ht16k33.c +++ linux-xilinx-6.8.0/drivers/auxdisplay/ht16k33.c @@ -506,6 +506,7 @@ led->max_brightness = MAX_BRIGHTNESS; err = devm_led_classdev_register_ext(dev, led, &init_data); + fwnode_handle_put(init_data.fwnode); if (err) dev_err(dev, "Failed to register LED\n"); --- linux-xilinx-6.8.0.orig/drivers/base/base.h +++ linux-xilinx-6.8.0/drivers/base/base.h @@ -192,11 +192,14 @@ void devices_kset_move_last(struct device *dev); #if defined(CONFIG_MODULES) && defined(CONFIG_SYSFS) -void module_add_driver(struct module *mod, struct device_driver *drv); +int module_add_driver(struct module *mod, struct device_driver *drv); void module_remove_driver(struct device_driver *drv); #else -static inline void module_add_driver(struct module *mod, - struct device_driver *drv) { } +static inline int module_add_driver(struct module *mod, + struct device_driver *drv) +{ + return 0; +} static inline void module_remove_driver(struct device_driver *drv) { } #endif --- linux-xilinx-6.8.0.orig/drivers/base/bus.c +++ linux-xilinx-6.8.0/drivers/base/bus.c @@ -152,7 +152,8 @@ { struct bus_attribute *bus_attr = to_bus_attr(attr); struct subsys_private *subsys_priv = to_subsys_private(kobj); - ssize_t ret = 0; + /* return -EIO for reading a bus attribute without show() */ + ssize_t ret = -EIO; if (bus_attr->show) ret = bus_attr->show(subsys_priv->bus, buf); @@ -164,7 +165,8 @@ { struct bus_attribute *bus_attr = to_bus_attr(attr); struct subsys_private *subsys_priv = to_subsys_private(kobj); - ssize_t ret = 0; + /* return -EIO for writing a bus attribute without store() */ + ssize_t ret = -EIO; if (bus_attr->store) ret = bus_attr->store(subsys_priv->bus, buf, count); @@ -674,7 +676,12 @@ if (error) goto out_del_list; } - module_add_driver(drv->owner, drv); + error = module_add_driver(drv->owner, drv); + if (error) { + printk(KERN_ERR "%s: failed to create module links for %s\n", + __func__, drv->name); + goto out_detach; + } error = driver_create_file(drv, &driver_attr_uevent); if (error) { @@ -699,6 +706,8 @@ return 0; +out_detach: + driver_detach(drv); out_del_list: klist_del(&priv->knode_bus); out_unregister: @@ -913,6 +922,8 @@ bus_remove_file(bus, &bus_attr_uevent); bus_uevent_fail: kset_unregister(&priv->subsys); + /* Above kset_unregister() will kfree @priv */ + priv = NULL; out: kfree(priv); return retval; --- linux-xilinx-6.8.0.orig/drivers/base/cacheinfo.c +++ linux-xilinx-6.8.0/drivers/base/cacheinfo.c @@ -61,6 +61,9 @@ if (!cache_leaves(cpu)) return false; + if (!per_cpu_cacheinfo(cpu)) + return false; + llc = per_cpu_cacheinfo_idx(cpu, cache_leaves(cpu) - 1); return (llc->attributes & CACHE_ID) || !!llc->fw_token; @@ -554,7 +557,11 @@ */ ci_cacheinfo(cpu)->early_ci_levels = false; - if (cache_leaves(cpu) <= early_leaves) + /* + * Some architectures (e.g., x86) do not use early initialization. + * Allocate memory now in such case. + */ + if (cache_leaves(cpu) <= early_leaves && per_cpu_cacheinfo(cpu)) return 0; kfree(per_cpu_cacheinfo(cpu)); --- linux-xilinx-6.8.0.orig/drivers/base/class.c +++ linux-xilinx-6.8.0/drivers/base/class.c @@ -312,8 +312,12 @@ struct subsys_private *sp = class_to_subsys(class); struct klist_node *start_knode = NULL; - if (!sp) + memset(iter, 0, sizeof(*iter)); + if (!sp) { + pr_crit("%s: class %p was not registered yet\n", + __func__, class); return; + } if (start) start_knode = &start->p->knode_class; @@ -340,6 +344,9 @@ struct klist_node *knode; struct device *dev; + if (!iter->sp) + return NULL; + while (1) { knode = klist_next(&iter->ki); if (!knode) --- linux-xilinx-6.8.0.orig/drivers/base/core.c +++ linux-xilinx-6.8.0/drivers/base/core.c @@ -44,6 +44,7 @@ static void __fw_devlink_link_to_consumers(struct device *dev); static bool fw_devlink_drv_reg_done; static bool fw_devlink_best_effort; +static struct workqueue_struct *device_link_wq; /** * __fwnode_link_add - Create a link between two fwnode_handles. @@ -532,12 +533,26 @@ /* * It may take a while to complete this work because of the SRCU * synchronization in device_link_release_fn() and if the consumer or - * supplier devices get deleted when it runs, so put it into the "long" - * workqueue. + * supplier devices get deleted when it runs, so put it into the + * dedicated workqueue. */ - queue_work(system_long_wq, &link->rm_work); + queue_work(device_link_wq, &link->rm_work); } +/** + * device_link_wait_removal - Wait for ongoing devlink removal jobs to terminate + */ +void device_link_wait_removal(void) +{ + /* + * devlink removal jobs are queued in the dedicated work queue. + * To be sure that all removal jobs are terminated, ensure that any + * scheduled work has run to completion. + */ + flush_workqueue(device_link_wq); +} +EXPORT_SYMBOL_GPL(device_link_wait_removal); + static struct class devlink_class = { .name = "devlink", .dev_groups = devlink_groups, @@ -1011,7 +1026,8 @@ return NULL; list_for_each_entry(link, &fwnode->suppliers, c_hook) - if (!(link->flags & FWLINK_FLAG_CYCLE)) + if (!(link->flags & + (FWLINK_FLAG_CYCLE | FWLINK_FLAG_IGNORE))) return link->supplier; return NULL; @@ -1921,10 +1937,10 @@ * * Return true if one or more cycles were found. Otherwise, return false. */ -static bool __fw_devlink_relax_cycles(struct device *con, +static bool __fw_devlink_relax_cycles(struct fwnode_handle *con_handle, struct fwnode_handle *sup_handle) { - struct device *sup_dev = NULL, *par_dev = NULL; + struct device *sup_dev = NULL, *par_dev = NULL, *con_dev = NULL; struct fwnode_link *link; struct device_link *dev_link; bool ret = false; @@ -1941,28 +1957,31 @@ sup_handle->flags |= FWNODE_FLAG_VISITED; - sup_dev = get_dev_from_fwnode(sup_handle); - /* Termination condition. */ - if (sup_dev == con) { + if (sup_handle == con_handle) { pr_debug("----- cycle: start -----\n"); ret = true; goto out; } + sup_dev = get_dev_from_fwnode(sup_handle); + con_dev = get_dev_from_fwnode(con_handle); /* * If sup_dev is bound to a driver and @con hasn't started binding to a * driver, sup_dev can't be a consumer of @con. So, no need to check * further. */ if (sup_dev && sup_dev->links.status == DL_DEV_DRIVER_BOUND && - con->links.status == DL_DEV_NO_DRIVER) { + con_dev && con_dev->links.status == DL_DEV_NO_DRIVER) { ret = false; goto out; } list_for_each_entry(link, &sup_handle->suppliers, c_hook) { - if (__fw_devlink_relax_cycles(con, link->supplier)) { + if (link->flags & FWLINK_FLAG_IGNORE) + continue; + + if (__fw_devlink_relax_cycles(con_handle, link->supplier)) { __fwnode_link_cycle(link); ret = true; } @@ -1977,7 +1996,7 @@ else par_dev = fwnode_get_next_parent_dev(sup_handle); - if (par_dev && __fw_devlink_relax_cycles(con, par_dev->fwnode)) { + if (par_dev && __fw_devlink_relax_cycles(con_handle, par_dev->fwnode)) { pr_debug("%pfwf: cycle: child of %pfwf\n", sup_handle, par_dev->fwnode); ret = true; @@ -1995,7 +2014,7 @@ !(dev_link->flags & DL_FLAG_CYCLE)) continue; - if (__fw_devlink_relax_cycles(con, + if (__fw_devlink_relax_cycles(con_handle, dev_link->supplier->fwnode)) { pr_debug("%pfwf: cycle: depends on %pfwf\n", sup_handle, dev_link->supplier->fwnode); @@ -2008,6 +2027,7 @@ out: sup_handle->flags &= ~FWNODE_FLAG_VISITED; put_device(sup_dev); + put_device(con_dev); put_device(par_dev); return ret; } @@ -2040,10 +2060,8 @@ int ret = 0; u32 flags; - if (con->fwnode == link->consumer) - flags = fw_devlink_get_flags(link->flags); - else - flags = FW_DEVLINK_FLAGS_PERMISSIVE; + if (link->flags & FWLINK_FLAG_IGNORE) + return 0; /* * In some cases, a device P might also be a supplier to its child node @@ -2065,25 +2083,23 @@ return -EINVAL; /* - * SYNC_STATE_ONLY device links don't block probing and supports cycles. - * So, one might expect that cycle detection isn't necessary for them. - * However, if the device link was marked as SYNC_STATE_ONLY because - * it's part of a cycle, then we still need to do cycle detection. This - * is because the consumer and supplier might be part of multiple cycles - * and we need to detect all those cycles. + * Don't try to optimize by not calling the cycle detection logic under + * certain conditions. There's always some corner case that won't get + * detected. */ - if (!device_link_flag_is_sync_state_only(flags) || - flags & DL_FLAG_CYCLE) { - device_links_write_lock(); - if (__fw_devlink_relax_cycles(con, sup_handle)) { - __fwnode_link_cycle(link); - flags = fw_devlink_get_flags(link->flags); - pr_debug("----- cycle: end -----\n"); - dev_info(con, "Fixed dependency cycle(s) with %pfwf\n", - sup_handle); - } - device_links_write_unlock(); + device_links_write_lock(); + if (__fw_devlink_relax_cycles(link->consumer, sup_handle)) { + __fwnode_link_cycle(link); + pr_debug("----- cycle: end -----\n"); + pr_info("%pfwf: Fixed dependency cycle(s) with %pfwf\n", + link->consumer, sup_handle); } + device_links_write_unlock(); + + if (con->fwnode == link->consumer) + flags = fw_devlink_get_flags(link->flags); + else + flags = FW_DEVLINK_FLAGS_PERMISSIVE; if (sup_handle->flags & FWNODE_FLAG_NOT_DEVICE) sup_dev = fwnode_get_next_parent_dev(sup_handle); @@ -2657,8 +2673,11 @@ if (!env) return -ENOMEM; + /* Synchronize with really_probe() */ + device_lock(dev); /* let the kset specific function add its keys */ retval = kset->uevent_ops->uevent(&dev->kobj, env); + device_unlock(dev); if (retval) goto out; @@ -4002,6 +4021,41 @@ EXPORT_SYMBOL_GPL(device_for_each_child_reverse); /** + * device_for_each_child_reverse_from - device child iterator in reversed order. + * @parent: parent struct device. + * @from: optional starting point in child list + * @fn: function to be called for each device. + * @data: data for the callback. + * + * Iterate over @parent's child devices, starting at @from, and call @fn + * for each, passing it @data. This helper is identical to + * device_for_each_child_reverse() when @from is NULL. + * + * @fn is checked each iteration. If it returns anything other than 0, + * iteration stop and that value is returned to the caller of + * device_for_each_child_reverse_from(); + */ +int device_for_each_child_reverse_from(struct device *parent, + struct device *from, const void *data, + int (*fn)(struct device *, const void *)) +{ + struct klist_iter i; + struct device *child; + int error = 0; + + if (!parent->p) + return 0; + + klist_iter_init_node(&parent->p->klist_children, &i, + (from ? &from->p->knode_parent : NULL)); + while ((child = prev_device(&i)) && !error) + error = fn(child, data); + klist_iter_exit(&i); + return error; +} +EXPORT_SYMBOL_GPL(device_for_each_child_reverse_from); + +/** * device_find_child - device iterator for locating a particular device. * @parent: parent struct device * @match: Callback function to check device @@ -4098,9 +4152,14 @@ sysfs_dev_char_kobj = kobject_create_and_add("char", dev_kobj); if (!sysfs_dev_char_kobj) goto char_kobj_err; + device_link_wq = alloc_workqueue("device_link_wq", 0, 0); + if (!device_link_wq) + goto wq_err; return 0; + wq_err: + kobject_put(sysfs_dev_char_kobj); char_kobj_err: kobject_put(sysfs_dev_block_kobj); block_kobj_err: @@ -4467,9 +4526,11 @@ */ int device_rename(struct device *dev, const char *new_name) { + struct subsys_private *sp = NULL; struct kobject *kobj = &dev->kobj; char *old_device_name = NULL; int error; + bool is_link_renamed = false; dev = get_device(dev); if (!dev) @@ -4484,7 +4545,7 @@ } if (dev->class) { - struct subsys_private *sp = class_to_subsys(dev->class); + sp = class_to_subsys(dev->class); if (!sp) { error = -EINVAL; @@ -4493,16 +4554,19 @@ error = sysfs_rename_link_ns(&sp->subsys.kobj, kobj, old_device_name, new_name, kobject_namespace(kobj)); - subsys_put(sp); if (error) goto out; + + is_link_renamed = true; } error = kobject_rename(kobj, new_name); - if (error) - goto out; - out: + if (error && is_link_renamed) + sysfs_rename_link_ns(&sp->subsys.kobj, kobj, new_name, + old_device_name, kobject_namespace(kobj)); + subsys_put(sp); + put_device(dev); kfree(old_device_name); --- linux-xilinx-6.8.0.orig/drivers/base/cpu.c +++ linux-xilinx-6.8.0/drivers/base/cpu.c @@ -588,6 +588,7 @@ CPU_SHOW_VULN_FALLBACK(retbleed); CPU_SHOW_VULN_FALLBACK(spec_rstack_overflow); CPU_SHOW_VULN_FALLBACK(gds); +CPU_SHOW_VULN_FALLBACK(reg_file_data_sampling); static DEVICE_ATTR(meltdown, 0444, cpu_show_meltdown, NULL); static DEVICE_ATTR(spectre_v1, 0444, cpu_show_spectre_v1, NULL); @@ -602,6 +603,7 @@ static DEVICE_ATTR(retbleed, 0444, cpu_show_retbleed, NULL); static DEVICE_ATTR(spec_rstack_overflow, 0444, cpu_show_spec_rstack_overflow, NULL); static DEVICE_ATTR(gather_data_sampling, 0444, cpu_show_gds, NULL); +static DEVICE_ATTR(reg_file_data_sampling, 0444, cpu_show_reg_file_data_sampling, NULL); static struct attribute *cpu_root_vulnerabilities_attrs[] = { &dev_attr_meltdown.attr, @@ -617,6 +619,7 @@ &dev_attr_retbleed.attr, &dev_attr_spec_rstack_overflow.attr, &dev_attr_gather_data_sampling.attr, + &dev_attr_reg_file_data_sampling.attr, NULL }; --- linux-xilinx-6.8.0.orig/drivers/base/devres.c +++ linux-xilinx-6.8.0/drivers/base/devres.c @@ -567,6 +567,7 @@ grp->id = grp; if (id) grp->id = id; + grp->color = 0; spin_lock_irqsave(&dev->devres_lock, flags); add_dr(dev, &grp->node[0]); @@ -896,9 +897,12 @@ /* * Otherwise: allocate new, larger chunk. We need to allocate before * taking the lock as most probably the caller uses GFP_KERNEL. + * alloc_dr() will call check_dr_size() to reserve extra memory + * for struct devres automatically, so size @new_size user request + * is delivered to it directly as devm_kmalloc() does. */ new_dr = alloc_dr(devm_kmalloc_release, - total_new_size, gfp, dev_to_node(dev)); + new_size, gfp, dev_to_node(dev)); if (!new_dr) return NULL; @@ -1222,7 +1226,11 @@ */ void devm_free_percpu(struct device *dev, void __percpu *pdata) { - WARN_ON(devres_destroy(dev, devm_percpu_release, devm_percpu_match, + /* + * Use devres_release() to prevent memory leakage as + * devm_free_pages() does. + */ + WARN_ON(devres_release(dev, devm_percpu_release, devm_percpu_match, (__force void *)pdata)); } EXPORT_SYMBOL_GPL(devm_free_percpu); --- linux-xilinx-6.8.0.orig/drivers/base/firmware_loader/main.c +++ linux-xilinx-6.8.0/drivers/base/firmware_loader/main.c @@ -825,19 +825,18 @@ shash->tfm = alg; if (crypto_shash_digest(shash, fw->data, fw->size, sha256buf) < 0) - goto out_shash; + goto out_free; for (int i = 0; i < SHA256_DIGEST_SIZE; i++) sprintf(&outbuf[i * 2], "%02x", sha256buf[i]); outbuf[SHA256_BLOCK_SIZE] = 0; dev_dbg(device, "Loaded FW: %s, sha256: %s\n", name, outbuf); -out_shash: - crypto_free_shash(alg); out_free: kfree(shash); kfree(outbuf); kfree(sha256buf); + crypto_free_shash(alg); } #else static void fw_log_firmware_info(const struct firmware *fw, const char *name, @@ -845,6 +844,26 @@ {} #endif +/* + * Reject firmware file names with ".." path components. + * There are drivers that construct firmware file names from device-supplied + * strings, and we don't want some device to be able to tell us "I would like to + * be sent my firmware from ../../../etc/shadow, please". + * + * Search for ".." surrounded by either '/' or start/end of string. + * + * This intentionally only looks at the firmware name, not at the firmware base + * directory or at symlink contents. + */ +static bool name_contains_dotdot(const char *name) +{ + size_t name_len = strlen(name); + + return strcmp(name, "..") == 0 || strncmp(name, "../", 3) == 0 || + strstr(name, "/../") != NULL || + (name_len >= 3 && strcmp(name+name_len-3, "/..") == 0); +} + /* called from request_firmware() and request_firmware_work_func() */ static int _request_firmware(const struct firmware **firmware_p, const char *name, @@ -865,6 +884,14 @@ goto out; } + if (name_contains_dotdot(name)) { + dev_warn(device, + "Firmware load for '%s' refused, path contains '..' component\n", + name); + ret = -EINVAL; + goto out; + } + ret = _request_firmware_prepare(&fw, name, device, buf, size, offset, opt_flags); if (ret <= 0) /* error or already assigned */ @@ -942,6 +969,8 @@ * @name will be used as $FIRMWARE in the uevent environment and * should be distinctive enough not to be confused with any other * firmware image for this or any other device. + * It must not contain any ".." path components - "foo/bar..bin" is + * allowed, but "foo/../bar.bin" is not. * * Caller must hold the reference count of @device. * --- linux-xilinx-6.8.0.orig/drivers/base/memory.c +++ linux-xilinx-6.8.0/drivers/base/memory.c @@ -188,6 +188,7 @@ unsigned long start_pfn = section_nr_to_pfn(mem->start_section_nr); unsigned long nr_pages = PAGES_PER_SECTION * sections_per_block; unsigned long nr_vmemmap_pages = 0; + struct memory_notify arg; struct zone *zone; int ret; @@ -207,9 +208,19 @@ if (mem->altmap) nr_vmemmap_pages = mem->altmap->free; + arg.altmap_start_pfn = start_pfn; + arg.altmap_nr_pages = nr_vmemmap_pages; + arg.start_pfn = start_pfn + nr_vmemmap_pages; + arg.nr_pages = nr_pages - nr_vmemmap_pages; mem_hotplug_begin(); + ret = memory_notify(MEM_PREPARE_ONLINE, &arg); + ret = notifier_to_errno(ret); + if (ret) + goto out_notifier; + if (nr_vmemmap_pages) { - ret = mhp_init_memmap_on_memory(start_pfn, nr_vmemmap_pages, zone); + ret = mhp_init_memmap_on_memory(start_pfn, nr_vmemmap_pages, + zone, mem->altmap->inaccessible); if (ret) goto out; } @@ -231,7 +242,11 @@ nr_vmemmap_pages); mem->zone = zone; + mem_hotplug_done(); + return ret; out: + memory_notify(MEM_FINISH_OFFLINE, &arg); +out_notifier: mem_hotplug_done(); return ret; } @@ -244,6 +259,7 @@ unsigned long start_pfn = section_nr_to_pfn(mem->start_section_nr); unsigned long nr_pages = PAGES_PER_SECTION * sections_per_block; unsigned long nr_vmemmap_pages = 0; + struct memory_notify arg; int ret; if (!mem->zone) @@ -275,6 +291,11 @@ mhp_deinit_memmap_on_memory(start_pfn, nr_vmemmap_pages); mem->zone = NULL; + arg.altmap_start_pfn = start_pfn; + arg.altmap_nr_pages = nr_vmemmap_pages; + arg.start_pfn = start_pfn + nr_vmemmap_pages; + arg.nr_pages = nr_pages - nr_vmemmap_pages; + memory_notify(MEM_FINISH_OFFLINE, &arg); out: mem_hotplug_done(); return ret; --- linux-xilinx-6.8.0.orig/drivers/base/module.c +++ linux-xilinx-6.8.0/drivers/base/module.c @@ -30,14 +30,14 @@ mutex_unlock(&drivers_dir_mutex); } -void module_add_driver(struct module *mod, struct device_driver *drv) +int module_add_driver(struct module *mod, struct device_driver *drv) { char *driver_name; - int no_warn; struct module_kobject *mk = NULL; + int ret; if (!drv) - return; + return 0; if (mod) mk = &mod->mkobj; @@ -56,17 +56,41 @@ } if (!mk) - return; + return 0; + + ret = sysfs_create_link(&drv->p->kobj, &mk->kobj, "module"); + if (ret) + return ret; - /* Don't check return codes; these calls are idempotent */ - no_warn = sysfs_create_link(&drv->p->kobj, &mk->kobj, "module"); driver_name = make_driver_name(drv); - if (driver_name) { - module_create_drivers_dir(mk); - no_warn = sysfs_create_link(mk->drivers_dir, &drv->p->kobj, - driver_name); - kfree(driver_name); + if (!driver_name) { + ret = -ENOMEM; + goto out_remove_kobj; + } + + module_create_drivers_dir(mk); + if (!mk->drivers_dir) { + ret = -EINVAL; + goto out_free_driver_name; } + + ret = sysfs_create_link(mk->drivers_dir, &drv->p->kobj, driver_name); + if (ret) + goto out_remove_drivers_dir; + + kfree(driver_name); + + return 0; + +out_remove_drivers_dir: + sysfs_remove_link(mk->drivers_dir, driver_name); + +out_free_driver_name: + kfree(driver_name); + +out_remove_kobj: + sysfs_remove_link(&drv->p->kobj, "module"); + return ret; } void module_remove_driver(struct device_driver *drv) --- linux-xilinx-6.8.0.orig/drivers/base/node.c +++ linux-xilinx-6.8.0/drivers/base/node.c @@ -126,7 +126,7 @@ } static struct node_access_nodes *node_init_node_access(struct node *node, - unsigned int access) + enum access_coordinate_class access) { struct node_access_nodes *access_node; struct device *dev; @@ -191,7 +191,7 @@ * @access: The access class the for the given attributes */ void node_set_perf_attrs(unsigned int nid, struct access_coordinate *coord, - unsigned int access) + enum access_coordinate_class access) { struct node_access_nodes *c; struct node *node; @@ -689,7 +689,7 @@ */ int register_memory_node_under_compute_node(unsigned int mem_nid, unsigned int cpu_nid, - unsigned int access) + enum access_coordinate_class access) { struct node *init_node, *targ_node; struct node_access_nodes *initiator, *target; --- linux-xilinx-6.8.0.orig/drivers/base/power/runtime.c +++ linux-xilinx-6.8.0/drivers/base/power/runtime.c @@ -1176,7 +1176,7 @@ EXPORT_SYMBOL_GPL(__pm_runtime_resume); /** - * pm_runtime_get_if_active - Conditionally bump up device usage counter. + * pm_runtime_get_conditional - Conditionally bump up device usage counter. * @dev: Device to handle. * @ign_usage_count: Whether or not to look at the current usage counter value. * @@ -1197,7 +1197,7 @@ * The caller is responsible for decrementing the runtime PM usage counter of * @dev after this function has returned a positive value for it. */ -int pm_runtime_get_if_active(struct device *dev, bool ign_usage_count) +static int pm_runtime_get_conditional(struct device *dev, bool ign_usage_count) { unsigned long flags; int retval; @@ -1218,9 +1218,40 @@ return retval; } + +/** + * pm_runtime_get_if_active - Bump up runtime PM usage counter if the device is + * in active state + * @dev: Target device. + * + * Increment the runtime PM usage counter of @dev if its runtime PM status is + * %RPM_ACTIVE, in which case it returns 1. If the device is in a different + * state, 0 is returned. -EINVAL is returned if runtime PM is disabled for the + * device, in which case also the usage_count will remain unmodified. + */ +int pm_runtime_get_if_active(struct device *dev) +{ + return pm_runtime_get_conditional(dev, true); +} EXPORT_SYMBOL_GPL(pm_runtime_get_if_active); /** + * pm_runtime_get_if_in_use - Conditionally bump up runtime PM usage counter. + * @dev: Target device. + * + * Increment the runtime PM usage counter of @dev if its runtime PM status is + * %RPM_ACTIVE and its runtime PM usage counter is greater than 0, in which case + * it returns 1. If the device is in a different state or its usage_count is 0, + * 0 is returned. -EINVAL is returned if runtime PM is disabled for the device, + * in which case also the usage_count will remain unmodified. + */ +int pm_runtime_get_if_in_use(struct device *dev) +{ + return pm_runtime_get_conditional(dev, false); +} +EXPORT_SYMBOL_GPL(pm_runtime_get_if_in_use); + +/** * __pm_runtime_set_status - Set runtime PM status of a device. * @dev: Device to handle. * @status: New runtime PM status of the device. --- linux-xilinx-6.8.0.orig/drivers/base/power/wakeirq.c +++ linux-xilinx-6.8.0/drivers/base/power/wakeirq.c @@ -313,8 +313,10 @@ return; if (wirq->status & WAKE_IRQ_DEDICATED_MANAGED && - wirq->status & WAKE_IRQ_DEDICATED_REVERSE) + wirq->status & WAKE_IRQ_DEDICATED_REVERSE) { enable_irq(wirq->irq); + wirq->status |= WAKE_IRQ_DEDICATED_ENABLED; + } } /** --- linux-xilinx-6.8.0.orig/drivers/base/regmap/internal.h +++ linux-xilinx-6.8.0/drivers/base/regmap/internal.h @@ -59,6 +59,7 @@ unsigned long raw_spinlock_flags; }; }; + struct lock_class_key *lock_key; regmap_lock lock; regmap_unlock unlock; void *lock_arg; /* This is passed to lock/unlock functions */ --- linux-xilinx-6.8.0.orig/drivers/base/regmap/regcache-maple.c +++ linux-xilinx-6.8.0/drivers/base/regmap/regcache-maple.c @@ -110,9 +110,10 @@ struct maple_tree *mt = map->cache; MA_STATE(mas, mt, min, max); unsigned long *entry, *lower, *upper; - unsigned long lower_index, lower_last; + /* initialized to work around false-positive -Wuninitialized warning */ + unsigned long lower_index = 0, lower_last = 0; unsigned long upper_index, upper_last; - int ret; + int ret = 0; lower = NULL; upper = NULL; @@ -145,7 +146,7 @@ upper_index = max + 1; upper_last = mas.last; - upper = kmemdup(&entry[max + 1], + upper = kmemdup(&entry[max - mas.index + 1], ((mas.last - max) * sizeof(unsigned long)), map->alloc_flags); @@ -244,7 +245,7 @@ unsigned long lmin = min; unsigned long lmax = max; unsigned int r, v, sync_start; - int ret; + int ret = 0; bool sync_needed = false; map->cache_bypass = true; @@ -355,6 +356,9 @@ mt_init(mt); + if (!mt_external_lock(mt) && map->lock_key) + lockdep_set_class_and_subclass(&mt->ma_lock, map->lock_key, 1); + if (!map->num_reg_defaults) return 0; --- linux-xilinx-6.8.0.orig/drivers/base/regmap/regmap-i2c.c +++ linux-xilinx-6.8.0/drivers/base/regmap/regmap-i2c.c @@ -350,7 +350,8 @@ if (quirks->max_write_len && (bus->max_raw_write == 0 || bus->max_raw_write > quirks->max_write_len)) - max_write = quirks->max_write_len; + max_write = quirks->max_write_len - + (config->reg_bits + config->pad_bits) / BITS_PER_BYTE; if (max_read || max_write) { ret_bus = kmemdup(bus, sizeof(*bus), GFP_KERNEL); --- linux-xilinx-6.8.0.orig/drivers/base/regmap/regmap-irq.c +++ linux-xilinx-6.8.0/drivers/base/regmap/regmap-irq.c @@ -514,12 +514,16 @@ return IRQ_NONE; } +static struct lock_class_key regmap_irq_lock_class; +static struct lock_class_key regmap_irq_request_class; + static int regmap_irq_map(struct irq_domain *h, unsigned int virq, irq_hw_number_t hw) { struct regmap_irq_chip_data *data = h->host_data; irq_set_chip_data(virq, data); + irq_set_lockdep_class(virq, ®map_irq_lock_class, ®map_irq_request_class); irq_set_chip(virq, &data->irq_chip); irq_set_nested_thread(virq, 1); irq_set_parent(virq, data->irq); @@ -890,6 +894,7 @@ kfree(d->wake_buf); kfree(d->mask_buf_def); kfree(d->mask_buf); + kfree(d->main_status_buf); kfree(d->status_buf); kfree(d->status_reg_buf); if (d->config_buf) { @@ -965,6 +970,7 @@ kfree(d->wake_buf); kfree(d->mask_buf_def); kfree(d->mask_buf); + kfree(d->main_status_buf); kfree(d->status_reg_buf); kfree(d->status_buf); if (d->config_buf) { --- linux-xilinx-6.8.0.orig/drivers/base/regmap/regmap-kunit.c +++ linux-xilinx-6.8.0/drivers/base/regmap/regmap-kunit.c @@ -4,11 +4,14 @@ // // Copyright 2023 Arm Ltd +#include #include #include "internal.h" #define BLOCK_TEST_SIZE 12 +KUNIT_DEFINE_ACTION_WRAPPER(regmap_exit_action, regmap_exit, struct regmap *); + static void get_changed_bytes(void *orig, void *new, size_t size) { char *o = orig; @@ -70,9 +73,9 @@ struct regmap_ram_data **data) { unsigned int *buf; - struct regmap *ret; + struct regmap *ret = ERR_PTR(-ENOMEM); size_t size = (config->max_register + 1) * sizeof(unsigned int); - int i; + int i, error; struct reg_default *defaults; config->disable_locking = config->cache_type == REGCACHE_RBTREE || @@ -86,15 +89,17 @@ *data = kzalloc(sizeof(**data), GFP_KERNEL); if (!(*data)) - return ERR_PTR(-ENOMEM); + goto out_free; (*data)->vals = buf; if (config->num_reg_defaults) { - defaults = kcalloc(config->num_reg_defaults, - sizeof(struct reg_default), - GFP_KERNEL); + defaults = kunit_kcalloc(test, + config->num_reg_defaults, + sizeof(struct reg_default), + GFP_KERNEL); if (!defaults) - return ERR_PTR(-ENOMEM); + goto out_free; + config->reg_defaults = defaults; for (i = 0; i < config->num_reg_defaults; i++) { @@ -104,10 +109,19 @@ } ret = regmap_init_ram(config, *data); - if (IS_ERR(ret)) { - kfree(buf); - kfree(*data); - } + if (IS_ERR(ret)) + goto out_free; + + /* This calls regmap_exit() on failure, which frees buf and *data */ + error = kunit_add_action_or_reset(test, regmap_exit_action, ret); + if (error) + ret = ERR_PTR(error); + + return ret; + +out_free: + kfree(buf); + kfree(*data); return ret; } @@ -142,8 +156,6 @@ /* If using a cache the cache satisfied the read */ KUNIT_EXPECT_EQ(test, t->type == REGCACHE_NONE, data->read[0]); - - regmap_exit(map); } static void bulk_write(struct kunit *test) @@ -179,8 +191,6 @@ /* If using a cache the cache satisfied the read */ for (i = 0; i < BLOCK_TEST_SIZE; i++) KUNIT_EXPECT_EQ(test, t->type == REGCACHE_NONE, data->read[i]); - - regmap_exit(map); } static void bulk_read(struct kunit *test) @@ -212,8 +222,6 @@ /* If using a cache the cache satisfied the read */ for (i = 0; i < BLOCK_TEST_SIZE; i++) KUNIT_EXPECT_EQ(test, t->type == REGCACHE_NONE, data->read[i]); - - regmap_exit(map); } static void write_readonly(struct kunit *test) @@ -247,8 +255,6 @@ /* Did that match what we see on the device? */ for (i = 0; i < BLOCK_TEST_SIZE; i++) KUNIT_EXPECT_EQ(test, i != 5, data->written[i]); - - regmap_exit(map); } static void read_writeonly(struct kunit *test) @@ -287,8 +293,6 @@ /* Did we trigger a hardware access? */ KUNIT_EXPECT_FALSE(test, data->read[5]); - - regmap_exit(map); } static void reg_defaults(struct kunit *test) @@ -401,8 +405,6 @@ break; } } - - regmap_exit(map); } static void stride(struct kunit *test) @@ -444,8 +446,6 @@ KUNIT_EXPECT_TRUE(test, data->written[i]); } } - - regmap_exit(map); } static struct regmap_range_cfg test_range = { @@ -546,8 +546,6 @@ KUNIT_EXPECT_FALSE(test, data->read[i]); KUNIT_EXPECT_FALSE(test, data->written[i]); } - - regmap_exit(map); } /* Try to stress dynamic creation of cache data structures */ @@ -601,8 +599,6 @@ KUNIT_EXPECT_EQ(test, rval, vals[i]); KUNIT_EXPECT_EQ(test, t->type == REGCACHE_NONE, data->read[i]); } - - regmap_exit(map); } static void cache_bypass(struct kunit *test) @@ -639,8 +635,6 @@ regcache_cache_bypass(map, false); KUNIT_EXPECT_EQ(test, 0, regmap_read(map, 0, &rval)); KUNIT_EXPECT_EQ(test, val, rval); - - regmap_exit(map); } static void cache_sync(struct kunit *test) @@ -677,8 +671,6 @@ KUNIT_EXPECT_MEMEQ(test, data->vals, val, sizeof(val)); for (i = 0; i < BLOCK_TEST_SIZE; i++) KUNIT_EXPECT_EQ(test, true, data->written[i]); - - regmap_exit(map); } static void cache_sync_defaults(struct kunit *test) @@ -713,8 +705,6 @@ /* Did we just sync the one register we touched? */ for (i = 0; i < BLOCK_TEST_SIZE; i++) KUNIT_EXPECT_EQ(test, i == 2, data->written[i]); - - regmap_exit(map); } static void cache_sync_readonly(struct kunit *test) @@ -754,8 +744,6 @@ /* Did that match what we see on the device? */ for (i = 0; i < BLOCK_TEST_SIZE; i++) KUNIT_EXPECT_EQ(test, i != 5, data->written[i]); - - regmap_exit(map); } static void cache_sync_patch(struct kunit *test) @@ -815,8 +803,6 @@ break; } } - - regmap_exit(map); } static void cache_drop(struct kunit *test) @@ -857,8 +843,6 @@ for (i = 0; i < BLOCK_TEST_SIZE; i++) KUNIT_EXPECT_EQ(test, data->read[i], i >= 3 && i <= 5); KUNIT_EXPECT_MEMEQ(test, data->vals, rval, sizeof(rval)); - - regmap_exit(map); } static void cache_present(struct kunit *test) @@ -896,8 +880,6 @@ /* Now everything should be cached */ for (i = 0; i < BLOCK_TEST_SIZE; i++) KUNIT_ASSERT_TRUE(test, regcache_reg_cached(map, i)); - - regmap_exit(map); } /* Check that caching the window register works with sync */ @@ -1002,9 +984,9 @@ struct regmap_ram_data **data) { u16 *buf; - struct regmap *ret; + struct regmap *ret = ERR_PTR(-ENOMEM); size_t size = (config->max_register + 1) * config->reg_bits / 8; - int i; + int i, error; struct reg_default *defaults; config->cache_type = test_type->cache_type; @@ -1020,15 +1002,16 @@ *data = kzalloc(sizeof(**data), GFP_KERNEL); if (!(*data)) - return ERR_PTR(-ENOMEM); + goto out_free; (*data)->vals = (void *)buf; config->num_reg_defaults = config->max_register + 1; - defaults = kcalloc(config->num_reg_defaults, - sizeof(struct reg_default), - GFP_KERNEL); + defaults = kunit_kcalloc(test, + config->num_reg_defaults, + sizeof(struct reg_default), + GFP_KERNEL); if (!defaults) - return ERR_PTR(-ENOMEM); + goto out_free; config->reg_defaults = defaults; for (i = 0; i < config->num_reg_defaults; i++) { @@ -1041,7 +1024,8 @@ defaults[i].def = be16_to_cpu(buf[i]); break; default: - return ERR_PTR(-EINVAL); + ret = ERR_PTR(-EINVAL); + goto out_free; } } @@ -1053,10 +1037,19 @@ config->num_reg_defaults = 0; ret = regmap_init_raw_ram(config, *data); - if (IS_ERR(ret)) { - kfree(buf); - kfree(*data); - } + if (IS_ERR(ret)) + goto out_free; + + /* This calls regmap_exit() on failure, which frees buf and *data */ + error = kunit_add_action_or_reset(test, regmap_exit_action, ret); + if (error) + ret = ERR_PTR(error); + + return ret; + +out_free: + kfree(buf); + kfree(*data); return ret; } @@ -1082,8 +1075,6 @@ KUNIT_EXPECT_EQ(test, 0, regmap_read(map, i, &rval)); KUNIT_EXPECT_EQ(test, config.reg_defaults[i].def, rval); } - - regmap_exit(map); } static void raw_read_defaults(struct kunit *test) @@ -1105,7 +1096,7 @@ return; val_len = sizeof(*rval) * (config.max_register + 1); - rval = kmalloc(val_len, GFP_KERNEL); + rval = kunit_kmalloc(test, val_len, GFP_KERNEL); KUNIT_ASSERT_TRUE(test, rval != NULL); if (!rval) return; @@ -1120,9 +1111,6 @@ KUNIT_EXPECT_EQ(test, def, le16_to_cpu(rval[i])); } } - - kfree(rval); - regmap_exit(map); } static void raw_write_read_single(struct kunit *test) @@ -1147,8 +1135,6 @@ KUNIT_EXPECT_EQ(test, 0, regmap_write(map, 0, val)); KUNIT_EXPECT_EQ(test, 0, regmap_read(map, 0, &rval)); KUNIT_EXPECT_EQ(test, val, rval); - - regmap_exit(map); } static void raw_write(struct kunit *test) @@ -1199,8 +1185,6 @@ /* The values should appear in the "hardware" */ KUNIT_EXPECT_MEMEQ(test, &hw_buf[2], val, sizeof(val)); - - regmap_exit(map); } static bool reg_zero(struct device *dev, unsigned int reg) @@ -1259,8 +1243,6 @@ /* Make sure we didn't touch the register after the noinc register */ KUNIT_EXPECT_EQ(test, 0, regmap_read(map, 1, &val)); KUNIT_ASSERT_EQ(test, val_test, val); - - regmap_exit(map); } static void raw_sync(struct kunit *test) @@ -1337,8 +1319,6 @@ /* The values should now appear in the "hardware" */ KUNIT_EXPECT_MEMEQ(test, &hw_buf[2], &val[0], sizeof(val)); - - regmap_exit(map); } static struct kunit_case regmap_test_cases[] = { --- linux-xilinx-6.8.0.orig/drivers/base/regmap/regmap-spi.c +++ linux-xilinx-6.8.0/drivers/base/regmap/regmap-spi.c @@ -122,8 +122,7 @@ return ERR_PTR(-ENOMEM); max_msg_size = spi_max_message_size(spi); - reg_reserve_size = config->reg_bits / BITS_PER_BYTE - + config->pad_bits / BITS_PER_BYTE; + reg_reserve_size = (config->reg_bits + config->pad_bits) / BITS_PER_BYTE; if (max_size + reg_reserve_size > max_msg_size) max_size -= reg_reserve_size; --- linux-xilinx-6.8.0.orig/drivers/base/regmap/regmap.c +++ linux-xilinx-6.8.0/drivers/base/regmap/regmap.c @@ -598,6 +598,17 @@ } EXPORT_SYMBOL_GPL(regmap_attach_dev); +static int dev_get_regmap_match(struct device *dev, void *res, void *data); + +static int regmap_detach_dev(struct device *dev, struct regmap *map) +{ + if (!dev) + return 0; + + return devres_release(dev, dev_get_regmap_release, + dev_get_regmap_match, (void *)map->name); +} + static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus, const struct regmap_config *config) { @@ -745,6 +756,7 @@ lock_key, lock_name); } map->lock_arg = map; + map->lock_key = lock_key; } /* @@ -1050,13 +1062,13 @@ /* Sanity check */ if (range_cfg->range_max < range_cfg->range_min) { - dev_err(map->dev, "Invalid range %d: %d < %d\n", i, + dev_err(map->dev, "Invalid range %d: %u < %u\n", i, range_cfg->range_max, range_cfg->range_min); goto err_range; } if (range_cfg->range_max > map->max_register) { - dev_err(map->dev, "Invalid range %d: %d > %d\n", i, + dev_err(map->dev, "Invalid range %d: %u > %u\n", i, range_cfg->range_max, map->max_register); goto err_range; } @@ -1442,6 +1454,7 @@ { struct regmap_async *async; + regmap_detach_dev(map->dev, map); regcache_exit(map); regmap_debugfs_exit(map); regmap_range_exit(map); @@ -2837,6 +2850,43 @@ EXPORT_SYMBOL_GPL(regmap_read); /** + * regmap_read_bypassed() - Read a value from a single register direct + * from the device, bypassing the cache + * + * @map: Register map to read from + * @reg: Register to be read from + * @val: Pointer to store read value + * + * A value of zero will be returned on success, a negative errno will + * be returned in error cases. + */ +int regmap_read_bypassed(struct regmap *map, unsigned int reg, unsigned int *val) +{ + int ret; + bool bypass, cache_only; + + if (!IS_ALIGNED(reg, map->reg_stride)) + return -EINVAL; + + map->lock(map->lock_arg); + + bypass = map->cache_bypass; + cache_only = map->cache_only; + map->cache_bypass = true; + map->cache_only = false; + + ret = _regmap_read(map, reg, val); + + map->cache_bypass = bypass; + map->cache_only = cache_only; + + map->unlock(map->lock_arg); + + return ret; +} +EXPORT_SYMBOL_GPL(regmap_read_bypassed); + +/** * regmap_raw_read() - Read raw data from the device * * @map: Register map to read from --- linux-xilinx-6.8.0.orig/drivers/base/topology.c +++ linux-xilinx-6.8.0/drivers/base/topology.c @@ -27,9 +27,17 @@ loff_t off, size_t count) \ { \ struct device *dev = kobj_to_dev(kobj); \ + cpumask_var_t mask; \ + ssize_t n; \ \ - return cpumap_print_bitmask_to_buf(buf, topology_##mask(dev->id), \ - off, count); \ + if (!alloc_cpumask_var(&mask, GFP_KERNEL)) \ + return -ENOMEM; \ + \ + cpumask_copy(mask, topology_##mask(dev->id)); \ + n = cpumap_print_bitmask_to_buf(buf, mask, off, count); \ + free_cpumask_var(mask); \ + \ + return n; \ } \ \ static ssize_t name##_list_read(struct file *file, struct kobject *kobj, \ @@ -37,9 +45,17 @@ loff_t off, size_t count) \ { \ struct device *dev = kobj_to_dev(kobj); \ + cpumask_var_t mask; \ + ssize_t n; \ + \ + if (!alloc_cpumask_var(&mask, GFP_KERNEL)) \ + return -ENOMEM; \ + \ + cpumask_copy(mask, topology_##mask(dev->id)); \ + n = cpumap_print_list_to_buf(buf, mask, off, count); \ + free_cpumask_var(mask); \ \ - return cpumap_print_list_to_buf(buf, topology_##mask(dev->id), \ - off, count); \ + return n; \ } define_id_show_func(physical_package_id, "%d"); --- linux-xilinx-6.8.0.orig/drivers/base/trace.h +++ linux-xilinx-6.8.0/drivers/base/trace.h @@ -24,18 +24,18 @@ __field(struct device *, dev) __field(const char *, op) __field(void *, node) - __field(const char *, name) + __string(name, name) __field(size_t, size) ), TP_fast_assign( __assign_str(devname, dev_name(dev)); __entry->op = op; __entry->node = node; - __entry->name = name; + __assign_str(name, name); __entry->size = size; ), TP_printk("%s %3s %p %s (%zu bytes)", __get_str(devname), - __entry->op, __entry->node, __entry->name, __entry->size) + __entry->op, __entry->node, __get_str(name), __entry->size) ); DEFINE_EVENT(devres, devres_log, --- linux-xilinx-6.8.0.orig/drivers/block/aoe/aoecmd.c +++ linux-xilinx-6.8.0/drivers/block/aoe/aoecmd.c @@ -361,6 +361,7 @@ } ah->cmdstat = ATA_CMD_PIO_READ | writebit | extbit; + dev_hold(t->ifp->nd); skb->dev = t->ifp->nd; } @@ -401,6 +402,8 @@ __skb_queue_head_init(&queue); __skb_queue_tail(&queue, skb); aoenet_xmit(&queue); + } else { + dev_put(f->t->ifp->nd); } return 1; } @@ -419,13 +422,16 @@ rcu_read_lock(); for_each_netdev_rcu(&init_net, ifp) { dev_hold(ifp); - if (!is_aoe_netif(ifp)) - goto cont; + if (!is_aoe_netif(ifp)) { + dev_put(ifp); + continue; + } skb = new_skb(sizeof *h + sizeof *ch); if (skb == NULL) { printk(KERN_INFO "aoe: skb alloc failure\n"); - goto cont; + dev_put(ifp); + continue; } skb_put(skb, sizeof *h + sizeof *ch); skb->dev = ifp; @@ -440,9 +446,6 @@ h->major = cpu_to_be16(aoemajor); h->minor = aoeminor; h->cmd = AOECMD_CFG; - -cont: - dev_put(ifp); } rcu_read_unlock(); } @@ -483,10 +486,13 @@ memcpy(h->dst, t->addr, sizeof h->dst); memcpy(h->src, t->ifp->nd->dev_addr, sizeof h->src); + dev_hold(t->ifp->nd); skb->dev = t->ifp->nd; skb = skb_clone(skb, GFP_ATOMIC); - if (skb == NULL) + if (skb == NULL) { + dev_put(t->ifp->nd); return; + } f->sent = ktime_get(); __skb_queue_head_init(&queue); __skb_queue_tail(&queue, skb); @@ -617,6 +623,8 @@ __skb_queue_head_init(&queue); __skb_queue_tail(&queue, skb); aoenet_xmit(&queue); + } else { + dev_put(f->t->ifp->nd); } } @@ -1395,6 +1403,7 @@ ah->cmdstat = ATA_CMD_ID_ATA; ah->lba3 = 0xa0; + dev_hold(t->ifp->nd); skb->dev = t->ifp->nd; d->rttavg = RTTAVG_INIT; @@ -1404,6 +1413,8 @@ skb = skb_clone(skb, GFP_ATOMIC); if (skb) f->sent = ktime_get(); + else + dev_put(t->ifp->nd); return skb; } --- linux-xilinx-6.8.0.orig/drivers/block/aoe/aoenet.c +++ linux-xilinx-6.8.0/drivers/block/aoe/aoenet.c @@ -63,6 +63,7 @@ pr_warn("aoe: packet could not be sent on %s. %s\n", ifp ? ifp->name : "netif", "consider increasing tx_queue_len"); + dev_put(ifp); spin_lock_irq(&txlock); } return 0; --- linux-xilinx-6.8.0.orig/drivers/block/brd.c +++ linux-xilinx-6.8.0/drivers/block/brd.c @@ -310,8 +310,40 @@ * (should share code eventually). */ static LIST_HEAD(brd_devices); +static DEFINE_MUTEX(brd_devices_mutex); static struct dentry *brd_debugfs_dir; +static struct brd_device *brd_find_or_alloc_device(int i) +{ + struct brd_device *brd; + + mutex_lock(&brd_devices_mutex); + list_for_each_entry(brd, &brd_devices, brd_list) { + if (brd->brd_number == i) { + mutex_unlock(&brd_devices_mutex); + return ERR_PTR(-EEXIST); + } + } + + brd = kzalloc(sizeof(*brd), GFP_KERNEL); + if (!brd) { + mutex_unlock(&brd_devices_mutex); + return ERR_PTR(-ENOMEM); + } + brd->brd_number = i; + list_add_tail(&brd->brd_list, &brd_devices); + mutex_unlock(&brd_devices_mutex); + return brd; +} + +static void brd_free_device(struct brd_device *brd) +{ + mutex_lock(&brd_devices_mutex); + list_del(&brd->brd_list); + mutex_unlock(&brd_devices_mutex); + kfree(brd); +} + static int brd_alloc(int i) { struct brd_device *brd; @@ -319,14 +351,9 @@ char buf[DISK_NAME_LEN]; int err = -ENOMEM; - list_for_each_entry(brd, &brd_devices, brd_list) - if (brd->brd_number == i) - return -EEXIST; - brd = kzalloc(sizeof(*brd), GFP_KERNEL); - if (!brd) - return -ENOMEM; - brd->brd_number = i; - list_add_tail(&brd->brd_list, &brd_devices); + brd = brd_find_or_alloc_device(i); + if (IS_ERR(brd)) + return PTR_ERR(brd); xa_init(&brd->brd_pages); @@ -369,8 +396,7 @@ out_cleanup_disk: put_disk(disk); out_free_dev: - list_del(&brd->brd_list); - kfree(brd); + brd_free_device(brd); return err; } @@ -389,8 +415,7 @@ del_gendisk(brd->brd_disk); put_disk(brd->brd_disk); brd_free_pages(brd); - list_del(&brd->brd_list); - kfree(brd); + brd_free_device(brd); } } @@ -417,16 +442,6 @@ { int err, i; - brd_check_and_reset_par(); - - brd_debugfs_dir = debugfs_create_dir("ramdisk_pages", NULL); - - for (i = 0; i < rd_nr; i++) { - err = brd_alloc(i); - if (err) - goto out_free; - } - /* * brd module now has a feature to instantiate underlying device * structure on-demand, provided that there is an access dev node. @@ -442,11 +457,18 @@ * dynamically. */ + brd_check_and_reset_par(); + + brd_debugfs_dir = debugfs_create_dir("ramdisk_pages", NULL); + if (__register_blkdev(RAMDISK_MAJOR, "ramdisk", brd_probe)) { err = -EIO; goto out_free; } + for (i = 0; i < rd_nr; i++) + brd_alloc(i); + pr_info("brd: module loaded\n"); return 0; --- linux-xilinx-6.8.0.orig/drivers/block/drbd/drbd_main.c +++ linux-xilinx-6.8.0/drivers/block/drbd/drbd_main.c @@ -1550,7 +1550,7 @@ * put_page(); and would cause either a VM_BUG directly, or * __page_cache_release a page that would actually still be referenced * by someone, leading to some obscure delayed Oops somewhere else. */ - if (!drbd_disable_sendpage && sendpage_ok(page)) + if (!drbd_disable_sendpage && sendpages_ok(page, len, offset)) msg.msg_flags |= MSG_NOSIGNAL | MSG_SPLICE_PAGES; drbd_update_congested(peer_device->connection); @@ -3392,10 +3392,12 @@ void drbd_uuid_set_bm(struct drbd_device *device, u64 val) __must_hold(local) { unsigned long flags; - if (device->ldev->md.uuid[UI_BITMAP] == 0 && val == 0) + spin_lock_irqsave(&device->ldev->md.uuid_lock, flags); + if (device->ldev->md.uuid[UI_BITMAP] == 0 && val == 0) { + spin_unlock_irqrestore(&device->ldev->md.uuid_lock, flags); return; + } - spin_lock_irqsave(&device->ldev->md.uuid_lock, flags); if (val == 0) { drbd_uuid_move_history(device); device->ldev->md.uuid[UI_HISTORY_START] = device->ldev->md.uuid[UI_BITMAP]; --- linux-xilinx-6.8.0.orig/drivers/block/drbd/drbd_state.c +++ linux-xilinx-6.8.0/drivers/block/drbd/drbd_state.c @@ -876,7 +876,7 @@ ns.disk == D_OUTDATED) rv = SS_CONNECTED_OUTDATES; - else if ((ns.conn == C_VERIFY_S || ns.conn == C_VERIFY_T) && + else if (nc && (ns.conn == C_VERIFY_S || ns.conn == C_VERIFY_T) && (nc->verify_alg[0] == 0)) rv = SS_NO_VERIFY_ALG; --- linux-xilinx-6.8.0.orig/drivers/block/loop.c +++ linux-xilinx-6.8.0/drivers/block/loop.c @@ -211,13 +211,10 @@ if (lo->lo_state == Lo_bound) blk_mq_freeze_queue(lo->lo_queue); lo->use_dio = use_dio; - if (use_dio) { - blk_queue_flag_clear(QUEUE_FLAG_NOMERGES, lo->lo_queue); + if (use_dio) lo->lo_flags |= LO_FLAGS_DIRECT_IO; - } else { - blk_queue_flag_set(QUEUE_FLAG_NOMERGES, lo->lo_queue); + else lo->lo_flags &= ~LO_FLAGS_DIRECT_IO; - } if (lo->lo_state == Lo_bound) blk_mq_unfreeze_queue(lo->lo_queue); } @@ -2036,14 +2033,6 @@ blk_queue_max_hw_sectors(lo->lo_queue, 2560u); /* - * By default, we do buffer IO, so it doesn't make sense to enable - * merge because the I/O submitted to backing file is handled page by - * page. For directio mode, merge does help to dispatch bigger request - * to underlayer disk. We will enable merge once directio is enabled. - */ - blk_queue_flag_set(QUEUE_FLAG_NOMERGES, lo->lo_queue); - - /* * Disable partition scanning by default. The in-kernel partition * scanning can be requested individually per-device during its * setup. Userspace can always add and remove partitions from all --- linux-xilinx-6.8.0.orig/drivers/block/nbd.c +++ linux-xilinx-6.8.0/drivers/block/nbd.c @@ -181,6 +181,17 @@ { struct request *req = blk_mq_rq_from_pdu(cmd); + lockdep_assert_held(&cmd->lock); + + /* + * Clear INFLIGHT flag so that this cmd won't be completed in + * normal completion path + * + * INFLIGHT flag will be set when the cmd is queued to nbd next + * time. + */ + __clear_bit(NBD_CMD_INFLIGHT, &cmd->flags); + if (!test_and_set_bit(NBD_CMD_REQUEUED, &cmd->flags)) blk_mq_requeue_request(req, true); } @@ -459,8 +470,8 @@ nbd_mark_nsock_dead(nbd, nsock, 1); mutex_unlock(&nsock->tx_lock); } - mutex_unlock(&cmd->lock); nbd_requeue_cmd(cmd); + mutex_unlock(&cmd->lock); nbd_config_put(nbd); return BLK_EH_DONE; } @@ -567,7 +578,10 @@ return result == -ERESTARTSYS || result == -EINTR; } -/* always call with the tx_lock held */ +/* + * Returns BLK_STS_RESOURCE if the caller should retry after a delay. Returns + * -EAGAIN if the caller should requeue @cmd. Returns -EIO if sending failed. + */ static int nbd_send_cmd(struct nbd_device *nbd, struct nbd_cmd *cmd, int index) { struct request *req = blk_mq_rq_from_pdu(cmd); @@ -584,6 +598,9 @@ u32 nbd_cmd_flags = 0; int sent = nsock->sent, skip = 0; + lockdep_assert_held(&cmd->lock); + lockdep_assert_held(&nsock->tx_lock); + iov_iter_kvec(&from, ITER_SOURCE, &iov, 1, sizeof(request)); type = req_to_nbd_cmd_type(req); @@ -648,7 +665,7 @@ nsock->sent = sent; } set_bit(NBD_CMD_REQUEUED, &cmd->flags); - return BLK_STS_RESOURCE; + return (__force int)BLK_STS_RESOURCE; } dev_err_ratelimited(disk_to_dev(nbd->disk), "Send control failed (result %d)\n", result); @@ -689,7 +706,7 @@ nsock->pending = req; nsock->sent = sent; set_bit(NBD_CMD_REQUEUED, &cmd->flags); - return BLK_STS_RESOURCE; + return (__force int)BLK_STS_RESOURCE; } dev_err(disk_to_dev(nbd->disk), "Send data failed (result %d)\n", @@ -986,7 +1003,7 @@ return !test_bit(NBD_RT_DISCONNECTED, &config->runtime_flags); } -static int nbd_handle_cmd(struct nbd_cmd *cmd, int index) +static blk_status_t nbd_handle_cmd(struct nbd_cmd *cmd, int index) { struct request *req = blk_mq_rq_from_pdu(cmd); struct nbd_device *nbd = cmd->nbd; @@ -994,18 +1011,20 @@ struct nbd_sock *nsock; int ret; + lockdep_assert_held(&cmd->lock); + config = nbd_get_config_unlocked(nbd); if (!config) { dev_err_ratelimited(disk_to_dev(nbd->disk), "Socks array is empty\n"); - return -EINVAL; + return BLK_STS_IOERR; } if (index >= config->num_connections) { dev_err_ratelimited(disk_to_dev(nbd->disk), "Attempted send on invalid socket\n"); nbd_config_put(nbd); - return -EINVAL; + return BLK_STS_IOERR; } cmd->status = BLK_STS_OK; again: @@ -1028,7 +1047,7 @@ */ sock_shutdown(nbd); nbd_config_put(nbd); - return -EIO; + return BLK_STS_IOERR; } goto again; } @@ -1041,7 +1060,7 @@ blk_mq_start_request(req); if (unlikely(nsock->pending && nsock->pending != req)) { nbd_requeue_cmd(cmd); - ret = 0; + ret = BLK_STS_OK; goto out; } /* @@ -1060,19 +1079,19 @@ "Request send failed, requeueing\n"); nbd_mark_nsock_dead(nbd, nsock, 1); nbd_requeue_cmd(cmd); - ret = 0; + ret = BLK_STS_OK; } out: mutex_unlock(&nsock->tx_lock); nbd_config_put(nbd); - return ret; + return ret < 0 ? BLK_STS_IOERR : (__force blk_status_t)ret; } static blk_status_t nbd_queue_rq(struct blk_mq_hw_ctx *hctx, const struct blk_mq_queue_data *bd) { struct nbd_cmd *cmd = blk_mq_rq_to_pdu(bd->rq); - int ret; + blk_status_t ret; /* * Since we look at the bio's to send the request over the network we @@ -1092,10 +1111,6 @@ * appropriate. */ ret = nbd_handle_cmd(cmd, hctx->queue_num); - if (ret < 0) - ret = BLK_STS_IOERR; - else if (!ret) - ret = BLK_STS_OK; mutex_unlock(&cmd->lock); return ret; @@ -2145,6 +2160,7 @@ flush_workqueue(nbd->recv_workq); nbd_clear_que(nbd); nbd->task_setup = NULL; + clear_bit(NBD_RT_BOUND, &nbd->config->runtime_flags); mutex_unlock(&nbd->config_lock); if (test_and_clear_bit(NBD_RT_HAS_CONFIG_REF, @@ -2433,6 +2449,12 @@ } dev_list = nla_nest_start_noflag(reply, NBD_ATTR_DEVICE_LIST); + if (!dev_list) { + nlmsg_free(reply); + ret = -EMSGSIZE; + goto out; + } + if (index == -1) { ret = idr_for_each(&nbd_index_idr, &status_cb, reply); if (ret) { --- linux-xilinx-6.8.0.orig/drivers/block/null_blk/main.c +++ linux-xilinx-6.8.0/drivers/block/null_blk/main.c @@ -392,13 +392,25 @@ static int nullb_apply_submit_queues(struct nullb_device *dev, unsigned int submit_queues) { - return nullb_update_nr_hw_queues(dev, submit_queues, dev->poll_queues); + int ret; + + mutex_lock(&lock); + ret = nullb_update_nr_hw_queues(dev, submit_queues, dev->poll_queues); + mutex_unlock(&lock); + + return ret; } static int nullb_apply_poll_queues(struct nullb_device *dev, unsigned int poll_queues) { - return nullb_update_nr_hw_queues(dev, dev->submit_queues, poll_queues); + int ret; + + mutex_lock(&lock); + ret = nullb_update_nr_hw_queues(dev, dev->submit_queues, poll_queues); + mutex_unlock(&lock); + + return ret; } NULLB_DEVICE_ATTR(size, ulong, NULL); @@ -444,28 +456,32 @@ if (ret < 0) return ret; + ret = count; + mutex_lock(&lock); if (!dev->power && newp) { if (test_and_set_bit(NULLB_DEV_FL_UP, &dev->flags)) - return count; + goto out; + ret = null_add_dev(dev); if (ret) { clear_bit(NULLB_DEV_FL_UP, &dev->flags); - return ret; + goto out; } set_bit(NULLB_DEV_FL_CONFIGURED, &dev->flags); dev->power = newp; + ret = count; } else if (dev->power && !newp) { if (test_and_clear_bit(NULLB_DEV_FL_UP, &dev->flags)) { - mutex_lock(&lock); dev->power = newp; null_del_dev(dev->nullb); - mutex_unlock(&lock); } clear_bit(NULLB_DEV_FL_CONFIGURED, &dev->flags); } - return count; +out: + mutex_unlock(&lock); + return ret; } CONFIGFS_ATTR(nullb_device_, power); @@ -1653,8 +1669,8 @@ cmd = blk_mq_rq_to_pdu(req); cmd->error = null_process_cmd(cmd, req_op(req), blk_rq_pos(req), blk_rq_sectors(req)); - if (!blk_mq_add_to_batch(req, iob, (__force int) cmd->error, - blk_mq_end_request_batch)) + if (!blk_mq_add_to_batch(req, iob, cmd->error != BLK_STS_OK, + blk_mq_end_request_batch)) end_cmd(cmd); nr++; } @@ -2033,8 +2049,8 @@ return -EINVAL; } - dev->blocksize = round_down(dev->blocksize, 512); - dev->blocksize = clamp_t(unsigned int, dev->blocksize, 512, 4096); + if (blk_validate_block_size(dev->blocksize)) + return -EINVAL; if (dev->queue_mode == NULL_Q_MQ && dev->use_per_node_hctx) { if (dev->submit_queues != nr_online_nodes) @@ -2173,15 +2189,12 @@ nullb->q->queuedata = nullb; blk_queue_flag_set(QUEUE_FLAG_NONROT, nullb->q); - mutex_lock(&lock); rv = ida_alloc(&nullb_indexes, GFP_KERNEL); - if (rv < 0) { - mutex_unlock(&lock); + if (rv < 0) goto out_cleanup_zone; - } + nullb->index = rv; dev->index = rv; - mutex_unlock(&lock); blk_queue_logical_block_size(nullb->q, dev->blocksize); blk_queue_physical_block_size(nullb->q, dev->blocksize); @@ -2205,9 +2218,7 @@ if (rv) goto out_ida_free; - mutex_lock(&lock); list_add_tail(&nullb->list, &nullb_list); - mutex_unlock(&lock); pr_info("disk %s created\n", nullb->disk_name); @@ -2256,7 +2267,9 @@ if (!dev) return -ENOMEM; + mutex_lock(&lock); ret = null_add_dev(dev); + mutex_unlock(&lock); if (ret) { null_free_dev(dev); return ret; @@ -2372,10 +2385,13 @@ if (g_queue_mode == NULL_Q_MQ && shared_tags) blk_mq_free_tag_set(&tag_set); + + mutex_destroy(&lock); } module_init(null_init); module_exit(null_exit); MODULE_AUTHOR("Jens Axboe "); +MODULE_DESCRIPTION("multi queue aware block test driver"); MODULE_LICENSE("GPL"); --- linux-xilinx-6.8.0.orig/drivers/block/null_blk/zoned.c +++ linux-xilinx-6.8.0/drivers/block/null_blk/zoned.c @@ -83,6 +83,17 @@ return -EINVAL; } + /* + * If a smaller zone capacity was requested, do not allow a smaller last + * zone at the same time as such zone configuration does not correspond + * to any real zoned device. + */ + if (dev->zone_capacity != dev->zone_size && + dev->size & (dev->zone_size - 1)) { + pr_err("A smaller last zone is not allowed with zone capacity smaller than zone size.\n"); + return -EINVAL; + } + zone_capacity_sects = mb_to_sects(dev->zone_capacity); dev_capacity_sects = mb_to_sects(dev->size); dev->zone_size_sects = mb_to_sects(dev->zone_size); @@ -112,7 +123,7 @@ if (dev->zone_max_active && dev->zone_max_open > dev->zone_max_active) { dev->zone_max_open = dev->zone_max_active; pr_info("changed the maximum number of open zones to %u\n", - dev->nr_zones); + dev->zone_max_open); } else if (dev->zone_max_open >= dev->nr_zones - dev->zone_nr_conv) { dev->zone_max_open = 0; pr_info("zone_max_open limit disabled, limit >= zone count\n"); --- linux-xilinx-6.8.0.orig/drivers/block/rbd.c +++ linux-xilinx-6.8.0/drivers/block/rbd.c @@ -89,7 +89,7 @@ #define RBD_MINORS_PER_MAJOR 256 #define RBD_SINGLE_MAJOR_PART_SHIFT 4 -#define RBD_MAX_PARENT_CHAIN_LEN 16 +#define RBD_MAX_PARENT_CHAIN_LEN 128 #define RBD_SNAP_DEV_NAME_PREFIX "snap_" #define RBD_MAX_SNAP_NAME_LEN \ @@ -362,7 +362,7 @@ enum rbd_lock_state { RBD_LOCK_STATE_UNLOCKED, RBD_LOCK_STATE_LOCKED, - RBD_LOCK_STATE_RELEASING, + RBD_LOCK_STATE_QUIESCING, }; /* WatchNotify::ClientId */ @@ -422,7 +422,7 @@ struct list_head running_list; struct completion acquire_wait; int acquire_err; - struct completion releasing_wait; + struct completion quiescing_wait; spinlock_t object_map_lock; u8 *object_map; @@ -525,7 +525,7 @@ lockdep_assert_held(&rbd_dev->lock_rwsem); return rbd_dev->lock_state == RBD_LOCK_STATE_LOCKED || - rbd_dev->lock_state == RBD_LOCK_STATE_RELEASING; + rbd_dev->lock_state == RBD_LOCK_STATE_QUIESCING; } static bool rbd_is_lock_owner(struct rbd_device *rbd_dev) @@ -3457,13 +3457,14 @@ lockdep_assert_held(&rbd_dev->lock_rwsem); spin_lock(&rbd_dev->lock_lists_lock); if (!list_empty(&img_req->lock_item)) { + rbd_assert(!list_empty(&rbd_dev->running_list)); list_del_init(&img_req->lock_item); - need_wakeup = (rbd_dev->lock_state == RBD_LOCK_STATE_RELEASING && + need_wakeup = (rbd_dev->lock_state == RBD_LOCK_STATE_QUIESCING && list_empty(&rbd_dev->running_list)); } spin_unlock(&rbd_dev->lock_lists_lock); if (need_wakeup) - complete(&rbd_dev->releasing_wait); + complete(&rbd_dev->quiescing_wait); } static int rbd_img_exclusive_lock(struct rbd_img_request *img_req) @@ -3476,11 +3477,6 @@ if (rbd_lock_add_request(img_req)) return 1; - if (rbd_dev->opts->exclusive) { - WARN_ON(1); /* lock got released? */ - return -EROFS; - } - /* * Note the use of mod_delayed_work() in rbd_acquire_lock() * and cancel_delayed_work() in wake_lock_waiters(). @@ -4181,16 +4177,16 @@ /* * Ensure that all in-flight IO is flushed. */ - rbd_dev->lock_state = RBD_LOCK_STATE_RELEASING; - rbd_assert(!completion_done(&rbd_dev->releasing_wait)); + rbd_dev->lock_state = RBD_LOCK_STATE_QUIESCING; + rbd_assert(!completion_done(&rbd_dev->quiescing_wait)); if (list_empty(&rbd_dev->running_list)) return true; up_write(&rbd_dev->lock_rwsem); - wait_for_completion(&rbd_dev->releasing_wait); + wait_for_completion(&rbd_dev->quiescing_wait); down_write(&rbd_dev->lock_rwsem); - if (rbd_dev->lock_state != RBD_LOCK_STATE_RELEASING) + if (rbd_dev->lock_state != RBD_LOCK_STATE_QUIESCING) return false; rbd_assert(list_empty(&rbd_dev->running_list)); @@ -4601,6 +4597,10 @@ rbd_warn(rbd_dev, "failed to update lock cookie: %d", ret); + if (rbd_dev->opts->exclusive) + rbd_warn(rbd_dev, + "temporarily releasing lock on exclusive mapping"); + /* * Lock cookie cannot be updated on older OSDs, so do * a manual release and queue an acquire. @@ -5382,7 +5382,7 @@ INIT_LIST_HEAD(&rbd_dev->acquiring_list); INIT_LIST_HEAD(&rbd_dev->running_list); init_completion(&rbd_dev->acquire_wait); - init_completion(&rbd_dev->releasing_wait); + init_completion(&rbd_dev->quiescing_wait); spin_lock_init(&rbd_dev->object_map_lock); @@ -6588,11 +6588,6 @@ if (ret) return ret; - /* - * The lock may have been released by now, unless automatic lock - * transitions are disabled. - */ - rbd_assert(!rbd_dev->opts->exclusive || rbd_is_lock_owner(rbd_dev)); return 0; } --- linux-xilinx-6.8.0.orig/drivers/block/ublk_drv.c +++ linux-xilinx-6.8.0/drivers/block/ublk_drv.c @@ -68,9 +68,6 @@ struct llist_node node; struct kref ref; - __u64 sector; - __u32 operation; - __u32 nr_zones; }; struct ublk_uring_cmd_pdu { @@ -211,6 +208,33 @@ #ifdef CONFIG_BLK_DEV_ZONED +struct ublk_zoned_report_desc { + __u64 sector; + __u32 operation; + __u32 nr_zones; +}; + +static DEFINE_XARRAY(ublk_zoned_report_descs); + +static int ublk_zoned_insert_report_desc(const struct request *req, + struct ublk_zoned_report_desc *desc) +{ + return xa_insert(&ublk_zoned_report_descs, (unsigned long)req, + desc, GFP_KERNEL); +} + +static struct ublk_zoned_report_desc *ublk_zoned_erase_report_desc( + const struct request *req) +{ + return xa_erase(&ublk_zoned_report_descs, (unsigned long)req); +} + +static struct ublk_zoned_report_desc *ublk_zoned_get_report_desc( + const struct request *req) +{ + return xa_load(&ublk_zoned_report_descs, (unsigned long)req); +} + static int ublk_get_nr_zones(const struct ublk_device *ub) { const struct ublk_param_basic *p = &ub->params.basic; @@ -317,7 +341,7 @@ unsigned int zones_in_request = min_t(unsigned int, remaining_zones, max_zones_per_request); struct request *req; - struct ublk_rq_data *pdu; + struct ublk_zoned_report_desc desc; blk_status_t status; memset(buffer, 0, buffer_length); @@ -328,20 +352,23 @@ goto out; } - pdu = blk_mq_rq_to_pdu(req); - pdu->operation = UBLK_IO_OP_REPORT_ZONES; - pdu->sector = sector; - pdu->nr_zones = zones_in_request; + desc.operation = UBLK_IO_OP_REPORT_ZONES; + desc.sector = sector; + desc.nr_zones = zones_in_request; + ret = ublk_zoned_insert_report_desc(req, &desc); + if (ret) + goto free_req; ret = blk_rq_map_kern(disk->queue, req, buffer, buffer_length, GFP_KERNEL); - if (ret) { - blk_mq_free_request(req); - goto out; - } + if (ret) + goto erase_desc; status = blk_execute_rq(req, 0); ret = blk_status_to_errno(status); +erase_desc: + ublk_zoned_erase_report_desc(req); +free_req: blk_mq_free_request(req); if (ret) goto out; @@ -375,7 +402,7 @@ { struct ublksrv_io_desc *iod = ublk_get_iod(ubq, req->tag); struct ublk_io *io = &ubq->ios[req->tag]; - struct ublk_rq_data *pdu = blk_mq_rq_to_pdu(req); + struct ublk_zoned_report_desc *desc; u32 ublk_op; switch (req_op(req)) { @@ -398,12 +425,15 @@ ublk_op = UBLK_IO_OP_ZONE_RESET_ALL; break; case REQ_OP_DRV_IN: - ublk_op = pdu->operation; + desc = ublk_zoned_get_report_desc(req); + if (!desc) + return BLK_STS_IOERR; + ublk_op = desc->operation; switch (ublk_op) { case UBLK_IO_OP_REPORT_ZONES: iod->op_flags = ublk_op | ublk_req_build_flags(req); - iod->nr_zones = pdu->nr_zones; - iod->start_sector = pdu->sector; + iod->nr_zones = desc->nr_zones; + iod->start_sector = desc->sector; return BLK_STS_OK; default: return BLK_STS_IOERR; @@ -680,12 +710,21 @@ return ublk_get_queue(ub, q_id)->io_cmd_buf; } +static inline int __ublk_queue_cmd_buf_size(int depth) +{ + return round_up(depth * sizeof(struct ublksrv_io_desc), PAGE_SIZE); +} + static inline int ublk_queue_cmd_buf_size(struct ublk_device *ub, int q_id) { struct ublk_queue *ubq = ublk_get_queue(ub, q_id); - return round_up(ubq->q_depth * sizeof(struct ublksrv_io_desc), - PAGE_SIZE); + return __ublk_queue_cmd_buf_size(ubq->q_depth); +} + +static int ublk_max_cmd_buf_size(void) +{ + return __ublk_queue_cmd_buf_size(UBLK_MAX_QUEUE_DEPTH); } static inline bool ublk_queue_can_use_recovery_reissue( @@ -1338,7 +1377,7 @@ { struct ublk_device *ub = filp->private_data; size_t sz = vma->vm_end - vma->vm_start; - unsigned max_sz = UBLK_MAX_QUEUE_DEPTH * sizeof(struct ublksrv_io_desc); + unsigned max_sz = ublk_max_cmd_buf_size(); unsigned long pfn, end, phys_off = vma->vm_pgoff << PAGE_SHIFT; int q_id, ret = 0; @@ -1606,6 +1645,21 @@ blk_mq_kick_requeue_list(ub->ub_disk->queue); } +static struct gendisk *ublk_detach_disk(struct ublk_device *ub) +{ + struct gendisk *disk; + + /* Sync with ublk_abort_queue() by holding the lock */ + spin_lock(&ub->lock); + disk = ub->ub_disk; + ub->dev_info.state = UBLK_S_DEV_DEAD; + ub->dev_info.ublksrv_pid = -1; + ub->ub_disk = NULL; + spin_unlock(&ub->lock); + + return disk; +} + static void ublk_stop_dev(struct ublk_device *ub) { struct gendisk *disk; @@ -1619,14 +1673,7 @@ ublk_unquiesce_dev(ub); } del_gendisk(ub->ub_disk); - - /* Sync with ublk_abort_queue() by holding the lock */ - spin_lock(&ub->lock); - disk = ub->ub_disk; - ub->dev_info.state = UBLK_S_DEV_DEAD; - ub->dev_info.ublksrv_pid = -1; - ub->ub_disk = NULL; - spin_unlock(&ub->lock); + disk = ublk_detach_disk(ub); put_disk(disk); unlock: mutex_unlock(&ub->mutex); @@ -2259,7 +2306,7 @@ out_put_cdev: if (ret) { - ub->dev_info.state = UBLK_S_DEV_DEAD; + ublk_detach_disk(ub); ublk_put_device(ub); } out_put_disk: @@ -2354,10 +2401,19 @@ * TODO: provide forward progress for RECOVERY handler, so that * unprivileged device can benefit from it */ - if (info.flags & UBLK_F_UNPRIVILEGED_DEV) + if (info.flags & UBLK_F_UNPRIVILEGED_DEV) { info.flags &= ~(UBLK_F_USER_RECOVERY_REISSUE | UBLK_F_USER_RECOVERY); + /* + * For USER_COPY, we depends on userspace to fill request + * buffer by pwrite() to ublk char device, which can't be + * used for unprivileged device + */ + if (info.flags & UBLK_F_USER_COPY) + return -EINVAL; + } + /* the created device is always owned by current user */ ublk_store_owner_uid_gid(&info.owner_uid, &info.owner_gid); @@ -2666,6 +2722,8 @@ mutex_lock(&ub->mutex); if (!ublk_can_use_recovery(ub)) goto out_unlock; + if (!ub->nr_queues_ready) + goto out_unlock; /* * START_RECOVERY is only allowd after: * @@ -2925,7 +2983,7 @@ ret = ublk_ctrl_end_recovery(ub, cmd); break; default: - ret = -ENOTSUPP; + ret = -EOPNOTSUPP; break; } --- linux-xilinx-6.8.0.orig/drivers/block/virtio_blk.c +++ linux-xilinx-6.8.0/drivers/block/virtio_blk.c @@ -471,18 +471,18 @@ return virtblk_prep_rq(req->mq_hctx, vblk, req, vbr) == BLK_STS_OK; } -static bool virtblk_add_req_batch(struct virtio_blk_vq *vq, +static void virtblk_add_req_batch(struct virtio_blk_vq *vq, struct request **rqlist) { + struct request *req; unsigned long flags; - int err; bool kick; spin_lock_irqsave(&vq->lock, flags); - while (!rq_list_empty(*rqlist)) { - struct request *req = rq_list_pop(rqlist); + while ((req = rq_list_pop(rqlist))) { struct virtblk_req *vbr = blk_mq_rq_to_pdu(req); + int err; err = virtblk_add_req(vq->vq, vbr); if (err) { @@ -495,37 +495,33 @@ kick = virtqueue_kick_prepare(vq->vq); spin_unlock_irqrestore(&vq->lock, flags); - return kick; + if (kick) + virtqueue_notify(vq->vq); } static void virtio_queue_rqs(struct request **rqlist) { - struct request *req, *next, *prev = NULL; + struct request *submit_list = NULL; struct request *requeue_list = NULL; + struct request **requeue_lastp = &requeue_list; + struct virtio_blk_vq *vq = NULL; + struct request *req; - rq_list_for_each_safe(rqlist, req, next) { - struct virtio_blk_vq *vq = get_virtio_blk_vq(req->mq_hctx); - bool kick; - - if (!virtblk_prep_rq_batch(req)) { - rq_list_move(rqlist, &requeue_list, req, prev); - req = prev; - if (!req) - continue; - } + while ((req = rq_list_pop(rqlist))) { + struct virtio_blk_vq *this_vq = get_virtio_blk_vq(req->mq_hctx); - if (!next || req->mq_hctx != next->mq_hctx) { - req->rq_next = NULL; - kick = virtblk_add_req_batch(vq, rqlist); - if (kick) - virtqueue_notify(vq->vq); - - *rqlist = next; - prev = NULL; - } else - prev = req; + if (vq && vq != this_vq) + virtblk_add_req_batch(vq, &submit_list); + vq = this_vq; + + if (virtblk_prep_rq_batch(req)) + rq_list_add(&submit_list, req); /* reverse order */ + else + rq_list_add_tail(&requeue_lastp, req); } + if (vq) + virtblk_add_req_batch(vq, &submit_list); *rqlist = requeue_list; } @@ -1220,11 +1216,12 @@ while ((vbr = virtqueue_get_buf(vq->vq, &len)) != NULL) { struct request *req = blk_mq_rq_from_pdu(vbr); + u8 status = virtblk_vbr_status(vbr); found++; if (!blk_mq_complete_request_remote(req) && - !blk_mq_add_to_batch(req, iob, virtblk_vbr_status(vbr), - virtblk_complete_batch)) + !blk_mq_add_to_batch(req, iob, status != VIRTIO_BLK_S_OK, + virtblk_complete_batch)) virtblk_request_done(req); } @@ -1592,9 +1589,12 @@ static int virtblk_freeze(struct virtio_device *vdev) { struct virtio_blk *vblk = vdev->priv; + struct request_queue *q = vblk->disk->queue; /* Ensure no requests in virtqueues before deleting vqs. */ - blk_mq_freeze_queue(vblk->disk->queue); + blk_mq_freeze_queue(q); + blk_mq_quiesce_queue_nowait(q); + blk_mq_unfreeze_queue(q); /* Ensure we don't receive any more interrupts */ virtio_reset_device(vdev); @@ -1618,8 +1618,8 @@ return ret; virtio_device_ready(vdev); + blk_mq_unquiesce_queue(vblk->disk->queue); - blk_mq_unfreeze_queue(vblk->disk->queue); return 0; } #endif --- linux-xilinx-6.8.0.orig/drivers/block/zram/zram_drv.c +++ linux-xilinx-6.8.0/drivers/block/zram/zram_drv.c @@ -297,17 +297,30 @@ /* * Do not mark ZRAM_UNDER_WB slot as ZRAM_IDLE to close race. * See the comment in writeback_store. + * + * Also do not mark ZRAM_SAME slots as ZRAM_IDLE, because no + * post-processing (recompress, writeback) happens to the + * ZRAM_SAME slot. + * + * And ZRAM_WB slots simply cannot be ZRAM_IDLE. */ zram_slot_lock(zram, index); - if (zram_allocated(zram, index) && - !zram_test_flag(zram, index, ZRAM_UNDER_WB)) { + if (!zram_allocated(zram, index) || + zram_test_flag(zram, index, ZRAM_WB) || + zram_test_flag(zram, index, ZRAM_UNDER_WB) || + zram_test_flag(zram, index, ZRAM_SAME)) { + zram_slot_unlock(zram, index); + continue; + } + #ifdef CONFIG_ZRAM_TRACK_ENTRY_ACTIME - is_idle = !cutoff || ktime_after(cutoff, - zram->table[index].ac_time); + is_idle = !cutoff || + ktime_after(cutoff, zram->table[index].ac_time); #endif - if (is_idle) - zram_set_flag(zram, index, ZRAM_IDLE); - } + if (is_idle) + zram_set_flag(zram, index, ZRAM_IDLE); + else + zram_clear_flag(zram, index, ZRAM_IDLE); zram_slot_unlock(zram, index); } } @@ -522,6 +535,12 @@ } nr_pages = i_size_read(inode) >> PAGE_SHIFT; + /* Refuse to use zero sized device (also prevents self reference) */ + if (!nr_pages) { + err = -EINVAL; + goto out; + } + bitmap_sz = BITS_TO_LONGS(nr_pages) * sizeof(long); bitmap = kvzalloc(bitmap_sz, GFP_KERNEL); if (!bitmap) { @@ -640,6 +659,12 @@ goto release_init_lock; } + /* Do not permit concurrent post-processing actions. */ + if (atomic_xchg(&zram->pp_in_progress, 1)) { + up_read(&zram->init_lock); + return -EAGAIN; + } + if (!zram->backing_dev) { ret = -ENODEV; goto release_init_lock; @@ -766,6 +791,7 @@ free_block_bdev(zram, blk_idx); __free_page(page); release_init_lock: + atomic_set(&zram->pp_in_progress, 0); up_read(&zram->init_lock); return ret; @@ -1216,12 +1242,16 @@ size_t num_pages = disksize >> PAGE_SHIFT; size_t index; + if (!zram->table) + return; + /* Free all pages that are still in this zram device */ for (index = 0; index < num_pages; index++) zram_free_page(zram, index); zs_destroy_pool(zram->mem_pool); vfree(zram->table); + zram->table = NULL; } static bool zram_meta_alloc(struct zram *zram, u64 disksize) @@ -1236,6 +1266,7 @@ zram->mem_pool = zs_create_pool(zram->disk->disk_name); if (!zram->mem_pool) { vfree(zram->table); + zram->table = NULL; return false; } @@ -1596,6 +1627,13 @@ if (ret) return ret; + /* + * We touched this entry so mark it as non-IDLE. This makes sure that + * we don't preserve IDLE flag and don't incorrectly pick this entry + * for different post-processing type (e.g. writeback). + */ + zram_clear_flag(zram, index, ZRAM_IDLE); + class_index_old = zs_lookup_class_index(zram->mem_pool, comp_len_old); /* * Iterate the secondary comp algorithms list (in order of priority) @@ -1758,6 +1796,12 @@ goto release_init_lock; } + /* Do not permit concurrent post-processing actions. */ + if (atomic_xchg(&zram->pp_in_progress, 1)) { + up_read(&zram->init_lock); + return -EAGAIN; + } + if (algo) { bool found = false; @@ -1822,6 +1866,7 @@ __free_page(page); release_init_lock: + atomic_set(&zram->pp_in_progress, 0); up_read(&zram->init_lock); return ret; } @@ -1979,6 +2024,13 @@ zcomp_destroy(comp); zram->num_active_comps--; } + + for (prio = ZRAM_PRIMARY_COMP; prio < ZRAM_MAX_COMPS; prio++) { + /* Do not free statically defined compression algorithms */ + if (zram->comp_algs[prio] != default_compressor) + kfree(zram->comp_algs[prio]); + zram->comp_algs[prio] = NULL; + } } static void zram_reset_device(struct zram *zram) @@ -1987,11 +2039,6 @@ zram->limit_pages = 0; - if (!init_done(zram)) { - up_write(&zram->init_lock); - return; - } - set_capacity_and_notify(zram->disk, 0); part_stat_set_all(zram->disk->part0, 0); @@ -2000,6 +2047,7 @@ zram->disksize = 0; zram_destroy_comps(zram); memset(&zram->stats, 0, sizeof(zram->stats)); + atomic_set(&zram->pp_in_progress, 0); reset_bdev(zram); comp_algorithm_set(zram, ZRAM_PRIMARY_COMP, default_compressor); @@ -2210,6 +2258,8 @@ zram->disk->fops = &zram_devops; zram->disk->private_data = zram; snprintf(zram->disk->disk_name, 16, "zram%d", device_id); + atomic_set(&zram->pp_in_progress, 0); + comp_algorithm_set(zram, ZRAM_PRIMARY_COMP, default_compressor); /* Actual capacity set using sysfs (/sys/block/zram/disksize */ set_capacity(zram->disk, 0); @@ -2244,8 +2294,6 @@ if (ret) goto out_cleanup_disk; - comp_algorithm_set(zram, ZRAM_PRIMARY_COMP, default_compressor); - zram_debugfs_register(zram); pr_info("Added device: %s\n", zram->disk->disk_name); return device_id; --- linux-xilinx-6.8.0.orig/drivers/block/zram/zram_drv.h +++ linux-xilinx-6.8.0/drivers/block/zram/zram_drv.h @@ -139,5 +139,6 @@ #ifdef CONFIG_ZRAM_MEMORY_TRACKING struct dentry *debugfs_dir; #endif + atomic_t pp_in_progress; }; #endif --- linux-xilinx-6.8.0.orig/drivers/bluetooth/ath3k.c +++ linux-xilinx-6.8.0/drivers/bluetooth/ath3k.c @@ -3,7 +3,6 @@ * Copyright (c) 2008-2009 Atheros Communications Inc. */ - #include #include #include @@ -128,7 +127,6 @@ * for AR3012 */ static const struct usb_device_id ath3k_blist_tbl[] = { - /* Atheros AR3012 with sflash firmware*/ { USB_DEVICE(0x0489, 0xe04e), .driver_info = BTUSB_ATH3012 }, { USB_DEVICE(0x0489, 0xe04d), .driver_info = BTUSB_ATH3012 }, @@ -202,7 +200,7 @@ #define TIMEGAP_USEC_MAX 100 static int ath3k_load_firmware(struct usb_device *udev, - const struct firmware *firmware) + const struct firmware *firmware) { u8 *send_buf; int len = 0; @@ -237,9 +235,9 @@ memcpy(send_buf, firmware->data + sent, size); err = usb_bulk_msg(udev, pipe, send_buf, size, - &len, 3000); + &len, 3000); - if (err || (len != size)) { + if (err || len != size) { ath3k_log_failed_loading(err, len, size, count); goto error; } @@ -262,7 +260,7 @@ } static int ath3k_get_version(struct usb_device *udev, - struct ath3k_version *version) + struct ath3k_version *version) { return usb_control_msg_recv(udev, 0, ATH3K_GETVERSION, USB_TYPE_VENDOR | USB_DIR_IN, 0, 0, @@ -271,7 +269,7 @@ } static int ath3k_load_fwfile(struct usb_device *udev, - const struct firmware *firmware) + const struct firmware *firmware) { u8 *send_buf; int len = 0; @@ -310,8 +308,8 @@ memcpy(send_buf, firmware->data + sent, size); err = usb_bulk_msg(udev, pipe, send_buf, size, - &len, 3000); - if (err || (len != size)) { + &len, 3000); + if (err || len != size) { ath3k_log_failed_loading(err, len, size, count); kfree(send_buf); return err; @@ -425,7 +423,6 @@ } switch (fw_version.ref_clock) { - case ATH3K_XTAL_FREQ_26M: clk_value = 26; break; @@ -441,7 +438,7 @@ } snprintf(filename, ATH3K_NAME_LEN, "ar3k/ramps_0x%08x_%d%s", - le32_to_cpu(fw_version.rom_version), clk_value, ".dfu"); + le32_to_cpu(fw_version.rom_version), clk_value, ".dfu"); ret = request_firmware(&firmware, filename, &udev->dev); if (ret < 0) { @@ -456,7 +453,7 @@ } static int ath3k_probe(struct usb_interface *intf, - const struct usb_device_id *id) + const struct usb_device_id *id) { const struct firmware *firmware; struct usb_device *udev = interface_to_usbdev(intf); @@ -505,10 +502,10 @@ if (ret < 0) { if (ret == -ENOENT) BT_ERR("Firmware file \"%s\" not found", - ATH3K_FIRMWARE); + ATH3K_FIRMWARE); else BT_ERR("Firmware file \"%s\" request failed (err=%d)", - ATH3K_FIRMWARE, ret); + ATH3K_FIRMWARE, ret); return ret; } --- linux-xilinx-6.8.0.orig/drivers/bluetooth/btbcm.c +++ linux-xilinx-6.8.0/drivers/bluetooth/btbcm.c @@ -540,13 +540,12 @@ static const char *btbcm_get_board_name(struct device *dev) { #ifdef CONFIG_OF - struct device_node *root; + struct device_node *root __free(device_node) = of_find_node_by_path("/"); char *board_type; const char *tmp; int len; int i; - root = of_find_node_by_path("/"); if (!root) return NULL; @@ -556,12 +555,14 @@ /* get rid of any '/' in the compatible string */ len = strlen(tmp) + 1; board_type = devm_kzalloc(dev, len, GFP_KERNEL); + if (!board_type) + return NULL; + strscpy(board_type, tmp, len); for (i = 0; i < len; i++) { if (board_type[i] == '/') board_type[i] = '-'; } - of_node_put(root); return board_type; #else --- linux-xilinx-6.8.0.orig/drivers/bluetooth/btintel.c +++ linux-xilinx-6.8.0/drivers/bluetooth/btintel.c @@ -26,21 +26,11 @@ #define ECDSA_OFFSET 644 #define ECDSA_HEADER_LEN 320 -#define BTINTEL_PPAG_NAME "PPAG" - enum { DSM_SET_WDISABLE2_DELAY = 1, DSM_SET_RESET_METHOD = 3, }; -/* structure to store the PPAG data read from ACPI table */ -struct btintel_ppag { - u32 domain; - u32 mode; - acpi_status status; - struct hci_dev *hdev; -}; - #define CMD_WRITE_BOOT_PARAMS 0xfc0e struct cmd_write_boot_params { __le32 boot_addr; @@ -441,7 +431,7 @@ return PTR_ERR(skb); } - if (skb->len != sizeof(*ver)) { + if (!skb || skb->len != sizeof(*ver)) { bt_dev_err(hdev, "Intel version event size mismatch"); kfree_skb(skb); return -EILSEQ; @@ -1317,65 +1307,6 @@ return 0; } -static acpi_status btintel_ppag_callback(acpi_handle handle, u32 lvl, void *data, - void **ret) -{ - acpi_status status; - size_t len; - struct btintel_ppag *ppag = data; - union acpi_object *p, *elements; - struct acpi_buffer string = {ACPI_ALLOCATE_BUFFER, NULL}; - struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL}; - struct hci_dev *hdev = ppag->hdev; - - status = acpi_get_name(handle, ACPI_FULL_PATHNAME, &string); - if (ACPI_FAILURE(status)) { - bt_dev_warn(hdev, "PPAG-BT: ACPI Failure: %s", acpi_format_exception(status)); - return status; - } - - len = strlen(string.pointer); - if (len < strlen(BTINTEL_PPAG_NAME)) { - kfree(string.pointer); - return AE_OK; - } - - if (strncmp((char *)string.pointer + len - 4, BTINTEL_PPAG_NAME, 4)) { - kfree(string.pointer); - return AE_OK; - } - kfree(string.pointer); - - status = acpi_evaluate_object(handle, NULL, NULL, &buffer); - if (ACPI_FAILURE(status)) { - ppag->status = status; - bt_dev_warn(hdev, "PPAG-BT: ACPI Failure: %s", acpi_format_exception(status)); - return status; - } - - p = buffer.pointer; - ppag = (struct btintel_ppag *)data; - - if (p->type != ACPI_TYPE_PACKAGE || p->package.count != 2) { - kfree(buffer.pointer); - bt_dev_warn(hdev, "PPAG-BT: Invalid object type: %d or package count: %d", - p->type, p->package.count); - ppag->status = AE_ERROR; - return AE_ERROR; - } - - elements = p->package.elements; - - /* PPAG table is located at element[1] */ - p = &elements[1]; - - ppag->domain = (u32)p->package.elements[0].integer.value; - ppag->mode = (u32)p->package.elements[1].integer.value; - ppag->status = AE_OK; - kfree(buffer.pointer); - return AE_CTRL_TERMINATE; -} - static int btintel_set_debug_features(struct hci_dev *hdev, const struct intel_debug_features *features) { @@ -2404,10 +2335,13 @@ static void btintel_set_ppag(struct hci_dev *hdev, struct intel_version_tlv *ver) { - struct btintel_ppag ppag; struct sk_buff *skb; struct hci_ppag_enable_cmd ppag_cmd; acpi_handle handle; + struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL}; + union acpi_object *p, *elements; + u32 domain, mode; + acpi_status status; /* PPAG is not supported if CRF is HrP2, Jfp2, JfP1 */ switch (ver->cnvr_top & 0xFFF) { @@ -2425,22 +2359,34 @@ return; } - memset(&ppag, 0, sizeof(ppag)); - - ppag.hdev = hdev; - ppag.status = AE_NOT_FOUND; - acpi_walk_namespace(ACPI_TYPE_PACKAGE, handle, 1, NULL, - btintel_ppag_callback, &ppag, NULL); - - if (ACPI_FAILURE(ppag.status)) { - if (ppag.status == AE_NOT_FOUND) { + status = acpi_evaluate_object(handle, "PPAG", NULL, &buffer); + if (ACPI_FAILURE(status)) { + if (status == AE_NOT_FOUND) { bt_dev_dbg(hdev, "PPAG-BT: ACPI entry not found"); return; } + bt_dev_warn(hdev, "PPAG-BT: ACPI Failure: %s", acpi_format_exception(status)); return; } - if (ppag.domain != 0x12) { + p = buffer.pointer; + if (p->type != ACPI_TYPE_PACKAGE || p->package.count != 2) { + bt_dev_warn(hdev, "PPAG-BT: Invalid object type: %d or package count: %d", + p->type, p->package.count); + kfree(buffer.pointer); + return; + } + + elements = p->package.elements; + + /* PPAG table is located at element[1] */ + p = &elements[1]; + + domain = (u32)p->package.elements[0].integer.value; + mode = (u32)p->package.elements[1].integer.value; + kfree(buffer.pointer); + + if (domain != 0x12) { bt_dev_dbg(hdev, "PPAG-BT: Bluetooth domain is disabled in ACPI firmware"); return; } @@ -2451,19 +2397,22 @@ * BIT 1 : 0 Disabled in China * 1 Enabled in China */ - if ((ppag.mode & 0x01) != BIT(0) && (ppag.mode & 0x02) != BIT(1)) { - bt_dev_dbg(hdev, "PPAG-BT: EU, China mode are disabled in CB/BIOS"); + mode &= 0x03; + + if (!mode) { + bt_dev_dbg(hdev, "PPAG-BT: EU, China mode are disabled in BIOS"); return; } - ppag_cmd.ppag_enable_flags = cpu_to_le32(ppag.mode); + ppag_cmd.ppag_enable_flags = cpu_to_le32(mode); - skb = __hci_cmd_sync(hdev, INTEL_OP_PPAG_CMD, sizeof(ppag_cmd), &ppag_cmd, HCI_CMD_TIMEOUT); + skb = __hci_cmd_sync(hdev, INTEL_OP_PPAG_CMD, sizeof(ppag_cmd), + &ppag_cmd, HCI_CMD_TIMEOUT); if (IS_ERR(skb)) { bt_dev_warn(hdev, "Failed to send PPAG Enable (%ld)", PTR_ERR(skb)); return; } - bt_dev_info(hdev, "PPAG-BT: Enabled (Mode %d)", ppag.mode); + bt_dev_info(hdev, "PPAG-BT: Enabled (Mode %d)", mode); kfree_skb(skb); } @@ -2771,9 +2720,6 @@ INTEL_ROM_LEGACY_NO_WBS_SUPPORT)) set_bit(HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED, &hdev->quirks); - if (ver.hw_variant == 0x08 && ver.fw_variant == 0x22) - set_bit(HCI_QUIRK_VALID_LE_STATES, - &hdev->quirks); err = btintel_legacy_rom_setup(hdev, &ver); break; @@ -2782,7 +2728,6 @@ case 0x12: /* ThP */ case 0x13: /* HrP */ case 0x14: /* CcP */ - set_bit(HCI_QUIRK_VALID_LE_STATES, &hdev->quirks); fallthrough; case 0x0c: /* WsP */ /* Apply the device specific HCI quirks @@ -2869,9 +2814,6 @@ /* These variants don't seem to support LE Coded PHY */ set_bit(HCI_QUIRK_BROKEN_LE_CODED, &hdev->quirks); - /* Set Valid LE States quirk */ - set_bit(HCI_QUIRK_VALID_LE_STATES, &hdev->quirks); - /* Setup MSFT Extension support */ btintel_set_msft_opcode(hdev, ver.hw_variant); @@ -2892,15 +2834,15 @@ */ set_bit(HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED, &hdev->quirks); - /* Apply LE States quirk from solar onwards */ - set_bit(HCI_QUIRK_VALID_LE_STATES, &hdev->quirks); - /* Setup MSFT Extension support */ btintel_set_msft_opcode(hdev, INTEL_HW_VARIANT(ver_tlv.cnvi_bt)); btintel_set_dsm_reset_method(hdev, &ver_tlv); err = btintel_bootloader_setup_tlv(hdev, &ver_tlv); + if (err) + goto exit_error; + btintel_register_devcoredump_support(hdev); break; default: @@ -2981,13 +2923,12 @@ case INTEL_TLV_TEST_EXCEPTION: /* Generate devcoredump from exception */ if (!hci_devcd_init(hdev, skb->len)) { - hci_devcd_append(hdev, skb); + hci_devcd_append(hdev, skb_clone(skb, GFP_ATOMIC)); hci_devcd_complete(hdev); } else { bt_dev_err(hdev, "Failed to generate devcoredump"); - kfree_skb(skb); } - return 0; + break; default: bt_dev_err(hdev, "Invalid exception type %02X", tlv->val[0]); } @@ -3014,7 +2955,8 @@ * indicating that the bootup completed. */ btintel_bootup(hdev, ptr, len); - break; + kfree_skb(skb); + return 0; case 0x06: /* When the firmware loading completes the * device sends out a vendor specific event @@ -3022,7 +2964,8 @@ * loading. */ btintel_secure_send_result(hdev, ptr, len); - break; + kfree_skb(skb); + return 0; } } --- linux-xilinx-6.8.0.orig/drivers/bluetooth/btmrvl_main.c +++ linux-xilinx-6.8.0/drivers/bluetooth/btmrvl_main.c @@ -121,13 +121,6 @@ ((event->data[2] == MODULE_BROUGHT_UP) || (event->data[2] == MODULE_ALREADY_UP)) ? "Bring-up succeed" : "Bring-up failed"); - - if (event->length > 3 && event->data[3]) - priv->btmrvl_dev.dev_type = HCI_AMP; - else - priv->btmrvl_dev.dev_type = HCI_PRIMARY; - - BT_DBG("dev_type: %d", priv->btmrvl_dev.dev_type); } else if (priv->btmrvl_dev.sendcmdflag && event->data[1] == MODULE_SHUTDOWN_REQ) { BT_DBG("EVENT:%s", (event->data[2]) ? @@ -686,8 +679,6 @@ hdev->wakeup = btmrvl_wakeup; SET_HCIDEV_DEV(hdev, &card->func->dev); - hdev->dev_type = priv->btmrvl_dev.dev_type; - ret = hci_register_dev(hdev); if (ret < 0) { BT_ERR("Can not register HCI device"); --- linux-xilinx-6.8.0.orig/drivers/bluetooth/btmrvl_sdio.c +++ linux-xilinx-6.8.0/drivers/bluetooth/btmrvl_sdio.c @@ -92,7 +92,7 @@ } else { ret = devm_request_irq(dev, cfg->irq_bt, btmrvl_wake_irq_bt, - 0, "bt_wake", card); + IRQF_NO_AUTOEN, "bt_wake", card); if (ret) { dev_err(dev, "Failed to request irq_bt %d (%d)\n", @@ -101,7 +101,6 @@ /* Configure wakeup (enabled by default) */ device_init_wakeup(dev, true); - disable_irq(cfg->irq_bt); } } --- linux-xilinx-6.8.0.orig/drivers/bluetooth/btmtk.c +++ linux-xilinx-6.8.0/drivers/bluetooth/btmtk.c @@ -371,15 +371,20 @@ { struct btmediatek_data *data = hci_get_priv(hdev); int err; + bool complete = false; - if (!IS_ENABLED(CONFIG_DEV_COREDUMP)) + if (!IS_ENABLED(CONFIG_DEV_COREDUMP)) { + kfree_skb(skb); return 0; + } switch (data->cd_info.state) { case HCI_DEVCOREDUMP_IDLE: err = hci_devcd_init(hdev, MTK_COREDUMP_SIZE); - if (err < 0) + if (err < 0) { + kfree_skb(skb); break; + } data->cd_info.cnt = 0; /* It is supposed coredump can be done within 5 seconds */ @@ -388,26 +393,26 @@ fallthrough; case HCI_DEVCOREDUMP_ACTIVE: default: + /* Mediatek coredump data would be more than MTK_COREDUMP_NUM */ + if (data->cd_info.cnt >= MTK_COREDUMP_NUM && + skb->len > MTK_COREDUMP_END_LEN) + if (!memcmp((char *)&skb->data[skb->len - MTK_COREDUMP_END_LEN], + MTK_COREDUMP_END, MTK_COREDUMP_END_LEN - 1)) + complete = true; + err = hci_devcd_append(hdev, skb); if (err < 0) break; data->cd_info.cnt++; - /* Mediatek coredump data would be more than MTK_COREDUMP_NUM */ - if (data->cd_info.cnt > MTK_COREDUMP_NUM && - skb->len > MTK_COREDUMP_END_LEN) - if (!memcmp((char *)&skb->data[skb->len - MTK_COREDUMP_END_LEN], - MTK_COREDUMP_END, MTK_COREDUMP_END_LEN - 1)) { - bt_dev_info(hdev, "Mediatek coredump end"); - hci_devcd_complete(hdev); - } + if (complete) { + bt_dev_info(hdev, "Mediatek coredump end"); + hci_devcd_complete(hdev); + } break; } - if (err < 0) - kfree_skb(skb); - return err; } EXPORT_SYMBOL_GPL(btmtk_process_coredump); @@ -420,5 +425,6 @@ MODULE_FIRMWARE(FIRMWARE_MT7622); MODULE_FIRMWARE(FIRMWARE_MT7663); MODULE_FIRMWARE(FIRMWARE_MT7668); +MODULE_FIRMWARE(FIRMWARE_MT7922); MODULE_FIRMWARE(FIRMWARE_MT7961); MODULE_FIRMWARE(FIRMWARE_MT7925); --- linux-xilinx-6.8.0.orig/drivers/bluetooth/btmtk.h +++ linux-xilinx-6.8.0/drivers/bluetooth/btmtk.h @@ -4,6 +4,7 @@ #define FIRMWARE_MT7622 "mediatek/mt7622pr2h.bin" #define FIRMWARE_MT7663 "mediatek/mt7663pr2h.bin" #define FIRMWARE_MT7668 "mediatek/mt7668pr2h.bin" +#define FIRMWARE_MT7922 "mediatek/BT_RAM_CODE_MT7922_1_1_hdr.bin" #define FIRMWARE_MT7961 "mediatek/BT_RAM_CODE_MT7961_1_2_hdr.bin" #define FIRMWARE_MT7925 "mediatek/mt7925/BT_RAM_CODE_MT7925_1_1_hdr.bin" --- linux-xilinx-6.8.0.orig/drivers/bluetooth/btmtksdio.c +++ linux-xilinx-6.8.0/drivers/bluetooth/btmtksdio.c @@ -1144,9 +1144,6 @@ } } - /* Valid LE States quirk for MediaTek 7921 */ - set_bit(HCI_QUIRK_VALID_LE_STATES, &hdev->quirks); - break; case 0x7663: case 0x7668: --- linux-xilinx-6.8.0.orig/drivers/bluetooth/btnxpuart.c +++ linux-xilinx-6.8.0/drivers/bluetooth/btnxpuart.c @@ -29,6 +29,7 @@ #define BTNXPUART_CHECK_BOOT_SIGNATURE 3 #define BTNXPUART_SERDEV_OPEN 4 #define BTNXPUART_IR_IN_PROGRESS 5 +#define BTNXPUART_FW_DOWNLOAD_ABORT 6 /* NXP HW err codes */ #define BTNXPUART_IR_HW_ERR 0xb0 @@ -126,6 +127,7 @@ struct hci_dev *hdev; struct work_struct work; struct timer_list ps_timer; + struct mutex ps_lock; }; struct wakeup_cmd_payload { @@ -158,6 +160,7 @@ u8 fw_name[MAX_FW_FILE_NAME_LEN]; u32 fw_dnld_v1_offset; u32 fw_v1_sent_bytes; + u32 fw_dnld_v3_offset; u32 fw_v3_offset_correction; u32 fw_v1_expected_len; u32 boot_reg_offset; @@ -186,6 +189,11 @@ #define NXP_NAK_V3 0x7b #define NXP_CRC_ERROR_V3 0x7c +/* Bootloader signature error codes */ +#define NXP_ACK_RX_TIMEOUT 0x0002 /* ACK not received from host */ +#define NXP_HDR_RX_TIMEOUT 0x0003 /* FW Header chunk not received */ +#define NXP_DATA_RX_TIMEOUT 0x0004 /* FW Data chunk not received */ + #define HDR_LEN 16 #define NXP_RECV_CHIP_VER_V1 \ @@ -276,11 +284,22 @@ __be32 crc; } __packed; +struct nxp_v3_rx_timeout_nak { + u8 nak; + __le32 offset; + u8 crc; +} __packed; + +union nxp_v3_rx_timeout_nak_u { + struct nxp_v3_rx_timeout_nak pkt; + u8 buf[6]; +}; + static u8 crc8_table[CRC8_TABLE_SIZE]; /* Default configurations */ #define DEFAULT_H2C_WAKEUP_MODE WAKEUP_METHOD_BREAK -#define DEFAULT_PS_MODE PS_MODE_DISABLE +#define DEFAULT_PS_MODE PS_MODE_ENABLE #define FW_INIT_BAUDRATE HCI_NXP_PRI_BAUDRATE static struct sk_buff *nxp_drv_send_cmd(struct hci_dev *hdev, u16 opcode, @@ -317,6 +336,9 @@ if (psdata->cur_psmode == PS_MODE_ENABLE) mod_timer(&psdata->ps_timer, jiffies + msecs_to_jiffies(psdata->h2c_ps_interval)); + + if (psdata->ps_state == PS_STATE_AWAKE && psdata->ps_cmd == PS_CMD_ENTER_PS) + cancel_work_sync(&psdata->work); } static void ps_cancel_timer(struct btnxpuart_dev *nxpdev) @@ -324,7 +346,7 @@ struct ps_data *psdata = &nxpdev->psdata; flush_work(&psdata->work); - del_timer_sync(&psdata->ps_timer); + timer_shutdown_sync(&psdata->ps_timer); } static void ps_control(struct hci_dev *hdev, u8 ps_state) @@ -337,6 +359,7 @@ !test_bit(BTNXPUART_SERDEV_OPEN, &nxpdev->tx_state)) return; + mutex_lock(&psdata->ps_lock); switch (psdata->cur_h2c_wakeupmode) { case WAKEUP_METHOD_DTR: if (ps_state == PS_STATE_AWAKE) @@ -350,12 +373,15 @@ status = serdev_device_break_ctl(nxpdev->serdev, 0); else status = serdev_device_break_ctl(nxpdev->serdev, -1); + msleep(20); /* Allow chip to detect UART-break and enter sleep */ bt_dev_dbg(hdev, "Set UART break: %s, status=%d", str_on_off(ps_state == PS_STATE_SLEEP), status); break; } if (!status) psdata->ps_state = ps_state; + mutex_unlock(&psdata->ps_lock); + if (ps_state == PS_STATE_AWAKE) btnxpuart_tx_wakeup(nxpdev); } @@ -391,17 +417,42 @@ psdata->hdev = hdev; INIT_WORK(&psdata->work, ps_work_func); + mutex_init(&psdata->ps_lock); timer_setup(&psdata->ps_timer, ps_timeout_func, 0); } -static void ps_wakeup(struct btnxpuart_dev *nxpdev) +static bool ps_wakeup(struct btnxpuart_dev *nxpdev) { struct ps_data *psdata = &nxpdev->psdata; + u8 ps_state; - if (psdata->ps_state != PS_STATE_AWAKE) { + mutex_lock(&psdata->ps_lock); + ps_state = psdata->ps_state; + mutex_unlock(&psdata->ps_lock); + + if (ps_state != PS_STATE_AWAKE) { psdata->ps_cmd = PS_CMD_EXIT_PS; schedule_work(&psdata->work); + return true; } + return false; +} + +static void ps_cleanup(struct btnxpuart_dev *nxpdev) +{ + struct ps_data *psdata = &nxpdev->psdata; + u8 ps_state; + + mutex_lock(&psdata->ps_lock); + ps_state = psdata->ps_state; + mutex_unlock(&psdata->ps_lock); + + if (ps_state != PS_STATE_AWAKE) + ps_control(psdata->hdev, PS_STATE_AWAKE); + + ps_cancel_timer(nxpdev); + cancel_work_sync(&psdata->work); + mutex_destroy(&psdata->ps_lock); } static int send_ps_cmd(struct hci_dev *hdev, void *data) @@ -534,6 +585,7 @@ nxpdev->fw_v1_sent_bytes = 0; nxpdev->fw_v1_expected_len = HDR_LEN; nxpdev->boot_reg_offset = 0; + nxpdev->fw_dnld_v3_offset = 0; nxpdev->fw_v3_offset_correction = 0; nxpdev->baudrate_changed = false; nxpdev->timeout_changed = false; @@ -548,14 +600,23 @@ !test_bit(BTNXPUART_FW_DOWNLOADING, &nxpdev->tx_state), msecs_to_jiffies(60000)); + + release_firmware(nxpdev->fw); + memset(nxpdev->fw_name, 0, sizeof(nxpdev->fw_name)); + if (err == 0) { - bt_dev_err(hdev, "FW Download Timeout."); + bt_dev_err(hdev, "FW Download Timeout. offset: %d", + nxpdev->fw_dnld_v1_offset ? + nxpdev->fw_dnld_v1_offset : + nxpdev->fw_dnld_v3_offset); return -ETIMEDOUT; } + if (test_bit(BTNXPUART_FW_DOWNLOAD_ABORT, &nxpdev->tx_state)) { + bt_dev_err(hdev, "FW Download Aborted"); + return -EINTR; + } serdev_device_set_flow_control(nxpdev->serdev, true); - release_firmware(nxpdev->fw); - memset(nxpdev->fw_name, 0, sizeof(nxpdev->fw_name)); /* Allow the downloaded FW to initialize */ msleep(1200); @@ -883,6 +944,32 @@ return 0; } +static void nxp_handle_fw_download_error(struct hci_dev *hdev, struct v3_data_req *req) +{ + struct btnxpuart_dev *nxpdev = hci_get_drvdata(hdev); + __u32 offset = __le32_to_cpu(req->offset); + __u16 err = __le16_to_cpu(req->error); + union nxp_v3_rx_timeout_nak_u nak_tx_buf; + + switch (err) { + case NXP_ACK_RX_TIMEOUT: + case NXP_HDR_RX_TIMEOUT: + case NXP_DATA_RX_TIMEOUT: + nak_tx_buf.pkt.nak = NXP_NAK_V3; + nak_tx_buf.pkt.offset = __cpu_to_le32(offset); + nak_tx_buf.pkt.crc = crc8(crc8_table, nak_tx_buf.buf, + sizeof(nak_tx_buf) - 1, 0xff); + serdev_device_write_buf(nxpdev->serdev, nak_tx_buf.buf, + sizeof(nak_tx_buf)); + break; + default: + bt_dev_dbg(hdev, "Unknown bootloader error code: %d", err); + break; + + } + +} + static int nxp_recv_fw_req_v3(struct hci_dev *hdev, struct sk_buff *skb) { struct btnxpuart_dev *nxpdev = hci_get_drvdata(hdev); @@ -897,7 +984,12 @@ if (!req || !nxpdev->fw) goto free_skb; - nxp_send_ack(NXP_ACK_V3, hdev); + if (!req->error) { + nxp_send_ack(NXP_ACK_V3, hdev); + } else { + nxp_handle_fw_download_error(hdev, req); + goto free_skb; + } len = __le16_to_cpu(req->len); @@ -924,9 +1016,6 @@ wake_up_interruptible(&nxpdev->fw_dnld_done_wait_q); goto free_skb; } - if (req->error) - bt_dev_dbg(hdev, "FW Download received err 0x%02x from chip", - req->error); offset = __le32_to_cpu(req->offset); if (offset < nxpdev->fw_v3_offset_correction) { @@ -938,8 +1027,9 @@ goto free_skb; } - serdev_device_write_buf(nxpdev->serdev, nxpdev->fw->data + offset - - nxpdev->fw_v3_offset_correction, len); + nxpdev->fw_dnld_v3_offset = offset - nxpdev->fw_v3_offset_correction; + serdev_device_write_buf(nxpdev->serdev, nxpdev->fw->data + + nxpdev->fw_dnld_v3_offset, len); free_skb: kfree_skb(skb); @@ -1171,7 +1261,6 @@ { struct btnxpuart_dev *nxpdev = (struct btnxpuart_dev *)data; - ps_wakeup(nxpdev); ps_start_timer(nxpdev); return skb_dequeue(&nxpdev->txq); } @@ -1186,6 +1275,9 @@ struct sk_buff *skb; int len; + if (ps_wakeup(nxpdev)) + return; + while ((skb = nxp_dequeue(nxpdev))) { len = serdev_device_write_buf(serdev, skb->data, skb->len); hdev->stat.byte_tx += len; @@ -1193,7 +1285,7 @@ skb_pull(skb, len); if (skb->len > 0) { skb_queue_head(&nxpdev->txq, skb); - break; + continue; } switch (hci_skb_pkt_type(skb)) { @@ -1232,8 +1324,12 @@ { struct btnxpuart_dev *nxpdev = hci_get_drvdata(hdev); - ps_wakeup(nxpdev); serdev_device_close(nxpdev->serdev); + skb_queue_purge(&nxpdev->txq); + if (!IS_ERR_OR_NULL(nxpdev->rx_skb)) { + kfree_skb(nxpdev->rx_skb); + nxpdev->rx_skb = NULL; + } clear_bit(BTNXPUART_SERDEV_OPEN, &nxpdev->tx_state); return 0; } @@ -1248,8 +1344,10 @@ cancel_work_sync(&nxpdev->tx_work); - kfree_skb(nxpdev->rx_skb); - nxpdev->rx_skb = NULL; + if (!IS_ERR_OR_NULL(nxpdev->rx_skb)) { + kfree_skb(nxpdev->rx_skb); + nxpdev->rx_skb = NULL; + } return 0; } @@ -1364,16 +1462,22 @@ struct btnxpuart_dev *nxpdev = serdev_device_get_drvdata(serdev); struct hci_dev *hdev = nxpdev->hdev; - /* Restore FW baudrate to fw_init_baudrate if changed. - * This will ensure FW baudrate is in sync with - * driver baudrate in case this driver is re-inserted. - */ - if (nxpdev->current_baudrate != nxpdev->fw_init_baudrate) { - nxpdev->new_baudrate = nxpdev->fw_init_baudrate; - nxp_set_baudrate_cmd(hdev, NULL); + if (is_fw_downloading(nxpdev)) { + set_bit(BTNXPUART_FW_DOWNLOAD_ABORT, &nxpdev->tx_state); + clear_bit(BTNXPUART_FW_DOWNLOADING, &nxpdev->tx_state); + wake_up_interruptible(&nxpdev->check_boot_sign_wait_q); + wake_up_interruptible(&nxpdev->fw_dnld_done_wait_q); + } else { + /* Restore FW baudrate to fw_init_baudrate if changed. + * This will ensure FW baudrate is in sync with + * driver baudrate in case this driver is re-inserted. + */ + if (nxpdev->current_baudrate != nxpdev->fw_init_baudrate) { + nxpdev->new_baudrate = nxpdev->fw_init_baudrate; + nxp_set_baudrate_cmd(hdev, NULL); + } } - - ps_cancel_timer(nxpdev); + ps_cleanup(nxpdev); hci_unregister_dev(hdev); hci_free_dev(hdev); } --- linux-xilinx-6.8.0.orig/drivers/bluetooth/btqca.c +++ linux-xilinx-6.8.0/drivers/bluetooth/btqca.c @@ -99,7 +99,8 @@ { struct sk_buff *skb; struct edl_event_hdr *edl; - char cmd, build_label[QCA_FW_BUILD_VER_LEN]; + char *build_label; + char cmd; int build_lbl_len, err = 0; bt_dev_dbg(hdev, "QCA read fw build info"); @@ -114,6 +115,11 @@ return err; } + if (skb->len < sizeof(*edl)) { + err = -EILSEQ; + goto out; + } + edl = (struct edl_event_hdr *)(skb->data); if (!edl) { bt_dev_err(hdev, "QCA read fw build info with no header"); @@ -129,14 +135,27 @@ goto out; } + if (skb->len < sizeof(*edl) + 1) { + err = -EILSEQ; + goto out; + } + build_lbl_len = edl->data[0]; - if (build_lbl_len <= QCA_FW_BUILD_VER_LEN - 1) { - memcpy(build_label, edl->data + 1, build_lbl_len); - *(build_label + build_lbl_len) = '\0'; + + if (skb->len < sizeof(*edl) + 1 + build_lbl_len) { + err = -EILSEQ; + goto out; + } + + build_label = kstrndup(&edl->data[1], build_lbl_len, GFP_KERNEL); + if (!build_label) { + err = -ENOMEM; + goto out; } hci_set_fw_info(hdev, "%s", build_label); + kfree(build_label); out: kfree_skb(skb); return err; @@ -235,6 +254,11 @@ goto out; } + if (skb->len < 3) { + err = -EILSEQ; + goto out; + } + *bid = (edl->data[1] << 8) + edl->data[2]; bt_dev_dbg(hdev, "%s: bid = %x", __func__, *bid); @@ -265,9 +289,43 @@ } EXPORT_SYMBOL_GPL(qca_send_pre_shutdown_cmd); -static void qca_tlv_check_data(struct hci_dev *hdev, +static bool qca_filename_has_extension(const char *filename) +{ + const char *suffix = strrchr(filename, '.'); + + /* File extensions require a dot, but not as the first or last character */ + if (!suffix || suffix == filename || *(suffix + 1) == '\0') + return 0; + + /* Avoid matching directories with names that look like files with extensions */ + return !strchr(suffix, '/'); +} + +static bool qca_get_alt_nvm_file(char *filename, size_t max_size) +{ + char fwname[64]; + const char *suffix; + + /* nvm file name has an extension, replace with .bin */ + if (qca_filename_has_extension(filename)) { + suffix = strrchr(filename, '.'); + strscpy(fwname, filename, suffix - filename + 1); + snprintf(fwname + (suffix - filename), + sizeof(fwname) - (suffix - filename), ".bin"); + /* If nvm file is already the default one, return false to skip the retry. */ + if (strcmp(fwname, filename) == 0) + return false; + + snprintf(filename, max_size, "%s", fwname); + return true; + } + return false; +} + +static int qca_tlv_check_data(struct hci_dev *hdev, struct qca_fw_config *config, - u8 *fw_data, enum qca_btsoc_type soc_type) + u8 *fw_data, size_t fw_size, + enum qca_btsoc_type soc_type) { const u8 *data; u32 type_len; @@ -277,12 +335,16 @@ struct tlv_type_patch *tlv_patch; struct tlv_type_nvm *tlv_nvm; uint8_t nvm_baud_rate = config->user_baud_rate; + u8 type; config->dnld_mode = QCA_SKIP_EVT_NONE; config->dnld_type = QCA_SKIP_EVT_NONE; switch (config->type) { case ELF_TYPE_PATCH: + if (fw_size < 7) + return -EINVAL; + config->dnld_mode = QCA_SKIP_EVT_VSE_CC; config->dnld_type = QCA_SKIP_EVT_VSE_CC; @@ -291,6 +353,9 @@ bt_dev_dbg(hdev, "File version : 0x%x", fw_data[6]); break; case TLV_TYPE_PATCH: + if (fw_size < sizeof(struct tlv_type_hdr) + sizeof(struct tlv_type_patch)) + return -EINVAL; + tlv = (struct tlv_type_hdr *)fw_data; type_len = le32_to_cpu(tlv->type_len); tlv_patch = (struct tlv_type_patch *)tlv->data; @@ -330,25 +395,64 @@ break; case TLV_TYPE_NVM: + if (fw_size < sizeof(struct tlv_type_hdr)) + return -EINVAL; + tlv = (struct tlv_type_hdr *)fw_data; type_len = le32_to_cpu(tlv->type_len); - length = (type_len >> 8) & 0x00ffffff; + length = type_len >> 8; + type = type_len & 0xff; - BT_DBG("TLV Type\t\t : 0x%x", type_len & 0x000000ff); + /* Some NVM files have more than one set of tags, only parse + * the first set when it has type 2 for now. When there is + * more than one set there is an enclosing header of type 4. + */ + if (type == 4) { + if (fw_size < 2 * sizeof(struct tlv_type_hdr)) + return -EINVAL; + + tlv++; + + type_len = le32_to_cpu(tlv->type_len); + length = type_len >> 8; + type = type_len & 0xff; + } + + BT_DBG("TLV Type\t\t : 0x%x", type); BT_DBG("Length\t\t : %d bytes", length); + if (type != 2) + break; + + if (fw_size < length + (tlv->data - fw_data)) + return -EINVAL; + idx = 0; data = tlv->data; - while (idx < length) { + while (idx < length - sizeof(struct tlv_type_nvm)) { tlv_nvm = (struct tlv_type_nvm *)(data + idx); tag_id = le16_to_cpu(tlv_nvm->tag_id); tag_len = le16_to_cpu(tlv_nvm->tag_len); + if (length < idx + sizeof(struct tlv_type_nvm) + tag_len) + return -EINVAL; + /* Update NVM tags as needed */ switch (tag_id) { + case EDL_TAG_ID_BD_ADDR: + if (tag_len != sizeof(bdaddr_t)) + return -EINVAL; + + memcpy(&config->bdaddr, tlv_nvm->data, sizeof(bdaddr_t)); + + break; + case EDL_TAG_ID_HCI: + if (tag_len < 3) + return -EINVAL; + /* HCI transport layer parameters * enabling software inband sleep * onto controller side. @@ -364,6 +468,9 @@ break; case EDL_TAG_ID_DEEP_SLEEP: + if (tag_len < 1) + return -EINVAL; + /* Sleep enable mask * enabling deep sleep feature on controller. */ @@ -372,14 +479,16 @@ break; } - idx += (sizeof(u16) + sizeof(u16) + 8 + tag_len); + idx += sizeof(struct tlv_type_nvm) + tag_len; } break; default: BT_ERR("Unknown TLV type %d", config->type); - break; + return -EINVAL; } + + return 0; } static int qca_tlv_send_segment(struct hci_dev *hdev, int seg_size, @@ -510,6 +619,19 @@ config->fwname, ret); return ret; } + } + /* If the board-specific file is missing, try loading the default + * one, unless that was attempted already. + */ + else if (config->type == TLV_TYPE_NVM && + qca_get_alt_nvm_file(config->fwname, sizeof(config->fwname))) { + bt_dev_info(hdev, "QCA Downloading %s", config->fwname); + ret = request_firmware(&fw, config->fwname, &hdev->dev); + if (ret) { + bt_dev_err(hdev, "QCA Failed to request file: %s (%d)", + config->fwname, ret); + return ret; + } } else { bt_dev_err(hdev, "QCA Failed to request file: %s (%d)", config->fwname, ret); @@ -529,7 +651,9 @@ memcpy(data, fw->data, size); release_firmware(fw); - qca_tlv_check_data(hdev, config, data, soc_type); + ret = qca_tlv_check_data(hdev, config, data, size, soc_type); + if (ret) + goto out; segment = data; remain = size; @@ -612,28 +736,77 @@ } EXPORT_SYMBOL_GPL(qca_set_bdaddr_rome); -static void qca_generate_hsp_nvm_name(char *fwname, size_t max_size, +static int qca_check_bdaddr(struct hci_dev *hdev, const struct qca_fw_config *config) +{ + struct hci_rp_read_bd_addr *bda; + struct sk_buff *skb; + int err; + + if (bacmp(&hdev->public_addr, BDADDR_ANY)) + return 0; + + skb = __hci_cmd_sync(hdev, HCI_OP_READ_BD_ADDR, 0, NULL, + HCI_INIT_TIMEOUT); + if (IS_ERR(skb)) { + err = PTR_ERR(skb); + bt_dev_err(hdev, "Failed to read device address (%d)", err); + return err; + } + + if (skb->len != sizeof(*bda)) { + bt_dev_err(hdev, "Device address length mismatch"); + kfree_skb(skb); + return -EIO; + } + + bda = (struct hci_rp_read_bd_addr *)skb->data; + if (!bacmp(&bda->bdaddr, &config->bdaddr)) + set_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks); + + kfree_skb(skb); + + return 0; +} + +static void qca_get_nvm_name_by_board(char *fwname, size_t max_size, + const char *stem, enum qca_btsoc_type soc_type, struct qca_btsoc_version ver, u8 rom_ver, u16 bid) { const char *variant; + const char *prefix; - /* hsp gf chip */ - if ((le32_to_cpu(ver.soc_id) & QCA_HSP_GF_SOC_MASK) == QCA_HSP_GF_SOC_ID) - variant = "g"; - else - variant = ""; + /* Set the default value to variant and prefix */ + variant = ""; + prefix = "b"; - if (bid == 0x0) - snprintf(fwname, max_size, "qca/hpnv%02x%s.bin", rom_ver, variant); - else - snprintf(fwname, max_size, "qca/hpnv%02x%s.%x", rom_ver, variant, bid); + if (soc_type == QCA_QCA2066) + prefix = ""; + + if (soc_type == QCA_WCN6855 || soc_type == QCA_QCA2066) { + /* If the chip is manufactured by GlobalFoundries */ + if ((le32_to_cpu(ver.soc_id) & QCA_HSP_GF_SOC_MASK) == QCA_HSP_GF_SOC_ID) + variant = "g"; + } + + if (rom_ver != 0) { + if (bid == 0x0 || bid == 0xffff) + snprintf(fwname, max_size, "qca/%s%02x%s.bin", stem, rom_ver, variant); + else + snprintf(fwname, max_size, "qca/%s%02x%s.%s%02x", stem, rom_ver, + variant, prefix, bid); + } else { + if (bid == 0x0 || bid == 0xffff) + snprintf(fwname, max_size, "qca/%s%s.bin", stem, variant); + else + snprintf(fwname, max_size, "qca/%s%s.%s%02x", stem, variant, prefix, bid); + } } int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate, enum qca_btsoc_type soc_type, struct qca_btsoc_version ver, const char *firmware_name) { - struct qca_fw_config config; + struct qca_fw_config config = {}; int err; u8 rom_ver = 0; u32 soc_ver; @@ -709,14 +882,20 @@ /* Give the controller some time to get ready to receive the NVM */ msleep(10); - if (soc_type == QCA_QCA2066) + if (soc_type == QCA_QCA2066 || soc_type == QCA_WCN7850) qca_read_fw_board_id(hdev, &boardid); /* Download NVM configuration */ config.type = TLV_TYPE_NVM; if (firmware_name) { - snprintf(config.fwname, sizeof(config.fwname), - "qca/%s", firmware_name); + /* The firmware name has an extension, use it directly */ + if (qca_filename_has_extension(firmware_name)) { + snprintf(config.fwname, sizeof(config.fwname), "qca/%s", firmware_name); + } else { + qca_read_fw_board_id(hdev, &boardid); + qca_get_nvm_name_by_board(config.fwname, sizeof(config.fwname), + firmware_name, soc_type, ver, 0, boardid); + } } else { switch (soc_type) { case QCA_WCN3990: @@ -735,8 +914,9 @@ "qca/apnv%02x.bin", rom_ver); break; case QCA_QCA2066: - qca_generate_hsp_nvm_name(config.fwname, - sizeof(config.fwname), ver, rom_ver, boardid); + qca_get_nvm_name_by_board(config.fwname, + sizeof(config.fwname), "hpnv", soc_type, ver, + rom_ver, boardid); break; case QCA_QCA6390: snprintf(config.fwname, sizeof(config.fwname), @@ -747,14 +927,14 @@ "qca/msnv%02x.bin", rom_ver); break; case QCA_WCN6855: - snprintf(config.fwname, sizeof(config.fwname), - "qca/hpnv%02x.bin", rom_ver); + qca_read_fw_board_id(hdev, &boardid); + qca_get_nvm_name_by_board(config.fwname, sizeof(config.fwname), + "hpnv", soc_type, ver, rom_ver, boardid); break; case QCA_WCN7850: - snprintf(config.fwname, sizeof(config.fwname), - "qca/hmtnv%02x.bin", rom_ver); + qca_get_nvm_name_by_board(config.fwname, sizeof(config.fwname), + "hmtnv", soc_type, ver, rom_ver, boardid); break; - default: snprintf(config.fwname, sizeof(config.fwname), "qca/nvm_%08x.bin", soc_ver); @@ -818,6 +998,10 @@ break; } + err = qca_check_bdaddr(hdev, &config); + if (err) + return err; + bt_dev_info(hdev, "QCA setup on UART is completed"); return 0; @@ -826,11 +1010,15 @@ int qca_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr) { + bdaddr_t bdaddr_swapped; struct sk_buff *skb; int err; - skb = __hci_cmd_sync_ev(hdev, EDL_WRITE_BD_ADDR_OPCODE, 6, bdaddr, - HCI_EV_VENDOR, HCI_INIT_TIMEOUT); + baswap(&bdaddr_swapped, bdaddr); + + skb = __hci_cmd_sync_ev(hdev, EDL_WRITE_BD_ADDR_OPCODE, 6, + &bdaddr_swapped, HCI_EV_VENDOR, + HCI_INIT_TIMEOUT); if (IS_ERR(skb)) { err = PTR_ERR(skb); bt_dev_err(hdev, "QCA Change address cmd failed (%d)", err); --- linux-xilinx-6.8.0.orig/drivers/bluetooth/btqca.h +++ linux-xilinx-6.8.0/drivers/bluetooth/btqca.h @@ -29,6 +29,7 @@ #define EDL_PATCH_CONFIG_RES_EVT (0x00) #define QCA_DISABLE_LOGGING_SUB_OP (0x14) +#define EDL_TAG_ID_BD_ADDR 2 #define EDL_TAG_ID_HCI (17) #define EDL_TAG_ID_DEEP_SLEEP (27) @@ -47,7 +48,6 @@ #define get_soc_ver(soc_id, rom_ver) \ ((le32_to_cpu(soc_id) << 16) | (le16_to_cpu(rom_ver))) -#define QCA_FW_BUILD_VER_LEN 255 #define QCA_HSP_GF_SOC_ID 0x1200 #define QCA_HSP_GF_SOC_MASK 0x0000ff00 @@ -94,6 +94,7 @@ uint8_t user_baud_rate; enum qca_tlv_dnld_mode dnld_mode; enum qca_tlv_dnld_mode dnld_type; + bdaddr_t bdaddr; }; struct edl_event_hdr { --- linux-xilinx-6.8.0.orig/drivers/bluetooth/btrsi.c +++ linux-xilinx-6.8.0/drivers/bluetooth/btrsi.c @@ -134,7 +134,6 @@ hdev->bus = HCI_USB; hci_set_drvdata(hdev, h_adapter); - hdev->dev_type = HCI_PRIMARY; hdev->open = rsi_hci_open; hdev->close = rsi_hci_close; hdev->flush = rsi_hci_flush; --- linux-xilinx-6.8.0.orig/drivers/bluetooth/btrtl.c +++ linux-xilinx-6.8.0/drivers/bluetooth/btrtl.c @@ -1275,7 +1275,6 @@ case CHIP_ID_8852B: case CHIP_ID_8852C: case CHIP_ID_8851B: - set_bit(HCI_QUIRK_VALID_LE_STATES, &hdev->quirks); set_bit(HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED, &hdev->quirks); /* RTL8852C needs to transmit mSBC data continuously without @@ -1285,6 +1284,7 @@ btrealtek_set_flag(hdev, REALTEK_ALT6_CONTINUOUS_TX_CHIP); if (btrtl_dev->project_id == CHIP_ID_8852A || + btrtl_dev->project_id == CHIP_ID_8852B || btrtl_dev->project_id == CHIP_ID_8852C) set_bit(HCI_QUIRK_USE_MSFT_EXT_ADDRESS_FILTER, &hdev->quirks); --- linux-xilinx-6.8.0.orig/drivers/bluetooth/btsdio.c +++ linux-xilinx-6.8.0/drivers/bluetooth/btsdio.c @@ -32,9 +32,6 @@ /* Generic Bluetooth Type-B SDIO device */ { SDIO_DEVICE_CLASS(SDIO_CLASS_BT_B) }, - /* Generic Bluetooth AMP controller */ - { SDIO_DEVICE_CLASS(SDIO_CLASS_BT_AMP) }, - { } /* Terminating entry */ }; @@ -319,11 +316,6 @@ hdev->bus = HCI_SDIO; hci_set_drvdata(hdev, data); - if (id->class == SDIO_CLASS_BT_AMP) - hdev->dev_type = HCI_AMP; - else - hdev->dev_type = HCI_PRIMARY; - data->hdev = hdev; SET_HCIDEV_DEV(hdev, &func->dev); --- linux-xilinx-6.8.0.orig/drivers/bluetooth/btusb.c +++ linux-xilinx-6.8.0/drivers/bluetooth/btusb.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -407,6 +408,9 @@ { USB_DEVICE(0x0cf3, 0xe700), .driver_info = BTUSB_QCA_WCN6855 | BTUSB_WIDEBAND_SPEECH | BTUSB_VALID_LE_STATES }, + { USB_DEVICE(0x0489, 0xe0fc), .driver_info = BTUSB_QCA_WCN6855 | + BTUSB_WIDEBAND_SPEECH | + BTUSB_VALID_LE_STATES }, /* Broadcom BCM2035 */ { USB_DEVICE(0x0a5c, 0x2009), .driver_info = BTUSB_BCM92035 }, @@ -538,10 +542,14 @@ BTUSB_WIDEBAND_SPEECH }, { USB_DEVICE(0x13d3, 0x3592), .driver_info = BTUSB_REALTEK | BTUSB_WIDEBAND_SPEECH }, + { USB_DEVICE(0x0489, 0xe122), .driver_info = BTUSB_REALTEK | + BTUSB_WIDEBAND_SPEECH }, /* Realtek 8852BE Bluetooth devices */ { USB_DEVICE(0x0cb8, 0xc559), .driver_info = BTUSB_REALTEK | BTUSB_WIDEBAND_SPEECH }, + { USB_DEVICE(0x0bda, 0x4853), .driver_info = BTUSB_REALTEK | + BTUSB_WIDEBAND_SPEECH }, { USB_DEVICE(0x0bda, 0x887b), .driver_info = BTUSB_REALTEK | BTUSB_WIDEBAND_SPEECH }, { USB_DEVICE(0x0bda, 0xb85b), .driver_info = BTUSB_REALTEK | @@ -552,6 +560,14 @@ BTUSB_WIDEBAND_SPEECH }, { USB_DEVICE(0x13d3, 0x3572), .driver_info = BTUSB_REALTEK | BTUSB_WIDEBAND_SPEECH }, + { USB_DEVICE(0x13d3, 0x3591), .driver_info = BTUSB_REALTEK | + BTUSB_WIDEBAND_SPEECH }, + { USB_DEVICE(0x0489, 0xe123), .driver_info = BTUSB_REALTEK | + BTUSB_WIDEBAND_SPEECH }, + { USB_DEVICE(0x0489, 0xe125), .driver_info = BTUSB_REALTEK | + BTUSB_WIDEBAND_SPEECH }, + { USB_DEVICE(0x13d3, 0x3610), .driver_info = BTUSB_MEDIATEK | + BTUSB_WIDEBAND_SPEECH }, /* Realtek Bluetooth devices */ { USB_VENDOR_AND_INTERFACE_INFO(0x0bda, 0xe0, 0x01, 0x01), @@ -583,6 +599,9 @@ { USB_DEVICE(0x0489, 0xe0c8), .driver_info = BTUSB_MEDIATEK | BTUSB_WIDEBAND_SPEECH | BTUSB_VALID_LE_STATES }, + { USB_DEVICE(0x0489, 0xe0cd), .driver_info = BTUSB_MEDIATEK | + BTUSB_WIDEBAND_SPEECH | + BTUSB_VALID_LE_STATES }, { USB_DEVICE(0x0489, 0xe0e0), .driver_info = BTUSB_MEDIATEK | BTUSB_WIDEBAND_SPEECH | BTUSB_VALID_LE_STATES }, @@ -613,6 +632,9 @@ { USB_DEVICE(0x0e8d, 0x0608), .driver_info = BTUSB_MEDIATEK | BTUSB_WIDEBAND_SPEECH | BTUSB_VALID_LE_STATES }, + { USB_DEVICE(0x13d3, 0x3606), .driver_info = BTUSB_MEDIATEK | + BTUSB_WIDEBAND_SPEECH | + BTUSB_VALID_LE_STATES }, /* MediaTek MT7922A Bluetooth devices */ { USB_DEVICE(0x0489, 0xe0d8), .driver_info = BTUSB_MEDIATEK | @@ -654,6 +676,52 @@ { USB_DEVICE(0x35f5, 0x7922), .driver_info = BTUSB_MEDIATEK | BTUSB_WIDEBAND_SPEECH | BTUSB_VALID_LE_STATES }, + { USB_DEVICE(0x13d3, 0x3614), .driver_info = BTUSB_MEDIATEK | + BTUSB_WIDEBAND_SPEECH | + BTUSB_VALID_LE_STATES }, + { USB_DEVICE(0x13d3, 0x3615), .driver_info = BTUSB_MEDIATEK | + BTUSB_WIDEBAND_SPEECH | + BTUSB_VALID_LE_STATES }, + { USB_DEVICE(0x04ca, 0x38e4), .driver_info = BTUSB_MEDIATEK | + BTUSB_WIDEBAND_SPEECH | + BTUSB_VALID_LE_STATES }, + { USB_DEVICE(0x13d3, 0x3605), .driver_info = BTUSB_MEDIATEK | + BTUSB_WIDEBAND_SPEECH | + BTUSB_VALID_LE_STATES }, + { USB_DEVICE(0x13d3, 0x3607), .driver_info = BTUSB_MEDIATEK | + BTUSB_WIDEBAND_SPEECH | + BTUSB_VALID_LE_STATES }, + + /* Additional MediaTek MT7925 Bluetooth devices */ + { USB_DEVICE(0x0489, 0xe111), .driver_info = BTUSB_MEDIATEK | + BTUSB_WIDEBAND_SPEECH | + BTUSB_VALID_LE_STATES }, + { USB_DEVICE(0x0489, 0xe113), .driver_info = BTUSB_MEDIATEK | + BTUSB_WIDEBAND_SPEECH | + BTUSB_VALID_LE_STATES }, + { USB_DEVICE(0x0489, 0xe124), .driver_info = BTUSB_MEDIATEK | + BTUSB_WIDEBAND_SPEECH | + BTUSB_VALID_LE_STATES }, + { USB_DEVICE(0x0489, 0xe14f), .driver_info = BTUSB_MEDIATEK | + BTUSB_WIDEBAND_SPEECH | + BTUSB_VALID_LE_STATES }, + { USB_DEVICE(0x0489, 0xe150), .driver_info = BTUSB_MEDIATEK | + BTUSB_WIDEBAND_SPEECH | + BTUSB_VALID_LE_STATES }, + { USB_DEVICE(0x0489, 0xe151), .driver_info = BTUSB_MEDIATEK | + BTUSB_WIDEBAND_SPEECH | + BTUSB_VALID_LE_STATES }, + { USB_DEVICE(0x13d3, 0x3602), .driver_info = BTUSB_MEDIATEK | + BTUSB_WIDEBAND_SPEECH | + BTUSB_VALID_LE_STATES }, + { USB_DEVICE(0x13d3, 0x3603), .driver_info = BTUSB_MEDIATEK | + BTUSB_WIDEBAND_SPEECH | + BTUSB_VALID_LE_STATES }, + + /* Additional MediaTek MT7925 Bluetooth devices */ + { USB_DEVICE(0x13d3, 0x3602), .driver_info = BTUSB_MEDIATEK | + BTUSB_WIDEBAND_SPEECH | + BTUSB_VALID_LE_STATES }, /* Additional Realtek 8723AE Bluetooth devices */ { USB_DEVICE(0x0930, 0x021d), .driver_info = BTUSB_REALTEK }, @@ -690,6 +758,8 @@ BTUSB_WIDEBAND_SPEECH }, { USB_DEVICE(0x2b89, 0x8761), .driver_info = BTUSB_REALTEK | BTUSB_WIDEBAND_SPEECH }, + { USB_DEVICE(0x13d3, 0x3628), .driver_info = BTUSB_MEDIATEK | + BTUSB_WIDEBAND_SPEECH }, /* Additional Realtek 8821AE Bluetooth devices */ { USB_DEVICE(0x0b05, 0x17dc), .driver_info = BTUSB_REALTEK }, @@ -854,6 +924,10 @@ int (*setup_on_usb)(struct hci_dev *hdev); + int (*suspend)(struct hci_dev *hdev); + int (*resume)(struct hci_dev *hdev); + int (*disconnect)(struct hci_dev *hdev); + int oob_wake_irq; /* irq for out-of-band wake-on-bt */ unsigned cmd_timeout_cnt; @@ -1352,7 +1426,15 @@ if (!urb) return -ENOMEM; - size = le16_to_cpu(data->intr_ep->wMaxPacketSize); + if (le16_to_cpu(data->udev->descriptor.idVendor) == 0x0a12 && + le16_to_cpu(data->udev->descriptor.idProduct) == 0x0001) + /* Fake CSR devices don't seem to support sort-transter */ + size = le16_to_cpu(data->intr_ep->wMaxPacketSize); + else + /* Use maximum HCI Event size so the USB stack handles + * ZPL/short-transfer automatically. + */ + size = HCI_MAX_EVENT_SIZE; buf = kmalloc(size, mem_flags); if (!buf) { @@ -3273,7 +3355,6 @@ { struct btusb_data *data = hci_get_drvdata(hdev); u16 handle = le16_to_cpu(hci_acl_hdr(skb)->handle); - struct sk_buff *skb_cd; switch (handle) { case 0xfc6f: /* Firmware dump from device */ @@ -3286,9 +3367,12 @@ * for backward compatibility, so we have to clone the packet * extraly for the in-kernel coredump support. */ - skb_cd = skb_clone(skb, GFP_ATOMIC); - if (skb_cd) - btmtk_process_coredump(hdev, skb_cd); + if (IS_ENABLED(CONFIG_DEV_COREDUMP)) { + struct sk_buff *skb_cd = skb_clone(skb, GFP_ATOMIC); + + if (skb_cd) + btmtk_process_coredump(hdev, skb_cd); + } fallthrough; case 0x05ff: /* Firmware debug logging 1 */ @@ -3366,6 +3450,35 @@ return 0; } +#define BTUSB_EDGE_LED_COMMAND 0xfc77 + +static void btusb_edge_set_led(struct hci_dev *hdev, bool state) +{ + struct sk_buff *skb; + u8 config_led[] = { 0x09, 0x00, 0x01, 0x01 }; + + if (state) + config_led[1] = 0x01; + + skb = __hci_cmd_sync(hdev, BTUSB_EDGE_LED_COMMAND, sizeof(config_led), config_led, HCI_INIT_TIMEOUT); + if (IS_ERR(skb)) + BT_ERR("%s fail to set LED (%ld)", hdev->name, PTR_ERR(skb)); + else + kfree_skb(skb); +} + +static int btusb_edge_post_init(struct hci_dev *hdev) +{ + btusb_edge_set_led(hdev, true); + return 0; +} + +static int btusb_edge_shutdown(struct hci_dev *hdev) +{ + btusb_edge_set_led(hdev, false); + return 0; +} + static int btusb_set_bdaddr_ath3012(struct hci_dev *hdev, const bdaddr_t *bdaddr) { @@ -3461,13 +3574,12 @@ static void btusb_coredump_qca(struct hci_dev *hdev) { + int err; static const u8 param[] = { 0x26 }; - struct sk_buff *skb; - skb = __hci_cmd_sync(hdev, 0xfc0c, 1, param, HCI_CMD_TIMEOUT); - if (IS_ERR(skb)) - bt_dev_err(hdev, "%s: triggle crash failed (%ld)", __func__, PTR_ERR(skb)); - kfree_skb(skb); + err = __hci_cmd_send(hdev, 0xfc0c, 1, param); + if (err < 0) + bt_dev_err(hdev, "%s: triggle crash failed (%d)", __func__, err); } /* @@ -4311,11 +4423,6 @@ hdev->bus = HCI_USB; hci_set_drvdata(hdev, data); - if (id->driver_info & BTUSB_AMP) - hdev->dev_type = HCI_AMP; - else - hdev->dev_type = HCI_PRIMARY; - data->hdev = hdev; SET_HCIDEV_DEV(hdev, &intf->dev); @@ -4398,8 +4505,18 @@ btintel_set_flag(hdev, INTEL_BROKEN_SHUTDOWN_LED); } - if (id->driver_info & BTUSB_MARVELL) + if (id->driver_info & BTUSB_MARVELL) { + struct pci_dev *pdev; hdev->set_bdaddr = btusb_set_bdaddr_marvell; + pdev = pci_get_subsys(PCI_ANY_ID, PCI_ANY_ID, 0x1028, 0x0720, NULL); + if (!pdev) + pdev = pci_get_subsys(PCI_ANY_ID, PCI_ANY_ID, 0x1028, 0x0733, NULL); + if (pdev) { + pci_dev_put(pdev); + hdev->post_init = btusb_edge_post_init; + hdev->shutdown = btusb_edge_shutdown; + } + } if (IS_ENABLED(CONFIG_BT_HCIBTUSB_MTK) && (id->driver_info & BTUSB_MEDIATEK)) { @@ -4481,6 +4598,9 @@ set_bit(HCI_QUIRK_BROKEN_READ_TRANSMIT_POWER, &hdev->quirks); set_bit(HCI_QUIRK_BROKEN_SET_RPA_TIMEOUT, &hdev->quirks); set_bit(HCI_QUIRK_BROKEN_EXT_SCAN, &hdev->quirks); + set_bit(HCI_QUIRK_BROKEN_READ_ENC_KEY_SIZE, &hdev->quirks); + set_bit(HCI_QUIRK_BROKEN_EXT_CREATE_CONN, &hdev->quirks); + set_bit(HCI_QUIRK_BROKEN_WRITE_AUTH_PAYLOAD_TIMEOUT, &hdev->quirks); } if (!reset) @@ -4497,8 +4617,8 @@ if (id->driver_info & BTUSB_WIDEBAND_SPEECH) set_bit(HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED, &hdev->quirks); - if (id->driver_info & BTUSB_VALID_LE_STATES) - set_bit(HCI_QUIRK_VALID_LE_STATES, &hdev->quirks); + if (!(id->driver_info & BTUSB_VALID_LE_STATES)) + set_bit(HCI_QUIRK_BROKEN_LE_STATES, &hdev->quirks); if (id->driver_info & BTUSB_DIGIANSWER) { data->cmdreq_type = USB_TYPE_VENDOR; @@ -4598,6 +4718,9 @@ if (data->diag) usb_set_intfdata(data->diag, NULL); + if (data->disconnect) + data->disconnect(hdev); + hci_unregister_dev(hdev); if (intf == data->intf) { @@ -4631,8 +4754,10 @@ BT_DBG("intf %p", intf); - /* Don't suspend if there are connections */ - if (hci_conn_count(data->hdev)) + /* Don't auto-suspend if there are connections; external suspend calls + * shall never fail. + */ + if (PMSG_IS_AUTO(message) && hci_conn_count(data->hdev)) return -EBUSY; if (data->suspend_count++) @@ -4650,6 +4775,9 @@ cancel_work_sync(&data->work); + if (data->suspend) + data->suspend(data->hdev); + btusb_stop_traffic(data); usb_kill_anchored_urbs(&data->tx_anchor); @@ -4753,6 +4881,9 @@ btusb_submit_isoc_urb(hdev, GFP_NOIO); } + if (data->resume) + data->resume(hdev); + spin_lock_irq(&data->txlock); play_deferred(data); clear_bit(BTUSB_SUSPENDING, &data->flags); --- linux-xilinx-6.8.0.orig/drivers/bluetooth/hci_bcm4377.c +++ linux-xilinx-6.8.0/drivers/bluetooth/hci_bcm4377.c @@ -32,7 +32,7 @@ #define BCM4378_DEVICE_ID 0x5f69 #define BCM4387_DEVICE_ID 0x5f71 -#define BCM4377_TIMEOUT 1000 +#define BCM4377_TIMEOUT msecs_to_jiffies(1000) /* * These devices only support DMA transactions inside a 32bit window @@ -495,6 +495,10 @@ * extended scanning * broken_mws_transport_config: Set to true if the chip erroneously claims to * support MWS Transport Configuration + * broken_le_ext_adv_report_phy: Set to true if this chip stuffs flags inside + * reserved bits of Primary/Secondary_PHY inside + * LE Extended Advertising Report events which + * have to be ignored * send_calibration: Optional callback to send calibration data * send_ptb: Callback to send "PTB" regulatory/calibration data */ @@ -513,6 +517,7 @@ unsigned long broken_ext_scan : 1; unsigned long broken_mws_transport_config : 1; unsigned long broken_le_coded : 1; + unsigned long broken_le_ext_adv_report_phy : 1; int (*send_calibration)(struct bcm4377_data *bcm4377); int (*send_ptb)(struct bcm4377_data *bcm4377, @@ -716,7 +721,7 @@ ring->events[msgid] = NULL; } - bitmap_release_region(ring->msgids, msgid, ring->n_entries); + bitmap_release_region(ring->msgids, msgid, 0); unlock: spin_unlock_irqrestore(&ring->lock, flags); @@ -2361,7 +2366,6 @@ bcm4377->hdev = hdev; hdev->bus = HCI_PCI; - hdev->dev_type = HCI_PRIMARY; hdev->open = bcm4377_hci_open; hdev->close = bcm4377_hci_close; hdev->send = bcm4377_hci_send_frame; @@ -2374,6 +2378,8 @@ set_bit(HCI_QUIRK_BROKEN_EXT_SCAN, &hdev->quirks); if (bcm4377->hw->broken_le_coded) set_bit(HCI_QUIRK_BROKEN_LE_CODED, &hdev->quirks); + if (bcm4377->hw->broken_le_ext_adv_report_phy) + set_bit(HCI_QUIRK_FIXUP_LE_EXT_ADV_REPORT_PHY, &hdev->quirks); pci_set_drvdata(pdev, bcm4377); hci_set_drvdata(hdev, bcm4377); @@ -2478,6 +2484,7 @@ .clear_pciecfg_subsystem_ctrl_bit19 = true, .broken_mws_transport_config = true, .broken_le_coded = true, + .broken_le_ext_adv_report_phy = true, .send_calibration = bcm4387_send_calibration, .send_ptb = bcm4378_send_ptb, }, --- linux-xilinx-6.8.0.orig/drivers/bluetooth/hci_h5.c +++ linux-xilinx-6.8.0/drivers/bluetooth/hci_h5.c @@ -113,6 +113,7 @@ int (*suspend)(struct h5 *h5); int (*resume)(struct h5 *h5); const struct acpi_gpio_mapping *acpi_gpio_map; + int sizeof_priv; }; struct h5_device_data { @@ -863,7 +864,8 @@ if (IS_ERR(h5->device_wake_gpio)) return PTR_ERR(h5->device_wake_gpio); - return hci_uart_register_device(&h5->serdev_hu, &h5p); + return hci_uart_register_device_priv(&h5->serdev_hu, &h5p, + h5->vnd->sizeof_priv); } static void h5_serdev_remove(struct serdev_device *serdev) @@ -1070,6 +1072,7 @@ .suspend = h5_btrtl_suspend, .resume = h5_btrtl_resume, .acpi_gpio_map = acpi_btrtl_gpios, + .sizeof_priv = sizeof(struct btrealtek_data), }; static const struct h5_device_data h5_data_rtl8822cs = { --- linux-xilinx-6.8.0.orig/drivers/bluetooth/hci_ldisc.c +++ linux-xilinx-6.8.0/drivers/bluetooth/hci_ldisc.c @@ -667,11 +667,6 @@ if (!test_bit(HCI_UART_RESET_ON_INIT, &hu->hdev_flags)) set_bit(HCI_QUIRK_RESET_ON_CLOSE, &hdev->quirks); - if (test_bit(HCI_UART_CREATE_AMP, &hu->hdev_flags)) - hdev->dev_type = HCI_AMP; - else - hdev->dev_type = HCI_PRIMARY; - /* Only call open() for the protocol after hdev is fully initialized as * open() (or a timer/workqueue it starts) may attempt to reference it. */ @@ -722,7 +717,6 @@ { unsigned long valid_flags = BIT(HCI_UART_RAW_DEVICE) | BIT(HCI_UART_RESET_ON_INIT) | - BIT(HCI_UART_CREATE_AMP) | BIT(HCI_UART_INIT_PENDING) | BIT(HCI_UART_EXT_CONFIG) | BIT(HCI_UART_VND_DETECT); --- linux-xilinx-6.8.0.orig/drivers/bluetooth/hci_qca.c +++ linux-xilinx-6.8.0/drivers/bluetooth/hci_qca.c @@ -7,7 +7,6 @@ * * Copyright (C) 2007 Texas Instruments, Inc. * Copyright (c) 2010, 2012, 2018 The Linux Foundation. All rights reserved. - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. * * Acknowledgements: * This file is based on hci_ll.c, which was... @@ -226,6 +225,7 @@ struct qca_power *bt_power; u32 init_speed; u32 oper_speed; + bool bdaddr_property_broken; const char *firmware_name; }; @@ -1090,6 +1090,7 @@ qca->memdump_state = QCA_MEMDUMP_COLLECTED; cancel_delayed_work(&qca->ctrl_memdump_timeout); clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags); + clear_bit(QCA_IBS_DISABLED, &qca->flags); mutex_unlock(&qca->hci_memdump_lock); return; } @@ -1672,6 +1673,9 @@ struct hci_uart *hu = hci_get_drvdata(hdev); bool wakeup; + if (!hu->serdev) + return true; + /* BT SoC attached through the serial bus is handled by the serdev driver. * So we need to use the device handle of the serdev driver to get the * status of device may wakeup. @@ -1843,6 +1847,7 @@ const char *firmware_name = qca_get_firmware_name(hu); int ret; struct qca_btsoc_version ver; + struct qca_serdev *qcadev; const char *soc_name; ret = qca_check_speeds(hu); @@ -1904,16 +1909,9 @@ case QCA_WCN6750: case QCA_WCN6855: case QCA_WCN7850: - - /* Set BDA quirk bit for reading BDA value from fwnode property - * only if that property exist in DT. - */ - if (fwnode_property_present(dev_fwnode(hdev->dev.parent), "local-bd-address")) { - set_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks); - bt_dev_info(hdev, "setting quirk bit to read BDA from fwnode later"); - } else { - bt_dev_dbg(hdev, "local-bd-address` is not present in the devicetree so not setting quirk bit for BDA"); - } + qcadev = serdev_device_get_drvdata(hu->serdev); + if (qcadev->bdaddr_property_broken) + set_bit(HCI_QUIRK_BDADDR_PROPERTY_BROKEN, &hdev->quirks); hci_set_aosp_capable(hdev); @@ -1961,8 +1959,10 @@ qca_debugfs_init(hdev); hu->hdev->hw_error = qca_hw_error; hu->hdev->cmd_timeout = qca_cmd_timeout; - if (device_can_wakeup(hu->serdev->ctrl->dev.parent)) - hu->hdev->wakeup = qca_wakeup; + if (hu->serdev) { + if (device_can_wakeup(hu->serdev->ctrl->dev.parent)) + hu->hdev->wakeup = qca_wakeup; + } } else if (ret == -ENOENT) { /* No patch/nvm-config found, run with original fw/config */ set_bit(QCA_ROM_FW, &qca->flags); @@ -2295,6 +2295,9 @@ if (!qcadev->oper_speed) BT_DBG("UART will pick default operating speed"); + qcadev->bdaddr_property_broken = device_property_read_bool(&serdev->dev, + "qcom,local-bd-address-broken"); + if (data) qcadev->btsoc_type = data->soc_type; else @@ -2326,20 +2329,25 @@ qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable", GPIOD_OUT_LOW); - if (IS_ERR_OR_NULL(qcadev->bt_en) && + if (IS_ERR(qcadev->bt_en) && (data->soc_type == QCA_WCN6750 || data->soc_type == QCA_WCN6855)) { dev_err(&serdev->dev, "failed to acquire BT_EN gpio\n"); - power_ctrl_enabled = false; + return PTR_ERR(qcadev->bt_en); } + if (!qcadev->bt_en) + power_ctrl_enabled = false; + qcadev->sw_ctrl = devm_gpiod_get_optional(&serdev->dev, "swctrl", GPIOD_IN); - if (IS_ERR_OR_NULL(qcadev->sw_ctrl) && + if (IS_ERR(qcadev->sw_ctrl) && (data->soc_type == QCA_WCN6750 || data->soc_type == QCA_WCN6855 || - data->soc_type == QCA_WCN7850)) - dev_warn(&serdev->dev, "failed to acquire SW_CTRL gpio\n"); + data->soc_type == QCA_WCN7850)) { + dev_err(&serdev->dev, "failed to acquire SW_CTRL gpio\n"); + return PTR_ERR(qcadev->sw_ctrl); + } qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL); if (IS_ERR(qcadev->susclk)) { @@ -2357,11 +2365,14 @@ default: qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable", GPIOD_OUT_LOW); - if (IS_ERR_OR_NULL(qcadev->bt_en)) { - dev_warn(&serdev->dev, "failed to acquire enable gpio\n"); - power_ctrl_enabled = false; + if (IS_ERR(qcadev->bt_en)) { + dev_err(&serdev->dev, "failed to acquire enable gpio\n"); + return PTR_ERR(qcadev->bt_en); } + if (!qcadev->bt_en) + power_ctrl_enabled = false; + qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL); if (IS_ERR(qcadev->susclk)) { dev_warn(&serdev->dev, "failed to acquire clk\n"); @@ -2398,8 +2409,8 @@ set_bit(HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED, &hdev->quirks); - if (data->capabilities & QCA_CAP_VALID_LE_STATES) - set_bit(HCI_QUIRK_VALID_LE_STATES, &hdev->quirks); + if (!(data->capabilities & QCA_CAP_VALID_LE_STATES)) + set_bit(HCI_QUIRK_BROKEN_LE_STATES, &hdev->quirks); } return 0; @@ -2440,15 +2451,27 @@ struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); struct hci_uart *hu = &qcadev->serdev_hu; struct hci_dev *hdev = hu->hdev; - struct qca_data *qca = hu->priv; const u8 ibs_wake_cmd[] = { 0xFD }; const u8 edl_reset_soc_cmd[] = { 0x01, 0x00, 0xFC, 0x01, 0x05 }; if (qcadev->btsoc_type == QCA_QCA6390) { - if (test_bit(QCA_BT_OFF, &qca->flags) || - !test_bit(HCI_RUNNING, &hdev->flags)) + /* The purpose of sending the VSC is to reset SOC into a initial + * state and the state will ensure next hdev->setup() success. + * if HCI_QUIRK_NON_PERSISTENT_SETUP is set, it means that + * hdev->setup() can do its job regardless of SoC state, so + * don't need to send the VSC. + * if HCI_SETUP is set, it means that hdev->setup() was never + * invoked and the SOC is already in the initial state, so + * don't also need to send the VSC. + */ + if (test_bit(HCI_QUIRK_NON_PERSISTENT_SETUP, &hdev->quirks) || + hci_dev_test_flag(hdev, HCI_SETUP)) return; + /* The serdev must be in open state when conrol logic arrives + * here, so also fix the use-after-free issue caused by that + * the serdev is flushed or wrote after it is closed. + */ serdev_device_write_flush(serdev); ret = serdev_device_write_buf(serdev, ibs_wake_cmd, sizeof(ibs_wake_cmd)); --- linux-xilinx-6.8.0.orig/drivers/bluetooth/hci_serdev.c +++ linux-xilinx-6.8.0/drivers/bluetooth/hci_serdev.c @@ -300,8 +300,9 @@ .write_wakeup = hci_uart_write_wakeup, }; -int hci_uart_register_device(struct hci_uart *hu, - const struct hci_uart_proto *p) +int hci_uart_register_device_priv(struct hci_uart *hu, + const struct hci_uart_proto *p, + int sizeof_priv) { int err; struct hci_dev *hdev; @@ -325,7 +326,7 @@ set_bit(HCI_UART_PROTO_READY, &hu->flags); /* Initialize and register HCI device */ - hdev = hci_alloc_dev(); + hdev = hci_alloc_dev_priv(sizeof_priv); if (!hdev) { BT_ERR("Can't allocate HCI device"); err = -ENOMEM; @@ -365,11 +366,6 @@ if (test_bit(HCI_UART_EXT_CONFIG, &hu->hdev_flags)) set_bit(HCI_QUIRK_EXTERNAL_CONFIG, &hdev->quirks); - if (test_bit(HCI_UART_CREATE_AMP, &hu->hdev_flags)) - hdev->dev_type = HCI_AMP; - else - hdev->dev_type = HCI_PRIMARY; - if (test_bit(HCI_UART_INIT_PENDING, &hu->hdev_flags)) return 0; @@ -394,7 +390,7 @@ percpu_free_rwsem(&hu->proto_lock); return err; } -EXPORT_SYMBOL_GPL(hci_uart_register_device); +EXPORT_SYMBOL_GPL(hci_uart_register_device_priv); void hci_uart_unregister_device(struct hci_uart *hu) { --- linux-xilinx-6.8.0.orig/drivers/bluetooth/hci_uart.h +++ linux-xilinx-6.8.0/drivers/bluetooth/hci_uart.h @@ -37,7 +37,6 @@ #define HCI_UART_RAW_DEVICE 0 #define HCI_UART_RESET_ON_INIT 1 -#define HCI_UART_CREATE_AMP 2 #define HCI_UART_INIT_PENDING 3 #define HCI_UART_EXT_CONFIG 4 #define HCI_UART_VND_DETECT 5 @@ -97,7 +96,17 @@ int hci_uart_register_proto(const struct hci_uart_proto *p); int hci_uart_unregister_proto(const struct hci_uart_proto *p); -int hci_uart_register_device(struct hci_uart *hu, const struct hci_uart_proto *p); + +int hci_uart_register_device_priv(struct hci_uart *hu, + const struct hci_uart_proto *p, + int sizeof_priv); + +static inline int hci_uart_register_device(struct hci_uart *hu, + const struct hci_uart_proto *p) +{ + return hci_uart_register_device_priv(hu, p, 0); +} + void hci_uart_unregister_device(struct hci_uart *hu); int hci_uart_tx_wakeup(struct hci_uart *hu); --- linux-xilinx-6.8.0.orig/drivers/bluetooth/hci_vhci.c +++ linux-xilinx-6.8.0/drivers/bluetooth/hci_vhci.c @@ -384,17 +384,10 @@ { struct hci_dev *hdev; struct sk_buff *skb; - __u8 dev_type; if (data->hdev) return -EBADFD; - /* bits 0-1 are dev_type (Primary or AMP) */ - dev_type = opcode & 0x03; - - if (dev_type != HCI_PRIMARY && dev_type != HCI_AMP) - return -EINVAL; - /* bits 2-5 are reserved (must be zero) */ if (opcode & 0x3c) return -EINVAL; @@ -412,7 +405,6 @@ data->hdev = hdev; hdev->bus = HCI_VIRTUAL; - hdev->dev_type = dev_type; hci_set_drvdata(hdev, data); hdev->open = vhci_open_dev; @@ -433,8 +425,6 @@ if (opcode & 0x80) set_bit(HCI_QUIRK_RAW_DEVICE, &hdev->quirks); - set_bit(HCI_QUIRK_VALID_LE_STATES, &hdev->quirks); - if (hci_register_dev(hdev) < 0) { BT_ERR("Can't register HCI device"); hci_free_dev(hdev); @@ -634,7 +624,7 @@ struct vhci_data *data = container_of(work, struct vhci_data, open_timeout.work); - vhci_create_device(data, amp ? HCI_AMP : HCI_PRIMARY); + vhci_create_device(data, 0x00); } static int vhci_open(struct inode *inode, struct file *file) --- linux-xilinx-6.8.0.orig/drivers/bluetooth/virtio_bt.c +++ linux-xilinx-6.8.0/drivers/bluetooth/virtio_bt.c @@ -274,7 +274,6 @@ switch (type) { case VIRTIO_BT_CONFIG_TYPE_PRIMARY: - case VIRTIO_BT_CONFIG_TYPE_AMP: break; default: return -EINVAL; @@ -303,7 +302,6 @@ vbt->hdev = hdev; hdev->bus = HCI_VIRTIO; - hdev->dev_type = type; hci_set_drvdata(hdev, vbt); hdev->open = virtbt_open; --- linux-xilinx-6.8.0.orig/drivers/bus/Kconfig +++ linux-xilinx-6.8.0/drivers/bus/Kconfig @@ -186,11 +186,12 @@ config TEGRA_ACONNECT tristate "Tegra ACONNECT Bus Driver" - depends on ARCH_TEGRA_210_SOC + depends on ARCH_TEGRA depends on OF && PM help Driver for the Tegra ACONNECT bus which is used to interface with - the devices inside the Audio Processing Engine (APE) for Tegra210. + the devices inside the Audio Processing Engine (APE) for + Tegra210 and later. config TEGRA_GMI tristate "Tegra Generic Memory Interface bus driver" --- linux-xilinx-6.8.0.orig/drivers/bus/arm-integrator-lm.c +++ linux-xilinx-6.8.0/drivers/bus/arm-integrator-lm.c @@ -85,6 +85,7 @@ return -ENODEV; } map = syscon_node_to_regmap(syscon); + of_node_put(syscon); if (IS_ERR(map)) { dev_err(dev, "could not find Integrator/AP system controller\n"); --- linux-xilinx-6.8.0.orig/drivers/bus/mhi/ep/main.c +++ linux-xilinx-6.8.0/drivers/bus/mhi/ep/main.c @@ -90,7 +90,7 @@ struct mhi_ring_element *event; int ret; - event = kmem_cache_zalloc(mhi_cntrl->ev_ring_el_cache, GFP_KERNEL | GFP_DMA); + event = kmem_cache_zalloc(mhi_cntrl->ev_ring_el_cache, GFP_KERNEL); if (!event) return -ENOMEM; @@ -109,7 +109,7 @@ struct mhi_ring_element *event; int ret; - event = kmem_cache_zalloc(mhi_cntrl->ev_ring_el_cache, GFP_KERNEL | GFP_DMA); + event = kmem_cache_zalloc(mhi_cntrl->ev_ring_el_cache, GFP_KERNEL); if (!event) return -ENOMEM; @@ -127,7 +127,7 @@ struct mhi_ring_element *event; int ret; - event = kmem_cache_zalloc(mhi_cntrl->ev_ring_el_cache, GFP_KERNEL | GFP_DMA); + event = kmem_cache_zalloc(mhi_cntrl->ev_ring_el_cache, GFP_KERNEL); if (!event) return -ENOMEM; @@ -146,7 +146,7 @@ struct mhi_ring_element *event; int ret; - event = kmem_cache_zalloc(mhi_cntrl->ev_ring_el_cache, GFP_KERNEL | GFP_DMA); + event = kmem_cache_zalloc(mhi_cntrl->ev_ring_el_cache, GFP_KERNEL); if (!event) return -ENOMEM; @@ -438,7 +438,7 @@ read_offset = mhi_chan->tre_size - mhi_chan->tre_bytes_left; write_offset = len - buf_left; - buf_addr = kmem_cache_zalloc(mhi_cntrl->tre_buf_cache, GFP_KERNEL | GFP_DMA); + buf_addr = kmem_cache_zalloc(mhi_cntrl->tre_buf_cache, GFP_KERNEL); if (!buf_addr) return -ENOMEM; @@ -1480,14 +1480,14 @@ mhi_cntrl->ev_ring_el_cache = kmem_cache_create("mhi_ep_event_ring_el", sizeof(struct mhi_ring_element), 0, - SLAB_CACHE_DMA, NULL); + 0, NULL); if (!mhi_cntrl->ev_ring_el_cache) { ret = -ENOMEM; goto err_free_cmd; } mhi_cntrl->tre_buf_cache = kmem_cache_create("mhi_ep_tre_buf", MHI_EP_DEFAULT_MTU, 0, - SLAB_CACHE_DMA, NULL); + 0, NULL); if (!mhi_cntrl->tre_buf_cache) { ret = -ENOMEM; goto err_destroy_ev_ring_el_cache; @@ -1496,7 +1496,7 @@ mhi_cntrl->ring_item_cache = kmem_cache_create("mhi_ep_ring_item", sizeof(struct mhi_ep_ring_item), 0, 0, NULL); - if (!mhi_cntrl->ev_ring_el_cache) { + if (!mhi_cntrl->ring_item_cache) { ret = -ENOMEM; goto err_destroy_tre_buf_cache; } --- linux-xilinx-6.8.0.orig/drivers/bus/mhi/host/init.c +++ linux-xilinx-6.8.0/drivers/bus/mhi/host/init.c @@ -62,6 +62,7 @@ [MHI_PM_STATE_FW_DL_ERR] = "Firmware Download Error", [MHI_PM_STATE_SYS_ERR_DETECT] = "SYS ERROR Detect", [MHI_PM_STATE_SYS_ERR_PROCESS] = "SYS ERROR Process", + [MHI_PM_STATE_SYS_ERR_FAIL] = "SYS ERROR Failure", [MHI_PM_STATE_SHUTDOWN_PROCESS] = "SHUTDOWN Process", [MHI_PM_STATE_LD_ERR_FATAL_DETECT] = "Linkdown or Error Fatal Detect", }; --- linux-xilinx-6.8.0.orig/drivers/bus/mhi/host/internal.h +++ linux-xilinx-6.8.0/drivers/bus/mhi/host/internal.h @@ -88,6 +88,7 @@ MHI_PM_STATE_FW_DL_ERR, MHI_PM_STATE_SYS_ERR_DETECT, MHI_PM_STATE_SYS_ERR_PROCESS, + MHI_PM_STATE_SYS_ERR_FAIL, MHI_PM_STATE_SHUTDOWN_PROCESS, MHI_PM_STATE_LD_ERR_FATAL_DETECT, MHI_PM_STATE_MAX @@ -104,14 +105,16 @@ #define MHI_PM_FW_DL_ERR BIT(7) #define MHI_PM_SYS_ERR_DETECT BIT(8) #define MHI_PM_SYS_ERR_PROCESS BIT(9) -#define MHI_PM_SHUTDOWN_PROCESS BIT(10) +#define MHI_PM_SYS_ERR_FAIL BIT(10) +#define MHI_PM_SHUTDOWN_PROCESS BIT(11) /* link not accessible */ -#define MHI_PM_LD_ERR_FATAL_DETECT BIT(11) +#define MHI_PM_LD_ERR_FATAL_DETECT BIT(12) #define MHI_REG_ACCESS_VALID(pm_state) ((pm_state & (MHI_PM_POR | MHI_PM_M0 | \ MHI_PM_M2 | MHI_PM_M3_ENTER | MHI_PM_M3_EXIT | \ MHI_PM_SYS_ERR_DETECT | MHI_PM_SYS_ERR_PROCESS | \ - MHI_PM_SHUTDOWN_PROCESS | MHI_PM_FW_DL_ERR))) + MHI_PM_SYS_ERR_FAIL | MHI_PM_SHUTDOWN_PROCESS | \ + MHI_PM_FW_DL_ERR))) #define MHI_PM_IN_ERROR_STATE(pm_state) (pm_state >= MHI_PM_FW_DL_ERR) #define MHI_PM_IN_FATAL_STATE(pm_state) (pm_state == MHI_PM_LD_ERR_FATAL_DETECT) #define MHI_DB_ACCESS_VALID(mhi_cntrl) (mhi_cntrl->pm_state & mhi_cntrl->db_access) --- linux-xilinx-6.8.0.orig/drivers/bus/mhi/host/pci_generic.c +++ linux-xilinx-6.8.0/drivers/bus/mhi/host/pci_generic.c @@ -598,6 +598,15 @@ .mru_default = 32768, }; +static const struct mhi_pci_dev_info mhi_telit_fe990a_info = { + .name = "telit-fe990a", + .config = &modem_telit_fn990_config, + .bar_num = MHI_PCI_DEFAULT_BAR_NUM, + .dma_data_width = 32, + .sideband_wake = false, + .mru_default = 32768, +}; + /* Keep the list sorted based on the PID. New VID should be added as the last entry */ static const struct pci_device_id mhi_pci_id_table[] = { { PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0304), @@ -615,9 +624,9 @@ /* Telit FN990 */ { PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x0308, 0x1c5d, 0x2010), .driver_data = (kernel_ulong_t) &mhi_telit_fn990_info }, - /* Telit FE990 */ + /* Telit FE990A */ { PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x0308, 0x1c5d, 0x2015), - .driver_data = (kernel_ulong_t) &mhi_telit_fn990_info }, + .driver_data = (kernel_ulong_t) &mhi_telit_fe990a_info }, { PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0308), .driver_data = (kernel_ulong_t) &mhi_qcom_sdx65_info }, { PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0309), --- linux-xilinx-6.8.0.orig/drivers/bus/mhi/host/pm.c +++ linux-xilinx-6.8.0/drivers/bus/mhi/host/pm.c @@ -36,7 +36,10 @@ * M0 <--> M0 * M0 -> FW_DL_ERR * M0 -> M3_ENTER -> M3 -> M3_EXIT --> M0 - * L1: SYS_ERR_DETECT -> SYS_ERR_PROCESS --> POR + * L1: SYS_ERR_DETECT -> SYS_ERR_PROCESS + * SYS_ERR_PROCESS -> SYS_ERR_FAIL + * SYS_ERR_FAIL -> SYS_ERR_DETECT + * SYS_ERR_PROCESS --> POR * L2: SHUTDOWN_PROCESS -> LD_ERR_FATAL_DETECT * SHUTDOWN_PROCESS -> DISABLE * L3: LD_ERR_FATAL_DETECT <--> LD_ERR_FATAL_DETECT @@ -93,7 +96,12 @@ }, { MHI_PM_SYS_ERR_PROCESS, - MHI_PM_POR | MHI_PM_SHUTDOWN_PROCESS | + MHI_PM_POR | MHI_PM_SYS_ERR_FAIL | MHI_PM_SHUTDOWN_PROCESS | + MHI_PM_LD_ERR_FATAL_DETECT + }, + { + MHI_PM_SYS_ERR_FAIL, + MHI_PM_SYS_ERR_DETECT | MHI_PM_SHUTDOWN_PROCESS | MHI_PM_LD_ERR_FATAL_DETECT }, /* L2 States */ @@ -629,7 +637,13 @@ !in_reset, timeout); if (!ret || in_reset) { dev_err(dev, "Device failed to exit MHI Reset state\n"); - goto exit_sys_error_transition; + write_lock_irq(&mhi_cntrl->pm_lock); + cur_state = mhi_tryset_pm_state(mhi_cntrl, + MHI_PM_SYS_ERR_FAIL); + write_unlock_irq(&mhi_cntrl->pm_lock); + /* Shutdown may have occurred, otherwise cleanup now */ + if (cur_state != MHI_PM_SYS_ERR_FAIL) + goto exit_sys_error_transition; } /* --- linux-xilinx-6.8.0.orig/drivers/bus/ti-sysc.c +++ linux-xilinx-6.8.0/drivers/bus/ti-sysc.c @@ -2283,11 +2283,9 @@ const char *name) { struct device_node *np = ddata->dev->of_node; - struct property *prop; - const __be32 *p; u32 val; - of_property_for_each_u32(np, name, prop, p, val) { + of_property_for_each_u32(np, name, val) { if (val >= SYSC_NR_IDLEMODES) { dev_err(ddata->dev, "invalid idlemode: %i\n", val); return -EINVAL; --- linux-xilinx-6.8.0.orig/drivers/cdrom/cdrom.c +++ linux-xilinx-6.8.0/drivers/cdrom/cdrom.c @@ -282,7 +282,7 @@ /* default compatibility mode */ static bool autoclose=1; static bool autoeject; -static bool lockdoor = 1; +static bool lockdoor = 0; /* will we ever get to use this... sigh. */ static bool check_media_type; /* automatically restart mrw format */ @@ -2313,7 +2313,7 @@ return -EINVAL; /* Prevent arg from speculatively bypassing the length check */ - barrier_nospec(); + arg = array_index_nospec(arg, cdi->capacity); info = kmalloc(sizeof(*info), GFP_KERNEL); if (!info) @@ -2358,7 +2358,7 @@ return -EFAULT; tmp_info.media_flags = 0; - if (tmp_info.last_media_change - cdi->last_media_change_ms < 0) + if (cdi->last_media_change_ms > tmp_info.last_media_change) tmp_info.media_flags |= MEDIA_CHANGED_FLAG; tmp_info.last_media_change = cdi->last_media_change_ms; --- linux-xilinx-6.8.0.orig/drivers/cdx/Kconfig +++ linux-xilinx-6.8.0/drivers/cdx/Kconfig @@ -8,6 +8,7 @@ config CDX_BUS bool "CDX Bus driver" depends on OF && ARM64 + select GENERIC_MSI_IRQ_DOMAIN help Driver to enable Composable DMA Transfer(CDX) Bus. CDX bus exposes Fabric devices which uses composable DMA IP to the --- linux-xilinx-6.8.0.orig/drivers/cdx/Makefile +++ linux-xilinx-6.8.0/drivers/cdx/Makefile @@ -7,4 +7,4 @@ ccflags-y += -DDEFAULT_SYMBOL_NAMESPACE=CDX_BUS -obj-$(CONFIG_CDX_BUS) += cdx.o controller/ +obj-$(CONFIG_CDX_BUS) += cdx.o cdx_msi.o controller/ --- linux-xilinx-6.8.0.orig/drivers/cdx/cdx.c +++ linux-xilinx-6.8.0/drivers/cdx/cdx.c @@ -56,6 +56,7 @@ */ #include +#include #include #include #include @@ -787,6 +788,7 @@ /* Populate CDX dev params */ cdx_dev->req_id = dev_params->req_id; + cdx_dev->msi_dev_id = dev_params->msi_dev_id; cdx_dev->vendor = dev_params->vendor; cdx_dev->device = dev_params->device; cdx_dev->subsystem_vendor = dev_params->subsys_vendor; @@ -804,12 +806,19 @@ cdx_dev->dev.bus = &cdx_bus_type; cdx_dev->dev.dma_mask = &cdx_dev->dma_mask; cdx_dev->dev.release = cdx_device_release; + cdx_dev->msi_write_pending = false; + mutex_init(&cdx_dev->irqchip_lock); /* Set Name */ dev_set_name(&cdx_dev->dev, "cdx-%02x:%02x", ((cdx->id << CDX_CONTROLLER_ID_SHIFT) | (cdx_dev->bus_num & CDX_BUS_NUM_MASK)), cdx_dev->dev_num); + if (cdx->msi_domain) { + cdx_dev->num_msi = dev_params->num_msi; + dev_set_msi_domain(&cdx_dev->dev, cdx->msi_domain); + } + ret = device_add(&cdx_dev->dev); if (ret) { dev_err(&cdx_dev->dev, --- linux-xilinx-6.8.0.orig/drivers/cdx/cdx.h +++ linux-xilinx-6.8.0/drivers/cdx/cdx.h @@ -25,6 +25,8 @@ * @req_id: Requestor ID associated with CDX device * @class: Class of the CDX Device * @revision: Revision of the CDX device + * @msi_dev_id: MSI device ID associated with CDX device + * @num_msi: Number of MSI's supported by the device */ struct cdx_dev_params { struct cdx_controller *cdx; @@ -40,6 +42,8 @@ u32 req_id; u32 class; u8 revision; + u32 msi_dev_id; + u32 num_msi; }; /** @@ -79,4 +83,12 @@ */ struct device *cdx_bus_add(struct cdx_controller *cdx, u8 bus_num); +/** + * cdx_msi_domain_init - Init the CDX bus MSI domain. + * @dev: Device of the CDX bus controller + * + * Return: CDX MSI domain, NULL on failure + */ +struct irq_domain *cdx_msi_domain_init(struct device *dev); + #endif /* _CDX_H_ */ --- linux-xilinx-6.8.0.orig/drivers/cdx/cdx_msi.c +++ linux-xilinx-6.8.0/drivers/cdx/cdx_msi.c @@ -0,0 +1,215 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * AMD CDX bus driver MSI support + * + * Copyright (C) 2022-2023, Advanced Micro Devices, Inc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "cdx.h" + +static void cdx_msi_write_msg(struct irq_data *irq_data, + struct msi_msg *msg) +{ + struct msi_desc *msi_desc = irq_data_get_msi_desc(irq_data); + struct cdx_device *cdx_dev = to_cdx_device(msi_desc->dev); + + /* We would not operate on msg here rather we wait for + * irq_bus_sync_unlock() to be called from preemptible + * task context. + */ + msi_desc->msg = *msg; + cdx_dev->msi_write_pending = true; +} + +static void cdx_msi_write_irq_lock(struct irq_data *irq_data) +{ + struct msi_desc *msi_desc = irq_data_get_msi_desc(irq_data); + struct cdx_device *cdx_dev = to_cdx_device(msi_desc->dev); + + mutex_lock(&cdx_dev->irqchip_lock); +} + +static void cdx_msi_write_irq_unlock(struct irq_data *irq_data) +{ + struct msi_desc *msi_desc = irq_data_get_msi_desc(irq_data); + struct cdx_device *cdx_dev = to_cdx_device(msi_desc->dev); + struct cdx_controller *cdx = cdx_dev->cdx; + struct cdx_device_config dev_config; + int ret; + + if (!cdx_dev->msi_write_pending) { + mutex_unlock(&cdx_dev->irqchip_lock); + return; + } + + cdx_dev->msi_write_pending = false; + mutex_unlock(&cdx_dev->irqchip_lock); + + dev_config.msi.msi_index = msi_desc->msi_index; + dev_config.msi.data = msi_desc->msg.data; + dev_config.msi.addr = ((u64)(msi_desc->msg.address_hi) << 32) | + msi_desc->msg.address_lo; + + dev_config.type = CDX_DEV_MSI_CONF; + ret = cdx->ops->dev_configure(cdx, cdx_dev->bus_num, cdx_dev->dev_num, + &dev_config); + if (ret) + dev_err(&cdx_dev->dev, "Write MSI failed to CDX controller\n"); +} + +int cdx_enable_msi(struct cdx_device *cdx_dev) +{ + struct cdx_controller *cdx = cdx_dev->cdx; + struct cdx_device_config dev_config; + int ret; + + dev_config.type = CDX_DEV_MSI_ENABLE; + dev_config.msi_enable = true; + ret = cdx->ops->dev_configure(cdx, cdx_dev->bus_num, cdx_dev->dev_num, + &dev_config); + if (ret) + dev_err(&cdx_dev->dev, "MSI enable failed\n"); + + return ret; +} +EXPORT_SYMBOL_GPL(cdx_enable_msi); + +void cdx_disable_msi(struct cdx_device *cdx_dev) +{ + struct cdx_controller *cdx = cdx_dev->cdx; + struct cdx_device_config dev_config; + int ret; + + dev_config.type = CDX_DEV_MSI_ENABLE; + dev_config.msi_enable = false; + ret = cdx->ops->dev_configure(cdx, cdx_dev->bus_num, cdx_dev->dev_num, + &dev_config); + if (ret) + dev_err(&cdx_dev->dev, "MSI disable failed\n"); +} +EXPORT_SYMBOL_GPL(cdx_disable_msi); + +static struct irq_chip cdx_msi_irq_chip = { + .name = "CDX-MSI", + .irq_mask = irq_chip_mask_parent, + .irq_unmask = irq_chip_unmask_parent, + .irq_eoi = irq_chip_eoi_parent, + .irq_set_affinity = msi_domain_set_affinity, + .irq_write_msi_msg = cdx_msi_write_msg, + .irq_bus_lock = cdx_msi_write_irq_lock, + .irq_bus_sync_unlock = cdx_msi_write_irq_unlock +}; + +int cdx_msi_domain_alloc_irqs(struct device *dev, unsigned int irq_count) +{ + int ret; + + ret = msi_setup_device_data(dev); + if (ret) + return ret; + + ret = msi_domain_alloc_irqs_range(dev, MSI_DEFAULT_DOMAIN, + 0, irq_count - 1); + if (ret) + dev_err(dev, "Failed to allocate IRQs: %d\n", ret); + + return ret; +} +EXPORT_SYMBOL_GPL(cdx_msi_domain_alloc_irqs); + +/* Convert an msi_desc to a globally unique identifier. */ +static irq_hw_number_t cdx_domain_calc_hwirq(struct cdx_device *dev, + struct msi_desc *desc) +{ + return ((irq_hw_number_t)dev->msi_dev_id << 10) | desc->msi_index; +} + +static void cdx_msi_set_desc(msi_alloc_info_t *arg, + struct msi_desc *desc) +{ + arg->desc = desc; + arg->hwirq = cdx_domain_calc_hwirq(to_cdx_device(desc->dev), desc); +} + +static int cdx_msi_prepare(struct irq_domain *msi_domain, + struct device *dev, + int nvec, msi_alloc_info_t *info) +{ + struct cdx_device *cdx_dev = to_cdx_device(dev); + struct device *parent = dev->parent; + struct msi_domain_info *msi_info; + u32 dev_id = 0; + int ret; + + /* Retrieve device ID from requestor ID using parent device */ + ret = of_map_id(parent->of_node, cdx_dev->msi_dev_id, "msi-map", + "msi-map-mask", NULL, &dev_id); + if (ret) { + dev_err(dev, "of_map_id failed for MSI: %d\n", ret); + return ret; + } + + /* Set the device Id to be passed to the GIC-ITS */ + info->scratchpad[0].ul = dev_id; + + msi_info = msi_get_domain_info(msi_domain->parent); + + return msi_info->ops->msi_prepare(msi_domain->parent, dev, nvec, info); +} + +static struct msi_domain_ops cdx_msi_ops = { + .msi_prepare = cdx_msi_prepare, + .set_desc = cdx_msi_set_desc +}; + +static struct msi_domain_info cdx_msi_domain_info = { + .ops = &cdx_msi_ops, + .chip = &cdx_msi_irq_chip, + .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | + MSI_FLAG_ALLOC_SIMPLE_MSI_DESCS | MSI_FLAG_FREE_MSI_DESCS +}; + +struct irq_domain *cdx_msi_domain_init(struct device *dev) +{ + struct device_node *np = dev->of_node; + struct fwnode_handle *fwnode_handle; + struct irq_domain *cdx_msi_domain; + struct device_node *parent_node; + struct irq_domain *parent; + + fwnode_handle = of_node_to_fwnode(np); + + parent_node = of_parse_phandle(np, "msi-map", 1); + if (!parent_node) { + dev_err(dev, "msi-map not present on cdx controller\n"); + return NULL; + } + + parent = irq_find_matching_fwnode(of_node_to_fwnode(parent_node), + DOMAIN_BUS_NEXUS); + if (!parent || !msi_get_domain_info(parent)) { + dev_err(dev, "unable to locate ITS domain\n"); + return NULL; + } + + cdx_msi_domain = msi_create_irq_domain(fwnode_handle, &cdx_msi_domain_info, + parent); + if (!cdx_msi_domain) { + dev_err(dev, "unable to create CDX-MSI domain\n"); + return NULL; + } + + dev_dbg(dev, "CDX-MSI domain created\n"); + + return cdx_msi_domain; +} +EXPORT_SYMBOL_GPL(cdx_msi_domain_init); --- linux-xilinx-6.8.0.orig/drivers/cdx/controller/cdx_controller.c +++ linux-xilinx-6.8.0/drivers/cdx/controller/cdx_controller.c @@ -9,6 +9,7 @@ #include #include #include +#include #include "cdx_controller.h" #include "../cdx.h" @@ -60,9 +61,20 @@ u8 bus_num, u8 dev_num, struct cdx_device_config *dev_config) { + u16 msi_index; int ret = 0; + u32 data; + u64 addr; switch (dev_config->type) { + case CDX_DEV_MSI_CONF: + msi_index = dev_config->msi.msi_index; + data = dev_config->msi.data; + addr = dev_config->msi.addr; + + ret = cdx_mcdi_write_msi(cdx->priv, bus_num, dev_num, + msi_index, addr, data); + break; case CDX_DEV_RESET_CONF: ret = cdx_mcdi_reset_device(cdx->priv, bus_num, dev_num); break; @@ -70,6 +82,10 @@ ret = cdx_mcdi_bus_master_enable(cdx->priv, bus_num, dev_num, dev_config->bus_master_enable); break; + case CDX_DEV_MSI_ENABLE: + ret = cdx_mcdi_msi_enable(cdx->priv, bus_num, dev_num, + dev_config->msi_enable); + break; default: ret = -EINVAL; } @@ -178,6 +194,14 @@ cdx->priv = cdx_mcdi; cdx->ops = &cdx_ops; + /* Create MSI domain */ + cdx->msi_domain = cdx_msi_domain_init(&pdev->dev); + if (!cdx->msi_domain) { + dev_err(&pdev->dev, "cdx_msi_domain_init() failed"); + ret = -ENODEV; + goto cdx_msi_fail; + } + ret = cdx_setup_rpmsg(pdev); if (ret) { if (ret != -EPROBE_DEFER) @@ -189,6 +213,8 @@ return 0; cdx_rpmsg_fail: + irq_domain_remove(cdx->msi_domain); +cdx_msi_fail: kfree(cdx); cdx_alloc_fail: cdx_mcdi_finish(cdx_mcdi); @@ -205,6 +231,7 @@ cdx_destroy_rpmsg(pdev); + irq_domain_remove(cdx->msi_domain); kfree(cdx); cdx_mcdi_finish(cdx_mcdi); @@ -253,3 +280,4 @@ MODULE_DESCRIPTION("CDX controller for AMD devices"); MODULE_LICENSE("GPL"); MODULE_IMPORT_NS(CDX_BUS_CONTROLLER); +MODULE_IMPORT_NS(CDX_BUS); --- linux-xilinx-6.8.0.orig/drivers/cdx/controller/mc_cdx_pcol.h +++ linux-xilinx-6.8.0/drivers/cdx/controller/mc_cdx_pcol.h @@ -455,6 +455,12 @@ #define MC_CMD_CDX_BUS_GET_DEVICE_CONFIG_OUT_REQUESTER_ID_OFST 84 #define MC_CMD_CDX_BUS_GET_DEVICE_CONFIG_OUT_REQUESTER_ID_LEN 4 +/* MC_CMD_CDX_BUS_GET_DEVICE_CONFIG_OUT_V2 msgresponse */ +#define MC_CMD_CDX_BUS_GET_DEVICE_CONFIG_OUT_V2_LEN 92 +/* Requester ID used by device for GIC ITS DeviceID */ +#define MC_CMD_CDX_BUS_GET_DEVICE_CONFIG_OUT_V2_REQUESTER_DEVICE_ID_OFST 88 +#define MC_CMD_CDX_BUS_GET_DEVICE_CONFIG_OUT_V2_REQUESTER_DEVICE_ID_LEN 4 + /***********************************/ /* * MC_CMD_CDX_BUS_DOWN @@ -617,6 +623,64 @@ #define MC_CMD_CDX_DEVICE_CONTROL_GET_OUT_MMIO_REGIONS_ENABLE_WIDTH 1 /***********************************/ +/* + * MC_CMD_CDX_DEVICE_WRITE_MSI_MSG + * Populates the MSI message to be used by the hardware to raise the specified + * interrupt vector. Versal-net implementation specific limitations are that + * only 4 CDX devices with MSI interrupt capability are supported and all + * vectors within a device must use the same write address. The command will + * return EINVAL if any of these limitations is violated. + */ +#define MC_CMD_CDX_DEVICE_WRITE_MSI_MSG 0x9 +#define MC_CMD_CDX_DEVICE_WRITE_MSI_MSG_MSGSET 0x9 +#undef MC_CMD_0x9_PRIVILEGE_CTG + +#define MC_CMD_0x9_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_CDX_DEVICE_WRITE_MSI_MSG_IN msgrequest */ +#define MC_CMD_CDX_DEVICE_WRITE_MSI_MSG_IN_LEN 28 +/* Device bus number, in range 0 to BUS_COUNT-1 */ +#define MC_CMD_CDX_DEVICE_WRITE_MSI_MSG_IN_BUS_OFST 0 +#define MC_CMD_CDX_DEVICE_WRITE_MSI_MSG_IN_BUS_LEN 4 +/* Device number relative to the bus, in range 0 to DEVICE_COUNT-1 for that bus */ +#define MC_CMD_CDX_DEVICE_WRITE_MSI_MSG_IN_DEVICE_OFST 4 +#define MC_CMD_CDX_DEVICE_WRITE_MSI_MSG_IN_DEVICE_LEN 4 +/* + * Device-relative MSI vector number. Must be < MSI_COUNT reported for the + * device. + */ +#define MC_CMD_CDX_DEVICE_WRITE_MSI_MSG_IN_MSI_VECTOR_OFST 8 +#define MC_CMD_CDX_DEVICE_WRITE_MSI_MSG_IN_MSI_VECTOR_LEN 4 +/* Reserved (alignment) */ +#define MC_CMD_CDX_DEVICE_WRITE_MSI_MSG_IN_RESERVED_OFST 12 +#define MC_CMD_CDX_DEVICE_WRITE_MSI_MSG_IN_RESERVED_LEN 4 +/* + * MSI address to be used by the hardware. Typically, on ARM systems this + * address is translated by the IOMMU (if enabled) and it is the responsibility + * of the entity managing the IOMMU (APU kernel) to supply the correct IOVA + * here. + */ +#define MC_CMD_CDX_DEVICE_WRITE_MSI_MSG_IN_MSI_ADDRESS_OFST 16 +#define MC_CMD_CDX_DEVICE_WRITE_MSI_MSG_IN_MSI_ADDRESS_LEN 8 +#define MC_CMD_CDX_DEVICE_WRITE_MSI_MSG_IN_MSI_ADDRESS_LO_OFST 16 +#define MC_CMD_CDX_DEVICE_WRITE_MSI_MSG_IN_MSI_ADDRESS_LO_LEN 4 +#define MC_CMD_CDX_DEVICE_WRITE_MSI_MSG_IN_MSI_ADDRESS_LO_LBN 128 +#define MC_CMD_CDX_DEVICE_WRITE_MSI_MSG_IN_MSI_ADDRESS_LO_WIDTH 32 +#define MC_CMD_CDX_DEVICE_WRITE_MSI_MSG_IN_MSI_ADDRESS_HI_OFST 20 +#define MC_CMD_CDX_DEVICE_WRITE_MSI_MSG_IN_MSI_ADDRESS_HI_LEN 4 +#define MC_CMD_CDX_DEVICE_WRITE_MSI_MSG_IN_MSI_ADDRESS_HI_LBN 160 +#define MC_CMD_CDX_DEVICE_WRITE_MSI_MSG_IN_MSI_ADDRESS_HI_WIDTH 32 +/* + * MSI data to be used by the hardware. On versal-net, only the lower 16-bits + * are used, the remaining bits are ignored and should be set to zero. + */ +#define MC_CMD_CDX_DEVICE_WRITE_MSI_MSG_IN_MSI_DATA_OFST 24 +#define MC_CMD_CDX_DEVICE_WRITE_MSI_MSG_IN_MSI_DATA_LEN 4 + +/* MC_CMD_CDX_DEVICE_WRITE_MSI_MSG_OUT msgresponse */ +#define MC_CMD_CDX_DEVICE_WRITE_MSI_MSG_OUT_LEN 0 + +/***********************************/ /* MC_CMD_V2_EXTN - Encapsulation for a v2 extended command */ #define MC_CMD_V2_EXTN 0x7f --- linux-xilinx-6.8.0.orig/drivers/cdx/controller/mcdi_functions.c +++ linux-xilinx-6.8.0/drivers/cdx/controller/mcdi_functions.c @@ -49,7 +49,7 @@ u8 bus_num, u8 dev_num, struct cdx_dev_params *dev_params) { - MCDI_DECLARE_BUF(outbuf, MC_CMD_CDX_BUS_GET_DEVICE_CONFIG_OUT_LEN); + MCDI_DECLARE_BUF(outbuf, MC_CMD_CDX_BUS_GET_DEVICE_CONFIG_OUT_V2_LEN); MCDI_DECLARE_BUF(inbuf, MC_CMD_CDX_BUS_GET_DEVICE_CONFIG_IN_LEN); struct resource *res = &dev_params->res[0]; size_t outlen; @@ -64,7 +64,7 @@ if (ret) return ret; - if (outlen != MC_CMD_CDX_BUS_GET_DEVICE_CONFIG_OUT_LEN) + if (outlen != MC_CMD_CDX_BUS_GET_DEVICE_CONFIG_OUT_V2_LEN) return -EIO; dev_params->bus_num = bus_num; @@ -73,6 +73,9 @@ req_id = MCDI_DWORD(outbuf, CDX_BUS_GET_DEVICE_CONFIG_OUT_REQUESTER_ID); dev_params->req_id = req_id; + dev_params->msi_dev_id = MCDI_DWORD(outbuf, + CDX_BUS_GET_DEVICE_CONFIG_OUT_V2_REQUESTER_DEVICE_ID); + dev_params->res_count = 0; if (MCDI_QWORD(outbuf, CDX_BUS_GET_DEVICE_CONFIG_OUT_MMIO_REGION0_SIZE) != 0) { res[dev_params->res_count].start = @@ -120,6 +123,7 @@ dev_params->vendor = MCDI_WORD(outbuf, CDX_BUS_GET_DEVICE_CONFIG_OUT_VENDOR_ID); dev_params->device = MCDI_WORD(outbuf, CDX_BUS_GET_DEVICE_CONFIG_OUT_DEVICE_ID); + dev_params->num_msi = MCDI_DWORD(outbuf, CDX_BUS_GET_DEVICE_CONFIG_OUT_MSI_COUNT); dev_params->subsys_vendor = MCDI_WORD(outbuf, CDX_BUS_GET_DEVICE_CONFIG_OUT_SUBSYS_VENDOR_ID); dev_params->subsys_device = MCDI_WORD(outbuf, @@ -155,6 +159,24 @@ return ret; } +int cdx_mcdi_write_msi(struct cdx_mcdi *cdx, u8 bus_num, u8 dev_num, + u32 msi_vector, u64 msi_address, u32 msi_data) +{ + MCDI_DECLARE_BUF(inbuf, MC_CMD_CDX_DEVICE_WRITE_MSI_MSG_IN_LEN); + int ret; + + MCDI_SET_DWORD(inbuf, CDX_DEVICE_WRITE_MSI_MSG_IN_BUS, bus_num); + MCDI_SET_DWORD(inbuf, CDX_DEVICE_WRITE_MSI_MSG_IN_DEVICE, dev_num); + MCDI_SET_DWORD(inbuf, CDX_DEVICE_WRITE_MSI_MSG_IN_MSI_VECTOR, msi_vector); + MCDI_SET_QWORD(inbuf, CDX_DEVICE_WRITE_MSI_MSG_IN_MSI_ADDRESS, msi_address); + MCDI_SET_DWORD(inbuf, CDX_DEVICE_WRITE_MSI_MSG_IN_MSI_DATA, msi_data); + + ret = cdx_mcdi_rpc(cdx, MC_CMD_CDX_DEVICE_WRITE_MSI_MSG, inbuf, sizeof(inbuf), + NULL, 0, NULL); + + return ret; +} + int cdx_mcdi_reset_device(struct cdx_mcdi *cdx, u8 bus_num, u8 dev_num) { MCDI_DECLARE_BUF(inbuf, MC_CMD_CDX_DEVICE_RESET_IN_LEN); @@ -226,3 +248,10 @@ return cdx_mcdi_ctrl_flag_set(cdx, bus_num, dev_num, enable, MC_CMD_CDX_DEVICE_CONTROL_SET_IN_BUS_MASTER_ENABLE_LBN); } + +int cdx_mcdi_msi_enable(struct cdx_mcdi *cdx, u8 bus_num, + u8 dev_num, bool enable) +{ + return cdx_mcdi_ctrl_flag_set(cdx, bus_num, dev_num, enable, + MC_CMD_CDX_DEVICE_CONTROL_SET_IN_MSI_ENABLE_LBN); +} --- linux-xilinx-6.8.0.orig/drivers/cdx/controller/mcdi_functions.h +++ linux-xilinx-6.8.0/drivers/cdx/controller/mcdi_functions.h @@ -48,6 +48,26 @@ struct cdx_dev_params *dev_params); /** + * cdx_mcdi_write_msi - Write MSI configuration for CDX device + * @cdx: pointer to MCDI interface. + * @bus_num: Bus number. + * @dev_num: Device number. + * @msi_vector: Device-relative MSI vector number. + * Must be < MSI_COUNT reported for the device. + * @msi_address: MSI address to be used by the hardware. Typically, on ARM + * systems this address is translated by the IOMMU (if enabled) and + * it is the responsibility of the entity managing the IOMMU (APU kernel) + * to supply the correct IOVA here. + * @msi_data: MSI data to be used by the hardware. On versal-net, only the + * lower 16-bits are used, the remaining bits are ignored and should be + * set to zero. + * + * Return: 0 on success, <0 on failure + */ +int cdx_mcdi_write_msi(struct cdx_mcdi *cdx, u8 bus_num, u8 dev_num, + u32 msi_vector, u64 msi_address, u32 msi_data); + +/** * cdx_mcdi_bus_enable - Enable CDX bus represented by bus_num * @cdx: pointer to MCDI interface. * @bus_num: Bus number. @@ -89,4 +109,17 @@ int cdx_mcdi_bus_master_enable(struct cdx_mcdi *cdx, u8 bus_num, u8 dev_num, bool enable); +/** + * cdx_mcdi_msi_enable - Enable/Disable MSIs for cdx device represented + * by bus_num:dev_num + * @cdx: pointer to MCDI interface. + * @bus_num: Bus number. + * @dev_num: Device number. + * @enable: Enable msi's if set, disable otherwise. + * + * Return: 0 on success, <0 on failure + */ +int cdx_mcdi_msi_enable(struct cdx_mcdi *cdx, u8 bus_num, + u8 dev_num, bool enable); + #endif /* CDX_MCDI_FUNCTIONS_H */ --- linux-xilinx-6.8.0.orig/drivers/char/hpet.c +++ linux-xilinx-6.8.0/drivers/char/hpet.c @@ -270,8 +270,13 @@ if (!devp->hd_ireqfreq) return -EIO; - if (count < sizeof(unsigned long)) - return -EINVAL; + if (in_compat_syscall()) { + if (count < sizeof(compat_ulong_t)) + return -EINVAL; + } else { + if (count < sizeof(unsigned long)) + return -EINVAL; + } add_wait_queue(&devp->hd_waitqueue, &wait); @@ -295,9 +300,16 @@ schedule(); } - retval = put_user(data, (unsigned long __user *)buf); - if (!retval) - retval = sizeof(unsigned long); + if (in_compat_syscall()) { + retval = put_user(data, (compat_ulong_t __user *)buf); + if (!retval) + retval = sizeof(compat_ulong_t); + } else { + retval = put_user(data, (unsigned long __user *)buf); + if (!retval) + retval = sizeof(unsigned long); + } + out: __set_current_state(TASK_RUNNING); remove_wait_queue(&devp->hd_waitqueue, &wait); @@ -652,12 +664,24 @@ unsigned short hi_timer; }; +/* 32-bit types would lead to different command codes which should be + * translated into 64-bit ones before passed to hpet_ioctl_common + */ +#define COMPAT_HPET_INFO _IOR('h', 0x03, struct compat_hpet_info) +#define COMPAT_HPET_IRQFREQ _IOW('h', 0x6, compat_ulong_t) + static long hpet_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg) { struct hpet_info info; int err; + if (cmd == COMPAT_HPET_INFO) + cmd = HPET_INFO; + + if (cmd == COMPAT_HPET_IRQFREQ) + cmd = HPET_IRQFREQ; + mutex_lock(&hpet_mutex); err = hpet_ioctl_common(file->private_data, cmd, arg, &info); mutex_unlock(&hpet_mutex); --- linux-xilinx-6.8.0.orig/drivers/char/hw_random/amd-rng.c +++ linux-xilinx-6.8.0/drivers/char/hw_random/amd-rng.c @@ -143,8 +143,10 @@ found: err = pci_read_config_dword(pdev, 0x58, &pmbase); - if (err) + if (err) { + err = pcibios_err_to_errno(err); goto put_dev; + } pmbase &= 0x0000FF00; if (pmbase == 0) { --- linux-xilinx-6.8.0.orig/drivers/char/hw_random/bcm2835-rng.c +++ linux-xilinx-6.8.0/drivers/char/hw_random/bcm2835-rng.c @@ -94,8 +94,10 @@ return ret; ret = reset_control_reset(priv->reset); - if (ret) + if (ret) { + clk_disable_unprepare(priv->clk); return ret; + } if (priv->mask_interrupts) { /* mask the interrupt */ --- linux-xilinx-6.8.0.orig/drivers/char/hw_random/cctrng.c +++ linux-xilinx-6.8.0/drivers/char/hw_random/cctrng.c @@ -622,6 +622,7 @@ /* wait for Cryptocell reset completion */ if (!cctrng_wait_for_reset_completion(drvdata)) { dev_err(dev, "Cryptocell reset not completed"); + clk_disable_unprepare(drvdata->clk); return -EBUSY; } --- linux-xilinx-6.8.0.orig/drivers/char/hw_random/core.c +++ linux-xilinx-6.8.0/drivers/char/hw_random/core.c @@ -174,7 +174,6 @@ reinit_completion(&rng->cleanup_done); skip_init: - rng->quality = min_t(u16, min_t(u16, default_quality, 1024), rng->quality ?: 1024); current_quality = rng->quality; /* obsolete */ return 0; @@ -563,6 +562,9 @@ complete(&rng->cleanup_done); init_completion(&rng->dying); + /* Adjust quality field to always have a proper value */ + rng->quality = min_t(u16, min_t(u16, default_quality, 1024), rng->quality ?: 1024); + if (!current_rng || (!cur_rng_set_by_user && rng->quality > current_rng->quality)) { /* --- linux-xilinx-6.8.0.orig/drivers/char/hw_random/mtk-rng.c +++ linux-xilinx-6.8.0/drivers/char/hw_random/mtk-rng.c @@ -142,7 +142,7 @@ dev_set_drvdata(&pdev->dev, priv); pm_runtime_set_autosuspend_delay(&pdev->dev, RNG_AUTOSUSPEND_TIMEOUT); pm_runtime_use_autosuspend(&pdev->dev); - pm_runtime_enable(&pdev->dev); + devm_pm_runtime_enable(&pdev->dev); dev_info(&pdev->dev, "registered RNG driver\n"); --- linux-xilinx-6.8.0.orig/drivers/char/hw_random/stm32-rng.c +++ linux-xilinx-6.8.0/drivers/char/hw_random/stm32-rng.c @@ -220,7 +220,8 @@ if (err && i > RNG_NB_RECOVER_TRIES) { dev_err((struct device *)priv->rng.priv, "Couldn't recover from seed error\n"); - return -ENOTRECOVERABLE; + retval = -ENOTRECOVERABLE; + goto exit_rpm; } continue; @@ -238,7 +239,8 @@ if (err && i > RNG_NB_RECOVER_TRIES) { dev_err((struct device *)priv->rng.priv, "Couldn't recover from seed error"); - return -ENOTRECOVERABLE; + retval = -ENOTRECOVERABLE; + goto exit_rpm; } continue; @@ -250,6 +252,7 @@ max -= sizeof(u32); } +exit_rpm: pm_runtime_mark_last_busy((struct device *) priv->rng.priv); pm_runtime_put_sync_autosuspend((struct device *) priv->rng.priv); @@ -353,13 +356,15 @@ err = readl_relaxed_poll_timeout_atomic(priv->base + RNG_SR, reg, reg & RNG_SR_DRDY, 10, 100000); - if (err | (reg & ~RNG_SR_DRDY)) { + if (err || (reg & ~RNG_SR_DRDY)) { clk_disable_unprepare(priv->clk); dev_err((struct device *)priv->rng.priv, "%s: timeout:%x SR: %x!\n", __func__, err, reg); return -EINVAL; } + clk_disable_unprepare(priv->clk); + return 0; } @@ -384,6 +389,11 @@ static int __maybe_unused stm32_rng_suspend(struct device *dev) { struct stm32_rng_private *priv = dev_get_drvdata(dev); + int err; + + err = clk_prepare_enable(priv->clk); + if (err) + return err; if (priv->data->has_cond_reset) { priv->pm_conf.nscr = readl_relaxed(priv->base + RNG_NSCR); @@ -465,6 +475,8 @@ writel_relaxed(reg, priv->base + RNG_CR); } + clk_disable_unprepare(priv->clk); + return 0; } --- linux-xilinx-6.8.0.orig/drivers/char/ipmi/ipmb_dev_int.c +++ linux-xilinx-6.8.0/drivers/char/ipmi/ipmb_dev_int.c @@ -321,6 +321,9 @@ ipmb_dev->miscdev.name = devm_kasprintf(&client->dev, GFP_KERNEL, "%s%d", "ipmb-", client->adapter->nr); + if (!ipmb_dev->miscdev.name) + return -ENOMEM; + ipmb_dev->miscdev.fops = &ipmb_fops; ipmb_dev->miscdev.parent = &client->dev; ret = misc_register(&ipmb_dev->miscdev); --- linux-xilinx-6.8.0.orig/drivers/char/ipmi/ssif_bmc.c +++ linux-xilinx-6.8.0/drivers/char/ipmi/ssif_bmc.c @@ -177,13 +177,15 @@ unsigned long flags; ssize_t ret; - if (count > sizeof(struct ipmi_ssif_msg)) + if (count < sizeof(msg.len) || + count > sizeof(struct ipmi_ssif_msg)) return -EINVAL; if (copy_from_user(&msg, buf, count)) return -EFAULT; - if (!msg.len || count < sizeof_field(struct ipmi_ssif_msg, len) + msg.len) + if (!msg.len || msg.len > IPMI_SSIF_PAYLOAD_MAX || + count < sizeof_field(struct ipmi_ssif_msg, len) + msg.len) return -EINVAL; spin_lock_irqsave(&ssif_bmc->lock, flags); @@ -290,7 +292,6 @@ ssif_bmc->nbytes_processed = 0; ssif_bmc->remain_len = 0; ssif_bmc->busy = false; - memset(&ssif_bmc->part_buf, 0, sizeof(struct ssif_part_buffer)); wake_up_all(&ssif_bmc->wait_queue); } @@ -742,9 +743,11 @@ ssif_bmc->aborting = true; } } else if (ssif_bmc->state == SSIF_RES_SENDING) { - if (ssif_bmc->is_singlepart_read || ssif_bmc->block_num == 0xFF) + if (ssif_bmc->is_singlepart_read || ssif_bmc->block_num == 0xFF) { + memset(&ssif_bmc->part_buf, 0, sizeof(struct ssif_part_buffer)); /* Invalidate response buffer to denote it is sent */ complete_response(ssif_bmc); + } ssif_bmc->state = SSIF_READY; } --- linux-xilinx-6.8.0.orig/drivers/char/misc.c +++ linux-xilinx-6.8.0/drivers/char/misc.c @@ -63,16 +63,30 @@ #define DYNAMIC_MINORS 128 /* like dynamic majors */ static DEFINE_IDA(misc_minors_ida); -static int misc_minor_alloc(void) +static int misc_minor_alloc(int minor) { - int ret; + int ret = 0; - ret = ida_alloc_max(&misc_minors_ida, DYNAMIC_MINORS - 1, GFP_KERNEL); - if (ret >= 0) { - ret = DYNAMIC_MINORS - ret - 1; + if (minor == MISC_DYNAMIC_MINOR) { + /* allocate free id */ + ret = ida_alloc_max(&misc_minors_ida, DYNAMIC_MINORS - 1, GFP_KERNEL); + if (ret >= 0) { + ret = DYNAMIC_MINORS - ret - 1; + } else { + ret = ida_alloc_range(&misc_minors_ida, MISC_DYNAMIC_MINOR + 1, + MINORMASK, GFP_KERNEL); + } } else { - ret = ida_alloc_range(&misc_minors_ida, MISC_DYNAMIC_MINOR + 1, - MINORMASK, GFP_KERNEL); + /* specific minor, check if it is in dynamic or misc dynamic range */ + if (minor < DYNAMIC_MINORS) { + minor = DYNAMIC_MINORS - minor - 1; + ret = ida_alloc_range(&misc_minors_ida, minor, minor, GFP_KERNEL); + } else if (minor > MISC_DYNAMIC_MINOR) { + ret = ida_alloc_range(&misc_minors_ida, minor, minor, GFP_KERNEL); + } else { + /* case of non-dynamic minors, no need to allocate id */ + ret = 0; + } } return ret; } @@ -219,7 +233,7 @@ mutex_lock(&misc_mtx); if (is_dynamic) { - int i = misc_minor_alloc(); + int i = misc_minor_alloc(misc->minor); if (i < 0) { err = -EBUSY; @@ -228,6 +242,7 @@ misc->minor = i; } else { struct miscdevice *c; + int i; list_for_each_entry(c, &misc_list, list) { if (c->minor == misc->minor) { @@ -235,6 +250,12 @@ goto out; } } + + i = misc_minor_alloc(misc->minor); + if (i < 0) { + err = -EBUSY; + goto out; + } } dev = MKDEV(MISC_MAJOR, misc->minor); @@ -243,8 +264,8 @@ device_create_with_groups(&misc_class, misc->parent, dev, misc, misc->groups, "%s", misc->name); if (IS_ERR(misc->this_device)) { + misc_minor_free(misc->minor); if (is_dynamic) { - misc_minor_free(misc->minor); misc->minor = MISC_DYNAMIC_MINOR; } err = PTR_ERR(misc->this_device); --- linux-xilinx-6.8.0.orig/drivers/char/ppdev.c +++ linux-xilinx-6.8.0/drivers/char/ppdev.c @@ -296,28 +296,35 @@ if (!port) { pr_warn("%s: no associated port!\n", name); rc = -ENXIO; - goto err; + goto err_free_name; } index = ida_alloc(&ida_index, GFP_KERNEL); + if (index < 0) { + pr_warn("%s: failed to get index!\n", name); + rc = index; + goto err_put_port; + } + memset(&ppdev_cb, 0, sizeof(ppdev_cb)); ppdev_cb.irq_func = pp_irq; ppdev_cb.flags = (pp->flags & PP_EXCL) ? PARPORT_FLAG_EXCL : 0; ppdev_cb.private = pp; pdev = parport_register_dev_model(port, name, &ppdev_cb, index); - parport_put_port(port); if (!pdev) { pr_warn("%s: failed to register device!\n", name); rc = -ENXIO; ida_free(&ida_index, index); - goto err; + goto err_put_port; } pp->pdev = pdev; pp->index = index; dev_dbg(&pdev->dev, "registered pardevice\n"); -err: +err_put_port: + parport_put_port(port); +err_free_name: kfree(name); return rc; } --- linux-xilinx-6.8.0.orig/drivers/char/random.c +++ linux-xilinx-6.8.0/drivers/char/random.c @@ -702,7 +702,7 @@ static void __cold _credit_init_bits(size_t bits) { - static struct execute_work set_ready; + static DECLARE_WORK(set_ready, crng_set_ready); unsigned int new, orig, add; unsigned long flags; @@ -718,8 +718,8 @@ if (orig < POOL_READY_BITS && new >= POOL_READY_BITS) { crng_reseed(NULL); /* Sets crng_init to CRNG_READY under base_crng.lock. */ - if (static_key_initialized) - execute_in_process_context(crng_set_ready, &set_ready); + if (static_key_initialized && system_unbound_wq) + queue_work(system_unbound_wq, &set_ready); atomic_notifier_call_chain(&random_ready_notifier, 0, NULL); wake_up_interruptible(&crng_init_wait); kill_fasync(&fasync, SIGIO, POLL_IN); @@ -890,8 +890,8 @@ /* * If we were initialized by the cpu or bootloader before jump labels - * are initialized, then we should enable the static branch here, where - * it's guaranteed that jump labels have been initialized. + * or workqueues are initialized, then we should enable the static + * branch here, where it's guaranteed that these have been initialized. */ if (!static_branch_likely(&crng_is_ready) && crng_init >= CRNG_READY) crng_set_ready(NULL); --- linux-xilinx-6.8.0.orig/drivers/char/tpm/eventlog/acpi.c +++ linux-xilinx-6.8.0/drivers/char/tpm/eventlog/acpi.c @@ -63,6 +63,11 @@ return n == 0; } +static void tpm_bios_log_free(void *data) +{ + kvfree(data); +} + /* read binary bios log */ int tpm_read_log_acpi(struct tpm_chip *chip) { @@ -136,7 +141,7 @@ } /* malloc EventLog space */ - log->bios_event_log = devm_kmalloc(&chip->dev, len, GFP_KERNEL); + log->bios_event_log = kvmalloc(len, GFP_KERNEL); if (!log->bios_event_log) return -ENOMEM; @@ -162,10 +167,16 @@ goto err; } + ret = devm_add_action(&chip->dev, tpm_bios_log_free, log->bios_event_log); + if (ret) { + log->bios_event_log = NULL; + goto err; + } + return format; err: - devm_kfree(&chip->dev, log->bios_event_log); + tpm_bios_log_free(log->bios_event_log); log->bios_event_log = NULL; return ret; } --- linux-xilinx-6.8.0.orig/drivers/char/tpm/eventlog/common.c +++ linux-xilinx-6.8.0/drivers/char/tpm/eventlog/common.c @@ -47,6 +47,8 @@ if (!err) { seq = file->private_data; seq->private = chip; + } else { + put_device(&chip->dev); } return err; --- linux-xilinx-6.8.0.orig/drivers/char/tpm/tpm-chip.c +++ linux-xilinx-6.8.0/drivers/char/tpm/tpm-chip.c @@ -519,10 +519,6 @@ { struct tpm_chip *chip = container_of(rng, struct tpm_chip, hwrng); - /* Give back zero bytes, as TPM chip has not yet fully resumed: */ - if (chip->flags & TPM_CHIP_FLAG_SUSPENDED) - return 0; - return tpm_get_random(chip, data, max); } --- linux-xilinx-6.8.0.orig/drivers/char/tpm/tpm-dev-common.c +++ linux-xilinx-6.8.0/drivers/char/tpm/tpm-dev-common.c @@ -47,6 +47,8 @@ if (!ret) ret = tpm2_commit_space(chip, space, buf, &len); + else + tpm2_flush_space(chip); out_rc: return ret ? ret : len; --- linux-xilinx-6.8.0.orig/drivers/char/tpm/tpm-interface.c +++ linux-xilinx-6.8.0/drivers/char/tpm/tpm-interface.c @@ -394,6 +394,13 @@ if (!chip) return -ENODEV; + rc = tpm_try_get_ops(chip); + if (rc) { + /* Can be safely set out of locks, as no action cannot race: */ + chip->flags |= TPM_CHIP_FLAG_SUSPENDED; + goto out; + } + if (chip->flags & TPM_CHIP_FLAG_ALWAYS_POWERED) goto suspended; @@ -401,19 +408,18 @@ !pm_suspend_via_firmware()) goto suspended; - rc = tpm_try_get_ops(chip); - if (!rc) { - if (chip->flags & TPM_CHIP_FLAG_TPM2) - tpm2_shutdown(chip, TPM2_SU_STATE); - else - rc = tpm1_pm_suspend(chip, tpm_suspend_pcr); - - tpm_put_ops(chip); + if (chip->flags & TPM_CHIP_FLAG_TPM2) { + tpm2_shutdown(chip, TPM2_SU_STATE); + goto suspended; } + rc = tpm1_pm_suspend(chip, tpm_suspend_pcr); + suspended: chip->flags |= TPM_CHIP_FLAG_SUSPENDED; + tpm_put_ops(chip); +out: if (rc) dev_err(dev, "Ignoring error %d while suspending\n", rc); return 0; @@ -462,11 +468,18 @@ if (!chip) return -ENODEV; + /* Give back zero bytes, as TPM chip has not yet fully resumed: */ + if (chip->flags & TPM_CHIP_FLAG_SUSPENDED) { + rc = 0; + goto out; + } + if (chip->flags & TPM_CHIP_FLAG_TPM2) rc = tpm2_get_random(chip, out, max); else rc = tpm1_get_random(chip, out, max); +out: tpm_put_ops(chip); return rc; } --- linux-xilinx-6.8.0.orig/drivers/char/tpm/tpm2-space.c +++ linux-xilinx-6.8.0/drivers/char/tpm/tpm2-space.c @@ -166,6 +166,9 @@ struct tpm_space *space = &chip->work_space; int i; + if (!space) + return; + for (i = 0; i < ARRAY_SIZE(space->context_tbl); i++) if (space->context_tbl[i] && ~space->context_tbl[i]) tpm2_flush_context(chip, space->context_tbl[i]); --- linux-xilinx-6.8.0.orig/drivers/char/tpm/tpm_tis_core.c +++ linux-xilinx-6.8.0/drivers/char/tpm/tpm_tis_core.c @@ -919,8 +919,6 @@ int rc; u32 int_status; - INIT_WORK(&priv->free_irq_work, tpm_tis_free_irq_func); - rc = devm_request_threaded_irq(chip->dev.parent, irq, NULL, tis_int_handler, IRQF_ONESHOT | flags, dev_name(&chip->dev), chip); @@ -1022,7 +1020,8 @@ interrupt = 0; tpm_tis_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt); - flush_work(&priv->free_irq_work); + if (priv->free_irq_work.func) + flush_work(&priv->free_irq_work); tpm_tis_clkrun_enable(chip, false); @@ -1132,6 +1131,7 @@ priv->phy_ops = phy_ops; priv->locality_count = 0; mutex_init(&priv->locality_count_mutex); + INIT_WORK(&priv->free_irq_work, tpm_tis_free_irq_func); dev_set_drvdata(&chip->dev, priv); --- linux-xilinx-6.8.0.orig/drivers/char/tpm/tpm_tis_spi_main.c +++ linux-xilinx-6.8.0/drivers/char/tpm/tpm_tis_spi_main.c @@ -37,6 +37,7 @@ #include "tpm_tis_spi.h" #define MAX_SPI_FRAMESIZE 64 +#define SPI_HDRSIZE 4 /* * TCG SPI flow control is documented in section 6.4 of the spec[1]. In short, @@ -247,7 +248,7 @@ int tpm_tis_spi_init(struct spi_device *spi, struct tpm_tis_spi_phy *phy, int irq, const struct tpm_tis_phy_ops *phy_ops) { - phy->iobuf = devm_kmalloc(&spi->dev, MAX_SPI_FRAMESIZE, GFP_KERNEL); + phy->iobuf = devm_kmalloc(&spi->dev, SPI_HDRSIZE + MAX_SPI_FRAMESIZE, GFP_KERNEL); if (!phy->iobuf) return -ENOMEM; @@ -317,6 +318,7 @@ } static const struct spi_device_id tpm_tis_spi_id[] = { + { "attpm20p", (unsigned long)tpm_tis_spi_probe }, { "st33htpm-spi", (unsigned long)tpm_tis_spi_probe }, { "slb9670", (unsigned long)tpm_tis_spi_probe }, { "tpm_tis_spi", (unsigned long)tpm_tis_spi_probe }, --- linux-xilinx-6.8.0.orig/drivers/char/virtio_console.c +++ linux-xilinx-6.8.0/drivers/char/virtio_console.c @@ -2016,25 +2016,27 @@ multiport = true; } - err = init_vqs(portdev); - if (err < 0) { - dev_err(&vdev->dev, "Error %d initializing vqs\n", err); - goto free_chrdev; - } - spin_lock_init(&portdev->ports_lock); INIT_LIST_HEAD(&portdev->ports); INIT_LIST_HEAD(&portdev->list); - virtio_device_ready(portdev->vdev); - INIT_WORK(&portdev->config_work, &config_work_handler); INIT_WORK(&portdev->control_work, &control_work_handler); if (multiport) { spin_lock_init(&portdev->c_ivq_lock); spin_lock_init(&portdev->c_ovq_lock); + } + err = init_vqs(portdev); + if (err < 0) { + dev_err(&vdev->dev, "Error %d initializing vqs\n", err); + goto free_chrdev; + } + + virtio_device_ready(portdev->vdev); + + if (multiport) { err = fill_queue(portdev->c_ivq, &portdev->c_ivq_lock); if (err < 0) { dev_err(&vdev->dev, --- linux-xilinx-6.8.0.orig/drivers/char/xilinx_hwicap/xilinx_hwicap.c +++ linux-xilinx-6.8.0/drivers/char/xilinx_hwicap/xilinx_hwicap.c @@ -639,8 +639,8 @@ dev_set_drvdata(dev, (void *)drvdata); drvdata->base_address = devm_platform_ioremap_resource(pdev, 0); - if (!drvdata->base_address) { - retval = -ENODEV; + if (IS_ERR(drvdata->base_address)) { + retval = PTR_ERR(drvdata->base_address); goto failed; } --- linux-xilinx-6.8.0.orig/drivers/char/xillybus/xillyusb.c +++ linux-xilinx-6.8.0/drivers/char/xillybus/xillyusb.c @@ -50,6 +50,7 @@ static const char xillyname[] = "xillyusb"; static unsigned int fifo_buf_order; +static struct workqueue_struct *wakeup_wq; #define USB_VENDOR_ID_XILINX 0x03fd #define USB_VENDOR_ID_ALTERA 0x09fb @@ -569,10 +570,6 @@ * errors if executed. The mechanism relies on that xdev->error is assigned * a non-zero value by report_io_error() prior to queueing wakeup_all(), * which prevents bulk_in_work() from calling process_bulk_in(). - * - * The fact that wakeup_all() and bulk_in_work() are queued on the same - * workqueue makes their concurrent execution very unlikely, however the - * kernel's API doesn't seem to ensure this strictly. */ static void wakeup_all(struct work_struct *work) @@ -627,7 +624,7 @@ if (do_once) { kref_get(&xdev->kref); /* xdev is used by work item */ - queue_work(xdev->workq, &xdev->wakeup_workitem); + queue_work(wakeup_wq, &xdev->wakeup_workitem); } } @@ -1906,6 +1903,13 @@ static int xillyusb_setup_base_eps(struct xillyusb_dev *xdev) { + struct usb_device *udev = xdev->udev; + + /* Verify that device has the two fundamental bulk in/out endpoints */ + if (usb_pipe_type_check(udev, usb_sndbulkpipe(udev, MSG_EP_NUM)) || + usb_pipe_type_check(udev, usb_rcvbulkpipe(udev, IN_EP_NUM))) + return -ENODEV; + xdev->msg_ep = endpoint_alloc(xdev, MSG_EP_NUM | USB_DIR_OUT, bulk_out_work, 1, 2); if (!xdev->msg_ep) @@ -1935,14 +1939,15 @@ __le16 *chandesc, int num_channels) { - struct xillyusb_channel *chan; + struct usb_device *udev = xdev->udev; + struct xillyusb_channel *chan, *new_channels; int i; chan = kcalloc(num_channels, sizeof(*chan), GFP_KERNEL); if (!chan) return -ENOMEM; - xdev->channels = chan; + new_channels = chan; for (i = 0; i < num_channels; i++, chan++) { unsigned int in_desc = le16_to_cpu(*chandesc++); @@ -1971,6 +1976,15 @@ */ if ((out_desc & 0x80) && i < 14) { /* Entry is valid */ + if (usb_pipe_type_check(udev, + usb_sndbulkpipe(udev, i + 2))) { + dev_err(xdev->dev, + "Missing BULK OUT endpoint %d\n", + i + 2); + kfree(new_channels); + return -ENODEV; + } + chan->writable = 1; chan->out_synchronous = !!(out_desc & 0x40); chan->out_seekable = !!(out_desc & 0x20); @@ -1980,6 +1994,7 @@ } } + xdev->channels = new_channels; return 0; } @@ -2096,9 +2111,11 @@ * just after responding with the IDT, there is no reason for any * work item to be running now. To be sure that xdev->channels * is updated on anything that might run in parallel, flush the - * workqueue, which rarely does anything. + * device's workqueue and the wakeup work item. This rarely + * does anything. */ flush_workqueue(xdev->workq); + flush_work(&xdev->wakeup_workitem); xdev->num_channels = num_channels; @@ -2258,6 +2275,10 @@ { int rc = 0; + wakeup_wq = alloc_workqueue(xillyname, 0, 0); + if (!wakeup_wq) + return -ENOMEM; + if (LOG2_INITIAL_FIFO_BUF_SIZE > PAGE_SHIFT) fifo_buf_order = LOG2_INITIAL_FIFO_BUF_SIZE - PAGE_SHIFT; else @@ -2265,12 +2286,17 @@ rc = usb_register(&xillyusb_driver); + if (rc) + destroy_workqueue(wakeup_wq); + return rc; } static void __exit xillyusb_exit(void) { usb_deregister(&xillyusb_driver); + + destroy_workqueue(wakeup_wq); } module_init(xillyusb_init); --- linux-xilinx-6.8.0.orig/drivers/clk/Kconfig +++ linux-xilinx-6.8.0/drivers/clk/Kconfig @@ -170,6 +170,38 @@ help This driver supports the clocks on Bitmain BM1880 SoC. +config COMMON_CLK_SI5324 + tristate "Clock driver for SiLabs 5324 and compatible devices" + depends on I2C + depends on OF + select REGMAP_I2C + help + This driver supports Silicon Labs 5324/5319/5328 programmable + clock generators. Dynamic programming of the oscillator is done + via I2C. + +config COMMON_CLK_IDT8T49N24X + tristate "Clock driver for IDT 8T49N24x" + depends on I2C + depends on OF + select REGMAP_I2C + help + ---help--- + This driver supports the IDT 8T49N24x universal frequency translator + product family. The only chip in the family that is currently + supported is the 8T49N241. The driver supports setting the rate for + all four outputs on the chip and automatically calculating/setting + the appropriate VCO value. + + The driver can read a full register map from the DT, + and will use that register map to initialize the attached part + (via I2C) when the system boots. Any configuration not supported + by the common clock framework must be done via the full register + map, including optimized settings. + + All outputs are currently assumed to be LVDS, unless overridden + in the full register map in the DT. + config COMMON_CLK_CDCE706 tristate "Clock driver for TI CDCE706 clock synthesizer" depends on I2C @@ -466,6 +498,13 @@ Not all features of the PLL are currently supported by the driver. +config COMMON_CLK_PROXO + bool "Clock driver for Renesas ProXO" + depends on I2C && OF + select REGMAP_I2C + help + Support for the Renesas ProXO oscillator clock. + source "drivers/clk/actions/Kconfig" source "drivers/clk/analogbits/Kconfig" source "drivers/clk/baikal-t1/Kconfig" --- linux-xilinx-6.8.0.orig/drivers/clk/Makefile +++ linux-xilinx-6.8.0/drivers/clk/Makefile @@ -55,6 +55,7 @@ obj-$(CONFIG_ARCH_NSPIRE) += clk-nspire.o obj-$(CONFIG_COMMON_CLK_PALMAS) += clk-palmas.o obj-$(CONFIG_CLK_LS1028A_PLLDIG) += clk-plldig.o +obj-$(CONFIG_COMMON_CLK_PROXO) += clk-proxo.o obj-$(CONFIG_COMMON_CLK_PWM) += clk-pwm.o obj-$(CONFIG_CLK_QORIQ) += clk-qoriq.o obj-$(CONFIG_COMMON_CLK_RK808) += clk-rk808.o @@ -71,6 +72,8 @@ obj-$(CONFIG_COMMON_CLK_STM32F) += clk-stm32f4.o obj-$(CONFIG_COMMON_CLK_STM32H7) += clk-stm32h7.o obj-$(CONFIG_COMMON_CLK_TPS68470) += clk-tps68470.o +clk-si5324drv-y := si5324drv.o clk-si5324.o +obj-$(CONFIG_COMMON_CLK_SI5324) += clk-si5324drv.o obj-$(CONFIG_CLK_TWL6040) += clk-twl6040.o obj-$(CONFIG_CLK_TWL) += clk-twl.o obj-$(CONFIG_ARCH_VT8500) += clk-vt8500.o @@ -93,6 +96,7 @@ obj-$(CONFIG_ARCH_BERLIN) += berlin/ obj-$(CONFIG_ARCH_DAVINCI) += davinci/ obj-$(CONFIG_ARCH_HISI) += hisilicon/ +obj-$(CONFIG_COMMON_CLK_IDT8T49N24X) += idt/ obj-y += imgtec/ obj-y += imx/ obj-y += ingenic/ --- linux-xilinx-6.8.0.orig/drivers/clk/analogbits/wrpll-cln28hpc.c +++ linux-xilinx-6.8.0/drivers/clk/analogbits/wrpll-cln28hpc.c @@ -292,7 +292,7 @@ vco = vco_pre * f; } - delta = abs(target_rate - vco); + delta = abs(target_vco_rate - vco); if (delta < best_delta) { best_delta = delta; best_r = r; --- linux-xilinx-6.8.0.orig/drivers/clk/at91/sama7g5.c +++ linux-xilinx-6.8.0/drivers/clk/at91/sama7g5.c @@ -66,6 +66,7 @@ PLL_COMPID_FRAC, PLL_COMPID_DIV0, PLL_COMPID_DIV1, + PLL_COMPID_MAX, }; /* @@ -165,7 +166,7 @@ u8 t; u8 eid; u8 safe_div; -} sama7g5_plls[][PLL_ID_MAX] = { +} sama7g5_plls[][PLL_COMPID_MAX] = { [PLL_ID_CPU] = { [PLL_COMPID_FRAC] = { .n = "cpupll_fracck", @@ -1038,7 +1039,7 @@ sama7g5_pmc->chws[PMC_MAIN] = hw; for (i = 0; i < PLL_ID_MAX; i++) { - for (j = 0; j < 3; j++) { + for (j = 0; j < PLL_COMPID_MAX; j++) { struct clk_hw *parent_hw; if (!sama7g5_plls[i][j].n) --- linux-xilinx-6.8.0.orig/drivers/clk/bcm/clk-bcm2711-dvp.c +++ linux-xilinx-6.8.0/drivers/clk/bcm/clk-bcm2711-dvp.c @@ -56,6 +56,8 @@ if (ret) return ret; + data->num = NR_CLOCKS; + data->hws[0] = clk_hw_register_gate_parent_data(&pdev->dev, "hdmi0-108MHz", &clk_dvp_parent, 0, @@ -76,7 +78,6 @@ goto unregister_clk0; } - data->num = NR_CLOCKS; ret = of_clk_add_hw_provider(pdev->dev.of_node, of_clk_hw_onecell_get, data); if (ret) --- linux-xilinx-6.8.0.orig/drivers/clk/bcm/clk-bcm53573-ilp.c +++ linux-xilinx-6.8.0/drivers/clk/bcm/clk-bcm53573-ilp.c @@ -112,7 +112,7 @@ goto err_free_ilp; } - ilp->regmap = syscon_node_to_regmap(of_get_parent(np)); + ilp->regmap = syscon_node_to_regmap(np->parent); if (IS_ERR(ilp->regmap)) { err = PTR_ERR(ilp->regmap); goto err_free_ilp; --- linux-xilinx-6.8.0.orig/drivers/clk/bcm/clk-raspberrypi.c +++ linux-xilinx-6.8.0/drivers/clk/bcm/clk-raspberrypi.c @@ -371,8 +371,8 @@ if (IS_ERR(hw)) return PTR_ERR(hw); - data->hws[clks->id] = hw; data->num = clks->id + 1; + data->hws[clks->id] = hw; } clks++; --- linux-xilinx-6.8.0.orig/drivers/clk/clk-apple-nco.c +++ linux-xilinx-6.8.0/drivers/clk/clk-apple-nco.c @@ -297,6 +297,9 @@ memset(&init, 0, sizeof(init)); init.name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s-%d", np->name, i); + if (!init.name) + return -ENOMEM; + init.ops = &applnco_ops; init.parent_data = &pdata; init.num_parents = 1; --- linux-xilinx-6.8.0.orig/drivers/clk/clk-axi-clkgen.c +++ linux-xilinx-6.8.0/drivers/clk/clk-axi-clkgen.c @@ -7,6 +7,7 @@ */ #include +#include #include #include #include @@ -512,6 +513,7 @@ struct clk_init_data init; const char *parent_names[2]; const char *clk_name; + struct clk *axi_clk; unsigned int i; int ret; @@ -528,8 +530,24 @@ return PTR_ERR(axi_clkgen->base); init.num_parents = of_clk_get_parent_count(pdev->dev.of_node); - if (init.num_parents < 1 || init.num_parents > 2) - return -EINVAL; + + axi_clk = devm_clk_get_enabled(&pdev->dev, "s_axi_aclk"); + if (!IS_ERR(axi_clk)) { + if (init.num_parents < 2 || init.num_parents > 3) + return -EINVAL; + + init.num_parents -= 1; + } else { + /* + * Legacy... So that old DTs which do not have clock-names still + * work. In this case we don't explicitly enable the AXI bus + * clock. + */ + if (PTR_ERR(axi_clk) != -ENOENT) + return PTR_ERR(axi_clk); + if (init.num_parents < 1 || init.num_parents > 2) + return -EINVAL; + } for (i = 0; i < init.num_parents; i++) { parent_names[i] = of_clk_get_parent_name(pdev->dev.of_node, i); --- linux-xilinx-6.8.0.orig/drivers/clk/clk-conf.c +++ linux-xilinx-6.8.0/drivers/clk/clk-conf.c @@ -81,13 +81,11 @@ static int __set_clk_rates(struct device_node *node, bool clk_supplier) { struct of_phandle_args clkspec; - struct property *prop; - const __be32 *cur; int rc, index = 0; struct clk *clk; u32 rate; - of_property_for_each_u32(node, "assigned-clock-rates", prop, cur, rate) { + of_property_for_each_u32(node, "assigned-clock-rates", rate) { if (rate) { rc = of_parse_phandle_with_args(node, "assigned-clocks", "#clock-cells", index, &clkspec); --- linux-xilinx-6.8.0.orig/drivers/clk/clk-en7523.c +++ linux-xilinx-6.8.0/drivers/clk/clk-en7523.c @@ -40,6 +40,7 @@ u8 div_shift; u16 div_val0; u8 div_step; + u8 div_offset; }; struct en_clk_gate { @@ -67,6 +68,7 @@ .div_bits = 3, .div_shift = 0, .div_step = 1, + .div_offset = 1, }, { .id = EN7523_CLK_EMI, .name = "emi", @@ -80,6 +82,7 @@ .div_bits = 3, .div_shift = 0, .div_step = 1, + .div_offset = 1, }, { .id = EN7523_CLK_BUS, .name = "bus", @@ -93,6 +96,7 @@ .div_bits = 3, .div_shift = 0, .div_step = 1, + .div_offset = 1, }, { .id = EN7523_CLK_SLIC, .name = "slic", @@ -133,13 +137,14 @@ .div_bits = 3, .div_shift = 0, .div_step = 1, + .div_offset = 1, }, { .id = EN7523_CLK_CRYPTO, .name = "crypto", .base_reg = REG_CRYPTO_CLKSRC, .base_bits = 1, - .base_shift = 8, + .base_shift = 0, .base_values = emi_base, .n_base_values = ARRAY_SIZE(emi_base), } @@ -184,7 +189,7 @@ if (!val && desc->div_val0) return desc->div_val0; - return (val + 1) * desc->div_step; + return (val + desc->div_offset) * desc->div_step; } static int en7523_pci_is_enabled(struct clk_hw *hw) @@ -279,6 +284,8 @@ u32 rate; int i; + clk_data->num = EN7523_NUM_CLOCKS; + for (i = 0; i < ARRAY_SIZE(en7523_base_clks); i++) { const struct en_clk_desc *desc = &en7523_base_clks[i]; @@ -297,8 +304,6 @@ hw = en7523_register_pcie_clk(dev, np_base); clk_data->hws[EN7523_CLK_PCIE] = hw; - - clk_data->num = EN7523_NUM_CLOCKS; } static int en7523_clk_probe(struct platform_device *pdev) --- linux-xilinx-6.8.0.orig/drivers/clk/clk-proxo.c +++ linux-xilinx-6.8.0/drivers/clk/clk-proxo.c @@ -0,0 +1,409 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Common clock framework driver for the ProXO family of quartz-based oscillators. + * + * Copyright (c) 2022 Renesas Electronics Corporation + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Most ProXO products have a 50MHz xtal, can be overridden in device tree */ +#define PROXO_DEFAULT_XTAL 50000000 + +/* VCO range is 6.86 GHz to 8.65 GHz */ +#define PROXO_FVCO_MIN 6860000000ULL +#define PROXO_FVCO_MAX 8650000000ULL + +/* Output range is 15MHz to 2.1GHz */ +#define PROXO_FOUT_MIN 15000000UL +#define PROXO_FOUT_MAX 2100000000UL + +#define PROXO_FRAC_BITS 24 +#define PROXO_FRAC_DIVISOR BIT(PROXO_FRAC_BITS) + +/* Disable the doubler if the crystal is > 80MHz */ +#define PROXO_FDBL_MAX 80000000U + +#define PROXO_OUTDIV_MIN 4 +#define PROXO_OUTDIV_MAX 511 +#define PROXO_FB_MIN 41 + +#define PROXO_REG_FREQ0 0x10 +#define PROXO_REG_XO 0x51 +#define PROXO_REG_TRIG 0x62 + +#define OUTDIV_8_MASK 0x80 +#define FBDIV_INT_8_7_MASK 0x30 +#define FBDIV_INT_6_0_MASK 0x7f +#define DOUBLE_DIS_MASK 0x80 +#define CP_MASK 0x0e +#define PLL_MODE_MASK 0x01 + +enum proxo_model { + PROXO_XP, +}; + +enum proxo_pll_mode { + PLL_MODE_FRAC, + PLL_MODE_INT, +}; + +struct clk_proxo { + struct clk_hw hw; + struct regmap *regmap; + struct i2c_client *i2c_client; + enum proxo_model model; + u32 fxtal; + u64 fvco; + u32 fout; + u8 double_dis; + u16 fb_int; + u32 fb_frac; + u16 out_div; +}; + +#define to_clk_proxo(_hw) container_of(_hw, struct clk_proxo, hw) + +static u8 proxo_get_cp_value(u64 fvco) +{ + if (fvco < 7000000000ULL) + return 5; + else if (fvco >= 7000000000ULL && fvco < 7400000000ULL) + return 4; + else if (fvco >= 7400000000ULL && fvco < 7800000000ULL) + return 3; + else + return 2; +} + +static u64 proxo_calc_fvco(u32 fxtal, u8 double_dis, u16 fb_int, u32 fb_frac) +{ + u64 fref, fvco; + u8 doubler; + + doubler = double_dis ? 1 : 2; + fref = (u64)fxtal * doubler; + fvco = (fref * fb_int) + div_u64(fref * fb_frac, PROXO_FRAC_DIVISOR); + + return fvco; +} + +static int proxo_get_divs(struct clk_proxo *proxo, u16 *out_div, u16 *fb_int, u32 *fb_frac, + u8 *double_dis) +{ + int ret; + u8 reg[6]; + unsigned int xo; + + ret = regmap_bulk_read(proxo->regmap, PROXO_REG_FREQ0, reg, ARRAY_SIZE(reg)); + if (ret) + return ret; + + ret = regmap_read(proxo->regmap, PROXO_REG_XO, &xo); + if (ret) + return ret; + + *out_div = (u16_get_bits(reg[1], OUTDIV_8_MASK) << 8) + reg[0]; + *fb_int = (u16_get_bits(reg[2], FBDIV_INT_8_7_MASK) << 7) + (reg[1] & FBDIV_INT_6_0_MASK); + *fb_frac = ((u32)reg[5] << 16) + ((u32)reg[4] << 8) + reg[3]; + *double_dis = !!(xo & DOUBLE_DIS_MASK); + + if (*fb_frac > (PROXO_FRAC_DIVISOR >> 1)) + (*fb_int)--; + + pr_debug("%s - out_div: %u, fb_int: %u, fb_frac: %u, doubler_dis: %u\n", + __func__, *out_div, *fb_int, *fb_frac, *double_dis); + + return ret; +} + +static int proxo_get_defaults(struct clk_proxo *proxo) +{ + int ret; + + ret = proxo_get_divs(proxo, &proxo->out_div, &proxo->fb_int, &proxo->fb_frac, + &proxo->double_dis); + if (ret) + return ret; + + proxo->fvco = proxo_calc_fvco(proxo->fxtal, proxo->double_dis, proxo->fb_int, + proxo->fb_frac); + proxo->fout = div_u64(proxo->fvco, proxo->out_div); + + pr_debug("%s - out_div: %u, fb_int: %u, fb_frac: %u, doubler_dis: %u, fvco: %llu, fout: %u\n", + __func__, proxo->out_div, proxo->fb_int, proxo->fb_frac, proxo->double_dis, + proxo->fvco, proxo->fout); + + return ret; +} + +static int proxo_calc_divs(unsigned long frequency, struct clk_proxo *proxo, u32 *fout, + u16 *out_div, u16 *fb_int, u32 *fb_frac, u8 *double_dis) +{ + int i; + u8 doubler; + u16 out_div_start; + u32 fref; + u64 fvco; + bool found = false, allow_frac = false; + + out_div_start = 1 + div64_u64(PROXO_FVCO_MIN, frequency); + doubler = proxo->fxtal <= PROXO_FDBL_MAX ? 2 : 1; + fref = proxo->fxtal * doubler; + *fout = (u32)max(PROXO_FOUT_MIN, min(PROXO_FOUT_MAX, (unsigned long)*fout)); + *out_div = PROXO_OUTDIV_MIN; + *fb_int = PROXO_FB_MIN; + *fb_frac = 0; + *double_dis = doubler == 1 ? 1 : 0; + +retry: + for (i = out_div_start; i <= PROXO_OUTDIV_MAX; ++i) { + *out_div = i; + fvco = frequency * *out_div; + if (fvco > PROXO_FVCO_MAX) { + allow_frac = true; + goto retry; + } + *fb_int = div_u64_rem(fvco, fref, fb_frac); + if (*fb_frac == 0) { + found = true; + break; + } + if (allow_frac) { + *fb_frac = 1 + (u32)div_u64((u64)*fb_frac << PROXO_FRAC_BITS, fref); + found = true; + break; + } + } + + if (!found) + return -EINVAL; + + if (fvco < PROXO_FVCO_MIN || fvco > PROXO_FVCO_MAX) + return -EINVAL; + + fvco = ((u64)fref * *fb_int) + div_u64((u64)fref * *fb_frac, PROXO_FRAC_DIVISOR); + *fout = div_u64(fvco, *out_div); + + return 0; +} + +static int proxo_update_frequency(struct clk_proxo *proxo) +{ + enum proxo_pll_mode pll_mode; + u8 cp_value; + u16 fb_int; + u8 reg[6]; + + cp_value = proxo_get_cp_value(proxo->fvco); + pll_mode = proxo->fb_frac == 0 ? PLL_MODE_INT : PLL_MODE_FRAC; + fb_int = proxo->fb_frac > (PROXO_FRAC_DIVISOR >> 1) ? proxo->fb_int + 1 : proxo->fb_int; + + reg[0] = proxo->out_div & 0xff; + reg[1] = ((proxo->out_div >> 1) & OUTDIV_8_MASK) + (fb_int & FBDIV_INT_6_0_MASK); + reg[2] = (fb_int >> 3) & FBDIV_INT_8_7_MASK; + reg[2] = u8_replace_bits(reg[2], cp_value, CP_MASK); + reg[2] = u8_replace_bits(reg[2], pll_mode, PLL_MODE_MASK); + reg[3] = proxo->fb_frac & 0xff; + reg[4] = (proxo->fb_frac >> 8) & 0xff; + reg[5] = (proxo->fb_frac >> 16) & 0xff; + + return regmap_bulk_write(proxo->regmap, PROXO_REG_FREQ0, reg, ARRAY_SIZE(reg)); +} + +static int proxo_set_frequency(struct clk_proxo *proxo, unsigned long frequency) +{ + int ret; + + ret = proxo_calc_divs(frequency, proxo, &proxo->fout, &proxo->out_div, &proxo->fb_int, + &proxo->fb_frac, &proxo->double_dis); + if (ret) + return ret; + + proxo->fvco = proxo_calc_fvco(proxo->fxtal, proxo->double_dis, proxo->fb_int, + proxo->fb_frac); + proxo->fout = div_u64(proxo->fvco, proxo->out_div); + + pr_debug("%s - out_div: %u, fb_int: %u, fb_frac: %u, doubler_dis: %u, fvco: %llu, fout: %u\n", + __func__, proxo->out_div, proxo->fb_int, proxo->fb_frac, + proxo->double_dis, proxo->fvco, proxo->fout); + + proxo_update_frequency(proxo); + + /* trigger frequency change */ + regmap_write(proxo->regmap, PROXO_REG_TRIG, 0x00); + regmap_write(proxo->regmap, PROXO_REG_TRIG, 0x01); + regmap_write(proxo->regmap, PROXO_REG_TRIG, 0x00); + + return ret; +} + +static unsigned long proxo_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) +{ + struct clk_proxo *proxo = to_clk_proxo(hw); + int ret; + u8 double_dis; + u16 out_div, fb_int; + u32 fout, fb_frac; + u64 fvco; + + ret = proxo_get_divs(proxo, &out_div, &fb_int, &fb_frac, &double_dis); + if (ret) { + dev_err(&proxo->i2c_client->dev, "unable to recalc rate\n"); + return 0; + } + + fvco = proxo_calc_fvco(proxo->fxtal, double_dis, fb_int, fb_frac); + fout = div_u64(fvco, out_div); + + return fout; +} + +static long proxo_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) +{ + struct clk_proxo *proxo = to_clk_proxo(hw); + int ret; + u8 double_dis; + u16 out_div, fb_int; + u32 fout, fb_frac; + + if (!rate) + return 0; + + ret = proxo_calc_divs(rate, proxo, &fout, &out_div, &fb_int, &fb_frac, &double_dis); + if (ret) { + dev_err(&proxo->i2c_client->dev, "unable to round rate\n"); + return 0; + } + + return fout; +} + +static int proxo_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) +{ + struct clk_proxo *proxo = to_clk_proxo(hw); + + if (rate < PROXO_FOUT_MIN || rate > PROXO_FOUT_MAX) { + dev_err(&proxo->i2c_client->dev, "requested frequency %lu Hz is out of range\n", + rate); + return -EINVAL; + } + + return proxo_set_frequency(proxo, rate); +} + +static const struct clk_ops proxo_clk_ops = { + .recalc_rate = proxo_recalc_rate, + .round_rate = proxo_round_rate, + .set_rate = proxo_set_rate, +}; + +static const struct i2c_device_id proxo_i2c_id[] = { + { "proxo-xp", PROXO_XP }, + {}, +}; +MODULE_DEVICE_TABLE(i2c, proxo_i2c_id); + +static const struct regmap_config proxo_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = 0x63, + .cache_type = REGCACHE_RBTREE, + .use_single_write = true, + .use_single_read = true, +}; + +static int proxo_probe(struct i2c_client *client) +{ + struct clk_proxo *proxo; + struct clk_init_data init; + const struct i2c_device_id *id = i2c_match_id(proxo_i2c_id, client); + int ret; + + proxo = devm_kzalloc(&client->dev, sizeof(*proxo), GFP_KERNEL); + if (!proxo) + return -ENOMEM; + + init.ops = &proxo_clk_ops; + init.flags = 0; + init.num_parents = 0; + proxo->hw.init = &init; + proxo->i2c_client = client; + proxo->model = id->driver_data; + + if (of_property_read_string(client->dev.of_node, "clock-output-names", &init.name)) + init.name = client->dev.of_node->name; + + if (of_property_read_u32(client->dev.of_node, "renesas,crystal-frequency", &proxo->fxtal)) + proxo->fxtal = PROXO_DEFAULT_XTAL; + + proxo->regmap = devm_regmap_init_i2c(client, &proxo_regmap_config); + if (IS_ERR(proxo->regmap)) + return PTR_ERR(proxo->regmap); + + i2c_set_clientdata(client, proxo); + + ret = proxo_get_defaults(proxo); + if (ret) { + dev_err(&client->dev, "getting defaults failed\n"); + return ret; + } + + ret = devm_clk_hw_register(&client->dev, &proxo->hw); + if (ret) { + dev_err(&client->dev, "clock registration failed\n"); + return ret; + } + + ret = of_clk_add_hw_provider(client->dev.of_node, of_clk_hw_simple_get, &proxo->hw); + if (ret) { + dev_err(&client->dev, "unable to add clk provider\n"); + return ret; + } + + ret = clk_set_rate_range(proxo->hw.clk, PROXO_FOUT_MIN, PROXO_FOUT_MAX); + if (ret) { + dev_err(&client->dev, "clk_set_rate_range failed\n"); + return ret; + } + + dev_info(&client->dev, "registered, current frequency %u Hz\n", proxo->fout); + + return ret; +} + +static void proxo_remove(struct i2c_client *client) +{ + of_clk_del_provider(client->dev.of_node); +} + +static const struct of_device_id proxo_of_match[] = { + { .compatible = "renesas,proxo-xp" }, + {}, +}; +MODULE_DEVICE_TABLE(of, proxo_of_match); + +static struct i2c_driver proxo_i2c_driver = { + .driver = { + .name = "proxo", + .of_match_table = proxo_of_match, + }, + .probe = proxo_probe, + .remove = proxo_remove, + .id_table = proxo_i2c_id, +}; +module_i2c_driver(proxo_i2c_driver); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Alex Helms pll_amplitude = RS9_REG_SS_AMP_0V7; - rs9->pll_ssc = RS9_REG_SS_SSC_100; + rs9->pll_amplitude = RS9_REG_SS_AMP_DEFAULT; + rs9->pll_ssc = RS9_REG_SS_SSC_DEFAULT; /* Output clock amplitude */ ret = of_property_read_u32(np, "renesas,out-amplitude-microvolt", @@ -247,13 +249,13 @@ int i; /* If amplitude is non-default, update it. */ - if (rs9->pll_amplitude != RS9_REG_SS_AMP_0V7) { + if (rs9->pll_amplitude != RS9_REG_SS_AMP_DEFAULT) { regmap_update_bits(rs9->regmap, RS9_REG_SS, RS9_REG_SS_AMP_MASK, rs9->pll_amplitude); } /* If SSC is non-default, update it. */ - if (rs9->pll_ssc != RS9_REG_SS_SSC_100) { + if (rs9->pll_ssc != RS9_REG_SS_SSC_DEFAULT) { regmap_update_bits(rs9->regmap, RS9_REG_SS, RS9_REG_SS_SSC_MASK, rs9->pll_ssc); } --- linux-xilinx-6.8.0.orig/drivers/clk/clk-si5324.c +++ linux-xilinx-6.8.0/drivers/clk/clk-si5324.c @@ -0,0 +1,1244 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * clk-si5324.c - Si5324 clock driver + * + * Copyright (C) 2017-2018 Xilinx, Inc. + * + * Author: Venkateshwar Rao G + * Leon Woestenberg + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "clk-si5324.h" +#include "si5324.h" +#include "si5324drv.h" + +struct si5324_driver_data; + +/** + * struct si5324_parameters - si5324 core parameters + * + * @n1_hs_min: Minimum high-speed n1 output divider + * @n1_hs_max: Maximum high-speed n1 output divider + * @n1_hs: n1 high-speed output divider + * @nc1_ls_min: Minimum low-speed clkout1 output divider + * @nc1_ls_max: Maximum low-speed clkout1 output divider + * @nc1_ls: Clkout1 low-speed output divider + * @nc2_ls_min: Minimum low-speed clkout2 output divider + * @nc2_ls_max: Maximum low-speed clkout2 output divider + * @nc2_ls: Clkout2 low-speed output divider + * @n2_hs: High-speed feedback divider + * @n2_ls_min: Minimum low-speed feedback divider + * @n2_ls_max: Maximum low-speed feedback divider + * @n2_ls: Low-speed feedback divider + * @n31_min: Minimum input divider for clk1 + * @n31_max: Maximum input divider for clk1 + * @n31: Input divider for clk1 + * @n32_min: Minimum input divider for clk2 + * @n32_max: Maximum input divider for clk2 + * @n32: Input divider for clk2 + * @fin: Input frequency + * @fout: Output frequency + * @fosc: Osc frequency + * @best_delta_fout: Delta out frequency + * @best_fout: Best output frequency + * @best_n1_hs: Best high speed output divider + * @best_nc1_ls: Best low speed clkout1 divider + * @best_n2_hs: Best high speed feedback divider + * @best_n2_ls: Best low speed feedback divider + * @best_n3: Best input clock divider + * @valid: Validility + */ +struct si5324_parameters { + u32 n1_hs_min; + u32 n1_hs_max; + u32 n1_hs; + u32 nc1_ls_min; + u32 nc1_ls_max; + u32 nc1_ls; + u32 nc2_ls_min; + u32 nc2_ls_max; + u32 nc2_ls; + u32 n2_hs; + u32 n2_ls_min; + u32 n2_ls_max; + u32 n2_ls; + u32 n31_min; + u32 n31_max; + u32 n31; + u32 n32_min; + u32 n32_max; + u32 n32; + u64 fin; + u64 fout; + u64 fosc; + u64 best_delta_fout; + u64 best_fout; + u32 best_n1_hs; + u32 best_nc1_ls; + u32 best_n2_hs; + u32 best_n2_ls; + u32 best_n3; + int valid; +}; + +/** + * struct si5324_hw_data - Clock parameters + * + * @hw: Handle between common and hardware-specific interfaces + * @drvdata: Driver private data + * @num: Differential pair clock number + */ +struct si5324_hw_data { + struct clk_hw hw; + struct si5324_driver_data *drvdata; + unsigned char num; +}; + +/** + * struct si5324_driver_data - Driver parameters + * @client: I2C client pointer + * @regmap: Device's regmap + * @onecell: Clock onecell data + * @params: Device parameters + * @pxtal: Clock + * @pxtal_name: Clock name + * @xtal: Reference clock + * @pclkin1: Clock in 1 + * @pclkin1_name: Clock in 1 name + * @clkin1: Differential input clock 1 + * @pclkin2: Clock in 2 + * @pclkin2_name: Clock in 2 name + * @clkin2: Differential input clock 2 + * @pll: Pll clock + * @clkout: Output clock + * @rate_clkout0: Clock out 0 rate + * @rate_clkout1: Clock out 1 rate + */ +struct si5324_driver_data { + struct i2c_client *client; + struct regmap *regmap; + struct clk_onecell_data onecell; + struct si5324_parameters params; + struct clk *pxtal; + const char *pxtal_name; + struct clk_hw xtal; + struct clk *pclkin1; + const char *pclkin1_name; + struct clk_hw clkin1; + struct clk *pclkin2; + const char *pclkin2_name; + struct clk_hw clkin2; + struct si5324_hw_data pll; + struct si5324_hw_data *clkout; + unsigned long rate_clkout0; + unsigned long rate_clkout1; +}; + +static const char * const si5324_input_names[] = { + "xtal", "clkin1", "clkin2" +}; + +static const char * const si5324_pll_name = "pll"; + +static const char * const si5324_clkout_names[] = { + "clk0", "clk1" +}; + +enum si53xx_variant { + si5319, + si5324, + si5328 +}; + +static const char * const si53xx_variant_name[] = { + "si5319", "si5324", "si5328" +}; + +/** + * si5324_reg_read - Read a single si5324 register. + * + * @drvdata: Device to read from. + * @reg: Register to read. + * + * This function reads data from a single register + * + * Return: Data of the register on success, error number on failure + */ +static inline int +si5324_reg_read(struct si5324_driver_data *drvdata, u8 reg) +{ + u32 val; + int ret; + + ret = regmap_read(drvdata->regmap, reg, &val); + if (ret < 0) { + dev_err(&drvdata->client->dev, + "unable to read from reg%02x\n", reg); + return ret; + } + + return (u8)val; +} + +/** + * si5324_bulk_read - Read multiple si5324 registers + * + * @drvdata: Device to read from + * @reg: First register to be read from + * @count: Number of registers + * @buf: Pointer to store read value + * + * This function reads from multiple registers which are in + * sequential order + * + * Return: Number of bytes read + */ +static inline int si5324_bulk_read(struct si5324_driver_data *drvdata, + u8 reg, u8 count, u8 *buf) +{ + return regmap_bulk_read(drvdata->regmap, reg, buf, count); +} + +/** + * si5324_reg_write - Write a single si5324 register. + * + * @drvdata: Device to write to. + * @reg: Register to write to. + * @val: Value to write. + * + * This function writes into a single register + * + * Return: Zero on success, a negative error number on failure. + * + */ +static inline int si5324_reg_write(struct si5324_driver_data *drvdata, + u8 reg, u8 val) +{ + int ret = regmap_write(drvdata->regmap, reg, val); + + dev_dbg(&drvdata->client->dev, "%s 0x%02x @%02d\n", __func__, + (int)val, (int)reg); + return ret; +} + +/** + * si5324_bulk_write - Write into multiple si5324 registers + * + * @drvdata: Device to write to + * @reg: First register + * @count: Number of registers + * @buf: Block of data to be written + * + * This function writes into multiple registers. + * + * Return: Zero on success, a negative error number on failure. + */ +static inline int si5324_bulk_write(struct si5324_driver_data *drvdata, + u8 reg, u8 count, const u8 *buf) +{ + return regmap_raw_write(drvdata->regmap, reg, buf, count); +} + +/** + * si5324_set_bits - Set the value of a bitfield in a si5324 register + * + * @drvdata: Device to write to. + * @reg: Register to write to. + * @mask: Mask of bits to set. + * @val: Value to set (unshifted) + * + * This function set particular bits in register + * + * Return: Zero on success, a negative error number on failure. + */ +static inline int si5324_set_bits(struct si5324_driver_data *drvdata, + u8 reg, u8 mask, u8 val) +{ + return regmap_update_bits(drvdata->regmap, reg, mask, val); +} + +/** + * si5324_bulk_scatter_write - Write into multiple si5324 registers + * + * @drvdata: Device to write to + * @count: Number of registers + * @buf: Register and data to write + * + * This function writes into multiple registers which are need not + * to be in sequential order. + * + * Return: Number of bytes written + */ +static inline int +si5324_bulk_scatter_write(struct si5324_driver_data *drvdata, + u8 count, const u8 *buf) +{ + int i; + int ret = 0; + + for (i = 0; i < count; i++) { + ret = si5324_reg_write(drvdata, buf[i * 2], buf[i * 2 + 1]); + if (ret) + return ret; + } + return ret; +} + +/** + * si5324_initialize - Initializes si5324 device + * + * @drvdata: Device instance + * + * This function initializes si5324 with the following settings + * Keep reset asserted for 20ms + * 1. freerun mode + * 2. Disable output clocks during calibration + * 3. Clock selection mode : default value, manual + * 4. output signal format : LVDS for clkout1, disable clkout2 + * 5. CS_CA pin in ignored + * 6. Set lock time to 13.3ms + * 7. Enables the fastlock. + * + * Return: Zero on success, negative number on failure. + */ +static int si5324_initialize(struct si5324_driver_data *drvdata) +{ + int ret = 0; + + si5324_set_bits(drvdata, SI5324_RESET_CALIB, + SI5324_RST_ALL, SI5324_RST_ALL); + msleep(SI5324_RESET_DELAY_MS); + si5324_set_bits(drvdata, SI5324_RESET_CALIB, SI5324_RST_ALL, 0); + msleep(SI5324_RESET_DELAY_MS); + + ret = si5324_reg_read(drvdata, SI5324_CONTROL); + if (ret < 0) + return ret; + + si5324_reg_write(drvdata, SI5324_CONTROL, + (ret | SI5324_CONTROL_FREE_RUN)); + + ret = si5324_reg_read(drvdata, SI5324_CKSEL); + if (ret < 0) + return ret; + + si5324_reg_write(drvdata, SI5324_CKSEL, (ret | SI5324_CKSEL_SQL_ICAL)); + si5324_reg_write(drvdata, SI3324_AUTOSEL, SI5324_AUTOSEL_DEF); + si5324_reg_write(drvdata, SI5324_OUTPUT_SIGFMT, + SI5324_OUTPUT_SF1_DEFAULT); + + ret = si5324_reg_read(drvdata, SI5324_DSBL_CLKOUT); + if (ret < 0) + return ret; + + si5324_reg_write(drvdata, SI5324_DSBL_CLKOUT, + (ret | SI5324_DSBL_CLKOUT2)); + ret = si5324_reg_read(drvdata, SI5324_POWERDOWN); + if (ret < 0) + return ret; + + si5324_reg_write(drvdata, SI5324_POWERDOWN, (ret | SI5324_PD_CK2)); + si5324_reg_write(drvdata, SI5324_FOS_LOCKT, SI5324_FOS_DEFAULT); + + ret = si5324_reg_read(drvdata, SI5324_CK_ACTV_SEL); + if (ret < 0) + return ret; + + si5324_reg_write(drvdata, SI5324_CK_ACTV_SEL, SI5324_CK_DEFAULT); + ret = si5324_reg_read(drvdata, SI5324_FASTLOCK); + if (ret < 0) + return ret; + + si5324_reg_write(drvdata, SI5324_FASTLOCK, (ret | SI5324_FASTLOCK_EN)); + return 0; +} + +/** + * si5324_read_parameters - Reads clock divider parameters + * + * @drvdata: Device to read from + * + * This function reads the clock divider parameters into driver structure. + * + * Following table gives the buffer index, register number and + * register name with bit fields + * 0 25 N1_HS[2:0] + * 6 31 NC1_LS[19:16] + * 7 32 NC1_LS[15:8] + * 8 33 NC1_LS[7:0] + * 9 34 NC2_LS[19:16] + * 10 35 NC2_LS[15:8] + * 11 36 NC2_LS[7:0] + * 15 40 N2_HS[2:0] N2_LS[19:16] + * 16 41 N2_LS[15:8] + * 17 42 N2_LS[7:0] + * 18 43 N31[18:16] + * 19 44 N31[15:8] + * 20 45 N31[7:0] + * 21 46 N32[18:16] + * 22 47 N32[15:8] + * 23 48 N32[7:0] + */ +static void si5324_read_parameters(struct si5324_driver_data *drvdata) +{ + u8 buf[SI5324_PARAM_LEN]; + + si5324_bulk_read(drvdata, SI5324_N1_HS, SI5324_N1_PARAM_LEN, &buf[0]); + si5324_bulk_read(drvdata, SI5324_NC1_LS_H, SI5324_NC_PARAM_LEN, + &buf[6]); + si5324_bulk_read(drvdata, SI5324_N2_HS_LS_H, SI5324_N2_PARAM_LEN, + &buf[15]); + + drvdata->params.n1_hs = (buf[0] >> SI5324_N1_HS_VAL_SHIFT); + drvdata->params.n1_hs += 4; + + drvdata->params.nc1_ls = ((buf[6] & SI5324_DIV_LS_MASK) << + SI5324_HSHIFT) | (buf[7] << SI5324_LSHIFT) | + buf[8]; + drvdata->params.nc1_ls += 1; + drvdata->params.nc2_ls = ((buf[9] & SI5324_DIV_LS_MASK) << + SI5324_HSHIFT) | (buf[10] << SI5324_LSHIFT) | + buf[11]; + drvdata->params.nc2_ls += 1; + drvdata->params.n2_ls = ((buf[15] & SI5324_DIV_LS_MASK) << + SI5324_HSHIFT) | (buf[16] << SI5324_LSHIFT) | + buf[17]; + drvdata->params.n2_ls += 1; + drvdata->params.n2_hs = buf[15] >> SI5324_N2_HS_LS_H_VAL_SHIFT; + drvdata->params.n2_hs += 4; + drvdata->params.n31 = ((buf[18] & SI5324_DIV_LS_MASK) << + SI5324_HSHIFT) | (buf[19] << SI5324_LSHIFT) | + buf[20]; + drvdata->params.n31 += 1; + drvdata->params.n32 = ((buf[21] & SI5324_DIV_LS_MASK) << + SI5324_HSHIFT) | (buf[22] << SI5324_LSHIFT) | + buf[23]; + drvdata->params.n32 += 1; + drvdata->params.valid = 1; +} + +static bool si5324_regmap_is_volatile(struct device *dev, unsigned int reg) +{ + return true; +} + +/** + * si5324_regmap_is_readable - Checks the register is readable or not + * + * @dev: Registered device + * @reg: Register offset + * + * Checks the register is readable or not. + * + * Return: True if the register is reabdle, False if it is not readable. + */ +static bool si5324_regmap_is_readable(struct device *dev, unsigned int reg) +{ + if ((reg > SI5324_POWERDOWN && reg < SI5324_FOS_LOCKT) || + (reg > SI5324_N1_HS && reg < SI5324_NC1_LS_H) || + (reg > SI5324_NC2_LS_L && reg < SI5324_N2_HS_LS_H) || + (reg > SI5324_N32_CLKIN_L && reg < SI5324_FOS_CLKIN_RATE) || + (reg > SI5324_FOS_CLKIN_RATE && reg < SI5324_PLL_ACTV_CLK) || + reg > SI5324_SKEW2) + return false; + + return true; +} + +/** + * si5324_regmap_is_writeable - Checks the register is writable or not + * + * @dev: Registered device + * @reg: Register offset + * + * Checks the register is writable or not. + * + * Return: True if the register is writeable, False if it's not writeable. + */ +static bool si5324_regmap_is_writeable(struct device *dev, unsigned int reg) +{ + if ((reg > SI5324_POWERDOWN && reg < SI5324_FOS_LOCKT) || + (reg > SI5324_N1_HS && reg < SI5324_NC1_LS_H) || + (reg > SI5324_NC2_LS_L && reg < SI5324_N2_HS_LS_H) || + (reg > SI5324_N32_CLKIN_L && reg < SI5324_FOS_CLKIN_RATE) || + (reg > SI5324_FOS_CLKIN_RATE && reg < SI5324_PLL_ACTV_CLK) || + reg > SI5324_SKEW2 || + (reg >= SI5324_PLL_ACTV_CLK && reg <= SI5324_CLKIN_LOL_STATUS) || + (reg >= SI5324_PARTNO_H && reg <= SI5324_PARTNO_L)) + return false; + + return true; +} + +static const struct regmap_config si5324_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .cache_type = REGCACHE_RBTREE, + .max_register = 144, + .writeable_reg = si5324_regmap_is_writeable, + .readable_reg = si5324_regmap_is_readable, + .volatile_reg = si5324_regmap_is_volatile, +}; + +static int si5324_xtal_prepare(struct clk_hw *hw) +{ + return 0; +} + +static void si5324_xtal_unprepare(struct clk_hw *hw) +{ +} + +static const struct clk_ops si5324_xtal_ops = { + .prepare = si5324_xtal_prepare, + .unprepare = si5324_xtal_unprepare, +}; + +/** + * si5324_clkin_prepare - Prepare the clkin + * + * @hw: Handle between common and hardware-specific interfaces + * + * This function enables the particular clk + * + * Return: Zero on success, a negative error number on failure. + */ +static int si5324_clkin_prepare(struct clk_hw *hw) +{ + int ret = 0; + struct si5324_driver_data *drvdata; + struct si5324_hw_data *hwdata = + container_of(hw, struct si5324_hw_data, hw); + + if (hwdata->num == SI5324_CLKIN1) { + drvdata = container_of(hw, struct si5324_driver_data, clkin1); + ret = si5324_set_bits(drvdata, SI5324_CONTROL, + SI5324_CONTROL_FREE_RUN, 0); + ret = si5324_set_bits(drvdata, SI5324_POWERDOWN, SI5324_PD_CK1 | + SI5324_PD_CK2, SI5324_PD_CK2); + } else if (hwdata->num == SI5324_CLKIN2) { + drvdata = container_of(hw, struct si5324_driver_data, clkin2); + ret = si5324_set_bits(drvdata, SI5324_CONTROL, + SI5324_CONTROL_FREE_RUN, 0); + ret = si5324_set_bits(drvdata, SI5324_POWERDOWN, SI5324_PD_CK1 | + SI5324_PD_CK2, SI5324_PD_CK1); + } + + return ret; +} + +/** + * si5324_clkin_unprepare - Unprepare the clkin + * + * @hw: Clock hardware + * + * This function enables the particular clk. + */ +static void si5324_clkin_unprepare(struct clk_hw *hw) +{ + struct si5324_driver_data *drvdata; + struct si5324_hw_data *hwdata = + container_of(hw, struct si5324_hw_data, hw); + + if (hwdata->num == SI5324_CLKIN1) { + drvdata = container_of(hw, struct si5324_driver_data, clkin1); + si5324_set_bits(drvdata, SI5324_POWERDOWN, + SI5324_PD_CK1 | SI5324_PD_CK2, SI5324_PD_CK1); + } else if (hwdata->num == SI5324_CLKIN2) { + drvdata = container_of(hw, struct si5324_driver_data, clkin2); + si5324_set_bits(drvdata, SI5324_POWERDOWN, + SI5324_PD_CK1 | SI5324_PD_CK2, SI5324_PD_CK1); + } +} + +static unsigned long si5324_clkin_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + return 0; +} + +static const struct clk_ops si5324_clkin_ops = { + .prepare = si5324_clkin_prepare, + .unprepare = si5324_clkin_unprepare, + .recalc_rate = si5324_clkin_recalc_rate, +}; + +static int si5324_pll_reparent(struct si5324_driver_data *drvdata, + int num, enum si5324_pll_src parent) +{ + if (parent == SI5324_PLL_SRC_XTAL) { + si5324_set_bits(drvdata, SI5324_CONTROL, + SI5324_CONTROL_FREE_RUN, + SI5324_CONTROL_FREE_RUN); + si5324_set_bits(drvdata, SI5324_POWERDOWN, + SI5324_PD_CK1 | SI5324_PD_CK2, SI5324_PD_CK1); + si5324_set_bits(drvdata, SI5324_CKSEL, + SI5324_CK_SEL << SI5324_CKSEL_SHIFT, + 1 << SI5324_CKSEL_SHIFT); + } else if (parent == SI5324_PLL_SRC_CLKIN1) { + si5324_set_bits(drvdata, SI5324_CONTROL, + SI5324_CONTROL_FREE_RUN, 0); + si5324_set_bits(drvdata, SI5324_POWERDOWN, + SI5324_PD_CK1 | SI5324_PD_CK2, SI5324_PD_CK2); + si5324_set_bits(drvdata, SI5324_CKSEL, + SI5324_CK_SEL << SI5324_CKSEL_SHIFT, 0); + } else if (parent == SI5324_PLL_SRC_CLKIN2) { + si5324_set_bits(drvdata, SI5324_CONTROL, + SI5324_CONTROL_FREE_RUN, 0); + si5324_set_bits(drvdata, SI5324_POWERDOWN, + SI5324_PD_CK1 | SI5324_PD_CK2, SI5324_PD_CK1); + si5324_set_bits(drvdata, SI5324_CKSEL, + SI5324_CK_SEL << SI5324_CKSEL_SHIFT, + 1 << SI5324_CKSEL_SHIFT); + } + + return 0; +} + +static unsigned char si5324_pll_get_parent(struct clk_hw *hw) +{ + return 0; +} + +/** + * si5324_pll_set_parent - Set parent of clock + * + * @hw: Handle between common and hardware-specific interfaces + * @index: Parent index + * + * This function sets the paraent of clock. + * + * Return: 0 on success, negative error number on failure + */ +static int si5324_pll_set_parent(struct clk_hw *hw, u8 index) +{ + struct si5324_hw_data *hwdata = + container_of(hw, struct si5324_hw_data, hw); + enum si5324_pll_src parent; + + if (index == SI5324_SRC_XTAL) + parent = SI5324_PLL_SRC_XTAL; + else if (index == SI5324_SRC_CLKIN1) + parent = SI5324_PLL_SRC_CLKIN1; + else if (index == SI5324_SRC_CLKIN2) + parent = SI5324_PLL_SRC_CLKIN2; + else + return -EINVAL; + + return si5324_pll_reparent(hwdata->drvdata, hwdata->num, parent); +} + +/** + * si5324_pll_recalc_rate - Recalculate clock frequency + * + * @hw: Handle between common and hardware-specific interfaces + * @parent_rate: Clock frequency of parent clock + * + * This function recalculate clock frequency. + * + * Return: Current clock frequency + */ +static unsigned long si5324_pll_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + unsigned long rate; + struct si5324_hw_data *hwdata = + container_of(hw, struct si5324_hw_data, hw); + + if (!hwdata->drvdata->params.valid) + si5324_read_parameters(hwdata->drvdata); + WARN_ON(!hwdata->drvdata->params.valid); + + rate = parent_rate * hwdata->drvdata->params.n2_ls * + hwdata->drvdata->params.n2_hs; + + dev_dbg(&hwdata->drvdata->client->dev, + "%s - %s: n2_ls = %u, n2_hs = %u, parent_rate = %lu, rate = %lu\n", + __func__, clk_hw_get_name(hw), + hwdata->drvdata->params.n2_ls, hwdata->drvdata->params.n2_hs, + parent_rate, (unsigned long)rate); + + return rate; +} + +static long si5324_pll_round_rate(struct clk_hw *hw, unsigned long rate, + unsigned long *parent_rate) +{ + return rate; +} + +static int si5324_pll_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) +{ + return 0; +} + +static int si5324_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) +{ + struct si5324_hw_data *hwdata = + container_of(hw, struct si5324_hw_data, hw); + + dev_err(&hwdata->drvdata->client->dev, + "%s: Missing implementation\n", clk_hw_get_name(hw)); + + return clk_hw_determine_rate_no_reparent(hw, req); +} + +static const struct clk_ops si5324_pll_ops = { + .set_parent = si5324_pll_set_parent, + .get_parent = si5324_pll_get_parent, + .recalc_rate = si5324_pll_recalc_rate, + .round_rate = si5324_pll_round_rate, + .set_rate = si5324_pll_set_rate, + .determine_rate = si5324_determine_rate, +}; + +static int si5324_clkout_set_drive_strength( + struct si5324_driver_data *drvdata, int num, + enum si5324_drive_strength drive) +{ + return 0; +} + +static int si5324_clkout_prepare(struct clk_hw *hw) +{ + return 0; +} + +static void si5324_clkout_unprepare(struct clk_hw *hw) +{ +} + +static unsigned long si5324_clkout_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + unsigned long rate; + + struct si5324_hw_data *hwdata = + container_of(hw, struct si5324_hw_data, hw); + + rate = hwdata->drvdata->rate_clkout0; + + return rate; +} + +/** + * si5324_clkout_round_rate - selects the closest value to requested one. + * + * @hw: Handle between common and hardware-specific interfaces + * @rate: Clock rate + * @parent_rate: Parent clock rate + * + * This function selects the rate closest to the requested one. + * + * Return: Clock rate on success, negative error number on failure + */ +static long si5324_clkout_round_rate(struct clk_hw *hw, unsigned long rate, + unsigned long *parent_rate) +{ + u32 ncn_ls, n2_ls, n3n, actual_rate; + u8 n1_hs, n2_hs, bwsel; + int ret; + + ret = si5324_calcfreqsettings(SI5324_REF_CLOCK, rate, &actual_rate, + &n1_hs, &ncn_ls, &n2_hs, &n2_ls, &n3n, + &bwsel); + if (ret < 0) + return ret; + + return actual_rate; +} + +static int si5324_clkout_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) +{ + struct si5324_hw_data *hwdata = + container_of(hw, struct si5324_hw_data, hw); + + u32 ncn_ls, n2_ls, n3n, actual_rate; + u8 n1_hs, n2_hs, bwsel, buf[SI5324_OUT_REGS * 2]; + int i, ret, rc; + + ret = si5324_calcfreqsettings(SI5324_REF_CLOCK, rate, &actual_rate, + &n1_hs, &ncn_ls, &n2_hs, &n2_ls, &n3n, + &bwsel); + if (ret < 0) + return ret; + + hwdata->drvdata->rate_clkout0 = rate; + i = 0; + + /* Enable Free running mode */ + buf[i] = SI5324_CONTROL; + buf[i + 1] = SI5324_FREE_RUN_EN; + i += 2; + + /* Loop bandwidth */ + buf[i] = SI5324_BWSEL; + buf[i + 1] = (bwsel << SI5324_BWSEL_SHIFT) | SI5324_BWSEL_DEF_VAL; + i += 2; + + /* Enable reference clock 2 in free running mode */ + buf[i] = SI5324_POWERDOWN; + /* Enable input clock 2, Disable input clock 1 */ + buf[i + 1] = SI5324_PD_CK1_DIS; + i += 2; + + /* N1_HS */ + buf[i] = SI5324_N1_HS; + buf[i + 1] = n1_hs << SI5324_N1_HS_VAL_SHIFT; + i += 2; + + /* NC1_LS */ + buf[i] = SI5324_NC1_LS_H; + buf[i + 1] = (u8)((ncn_ls & 0x000F0000) >> 16); + buf[i + 2] = SI5324_NC1_LS_M; + buf[i + 3] = (u8)((ncn_ls & 0x0000FF00) >> 8); + buf[i + 4] = SI5324_NC1_LS_L; + buf[i + 5] = (u8)(ncn_ls & 0x000000FF); + i += 6; + + /* N2_HS and N2_LS */ + buf[i] = SI5324_N2_HS_LS_H; + buf[i + 1] = (n2_hs << SI5324_N2_HS_LS_H_VAL_SHIFT); + buf[i + 1] |= (u8)((n2_ls & 0x000F0000) >> 16); + buf[i + 2] = SI5324_N2_LS_H; + buf[i + 3] = (u8)((n2_ls & 0x0000FF00) >> 8); + buf[i + 4] = SI5324_N2_LS_L; + buf[i + 5] = (u8)(n2_ls & 0x000000FF); + i += 6; + + /* N32 (CLKIN2 or XTAL in FREERUNNING mode) */ + buf[i] = SI5324_N32_CLKIN_H; + buf[i + 2] = SI5324_N32_CLKIN_M; + buf[i + 4] = SI5324_N32_CLKIN_L; + buf[i + 1] = (u8)((n3n & 0x00070000) >> 16); + buf[i + 3] = (u8)((n3n & 0x0000FF00) >> 8); + buf[i + 5] = (u8)(n3n & 0x000000FF); + i += 6; + + /* Start calibration */ + buf[i] = SI5324_RESET_CALIB; + buf[i + 1] = SI5324_CALIB_EN; + i += 2; + + hwdata->drvdata->params.valid = 0; + rc = si5324_bulk_scatter_write(hwdata->drvdata, SI5324_OUT_REGS, buf); + + return rc; +} + +static const struct clk_ops si5324_clkout_ops = { + .prepare = si5324_clkout_prepare, + .unprepare = si5324_clkout_unprepare, + .recalc_rate = si5324_clkout_recalc_rate, + .round_rate = si5324_clkout_round_rate, + .set_rate = si5324_clkout_set_rate, +}; + +static const struct of_device_id si5324_dt_ids[] = { + { .compatible = "silabs,si5319" }, + { .compatible = "silabs,si5324" }, + { .compatible = "silabs,si5328" }, + { } +}; +MODULE_DEVICE_TABLE(of, si5324_dt_ids); + +static int si5324_dt_parse(struct i2c_client *client) +{ + struct device_node *child, *np = client->dev.of_node; + struct si5324_platform_data *pdata; + u32 array[4]; + int sz, i; + int num = 0; + u32 val; + + if (!np) + return 0; + + pdata = devm_kzalloc(&client->dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return -ENOMEM; + + /* + * property silabs,pll-source : , [<..>] + * allow to selectively set pll source + */ + sz = of_property_read_variable_u32_array(np, "silabs,pll-source", array, 2, 4); + sz = (sz == -EINVAL) ? 0 : sz; /* Missing property is OK */ + if (sz < 0) + return dev_err_probe(&client->dev, sz, "invalid pll-source\n"); + if (sz % 2) + return dev_err_probe(&client->dev, -EINVAL, + "missing pll-source for pll %d\n", array[sz - 1]); + + for (i = 0; i < sz; i += 2) { + num = array[i]; + val = array[i + 1]; + + if (num >= 1) { + dev_err(&client->dev, + "invalid pll %d on pll-source prop\n", num); + return -EINVAL; + } + + switch (val) { + case 0: + dev_dbg(&client->dev, "using xtal as parent for pll\n"); + pdata->pll_src = SI5324_PLL_SRC_XTAL; + break; + case 1: + dev_dbg(&client->dev, + "using clkin1 as parent for pll\n"); + pdata->pll_src = SI5324_PLL_SRC_CLKIN1; + break; + case 2: + dev_dbg(&client->dev, + "using clkin2 as parent for pll\n"); + pdata->pll_src = SI5324_PLL_SRC_CLKIN2; + break; + default: + dev_err(&client->dev, + "invalid parent %d for pll %d\n", val, num); + return -EINVAL; + } + } + /* per clkout properties */ + for_each_child_of_node(np, child) { + if (of_property_read_u32(child, "reg", &num)) { + dev_err(&client->dev, "missing reg property of %s\n", + child->name); + goto put_child; + } + + if (num >= 2) { + dev_err(&client->dev, "invalid clkout %d\n", num); + goto put_child; + } + + if (!of_property_read_u32(child, "silabs,drive-strength", + &val)) { + switch (val) { + case SI5324_DRIVE_2MA: + case SI5324_DRIVE_4MA: + case SI5324_DRIVE_6MA: + case SI5324_DRIVE_8MA: + pdata->clkout[num].drive = val; + break; + default: + dev_err(&client->dev, + "invalid drive strength %d for clkout %d\n", + val, num); + goto put_child; + } + } + + if (!of_property_read_u32(child, "clock-frequency", &val)) { + dev_dbg(&client->dev, "clock-frequency = %u\n", val); + pdata->clkout[num].rate = val; + } else { + dev_err(&client->dev, + "missing clock-frequency property of %s\n", + child->name); + goto put_child; + } + } + client->dev.platform_data = pdata; + + return 0; +put_child: + of_node_put(child); + return -EINVAL; +} + +static u8 instance; + +static const struct i2c_device_id si5324_i2c_ids[] = { + { "si5319", si5319 }, + { "si5324", si5324 }, + { "si5328", si5328 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, si5324_i2c_ids); + +static int si5324_i2c_probe(struct i2c_client *client) +{ + const struct i2c_device_id *id = i2c_match_id(si5324_i2c_ids, client); + struct si5324_platform_data *pdata; + struct si5324_driver_data *drvdata; + struct clk_init_data init; + struct clk *clk; + const char *parent_names[3]; + char inst_names[NUM_NAME_IDS][MAX_NAME_LEN]; + u8 num_parents, num_clocks; + int ret, n; + enum si53xx_variant variant = id->driver_data; + + if (variant > si5328) { + dev_err(&client->dev, "si53xx device not present\n"); + return -ENODEV; + } + + dev_info(&client->dev, "%s probed\n", si53xx_variant_name[variant]); + ret = si5324_dt_parse(client); + if (ret) + return ret; + + pdata = client->dev.platform_data; + if (!pdata) + return -EINVAL; + + drvdata = devm_kzalloc(&client->dev, sizeof(*drvdata), GFP_KERNEL); + if (!drvdata) + return -ENOMEM; + + drvdata->client = client; + drvdata->pxtal = devm_clk_get(&client->dev, "xtal"); + drvdata->pclkin1 = devm_clk_get(&client->dev, "clkin1"); + drvdata->pclkin2 = devm_clk_get(&client->dev, "clkin2"); + + if (PTR_ERR(drvdata->pxtal) == -EPROBE_DEFER || + PTR_ERR(drvdata->pclkin1) == -EPROBE_DEFER || + PTR_ERR(drvdata->pclkin2) == -EPROBE_DEFER) + return -EPROBE_DEFER; + + drvdata->regmap = devm_regmap_init_i2c(client, &si5324_regmap_config); + if (IS_ERR(drvdata->regmap)) { + dev_err(&client->dev, "failed to allocate register map\n"); + return PTR_ERR(drvdata->regmap); + } + + i2c_set_clientdata(client, drvdata); + si5324_initialize(drvdata); + + /* setup input clock configuration */ + ret = si5324_pll_reparent(drvdata, 0, pdata->pll_src); + if (ret) { + dev_err(&client->dev, + "failed to reparent pll to %d\n", + pdata->pll_src); + return ret; + } + + for (n = 0; n < SI5324_MAX_CLKOUTS; n++) { + ret = si5324_clkout_set_drive_strength(drvdata, n, + pdata->clkout[n].drive); + if (ret) { + dev_err(&client->dev, + "failed set drive strength of clkout%d to %d\n", + n, pdata->clkout[n].drive); + return ret; + } + } + + if (!IS_ERR(drvdata->pxtal)) + clk_prepare_enable(drvdata->pxtal); + if (!IS_ERR(drvdata->pclkin1)) + clk_prepare_enable(drvdata->pclkin1); + if (!IS_ERR(drvdata->pclkin2)) + clk_prepare_enable(drvdata->pclkin2); + + /* create instance names by appending instance id */ + for (n = 0; n < SI5324_SRC_CLKS; n++) { + sprintf(inst_names[n], "%s_%d", si5324_input_names[n], + instance); + } + sprintf(inst_names[3], "%s_%d", si5324_pll_name, instance); + for (n = 0; n < SI5324_MAX_CLKOUTS; n++) { + sprintf(inst_names[n + 4], "%s_%d", si5324_clkout_names[n], + instance); + } + + /* register xtal input clock gate */ + memset(&init, 0, sizeof(init)); + init.name = inst_names[0]; + init.ops = &si5324_xtal_ops; + init.flags = 0; + + if (!IS_ERR(drvdata->pxtal)) { + drvdata->pxtal_name = __clk_get_name(drvdata->pxtal); + init.parent_names = &drvdata->pxtal_name; + init.num_parents = 1; + } + drvdata->xtal.init = &init; + + clk = devm_clk_register(&client->dev, &drvdata->xtal); + if (IS_ERR(clk)) { + dev_err(&client->dev, "unable to register %s\n", init.name); + ret = PTR_ERR(clk); + goto err_clk; + } + + /* register clkin1 input clock gate */ + memset(&init, 0, sizeof(init)); + init.name = inst_names[1]; + init.ops = &si5324_clkin_ops; + if (!IS_ERR(drvdata->pclkin1)) { + drvdata->pclkin1_name = __clk_get_name(drvdata->pclkin1); + init.parent_names = &drvdata->pclkin1_name; + init.num_parents = 1; + } + + drvdata->clkin1.init = &init; + clk = devm_clk_register(&client->dev, &drvdata->clkin1); + if (IS_ERR(clk)) { + dev_err(&client->dev, "unable to register %s\n", + init.name); + ret = PTR_ERR(clk); + goto err_clk; + } + + /* register clkin2 input clock gate */ + memset(&init, 0, sizeof(init)); + init.name = inst_names[2]; + init.ops = &si5324_clkin_ops; + if (!IS_ERR(drvdata->pclkin2)) { + drvdata->pclkin2_name = __clk_get_name(drvdata->pclkin2); + init.parent_names = &drvdata->pclkin2_name; + init.num_parents = 1; + } + + drvdata->clkin2.init = &init; + clk = devm_clk_register(&client->dev, &drvdata->clkin2); + if (IS_ERR(clk)) { + dev_err(&client->dev, "unable to register %s\n", + init.name); + ret = PTR_ERR(clk); + goto err_clk; + } + + /* Si5324 allows to mux xtal or clkin1 or clkin2 to PLL input */ + num_parents = SI5324_SRC_CLKS; + parent_names[0] = inst_names[0]; + parent_names[1] = inst_names[1]; + parent_names[2] = inst_names[2]; + + /* register PLL */ + drvdata->pll.drvdata = drvdata; + drvdata->pll.hw.init = &init; + memset(&init, 0, sizeof(init)); + init.name = inst_names[3]; + init.ops = &si5324_pll_ops; + init.flags = 0; + init.flags |= CLK_SET_RATE_PARENT | CLK_GET_RATE_NOCACHE; + init.parent_names = parent_names; + init.num_parents = num_parents; + + clk = devm_clk_register(&client->dev, &drvdata->pll.hw); + if (IS_ERR(clk)) { + dev_err(&client->dev, "unable to register %s\n", init.name); + ret = PTR_ERR(clk); + goto err_clk; + } + + /* register clk out divider */ + num_clocks = 2; + num_parents = 1; + parent_names[0] = inst_names[3]; + + drvdata->clkout = devm_kzalloc(&client->dev, num_clocks * + sizeof(*drvdata->clkout), GFP_KERNEL); + + drvdata->onecell.clk_num = num_clocks; + drvdata->onecell.clks = devm_kzalloc(&client->dev, + num_clocks * + sizeof(*drvdata->onecell.clks), + GFP_KERNEL); + + if (WARN_ON(!drvdata->clkout) || !drvdata->onecell.clks) { + ret = -ENOMEM; + goto err_clk; + } + + for (n = 0; n < num_clocks; n++) { + drvdata->clkout[n].num = n; + drvdata->clkout[n].drvdata = drvdata; + drvdata->clkout[n].hw.init = &init; + memset(&init, 0, sizeof(init)); + init.name = inst_names[4 + n]; + init.ops = &si5324_clkout_ops; + init.flags = 0; + init.flags |= CLK_SET_RATE_PARENT; + init.parent_names = parent_names; + init.num_parents = num_parents; + + clk = devm_clk_register(&client->dev, &drvdata->clkout[n].hw); + if (IS_ERR(clk)) { + dev_err(&client->dev, "unable to register %s\n", + init.name); + ret = PTR_ERR(clk); + goto err_clk; + } + /* refer to output clock in onecell */ + drvdata->onecell.clks[n] = clk; + + /* set initial clkout rate */ + if (pdata->clkout[n].rate != 0) { + int ret; + + ret = clk_set_rate(clk, pdata->clkout[n].rate); + if (ret != 0) { + dev_err(&client->dev, "Cannot set rate : %d\n", + ret); + } + } + } + + ret = of_clk_add_provider(client->dev.of_node, of_clk_src_onecell_get, + &drvdata->onecell); + if (ret) { + dev_err(&client->dev, "unable to add clk provider\n"); + goto err_clk; + } + + dev_info(&client->dev, "%s probe successful\n", + si53xx_variant_name[variant]); + instance++; + return 0; + +err_clk: + if (!IS_ERR(drvdata->pxtal)) + clk_disable_unprepare(drvdata->pxtal); + if (!IS_ERR(drvdata->pclkin1)) + clk_disable_unprepare(drvdata->pclkin1); + if (!IS_ERR(drvdata->pclkin2)) + clk_disable_unprepare(drvdata->pclkin2); + + return ret; +} + +static void si5324_i2c_remove(struct i2c_client *client) +{ + of_clk_del_provider(client->dev.of_node); +} + +static struct i2c_driver si5324_driver = { + .driver = { + .name = "si5324", + .of_match_table = of_match_ptr(si5324_dt_ids), + }, + .probe = si5324_i2c_probe, + .remove = si5324_i2c_remove, + .id_table = si5324_i2c_ids, +}; +module_i2c_driver(si5324_driver); + +MODULE_AUTHOR("Venkateshwar Rao G "); +MODULE_DESCRIPTION("Silicon Labs 5319/5324/5328 clock driver"); +MODULE_LICENSE("GPL"); --- linux-xilinx-6.8.0.orig/drivers/clk/clk-si5324.h +++ linux-xilinx-6.8.0/drivers/clk/clk-si5324.h @@ -0,0 +1,140 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Si5324 clock driver + * + * Copyright (C) 2017-2018 Xilinx, Inc. + * + * Authors: Leon Woestenberg + * Venkateshwar Rao + */ + +#ifndef _CLK_SI5324_H_ +#define _CLK_SI5324_H_ + +#define SI5324_BUS_BASE_ADDR 0x68 + +#define SI5324_CONTROL 0 +#define SI5324_CONTROL_FREE_RUN BIT(6) +#define SI5324_FREE_RUN_EN 0x54 + +#define SI5324_INCK_PRIOR 1 +#define SI5324_INCK_PRIOR_1_MASK 0xC +#define SI5324_INCK_PRIOI_2_MASK 0x3 + +#define SI5324_BWSEL 2 +#define SI5324_BWSEL_MASK 0xF0 +#define SI5324_BWSEL_SHIFT 4 +#define SI5324_BWSEL_DEF_VAL 2 + +#define SI5324_CKSEL 3 +#define SI5324_CKSEL_SQL_ICAL BIT(4) +#define SI5324_CKSEL_SHIFT 6 +#define SI5324_CK_SEL 3 + +#define SI3324_AUTOSEL 4 +#define SI5324_AUTOSEL_DEF 0x12 + +#define SI5324_ICMOS 5 +#define SI5324_OUTPUT_SIGFMT 6 +#define SI5324_OUTPUT_SF1_DEFAULT 0xF +#define SI5324_REFFRE_FOS 7 +#define SI5324_HLOG 8 +#define SI5324_AVG_HIST 9 +#define SI5324_DSBL_CLKOUT 10 +#define SI5324_DSBL_CLKOUT2 BIT(3) +#define SI5324_POWERDOWN 11 +#define SI5324_PD_CK1 BIT(0) +#define SI5324_PD_CK2 BIT(1) +#define SI5324_PD_CK1_DIS 0x41 +#define SI5324_PD_CK2_DIS 0x42 +#define SI5324_FOS_LOCKT 19 +#define SI5324_FOS_DEFAULT 0x23 +#define SI5324_CK_ACTV_SEL 21 +#define SI5324_CK_DEFAULT 0xFC +#define SI5324_CK_ACTV BIT(1) +#define SI5324_CK_SELPIN BIT(1) +#define SI5324_LOS_MSK 23 +#define SI5324_FOS_L0L_MASK 24 + +/* output clock dividers */ +#define SI5324_N1_HS 25 +#define SI5324_N1_HS_VAL_SHIFT 5 +#define SI5324_HSHIFT 16 +#define SI5324_LSHIFT 8 +#define SI5324_NC1_LS_H 31 +#define SI5324_NC1_LS_M 32 +#define SI5324_NC1_LS_L 33 +#define SI5324_DIV_LS_MASK 0x0F +#define SI5324_DIV_HS_MASK 0xF0 +#define SI5324_NC2_LS_H 34 +#define SI5324_NC2_LS_M 35 +#define SI5324_NC2_LS_L 36 + +#define SI5324_N2_HS_LS_H 40 +#define SI5324_N2_HS_LS_H_VAL_SHIFT 5 +#define SI5324_N2_LS_H 41 +#define SI5324_N2_LS_L 42 +#define SI5324_N31_CLKIN_H 43 +#define SI5324_N31_CLKIN_M 44 +#define SI5324_N31_CLKIN_L 45 +#define SI5324_N32_CLKIN_H 46 +#define SI5324_N32_CLKIN_M 47 +#define SI5324_N32_CLKIN_L 48 +#define SI5324_FOS_CLKIN_RATE 55 +#define SI5324_PLL_ACTV_CLK 128 +#define SI5324_LOS_STATUS 129 +#define SI5324_CLKIN_LOL_STATUS 130 +#define SI5324_LOS_FLG 131 +#define SI5324_FOS_FLG 132 +#define SI5324_PARTNO_H 134 +#define SI5324_PARTNO_L 135 + +#define SI5324_RESET_CALIB 136 +#define SI5324_RST_ALL BIT(7) +#define SI5324_CALIB_EN BIT(6) + +#define SI5324_FASTLOCK 137 +#define SI5324_FASTLOCK_EN BIT(0) +#define SI5324_LOS1_LOS2_EN 138 +#define SI5324_SKEW1 142 +#define SI5324_SKEW2 143 + +/* selects 2kHz to 710 MHz */ +#define SI5324_CLKIN_MIN_FREQ 2000 +#define SI5324_CLKIN_MAX_FREQ (710 * 1000 * 1000) + +/* generates 2kHz to 945 MHz */ +#define SI5324_CLKOUT_MIN_FREQ 2000 +#define SI5324_CLKOUT_MAX_FREQ (945 * 1000 * 1000) + +/* The following constants define the limits of the divider settings. */ +#define SI5324_N1_HS_MIN 6 +#define SI5324_N1_HS_MAX 11 +#define SI5324_NC_LS_MIN 1 +#define SI5324_NC_LS_MAX 0x100000 +#define SI5324_N2_HS_MIN 4 +#define SI5324_N2_HS_MAX 11 +#define SI5324_N2_LS_MIN 2 +#define SI5324_N2_LS_MAX 0x100000 +#define SI5324_N3_MIN 1 +#define SI5324_N3_MAX 0x080000 + +#define SI5324_SRC_XTAL 0 +#define SI5324_SRC_CLKIN1 1 +#define SI5324_SRC_CLKIN2 2 +#define SI5324_SRC_CLKS 3 + +#define SI5324_CLKIN1 0 +#define SI5324_CLKIN2 1 +#define SI5324_MAX_CLKOUTS 2 +#define NUM_NAME_IDS 6 /* 3 clkin, 1 pll, 2 clkout */ +#define MAX_NAME_LEN 11 +#define SI5324_PARAM_LEN 24 +#define SI5324_NC_PARAM_LEN 6 +#define SI5324_OUT_REGS 14 +#define SI5324_N1_PARAM_LEN 1 +#define SI5324_N2_PARAM_LEN 9 +#define SI5324_REF_CLOCK 114285000UL +#define SI5324_RESET_DELAY_MS 20 + +#endif --- linux-xilinx-6.8.0.orig/drivers/clk/clk-si5351.c +++ linux-xilinx-6.8.0/drivers/clk/clk-si5351.c @@ -1175,8 +1175,8 @@ { struct device_node *child, *np = client->dev.of_node; struct si5351_platform_data *pdata; - struct property *prop; - const __be32 *p; + u32 array[4]; + int sz, i; int num = 0; u32 val; @@ -1191,20 +1191,24 @@ * property silabs,pll-source : , [<..>] * allow to selectively set pll source */ - of_property_for_each_u32(np, "silabs,pll-source", prop, p, num) { + sz = of_property_read_variable_u32_array(np, "silabs,pll-source", array, 2, 4); + sz = (sz == -EINVAL) ? 0 : sz; /* Missing property is OK */ + if (sz < 0) + return dev_err_probe(&client->dev, sz, "invalid pll-source\n"); + if (sz % 2) + return dev_err_probe(&client->dev, -EINVAL, + "missing pll-source for pll %d\n", array[sz - 1]); + + for (i = 0; i < sz; i += 2) { + num = array[i]; + val = array[i + 1]; + if (num >= 2) { dev_err(&client->dev, "invalid pll %d on pll-source prop\n", num); return -EINVAL; } - p = of_prop_next_u32(prop, p, &val); - if (!p) { - dev_err(&client->dev, - "missing pll-source for pll %d\n", num); - return -EINVAL; - } - switch (val) { case 0: pdata->pll_src[num] = SI5351_PLL_SRC_XTAL; @@ -1232,19 +1236,24 @@ pdata->pll_reset[0] = true; pdata->pll_reset[1] = true; - of_property_for_each_u32(np, "silabs,pll-reset-mode", prop, p, num) { + sz = of_property_read_variable_u32_array(np, "silabs,pll-reset-mode", array, 2, 4); + sz = (sz == -EINVAL) ? 0 : sz; /* Missing property is OK */ + if (sz < 0) + return dev_err_probe(&client->dev, sz, "invalid pll-reset-mode\n"); + if (sz % 2) + return dev_err_probe(&client->dev, -EINVAL, + "missing pll-reset-mode for pll %d\n", array[sz - 1]); + + for (i = 0; i < sz; i += 2) { + num = array[i]; + val = array[i + 1]; + if (num >= 2) { dev_err(&client->dev, "invalid pll %d on pll-reset-mode prop\n", num); return -EINVAL; } - p = of_prop_next_u32(prop, p, &val); - if (!p) { - dev_err(&client->dev, - "missing pll-reset-mode for pll %d\n", num); - return -EINVAL; - } switch (val) { case 0: --- linux-xilinx-6.8.0.orig/drivers/clk/clk.c +++ linux-xilinx-6.8.0/drivers/clk/clk.c @@ -37,6 +37,10 @@ static HLIST_HEAD(clk_orphan_list); static LIST_HEAD(clk_notifier_list); +/* List of registered clks that use runtime PM */ +static HLIST_HEAD(clk_rpm_list); +static DEFINE_MUTEX(clk_rpm_list_lock); + static const struct hlist_head *all_lists[] = { &clk_root_list, &clk_orphan_list, @@ -59,6 +63,7 @@ struct clk_hw *hw; struct module *owner; struct device *dev; + struct hlist_node rpm_node; struct device_node *of_node; struct clk_core *parent; struct clk_parent_map *parents; @@ -122,6 +127,89 @@ pm_runtime_put_sync(core->dev); } +/** + * clk_pm_runtime_get_all() - Runtime "get" all clk provider devices + * + * Call clk_pm_runtime_get() on all runtime PM enabled clks in the clk tree so + * that disabling unused clks avoids a deadlock where a device is runtime PM + * resuming/suspending and the runtime PM callback is trying to grab the + * prepare_lock for something like clk_prepare_enable() while + * clk_disable_unused_subtree() holds the prepare_lock and is trying to runtime + * PM resume/suspend the device as well. + * + * Context: Acquires the 'clk_rpm_list_lock' and returns with the lock held on + * success. Otherwise the lock is released on failure. + * + * Return: 0 on success, negative errno otherwise. + */ +static int clk_pm_runtime_get_all(void) +{ + int ret; + struct clk_core *core, *failed; + + /* + * Grab the list lock to prevent any new clks from being registered + * or unregistered until clk_pm_runtime_put_all(). + */ + mutex_lock(&clk_rpm_list_lock); + + /* + * Runtime PM "get" all the devices that are needed for the clks + * currently registered. Do this without holding the prepare_lock, to + * avoid the deadlock. + */ + hlist_for_each_entry(core, &clk_rpm_list, rpm_node) { + ret = clk_pm_runtime_get(core); + if (ret) { + failed = core; + pr_err("clk: Failed to runtime PM get '%s' for clk '%s'\n", + dev_name(failed->dev), failed->name); + goto err; + } + } + + return 0; + +err: + hlist_for_each_entry(core, &clk_rpm_list, rpm_node) { + if (core == failed) + break; + + clk_pm_runtime_put(core); + } + mutex_unlock(&clk_rpm_list_lock); + + return ret; +} + +/** + * clk_pm_runtime_put_all() - Runtime "put" all clk provider devices + * + * Put the runtime PM references taken in clk_pm_runtime_get_all() and release + * the 'clk_rpm_list_lock'. + */ +static void clk_pm_runtime_put_all(void) +{ + struct clk_core *core; + + hlist_for_each_entry(core, &clk_rpm_list, rpm_node) + clk_pm_runtime_put(core); + mutex_unlock(&clk_rpm_list_lock); +} + +static void clk_pm_runtime_init(struct clk_core *core) +{ + struct device *dev = core->dev; + + if (dev && pm_runtime_enabled(dev)) { + core->rpm_enabled = true; + + mutex_lock(&clk_rpm_list_lock); + hlist_add_head(&core->rpm_node, &clk_rpm_list); + mutex_unlock(&clk_rpm_list_lock); + } +} + /*** locking ***/ static void clk_prepare_lock(void) { @@ -418,6 +506,9 @@ if (IS_ERR(hw)) return ERR_CAST(hw); + if (!hw) + return NULL; + return hw->core; } @@ -939,6 +1030,25 @@ } EXPORT_SYMBOL_GPL(clk_rate_exclusive_get); +static void devm_clk_rate_exclusive_put(void *data) +{ + struct clk *clk = data; + + clk_rate_exclusive_put(clk); +} + +int devm_clk_rate_exclusive_get(struct device *dev, struct clk *clk) +{ + int ret; + + ret = clk_rate_exclusive_get(clk); + if (ret) + return ret; + + return devm_add_action_or_reset(dev, devm_clk_rate_exclusive_put, clk); +} +EXPORT_SYMBOL_GPL(devm_clk_rate_exclusive_get); + static void clk_core_unprepare(struct clk_core *core) { lockdep_assert_held(&prepare_lock); @@ -1359,9 +1469,6 @@ if (core->flags & CLK_IGNORE_UNUSED) return; - if (clk_pm_runtime_get(core)) - return; - if (clk_core_is_prepared(core)) { trace_clk_unprepare(core); if (core->ops->unprepare_unused) @@ -1370,8 +1477,6 @@ core->ops->unprepare(core->hw); trace_clk_unprepare_complete(core); } - - clk_pm_runtime_put(core); } static void __init clk_disable_unused_subtree(struct clk_core *core) @@ -1387,9 +1492,6 @@ if (core->flags & CLK_OPS_PARENT_ENABLE) clk_core_prepare_enable(core->parent); - if (clk_pm_runtime_get(core)) - goto unprepare_out; - flags = clk_enable_lock(); if (core->enable_count) @@ -1414,8 +1516,6 @@ unlock_out: clk_enable_unlock(flags); - clk_pm_runtime_put(core); -unprepare_out: if (core->flags & CLK_OPS_PARENT_ENABLE) clk_core_disable_unprepare(core->parent); } @@ -1431,6 +1531,7 @@ static int __init clk_disable_unused(void) { struct clk_core *core; + int ret; if (clk_ignore_unused) { pr_warn("clk: Not disabling unused clocks\n"); @@ -1439,6 +1540,13 @@ pr_info("clk: Disabling unused clocks\n"); + ret = clk_pm_runtime_get_all(); + if (ret) + return ret; + /* + * Grab the prepare lock to keep the clk topology stable while iterating + * over clks. + */ clk_prepare_lock(); hlist_for_each_entry(core, &clk_root_list, child_node) @@ -1455,6 +1563,8 @@ clk_prepare_unlock(); + clk_pm_runtime_put_all(); + return 0; } late_initcall_sync(clk_disable_unused); @@ -3230,9 +3340,7 @@ { struct clk_core *child; - clk_pm_runtime_get(c); clk_summary_show_one(s, c, level); - clk_pm_runtime_put(c); hlist_for_each_entry(child, &c->children, child_node) clk_summary_show_subtree(s, child, level + 1); @@ -3242,11 +3350,15 @@ { struct clk_core *c; struct hlist_head **lists = s->private; + int ret; seq_puts(s, " enable prepare protect duty hardware connection\n"); seq_puts(s, " clock count count count rate accuracy phase cycle enable consumer id\n"); seq_puts(s, "---------------------------------------------------------------------------------------------------------------------------------------------\n"); + ret = clk_pm_runtime_get_all(); + if (ret) + return ret; clk_prepare_lock(); @@ -3255,6 +3367,7 @@ clk_summary_show_subtree(s, c, 0); clk_prepare_unlock(); + clk_pm_runtime_put_all(); return 0; } @@ -3302,8 +3415,14 @@ struct clk_core *c; bool first_node = true; struct hlist_head **lists = s->private; + int ret; + + ret = clk_pm_runtime_get_all(); + if (ret) + return ret; seq_putc(s, '{'); + clk_prepare_lock(); for (; *lists; lists++) { @@ -3316,6 +3435,7 @@ } clk_prepare_unlock(); + clk_pm_runtime_put_all(); seq_puts(s, "}\n"); return 0; @@ -3959,8 +4079,6 @@ } clk_core_reparent_orphans_nolock(); - - kref_init(&core->ref); out: clk_pm_runtime_put(core); unlock: @@ -4189,6 +4307,22 @@ kfree(core->parents); } +/* Free memory allocated for a struct clk_core */ +static void __clk_release(struct kref *ref) +{ + struct clk_core *core = container_of(ref, struct clk_core, ref); + + if (core->rpm_enabled) { + mutex_lock(&clk_rpm_list_lock); + hlist_del(&core->rpm_node); + mutex_unlock(&clk_rpm_list_lock); + } + + clk_core_free_parent_map(core); + kfree_const(core->name); + kfree(core); +} + static struct clk * __clk_register(struct device *dev, struct device_node *np, struct clk_hw *hw) { @@ -4209,6 +4343,8 @@ goto fail_out; } + kref_init(&core->ref); + core->name = kstrdup_const(init->name, GFP_KERNEL); if (!core->name) { ret = -ENOMEM; @@ -4221,9 +4357,8 @@ } core->ops = init->ops; - if (dev && pm_runtime_enabled(dev)) - core->rpm_enabled = true; core->dev = dev; + clk_pm_runtime_init(core); core->of_node = np; if (dev && dev->driver) core->owner = dev->driver->owner; @@ -4263,12 +4398,10 @@ hw->clk = NULL; fail_create_clk: - clk_core_free_parent_map(core); fail_parents: fail_ops: - kfree_const(core->name); fail_name: - kfree(core); + kref_put(&core->ref, __clk_release); fail_out: return ERR_PTR(ret); } @@ -4348,18 +4481,6 @@ } EXPORT_SYMBOL_GPL(of_clk_hw_register); -/* Free memory allocated for a clock. */ -static void __clk_release(struct kref *ref) -{ - struct clk_core *core = container_of(ref, struct clk_core, ref); - - lockdep_assert_held(&prepare_lock); - - clk_core_free_parent_map(core); - kfree_const(core->name); - kfree(core); -} - /* * Empty clk_ops for unregistered clocks. These are used temporarily * after clk_unregister() was called on a clock and until last clock @@ -4450,7 +4571,8 @@ if (ops == &clk_nodrv_ops) { pr_err("%s: unregistered clock: %s\n", __func__, clk->core->name); - goto unlock; + clk_prepare_unlock(); + return; } /* * Assign empty clock ops for consumers that might still hold @@ -4484,11 +4606,10 @@ if (clk->core->protect_count) pr_warn("%s: unregistering protected clock: %s\n", __func__, clk->core->name); + clk_prepare_unlock(); kref_put(&clk->core->ref, __clk_release); free_clk(clk); -unlock: - clk_prepare_unlock(); } EXPORT_SYMBOL_GPL(clk_unregister); @@ -4647,13 +4768,11 @@ if (clk->min_rate > 0 || clk->max_rate < ULONG_MAX) clk_set_rate_range_nolock(clk, 0, ULONG_MAX); - owner = clk->core->owner; - kref_put(&clk->core->ref, __clk_release); - clk_prepare_unlock(); + owner = clk->core->owner; + kref_put(&clk->core->ref, __clk_release); module_put(owner); - free_clk(clk); } @@ -5245,9 +5364,8 @@ const char *of_clk_get_parent_name(const struct device_node *np, int index) { struct of_phandle_args clkspec; - struct property *prop; const char *clk_name; - const __be32 *vp; + bool found = false; u32 pv; int rc; int count; @@ -5264,16 +5382,19 @@ /* if there is an indices property, use it to transfer the index * specified into an array offset for the clock-output-names property. */ - of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) { + of_property_for_each_u32(clkspec.np, "clock-indices", pv) { if (index == pv) { index = count; + found = true; break; } count++; } /* We went off the end of 'clock-indices' without finding it */ - if (prop && !vp) + if (of_property_present(clkspec.np, "clock-indices") && !found) { + of_node_put(clkspec.np); return NULL; + } if (of_property_read_string_index(clkspec.np, "clock-output-names", index, @@ -5385,14 +5506,12 @@ int of_clk_detect_critical(struct device_node *np, int index, unsigned long *flags) { - struct property *prop; - const __be32 *cur; uint32_t idx; if (!np || !flags) return -EINVAL; - of_property_for_each_u32(np, "clock-critical", prop, cur, idx) + of_property_for_each_u32(np, "clock-critical", idx) if (index == idx) *flags |= CLK_IS_CRITICAL; --- linux-xilinx-6.8.0.orig/drivers/clk/clkdev.c +++ linux-xilinx-6.8.0/drivers/clk/clkdev.c @@ -144,7 +144,7 @@ mutex_unlock(&clocks_mutex); } -#define MAX_DEV_ID 20 +#define MAX_DEV_ID 24 #define MAX_CON_ID 16 struct clk_lookup_alloc { --- linux-xilinx-6.8.0.orig/drivers/clk/davinci/da8xx-cfgchip.c +++ linux-xilinx-6.8.0/drivers/clk/davinci/da8xx-cfgchip.c @@ -508,7 +508,7 @@ const char * const parent_names[] = { "usb_refclkin", "pll0_auxclk" }; struct clk *fck_clk; struct da8xx_usb0_clk48 *usb0; - struct clk_init_data init; + struct clk_init_data init = {}; int ret; fck_clk = devm_clk_get(dev, "fck"); @@ -583,7 +583,7 @@ { const char * const parent_names[] = { "usb0_clk48", "usb_refclkin" }; struct da8xx_usb1_clk48 *usb1; - struct clk_init_data init; + struct clk_init_data init = {}; int ret; usb1 = devm_kzalloc(dev, sizeof(*usb1), GFP_KERNEL); --- linux-xilinx-6.8.0.orig/drivers/clk/hisilicon/clk-hi3519.c +++ linux-xilinx-6.8.0/drivers/clk/hisilicon/clk-hi3519.c @@ -130,7 +130,7 @@ of_clk_del_provider(pdev->dev.of_node); hisi_clk_unregister_gate(hi3519_gate_clks, - ARRAY_SIZE(hi3519_mux_clks), + ARRAY_SIZE(hi3519_gate_clks), crg->clk_data); hisi_clk_unregister_mux(hi3519_mux_clks, ARRAY_SIZE(hi3519_mux_clks), --- linux-xilinx-6.8.0.orig/drivers/clk/hisilicon/clk-hi3559a.c +++ linux-xilinx-6.8.0/drivers/clk/hisilicon/clk-hi3559a.c @@ -491,7 +491,6 @@ clk = clk_register(NULL, &p_clk->hw); if (IS_ERR(clk)) { - devm_kfree(dev, p_clk); dev_err(dev, "%s: failed to register clock %s\n", __func__, clks[i].name); continue; --- linux-xilinx-6.8.0.orig/drivers/clk/idt/Makefile +++ linux-xilinx-6.8.0/drivers/clk/idt/Makefile @@ -0,0 +1,3 @@ +obj-y += clk-idt8t49n24x-core.o +obj-y += clk-idt8t49n24x-debugfs.o +obj-y += clk-idt8t49n24x.o --- linux-xilinx-6.8.0.orig/drivers/clk/idt/clk-idt8t49n24x-core.c +++ linux-xilinx-6.8.0/drivers/clk/idt/clk-idt8t49n24x-core.c @@ -0,0 +1,933 @@ +// SPDX-License-Identifier: GPL-2.0 +/* clk-idt8t49n24x-core.c - Program 8T49N24x settings via I2C (common code) + * + * Copyright (C) 2018, Integrated Device Technology, Inc. + * + * See https://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html + * This program is distributed "AS IS" and WITHOUT ANY WARRANTY; + * including the implied warranties of MERCHANTABILITY, FITNESS FOR + * A PARTICULAR PURPOSE, or NON-INFRINGEMENT. + */ + +#include +#include + +#include "clk-idt8t49n24x-core.h" + +/* + * In Timing Commander, Q0 is changed from 25MHz to Q0 75MHz, the following + * changes occur: + * + * 2 bytes change in EEPROM data string. + * + * DSM_INT R0025[0],R0026[7:0] : 35 => 30 + * NS2_Q0 R0040[7:0],R0041[7:0] : 14 => 4 + * + * In EEPROM + * 1. R0026 + * 2. R0041 + * + * Note that VCO_Frequency (metadata) also changed (3500 =>3000). + * This reflects a change to DSM_INT. + * + * Note that the Timing Commander code has workarounds in the workflow scripts + * to handle dividers for the 8T49N241 (because the development of that GUI + * predates chip override functionality). That affects NS1_Qx (x in 1-3) + * and NS2_Qx. NS1_Qx contains the upper bits of NS_Qx, and NS2_Qx contains + * the lower bits. That is NOT the case for Q0, though. In that case NS1_Q0 + * is the 1st stage output divider (/5, /6, /4) and NS2_Q0 is the 16-bit + * second stage (with actual divide being twice the value stored in the + * register). + * + * NS1_Q0 R003F[1:0] + */ + +#define IDT24x_VCO_MIN 2999997000u +#define IDT24x_VCO_MAX 4000004000u +#define IDT24x_VCO_OPT 3500000000u +#define IDT24x_MIN_INT_DIVIDER 6 +#define IDT24x_MIN_NS1 4 +#define IDT24x_MAX_NS1 6 + +static u8 q0_ns1_options[3] = { 5, 6, 4 }; + +/** + * bits_to_shift - num bits to shift given specified mask + * @mask: 32-bit word input to count zero bits on right + * + * Given a bit mask indicating where a value will be stored in + * a register, return the number of bits you need to shift the value + * before ORing it into the register value. + * + * Return: number of bits to shift + */ +int bits_to_shift(unsigned int mask) +{ + /* the number of zero bits on the right */ + unsigned int c = 32; + + mask &= ~mask + 1; + if (mask) + c--; + if (mask & 0x0000FFFF) + c -= 16; + if (mask & 0x00FF00FF) + c -= 8; + if (mask & 0x0F0F0F0F) + c -= 4; + if (mask & 0x33333333) + c -= 2; + if (mask & 0x55555555) + c -= 1; + return c; +} + +/* + * TODO: Consider replacing this with regmap_multi_reg_write, which + * supports introducing a delay after each write. Experiment to see if + * the writes succeed consistently when using that API. + */ +static int regmap_bulk_write_with_retry( + struct regmap *map, unsigned int offset, u8 val[], + int val_count, int max_attempts) +{ + int err = 0; + int count = 1; + + do { + err = regmap_bulk_write(map, offset, val, val_count); + if (err == 0) + return 0; + + usleep_range(100, 200); + } while (count++ <= max_attempts); + return err; +} + +static int regmap_write_with_retry( + struct regmap *map, unsigned int offset, unsigned int val, + int max_attempts) +{ + int err = 0; + int count = 1; + + do { + err = regmap_write(map, offset, val); + if (err == 0) + return 0; + usleep_range(100, 200); + } while (count++ <= max_attempts); + return err; +} + +/* + * TODO: Consider using regmap_multi_reg_write instead. Explore + * use of regmap to configure WRITE_BLOCK_SIZE, and using the delay + * mechanism in regmap_multi_reg_write instead of retrying multiple + * times (regmap_bulk_write_with_retry). + */ +int i2cwritebulk( + struct i2c_client *client, struct regmap *map, + unsigned int reg, u8 val[], size_t val_count) +{ + char dbg[128]; + u8 block[WRITE_BLOCK_SIZE]; + unsigned int block_offset = reg; + int x; + int err = 0; + int currentOffset = 0; + + dev_dbg(&client->dev, "I2C->0x%04x : [hex] . First byte: %02x, Second byte: %02x", + reg, reg >> 8, reg & 0xFF); + dbg[0] = 0; + + for (x = 0; x < val_count; x++) { + char data[4]; + + block[currentOffset++] = val[x]; + sprintf(data, "%02x ", val[x]); + strcat(dbg, data); + if (x > 0 && (x + 1) % WRITE_BLOCK_SIZE == 0) { + dev_dbg(&client->dev, "%s", dbg); + dbg[0] = '\0'; + sprintf(dbg, + "(loop) calling regmap_bulk_write @ 0x%04x [%d bytes]", + block_offset, WRITE_BLOCK_SIZE); + dev_dbg(&client->dev, "%s", dbg); + dbg[0] = '\0'; + err = regmap_bulk_write_with_retry( + map, block_offset, block, WRITE_BLOCK_SIZE, 5); + if (err != 0) + break; + block_offset += WRITE_BLOCK_SIZE; + currentOffset = 0; + } + } + if (err == 0 && currentOffset > 0) { + dev_dbg(&client->dev, "%s", dbg); + dev_dbg(&client->dev, "(final) calling regmap_bulk_write @ 0x%04x [%d bytes]", + block_offset, currentOffset); + err = regmap_bulk_write_with_retry( + map, block_offset, block, currentOffset, 5); + } + + return err; +} + +static int i2cwrite( + struct i2c_client *client, struct regmap *map, + unsigned int reg, unsigned int val) +{ + int err; + + dev_dbg(&client->dev, "I2C->0x%x : [hex] %x", reg, val); + err = regmap_write_with_retry(map, reg, val, 5); + usleep_range(100, 200); + return err; +} + +static int i2cwritewithmask( + struct i2c_client *client, struct regmap *map, unsigned int reg, + u8 val, u8 original, u8 mask) +{ + return i2cwrite(client, map, reg, + ((val << bits_to_shift(mask)) & mask) | (original & ~mask)); +} + +int idt24x_get_offsets( + u8 output_num, + struct clk_register_offsets *offsets) +{ + switch (output_num) { + case 0: + offsets->oe_offset = IDT24x_REG_OUTEN; + offsets->oe_mask = IDT24x_REG_OUTEN0_MASK; + offsets->dis_mask = IDT24x_REG_Q0_DIS_MASK; + offsets->ns1_offset = IDT24x_REG_NS1_Q0; + offsets->ns1_offset_mask = IDT24x_REG_NS1_Q0_MASK; + offsets->ns2_15_8_offset = IDT24x_REG_NS2_Q0_15_8; + offsets->ns2_7_0_offset = IDT24x_REG_NS2_Q0_7_0; + break; + case 1: + offsets->oe_offset = IDT24x_REG_OUTEN; + offsets->oe_mask = IDT24x_REG_OUTEN1_MASK; + offsets->dis_mask = IDT24x_REG_Q1_DIS_MASK; + offsets->n_17_16_offset = IDT24x_REG_N_Q1_17_16; + offsets->n_17_16_mask = IDT24x_REG_N_Q1_17_16_MASK; + offsets->n_15_8_offset = IDT24x_REG_N_Q1_15_8; + offsets->n_7_0_offset = IDT24x_REG_N_Q1_7_0; + offsets->nfrac_27_24_offset = IDT24x_REG_NFRAC_Q1_27_24; + offsets->nfrac_27_24_mask = + IDT24x_REG_NFRAC_Q1_27_24_MASK; + offsets->nfrac_23_16_offset = IDT24x_REG_NFRAC_Q1_23_16; + offsets->nfrac_15_8_offset = IDT24x_REG_NFRAC_Q1_15_8; + offsets->nfrac_7_0_offset = IDT24x_REG_NFRAC_Q1_7_0; + break; + case 2: + offsets->oe_offset = IDT24x_REG_OUTEN; + offsets->oe_mask = IDT24x_REG_OUTEN2_MASK; + offsets->dis_mask = IDT24x_REG_Q2_DIS_MASK; + offsets->n_17_16_offset = IDT24x_REG_N_Q2_17_16; + offsets->n_17_16_mask = IDT24x_REG_N_Q2_17_16_MASK; + offsets->n_15_8_offset = IDT24x_REG_N_Q2_15_8; + offsets->n_7_0_offset = IDT24x_REG_N_Q2_7_0; + offsets->nfrac_27_24_offset = IDT24x_REG_NFRAC_Q2_27_24; + offsets->nfrac_27_24_mask = + IDT24x_REG_NFRAC_Q2_27_24_MASK; + offsets->nfrac_23_16_offset = IDT24x_REG_NFRAC_Q2_23_16; + offsets->nfrac_15_8_offset = IDT24x_REG_NFRAC_Q2_15_8; + offsets->nfrac_7_0_offset = IDT24x_REG_NFRAC_Q2_7_0; + break; + case 3: + offsets->oe_offset = IDT24x_REG_OUTEN; + offsets->oe_mask = IDT24x_REG_OUTEN3_MASK; + offsets->dis_mask = IDT24x_REG_Q3_DIS_MASK; + offsets->n_17_16_offset = IDT24x_REG_N_Q3_17_16; + offsets->n_17_16_mask = IDT24x_REG_N_Q3_17_16_MASK; + offsets->n_15_8_offset = IDT24x_REG_N_Q3_15_8; + offsets->n_7_0_offset = IDT24x_REG_N_Q3_7_0; + offsets->nfrac_27_24_offset = IDT24x_REG_NFRAC_Q3_27_24; + offsets->nfrac_27_24_mask = + IDT24x_REG_NFRAC_Q3_27_24_MASK; + offsets->nfrac_23_16_offset = IDT24x_REG_NFRAC_Q3_23_16; + offsets->nfrac_15_8_offset = IDT24x_REG_NFRAC_Q3_15_8; + offsets->nfrac_7_0_offset = IDT24x_REG_NFRAC_Q3_7_0; + break; + default: + return -EINVAL; + } + return 0; +} + +/** + * idt24x_calc_div_q0 - Calculate dividers and VCO freq to generate + * the specified Q0 frequency. + * @chip: Device data structure. contains all requested frequencies + * for all outputs. + * + * The actual output divider is ns1 * ns2 * 2. fOutput = fVCO / (ns1 * ns2 * 2) + * + * The options for ns1 (when the source is the VCO) are 4,5,6. ns2 is a + * 16-bit value. + * + * chip->divs: structure for specifying ns1/ns2 values. If 0 after this + * function, Q0 is not requested + * + * Return: 0 on success, negative errno otherwise. + */ +static int idt24x_calc_div_q0(struct clk_idt24x_chip *chip) +{ + u8 x; + u32 min_div, max_div, best_vco = 0; + u16 min_ns2, max_ns2; + bool is_lower_vco = false; + + chip->divs.ns1_q0 = 0; + chip->divs.ns2_q0 = 0; + + if (chip->clk[0].requested == 0) + return 0; + + min_div = div64_u64( + (u64)IDT24x_VCO_MIN, chip->clk[0].requested * 2) * 2; + max_div = div64_u64( + (u64)IDT24x_VCO_MAX, chip->clk[0].requested * 2) * 2; + + dev_dbg(&chip->i2c_client->dev, + "%s. requested: %u, min_div: %u, max_div: %u", + __func__, chip->clk[0].requested, min_div, max_div); + + min_ns2 = div64_u64((u64)min_div, IDT24x_MAX_NS1 * 2); + max_ns2 = div64_u64((u64)max_div, IDT24x_MIN_NS1 * 2); + + dev_dbg(&chip->i2c_client->dev, + "%s. min_ns2: %u, max_ns2: %u", __func__, min_ns2, max_ns2); + + for (x = 0; x < ARRAY_SIZE(q0_ns1_options); x++) { + u16 y = min_ns2; + + while (y <= max_ns2) { + u32 actual_div = q0_ns1_options[x] * y * 2; + u32 current_vco = actual_div * + chip->clk[0].requested; + + if (current_vco < IDT24x_VCO_MIN) + dev_dbg(&chip->i2c_client->dev, + "%s. ignore div: (ns1=%u * ns2=%u * 2 * %u) == %u < %u", + __func__, q0_ns1_options[x], y, + chip->clk[0].requested, + current_vco, IDT24x_VCO_MIN); + else if (current_vco > IDT24x_VCO_MAX) { + dev_dbg(&chip->i2c_client->dev, + "%s. ignore div: (ns1=%u * ns2=%u * 2 * %u) == %u > %u. EXIT LOOP.", + __func__, q0_ns1_options[x], y, + chip->clk[0].requested, + current_vco, IDT24x_VCO_MAX); + y = max_ns2; + } else { + bool use = false; + + dev_dbg(&chip->i2c_client->dev, + "%s. contender: (ns1=%u * ns2=%u * 2 * %u) == %u [in range]", + __func__, q0_ns1_options[x], y, + chip->clk[0].requested, + current_vco); + if (current_vco <= IDT24x_VCO_OPT) { + if (current_vco > best_vco || + !is_lower_vco) { + is_lower_vco = true; + use = true; + } + } else if (!is_lower_vco && + current_vco > best_vco) + use = true; + if (use) { + chip->divs.ns1_q0 = x; + chip->divs.ns2_q0 = y; + best_vco = current_vco; + } + } + y++; + } + } + + dev_dbg(&chip->i2c_client->dev, + "%s. best: (ns1=%u [/%u] * ns2=%u * 2 * %u) == %u", + __func__, chip->divs.ns1_q0, q0_ns1_options[chip->divs.ns1_q0], + chip->divs.ns2_q0, chip->clk[0].requested, best_vco); + return 0; +} + +/** + * idt24x_calc_divs - Calculate dividers to generate the specified frequency. + * @chip: Device data structure. contains all requested frequencies + * for all outputs. + * + * Calculate the clock dividers (dsmint, dsmfrac for vco; ns1/ns2 for q0, + * n/nfrac for q1-3) for a given target frequency. + * + * Return: 0 on success, negative errno otherwise. + */ +static int idt24x_calc_divs(struct clk_idt24x_chip *chip) +{ + u32 vco = 0; + int result; + + result = idt24x_calc_div_q0(chip); + if (result < 0) + return result; + + dev_dbg(&chip->i2c_client->dev, + "%s: after idt24x_calc_div_q0. ns1: %u [/%u], ns2: %u", + __func__, chip->divs.ns1_q0, q0_ns1_options[chip->divs.ns1_q0], + chip->divs.ns2_q0); + + chip->divs.dsmint = 0; + chip->divs.dsmfrac = 0; + + if (chip->clk[0].requested > 0) { + /* Q0 is in use and is governing the actual VCO freq */ + vco = q0_ns1_options[chip->divs.ns1_q0] * chip->divs.ns2_q0 * + 2 * chip->clk[0].requested; + } else { + u32 freq = 0; + u32 walk; + u32 min_div, max_div; + bool is_lower_vco = false; + + /* + * Q0 is not in use. Use the first requested (fractional) + * output frequency as the one controlling the VCO. + */ + for (walk = 1; walk < NUM_OUTPUTS; walk++) { + if (chip->clk[walk].requested != 0) { + freq = chip->clk[walk].requested; + break; + } + } + + if (freq == 0) { + dev_err(&chip->i2c_client->dev, + "%s: NO FREQUENCIES SPECIFIED", __func__); + return -EINVAL; + } + + /* + * First, determine the min/max div for the output frequency. + */ + min_div = IDT24x_MIN_INT_DIVIDER; + max_div = div64_u64((u64)IDT24x_VCO_MAX, freq * 2) * 2; + + dev_dbg(&chip->i2c_client->dev, + "%s: calc_divs for fractional output. freq: %u, min_div: %u, max_div: %u", + __func__, freq, min_div, max_div); + + walk = min_div; + + while (walk <= max_div) { + u32 current_vco = freq * walk; + + dev_dbg(&chip->i2c_client->dev, + "%s: calc_divs for fractional output. walk: %u, freq: %u, vco: %u", + __func__, walk, freq, vco); + if (current_vco >= IDT24x_VCO_MIN && + vco <= IDT24x_VCO_MAX) { + if (current_vco <= IDT24x_VCO_OPT) { + if (current_vco > vco || + !is_lower_vco) { + is_lower_vco = true; + vco = current_vco; + } + } else if (!is_lower_vco && current_vco > vco) { + vco = current_vco; + } + } + /* Divider must be even. */ + walk += 2; + } + } + + if (vco != 0) { + u32 pfd; + u64 rem; + int x; + + /* Setup dividers for outputs with fractional dividers. */ + for (x = 1; x < NUM_OUTPUTS; x++) { + if (chip->clk[x].requested != 0) { + /* + * The value written to the chip is half + * the calculated divider. + */ + chip->divs.nint[x - 1] = div64_u64_rem( + (u64)vco, + chip->clk[x].requested * 2, + &rem); + chip->divs.nfrac[x - 1] = div64_u64( + rem * 1 << 28, + chip->clk[x].requested * 2); + dev_dbg(&chip->i2c_client->dev, + "%s: div to get Q%i freq %u from vco %u: int part: %u, rem: %llu, frac part: %u", + __func__, x, + chip->clk[x].requested, + vco, chip->divs.nint[x - 1], rem, + chip->divs.nfrac[x - 1]); + } + } + + /* Calculate freq for pfd */ + pfd = chip->input_clk_freq * (chip->doubler_disabled ? 1 : 2); + + /* + * Calculate dsmint & dsmfrac: + * ----------------------------- + * dsm = float(vco)/float(pfd) + * dsmfrac = dsm-floor(dsm) * 2^21 + * rem = vco % pfd + * therefore: + * dsmfrac = (rem * 2^21)/pfd + */ + chip->divs.dsmint = div64_u64_rem(vco, pfd, &rem); + chip->divs.dsmfrac = div64_u64(rem * 1 << 21, pfd); + + dev_dbg(&chip->i2c_client->dev, + "%s: vco: %u, pfd: %u, dsmint: %u, dsmfrac: %u, rem: %llu", + __func__, vco, pfd, chip->divs.dsmint, + chip->divs.dsmfrac, rem); + } else { + dev_err(&chip->i2c_client->dev, + "%s: no integer divider in range found. NOT SUPPORTED.", + __func__); + return -EINVAL; + } + return 0; +} + +/** + * idt24x_enable_output - Enable/disable a particular output + * @chip: Device data structure + * @output: Output to enable/disable + * @enable: Enable (true/false) + * + * Return: passes on regmap_write return value. + */ +static int idt24x_enable_output( + struct clk_idt24x_chip *chip, u8 output, bool enable) +{ + struct clk_register_offsets offsets; + int err; + struct i2c_client *client = chip->i2c_client; + + /* + * When an output is enabled, enable it in the original + * data read from the chip and cached. Otherwise it may be + * accidentally turned off when another output is enabled. + * + * E.g., the driver starts with all outputs off in reg_out_en_x. + * Q1 is enabled with the appropriate mask. Q2 is then enabled, + * which results in Q1 being turned back off (because Q1 was off + * in reg_out_en_x). + */ + + err = idt24x_get_offsets(output, &offsets); + if (err) { + dev_err(&client->dev, + "%s: error calling idt24x_get_offsets for %d: %i", + __func__, output, err); + return err; + } + + dev_dbg(&client->dev, + "%s: q%u enable? %d. reg_out_en_x before: 0x%x, reg_out_mode_0_1 before: 0x%x, reg_out_mode_2_3 before: 0x%x, reg_qx_dis before: 0x%x", + __func__, output, enable, chip->reg_out_en_x, + chip->reg_out_mode_0_1, chip->reg_out_mode_2_3, + chip->reg_qx_dis); + + chip->reg_out_en_x = chip->reg_out_en_x & ~offsets.oe_mask; + if (enable) + chip->reg_out_en_x |= (1 << bits_to_shift(offsets.oe_mask)); + + chip->reg_qx_dis = chip->reg_qx_dis & ~offsets.dis_mask; + dev_dbg(&client->dev, + "%s: q%u enable? %d. reg_qx_dis mask: 0x%x, before checking enable: 0x%x", + __func__, output, enable, offsets.dis_mask, + chip->reg_qx_dis); + if (!enable) + chip->reg_qx_dis |= (1 << bits_to_shift(offsets.dis_mask)); + + dev_dbg(&client->dev, + "%s: q%u enable? %d. reg_out_en_x after: 0x%x, reg_qx_dis after: 0x%x", + __func__, output, enable, chip->reg_out_en_x, + chip->reg_qx_dis); + + err = i2cwrite( + client, chip->regmap, IDT24x_REG_OUTEN, chip->reg_out_en_x); + if (err) { + dev_err(&client->dev, + "%s: error setting IDT24x_REG_OUTEN: %i", + __func__, err); + return err; + } + + err = i2cwrite( + client, chip->regmap, IDT24x_REG_OUTMODE0_1, + chip->reg_out_mode_0_1); + if (err) { + dev_err(&client->dev, + "%s: error setting IDT24x_REG_OUTMODE0_1: %i", + __func__, err); + return err; + } + + err = i2cwrite( + client, chip->regmap, IDT24x_REG_OUTMODE2_3, + chip->reg_out_mode_2_3); + if (err) { + dev_err(&client->dev, + "%s: error setting IDT24x_REG_OUTMODE2_3: %i", + __func__, err); + return err; + } + + err = i2cwrite( + client, chip->regmap, IDT24x_REG_Q_DIS, chip->reg_qx_dis); + if (err) { + dev_err(&client->dev, + "%s: error setting IDT24x_REG_Q_DIS: %i", + __func__, err); + return err; + } + + return 0; +} + +/** + * idt24x_update_device - write registers to the chip + * @chip: Device data structure + * + * Write all values to hardware that we have calculated. + * + * Return: passes on regmap_bulk_write return value. + */ +static int idt24x_update_device(struct clk_idt24x_chip *chip) +{ + int err; + struct i2c_client *client = chip->i2c_client; + int x = -1; + + dev_dbg(&client->dev, + "%s: setting DSM_INT_8 (val %u @ %u)", + __func__, chip->divs.dsmint >> 8, + IDT24x_REG_DSM_INT_8); + err = i2cwritewithmask( + client, chip->regmap, IDT24x_REG_DSM_INT_8, + (chip->divs.dsmint >> 8) & IDT24x_REG_DSM_INT_8_MASK, + chip->reg_dsm_int_8, IDT24x_REG_DSM_INT_8_MASK); + if (err) { + dev_err(&client->dev, + "%s: error setting IDT24x_REG_DSM_INT_8: %i", + __func__, err); + return err; + } + + dev_dbg(&client->dev, + "%s: setting DSM_INT_7_0 (val %u @ 0x%x)", + __func__, chip->divs.dsmint & 0xFF, + IDT24x_REG_DSM_INT_7_0); + err = i2cwrite( + client, chip->regmap, IDT24x_REG_DSM_INT_7_0, + chip->divs.dsmint & 0xFF); + if (err) { + dev_err(&client->dev, + "%s: error setting IDT24x_REG_DSM_INT_7_0: %i", + __func__, err); + return err; + } + + dev_dbg(&client->dev, + "%s: setting IDT24x_REG_DSMFRAC_20_16 (val %u @ 0x%x)", + __func__, chip->divs.dsmfrac >> 16, + IDT24x_REG_DSMFRAC_20_16); + err = i2cwritewithmask( + client, chip->regmap, IDT24x_REG_DSMFRAC_20_16, + (chip->divs.dsmfrac >> 16) & IDT24x_REG_DSMFRAC_20_16_MASK, + chip->reg_dsm_int_8, IDT24x_REG_DSMFRAC_20_16_MASK); + if (err) { + dev_err(&client->dev, + "%s: error setting IDT24x_REG_DSMFRAC_20_16: %i", + __func__, err); + return err; + } + + dev_dbg(&client->dev, + "%s: setting IDT24x_REG_DSMFRAC_15_8 (val %u @ 0x%x)", + __func__, (chip->divs.dsmfrac >> 8) & 0xFF, + IDT24x_REG_DSMFRAC_15_8); + err = i2cwrite( + client, chip->regmap, IDT24x_REG_DSMFRAC_15_8, + (chip->divs.dsmfrac >> 8) & 0xFF); + if (err) { + dev_err(&client->dev, + "%s: error setting IDT24x_REG_DSMFRAC_15_8: %i", + __func__, err); + return err; + } + + dev_dbg(&client->dev, + "%s: setting IDT24x_REG_DSMFRAC_7_0 (val %u @ 0x%x)", + __func__, chip->divs.dsmfrac & 0xFF, + IDT24x_REG_DSMFRAC_7_0); + err = i2cwrite( + client, chip->regmap, IDT24x_REG_DSMFRAC_7_0, + chip->divs.dsmfrac & 0xFF); + if (err) { + dev_err(&client->dev, + "%s: error setting IDT24x_REG_DSMFRAC_7_0: %i", + __func__, err); + return err; + } + + dev_dbg(&client->dev, + "%s: setting IDT24x_REG_NS1_Q0 (val %u @ 0x%x)", + __func__, chip->divs.ns1_q0, IDT24x_REG_NS1_Q0); + err = i2cwritewithmask( + client, chip->regmap, IDT24x_REG_NS1_Q0, + chip->divs.ns1_q0 & IDT24x_REG_NS1_Q0_MASK, + chip->reg_ns1_q0, IDT24x_REG_NS1_Q0_MASK); + if (err) { + dev_err(&client->dev, + "%s: error setting IDT24x_REG_NS1_Q0: %i", + __func__, err); + return err; + } + + dev_dbg(&client->dev, + "%s: setting IDT24x_REG_NS2_Q0_15_8 (val %u @ 0x%x)", + __func__, (chip->divs.ns2_q0 >> 8) & 0xFF, + IDT24x_REG_NS2_Q0_15_8); + err = i2cwrite( + client, chip->regmap, IDT24x_REG_NS2_Q0_15_8, + (chip->divs.ns2_q0 >> 8) & 0xFF); + if (err) { + dev_err(&client->dev, + "%s: error setting IDT24x_REG_NS2_Q0_15_8: %i", + __func__, err); + return err; + } + + dev_dbg(&client->dev, + "%s: setting IDT24x_REG_NS2_Q0_7_0 (val %u @ 0x%x)", + __func__, chip->divs.ns2_q0 & 0xFF, + IDT24x_REG_NS2_Q0_7_0); + err = i2cwrite( + client, chip->regmap, IDT24x_REG_NS2_Q0_7_0, + chip->divs.ns2_q0 & 0xFF); + if (err) { + dev_err(&client->dev, + "%s: error setting IDT24x_REG_NS2_Q0_7_0: %i", + __func__, err); + return err; + } + + dev_dbg(&client->dev, + "%s: calling idt24x_enable_output for Q0. requestedFreq: %u", + __func__, chip->clk[0].requested); + idt24x_enable_output(chip, 0, chip->clk[0].requested != 0); + + dev_dbg(&client->dev, + "%s: writing values for q1-q3", __func__); + for (x = 1; x < NUM_OUTPUTS; x++) { + struct clk_register_offsets offsets; + + if (chip->clk[x].requested != 0) { + dev_dbg(&client->dev, + "%s: calling idt24x_get_offsets for %u", + __func__, x); + err = idt24x_get_offsets(x, &offsets); + if (err) { + dev_err(&client->dev, + "%s: error calling idt24x_get_offsets: %i", + __func__, err); + return err; + } + + dev_dbg(&client->dev, + "%s: (q%u, nint: %u, nfrac: %u)", + __func__, x, chip->divs.nint[x - 1], + chip->divs.nfrac[x - 1]); + + dev_dbg(&client->dev, + "%s: setting n_17_16_offset (q%u, val %u @ 0x%x)", + __func__, x, + chip->divs.nint[x - 1] >> 16, + offsets.n_17_16_offset); + err = i2cwritewithmask( + client, chip->regmap, offsets.n_17_16_offset, + (chip->divs.nint[x - 1] >> 16) & + offsets.n_17_16_mask, + chip->reg_n_qx_17_16[x - 1], + offsets.n_17_16_mask); + if (err) { + dev_err(&client->dev, + "%s: error setting n_17_16_offset: %i", + __func__, err); + return err; + } + + dev_dbg(&client->dev, + "%s: setting n_15_8_offset (q%u, val %u @ 0x%x)", + __func__, x, + (chip->divs.nint[x - 1] >> 8) & 0xFF, + offsets.n_15_8_offset); + err = i2cwrite( + client, chip->regmap, offsets.n_15_8_offset, + (chip->divs.nint[x - 1] >> 8) & 0xFF); + if (err) { + dev_err(&client->dev, + "%s: error setting n_15_8_offset: %i", + __func__, err); + return err; + } + + dev_dbg(&client->dev, + "%s: setting n_7_0_offset (q%u, val %u @ 0x%x)", + __func__, x, + chip->divs.nint[x - 1] & 0xFF, + offsets.n_7_0_offset); + err = i2cwrite( + client, chip->regmap, offsets.n_7_0_offset, + chip->divs.nint[x - 1] & 0xFF); + if (err) { + dev_err(&client->dev, + "%s: error setting n_7_0_offset: %i", + __func__, err); + return err; + } + + dev_dbg(&client->dev, + "%s: setting nfrac_27_24_offset (q%u, val %u @ 0x%x)", + __func__, x, + (chip->divs.nfrac[x - 1] >> 24), + offsets.nfrac_27_24_offset); + err = i2cwritewithmask( + client, chip->regmap, + offsets.nfrac_27_24_offset, + (chip->divs.nfrac[x - 1] >> 24) & + offsets.nfrac_27_24_mask, + chip->reg_nfrac_qx_27_24[x - 1], + offsets.nfrac_27_24_mask); + if (err) { + dev_err(&client->dev, + "%s: error setting nfrac_27_24_offset: %i", + __func__, err); + return err; + } + + dev_dbg(&client->dev, + "%s: setting nfrac_23_16_offset (q%u, val %u @ 0x%x)", + __func__, x, + (chip->divs.nfrac[x - 1] >> 16) & 0xFF, + offsets.nfrac_23_16_offset); + err = i2cwrite( + client, chip->regmap, + offsets.nfrac_23_16_offset, + (chip->divs.nfrac[x - 1] >> 16) & 0xFF); + if (err) { + dev_err(&client->dev, + "%s: error setting nfrac_23_16_offset: %i", + __func__, err); + return err; + } + + dev_dbg(&client->dev, + "%s: setting nfrac_15_8_offset (q%u, val %u @ 0x%x)", + __func__, x, + (chip->divs.nfrac[x - 1] >> 8) & 0xFF, + offsets.nfrac_15_8_offset); + err = i2cwrite( + client, chip->regmap, + offsets.nfrac_15_8_offset, + (chip->divs.nfrac[x - 1] >> 8) & 0xFF); + if (err) { + dev_err(&client->dev, + "%s: error setting nfrac_15_8_offset: %i", + __func__, err); + return err; + } + + dev_dbg(&client->dev, + "%s: setting nfrac_7_0_offset (q%u, val %u @ 0x%x)", + __func__, x, + chip->divs.nfrac[x - 1] & 0xFF, + offsets.nfrac_7_0_offset); + err = i2cwrite( + client, chip->regmap, offsets.nfrac_7_0_offset, + chip->divs.nfrac[x - 1] & 0xFF); + if (err) { + dev_err(&client->dev, + "%s: error setting nfrac_7_0_offset: %i", + __func__, err); + return err; + } + } + idt24x_enable_output(chip, x, + chip->clk[x].requested != 0); + chip->clk[x].actual = chip->clk[x].requested; + } + return 0; +} + +/** + * idt24x_set_frequency - Adjust output frequency on the attached chip. + * @chip: Device data structure, including all requested frequencies. + * + * Return: 0 on success. + */ +int idt24x_set_frequency(struct clk_idt24x_chip *chip) +{ + int err; + struct i2c_client *client = chip->i2c_client; + int x; + bool all_disabled = true; + + for (x = 0; x < NUM_OUTPUTS; x++) { + if (chip->clk[x].requested == 0) { + idt24x_enable_output(chip, x, false); + chip->clk[x].actual = 0; + } else { + all_disabled = false; + } + } + + if (all_disabled) + /* + * no requested frequencies, so nothing else to calculate + * or write to the chip. If the consumer wants to disable + * all outputs, they can request 0 for all frequencies. + */ + return 0; + + if (chip->input_clk_freq == 0) { + dev_err(&client->dev, + "%s: no input frequency; can't continue.", __func__); + return -EINVAL; + } + + err = idt24x_calc_divs(chip); + if (err) { + dev_err(&client->dev, + "%s: error calling idt24x_calc_divs: %i", + __func__, err); + return err; + } + + err = idt24x_update_device(chip); + if (err) { + dev_err(&client->dev, + "%s: error updating the device: %i", + __func__, err); + return err; + } + + return 0; +} --- linux-xilinx-6.8.0.orig/drivers/clk/idt/clk-idt8t49n24x-core.h +++ linux-xilinx-6.8.0/drivers/clk/idt/clk-idt8t49n24x-core.h @@ -0,0 +1,272 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* clk-idt8t49n24x-core.h - Program 8T49N24x settings via I2C (common code) + * + * Copyright (C) 2018, Integrated Device Technology, Inc. + * + * See https://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html + * This program is distributed "AS IS" and WITHOUT ANY WARRANTY; + * including the implied warranties of MERCHANTABILITY, FITNESS FOR + * A PARTICULAR PURPOSE, or NON-INFRINGEMENT. + */ + +#ifndef __IDT_CLK_IDT8T49N24X_CORE_H_ +#define __IDT_CLK_IDT8T49N24X_CORE_H_ + +#include +#include +#include + +/* + * The configurations in the settings file have 0x317 registers (last offset + * is 0x316). + */ +#define NUM_CONFIG_REGISTERS 0x317 +#define NUM_INPUTS 2 +#define NUM_OUTPUTS 4 +#define DEBUGFS_BUFFER_LENGTH 200 +#define WRITE_BLOCK_SIZE 32 + +/* Non output-specific registers */ +#define IDT24x_REG_DBL_DIS 0x6C +#define IDT24x_REG_DBL_DIS_MASK 0x01 +#define IDT24x_REG_DSM_INT_8 0x25 +#define IDT24x_REG_DSM_INT_8_MASK 0x01 +#define IDT24x_REG_DSM_INT_7_0 0x26 +#define IDT24x_REG_DSMFRAC_20_16 0x28 +#define IDT24x_REG_DSMFRAC_20_16_MASK 0x1F +#define IDT24x_REG_DSMFRAC_15_8 0x29 +#define IDT24x_REG_DSMFRAC_7_0 0x2A +#define IDT24x_REG_OUTEN 0x39 +#define IDT24x_REG_OUTMODE0_1 0x3E +#define IDT24x_REG_OUTMODE2_3 0x3D +#define IDT24x_REG_Q_DIS 0x6F + +/* Q0 */ +#define IDT24x_REG_OUTEN0_MASK 0x01 +#define IDT24x_REG_OUTMODE0_MASK 0x0E +#define IDT24x_REG_Q0_DIS_MASK 0x01 +#define IDT24x_REG_NS1_Q0 0x3F +#define IDT24x_REG_NS1_Q0_MASK 0x03 +#define IDT24x_REG_NS2_Q0_15_8 0x40 +#define IDT24x_REG_NS2_Q0_7_0 0x41 + +/* Q1 */ +#define IDT24x_REG_OUTEN1_MASK 0x02 +#define IDT24x_REG_OUTMODE1_MASK 0xE0 +#define IDT24x_REG_Q1_DIS_MASK 0x02 +#define IDT24x_REG_N_Q1_17_16 0x42 +#define IDT24x_REG_N_Q1_17_16_MASK 0x03 +#define IDT24x_REG_N_Q1_15_8 0x43 +#define IDT24x_REG_N_Q1_7_0 0x44 +#define IDT24x_REG_NFRAC_Q1_27_24 0x57 +#define IDT24x_REG_NFRAC_Q1_27_24_MASK 0x0F +#define IDT24x_REG_NFRAC_Q1_23_16 0x58 +#define IDT24x_REG_NFRAC_Q1_15_8 0x59 +#define IDT24x_REG_NFRAC_Q1_7_0 0x5A + +/* Q2 */ +#define IDT24x_REG_OUTEN2_MASK 0x04 +#define IDT24x_REG_OUTMODE2_MASK 0x0E +#define IDT24x_REG_Q2_DIS_MASK 0x04 +#define IDT24x_REG_N_Q2_17_16 0x45 +#define IDT24x_REG_N_Q2_17_16_MASK 0x03 +#define IDT24x_REG_N_Q2_15_8 0x46 +#define IDT24x_REG_N_Q2_7_0 0x47 +#define IDT24x_REG_NFRAC_Q2_27_24 0x5B +#define IDT24x_REG_NFRAC_Q2_27_24_MASK 0x0F +#define IDT24x_REG_NFRAC_Q2_23_16 0x5C +#define IDT24x_REG_NFRAC_Q2_15_8 0x5D +#define IDT24x_REG_NFRAC_Q2_7_0 0x5E + +/* Q3 */ +#define IDT24x_REG_OUTEN3_MASK 0x08 +#define IDT24x_REG_OUTMODE3_MASK 0xE0 +#define IDT24x_REG_Q3_DIS_MASK 0x08 +#define IDT24x_REG_N_Q3_17_16 0x48 +#define IDT24x_REG_N_Q3_17_16_MASK 0x03 +#define IDT24x_REG_N_Q3_15_8 0x49 +#define IDT24x_REG_N_Q3_7_0 0x4A +#define IDT24x_REG_NFRAC_Q3_27_24 0x5F +#define IDT24x_REG_NFRAC_Q3_27_24_MASK 0x0F +#define IDT24x_REG_NFRAC_Q3_23_16 0x60 +#define IDT24x_REG_NFRAC_Q3_15_8 0x61 +#define IDT24x_REG_NFRAC_Q3_7_0 0x62 + +/** + * struct idt24x_output - device output information + * @hw: hw registration info for this specific output clcok. This gets + * passed as an argument to CCF api calls (e.g., set_rate). + * container_of can then be used to get the reference to this + * struct. + * @chip: store a reference to the parent device structure. container_of + * cannot be used to get to the parent device structure from + * idt24x_output, because clk_idt24x_chip contains an array of + * output structs (for future enhancements to support devices + * with different numbers of output clocks). + * @index: identifies output on the chip; used in debug statements + * @requested: requested output clock frequency (in Hz) + * @actual: actual output clock frequency (in Hz). Will only be set after + * successful update of the device. + * @debug_freq: stores value for debugfs file. Use this instead of requested + * struct var because debugfs expects u64, not u32. + */ +struct idt24x_output { + struct clk_hw hw; + struct clk_idt24x_chip *chip; + u8 index; + u32 requested; + u32 actual; + u64 debug_freq; +}; + +/** + * struct idt24x_dividers - output dividers + * @dsmint: int component of feedback divider for VCO (2-stage divider) + * @dsmfrac: fractional component of feedback divider for VCO + * @ns1_q0: ns1 divider component for Q0 + * @ns2_q0: ns2 divider component for Q0 + * @nint: int divider component for Q1-3 + * @nfrac: fractional divider component for Q1-3 + */ +struct idt24x_dividers { + u16 dsmint; + u32 dsmfrac; + + u8 ns1_q0; + u16 ns2_q0; + + u32 nint[3]; + u32 nfrac[3]; +}; + +/** + * struct clk_idt24x_chip - device info for chip + * @regmap: register map used to perform i2c writes to the chip + * @i2c_client: i2c_client struct passed to probe + * @min_freq: min frequency for this chip + * @max_freq: max frequency for this chip + * @settings: filled in if full register map is specified in the DT + * @has_settings: true if settings array is valid + * @input_clk: ptr to input clock specified in DT + * @input_clk_num: which input clock was specified. 0-based. A value of + * NUM_INPUTS indicates that a XTAL is used as the input. + * @input_clk_nb: notification support (if input clk changes) + * @input_clk_freq: current freq of input_clk + * @doubler_disabled: whether input doubler is enabled. This value is read + * from the hw on probe (in case it is set in @settings). + * @clk: array of outputs. One entry per output supported by the + * chip. Frequencies requested via the ccf api will be + * recorded in this array. + * @reg_dsm_int_8: record current value from hw to avoid modifying + * when writing register values + * @reg_dsm_frac_20_16: record current value + * @reg_out_en_x: record current value + * @reg_out_mode_0_1: record current value + * @reg_out_mode_2_3: record current value + * @reg_qx_dis: record current value + * @reg_ns1_q0: record current value + * @reg_n_qx_17_16: record current value + * @reg_nfrac_qx_27_24: record current value + * @divs: output divider values for all outputs + * @debugfs_dirroot: debugfs support + * @debugfs_fileaction: debugfs support + * @debugfs_filei2c: debugfs support + * @debugfs_map: debugfs support + * @dbg_cache: debugfs support + * @debugfs_fileqfreq: debugfs support + */ +struct clk_idt24x_chip { + struct regmap *regmap; + struct i2c_client *i2c_client; + + u32 min_freq; + u32 max_freq; + + u8 settings[NUM_CONFIG_REGISTERS]; + + bool has_settings; + + struct clk *input_clk; + int input_clk_num; + struct notifier_block input_clk_nb; + u32 input_clk_freq; + + bool doubler_disabled; + + struct idt24x_output clk[NUM_OUTPUTS]; + + unsigned int reg_dsm_int_8; + unsigned int reg_dsm_frac_20_16; + unsigned int reg_out_en_x; + unsigned int reg_out_mode_0_1; + unsigned int reg_out_mode_2_3; + unsigned int reg_qx_dis; + unsigned int reg_ns1_q0; + unsigned int reg_n_qx_17_16[3]; + unsigned int reg_nfrac_qx_27_24[3]; + + struct idt24x_dividers divs; + + struct dentry *debugfs_dirroot, *debugfs_fileaction, *debugfs_filei2c, + *debugfs_map; + char dbg_cache[DEBUGFS_BUFFER_LENGTH]; + struct dentry *debugfs_fileqfreq[4]; +}; + +#define to_idt24x_output(_hw) \ + container_of(_hw, struct idt24x_output, hw) +#define to_clk_idt24x_from_client(_client) \ + container_of(_client, struct clk_idt24x_chip, i2c_client) +#define to_clk_idt24x_from_nb(_nb) \ + container_of(_nb, struct clk_idt24x_chip, input_clk_nb) + +/** + * struct clk_register_offsets - register offsets for current context + * @oe_offset: offset for current output enable and mode + * @oe_mask: mask for current output enable + * @dis_mask: mask for current output disable + * @n_17_16_offset: offset for current output int divider (bits 17:16) + * @n_17_16_mask: mask for current output int divider (bits 17:16) + * @n_15_8_offset: offset for current output int divider (bits 15:8) + * @n_7_0_offset: offset for current output int divider (bits 7:0) + * @nfrac_27_24_offset: offset for current output frac divider (bits 27:24) + * @nfrac_27_24_mask: mask for current output frac divider (bits 27:24) + * @nfrac_23_16_offset: offset for current output frac divider (bits 23:16) + * @nfrac_15_8_offset: offset for current output frac divider (bits 15:8) + * @nfrac_7_0_offset: offset for current output frac divider (bits 7:0) + * @ns1_offset: offset for stage 1 div for output Q0 + * @ns1_offset_mask: mask for stage 1 div for output Q0 + * @ns2_15_8_offset: offset for stage 2 div for output Q0 (bits 15:8) + * @ns2_7_0_offset: offset for stage 2 div for output Q0 (bits 7:0) + */ +struct clk_register_offsets { + u16 oe_offset; + u8 oe_mask; + u8 dis_mask; + + u16 n_17_16_offset; + u8 n_17_16_mask; + u16 n_15_8_offset; + u16 n_7_0_offset; + u16 nfrac_27_24_offset; + u8 nfrac_27_24_mask; + u16 nfrac_23_16_offset; + u16 nfrac_15_8_offset; + u16 nfrac_7_0_offset; + + u16 ns1_offset; + u8 ns1_offset_mask; + u16 ns2_15_8_offset; + u16 ns2_7_0_offset; +}; + +int bits_to_shift(unsigned int mask); +int i2cwritebulk( + struct i2c_client *client, struct regmap *map, + unsigned int reg, u8 val[], size_t val_count); +int idt24x_get_offsets( + u8 output_num, + struct clk_register_offsets *offsets); +int idt24x_set_frequency(struct clk_idt24x_chip *chip); + +#endif /* __IDT_CLK_IDT8T49N24X_CORE_H_ */ --- linux-xilinx-6.8.0.orig/drivers/clk/idt/clk-idt8t49n24x-debugfs.c +++ linux-xilinx-6.8.0/drivers/clk/idt/clk-idt8t49n24x-debugfs.c @@ -0,0 +1,375 @@ +// SPDX-License-Identifier: GPL-2.0 +/* clk-idt8t49n24x-debugfs.c - Debugfs support for 8T49N24x + * + * Copyright (C) 2018, Integrated Device Technology, Inc. + * + * See https://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html + * This program is distributed "AS IS" and WITHOUT ANY WARRANTY; + * including the implied warranties of MERCHANTABILITY, FITNESS FOR + * A PARTICULAR PURPOSE, or NON-INFRINGEMENT. + */ + +#include +#include +#include +#include + +#include "clk-idt8t49n24x-debugfs.h" + +static struct clk_idt24x_chip *idt24x_chip_fordebugfs; + +static int idt24x_read_all_settings( + struct clk_idt24x_chip *chip, char *output_buffer, int count) +{ + u8 settings[NUM_CONFIG_REGISTERS]; + int err = 0; + int x; + + err = regmap_bulk_read( + chip->regmap, 0x0, settings, NUM_CONFIG_REGISTERS); + if (!err) { + output_buffer[0] = '\0'; + for (x = 0; x < ARRAY_SIZE(settings); x++) { + char dbg[4]; + + if ((strlen(output_buffer) + 4) > count) + return -EINVAL; + sprintf(dbg, "%02x ", settings[x]); + strcat(output_buffer, dbg); + } + } + return err; +} + +/** + * idt24x_debugfs_writer_action - Write handler for the "action" debugfs file. + * @fp: file pointer + * @user_buffer: buffer of text written to file + * @count: size of text in buffer + * @position: pass in current position, return new position + * + * Return: result of call to simple_write_to_buffer + * + * Use the "action" file as a trigger for setting all requested + * rates. The driver doesn't get any notification when the files + * representing the Qx outputs are written to, so something else is + * needed to notify the driver that the device should be udpated. + * + * It doesn't matter what you write to the action debugs file. When the + * handler is called, the device will be updated. + */ +static ssize_t idt24x_debugfs_writer_action( + struct file *fp, const char __user *user_buffer, + size_t count, loff_t *position) +{ + int err = 0; + int x; + u32 freq; + bool needs_update = true; + struct i2c_client *client = idt24x_chip_fordebugfs->i2c_client; + + if (count > DEBUGFS_BUFFER_LENGTH) + return -EINVAL; + + for (x = 0; x < NUM_OUTPUTS; x++) { + freq = idt24x_chip_fordebugfs->clk[x].debug_freq; + if (freq) { + needs_update = false; + dev_dbg(&client->dev, + "%s: calling clk_set_rate with debug frequency for Q%i", + __func__, x); + err = clk_set_rate( + idt24x_chip_fordebugfs->clk[x].hw.clk, freq); + if (err) { + dev_err(&client->dev, + "error calling clk_set_rate for Q%i (%i)\n", + x, err); + } + } else { + needs_update = true; + idt24x_chip_fordebugfs->clk[x].requested = 0; + dev_dbg(&client->dev, + "%s: debug frequency for Q%i not set; make sure clock is disabled", + __func__, x); + } + } + + if (needs_update) { + dev_dbg(&client->dev, + "%s: calling idt24x_set_frequency to ensure any clocks that should be disabled are turned off.", + __func__); + err = idt24x_set_frequency(idt24x_chip_fordebugfs); + if (err) { + dev_err(&idt24x_chip_fordebugfs->i2c_client->dev, + "%s: error calling idt24x_set_frequency (%i)\n", + __func__, err); + return err; + } + } + + return simple_write_to_buffer( + idt24x_chip_fordebugfs->dbg_cache, DEBUGFS_BUFFER_LENGTH, + position, user_buffer, count); +} + +/** + * idt24x_debugfs_reader_action - Read the "action" debugfs file. + * @fp: file pointer + * @user_buffer: buffer of text written to file + * @count: size of text in buffer + * @position: pass in current position, return new position + * + * Return: whatever was last written to the "action" debugfs file. + */ +static ssize_t idt24x_debugfs_reader_action( + struct file *fp, char __user *user_buffer, size_t count, + loff_t *position) +{ + return simple_read_from_buffer( + user_buffer, count, position, idt24x_chip_fordebugfs->dbg_cache, + DEBUGFS_BUFFER_LENGTH); +} + +/** + * idt24x_debugfs_reader_map - display the current registers on the device + * @fp: file pointer + * @user_buffer: buffer of text written to file + * @count: size of text in buffer + * @position: pass in current position, return new position + * + * Reads the current register map from the attached chip via I2C and + * returns it. + * + * Return: result of call to simple_read_from_buffer + */ +static ssize_t idt24x_debugfs_reader_map( + struct file *fp, char __user *user_buffer, size_t count, + loff_t *position) +{ + int err = 0; + char *buf = kzalloc(5000, GFP_KERNEL); + + dev_dbg(&idt24x_chip_fordebugfs->i2c_client->dev, + "calling idt24x_read_all_settings (count: %zu)\n", count); + err = idt24x_read_all_settings(idt24x_chip_fordebugfs, buf, 5000); + if (err) { + dev_err(&idt24x_chip_fordebugfs->i2c_client->dev, + "error calling idt24x_read_all_settings (%i)\n", err); + return 0; + } + /* TMGCDR-1456. We're returning 1 byte too few. */ + err = simple_read_from_buffer( + user_buffer, count, position, buf, strlen(buf)); + kfree(buf); + return err; +} + +/** + * idt24x_handle_i2c_debug_token - process "token" written to the i2c file + * @dev: pointer to device structure + * @token: pointer to current char being examined + * @reg: pass in current register, or return register from token. + * @val: resulting array of bytes being parsed + * @nextbyte: position in val array to store next byte + * + * Utility function to operate on the current "token" (from within a + * space-delimited string) written to the i2c debugfs file. It will + * either be a register offset or a byte to be added to the val array. + * If it is added to the val array, auto-increment nextbyte. + * + * Return: 0 for success + */ +static int idt24x_handle_i2c_debug_token( + const struct device *dev, char *token, unsigned int *reg, + u8 val[], u16 *nextbyte) +{ + int err = 0; + + dev_dbg(dev, "got token (%s)\n", token); + if (*reg == -1) { + err = kstrtouint(token, 16, reg); + if (!err) + dev_dbg(dev, "hex register address == 0x%x\n", *reg); + } else { + u8 temp; + + err = kstrtou8(token, 16, &temp); + if (!err) { + dev_dbg(dev, "data byte == 0x%x\n", temp); + val[*nextbyte] = temp; + *nextbyte += 1; + } + } + if (err == -ERANGE) + dev_err(dev, "ERANGE error when parsing data\n"); + else if (err == -EINVAL) + dev_err(dev, "EINVAL error when parsing data\n"); + else if (err) + dev_err(dev, "error when parsing data: %i\n", err); + return err; +} + +/** + * idt24x_debugfs_writer_i2c - debugfs handler for i2c file + * @fp: file pointer + * @user_buffer: buffer of text written to file + * @count: size of text in buffer + * @position: pass in current position, return new position + * + * Handler for the "i2c" debugfs file. Write to this file to write bytes + * via I2C to a particular offset. + * + * Usage: echo 006c 01 02 0D FF > i2c + * + * First 4 chars are the 2-byte i2c register offset. Then follow that + * with a sequence of 2-char bytes in hex format that you want to write + * starting at that offset. + * + * Return: result of simple_write_to_buffer + */ +static ssize_t idt24x_debugfs_writer_i2c(struct file *fp, + const char __user *user_buffer, + size_t count, loff_t *position) +{ + int err = 0; + int x = 0; + int start = 0; + ssize_t written; + unsigned int reg = -1; + u8 val[WRITE_BLOCK_SIZE]; + u16 nextbyte = 0; + char token[16]; + + if (count > DEBUGFS_BUFFER_LENGTH) + return -EINVAL; + + written = simple_write_to_buffer( + idt24x_chip_fordebugfs->dbg_cache, DEBUGFS_BUFFER_LENGTH, + position, user_buffer, count); + if (written != count) { + dev_dbg(&idt24x_chip_fordebugfs->i2c_client->dev, + "write count != expected count"); + return written; + } + + for (x = 0; x < count; x++) { + token[x - start] = idt24x_chip_fordebugfs->dbg_cache[x]; + if (idt24x_chip_fordebugfs->dbg_cache[x] == ' ') { + token[x - start] = '\0'; + err = idt24x_handle_i2c_debug_token( + &idt24x_chip_fordebugfs->i2c_client->dev, + token, ®, val, &nextbyte); + if (err) + break; + start = x + 1; + } + } + + /* handle the last token */ + if (!err) { + token[count - start] = '\0'; + err = idt24x_handle_i2c_debug_token( + &idt24x_chip_fordebugfs->i2c_client->dev, token, ®, + val, &nextbyte); + } + + if (!err && reg != -1 && nextbyte > 0) { + err = i2cwritebulk( + idt24x_chip_fordebugfs->i2c_client, + idt24x_chip_fordebugfs->regmap, + reg, val, nextbyte); + if (err) { + dev_err(&idt24x_chip_fordebugfs->i2c_client->dev, + "error writing data chip (%i)\n", err); + return err; + } + dev_dbg(&idt24x_chip_fordebugfs->i2c_client->dev, + "successfully wrote i2c data to chip"); + } + + return written; +} + +static const struct file_operations idt24x_fops_debug_action = { + .read = idt24x_debugfs_reader_action, + .write = idt24x_debugfs_writer_action, +}; + +static const struct file_operations idt24x_fops_debug_map = { + .read = idt24x_debugfs_reader_map +}; + +static const struct file_operations idt24x_fops_debug_i2c = { + .write = idt24x_debugfs_writer_i2c, +}; + +/** + * idt24x_expose_via_debugfs - Set up all debugfs files + * @client: pointer to i2c_client structure + * @chip: Device data structure + * + * Sets up all debugfs files to use for debugging the driver. + * Return: error code. 0 if success or debugfs doesn't appear to be enabled. + */ +int idt24x_expose_via_debugfs(struct i2c_client *client, + struct clk_idt24x_chip *chip) +{ + int output_num; + + /* + * create root directory in /sys/kernel/debugfs + */ + chip->debugfs_dirroot = debugfs_create_dir("idt24x", NULL); + if (!chip->debugfs_dirroot) { + /* debugfs probably not enabled. Don't fail the probe. */ + return 0; + } + + /* + * create files in the root directory. This requires read and + * write file operations + */ + chip->debugfs_fileaction = debugfs_create_file( + "action", 0644, chip->debugfs_dirroot, NULL, + &idt24x_fops_debug_action); + if (!chip->debugfs_fileaction) { + dev_err(&client->dev, + "%s: error creating action file", __func__); + return (-ENODEV); + } + + chip->debugfs_map = debugfs_create_file( + "map", 0444, chip->debugfs_dirroot, NULL, + &idt24x_fops_debug_map); + if (!chip->debugfs_map) { + dev_err(&client->dev, + "%s: error creating map file", __func__); + return (-ENODEV); + } + + for (output_num = 0; output_num < NUM_OUTPUTS; output_num++) { + char name[5]; + + sprintf(name, "q%d", output_num); + debugfs_create_u64(name, 0644, chip->debugfs_dirroot, + &chip->clk[output_num].debug_freq); + } + + chip->debugfs_filei2c = debugfs_create_file( + "i2c", 0644, chip->debugfs_dirroot, NULL, + &idt24x_fops_debug_i2c); + if (!chip->debugfs_filei2c) { + dev_err(&client->dev, + "%s: error creating i2c file", __func__); + return (-ENODEV); + } + + dev_dbg(&client->dev, "%s: success", __func__); + idt24x_chip_fordebugfs = chip; + return 0; +} + +void idt24x_cleanup_debugfs(struct clk_idt24x_chip *chip) +{ + debugfs_remove_recursive(chip->debugfs_dirroot); +} --- linux-xilinx-6.8.0.orig/drivers/clk/idt/clk-idt8t49n24x-debugfs.h +++ linux-xilinx-6.8.0/drivers/clk/idt/clk-idt8t49n24x-debugfs.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* clk-idt8t49n24x-debugfs.h - Debugfs support for 8T49N24x + * + * Copyright (C) 2018, Integrated Device Technology, Inc. + * + * See https://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html + * This program is distributed "AS IS" and WITHOUT ANY WARRANTY; + * including the implied warranties of MERCHANTABILITY, FITNESS FOR + * A PARTICULAR PURPOSE, or NON-INFRINGEMENT. + */ + +#ifndef __IDT_CLK_IDT8T49N24X_DEBUGFS_H_ +#define __IDT_CLK_IDT8T49N24X_DEBUGFS_H_ + +#include "clk-idt8t49n24x-core.h" + +int idt24x_expose_via_debugfs(struct i2c_client *client, + struct clk_idt24x_chip *chip); +void idt24x_cleanup_debugfs(struct clk_idt24x_chip *chip); + +#endif /* __IDT_CLK_IDT8T49N24X_DEBUGFS_H_*/ --- linux-xilinx-6.8.0.orig/drivers/clk/idt/clk-idt8t49n24x.c +++ linux-xilinx-6.8.0/drivers/clk/idt/clk-idt8t49n24x.c @@ -0,0 +1,638 @@ +// SPDX-License-Identifier: GPL-2.0 +/* clk-idt8t49n24x.c - Program 8T49N24x settings via I2C. + * + * Copyright (C) 2018, Integrated Device Technology, Inc. + * + * See https://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html + * This program is distributed "AS IS" and WITHOUT ANY WARRANTY; + * including the implied warranties of MERCHANTABILITY, FITNESS FOR + * A PARTICULAR PURPOSE, or NON-INFRINGEMENT. + */ + +#include +#include +#include + +#include "clk-idt8t49n24x-core.h" +#include "clk-idt8t49n24x-debugfs.h" + +#define OUTPUTMODE_HIGHZ 0 +#define OUTPUTMODE_LVDS 2 +#define IDT24x_MIN_FREQ 1000000L +#define IDT24x_MAX_FREQ 300000000L +#define DRV_NAME "idt8t49n24x" + +enum clk_idt24x_variant { + idt24x +}; + +static u32 mask_and_shift(u32 value, u8 mask) +{ + value &= mask; + return value >> bits_to_shift(mask); +} + +/** + * idt24x_set_output_mode - Set the mode for a particular clock + * output in the register. + * @reg: The current register value before setting the mode. + * @mask: The bitmask identifying where in the register the + * output mode is stored. + * @mode: The mode to set. + * + * Return: the new register value with the specified mode bits set. + */ +static int idt24x_set_output_mode(u32 reg, u8 mask, u8 mode) +{ + if (((reg & mask) >> bits_to_shift(mask)) == OUTPUTMODE_HIGHZ) { + reg = reg & ~mask; + reg |= (OUTPUTMODE_LVDS << bits_to_shift(mask)); + } + return reg; +} + +/** + * idt24x_read_from_hw - Get the current values on the hw + * @chip: Device data structure + * + * Return: 0 on success, negative errno otherwise. + */ +static int idt24x_read_from_hw(struct clk_idt24x_chip *chip) +{ + int err; + struct i2c_client *client = chip->i2c_client; + u32 tmp, tmp2; + u8 output; + + err = regmap_read(chip->regmap, IDT24x_REG_DSM_INT_8, + &chip->reg_dsm_int_8); + if (err) { + dev_err(&client->dev, + "%s: error reading IDT24x_REG_DSM_INT_8: %i", + __func__, err); + return err; + } + dev_dbg(&client->dev, "%s: reg_dsm_int_8: 0x%x", + __func__, chip->reg_dsm_int_8); + + err = regmap_read(chip->regmap, IDT24x_REG_DSMFRAC_20_16_MASK, + &chip->reg_dsm_frac_20_16); + if (err) { + dev_err(&client->dev, + "%s: error reading IDT24x_REG_DSMFRAC_20_16_MASK: %i", + __func__, err); + return err; + } + dev_dbg(&client->dev, "%s: reg_dsm_frac_20_16: 0x%x", + __func__, chip->reg_dsm_frac_20_16); + + err = regmap_read(chip->regmap, IDT24x_REG_OUTEN, &chip->reg_out_en_x); + if (err) { + dev_err(&client->dev, + "%s: error reading IDT24x_REG_OUTEN: %i", + __func__, err); + return err; + } + dev_dbg(&client->dev, "%s: reg_out_en_x: 0x%x", + __func__, chip->reg_out_en_x); + + err = regmap_read(chip->regmap, IDT24x_REG_OUTMODE0_1, &tmp); + if (err) { + dev_err(&client->dev, + "%s: error reading IDT24x_REG_OUTMODE0_1: %i", + __func__, err); + return err; + } + + tmp2 = idt24x_set_output_mode( + tmp, IDT24x_REG_OUTMODE0_MASK, OUTPUTMODE_LVDS); + tmp2 = idt24x_set_output_mode( + tmp2, IDT24x_REG_OUTMODE1_MASK, OUTPUTMODE_LVDS); + dev_dbg(&client->dev, + "%s: reg_out_mode_0_1 original: 0x%x. After setting OUT0/1 to LVDS if necessary: 0x%x", + __func__, tmp, tmp2); + chip->reg_out_mode_0_1 = tmp2; + + err = regmap_read(chip->regmap, IDT24x_REG_OUTMODE2_3, &tmp); + if (err) { + dev_err(&client->dev, + "%s: error reading IDT24x_REG_OUTMODE2_3: %i", + __func__, err); + return err; + } + + tmp2 = idt24x_set_output_mode( + tmp, IDT24x_REG_OUTMODE2_MASK, OUTPUTMODE_LVDS); + tmp2 = idt24x_set_output_mode( + tmp2, IDT24x_REG_OUTMODE3_MASK, OUTPUTMODE_LVDS); + dev_dbg(&client->dev, + "%s: reg_out_mode_2_3 original: 0x%x. After setting OUT2/3 to LVDS if necessary: 0x%x", + __func__, tmp, tmp2); + chip->reg_out_mode_2_3 = tmp2; + + err = regmap_read(chip->regmap, IDT24x_REG_Q_DIS, &chip->reg_qx_dis); + if (err) { + dev_err(&client->dev, + "%s: error reading IDT24x_REG_Q_DIS: %i", + __func__, err); + return err; + } + dev_dbg(&client->dev, "%s: reg_qx_dis: 0x%x", + __func__, chip->reg_qx_dis); + + err = regmap_read(chip->regmap, IDT24x_REG_NS1_Q0, &chip->reg_ns1_q0); + if (err) { + dev_err(&client->dev, + "%s: error reading IDT24x_REG_NS1_Q0: %i", + __func__, err); + return err; + } + dev_dbg(&client->dev, "%s: reg_ns1_q0: 0x%x", + __func__, chip->reg_ns1_q0); + + for (output = 1; output <= 3; output++) { + struct clk_register_offsets offsets; + + err = idt24x_get_offsets(output, &offsets); + if (err) { + dev_err(&client->dev, + "%s: error calling idt24x_get_offsets: %i", + __func__, err); + return err; + } + + err = regmap_read(chip->regmap, offsets.n_17_16_offset, + &chip->reg_n_qx_17_16[output - 1]); + if (err) { + dev_err(&client->dev, + "%s: error reading n_17_16_offset for output %d (offset: 0x%x): %i", + __func__, output, offsets.n_17_16_offset, err); + return err; + } + dev_dbg(&client->dev, + "%s: reg_n_qx_17_16[Q%u]: 0x%x", + __func__, output, chip->reg_n_qx_17_16[output - 1]); + + err = regmap_read(chip->regmap, offsets.nfrac_27_24_offset, + &chip->reg_nfrac_qx_27_24[output - 1]); + if (err) { + dev_err(&client->dev, + "%s: error reading nfrac_27_24_offset for output %d (offset: 0x%x): %i", + __func__, output, + offsets.nfrac_27_24_offset, err); + return err; + } + dev_dbg(&client->dev, + "%s: reg_nfrac_qx_27_24[Q%u]: 0x%x", + __func__, output, + chip->reg_nfrac_qx_27_24[output - 1]); + } + + dev_info(&client->dev, + "%s: initial values read from chip successfully", + __func__); + + /* Also read DBL_DIS to determine whether the doubler is disabled. */ + err = regmap_read(chip->regmap, IDT24x_REG_DBL_DIS, &tmp); + if (err) { + dev_err(&client->dev, + "%s: error reading IDT24x_REG_DBL_DIS: %i", + __func__, err); + return err; + } + chip->doubler_disabled = mask_and_shift(tmp, IDT24x_REG_DBL_DIS_MASK); + dev_dbg(&client->dev, "%s: doubler_disabled: %d", + __func__, chip->doubler_disabled); + + return 0; +} + +/** + * idt24x_set_rate - Sets the specified output clock to the specified rate. + * @hw: clk_hw struct that identifies the specific output clock. + * @rate: the rate (in Hz) for the specified clock. + * @parent_rate:(not sure) the rate for a parent signal (e.g., + * the VCO feeding the output) + * + * This function will call idt24_set_frequency, which means it will + * calculate divider for all requested outputs and update the attached + * device (issue I2C commands to update the registers). + * + * Return: 0 on success. + */ +static int idt24x_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) +{ + int err = 0; + + /* + * hw->clk is the pointer to the specific output clock the user is + * requesting. We use hw to get back to the output structure for + * the output clock. Set the requested rate in the output structure. + * Note that container_of cannot be used to find the device structure + * (clk_idt24x_chip) from clk_hw, because clk_idt24x_chip has an array + * of idt24x_output structs. That is why it is necessary to use + * output->chip to access the device structure. + */ + struct idt24x_output *output = to_idt24x_output(hw); + struct i2c_client *client = output->chip->i2c_client; + + if (rate < output->chip->min_freq || rate > output->chip->max_freq) { + dev_err(&client->dev, + "requested frequency (%luHz) is out of range\n", rate); + return -EINVAL; + } + + /* + * Set the requested frequency in the output data structure, and then + * call idt24x_set_frequency. idt24x_set_frequency considers all + * requested frequencies when deciding on a vco frequency and + * calculating dividers. + */ + output->requested = rate; + + /* + * Also set in the memory location used by the debugfs file + * that exposes the output clock frequency. That allows querying + * the current rate via debugfs. + */ + output->debug_freq = rate; + + dev_info(&client->dev, + "%s. calling idt24x_set_frequency for Q%u. rate: %lu", + __func__, output->index, rate); + err = idt24x_set_frequency(output->chip); + + if (err != 0) + dev_err(&client->dev, "error calling set_frequency: %d", err); + + return err; +} + +/** + * idt24x_round_rate - get valid rate that is closest to the requested rate + * @hw: clk_hw struct that identifies the specific output clock. + * @rate: the rate (in Hz) for the specified clock. + * @parent_rate:(not sure) the rate for a parent signal (e.g., the VCO + * feeding the output). This is an i/o param. + * If the driver supports a parent clock for the output (e.g., + * the VCO(?), then set this param to indicate what the rate of + * the parent would be (e.g., the VCO frequency) if the rounded + * rate is used. + * + * Returns the closest rate to the requested rate actually supported by the + * chip. + * + * Return: adjusted rate + */ +static long idt24x_round_rate(struct clk_hw *hw, unsigned long rate, + unsigned long *parent_rate) +{ + /* + * The chip has fractional output dividers, so assume it + * can provide the requested rate. + * + * TODO: figure out the closest rate that chip can support + * within a low error threshold and return that rate. + */ + return rate; +} + +/** + * idt24x_recalc_rate - return the frequency being provided by the clock. + * @hw: clk_hw struct that identifies the specific output clock. + * @parent_rate: (not sure) the rate for a parent signal (e.g., the + * VCO feeding the output) + * + * This API appears to be used to read the current values from the hardware + * and report the frequency being provided by the clock. Without this function, + * the clock will be initialized to 0 by default. The OS appears to be + * calling this to find out what the current value of the clock is at + * startup, so it can determine when .set_rate is actually changing the + * frequency. + * + * Return: the frequency of the specified clock. + */ +static unsigned long idt24x_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + struct idt24x_output *output = to_idt24x_output(hw); + + return output->requested; +} + +/* + * Note that .prepare and .unprepare appear to be used more in Gates. + * They do not appear to be necessary for this device. + * Instead, update the device when .set_rate is called. + */ +static const struct clk_ops idt24x_clk_ops = { + .recalc_rate = idt24x_recalc_rate, + .round_rate = idt24x_round_rate, + .set_rate = idt24x_set_rate, +}; + +static bool idt24x_regmap_is_volatile(struct device *dev, unsigned int reg) +{ + return false; +} + +static bool idt24x_regmap_is_writeable(struct device *dev, unsigned int reg) +{ + return true; +} + +static const struct regmap_config idt24x_regmap_config = { + .reg_bits = 16, + .val_bits = 8, + .cache_type = REGCACHE_RBTREE, + .max_register = 0xffff, + .writeable_reg = idt24x_regmap_is_writeable, + .volatile_reg = idt24x_regmap_is_volatile, +}; + +/** + * idt24x_clk_notifier_cb - Clock rate change callback + * @nb: Pointer to notifier block + * @event: Notification reason + * @data: Pointer to notification data object + * + * This function is called when the input clock frequency changes. + * The callback checks whether a valid bus frequency can be generated after the + * change. If so, the change is acknowledged, otherwise the change is aborted. + * New dividers are written to the HW in the pre- or post change notification + * depending on the scaling direction. + * + * Return: NOTIFY_STOP if the rate change should be aborted, NOTIFY_OK + * to acknowledge the change, NOTIFY_DONE if the notification is + * considered irrelevant. + */ +static int idt24x_clk_notifier_cb(struct notifier_block *nb, + unsigned long event, void *data) +{ + struct clk_notifier_data *ndata = data; + struct clk_idt24x_chip *chip = to_clk_idt24x_from_nb(nb); + int err = 0; + + dev_info(&chip->i2c_client->dev, + "%s: input frequency changed: %lu Hz. event: %lu", + __func__, ndata->new_rate, event); + + switch (event) { + case PRE_RATE_CHANGE: { + dev_dbg(&chip->i2c_client->dev, "PRE_RATE_CHANGE\n"); + return NOTIFY_OK; + } + case POST_RATE_CHANGE: + chip->input_clk_freq = ndata->new_rate; + /* + * Can't call clock API clk_set_rate here; I believe + * it will be ignored if the rate is the same as we + * set previously. Need to call our internal function. + */ + dev_dbg(&chip->i2c_client->dev, + "POST_RATE_CHANGE. Calling idt24x_set_frequency\n"); + err = idt24x_set_frequency(chip); + if (err) + dev_err(&chip->i2c_client->dev, + "error calling idt24x_set_frequency (%i)\n", + err); + return NOTIFY_OK; + case ABORT_RATE_CHANGE: + return NOTIFY_OK; + default: + return NOTIFY_DONE; + } +} + +static struct clk_hw *of_clk_idt24x_get( + struct of_phandle_args *clkspec, void *_data) +{ + struct clk_idt24x_chip *chip = _data; + unsigned int idx = clkspec->args[0]; + + if (idx >= ARRAY_SIZE(chip->clk)) { + pr_err("%s: invalid index %u\n", __func__, idx); + return ERR_PTR(-EINVAL); + } + + return &chip->clk[idx].hw; +} + +/** + * idt24x_probe - main entry point for ccf driver + * @client: pointer to i2c_client structure + * + * Main entry point function that gets called to initialize the driver. + * + * Return: 0 for success. + */ +static int idt24x_probe(struct i2c_client *client) +{ + struct clk_idt24x_chip *chip; + struct clk_init_data init; + + int err = 0; + int x; + char buf[6]; + + dev_info(&client->dev, "%s", __func__); + chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); + if (!chip) + return -ENOMEM; + + init.ops = &idt24x_clk_ops; + init.flags = 0; + init.num_parents = 0; + chip->i2c_client = client; + + chip->min_freq = IDT24x_MIN_FREQ; + chip->max_freq = IDT24x_MAX_FREQ; + + for (x = 0; x < NUM_INPUTS + 1; x++) { + char name[12]; + + sprintf(name, x == NUM_INPUTS ? "input-xtal" : "input-clk%i", + x); + dev_dbg(&client->dev, "attempting to get %s", name); + chip->input_clk = devm_clk_get(&client->dev, name); + if (IS_ERR(chip->input_clk)) { + err = PTR_ERR(chip->input_clk); + /* + * TODO: Handle EPROBE_DEFER error, which indicates + * that the input_clk isn't available now but may be + * later when the appropriate module is loaded. + */ + } else { + err = 0; + chip->input_clk_num = x; + break; + } + } + + if (err) { + dev_err(&client->dev, "Unable to get input clock (%u).", err); + chip->input_clk = NULL; + return err; + } + + chip->input_clk_freq = clk_get_rate(chip->input_clk); + dev_dbg(&client->dev, "Got input-freq from input-clk in device tree: %uHz", + chip->input_clk_freq); + + chip->input_clk_nb.notifier_call = idt24x_clk_notifier_cb; + if (clk_notifier_register(chip->input_clk, &chip->input_clk_nb)) + dev_warn(&client->dev, + "Unable to register clock notifier for input_clk."); + + dev_dbg(&client->dev, "%s: about to read settings: %zu", + __func__, ARRAY_SIZE(chip->settings)); + + err = of_property_read_u8_array( + client->dev.of_node, "settings", chip->settings, + ARRAY_SIZE(chip->settings)); + if (!err) { + dev_dbg(&client->dev, "settings property specified in DT"); + chip->has_settings = true; + } else { + if (err == -EOVERFLOW) { + dev_alert(&client->dev, + "EOVERFLOW error trying to read the settings. ARRAY_SIZE: %zu", + ARRAY_SIZE(chip->settings)); + return err; + } + dev_dbg(&client->dev, + "settings property not specified in DT (or there was an error that can be ignored: %i). The settings property is optional.", + err); + } + + /* + * Requested output frequencies cannot be specified in the DT. + * Either a consumer needs to use the clock API to request the rate, + * or use debugfs to set the rate from user space. Use clock-names in + * DT to specify the output clock. + */ + + chip->regmap = devm_regmap_init_i2c(client, &idt24x_regmap_config); + if (IS_ERR(chip->regmap)) { + dev_err(&client->dev, "failed to allocate register map\n"); + return PTR_ERR(chip->regmap); + } + + dev_dbg(&client->dev, "%s: call i2c_set_clientdata", __func__); + i2c_set_clientdata(client, chip); + + if (chip->has_settings) { + /* + * A raw settings array was specified in the DT. Write the + * settings to the device immediately. + */ + err = i2cwritebulk( + chip->i2c_client, chip->regmap, 0, chip->settings, + ARRAY_SIZE(chip->settings)); + if (err) { + dev_err(&client->dev, + "error writing all settings to chip (%i)\n", + err); + return err; + } + dev_dbg(&client->dev, "successfully wrote full settings array"); + } + + /* + * Whether or not settings were written to the device, read all + * current values from the hw. + */ + dev_dbg(&client->dev, "read from HW"); + err = idt24x_read_from_hw(chip); + if (err) { + dev_err(&client->dev, + "failed calling idt24x_read_from_hw (%i)\n", err); + return err; + } + + /* Create all 4 clocks */ + for (x = 0; x < NUM_OUTPUTS; x++) { + init.name = kasprintf( + GFP_KERNEL, "%s.Q%i", client->dev.of_node->name, x); + chip->clk[x].chip = chip; + chip->clk[x].hw.init = &init; + chip->clk[x].index = x; + err = devm_clk_hw_register(&client->dev, &chip->clk[x].hw); + kfree(init.name); /* clock framework made a copy of the name */ + if (err) { + dev_err(&client->dev, "clock registration failed\n"); + return err; + } + dev_dbg(&client->dev, "successfully registered Q%i", x); + } + + if (err) { + dev_err(&client->dev, "clock registration failed\n"); + return err; + } + + err = of_clk_add_hw_provider( + client->dev.of_node, of_clk_idt24x_get, chip); + if (err) { + dev_err(&client->dev, "unable to add clk provider\n"); + return err; + } + + err = idt24x_expose_via_debugfs(client, chip); + if (err) { + dev_err(&client->dev, + "error calling idt24x_expose_via_debugfs: %i\n", err); + return err; + } + + if (chip->input_clk_num == NUM_INPUTS) + sprintf(buf, "XTAL"); + else + sprintf(buf, "CLK%i", chip->input_clk_num); + dev_info(&client->dev, "probe success. input freq: %uHz (%s), settings string? %s\n", + chip->input_clk_freq, buf, + chip->has_settings ? "true" : "false"); + return 0; +} + +static void idt24x_remove(struct i2c_client *client) +{ + struct clk_idt24x_chip *chip = to_clk_idt24x_from_client(&client); + + dev_info(&client->dev, "%s", __func__); + of_clk_del_provider(client->dev.of_node); + idt24x_cleanup_debugfs(chip); + + if (!chip->input_clk) + clk_notifier_unregister( + chip->input_clk, &chip->input_clk_nb); +} + +static const struct i2c_device_id idt24x_id[] = { + { "idt8t49n24x", idt24x }, + { } +}; +MODULE_DEVICE_TABLE(i2c, idt24x_id); + +static const struct of_device_id idt24x_of_match[] = { + { .compatible = "idt,idt8t49n241" }, + {}, +}; +MODULE_DEVICE_TABLE(of, idt24x_of_match); + +static struct i2c_driver idt24x_driver = { + .driver = { + .name = DRV_NAME, + .of_match_table = idt24x_of_match, + }, + .probe = idt24x_probe, + .remove = idt24x_remove, + .id_table = idt24x_id, +}; + +module_i2c_driver(idt24x_driver); + +MODULE_DESCRIPTION("8T49N24x ccf driver"); +MODULE_AUTHOR("David Cater "); +MODULE_LICENSE("GPL v2"); --- linux-xilinx-6.8.0.orig/drivers/clk/imx/clk-composite-7ulp.c +++ linux-xilinx-6.8.0/drivers/clk/imx/clk-composite-7ulp.c @@ -14,6 +14,7 @@ #include "../clk-fractional-divider.h" #include "clk.h" +#define PCG_PR_MASK BIT(31) #define PCG_PCS_SHIFT 24 #define PCG_PCS_MASK 0x7 #define PCG_CGC_SHIFT 30 @@ -78,6 +79,12 @@ struct clk_hw *hw; u32 val; + val = readl(reg); + if (!(val & PCG_PR_MASK)) { + pr_info("PCC PR is 0 for clk:%s, bypass\n", name); + return 0; + } + if (mux_present) { mux = kzalloc(sizeof(*mux), GFP_KERNEL); if (!mux) --- linux-xilinx-6.8.0.orig/drivers/clk/imx/clk-composite-8m.c +++ linux-xilinx-6.8.0/drivers/clk/imx/clk-composite-8m.c @@ -204,6 +204,34 @@ .determine_rate = imx8m_clk_composite_mux_determine_rate, }; +static int imx8m_clk_composite_gate_enable(struct clk_hw *hw) +{ + struct clk_gate *gate = to_clk_gate(hw); + unsigned long flags; + u32 val; + + spin_lock_irqsave(gate->lock, flags); + + val = readl(gate->reg); + val |= BIT(gate->bit_idx); + writel(val, gate->reg); + + spin_unlock_irqrestore(gate->lock, flags); + + return 0; +} + +static void imx8m_clk_composite_gate_disable(struct clk_hw *hw) +{ + /* composite clk requires the disable hook */ +} + +static const struct clk_ops imx8m_clk_composite_gate_ops = { + .enable = imx8m_clk_composite_gate_enable, + .disable = imx8m_clk_composite_gate_disable, + .is_enabled = clk_gate_is_enabled, +}; + struct clk_hw *__imx8m_clk_hw_composite(const char *name, const char * const *parent_names, int num_parents, void __iomem *reg, @@ -217,10 +245,11 @@ struct clk_mux *mux = NULL; const struct clk_ops *divider_ops; const struct clk_ops *mux_ops; + const struct clk_ops *gate_ops; mux = kzalloc(sizeof(*mux), GFP_KERNEL); if (!mux) - goto fail; + return ERR_CAST(hw); mux_hw = &mux->hw; mux->reg = reg; @@ -230,7 +259,7 @@ div = kzalloc(sizeof(*div), GFP_KERNEL); if (!div) - goto fail; + goto free_mux; div_hw = &div->hw; div->reg = reg; @@ -257,28 +286,32 @@ div->flags = CLK_DIVIDER_ROUND_CLOSEST; /* skip registering the gate ops if M4 is enabled */ - if (!mcore_booted) { - gate = kzalloc(sizeof(*gate), GFP_KERNEL); - if (!gate) - goto fail; - - gate_hw = &gate->hw; - gate->reg = reg; - gate->bit_idx = PCG_CGC_SHIFT; - gate->lock = &imx_ccm_lock; - } + gate = kzalloc(sizeof(*gate), GFP_KERNEL); + if (!gate) + goto free_div; + + gate_hw = &gate->hw; + gate->reg = reg; + gate->bit_idx = PCG_CGC_SHIFT; + gate->lock = &imx_ccm_lock; + if (!mcore_booted) + gate_ops = &clk_gate_ops; + else + gate_ops = &imx8m_clk_composite_gate_ops; hw = clk_hw_register_composite(NULL, name, parent_names, num_parents, mux_hw, mux_ops, div_hw, - divider_ops, gate_hw, &clk_gate_ops, flags); + divider_ops, gate_hw, gate_ops, flags); if (IS_ERR(hw)) - goto fail; + goto free_gate; return hw; -fail: +free_gate: kfree(gate); +free_div: kfree(div); +free_mux: kfree(mux); return ERR_CAST(hw); } --- linux-xilinx-6.8.0.orig/drivers/clk/imx/clk-composite-93.c +++ linux-xilinx-6.8.0/drivers/clk/imx/clk-composite-93.c @@ -76,6 +76,13 @@ static void imx93_clk_composite_gate_disable(struct clk_hw *hw) { + /* + * Skip disable the root clock gate if mcore enabled. + * The root clock may be used by the mcore. + */ + if (mcore_booted) + return; + imx93_clk_composite_gate_endisable(hw, 0); } @@ -222,7 +229,7 @@ hw = clk_hw_register_composite(NULL, name, parent_names, num_parents, mux_hw, &clk_mux_ro_ops, div_hw, &clk_divider_ro_ops, NULL, NULL, flags); - } else if (!mcore_booted) { + } else { gate = kzalloc(sizeof(*gate), GFP_KERNEL); if (!gate) goto fail; @@ -238,12 +245,6 @@ &imx93_clk_composite_divider_ops, gate_hw, &imx93_clk_composite_gate_ops, flags | CLK_SET_RATE_NO_REPARENT); - } else { - hw = clk_hw_register_composite(NULL, name, parent_names, num_parents, - mux_hw, &imx93_clk_composite_mux_ops, div_hw, - &imx93_clk_composite_divider_ops, NULL, - &imx93_clk_composite_gate_ops, - flags | CLK_SET_RATE_NO_REPARENT); } if (IS_ERR(hw)) --- linux-xilinx-6.8.0.orig/drivers/clk/imx/clk-fracn-gppll.c +++ linux-xilinx-6.8.0/drivers/clk/imx/clk-fracn-gppll.c @@ -252,9 +252,11 @@ pll_div = FIELD_PREP(PLL_RDIV_MASK, rate->rdiv) | rate->odiv | FIELD_PREP(PLL_MFI_MASK, rate->mfi); writel_relaxed(pll_div, pll->base + PLL_DIV); + readl(pll->base + PLL_DIV); if (pll->flags & CLK_FRACN_GPPLL_FRACN) { writel_relaxed(rate->mfd, pll->base + PLL_DENOMINATOR); writel_relaxed(FIELD_PREP(PLL_MFN_MASK, rate->mfn), pll->base + PLL_NUMERATOR); + readl(pll->base + PLL_NUMERATOR); } /* Wait for 5us according to fracn mode pll doc */ @@ -263,6 +265,7 @@ /* Enable Powerup */ tmp |= POWERUP_MASK; writel_relaxed(tmp, pll->base + PLL_CTRL); + readl(pll->base + PLL_CTRL); /* Wait Lock */ ret = clk_fracn_gppll_wait_lock(pll); @@ -291,19 +294,24 @@ if (val & POWERUP_MASK) return 0; + if (pll->flags & CLK_FRACN_GPPLL_FRACN) + writel_relaxed(readl_relaxed(pll->base + PLL_NUMERATOR), + pll->base + PLL_NUMERATOR); + val |= CLKMUX_BYPASS; writel_relaxed(val, pll->base + PLL_CTRL); val |= POWERUP_MASK; writel_relaxed(val, pll->base + PLL_CTRL); - - val |= CLKMUX_EN; - writel_relaxed(val, pll->base + PLL_CTRL); + readl(pll->base + PLL_CTRL); ret = clk_fracn_gppll_wait_lock(pll); if (ret) return ret; + val |= CLKMUX_EN; + writel_relaxed(val, pll->base + PLL_CTRL); + val &= ~CLKMUX_BYPASS; writel_relaxed(val, pll->base + PLL_CTRL); --- linux-xilinx-6.8.0.orig/drivers/clk/imx/clk-imx6ul.c +++ linux-xilinx-6.8.0/drivers/clk/imx/clk-imx6ul.c @@ -542,8 +542,8 @@ clk_set_parent(hws[IMX6UL_CLK_ENFC_SEL]->clk, hws[IMX6UL_CLK_PLL2_PFD2]->clk); - clk_set_parent(hws[IMX6UL_CLK_ENET1_REF_SEL]->clk, hws[IMX6UL_CLK_ENET_REF]->clk); - clk_set_parent(hws[IMX6UL_CLK_ENET2_REF_SEL]->clk, hws[IMX6UL_CLK_ENET2_REF]->clk); + clk_set_parent(hws[IMX6UL_CLK_ENET1_REF_SEL]->clk, hws[IMX6UL_CLK_ENET1_REF_125M]->clk); + clk_set_parent(hws[IMX6UL_CLK_ENET2_REF_SEL]->clk, hws[IMX6UL_CLK_ENET2_REF_125M]->clk); imx_register_uart_clocks(); } --- linux-xilinx-6.8.0.orig/drivers/clk/imx/clk-imx7d.c +++ linux-xilinx-6.8.0/drivers/clk/imx/clk-imx7d.c @@ -498,9 +498,9 @@ hws[IMX7D_ENET_AXI_ROOT_SRC] = imx_clk_hw_mux2_flags("enet_axi_src", base + 0x8900, 24, 3, enet_axi_sel, ARRAY_SIZE(enet_axi_sel), CLK_SET_PARENT_GATE); hws[IMX7D_NAND_USDHC_BUS_ROOT_SRC] = imx_clk_hw_mux2_flags("nand_usdhc_src", base + 0x8980, 24, 3, nand_usdhc_bus_sel, ARRAY_SIZE(nand_usdhc_bus_sel), CLK_SET_PARENT_GATE); hws[IMX7D_DRAM_PHYM_ROOT_SRC] = imx_clk_hw_mux2_flags("dram_phym_src", base + 0x9800, 24, 1, dram_phym_sel, ARRAY_SIZE(dram_phym_sel), CLK_SET_PARENT_GATE); - hws[IMX7D_DRAM_ROOT_SRC] = imx_clk_hw_mux2_flags("dram_src", base + 0x9880, 24, 1, dram_sel, ARRAY_SIZE(dram_sel), CLK_SET_PARENT_GATE); + hws[IMX7D_DRAM_ROOT_SRC] = imx_clk_hw_mux2("dram_src", base + 0x9880, 24, 1, dram_sel, ARRAY_SIZE(dram_sel)); hws[IMX7D_DRAM_PHYM_ALT_ROOT_SRC] = imx_clk_hw_mux2_flags("dram_phym_alt_src", base + 0xa000, 24, 3, dram_phym_alt_sel, ARRAY_SIZE(dram_phym_alt_sel), CLK_SET_PARENT_GATE); - hws[IMX7D_DRAM_ALT_ROOT_SRC] = imx_clk_hw_mux2_flags("dram_alt_src", base + 0xa080, 24, 3, dram_alt_sel, ARRAY_SIZE(dram_alt_sel), CLK_SET_PARENT_GATE); + hws[IMX7D_DRAM_ALT_ROOT_SRC] = imx_clk_hw_mux2("dram_alt_src", base + 0xa080, 24, 3, dram_alt_sel, ARRAY_SIZE(dram_alt_sel)); hws[IMX7D_USB_HSIC_ROOT_SRC] = imx_clk_hw_mux2_flags("usb_hsic_src", base + 0xa100, 24, 3, usb_hsic_sel, ARRAY_SIZE(usb_hsic_sel), CLK_SET_PARENT_GATE); hws[IMX7D_PCIE_CTRL_ROOT_SRC] = imx_clk_hw_mux2_flags("pcie_ctrl_src", base + 0xa180, 24, 3, pcie_ctrl_sel, ARRAY_SIZE(pcie_ctrl_sel), CLK_SET_PARENT_GATE); hws[IMX7D_PCIE_PHY_ROOT_SRC] = imx_clk_hw_mux2_flags("pcie_phy_src", base + 0xa200, 24, 3, pcie_phy_sel, ARRAY_SIZE(pcie_phy_sel), CLK_SET_PARENT_GATE); --- linux-xilinx-6.8.0.orig/drivers/clk/imx/clk-imx8-acm.c +++ linux-xilinx-6.8.0/drivers/clk/imx/clk-imx8-acm.c @@ -289,9 +289,9 @@ DL_FLAG_STATELESS | DL_FLAG_PM_RUNTIME | DL_FLAG_RPM_ACTIVE); - if (IS_ERR(dev_pm->pd_dev_link[i])) { + if (!dev_pm->pd_dev_link[i]) { dev_pm_domain_detach(dev_pm->pd_dev[i], false); - ret = PTR_ERR(dev_pm->pd_dev_link[i]); + ret = -EINVAL; goto detach_pm; } } --- linux-xilinx-6.8.0.orig/drivers/clk/imx/clk-imx8mp-audiomix.c +++ linux-xilinx-6.8.0/drivers/clk/imx/clk-imx8mp-audiomix.c @@ -18,7 +18,12 @@ #define CLKEN0 0x000 #define CLKEN1 0x004 -#define SAI_MCLK_SEL(n) (0x300 + 4 * (n)) /* n in 0..5 */ +#define SAI1_MCLK_SEL 0x300 +#define SAI2_MCLK_SEL 0x304 +#define SAI3_MCLK_SEL 0x308 +#define SAI5_MCLK_SEL 0x30C +#define SAI6_MCLK_SEL 0x310 +#define SAI7_MCLK_SEL 0x314 #define PDM_SEL 0x318 #define SAI_PLL_GNRL_CTL 0x400 @@ -95,13 +100,13 @@ IMX8MP_CLK_AUDIOMIX_SAI##n##_MCLK1_SEL, {}, \ clk_imx8mp_audiomix_sai##n##_mclk1_parents, \ ARRAY_SIZE(clk_imx8mp_audiomix_sai##n##_mclk1_parents), \ - SAI_MCLK_SEL(n), 1, 0 \ + SAI##n##_MCLK_SEL, 1, 0 \ }, { \ "sai"__stringify(n)"_mclk2_sel", \ IMX8MP_CLK_AUDIOMIX_SAI##n##_MCLK2_SEL, {}, \ clk_imx8mp_audiomix_sai_mclk2_parents, \ ARRAY_SIZE(clk_imx8mp_audiomix_sai_mclk2_parents), \ - SAI_MCLK_SEL(n), 4, 1 \ + SAI##n##_MCLK_SEL, 4, 1 \ }, { \ "sai"__stringify(n)"_ipg_cg", \ IMX8MP_CLK_AUDIOMIX_SAI##n##_IPG, \ @@ -141,6 +146,15 @@ PDM_SEL, 2, 0 \ } +#define CLK_GATE_PARENT(gname, cname, pname) \ + { \ + gname"_cg", \ + IMX8MP_CLK_AUDIOMIX_##cname, \ + { .fw_name = pname, .name = pname }, NULL, 1, \ + CLKEN0 + 4 * !!(IMX8MP_CLK_AUDIOMIX_##cname / 32), \ + 1, IMX8MP_CLK_AUDIOMIX_##cname % 32 \ + } + struct clk_imx8mp_audiomix_sel { const char *name; int clkid; @@ -158,14 +172,14 @@ CLK_GATE("earc", EARC_IPG), CLK_GATE("ocrama", OCRAMA_IPG), CLK_GATE("aud2htx", AUD2HTX_IPG), - CLK_GATE("earc_phy", EARC_PHY), + CLK_GATE_PARENT("earc_phy", EARC_PHY, "sai_pll_out_div2"), CLK_GATE("sdma2", SDMA2_ROOT), CLK_GATE("sdma3", SDMA3_ROOT), CLK_GATE("spba2", SPBA2_ROOT), CLK_GATE("dsp", DSP_ROOT), CLK_GATE("dspdbg", DSPDBG_ROOT), CLK_GATE("edma", EDMA_ROOT), - CLK_GATE("audpll", AUDPLL_ROOT), + CLK_GATE_PARENT("audpll", AUDPLL_ROOT, "osc_24m"), CLK_GATE("mu2", MU2_ROOT), CLK_GATE("mu3", MU3_ROOT), CLK_PDM, --- linux-xilinx-6.8.0.orig/drivers/clk/imx/clk-imx8mp.c +++ linux-xilinx-6.8.0/drivers/clk/imx/clk-imx8mp.c @@ -399,8 +399,9 @@ static const char * const imx8mp_clkout_sels[] = {"audio_pll1_out", "audio_pll2_out", "video_pll1_out", "dummy", "dummy", "gpu_pll_out", "vpu_pll_out", - "arm_pll_out", "sys_pll1", "sys_pll2", "sys_pll3", - "dummy", "dummy", "osc_24m", "dummy", "osc_32k"}; + "arm_pll_out", "sys_pll1_out", "sys_pll2_out", + "sys_pll3_out", "dummy", "dummy", "osc_24m", + "dummy", "osc_32k"}; static struct clk_hw **hws; static struct clk_hw_onecell_data *clk_hw_data; @@ -551,8 +552,8 @@ hws[IMX8MP_CLK_IPG_ROOT] = imx_clk_hw_divider2("ipg_root", "ahb_root", ccm_base + 0x9080, 0, 1); - hws[IMX8MP_CLK_DRAM_ALT] = imx8m_clk_hw_composite("dram_alt", imx8mp_dram_alt_sels, ccm_base + 0xa000); - hws[IMX8MP_CLK_DRAM_APB] = imx8m_clk_hw_composite_critical("dram_apb", imx8mp_dram_apb_sels, ccm_base + 0xa080); + hws[IMX8MP_CLK_DRAM_ALT] = imx8m_clk_hw_fw_managed_composite("dram_alt", imx8mp_dram_alt_sels, ccm_base + 0xa000); + hws[IMX8MP_CLK_DRAM_APB] = imx8m_clk_hw_fw_managed_composite_critical("dram_apb", imx8mp_dram_apb_sels, ccm_base + 0xa080); hws[IMX8MP_CLK_VPU_G1] = imx8m_clk_hw_composite("vpu_g1", imx8mp_vpu_g1_sels, ccm_base + 0xa100); hws[IMX8MP_CLK_VPU_G2] = imx8m_clk_hw_composite("vpu_g2", imx8mp_vpu_g2_sels, ccm_base + 0xa180); hws[IMX8MP_CLK_CAN1] = imx8m_clk_hw_composite("can1", imx8mp_can1_sels, ccm_base + 0xa200); --- linux-xilinx-6.8.0.orig/drivers/clk/imx/clk-imx8qxp.c +++ linux-xilinx-6.8.0/drivers/clk/imx/clk-imx8qxp.c @@ -170,8 +170,8 @@ imx_clk_scu("pwm_clk", IMX_SC_R_LCD_0_PWM_0, IMX_SC_PM_CLK_PER); imx_clk_scu("elcdif_pll", IMX_SC_R_ELCDIF_PLL, IMX_SC_PM_CLK_PLL); imx_clk_scu2("lcd_clk", lcd_sels, ARRAY_SIZE(lcd_sels), IMX_SC_R_LCD_0, IMX_SC_PM_CLK_PER); - imx_clk_scu2("lcd_pxl_clk", lcd_pxl_sels, ARRAY_SIZE(lcd_pxl_sels), IMX_SC_R_LCD_0, IMX_SC_PM_CLK_MISC0); imx_clk_scu("lcd_pxl_bypass_div_clk", IMX_SC_R_LCD_0, IMX_SC_PM_CLK_BYPASS); + imx_clk_scu2("lcd_pxl_clk", lcd_pxl_sels, ARRAY_SIZE(lcd_pxl_sels), IMX_SC_R_LCD_0, IMX_SC_PM_CLK_MISC0); /* Audio SS */ imx_clk_scu("audio_pll0_clk", IMX_SC_R_AUDIO_PLL_0, IMX_SC_PM_CLK_PLL); @@ -206,18 +206,18 @@ imx_clk_scu("usb3_lpm_div", IMX_SC_R_USB_2, IMX_SC_PM_CLK_MISC); /* Display controller SS */ - imx_clk_scu2("dc0_disp0_clk", dc0_sels, ARRAY_SIZE(dc0_sels), IMX_SC_R_DC_0, IMX_SC_PM_CLK_MISC0); - imx_clk_scu2("dc0_disp1_clk", dc0_sels, ARRAY_SIZE(dc0_sels), IMX_SC_R_DC_0, IMX_SC_PM_CLK_MISC1); imx_clk_scu("dc0_pll0_clk", IMX_SC_R_DC_0_PLL_0, IMX_SC_PM_CLK_PLL); imx_clk_scu("dc0_pll1_clk", IMX_SC_R_DC_0_PLL_1, IMX_SC_PM_CLK_PLL); imx_clk_scu("dc0_bypass0_clk", IMX_SC_R_DC_0_VIDEO0, IMX_SC_PM_CLK_BYPASS); + imx_clk_scu2("dc0_disp0_clk", dc0_sels, ARRAY_SIZE(dc0_sels), IMX_SC_R_DC_0, IMX_SC_PM_CLK_MISC0); + imx_clk_scu2("dc0_disp1_clk", dc0_sels, ARRAY_SIZE(dc0_sels), IMX_SC_R_DC_0, IMX_SC_PM_CLK_MISC1); imx_clk_scu("dc0_bypass1_clk", IMX_SC_R_DC_0_VIDEO1, IMX_SC_PM_CLK_BYPASS); - imx_clk_scu2("dc1_disp0_clk", dc1_sels, ARRAY_SIZE(dc1_sels), IMX_SC_R_DC_1, IMX_SC_PM_CLK_MISC0); - imx_clk_scu2("dc1_disp1_clk", dc1_sels, ARRAY_SIZE(dc1_sels), IMX_SC_R_DC_1, IMX_SC_PM_CLK_MISC1); imx_clk_scu("dc1_pll0_clk", IMX_SC_R_DC_1_PLL_0, IMX_SC_PM_CLK_PLL); imx_clk_scu("dc1_pll1_clk", IMX_SC_R_DC_1_PLL_1, IMX_SC_PM_CLK_PLL); imx_clk_scu("dc1_bypass0_clk", IMX_SC_R_DC_1_VIDEO0, IMX_SC_PM_CLK_BYPASS); + imx_clk_scu2("dc1_disp0_clk", dc1_sels, ARRAY_SIZE(dc1_sels), IMX_SC_R_DC_1, IMX_SC_PM_CLK_MISC0); + imx_clk_scu2("dc1_disp1_clk", dc1_sels, ARRAY_SIZE(dc1_sels), IMX_SC_R_DC_1, IMX_SC_PM_CLK_MISC1); imx_clk_scu("dc1_bypass1_clk", IMX_SC_R_DC_1_VIDEO1, IMX_SC_PM_CLK_BYPASS); /* MIPI-LVDS SS */ --- linux-xilinx-6.8.0.orig/drivers/clk/imx/clk-imx93.c +++ linux-xilinx-6.8.0/drivers/clk/imx/clk-imx93.c @@ -15,6 +15,11 @@ #include "clk.h" +#define IMX93_CLK_END 208 + +#define PLAT_IMX93 BIT(0) +#define PLAT_IMX91 BIT(1) + enum clk_sel { LOW_SPEED_IO_SEL, NON_IO_SEL, @@ -33,6 +38,7 @@ static u32 share_count_sai3; static u32 share_count_mub; static u32 share_count_pdm; +static u32 share_count_spdif; static const char * const a55_core_sels[] = {"a55_alt", "arm_pll"}; static const char *parent_names[MAX_SEL][4] = { @@ -53,6 +59,7 @@ u32 off; enum clk_sel sel; unsigned long flags; + unsigned long plat; } root_array[] = { /* a55/m33/bus critical clk for system run */ { IMX93_CLK_A55_PERIPH, "a55_periph_root", 0x0000, FAST_SEL, CLK_IS_CRITICAL }, @@ -63,9 +70,9 @@ { IMX93_CLK_BUS_AON, "bus_aon_root", 0x0300, LOW_SPEED_IO_SEL, CLK_IS_CRITICAL }, { IMX93_CLK_WAKEUP_AXI, "wakeup_axi_root", 0x0380, FAST_SEL, CLK_IS_CRITICAL }, { IMX93_CLK_SWO_TRACE, "swo_trace_root", 0x0400, LOW_SPEED_IO_SEL, }, - { IMX93_CLK_M33_SYSTICK, "m33_systick_root", 0x0480, LOW_SPEED_IO_SEL, }, - { IMX93_CLK_FLEXIO1, "flexio1_root", 0x0500, LOW_SPEED_IO_SEL, }, - { IMX93_CLK_FLEXIO2, "flexio2_root", 0x0580, LOW_SPEED_IO_SEL, }, + { IMX93_CLK_M33_SYSTICK, "m33_systick_root", 0x0480, LOW_SPEED_IO_SEL, 0, PLAT_IMX93, }, + { IMX93_CLK_FLEXIO1, "flexio1_root", 0x0500, LOW_SPEED_IO_SEL, 0, PLAT_IMX93, }, + { IMX93_CLK_FLEXIO2, "flexio2_root", 0x0580, LOW_SPEED_IO_SEL, 0, PLAT_IMX93, }, { IMX93_CLK_LPTMR1, "lptmr1_root", 0x0700, LOW_SPEED_IO_SEL, }, { IMX93_CLK_LPTMR2, "lptmr2_root", 0x0780, LOW_SPEED_IO_SEL, }, { IMX93_CLK_TPM2, "tpm2_root", 0x0880, TPM_SEL, }, @@ -120,15 +127,15 @@ { IMX93_CLK_HSIO_ACSCAN_80M, "hsio_acscan_80m_root", 0x1f80, LOW_SPEED_IO_SEL, }, { IMX93_CLK_HSIO_ACSCAN_480M, "hsio_acscan_480m_root", 0x2000, MISC_SEL, }, { IMX93_CLK_NIC_AXI, "nic_axi_root", 0x2080, FAST_SEL, CLK_IS_CRITICAL, }, - { IMX93_CLK_ML_APB, "ml_apb_root", 0x2180, LOW_SPEED_IO_SEL, }, - { IMX93_CLK_ML, "ml_root", 0x2200, FAST_SEL, }, + { IMX93_CLK_ML_APB, "ml_apb_root", 0x2180, LOW_SPEED_IO_SEL, 0, PLAT_IMX93, }, + { IMX93_CLK_ML, "ml_root", 0x2200, FAST_SEL, 0, PLAT_IMX93, }, { IMX93_CLK_MEDIA_AXI, "media_axi_root", 0x2280, FAST_SEL, }, { IMX93_CLK_MEDIA_APB, "media_apb_root", 0x2300, LOW_SPEED_IO_SEL, }, - { IMX93_CLK_MEDIA_LDB, "media_ldb_root", 0x2380, VIDEO_SEL, }, + { IMX93_CLK_MEDIA_LDB, "media_ldb_root", 0x2380, VIDEO_SEL, 0, PLAT_IMX93, }, { IMX93_CLK_MEDIA_DISP_PIX, "media_disp_pix_root", 0x2400, VIDEO_SEL, }, { IMX93_CLK_CAM_PIX, "cam_pix_root", 0x2480, VIDEO_SEL, }, - { IMX93_CLK_MIPI_TEST_BYTE, "mipi_test_byte_root", 0x2500, VIDEO_SEL, }, - { IMX93_CLK_MIPI_PHY_CFG, "mipi_phy_cfg_root", 0x2580, VIDEO_SEL, }, + { IMX93_CLK_MIPI_TEST_BYTE, "mipi_test_byte_root", 0x2500, VIDEO_SEL, 0, PLAT_IMX93, }, + { IMX93_CLK_MIPI_PHY_CFG, "mipi_phy_cfg_root", 0x2580, VIDEO_SEL, 0, PLAT_IMX93, }, { IMX93_CLK_ADC, "adc_root", 0x2700, LOW_SPEED_IO_SEL, }, { IMX93_CLK_PDM, "pdm_root", 0x2780, AUDIO_SEL, }, { IMX93_CLK_TSTMR1, "tstmr1_root", 0x2800, LOW_SPEED_IO_SEL, }, @@ -137,13 +144,16 @@ { IMX93_CLK_MQS2, "mqs2_root", 0x2980, AUDIO_SEL, }, { IMX93_CLK_AUDIO_XCVR, "audio_xcvr_root", 0x2a00, NON_IO_SEL, }, { IMX93_CLK_SPDIF, "spdif_root", 0x2a80, AUDIO_SEL, }, - { IMX93_CLK_ENET, "enet_root", 0x2b00, NON_IO_SEL, }, - { IMX93_CLK_ENET_TIMER1, "enet_timer1_root", 0x2b80, LOW_SPEED_IO_SEL, }, - { IMX93_CLK_ENET_TIMER2, "enet_timer2_root", 0x2c00, LOW_SPEED_IO_SEL, }, - { IMX93_CLK_ENET_REF, "enet_ref_root", 0x2c80, NON_IO_SEL, }, - { IMX93_CLK_ENET_REF_PHY, "enet_ref_phy_root", 0x2d00, LOW_SPEED_IO_SEL, }, - { IMX93_CLK_I3C1_SLOW, "i3c1_slow_root", 0x2d80, LOW_SPEED_IO_SEL, }, - { IMX93_CLK_I3C2_SLOW, "i3c2_slow_root", 0x2e00, LOW_SPEED_IO_SEL, }, + { IMX93_CLK_ENET, "enet_root", 0x2b00, NON_IO_SEL, 0, PLAT_IMX93, }, + { IMX93_CLK_ENET_TIMER1, "enet_timer1_root", 0x2b80, LOW_SPEED_IO_SEL, 0, PLAT_IMX93, }, + { IMX93_CLK_ENET_TIMER2, "enet_timer2_root", 0x2c00, LOW_SPEED_IO_SEL, 0, PLAT_IMX93, }, + { IMX93_CLK_ENET_REF, "enet_ref_root", 0x2c80, NON_IO_SEL, 0, PLAT_IMX93, }, + { IMX93_CLK_ENET_REF_PHY, "enet_ref_phy_root", 0x2d00, LOW_SPEED_IO_SEL, 0, PLAT_IMX93, }, + { IMX91_CLK_ENET1_QOS_TSN, "enet1_qos_tsn_root", 0x2b00, NON_IO_SEL, 0, PLAT_IMX91, }, + { IMX91_CLK_ENET_TIMER, "enet_timer_root", 0x2b80, LOW_SPEED_IO_SEL, 0, PLAT_IMX91, }, + { IMX91_CLK_ENET2_REGULAR, "enet2_regular_root", 0x2c80, NON_IO_SEL, 0, PLAT_IMX91, }, + { IMX93_CLK_I3C1_SLOW, "i3c1_slow_root", 0x2d80, LOW_SPEED_IO_SEL, 0, PLAT_IMX93, }, + { IMX93_CLK_I3C2_SLOW, "i3c2_slow_root", 0x2e00, LOW_SPEED_IO_SEL, 0, PLAT_IMX93, }, { IMX93_CLK_USB_PHY_BURUNIN, "usb_phy_root", 0x2e80, LOW_SPEED_IO_SEL, }, { IMX93_CLK_PAL_CAME_SCAN, "pal_came_scan_root", 0x2f00, MISC_SEL, } }; @@ -155,6 +165,7 @@ u32 off; unsigned long flags; u32 *shared_count; + unsigned long plat; } ccgr_array[] = { { IMX93_CLK_A55_GATE, "a55_alt", "a55_alt_root", 0x8000, }, /* M33 critical clk for system run */ @@ -167,10 +178,10 @@ { IMX93_CLK_WDOG5_GATE, "wdog5", "osc_24m", 0x8400, }, { IMX93_CLK_SEMA1_GATE, "sema1", "bus_aon_root", 0x8440, }, { IMX93_CLK_SEMA2_GATE, "sema2", "bus_wakeup_root", 0x8480, }, - { IMX93_CLK_MU1_A_GATE, "mu1_a", "bus_aon_root", 0x84c0, CLK_IGNORE_UNUSED }, - { IMX93_CLK_MU2_A_GATE, "mu2_a", "bus_wakeup_root", 0x84c0, CLK_IGNORE_UNUSED }, - { IMX93_CLK_MU1_B_GATE, "mu1_b", "bus_aon_root", 0x8500, 0, &share_count_mub }, - { IMX93_CLK_MU2_B_GATE, "mu2_b", "bus_wakeup_root", 0x8500, 0, &share_count_mub }, + { IMX93_CLK_MU1_A_GATE, "mu1_a", "bus_aon_root", 0x84c0, CLK_IGNORE_UNUSED, NULL, PLAT_IMX93 }, + { IMX93_CLK_MU2_A_GATE, "mu2_a", "bus_wakeup_root", 0x84c0, CLK_IGNORE_UNUSED, NULL, PLAT_IMX93 }, + { IMX93_CLK_MU1_B_GATE, "mu1_b", "bus_aon_root", 0x8500, 0, &share_count_mub, PLAT_IMX93 }, + { IMX93_CLK_MU2_B_GATE, "mu2_b", "bus_wakeup_root", 0x8500, 0, &share_count_mub, PLAT_IMX93 }, { IMX93_CLK_EDMA1_GATE, "edma1", "m33_root", 0x8540, }, { IMX93_CLK_EDMA2_GATE, "edma2", "wakeup_axi_root", 0x8580, }, { IMX93_CLK_FLEXSPI1_GATE, "flexspi1", "flexspi1_root", 0x8640, }, @@ -178,8 +189,8 @@ { IMX93_CLK_GPIO2_GATE, "gpio2", "bus_wakeup_root", 0x88c0, }, { IMX93_CLK_GPIO3_GATE, "gpio3", "bus_wakeup_root", 0x8900, }, { IMX93_CLK_GPIO4_GATE, "gpio4", "bus_wakeup_root", 0x8940, }, - { IMX93_CLK_FLEXIO1_GATE, "flexio1", "flexio1_root", 0x8980, }, - { IMX93_CLK_FLEXIO2_GATE, "flexio2", "flexio2_root", 0x89c0, }, + { IMX93_CLK_FLEXIO1_GATE, "flexio1", "flexio1_root", 0x8980, 0, NULL, PLAT_IMX93}, + { IMX93_CLK_FLEXIO2_GATE, "flexio2", "flexio2_root", 0x89c0, 0, NULL, PLAT_IMX93}, { IMX93_CLK_LPIT1_GATE, "lpit1", "bus_aon_root", 0x8a00, }, { IMX93_CLK_LPIT2_GATE, "lpit2", "bus_wakeup_root", 0x8a40, }, { IMX93_CLK_LPTMR1_GATE, "lptmr1", "lptmr1_root", 0x8a80, }, @@ -228,10 +239,10 @@ { IMX93_CLK_SAI3_GATE, "sai3", "sai3_root", 0x94c0, 0, &share_count_sai3}, { IMX93_CLK_SAI3_IPG, "sai3_ipg_clk", "bus_wakeup_root", 0x94c0, 0, &share_count_sai3}, { IMX93_CLK_MIPI_CSI_GATE, "mipi_csi", "media_apb_root", 0x9580, }, - { IMX93_CLK_MIPI_DSI_GATE, "mipi_dsi", "media_apb_root", 0x95c0, }, - { IMX93_CLK_LVDS_GATE, "lvds", "media_ldb_root", 0x9600, }, + { IMX93_CLK_MIPI_DSI_GATE, "mipi_dsi", "media_apb_root", 0x95c0, 0, NULL, PLAT_IMX93 }, + { IMX93_CLK_LVDS_GATE, "lvds", "media_ldb_root", 0x9600, 0, NULL, PLAT_IMX93 }, { IMX93_CLK_LCDIF_GATE, "lcdif", "media_apb_root", 0x9640, }, - { IMX93_CLK_PXP_GATE, "pxp", "media_apb_root", 0x9680, }, + { IMX93_CLK_PXP_GATE, "pxp", "media_apb_root", 0x9680, 0, NULL, PLAT_IMX93 }, { IMX93_CLK_ISI_GATE, "isi", "media_apb_root", 0x96c0, }, { IMX93_CLK_NIC_MEDIA_GATE, "nic_media", "media_axi_root", 0x9700, }, { IMX93_CLK_USB_CONTROLLER_GATE, "usb_controller", "hsio_root", 0x9a00, }, @@ -242,10 +253,13 @@ { IMX93_CLK_MQS1_GATE, "mqs1", "sai1_root", 0x9b00, }, { IMX93_CLK_MQS2_GATE, "mqs2", "sai3_root", 0x9b40, }, { IMX93_CLK_AUD_XCVR_GATE, "aud_xcvr", "audio_xcvr_root", 0x9b80, }, - { IMX93_CLK_SPDIF_GATE, "spdif", "spdif_root", 0x9c00, }, + { IMX93_CLK_SPDIF_IPG, "spdif_ipg_clk", "bus_wakeup_root", 0x9c00, 0, &share_count_spdif}, + { IMX93_CLK_SPDIF_GATE, "spdif", "spdif_root", 0x9c00, 0, &share_count_spdif}, { IMX93_CLK_HSIO_32K_GATE, "hsio_32k", "osc_32k", 0x9dc0, }, - { IMX93_CLK_ENET1_GATE, "enet1", "wakeup_axi_root", 0x9e00, }, - { IMX93_CLK_ENET_QOS_GATE, "enet_qos", "wakeup_axi_root", 0x9e40, }, + { IMX93_CLK_ENET1_GATE, "enet1", "wakeup_axi_root", 0x9e00, 0, NULL, PLAT_IMX93, }, + { IMX93_CLK_ENET_QOS_GATE, "enet_qos", "wakeup_axi_root", 0x9e40, 0, NULL, PLAT_IMX93, }, + { IMX91_CLK_ENET2_REGULAR_GATE, "enet2_regular", "wakeup_axi_root", 0x9e00, 0, NULL, PLAT_IMX91, }, + { IMX91_CLK_ENET1_QOS_TSN_GATE, "enet1_qos_tsn", "wakeup_axi_root", 0x9e40, 0, NULL, PLAT_IMX91, }, /* Critical because clk accessed during CPU idle */ { IMX93_CLK_SYS_CNT_GATE, "sys_cnt", "osc_24m", 0x9e80, CLK_IS_CRITICAL}, { IMX93_CLK_TSTMR1_GATE, "tstmr1", "bus_aon_root", 0x9ec0, }, @@ -265,6 +279,7 @@ const struct imx93_clk_ccgr *ccgr; void __iomem *base, *anatop_base; int i, ret; + const unsigned long plat = (unsigned long)device_get_match_data(&pdev->dev); clk_hw_data = devm_kzalloc(dev, struct_size(clk_hw_data, hws, IMX93_CLK_END), GFP_KERNEL); @@ -314,17 +329,20 @@ for (i = 0; i < ARRAY_SIZE(root_array); i++) { root = &root_array[i]; - clks[root->clk] = imx93_clk_composite_flags(root->name, - parent_names[root->sel], - 4, base + root->off, 3, - root->flags); + if (!root->plat || root->plat & plat) + clks[root->clk] = imx93_clk_composite_flags(root->name, + parent_names[root->sel], + 4, base + root->off, 3, + root->flags); } for (i = 0; i < ARRAY_SIZE(ccgr_array); i++) { ccgr = &ccgr_array[i]; - clks[ccgr->clk] = imx93_clk_gate(NULL, ccgr->name, ccgr->parent_name, - ccgr->flags, base + ccgr->off, 0, 1, 1, 3, - ccgr->shared_count); + if (!ccgr->plat || ccgr->plat & plat) + clks[ccgr->clk] = imx93_clk_gate(NULL, + ccgr->name, ccgr->parent_name, + ccgr->flags, base + ccgr->off, 0, 1, 1, 3, + ccgr->shared_count); } clks[IMX93_CLK_A55_SEL] = imx_clk_hw_mux2("a55_sel", base + 0x4820, 0, 1, a55_core_sels, @@ -354,7 +372,8 @@ } static const struct of_device_id imx93_clk_of_match[] = { - { .compatible = "fsl,imx93-ccm" }, + { .compatible = "fsl,imx93-ccm", .data = (void *)PLAT_IMX93 }, + { .compatible = "fsl,imx91-ccm", .data = (void *)PLAT_IMX91 }, { /* Sentinel */ }, }; MODULE_DEVICE_TABLE(of, imx93_clk_of_match); --- linux-xilinx-6.8.0.orig/drivers/clk/imx/clk-lpcg-scu.c +++ linux-xilinx-6.8.0/drivers/clk/imx/clk-lpcg-scu.c @@ -6,10 +6,12 @@ #include #include +#include #include #include #include #include +#include #include "clk-scu.h" @@ -41,6 +43,29 @@ #define to_clk_lpcg_scu(_hw) container_of(_hw, struct clk_lpcg_scu, hw) +/* e10858 -LPCG clock gating register synchronization errata */ +static void lpcg_e10858_writel(unsigned long rate, void __iomem *reg, u32 val) +{ + writel(val, reg); + + if (rate >= 24 * HZ_PER_MHZ || rate == 0) { + /* + * The time taken to access the LPCG registers from the AP core + * through the interconnect is longer than the minimum delay + * of 4 clock cycles required by the errata. + * Adding a readl will provide sufficient delay to prevent + * back-to-back writes. + */ + readl(reg); + } else { + /* + * For clocks running below 24MHz, wait a minimum of + * 4 clock cycles. + */ + ndelay(4 * (DIV_ROUND_UP(1000 * HZ_PER_MHZ, rate))); + } +} + static int clk_lpcg_scu_enable(struct clk_hw *hw) { struct clk_lpcg_scu *clk = to_clk_lpcg_scu(hw); @@ -57,7 +82,8 @@ val |= CLK_GATE_SCU_LPCG_HW_SEL; reg |= val << clk->bit_idx; - writel(reg, clk->reg); + + lpcg_e10858_writel(clk_hw_get_rate(hw), clk->reg, reg); spin_unlock_irqrestore(&imx_lpcg_scu_lock, flags); @@ -74,7 +100,7 @@ reg = readl_relaxed(clk->reg); reg &= ~(CLK_GATE_SCU_LPCG_MASK << clk->bit_idx); - writel(reg, clk->reg); + lpcg_e10858_writel(clk_hw_get_rate(hw), clk->reg, reg); spin_unlock_irqrestore(&imx_lpcg_scu_lock, flags); } @@ -145,13 +171,8 @@ { struct clk_lpcg_scu *clk = dev_get_drvdata(dev); - /* - * FIXME: Sometimes writes don't work unless the CPU issues - * them twice - */ - - writel(clk->state, clk->reg); writel(clk->state, clk->reg); + lpcg_e10858_writel(0, clk->reg, clk->state); dev_dbg(dev, "restore lpcg state 0x%x\n", clk->state); return 0; --- linux-xilinx-6.8.0.orig/drivers/clk/imx/clk-scu.c +++ linux-xilinx-6.8.0/drivers/clk/imx/clk-scu.c @@ -596,7 +596,7 @@ clk->rate = clk_scu_recalc_rate(&clk->hw, 0); else clk->rate = clk_hw_get_rate(&clk->hw); - clk->is_enabled = clk_hw_is_enabled(&clk->hw); + clk->is_enabled = clk_hw_is_prepared(&clk->hw); if (clk->parent) dev_dbg(dev, "save parent %s idx %u\n", clk_hw_get_name(clk->parent), --- linux-xilinx-6.8.0.orig/drivers/clk/mediatek/Kconfig +++ linux-xilinx-6.8.0/drivers/clk/mediatek/Kconfig @@ -887,13 +887,6 @@ help This driver supports MediaTek MT8195 AI Processor Unit System clocks. -config COMMON_CLK_MT8195_AUDSYS - tristate "Clock driver for MediaTek MT8195 audsys" - depends on COMMON_CLK_MT8195 - default COMMON_CLK_MT8195 - help - This driver supports MediaTek MT8195 audsys clocks. - config COMMON_CLK_MT8195_IMP_IIC_WRAP tristate "Clock driver for MediaTek MT8195 imp_iic_wrap" depends on COMMON_CLK_MT8195 @@ -908,14 +901,6 @@ help This driver supports MediaTek MT8195 mfgcfg clocks. -config COMMON_CLK_MT8195_MSDC - tristate "Clock driver for MediaTek MT8195 msdc" - depends on COMMON_CLK_MT8195 - default COMMON_CLK_MT8195 - help - This driver supports MediaTek MT8195 MMC and SD Controller's - msdc and msdc_top clocks. - config COMMON_CLK_MT8195_SCP_ADSP tristate "Clock driver for MediaTek MT8195 scp_adsp" depends on COMMON_CLK_MT8195 --- linux-xilinx-6.8.0.orig/drivers/clk/mediatek/clk-mt2701-aud.c +++ linux-xilinx-6.8.0/drivers/clk/mediatek/clk-mt2701-aud.c @@ -55,10 +55,16 @@ GATE_DUMMY(CLK_DUMMY, "aud_dummy"), /* AUDIO0 */ GATE_AUDIO0(CLK_AUD_AFE, "audio_afe", "aud_intbus_sel", 2), + GATE_DUMMY(CLK_AUD_LRCK_DETECT, "audio_lrck_detect_dummy"), + GATE_DUMMY(CLK_AUD_I2S, "audio_i2c_dummy"), + GATE_DUMMY(CLK_AUD_APLL_TUNER, "audio_apll_tuner_dummy"), GATE_AUDIO0(CLK_AUD_HDMI, "audio_hdmi", "audpll_sel", 20), GATE_AUDIO0(CLK_AUD_SPDF, "audio_spdf", "audpll_sel", 21), GATE_AUDIO0(CLK_AUD_SPDF2, "audio_spdf2", "audpll_sel", 22), GATE_AUDIO0(CLK_AUD_APLL, "audio_apll", "audpll_sel", 23), + GATE_DUMMY(CLK_AUD_TML, "audio_tml_dummy"), + GATE_DUMMY(CLK_AUD_AHB_IDLE_EXT, "audio_ahb_idle_ext_dummy"), + GATE_DUMMY(CLK_AUD_AHB_IDLE_INT, "audio_ahb_idle_int_dummy"), /* AUDIO1 */ GATE_AUDIO1(CLK_AUD_I2SIN1, "audio_i2sin1", "aud_mux1_sel", 0), GATE_AUDIO1(CLK_AUD_I2SIN2, "audio_i2sin2", "aud_mux1_sel", 1), @@ -76,10 +82,12 @@ GATE_AUDIO1(CLK_AUD_ASRCI2, "audio_asrci2", "asm_h_sel", 13), GATE_AUDIO1(CLK_AUD_ASRCO1, "audio_asrco1", "asm_h_sel", 14), GATE_AUDIO1(CLK_AUD_ASRCO2, "audio_asrco2", "asm_h_sel", 15), + GATE_DUMMY(CLK_AUD_HDMIRX, "audio_hdmirx_dummy"), GATE_AUDIO1(CLK_AUD_INTDIR, "audio_intdir", "intdir_sel", 20), GATE_AUDIO1(CLK_AUD_A1SYS, "audio_a1sys", "aud_mux1_sel", 21), GATE_AUDIO1(CLK_AUD_A2SYS, "audio_a2sys", "aud_mux2_sel", 22), GATE_AUDIO1(CLK_AUD_AFE_CONN, "audio_afe_conn", "aud_mux1_sel", 23), + GATE_DUMMY(CLK_AUD_AFE_PCMIF, "audio_afe_pcmif_dummy"), GATE_AUDIO1(CLK_AUD_AFE_MRGIF, "audio_afe_mrgif", "aud_mux1_sel", 25), /* AUDIO2 */ GATE_AUDIO2(CLK_AUD_MMIF_UL1, "audio_ul1", "aud_mux1_sel", 0), @@ -100,6 +108,8 @@ GATE_AUDIO2(CLK_AUD_MMIF_AWB2, "audio_awb2", "aud_mux1_sel", 15), GATE_AUDIO2(CLK_AUD_MMIF_DAI, "audio_dai", "aud_mux1_sel", 16), /* AUDIO3 */ + GATE_DUMMY(CLK_AUD_DMIC1, "audio_dmic1_dummy"), + GATE_DUMMY(CLK_AUD_DMIC2, "audio_dmic2_dummy"), GATE_AUDIO3(CLK_AUD_ASRCI3, "audio_asrci3", "asm_h_sel", 2), GATE_AUDIO3(CLK_AUD_ASRCI4, "audio_asrci4", "asm_h_sel", 3), GATE_AUDIO3(CLK_AUD_ASRCI5, "audio_asrci5", "asm_h_sel", 4), --- linux-xilinx-6.8.0.orig/drivers/clk/mediatek/clk-mt2701-bdp.c +++ linux-xilinx-6.8.0/drivers/clk/mediatek/clk-mt2701-bdp.c @@ -31,6 +31,7 @@ GATE_MTK(_id, _name, _parent, &bdp1_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv) static const struct mtk_gate bdp_clks[] = { + GATE_DUMMY(CLK_DUMMY, "bdp_dummy"), GATE_BDP0(CLK_BDP_BRG_BA, "brg_baclk", "mm_sel", 0), GATE_BDP0(CLK_BDP_BRG_DRAM, "brg_dram", "mm_sel", 1), GATE_BDP0(CLK_BDP_LARB_DRAM, "larb_dram", "mm_sel", 2), --- linux-xilinx-6.8.0.orig/drivers/clk/mediatek/clk-mt2701-img.c +++ linux-xilinx-6.8.0/drivers/clk/mediatek/clk-mt2701-img.c @@ -22,6 +22,7 @@ GATE_MTK(_id, _name, _parent, &img_cg_regs, _shift, &mtk_clk_gate_ops_setclr) static const struct mtk_gate img_clks[] = { + GATE_DUMMY(CLK_DUMMY, "img_dummy"), GATE_IMG(CLK_IMG_SMI_COMM, "img_smi_comm", "mm_sel", 0), GATE_IMG(CLK_IMG_RESZ, "img_resz", "mm_sel", 1), GATE_IMG(CLK_IMG_JPGDEC_SMI, "img_jpgdec_smi", "mm_sel", 5), --- linux-xilinx-6.8.0.orig/drivers/clk/mediatek/clk-mt2701-mm.c +++ linux-xilinx-6.8.0/drivers/clk/mediatek/clk-mt2701-mm.c @@ -31,6 +31,7 @@ GATE_MTK(_id, _name, _parent, &disp1_cg_regs, _shift, &mtk_clk_gate_ops_setclr) static const struct mtk_gate mm_clks[] = { + GATE_DUMMY(CLK_DUMMY, "mm_dummy"), GATE_DISP0(CLK_MM_SMI_COMMON, "mm_smi_comm", "mm_sel", 0), GATE_DISP0(CLK_MM_SMI_LARB0, "mm_smi_larb0", "mm_sel", 1), GATE_DISP0(CLK_MM_CMDQ, "mm_cmdq", "mm_sel", 2), --- linux-xilinx-6.8.0.orig/drivers/clk/mediatek/clk-mt2701-vdec.c +++ linux-xilinx-6.8.0/drivers/clk/mediatek/clk-mt2701-vdec.c @@ -31,6 +31,7 @@ GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv) static const struct mtk_gate vdec_clks[] = { + GATE_DUMMY(CLK_DUMMY, "vdec_dummy"), GATE_VDEC0(CLK_VDEC_CKGEN, "vdec_cken", "vdec_sel", 0), GATE_VDEC1(CLK_VDEC_LARB, "vdec_larb_cken", "mm_sel", 0), }; --- linux-xilinx-6.8.0.orig/drivers/clk/mediatek/clk-mt7622-apmixedsys.c +++ linux-xilinx-6.8.0/drivers/clk/mediatek/clk-mt7622-apmixedsys.c @@ -127,7 +127,6 @@ of_clk_del_provider(node); mtk_clk_unregister_gates(apmixed_clks, ARRAY_SIZE(apmixed_clks), clk_data); mtk_clk_unregister_plls(plls, ARRAY_SIZE(plls), clk_data); - mtk_free_clk_data(clk_data); } static const struct of_device_id of_match_clk_mt7622_apmixed[] = { --- linux-xilinx-6.8.0.orig/drivers/clk/mediatek/clk-mt7981-topckgen.c +++ linux-xilinx-6.8.0/drivers/clk/mediatek/clk-mt7981-topckgen.c @@ -357,8 +357,9 @@ MUX_GATE_CLR_SET_UPD(CLK_TOP_SGM_325M_SEL, "sgm_325m_sel", sgm_325m_parents, 0x050, 0x054, 0x058, 8, 1, 15, 0x1C0, 21), - MUX_GATE_CLR_SET_UPD(CLK_TOP_SGM_REG_SEL, "sgm_reg_sel", sgm_reg_parents, - 0x050, 0x054, 0x058, 16, 1, 23, 0x1C0, 22), + MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_SGM_REG_SEL, "sgm_reg_sel", sgm_reg_parents, + 0x050, 0x054, 0x058, 16, 1, 23, 0x1C0, 22, + CLK_IS_CRITICAL | CLK_SET_RATE_PARENT), MUX_GATE_CLR_SET_UPD(CLK_TOP_EIP97B_SEL, "eip97b_sel", eip97b_parents, 0x050, 0x054, 0x058, 24, 3, 31, 0x1C0, 23), /* CLK_CFG_6 */ --- linux-xilinx-6.8.0.orig/drivers/clk/mediatek/clk-mt7988-infracfg.c +++ linux-xilinx-6.8.0/drivers/clk/mediatek/clk-mt7988-infracfg.c @@ -152,7 +152,7 @@ GATE_INFRA0(CLK_INFRA_PCIE_PERI_26M_CK_P1, "infra_pcie_peri_ck_26m_ck_p1", "csw_infra_f26m_sel", 8), GATE_INFRA0(CLK_INFRA_PCIE_PERI_26M_CK_P2, "infra_pcie_peri_ck_26m_ck_p2", - "csw_infra_f26m_sel", 9), + "infra_pcie_peri_ck_26m_ck_p3", 9), GATE_INFRA0(CLK_INFRA_PCIE_PERI_26M_CK_P3, "infra_pcie_peri_ck_26m_ck_p3", "csw_infra_f26m_sel", 10), /* INFRA1 */ --- linux-xilinx-6.8.0.orig/drivers/clk/mediatek/clk-mt8135-apmixedsys.c +++ linux-xilinx-6.8.0/drivers/clk/mediatek/clk-mt8135-apmixedsys.c @@ -59,7 +59,7 @@ ret = mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data); if (ret) - return ret; + goto free_clk_data; ret = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); if (ret) @@ -69,6 +69,8 @@ unregister_plls: mtk_clk_unregister_plls(plls, ARRAY_SIZE(plls), clk_data); +free_clk_data: + mtk_free_clk_data(clk_data); return ret; } --- linux-xilinx-6.8.0.orig/drivers/clk/mediatek/clk-mt8183-mfgcfg.c +++ linux-xilinx-6.8.0/drivers/clk/mediatek/clk-mt8183-mfgcfg.c @@ -29,6 +29,7 @@ static const struct mtk_clk_desc mfg_desc = { .clks = mfg_clks, .num_clks = ARRAY_SIZE(mfg_clks), + .need_runtime_pm = true, }; static const struct of_device_id of_match_clk_mt8183_mfg[] = { --- linux-xilinx-6.8.0.orig/drivers/clk/mediatek/clk-mt8183.c +++ linux-xilinx-6.8.0/drivers/clk/mediatek/clk-mt8183.c @@ -790,7 +790,7 @@ /* infra_sspm_26m_self is main clock in co-processor, should not be closed in Linux. */ GATE_INFRA3_FLAGS(CLK_INFRA_SSPM_26M_SELF, "infra_sspm_26m_self", "f_f26m_ck", 3, CLK_IS_CRITICAL), /* infra_sspm_32k_self is main clock in co-processor, should not be closed in Linux. */ - GATE_INFRA3_FLAGS(CLK_INFRA_SSPM_32K_SELF, "infra_sspm_32k_self", "f_f26m_ck", 4, CLK_IS_CRITICAL), + GATE_INFRA3_FLAGS(CLK_INFRA_SSPM_32K_SELF, "infra_sspm_32k_self", "clk32k", 4, CLK_IS_CRITICAL), GATE_INFRA3(CLK_INFRA_UFS_AXI, "infra_ufs_axi", "axi_sel", 5), GATE_INFRA3(CLK_INFRA_I2C6, "infra_i2c6", "i2c_sel", 6), GATE_INFRA3(CLK_INFRA_AP_MSDC0, "infra_ap_msdc0", "msdc50_hclk_sel", 7), --- linux-xilinx-6.8.0.orig/drivers/clk/mediatek/clk-mt8365-mm.c +++ linux-xilinx-6.8.0/drivers/clk/mediatek/clk-mt8365-mm.c @@ -53,7 +53,7 @@ GATE_MM0(CLK_MM_MM_DSI0, "mm_dsi0", "mm_sel", 17), GATE_MM0(CLK_MM_MM_DISP_RDMA1, "mm_disp_rdma1", "mm_sel", 18), GATE_MM0(CLK_MM_MM_MDP_RDMA1, "mm_mdp_rdma1", "mm_sel", 19), - GATE_MM0(CLK_MM_DPI0_DPI0, "mm_dpi0_dpi0", "vpll_dpix", 20), + GATE_MM0(CLK_MM_DPI0_DPI0, "mm_dpi0_dpi0", "dpi0_sel", 20), GATE_MM0(CLK_MM_MM_FAKE, "mm_fake", "mm_sel", 21), GATE_MM0(CLK_MM_MM_SMI_COMMON, "mm_smi_common", "mm_sel", 22), GATE_MM0(CLK_MM_MM_SMI_LARB0, "mm_smi_larb0", "mm_sel", 23), --- linux-xilinx-6.8.0.orig/drivers/clk/mediatek/clk-mtk.c +++ linux-xilinx-6.8.0/drivers/clk/mediatek/clk-mtk.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include "clk-mtk.h" @@ -494,6 +495,18 @@ return IS_ERR(base) ? PTR_ERR(base) : -ENOMEM; } + + if (mcd->need_runtime_pm) { + devm_pm_runtime_enable(&pdev->dev); + /* + * Do a pm_runtime_resume_and_get() to workaround a possible + * deadlock between clk_register() and the genpd framework. + */ + r = pm_runtime_resume_and_get(&pdev->dev); + if (r) + return r; + } + /* Calculate how many clk_hw_onecell_data entries to allocate */ num_clks = mcd->num_clks + mcd->num_composite_clks; num_clks += mcd->num_fixed_clks + mcd->num_factor_clks; @@ -574,6 +587,9 @@ goto unregister_clks; } + if (mcd->need_runtime_pm) + pm_runtime_put(&pdev->dev); + return r; unregister_clks: @@ -604,6 +620,9 @@ free_base: if (mcd->shared_io && base) iounmap(base); + + if (mcd->need_runtime_pm) + pm_runtime_put(&pdev->dev); return r; } --- linux-xilinx-6.8.0.orig/drivers/clk/mediatek/clk-mtk.h +++ linux-xilinx-6.8.0/drivers/clk/mediatek/clk-mtk.h @@ -237,6 +237,8 @@ int (*clk_notifier_func)(struct device *dev, struct clk *clk); unsigned int mfg_clk_idx; + + bool need_runtime_pm; }; int mtk_clk_pdev_probe(struct platform_device *pdev); --- linux-xilinx-6.8.0.orig/drivers/clk/mediatek/clk-pllfh.c +++ linux-xilinx-6.8.0/drivers/clk/mediatek/clk-pllfh.c @@ -68,7 +68,7 @@ node = of_find_compatible_node(NULL, NULL, compatible_node); if (!node) { - pr_err("cannot find \"%s\"\n", compatible_node); + pr_warn("cannot find \"%s\"\n", compatible_node); return; } --- linux-xilinx-6.8.0.orig/drivers/clk/meson/axg.c +++ linux-xilinx-6.8.0/drivers/clk/meson/axg.c @@ -2142,7 +2142,9 @@ &axg_vclk_input, &axg_vclk2_input, &axg_vclk_div, + &axg_vclk_div1, &axg_vclk2_div, + &axg_vclk2_div1, &axg_vclk_div2_en, &axg_vclk_div4_en, &axg_vclk_div6_en, --- linux-xilinx-6.8.0.orig/drivers/clk/meson/s4-peripherals.c +++ linux-xilinx-6.8.0/drivers/clk/meson/s4-peripherals.c @@ -2978,7 +2978,7 @@ .name = "pwm_j_div", .ops = &clk_regmap_divider_ops, .parent_hws = (const struct clk_hw *[]) { - &s4_pwm_h_mux.hw + &s4_pwm_j_mux.hw }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, --- linux-xilinx-6.8.0.orig/drivers/clk/meson/s4-pll.c +++ linux-xilinx-6.8.0/drivers/clk/meson/s4-pll.c @@ -38,6 +38,11 @@ .shift = 0, .width = 8, }, + .frac = { + .reg_off = ANACTRL_FIXPLL_CTRL1, + .shift = 0, + .width = 17, + }, .n = { .reg_off = ANACTRL_FIXPLL_CTRL0, .shift = 10, --- linux-xilinx-6.8.0.orig/drivers/clk/mmp/pwr-island.c +++ linux-xilinx-6.8.0/drivers/clk/mmp/pwr-island.c @@ -106,10 +106,10 @@ pm_domain->flags = flags; pm_domain->lock = lock; - pm_genpd_init(&pm_domain->genpd, NULL, true); pm_domain->genpd.name = name; pm_domain->genpd.power_on = mmp_pm_domain_power_on; pm_domain->genpd.power_off = mmp_pm_domain_power_off; + pm_genpd_init(&pm_domain->genpd, NULL, true); return &pm_domain->genpd; } --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/Kconfig +++ linux-xilinx-6.8.0/drivers/clk/qcom/Kconfig @@ -439,6 +439,7 @@ config SC_CAMCC_8280XP tristate "SC8280XP Camera Clock Controller" + depends on ARM64 || COMPILE_TEST select SC_GCC_8280XP help Support for the camera clock controller on Qualcomm Technologies, Inc @@ -936,6 +937,7 @@ config SM_GCC_8150 tristate "SM8150 Global Clock Controller" depends on ARM64 || COMPILE_TEST + select QCOM_GDSC help Support for the global clock controller on SM8150 devices. Say Y if you want to use peripheral devices such as UART, @@ -1069,6 +1071,7 @@ config SM_GPUCC_8650 tristate "SM8650 Graphics Clock Controller" + depends on ARM64 || COMPILE_TEST select SM_GCC_8650 help Support for the graphics clock controller on SM8650 devices. --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/apss-ipq-pll.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/apss-ipq-pll.c @@ -55,6 +55,29 @@ }, }; +static struct clk_alpha_pll ipq_pll_stromer = { + .offset = 0x0, + /* + * Reuse CLK_ALPHA_PLL_TYPE_STROMER_PLUS register offsets. + * Although this is a bit confusing, but the offset values + * are correct nevertheless. + */ + .regs = ipq_pll_offsets[CLK_ALPHA_PLL_TYPE_STROMER_PLUS], + .flags = SUPPORTS_DYNAMIC_UPDATE, + .clkr = { + .enable_reg = 0x0, + .enable_mask = BIT(0), + .hw.init = &(const struct clk_init_data) { + .name = "a53pll", + .parent_data = &(const struct clk_parent_data) { + .fw_name = "xo", + }, + .num_parents = 1, + .ops = &clk_alpha_pll_stromer_ops, + }, + }, +}; + static struct clk_alpha_pll ipq_pll_stromer_plus = { .offset = 0x0, .regs = ipq_pll_offsets[CLK_ALPHA_PLL_TYPE_STROMER_PLUS], @@ -73,10 +96,10 @@ }, }; +/* 1.008 GHz configuration */ static const struct alpha_pll_config ipq5018_pll_config = { - .l = 0x32, + .l = 0x2a, .config_ctl_val = 0x4001075b, - .config_ctl_hi_val = 0x304, .main_output_mask = BIT(0), .aux_output_mask = BIT(1), .early_output_mask = BIT(3), @@ -90,7 +113,6 @@ static const struct alpha_pll_config ipq5332_pll_config = { .l = 0x2d, .config_ctl_val = 0x4001075b, - .config_ctl_hi_val = 0x304, .main_output_mask = BIT(0), .aux_output_mask = BIT(1), .early_output_mask = BIT(3), @@ -144,8 +166,8 @@ }; static const struct apss_pll_data ipq5018_pll_data = { - .pll_type = CLK_ALPHA_PLL_TYPE_STROMER_PLUS, - .pll = &ipq_pll_stromer_plus, + .pll_type = CLK_ALPHA_PLL_TYPE_STROMER, + .pll = &ipq_pll_stromer, .pll_config = &ipq5018_pll_config, }; @@ -203,7 +225,8 @@ if (data->pll_type == CLK_ALPHA_PLL_TYPE_HUAYRA) clk_alpha_pll_configure(data->pll, regmap, data->pll_config); - else if (data->pll_type == CLK_ALPHA_PLL_TYPE_STROMER_PLUS) + else if (data->pll_type == CLK_ALPHA_PLL_TYPE_STROMER || + data->pll_type == CLK_ALPHA_PLL_TYPE_STROMER_PLUS) clk_stromer_pll_configure(data->pll, regmap, data->pll_config); ret = devm_clk_register_regmap(dev, &data->pll->clkr); --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/camcc-sc7280.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/camcc-sc7280.c @@ -2260,6 +2260,7 @@ .name = "cam_cc_bps_gdsc", }, .pwrsts = PWRSTS_OFF_ON, + .parent = &cam_cc_titan_top_gdsc.pd, .flags = HW_CTRL | RETAIN_FF_ENABLE, }; @@ -2269,6 +2270,7 @@ .name = "cam_cc_ife_0_gdsc", }, .pwrsts = PWRSTS_OFF_ON, + .parent = &cam_cc_titan_top_gdsc.pd, .flags = RETAIN_FF_ENABLE, }; @@ -2278,6 +2280,7 @@ .name = "cam_cc_ife_1_gdsc", }, .pwrsts = PWRSTS_OFF_ON, + .parent = &cam_cc_titan_top_gdsc.pd, .flags = RETAIN_FF_ENABLE, }; @@ -2287,6 +2290,7 @@ .name = "cam_cc_ife_2_gdsc", }, .pwrsts = PWRSTS_OFF_ON, + .parent = &cam_cc_titan_top_gdsc.pd, .flags = RETAIN_FF_ENABLE, }; @@ -2296,6 +2300,7 @@ .name = "cam_cc_ipe_0_gdsc", }, .pwrsts = PWRSTS_OFF_ON, + .parent = &cam_cc_titan_top_gdsc.pd, .flags = HW_CTRL | RETAIN_FF_ENABLE, }; --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/camcc-sc8280xp.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/camcc-sc8280xp.c @@ -630,6 +630,7 @@ F(480000000, P_CAMCC_PLL7_OUT_EVEN, 1, 0, 0), F(600000000, P_CAMCC_PLL0_OUT_MAIN, 2, 0, 0), F(760000000, P_CAMCC_PLL3_OUT_EVEN, 1, 0, 0), + { } }; static struct clk_rcg2 camcc_bps_clk_src = { @@ -654,6 +655,7 @@ F(320000000, P_CAMCC_PLL7_OUT_ODD, 1, 0, 0), F(400000000, P_CAMCC_PLL0_OUT_ODD, 1, 0, 0), F(480000000, P_CAMCC_PLL7_OUT_EVEN, 1, 0, 0), + { } }; static struct clk_rcg2 camcc_camnoc_axi_clk_src = { @@ -673,6 +675,7 @@ static const struct freq_tbl ftbl_camcc_cci_0_clk_src[] = { F(19200000, P_BI_TCXO, 1, 0, 0), F(37500000, P_CAMCC_PLL0_OUT_EVEN, 16, 0, 0), + { } }; static struct clk_rcg2 camcc_cci_0_clk_src = { @@ -735,6 +738,7 @@ F(19200000, P_BI_TCXO, 1, 0, 0), F(240000000, P_CAMCC_PLL0_OUT_EVEN, 2.5, 0, 0), F(400000000, P_CAMCC_PLL0_OUT_ODD, 1, 0, 0), + { } }; static struct clk_rcg2 camcc_cphy_rx_clk_src = { @@ -754,6 +758,7 @@ static const struct freq_tbl ftbl_camcc_csi0phytimer_clk_src[] = { F(19200000, P_BI_TCXO, 1, 0, 0), F(300000000, P_CAMCC_PLL0_OUT_EVEN, 2, 0, 0), + { } }; static struct clk_rcg2 camcc_csi0phytimer_clk_src = { @@ -818,6 +823,7 @@ F(200000000, P_CAMCC_PLL0_OUT_EVEN, 3, 0, 0), F(300000000, P_CAMCC_PLL0_OUT_MAIN, 4, 0, 0), F(400000000, P_CAMCC_PLL0_OUT_MAIN, 3, 0, 0), + { } }; static struct clk_rcg2 camcc_fast_ahb_clk_src = { @@ -838,6 +844,7 @@ F(19200000, P_BI_TCXO, 1, 0, 0), F(400000000, P_CAMCC_PLL0_OUT_ODD, 1, 0, 0), F(600000000, P_CAMCC_PLL0_OUT_MAIN, 2, 0, 0), + { } }; static struct clk_rcg2 camcc_icp_clk_src = { @@ -860,6 +867,7 @@ F(558000000, P_CAMCC_PLL3_OUT_EVEN, 1, 0, 0), F(637000000, P_CAMCC_PLL3_OUT_EVEN, 1, 0, 0), F(760000000, P_CAMCC_PLL3_OUT_EVEN, 1, 0, 0), + { } }; static struct clk_rcg2 camcc_ife_0_clk_src = { @@ -883,6 +891,7 @@ F(400000000, P_CAMCC_PLL0_OUT_ODD, 1, 0, 0), F(480000000, P_CAMCC_PLL7_OUT_EVEN, 1, 0, 0), F(600000000, P_CAMCC_PLL0_OUT_MAIN, 2, 0, 0), + { } }; static struct clk_rcg2 camcc_ife_0_csid_clk_src = { @@ -905,6 +914,7 @@ F(558000000, P_CAMCC_PLL4_OUT_EVEN, 1, 0, 0), F(637000000, P_CAMCC_PLL4_OUT_EVEN, 1, 0, 0), F(760000000, P_CAMCC_PLL4_OUT_EVEN, 1, 0, 0), + { } }; static struct clk_rcg2 camcc_ife_1_clk_src = { @@ -941,6 +951,7 @@ F(558000000, P_CAMCC_PLL5_OUT_EVEN, 1, 0, 0), F(637000000, P_CAMCC_PLL5_OUT_EVEN, 1, 0, 0), F(760000000, P_CAMCC_PLL5_OUT_EVEN, 1, 0, 0), + { } }; static struct clk_rcg2 camcc_ife_2_clk_src = { @@ -962,6 +973,7 @@ F(400000000, P_CAMCC_PLL0_OUT_ODD, 1, 0, 0), F(480000000, P_CAMCC_PLL7_OUT_EVEN, 1, 0, 0), F(600000000, P_CAMCC_PLL0_OUT_MAIN, 2, 0, 0), + { } }; static struct clk_rcg2 camcc_ife_2_csid_clk_src = { @@ -984,6 +996,7 @@ F(558000000, P_CAMCC_PLL6_OUT_EVEN, 1, 0, 0), F(637000000, P_CAMCC_PLL6_OUT_EVEN, 1, 0, 0), F(760000000, P_CAMCC_PLL6_OUT_EVEN, 1, 0, 0), + { } }; static struct clk_rcg2 camcc_ife_3_clk_src = { @@ -1020,6 +1033,7 @@ F(400000000, P_CAMCC_PLL0_OUT_ODD, 1, 0, 0), F(480000000, P_CAMCC_PLL7_OUT_EVEN, 1, 0, 0), F(600000000, P_CAMCC_PLL0_OUT_MAIN, 2, 0, 0), + { } }; static struct clk_rcg2 camcc_ife_lite_0_clk_src = { @@ -1140,6 +1154,7 @@ F(475000000, P_CAMCC_PLL1_OUT_EVEN, 1, 0, 0), F(520000000, P_CAMCC_PLL1_OUT_EVEN, 1, 0, 0), F(600000000, P_CAMCC_PLL1_OUT_EVEN, 1, 0, 0), + { } }; static struct clk_rcg2 camcc_ipe_0_clk_src = { @@ -1163,6 +1178,7 @@ F(400000000, P_CAMCC_PLL0_OUT_ODD, 1, 0, 0), F(480000000, P_CAMCC_PLL7_OUT_EVEN, 1, 0, 0), F(600000000, P_CAMCC_PLL0_OUT_MAIN, 2, 0, 0), + { } }; static struct clk_rcg2 camcc_jpeg_clk_src = { @@ -1184,6 +1200,7 @@ F(300000000, P_CAMCC_PLL0_OUT_EVEN, 2, 0, 0), F(320000000, P_CAMCC_PLL7_OUT_ODD, 1, 0, 0), F(400000000, P_CAMCC_PLL0_OUT_MAIN, 3, 0, 0), + { } }; static struct clk_rcg2 camcc_lrme_clk_src = { @@ -1204,6 +1221,7 @@ F(19200000, P_BI_TCXO, 1, 0, 0), F(24000000, P_CAMCC_PLL2_OUT_EARLY, 10, 1, 4), F(64000000, P_CAMCC_PLL2_OUT_EARLY, 15, 0, 0), + { } }; static struct clk_rcg2 camcc_mclk0_clk_src = { @@ -1320,6 +1338,7 @@ static const struct freq_tbl ftbl_camcc_sleep_clk_src[] = { F(32000, P_SLEEP_CLK, 1, 0, 0), + { } }; static struct clk_rcg2 camcc_sleep_clk_src = { @@ -1339,6 +1358,7 @@ static const struct freq_tbl ftbl_camcc_slow_ahb_clk_src[] = { F(19200000, P_BI_TCXO, 1, 0, 0), F(80000000, P_CAMCC_PLL7_OUT_EVEN, 6, 0, 0), + { } }; static struct clk_rcg2 camcc_slow_ahb_clk_src = { @@ -1357,6 +1377,7 @@ static const struct freq_tbl ftbl_camcc_xo_clk_src[] = { F(19200000, P_BI_TCXO, 1, 0, 0), + { } }; static struct clk_rcg2 camcc_xo_clk_src = { --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/clk-alpha-pll.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/clk-alpha-pll.c @@ -40,7 +40,7 @@ #define PLL_USER_CTL(p) ((p)->offset + (p)->regs[PLL_OFF_USER_CTL]) # define PLL_POST_DIV_SHIFT 8 -# define PLL_POST_DIV_MASK(p) GENMASK((p)->width, 0) +# define PLL_POST_DIV_MASK(p) GENMASK((p)->width ? (p)->width - 1 : 3, 0) # define PLL_ALPHA_EN BIT(24) # define PLL_ALPHA_MODE BIT(25) # define PLL_VCO_SHIFT 20 @@ -52,6 +52,7 @@ #define PLL_CONFIG_CTL(p) ((p)->offset + (p)->regs[PLL_OFF_CONFIG_CTL]) #define PLL_CONFIG_CTL_U(p) ((p)->offset + (p)->regs[PLL_OFF_CONFIG_CTL_U]) #define PLL_CONFIG_CTL_U1(p) ((p)->offset + (p)->regs[PLL_OFF_CONFIG_CTL_U1]) +#define PLL_CONFIG_CTL_U2(p) ((p)->offset + (p)->regs[PLL_OFF_CONFIG_CTL_U2]) #define PLL_TEST_CTL(p) ((p)->offset + (p)->regs[PLL_OFF_TEST_CTL]) #define PLL_TEST_CTL_U(p) ((p)->offset + (p)->regs[PLL_OFF_TEST_CTL_U]) #define PLL_TEST_CTL_U1(p) ((p)->offset + (p)->regs[PLL_OFF_TEST_CTL_U1]) @@ -212,7 +213,6 @@ [PLL_OFF_USER_CTL] = 0x18, [PLL_OFF_USER_CTL_U] = 0x1c, [PLL_OFF_CONFIG_CTL] = 0x20, - [PLL_OFF_CONFIG_CTL_U] = 0xff, [PLL_OFF_TEST_CTL] = 0x30, [PLL_OFF_TEST_CTL_U] = 0x34, [PLL_OFF_STATUS] = 0x28, @@ -228,6 +228,32 @@ [PLL_OFF_ALPHA_VAL] = 0x24, [PLL_OFF_ALPHA_VAL_U] = 0x28, }, + [CLK_ALPHA_PLL_TYPE_ZONDA_OLE] = { + [PLL_OFF_L_VAL] = 0x04, + [PLL_OFF_ALPHA_VAL] = 0x08, + [PLL_OFF_USER_CTL] = 0x0c, + [PLL_OFF_USER_CTL_U] = 0x10, + [PLL_OFF_CONFIG_CTL] = 0x14, + [PLL_OFF_CONFIG_CTL_U] = 0x18, + [PLL_OFF_CONFIG_CTL_U1] = 0x1c, + [PLL_OFF_CONFIG_CTL_U2] = 0x20, + [PLL_OFF_TEST_CTL] = 0x24, + [PLL_OFF_TEST_CTL_U] = 0x28, + [PLL_OFF_TEST_CTL_U1] = 0x2c, + [PLL_OFF_OPMODE] = 0x30, + [PLL_OFF_STATUS] = 0x3c, + }, + [CLK_ALPHA_PLL_TYPE_NSS_HUAYRA] = { + [PLL_OFF_L_VAL] = 0x04, + [PLL_OFF_ALPHA_VAL] = 0x08, + [PLL_OFF_TEST_CTL] = 0x0c, + [PLL_OFF_TEST_CTL_U] = 0x10, + [PLL_OFF_USER_CTL] = 0x14, + [PLL_OFF_CONFIG_CTL] = 0x18, + [PLL_OFF_CONFIG_CTL_U] = 0x1c, + [PLL_OFF_STATUS] = 0x20, + }, + }; EXPORT_SYMBOL_GPL(clk_alpha_pll_regs); @@ -382,6 +408,8 @@ mask |= config->pre_div_mask; mask |= config->post_div_mask; mask |= config->vco_mask; + mask |= config->alpha_en_mask; + mask |= config->alpha_mode_mask; regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val); @@ -1480,8 +1508,8 @@ } return regmap_update_bits(regmap, PLL_USER_CTL(pll), - PLL_POST_DIV_MASK(pll) << PLL_POST_DIV_SHIFT, - val << PLL_POST_DIV_SHIFT); + PLL_POST_DIV_MASK(pll) << pll->post_div_shift, + val << pll->post_div_shift); } const struct clk_ops clk_alpha_pll_postdiv_trion_ops = { @@ -1640,7 +1668,7 @@ if (ret < 0) return ret; - regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l); + regmap_update_bits(pll->clkr.regmap, PLL_L_VAL(pll), LUCID_EVO_PLL_L_VAL_MASK, l); regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a); /* Latch the PLL input */ @@ -1759,6 +1787,58 @@ }; EXPORT_SYMBOL_GPL(clk_alpha_pll_agera_ops); +/** + * clk_lucid_5lpe_pll_configure - configure the lucid 5lpe pll + * + * @pll: clk alpha pll + * @regmap: register map + * @config: configuration to apply for pll + */ +void clk_lucid_5lpe_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, + const struct alpha_pll_config *config) +{ + /* + * If the bootloader left the PLL enabled it's likely that there are + * RCGs that will lock up if we disable the PLL below. + */ + if (trion_pll_is_enabled(pll, regmap)) { + pr_debug("Lucid 5LPE PLL is already enabled, skipping configuration\n"); + return; + } + + clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l); + regmap_write(regmap, PLL_CAL_L_VAL(pll), TRION_PLL_CAL_VAL); + clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha); + clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), + config->config_ctl_val); + clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), + config->config_ctl_hi_val); + clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), + config->config_ctl_hi1_val); + clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), + config->user_ctl_val); + clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll), + config->user_ctl_hi_val); + clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U1(pll), + config->user_ctl_hi1_val); + clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), + config->test_ctl_val); + clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), + config->test_ctl_hi_val); + clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), + config->test_ctl_hi1_val); + + /* Disable PLL output */ + regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0); + + /* Set operation mode to OFF */ + regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY); + + /* Place the PLL in STANDBY mode */ + regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N); +} +EXPORT_SYMBOL_GPL(clk_lucid_5lpe_pll_configure); + static int alpha_pll_lucid_5lpe_enable(struct clk_hw *hw) { struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); @@ -2474,6 +2554,8 @@ rate = alpha_pll_round_rate(rate, prate, &l, &a, ALPHA_REG_BITWIDTH); regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l); + + a <<= ALPHA_REG_BITWIDTH - ALPHA_BITWIDTH; regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a); regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll), a >> ALPHA_BITWIDTH); @@ -2538,6 +2620,9 @@ regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll), a >> ALPHA_BITWIDTH); + regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll), + PLL_ALPHA_EN, PLL_ALPHA_EN); + regmap_write(pll->clkr.regmap, PLL_MODE(pll), PLL_BYPASSNL); /* Wait five micro seconds or more */ --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/clk-alpha-pll.h +++ linux-xilinx-6.8.0/drivers/clk/qcom/clk-alpha-pll.h @@ -21,6 +21,7 @@ CLK_ALPHA_PLL_TYPE_LUCID = CLK_ALPHA_PLL_TYPE_TRION, CLK_ALPHA_PLL_TYPE_AGERA, CLK_ALPHA_PLL_TYPE_ZONDA, + CLK_ALPHA_PLL_TYPE_ZONDA_OLE, CLK_ALPHA_PLL_TYPE_LUCID_EVO, CLK_ALPHA_PLL_TYPE_LUCID_OLE, CLK_ALPHA_PLL_TYPE_RIVIAN_EVO, @@ -28,6 +29,7 @@ CLK_ALPHA_PLL_TYPE_BRAMMO_EVO, CLK_ALPHA_PLL_TYPE_STROMER, CLK_ALPHA_PLL_TYPE_STROMER_PLUS, + CLK_ALPHA_PLL_TYPE_NSS_HUAYRA, CLK_ALPHA_PLL_TYPE_MAX, }; @@ -42,6 +44,7 @@ PLL_OFF_CONFIG_CTL, PLL_OFF_CONFIG_CTL_U, PLL_OFF_CONFIG_CTL_U1, + PLL_OFF_CONFIG_CTL_U2, PLL_OFF_TEST_CTL, PLL_OFF_TEST_CTL_U, PLL_OFF_TEST_CTL_U1, @@ -119,6 +122,7 @@ u32 config_ctl_val; u32 config_ctl_hi_val; u32 config_ctl_hi1_val; + u32 config_ctl_hi2_val; u32 user_ctl_val; u32 user_ctl_hi_val; u32 user_ctl_hi1_val; @@ -173,6 +177,7 @@ extern const struct clk_ops clk_alpha_pll_zonda_ops; #define clk_alpha_pll_postdiv_zonda_ops clk_alpha_pll_postdiv_fabia_ops +#define clk_alpha_pll_zonda_ole_ops clk_alpha_pll_zonda_ops extern const struct clk_ops clk_alpha_pll_lucid_evo_ops; extern const struct clk_ops clk_alpha_pll_reset_lucid_evo_ops; @@ -198,6 +203,8 @@ void clk_zonda_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config); +void clk_lucid_5lpe_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, + const struct alpha_pll_config *config); void clk_lucid_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config); void clk_lucid_ole_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/clk-rcg.h +++ linux-xilinx-6.8.0/drivers/clk/qcom/clk-rcg.h @@ -176,6 +176,8 @@ extern const struct clk_ops clk_pixel_ops; extern const struct clk_ops clk_gfx3d_ops; extern const struct clk_ops clk_rcg2_shared_ops; +extern const struct clk_ops clk_rcg2_shared_floor_ops; +extern const struct clk_ops clk_rcg2_shared_no_init_park_ops; extern const struct clk_ops clk_dp_ops; struct clk_rcg_dfs_data { --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/clk-rcg2.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/clk-rcg2.c @@ -1020,15 +1020,23 @@ return clk_rcg2_clear_force_enable(hw); } -static int clk_rcg2_shared_set_rate(struct clk_hw *hw, unsigned long rate, - unsigned long parent_rate) +static int __clk_rcg2_shared_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate, + enum freq_policy policy) { struct clk_rcg2 *rcg = to_clk_rcg2(hw); const struct freq_tbl *f; - f = qcom_find_freq(rcg->freq_tbl, rate); - if (!f) + switch (policy) { + case FLOOR: + f = qcom_find_freq_floor(rcg->freq_tbl, rate); + break; + case CEIL: + f = qcom_find_freq(rcg->freq_tbl, rate); + break; + default: return -EINVAL; + } /* * In case clock is disabled, update the M, N and D registers, cache @@ -1041,10 +1049,28 @@ return clk_rcg2_shared_force_enable_clear(hw, f); } +static int clk_rcg2_shared_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) +{ + return __clk_rcg2_shared_set_rate(hw, rate, parent_rate, CEIL); +} + static int clk_rcg2_shared_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate, u8 index) { - return clk_rcg2_shared_set_rate(hw, rate, parent_rate); + return __clk_rcg2_shared_set_rate(hw, rate, parent_rate, CEIL); +} + +static int clk_rcg2_shared_set_floor_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) +{ + return __clk_rcg2_shared_set_rate(hw, rate, parent_rate, FLOOR); +} + +static int clk_rcg2_shared_set_floor_rate_and_parent(struct clk_hw *hw, + unsigned long rate, unsigned long parent_rate, u8 index) +{ + return __clk_rcg2_shared_set_rate(hw, rate, parent_rate, FLOOR); } static int clk_rcg2_shared_enable(struct clk_hw *hw) @@ -1138,7 +1164,39 @@ return clk_rcg2_recalc_rate(hw, parent_rate); } +static int clk_rcg2_shared_init(struct clk_hw *hw) +{ + /* + * This does a few things: + * + * 1. Sets rcg->parked_cfg to reflect the value at probe so that the + * proper parent is reported from clk_rcg2_shared_get_parent(). + * + * 2. Clears the force enable bit of the RCG because we rely on child + * clks (branches) to turn the RCG on/off with a hardware feedback + * mechanism and only set the force enable bit in the RCG when we + * want to make sure the clk stays on for parent switches or + * parking. + * + * 3. Parks shared RCGs on the safe source at registration because we + * can't be certain that the parent clk will stay on during boot, + * especially if the parent is shared. If this RCG is enabled at + * boot, and the parent is turned off, the RCG will get stuck on. A + * GDSC can wedge if is turned on and the RCG is stuck on because + * the GDSC's controller will hang waiting for the clk status to + * toggle on when it never does. + * + * The safest option here is to "park" the RCG at init so that the clk + * can never get stuck on or off. This ensures the GDSC can't get + * wedged. + */ + clk_rcg2_shared_disable(hw); + + return 0; +} + const struct clk_ops clk_rcg2_shared_ops = { + .init = clk_rcg2_shared_init, .enable = clk_rcg2_shared_enable, .disable = clk_rcg2_shared_disable, .get_parent = clk_rcg2_shared_get_parent, @@ -1150,6 +1208,48 @@ }; EXPORT_SYMBOL_GPL(clk_rcg2_shared_ops); +const struct clk_ops clk_rcg2_shared_floor_ops = { + .enable = clk_rcg2_shared_enable, + .disable = clk_rcg2_shared_disable, + .get_parent = clk_rcg2_shared_get_parent, + .set_parent = clk_rcg2_shared_set_parent, + .recalc_rate = clk_rcg2_shared_recalc_rate, + .determine_rate = clk_rcg2_determine_floor_rate, + .set_rate = clk_rcg2_shared_set_floor_rate, + .set_rate_and_parent = clk_rcg2_shared_set_floor_rate_and_parent, +}; +EXPORT_SYMBOL_GPL(clk_rcg2_shared_floor_ops); + +static int clk_rcg2_shared_no_init_park(struct clk_hw *hw) +{ + struct clk_rcg2 *rcg = to_clk_rcg2(hw); + + /* + * Read the config register so that the parent is properly mapped at + * registration time. + */ + regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, &rcg->parked_cfg); + + return 0; +} + +/* + * Like clk_rcg2_shared_ops but skip the init so that the clk frequency is left + * unchanged at registration time. + */ +const struct clk_ops clk_rcg2_shared_no_init_park_ops = { + .init = clk_rcg2_shared_no_init_park, + .enable = clk_rcg2_shared_enable, + .disable = clk_rcg2_shared_disable, + .get_parent = clk_rcg2_shared_get_parent, + .set_parent = clk_rcg2_shared_set_parent, + .recalc_rate = clk_rcg2_shared_recalc_rate, + .determine_rate = clk_rcg2_determine_rate, + .set_rate = clk_rcg2_shared_set_rate, + .set_rate_and_parent = clk_rcg2_shared_set_rate_and_parent, +}; +EXPORT_SYMBOL_GPL(clk_rcg2_shared_no_init_park_ops); + /* Common APIs to be used for DFS based RCGR */ static void clk_rcg2_dfs_populate_freq(struct clk_hw *hw, unsigned int l, struct freq_tbl *f) --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/clk-rpmh.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/clk-rpmh.c @@ -263,6 +263,8 @@ cmd_state = 0; } + cmd_state = min(cmd_state, BCM_TCS_CMD_VOTE_MASK); + if (c->last_sent_aggr_state != cmd_state) { cmd.addr = c->res_addr; cmd.data = BCM_TCS_CMD(1, enable, 0, cmd_state); @@ -327,7 +329,7 @@ { struct clk_rpmh *c = to_clk_rpmh(hw); - return c->aggr_state * c->unit; + return (unsigned long)c->aggr_state * c->unit; } static const struct clk_ops clk_rpmh_bcm_ops = { @@ -387,6 +389,18 @@ DEFINE_CLK_RPMH_BCM(pka, "PKA0"); DEFINE_CLK_RPMH_BCM(qpic_clk, "QP0"); +static struct clk_hw *sar2130p_rpmh_clocks[] = { + [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div1.hw, + [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div1_ao.hw, + [RPMH_RF_CLK1] = &clk_rpmh_rf_clk1_a.hw, + [RPMH_RF_CLK1_A] = &clk_rpmh_rf_clk1_a_ao.hw, +}; + +static const struct clk_rpmh_desc clk_rpmh_sar2130p = { + .clks = sar2130p_rpmh_clocks, + .num_clks = ARRAY_SIZE(sar2130p_rpmh_clocks), +}; + static struct clk_hw *sdm845_rpmh_clocks[] = { [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div2.hw, [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div2_ao.hw, @@ -878,6 +892,7 @@ static const struct of_device_id clk_rpmh_match_table[] = { { .compatible = "qcom,qdu1000-rpmh-clk", .data = &clk_rpmh_qdu1000}, { .compatible = "qcom,sa8775p-rpmh-clk", .data = &clk_rpmh_sa8775p}, + { .compatible = "qcom,sar2130p-rpmh-clk", .data = &clk_rpmh_sar2130p}, { .compatible = "qcom,sc7180-rpmh-clk", .data = &clk_rpmh_sc7180}, { .compatible = "qcom,sc8180x-rpmh-clk", .data = &clk_rpmh_sc8180x}, { .compatible = "qcom,sc8280xp-rpmh-clk", .data = &clk_rpmh_sc8280xp}, --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/clk-smd-rpm.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/clk-smd-rpm.c @@ -768,6 +768,7 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8976 = { .clks = msm8976_clks, + .num_clks = ARRAY_SIZE(msm8976_clks), .icc_clks = bimc_pcnoc_snoc_smmnoc_icc_clks, .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_smmnoc_icc_clks), }; --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/common.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/common.c @@ -208,11 +208,9 @@ static void qcom_cc_drop_protected(struct device *dev, struct qcom_cc *cc) { struct device_node *np = dev->of_node; - struct property *prop; - const __be32 *p; u32 i; - of_property_for_each_u32(np, "protected-clocks", prop, p, i) { + of_property_for_each_u32(np, "protected-clocks", i) { if (i >= cc->num_rclks) continue; --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/dispcc-sdm845.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/dispcc-sdm845.c @@ -759,6 +759,8 @@ static struct gdsc mdss_gdsc = { .gdscr = 0x3000, + .en_few_wait_val = 0x6, + .en_rest_wait_val = 0x5, .pd = { .name = "mdss_gdsc", }, --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/dispcc-sm6350.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/dispcc-sm6350.c @@ -187,13 +187,12 @@ .cmd_rcgr = 0x1144, .mnd_width = 0, .hid_width = 5, + .parent_map = disp_cc_parent_map_6, .freq_tbl = ftbl_disp_cc_mdss_dp_aux_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_aux_clk_src", - .parent_data = &(const struct clk_parent_data){ - .fw_name = "bi_tcxo", - }, - .num_parents = 1, + .parent_data = disp_cc_parent_data_6, + .num_parents = ARRAY_SIZE(disp_cc_parent_data_6), .ops = &clk_rcg2_ops, }, }; @@ -221,26 +220,17 @@ }, }; -static const struct freq_tbl ftbl_disp_cc_mdss_dp_link_clk_src[] = { - F(162000, P_DP_PHY_PLL_LINK_CLK, 1, 0, 0), - F(270000, P_DP_PHY_PLL_LINK_CLK, 1, 0, 0), - F(540000, P_DP_PHY_PLL_LINK_CLK, 1, 0, 0), - F(810000, P_DP_PHY_PLL_LINK_CLK, 1, 0, 0), - { } -}; - static struct clk_rcg2 disp_cc_mdss_dp_link_clk_src = { .cmd_rcgr = 0x10f8, .mnd_width = 0, .hid_width = 5, .parent_map = disp_cc_parent_map_0, - .freq_tbl = ftbl_disp_cc_mdss_dp_link_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "disp_cc_mdss_dp_link_clk_src", .parent_data = disp_cc_parent_data_0, .num_parents = ARRAY_SIZE(disp_cc_parent_data_0), .flags = CLK_SET_RATE_PARENT | CLK_GET_RATE_NOCACHE, - .ops = &clk_rcg2_ops, + .ops = &clk_byte2_ops, }, }; --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/dispcc-sm8250.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/dispcc-sm8250.c @@ -851,6 +851,7 @@ &disp_cc_mdss_dp_link1_div_clk_src.clkr.hw, }, .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, }, }, @@ -886,6 +887,7 @@ &disp_cc_mdss_dp_link_div_clk_src.clkr.hw, }, .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, }, }, @@ -1011,6 +1013,7 @@ &disp_cc_mdss_mdp_clk_src.clkr.hw, }, .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, }, }, @@ -1359,8 +1362,13 @@ disp_cc_sm8250_clocks[DISP_CC_MDSS_EDP_GTC_CLK_SRC] = NULL; } - clk_lucid_pll_configure(&disp_cc_pll0, regmap, &disp_cc_pll0_config); - clk_lucid_pll_configure(&disp_cc_pll1, regmap, &disp_cc_pll1_config); + if (of_device_is_compatible(pdev->dev.of_node, "qcom,sm8350-dispcc")) { + clk_lucid_5lpe_pll_configure(&disp_cc_pll0, regmap, &disp_cc_pll0_config); + clk_lucid_5lpe_pll_configure(&disp_cc_pll1, regmap, &disp_cc_pll1_config); + } else { + clk_lucid_pll_configure(&disp_cc_pll0, regmap, &disp_cc_pll0_config); + clk_lucid_pll_configure(&disp_cc_pll1, regmap, &disp_cc_pll1_config); + } /* Enable clock gating for MDP clocks */ regmap_update_bits(regmap, 0x8000, 0x10, 0x10); --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/dispcc-sm8450.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/dispcc-sm8450.c @@ -309,26 +309,17 @@ }, }; -static const struct freq_tbl ftbl_disp_cc_mdss_dptx0_link_clk_src[] = { - F(162000, P_DP0_PHY_PLL_LINK_CLK, 1, 0, 0), - F(270000, P_DP0_PHY_PLL_LINK_CLK, 1, 0, 0), - F(540000, P_DP0_PHY_PLL_LINK_CLK, 1, 0, 0), - F(810000, P_DP0_PHY_PLL_LINK_CLK, 1, 0, 0), - { } -}; - static struct clk_rcg2 disp_cc_mdss_dptx0_link_clk_src = { .cmd_rcgr = 0x819c, .mnd_width = 0, .hid_width = 5, .parent_map = disp_cc_parent_map_3, - .freq_tbl = ftbl_disp_cc_mdss_dptx0_link_clk_src, .clkr.hw.init = &(struct clk_init_data) { .name = "disp_cc_mdss_dptx0_link_clk_src", .parent_data = disp_cc_parent_data_3, .num_parents = ARRAY_SIZE(disp_cc_parent_data_3), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, + .ops = &clk_byte2_ops, }, }; @@ -382,13 +373,12 @@ .mnd_width = 0, .hid_width = 5, .parent_map = disp_cc_parent_map_3, - .freq_tbl = ftbl_disp_cc_mdss_dptx0_link_clk_src, .clkr.hw.init = &(struct clk_init_data) { .name = "disp_cc_mdss_dptx1_link_clk_src", .parent_data = disp_cc_parent_data_3, .num_parents = ARRAY_SIZE(disp_cc_parent_data_3), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, + .ops = &clk_byte2_ops, }, }; @@ -442,13 +432,12 @@ .mnd_width = 0, .hid_width = 5, .parent_map = disp_cc_parent_map_3, - .freq_tbl = ftbl_disp_cc_mdss_dptx0_link_clk_src, .clkr.hw.init = &(struct clk_init_data) { .name = "disp_cc_mdss_dptx2_link_clk_src", .parent_data = disp_cc_parent_data_3, .num_parents = ARRAY_SIZE(disp_cc_parent_data_3), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, + .ops = &clk_byte2_ops, }, }; @@ -502,13 +491,12 @@ .mnd_width = 0, .hid_width = 5, .parent_map = disp_cc_parent_map_3, - .freq_tbl = ftbl_disp_cc_mdss_dptx0_link_clk_src, .clkr.hw.init = &(struct clk_init_data) { .name = "disp_cc_mdss_dptx3_link_clk_src", .parent_data = disp_cc_parent_data_3, .num_parents = ARRAY_SIZE(disp_cc_parent_data_3), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, + .ops = &clk_byte2_ops, }, }; --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/dispcc-sm8550.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/dispcc-sm8550.c @@ -196,7 +196,7 @@ static const struct parent_map disp_cc_parent_map_4[] = { { P_BI_TCXO, 0 }, { P_DP0_PHY_PLL_LINK_CLK, 1 }, - { P_DP1_PHY_PLL_VCO_DIV_CLK, 2 }, + { P_DP0_PHY_PLL_VCO_DIV_CLK, 2 }, { P_DP3_PHY_PLL_VCO_DIV_CLK, 3 }, { P_DP1_PHY_PLL_VCO_DIV_CLK, 4 }, { P_DP2_PHY_PLL_VCO_DIV_CLK, 6 }, @@ -213,7 +213,7 @@ static const struct parent_map disp_cc_parent_map_5[] = { { P_BI_TCXO, 0 }, - { P_DSI0_PHY_PLL_OUT_BYTECLK, 4 }, + { P_DSI0_PHY_PLL_OUT_BYTECLK, 2 }, { P_DSI1_PHY_PLL_OUT_BYTECLK, 4 }, }; @@ -345,26 +345,17 @@ }, }; -static const struct freq_tbl ftbl_disp_cc_mdss_dptx0_link_clk_src[] = { - F(162000, P_DP0_PHY_PLL_LINK_CLK, 1, 0, 0), - F(270000, P_DP0_PHY_PLL_LINK_CLK, 1, 0, 0), - F(540000, P_DP0_PHY_PLL_LINK_CLK, 1, 0, 0), - F(810000, P_DP0_PHY_PLL_LINK_CLK, 1, 0, 0), - { } -}; - static struct clk_rcg2 disp_cc_mdss_dptx0_link_clk_src = { .cmd_rcgr = 0x8170, .mnd_width = 0, .hid_width = 5, .parent_map = disp_cc_parent_map_7, - .freq_tbl = ftbl_disp_cc_mdss_dptx0_link_clk_src, .clkr.hw.init = &(struct clk_init_data) { .name = "disp_cc_mdss_dptx0_link_clk_src", .parent_data = disp_cc_parent_data_7, .num_parents = ARRAY_SIZE(disp_cc_parent_data_7), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, + .ops = &clk_byte2_ops, }, }; @@ -409,7 +400,7 @@ .parent_data = disp_cc_parent_data_0, .num_parents = ARRAY_SIZE(disp_cc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_dp_ops, + .ops = &clk_rcg2_ops, }, }; @@ -418,13 +409,12 @@ .mnd_width = 0, .hid_width = 5, .parent_map = disp_cc_parent_map_3, - .freq_tbl = ftbl_disp_cc_mdss_dptx0_link_clk_src, .clkr.hw.init = &(struct clk_init_data) { .name = "disp_cc_mdss_dptx1_link_clk_src", .parent_data = disp_cc_parent_data_3, .num_parents = ARRAY_SIZE(disp_cc_parent_data_3), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, + .ops = &clk_byte2_ops, }, }; @@ -478,13 +468,12 @@ .mnd_width = 0, .hid_width = 5, .parent_map = disp_cc_parent_map_3, - .freq_tbl = ftbl_disp_cc_mdss_dptx0_link_clk_src, .clkr.hw.init = &(struct clk_init_data) { .name = "disp_cc_mdss_dptx2_link_clk_src", .parent_data = disp_cc_parent_data_3, .num_parents = ARRAY_SIZE(disp_cc_parent_data_3), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, + .ops = &clk_byte2_ops, }, }; @@ -538,13 +527,12 @@ .mnd_width = 0, .hid_width = 5, .parent_map = disp_cc_parent_map_3, - .freq_tbl = ftbl_disp_cc_mdss_dptx0_link_clk_src, .clkr.hw.init = &(struct clk_init_data) { .name = "disp_cc_mdss_dptx3_link_clk_src", .parent_data = disp_cc_parent_data_3, .num_parents = ARRAY_SIZE(disp_cc_parent_data_3), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, + .ops = &clk_byte2_ops, }, }; @@ -574,7 +562,7 @@ .parent_data = disp_cc_parent_data_5, .num_parents = ARRAY_SIZE(disp_cc_parent_data_5), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, + .ops = &clk_rcg2_shared_ops, }, }; @@ -589,7 +577,7 @@ .parent_data = disp_cc_parent_data_5, .num_parents = ARRAY_SIZE(disp_cc_parent_data_5), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, + .ops = &clk_rcg2_shared_ops, }, }; @@ -1623,7 +1611,7 @@ .name = "mdss_gdsc", }, .pwrsts = PWRSTS_OFF_ON, - .flags = HW_CTRL | RETAIN_FF_ENABLE, + .flags = POLL_CFG_GDSCR | HW_CTRL | RETAIN_FF_ENABLE, }; static struct gdsc mdss_int2_gdsc = { @@ -1632,7 +1620,7 @@ .name = "mdss_int2_gdsc", }, .pwrsts = PWRSTS_OFF_ON, - .flags = HW_CTRL | RETAIN_FF_ENABLE, + .flags = POLL_CFG_GDSCR | HW_CTRL | RETAIN_FF_ENABLE, }; static struct clk_regmap *disp_cc_sm8550_clocks[] = { --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/dispcc-sm8650.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/dispcc-sm8650.c @@ -343,26 +343,17 @@ }, }; -static const struct freq_tbl ftbl_disp_cc_mdss_dptx0_link_clk_src[] = { - F(162000, P_DP0_PHY_PLL_LINK_CLK, 1, 0, 0), - F(270000, P_DP0_PHY_PLL_LINK_CLK, 1, 0, 0), - F(540000, P_DP0_PHY_PLL_LINK_CLK, 1, 0, 0), - F(810000, P_DP0_PHY_PLL_LINK_CLK, 1, 0, 0), - { } -}; - static struct clk_rcg2 disp_cc_mdss_dptx0_link_clk_src = { .cmd_rcgr = 0x8170, .mnd_width = 0, .hid_width = 5, .parent_map = disp_cc_parent_map_7, - .freq_tbl = ftbl_disp_cc_mdss_dptx0_link_clk_src, .clkr.hw.init = &(const struct clk_init_data) { .name = "disp_cc_mdss_dptx0_link_clk_src", .parent_data = disp_cc_parent_data_7, .num_parents = ARRAY_SIZE(disp_cc_parent_data_7), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, + .ops = &clk_byte2_ops, }, }; @@ -416,13 +407,12 @@ .mnd_width = 0, .hid_width = 5, .parent_map = disp_cc_parent_map_3, - .freq_tbl = ftbl_disp_cc_mdss_dptx0_link_clk_src, .clkr.hw.init = &(const struct clk_init_data) { .name = "disp_cc_mdss_dptx1_link_clk_src", .parent_data = disp_cc_parent_data_3, .num_parents = ARRAY_SIZE(disp_cc_parent_data_3), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, + .ops = &clk_byte2_ops, }, }; @@ -476,13 +466,12 @@ .mnd_width = 0, .hid_width = 5, .parent_map = disp_cc_parent_map_3, - .freq_tbl = ftbl_disp_cc_mdss_dptx0_link_clk_src, .clkr.hw.init = &(const struct clk_init_data) { .name = "disp_cc_mdss_dptx2_link_clk_src", .parent_data = disp_cc_parent_data_3, .num_parents = ARRAY_SIZE(disp_cc_parent_data_3), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, + .ops = &clk_byte2_ops, }, }; @@ -536,13 +525,12 @@ .mnd_width = 0, .hid_width = 5, .parent_map = disp_cc_parent_map_3, - .freq_tbl = ftbl_disp_cc_mdss_dptx0_link_clk_src, .clkr.hw.init = &(const struct clk_init_data) { .name = "disp_cc_mdss_dptx3_link_clk_src", .parent_data = disp_cc_parent_data_3, .num_parents = ARRAY_SIZE(disp_cc_parent_data_3), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, + .ops = &clk_byte2_ops, }, }; --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/gcc-ipq5018.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/gcc-ipq5018.c @@ -857,6 +857,7 @@ static const struct freq_tbl ftbl_pcie0_aux_clk_src[] = { F(2000000, P_XO, 12, 0, 0), + { } }; static struct clk_rcg2 pcie0_aux_clk_src = { @@ -1099,6 +1100,7 @@ F(100000000, P_GPLL0, 8, 0, 0), F(200000000, P_GPLL0, 4, 0, 0), F(320000000, P_GPLL0, 2.5, 0, 0), + { } }; static struct clk_rcg2 qpic_io_macro_clk_src = { @@ -1194,6 +1196,7 @@ static const struct freq_tbl ftbl_ubi0_core_clk_src[] = { F(850000000, P_UBI32_PLL, 1, 0, 0), F(1000000000, P_UBI32_PLL, 1, 0, 0), + { } }; static struct clk_rcg2 ubi0_core_clk_src = { @@ -1754,7 +1757,7 @@ .halt_check = BRANCH_HALT_DELAY, .halt_bit = 31, .clkr = { - .enable_reg = 0x683190, + .enable_reg = 0x68190, .enable_mask = BIT(0), .hw.init = &(struct clk_init_data) { .name = "gcc_gmac0_sys_clk", @@ -2180,7 +2183,7 @@ }; static struct clk_branch gcc_pcie1_pipe_clk = { - .halt_reg = 8, + .halt_reg = 0x76018, .halt_check = BRANCH_HALT_DELAY, .halt_bit = 31, .clkr = { @@ -3632,7 +3635,7 @@ [GCC_SYSTEM_NOC_BCR] = { 0x26000, 0 }, [GCC_TCSR_BCR] = { 0x28000, 0 }, [GCC_TLMM_BCR] = { 0x34000, 0 }, - [GCC_UBI0_AXI_ARES] = { 0x680}, + [GCC_UBI0_AXI_ARES] = { 0x68010, 0 }, [GCC_UBI0_AHB_ARES] = { 0x68010, 1 }, [GCC_UBI0_NC_AXI_ARES] = { 0x68010, 2 }, [GCC_UBI0_DBG_ARES] = { 0x68010, 3 }, --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/gcc-ipq5332.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/gcc-ipq5332.c @@ -3388,6 +3388,7 @@ [GCC_QDSS_DAP_DIV_CLK_SRC] = &gcc_qdss_dap_div_clk_src.clkr, [GCC_QDSS_ETR_USB_CLK] = &gcc_qdss_etr_usb_clk.clkr, [GCC_QDSS_EUD_AT_CLK] = &gcc_qdss_eud_at_clk.clkr, + [GCC_QDSS_TSCTR_CLK_SRC] = &gcc_qdss_tsctr_clk_src.clkr, [GCC_QPIC_AHB_CLK] = &gcc_qpic_ahb_clk.clkr, [GCC_QPIC_CLK] = &gcc_qpic_clk.clkr, [GCC_QPIC_IO_MACRO_CLK] = &gcc_qpic_io_macro_clk.clkr, --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/gcc-ipq6018.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/gcc-ipq6018.c @@ -1554,6 +1554,7 @@ static const struct freq_tbl ftbl_pcie_aux_clk_src[] = { F(24000000, P_XO, 1, 0, 0), + { } }; static const struct clk_parent_data gcc_xo_gpll0_core_pi_sleep_clk[] = { @@ -1734,6 +1735,7 @@ F(160000000, P_GPLL0, 5, 0, 0), F(216000000, P_GPLL6, 5, 0, 0), F(308570000, P_GPLL6, 3.5, 0, 0), + { } }; static const struct clk_parent_data gcc_xo_gpll0_gpll6_gpll0_div2[] = { --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/gcc-ipq8074.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/gcc-ipq8074.c @@ -644,6 +644,7 @@ static const struct freq_tbl ftbl_pcie_aux_clk_src[] = { F(19200000, P_XO, 1, 0, 0), + { } }; static const struct clk_parent_data gcc_xo_gpll0_sleep_clk[] = { @@ -795,6 +796,7 @@ F(19200000, P_XO, 1, 0, 0), F(160000000, P_GPLL0, 5, 0, 0), F(308570000, P_GPLL6, 3.5, 0, 0), + { } }; static const struct clk_parent_data gcc_xo_gpll0_gpll6_gpll0_div2[] = { --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/gcc-ipq9574.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/gcc-ipq9574.c @@ -65,7 +65,7 @@ static struct clk_alpha_pll gpll0_main = { .offset = 0x20000, - .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], + .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT_EVO], .clkr = { .enable_reg = 0x0b000, .enable_mask = BIT(0), @@ -93,7 +93,7 @@ static struct clk_alpha_pll_postdiv gpll0 = { .offset = 0x20000, - .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], + .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT_EVO], .width = 4, .clkr.hw.init = &(const struct clk_init_data) { .name = "gpll0", @@ -107,7 +107,7 @@ static struct clk_alpha_pll gpll4_main = { .offset = 0x22000, - .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], + .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT_EVO], .clkr = { .enable_reg = 0x0b000, .enable_mask = BIT(2), @@ -122,7 +122,7 @@ static struct clk_alpha_pll_postdiv gpll4 = { .offset = 0x22000, - .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], + .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT_EVO], .width = 4, .clkr.hw.init = &(const struct clk_init_data) { .name = "gpll4", @@ -136,7 +136,7 @@ static struct clk_alpha_pll gpll2_main = { .offset = 0x21000, - .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], + .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT_EVO], .clkr = { .enable_reg = 0x0b000, .enable_mask = BIT(1), @@ -151,7 +151,7 @@ static struct clk_alpha_pll_postdiv gpll2 = { .offset = 0x21000, - .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], + .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT_EVO], .width = 4, .clkr.hw.init = &(const struct clk_init_data) { .name = "gpll2", @@ -2082,6 +2082,7 @@ static const struct freq_tbl ftbl_sdcc_ice_core_clk_src[] = { F(150000000, P_GPLL4, 8, 0, 0), F(300000000, P_GPLL4, 4, 0, 0), + { } }; static struct clk_rcg2 sdcc1_ice_core_clk_src = { @@ -2139,9 +2140,10 @@ static struct clk_branch gcc_crypto_axi_clk = { .halt_reg = 0x16010, + .halt_check = BRANCH_HALT_VOTED, .clkr = { - .enable_reg = 0x16010, - .enable_mask = BIT(0), + .enable_reg = 0xb004, + .enable_mask = BIT(15), .hw.init = &(const struct clk_init_data) { .name = "gcc_crypto_axi_clk", .parent_hws = (const struct clk_hw *[]) { @@ -2155,9 +2157,10 @@ static struct clk_branch gcc_crypto_ahb_clk = { .halt_reg = 0x16014, + .halt_check = BRANCH_HALT_VOTED, .clkr = { - .enable_reg = 0x16014, - .enable_mask = BIT(0), + .enable_reg = 0xb004, + .enable_mask = BIT(16), .hw.init = &(const struct clk_init_data) { .name = "gcc_crypto_ahb_clk", .parent_hws = (const struct clk_hw *[]) { --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/gcc-mdm9607.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/gcc-mdm9607.c @@ -535,7 +535,7 @@ }; static struct clk_rcg2 blsp1_uart6_apps_clk_src = { - .cmd_rcgr = 0x6044, + .cmd_rcgr = 0x7044, .mnd_width = 16, .hid_width = 5, .parent_map = gcc_xo_gpll0_map, --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/gcc-qcs404.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/gcc-qcs404.c @@ -131,6 +131,7 @@ /* 930MHz configuration */ static const struct alpha_pll_config gpll3_config = { .l = 48, + .alpha_hi = 0x70, .alpha = 0x0, .alpha_en_mask = BIT(24), .post_div_mask = 0xf << 8, --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/gcc-sa8775p.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/gcc-sa8775p.c @@ -4305,74 +4305,114 @@ static struct gdsc pcie_0_gdsc = { .gdscr = 0xa9004, + .collapse_ctrl = 0x4b104, + .collapse_mask = BIT(0), + .en_rest_wait_val = 0x2, + .en_few_wait_val = 0x2, + .clk_dis_wait_val = 0xf, .pd = { .name = "pcie_0_gdsc", }, .pwrsts = PWRSTS_OFF_ON, + .flags = VOTABLE | RETAIN_FF_ENABLE | POLL_CFG_GDSCR, }; static struct gdsc pcie_1_gdsc = { .gdscr = 0x77004, + .collapse_ctrl = 0x4b104, + .collapse_mask = BIT(1), + .en_rest_wait_val = 0x2, + .en_few_wait_val = 0x2, + .clk_dis_wait_val = 0xf, .pd = { .name = "pcie_1_gdsc", }, .pwrsts = PWRSTS_OFF_ON, + .flags = VOTABLE | RETAIN_FF_ENABLE | POLL_CFG_GDSCR, }; static struct gdsc ufs_card_gdsc = { .gdscr = 0x81004, + .en_rest_wait_val = 0x2, + .en_few_wait_val = 0x2, + .clk_dis_wait_val = 0xf, .pd = { .name = "ufs_card_gdsc", }, .pwrsts = PWRSTS_OFF_ON, + .flags = RETAIN_FF_ENABLE | POLL_CFG_GDSCR, }; static struct gdsc ufs_phy_gdsc = { .gdscr = 0x83004, + .en_rest_wait_val = 0x2, + .en_few_wait_val = 0x2, + .clk_dis_wait_val = 0xf, .pd = { .name = "ufs_phy_gdsc", }, .pwrsts = PWRSTS_OFF_ON, + .flags = RETAIN_FF_ENABLE | POLL_CFG_GDSCR, }; static struct gdsc usb20_prim_gdsc = { .gdscr = 0x1c004, + .en_rest_wait_val = 0x2, + .en_few_wait_val = 0x2, + .clk_dis_wait_val = 0xf, .pd = { .name = "usb20_prim_gdsc", }, .pwrsts = PWRSTS_OFF_ON, + .flags = RETAIN_FF_ENABLE | POLL_CFG_GDSCR, }; static struct gdsc usb30_prim_gdsc = { .gdscr = 0x1b004, + .en_rest_wait_val = 0x2, + .en_few_wait_val = 0x2, + .clk_dis_wait_val = 0xf, .pd = { .name = "usb30_prim_gdsc", }, .pwrsts = PWRSTS_OFF_ON, + .flags = RETAIN_FF_ENABLE | POLL_CFG_GDSCR, }; static struct gdsc usb30_sec_gdsc = { .gdscr = 0x2f004, + .en_rest_wait_val = 0x2, + .en_few_wait_val = 0x2, + .clk_dis_wait_val = 0xf, .pd = { .name = "usb30_sec_gdsc", }, .pwrsts = PWRSTS_OFF_ON, + .flags = RETAIN_FF_ENABLE | POLL_CFG_GDSCR, }; static struct gdsc emac0_gdsc = { .gdscr = 0xb6004, + .en_rest_wait_val = 0x2, + .en_few_wait_val = 0x2, + .clk_dis_wait_val = 0xf, .pd = { .name = "emac0_gdsc", }, .pwrsts = PWRSTS_OFF_ON, + .flags = RETAIN_FF_ENABLE | POLL_CFG_GDSCR, }; static struct gdsc emac1_gdsc = { .gdscr = 0xb4004, + .en_rest_wait_val = 0x2, + .en_few_wait_val = 0x2, + .clk_dis_wait_val = 0xf, .pd = { .name = "emac1_gdsc", }, .pwrsts = PWRSTS_OFF_ON, + .flags = RETAIN_FF_ENABLE | POLL_CFG_GDSCR, }; static struct clk_regmap *gcc_sa8775p_clocks[] = { --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/gcc-sc7280.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/gcc-sc7280.c @@ -3467,6 +3467,9 @@ regmap_update_bits(regmap, 0x71004, BIT(0), BIT(0)); regmap_update_bits(regmap, 0x7100C, BIT(13), BIT(13)); + /* FORCE_MEM_CORE_ON for ufs phy ice core clocks */ + qcom_branch_set_force_mem_core(regmap, gcc_ufs_phy_ice_core_clk, true); + ret = qcom_cc_register_rcg_dfs(regmap, gcc_dfs_clocks, ARRAY_SIZE(gcc_dfs_clocks)); if (ret) --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/gcc-sc8180x.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/gcc-sc8180x.c @@ -142,6 +142,23 @@ }, }; +static struct clk_alpha_pll gpll9 = { + .offset = 0x1c000, + .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_TRION], + .clkr = { + .enable_reg = 0x52000, + .enable_mask = BIT(9), + .hw.init = &(const struct clk_init_data) { + .name = "gpll9", + .parent_data = &(const struct clk_parent_data) { + .fw_name = "bi_tcxo", + }, + .num_parents = 1, + .ops = &clk_alpha_pll_fixed_trion_ops, + }, + }, +}; + static const struct parent_map gcc_parent_map_0[] = { { P_BI_TCXO, 0 }, { P_GPLL0_OUT_MAIN, 1 }, @@ -241,7 +258,7 @@ static const struct clk_parent_data gcc_parents_7[] = { { .fw_name = "bi_tcxo", }, { .hw = &gpll0.clkr.hw }, - { .name = "gppl9" }, + { .hw = &gpll9.clkr.hw }, { .hw = &gpll4.clkr.hw }, { .hw = &gpll0_out_even.clkr.hw }, }; @@ -260,28 +277,6 @@ { .hw = &gpll0_out_even.clkr.hw }, }; -static const struct freq_tbl ftbl_gcc_cpuss_ahb_clk_src[] = { - F(19200000, P_BI_TCXO, 1, 0, 0), - F(50000000, P_GPLL0_OUT_MAIN, 12, 0, 0), - F(100000000, P_GPLL0_OUT_MAIN, 6, 0, 0), - { } -}; - -static struct clk_rcg2 gcc_cpuss_ahb_clk_src = { - .cmd_rcgr = 0x48014, - .mnd_width = 0, - .hid_width = 5, - .parent_map = gcc_parent_map_0, - .freq_tbl = ftbl_gcc_cpuss_ahb_clk_src, - .clkr.hw.init = &(struct clk_init_data){ - .name = "gcc_cpuss_ahb_clk_src", - .parent_data = gcc_parents_0, - .num_parents = ARRAY_SIZE(gcc_parents_0), - .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, - }, -}; - static const struct freq_tbl ftbl_gcc_emac_ptp_clk_src[] = { F(19200000, P_BI_TCXO, 1, 0, 0), F(50000000, P_GPLL0_OUT_EVEN, 6, 0, 0), @@ -609,19 +604,29 @@ { } }; +static struct clk_init_data gcc_qupv3_wrap0_s0_clk_src_init = { + .name = "gcc_qupv3_wrap0_s0_clk_src", + .parent_data = gcc_parents_0, + .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, +}; + static struct clk_rcg2 gcc_qupv3_wrap0_s0_clk_src = { .cmd_rcgr = 0x17148, .mnd_width = 16, .hid_width = 5, .parent_map = gcc_parent_map_0, .freq_tbl = ftbl_gcc_qupv3_wrap0_s0_clk_src, - .clkr.hw.init = &(struct clk_init_data){ - .name = "gcc_qupv3_wrap0_s0_clk_src", - .parent_data = gcc_parents_0, - .num_parents = ARRAY_SIZE(gcc_parents_0), - .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, - }, + .clkr.hw.init = &gcc_qupv3_wrap0_s0_clk_src_init, +}; + +static struct clk_init_data gcc_qupv3_wrap0_s1_clk_src_init = { + .name = "gcc_qupv3_wrap0_s1_clk_src", + .parent_data = gcc_parents_0, + .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap0_s1_clk_src = { @@ -630,13 +635,15 @@ .hid_width = 5, .parent_map = gcc_parent_map_0, .freq_tbl = ftbl_gcc_qupv3_wrap0_s0_clk_src, - .clkr.hw.init = &(struct clk_init_data){ - .name = "gcc_qupv3_wrap0_s1_clk_src", - .parent_data = gcc_parents_0, - .num_parents = ARRAY_SIZE(gcc_parents_0), - .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, - }, + .clkr.hw.init = &gcc_qupv3_wrap0_s1_clk_src_init, +}; + +static struct clk_init_data gcc_qupv3_wrap0_s2_clk_src_init = { + .name = "gcc_qupv3_wrap0_s2_clk_src", + .parent_data = gcc_parents_0, + .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap0_s2_clk_src = { @@ -645,13 +652,15 @@ .hid_width = 5, .parent_map = gcc_parent_map_0, .freq_tbl = ftbl_gcc_qupv3_wrap0_s0_clk_src, - .clkr.hw.init = &(struct clk_init_data){ - .name = "gcc_qupv3_wrap0_s2_clk_src", - .parent_data = gcc_parents_0, - .num_parents = ARRAY_SIZE(gcc_parents_0), - .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, - }, + .clkr.hw.init = &gcc_qupv3_wrap0_s2_clk_src_init, +}; + +static struct clk_init_data gcc_qupv3_wrap0_s3_clk_src_init = { + .name = "gcc_qupv3_wrap0_s3_clk_src", + .parent_data = gcc_parents_0, + .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap0_s3_clk_src = { @@ -660,13 +669,15 @@ .hid_width = 5, .parent_map = gcc_parent_map_0, .freq_tbl = ftbl_gcc_qupv3_wrap0_s0_clk_src, - .clkr.hw.init = &(struct clk_init_data){ - .name = "gcc_qupv3_wrap0_s3_clk_src", - .parent_data = gcc_parents_0, - .num_parents = ARRAY_SIZE(gcc_parents_0), - .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, - }, + .clkr.hw.init = &gcc_qupv3_wrap0_s3_clk_src_init, +}; + +static struct clk_init_data gcc_qupv3_wrap0_s4_clk_src_init = { + .name = "gcc_qupv3_wrap0_s4_clk_src", + .parent_data = gcc_parents_0, + .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap0_s4_clk_src = { @@ -675,13 +686,15 @@ .hid_width = 5, .parent_map = gcc_parent_map_0, .freq_tbl = ftbl_gcc_qupv3_wrap0_s0_clk_src, - .clkr.hw.init = &(struct clk_init_data){ - .name = "gcc_qupv3_wrap0_s4_clk_src", - .parent_data = gcc_parents_0, - .num_parents = ARRAY_SIZE(gcc_parents_0), - .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, - }, + .clkr.hw.init = &gcc_qupv3_wrap0_s4_clk_src_init, +}; + +static struct clk_init_data gcc_qupv3_wrap0_s5_clk_src_init = { + .name = "gcc_qupv3_wrap0_s5_clk_src", + .parent_data = gcc_parents_0, + .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap0_s5_clk_src = { @@ -690,13 +703,15 @@ .hid_width = 5, .parent_map = gcc_parent_map_0, .freq_tbl = ftbl_gcc_qupv3_wrap0_s0_clk_src, - .clkr.hw.init = &(struct clk_init_data){ - .name = "gcc_qupv3_wrap0_s5_clk_src", - .parent_data = gcc_parents_0, - .num_parents = ARRAY_SIZE(gcc_parents_0), - .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, - }, + .clkr.hw.init = &gcc_qupv3_wrap0_s5_clk_src_init, +}; + +static struct clk_init_data gcc_qupv3_wrap0_s6_clk_src_init = { + .name = "gcc_qupv3_wrap0_s6_clk_src", + .parent_data = gcc_parents_0, + .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap0_s6_clk_src = { @@ -705,13 +720,15 @@ .hid_width = 5, .parent_map = gcc_parent_map_0, .freq_tbl = ftbl_gcc_qupv3_wrap0_s0_clk_src, - .clkr.hw.init = &(struct clk_init_data){ - .name = "gcc_qupv3_wrap0_s6_clk_src", - .parent_data = gcc_parents_0, - .num_parents = ARRAY_SIZE(gcc_parents_0), - .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, - }, + .clkr.hw.init = &gcc_qupv3_wrap0_s6_clk_src_init, +}; + +static struct clk_init_data gcc_qupv3_wrap0_s7_clk_src_init = { + .name = "gcc_qupv3_wrap0_s7_clk_src", + .parent_data = gcc_parents_0, + .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap0_s7_clk_src = { @@ -720,13 +737,15 @@ .hid_width = 5, .parent_map = gcc_parent_map_0, .freq_tbl = ftbl_gcc_qupv3_wrap0_s0_clk_src, - .clkr.hw.init = &(struct clk_init_data){ - .name = "gcc_qupv3_wrap0_s7_clk_src", - .parent_data = gcc_parents_0, - .num_parents = ARRAY_SIZE(gcc_parents_0), - .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, - }, + .clkr.hw.init = &gcc_qupv3_wrap0_s7_clk_src_init, +}; + +static struct clk_init_data gcc_qupv3_wrap1_s0_clk_src_init = { + .name = "gcc_qupv3_wrap1_s0_clk_src", + .parent_data = gcc_parents_0, + .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s0_clk_src = { @@ -735,13 +754,15 @@ .hid_width = 5, .parent_map = gcc_parent_map_0, .freq_tbl = ftbl_gcc_qupv3_wrap0_s0_clk_src, - .clkr.hw.init = &(struct clk_init_data){ - .name = "gcc_qupv3_wrap1_s0_clk_src", - .parent_data = gcc_parents_0, - .num_parents = ARRAY_SIZE(gcc_parents_0), - .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, - }, + .clkr.hw.init = &gcc_qupv3_wrap1_s0_clk_src_init, +}; + +static struct clk_init_data gcc_qupv3_wrap1_s1_clk_src_init = { + .name = "gcc_qupv3_wrap1_s1_clk_src", + .parent_data = gcc_parents_0, + .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s1_clk_src = { @@ -750,13 +771,15 @@ .hid_width = 5, .parent_map = gcc_parent_map_0, .freq_tbl = ftbl_gcc_qupv3_wrap0_s0_clk_src, - .clkr.hw.init = &(struct clk_init_data){ - .name = "gcc_qupv3_wrap1_s1_clk_src", - .parent_data = gcc_parents_0, - .num_parents = ARRAY_SIZE(gcc_parents_0), - .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, - }, + .clkr.hw.init = &gcc_qupv3_wrap1_s1_clk_src_init, +}; + +static struct clk_init_data gcc_qupv3_wrap1_s2_clk_src_init = { + .name = "gcc_qupv3_wrap1_s2_clk_src", + .parent_data = gcc_parents_0, + .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s2_clk_src = { @@ -765,13 +788,15 @@ .hid_width = 5, .parent_map = gcc_parent_map_0, .freq_tbl = ftbl_gcc_qupv3_wrap0_s0_clk_src, - .clkr.hw.init = &(struct clk_init_data){ - .name = "gcc_qupv3_wrap1_s2_clk_src", - .parent_data = gcc_parents_0, - .num_parents = ARRAY_SIZE(gcc_parents_0), - .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, - }, + .clkr.hw.init = &gcc_qupv3_wrap1_s2_clk_src_init, +}; + +static struct clk_init_data gcc_qupv3_wrap1_s3_clk_src_init = { + .name = "gcc_qupv3_wrap1_s3_clk_src", + .parent_data = gcc_parents_0, + .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s3_clk_src = { @@ -780,13 +805,15 @@ .hid_width = 5, .parent_map = gcc_parent_map_0, .freq_tbl = ftbl_gcc_qupv3_wrap0_s0_clk_src, - .clkr.hw.init = &(struct clk_init_data){ - .name = "gcc_qupv3_wrap1_s3_clk_src", - .parent_data = gcc_parents_0, - .num_parents = ARRAY_SIZE(gcc_parents_0), - .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, - }, + .clkr.hw.init = &gcc_qupv3_wrap1_s3_clk_src_init, +}; + +static struct clk_init_data gcc_qupv3_wrap1_s4_clk_src_init = { + .name = "gcc_qupv3_wrap1_s4_clk_src", + .parent_data = gcc_parents_0, + .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s4_clk_src = { @@ -795,13 +822,15 @@ .hid_width = 5, .parent_map = gcc_parent_map_0, .freq_tbl = ftbl_gcc_qupv3_wrap0_s0_clk_src, - .clkr.hw.init = &(struct clk_init_data){ - .name = "gcc_qupv3_wrap1_s4_clk_src", - .parent_data = gcc_parents_0, - .num_parents = ARRAY_SIZE(gcc_parents_0), - .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, - }, + .clkr.hw.init = &gcc_qupv3_wrap1_s4_clk_src_init, +}; + +static struct clk_init_data gcc_qupv3_wrap1_s5_clk_src_init = { + .name = "gcc_qupv3_wrap1_s5_clk_src", + .parent_data = gcc_parents_0, + .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s5_clk_src = { @@ -810,13 +839,15 @@ .hid_width = 5, .parent_map = gcc_parent_map_0, .freq_tbl = ftbl_gcc_qupv3_wrap0_s0_clk_src, - .clkr.hw.init = &(struct clk_init_data){ - .name = "gcc_qupv3_wrap1_s5_clk_src", - .parent_data = gcc_parents_0, - .num_parents = ARRAY_SIZE(gcc_parents_0), - .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, - }, + .clkr.hw.init = &gcc_qupv3_wrap1_s5_clk_src_init, +}; + +static struct clk_init_data gcc_qupv3_wrap2_s0_clk_src_init = { + .name = "gcc_qupv3_wrap2_s0_clk_src", + .parent_data = gcc_parents_0, + .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap2_s0_clk_src = { @@ -825,13 +856,15 @@ .hid_width = 5, .parent_map = gcc_parent_map_0, .freq_tbl = ftbl_gcc_qupv3_wrap0_s0_clk_src, - .clkr.hw.init = &(struct clk_init_data){ - .name = "gcc_qupv3_wrap2_s0_clk_src", - .parent_data = gcc_parents_0, - .num_parents = ARRAY_SIZE(gcc_parents_0), - .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, - }, + .clkr.hw.init = &gcc_qupv3_wrap2_s0_clk_src_init, +}; + +static struct clk_init_data gcc_qupv3_wrap2_s1_clk_src_init = { + .name = "gcc_qupv3_wrap2_s1_clk_src", + .parent_data = gcc_parents_0, + .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap2_s1_clk_src = { @@ -840,28 +873,33 @@ .hid_width = 5, .parent_map = gcc_parent_map_0, .freq_tbl = ftbl_gcc_qupv3_wrap0_s0_clk_src, - .clkr.hw.init = &(struct clk_init_data){ - .name = "gcc_qupv3_wrap2_s1_clk_src", - .parent_data = gcc_parents_0, - .num_parents = ARRAY_SIZE(gcc_parents_0), - .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, - }, + .clkr.hw.init = &gcc_qupv3_wrap2_s1_clk_src_init, +}; + +static struct clk_init_data gcc_qupv3_wrap2_s2_clk_src_init = { + .name = "gcc_qupv3_wrap2_s2_clk_src", + .parent_data = gcc_parents_0, + .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, }; + static struct clk_rcg2 gcc_qupv3_wrap2_s2_clk_src = { .cmd_rcgr = 0x1e3a8, .mnd_width = 16, .hid_width = 5, .parent_map = gcc_parent_map_0, .freq_tbl = ftbl_gcc_qupv3_wrap0_s0_clk_src, - .clkr.hw.init = &(struct clk_init_data){ - .name = "gcc_qupv3_wrap2_s2_clk_src", - .parent_data = gcc_parents_0, - .num_parents = ARRAY_SIZE(gcc_parents_0), - .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, - }, + .clkr.hw.init = &gcc_qupv3_wrap2_s2_clk_src_init, +}; + +static struct clk_init_data gcc_qupv3_wrap2_s3_clk_src_init = { + .name = "gcc_qupv3_wrap2_s3_clk_src", + .parent_data = gcc_parents_0, + .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap2_s3_clk_src = { @@ -870,13 +908,15 @@ .hid_width = 5, .parent_map = gcc_parent_map_0, .freq_tbl = ftbl_gcc_qupv3_wrap0_s0_clk_src, - .clkr.hw.init = &(struct clk_init_data){ - .name = "gcc_qupv3_wrap2_s3_clk_src", - .parent_data = gcc_parents_0, - .num_parents = ARRAY_SIZE(gcc_parents_0), - .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, - }, + .clkr.hw.init = &gcc_qupv3_wrap2_s3_clk_src_init, +}; + +static struct clk_init_data gcc_qupv3_wrap2_s4_clk_src_init = { + .name = "gcc_qupv3_wrap2_s4_clk_src", + .parent_data = gcc_parents_0, + .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap2_s4_clk_src = { @@ -885,13 +925,15 @@ .hid_width = 5, .parent_map = gcc_parent_map_0, .freq_tbl = ftbl_gcc_qupv3_wrap0_s0_clk_src, - .clkr.hw.init = &(struct clk_init_data){ - .name = "gcc_qupv3_wrap2_s4_clk_src", - .parent_data = gcc_parents_0, - .num_parents = ARRAY_SIZE(gcc_parents_0), - .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, - }, + .clkr.hw.init = &gcc_qupv3_wrap2_s4_clk_src_init, +}; + +static struct clk_init_data gcc_qupv3_wrap2_s5_clk_src_init = { + .name = "gcc_qupv3_wrap2_s5_clk_src", + .parent_data = gcc_parents_0, + .num_parents = ARRAY_SIZE(gcc_parents_0), + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap2_s5_clk_src = { @@ -900,13 +942,7 @@ .hid_width = 5, .parent_map = gcc_parent_map_0, .freq_tbl = ftbl_gcc_qupv3_wrap0_s0_clk_src, - .clkr.hw.init = &(struct clk_init_data){ - .name = "gcc_qupv3_wrap2_s5_clk_src", - .parent_data = gcc_parents_0, - .num_parents = ARRAY_SIZE(gcc_parents_0), - .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, - }, + .clkr.hw.init = &gcc_qupv3_wrap2_s5_clk_src_init, }; static const struct freq_tbl ftbl_gcc_sdcc2_apps_clk_src[] = { @@ -916,7 +952,7 @@ F(25000000, P_GPLL0_OUT_MAIN, 12, 1, 2), F(50000000, P_GPLL0_OUT_MAIN, 12, 0, 0), F(100000000, P_GPLL0_OUT_MAIN, 6, 0, 0), - F(200000000, P_GPLL0_OUT_MAIN, 3, 0, 0), + F(202000000, P_GPLL9_OUT_MAIN, 4, 0, 0), { } }; @@ -939,9 +975,8 @@ F(400000, P_BI_TCXO, 12, 1, 4), F(9600000, P_BI_TCXO, 2, 0, 0), F(19200000, P_BI_TCXO, 1, 0, 0), - F(37500000, P_GPLL0_OUT_MAIN, 16, 0, 0), F(50000000, P_GPLL0_OUT_MAIN, 12, 0, 0), - F(75000000, P_GPLL0_OUT_MAIN, 8, 0, 0), + F(100000000, P_GPLL0_OUT_MAIN, 6, 0, 0), { } }; @@ -1599,25 +1634,6 @@ }, }; -/* For CPUSS functionality the AHB clock needs to be left enabled */ -static struct clk_branch gcc_cpuss_ahb_clk = { - .halt_reg = 0x48000, - .halt_check = BRANCH_HALT_VOTED, - .clkr = { - .enable_reg = 0x52004, - .enable_mask = BIT(21), - .hw.init = &(struct clk_init_data){ - .name = "gcc_cpuss_ahb_clk", - .parent_hws = (const struct clk_hw *[]){ - &gcc_cpuss_ahb_clk_src.clkr.hw - }, - .num_parents = 1, - .flags = CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, - .ops = &clk_branch2_ops, - }, - }, -}; - static struct clk_branch gcc_cpuss_rbcpr_clk = { .halt_reg = 0x48008, .halt_check = BRANCH_HALT, @@ -3150,25 +3166,6 @@ }, }; -/* For CPUSS functionality the SYS NOC clock needs to be left enabled */ -static struct clk_branch gcc_sys_noc_cpuss_ahb_clk = { - .halt_reg = 0x4819c, - .halt_check = BRANCH_HALT_VOTED, - .clkr = { - .enable_reg = 0x52004, - .enable_mask = BIT(0), - .hw.init = &(struct clk_init_data){ - .name = "gcc_sys_noc_cpuss_ahb_clk", - .parent_hws = (const struct clk_hw *[]){ - &gcc_cpuss_ahb_clk_src.clkr.hw - }, - .num_parents = 1, - .flags = CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, - .ops = &clk_branch2_ops, - }, - }, -}; - static struct clk_branch gcc_tsif_ahb_clk = { .halt_reg = 0x36004, .halt_check = BRANCH_HALT, @@ -4258,8 +4255,6 @@ [GCC_CFG_NOC_USB3_MP_AXI_CLK] = &gcc_cfg_noc_usb3_mp_axi_clk.clkr, [GCC_CFG_NOC_USB3_PRIM_AXI_CLK] = &gcc_cfg_noc_usb3_prim_axi_clk.clkr, [GCC_CFG_NOC_USB3_SEC_AXI_CLK] = &gcc_cfg_noc_usb3_sec_axi_clk.clkr, - [GCC_CPUSS_AHB_CLK] = &gcc_cpuss_ahb_clk.clkr, - [GCC_CPUSS_AHB_CLK_SRC] = &gcc_cpuss_ahb_clk_src.clkr, [GCC_CPUSS_RBCPR_CLK] = &gcc_cpuss_rbcpr_clk.clkr, [GCC_DDRSS_GPU_AXI_CLK] = &gcc_ddrss_gpu_axi_clk.clkr, [GCC_DISP_HF_AXI_CLK] = &gcc_disp_hf_axi_clk.clkr, @@ -4396,7 +4391,6 @@ [GCC_SDCC4_AHB_CLK] = &gcc_sdcc4_ahb_clk.clkr, [GCC_SDCC4_APPS_CLK] = &gcc_sdcc4_apps_clk.clkr, [GCC_SDCC4_APPS_CLK_SRC] = &gcc_sdcc4_apps_clk_src.clkr, - [GCC_SYS_NOC_CPUSS_AHB_CLK] = &gcc_sys_noc_cpuss_ahb_clk.clkr, [GCC_TSIF_AHB_CLK] = &gcc_tsif_ahb_clk.clkr, [GCC_TSIF_INACTIVITY_TIMERS_CLK] = &gcc_tsif_inactivity_timers_clk.clkr, [GCC_TSIF_REF_CLK] = &gcc_tsif_ref_clk.clkr, @@ -4483,6 +4477,7 @@ [GPLL1] = &gpll1.clkr, [GPLL4] = &gpll4.clkr, [GPLL7] = &gpll7.clkr, + [GPLL9] = &gpll9.clkr, }; static const struct qcom_reset_map gcc_sc8180x_resets[] = { @@ -4533,6 +4528,29 @@ [GCC_VIDEO_AXI1_CLK_BCR] = { 0xb028, 2 }, }; +static const struct clk_rcg_dfs_data gcc_dfs_clocks[] = { + DEFINE_RCG_DFS(gcc_qupv3_wrap0_s0_clk_src), + DEFINE_RCG_DFS(gcc_qupv3_wrap0_s1_clk_src), + DEFINE_RCG_DFS(gcc_qupv3_wrap0_s2_clk_src), + DEFINE_RCG_DFS(gcc_qupv3_wrap0_s3_clk_src), + DEFINE_RCG_DFS(gcc_qupv3_wrap0_s4_clk_src), + DEFINE_RCG_DFS(gcc_qupv3_wrap0_s5_clk_src), + DEFINE_RCG_DFS(gcc_qupv3_wrap0_s6_clk_src), + DEFINE_RCG_DFS(gcc_qupv3_wrap0_s7_clk_src), + DEFINE_RCG_DFS(gcc_qupv3_wrap1_s0_clk_src), + DEFINE_RCG_DFS(gcc_qupv3_wrap1_s1_clk_src), + DEFINE_RCG_DFS(gcc_qupv3_wrap1_s2_clk_src), + DEFINE_RCG_DFS(gcc_qupv3_wrap1_s3_clk_src), + DEFINE_RCG_DFS(gcc_qupv3_wrap1_s4_clk_src), + DEFINE_RCG_DFS(gcc_qupv3_wrap1_s5_clk_src), + DEFINE_RCG_DFS(gcc_qupv3_wrap2_s0_clk_src), + DEFINE_RCG_DFS(gcc_qupv3_wrap2_s1_clk_src), + DEFINE_RCG_DFS(gcc_qupv3_wrap2_s2_clk_src), + DEFINE_RCG_DFS(gcc_qupv3_wrap2_s3_clk_src), + DEFINE_RCG_DFS(gcc_qupv3_wrap2_s4_clk_src), + DEFINE_RCG_DFS(gcc_qupv3_wrap2_s5_clk_src), +}; + static struct gdsc *gcc_sc8180x_gdscs[] = { [EMAC_GDSC] = &emac_gdsc, [PCIE_0_GDSC] = &pcie_0_gdsc, @@ -4574,6 +4592,7 @@ static int gcc_sc8180x_probe(struct platform_device *pdev) { struct regmap *regmap; + int ret; regmap = qcom_cc_map(pdev, &gcc_sc8180x_desc); if (IS_ERR(regmap)) @@ -4601,6 +4620,11 @@ regmap_update_bits(regmap, 0x4d110, 0x3, 0x3); regmap_update_bits(regmap, 0x71028, 0x3, 0x3); + ret = qcom_cc_register_rcg_dfs(regmap, gcc_dfs_clocks, + ARRAY_SIZE(gcc_dfs_clocks)); + if (ret) + return ret; + return qcom_cc_really_probe(pdev, &gcc_sc8180x_desc, regmap); } --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/gcc-sdm845.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/gcc-sdm845.c @@ -454,7 +454,7 @@ .name = "gcc_qupv3_wrap0_s0_clk_src", .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap0_s0_clk_src = { @@ -470,7 +470,7 @@ .name = "gcc_qupv3_wrap0_s1_clk_src", .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap0_s1_clk_src = { @@ -486,7 +486,7 @@ .name = "gcc_qupv3_wrap0_s2_clk_src", .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap0_s2_clk_src = { @@ -502,7 +502,7 @@ .name = "gcc_qupv3_wrap0_s3_clk_src", .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap0_s3_clk_src = { @@ -518,7 +518,7 @@ .name = "gcc_qupv3_wrap0_s4_clk_src", .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap0_s4_clk_src = { @@ -534,7 +534,7 @@ .name = "gcc_qupv3_wrap0_s5_clk_src", .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap0_s5_clk_src = { @@ -550,7 +550,7 @@ .name = "gcc_qupv3_wrap0_s6_clk_src", .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap0_s6_clk_src = { @@ -566,7 +566,7 @@ .name = "gcc_qupv3_wrap0_s7_clk_src", .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap0_s7_clk_src = { @@ -582,7 +582,7 @@ .name = "gcc_qupv3_wrap1_s0_clk_src", .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s0_clk_src = { @@ -598,7 +598,7 @@ .name = "gcc_qupv3_wrap1_s1_clk_src", .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s1_clk_src = { @@ -614,7 +614,7 @@ .name = "gcc_qupv3_wrap1_s2_clk_src", .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s2_clk_src = { @@ -630,7 +630,7 @@ .name = "gcc_qupv3_wrap1_s3_clk_src", .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s3_clk_src = { @@ -646,7 +646,7 @@ .name = "gcc_qupv3_wrap1_s4_clk_src", .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s4_clk_src = { @@ -662,7 +662,7 @@ .name = "gcc_qupv3_wrap1_s5_clk_src", .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s5_clk_src = { @@ -678,7 +678,7 @@ .name = "gcc_qupv3_wrap1_s6_clk_src", .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s6_clk_src = { @@ -694,7 +694,7 @@ .name = "gcc_qupv3_wrap1_s7_clk_src", .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s7_clk_src = { @@ -4037,3 +4037,4 @@ MODULE_DESCRIPTION("QTI GCC SDM845 Driver"); MODULE_LICENSE("GPL v2"); MODULE_ALIAS("platform:gcc-sdm845"); +MODULE_SOFTDEP("pre: rpmhpd"); --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/gcc-sm6350.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/gcc-sm6350.c @@ -100,8 +100,8 @@ .enable_mask = BIT(6), .hw.init = &(struct clk_init_data){ .name = "gpll6", - .parent_hws = (const struct clk_hw*[]){ - &gpll0.clkr.hw, + .parent_data = &(const struct clk_parent_data){ + .fw_name = "bi_tcxo", }, .num_parents = 1, .ops = &clk_alpha_pll_fixed_fabia_ops, @@ -124,7 +124,7 @@ .clkr.hw.init = &(struct clk_init_data){ .name = "gpll6_out_even", .parent_hws = (const struct clk_hw*[]){ - &gpll0.clkr.hw, + &gpll6.clkr.hw, }, .num_parents = 1, .ops = &clk_alpha_pll_postdiv_fabia_ops, @@ -139,8 +139,8 @@ .enable_mask = BIT(7), .hw.init = &(struct clk_init_data){ .name = "gpll7", - .parent_hws = (const struct clk_hw*[]){ - &gpll0.clkr.hw, + .parent_data = &(const struct clk_parent_data){ + .fw_name = "bi_tcxo", }, .num_parents = 1, .ops = &clk_alpha_pll_fixed_fabia_ops, @@ -182,6 +182,14 @@ { .hw = &gpll0_out_odd.clkr.hw }, }; +static const struct parent_map gcc_parent_map_3[] = { + { P_BI_TCXO, 0 }, +}; + +static const struct clk_parent_data gcc_parent_data_3[] = { + { .fw_name = "bi_tcxo" }, +}; + static const struct parent_map gcc_parent_map_4[] = { { P_BI_TCXO, 0 }, { P_GPLL0_OUT_MAIN, 1 }, @@ -701,13 +709,12 @@ .cmd_rcgr = 0x3a0b0, .mnd_width = 0, .hid_width = 5, + .parent_map = gcc_parent_map_3, .freq_tbl = ftbl_gcc_ufs_phy_phy_aux_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_ufs_phy_phy_aux_clk_src", - .parent_data = &(const struct clk_parent_data){ - .fw_name = "bi_tcxo", - }, - .num_parents = 1, + .parent_data = gcc_parent_data_3, + .num_parents = ARRAY_SIZE(gcc_parent_data_3), .ops = &clk_rcg2_ops, }, }; @@ -764,13 +771,12 @@ .cmd_rcgr = 0x1a034, .mnd_width = 0, .hid_width = 5, + .parent_map = gcc_parent_map_3, .freq_tbl = ftbl_gcc_usb30_prim_mock_utmi_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_usb30_prim_mock_utmi_clk_src", - .parent_data = &(const struct clk_parent_data){ - .fw_name = "bi_tcxo", - }, - .num_parents = 1, + .parent_data = gcc_parent_data_3, + .num_parents = ARRAY_SIZE(gcc_parent_data_3), .ops = &clk_rcg2_ops, }, }; --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/gcc-sm8250.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/gcc-sm8250.c @@ -3226,7 +3226,7 @@ .pd = { .name = "pcie_0_gdsc", }, - .pwrsts = PWRSTS_OFF_ON, + .pwrsts = PWRSTS_RET_ON, }; static struct gdsc pcie_1_gdsc = { @@ -3234,7 +3234,7 @@ .pd = { .name = "pcie_1_gdsc", }, - .pwrsts = PWRSTS_OFF_ON, + .pwrsts = PWRSTS_RET_ON, }; static struct gdsc pcie_2_gdsc = { @@ -3242,7 +3242,7 @@ .pd = { .name = "pcie_2_gdsc", }, - .pwrsts = PWRSTS_OFF_ON, + .pwrsts = PWRSTS_RET_ON, }; static struct gdsc ufs_card_gdsc = { --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/gcc-sm8450.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/gcc-sm8450.c @@ -2974,7 +2974,7 @@ .pd = { .name = "pcie_0_gdsc", }, - .pwrsts = PWRSTS_OFF_ON, + .pwrsts = PWRSTS_RET_ON, }; static struct gdsc pcie_1_gdsc = { @@ -2982,7 +2982,7 @@ .pd = { .name = "pcie_1_gdsc", }, - .pwrsts = PWRSTS_OFF_ON, + .pwrsts = PWRSTS_RET_ON, }; static struct gdsc ufs_phy_gdsc = { --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/gcc-sm8550.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/gcc-sm8550.c @@ -536,7 +536,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }, }; @@ -551,7 +551,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }, }; @@ -566,7 +566,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }, }; @@ -581,7 +581,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }, }; @@ -596,7 +596,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }, }; @@ -611,7 +611,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }, }; @@ -626,7 +626,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }, }; @@ -641,7 +641,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }, }; @@ -656,7 +656,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }, }; @@ -671,7 +671,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }, }; @@ -700,7 +700,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s0_clk_src = { @@ -717,7 +717,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s1_clk_src = { @@ -750,7 +750,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s2_clk_src = { @@ -767,7 +767,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s3_clk_src = { @@ -784,7 +784,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s4_clk_src = { @@ -801,7 +801,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s5_clk_src = { @@ -818,7 +818,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s6_clk_src = { @@ -835,7 +835,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s7_clk_src = { @@ -852,7 +852,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap2_s0_clk_src = { @@ -869,7 +869,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap2_s1_clk_src = { @@ -886,7 +886,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap2_s2_clk_src = { @@ -903,7 +903,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap2_s3_clk_src = { @@ -920,7 +920,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap2_s4_clk_src = { @@ -937,7 +937,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap2_s5_clk_src = { @@ -975,7 +975,7 @@ .parent_data = gcc_parent_data_8, .num_parents = ARRAY_SIZE(gcc_parent_data_8), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap2_s6_clk_src = { @@ -992,7 +992,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap2_s7_clk_src = { @@ -1159,7 +1159,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_shared_no_init_park_ops, }, }; @@ -3003,7 +3003,7 @@ .pd = { .name = "pcie_0_gdsc", }, - .pwrsts = PWRSTS_OFF_ON, + .pwrsts = PWRSTS_RET_ON, .flags = VOTABLE | POLL_CFG_GDSCR | RETAIN_FF_ENABLE, }; @@ -3014,7 +3014,7 @@ .pd = { .name = "pcie_0_phy_gdsc", }, - .pwrsts = PWRSTS_OFF_ON, + .pwrsts = PWRSTS_RET_ON, .flags = VOTABLE | POLL_CFG_GDSCR | RETAIN_FF_ENABLE, }; @@ -3025,7 +3025,7 @@ .pd = { .name = "pcie_1_gdsc", }, - .pwrsts = PWRSTS_OFF_ON, + .pwrsts = PWRSTS_RET_ON, .flags = VOTABLE | POLL_CFG_GDSCR | RETAIN_FF_ENABLE, }; @@ -3036,7 +3036,7 @@ .pd = { .name = "pcie_1_phy_gdsc", }, - .pwrsts = PWRSTS_OFF_ON, + .pwrsts = PWRSTS_RET_ON, .flags = VOTABLE | POLL_CFG_GDSCR | RETAIN_FF_ENABLE, }; --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/gcc-sm8650.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/gcc-sm8650.c @@ -713,7 +713,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }, }; @@ -728,7 +728,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }, }; @@ -743,7 +743,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }, }; @@ -758,7 +758,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }, }; @@ -773,7 +773,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }, }; @@ -788,7 +788,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }, }; @@ -803,7 +803,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }, }; @@ -818,7 +818,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }, }; @@ -833,7 +833,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }, }; @@ -848,7 +848,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }, }; @@ -863,7 +863,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_qspi_ref_clk_src = { @@ -899,7 +899,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s0_clk_src = { @@ -916,7 +916,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s1_clk_src = { @@ -948,7 +948,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s3_clk_src = { @@ -980,7 +980,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s4_clk_src = { @@ -997,7 +997,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s5_clk_src = { @@ -1014,7 +1014,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s6_clk_src = { @@ -1031,7 +1031,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s7_clk_src = { @@ -1059,7 +1059,7 @@ .parent_data = gcc_parent_data_2, .num_parents = ARRAY_SIZE(gcc_parent_data_2), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }, }; @@ -1068,7 +1068,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap2_s0_clk_src = { @@ -1085,7 +1085,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap2_s1_clk_src = { @@ -1102,7 +1102,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap2_s2_clk_src = { @@ -1119,7 +1119,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap2_s3_clk_src = { @@ -1136,7 +1136,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap2_s4_clk_src = { @@ -1153,7 +1153,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap2_s5_clk_src = { @@ -1186,7 +1186,7 @@ .parent_data = gcc_parent_data_10, .num_parents = ARRAY_SIZE(gcc_parent_data_10), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap2_s6_clk_src = { @@ -1203,7 +1203,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap2_s7_clk_src = { @@ -1226,7 +1226,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap3_qspi_ref_clk_src = { @@ -3437,7 +3437,7 @@ .pd = { .name = "pcie_0_gdsc", }, - .pwrsts = PWRSTS_OFF_ON, + .pwrsts = PWRSTS_RET_ON, .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE | VOTABLE, }; @@ -3448,7 +3448,7 @@ .pd = { .name = "pcie_0_phy_gdsc", }, - .pwrsts = PWRSTS_OFF_ON, + .pwrsts = PWRSTS_RET_ON, .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE | VOTABLE, }; @@ -3459,7 +3459,7 @@ .pd = { .name = "pcie_1_gdsc", }, - .pwrsts = PWRSTS_OFF_ON, + .pwrsts = PWRSTS_RET_ON, .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE | VOTABLE, }; @@ -3470,7 +3470,7 @@ .pd = { .name = "pcie_1_phy_gdsc", }, - .pwrsts = PWRSTS_OFF_ON, + .pwrsts = PWRSTS_RET_ON, .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE | VOTABLE, }; --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/gcc-x1e80100.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/gcc-x1e80100.c @@ -670,7 +670,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap0_s0_clk_src = { @@ -687,7 +687,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap0_s1_clk_src = { @@ -719,7 +719,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap0_s2_clk_src = { @@ -736,7 +736,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap0_s3_clk_src = { @@ -768,7 +768,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap0_s4_clk_src = { @@ -785,7 +785,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap0_s5_clk_src = { @@ -802,7 +802,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap0_s6_clk_src = { @@ -819,7 +819,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap0_s7_clk_src = { @@ -836,7 +836,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s0_clk_src = { @@ -853,7 +853,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s1_clk_src = { @@ -870,7 +870,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s2_clk_src = { @@ -887,7 +887,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s3_clk_src = { @@ -904,7 +904,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s4_clk_src = { @@ -921,7 +921,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s5_clk_src = { @@ -938,7 +938,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s6_clk_src = { @@ -955,7 +955,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap1_s7_clk_src = { @@ -972,7 +972,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap2_s0_clk_src = { @@ -989,7 +989,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap2_s1_clk_src = { @@ -1006,7 +1006,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap2_s2_clk_src = { @@ -1023,7 +1023,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap2_s3_clk_src = { @@ -1040,7 +1040,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap2_s4_clk_src = { @@ -1057,7 +1057,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap2_s5_clk_src = { @@ -1074,7 +1074,7 @@ .parent_data = gcc_parent_data_8, .num_parents = ARRAY_SIZE(gcc_parent_data_8), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap2_s6_clk_src = { @@ -1091,7 +1091,7 @@ .parent_data = gcc_parent_data_0, .num_parents = ARRAY_SIZE(gcc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_shared_ops, + .ops = &clk_rcg2_ops, }; static struct clk_rcg2 gcc_qupv3_wrap2_s7_clk_src = { @@ -2812,7 +2812,7 @@ static struct clk_branch gcc_pcie_0_pipe_clk = { .halt_reg = 0xa0044, - .halt_check = BRANCH_HALT_VOTED, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x52010, .enable_mask = BIT(25), @@ -2901,7 +2901,7 @@ static struct clk_branch gcc_pcie_1_pipe_clk = { .halt_reg = 0x2c044, - .halt_check = BRANCH_HALT_VOTED, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x52020, .enable_mask = BIT(30), @@ -2990,7 +2990,7 @@ static struct clk_branch gcc_pcie_2_pipe_clk = { .halt_reg = 0x13044, - .halt_check = BRANCH_HALT_VOTED, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x52020, .enable_mask = BIT(23), @@ -3110,7 +3110,7 @@ static struct clk_branch gcc_pcie_3_pipe_clk = { .halt_reg = 0x58050, - .halt_check = BRANCH_HALT_VOTED, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x52020, .enable_mask = BIT(3), @@ -3123,7 +3123,7 @@ static struct clk_branch gcc_pcie_3_pipediv2_clk = { .halt_reg = 0x58060, - .halt_check = BRANCH_HALT_VOTED, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x52020, .enable_mask = BIT(5), @@ -3235,7 +3235,7 @@ static struct clk_branch gcc_pcie_4_pipe_clk = { .halt_reg = 0x6b044, - .halt_check = BRANCH_HALT_VOTED, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x52008, .enable_mask = BIT(4), @@ -3248,7 +3248,7 @@ static struct clk_branch gcc_pcie_4_pipediv2_clk = { .halt_reg = 0x6b054, - .halt_check = BRANCH_HALT_VOTED, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x52010, .enable_mask = BIT(27), @@ -3360,7 +3360,7 @@ static struct clk_branch gcc_pcie_5_pipe_clk = { .halt_reg = 0x2f044, - .halt_check = BRANCH_HALT_VOTED, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x52018, .enable_mask = BIT(17), @@ -3373,7 +3373,7 @@ static struct clk_branch gcc_pcie_5_pipediv2_clk = { .halt_reg = 0x2f054, - .halt_check = BRANCH_HALT_VOTED, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x52018, .enable_mask = BIT(19), @@ -3498,7 +3498,7 @@ static struct clk_branch gcc_pcie_6a_pipe_clk = { .halt_reg = 0x31050, - .halt_check = BRANCH_HALT_VOTED, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x52018, .enable_mask = BIT(26), @@ -3511,7 +3511,7 @@ static struct clk_branch gcc_pcie_6a_pipediv2_clk = { .halt_reg = 0x31060, - .halt_check = BRANCH_HALT_VOTED, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x52018, .enable_mask = BIT(28), @@ -3636,7 +3636,7 @@ static struct clk_branch gcc_pcie_6b_pipe_clk = { .halt_reg = 0x8d050, - .halt_check = BRANCH_HALT_VOTED, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x52000, .enable_mask = BIT(30), @@ -3649,7 +3649,7 @@ static struct clk_branch gcc_pcie_6b_pipediv2_clk = { .halt_reg = 0x8d060, - .halt_check = BRANCH_HALT_VOTED, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x52010, .enable_mask = BIT(28), @@ -5109,7 +5109,7 @@ static struct clk_branch gcc_usb3_mp_phy_pipe_0_clk = { .halt_reg = 0x17290, - .halt_check = BRANCH_HALT, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x17290, .enable_mask = BIT(0), @@ -5122,7 +5122,7 @@ static struct clk_branch gcc_usb3_mp_phy_pipe_1_clk = { .halt_reg = 0x17298, - .halt_check = BRANCH_HALT, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x17298, .enable_mask = BIT(0), @@ -5186,7 +5186,7 @@ static struct clk_branch gcc_usb3_prim_phy_pipe_clk = { .halt_reg = 0x39068, - .halt_check = BRANCH_HALT_VOTED, + .halt_check = BRANCH_HALT_SKIP, .hwcg_reg = 0x39068, .hwcg_bit = 1, .clkr = { @@ -5257,7 +5257,7 @@ static struct clk_branch gcc_usb3_sec_phy_pipe_clk = { .halt_reg = 0xa1068, - .halt_check = BRANCH_HALT_VOTED, + .halt_check = BRANCH_HALT_SKIP, .hwcg_reg = 0xa1068, .hwcg_bit = 1, .clkr = { @@ -5269,6 +5269,7 @@ &gcc_usb3_sec_phy_pipe_clk_src.clkr.hw, }, .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, }, }, @@ -5327,7 +5328,7 @@ static struct clk_branch gcc_usb3_tert_phy_pipe_clk = { .halt_reg = 0xa2068, - .halt_check = BRANCH_HALT_VOTED, + .halt_check = BRANCH_HALT_SKIP, .hwcg_reg = 0xa2068, .hwcg_bit = 1, .clkr = { @@ -5339,6 +5340,7 @@ &gcc_usb3_tert_phy_pipe_clk_src.clkr.hw, }, .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, }, }, @@ -5405,7 +5407,7 @@ static struct clk_branch gcc_usb4_0_phy_p2rr2p_pipe_clk = { .halt_reg = 0x9f0d8, - .halt_check = BRANCH_HALT, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x9f0d8, .enable_mask = BIT(0), @@ -5418,7 +5420,7 @@ static struct clk_branch gcc_usb4_0_phy_pcie_pipe_clk = { .halt_reg = 0x9f048, - .halt_check = BRANCH_HALT_VOTED, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x52010, .enable_mask = BIT(19), @@ -5457,7 +5459,7 @@ static struct clk_branch gcc_usb4_0_phy_usb_pipe_clk = { .halt_reg = 0x9f0a4, - .halt_check = BRANCH_HALT_VOTED, + .halt_check = BRANCH_HALT_SKIP, .hwcg_reg = 0x9f0a4, .hwcg_bit = 1, .clkr = { @@ -5582,7 +5584,7 @@ static struct clk_branch gcc_usb4_1_phy_p2rr2p_pipe_clk = { .halt_reg = 0x2b0d8, - .halt_check = BRANCH_HALT, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x2b0d8, .enable_mask = BIT(0), @@ -5595,7 +5597,7 @@ static struct clk_branch gcc_usb4_1_phy_pcie_pipe_clk = { .halt_reg = 0x2b048, - .halt_check = BRANCH_HALT_VOTED, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x52028, .enable_mask = BIT(0), @@ -5634,7 +5636,7 @@ static struct clk_branch gcc_usb4_1_phy_usb_pipe_clk = { .halt_reg = 0x2b0a4, - .halt_check = BRANCH_HALT_VOTED, + .halt_check = BRANCH_HALT_SKIP, .hwcg_reg = 0x2b0a4, .hwcg_bit = 1, .clkr = { @@ -5759,7 +5761,7 @@ static struct clk_branch gcc_usb4_2_phy_p2rr2p_pipe_clk = { .halt_reg = 0x110d8, - .halt_check = BRANCH_HALT, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x110d8, .enable_mask = BIT(0), @@ -5772,7 +5774,7 @@ static struct clk_branch gcc_usb4_2_phy_pcie_pipe_clk = { .halt_reg = 0x11048, - .halt_check = BRANCH_HALT_VOTED, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x52028, .enable_mask = BIT(1), @@ -5811,7 +5813,7 @@ static struct clk_branch gcc_usb4_2_phy_usb_pipe_clk = { .halt_reg = 0x110a4, - .halt_check = BRANCH_HALT_VOTED, + .halt_check = BRANCH_HALT_SKIP, .hwcg_reg = 0x110a4, .hwcg_bit = 1, .clkr = { @@ -6081,7 +6083,7 @@ .pd = { .name = "gcc_usb20_prim_gdsc", }, - .pwrsts = PWRSTS_OFF_ON, + .pwrsts = PWRSTS_RET_ON, .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE, }; @@ -6153,7 +6155,7 @@ .pd = { .name = "gcc_usb3_mp_ss1_phy_gdsc", }, - .pwrsts = PWRSTS_OFF_ON, + .pwrsts = PWRSTS_RET_ON, .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE, }; @@ -6201,7 +6203,7 @@ .pd = { .name = "gcc_usb_0_phy_gdsc", }, - .pwrsts = PWRSTS_OFF_ON, + .pwrsts = PWRSTS_RET_ON, .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE, }; @@ -6213,7 +6215,7 @@ .pd = { .name = "gcc_usb_1_phy_gdsc", }, - .pwrsts = PWRSTS_OFF_ON, + .pwrsts = PWRSTS_RET_ON, .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE, }; --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/gpucc-sa8775p.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/gpucc-sa8775p.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2021-2022, 2024, Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2023, Linaro Limited */ @@ -161,7 +161,7 @@ .name = "gpu_cc_ff_clk_src", .parent_data = gpu_cc_parent_data_0, .num_parents = ARRAY_SIZE(gpu_cc_parent_data_0), - .ops = &clk_rcg2_ops, + .ops = &clk_rcg2_shared_ops, }, }; @@ -181,7 +181,7 @@ .parent_data = gpu_cc_parent_data_1, .num_parents = ARRAY_SIZE(gpu_cc_parent_data_1), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, + .ops = &clk_rcg2_shared_ops, }, }; @@ -200,7 +200,7 @@ .name = "gpu_cc_hub_clk_src", .parent_data = gpu_cc_parent_data_2, .num_parents = ARRAY_SIZE(gpu_cc_parent_data_2), - .ops = &clk_rcg2_ops, + .ops = &clk_rcg2_shared_ops, }, }; @@ -280,7 +280,7 @@ &gpu_cc_hub_ahb_div_clk_src.clkr.hw, }, .num_parents = 1, - .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, + .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, }, }, @@ -294,8 +294,7 @@ .enable_mask = BIT(0), .hw.init = &(const struct clk_init_data){ .name = "gpu_cc_cb_clk", - .flags = CLK_IS_CRITICAL, - .ops = &clk_branch2_ops, + .ops = &clk_branch2_aon_ops, }, }, }; @@ -312,7 +311,7 @@ &gpu_cc_hub_ahb_div_clk_src.clkr.hw, }, .num_parents = 1, - .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, + .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, }, }, @@ -330,7 +329,7 @@ &gpu_cc_ff_clk_src.clkr.hw, }, .num_parents = 1, - .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, + .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, }, }, @@ -348,7 +347,7 @@ &gpu_cc_gmu_clk_src.clkr.hw, }, .num_parents = 1, - .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, + .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_aon_ops, }, }, @@ -362,7 +361,6 @@ .enable_mask = BIT(0), .hw.init = &(const struct clk_init_data){ .name = "gpu_cc_cx_snoc_dvm_clk", - .flags = CLK_IS_CRITICAL, .ops = &clk_branch2_ops, }, }, @@ -380,7 +378,7 @@ &gpu_cc_xo_clk_src.clkr.hw, }, .num_parents = 1, - .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, + .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, }, }, @@ -398,7 +396,7 @@ &gpu_cc_xo_clk_src.clkr.hw, }, .num_parents = 1, - .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, + .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, }, }, @@ -416,7 +414,7 @@ &gpu_cc_demet_div_clk_src.clkr.hw, }, .num_parents = 1, - .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, + .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_aon_ops, }, }, @@ -430,7 +428,6 @@ .enable_mask = BIT(0), .hw.init = &(const struct clk_init_data){ .name = "gpu_cc_hlos1_vote_gpu_smmu_clk", - .flags = CLK_IS_CRITICAL, .ops = &clk_branch2_ops, }, }, @@ -448,7 +445,7 @@ &gpu_cc_hub_clk_src.clkr.hw, }, .num_parents = 1, - .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, + .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_aon_ops, }, }, @@ -466,7 +463,7 @@ &gpu_cc_hub_cx_int_div_clk_src.clkr.hw, }, .num_parents = 1, - .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, + .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_aon_ops, }, }, @@ -480,7 +477,6 @@ .enable_mask = BIT(0), .hw.init = &(const struct clk_init_data){ .name = "gpu_cc_memnoc_gfx_clk", - .flags = CLK_IS_CRITICAL, .ops = &clk_branch2_ops, }, }, @@ -494,7 +490,6 @@ .enable_mask = BIT(0), .hw.init = &(const struct clk_init_data){ .name = "gpu_cc_sleep_clk", - .flags = CLK_IS_CRITICAL, .ops = &clk_branch2_ops, }, }, @@ -528,16 +523,22 @@ static struct gdsc cx_gdsc = { .gdscr = 0x9108, + .en_rest_wait_val = 0x2, + .en_few_wait_val = 0x2, + .clk_dis_wait_val = 0xf, .gds_hw_ctrl = 0x953c, .pd = { .name = "cx_gdsc", }, .pwrsts = PWRSTS_OFF_ON, - .flags = VOTABLE | RETAIN_FF_ENABLE | ALWAYS_ON, + .flags = VOTABLE | RETAIN_FF_ENABLE, }; static struct gdsc gx_gdsc = { .gdscr = 0x905c, + .en_rest_wait_val = 0x2, + .en_few_wait_val = 0x2, + .clk_dis_wait_val = 0xf, .pd = { .name = "gx_gdsc", .power_on = gdsc_gx_do_nothing_enable, --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/gpucc-sm8350.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/gpucc-sm8350.c @@ -2,6 +2,7 @@ /* * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. * Copyright (c) 2022, Linaro Limited + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -147,7 +148,7 @@ .parent_data = gpu_cc_parent_data_0, .num_parents = ARRAY_SIZE(gpu_cc_parent_data_0), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, + .ops = &clk_rcg2_shared_ops, }, }; @@ -169,7 +170,7 @@ .parent_data = gpu_cc_parent_data_1, .num_parents = ARRAY_SIZE(gpu_cc_parent_data_1), .flags = CLK_SET_RATE_PARENT, - .ops = &clk_rcg2_ops, + .ops = &clk_rcg2_shared_ops, }, }; --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/kpss-xcc.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/kpss-xcc.c @@ -58,9 +58,7 @@ if (IS_ERR(hw)) return PTR_ERR(hw); - of_clk_add_hw_provider(dev->of_node, of_clk_hw_simple_get, hw); - - return 0; + return of_clk_add_hw_provider(dev->of_node, of_clk_hw_simple_get, hw); } static struct platform_driver kpss_xcc_driver = { --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/mmcc-apq8084.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/mmcc-apq8084.c @@ -348,6 +348,7 @@ F(333430000, P_MMPLL1, 3.5, 0, 0), F(400000000, P_MMPLL0, 2, 0, 0), F(466800000, P_MMPLL1, 2.5, 0, 0), + { } }; static struct clk_rcg2 mmss_axi_clk_src = { @@ -372,6 +373,7 @@ F(150000000, P_GPLL0, 4, 0, 0), F(228570000, P_MMPLL0, 3.5, 0, 0), F(320000000, P_MMPLL0, 2.5, 0, 0), + { } }; static struct clk_rcg2 ocmemnoc_clk_src = { --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/mmcc-msm8974.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/mmcc-msm8974.c @@ -290,6 +290,7 @@ F(291750000, P_MMPLL1, 4, 0, 0), F(400000000, P_MMPLL0, 2, 0, 0), F(466800000, P_MMPLL1, 2.5, 0, 0), + { } }; static struct clk_rcg2 mmss_axi_clk_src = { @@ -314,6 +315,7 @@ F(150000000, P_GPLL0, 4, 0, 0), F(291750000, P_MMPLL1, 4, 0, 0), F(400000000, P_MMPLL0, 2, 0, 0), + { } }; static struct clk_rcg2 ocmemnoc_clk_src = { --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/mmcc-msm8998.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/mmcc-msm8998.c @@ -2535,6 +2535,8 @@ static struct gdsc video_top_gdsc = { .gdscr = 0x1024, + .cxcs = (unsigned int []){ 0x1028, 0x1034, 0x1038 }, + .cxc_count = 3, .pd = { .name = "video_top", }, @@ -2543,20 +2545,26 @@ static struct gdsc video_subcore0_gdsc = { .gdscr = 0x1040, + .cxcs = (unsigned int []){ 0x1048 }, + .cxc_count = 1, .pd = { .name = "video_subcore0", }, .parent = &video_top_gdsc.pd, .pwrsts = PWRSTS_OFF_ON, + .flags = HW_CTRL, }; static struct gdsc video_subcore1_gdsc = { .gdscr = 0x1044, + .cxcs = (unsigned int []){ 0x104c }, + .cxc_count = 1, .pd = { .name = "video_subcore1", }, .parent = &video_top_gdsc.pd, .pwrsts = PWRSTS_OFF_ON, + .flags = HW_CTRL, }; static struct gdsc mdss_gdsc = { --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/reset.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/reset.c @@ -22,8 +22,8 @@ return 0; } -static int -qcom_reset_assert(struct reset_controller_dev *rcdev, unsigned long id) +static int qcom_reset_set_assert(struct reset_controller_dev *rcdev, + unsigned long id, bool assert) { struct qcom_reset_controller *rst; const struct qcom_reset_map *map; @@ -33,21 +33,22 @@ map = &rst->reset_map[id]; mask = map->bitmask ? map->bitmask : BIT(map->bit); - return regmap_update_bits(rst->regmap, map->reg, mask, mask); + regmap_update_bits(rst->regmap, map->reg, mask, assert ? mask : 0); + + /* Read back the register to ensure write completion, ignore the value */ + regmap_read(rst->regmap, map->reg, &mask); + + return 0; } -static int -qcom_reset_deassert(struct reset_controller_dev *rcdev, unsigned long id) +static int qcom_reset_assert(struct reset_controller_dev *rcdev, unsigned long id) { - struct qcom_reset_controller *rst; - const struct qcom_reset_map *map; - u32 mask; - - rst = to_qcom_reset_controller(rcdev); - map = &rst->reset_map[id]; - mask = map->bitmask ? map->bitmask : BIT(map->bit); + return qcom_reset_set_assert(rcdev, id, true); +} - return regmap_update_bits(rst->regmap, map->reg, mask, 0); +static int qcom_reset_deassert(struct reset_controller_dev *rcdev, unsigned long id) +{ + return qcom_reset_set_assert(rcdev, id, false); } const struct reset_control_ops qcom_reset_ops = { --- linux-xilinx-6.8.0.orig/drivers/clk/qcom/tcsrcc-sm8550.c +++ linux-xilinx-6.8.0/drivers/clk/qcom/tcsrcc-sm8550.c @@ -129,6 +129,13 @@ }, }; +static struct clk_regmap *tcsr_cc_sar2130p_clocks[] = { + [TCSR_PCIE_0_CLKREF_EN] = &tcsr_pcie_0_clkref_en.clkr, + [TCSR_PCIE_1_CLKREF_EN] = &tcsr_pcie_1_clkref_en.clkr, + [TCSR_USB2_CLKREF_EN] = &tcsr_usb2_clkref_en.clkr, + [TCSR_USB3_CLKREF_EN] = &tcsr_usb3_clkref_en.clkr, +}; + static struct clk_regmap *tcsr_cc_sm8550_clocks[] = { [TCSR_PCIE_0_CLKREF_EN] = &tcsr_pcie_0_clkref_en.clkr, [TCSR_PCIE_1_CLKREF_EN] = &tcsr_pcie_1_clkref_en.clkr, @@ -146,6 +153,12 @@ .fast_io = true, }; +static const struct qcom_cc_desc tcsr_cc_sar2130p_desc = { + .config = &tcsr_cc_sm8550_regmap_config, + .clks = tcsr_cc_sar2130p_clocks, + .num_clks = ARRAY_SIZE(tcsr_cc_sar2130p_clocks), +}; + static const struct qcom_cc_desc tcsr_cc_sm8550_desc = { .config = &tcsr_cc_sm8550_regmap_config, .clks = tcsr_cc_sm8550_clocks, @@ -153,7 +166,8 @@ }; static const struct of_device_id tcsr_cc_sm8550_match_table[] = { - { .compatible = "qcom,sm8550-tcsr" }, + { .compatible = "qcom,sar2130p-tcsr", .data = &tcsr_cc_sar2130p_desc }, + { .compatible = "qcom,sm8550-tcsr", .data = &tcsr_cc_sm8550_desc }, { } }; MODULE_DEVICE_TABLE(of, tcsr_cc_sm8550_match_table); @@ -162,7 +176,7 @@ { struct regmap *regmap; - regmap = qcom_cc_map(pdev, &tcsr_cc_sm8550_desc); + regmap = qcom_cc_map(pdev, of_device_get_match_data(&pdev->dev)); if (IS_ERR(regmap)) return PTR_ERR(regmap); --- linux-xilinx-6.8.0.orig/drivers/clk/ralink/clk-mtmips.c +++ linux-xilinx-6.8.0/drivers/clk/ralink/clk-mtmips.c @@ -263,8 +263,8 @@ .rate = _rate \ } -static struct mtmips_clk_fixed rt305x_fixed_clocks[] = { - CLK_FIXED("xtal", NULL, 40000000) +static struct mtmips_clk_fixed rt3883_fixed_clocks[] = { + CLK_FIXED("periph", "xtal", 40000000) }; static struct mtmips_clk_fixed rt3352_fixed_clocks[] = { @@ -366,6 +366,12 @@ return container_of(hw, struct mtmips_clk, hw); } +static unsigned long rt2880_xtal_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + return 40000000; +} + static unsigned long rt5350_xtal_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { @@ -677,10 +683,12 @@ } static struct mtmips_clk rt2880_clks_base[] = { + { CLK_BASE("xtal", NULL, rt2880_xtal_recalc_rate) }, { CLK_BASE("cpu", "xtal", rt2880_cpu_recalc_rate) } }; static struct mtmips_clk rt305x_clks_base[] = { + { CLK_BASE("xtal", NULL, rt2880_xtal_recalc_rate) }, { CLK_BASE("cpu", "xtal", rt305x_cpu_recalc_rate) } }; @@ -690,6 +698,7 @@ }; static struct mtmips_clk rt3883_clks_base[] = { + { CLK_BASE("xtal", NULL, rt2880_xtal_recalc_rate) }, { CLK_BASE("cpu", "xtal", rt3883_cpu_recalc_rate) }, { CLK_BASE("bus", "cpu", rt3883_bus_recalc_rate) } }; @@ -746,8 +755,8 @@ static const struct mtmips_clk_data rt2880_clk_data = { .clk_base = rt2880_clks_base, .num_clk_base = ARRAY_SIZE(rt2880_clks_base), - .clk_fixed = rt305x_fixed_clocks, - .num_clk_fixed = ARRAY_SIZE(rt305x_fixed_clocks), + .clk_fixed = NULL, + .num_clk_fixed = 0, .clk_factor = rt2880_factor_clocks, .num_clk_factor = ARRAY_SIZE(rt2880_factor_clocks), .clk_periph = rt2880_pherip_clks, @@ -757,8 +766,8 @@ static const struct mtmips_clk_data rt305x_clk_data = { .clk_base = rt305x_clks_base, .num_clk_base = ARRAY_SIZE(rt305x_clks_base), - .clk_fixed = rt305x_fixed_clocks, - .num_clk_fixed = ARRAY_SIZE(rt305x_fixed_clocks), + .clk_fixed = NULL, + .num_clk_fixed = 0, .clk_factor = rt305x_factor_clocks, .num_clk_factor = ARRAY_SIZE(rt305x_factor_clocks), .clk_periph = rt305x_pherip_clks, @@ -779,8 +788,8 @@ static const struct mtmips_clk_data rt3883_clk_data = { .clk_base = rt3883_clks_base, .num_clk_base = ARRAY_SIZE(rt3883_clks_base), - .clk_fixed = rt305x_fixed_clocks, - .num_clk_fixed = ARRAY_SIZE(rt305x_fixed_clocks), + .clk_fixed = rt3883_fixed_clocks, + .num_clk_fixed = ARRAY_SIZE(rt3883_fixed_clocks), .clk_factor = NULL, .num_clk_factor = 0, .clk_periph = rt5350_pherip_clks, --- linux-xilinx-6.8.0.orig/drivers/clk/renesas/r8a779a0-cpg-mssr.c +++ linux-xilinx-6.8.0/drivers/clk/renesas/r8a779a0-cpg-mssr.c @@ -139,7 +139,7 @@ DEF_MOD("avb3", 214, R8A779A0_CLK_S3D2), DEF_MOD("avb4", 215, R8A779A0_CLK_S3D2), DEF_MOD("avb5", 216, R8A779A0_CLK_S3D2), - DEF_MOD("canfd0", 328, R8A779A0_CLK_CANFD), + DEF_MOD("canfd0", 328, R8A779A0_CLK_S3D2), DEF_MOD("csi40", 331, R8A779A0_CLK_CSI0), DEF_MOD("csi41", 400, R8A779A0_CLK_CSI0), DEF_MOD("csi42", 401, R8A779A0_CLK_CSI0), --- linux-xilinx-6.8.0.orig/drivers/clk/renesas/r8a779f0-cpg-mssr.c +++ linux-xilinx-6.8.0/drivers/clk/renesas/r8a779f0-cpg-mssr.c @@ -161,7 +161,7 @@ DEF_MOD("cmt1", 911, R8A779F0_CLK_R), DEF_MOD("cmt2", 912, R8A779F0_CLK_R), DEF_MOD("cmt3", 913, R8A779F0_CLK_R), - DEF_MOD("pfc0", 915, R8A779F0_CLK_CL16M), + DEF_MOD("pfc0", 915, R8A779F0_CLK_CPEX), DEF_MOD("tsc", 919, R8A779F0_CLK_CL16M), DEF_MOD("rswitch2", 1505, R8A779F0_CLK_RSW2), DEF_MOD("ether-serdes", 1506, R8A779F0_CLK_S0D2_HSC), --- linux-xilinx-6.8.0.orig/drivers/clk/renesas/r8a779g0-cpg-mssr.c +++ linux-xilinx-6.8.0/drivers/clk/renesas/r8a779g0-cpg-mssr.c @@ -22,7 +22,7 @@ enum clk_ids { /* Core Clock Outputs exported to DT */ - LAST_DT_CORE_CLK = R8A779G0_CLK_R, + LAST_DT_CORE_CLK = R8A779G0_CLK_CP, /* External Input Clocks */ CLK_EXTAL, @@ -141,6 +141,7 @@ DEF_FIXED("svd2_vip", R8A779G0_CLK_SVD2_VIP, CLK_SV_VIP, 2, 1), DEF_FIXED("cbfusa", R8A779G0_CLK_CBFUSA, CLK_EXTAL, 2, 1), DEF_FIXED("cpex", R8A779G0_CLK_CPEX, CLK_EXTAL, 2, 1), + DEF_FIXED("cp", R8A779G0_CLK_CP, CLK_EXTAL, 2, 1), DEF_FIXED("viobus", R8A779G0_CLK_VIOBUS, CLK_VIO, 1, 1), DEF_FIXED("viobusd2", R8A779G0_CLK_VIOBUSD2, CLK_VIO, 2, 1), DEF_FIXED("vcbus", R8A779G0_CLK_VCBUS, CLK_VC, 1, 1), @@ -193,7 +194,7 @@ DEF_MOD("msi4", 622, R8A779G0_CLK_MSO), DEF_MOD("msi5", 623, R8A779G0_CLK_MSO), DEF_MOD("pciec0", 624, R8A779G0_CLK_S0D2_HSC), - DEF_MOD("pscie1", 625, R8A779G0_CLK_S0D2_HSC), + DEF_MOD("pciec1", 625, R8A779G0_CLK_S0D2_HSC), DEF_MOD("pwm", 628, R8A779G0_CLK_SASYNCPERD4), DEF_MOD("rpc-if", 629, R8A779G0_CLK_RPCD2), DEF_MOD("scif0", 702, R8A779G0_CLK_SASYNCPERD4), @@ -232,10 +233,10 @@ DEF_MOD("cmt1", 911, R8A779G0_CLK_R), DEF_MOD("cmt2", 912, R8A779G0_CLK_R), DEF_MOD("cmt3", 913, R8A779G0_CLK_R), - DEF_MOD("pfc0", 915, R8A779G0_CLK_CL16M), - DEF_MOD("pfc1", 916, R8A779G0_CLK_CL16M), - DEF_MOD("pfc2", 917, R8A779G0_CLK_CL16M), - DEF_MOD("pfc3", 918, R8A779G0_CLK_CL16M), + DEF_MOD("pfc0", 915, R8A779G0_CLK_CP), + DEF_MOD("pfc1", 916, R8A779G0_CLK_CP), + DEF_MOD("pfc2", 917, R8A779G0_CLK_CP), + DEF_MOD("pfc3", 918, R8A779G0_CLK_CP), DEF_MOD("tsc", 919, R8A779G0_CLK_CL16M), DEF_MOD("tsn", 2723, R8A779G0_CLK_S0D4_HSC), DEF_MOD("ssiu", 2926, R8A779G0_CLK_S0D6_PER), --- linux-xilinx-6.8.0.orig/drivers/clk/renesas/r9a07g043-cpg.c +++ linux-xilinx-6.8.0/drivers/clk/renesas/r9a07g043-cpg.c @@ -138,7 +138,7 @@ DEF_FIXED("SPI1", R9A07G043_CLK_SPI1, CLK_DIV_PLL3_C, 1, 4), DEF_SD_MUX("SD0", R9A07G043_CLK_SD0, SEL_SDHI0, SEL_SDHI0_STS, sel_shdi, mtable_sdhi, 0, rzg2l_cpg_sd_clk_mux_notifier), - DEF_SD_MUX("SD1", R9A07G043_CLK_SD1, SEL_SDHI1, SEL_SDHI0_STS, sel_shdi, + DEF_SD_MUX("SD1", R9A07G043_CLK_SD1, SEL_SDHI1, SEL_SDHI1_STS, sel_shdi, mtable_sdhi, 0, rzg2l_cpg_sd_clk_mux_notifier), DEF_FIXED("SD0_DIV4", CLK_SD0_DIV4, R9A07G043_CLK_SD0, 1, 4), DEF_FIXED("SD1_DIV4", CLK_SD1_DIV4, R9A07G043_CLK_SD1, 1, 4), @@ -265,6 +265,10 @@ 0x5a8, 1), DEF_MOD("tsu_pclk", R9A07G043_TSU_PCLK, R9A07G043_CLK_TSU, 0x5ac, 0), +#ifdef CONFIG_RISCV + DEF_MOD("nceplic_aclk", R9A07G043_NCEPLIC_ACLK, R9A07G043_CLK_P1, + 0x608, 0), +#endif }; static struct rzg2l_reset r9a07g043_resets[] = { @@ -318,6 +322,10 @@ DEF_RST(R9A07G043_ADC_PRESETN, 0x8a8, 0), DEF_RST(R9A07G043_ADC_ADRST_N, 0x8a8, 1), DEF_RST(R9A07G043_TSU_PRESETN, 0x8ac, 0), +#ifdef CONFIG_RISCV + DEF_RST(R9A07G043_NCEPLIC_ARESETN, 0x908, 0), +#endif + }; static const unsigned int r9a07g043_crit_mod_clks[] __initconst = { @@ -327,6 +335,7 @@ #endif #ifdef CONFIG_RISCV MOD_CLK_BASE + R9A07G043_IAX45_CLK, + MOD_CLK_BASE + R9A07G043_NCEPLIC_ACLK, #endif MOD_CLK_BASE + R9A07G043_DMAC_ACLK, }; --- linux-xilinx-6.8.0.orig/drivers/clk/renesas/r9a07g044-cpg.c +++ linux-xilinx-6.8.0/drivers/clk/renesas/r9a07g044-cpg.c @@ -178,7 +178,7 @@ DEF_FIXED("SPI1", R9A07G044_CLK_SPI1, CLK_DIV_PLL3_C, 1, 4), DEF_SD_MUX("SD0", R9A07G044_CLK_SD0, SEL_SDHI0, SEL_SDHI0_STS, sel_shdi, mtable_sdhi, 0, rzg2l_cpg_sd_clk_mux_notifier), - DEF_SD_MUX("SD1", R9A07G044_CLK_SD1, SEL_SDHI1, SEL_SDHI0_STS, sel_shdi, + DEF_SD_MUX("SD1", R9A07G044_CLK_SD1, SEL_SDHI1, SEL_SDHI1_STS, sel_shdi, mtable_sdhi, 0, rzg2l_cpg_sd_clk_mux_notifier), DEF_FIXED("SD0_DIV4", CLK_SD0_DIV4, R9A07G044_CLK_SD0, 1, 4), DEF_FIXED("SD1_DIV4", CLK_SD1_DIV4, R9A07G044_CLK_SD1, 1, 4), --- linux-xilinx-6.8.0.orig/drivers/clk/renesas/rzg2l-cpg.c +++ linux-xilinx-6.8.0/drivers/clk/renesas/rzg2l-cpg.c @@ -555,7 +555,7 @@ rzg2l_cpg_get_foutpostdiv_rate(struct rzg2l_pll5_param *params, unsigned long rate) { - unsigned long foutpostdiv_rate; + unsigned long foutpostdiv_rate, foutvco_rate; params->pl5_intin = rate / MEGA; params->pl5_fracin = div_u64(((u64)rate % MEGA) << 24, MEGA); @@ -564,10 +564,11 @@ params->pl5_postdiv2 = 1; params->pl5_spread = 0x16; - foutpostdiv_rate = - EXTAL_FREQ_IN_MEGA_HZ * MEGA / params->pl5_refdiv * - ((((params->pl5_intin << 24) + params->pl5_fracin)) >> 24) / - (params->pl5_postdiv1 * params->pl5_postdiv2); + foutvco_rate = div_u64(mul_u32_u32(EXTAL_FREQ_IN_MEGA_HZ * MEGA, + (params->pl5_intin << 24) + params->pl5_fracin), + params->pl5_refdiv) >> 24; + foutpostdiv_rate = DIV_ROUND_CLOSEST_ULL(foutvco_rate, + params->pl5_postdiv1 * params->pl5_postdiv2); return foutpostdiv_rate; } --- linux-xilinx-6.8.0.orig/drivers/clk/rockchip/clk-rk3228.c +++ linux-xilinx-6.8.0/drivers/clk/rockchip/clk-rk3228.c @@ -409,7 +409,7 @@ RK2928_CLKSEL_CON(29), 0, 3, DFLAGS), DIV(0, "sclk_vop_pre", "sclk_vop_src", 0, RK2928_CLKSEL_CON(27), 8, 8, DFLAGS), - MUX(DCLK_VOP, "dclk_vop", mux_dclk_vop_p, 0, + MUX(DCLK_VOP, "dclk_vop", mux_dclk_vop_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT, RK2928_CLKSEL_CON(27), 1, 1, MFLAGS), FACTOR(0, "xin12m", "xin24m", 0, 1, 2), --- linux-xilinx-6.8.0.orig/drivers/clk/rockchip/clk-rk3588.c +++ linux-xilinx-6.8.0/drivers/clk/rockchip/clk-rk3588.c @@ -526,7 +526,7 @@ PNAME(pmu_300m_24m_p) = { "clk_300m_src", "xin24m" }; PNAME(pmu_400m_24m_p) = { "clk_400m_src", "xin24m" }; PNAME(pmu_100m_50m_24m_src_p) = { "clk_pmu1_100m_src", "clk_pmu1_50m_src", "xin24m" }; -PNAME(pmu_24m_32k_100m_src_p) = { "xin24m", "32k", "clk_pmu1_100m_src" }; +PNAME(pmu_24m_32k_100m_src_p) = { "xin24m", "xin32k", "clk_pmu1_100m_src" }; PNAME(hclk_pmu1_root_p) = { "clk_pmu1_200m_src", "clk_pmu1_100m_src", "clk_pmu1_50m_src", "xin24m" }; PNAME(hclk_pmu_cm0_root_p) = { "clk_pmu1_400m_src", "clk_pmu1_200m_src", "clk_pmu1_100m_src", "xin24m" }; PNAME(mclk_pdm0_p) = { "clk_pmu1_300m_src", "clk_pmu1_200m_src" }; --- linux-xilinx-6.8.0.orig/drivers/clk/rockchip/clk.c +++ linux-xilinx-6.8.0/drivers/clk/rockchip/clk.c @@ -433,12 +433,13 @@ struct rockchip_clk_branch *list, unsigned int nr_clk) { - struct clk *clk = NULL; + struct clk *clk; unsigned int idx; unsigned long flags; for (idx = 0; idx < nr_clk; idx++, list++) { flags = list->flags; + clk = NULL; /* catch simple muxes */ switch (list->branch_type) { --- linux-xilinx-6.8.0.orig/drivers/clk/samsung/clk-exynos-clkout.c +++ linux-xilinx-6.8.0/drivers/clk/samsung/clk-exynos-clkout.c @@ -13,9 +13,9 @@ #include #include #include +#include #include #include -#include #define EXYNOS_CLKOUT_NR_CLKS 1 #define EXYNOS_CLKOUT_PARENTS 32 @@ -84,17 +84,24 @@ static int exynos_clkout_match_parent_dev(struct device *dev, u32 *mux_mask) { const struct exynos_clkout_variant *variant; + const struct of_device_id *match; if (!dev->parent) { dev_err(dev, "not instantiated from MFD\n"); return -EINVAL; } - variant = device_get_match_data(dev->parent); - if (!variant) { + /* + * 'exynos_clkout_ids' arrays is not the ids array matched by + * the dev->parent driver, so of_device_get_match_data() or + * device_get_match_data() cannot be used here. + */ + match = of_match_device(exynos_clkout_ids, dev->parent); + if (!match) { dev_err(dev, "cannot match parent device\n"); return -EINVAL; } + variant = match->data; *mux_mask = variant->mux_mask; --- linux-xilinx-6.8.0.orig/drivers/clk/samsung/clk-exynos4.c +++ linux-xilinx-6.8.0/drivers/clk/samsung/clk-exynos4.c @@ -1040,19 +1040,20 @@ static void __init exynos4_clk_register_finpll(struct samsung_clk_provider *ctx) { struct samsung_fixed_rate_clock fclk; - struct clk *clk; - unsigned long finpll_f = 24000000; + unsigned long finpll_f; + unsigned int parent; char *parent_name; unsigned int xom = exynos4_get_xom(); parent_name = xom & 1 ? "xusbxti" : "xxti"; - clk = clk_get(NULL, parent_name); - if (IS_ERR(clk)) { + parent = xom & 1 ? CLK_XUSBXTI : CLK_XXTI; + + finpll_f = clk_hw_get_rate(ctx->clk_data.hws[parent]); + if (!finpll_f) { pr_err("%s: failed to lookup parent clock %s, assuming " "fin_pll clock frequency is 24MHz\n", __func__, parent_name); - } else { - finpll_f = clk_get_rate(clk); + finpll_f = 24000000; } fclk.id = CLK_FIN_PLL; --- linux-xilinx-6.8.0.orig/drivers/clk/samsung/clk-exynos7885.c +++ linux-xilinx-6.8.0/drivers/clk/samsung/clk-exynos7885.c @@ -20,7 +20,7 @@ #define CLKS_NR_TOP (CLK_GOUT_FSYS_USB30DRD + 1) #define CLKS_NR_CORE (CLK_GOUT_TREX_P_CORE_PCLK_P_CORE + 1) #define CLKS_NR_PERI (CLK_GOUT_WDT1_PCLK + 1) -#define CLKS_NR_FSYS (CLK_GOUT_MMC_SDIO_SDCLKIN + 1) +#define CLKS_NR_FSYS (CLK_MOUT_FSYS_USB30DRD_USER + 1) /* ---- CMU_TOP ------------------------------------------------------------- */ --- linux-xilinx-6.8.0.orig/drivers/clk/samsung/clk-exynos850.c +++ linux-xilinx-6.8.0/drivers/clk/samsung/clk-exynos850.c @@ -605,7 +605,7 @@ static const struct samsung_gate_clock apm_gate_clks[] __initconst = { GATE(CLK_GOUT_CLKCMU_CMGP_BUS, "gout_clkcmu_cmgp_bus", "dout_apm_bus", - CLK_CON_GAT_CLKCMU_CMGP_BUS, 21, 0, 0), + CLK_CON_GAT_CLKCMU_CMGP_BUS, 21, CLK_SET_RATE_PARENT, 0), GATE(CLK_GOUT_CLKCMU_CHUB_BUS, "gout_clkcmu_chub_bus", "mout_clkcmu_chub_bus", CLK_CON_GAT_GATE_CLKCMU_CHUB_BUS, 21, 0, 0), @@ -974,19 +974,19 @@ static const struct samsung_mux_clock cmgp_mux_clks[] __initconst = { MUX(CLK_MOUT_CMGP_ADC, "mout_cmgp_adc", mout_cmgp_adc_p, CLK_CON_MUX_CLK_CMGP_ADC, 0, 1), - MUX(CLK_MOUT_CMGP_USI0, "mout_cmgp_usi0", mout_cmgp_usi0_p, - CLK_CON_MUX_MUX_CLK_CMGP_USI_CMGP0, 0, 1), - MUX(CLK_MOUT_CMGP_USI1, "mout_cmgp_usi1", mout_cmgp_usi1_p, - CLK_CON_MUX_MUX_CLK_CMGP_USI_CMGP1, 0, 1), + MUX_F(CLK_MOUT_CMGP_USI0, "mout_cmgp_usi0", mout_cmgp_usi0_p, + CLK_CON_MUX_MUX_CLK_CMGP_USI_CMGP0, 0, 1, CLK_SET_RATE_PARENT, 0), + MUX_F(CLK_MOUT_CMGP_USI1, "mout_cmgp_usi1", mout_cmgp_usi1_p, + CLK_CON_MUX_MUX_CLK_CMGP_USI_CMGP1, 0, 1, CLK_SET_RATE_PARENT, 0), }; static const struct samsung_div_clock cmgp_div_clks[] __initconst = { DIV(CLK_DOUT_CMGP_ADC, "dout_cmgp_adc", "gout_clkcmu_cmgp_bus", CLK_CON_DIV_DIV_CLK_CMGP_ADC, 0, 4), - DIV(CLK_DOUT_CMGP_USI0, "dout_cmgp_usi0", "mout_cmgp_usi0", - CLK_CON_DIV_DIV_CLK_CMGP_USI_CMGP0, 0, 5), - DIV(CLK_DOUT_CMGP_USI1, "dout_cmgp_usi1", "mout_cmgp_usi1", - CLK_CON_DIV_DIV_CLK_CMGP_USI_CMGP1, 0, 5), + DIV_F(CLK_DOUT_CMGP_USI0, "dout_cmgp_usi0", "mout_cmgp_usi0", + CLK_CON_DIV_DIV_CLK_CMGP_USI_CMGP0, 0, 5, CLK_SET_RATE_PARENT, 0), + DIV_F(CLK_DOUT_CMGP_USI1, "dout_cmgp_usi1", "mout_cmgp_usi1", + CLK_CON_DIV_DIV_CLK_CMGP_USI_CMGP1, 0, 5, CLK_SET_RATE_PARENT, 0), }; static const struct samsung_gate_clock cmgp_gate_clks[] __initconst = { @@ -1001,12 +1001,12 @@ "gout_clkcmu_cmgp_bus", CLK_CON_GAT_GOUT_CMGP_GPIO_PCLK, 21, CLK_IGNORE_UNUSED, 0), GATE(CLK_GOUT_CMGP_USI0_IPCLK, "gout_cmgp_usi0_ipclk", "dout_cmgp_usi0", - CLK_CON_GAT_GOUT_CMGP_USI_CMGP0_IPCLK, 21, 0, 0), + CLK_CON_GAT_GOUT_CMGP_USI_CMGP0_IPCLK, 21, CLK_SET_RATE_PARENT, 0), GATE(CLK_GOUT_CMGP_USI0_PCLK, "gout_cmgp_usi0_pclk", "gout_clkcmu_cmgp_bus", CLK_CON_GAT_GOUT_CMGP_USI_CMGP0_PCLK, 21, 0, 0), GATE(CLK_GOUT_CMGP_USI1_IPCLK, "gout_cmgp_usi1_ipclk", "dout_cmgp_usi1", - CLK_CON_GAT_GOUT_CMGP_USI_CMGP1_IPCLK, 21, 0, 0), + CLK_CON_GAT_GOUT_CMGP_USI_CMGP1_IPCLK, 21, CLK_SET_RATE_PARENT, 0), GATE(CLK_GOUT_CMGP_USI1_PCLK, "gout_cmgp_usi1_pclk", "gout_clkcmu_cmgp_bus", CLK_CON_GAT_GOUT_CMGP_USI_CMGP1_PCLK, 21, 0, 0), @@ -1557,8 +1557,9 @@ mout_peri_uart_user_p, PLL_CON0_MUX_CLKCMU_PERI_UART_USER, 4, 1), MUX(CLK_MOUT_PERI_HSI2C_USER, "mout_peri_hsi2c_user", mout_peri_hsi2c_user_p, PLL_CON0_MUX_CLKCMU_PERI_HSI2C_USER, 4, 1), - MUX(CLK_MOUT_PERI_SPI_USER, "mout_peri_spi_user", mout_peri_spi_user_p, - PLL_CON0_MUX_CLKCMU_PERI_SPI_USER, 4, 1), + MUX_F(CLK_MOUT_PERI_SPI_USER, "mout_peri_spi_user", + mout_peri_spi_user_p, PLL_CON0_MUX_CLKCMU_PERI_SPI_USER, 4, 1, + CLK_SET_RATE_PARENT, 0), }; static const struct samsung_div_clock peri_div_clks[] __initconst = { @@ -1568,8 +1569,8 @@ CLK_CON_DIV_DIV_CLK_PERI_HSI2C_1, 0, 5), DIV(CLK_DOUT_PERI_HSI2C2, "dout_peri_hsi2c2", "gout_peri_hsi2c2", CLK_CON_DIV_DIV_CLK_PERI_HSI2C_2, 0, 5), - DIV(CLK_DOUT_PERI_SPI0, "dout_peri_spi0", "mout_peri_spi_user", - CLK_CON_DIV_DIV_CLK_PERI_SPI_0, 0, 5), + DIV_F(CLK_DOUT_PERI_SPI0, "dout_peri_spi0", "mout_peri_spi_user", + CLK_CON_DIV_DIV_CLK_PERI_SPI_0, 0, 5, CLK_SET_RATE_PARENT, 0), }; static const struct samsung_gate_clock peri_gate_clks[] __initconst = { @@ -1611,7 +1612,7 @@ "mout_peri_bus_user", CLK_CON_GAT_GOUT_PERI_PWM_MOTOR_PCLK, 21, 0, 0), GATE(CLK_GOUT_SPI0_IPCLK, "gout_spi0_ipclk", "dout_peri_spi0", - CLK_CON_GAT_GOUT_PERI_SPI_0_IPCLK, 21, 0, 0), + CLK_CON_GAT_GOUT_PERI_SPI_0_IPCLK, 21, CLK_SET_RATE_PARENT, 0), GATE(CLK_GOUT_SPI0_PCLK, "gout_spi0_pclk", "mout_peri_bus_user", CLK_CON_GAT_GOUT_PERI_SPI_0_PCLK, 21, 0, 0), GATE(CLK_GOUT_SYSREG_PERI_PCLK, "gout_sysreg_peri_pclk", --- linux-xilinx-6.8.0.orig/drivers/clk/samsung/clk-exynosautov9.c +++ linux-xilinx-6.8.0/drivers/clk/samsung/clk-exynosautov9.c @@ -352,13 +352,13 @@ /* CMU_TOP_PURECLKCOMP */ PLL(pll_0822x, FOUT_SHARED0_PLL, "fout_shared0_pll", "oscclk", PLL_LOCKTIME_PLL_SHARED0, PLL_CON3_PLL_SHARED0, NULL), - PLL(pll_0822x, FOUT_SHARED0_PLL, "fout_shared1_pll", "oscclk", + PLL(pll_0822x, FOUT_SHARED1_PLL, "fout_shared1_pll", "oscclk", PLL_LOCKTIME_PLL_SHARED1, PLL_CON3_PLL_SHARED1, NULL), - PLL(pll_0822x, FOUT_SHARED0_PLL, "fout_shared2_pll", "oscclk", + PLL(pll_0822x, FOUT_SHARED2_PLL, "fout_shared2_pll", "oscclk", PLL_LOCKTIME_PLL_SHARED2, PLL_CON3_PLL_SHARED2, NULL), - PLL(pll_0822x, FOUT_SHARED0_PLL, "fout_shared3_pll", "oscclk", + PLL(pll_0822x, FOUT_SHARED3_PLL, "fout_shared3_pll", "oscclk", PLL_LOCKTIME_PLL_SHARED3, PLL_CON3_PLL_SHARED3, NULL), - PLL(pll_0822x, FOUT_SHARED0_PLL, "fout_shared4_pll", "oscclk", + PLL(pll_0822x, FOUT_SHARED4_PLL, "fout_shared4_pll", "oscclk", PLL_LOCKTIME_PLL_SHARED4, PLL_CON3_PLL_SHARED4, NULL), }; --- linux-xilinx-6.8.0.orig/drivers/clk/si5324.h +++ linux-xilinx-6.8.0/drivers/clk/si5324.h @@ -0,0 +1,68 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Si5324 clock generator platform data + * + * Copyright (C) 2017-2018 Xilinx, Inc. + */ + +#ifndef __LINUX_PLATFORM_DATA_SI5324_H__ +#define __LINUX_PLATFORM_DATA_SI5324_H__ + +/** + * enum si5324_pll_src - Si5324 pll clock source + * + * @SI5324_PLL_SRC_DEFAULT: Default, do not change eeprom config + * @SI5324_PLL_SRC_XTAL: Pll source clock is XTAL input + * @SI5324_PLL_SRC_CLKIN1: Pll source clock is CLKIN1 input + * @SI5324_PLL_SRC_CLKIN2: Pll source clock is CLKIN2 input + * + * Defines enums for clock sources. + */ +enum si5324_pll_src { + SI5324_PLL_SRC_XTAL = 0, + SI5324_PLL_SRC_CLKIN1 = 1, + SI5324_PLL_SRC_CLKIN2 = 2, +}; + +/** + * enum si5324_drive_strength - Si5324 clock output drive strength + * + * @SI5324_DRIVE_DEFAULT: Default, do not change eeprom config + * @SI5324_DRIVE_2MA: 2mA clock output drive strength + * @SI5324_DRIVE_4MA: 4mA clock output drive strength + * @SI5324_DRIVE_6MA: 6mA clock output drive strength + * @SI5324_DRIVE_8MA: 8mA clock output drive strength + * + * Defines enums for drive strength + */ +enum si5324_drive_strength { + SI5324_DRIVE_DEFAULT = 0, + SI5324_DRIVE_2MA = 2, + SI5324_DRIVE_4MA = 4, + SI5324_DRIVE_6MA = 6, + SI5324_DRIVE_8MA = 8, +}; + +/** + * struct si5324_clkout_config - Si5324 clock output configuration + * + * @drive: output drive strength + * @rate: clkout rate + */ +struct si5324_clkout_config { + enum si5324_drive_strength drive; + unsigned long rate; +}; + +/** + * struct si5324_platform_data - Platform data for the Si5324 clock driver + * + * @pll_src: Pll source clock setting + * @clkout: Array of clkout configuration + */ +struct si5324_platform_data { + enum si5324_pll_src pll_src; + struct si5324_clkout_config clkout[2]; +}; + +#endif --- linux-xilinx-6.8.0.orig/drivers/clk/si5324drv.c +++ linux-xilinx-6.8.0/drivers/clk/si5324drv.c @@ -0,0 +1,383 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Si5324 clock driver + * + * Copyright (C) 2017-2018 Xilinx, Inc. + * + * Author: Venkateshwar Rao G + * Leon Woestenberg + */ + +#include +#include +#include "si5324drv.h" + +/** + * si5324_rate_approx - Find closest rational approximation N2_LS/N3 fraction. + * + * @f: Holds the N2_LS/N3 fraction in 36.28 fixed point notation. + * @md: Holds the maximum denominator (N3) value allowed. + * @num: Store the numinator (N2_LS) found. + * @denom: Store the denominator (N3) found. + * + * This function finds the closest rational approximation. + * It allows only n/1 solution and as a part of the calculation + * multiply fraction until no digits after the decimal point and + * continued fraction and check denominator at each step. + */ +void si5324_rate_approx(u64 f, u64 md, u32 *num, u32 *denom) +{ + u64 a, h[3] = { 0, 1, 0 }, k[3] = { 1, 0, 0 }; + u64 x, d, m, n = 1; + int i = 0; + + if (md <= 1) { + *denom = 1; + *num = (u32)(f >> 28); + return; + } + + n <<= 28; + for (i = 0; i < 28; i++) { + if ((f & 0x1) == 0) { + n >>= 1; + f >>= 1; + } else { + break; + } + } + d = f; + + for (i = 0; i < 64; i++) { + a = n ? (div64_u64(d, n)) : 0; + if (i && !a) + break; + x = d; + d = n; + div64_u64_rem(x, n, &m); + n = m; + x = a; + if (k[1] * a + k[0] >= md) { + x = div64_u64((md - k[0]), k[1]); + if (x * 2 >= a || k[1] >= md) + i = 65; + else + break; + } + h[2] = x * h[1] + h[0]; + h[0] = h[1]; + h[1] = h[2]; + k[2] = x * k[1] + k[0]; + k[0] = k[1]; + k[1] = k[2]; + } + + *denom = (u32)k[1]; + *num = (u32)h[1]; +} + +/** + * si5324_find_n2ls - Search through the possible settings for the N2_LS. + * + * @settings: Holds the settings up till now. + * + * This function finds the best setting for N2_LS and N3n with the values + * for N1_HS, NCn_LS, and N2_HS. + * + * Return: 1 when the best possible result has been found, 0 on failure. + */ +static int si5324_find_n2ls(struct si5324_settingst *settings) +{ + u32 result = 0; + u64 f3_actual; + u64 fosc_actual; + u64 fout_actual; + u64 delta_fout; + u64 n2_ls_div_n3, mult_res; + u32 mult; + + n2_ls_div_n3 = div64_u64(div64_u64(div64_u64(settings->fosc, + (settings->fin >> SI5324_FIN_FOUT_SHIFT)), + (u64)settings->n2_hs), (u64)2); + + si5324_rate_approx(n2_ls_div_n3, settings->n31_max, &settings->n2_ls, + &settings->n31); + settings->n2_ls *= 2; + + if (settings->n2_ls < settings->n2_ls_min) { + mult = div64_u64(settings->n2_ls_min, settings->n2_ls); + div64_u64_rem(settings->n2_ls_min, settings->n2_ls, &mult_res); + mult = mult_res ? mult + 1 : mult; + settings->n2_ls *= mult; + settings->n31 *= mult; + } + + if (settings->n31 < settings->n31_min) { + mult = div64_u64(settings->n31_min, settings->n31); + div64_u64_rem(settings->n31_min, settings->n31, &mult_res); + mult = mult_res ? mult + 1 : mult; + settings->n2_ls *= mult; + settings->n31 *= mult; + } + pr_debug("Trying N2_LS = %d N3 = %d.\n", settings->n2_ls, + settings->n31); + + if (settings->n2_ls < settings->n2_ls_min || + settings->n2_ls > settings->n2_ls_max) { + pr_info("N2_LS out of range.\n"); + } else if ((settings->n31 < settings->n31_min) || + (settings->n31 > settings->n31_max)) { + pr_info("N3 out of range.\n"); + } else { + f3_actual = div64_u64(settings->fin, settings->n31); + fosc_actual = f3_actual * settings->n2_hs * settings->n2_ls; + fout_actual = div64_u64(fosc_actual, + (settings->n1_hs * settings->nc1_ls)); + delta_fout = fout_actual - settings->fout; + + if ((f3_actual < ((u64)SI5324_F3_MIN) << + SI5324_FIN_FOUT_SHIFT) || + (f3_actual > ((u64)SI5324_F3_MAX) << + SI5324_FIN_FOUT_SHIFT)) { + pr_debug("F3 frequency out of range.\n"); + } else if ((fosc_actual < ((u64)SI5324_FOSC_MIN) << + SI5324_FIN_FOUT_SHIFT) || + (fosc_actual > ((u64)SI5324_FOSC_MAX) << + SI5324_FIN_FOUT_SHIFT)) { + pr_debug("Fosc frequency out of range.\n"); + } else if ((fout_actual < ((u64)SI5324_FOUT_MIN) << + SI5324_FIN_FOUT_SHIFT) || + (fout_actual > ((u64)SI5324_FOUT_MAX) << + SI5324_FIN_FOUT_SHIFT)) { + pr_debug("Fout frequency out of range.\n"); + } else { + u64 divident = fosc_actual >> SI5324_FIN_FOUT_SHIFT; + + pr_debug("Found solution: fout = %dHz delta = %dHz.\n", + (u32)(fout_actual >> SI5324_FIN_FOUT_SHIFT), + (u32)(delta_fout >> SI5324_FIN_FOUT_SHIFT)); + pr_debug("fosc = %dkHz f3 = %dHz.\n", + (u32)(do_div(divident, 1000)), + (u32)(f3_actual >> SI5324_FIN_FOUT_SHIFT)); + + if (((u64)abs(delta_fout)) < + settings->best_delta_fout) { + settings->best_n1_hs = settings->n1_hs; + settings->best_nc1_ls = settings->nc1_ls; + settings->best_n2_hs = settings->n2_hs; + settings->best_n2_ls = settings->n2_ls; + settings->best_n3 = settings->n31; + settings->best_fout = fout_actual; + settings->best_delta_fout = abs(delta_fout); + if (delta_fout == 0) + result = 1; + } + } + } + return result; +} + +/** + * si5324_find_n2 - Find a valid setting for N2_HS and N2_LS. + * + * @settings: Holds the settings up till now. + * + * This function finds a valid settings for N2_HS and N2_LS. Iterates over + * all possibilities of N2_HS and then performs a binary search over the + * N2_LS values. + * + * Return: 1 when the best possible result has been found. + */ +static int si5324_find_n2(struct si5324_settingst *settings) +{ + u32 result = 0; + + for (settings->n2_hs = SI5324_N2_HS_MAX; settings->n2_hs >= + SI5324_N2_HS_MIN; settings->n2_hs--) { + pr_debug("Trying N2_HS = %d.\n", settings->n2_hs); + settings->n2_ls_min = (u32)(div64_u64(settings->fosc, + ((u64)(SI5324_F3_MAX * settings->n2_hs) + << SI5324_FIN_FOUT_SHIFT))); + + if (settings->n2_ls_min < SI5324_N2_LS_MIN) + settings->n2_ls_min = SI5324_N2_LS_MIN; + + settings->n2_ls_max = (u32)(div64_u64(settings->fosc, + ((u64)(SI5324_F3_MIN * + settings->n2_hs) << + SI5324_FIN_FOUT_SHIFT))); + if (settings->n2_ls_max > SI5324_N2_LS_MAX) + settings->n2_ls_max = SI5324_N2_LS_MAX; + + result = si5324_find_n2ls(settings); + if (result) + break; + } + return result; +} + +/** + * si5324_calc_ncls_limits - Calculates the valid range for NCn_LS. + * + * @settings: Holds the input and output frequencies and the setting + * for N1_HS. + * + * This function calculates the valid range for NCn_LS with the value + * for the output frequency and N1_HS already set in settings. + * + * Return: -1 when there are no valid settings, 0 otherwise. + */ +int si5324_calc_ncls_limits(struct si5324_settingst *settings) +{ + settings->nc1_ls_min = div64_u64(settings->n1_hs_min, + settings->n1_hs); + + if (settings->nc1_ls_min < SI5324_NC_LS_MIN) + settings->nc1_ls_min = SI5324_NC_LS_MIN; + if (settings->nc1_ls_min > 1 && (settings->nc1_ls_min & 0x1) == 1) + settings->nc1_ls_min++; + settings->nc1_ls_max = div64_u64(settings->n1_hs_max, settings->n1_hs); + + if (settings->nc1_ls_max > SI5324_NC_LS_MAX) + settings->nc1_ls_max = SI5324_NC_LS_MAX; + + if ((settings->nc1_ls_max & 0x1) == 1) + settings->nc1_ls_max--; + if ((settings->nc1_ls_max * settings->n1_hs < settings->n1_hs_min) || + (settings->nc1_ls_min * settings->n1_hs > settings->n1_hs_max)) + return -1; + + return 0; +} + +/** + * si5324_find_ncls - Find a valid setting for NCn_LS + * + * @settings: Holds the input and output frequencies, the setting for + * N1_HS, and the limits for NCn_LS. + * + * This function find a valid setting for NCn_LS that can deliver the correct + * output frequency. Assumes that the valid range is relatively small + * so a full search can be done (should be true for video clock frequencies). + * + * Return: 1 when the best possible result has been found. + */ +static int si5324_find_ncls(struct si5324_settingst *settings) +{ + u64 fosc_1; + u32 result; + + fosc_1 = settings->fout * settings->n1_hs; + for (settings->nc1_ls = settings->nc1_ls_min; + settings->nc1_ls <= settings->nc1_ls_max;) { + settings->fosc = fosc_1 * settings->nc1_ls; + pr_debug("Trying NCn_LS = %d: fosc = %dkHz.\n", + settings->nc1_ls, + (u32)(div64_u64((settings->fosc >> + SI5324_FIN_FOUT_SHIFT), 1000))); + + result = si5324_find_n2(settings); + if (result) + break; + if (settings->nc1_ls == 1) + settings->nc1_ls++; + else + settings->nc1_ls += 2; + } + return result; +} + +/** + * si5324_calcfreqsettings - Calculate the frequency settings + * + * @clkinfreq: Frequency of the input clock. + * @clkoutfreq: Desired output clock frequency. + * @clkactual: Actual clock frequency. + * @n1_hs: Set to the value for the N1_HS register. + * @ncn_ls: Set to the value for the NCn_LS register. + * @n2_hs: Set to the value for the N2_HS register. + * @n2_ls: Set to the value for the N2_LS register. + * @n3n: Set to the value for the N3n register. + * @bwsel: Set to the value for the BW_SEL register. + * + * This funciton calculates the frequency settings for the desired output + * frequency. + * + * Return: SI5324_SUCCESS for success, SI5324_ERR_FREQ when the + * requested frequency cannot be generated. + */ +int si5324_calcfreqsettings(u32 clkinfreq, u32 clkoutfreq, u32 *clkactual, + u8 *n1_hs, u32 *ncn_ls, u8 *n2_hs, u32 *n2_ls, + u32 *n3n, u8 *bwsel) +{ + struct si5324_settingst settings; + int result; + + settings.fin = (u64)clkinfreq << SI5324_FIN_FOUT_SHIFT; + settings.fout = (u64)clkoutfreq << SI5324_FIN_FOUT_SHIFT; + settings.best_delta_fout = settings.fout; + + settings.n1_hs_min = (int)(div64_u64(SI5324_FOSC_MIN, clkoutfreq)); + if (settings.n1_hs_min < SI5324_N1_HS_MIN * SI5324_NC_LS_MIN) + settings.n1_hs_min = SI5324_N1_HS_MIN * SI5324_NC_LS_MIN; + + settings.n1_hs_max = (int)(div64_u64(SI5324_FOSC_MAX, clkoutfreq)); + if (settings.n1_hs_max > SI5324_N1_HS_MAX * SI5324_NC_LS_MAX) + settings.n1_hs_max = SI5324_N1_HS_MAX * SI5324_NC_LS_MAX; + + settings.n31_min = div64_u64(clkinfreq, SI5324_F3_MAX); + if (settings.n31_min < SI5324_N3_MIN) + settings.n31_min = SI5324_N3_MIN; + + settings.n31_max = div64_u64(clkinfreq, SI5324_F3_MIN); + if (settings.n31_max > SI5324_N3_MAX) + settings.n31_max = SI5324_N3_MAX; + + /* Find a valid oscillator frequency with the highest setting of N1_HS + * possible (reduces power) + */ + for (settings.n1_hs = SI5324_N1_HS_MAX; + settings.n1_hs >= SI5324_N1_HS_MIN; settings.n1_hs--) { + pr_debug("Trying N1_HS = %d.\n", settings.n1_hs); + + result = si5324_calc_ncls_limits(&settings); + if (result) { + pr_debug("No valid settings\n"); + continue; + } + result = si5324_find_ncls(&settings); + if (result) + break; + } + + pr_debug("Si5324: settings.best_delta_fout = %llu\n", + (unsigned long long)settings.best_delta_fout); + pr_debug("Si5324: settings.fout = %llu\n", + (unsigned long long)settings.fout); + + if (settings.best_delta_fout == settings.fout) { + pr_debug("Si5324: No valid settings found."); + return SI5324_ERR_FREQ; + } + pr_debug("Si5324: Found solution: fout = %dHz.\n", + (u32)(settings.best_fout >> 28)); + + /* Post processing: convert temporary values to actual registers */ + *n1_hs = (u8)settings.best_n1_hs - 4; + *ncn_ls = settings.best_nc1_ls - 1; + *n2_hs = (u8)settings.best_n2_hs - 4; + *n2_ls = settings.best_n2_ls - 1; + *n3n = settings.best_n3 - 1; + /* + * How must the bandwidth selection be determined? + * Not all settings will be valid. + * refclk 2, 0xA2, BWSEL_REG=1010 (?) + * free running 2, 0x42, BWSEL_REG=0100 (?) + */ + *bwsel = 6; + + if (clkactual) + *clkactual = (settings.best_fout >> SI5324_FIN_FOUT_SHIFT); + + return SI5324_SUCCESS; +} --- linux-xilinx-6.8.0.orig/drivers/clk/si5324drv.h +++ linux-xilinx-6.8.0/drivers/clk/si5324drv.h @@ -0,0 +1,100 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Si5324 clock driver + * + * Copyright (C) 2017-2018 Xilinx, Inc. + */ + +#ifndef SI5324DRV_H_ +#define SI5324DRV_H_ + +#include + +/****************************************************************************** + * User settable defines that depend on the specific board design. + * The defaults are for the Xilinx KC705 board. + *****************************************************************************/ + +#define SI5324_XTAL_FREQ 114285000UL + +/****************************************************************************** + * Defines independent on the specific board design. Should not be changed. + *****************************************************************************/ + +#define SI5324_SUCCESS 0 /*< Operation was successful */ +#define SI5324_ERR_IIC -1 /*< IIC error occurred */ +#define SI5324_ERR_FREQ -2 /*< Could not calculate frequency setting */ +#define SI5324_ERR_PARM -3 /*< Invalid parameter */ + +#define SI5324_CLKSRC_CLK1 1 /*< Use clock input 1 */ +#define SI5324_CLKSRC_CLK2 2 /*< Use clock input 2 */ +#define SI5324_CLKSRC_XTAL 3 /*< Use crystal (free running mode) */ + +#define SI5324_FOSC_MIN 4850000000UL /*< Min oscillator frequency */ +#define SI5324_FOSC_MAX 5670000000UL /*< Max oscillator frequency */ +#define SI5324_F3_MIN 10000 /*< Min phase detector frequency */ +#define SI5324_F3_MAX 2000000 /*< Max phase detector frequency */ +#define SI5324_FIN_MIN 2000 /*< Min input frequency */ +#define SI5324_FIN_MAX 710000000UL /*< Max input frequency */ +#define SI5324_FOUT_MIN 2000 /*< Min output frequency */ +#define SI5324_FOUT_MAX 945000000UL /*< Max output frequency */ + +#define SI5324_N1_HS_MIN 6 +#define SI5324_N1_HS_MAX 11 +#define SI5324_NC_LS_MIN 1 +#define SI5324_NC_LS_MAX 0x100000 +#define SI5324_N2_HS_MIN 4 +#define SI5324_N2_HS_MAX 11 +#define SI5324_N2_LS_MIN 2 /* even values only */ +#define SI5324_N2_LS_MAX 0x100000 +#define SI5324_N3_MIN 1 +#define SI5324_N3_MAX 0x080000 +#define SI5324_FIN_FOUT_SHIFT 28 + +struct si5324_settingst { + /* high-speed output divider */ + u32 n1_hs_min; + u32 n1_hs_max; + u32 n1_hs; + + /* low-speed output divider for clkout1 */ + u32 nc1_ls_min; + u32 nc1_ls_max; + u32 nc1_ls; + + /* low-speed output divider for clkout2 */ + u32 nc2_ls_min; + u32 nc2_ls_max; + u32 nc2_ls; + + /* high-speed feedback divider (PLL multiplier) */ + u32 n2_hs; + /* low-speed feedback divider (PLL multiplier) */ + u32 n2_ls_min; + u32 n2_ls_max; + u32 n2_ls; + + /* input divider for clk1 */ + u32 n31_min; + u32 n31_max; + u32 n31; + + u64 fin; + u64 fout; + u64 fosc; + u64 best_delta_fout; + u64 best_fout; + u32 best_n1_hs; + u32 best_nc1_ls; + u32 best_n2_hs; + u32 best_n2_ls; + u32 best_n3; +}; + +int si5324_calcfreqsettings(u32 clkinfreq, u32 clkoutfreq, u32 *clkactual, + u8 *n1_hs, u32 *ncn_ls, u8 *n2_hs, + u32 *n2_ls, u32 *n3n, u8 *bwsel); +void si5324_rate_approx(u64 f, u64 md, u32 *num, u32 *denom); +int si5324_calc_ncls_limits(struct si5324_settingst *settings); + +#endif /* SI5324DRV_H_ */ --- linux-xilinx-6.8.0.orig/drivers/clk/sifive/sifive-prci.c +++ linux-xilinx-6.8.0/drivers/clk/sifive/sifive-prci.c @@ -4,7 +4,6 @@ * Copyright (C) 2020 Zong Li */ -#include #include #include #include @@ -536,13 +535,6 @@ init.name, r); return r; } - - r = clk_hw_register_clkdev(&pic->hw, pic->name, dev_name(dev)); - if (r) { - dev_warn(dev, "Failed to register clkdev for %s: %d\n", - init.name, r); - return r; - } pd->hw_clks.hws[i] = &pic->hw; } --- linux-xilinx-6.8.0.orig/drivers/clk/starfive/clk-starfive-jh7110-sys.c +++ linux-xilinx-6.8.0/drivers/clk/starfive/clk-starfive-jh7110-sys.c @@ -385,6 +385,32 @@ } EXPORT_SYMBOL_GPL(jh7110_reset_controller_register); +/* + * This clock notifier is called when the rate of PLL0 clock is to be changed. + * The cpu_root clock should save the curent parent clock and switch its parent + * clock to osc before PLL0 rate will be changed. Then switch its parent clock + * back after the PLL0 rate is completed. + */ +static int jh7110_pll0_clk_notifier_cb(struct notifier_block *nb, + unsigned long action, void *data) +{ + struct jh71x0_clk_priv *priv = container_of(nb, struct jh71x0_clk_priv, pll_clk_nb); + struct clk *cpu_root = priv->reg[JH7110_SYSCLK_CPU_ROOT].hw.clk; + int ret = 0; + + if (action == PRE_RATE_CHANGE) { + struct clk *osc = clk_get(priv->dev, "osc"); + + priv->original_clk = clk_get_parent(cpu_root); + ret = clk_set_parent(cpu_root, osc); + clk_put(osc); + } else if (action == POST_RATE_CHANGE) { + ret = clk_set_parent(cpu_root, priv->original_clk); + } + + return notifier_from_errno(ret); +} + static int __init jh7110_syscrg_probe(struct platform_device *pdev) { struct jh71x0_clk_priv *priv; @@ -413,7 +439,10 @@ if (IS_ERR(priv->pll[0])) return PTR_ERR(priv->pll[0]); } else { - clk_put(pllclk); + priv->pll_clk_nb.notifier_call = jh7110_pll0_clk_notifier_cb; + ret = clk_notifier_register(pllclk, &priv->pll_clk_nb); + if (ret) + return ret; priv->pll[0] = NULL; } --- linux-xilinx-6.8.0.orig/drivers/clk/starfive/clk-starfive-jh7110-vout.c +++ linux-xilinx-6.8.0/drivers/clk/starfive/clk-starfive-jh7110-vout.c @@ -145,7 +145,7 @@ /* enable power domain and clocks */ pm_runtime_enable(priv->dev); - ret = pm_runtime_get_sync(priv->dev); + ret = pm_runtime_resume_and_get(priv->dev); if (ret < 0) return dev_err_probe(priv->dev, ret, "failed to turn on power\n"); --- linux-xilinx-6.8.0.orig/drivers/clk/starfive/clk-starfive-jh71x0.h +++ linux-xilinx-6.8.0/drivers/clk/starfive/clk-starfive-jh71x0.h @@ -114,6 +114,8 @@ spinlock_t rmw_lock; struct device *dev; void __iomem *base; + struct clk *original_clk; + struct notifier_block pll_clk_nb; struct clk_hw *pll[3]; struct jh71x0_clk reg[]; }; --- linux-xilinx-6.8.0.orig/drivers/clk/sunxi-ng/ccu-sun20i-d1.c +++ linux-xilinx-6.8.0/drivers/clk/sunxi-ng/ccu-sun20i-d1.c @@ -1371,7 +1371,7 @@ /* Enforce m1 = 0, m0 = 0 for PLL_AUDIO0 */ val = readl(reg + SUN20I_D1_PLL_AUDIO0_REG); - val &= ~BIT(1) | BIT(0); + val &= ~(BIT(1) | BIT(0)); writel(val, reg + SUN20I_D1_PLL_AUDIO0_REG); /* Force fanout-27M factor N to 0. */ --- linux-xilinx-6.8.0.orig/drivers/clk/sunxi-ng/ccu-sun50i-a100.c +++ linux-xilinx-6.8.0/drivers/clk/sunxi-ng/ccu-sun50i-a100.c @@ -436,7 +436,7 @@ 24, 2, /* mux */ BIT(31), /* gate */ 2, /* post-div */ - CLK_SET_RATE_NO_REPARENT); + 0); static SUNXI_CCU_MP_WITH_MUX_GATE_POSTDIV(mmc1_clk, "mmc1", mmc_parents, 0x834, 0, 4, /* M */ @@ -444,7 +444,7 @@ 24, 2, /* mux */ BIT(31), /* gate */ 2, /* post-div */ - CLK_SET_RATE_NO_REPARENT); + 0); static SUNXI_CCU_MP_WITH_MUX_GATE_POSTDIV(mmc2_clk, "mmc2", mmc_parents, 0x838, 0, 4, /* M */ @@ -452,7 +452,7 @@ 24, 2, /* mux */ BIT(31), /* gate */ 2, /* post-div */ - CLK_SET_RATE_NO_REPARENT); + 0); static SUNXI_CCU_GATE(bus_mmc0_clk, "bus-mmc0", "ahb3", 0x84c, BIT(0), 0); static SUNXI_CCU_GATE(bus_mmc1_clk, "bus-mmc1", "ahb3", 0x84c, BIT(1), 0); --- linux-xilinx-6.8.0.orig/drivers/clk/sunxi-ng/ccu-sun50i-a64.c +++ linux-xilinx-6.8.0/drivers/clk/sunxi-ng/ccu-sun50i-a64.c @@ -182,6 +182,8 @@ &ccu_nkm_ops, CLK_SET_RATE_UNGATE | CLK_SET_RATE_PARENT), .features = CCU_FEATURE_CLOSEST_RATE, + .min_rate = 500000000, + .max_rate = 1400000000, }, }; @@ -531,11 +533,11 @@ CLK_SET_RATE_PARENT); /* - * DSI output seems to work only when PLL_MIPI selected. Set it and prevent - * the mux from reparenting. + * Experiments showed that RGB output requires pll-video0-2x, while DSI + * requires pll-mipi. It will not work with incorrect clock, the screen will + * be blank. + * sun50i-a64.dtsi assigns pll-mipi as TCON0 parent by default */ -#define SUN50I_A64_TCON0_CLK_REG 0x118 - static const char * const tcon0_parents[] = { "pll-mipi", "pll-video0-2x" }; static const u8 tcon0_table[] = { 0, 2, }; static SUNXI_CCU_MUX_TABLE_WITH_GATE_CLOSEST(tcon0_clk, "tcon0", tcon0_parents, @@ -955,11 +957,6 @@ writel(0x515, reg + SUN50I_A64_PLL_MIPI_REG); - /* Set PLL MIPI as parent for TCON0 */ - val = readl(reg + SUN50I_A64_TCON0_CLK_REG); - val &= ~GENMASK(26, 24); - writel(val | (0 << 24), reg + SUN50I_A64_TCON0_CLK_REG); - ret = devm_sunxi_ccu_probe(&pdev->dev, reg, &sun50i_a64_ccu_desc); if (ret) return ret; --- linux-xilinx-6.8.0.orig/drivers/clk/sunxi-ng/ccu-sun50i-a64.h +++ linux-xilinx-6.8.0/drivers/clk/sunxi-ng/ccu-sun50i-a64.h @@ -21,7 +21,6 @@ /* PLL_VIDEO0 exported for HDMI PHY */ -#define CLK_PLL_VIDEO0_2X 8 #define CLK_PLL_VE 9 #define CLK_PLL_DDR0 10 @@ -32,7 +31,6 @@ #define CLK_PLL_PERIPH1_2X 14 #define CLK_PLL_VIDEO1 15 #define CLK_PLL_GPU 16 -#define CLK_PLL_MIPI 17 #define CLK_PLL_HSIC 18 #define CLK_PLL_DE 19 #define CLK_PLL_DDR1 20 --- linux-xilinx-6.8.0.orig/drivers/clk/sunxi-ng/ccu-sun50i-h6.c +++ linux-xilinx-6.8.0/drivers/clk/sunxi-ng/ccu-sun50i-h6.c @@ -1181,11 +1181,18 @@ SUN50I_H6_USB3_CLK_REG, }; +static struct ccu_mux_nb sun50i_h6_cpu_nb = { + .common = &cpux_clk.common, + .cm = &cpux_clk.mux, + .delay_us = 1, + .bypass_index = 0, /* index of 24 MHz oscillator */ +}; + static int sun50i_h6_ccu_probe(struct platform_device *pdev) { void __iomem *reg; + int i, ret; u32 val; - int i; reg = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(reg)) @@ -1252,7 +1259,15 @@ val |= BIT(24); writel(val, reg + SUN50I_H6_HDMI_CEC_CLK_REG); - return devm_sunxi_ccu_probe(&pdev->dev, reg, &sun50i_h6_ccu_desc); + ret = devm_sunxi_ccu_probe(&pdev->dev, reg, &sun50i_h6_ccu_desc); + if (ret) + return ret; + + /* Reparent CPU during PLL CPUX rate changes */ + ccu_mux_notifier_register(pll_cpux_clk.common.hw.clk, + &sun50i_h6_cpu_nb); + + return 0; } static const struct of_device_id sun50i_h6_ccu_ids[] = { --- linux-xilinx-6.8.0.orig/drivers/clk/sunxi-ng/ccu_common.c +++ linux-xilinx-6.8.0/drivers/clk/sunxi-ng/ccu_common.c @@ -44,6 +44,16 @@ unsigned long current_rate, unsigned long best_rate) { + unsigned long min_rate, max_rate; + + clk_hw_get_rate_range(&common->hw, &min_rate, &max_rate); + + if (current_rate > max_rate) + return false; + + if (current_rate < min_rate) + return false; + if (common->features & CCU_FEATURE_CLOSEST_RATE) return abs(current_rate - target_rate) < abs(best_rate - target_rate); @@ -138,6 +148,21 @@ } } + for (i = 0; i < desc->num_ccu_clks; i++) { + struct ccu_common *cclk = desc->ccu_clks[i]; + + if (!cclk) + continue; + + if (cclk->max_rate) + clk_hw_set_rate_range(&cclk->hw, cclk->min_rate, + cclk->max_rate); + else + WARN(cclk->min_rate, + "No max_rate, ignoring min_rate of clock %d - %s\n", + i, clk_hw_get_name(&cclk->hw)); + } + ret = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, desc->hw_clks); if (ret) --- linux-xilinx-6.8.0.orig/drivers/clk/sunxi-ng/ccu_common.h +++ linux-xilinx-6.8.0/drivers/clk/sunxi-ng/ccu_common.h @@ -31,6 +31,9 @@ u16 lock_reg; u32 prediv; + unsigned long min_rate; + unsigned long max_rate; + unsigned long features; spinlock_t *lock; struct clk_hw hw; --- linux-xilinx-6.8.0.orig/drivers/clk/sunxi/clk-simple-gates.c +++ linux-xilinx-6.8.0/drivers/clk/sunxi/clk-simple-gates.c @@ -21,11 +21,9 @@ { struct clk_onecell_data *clk_data; const char *clk_parent, *clk_name; - struct property *prop; struct resource res; void __iomem *clk_reg; void __iomem *reg; - const __be32 *p; int number, i = 0, j; u8 clk_bit; u32 index; @@ -47,7 +45,7 @@ if (!clk_data->clks) goto err_free_data; - of_property_for_each_u32(node, "clock-indices", prop, p, index) { + of_property_for_each_u32(node, "clock-indices", index) { of_property_read_string_index(node, "clock-output-names", i, &clk_name); --- linux-xilinx-6.8.0.orig/drivers/clk/sunxi/clk-sun8i-bus-gates.c +++ linux-xilinx-6.8.0/drivers/clk/sunxi/clk-sun8i-bus-gates.c @@ -24,11 +24,9 @@ const char *parents[PARENT_MAX]; struct clk_onecell_data *clk_data; const char *clk_name; - struct property *prop; struct resource res; void __iomem *clk_reg; void __iomem *reg; - const __be32 *p; int number, i; u8 clk_bit; int index; @@ -58,7 +56,7 @@ goto err_free_data; i = 0; - of_property_for_each_u32(node, "clock-indices", prop, p, index) { + of_property_for_each_u32(node, "clock-indices", index) { of_property_read_string_index(node, "clock-output-names", i, &clk_name); --- linux-xilinx-6.8.0.orig/drivers/clk/ti/clk-dra7-atl.c +++ linux-xilinx-6.8.0/drivers/clk/ti/clk-dra7-atl.c @@ -240,6 +240,7 @@ } clk = of_clk_get_from_provider(&clkspec); + of_node_put(clkspec.np); if (IS_ERR(clk)) { pr_err("%s: failed to get atl clock %d from provider\n", __func__, i); --- linux-xilinx-6.8.0.orig/drivers/clk/xilinx/clk-xlnx-clock-wizard.c +++ linux-xilinx-6.8.0/drivers/clk/xilinx/clk-xlnx-clock-wizard.c @@ -51,6 +51,8 @@ #define WZRD_CLKFBOUT_MULT_SHIFT 8 #define WZRD_CLKFBOUT_MULT_MASK (0xff << WZRD_CLKFBOUT_MULT_SHIFT) +#define WZRD_CLKFBOUT_MULT_FRAC_MASK GENMASK(25, 16) +#define WZRD_CLKFBOUT_O_MASK GENMASK(7, 0) #define WZRD_CLKFBOUT_L_SHIFT 0 #define WZRD_CLKFBOUT_H_SHIFT 8 #define WZRD_CLKFBOUT_L_MASK GENMASK(7, 0) @@ -86,14 +88,14 @@ #define DIV_O 0x01 #define DIV_ALL 0x03 -#define WZRD_M_MIN 2 -#define WZRD_M_MAX 128 -#define WZRD_D_MIN 1 -#define WZRD_D_MAX 106 -#define WZRD_VCO_MIN 800000000 -#define WZRD_VCO_MAX 1600000000 -#define WZRD_O_MIN 1 -#define WZRD_O_MAX 128 +#define WZRD_M_MIN 2ULL +#define WZRD_M_MAX 128ULL +#define WZRD_D_MIN 1ULL +#define WZRD_D_MAX 106ULL +#define WZRD_VCO_MIN 800000000ULL +#define WZRD_VCO_MAX 1600000000ULL +#define WZRD_O_MIN 2ULL +#define WZRD_O_MAX 128ULL #define VER_WZRD_M_MIN 4 #define VER_WZRD_M_MAX 432 #define VER_WZRD_D_MIN 1 @@ -154,8 +156,10 @@ * @flags: clk_wzrd divider flags * @table: array of value/divider pairs, last entry should have div = 0 * @m: value of the multiplier + * @m_frac: fractional value of the multiplier * @d: value of the common divider * @o: value of the leaf divider + * @o_frac: value of the fractional leaf divider * @lock: register lock */ struct clk_wzrd_divider { @@ -167,8 +171,10 @@ u8 flags; const struct clk_div_table *table; u32 m; + u32 m_frac; u32 d; u32 o; + u32 o_frac; spinlock_t *lock; /* divider lock */ }; @@ -373,38 +379,40 @@ unsigned long parent_rate) { struct clk_wzrd_divider *divider = to_clk_wzrd_divider(hw); - u64 vco_freq, freq, diff, vcomin, vcomax; - u32 m, d, o; - u32 mmin, mmax, dmin, dmax, omin, omax; + u64 vco_freq, freq, diff, vcomin, vcomax, best_diff = -1ULL; + u64 m, d, o; + u64 mmin, mmax, dmin, dmax, omin, omax, mdmin, mdmax; - mmin = WZRD_M_MIN; - mmax = WZRD_M_MAX; + mmin = WZRD_M_MIN << 3; + mmax = WZRD_M_MAX << 3; dmin = WZRD_D_MIN; dmax = WZRD_D_MAX; - omin = WZRD_O_MIN; - omax = WZRD_O_MAX; - vcomin = WZRD_VCO_MIN; - vcomax = WZRD_VCO_MAX; + omin = WZRD_O_MIN << 3; + omax = WZRD_O_MAX << 3; + vcomin = WZRD_VCO_MIN << 3; + vcomax = WZRD_VCO_MAX << 3; for (m = mmin; m <= mmax; m++) { - for (d = dmin; d <= dmax; d++) { - vco_freq = DIV_ROUND_CLOSEST((parent_rate * m), d); - if (vco_freq >= vcomin && vco_freq <= vcomax) { - for (o = omin; o <= omax; o++) { - freq = DIV_ROUND_CLOSEST_ULL(vco_freq, o); - diff = abs(freq - rate); - - if (diff < WZRD_MIN_ERR) { - divider->m = m; - divider->d = d; - divider->o = o; - return 0; - } - } + mdmin = max(dmin, div64_u64(parent_rate * m + vcomax / 2, vcomax)); + mdmax = min(dmax, div64_u64(parent_rate * m + vcomin / 2, vcomin)); + for (d = mdmin; d <= mdmax; d++) { + vco_freq = DIV_ROUND_CLOSEST_ULL((parent_rate * m), d); + o = DIV_ROUND_CLOSEST_ULL(vco_freq, rate); + if (o < omin || o > omax) + continue; + freq = DIV_ROUND_CLOSEST_ULL(vco_freq, o); + diff = freq - rate; + if (diff < best_diff) { + best_diff = diff; + divider->m = m >> 3; + divider->m_frac = (m - (divider->m << 3)) * 125; + divider->d = d; + divider->o = o >> 3; + divider->o_frac = (o - (divider->o << 3)) * 125; } } } - return -EBUSY; + return best_diff < WZRD_MIN_ERR ? 0 : -EBUSY; } static int clk_wzrd_reconfig(struct clk_wzrd_divider *divider, void __iomem *div_addr) @@ -497,33 +505,22 @@ unsigned long parent_rate) { struct clk_wzrd_divider *divider = to_clk_wzrd_divider(hw); - unsigned long vco_freq, rate_div, clockout0_div; void __iomem *div_addr = divider->base; - u32 reg, pre, f; + u32 reg; int err; err = clk_wzrd_get_divisors(hw, rate, parent_rate); if (err) return err; - vco_freq = DIV_ROUND_CLOSEST(parent_rate * divider->m, divider->d); - rate_div = DIV_ROUND_CLOSEST_ULL((vco_freq * WZRD_FRAC_POINTS), rate); - - clockout0_div = div_u64(rate_div, WZRD_FRAC_POINTS); - - pre = DIV_ROUND_CLOSEST_ULL(vco_freq * WZRD_FRAC_POINTS, rate); - f = (pre - (clockout0_div * WZRD_FRAC_POINTS)); - f &= WZRD_CLKOUT_FRAC_MASK; - - reg = FIELD_PREP(WZRD_CLKOUT_DIVIDE_MASK, clockout0_div) | - FIELD_PREP(WZRD_CLKOUT0_FRAC_MASK, f); + reg = FIELD_PREP(WZRD_CLKOUT_DIVIDE_MASK, divider->o) | + FIELD_PREP(WZRD_CLKOUT0_FRAC_MASK, divider->o_frac); writel(reg, divider->base + WZRD_CLK_CFG_REG(0, 2)); - /* Set divisor and clear phase offset */ reg = FIELD_PREP(WZRD_CLKFBOUT_MULT_MASK, divider->m) | + FIELD_PREP(WZRD_CLKFBOUT_MULT_FRAC_MASK, divider->m_frac) | FIELD_PREP(WZRD_DIVCLK_DIVIDE_MASK, divider->d); writel(reg, divider->base + WZRD_CLK_CFG_REG(0, 0)); - writel(divider->o, divider->base + WZRD_CLK_CFG_REG(0, 2)); writel(0, divider->base + WZRD_CLK_CFG_REG(0, 3)); div_addr = divider->base + WZRD_DR_INIT_REG_OFFSET; return clk_wzrd_reconfig(divider, div_addr); @@ -565,18 +562,19 @@ unsigned long parent_rate) { struct clk_wzrd_divider *divider = to_clk_wzrd_divider(hw); - u32 m, d, o, div, reg, f; + u32 m, d, o, reg, f, mf; + u64 mul; reg = readl(divider->base + WZRD_CLK_CFG_REG(0, 0)); d = FIELD_GET(WZRD_DIVCLK_DIVIDE_MASK, reg); m = FIELD_GET(WZRD_CLKFBOUT_MULT_MASK, reg); + mf = FIELD_GET(WZRD_CLKFBOUT_MULT_FRAC_MASK, reg); reg = readl(divider->base + WZRD_CLK_CFG_REG(0, 2)); o = FIELD_GET(WZRD_DIVCLK_DIVIDE_MASK, reg); f = FIELD_GET(WZRD_CLKOUT0_FRAC_MASK, reg); - div = DIV_ROUND_CLOSEST(d * (WZRD_FRAC_POINTS * o + f), WZRD_FRAC_POINTS); - return divider_recalc_rate(hw, parent_rate * m, div, divider->table, - divider->flags, divider->width); + mul = m * 1000 + mf; + return DIV_ROUND_CLOSEST_ULL(parent_rate * mul, d * (o * 1000 + f)); } static unsigned long clk_wzrd_recalc_rate_all_ver(struct clk_hw *hw, @@ -649,6 +647,25 @@ unsigned long *prate) { struct clk_wzrd_divider *divider = to_clk_wzrd_divider(hw); + u32 m, d, o; + int err; + + err = clk_wzrd_get_divisors(hw, rate, *prate); + if (err) + return err; + + m = divider->m; + d = divider->d; + o = divider->o; + + rate = div_u64(*prate * (m * 1000 + divider->m_frac), d * (o * 1000 + divider->o_frac)); + return rate; +} + +static long clk_wzrd_ver_round_rate_all(struct clk_hw *hw, unsigned long rate, + unsigned long *prate) +{ + struct clk_wzrd_divider *divider = to_clk_wzrd_divider(hw); unsigned long int_freq; u32 m, d, o, div, f; int err; @@ -679,7 +696,7 @@ }; static const struct clk_ops clk_wzrd_ver_div_all_ops = { - .round_rate = clk_wzrd_round_rate_all, + .round_rate = clk_wzrd_ver_round_rate_all, .set_rate = clk_wzrd_dynamic_all_ver, .recalc_rate = clk_wzrd_recalc_rate_all_ver, }; --- linux-xilinx-6.8.0.orig/drivers/clk/xilinx/xlnx_vcu.c +++ linux-xilinx-6.8.0/drivers/clk/xilinx/xlnx_vcu.c @@ -11,11 +11,13 @@ #include #include #include +#include #include #include #include #include #include +#include #include #include @@ -46,28 +48,6 @@ #define FVCO_MIN (1500U * MHZ) #define FVCO_MAX (3000U * MHZ) -/** - * struct xvcu_device - Xilinx VCU init device structure - * @dev: Platform device - * @pll_ref: pll ref clock source - * @aclk: axi clock source - * @logicore_reg_ba: logicore reg base address - * @vcu_slcr_ba: vcu_slcr Register base address - * @pll: handle for the VCU PLL - * @pll_post: handle for the VCU PLL post divider - * @clk_data: clocks provided by the vcu clock provider - */ -struct xvcu_device { - struct device *dev; - struct clk *pll_ref; - struct clk *aclk; - struct regmap *logicore_reg_ba; - void __iomem *vcu_slcr_ba; - struct clk_hw *pll; - struct clk_hw *pll_post; - struct clk_hw_onecell_data *clk_data; -}; - static struct regmap_config vcu_settings_regmap_config = { .name = "regmap", .reg_bits = 32, @@ -223,6 +203,78 @@ iowrite32(value, iomem + offset); } +/** + * xvcu_get_color_depth - read the color depth register + * @xvcu: Pointer to the xvcu_device structure + * + * Return: Returns 32bit value + * + */ +u32 xvcu_get_color_depth(struct xvcu_device *xvcu) +{ + u32 value; + + if (!regmap_read(xvcu->logicore_reg_ba, VCU_ENC_COLOR_DEPTH, &value)) + return value; + else + return 0; +} +EXPORT_SYMBOL_GPL(xvcu_get_color_depth); + +/** + * xvcu_get_memory_depth - read the memory depth register + * @xvcu: Pointer to the xvcu_device structure + * + * Return: Returns 32bit value + * + */ +u32 xvcu_get_memory_depth(struct xvcu_device *xvcu) +{ + u32 value; + + if (!regmap_read(xvcu->logicore_reg_ba, VCU_MEMORY_DEPTH, &value)) + return value; + else + return 0; +} +EXPORT_SYMBOL_GPL(xvcu_get_memory_depth); + +/** + * xvcu_get_clock_frequency - provide the core clock frequency + * @xvcu: Pointer to the xvcu_device structure + * + * Return: Returns 32bit value + * + */ +u32 xvcu_get_clock_frequency(struct xvcu_device *xvcu) +{ + u32 value; + + if (!regmap_read(xvcu->logicore_reg_ba, VCU_CORE_CLK, &value)) + return value * MHZ; + else + return 0; +} +EXPORT_SYMBOL_GPL(xvcu_get_clock_frequency); + +/** + * xvcu_get_num_cores - read the number of core register + * @xvcu: Pointer to the xvcu_device structure + * + * Return: Returns 32bit value + * + */ +u32 xvcu_get_num_cores(struct xvcu_device *xvcu) +{ + u32 value; + + if (!regmap_read(xvcu->logicore_reg_ba, VCU_NUM_CORE, &value)) + return value; + else + return 0; +} +EXPORT_SYMBOL_GPL(xvcu_get_num_cores); + #define to_vcu_pll(_hw) container_of(_hw, struct vcu_pll, hw) struct vcu_pll { @@ -547,7 +599,7 @@ return PTR_ERR(hw); xvcu->pll_post = hw; - parent_data[0].fw_name = "pll_ref"; + parent_data[0].fw_name = "dummy_name"; parent_data[1].hw = xvcu->pll_post; hws[CLK_XVCU_ENC_CORE] = @@ -587,8 +639,8 @@ xvcu_clk_hw_unregister_leaf(hws[CLK_XVCU_ENC_MCU]); if (!IS_ERR_OR_NULL(hws[CLK_XVCU_ENC_CORE])) xvcu_clk_hw_unregister_leaf(hws[CLK_XVCU_ENC_CORE]); - - clk_hw_unregister_fixed_factor(xvcu->pll_post); + if (!IS_ERR_OR_NULL(xvcu->pll_post)) + clk_hw_unregister_fixed_factor(xvcu->pll_post); } /** @@ -676,6 +728,24 @@ * Bit 0 : Gasket isolation * Bit 1 : put VCU out of reset */ + xvcu->reset_gpio = devm_gpiod_get_optional(&pdev->dev, "reset", + GPIOD_OUT_LOW); + if (IS_ERR(xvcu->reset_gpio)) { + ret = PTR_ERR(xvcu->reset_gpio); + dev_err(&pdev->dev, "failed to get reset gpio for vcu.\n"); + goto error_get_gpio; + } + + if (xvcu->reset_gpio) { + gpiod_set_value(xvcu->reset_gpio, 0); + /* min 2 clock cycle of vcu pll_ref, slowest freq is 33.33KHz */ + usleep_range(60, 120); + gpiod_set_value(xvcu->reset_gpio, 1); + usleep_range(60, 120); + } else { + dev_warn(&pdev->dev, "No reset gpio info from dts for vcu. This may lead to incorrect functionality if VCU isolation is removed post initialization.\n"); + } + regmap_write(xvcu->logicore_reg_ba, VCU_GASKET_INIT, VCU_GASKET_VALUE); ret = xvcu_register_clock_provider(xvcu); @@ -686,10 +756,17 @@ dev_set_drvdata(&pdev->dev, xvcu); + ret = devm_of_platform_populate(&pdev->dev); + if (ret) { + dev_err(&pdev->dev, "Failed to register allegro codecs\n"); + goto error_clk_provider; + } + return 0; error_clk_provider: xvcu_unregister_clock_provider(xvcu); +error_get_gpio: clk_disable_unprepare(xvcu->aclk); return ret; } @@ -711,6 +788,13 @@ xvcu_unregister_clock_provider(xvcu); /* Add the Gasket isolation and put the VCU in reset. */ + if (xvcu->reset_gpio) { + gpiod_set_value(xvcu->reset_gpio, 0); + /* min 2 clock cycle of vcu pll_ref, slowest freq is 33.33KHz */ + usleep_range(60, 120); + gpiod_set_value(xvcu->reset_gpio, 1); + usleep_range(60, 120); + } regmap_write(xvcu->logicore_reg_ba, VCU_GASKET_INIT, 0); clk_disable_unprepare(xvcu->aclk); --- linux-xilinx-6.8.0.orig/drivers/clk/zynq/clkc.c +++ linux-xilinx-6.8.0/drivers/clk/zynq/clkc.c @@ -42,6 +42,7 @@ #define SLCR_SWDT_CLK_SEL (zynq_clkc_base + 0x204) #define NUM_MIO_PINS 54 +#define CLK_NAME_LEN 16 #define DBG_CLK_CTRL_CLKACT_TRC BIT(0) #define DBG_CLK_CTRL_CPU_1XCLKACT BIT(1) @@ -215,7 +216,7 @@ int i; u32 tmp; int ret; - char *clk_name; + char clk_name[CLK_NAME_LEN]; unsigned int fclk_enable = 0; const char *clk_output_name[clk_max]; const char *cpu_parents[4]; @@ -426,12 +427,10 @@ "gem1_emio_mux", CLK_SET_RATE_PARENT, SLCR_GEM1_CLK_CTRL, 0, 0, &gem1clk_lock); - tmp = strlen("mio_clk_00x"); - clk_name = kmalloc(tmp, GFP_KERNEL); for (i = 0; i < NUM_MIO_PINS; i++) { int idx; - snprintf(clk_name, tmp, "mio_clk_%2.2d", i); + snprintf(clk_name, CLK_NAME_LEN, "mio_clk_%2.2d", i); idx = of_property_match_string(np, "clock-names", clk_name); if (idx >= 0) can_mio_mux_parents[i] = of_clk_get_parent_name(np, @@ -439,7 +438,6 @@ else can_mio_mux_parents[i] = dummy_nm; } - kfree(clk_name); clk_register_mux(NULL, "can_mux", periph_parents, 4, CLK_SET_RATE_NO_REPARENT, SLCR_CAN_CLK_CTRL, 4, 2, 0, &canclk_lock); --- linux-xilinx-6.8.0.orig/drivers/clk/zynqmp/divider.c +++ linux-xilinx-6.8.0/drivers/clk/zynqmp/divider.c @@ -2,7 +2,8 @@ /* * Zynq UltraScale+ MPSoC Divider support * - * Copyright (C) 2016-2019 Xilinx + * Copyright (C), 2016 - 2019 Xilinx + * Copyright (C), 2023 - 2024 Advanced Micro Devices, Inc. * * Adjustable divider clock implementation */ --- linux-xilinx-6.8.0.orig/drivers/clocksource/Kconfig +++ linux-xilinx-6.8.0/drivers/clocksource/Kconfig @@ -390,7 +390,8 @@ This affects CPU_FREQ max delta from the initial frequency. config ARM_TIMER_SP804 - bool "Support for Dual Timer SP804 module" if COMPILE_TEST + bool "Support for Dual Timer SP804 module" + depends on ARM || ARM64 || COMPILE_TEST depends on GENERIC_SCHED_CLOCK && HAVE_CLK select CLKSRC_MMIO select TIMER_OF if OF --- linux-xilinx-6.8.0.orig/drivers/clocksource/arm_global_timer.c +++ linux-xilinx-6.8.0/drivers/clocksource/arm_global_timer.c @@ -32,7 +32,7 @@ #define GT_CONTROL_IRQ_ENABLE BIT(2) /* banked */ #define GT_CONTROL_AUTO_INC BIT(3) /* banked */ #define GT_CONTROL_PRESCALER_SHIFT 8 -#define GT_CONTROL_PRESCALER_MAX 0xF +#define GT_CONTROL_PRESCALER_MAX 0xFF #define GT_CONTROL_PRESCALER_MASK (GT_CONTROL_PRESCALER_MAX << \ GT_CONTROL_PRESCALER_SHIFT) @@ -290,18 +290,17 @@ switch (event) { case PRE_RATE_CHANGE: { - int psv; + unsigned long psv; - psv = DIV_ROUND_CLOSEST(ndata->new_rate, - gt_target_rate); - - if (abs(gt_target_rate - (ndata->new_rate / psv)) > MAX_F_ERR) + psv = DIV_ROUND_CLOSEST(ndata->new_rate, gt_target_rate); + if (!psv || + abs(gt_target_rate - (ndata->new_rate / psv)) > MAX_F_ERR) return NOTIFY_BAD; psv--; /* prescaler within legal range? */ - if (psv < 0 || psv > GT_CONTROL_PRESCALER_MAX) + if (psv > GT_CONTROL_PRESCALER_MAX) return NOTIFY_BAD; /* --- linux-xilinx-6.8.0.orig/drivers/clocksource/hyperv_timer.c +++ linux-xilinx-6.8.0/drivers/clocksource/hyperv_timer.c @@ -27,7 +27,8 @@ #include static struct clock_event_device __percpu *hv_clock_event; -static u64 hv_sched_clock_offset __ro_after_init; +/* Note: offset can hold negative values after hibernation. */ +static u64 hv_sched_clock_offset __read_mostly; /* * If false, we're using the old mechanism for stimer0 interrupts @@ -137,7 +138,21 @@ ce->name = "Hyper-V clockevent"; ce->features = CLOCK_EVT_FEAT_ONESHOT; ce->cpumask = cpumask_of(cpu); - ce->rating = 1000; + + /* + * Lower the rating of the Hyper-V timer in a TDX VM without paravisor, + * so the local APIC timer (lapic_clockevent) is the default timer in + * such a VM. The Hyper-V timer is not preferred in such a VM because + * it depends on the slow VM Reference Counter MSR (the Hyper-V TSC + * page is not enbled in such a VM because the VM uses Invariant TSC + * as a better clocksource and it's challenging to mark the Hyper-V + * TSC page shared in very early boot). + */ + if (!ms_hyperv.paravisor_present && hv_isolation_type_tdx()) + ce->rating = 90; + else + ce->rating = 1000; + ce->set_state_shutdown = hv_ce_shutdown; ce->set_state_oneshot = hv_ce_set_oneshot; ce->set_next_event = hv_ce_set_next_event; @@ -456,6 +471,17 @@ hv_set_register(HV_REGISTER_REFERENCE_TSC, tsc_msr.as_uint64); } +/* + * Called during resume from hibernation, from overridden + * x86_platform.restore_sched_clock_state routine. This is to adjust offsets + * used to calculate time for hv tsc page based sched_clock, to account for + * time spent before hibernation. + */ +void hv_adj_sched_clock_offset(u64 offset) +{ + hv_sched_clock_offset -= offset; +} + #ifdef HAVE_VDSO_CLOCKMODE_HVCLOCK static int hv_cs_enable(struct clocksource *cs) { --- linux-xilinx-6.8.0.orig/drivers/clocksource/i8253.c +++ linux-xilinx-6.8.0/drivers/clocksource/i8253.c @@ -108,11 +108,8 @@ #endif #ifdef CONFIG_CLKEVT_I8253 -static int pit_shutdown(struct clock_event_device *evt) +void clockevent_i8253_disable(void) { - if (!clockevent_state_oneshot(evt) && !clockevent_state_periodic(evt)) - return 0; - raw_spin_lock(&i8253_lock); outb_p(0x30, PIT_MODE); @@ -123,6 +120,14 @@ } raw_spin_unlock(&i8253_lock); +} + +static int pit_shutdown(struct clock_event_device *evt) +{ + if (!clockevent_state_oneshot(evt) && !clockevent_state_periodic(evt)) + return 0; + + clockevent_i8253_disable(); return 0; } --- linux-xilinx-6.8.0.orig/drivers/clocksource/samsung_pwm_timer.c +++ linux-xilinx-6.8.0/drivers/clocksource/samsung_pwm_timer.c @@ -418,8 +418,6 @@ static int __init samsung_pwm_alloc(struct device_node *np, const struct samsung_pwm_variant *variant) { - struct property *prop; - const __be32 *cur; u32 val; int i, ret; @@ -427,7 +425,7 @@ for (i = 0; i < SAMSUNG_PWM_NUM; ++i) pwm.irq[i] = irq_of_parse_and_map(np, i); - of_property_for_each_u32(np, "samsung,pwm-outputs", prop, cur, val) { + of_property_for_each_u32(np, "samsung,pwm-outputs", val) { if (val >= SAMSUNG_PWM_NUM) { pr_warn("%s: invalid channel index in samsung,pwm-outputs property\n", __func__); continue; --- linux-xilinx-6.8.0.orig/drivers/clocksource/sh_cmt.c +++ linux-xilinx-6.8.0/drivers/clocksource/sh_cmt.c @@ -528,6 +528,7 @@ static irqreturn_t sh_cmt_interrupt(int irq, void *dev_id) { struct sh_cmt_channel *ch = dev_id; + unsigned long flags; /* clear flags */ sh_cmt_write_cmcsr(ch, sh_cmt_read_cmcsr(ch) & @@ -558,6 +559,8 @@ ch->flags &= ~FLAG_SKIPEVENT; + raw_spin_lock_irqsave(&ch->lock, flags); + if (ch->flags & FLAG_REPROGRAM) { ch->flags &= ~FLAG_REPROGRAM; sh_cmt_clock_event_program_verify(ch, 1); @@ -570,6 +573,8 @@ ch->flags &= ~FLAG_IRQCONTEXT; + raw_spin_unlock_irqrestore(&ch->lock, flags); + return IRQ_HANDLED; } @@ -780,12 +785,18 @@ struct clock_event_device *ced) { struct sh_cmt_channel *ch = ced_to_sh_cmt(ced); + unsigned long flags; BUG_ON(!clockevent_state_oneshot(ced)); + + raw_spin_lock_irqsave(&ch->lock, flags); + if (likely(ch->flags & FLAG_IRQCONTEXT)) ch->next_match_value = delta - 1; else - sh_cmt_set_next(ch, delta - 1); + __sh_cmt_set_next(ch, delta - 1); + + raw_spin_unlock_irqrestore(&ch->lock, flags); return 0; } --- linux-xilinx-6.8.0.orig/drivers/clocksource/timer-cadence-ttc.c +++ linux-xilinx-6.8.0/drivers/clocksource/timer-cadence-ttc.c @@ -487,6 +487,13 @@ u32 timer_width = 16; struct device_node *timer = pdev->dev.of_node; + /* + * If pwm-cells property is present in TTC node, + * it would be treated as PWM device. + */ + if (of_property_read_bool(timer, "#pwm-cells")) + return -ENODEV; + if (initialized) return 0; --- linux-xilinx-6.8.0.orig/drivers/clocksource/timer-imx-tpm.c +++ linux-xilinx-6.8.0/drivers/clocksource/timer-imx-tpm.c @@ -83,20 +83,28 @@ static int tpm_set_next_event(unsigned long delta, struct clock_event_device *evt) { - unsigned long next, now; + unsigned long next, prev, now; - next = tpm_read_counter(); - next += delta; + prev = tpm_read_counter(); + next = prev + delta; writel(next, timer_base + TPM_C0V); now = tpm_read_counter(); /* + * Need to wait CNT increase at least 1 cycle to make sure + * the C0V has been updated into HW. + */ + if ((next & 0xffffffff) != readl(timer_base + TPM_C0V)) + while (now == tpm_read_counter()) + ; + + /* * NOTE: We observed in a very small probability, the bus fabric * contention between GPU and A7 may results a few cycles delay * of writing CNT registers which may cause the min_delta event got * missed, so we need add a ETIME check here in case it happened. */ - return (int)(next - now) <= 0 ? -ETIME : 0; + return (now - prev) >= delta ? -ETIME : 0; } static int tpm_set_state_oneshot(struct clock_event_device *evt) --- linux-xilinx-6.8.0.orig/drivers/clocksource/timer-of.c +++ linux-xilinx-6.8.0/drivers/clocksource/timer-of.c @@ -25,10 +25,7 @@ struct clock_event_device *clkevt = &to->clkevt; - if (of_irq->percpu) - free_percpu_irq(of_irq->irq, clkevt); - else - free_irq(of_irq->irq, clkevt); + free_irq(of_irq->irq, clkevt); } /** @@ -42,9 +39,6 @@ * - Get interrupt number by name * - Get interrupt number by index * - * When the interrupt is per CPU, 'request_percpu_irq()' is called, - * otherwise 'request_irq()' is used. - * * Returns 0 on success, < 0 otherwise */ static __init int timer_of_irq_init(struct device_node *np, @@ -69,12 +63,9 @@ return -EINVAL; } - ret = of_irq->percpu ? - request_percpu_irq(of_irq->irq, of_irq->handler, - np->full_name, clkevt) : - request_irq(of_irq->irq, of_irq->handler, - of_irq->flags ? of_irq->flags : IRQF_TIMER, - np->full_name, clkevt); + ret = request_irq(of_irq->irq, of_irq->handler, + of_irq->flags ? of_irq->flags : IRQF_TIMER, + np->full_name, clkevt); if (ret) { pr_err("Failed to request irq %d for %pOF\n", of_irq->irq, np); return ret; --- linux-xilinx-6.8.0.orig/drivers/clocksource/timer-of.h +++ linux-xilinx-6.8.0/drivers/clocksource/timer-of.h @@ -11,7 +11,6 @@ struct of_timer_irq { int irq; int index; - int percpu; const char *name; unsigned long flags; irq_handler_t handler; --- linux-xilinx-6.8.0.orig/drivers/clocksource/timer-qcom.c +++ linux-xilinx-6.8.0/drivers/clocksource/timer-qcom.c @@ -233,6 +233,7 @@ } if (of_property_read_u32(np, "clock-frequency", &freq)) { + iounmap(cpu0_base); pr_err("Unknown frequency\n"); return -EINVAL; } @@ -243,7 +244,11 @@ freq /= 4; writel_relaxed(DGT_CLK_CTL_DIV_4, source_base + DGT_CLK_CTL); - return msm_timer_init(freq, 32, irq, !!percpu_offset); + ret = msm_timer_init(freq, 32, irq, !!percpu_offset); + if (ret) + iounmap(cpu0_base); + + return ret; } TIMER_OF_DECLARE(kpss_timer, "qcom,kpss-timer", msm_dt_timer_init); TIMER_OF_DECLARE(scss_timer, "qcom,scss-timer", msm_dt_timer_init); --- linux-xilinx-6.8.0.orig/drivers/clocksource/timer-riscv.c +++ linux-xilinx-6.8.0/drivers/clocksource/timer-riscv.c @@ -108,6 +108,9 @@ { struct clock_event_device *ce = per_cpu_ptr(&riscv_clock_event, cpu); + /* Clear timer interrupt */ + riscv_clock_event_stop(); + ce->cpumask = cpumask_of(cpu); ce->irq = riscv_clock_event_irq; if (riscv_timer_cannot_wake_cpu) --- linux-xilinx-6.8.0.orig/drivers/clocksource/timer-ti-dm-systimer.c +++ linux-xilinx-6.8.0/drivers/clocksource/timer-ti-dm-systimer.c @@ -686,9 +686,9 @@ static int __init dmtimer_percpu_quirk_init(struct device_node *np, u32 pa) { - struct device_node *arm_timer; + struct device_node *arm_timer __free(device_node) = + of_find_compatible_node(NULL, NULL, "arm,armv7-timer"); - arm_timer = of_find_compatible_node(NULL, NULL, "arm,armv7-timer"); if (of_device_is_available(arm_timer)) { pr_warn_once("ARM architected timer wrap issue i940 detected\n"); return 0; --- linux-xilinx-6.8.0.orig/drivers/comedi/comedi_fops.c +++ linux-xilinx-6.8.0/drivers/comedi/comedi_fops.c @@ -2407,6 +2407,18 @@ start += PAGE_SIZE; } + +#ifdef CONFIG_MMU + /* + * Leaving behind a partial mapping of a buffer we're about to + * drop is unsafe, see remap_pfn_range_notrack(). + * We need to zap the range here ourselves instead of relying + * on the automatic zapping in remap_pfn_range() because we call + * remap_pfn_range() in a loop. + */ + if (retval) + zap_vma_ptes(vma, vma->vm_start, size); +#endif } if (retval == 0) { --- linux-xilinx-6.8.0.orig/drivers/comedi/drivers/ni_routing/tools/convert_c_to_py.c +++ linux-xilinx-6.8.0/drivers/comedi/drivers/ni_routing/tools/convert_c_to_py.c @@ -140,6 +140,11 @@ { FILE *fp = fopen("ni_values.py", "w"); + if (fp == NULL) { + fprintf(stderr, "Could not open file!"); + return -1; + } + /* write route register values */ fprintf(fp, "ni_route_values = {\n"); for (int i = 0; ni_all_route_values[i]; ++i) --- linux-xilinx-6.8.0.orig/drivers/comedi/drivers/vmk80xx.c +++ linux-xilinx-6.8.0/drivers/comedi/drivers/vmk80xx.c @@ -641,33 +641,22 @@ struct vmk80xx_private *devpriv = dev->private; struct usb_interface *intf = comedi_to_usb_interface(dev); struct usb_host_interface *iface_desc = intf->cur_altsetting; - struct usb_endpoint_descriptor *ep_desc; - int i; + struct usb_endpoint_descriptor *ep_rx_desc, *ep_tx_desc; + int ret; - if (iface_desc->desc.bNumEndpoints != 2) - return -ENODEV; - - for (i = 0; i < iface_desc->desc.bNumEndpoints; i++) { - ep_desc = &iface_desc->endpoint[i].desc; - - if (usb_endpoint_is_int_in(ep_desc) || - usb_endpoint_is_bulk_in(ep_desc)) { - if (!devpriv->ep_rx) - devpriv->ep_rx = ep_desc; - continue; - } + if (devpriv->model == VMK8061_MODEL) + ret = usb_find_common_endpoints(iface_desc, &ep_rx_desc, + &ep_tx_desc, NULL, NULL); + else + ret = usb_find_common_endpoints(iface_desc, NULL, NULL, + &ep_rx_desc, &ep_tx_desc); - if (usb_endpoint_is_int_out(ep_desc) || - usb_endpoint_is_bulk_out(ep_desc)) { - if (!devpriv->ep_tx) - devpriv->ep_tx = ep_desc; - continue; - } - } - - if (!devpriv->ep_rx || !devpriv->ep_tx) + if (ret) return -ENODEV; + devpriv->ep_rx = ep_rx_desc; + devpriv->ep_tx = ep_tx_desc; + if (!usb_endpoint_maxp(devpriv->ep_rx) || !usb_endpoint_maxp(devpriv->ep_tx)) return -EINVAL; --- linux-xilinx-6.8.0.orig/drivers/counter/stm32-timer-cnt.c +++ linux-xilinx-6.8.0/drivers/counter/stm32-timer-cnt.c @@ -195,11 +195,17 @@ { struct stm32_timer_cnt *const priv = counter_priv(counter); u32 cr1; + int ret; if (enable) { regmap_read(priv->regmap, TIM_CR1, &cr1); - if (!(cr1 & TIM_CR1_CEN)) - clk_enable(priv->clk); + if (!(cr1 & TIM_CR1_CEN)) { + ret = clk_enable(priv->clk); + if (ret) { + dev_err(counter->parent, "Cannot enable clock %d\n", ret); + return ret; + } + } regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, TIM_CR1_CEN); @@ -383,7 +389,11 @@ return ret; if (priv->enabled) { - clk_enable(priv->clk); + ret = clk_enable(priv->clk); + if (ret) { + dev_err(dev, "Cannot enable clock %d\n", ret); + return ret; + } /* Restore registers that may have been lost */ regmap_write(priv->regmap, TIM_SMCR, priv->bak.smcr); --- linux-xilinx-6.8.0.orig/drivers/counter/ti-ecap-capture.c +++ linux-xilinx-6.8.0/drivers/counter/ti-ecap-capture.c @@ -576,8 +576,13 @@ { struct counter_device *counter_dev = dev_get_drvdata(dev); struct ecap_cnt_dev *ecap_dev = counter_priv(counter_dev); + int ret; - clk_enable(ecap_dev->clk); + ret = clk_enable(ecap_dev->clk); + if (ret) { + dev_err(dev, "Cannot enable clock %d\n", ret); + return ret; + } ecap_cnt_capture_set_evmode(counter_dev, ecap_dev->pm_ctx.ev_mode); --- linux-xilinx-6.8.0.orig/drivers/counter/ti-eqep.c +++ linux-xilinx-6.8.0/drivers/counter/ti-eqep.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include @@ -376,6 +377,7 @@ struct counter_device *counter; struct ti_eqep_cnt *priv; void __iomem *base; + struct clk *clk; int err; counter = devm_counter_alloc(dev, sizeof(*priv)); @@ -415,6 +417,10 @@ pm_runtime_enable(dev); pm_runtime_get_sync(dev); + clk = devm_clk_get_enabled(dev, NULL); + if (IS_ERR(clk)) + return dev_err_probe(dev, PTR_ERR(clk), "failed to enable clock\n"); + err = counter_add(counter); if (err < 0) { pm_runtime_put_sync(dev); --- linux-xilinx-6.8.0.orig/drivers/cpufreq/Kconfig +++ linux-xilinx-6.8.0/drivers/cpufreq/Kconfig @@ -218,7 +218,7 @@ If in doubt, say N. config CPUFREQ_DT_PLATDEV - tristate "Generic DT based cpufreq platdev driver" + bool "Generic DT based cpufreq platdev driver" depends on OF help This adds a generic DT based cpufreq platdev driver for frequency --- linux-xilinx-6.8.0.orig/drivers/cpufreq/Kconfig.arm +++ linux-xilinx-6.8.0/drivers/cpufreq/Kconfig.arm @@ -173,6 +173,7 @@ config ARM_QCOM_CPUFREQ_HW tristate "QCOM CPUFreq HW driver" depends on ARCH_QCOM || COMPILE_TEST + depends on COMMON_CLK help Support for the CPUFreq HW driver. Some QCOM chipsets have a HW engine to offload the steps --- linux-xilinx-6.8.0.orig/drivers/cpufreq/acpi-cpufreq.c +++ linux-xilinx-6.8.0/drivers/cpufreq/acpi-cpufreq.c @@ -628,7 +628,14 @@ #endif #ifdef CONFIG_ACPI_CPPC_LIB -static u64 get_max_boost_ratio(unsigned int cpu) +/* + * get_max_boost_ratio: Computes the max_boost_ratio as the ratio + * between the highest_perf and the nominal_perf. + * + * Returns the max_boost_ratio for @cpu. Returns the CPPC nominal + * frequency via @nominal_freq if it is non-NULL pointer. + */ +static u64 get_max_boost_ratio(unsigned int cpu, u64 *nominal_freq) { struct cppc_perf_caps perf_caps; u64 highest_perf, nominal_perf; @@ -651,6 +658,9 @@ nominal_perf = perf_caps.nominal_perf; + if (nominal_freq) + *nominal_freq = perf_caps.nominal_freq; + if (!highest_perf || !nominal_perf) { pr_debug("CPU%d: highest or nominal performance missing\n", cpu); return 0; @@ -663,8 +673,12 @@ return div_u64(highest_perf << SCHED_CAPACITY_SHIFT, nominal_perf); } + #else -static inline u64 get_max_boost_ratio(unsigned int cpu) { return 0; } +static inline u64 get_max_boost_ratio(unsigned int cpu, u64 *nominal_freq) +{ + return 0; +} #endif static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) @@ -674,9 +688,9 @@ struct acpi_cpufreq_data *data; unsigned int cpu = policy->cpu; struct cpuinfo_x86 *c = &cpu_data(cpu); + u64 max_boost_ratio, nominal_freq = 0; unsigned int valid_states = 0; unsigned int result = 0; - u64 max_boost_ratio; unsigned int i; #ifdef CONFIG_SMP static int blacklisted; @@ -826,16 +840,20 @@ } freq_table[valid_states].frequency = CPUFREQ_TABLE_END; - max_boost_ratio = get_max_boost_ratio(cpu); + max_boost_ratio = get_max_boost_ratio(cpu, &nominal_freq); if (max_boost_ratio) { - unsigned int freq = freq_table[0].frequency; + unsigned int freq = nominal_freq; /* - * Because the loop above sorts the freq_table entries in the - * descending order, freq is the maximum frequency in the table. - * Assume that it corresponds to the CPPC nominal frequency and - * use it to set cpuinfo.max_freq. + * The loop above sorts the freq_table entries in the + * descending order. If ACPI CPPC has not advertised + * the nominal frequency (this is possible in CPPC + * revisions prior to 3), then use the first entry in + * the pstate table as a proxy for nominal frequency. */ + if (!freq) + freq = freq_table[0].frequency; + policy->cpuinfo.max_freq = freq * max_boost_ratio >> SCHED_CAPACITY_SHIFT; } else { /* @@ -890,8 +908,10 @@ if (perf->states[0].core_frequency * 1000 != freq_table[0].frequency) pr_warn(FW_WARN "P-state 0 is not max freq\n"); - if (acpi_cpufreq_driver.set_boost) + if (acpi_cpufreq_driver.set_boost) { set_boost(policy, acpi_cpufreq_driver.boost_enabled); + policy->boost_enabled = acpi_cpufreq_driver.boost_enabled; + } return result; --- linux-xilinx-6.8.0.orig/drivers/cpufreq/amd-pstate-ut.c +++ linux-xilinx-6.8.0/drivers/cpufreq/amd-pstate-ut.c @@ -26,10 +26,11 @@ #include #include #include -#include #include +#include "amd-pstate.h" + /* * Abbreviations: * amd_pstate_ut: used as a shortform for AMD P-State unit test. @@ -201,6 +202,7 @@ int cpu = 0; struct cpufreq_policy *policy = NULL; struct amd_cpudata *cpudata = NULL; + u32 nominal_freq_khz; for_each_possible_cpu(cpu) { policy = cpufreq_cpu_get(cpu); @@ -208,13 +210,14 @@ break; cpudata = policy->driver_data; - if (!((cpudata->max_freq >= cpudata->nominal_freq) && - (cpudata->nominal_freq > cpudata->lowest_nonlinear_freq) && + nominal_freq_khz = cpudata->nominal_freq*1000; + if (!((cpudata->max_freq >= nominal_freq_khz) && + (nominal_freq_khz > cpudata->lowest_nonlinear_freq) && (cpudata->lowest_nonlinear_freq > cpudata->min_freq) && (cpudata->min_freq > 0))) { amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL; pr_err("%s cpu%d max=%d >= nominal=%d > lowest_nonlinear=%d > min=%d > 0, the formula is incorrect!\n", - __func__, cpu, cpudata->max_freq, cpudata->nominal_freq, + __func__, cpu, cpudata->max_freq, nominal_freq_khz, cpudata->lowest_nonlinear_freq, cpudata->min_freq); goto skip_test; } @@ -228,13 +231,13 @@ if (cpudata->boost_supported) { if ((policy->max == cpudata->max_freq) || - (policy->max == cpudata->nominal_freq)) + (policy->max == nominal_freq_khz)) amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_PASS; else { amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL; pr_err("%s cpu%d policy_max=%d should be equal cpu_max=%d or cpu_nominal=%d !\n", __func__, cpu, policy->max, cpudata->max_freq, - cpudata->nominal_freq); + nominal_freq_khz); goto skip_test; } } else { --- linux-xilinx-6.8.0.orig/drivers/cpufreq/amd-pstate.c +++ linux-xilinx-6.8.0/drivers/cpufreq/amd-pstate.c @@ -36,7 +36,7 @@ #include #include #include -#include +#include #include #include @@ -45,10 +45,45 @@ #include #include #include + +#include "amd-pstate.h" #include "amd-pstate-trace.h" #define AMD_PSTATE_TRANSITION_LATENCY 20000 #define AMD_PSTATE_TRANSITION_DELAY 1000 +#define CPPC_HIGHEST_PERF_PERFORMANCE 196 +#define CPPC_HIGHEST_PERF_DEFAULT 166 + +#define AMD_CPPC_EPP_PERFORMANCE 0x00 +#define AMD_CPPC_EPP_BALANCE_PERFORMANCE 0x80 +#define AMD_CPPC_EPP_BALANCE_POWERSAVE 0xBF +#define AMD_CPPC_EPP_POWERSAVE 0xFF + +/* + * enum amd_pstate_mode - driver working mode of amd pstate + */ +enum amd_pstate_mode { + AMD_PSTATE_UNDEFINED = 0, + AMD_PSTATE_DISABLE, + AMD_PSTATE_PASSIVE, + AMD_PSTATE_ACTIVE, + AMD_PSTATE_GUIDED, + AMD_PSTATE_MAX, +}; + +static const char * const amd_pstate_mode_string[] = { + [AMD_PSTATE_UNDEFINED] = "undefined", + [AMD_PSTATE_DISABLE] = "disable", + [AMD_PSTATE_PASSIVE] = "passive", + [AMD_PSTATE_ACTIVE] = "active", + [AMD_PSTATE_GUIDED] = "guided", + NULL, +}; + +struct quirk_entry { + u32 nominal_freq; + u32 lowest_freq; +}; /* * TODO: We need more time to fine tune processors with shared memory solution @@ -64,6 +99,8 @@ static struct cpufreq_driver amd_pstate_epp_driver; static int cppc_state = AMD_PSTATE_UNDEFINED; static bool cppc_enabled; +static struct quirk_entry *quirks; +static bool amd_pstate_prefcore = true; /* * AMD Energy Preference Performance (EPP) @@ -108,6 +145,41 @@ typedef int (*cppc_mode_transition_fn)(int); +static struct quirk_entry quirk_amd_7k62 = { + .nominal_freq = 2600, + .lowest_freq = 550, +}; + +static int __init dmi_matched_7k62_bios_bug(const struct dmi_system_id *dmi) +{ + /** + * match the broken bios for family 17h processor support CPPC V2 + * broken BIOS lack of nominal_freq and lowest_freq capabilities + * definition in ACPI tables + */ + if (boot_cpu_has(X86_FEATURE_ZEN2)) { + quirks = dmi->driver_data; + pr_info("Overriding nominal and lowest frequencies for %s\n", dmi->ident); + return 1; + } + + return 0; +} + +static const struct dmi_system_id amd_pstate_quirks_table[] __initconst = { + { + .callback = dmi_matched_7k62_bios_bug, + .ident = "AMD EPYC 7K62", + .matches = { + DMI_MATCH(DMI_BIOS_VERSION, "5.14"), + DMI_MATCH(DMI_BIOS_RELEASE, "12/12/2019"), + }, + .driver_data = &quirk_amd_7k62, + }, + {} +}; +MODULE_DEVICE_TABLE(dmi, amd_pstate_quirks_table); + static inline int get_mode_idx_from_str(const char *str, size_t size) { int i; @@ -175,6 +247,26 @@ return index; } +static void pstate_update_perf(struct amd_cpudata *cpudata, u32 min_perf, + u32 des_perf, u32 max_perf, bool fast_switch) +{ + if (fast_switch) + wrmsrl(MSR_AMD_CPPC_REQ, READ_ONCE(cpudata->cppc_req_cached)); + else + wrmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, + READ_ONCE(cpudata->cppc_req_cached)); +} + +DEFINE_STATIC_CALL(amd_pstate_update_perf, pstate_update_perf); + +static inline void amd_pstate_update_perf(struct amd_cpudata *cpudata, + u32 min_perf, u32 des_perf, + u32 max_perf, bool fast_switch) +{ + static_call(amd_pstate_update_perf)(cpudata, min_perf, des_perf, + max_perf, fast_switch); +} + static int amd_pstate_set_epp(struct amd_cpudata *cpudata, u32 epp) { int ret; @@ -191,6 +283,9 @@ if (!ret) cpudata->epp_cached = epp; } else { + amd_pstate_update_perf(cpudata, cpudata->min_limit_perf, 0U, + cpudata->max_limit_perf, false); + perf_ctrls.energy_perf = epp; ret = cppc_set_epp_perf(cpudata->cpu, &perf_ctrls, 1); if (ret) { @@ -209,10 +304,8 @@ int epp = -EINVAL; int ret; - if (!pref_index) { - pr_debug("EPP pref_index is invalid\n"); - return -EINVAL; - } + if (!pref_index) + epp = cpudata->epp_default; if (epp == -EINVAL) epp = epp_values[pref_index]; @@ -287,6 +380,21 @@ return static_call(amd_pstate_enable)(enable); } +static u32 amd_pstate_highest_perf_set(struct amd_cpudata *cpudata) +{ + struct cpuinfo_x86 *c = &cpu_data(0); + + /* + * For AMD CPUs with Family ID 19H and Model ID range 0x70 to 0x7f, + * the highest performance level is set to 196. + * https://bugzilla.kernel.org/show_bug.cgi?id=218759 + */ + if (c->x86 == 0x19 && (c->x86_model >= 0x70 && c->x86_model <= 0x7f)) + return CPPC_HIGHEST_PERF_PERFORMANCE; + + return CPPC_HIGHEST_PERF_DEFAULT; +} + static int pstate_init_perf(struct amd_cpudata *cpudata) { u64 cap1; @@ -297,13 +405,14 @@ if (ret) return ret; - /* - * TODO: Introduce AMD specific power feature. - * - * CPPC entry doesn't indicate the highest performance in some ASICs. + /* For platforms that do not support the preferred core feature, the + * highest_pef may be configured with 166 or 255, to avoid max frequency + * calculated wrongly. we take the AMD_CPPC_HIGHEST_PERF(cap1) value as + * the default max perf. */ - highest_perf = amd_get_highest_perf(); - if (highest_perf > AMD_CPPC_HIGHEST_PERF(cap1)) + if (cpudata->hw_prefcore) + highest_perf = amd_pstate_highest_perf_set(cpudata); + else highest_perf = AMD_CPPC_HIGHEST_PERF(cap1); WRITE_ONCE(cpudata->highest_perf, highest_perf); @@ -324,8 +433,9 @@ if (ret) return ret; - highest_perf = amd_get_highest_perf(); - if (highest_perf > cppc_perf.highest_perf) + if (cpudata->hw_prefcore) + highest_perf = amd_pstate_highest_perf_set(cpudata); + else highest_perf = cppc_perf.highest_perf; WRITE_ONCE(cpudata->highest_perf, highest_perf); @@ -361,16 +471,6 @@ return static_call(amd_pstate_init_perf)(cpudata); } -static void pstate_update_perf(struct amd_cpudata *cpudata, u32 min_perf, - u32 des_perf, u32 max_perf, bool fast_switch) -{ - if (fast_switch) - wrmsrl(MSR_AMD_CPPC_REQ, READ_ONCE(cpudata->cppc_req_cached)); - else - wrmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, - READ_ONCE(cpudata->cppc_req_cached)); -} - static void cppc_update_perf(struct amd_cpudata *cpudata, u32 min_perf, u32 des_perf, u32 max_perf, bool fast_switch) @@ -384,16 +484,6 @@ cppc_set_perf(cpudata->cpu, &perf_ctrls); } -DEFINE_STATIC_CALL(amd_pstate_update_perf, pstate_update_perf); - -static inline void amd_pstate_update_perf(struct amd_cpudata *cpudata, - u32 min_perf, u32 des_perf, - u32 max_perf, bool fast_switch) -{ - static_call(amd_pstate_update_perf)(cpudata, min_perf, des_perf, - max_perf, fast_switch); -} - static inline bool amd_pstate_sample(struct amd_cpudata *cpudata) { u64 aperf, mperf, tsc; @@ -555,9 +645,14 @@ unsigned long max_perf, min_perf, des_perf, cap_perf, lowest_nonlinear_perf, max_freq; struct cpufreq_policy *policy = cpufreq_cpu_get(cpu); - struct amd_cpudata *cpudata = policy->driver_data; + struct amd_cpudata *cpudata; unsigned int target_freq; + if (!policy) + return; + + cpudata = policy->driver_data; + if (policy->min != cpudata->min_limit_freq || policy->max != cpudata->max_limit_freq) amd_pstate_update_min_max_limit(policy); @@ -570,7 +665,7 @@ if (target_perf < capacity) des_perf = DIV_ROUND_UP(cap_perf * target_perf, capacity); - min_perf = READ_ONCE(cpudata->highest_perf); + min_perf = READ_ONCE(cpudata->lowest_perf); if (_min_perf < capacity) min_perf = DIV_ROUND_UP(cap_perf * _min_perf, capacity); @@ -592,74 +687,22 @@ static int amd_get_min_freq(struct amd_cpudata *cpudata) { - struct cppc_perf_caps cppc_perf; - - int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); - if (ret) - return ret; - - /* Switch to khz */ - return cppc_perf.lowest_freq * 1000; + return READ_ONCE(cpudata->min_freq); } static int amd_get_max_freq(struct amd_cpudata *cpudata) { - struct cppc_perf_caps cppc_perf; - u32 max_perf, max_freq, nominal_freq, nominal_perf; - u64 boost_ratio; - - int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); - if (ret) - return ret; - - nominal_freq = cppc_perf.nominal_freq; - nominal_perf = READ_ONCE(cpudata->nominal_perf); - max_perf = READ_ONCE(cpudata->highest_perf); - - boost_ratio = div_u64(max_perf << SCHED_CAPACITY_SHIFT, - nominal_perf); - - max_freq = nominal_freq * boost_ratio >> SCHED_CAPACITY_SHIFT; - - /* Switch to khz */ - return max_freq * 1000; + return READ_ONCE(cpudata->max_freq); } static int amd_get_nominal_freq(struct amd_cpudata *cpudata) { - struct cppc_perf_caps cppc_perf; - - int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); - if (ret) - return ret; - - /* Switch to khz */ - return cppc_perf.nominal_freq * 1000; + return READ_ONCE(cpudata->nominal_freq); } static int amd_get_lowest_nonlinear_freq(struct amd_cpudata *cpudata) { - struct cppc_perf_caps cppc_perf; - u32 lowest_nonlinear_freq, lowest_nonlinear_perf, - nominal_freq, nominal_perf; - u64 lowest_nonlinear_ratio; - - int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); - if (ret) - return ret; - - nominal_freq = cppc_perf.nominal_freq; - nominal_perf = READ_ONCE(cpudata->nominal_perf); - - lowest_nonlinear_perf = cppc_perf.lowest_nonlinear_perf; - - lowest_nonlinear_ratio = div_u64(lowest_nonlinear_perf << SCHED_CAPACITY_SHIFT, - nominal_perf); - - lowest_nonlinear_freq = nominal_freq * lowest_nonlinear_ratio >> SCHED_CAPACITY_SHIFT; - - /* Switch to khz */ - return lowest_nonlinear_freq * 1000; + return READ_ONCE(cpudata->lowest_nonlinear_freq); } static int amd_pstate_set_boost(struct cpufreq_policy *policy, int state) @@ -675,7 +718,7 @@ if (state) policy->cpuinfo.max_freq = cpudata->max_freq; else - policy->cpuinfo.max_freq = cpudata->nominal_freq; + policy->cpuinfo.max_freq = cpudata->nominal_freq * 1000; policy->max = policy->cpuinfo.max_freq; @@ -706,6 +749,135 @@ wrmsrl_on_cpu(cpu, MSR_AMD_PERF_CTL, 0); } +/** + * amd_pstate_init_freq: Initialize the max_freq, min_freq, + * nominal_freq and lowest_nonlinear_freq for + * the @cpudata object. + * + * Requires: highest_perf, lowest_perf, nominal_perf and + * lowest_nonlinear_perf members of @cpudata to be + * initialized. + * + * Returns 0 on success, non-zero value on failure. + */ +static int amd_pstate_init_freq(struct amd_cpudata *cpudata) +{ + int ret; + u32 min_freq; + u32 highest_perf, max_freq; + u32 nominal_perf, nominal_freq; + u32 lowest_nonlinear_perf, lowest_nonlinear_freq; + u32 boost_ratio, lowest_nonlinear_ratio; + struct cppc_perf_caps cppc_perf; + + + ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); + if (ret) + return ret; + + if (quirks && quirks->lowest_freq) + min_freq = quirks->lowest_freq * 1000; + else + min_freq = cppc_perf.lowest_freq * 1000; + + if (quirks && quirks->nominal_freq) + nominal_freq = quirks->nominal_freq ; + else + nominal_freq = cppc_perf.nominal_freq; + + nominal_perf = READ_ONCE(cpudata->nominal_perf); + + highest_perf = READ_ONCE(cpudata->highest_perf); + boost_ratio = div_u64(highest_perf << SCHED_CAPACITY_SHIFT, nominal_perf); + max_freq = (nominal_freq * boost_ratio >> SCHED_CAPACITY_SHIFT) * 1000; + + lowest_nonlinear_perf = READ_ONCE(cpudata->lowest_nonlinear_perf); + lowest_nonlinear_ratio = div_u64(lowest_nonlinear_perf << SCHED_CAPACITY_SHIFT, + nominal_perf); + lowest_nonlinear_freq = (nominal_freq * lowest_nonlinear_ratio >> SCHED_CAPACITY_SHIFT) * 1000; + + WRITE_ONCE(cpudata->min_freq, min_freq); + WRITE_ONCE(cpudata->lowest_nonlinear_freq, lowest_nonlinear_freq); + WRITE_ONCE(cpudata->nominal_freq, nominal_freq); + WRITE_ONCE(cpudata->max_freq, max_freq); + + return 0; +} + +/* + * Set amd-pstate preferred core enable can't be done directly from cpufreq callbacks + * due to locking, so queue the work for later. + */ +static void amd_pstste_sched_prefcore_workfn(struct work_struct *work) +{ + sched_set_itmt_support(); +} +static DECLARE_WORK(sched_prefcore_work, amd_pstste_sched_prefcore_workfn); + +/* + * Get the highest performance register value. + * @cpu: CPU from which to get highest performance. + * @highest_perf: Return address. + * + * Return: 0 for success, -EIO otherwise. + */ +static int amd_pstate_get_highest_perf(int cpu, u32 *highest_perf) +{ + int ret; + + if (boot_cpu_has(X86_FEATURE_CPPC)) { + u64 cap1; + + ret = rdmsrl_safe_on_cpu(cpu, MSR_AMD_CPPC_CAP1, &cap1); + if (ret) + return ret; + WRITE_ONCE(*highest_perf, AMD_CPPC_HIGHEST_PERF(cap1)); + } else { + u64 cppc_highest_perf; + + ret = cppc_get_highest_perf(cpu, &cppc_highest_perf); + if (ret) + return ret; + WRITE_ONCE(*highest_perf, cppc_highest_perf); + } + + return (ret); +} + +#define CPPC_MAX_PERF U8_MAX + +static void amd_pstate_init_prefcore(struct amd_cpudata *cpudata) +{ + int ret, prio; + u32 highest_perf; + + ret = amd_pstate_get_highest_perf(cpudata->cpu, &highest_perf); + if (ret) + return; + + cpudata->hw_prefcore = true; + /* check if CPPC preferred core feature is enabled*/ + if (highest_perf < CPPC_MAX_PERF) + prio = (int)highest_perf; + else { + pr_debug("AMD CPPC preferred core is unsupported!\n"); + cpudata->hw_prefcore = false; + return; + } + + if (!amd_pstate_prefcore) + return; + + /* + * The priorities can be set regardless of whether or not + * sched_set_itmt_support(true) has been called and it is valid to + * update them at any time after it has been called. + */ + sched_set_itmt_core_prio(prio, cpudata->cpu); + + schedule_work(&sched_prefcore_work); +} + static int amd_pstate_cpu_init(struct cpufreq_policy *policy) { int min_freq, max_freq, nominal_freq, lowest_nonlinear_freq, ret; @@ -727,10 +899,16 @@ cpudata->cpu = policy->cpu; + amd_pstate_init_prefcore(cpudata); + ret = amd_pstate_init_perf(cpudata); if (ret) goto free_cpudata1; + ret = amd_pstate_init_freq(cpudata); + if (ret) + goto free_cpudata1; + min_freq = amd_get_min_freq(cpudata); max_freq = amd_get_max_freq(cpudata); nominal_freq = amd_get_nominal_freq(cpudata); @@ -772,13 +950,8 @@ goto free_cpudata2; } - /* Initial processor data capability frequencies */ - cpudata->max_freq = max_freq; - cpudata->min_freq = min_freq; cpudata->max_limit_freq = max_freq; cpudata->min_limit_freq = min_freq; - cpudata->nominal_freq = nominal_freq; - cpudata->lowest_nonlinear_freq = lowest_nonlinear_freq; policy->driver_data = cpudata; @@ -877,6 +1050,17 @@ return sysfs_emit(buf, "%u\n", perf); } +static ssize_t show_amd_pstate_hw_prefcore(struct cpufreq_policy *policy, + char *buf) +{ + bool hw_prefcore; + struct amd_cpudata *cpudata = policy->driver_data; + + hw_prefcore = READ_ONCE(cpudata->hw_prefcore); + + return sysfs_emit(buf, "%s\n", str_enabled_disabled(hw_prefcore)); +} + static ssize_t show_energy_performance_available_preferences( struct cpufreq_policy *policy, char *buf) { @@ -950,11 +1134,21 @@ return -EINVAL; cppc_state = mode; + + ret = amd_pstate_enable(true); + if (ret) { + pr_err("failed to enable cppc during amd-pstate driver registration, return %d\n", + ret); + amd_pstate_driver_cleanup(); + return ret; + } + ret = cpufreq_register_driver(current_pstate_driver); if (ret) { amd_pstate_driver_cleanup(); return ret; } + return 0; } @@ -1074,18 +1268,27 @@ return ret < 0 ? ret : count; } +static ssize_t prefcore_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + return sysfs_emit(buf, "%s\n", str_enabled_disabled(amd_pstate_prefcore)); +} + cpufreq_freq_attr_ro(amd_pstate_max_freq); cpufreq_freq_attr_ro(amd_pstate_lowest_nonlinear_freq); cpufreq_freq_attr_ro(amd_pstate_highest_perf); +cpufreq_freq_attr_ro(amd_pstate_hw_prefcore); cpufreq_freq_attr_rw(energy_performance_preference); cpufreq_freq_attr_ro(energy_performance_available_preferences); static DEVICE_ATTR_RW(status); +static DEVICE_ATTR_RO(prefcore); static struct freq_attr *amd_pstate_attr[] = { &amd_pstate_max_freq, &amd_pstate_lowest_nonlinear_freq, &amd_pstate_highest_perf, + &amd_pstate_hw_prefcore, NULL, }; @@ -1093,6 +1296,7 @@ &amd_pstate_max_freq, &amd_pstate_lowest_nonlinear_freq, &amd_pstate_highest_perf, + &amd_pstate_hw_prefcore, &energy_performance_preference, &energy_performance_available_preferences, NULL, @@ -1100,6 +1304,7 @@ static struct attribute *pstate_global_attributes[] = { &dev_attr_status.attr, + &dev_attr_prefcore.attr, NULL }; @@ -1151,10 +1356,16 @@ cpudata->cpu = policy->cpu; cpudata->epp_policy = 0; + amd_pstate_init_prefcore(cpudata); + ret = amd_pstate_init_perf(cpudata); if (ret) goto free_cpudata1; + ret = amd_pstate_init_freq(cpudata); + if (ret) + goto free_cpudata1; + min_freq = amd_get_min_freq(cpudata); max_freq = amd_get_max_freq(cpudata); nominal_freq = amd_get_nominal_freq(cpudata); @@ -1171,15 +1382,9 @@ /* It will be updated by governor */ policy->cur = policy->cpuinfo.min_freq; - /* Initial processor data capability frequencies */ - cpudata->max_freq = max_freq; - cpudata->min_freq = min_freq; - cpudata->nominal_freq = nominal_freq; - cpudata->lowest_nonlinear_freq = lowest_nonlinear_freq; - policy->driver_data = cpudata; - cpudata->epp_cached = amd_pstate_get_epp(cpudata, 0); + cpudata->epp_cached = cpudata->epp_default = amd_pstate_get_epp(cpudata, 0); policy->min = policy->cpuinfo.min_freq; policy->max = policy->cpuinfo.max_freq; @@ -1216,6 +1421,13 @@ static int amd_pstate_epp_cpu_exit(struct cpufreq_policy *policy) { + struct amd_cpudata *cpudata = policy->driver_data; + + if (cpudata) { + kfree(cpudata); + policy->driver_data = NULL; + } + pr_debug("CPU %d exiting\n", policy->cpu); return 0; } @@ -1242,7 +1454,7 @@ value = READ_ONCE(cpudata->cppc_req_cached); if (cpudata->policy == CPUFREQ_POLICY_PERFORMANCE) - min_perf = max_perf; + min_perf = min(cpudata->nominal_perf, max_perf); /* Initial min/max values for CPPC Performance Controls Register */ value &= ~AMD_CPPC_MIN_PERF(~0L); @@ -1486,8 +1698,18 @@ if (cpufreq_get_current_driver()) return -EEXIST; - switch (cppc_state) { - case AMD_PSTATE_UNDEFINED: + quirks = NULL; + + /* check if this machine need CPPC quirks */ + dmi_check_system(amd_pstate_quirks_table); + + /* + * determine the driver mode from the command line or kernel config. + * If no command line input is provided, cppc_state will be AMD_PSTATE_UNDEFINED. + * command line options will override the kernel config settings. + */ + + if (cppc_state == AMD_PSTATE_UNDEFINED) { /* Disable on the following configs by default: * 1. Undefined platforms * 2. Server platforms @@ -1499,15 +1721,20 @@ pr_info("driver load is disabled, boot with specific mode to enable this\n"); return -ENODEV; } - ret = amd_pstate_set_driver(CONFIG_X86_AMD_PSTATE_DEFAULT_MODE); - if (ret) - return ret; - break; + /* get driver mode from kernel config option [1:4] */ + cppc_state = CONFIG_X86_AMD_PSTATE_DEFAULT_MODE; + } + + switch (cppc_state) { case AMD_PSTATE_DISABLE: + pr_info("driver load is disabled, boot with specific mode to enable this\n"); return -ENODEV; case AMD_PSTATE_PASSIVE: case AMD_PSTATE_ACTIVE: case AMD_PSTATE_GUIDED: + ret = amd_pstate_set_driver(cppc_state); + if (ret) + return ret; break; default: return -EINVAL; @@ -1528,7 +1755,7 @@ /* enable amd pstate feature */ ret = amd_pstate_enable(true); if (ret) { - pr_err("failed to enable with return %d\n", ret); + pr_err("failed to enable driver mode(%d)\n", cppc_state); return ret; } @@ -1567,7 +1794,17 @@ return amd_pstate_set_driver(mode_idx); } + +static int __init amd_prefcore_param(char *str) +{ + if (!strcmp(str, "disable")) + amd_pstate_prefcore = false; + + return 0; +} + early_param("amd_pstate", amd_pstate_param); +early_param("amd_prefcore", amd_prefcore_param); MODULE_AUTHOR("Huang Rui "); MODULE_DESCRIPTION("AMD Processor P-state Frequency Driver"); --- linux-xilinx-6.8.0.orig/drivers/cpufreq/amd-pstate.h +++ linux-xilinx-6.8.0/drivers/cpufreq/amd-pstate.h @@ -0,0 +1,95 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2022 Advanced Micro Devices, Inc. + * + * Author: Meng Li + */ + +#ifndef _LINUX_AMD_PSTATE_H +#define _LINUX_AMD_PSTATE_H + +#include + +/********************************************************************* + * AMD P-state INTERFACE * + *********************************************************************/ +/** + * struct amd_aperf_mperf + * @aperf: actual performance frequency clock count + * @mperf: maximum performance frequency clock count + * @tsc: time stamp counter + */ +struct amd_aperf_mperf { + u64 aperf; + u64 mperf; + u64 tsc; +}; + +/** + * struct amd_cpudata - private CPU data for AMD P-State + * @cpu: CPU number + * @req: constraint request to apply + * @cppc_req_cached: cached performance request hints + * @highest_perf: the maximum performance an individual processor may reach, + * assuming ideal conditions + * @nominal_perf: the maximum sustained performance level of the processor, + * assuming ideal operating conditions + * @lowest_nonlinear_perf: the lowest performance level at which nonlinear power + * savings are achieved + * @lowest_perf: the absolute lowest performance level of the processor + * @max_freq: the frequency that mapped to highest_perf + * @min_freq: the frequency that mapped to lowest_perf + * @nominal_freq: the frequency that mapped to nominal_perf + * @lowest_nonlinear_freq: the frequency that mapped to lowest_nonlinear_perf + * @cur: Difference of Aperf/Mperf/tsc count between last and current sample + * @prev: Last Aperf/Mperf/tsc count value read from register + * @freq: current cpu frequency value + * @boost_supported: check whether the Processor or SBIOS supports boost mode + * @hw_prefcore: check whether HW supports preferred core featue. + * Only when hw_prefcore and early prefcore param are true, + * AMD P-State driver supports preferred core featue. + * @epp_policy: Last saved policy used to set energy-performance preference + * @epp_cached: Cached CPPC energy-performance preference value + * @policy: Cpufreq policy value + * @cppc_cap1_cached Cached MSR_AMD_CPPC_CAP1 register value + * + * The amd_cpudata is key private data for each CPU thread in AMD P-State, and + * represents all the attributes and goals that AMD P-State requests at runtime. + */ +struct amd_cpudata { + int cpu; + + struct freq_qos_request req[2]; + u64 cppc_req_cached; + + u32 highest_perf; + u32 nominal_perf; + u32 lowest_nonlinear_perf; + u32 lowest_perf; + u32 min_limit_perf; + u32 max_limit_perf; + u32 min_limit_freq; + u32 max_limit_freq; + + u32 max_freq; + u32 min_freq; + u32 nominal_freq; + u32 lowest_nonlinear_freq; + + struct amd_aperf_mperf cur; + struct amd_aperf_mperf prev; + + u64 freq; + bool boost_supported; + bool hw_prefcore; + + /* EPP feature related attributes*/ + s16 epp_policy; + s16 epp_cached; + u32 policy; + u64 cppc_cap1_cached; + bool suspended; + s16 epp_default; +}; + +#endif /* _LINUX_AMD_PSTATE_H */ --- linux-xilinx-6.8.0.orig/drivers/cpufreq/brcmstb-avs-cpufreq.c +++ linux-xilinx-6.8.0/drivers/cpufreq/brcmstb-avs-cpufreq.c @@ -481,7 +481,12 @@ static unsigned int brcm_avs_cpufreq_get(unsigned int cpu) { struct cpufreq_policy *policy = cpufreq_cpu_get(cpu); - struct private_data *priv = policy->driver_data; + struct private_data *priv; + + if (!policy) + return 0; + + priv = policy->driver_data; cpufreq_cpu_put(policy); --- linux-xilinx-6.8.0.orig/drivers/cpufreq/cppc_cpufreq.c +++ linux-xilinx-6.8.0/drivers/cpufreq/cppc_cpufreq.c @@ -118,6 +118,9 @@ perf = cppc_perf_from_fbctrs(cpu_data, &cppc_fi->prev_perf_fb_ctrs, &fb_ctrs); + if (!perf) + return; + cppc_fi->prev_perf_fb_ctrs = fb_ctrs; perf <<= SCHED_CAPACITY_SHIFT; @@ -425,6 +428,9 @@ struct cppc_cpudata *cpu_data; policy = cpufreq_cpu_get_raw(cpu_dev->id); + if (!policy) + return -EINVAL; + cpu_data = policy->driver_data; perf_caps = &cpu_data->perf_caps; max_cap = arch_scale_cpu_capacity(cpu_dev->id); @@ -492,6 +498,9 @@ int step; policy = cpufreq_cpu_get_raw(cpu_dev->id); + if (!policy) + return -EINVAL; + cpu_data = policy->driver_data; perf_caps = &cpu_data->perf_caps; max_cap = arch_scale_cpu_capacity(cpu_dev->id); @@ -730,35 +739,72 @@ delta_delivered = get_delta(fb_ctrs_t1->delivered, fb_ctrs_t0->delivered); - /* Check to avoid divide-by zero and invalid delivered_perf */ + /* + * Avoid divide-by zero and unchanged feedback counters. + * Leave it for callers to handle. + */ if (!delta_reference || !delta_delivered) - return cpu_data->perf_ctrls.desired_perf; + return 0; return (reference_perf * delta_delivered) / delta_reference; } +static int cppc_get_perf_ctrs_sample(int cpu, + struct cppc_perf_fb_ctrs *fb_ctrs_t0, + struct cppc_perf_fb_ctrs *fb_ctrs_t1) +{ + int ret; + + ret = cppc_get_perf_ctrs(cpu, fb_ctrs_t0); + if (ret) + return ret; + + udelay(2); /* 2usec delay between sampling */ + + return cppc_get_perf_ctrs(cpu, fb_ctrs_t1); +} + static unsigned int cppc_cpufreq_get_rate(unsigned int cpu) { struct cppc_perf_fb_ctrs fb_ctrs_t0 = {0}, fb_ctrs_t1 = {0}; struct cpufreq_policy *policy = cpufreq_cpu_get(cpu); - struct cppc_cpudata *cpu_data = policy->driver_data; + struct cppc_cpudata *cpu_data; u64 delivered_perf; int ret; - cpufreq_cpu_put(policy); + if (!policy) + return -ENODEV; - ret = cppc_get_perf_ctrs(cpu, &fb_ctrs_t0); - if (ret) - return 0; + cpu_data = policy->driver_data; - udelay(2); /* 2usec delay between sampling */ + cpufreq_cpu_put(policy); - ret = cppc_get_perf_ctrs(cpu, &fb_ctrs_t1); - if (ret) - return 0; + ret = cppc_get_perf_ctrs_sample(cpu, &fb_ctrs_t0, &fb_ctrs_t1); + if (ret) { + if (ret == -EFAULT) + /* Any of the associated CPPC regs is 0. */ + goto out_invalid_counters; + else + return 0; + } delivered_perf = cppc_perf_from_fbctrs(cpu_data, &fb_ctrs_t0, &fb_ctrs_t1); + if (!delivered_perf) + goto out_invalid_counters; + + return cppc_perf_to_khz(&cpu_data->perf_caps, delivered_perf); + +out_invalid_counters: + /* + * Feedback counters could be unchanged or 0 when a cpu enters a + * low-power idle state, e.g. clock-gated or power-gated. + * Use desired perf for reflecting frequency. Get the latest register + * value first as some platforms may update the actual delivered perf + * there; if failed, resort to the cached desired perf. + */ + if (cppc_get_desired_perf(cpu, &delivered_perf)) + delivered_perf = cpu_data->perf_ctrls.desired_perf; return cppc_perf_to_khz(&cpu_data->perf_caps, delivered_perf); } @@ -822,10 +868,15 @@ static unsigned int hisi_cppc_cpufreq_get_rate(unsigned int cpu) { struct cpufreq_policy *policy = cpufreq_cpu_get(cpu); - struct cppc_cpudata *cpu_data = policy->driver_data; + struct cppc_cpudata *cpu_data; u64 desired_perf; int ret; + if (!policy) + return -ENODEV; + + cpu_data = policy->driver_data; + cpufreq_cpu_put(policy); ret = cppc_get_desired_perf(cpu, &desired_perf); --- linux-xilinx-6.8.0.orig/drivers/cpufreq/cpufreq-dt-platdev.c +++ linux-xilinx-6.8.0/drivers/cpufreq/cpufreq-dt-platdev.c @@ -232,4 +232,3 @@ sizeof(struct cpufreq_dt_platform_data))); } core_initcall(cpufreq_dt_platdev_init); -MODULE_LICENSE("GPL"); --- linux-xilinx-6.8.0.orig/drivers/cpufreq/cpufreq-dt.c +++ linux-xilinx-6.8.0/drivers/cpufreq/cpufreq-dt.c @@ -208,7 +208,7 @@ if (!priv) return -ENOMEM; - if (!alloc_cpumask_var(&priv->cpus, GFP_KERNEL)) + if (!zalloc_cpumask_var(&priv->cpus, GFP_KERNEL)) return -ENOMEM; cpumask_set_cpu(cpu, priv->cpus); --- linux-xilinx-6.8.0.orig/drivers/cpufreq/cpufreq.c +++ linux-xilinx-6.8.0/drivers/cpufreq/cpufreq.c @@ -644,14 +644,16 @@ if (policy->boost_enabled == enable) return count; + policy->boost_enabled = enable; + cpus_read_lock(); ret = cpufreq_driver->set_boost(policy, enable); cpus_read_unlock(); - if (ret) + if (ret) { + policy->boost_enabled = !policy->boost_enabled; return ret; - - policy->boost_enabled = enable; + } return count; } @@ -1419,6 +1421,10 @@ goto out_free_policy; } + /* Let the per-policy boost flag mirror the cpufreq_driver boost during init */ + if (cpufreq_boost_enabled() && policy_has_boost_freq(policy)) + policy->boost_enabled = true; + /* * The initialization has succeeded and the policy is online. * If there is a problem with its frequency table, take it @@ -1571,7 +1577,8 @@ if (cpufreq_driver->ready) cpufreq_driver->ready(policy); - if (cpufreq_thermal_control_enabled(cpufreq_driver)) + /* Register cpufreq cooling only for a new policy */ + if (new_policy && cpufreq_thermal_control_enabled(cpufreq_driver)) policy->cdev = of_cpufreq_cooling_register(policy); pr_debug("initialization complete\n"); @@ -1655,11 +1662,6 @@ else policy->last_policy = policy->policy; - if (cpufreq_thermal_control_enabled(cpufreq_driver)) { - cpufreq_cooling_unregister(policy->cdev); - policy->cdev = NULL; - } - if (has_target()) cpufreq_exit_governor(policy); @@ -1669,10 +1671,13 @@ */ if (cpufreq_driver->offline) { cpufreq_driver->offline(policy); - } else if (cpufreq_driver->exit) { - cpufreq_driver->exit(policy); - policy->freq_table = NULL; + return; } + + if (cpufreq_driver->exit) + cpufreq_driver->exit(policy); + + policy->freq_table = NULL; } static int cpufreq_offline(unsigned int cpu) @@ -1720,8 +1725,17 @@ return; } + /* + * Unregister cpufreq cooling once all the CPUs of the policy are + * removed. + */ + if (cpufreq_thermal_control_enabled(cpufreq_driver)) { + cpufreq_cooling_unregister(policy->cdev); + policy->cdev = NULL; + } + /* We did light-weight exit earlier, do full tear down now */ - if (cpufreq_driver->offline) + if (cpufreq_driver->offline && cpufreq_driver->exit) cpufreq_driver->exit(policy); up_write(&policy->rwsem); @@ -2755,11 +2769,12 @@ cpus_read_lock(); for_each_active_policy(policy) { + policy->boost_enabled = state; ret = cpufreq_driver->set_boost(policy, state); - if (ret) + if (ret) { + policy->boost_enabled = !policy->boost_enabled; goto err_reset_state; - - policy->boost_enabled = state; + } } cpus_read_unlock(); @@ -2841,6 +2856,20 @@ return 0; } +static char cpufreq_driver_name[CPUFREQ_NAME_LEN]; + +static int __init cpufreq_driver_setup(char *str) +{ + strscpy(cpufreq_driver_name, str, CPUFREQ_NAME_LEN); + return 1; +} + +/* + * Set this name to only allow one specific cpu freq driver, e.g., + * cpufreq_driver=powernow-k8 + */ +__setup("cpufreq_driver=", cpufreq_driver_setup); + /** * cpufreq_register_driver - register a CPU Frequency driver * @driver_data: A struct cpufreq_driver containing the values# @@ -2876,7 +2905,13 @@ (driver_data->adjust_perf && !driver_data->fast_switch)) return -EINVAL; - pr_debug("trying to register driver %s\n", driver_data->name); + pr_debug("trying to register driver %s, cpufreq_driver=%s\n", + driver_data->name, cpufreq_driver_name); + + if (cpufreq_driver_name[0]) + if (!driver_data->name || + strcmp(cpufreq_driver_name, driver_data->name)) + return -EINVAL; /* Protect against concurrent CPU online/offline. */ cpus_read_lock(); --- linux-xilinx-6.8.0.orig/drivers/cpufreq/freq_table.c +++ linux-xilinx-6.8.0/drivers/cpufreq/freq_table.c @@ -40,7 +40,7 @@ cpufreq_for_each_valid_entry(pos, table) { freq = pos->frequency; - if (!cpufreq_boost_enabled() + if ((!cpufreq_boost_enabled() || !policy->boost_enabled) && (pos->flags & CPUFREQ_BOOST_FREQ)) continue; --- linux-xilinx-6.8.0.orig/drivers/cpufreq/intel_pstate.c +++ linux-xilinx-6.8.0/drivers/cpufreq/intel_pstate.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include @@ -359,15 +360,14 @@ int ret; ret = cppc_get_perf_caps(cpu, &cppc_perf); - if (ret) - return; - /* - * On some systems with overclocking enabled, CPPC.highest_perf is hardcoded to 0xff. - * In this case we can't use CPPC.highest_perf to enable ITMT. - * In this case we can look at MSR_HWP_CAPABILITIES bits [8:0] to decide. + * If CPPC is not available, fall back to MSR_HWP_CAPABILITIES bits [8:0]. + * + * Also, on some systems with overclocking enabled, CPPC.highest_perf is + * hardcoded to 0xff, so CPPC.highest_perf cannot be used to enable ITMT. + * Fall back to MSR_HWP_CAPABILITIES then too. */ - if (cppc_perf.highest_perf == CPPC_MAX_PERF) + if (ret || cppc_perf.highest_perf == CPPC_MAX_PERF) cppc_perf.highest_perf = HWP_HIGHEST_PERF(READ_ONCE(all_cpu_data[cpu]->hwp_cap_cached)); /* @@ -1632,24 +1632,31 @@ wrmsrl_on_cpu(cpudata->cpu, MSR_HWP_STATUS, 0); } -static DEFINE_SPINLOCK(hwp_notify_lock); +static DEFINE_RAW_SPINLOCK(hwp_notify_lock); static cpumask_t hwp_intr_enable_mask; +#define HWP_GUARANTEED_PERF_CHANGE_STATUS BIT(0) +#define HWP_HIGHEST_PERF_CHANGE_STATUS BIT(3) + void notify_hwp_interrupt(void) { unsigned int this_cpu = smp_processor_id(); struct cpudata *cpudata; + u64 value, status_mask; unsigned long flags; - u64 value; if (!READ_ONCE(hwp_active) || !boot_cpu_has(X86_FEATURE_HWP_NOTIFY)) return; + status_mask = HWP_GUARANTEED_PERF_CHANGE_STATUS; + if (cpu_feature_enabled(X86_FEATURE_HWP_HIGHEST_PERF_CHANGE)) + status_mask |= HWP_HIGHEST_PERF_CHANGE_STATUS; + rdmsrl_safe(MSR_HWP_STATUS, &value); - if (!(value & 0x01)) + if (!(value & status_mask)) return; - spin_lock_irqsave(&hwp_notify_lock, flags); + raw_spin_lock_irqsave(&hwp_notify_lock, flags); if (!cpumask_test_cpu(this_cpu, &hwp_intr_enable_mask)) goto ack_intr; @@ -1673,13 +1680,13 @@ schedule_delayed_work(&cpudata->hwp_notify_work, msecs_to_jiffies(10)); - spin_unlock_irqrestore(&hwp_notify_lock, flags); + raw_spin_unlock_irqrestore(&hwp_notify_lock, flags); return; ack_intr: wrmsrl_safe(MSR_HWP_STATUS, 0); - spin_unlock_irqrestore(&hwp_notify_lock, flags); + raw_spin_unlock_irqrestore(&hwp_notify_lock, flags); } static void intel_pstate_disable_hwp_interrupt(struct cpudata *cpudata) @@ -1692,25 +1699,33 @@ /* wrmsrl_on_cpu has to be outside spinlock as this can result in IPC */ wrmsrl_on_cpu(cpudata->cpu, MSR_HWP_INTERRUPT, 0x00); - spin_lock_irqsave(&hwp_notify_lock, flags); + raw_spin_lock_irqsave(&hwp_notify_lock, flags); if (cpumask_test_and_clear_cpu(cpudata->cpu, &hwp_intr_enable_mask)) cancel_delayed_work(&cpudata->hwp_notify_work); - spin_unlock_irqrestore(&hwp_notify_lock, flags); + raw_spin_unlock_irqrestore(&hwp_notify_lock, flags); } +#define HWP_GUARANTEED_PERF_CHANGE_REQ BIT(0) +#define HWP_HIGHEST_PERF_CHANGE_REQ BIT(2) + static void intel_pstate_enable_hwp_interrupt(struct cpudata *cpudata) { - /* Enable HWP notification interrupt for guaranteed performance change */ + /* Enable HWP notification interrupt for performance change */ if (boot_cpu_has(X86_FEATURE_HWP_NOTIFY)) { + u64 interrupt_mask = HWP_GUARANTEED_PERF_CHANGE_REQ; + unsigned long flags; - spin_lock_irqsave(&hwp_notify_lock, flags); + raw_spin_lock_irqsave(&hwp_notify_lock, flags); INIT_DELAYED_WORK(&cpudata->hwp_notify_work, intel_pstate_notify_work); cpumask_set_cpu(cpudata->cpu, &hwp_intr_enable_mask); - spin_unlock_irqrestore(&hwp_notify_lock, flags); + raw_spin_unlock_irqrestore(&hwp_notify_lock, flags); + + if (cpu_feature_enabled(X86_FEATURE_HWP_HIGHEST_PERF_CHANGE)) + interrupt_mask |= HWP_HIGHEST_PERF_CHANGE_REQ; /* wrmsrl_on_cpu has to be outside spinlock as this can result in IPC */ - wrmsrl_on_cpu(cpudata->cpu, MSR_HWP_INTERRUPT, 0x01); + wrmsrl_on_cpu(cpudata->cpu, MSR_HWP_INTERRUPT, interrupt_mask); wrmsrl_on_cpu(cpudata->cpu, MSR_HWP_STATUS, 0); } } @@ -2404,52 +2419,56 @@ .get_val = core_get_val, }; -#define X86_MATCH(model, policy) \ - X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, INTEL_FAM6_##model, \ - X86_FEATURE_APERFMPERF, &policy) +#define X86_MATCH(vfm, policy) \ + X86_MATCH_VFM_FEATURE(vfm, X86_FEATURE_APERFMPERF, &policy) static const struct x86_cpu_id intel_pstate_cpu_ids[] = { - X86_MATCH(SANDYBRIDGE, core_funcs), - X86_MATCH(SANDYBRIDGE_X, core_funcs), - X86_MATCH(ATOM_SILVERMONT, silvermont_funcs), - X86_MATCH(IVYBRIDGE, core_funcs), - X86_MATCH(HASWELL, core_funcs), - X86_MATCH(BROADWELL, core_funcs), - X86_MATCH(IVYBRIDGE_X, core_funcs), - X86_MATCH(HASWELL_X, core_funcs), - X86_MATCH(HASWELL_L, core_funcs), - X86_MATCH(HASWELL_G, core_funcs), - X86_MATCH(BROADWELL_G, core_funcs), - X86_MATCH(ATOM_AIRMONT, airmont_funcs), - X86_MATCH(SKYLAKE_L, core_funcs), - X86_MATCH(BROADWELL_X, core_funcs), - X86_MATCH(SKYLAKE, core_funcs), - X86_MATCH(BROADWELL_D, core_funcs), - X86_MATCH(XEON_PHI_KNL, knl_funcs), - X86_MATCH(XEON_PHI_KNM, knl_funcs), - X86_MATCH(ATOM_GOLDMONT, core_funcs), - X86_MATCH(ATOM_GOLDMONT_PLUS, core_funcs), - X86_MATCH(SKYLAKE_X, core_funcs), - X86_MATCH(COMETLAKE, core_funcs), - X86_MATCH(ICELAKE_X, core_funcs), - X86_MATCH(TIGERLAKE, core_funcs), - X86_MATCH(SAPPHIRERAPIDS_X, core_funcs), - X86_MATCH(EMERALDRAPIDS_X, core_funcs), + X86_MATCH(INTEL_SANDYBRIDGE, core_funcs), + X86_MATCH(INTEL_SANDYBRIDGE_X, core_funcs), + X86_MATCH(INTEL_ATOM_SILVERMONT, silvermont_funcs), + X86_MATCH(INTEL_IVYBRIDGE, core_funcs), + X86_MATCH(INTEL_HASWELL, core_funcs), + X86_MATCH(INTEL_BROADWELL, core_funcs), + X86_MATCH(INTEL_IVYBRIDGE_X, core_funcs), + X86_MATCH(INTEL_HASWELL_X, core_funcs), + X86_MATCH(INTEL_HASWELL_L, core_funcs), + X86_MATCH(INTEL_HASWELL_G, core_funcs), + X86_MATCH(INTEL_BROADWELL_G, core_funcs), + X86_MATCH(INTEL_ATOM_AIRMONT, airmont_funcs), + X86_MATCH(INTEL_SKYLAKE_L, core_funcs), + X86_MATCH(INTEL_BROADWELL_X, core_funcs), + X86_MATCH(INTEL_SKYLAKE, core_funcs), + X86_MATCH(INTEL_BROADWELL_D, core_funcs), + X86_MATCH(INTEL_XEON_PHI_KNL, knl_funcs), + X86_MATCH(INTEL_XEON_PHI_KNM, knl_funcs), + X86_MATCH(INTEL_ATOM_GOLDMONT, core_funcs), + X86_MATCH(INTEL_ATOM_GOLDMONT_PLUS, core_funcs), + X86_MATCH(INTEL_SKYLAKE_X, core_funcs), + X86_MATCH(INTEL_COMETLAKE, core_funcs), + X86_MATCH(INTEL_ICELAKE_X, core_funcs), + X86_MATCH(INTEL_TIGERLAKE, core_funcs), + X86_MATCH(INTEL_SAPPHIRERAPIDS_X, core_funcs), + X86_MATCH(INTEL_EMERALDRAPIDS_X, core_funcs), {} }; MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids); static const struct x86_cpu_id intel_pstate_cpu_oob_ids[] __initconst = { - X86_MATCH(BROADWELL_D, core_funcs), - X86_MATCH(BROADWELL_X, core_funcs), - X86_MATCH(SKYLAKE_X, core_funcs), - X86_MATCH(ICELAKE_X, core_funcs), - X86_MATCH(SAPPHIRERAPIDS_X, core_funcs), + X86_MATCH(INTEL_BROADWELL_D, core_funcs), + X86_MATCH(INTEL_BROADWELL_X, core_funcs), + X86_MATCH(INTEL_SKYLAKE_X, core_funcs), + X86_MATCH(INTEL_ICELAKE_X, core_funcs), + X86_MATCH(INTEL_SAPPHIRERAPIDS_X, core_funcs), + X86_MATCH(INTEL_EMERALDRAPIDS_X, core_funcs), + X86_MATCH(INTEL_GRANITERAPIDS_D, core_funcs), + X86_MATCH(INTEL_GRANITERAPIDS_X, core_funcs), + X86_MATCH(INTEL_ATOM_CRESTMONT, core_funcs), + X86_MATCH(INTEL_ATOM_CRESTMONT_X, core_funcs), {} }; static const struct x86_cpu_id intel_pstate_cpu_ee_disable_ids[] = { - X86_MATCH(KABYLAKE, core_funcs), + X86_MATCH(INTEL_KABYLAKE, core_funcs), {} }; @@ -3137,10 +3156,10 @@ if (intel_pstate_driver == &intel_pstate) intel_pstate_clear_update_util_hook(cpu); - spin_lock(&hwp_notify_lock); + raw_spin_lock(&hwp_notify_lock); kfree(all_cpu_data[cpu]); WRITE_ONCE(all_cpu_data[cpu], NULL); - spin_unlock(&hwp_notify_lock); + raw_spin_unlock(&hwp_notify_lock); } } cpus_read_unlock(); @@ -3388,14 +3407,13 @@ #define INTEL_PSTATE_HWP_BROADWELL 0x01 -#define X86_MATCH_HWP(model, hwp_mode) \ - X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, INTEL_FAM6_##model, \ - X86_FEATURE_HWP, hwp_mode) +#define X86_MATCH_HWP(vfm, hwp_mode) \ + X86_MATCH_VFM_FEATURE(vfm, X86_FEATURE_HWP, hwp_mode) static const struct x86_cpu_id hwp_support_ids[] __initconst = { - X86_MATCH_HWP(BROADWELL_X, INTEL_PSTATE_HWP_BROADWELL), - X86_MATCH_HWP(BROADWELL_D, INTEL_PSTATE_HWP_BROADWELL), - X86_MATCH_HWP(ANY, 0), + X86_MATCH_HWP(INTEL_BROADWELL_X, INTEL_PSTATE_HWP_BROADWELL), + X86_MATCH_HWP(INTEL_BROADWELL_D, INTEL_PSTATE_HWP_BROADWELL), + X86_MATCH_HWP(INTEL_ANY, 0), {} }; @@ -3407,19 +3425,41 @@ return !!(value & 0x1); } -static const struct x86_cpu_id intel_epp_balance_perf[] = { +#define POWERSAVE_MASK GENMASK(7, 0) +#define BALANCE_POWER_MASK GENMASK(15, 8) +#define BALANCE_PERFORMANCE_MASK GENMASK(23, 16) +#define PERFORMANCE_MASK GENMASK(31, 24) + +#define HWP_SET_EPP_VALUES(powersave, balance_power, balance_perf, performance) \ + (FIELD_PREP_CONST(POWERSAVE_MASK, powersave) |\ + FIELD_PREP_CONST(BALANCE_POWER_MASK, balance_power) |\ + FIELD_PREP_CONST(BALANCE_PERFORMANCE_MASK, balance_perf) |\ + FIELD_PREP_CONST(PERFORMANCE_MASK, performance)) + +#define HWP_SET_DEF_BALANCE_PERF_EPP(balance_perf) \ + (HWP_SET_EPP_VALUES(HWP_EPP_POWERSAVE, HWP_EPP_BALANCE_POWERSAVE,\ + balance_perf, HWP_EPP_PERFORMANCE)) + +static const struct x86_cpu_id intel_epp_default[] = { /* * Set EPP value as 102, this is the max suggested EPP * which can result in one core turbo frequency for * AlderLake Mobile CPUs. */ - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, 102), - X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, 32), + X86_MATCH_VFM(INTEL_ALDERLAKE_L, HWP_SET_DEF_BALANCE_PERF_EPP(102)), + X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, HWP_SET_DEF_BALANCE_PERF_EPP(32)), + X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X, HWP_SET_DEF_BALANCE_PERF_EPP(32)), + X86_MATCH_VFM(INTEL_GRANITERAPIDS_X, HWP_SET_DEF_BALANCE_PERF_EPP(32)), + X86_MATCH_VFM(INTEL_GRANITERAPIDS_D, HWP_SET_DEF_BALANCE_PERF_EPP(32)), + X86_MATCH_VFM(INTEL_METEORLAKE_L, HWP_SET_EPP_VALUES(HWP_EPP_POWERSAVE, + 179, 64, 16)), + X86_MATCH_VFM(INTEL_ARROWLAKE, HWP_SET_EPP_VALUES(HWP_EPP_POWERSAVE, + 179, 64, 16)), {} }; static const struct x86_cpu_id intel_hybrid_scaling_factor[] = { - X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, HYBRID_SCALING_FACTOR_MTL), + X86_MATCH_VFM(INTEL_METEORLAKE_L, HYBRID_SCALING_FACTOR_MTL), {} }; @@ -3512,11 +3552,24 @@ intel_pstate_sysfs_expose_params(); if (hwp_active) { - const struct x86_cpu_id *id = x86_match_cpu(intel_epp_balance_perf); + const struct x86_cpu_id *id = x86_match_cpu(intel_epp_default); const struct x86_cpu_id *hybrid_id = x86_match_cpu(intel_hybrid_scaling_factor); - if (id) - epp_values[EPP_INDEX_BALANCE_PERFORMANCE] = id->driver_data; + if (id) { + epp_values[EPP_INDEX_POWERSAVE] = + FIELD_GET(POWERSAVE_MASK, id->driver_data); + epp_values[EPP_INDEX_BALANCE_POWERSAVE] = + FIELD_GET(BALANCE_POWER_MASK, id->driver_data); + epp_values[EPP_INDEX_BALANCE_PERFORMANCE] = + FIELD_GET(BALANCE_PERFORMANCE_MASK, id->driver_data); + epp_values[EPP_INDEX_PERFORMANCE] = + FIELD_GET(PERFORMANCE_MASK, id->driver_data); + pr_debug("Updated EPPs powersave:%x balanced power:%x balanced perf:%x performance:%x\n", + epp_values[EPP_INDEX_POWERSAVE], + epp_values[EPP_INDEX_BALANCE_POWERSAVE], + epp_values[EPP_INDEX_BALANCE_PERFORMANCE], + epp_values[EPP_INDEX_PERFORMANCE]); + } if (hybrid_id) { hybrid_scaling_factor = hybrid_id->driver_data; --- linux-xilinx-6.8.0.orig/drivers/cpufreq/loongson2_cpufreq.c +++ linux-xilinx-6.8.0/drivers/cpufreq/loongson2_cpufreq.c @@ -154,7 +154,9 @@ ret = cpufreq_register_driver(&loongson2_cpufreq_driver); - if (!ret && !nowait) { + if (ret) { + platform_driver_unregister(&platform_driver); + } else if (!nowait) { saved_cpu_wait = cpu_wait; cpu_wait = loongson2_cpu_wait; } --- linux-xilinx-6.8.0.orig/drivers/cpufreq/mediatek-cpufreq-hw.c +++ linux-xilinx-6.8.0/drivers/cpufreq/mediatek-cpufreq-hw.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #define LUT_MAX_ENTRIES 32U @@ -61,7 +62,7 @@ policy = cpufreq_cpu_get_raw(cpu_dev->id); if (!policy) - return 0; + return -EINVAL; data = policy->driver_data; @@ -300,7 +301,23 @@ static int mtk_cpufreq_hw_driver_probe(struct platform_device *pdev) { const void *data; - int ret; + int ret, cpu; + struct device *cpu_dev; + struct regulator *cpu_reg; + + /* Make sure that all CPU supplies are available before proceeding. */ + for_each_possible_cpu(cpu) { + cpu_dev = get_cpu_device(cpu); + if (!cpu_dev) + return dev_err_probe(&pdev->dev, -EPROBE_DEFER, + "Failed to get cpu%d device\n", cpu); + + cpu_reg = devm_regulator_get(cpu_dev, "cpu"); + if (IS_ERR(cpu_reg)) + return dev_err_probe(&pdev->dev, PTR_ERR(cpu_reg), + "CPU%d regulator get failed\n", cpu); + } + data = of_device_get_match_data(&pdev->dev); if (!data) --- linux-xilinx-6.8.0.orig/drivers/cpufreq/qcom-cpufreq-hw.c +++ linux-xilinx-6.8.0/drivers/cpufreq/qcom-cpufreq-hw.c @@ -142,14 +142,12 @@ } /* Get the frequency requested by the cpufreq core for the CPU */ -static unsigned int qcom_cpufreq_get_freq(unsigned int cpu) +static unsigned int qcom_cpufreq_get_freq(struct cpufreq_policy *policy) { struct qcom_cpufreq_data *data; const struct qcom_cpufreq_soc_data *soc_data; - struct cpufreq_policy *policy; unsigned int index; - policy = cpufreq_cpu_get_raw(cpu); if (!policy) return 0; @@ -162,12 +160,10 @@ return policy->freq_table[index].frequency; } -static unsigned int qcom_cpufreq_hw_get(unsigned int cpu) +static unsigned int __qcom_cpufreq_hw_get(struct cpufreq_policy *policy) { struct qcom_cpufreq_data *data; - struct cpufreq_policy *policy; - policy = cpufreq_cpu_get_raw(cpu); if (!policy) return 0; @@ -176,7 +172,12 @@ if (data->throttle_irq >= 0) return qcom_lmh_get_throttle_freq(data) / HZ_PER_KHZ; - return qcom_cpufreq_get_freq(cpu); + return qcom_cpufreq_get_freq(policy); +} + +static unsigned int qcom_cpufreq_hw_get(unsigned int cpu) +{ + return __qcom_cpufreq_hw_get(cpufreq_cpu_get_raw(cpu)); } static unsigned int qcom_cpufreq_hw_fast_switch(struct cpufreq_policy *policy, @@ -362,7 +363,7 @@ * If h/w throttled frequency is higher than what cpufreq has requested * for, then stop polling and switch back to interrupt mechanism. */ - if (throttled_freq >= qcom_cpufreq_get_freq(cpu)) + if (throttled_freq >= qcom_cpufreq_get_freq(cpufreq_cpu_get_raw(cpu))) enable_irq(data->throttle_irq); else mod_delayed_work(system_highpri_wq, &data->throttle_work, @@ -440,7 +441,6 @@ return data->throttle_irq; data->cancel_throttle = false; - data->policy = policy; mutex_init(&data->throttle_lock); INIT_DEFERRABLE_WORK(&data->throttle_work, qcom_lmh_dcvs_poll); @@ -551,6 +551,7 @@ policy->driver_data = data; policy->dvfs_possible_from_any_cpu = true; + data->policy = policy; ret = qcom_cpufreq_hw_read_lut(cpu_dev, policy); if (ret) { @@ -623,11 +624,24 @@ { struct qcom_cpufreq_data *data = container_of(hw, struct qcom_cpufreq_data, cpu_clk); - return qcom_lmh_get_throttle_freq(data); + return __qcom_cpufreq_hw_get(data->policy) * HZ_PER_KHZ; +} + +/* + * Since we cannot determine the closest rate of the target rate, let's just + * return the actual rate at which the clock is running at. This is needed to + * make clk_set_rate() API work properly. + */ +static int qcom_cpufreq_hw_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) +{ + req->rate = qcom_cpufreq_hw_recalc_rate(hw, 0); + + return 0; } static const struct clk_ops qcom_cpufreq_hw_clk_ops = { .recalc_rate = qcom_cpufreq_hw_recalc_rate, + .determine_rate = qcom_cpufreq_hw_determine_rate, }; static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev) --- linux-xilinx-6.8.0.orig/drivers/cpufreq/qcom-cpufreq-nvmem.c +++ linux-xilinx-6.8.0/drivers/cpufreq/qcom-cpufreq-nvmem.c @@ -480,23 +480,30 @@ drv = devm_kzalloc(&pdev->dev, struct_size(drv, cpus, num_possible_cpus()), GFP_KERNEL); - if (!drv) + if (!drv) { + of_node_put(np); return -ENOMEM; + } match = pdev->dev.platform_data; drv->data = match->data; - if (!drv->data) + if (!drv->data) { + of_node_put(np); return -ENODEV; + } if (drv->data->get_version) { speedbin_nvmem = of_nvmem_cell_get(np, NULL); - if (IS_ERR(speedbin_nvmem)) + if (IS_ERR(speedbin_nvmem)) { + of_node_put(np); return dev_err_probe(cpu_dev, PTR_ERR(speedbin_nvmem), "Could not get nvmem cell\n"); + } ret = drv->data->get_version(cpu_dev, speedbin_nvmem, &pvs_name, drv); if (ret) { + of_node_put(np); nvmem_cell_put(speedbin_nvmem); return ret; } --- linux-xilinx-6.8.0.orig/drivers/cpufreq/s3c64xx-cpufreq.c +++ linux-xilinx-6.8.0/drivers/cpufreq/s3c64xx-cpufreq.c @@ -24,6 +24,7 @@ unsigned int vddarm_max; }; +#ifdef CONFIG_REGULATOR static struct s3c64xx_dvfs s3c64xx_dvfs_table[] = { [0] = { 1000000, 1150000 }, [1] = { 1050000, 1150000 }, @@ -31,6 +32,7 @@ [3] = { 1200000, 1350000 }, [4] = { 1300000, 1350000 }, }; +#endif static struct cpufreq_frequency_table s3c64xx_freq_table[] = { { 0, 0, 66000 }, @@ -51,15 +53,16 @@ static int s3c64xx_cpufreq_set_target(struct cpufreq_policy *policy, unsigned int index) { - struct s3c64xx_dvfs *dvfs; - unsigned int old_freq, new_freq; + unsigned int new_freq = s3c64xx_freq_table[index].frequency; int ret; +#ifdef CONFIG_REGULATOR + struct s3c64xx_dvfs *dvfs; + unsigned int old_freq; + old_freq = clk_get_rate(policy->clk) / 1000; - new_freq = s3c64xx_freq_table[index].frequency; dvfs = &s3c64xx_dvfs_table[s3c64xx_freq_table[index].driver_data]; -#ifdef CONFIG_REGULATOR if (vddarm && new_freq > old_freq) { ret = regulator_set_voltage(vddarm, dvfs->vddarm_min, --- linux-xilinx-6.8.0.orig/drivers/cpufreq/scmi-cpufreq.c +++ linux-xilinx-6.8.0/drivers/cpufreq/scmi-cpufreq.c @@ -62,9 +62,9 @@ unsigned int target_freq) { struct scmi_data *priv = policy->driver_data; + unsigned long freq = target_freq; - if (!perf_ops->freq_set(ph, priv->domain_id, - target_freq * 1000, true)) + if (!perf_ops->freq_set(ph, priv->domain_id, freq * 1000, true)) return target_freq; return 0; --- linux-xilinx-6.8.0.orig/drivers/cpufreq/ti-cpufreq.c +++ linux-xilinx-6.8.0/drivers/cpufreq/ti-cpufreq.c @@ -61,6 +61,9 @@ unsigned long efuse_shift; unsigned long rev_offset; bool multi_regulator; +/* Backward compatibility hack: Might have missing syscon */ +#define TI_QUIRK_SYSCON_MAY_BE_MISSING 0x1 + u8 quirks; }; struct ti_cpufreq_data { @@ -182,6 +185,7 @@ .efuse_mask = BIT(3), .rev_offset = OMAP3_CONTROL_IDCODE - OMAP3_SYSCON_BASE, .multi_regulator = false, + .quirks = TI_QUIRK_SYSCON_MAY_BE_MISSING, }; /* @@ -209,6 +213,7 @@ .efuse_mask = BIT(9), .rev_offset = OMAP3_CONTROL_IDCODE - OMAP3_SYSCON_BASE, .multi_regulator = true, + .quirks = TI_QUIRK_SYSCON_MAY_BE_MISSING, }; /* @@ -223,6 +228,7 @@ .efuse_mask = 0, .rev_offset = OMAP3_CONTROL_IDCODE - OMAP3_SYSCON_BASE, .multi_regulator = false, + .quirks = TI_QUIRK_SYSCON_MAY_BE_MISSING, }; static struct ti_cpufreq_soc_data am625_soc_data = { @@ -250,7 +256,7 @@ ret = regmap_read(opp_data->syscon, opp_data->soc_data->efuse_offset, &efuse); - if (ret == -EIO) { + if (opp_data->soc_data->quirks & TI_QUIRK_SYSCON_MAY_BE_MISSING && ret == -EIO) { /* not a syscon register! */ void __iomem *regs = ioremap(OMAP3_SYSCON_BASE + opp_data->soc_data->efuse_offset, 4); @@ -291,7 +297,7 @@ ret = regmap_read(opp_data->syscon, opp_data->soc_data->rev_offset, &revision); - if (ret == -EIO) { + if (opp_data->soc_data->quirks & TI_QUIRK_SYSCON_MAY_BE_MISSING && ret == -EIO) { /* not a syscon register! */ void __iomem *regs = ioremap(OMAP3_SYSCON_BASE + opp_data->soc_data->rev_offset, 4); @@ -419,7 +425,7 @@ ret = dev_pm_opp_set_config(opp_data->cpu_dev, &config); if (ret < 0) { - dev_err(opp_data->cpu_dev, "Failed to set OPP config\n"); + dev_err_probe(opp_data->cpu_dev, ret, "Failed to set OPP config\n"); goto fail_put_node; } --- linux-xilinx-6.8.0.orig/drivers/cpuidle/cpuidle-riscv-sbi.c +++ linux-xilinx-6.8.0/drivers/cpuidle/cpuidle-riscv-sbi.c @@ -8,6 +8,7 @@ #define pr_fmt(fmt) "cpuidle-riscv-sbi: " fmt +#include #include #include #include @@ -267,19 +268,16 @@ { struct sbi_cpuidle_data *data = per_cpu_ptr(&sbi_cpuidle_data, cpu); struct device_node *state_node; - struct device_node *cpu_node; u32 *states; int i, ret; - cpu_node = of_cpu_device_node_get(cpu); + struct device_node *cpu_node __free(device_node) = of_cpu_device_node_get(cpu); if (!cpu_node) return -ENODEV; states = devm_kcalloc(dev, state_count, sizeof(*states), GFP_KERNEL); - if (!states) { - ret = -ENOMEM; - goto fail; - } + if (!states) + return -ENOMEM; /* Parse SBI specific details from state DT nodes */ for (i = 1; i < state_count; i++) { @@ -295,10 +293,8 @@ pr_debug("sbi-state %#x index %d\n", states[i], i); } - if (i != state_count) { - ret = -ENODEV; - goto fail; - } + if (i != state_count) + return -ENODEV; /* Initialize optional data, used for the hierarchical topology. */ ret = sbi_dt_cpu_init_topology(drv, data, state_count, cpu); @@ -308,10 +304,7 @@ /* Store states in the per-cpu struct. */ data->states = states; -fail: - of_node_put(cpu_node); - - return ret; + return 0; } static void sbi_cpuidle_deinit_cpu(int cpu) @@ -541,12 +534,12 @@ int cpu, ret; struct cpuidle_driver *drv; struct cpuidle_device *dev; - struct device_node *np, *pds_node; + struct device_node *pds_node; /* Detect OSI support based on CPU DT nodes */ sbi_cpuidle_use_osi = true; for_each_possible_cpu(cpu) { - np = of_cpu_device_node_get(cpu); + struct device_node *np __free(device_node) = of_cpu_device_node_get(cpu); if (np && of_property_present(np, "power-domains") && of_property_present(np, "power-domain-names")) { --- linux-xilinx-6.8.0.orig/drivers/cpuidle/driver.c +++ linux-xilinx-6.8.0/drivers/cpuidle/driver.c @@ -16,6 +16,7 @@ #include #include #include +#include #include "cpuidle.h" @@ -187,7 +188,7 @@ s->target_residency = div_u64(s->target_residency_ns, NSEC_PER_USEC); if (s->exit_latency > 0) - s->exit_latency_ns = s->exit_latency * NSEC_PER_USEC; + s->exit_latency_ns = mul_u32_u32(s->exit_latency, NSEC_PER_USEC); else if (s->exit_latency_ns < 0) s->exit_latency_ns = 0; else --- linux-xilinx-6.8.0.orig/drivers/crypto/Kconfig +++ linux-xilinx-6.8.0/drivers/crypto/Kconfig @@ -660,6 +660,27 @@ This will create /sys/kernel/debug/rk3288_crypto/stats for displaying the number of requests per algorithm and other internal stats. +config CRYPTO_DEV_XILINX_ECDSA + tristate "Support for Xilinx ECDSA hardware accelerator" + depends on ARCH_ZYNQMP || COMPILE_TEST + select CRYPTO_ENGINE + select CRYPTO_AKCIPHER + select CRYPTO_ECDSA + help + Xilinx processors have ECDSA hardware accelerator used for signature + and key generation and verification. This driver interfaces with + ECDSA hardware accelerator. Select this if you want to use the Versal + module for ECDSA algorithms. + +config CRYPTO_DEV_XILINX_RSA + tristate "Support for Xilinx ZynqMP RSA hw accelerator (DEPRECATED)" + depends on (ARCH_ZYNQMP || COMPILE_TEST) && (CRYPTO_DEV_XILINX_RSA_AKCIPHER=n) + select CRYPTO_AES + select CRYPTO_BLKCIPHER + help + Xilinx processors have RSA hw accelerator used for signature + generation and verification. This driver is deprecated. + Please migrate to : CRYPTO_DEV_XILINX_RSA_AKCIPHER config CRYPTO_DEV_ZYNQMP_AES tristate "Support for Xilinx ZynqMP AES hw accelerator" @@ -667,6 +688,8 @@ select CRYPTO_AES select CRYPTO_ENGINE select CRYPTO_AEAD + select CRYPTO_GCM + select CRYPTO_USER_API_AEAD help Xilinx ZynqMP has AES-GCM engine used for symmetric key encryption and decryption. This driver interfaces with AES hw @@ -683,6 +706,18 @@ Select this if you want to use the ZynqMP module for SHA3 hash computation. +config CRYPTO_DEV_XILINX_RSA_AKCIPHER + tristate "Support for Xilinx RSA hw accelerator" + depends on ARCH_ZYNQMP || COMPILE_TEST + select CRYPTO_ENGINE + select CRYPTO_RSA + select CRYPTO_AKCIPHER + help + Xilinx processors have RSA hw accelerator used for signature + generation and verification. This driver interfaces with RSA + hw accelerator. Select this if you want to use ZynqMP or Versal + module for RSA algorithms. + source "drivers/crypto/chelsio/Kconfig" source "drivers/crypto/virtio/Kconfig" --- linux-xilinx-6.8.0.orig/drivers/crypto/bcm/cipher.c +++ linux-xilinx-6.8.0/drivers/crypto/bcm/cipher.c @@ -2415,6 +2415,7 @@ static int ahash_hmac_init(struct ahash_request *req) { + int ret; struct iproc_reqctx_s *rctx = ahash_request_ctx(req); struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm); @@ -2424,7 +2425,9 @@ flow_log("ahash_hmac_init()\n"); /* init the context as a hash */ - ahash_init(req); + ret = ahash_init(req); + if (ret) + return ret; if (!spu_no_incr_hash(ctx)) { /* SPU-M can do incr hashing but needs sw for outer HMAC */ --- linux-xilinx-6.8.0.orig/drivers/crypto/bcm/spu2.c +++ linux-xilinx-6.8.0/drivers/crypto/bcm/spu2.c @@ -495,7 +495,7 @@ if (hash_iv_len) { packet_log(" Hash IV Length %u bytes\n", hash_iv_len); packet_dump(" hash IV: ", ptr, hash_iv_len); - ptr += ciph_key_len; + ptr += hash_iv_len; } if (ciph_iv_len) { --- linux-xilinx-6.8.0.orig/drivers/crypto/caam/blob_gen.c +++ linux-xilinx-6.8.0/drivers/crypto/caam/blob_gen.c @@ -2,6 +2,7 @@ /* * Copyright (C) 2015 Pengutronix, Steffen Trumtrar * Copyright (C) 2021 Pengutronix, Ahmad Fatoum + * Copyright 2024 NXP */ #define pr_fmt(fmt) "caam blob_gen: " fmt @@ -104,7 +105,7 @@ } ctrlpriv = dev_get_drvdata(jrdev->parent); - moo = FIELD_GET(CSTA_MOO, rd_reg32(&ctrlpriv->ctrl->perfmon.status)); + moo = FIELD_GET(CSTA_MOO, rd_reg32(&ctrlpriv->jr[0]->perfmon.status)); if (moo != CSTA_MOO_SECURE && moo != CSTA_MOO_TRUSTED) dev_warn(jrdev, "using insecure test key, enable HAB to use unique device key!\n"); --- linux-xilinx-6.8.0.orig/drivers/crypto/caam/caamhash.c +++ linux-xilinx-6.8.0/drivers/crypto/caam/caamhash.c @@ -708,6 +708,7 @@ GFP_KERNEL : GFP_ATOMIC; struct ahash_edesc *edesc; + sg_num = pad_sg_nents(sg_num); edesc = kzalloc(struct_size(edesc, sec4_sg, sg_num), flags); if (!edesc) return NULL; --- linux-xilinx-6.8.0.orig/drivers/crypto/caam/caampkc.c +++ linux-xilinx-6.8.0/drivers/crypto/caam/caampkc.c @@ -984,7 +984,7 @@ return -ENOMEM; } -static void caam_rsa_set_priv_key_form(struct caam_rsa_ctx *ctx, +static int caam_rsa_set_priv_key_form(struct caam_rsa_ctx *ctx, struct rsa_key *raw_key) { struct caam_rsa_key *rsa_key = &ctx->key; @@ -994,7 +994,7 @@ rsa_key->p = caam_read_raw_data(raw_key->p, &p_sz); if (!rsa_key->p) - return; + return -ENOMEM; rsa_key->p_sz = p_sz; rsa_key->q = caam_read_raw_data(raw_key->q, &q_sz); @@ -1029,7 +1029,7 @@ rsa_key->priv_form = FORM3; - return; + return 0; free_dq: kfree_sensitive(rsa_key->dq); @@ -1043,6 +1043,7 @@ kfree_sensitive(rsa_key->q); free_p: kfree_sensitive(rsa_key->p); + return -ENOMEM; } static int caam_rsa_set_priv_key(struct crypto_akcipher *tfm, const void *key, @@ -1088,7 +1089,9 @@ rsa_key->e_sz = raw_key.e_sz; rsa_key->n_sz = raw_key.n_sz; - caam_rsa_set_priv_key_form(ctx, &raw_key); + ret = caam_rsa_set_priv_key_form(ctx, &raw_key); + if (ret) + goto err; return 0; --- linux-xilinx-6.8.0.orig/drivers/crypto/caam/qi.c +++ linux-xilinx-6.8.0/drivers/crypto/caam/qi.c @@ -772,7 +772,7 @@ caam_debugfs_qi_init(ctrlpriv); - err = devm_add_action_or_reset(qidev, caam_qi_shutdown, ctrlpriv); + err = devm_add_action_or_reset(qidev, caam_qi_shutdown, qidev); if (err) return err; --- linux-xilinx-6.8.0.orig/drivers/crypto/cavium/cpt/cptpf_main.c +++ linux-xilinx-6.8.0/drivers/crypto/cavium/cpt/cptpf_main.c @@ -44,7 +44,7 @@ dev_err(dev, "Cores still busy %llx", coremask); grp = cpt_read_csr64(cpt->reg_base, CPTX_PF_EXEC_BUSY(0)); - if (timeout--) + if (!timeout--) break; udelay(CSR_DELAY); @@ -302,6 +302,8 @@ ret = do_cpt_init(cpt, mcode); if (ret) { + dma_free_coherent(&cpt->pdev->dev, mcode->code_size, + mcode->code, mcode->phys_base); dev_err(dev, "do_cpt_init failed with ret: %d\n", ret); goto fw_release; } @@ -394,7 +396,7 @@ dev_err(dev, "Cores still busy"); grp = cpt_read_csr64(cpt->reg_base, CPTX_PF_EXEC_BUSY(0)); - if (timeout--) + if (!timeout--) break; udelay(CSR_DELAY); --- linux-xilinx-6.8.0.orig/drivers/crypto/ccp/platform-access.c +++ linux-xilinx-6.8.0/drivers/crypto/ccp/platform-access.c @@ -118,9 +118,16 @@ goto unlock; } - /* Store the status in request header for caller to investigate */ + /* + * Read status from PSP. If status is non-zero, it indicates an error + * occurred during "processing" of the command. + * If status is zero, it indicates the command was "processed" + * successfully, but the result of the command is in the payload. + * Return both cases to the caller as -EIO to investigate. + */ cmd_reg = ioread32(cmd); - req->header.status = FIELD_GET(PSP_CMDRESP_STS, cmd_reg); + if (FIELD_GET(PSP_CMDRESP_STS, cmd_reg)) + req->header.status = FIELD_GET(PSP_CMDRESP_STS, cmd_reg); if (req->header.status) { ret = -EIO; goto unlock; --- linux-xilinx-6.8.0.orig/drivers/crypto/ccp/sev-dev.c +++ linux-xilinx-6.8.0/drivers/crypto/ccp/sev-dev.c @@ -349,7 +349,18 @@ sev->int_rcvd = 0; - reg = FIELD_PREP(SEV_CMDRESP_CMD, cmd) | SEV_CMDRESP_IOC; + reg = FIELD_PREP(SEV_CMDRESP_CMD, cmd); + + /* + * If invoked during panic handling, local interrupts are disabled so + * the PSP command completion interrupt can't be used. + * sev_wait_cmd_ioc() already checks for interrupts disabled and + * polls for PSP command completion. Ensure we do not request an + * interrupt from the PSP if irqs disabled. + */ + if (!irqs_disabled()) + reg |= SEV_CMDRESP_IOC; + iowrite32(reg, sev->io_regs + sev->vdata->cmdresp_reg); /* wait for command completion */ @@ -1381,6 +1392,8 @@ return; err: + sev_dev_destroy(psp_master); + psp_master->sev_data = NULL; } --- linux-xilinx-6.8.0.orig/drivers/crypto/ccp/sp-platform.c +++ linux-xilinx-6.8.0/drivers/crypto/ccp/sp-platform.c @@ -39,44 +39,38 @@ }, }; -#ifdef CONFIG_ACPI static const struct acpi_device_id sp_acpi_match[] = { { "AMDI0C00", (kernel_ulong_t)&dev_vdata[0] }, { }, }; MODULE_DEVICE_TABLE(acpi, sp_acpi_match); -#endif -#ifdef CONFIG_OF static const struct of_device_id sp_of_match[] = { { .compatible = "amd,ccp-seattle-v1a", .data = (const void *)&dev_vdata[0] }, { }, }; MODULE_DEVICE_TABLE(of, sp_of_match); -#endif static struct sp_dev_vdata *sp_get_of_version(struct platform_device *pdev) { -#ifdef CONFIG_OF const struct of_device_id *match; match = of_match_node(sp_of_match, pdev->dev.of_node); if (match && match->data) return (struct sp_dev_vdata *)match->data; -#endif + return NULL; } static struct sp_dev_vdata *sp_get_acpi_version(struct platform_device *pdev) { -#ifdef CONFIG_ACPI const struct acpi_device_id *match; match = acpi_match_device(sp_acpi_match, &pdev->dev); if (match && match->driver_data) return (struct sp_dev_vdata *)match->driver_data; -#endif + return NULL; } @@ -212,12 +206,8 @@ static struct platform_driver sp_platform_driver = { .driver = { .name = "ccp", -#ifdef CONFIG_ACPI .acpi_match_table = sp_acpi_match, -#endif -#ifdef CONFIG_OF .of_match_table = sp_of_match, -#endif }, .probe = sp_platform_probe, .remove_new = sp_platform_remove, --- linux-xilinx-6.8.0.orig/drivers/crypto/hisilicon/debugfs.c +++ linux-xilinx-6.8.0/drivers/crypto/hisilicon/debugfs.c @@ -783,8 +783,14 @@ { int i; + if (!dregs) + return; + /* Setting the pointer is NULL to prevent double free */ for (i = 0; i < reg_len; i++) { + if (!dregs[i].regs) + continue; + kfree(dregs[i].regs); dregs[i].regs = NULL; } @@ -834,14 +840,21 @@ static int qm_diff_regs_init(struct hisi_qm *qm, struct dfx_diff_registers *dregs, u32 reg_len) { + int ret; + qm->debug.qm_diff_regs = dfx_regs_init(qm, qm_diff_regs, ARRAY_SIZE(qm_diff_regs)); - if (IS_ERR(qm->debug.qm_diff_regs)) - return PTR_ERR(qm->debug.qm_diff_regs); + if (IS_ERR(qm->debug.qm_diff_regs)) { + ret = PTR_ERR(qm->debug.qm_diff_regs); + qm->debug.qm_diff_regs = NULL; + return ret; + } qm->debug.acc_diff_regs = dfx_regs_init(qm, dregs, reg_len); if (IS_ERR(qm->debug.acc_diff_regs)) { dfx_regs_uninit(qm, qm->debug.qm_diff_regs, ARRAY_SIZE(qm_diff_regs)); - return PTR_ERR(qm->debug.acc_diff_regs); + ret = PTR_ERR(qm->debug.acc_diff_regs); + qm->debug.acc_diff_regs = NULL; + return ret; } return 0; @@ -882,7 +895,9 @@ static void qm_diff_regs_uninit(struct hisi_qm *qm, u32 reg_len) { dfx_regs_uninit(qm, qm->debug.acc_diff_regs, reg_len); + qm->debug.acc_diff_regs = NULL; dfx_regs_uninit(qm, qm->debug.qm_diff_regs, ARRAY_SIZE(qm_diff_regs)); + qm->debug.qm_diff_regs = NULL; } /** --- linux-xilinx-6.8.0.orig/drivers/crypto/hisilicon/hpre/hpre_main.c +++ linux-xilinx-6.8.0/drivers/crypto/hisilicon/hpre/hpre_main.c @@ -13,9 +13,7 @@ #include #include "hpre.h" -#define HPRE_QM_ABNML_INT_MASK 0x100004 #define HPRE_CTRL_CNT_CLR_CE_BIT BIT(0) -#define HPRE_COMM_CNT_CLR_CE 0x0 #define HPRE_CTRL_CNT_CLR_CE 0x301000 #define HPRE_FSM_MAX_CNT 0x301008 #define HPRE_VFG_AXQOS 0x30100c @@ -42,7 +40,6 @@ #define HPRE_HAC_INT_SET 0x301500 #define HPRE_RNG_TIMEOUT_NUM 0x301A34 #define HPRE_CORE_INT_ENABLE 0 -#define HPRE_CORE_INT_DISABLE GENMASK(21, 0) #define HPRE_RDCHN_INI_ST 0x301a00 #define HPRE_CLSTR_BASE 0x302000 #define HPRE_CORE_EN_OFFSET 0x04 @@ -66,7 +63,6 @@ #define HPRE_CLSTR_ADDR_INTRVL 0x1000 #define HPRE_CLUSTER_INQURY 0x100 #define HPRE_CLSTR_ADDR_INQRY_RSLT 0x104 -#define HPRE_TIMEOUT_ABNML_BIT 6 #define HPRE_PASID_EN_BIT 9 #define HPRE_REG_RD_INTVRL_US 10 #define HPRE_REG_RD_TMOUT_US 1000 @@ -203,9 +199,9 @@ {HPRE_QM_RESET_MASK_CAP, 0x3128, 0, GENMASK(31, 0), 0x0, 0xC37, 0x6C37}, {HPRE_QM_OOO_SHUTDOWN_MASK_CAP, 0x3128, 0, GENMASK(31, 0), 0x0, 0x4, 0x6C37}, {HPRE_QM_CE_MASK_CAP, 0x312C, 0, GENMASK(31, 0), 0x0, 0x8, 0x8}, - {HPRE_NFE_MASK_CAP, 0x3130, 0, GENMASK(31, 0), 0x0, 0x3FFFFE, 0x1FFFFFE}, - {HPRE_RESET_MASK_CAP, 0x3134, 0, GENMASK(31, 0), 0x0, 0x3FFFFE, 0xBFFFFE}, - {HPRE_OOO_SHUTDOWN_MASK_CAP, 0x3134, 0, GENMASK(31, 0), 0x0, 0x22, 0xBFFFFE}, + {HPRE_NFE_MASK_CAP, 0x3130, 0, GENMASK(31, 0), 0x0, 0x3FFFFE, 0x1FFFC3E}, + {HPRE_RESET_MASK_CAP, 0x3134, 0, GENMASK(31, 0), 0x0, 0x3FFFFE, 0xBFFC3E}, + {HPRE_OOO_SHUTDOWN_MASK_CAP, 0x3134, 0, GENMASK(31, 0), 0x0, 0x22, 0xBFFC3E}, {HPRE_CE_MASK_CAP, 0x3138, 0, GENMASK(31, 0), 0x0, 0x1, 0x1}, {HPRE_CLUSTER_NUM_CAP, 0x313c, 20, GENMASK(3, 0), 0x0, 0x4, 0x1}, {HPRE_CORE_TYPE_NUM_CAP, 0x313c, 16, GENMASK(3, 0), 0x0, 0x2, 0x2}, @@ -358,6 +354,8 @@ }, }; +static const struct hisi_qm_err_ini hpre_err_ini; + bool hpre_check_alg_support(struct hisi_qm *qm, u32 alg) { u32 cap_val; @@ -654,11 +652,6 @@ writel(HPRE_QM_USR_CFG_MASK, qm->io_base + QM_AWUSER_M_CFG_ENABLE); writel_relaxed(HPRE_QM_AXI_CFG_MASK, qm->io_base + QM_AXI_M_CFG); - /* HPRE need more time, we close this interrupt */ - val = readl_relaxed(qm->io_base + HPRE_QM_ABNML_INT_MASK); - val |= BIT(HPRE_TIMEOUT_ABNML_BIT); - writel_relaxed(val, qm->io_base + HPRE_QM_ABNML_INT_MASK); - if (qm->ver >= QM_HW_V3) writel(HPRE_RSA_ENB | HPRE_ECC_ENB, qm->io_base + HPRE_TYPES_ENB); @@ -667,9 +660,7 @@ writel(HPRE_QM_VFG_AX_MASK, qm->io_base + HPRE_VFG_AXCACHE); writel(0x0, qm->io_base + HPRE_BD_ENDIAN); - writel(0x0, qm->io_base + HPRE_INT_MASK); writel(0x0, qm->io_base + HPRE_POISON_BYPASS); - writel(0x0, qm->io_base + HPRE_COMM_CNT_CLR_CE); writel(0x0, qm->io_base + HPRE_ECC_BYPASS); writel(HPRE_BD_USR_MASK, qm->io_base + HPRE_BD_ARUSR_CFG); @@ -759,7 +750,7 @@ static void hpre_hw_error_enable(struct hisi_qm *qm) { - u32 ce, nfe; + u32 ce, nfe, err_en; ce = hisi_qm_get_hw_info(qm, hpre_basic_info, HPRE_CE_MASK_CAP, qm->cap_ver); nfe = hisi_qm_get_hw_info(qm, hpre_basic_info, HPRE_NFE_MASK_CAP, qm->cap_ver); @@ -776,7 +767,8 @@ hpre_master_ooo_ctrl(qm, true); /* enable hpre hw error interrupts */ - writel(HPRE_CORE_INT_ENABLE, qm->io_base + HPRE_INT_MASK); + err_en = ce | nfe | HPRE_HAC_RAS_FE_ENABLE; + writel(~err_en, qm->io_base + HPRE_INT_MASK); } static inline struct hisi_qm *hpre_file_to_qm(struct hpre_debugfs_file *file) @@ -1162,6 +1154,7 @@ qm->qp_num = pf_q_num; qm->debug.curr_qm_qp_num = pf_q_num; qm->qm_list = &hpre_devices; + qm->err_ini = &hpre_err_ini; if (pf_q_num_flag) set_bit(QM_MODULE_PARAM, &qm->misc_ctl); } @@ -1288,11 +1281,15 @@ static void hpre_clear_hw_err_status(struct hisi_qm *qm, u32 err_sts) { - u32 nfe; - writel(err_sts, qm->io_base + HPRE_HAC_SOURCE_INT); - nfe = hisi_qm_get_hw_info(qm, hpre_basic_info, HPRE_NFE_MASK_CAP, qm->cap_ver); - writel(nfe, qm->io_base + HPRE_RAS_NFE_ENB); +} + +static void hpre_disable_error_report(struct hisi_qm *qm, u32 err_type) +{ + u32 nfe_mask; + + nfe_mask = hisi_qm_get_hw_info(qm, hpre_basic_info, HPRE_NFE_MASK_CAP, qm->cap_ver); + writel(nfe_mask & (~err_type), qm->io_base + HPRE_RAS_NFE_ENB); } static void hpre_open_axi_master_ooo(struct hisi_qm *qm) @@ -1306,6 +1303,27 @@ qm->io_base + HPRE_AM_OOO_SHUTDOWN_ENB); } +static enum acc_err_result hpre_get_err_result(struct hisi_qm *qm) +{ + u32 err_status; + + err_status = hpre_get_hw_err_status(qm); + if (err_status) { + if (err_status & qm->err_info.ecc_2bits_mask) + qm->err_status.is_dev_ecc_mbit = true; + hpre_log_hw_error(qm, err_status); + + if (err_status & qm->err_info.dev_reset_mask) { + /* Disable the same error reporting until device is recovered. */ + hpre_disable_error_report(qm, err_status); + return ACC_ERR_NEED_RESET; + } + hpre_clear_hw_err_status(qm, err_status); + } + + return ACC_ERR_RECOVERED; +} + static void hpre_err_info_init(struct hisi_qm *qm) { struct hisi_qm_err_info *err_info = &qm->err_info; @@ -1332,12 +1350,12 @@ .hw_err_disable = hpre_hw_error_disable, .get_dev_hw_err_status = hpre_get_hw_err_status, .clear_dev_hw_err_status = hpre_clear_hw_err_status, - .log_dev_hw_err = hpre_log_hw_error, .open_axi_master_ooo = hpre_open_axi_master_ooo, .open_sva_prefetch = hpre_open_sva_prefetch, .close_sva_prefetch = hpre_close_sva_prefetch, .show_last_dfx_regs = hpre_show_last_dfx_regs, .err_info_init = hpre_err_info_init, + .get_err_result = hpre_get_err_result, }; static int hpre_pf_probe_init(struct hpre *hpre) @@ -1351,8 +1369,6 @@ hpre_open_sva_prefetch(qm); - qm->err_ini = &hpre_err_ini; - qm->err_ini->err_info_init(qm); hisi_qm_dev_err_init(qm); ret = hpre_show_last_regs_init(qm); if (ret) @@ -1381,6 +1397,18 @@ return 0; } +static void hpre_probe_uninit(struct hisi_qm *qm) +{ + if (qm->fun_type == QM_HW_VF) + return; + + hpre_cnt_regs_clear(qm); + qm->debug.curr_qm_qp_num = 0; + hpre_show_last_regs_uninit(qm); + hpre_close_sva_prefetch(qm); + hisi_qm_dev_err_uninit(qm); +} + static int hpre_probe(struct pci_dev *pdev, const struct pci_device_id *id) { struct hisi_qm *qm; @@ -1406,7 +1434,7 @@ ret = hisi_qm_start(qm); if (ret) - goto err_with_err_init; + goto err_with_probe_init; ret = hpre_debugfs_init(qm); if (ret) @@ -1445,9 +1473,8 @@ hpre_debugfs_exit(qm); hisi_qm_stop(qm, QM_NORMAL); -err_with_err_init: - hpre_show_last_regs_uninit(qm); - hisi_qm_dev_err_uninit(qm); +err_with_probe_init: + hpre_probe_uninit(qm); err_with_qm_init: hisi_qm_uninit(qm); @@ -1469,13 +1496,7 @@ hpre_debugfs_exit(qm); hisi_qm_stop(qm, QM_NORMAL); - if (qm->fun_type == QM_HW_PF) { - hpre_cnt_regs_clear(qm); - qm->debug.curr_qm_qp_num = 0; - hpre_show_last_regs_uninit(qm); - hisi_qm_dev_err_uninit(qm); - } - + hpre_probe_uninit(qm); hisi_qm_uninit(qm); } --- linux-xilinx-6.8.0.orig/drivers/crypto/hisilicon/qm.c +++ linux-xilinx-6.8.0/drivers/crypto/hisilicon/qm.c @@ -265,12 +265,6 @@ SHAPER_VFT, }; -enum acc_err_result { - ACC_ERR_NONE, - ACC_ERR_NEED_RESET, - ACC_ERR_RECOVERED, -}; - enum qm_alg_type { ALG_TYPE_0, ALG_TYPE_1, @@ -443,6 +437,7 @@ }; static void qm_irqs_unregister(struct hisi_qm *qm); +static int qm_reset_device(struct hisi_qm *qm); static u32 qm_get_hw_error_status(struct hisi_qm *qm) { @@ -1414,22 +1409,25 @@ static enum acc_err_result qm_hw_error_handle_v2(struct hisi_qm *qm) { - u32 error_status, tmp; + u32 error_status; - /* read err sts */ - tmp = readl(qm->io_base + QM_ABNORMAL_INT_STATUS); - error_status = qm->error_mask & tmp; - - if (error_status) { + error_status = qm_get_hw_error_status(qm); + if (error_status & qm->error_mask) { if (error_status & QM_ECC_MBIT) qm->err_status.is_qm_ecc_mbit = true; qm_log_hw_error(qm, error_status); - if (error_status & qm->err_info.qm_reset_mask) + if (error_status & qm->err_info.qm_reset_mask) { + /* Disable the same error reporting until device is recovered. */ + writel(qm->err_info.nfe & (~error_status), + qm->io_base + QM_RAS_NFE_ENABLE); return ACC_ERR_NEED_RESET; + } + /* Clear error source if not need reset. */ writel(error_status, qm->io_base + QM_ABNORMAL_INT_SOURCE); writel(qm->err_info.nfe, qm->io_base + QM_RAS_NFE_ENABLE); + writel(qm->err_info.ce, qm->io_base + QM_RAS_CE_ENABLE); } return ACC_ERR_RECOVERED; @@ -2833,12 +2831,9 @@ hisi_qm_set_state(qm, QM_NOT_READY); up_write(&qm->qps_lock); + qm_remove_uacce(qm); qm_irqs_unregister(qm); hisi_qm_pci_uninit(qm); - if (qm->use_sva) { - uacce_remove(qm->uacce); - qm->uacce = NULL; - } } EXPORT_SYMBOL_GPL(hisi_qm_uninit); @@ -3801,30 +3796,12 @@ static enum acc_err_result qm_dev_err_handle(struct hisi_qm *qm) { - u32 err_sts; - - if (!qm->err_ini->get_dev_hw_err_status) { - dev_err(&qm->pdev->dev, "Device doesn't support get hw error status!\n"); + if (!qm->err_ini->get_err_result) { + dev_err(&qm->pdev->dev, "Device doesn't support reset!\n"); return ACC_ERR_NONE; } - /* get device hardware error status */ - err_sts = qm->err_ini->get_dev_hw_err_status(qm); - if (err_sts) { - if (err_sts & qm->err_info.ecc_2bits_mask) - qm->err_status.is_dev_ecc_mbit = true; - - if (qm->err_ini->log_dev_hw_err) - qm->err_ini->log_dev_hw_err(qm, err_sts); - - if (err_sts & qm->err_info.dev_reset_mask) - return ACC_ERR_NEED_RESET; - - if (qm->err_ini->clear_dev_hw_err_status) - qm->err_ini->clear_dev_hw_err_status(qm, err_sts); - } - - return ACC_ERR_RECOVERED; + return qm->err_ini->get_err_result(qm); } static enum acc_err_result qm_process_dev_error(struct hisi_qm *qm) @@ -3955,6 +3932,28 @@ return -ETIMEDOUT; } +static void qm_dev_ecc_mbit_handle(struct hisi_qm *qm) +{ + u32 nfe_enb = 0; + + /* Kunpeng930 hardware automatically close master ooo when NFE occurs */ + if (qm->ver >= QM_HW_V3) + return; + + if (!qm->err_status.is_dev_ecc_mbit && + qm->err_status.is_qm_ecc_mbit && + qm->err_ini->close_axi_master_ooo) { + qm->err_ini->close_axi_master_ooo(qm); + } else if (qm->err_status.is_dev_ecc_mbit && + !qm->err_status.is_qm_ecc_mbit && + !qm->err_ini->close_axi_master_ooo) { + nfe_enb = readl(qm->io_base + QM_RAS_NFE_ENABLE); + writel(nfe_enb & QM_RAS_NFE_MBIT_DISABLE, + qm->io_base + QM_RAS_NFE_ENABLE); + writel(QM_ECC_MBIT, qm->io_base + QM_ABNORMAL_INT_SET); + } +} + static int qm_vf_reset_prepare(struct hisi_qm *qm, enum qm_stop_reason stop_reason) { @@ -4019,6 +4018,8 @@ return ret; } + qm_dev_ecc_mbit_handle(qm); + /* PF obtains the information of VF by querying the register. */ qm_cmd_uninit(qm); @@ -4049,33 +4050,26 @@ return 0; } -static void qm_dev_ecc_mbit_handle(struct hisi_qm *qm) +static int qm_master_ooo_check(struct hisi_qm *qm) { - u32 nfe_enb = 0; + u32 val; + int ret; - /* Kunpeng930 hardware automatically close master ooo when NFE occurs */ - if (qm->ver >= QM_HW_V3) - return; + /* Check the ooo register of the device before resetting the device. */ + writel(ACC_MASTER_GLOBAL_CTRL_SHUTDOWN, qm->io_base + ACC_MASTER_GLOBAL_CTRL); + ret = readl_relaxed_poll_timeout(qm->io_base + ACC_MASTER_TRANS_RETURN, + val, (val == ACC_MASTER_TRANS_RETURN_RW), + POLL_PERIOD, POLL_TIMEOUT); + if (ret) + pci_warn(qm->pdev, "Bus lock! Please reset system.\n"); - if (!qm->err_status.is_dev_ecc_mbit && - qm->err_status.is_qm_ecc_mbit && - qm->err_ini->close_axi_master_ooo) { - qm->err_ini->close_axi_master_ooo(qm); - } else if (qm->err_status.is_dev_ecc_mbit && - !qm->err_status.is_qm_ecc_mbit && - !qm->err_ini->close_axi_master_ooo) { - nfe_enb = readl(qm->io_base + QM_RAS_NFE_ENABLE); - writel(nfe_enb & QM_RAS_NFE_MBIT_DISABLE, - qm->io_base + QM_RAS_NFE_ENABLE); - writel(QM_ECC_MBIT, qm->io_base + QM_ABNORMAL_INT_SET); - } + return ret; } -static int qm_soft_reset(struct hisi_qm *qm) +static int qm_soft_reset_prepare(struct hisi_qm *qm) { struct pci_dev *pdev = qm->pdev; int ret; - u32 val; /* Ensure all doorbells and mailboxes received by QM */ ret = qm_check_req_recv(qm); @@ -4096,30 +4090,23 @@ return ret; } - qm_dev_ecc_mbit_handle(qm); - - /* OOO register set and check */ - writel(ACC_MASTER_GLOBAL_CTRL_SHUTDOWN, - qm->io_base + ACC_MASTER_GLOBAL_CTRL); - - /* If bus lock, reset chip */ - ret = readl_relaxed_poll_timeout(qm->io_base + ACC_MASTER_TRANS_RETURN, - val, - (val == ACC_MASTER_TRANS_RETURN_RW), - POLL_PERIOD, POLL_TIMEOUT); - if (ret) { - pci_emerg(pdev, "Bus lock! Please reset system.\n"); + ret = qm_master_ooo_check(qm); + if (ret) return ret; - } if (qm->err_ini->close_sva_prefetch) qm->err_ini->close_sva_prefetch(qm); ret = qm_set_pf_mse(qm, false); - if (ret) { + if (ret) pci_err(pdev, "Fails to disable pf MSE bit.\n"); - return ret; - } + + return ret; +} + +static int qm_reset_device(struct hisi_qm *qm) +{ + struct pci_dev *pdev = qm->pdev; /* The reset related sub-control registers are not in PCI BAR */ if (ACPI_HANDLE(&pdev->dev)) { @@ -4138,12 +4125,23 @@ pci_err(pdev, "Reset step %llu failed!\n", value); return -EIO; } - } else { - pci_err(pdev, "No reset method!\n"); - return -EINVAL; + + return 0; } - return 0; + pci_err(pdev, "No reset method!\n"); + return -EINVAL; +} + +static int qm_soft_reset(struct hisi_qm *qm) +{ + int ret; + + ret = qm_soft_reset_prepare(qm); + if (ret) + return ret; + + return qm_reset_device(qm); } static int qm_vf_reset_done(struct hisi_qm *qm) @@ -5096,6 +5094,35 @@ return ret; } +static int qm_clear_device(struct hisi_qm *qm) +{ + acpi_handle handle = ACPI_HANDLE(&qm->pdev->dev); + int ret; + + if (qm->fun_type == QM_HW_VF) + return 0; + + /* Device does not support reset, return */ + if (!qm->err_ini->err_info_init) + return 0; + qm->err_ini->err_info_init(qm); + + if (!handle) + return 0; + + /* No reset method, return */ + if (!acpi_has_method(handle, qm->err_info.acpi_rst)) + return 0; + + ret = qm_master_ooo_check(qm); + if (ret) { + writel(0x0, qm->io_base + ACC_MASTER_GLOBAL_CTRL); + return ret; + } + + return qm_reset_device(qm); +} + static int hisi_qm_pci_init(struct hisi_qm *qm) { struct pci_dev *pdev = qm->pdev; @@ -5125,8 +5152,14 @@ goto err_get_pci_res; } + ret = qm_clear_device(qm); + if (ret) + goto err_free_vectors; + return 0; +err_free_vectors: + pci_free_irq_vectors(pdev); err_get_pci_res: qm_put_pci_res(qm); err_disable_pcidev: @@ -5427,7 +5460,6 @@ { struct pci_dev *pdev = qm->pdev; int ret; - u32 val; ret = qm->ops->set_msi(qm, false); if (ret) { @@ -5435,18 +5467,9 @@ return ret; } - /* shutdown OOO register */ - writel(ACC_MASTER_GLOBAL_CTRL_SHUTDOWN, - qm->io_base + ACC_MASTER_GLOBAL_CTRL); - - ret = readl_relaxed_poll_timeout(qm->io_base + ACC_MASTER_TRANS_RETURN, - val, - (val == ACC_MASTER_TRANS_RETURN_RW), - POLL_PERIOD, POLL_TIMEOUT); - if (ret) { - pci_emerg(pdev, "Bus lock! Please reset system.\n"); + ret = qm_master_ooo_check(qm); + if (ret) return ret; - } ret = qm_set_pf_mse(qm, false); if (ret) --- linux-xilinx-6.8.0.orig/drivers/crypto/hisilicon/sec2/sec.h +++ linux-xilinx-6.8.0/drivers/crypto/hisilicon/sec2/sec.h @@ -37,6 +37,7 @@ u8 *a_ivin; dma_addr_t a_ivin_dma; struct aead_request *aead_req; + bool fallback; }; /* SEC request of Crypto */ @@ -90,9 +91,7 @@ dma_addr_t a_key_dma; u8 *a_key; u8 a_key_len; - u8 mac_len; u8 a_alg; - bool fallback; struct crypto_shash *hash_tfm; struct crypto_aead *fallback_aead_tfm; }; --- linux-xilinx-6.8.0.orig/drivers/crypto/hisilicon/sec2/sec_crypto.c +++ linux-xilinx-6.8.0/drivers/crypto/hisilicon/sec2/sec_crypto.c @@ -481,8 +481,10 @@ if (ctx->pbuf_supported) sec_free_pbuf_resource(dev, qp_ctx->res); - if (ctx->alg_type == SEC_AEAD) + if (ctx->alg_type == SEC_AEAD) { sec_free_mac_resource(dev, qp_ctx->res); + sec_free_aiv_resource(dev, qp_ctx->res); + } } static int sec_alloc_qp_ctx_resource(struct hisi_qm *qm, struct sec_ctx *ctx, @@ -950,15 +952,14 @@ struct aead_request *aead_req = req->aead_req; struct crypto_aead *tfm = crypto_aead_reqtfm(aead_req); size_t authsize = crypto_aead_authsize(tfm); - u8 *mac_out = req->out_mac; struct scatterlist *sgl = aead_req->src; + u8 *mac_out = req->out_mac; size_t copy_size; off_t skip_size; /* Copy input mac */ skip_size = aead_req->assoclen + aead_req->cryptlen - authsize; - copy_size = sg_pcopy_to_buffer(sgl, sg_nents(sgl), mac_out, - authsize, skip_size); + copy_size = sg_pcopy_to_buffer(sgl, sg_nents(sgl), mac_out, authsize, skip_size); if (unlikely(copy_size != authsize)) return -EINVAL; @@ -1122,10 +1123,7 @@ struct sec_ctx *ctx = crypto_tfm_ctx(tfm); struct sec_auth_ctx *a_ctx = &ctx->a_ctx; - if (unlikely(a_ctx->fallback_aead_tfm)) - return crypto_aead_setauthsize(a_ctx->fallback_aead_tfm, authsize); - - return 0; + return crypto_aead_setauthsize(a_ctx->fallback_aead_tfm, authsize); } static int sec_aead_fallback_setkey(struct sec_auth_ctx *a_ctx, @@ -1141,7 +1139,6 @@ static int sec_aead_setkey(struct crypto_aead *tfm, const u8 *key, const u32 keylen, const enum sec_hash_alg a_alg, const enum sec_calg c_alg, - const enum sec_mac_len mac_len, const enum sec_cmode c_mode) { struct sec_ctx *ctx = crypto_aead_ctx(tfm); @@ -1153,7 +1150,6 @@ ctx->a_ctx.a_alg = a_alg; ctx->c_ctx.c_alg = c_alg; - ctx->a_ctx.mac_len = mac_len; c_ctx->c_mode = c_mode; if (c_mode == SEC_CMODE_CCM || c_mode == SEC_CMODE_GCM) { @@ -1164,13 +1160,7 @@ } memcpy(c_ctx->c_key, key, keylen); - if (unlikely(a_ctx->fallback_aead_tfm)) { - ret = sec_aead_fallback_setkey(a_ctx, tfm, key, keylen); - if (ret) - return ret; - } - - return 0; + return sec_aead_fallback_setkey(a_ctx, tfm, key, keylen); } ret = crypto_authenc_extractkeys(&keys, key, keylen); @@ -1189,10 +1179,15 @@ goto bad_key; } - if ((ctx->a_ctx.mac_len & SEC_SQE_LEN_RATE_MASK) || - (ctx->a_ctx.a_key_len & SEC_SQE_LEN_RATE_MASK)) { + if (ctx->a_ctx.a_key_len & SEC_SQE_LEN_RATE_MASK) { ret = -EINVAL; - dev_err(dev, "MAC or AUTH key length error!\n"); + dev_err(dev, "AUTH key length error!\n"); + goto bad_key; + } + + ret = sec_aead_fallback_setkey(a_ctx, tfm, key, keylen); + if (ret) { + dev_err(dev, "set sec fallback key err!\n"); goto bad_key; } @@ -1204,27 +1199,19 @@ } -#define GEN_SEC_AEAD_SETKEY_FUNC(name, aalg, calg, maclen, cmode) \ -static int sec_setkey_##name(struct crypto_aead *tfm, const u8 *key, \ - u32 keylen) \ -{ \ - return sec_aead_setkey(tfm, key, keylen, aalg, calg, maclen, cmode);\ +#define GEN_SEC_AEAD_SETKEY_FUNC(name, aalg, calg, cmode) \ +static int sec_setkey_##name(struct crypto_aead *tfm, const u8 *key, u32 keylen) \ +{ \ + return sec_aead_setkey(tfm, key, keylen, aalg, calg, cmode); \ } -GEN_SEC_AEAD_SETKEY_FUNC(aes_cbc_sha1, SEC_A_HMAC_SHA1, - SEC_CALG_AES, SEC_HMAC_SHA1_MAC, SEC_CMODE_CBC) -GEN_SEC_AEAD_SETKEY_FUNC(aes_cbc_sha256, SEC_A_HMAC_SHA256, - SEC_CALG_AES, SEC_HMAC_SHA256_MAC, SEC_CMODE_CBC) -GEN_SEC_AEAD_SETKEY_FUNC(aes_cbc_sha512, SEC_A_HMAC_SHA512, - SEC_CALG_AES, SEC_HMAC_SHA512_MAC, SEC_CMODE_CBC) -GEN_SEC_AEAD_SETKEY_FUNC(aes_ccm, 0, SEC_CALG_AES, - SEC_HMAC_CCM_MAC, SEC_CMODE_CCM) -GEN_SEC_AEAD_SETKEY_FUNC(aes_gcm, 0, SEC_CALG_AES, - SEC_HMAC_GCM_MAC, SEC_CMODE_GCM) -GEN_SEC_AEAD_SETKEY_FUNC(sm4_ccm, 0, SEC_CALG_SM4, - SEC_HMAC_CCM_MAC, SEC_CMODE_CCM) -GEN_SEC_AEAD_SETKEY_FUNC(sm4_gcm, 0, SEC_CALG_SM4, - SEC_HMAC_GCM_MAC, SEC_CMODE_GCM) +GEN_SEC_AEAD_SETKEY_FUNC(aes_cbc_sha1, SEC_A_HMAC_SHA1, SEC_CALG_AES, SEC_CMODE_CBC) +GEN_SEC_AEAD_SETKEY_FUNC(aes_cbc_sha256, SEC_A_HMAC_SHA256, SEC_CALG_AES, SEC_CMODE_CBC) +GEN_SEC_AEAD_SETKEY_FUNC(aes_cbc_sha512, SEC_A_HMAC_SHA512, SEC_CALG_AES, SEC_CMODE_CBC) +GEN_SEC_AEAD_SETKEY_FUNC(aes_ccm, 0, SEC_CALG_AES, SEC_CMODE_CCM) +GEN_SEC_AEAD_SETKEY_FUNC(aes_gcm, 0, SEC_CALG_AES, SEC_CMODE_GCM) +GEN_SEC_AEAD_SETKEY_FUNC(sm4_ccm, 0, SEC_CALG_SM4, SEC_CMODE_CCM) +GEN_SEC_AEAD_SETKEY_FUNC(sm4_gcm, 0, SEC_CALG_SM4, SEC_CMODE_GCM) static int sec_aead_sgl_map(struct sec_ctx *ctx, struct sec_req *req) { @@ -1472,9 +1459,10 @@ static void set_aead_auth_iv(struct sec_ctx *ctx, struct sec_req *req) { struct aead_request *aead_req = req->aead_req.aead_req; - struct sec_cipher_req *c_req = &req->c_req; + struct crypto_aead *tfm = crypto_aead_reqtfm(aead_req); + size_t authsize = crypto_aead_authsize(tfm); struct sec_aead_req *a_req = &req->aead_req; - size_t authsize = ctx->a_ctx.mac_len; + struct sec_cipher_req *c_req = &req->c_req; u32 data_size = aead_req->cryptlen; u8 flage = 0; u8 cm, cl; @@ -1515,10 +1503,8 @@ static void sec_aead_set_iv(struct sec_ctx *ctx, struct sec_req *req) { struct aead_request *aead_req = req->aead_req.aead_req; - struct crypto_aead *tfm = crypto_aead_reqtfm(aead_req); - size_t authsize = crypto_aead_authsize(tfm); - struct sec_cipher_req *c_req = &req->c_req; struct sec_aead_req *a_req = &req->aead_req; + struct sec_cipher_req *c_req = &req->c_req; memcpy(c_req->c_ivin, aead_req->iv, ctx->c_ctx.ivsize); @@ -1526,15 +1512,11 @@ /* * CCM 16Byte Cipher_IV: {1B_Flage,13B_IV,2B_counter}, * the counter must set to 0x01 + * CCM 16Byte Auth_IV: {1B_AFlage,13B_IV,2B_Ptext_length} */ - ctx->a_ctx.mac_len = authsize; - /* CCM 16Byte Auth_IV: {1B_AFlage,13B_IV,2B_Ptext_length} */ set_aead_auth_iv(ctx, req); - } - - /* GCM 12Byte Cipher_IV == Auth_IV */ - if (ctx->c_ctx.c_mode == SEC_CMODE_GCM) { - ctx->a_ctx.mac_len = authsize; + } else if (ctx->c_ctx.c_mode == SEC_CMODE_GCM) { + /* GCM 12Byte Cipher_IV == Auth_IV */ memcpy(a_req->a_ivin, c_req->c_ivin, SEC_AIV_SIZE); } } @@ -1544,9 +1526,11 @@ { struct sec_aead_req *a_req = &req->aead_req; struct aead_request *aq = a_req->aead_req; + struct crypto_aead *tfm = crypto_aead_reqtfm(aq); + size_t authsize = crypto_aead_authsize(tfm); /* C_ICV_Len is MAC size, 0x4 ~ 0x10 */ - sec_sqe->type2.icvw_kmode |= cpu_to_le16((u16)ctx->mac_len); + sec_sqe->type2.icvw_kmode |= cpu_to_le16((u16)authsize); /* mode set to CCM/GCM, don't set {A_Alg, AKey_Len, MAC_Len} */ sec_sqe->type2.a_key_addr = sec_sqe->type2.c_key_addr; @@ -1570,9 +1554,11 @@ { struct sec_aead_req *a_req = &req->aead_req; struct aead_request *aq = a_req->aead_req; + struct crypto_aead *tfm = crypto_aead_reqtfm(aq); + size_t authsize = crypto_aead_authsize(tfm); /* C_ICV_Len is MAC size, 0x4 ~ 0x10 */ - sqe3->c_icv_key |= cpu_to_le16((u16)ctx->mac_len << SEC_MAC_OFFSET_V3); + sqe3->c_icv_key |= cpu_to_le16((u16)authsize << SEC_MAC_OFFSET_V3); /* mode set to CCM/GCM, don't set {A_Alg, AKey_Len, MAC_Len} */ sqe3->a_key_addr = sqe3->c_key_addr; @@ -1596,11 +1582,12 @@ struct sec_aead_req *a_req = &req->aead_req; struct sec_cipher_req *c_req = &req->c_req; struct aead_request *aq = a_req->aead_req; + struct crypto_aead *tfm = crypto_aead_reqtfm(aq); + size_t authsize = crypto_aead_authsize(tfm); sec_sqe->type2.a_key_addr = cpu_to_le64(ctx->a_key_dma); - sec_sqe->type2.mac_key_alg = - cpu_to_le32(ctx->mac_len / SEC_SQE_LEN_RATE); + sec_sqe->type2.mac_key_alg = cpu_to_le32(authsize / SEC_SQE_LEN_RATE); sec_sqe->type2.mac_key_alg |= cpu_to_le32((u32)((ctx->a_key_len) / @@ -1650,11 +1637,13 @@ struct sec_aead_req *a_req = &req->aead_req; struct sec_cipher_req *c_req = &req->c_req; struct aead_request *aq = a_req->aead_req; + struct crypto_aead *tfm = crypto_aead_reqtfm(aq); + size_t authsize = crypto_aead_authsize(tfm); sqe3->a_key_addr = cpu_to_le64(ctx->a_key_dma); sqe3->auth_mac_key |= - cpu_to_le32((u32)(ctx->mac_len / + cpu_to_le32((u32)(authsize / SEC_SQE_LEN_RATE) << SEC_MAC_OFFSET_V3); sqe3->auth_mac_key |= @@ -1705,9 +1694,9 @@ { struct aead_request *a_req = req->aead_req.aead_req; struct crypto_aead *tfm = crypto_aead_reqtfm(a_req); + size_t authsize = crypto_aead_authsize(tfm); struct sec_aead_req *aead_req = &req->aead_req; struct sec_cipher_req *c_req = &req->c_req; - size_t authsize = crypto_aead_authsize(tfm); struct sec_qp_ctx *qp_ctx = req->qp_ctx; struct aead_request *backlog_aead_req; struct sec_req *backlog_req; @@ -1720,10 +1709,8 @@ if (!err && c_req->encrypt) { struct scatterlist *sgl = a_req->dst; - sz = sg_pcopy_from_buffer(sgl, sg_nents(sgl), - aead_req->out_mac, - authsize, a_req->cryptlen + - a_req->assoclen); + sz = sg_pcopy_from_buffer(sgl, sg_nents(sgl), aead_req->out_mac, + authsize, a_req->cryptlen + a_req->assoclen); if (unlikely(sz != authsize)) { dev_err(c->dev, "copy out mac err!\n"); err = -EINVAL; @@ -1931,8 +1918,10 @@ static int sec_aead_ctx_init(struct crypto_aead *tfm, const char *hash_name) { + struct aead_alg *alg = crypto_aead_alg(tfm); struct sec_ctx *ctx = crypto_aead_ctx(tfm); - struct sec_auth_ctx *auth_ctx = &ctx->a_ctx; + struct sec_auth_ctx *a_ctx = &ctx->a_ctx; + const char *aead_name = alg->base.cra_name; int ret; ret = sec_aead_init(tfm); @@ -1941,11 +1930,20 @@ return ret; } - auth_ctx->hash_tfm = crypto_alloc_shash(hash_name, 0, 0); - if (IS_ERR(auth_ctx->hash_tfm)) { + a_ctx->hash_tfm = crypto_alloc_shash(hash_name, 0, 0); + if (IS_ERR(a_ctx->hash_tfm)) { dev_err(ctx->dev, "aead alloc shash error!\n"); sec_aead_exit(tfm); - return PTR_ERR(auth_ctx->hash_tfm); + return PTR_ERR(a_ctx->hash_tfm); + } + + a_ctx->fallback_aead_tfm = crypto_alloc_aead(aead_name, 0, + CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC); + if (IS_ERR(a_ctx->fallback_aead_tfm)) { + dev_err(ctx->dev, "aead driver alloc fallback tfm error!\n"); + crypto_free_shash(ctx->a_ctx.hash_tfm); + sec_aead_exit(tfm); + return PTR_ERR(a_ctx->fallback_aead_tfm); } return 0; @@ -1955,6 +1953,7 @@ { struct sec_ctx *ctx = crypto_aead_ctx(tfm); + crypto_free_aead(ctx->a_ctx.fallback_aead_tfm); crypto_free_shash(ctx->a_ctx.hash_tfm); sec_aead_exit(tfm); } @@ -1981,7 +1980,6 @@ sec_aead_exit(tfm); return PTR_ERR(a_ctx->fallback_aead_tfm); } - a_ctx->fallback = false; return 0; } @@ -2240,21 +2238,20 @@ { struct aead_request *req = sreq->aead_req.aead_req; struct crypto_aead *tfm = crypto_aead_reqtfm(req); - size_t authsize = crypto_aead_authsize(tfm); + size_t sz = crypto_aead_authsize(tfm); u8 c_mode = ctx->c_ctx.c_mode; struct device *dev = ctx->dev; int ret; - if (unlikely(req->cryptlen + req->assoclen > MAX_INPUT_DATA_LEN || - req->assoclen > SEC_MAX_AAD_LEN)) { - dev_err(dev, "aead input spec error!\n"); + /* Hardware does not handle cases where authsize is less than 4 bytes */ + if (unlikely(sz < MIN_MAC_LEN)) { + sreq->aead_req.fallback = true; return -EINVAL; } - if (unlikely((c_mode == SEC_CMODE_GCM && authsize < DES_BLOCK_SIZE) || - (c_mode == SEC_CMODE_CCM && (authsize < MIN_MAC_LEN || - authsize & MAC_LEN_MASK)))) { - dev_err(dev, "aead input mac length error!\n"); + if (unlikely(req->cryptlen + req->assoclen > MAX_INPUT_DATA_LEN || + req->assoclen > SEC_MAX_AAD_LEN)) { + dev_err(dev, "aead input spec error!\n"); return -EINVAL; } @@ -2273,7 +2270,7 @@ if (sreq->c_req.encrypt) sreq->c_req.c_len = req->cryptlen; else - sreq->c_req.c_len = req->cryptlen - authsize; + sreq->c_req.c_len = req->cryptlen - sz; if (c_mode == SEC_CMODE_CBC) { if (unlikely(sreq->c_req.c_len & (AES_BLOCK_SIZE - 1))) { dev_err(dev, "aead crypto length error!\n"); @@ -2299,8 +2296,8 @@ if (ctx->sec->qm.ver == QM_HW_V2) { if (unlikely(!req->cryptlen || (!sreq->c_req.encrypt && - req->cryptlen <= authsize))) { - ctx->a_ctx.fallback = true; + req->cryptlen <= authsize))) { + sreq->aead_req.fallback = true; return -EINVAL; } } @@ -2328,16 +2325,9 @@ bool encrypt) { struct sec_auth_ctx *a_ctx = &ctx->a_ctx; - struct device *dev = ctx->dev; struct aead_request *subreq; int ret; - /* Kunpeng920 aead mode not support input 0 size */ - if (!a_ctx->fallback_aead_tfm) { - dev_err(dev, "aead fallback tfm is NULL!\n"); - return -EINVAL; - } - subreq = aead_request_alloc(a_ctx->fallback_aead_tfm, GFP_KERNEL); if (!subreq) return -ENOMEM; @@ -2369,10 +2359,11 @@ req->aead_req.aead_req = a_req; req->c_req.encrypt = encrypt; req->ctx = ctx; + req->aead_req.fallback = false; ret = sec_aead_param_check(ctx, req); if (unlikely(ret)) { - if (ctx->a_ctx.fallback) + if (req->aead_req.fallback) return sec_aead_soft_crypto(ctx, a_req, encrypt); return -EINVAL; } --- linux-xilinx-6.8.0.orig/drivers/crypto/hisilicon/sec2/sec_crypto.h +++ linux-xilinx-6.8.0/drivers/crypto/hisilicon/sec2/sec_crypto.h @@ -23,17 +23,6 @@ SEC_A_HMAC_SHA512 = 0x15, }; -enum sec_mac_len { - SEC_HMAC_CCM_MAC = 16, - SEC_HMAC_GCM_MAC = 16, - SEC_SM3_MAC = 32, - SEC_HMAC_SM3_MAC = 32, - SEC_HMAC_MD5_MAC = 16, - SEC_HMAC_SHA1_MAC = 20, - SEC_HMAC_SHA256_MAC = 32, - SEC_HMAC_SHA512_MAC = 64, -}; - enum sec_cmode { SEC_CMODE_ECB = 0x0, SEC_CMODE_CBC = 0x1, --- linux-xilinx-6.8.0.orig/drivers/crypto/hisilicon/sec2/sec_main.c +++ linux-xilinx-6.8.0/drivers/crypto/hisilicon/sec2/sec_main.c @@ -152,7 +152,7 @@ {SEC_CORE_TYPE_NUM_CAP, 0x313c, 16, GENMASK(3, 0), 0x1, 0x1, 0x1}, {SEC_CORE_NUM_CAP, 0x313c, 8, GENMASK(7, 0), 0x4, 0x4, 0x4}, {SEC_CORES_PER_CLUSTER_NUM_CAP, 0x313c, 0, GENMASK(7, 0), 0x4, 0x4, 0x4}, - {SEC_CORE_ENABLE_BITMAP, 0x3140, 32, GENMASK(31, 0), 0x17F, 0x17F, 0xF}, + {SEC_CORE_ENABLE_BITMAP, 0x3140, 0, GENMASK(31, 0), 0x17F, 0x17F, 0xF}, {SEC_DRV_ALG_BITMAP_LOW, 0x3144, 0, GENMASK(31, 0), 0x18050CB, 0x18050CB, 0x18670CF}, {SEC_DRV_ALG_BITMAP_HIGH, 0x3148, 0, GENMASK(31, 0), 0x395C, 0x395C, 0x395C}, {SEC_DEV_ALG_BITMAP_LOW, 0x314c, 0, GENMASK(31, 0), 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF}, @@ -1006,11 +1006,15 @@ static void sec_clear_hw_err_status(struct hisi_qm *qm, u32 err_sts) { - u32 nfe; - writel(err_sts, qm->io_base + SEC_CORE_INT_SOURCE); - nfe = hisi_qm_get_hw_info(qm, sec_basic_info, SEC_NFE_MASK_CAP, qm->cap_ver); - writel(nfe, qm->io_base + SEC_RAS_NFE_REG); +} + +static void sec_disable_error_report(struct hisi_qm *qm, u32 err_type) +{ + u32 nfe_mask; + + nfe_mask = hisi_qm_get_hw_info(qm, sec_basic_info, SEC_NFE_MASK_CAP, qm->cap_ver); + writel(nfe_mask & (~err_type), qm->io_base + SEC_RAS_NFE_REG); } static void sec_open_axi_master_ooo(struct hisi_qm *qm) @@ -1022,6 +1026,27 @@ writel(val | SEC_AXI_SHUTDOWN_ENABLE, qm->io_base + SEC_CONTROL_REG); } +static enum acc_err_result sec_get_err_result(struct hisi_qm *qm) +{ + u32 err_status; + + err_status = sec_get_hw_err_status(qm); + if (err_status) { + if (err_status & qm->err_info.ecc_2bits_mask) + qm->err_status.is_dev_ecc_mbit = true; + sec_log_hw_error(qm, err_status); + + if (err_status & qm->err_info.dev_reset_mask) { + /* Disable the same error reporting until device is recovered. */ + sec_disable_error_report(qm, err_status); + return ACC_ERR_NEED_RESET; + } + sec_clear_hw_err_status(qm, err_status); + } + + return ACC_ERR_RECOVERED; +} + static void sec_err_info_init(struct hisi_qm *qm) { struct hisi_qm_err_info *err_info = &qm->err_info; @@ -1048,12 +1073,12 @@ .hw_err_disable = sec_hw_error_disable, .get_dev_hw_err_status = sec_get_hw_err_status, .clear_dev_hw_err_status = sec_clear_hw_err_status, - .log_dev_hw_err = sec_log_hw_error, .open_axi_master_ooo = sec_open_axi_master_ooo, .open_sva_prefetch = sec_open_sva_prefetch, .close_sva_prefetch = sec_close_sva_prefetch, .show_last_dfx_regs = sec_show_last_dfx_regs, .err_info_init = sec_err_info_init, + .get_err_result = sec_get_err_result, }; static int sec_pf_probe_init(struct sec_dev *sec) @@ -1061,9 +1086,6 @@ struct hisi_qm *qm = &sec->qm; int ret; - qm->err_ini = &sec_err_ini; - qm->err_ini->err_info_init(qm); - ret = sec_set_user_domain_and_cache(qm); if (ret) return ret; @@ -1118,6 +1140,7 @@ qm->qp_num = pf_q_num; qm->debug.curr_qm_qp_num = pf_q_num; qm->qm_list = &sec_devices; + qm->err_ini = &sec_err_ini; if (pf_q_num_flag) set_bit(QM_MODULE_PARAM, &qm->misc_ctl); } else if (qm->fun_type == QM_HW_VF && qm->ver == QM_HW_V1) { @@ -1182,6 +1205,12 @@ static void sec_probe_uninit(struct hisi_qm *qm) { + if (qm->fun_type == QM_HW_VF) + return; + + sec_debug_regs_clear(qm); + sec_show_last_regs_uninit(qm); + sec_close_sva_prefetch(qm); hisi_qm_dev_err_uninit(qm); } @@ -1270,7 +1299,6 @@ sec_debugfs_exit(qm); hisi_qm_stop(qm, QM_NORMAL); err_probe_uninit: - sec_show_last_regs_uninit(qm); sec_probe_uninit(qm); err_qm_uninit: sec_qm_uninit(qm); @@ -1292,11 +1320,6 @@ sec_debugfs_exit(qm); (void)hisi_qm_stop(qm, QM_NORMAL); - - if (qm->fun_type == QM_HW_PF) - sec_debug_regs_clear(qm); - sec_show_last_regs_uninit(qm); - sec_probe_uninit(qm); sec_qm_uninit(qm); --- linux-xilinx-6.8.0.orig/drivers/crypto/hisilicon/sgl.c +++ linux-xilinx-6.8.0/drivers/crypto/hisilicon/sgl.c @@ -228,7 +228,7 @@ dma_addr_t curr_sgl_dma = 0; struct acc_hw_sge *curr_hw_sge; struct scatterlist *sg; - int sg_n; + int sg_n, ret; if (!dev || !sgl || !pool || !hw_sgl_dma) return ERR_PTR(-EINVAL); @@ -243,14 +243,15 @@ if (sg_n_mapped > pool->sge_nr) { dev_err(dev, "the number of entries in input scatterlist is bigger than SGL pool setting.\n"); - return ERR_PTR(-EINVAL); + ret = -EINVAL; + goto err_unmap; } curr_hw_sgl = acc_get_sgl(pool, index, &curr_sgl_dma); if (IS_ERR(curr_hw_sgl)) { dev_err(dev, "Get SGL error!\n"); - dma_unmap_sg(dev, sgl, sg_n, DMA_BIDIRECTIONAL); - return ERR_PTR(-ENOMEM); + ret = -ENOMEM; + goto err_unmap; } curr_hw_sgl->entry_length_in_sgl = cpu_to_le16(pool->sge_nr); curr_hw_sge = curr_hw_sgl->sge_entries; @@ -265,6 +266,11 @@ *hw_sgl_dma = curr_sgl_dma; return curr_hw_sgl; + +err_unmap: + dma_unmap_sg(dev, sgl, sg_n, DMA_BIDIRECTIONAL); + + return ERR_PTR(ret); } EXPORT_SYMBOL_GPL(hisi_acc_sg_buf_map_to_hw_sgl); --- linux-xilinx-6.8.0.orig/drivers/crypto/hisilicon/zip/zip_main.c +++ linux-xilinx-6.8.0/drivers/crypto/hisilicon/zip/zip_main.c @@ -1069,11 +1069,15 @@ static void hisi_zip_clear_hw_err_status(struct hisi_qm *qm, u32 err_sts) { - u32 nfe; - writel(err_sts, qm->io_base + HZIP_CORE_INT_SOURCE); - nfe = hisi_qm_get_hw_info(qm, zip_basic_cap_info, ZIP_NFE_MASK_CAP, qm->cap_ver); - writel(nfe, qm->io_base + HZIP_CORE_INT_RAS_NFE_ENB); +} + +static void hisi_zip_disable_error_report(struct hisi_qm *qm, u32 err_type) +{ + u32 nfe_mask; + + nfe_mask = hisi_qm_get_hw_info(qm, zip_basic_cap_info, ZIP_NFE_MASK_CAP, qm->cap_ver); + writel(nfe_mask & (~err_type), qm->io_base + HZIP_CORE_INT_RAS_NFE_ENB); } static void hisi_zip_open_axi_master_ooo(struct hisi_qm *qm) @@ -1103,6 +1107,27 @@ qm->io_base + HZIP_CORE_INT_SET); } +static enum acc_err_result hisi_zip_get_err_result(struct hisi_qm *qm) +{ + u32 err_status; + + err_status = hisi_zip_get_hw_err_status(qm); + if (err_status) { + if (err_status & qm->err_info.ecc_2bits_mask) + qm->err_status.is_dev_ecc_mbit = true; + hisi_zip_log_hw_error(qm, err_status); + + if (err_status & qm->err_info.dev_reset_mask) { + /* Disable the same error reporting until device is recovered. */ + hisi_zip_disable_error_report(qm, err_status); + return ACC_ERR_NEED_RESET; + } + hisi_zip_clear_hw_err_status(qm, err_status); + } + + return ACC_ERR_RECOVERED; +} + static void hisi_zip_err_info_init(struct hisi_qm *qm) { struct hisi_qm_err_info *err_info = &qm->err_info; @@ -1130,13 +1155,13 @@ .hw_err_disable = hisi_zip_hw_error_disable, .get_dev_hw_err_status = hisi_zip_get_hw_err_status, .clear_dev_hw_err_status = hisi_zip_clear_hw_err_status, - .log_dev_hw_err = hisi_zip_log_hw_error, .open_axi_master_ooo = hisi_zip_open_axi_master_ooo, .close_axi_master_ooo = hisi_zip_close_axi_master_ooo, .open_sva_prefetch = hisi_zip_open_sva_prefetch, .close_sva_prefetch = hisi_zip_close_sva_prefetch, .show_last_dfx_regs = hisi_zip_show_last_dfx_regs, .err_info_init = hisi_zip_err_info_init, + .get_err_result = hisi_zip_get_err_result, }; static int hisi_zip_pf_probe_init(struct hisi_zip *hisi_zip) @@ -1151,8 +1176,6 @@ hisi_zip->ctrl = ctrl; ctrl->hisi_zip = hisi_zip; - qm->err_ini = &hisi_zip_err_ini; - qm->err_ini->err_info_init(qm); ret = hisi_zip_set_user_domain_and_cache(qm); if (ret) @@ -1213,6 +1236,7 @@ qm->qp_num = pf_q_num; qm->debug.curr_qm_qp_num = pf_q_num; qm->qm_list = &zip_devices; + qm->err_ini = &hisi_zip_err_ini; if (pf_q_num_flag) set_bit(QM_MODULE_PARAM, &qm->misc_ctl); } else if (qm->fun_type == QM_HW_VF && qm->ver == QM_HW_V1) { @@ -1279,6 +1303,16 @@ return 0; } +static void hisi_zip_probe_uninit(struct hisi_qm *qm) +{ + if (qm->fun_type == QM_HW_VF) + return; + + hisi_zip_show_last_regs_uninit(qm); + hisi_zip_close_sva_prefetch(qm); + hisi_qm_dev_err_uninit(qm); +} + static int hisi_zip_probe(struct pci_dev *pdev, const struct pci_device_id *id) { struct hisi_zip *hisi_zip; @@ -1305,7 +1339,7 @@ ret = hisi_qm_start(qm); if (ret) - goto err_dev_err_uninit; + goto err_probe_uninit; ret = hisi_zip_debugfs_init(qm); if (ret) @@ -1344,9 +1378,8 @@ hisi_zip_debugfs_exit(qm); hisi_qm_stop(qm, QM_NORMAL); -err_dev_err_uninit: - hisi_zip_show_last_regs_uninit(qm); - hisi_qm_dev_err_uninit(qm); +err_probe_uninit: + hisi_zip_probe_uninit(qm); err_qm_uninit: hisi_zip_qm_uninit(qm); @@ -1368,8 +1401,7 @@ hisi_zip_debugfs_exit(qm); hisi_qm_stop(qm, QM_NORMAL); - hisi_zip_show_last_regs_uninit(qm); - hisi_qm_dev_err_uninit(qm); + hisi_zip_probe_uninit(qm); hisi_zip_qm_uninit(qm); } --- linux-xilinx-6.8.0.orig/drivers/crypto/inside-secure/safexcel_hash.c +++ linux-xilinx-6.8.0/drivers/crypto/inside-secure/safexcel_hash.c @@ -2093,7 +2093,7 @@ safexcel_ahash_cra_init(tfm); ctx->aes = kmalloc(sizeof(*ctx->aes), GFP_KERNEL); - return PTR_ERR_OR_ZERO(ctx->aes); + return ctx->aes == NULL ? -ENOMEM : 0; } static void safexcel_xcbcmac_cra_exit(struct crypto_tfm *tfm) --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/iaa/iaa_crypto_main.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/iaa/iaa_crypto_main.c @@ -173,7 +173,7 @@ async_mode = false; use_irq = false; } else if (sysfs_streq(name, "async")) { - async_mode = true; + async_mode = false; use_irq = false; } else if (sysfs_streq(name, "async_irq")) { async_mode = true; @@ -599,10 +599,10 @@ if (!device_mode) continue; - free_device_compression_mode(iaa_device, device_mode); - iaa_device->compression_modes[i] = NULL; if (iaa_compression_modes[i]->free) iaa_compression_modes[i]->free(device_mode); + free_device_compression_mode(iaa_device, device_mode); + iaa_device->compression_modes[i] = NULL; } } @@ -908,6 +908,8 @@ return -EINVAL; cpus_per_iaa = (nr_nodes * nr_cpus_per_node) / nr_iaa; + if (!cpus_per_iaa) + cpus_per_iaa = 1; out: return 0; } @@ -923,10 +925,12 @@ } } - if (nr_iaa) + if (nr_iaa) { cpus_per_iaa = (nr_nodes * nr_cpus_per_node) / nr_iaa; - else - cpus_per_iaa = 0; + if (!cpus_per_iaa) + cpus_per_iaa = 1; + } else + cpus_per_iaa = 1; } static int wq_table_add_wqs(int iaa, int cpu) @@ -1324,7 +1328,7 @@ *compression_crc = idxd_desc->iax_completion->crc; - if (!ctx->async_mode) + if (!ctx->async_mode || disable_async) idxd_free_desc(wq, idxd_desc); out: return ret; @@ -1570,7 +1574,7 @@ *dlen = req->dlen; - if (!ctx->async_mode) + if (!ctx->async_mode || disable_async) idxd_free_desc(wq, idxd_desc); /* Update stats */ --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/ixp4xx/ixp4xx_crypto.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/ixp4xx/ixp4xx_crypto.c @@ -471,6 +471,7 @@ return -ENODEV; } npe_id = npe_spec.args[0]; + of_node_put(npe_spec.np); ret = of_parse_phandle_with_fixed_args(np, "queue-rx", 1, 0, &queue_spec); @@ -479,6 +480,7 @@ return -ENODEV; } recv_qid = queue_spec.args[0]; + of_node_put(queue_spec.np); ret = of_parse_phandle_with_fixed_args(np, "queue-txready", 1, 0, &queue_spec); @@ -487,6 +489,7 @@ return -ENODEV; } send_qid = queue_spec.args[0]; + of_node_put(queue_spec.np); } else { /* * Hardcoded engine when using platform data, this goes away --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/Kconfig +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/Kconfig @@ -106,3 +106,17 @@ To compile this as a module, choose M here: the module will be called qat_c62xvf. + +config CRYPTO_DEV_QAT_ERROR_INJECTION + bool "Support for Intel(R) QAT Devices Heartbeat Error Injection" + depends on CRYPTO_DEV_QAT + depends on DEBUG_FS + help + Enables a mechanism that allows to inject a heartbeat error on + Intel(R) QuickAssist devices for testing purposes. + + This is intended for developer use only. + If unsure, say N. + + This functionality is available via debugfs entry of the Intel(R) + QuickAssist device --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_420xx/adf_420xx_hw_data.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_420xx/adf_420xx_hw_data.c @@ -296,7 +296,7 @@ { if (adf_gen4_init_thd2arb_map(accel_dev)) dev_warn(&GET_DEV(accel_dev), - "Generate of the thread to arbiter map failed"); + "Failed to generate thread to arbiter mapping"); return GET_HW_DATA(accel_dev)->thd_to_arb_map; } @@ -372,6 +372,13 @@ if (!fw_config) return 0; + /* If dcc, all rings handle compression requests */ + if (adf_get_service_enabled(accel_dev) == SVC_DCC) { + for (i = 0; i < RP_GROUP_COUNT; i++) + rps[i] = COMP; + goto set_mask; + } + for (i = 0; i < RP_GROUP_COUNT; i++) { switch (fw_config[i].ae_mask) { case ADF_AE_GROUP_0: @@ -400,6 +407,7 @@ } } +set_mask: ring_to_svc_map = rps[RP_GROUP_0] << ADF_CFG_SERV_RING_PAIR_0_SHIFT | rps[RP_GROUP_1] << ADF_CFG_SERV_RING_PAIR_1_SHIFT | rps[RP_GROUP_0] << ADF_CFG_SERV_RING_PAIR_2_SHIFT | @@ -420,7 +428,7 @@ else id = -EINVAL; - if (id < 0 || id > num_objs) + if (id < 0 || id >= num_objs) return NULL; return fw_objs[id]; --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c @@ -208,7 +208,7 @@ { if (adf_gen4_init_thd2arb_map(accel_dev)) dev_warn(&GET_DEV(accel_dev), - "Generate of the thread to arbiter map failed"); + "Failed to generate thread to arbiter mapping"); return GET_HW_DATA(accel_dev)->thd_to_arb_map; } @@ -331,6 +331,13 @@ if (!fw_config) return 0; + /* If dcc, all rings handle compression requests */ + if (adf_get_service_enabled(accel_dev) == SVC_DCC) { + for (i = 0; i < RP_GROUP_COUNT; i++) + rps[i] = COMP; + goto set_mask; + } + for (i = 0; i < RP_GROUP_COUNT; i++) { switch (fw_config[i].ae_mask) { case ADF_AE_GROUP_0: @@ -359,6 +366,7 @@ } } +set_mask: ring_to_svc_map = rps[RP_GROUP_0] << ADF_CFG_SERV_RING_PAIR_0_SHIFT | rps[RP_GROUP_1] << ADF_CFG_SERV_RING_PAIR_1_SHIFT | rps[RP_GROUP_0] << ADF_CFG_SERV_RING_PAIR_2_SHIFT | @@ -379,7 +387,7 @@ else id = -EINVAL; - if (id < 0 || id > num_objs) + if (id < 0 || id >= num_objs) return NULL; return fw_objs[id]; --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_4xxx/adf_drv.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_4xxx/adf_drv.c @@ -197,7 +197,9 @@ MODULE_LICENSE("Dual BSD/GPL"); MODULE_AUTHOR("Intel"); MODULE_FIRMWARE(ADF_4XXX_FW); +MODULE_FIRMWARE(ADF_402XX_FW); MODULE_FIRMWARE(ADF_4XXX_MMP); +MODULE_FIRMWARE(ADF_402XX_MMP); MODULE_DESCRIPTION("Intel(R) QuickAssist Technology"); MODULE_VERSION(ADF_DRV_VERSION); MODULE_SOFTDEP("pre: crypto-intel_qat"); --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/Makefile +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/Makefile @@ -53,3 +53,5 @@ adf_pfvf_pf_msg.o adf_pfvf_pf_proto.o \ adf_pfvf_vf_msg.o adf_pfvf_vf_proto.o \ adf_gen2_pfvf.o adf_gen4_pfvf.o + +intel_qat-$(CONFIG_CRYPTO_DEV_QAT_ERROR_INJECTION) += adf_heartbeat_inject.o --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h @@ -332,6 +332,7 @@ struct ratelimit_state vf2pf_ratelimit; u32 vf_nr; bool init; + bool restarting; u8 vf_compat_ver; }; @@ -401,6 +402,7 @@ struct adf_error_counters ras_errors; struct mutex state_lock; /* protect state of the device */ bool is_vf; + bool autoreset_on_error; u32 accel_id; }; #endif --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_aer.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_aer.c @@ -7,8 +7,15 @@ #include #include "adf_accel_devices.h" #include "adf_common_drv.h" +#include "adf_pfvf_pf_msg.h" + +struct adf_fatal_error_data { + struct adf_accel_dev *accel_dev; + struct work_struct work; +}; static struct workqueue_struct *device_reset_wq; +static struct workqueue_struct *device_sriov_wq; static pci_ers_result_t adf_error_detected(struct pci_dev *pdev, pci_channel_state_t state) @@ -26,6 +33,19 @@ return PCI_ERS_RESULT_DISCONNECT; } + set_bit(ADF_STATUS_RESTARTING, &accel_dev->status); + if (accel_dev->hw_device->exit_arb) { + dev_dbg(&pdev->dev, "Disabling arbitration\n"); + accel_dev->hw_device->exit_arb(accel_dev); + } + adf_error_notifier(accel_dev); + adf_pf2vf_notify_fatal_error(accel_dev); + adf_dev_restarting_notify(accel_dev); + adf_pf2vf_notify_restarting(accel_dev); + adf_pf2vf_wait_for_restarting_complete(accel_dev); + pci_clear_master(pdev); + adf_dev_down(accel_dev, false); + return PCI_ERS_RESULT_NEED_RESET; } @@ -37,6 +57,13 @@ struct work_struct reset_work; }; +/* sriov dev data */ +struct adf_sriov_dev_data { + struct adf_accel_dev *accel_dev; + struct completion compl; + struct work_struct sriov_work; +}; + void adf_reset_sbr(struct adf_accel_dev *accel_dev) { struct pci_dev *pdev = accel_to_pci_dev(accel_dev); @@ -82,11 +109,22 @@ } } +static void adf_device_sriov_worker(struct work_struct *work) +{ + struct adf_sriov_dev_data *sriov_data = + container_of(work, struct adf_sriov_dev_data, sriov_work); + + adf_reenable_sriov(sriov_data->accel_dev); + complete(&sriov_data->compl); +} + static void adf_device_reset_worker(struct work_struct *work) { struct adf_reset_dev_data *reset_data = container_of(work, struct adf_reset_dev_data, reset_work); struct adf_accel_dev *accel_dev = reset_data->accel_dev; + unsigned long wait_jiffies = msecs_to_jiffies(10000); + struct adf_sriov_dev_data sriov_data; adf_dev_restarting_notify(accel_dev); if (adf_dev_restart(accel_dev)) { @@ -97,14 +135,22 @@ WARN(1, "QAT: device restart failed. Device is unusable\n"); return; } + + sriov_data.accel_dev = accel_dev; + init_completion(&sriov_data.compl); + INIT_WORK(&sriov_data.sriov_work, adf_device_sriov_worker); + queue_work(device_sriov_wq, &sriov_data.sriov_work); + if (wait_for_completion_timeout(&sriov_data.compl, wait_jiffies)) + adf_pf2vf_notify_restarted(accel_dev); + adf_dev_restarted_notify(accel_dev); clear_bit(ADF_STATUS_RESTARTING, &accel_dev->status); /* The dev is back alive. Notify the caller if in sync mode */ - if (reset_data->mode == ADF_DEV_RESET_SYNC) - complete(&reset_data->compl); - else + if (reset_data->mode == ADF_DEV_RESET_ASYNC) kfree(reset_data); + else + complete(&reset_data->compl); } static int adf_dev_aer_schedule_reset(struct adf_accel_dev *accel_dev, @@ -136,6 +182,7 @@ if (!timeout) { dev_err(&GET_DEV(accel_dev), "Reset device timeout expired\n"); + cancel_work_sync(&reset_data->reset_work); ret = -EFAULT; } kfree(reset_data); @@ -147,14 +194,25 @@ static pci_ers_result_t adf_slot_reset(struct pci_dev *pdev) { struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev); + int res = 0; if (!accel_dev) { pr_err("QAT: Can't find acceleration device\n"); return PCI_ERS_RESULT_DISCONNECT; } - if (adf_dev_aer_schedule_reset(accel_dev, ADF_DEV_RESET_SYNC)) + + if (!pdev->is_busmaster) + pci_set_master(pdev); + pci_restore_state(pdev); + pci_save_state(pdev); + res = adf_dev_up(accel_dev, false); + if (res && res != -EALREADY) return PCI_ERS_RESULT_DISCONNECT; + adf_reenable_sriov(accel_dev); + adf_pf2vf_notify_restarted(accel_dev); + adf_dev_restarted_notify(accel_dev); + clear_bit(ADF_STATUS_RESTARTING, &accel_dev->status); return PCI_ERS_RESULT_RECOVERED; } @@ -171,11 +229,65 @@ }; EXPORT_SYMBOL_GPL(adf_err_handler); +int adf_dev_autoreset(struct adf_accel_dev *accel_dev) +{ + if (accel_dev->autoreset_on_error) + return adf_dev_aer_schedule_reset(accel_dev, ADF_DEV_RESET_ASYNC); + + return 0; +} + +static void adf_notify_fatal_error_worker(struct work_struct *work) +{ + struct adf_fatal_error_data *wq_data = + container_of(work, struct adf_fatal_error_data, work); + struct adf_accel_dev *accel_dev = wq_data->accel_dev; + struct adf_hw_device_data *hw_device = accel_dev->hw_device; + + adf_error_notifier(accel_dev); + + if (!accel_dev->is_vf) { + /* Disable arbitration to stop processing of new requests */ + if (accel_dev->autoreset_on_error && hw_device->exit_arb) + hw_device->exit_arb(accel_dev); + if (accel_dev->pf.vf_info) + adf_pf2vf_notify_fatal_error(accel_dev); + adf_dev_autoreset(accel_dev); + } + + kfree(wq_data); +} + +int adf_notify_fatal_error(struct adf_accel_dev *accel_dev) +{ + struct adf_fatal_error_data *wq_data; + + wq_data = kzalloc(sizeof(*wq_data), GFP_ATOMIC); + if (!wq_data) + return -ENOMEM; + + wq_data->accel_dev = accel_dev; + INIT_WORK(&wq_data->work, adf_notify_fatal_error_worker); + adf_misc_wq_queue_work(&wq_data->work); + + return 0; +} + int adf_init_aer(void) { device_reset_wq = alloc_workqueue("qat_device_reset_wq", WQ_MEM_RECLAIM, 0); - return !device_reset_wq ? -EFAULT : 0; + if (!device_reset_wq) + return -EFAULT; + + device_sriov_wq = alloc_workqueue("qat_device_sriov_wq", 0, 0); + if (!device_sriov_wq) { + destroy_workqueue(device_reset_wq); + device_reset_wq = NULL; + return -EFAULT; + } + + return 0; } void adf_exit_aer(void) @@ -183,4 +295,8 @@ if (device_reset_wq) destroy_workqueue(device_reset_wq); device_reset_wq = NULL; + + if (device_sriov_wq) + destroy_workqueue(device_sriov_wq); + device_sriov_wq = NULL; } --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_cfg.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_cfg.c @@ -290,17 +290,19 @@ * 3. if the key exists with the same value, then return without doing * anything (the newly created key_val is freed). */ + down_write(&cfg->lock); if (!adf_cfg_key_val_get(accel_dev, section_name, key, temp_val)) { if (strncmp(temp_val, key_val->val, sizeof(temp_val))) { adf_cfg_keyval_remove(key, section); } else { kfree(key_val); - return 0; + goto out; } } - down_write(&cfg->lock); adf_cfg_keyval_add(key_val, section); + +out: up_write(&cfg->lock); return 0; } --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_cfg_strings.h +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_cfg_strings.h @@ -49,5 +49,6 @@ ADF_ETRMGR_BANK "%d" ADF_ETRMGR_CORE_AFFINITY #define ADF_ACCEL_STR "Accelerator%d" #define ADF_HEARTBEAT_TIMER "HeartbeatTimer" +#define ADF_SRIOV_ENABLED "SriovEnabled" #endif --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_clock.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_clock.c @@ -83,6 +83,9 @@ } delta_us = timespec_to_us(&ts3) - timespec_to_us(&ts1); + if (!delta_us) + return -EINVAL; + temp = (timestamp2 - timestamp1) * ME_CLK_DIVIDER * 10; temp = DIV_ROUND_CLOSEST_ULL(temp, delta_us); /* --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_cnv_dbgfs.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_cnv_dbgfs.c @@ -16,7 +16,6 @@ #define CNV_ERR_INFO_MASK GENMASK(11, 0) #define CNV_ERR_TYPE_MASK GENMASK(15, 12) -#define CNV_SLICE_ERR_MASK GENMASK(7, 0) #define CNV_SLICE_ERR_SIGN_BIT_INDEX 7 #define CNV_DELTA_ERR_SIGN_BIT_INDEX 11 --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_common_drv.h +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_common_drv.h @@ -40,6 +40,7 @@ ADF_EVENT_SHUTDOWN, ADF_EVENT_RESTARTING, ADF_EVENT_RESTARTED, + ADF_EVENT_FATAL_ERROR, }; struct service_hndl { @@ -60,6 +61,8 @@ void adf_devmgr_update_class_index(struct adf_hw_device_data *hw_data); void adf_clean_vf_map(bool); +int adf_notify_fatal_error(struct adf_accel_dev *accel_dev); +void adf_error_notifier(struct adf_accel_dev *accel_dev); int adf_devmgr_add_dev(struct adf_accel_dev *accel_dev, struct adf_accel_dev *pf); void adf_devmgr_rm_dev(struct adf_accel_dev *accel_dev, @@ -84,12 +87,14 @@ extern const struct pci_error_handlers adf_err_handler; void adf_reset_sbr(struct adf_accel_dev *accel_dev); void adf_reset_flr(struct adf_accel_dev *accel_dev); +int adf_dev_autoreset(struct adf_accel_dev *accel_dev); void adf_dev_restore(struct adf_accel_dev *accel_dev); int adf_init_aer(void); void adf_exit_aer(void); int adf_init_arb(struct adf_accel_dev *accel_dev); void adf_exit_arb(struct adf_accel_dev *accel_dev); void adf_update_ring_arb(struct adf_etr_ring_data *ring); +int adf_disable_arb_thd(struct adf_accel_dev *accel_dev, u32 ae, u32 thr); int adf_dev_get(struct adf_accel_dev *accel_dev); void adf_dev_put(struct adf_accel_dev *accel_dev); @@ -188,6 +193,7 @@ #if defined(CONFIG_PCI_IOV) int adf_sriov_configure(struct pci_dev *pdev, int numvfs); void adf_disable_sriov(struct adf_accel_dev *accel_dev); +void adf_reenable_sriov(struct adf_accel_dev *accel_dev); void adf_enable_vf2pf_interrupts(struct adf_accel_dev *accel_dev, u32 vf_mask); void adf_disable_all_vf2pf_interrupts(struct adf_accel_dev *accel_dev); bool adf_recv_and_handle_pf2vf_msg(struct adf_accel_dev *accel_dev); @@ -208,6 +214,10 @@ { } +static inline void adf_reenable_sriov(struct adf_accel_dev *accel_dev) +{ +} + static inline int adf_init_pf_wq(void) { return 0; --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_dbgfs.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_dbgfs.c @@ -22,18 +22,13 @@ void adf_dbgfs_init(struct adf_accel_dev *accel_dev) { char name[ADF_DEVICE_NAME_LENGTH]; - void *ret; /* Create dev top level debugfs entry */ snprintf(name, sizeof(name), "%s%s_%s", ADF_DEVICE_NAME_PREFIX, accel_dev->hw_device->dev_class->name, pci_name(accel_dev->accel_pci_dev.pci_dev)); - ret = debugfs_create_dir(name, NULL); - if (IS_ERR_OR_NULL(ret)) - return; - - accel_dev->debugfs_dir = ret; + accel_dev->debugfs_dir = debugfs_create_dir(name, NULL); adf_cfg_dev_dbgfs_add(accel_dev); } @@ -59,9 +54,6 @@ */ void adf_dbgfs_add(struct adf_accel_dev *accel_dev) { - if (!accel_dev->debugfs_dir) - return; - if (!accel_dev->is_vf) { adf_fw_counters_dbgfs_add(accel_dev); adf_heartbeat_dbgfs_add(accel_dev); @@ -77,9 +69,6 @@ */ void adf_dbgfs_rm(struct adf_accel_dev *accel_dev) { - if (!accel_dev->debugfs_dir) - return; - if (!accel_dev->is_vf) { adf_tl_dbgfs_rm(accel_dev); adf_cnv_dbgfs_rm(accel_dev); --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_gen2_pfvf.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_gen2_pfvf.c @@ -100,7 +100,9 @@ errmsk3 |= ADF_GEN2_ERR_MSK_VF2PF(ADF_GEN2_VF_MSK); ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, errmsk3); - errmsk3 &= ADF_GEN2_ERR_MSK_VF2PF(sources | disabled); + /* Update only section of errmsk3 related to VF2PF */ + errmsk3 &= ~ADF_GEN2_ERR_MSK_VF2PF(ADF_GEN2_VF_MSK); + errmsk3 |= ADF_GEN2_ERR_MSK_VF2PF(sources | disabled); ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, errmsk3); /* Return the sources of the (new) interrupt(s) */ --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.c @@ -398,6 +398,9 @@ ADF_GEN4_ADMIN_ACCELENGINES; if (srv_id == SVC_DCC) { + if (ae_cnt > ICP_QAT_HW_AE_DELIMITER) + return -EINVAL; + memcpy(thd2arb_map, thrd_to_arb_map_dcc, array_size(sizeof(*thd2arb_map), ae_cnt)); return 0; --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_gen4_ras.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_gen4_ras.c @@ -1007,8 +1007,7 @@ static bool adf_handle_ssmcpppar_err(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 iastatssm) { - u32 reg = ADF_CSR_RD(csr, ADF_GEN4_SSMCPPERR); - u32 bits_num = BITS_PER_REG(reg); + u32 reg, bits_num = BITS_PER_REG(reg); bool reset_required = false; unsigned long errs_bits; u32 bit_iterator; @@ -1106,8 +1105,7 @@ static bool adf_handle_ser_err_ssmsh(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 iastatssm) { - u32 reg = ADF_CSR_RD(csr, ADF_GEN4_SER_ERR_SSMSH); - u32 bits_num = BITS_PER_REG(reg); + u32 reg, bits_num = BITS_PER_REG(reg); bool reset_required = false; unsigned long errs_bits; u32 bit_iterator; --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_gen4_tl.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_gen4_tl.c @@ -149,5 +149,6 @@ tl_data->sl_exec_counters = sl_exec_counters; tl_data->rp_counters = rp_counters; tl_data->num_rp_counters = ARRAY_SIZE(rp_counters); + tl_data->max_sl_cnt = ADF_GEN4_TL_MAX_SLICES_PER_TYPE; } EXPORT_SYMBOL_GPL(adf_gen4_init_tl_data); --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_heartbeat.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_heartbeat.c @@ -23,12 +23,6 @@ #define ADF_HB_EMPTY_SIG 0xA5A5A5A5 -/* Heartbeat counter pair */ -struct hb_cnt_pair { - __u16 resp_heartbeat_cnt; - __u16 req_heartbeat_cnt; -}; - static int adf_hb_check_polling_freq(struct adf_accel_dev *accel_dev) { u64 curr_time = adf_clock_get_current_time(); @@ -211,6 +205,19 @@ return ret; } +static void adf_heartbeat_reset(struct adf_accel_dev *accel_dev) +{ + u64 curr_time = adf_clock_get_current_time(); + u64 time_since_reset = curr_time - accel_dev->heartbeat->last_hb_reset_time; + + if (time_since_reset < ADF_CFG_HB_RESET_MS) + return; + + accel_dev->heartbeat->last_hb_reset_time = curr_time; + if (adf_notify_fatal_error(accel_dev)) + dev_err(&GET_DEV(accel_dev), "Failed to notify fatal error\n"); +} + void adf_heartbeat_status(struct adf_accel_dev *accel_dev, enum adf_device_heartbeat_status *hb_status) { @@ -235,6 +242,7 @@ "Heartbeat ERROR: QAT is not responding.\n"); *hb_status = HB_DEV_UNRESPONSIVE; hb->hb_failed_counter++; + adf_heartbeat_reset(accel_dev); return; } --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_heartbeat.h +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_heartbeat.h @@ -13,17 +13,26 @@ #define ADF_CFG_HB_TIMER_DEFAULT_MS 500 #define ADF_CFG_HB_COUNT_THRESHOLD 3 +#define ADF_CFG_HB_RESET_MS 5000 + enum adf_device_heartbeat_status { HB_DEV_UNRESPONSIVE = 0, HB_DEV_ALIVE, HB_DEV_UNSUPPORTED, }; +/* Heartbeat counter pair */ +struct hb_cnt_pair { + __u16 resp_heartbeat_cnt; + __u16 req_heartbeat_cnt; +}; + struct adf_heartbeat { unsigned int hb_sent_counter; unsigned int hb_failed_counter; unsigned int hb_timer; u64 last_hb_check_time; + u64 last_hb_reset_time; bool ctrs_cnt_checked; struct hb_dma_addr { dma_addr_t phy_addr; @@ -35,6 +44,9 @@ struct dentry *cfg; struct dentry *sent; struct dentry *failed; +#ifdef CONFIG_CRYPTO_DEV_QAT_ERROR_INJECTION + struct dentry *inject_error; +#endif } dbgfs; }; @@ -51,6 +63,15 @@ enum adf_device_heartbeat_status *hb_status); void adf_heartbeat_check_ctrs(struct adf_accel_dev *accel_dev); +#ifdef CONFIG_CRYPTO_DEV_QAT_ERROR_INJECTION +int adf_heartbeat_inject_error(struct adf_accel_dev *accel_dev); +#else +static inline int adf_heartbeat_inject_error(struct adf_accel_dev *accel_dev) +{ + return -EPERM; +} +#endif + #else static inline int adf_heartbeat_init(struct adf_accel_dev *accel_dev) { --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_heartbeat_dbgfs.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_heartbeat_dbgfs.c @@ -155,6 +155,43 @@ .write = adf_hb_cfg_write, }; +static ssize_t adf_hb_error_inject_write(struct file *file, + const char __user *user_buf, + size_t count, loff_t *ppos) +{ + struct adf_accel_dev *accel_dev = file->private_data; + size_t written_chars; + char buf[3]; + int ret; + + /* last byte left as string termination */ + if (count != 2) + return -EINVAL; + + written_chars = simple_write_to_buffer(buf, sizeof(buf) - 1, + ppos, user_buf, count); + if (buf[0] != '1') + return -EINVAL; + + ret = adf_heartbeat_inject_error(accel_dev); + if (ret) { + dev_err(&GET_DEV(accel_dev), + "Heartbeat error injection failed with status %d\n", + ret); + return ret; + } + + dev_info(&GET_DEV(accel_dev), "Heartbeat error injection enabled\n"); + + return written_chars; +} + +static const struct file_operations adf_hb_error_inject_fops = { + .owner = THIS_MODULE, + .open = simple_open, + .write = adf_hb_error_inject_write, +}; + void adf_heartbeat_dbgfs_add(struct adf_accel_dev *accel_dev) { struct adf_heartbeat *hb = accel_dev->heartbeat; @@ -171,6 +208,17 @@ &hb->hb_failed_counter, &adf_hb_stats_fops); hb->dbgfs.cfg = debugfs_create_file("config", 0600, hb->dbgfs.base_dir, accel_dev, &adf_hb_cfg_fops); + + if (IS_ENABLED(CONFIG_CRYPTO_DEV_QAT_ERROR_INJECTION)) { + struct dentry *inject_error __maybe_unused; + + inject_error = debugfs_create_file("inject_error", 0200, + hb->dbgfs.base_dir, accel_dev, + &adf_hb_error_inject_fops); +#ifdef CONFIG_CRYPTO_DEV_QAT_ERROR_INJECTION + hb->dbgfs.inject_error = inject_error; +#endif + } } EXPORT_SYMBOL_GPL(adf_heartbeat_dbgfs_add); @@ -189,6 +237,10 @@ hb->dbgfs.failed = NULL; debugfs_remove(hb->dbgfs.cfg); hb->dbgfs.cfg = NULL; +#ifdef CONFIG_CRYPTO_DEV_QAT_ERROR_INJECTION + debugfs_remove(hb->dbgfs.inject_error); + hb->dbgfs.inject_error = NULL; +#endif debugfs_remove(hb->dbgfs.base_dir); hb->dbgfs.base_dir = NULL; } --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_heartbeat_inject.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_heartbeat_inject.c @@ -0,0 +1,76 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright(c) 2023 Intel Corporation */ +#include + +#include "adf_admin.h" +#include "adf_common_drv.h" +#include "adf_heartbeat.h" + +#define MAX_HB_TICKS 0xFFFFFFFF + +static int adf_hb_set_timer_to_max(struct adf_accel_dev *accel_dev) +{ + struct adf_hw_device_data *hw_data = accel_dev->hw_device; + + accel_dev->heartbeat->hb_timer = 0; + + if (hw_data->stop_timer) + hw_data->stop_timer(accel_dev); + + return adf_send_admin_hb_timer(accel_dev, MAX_HB_TICKS); +} + +static void adf_set_hb_counters_fail(struct adf_accel_dev *accel_dev, u32 ae, + u32 thr) +{ + struct hb_cnt_pair *stats = accel_dev->heartbeat->dma.virt_addr; + struct adf_hw_device_data *hw_device = accel_dev->hw_device; + const size_t max_aes = hw_device->get_num_aes(hw_device); + const size_t hb_ctrs = hw_device->num_hb_ctrs; + size_t thr_id = ae * hb_ctrs + thr; + u16 num_rsp = stats[thr_id].resp_heartbeat_cnt; + + /* + * Inject live.req != live.rsp and live.rsp == last.rsp + * to trigger the heartbeat error detection + */ + stats[thr_id].req_heartbeat_cnt++; + stats += (max_aes * hb_ctrs); + stats[thr_id].resp_heartbeat_cnt = num_rsp; +} + +int adf_heartbeat_inject_error(struct adf_accel_dev *accel_dev) +{ + struct adf_hw_device_data *hw_device = accel_dev->hw_device; + const size_t max_aes = hw_device->get_num_aes(hw_device); + const size_t hb_ctrs = hw_device->num_hb_ctrs; + u32 rand, rand_ae, rand_thr; + unsigned long ae_mask; + int ret; + + ae_mask = hw_device->ae_mask; + + do { + /* Ensure we have a valid ae */ + get_random_bytes(&rand, sizeof(rand)); + rand_ae = rand % max_aes; + } while (!test_bit(rand_ae, &ae_mask)); + + get_random_bytes(&rand, sizeof(rand)); + rand_thr = rand % hb_ctrs; + + /* Increase the heartbeat timer to prevent FW updating HB counters */ + ret = adf_hb_set_timer_to_max(accel_dev); + if (ret) + return ret; + + /* Configure worker threads to stop processing any packet */ + ret = adf_disable_arb_thd(accel_dev, rand_ae, rand_thr); + if (ret) + return ret; + + /* Change HB counters memory to simulate a hang */ + adf_set_hb_counters_fail(accel_dev, rand_ae, rand_thr); + + return 0; +} --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_hw_arbiter.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_hw_arbiter.c @@ -90,10 +90,6 @@ hw_data->get_arb_info(&info); - /* Reset arbiter configuration */ - for (i = 0; i < ADF_ARB_NUM; i++) - WRITE_CSR_ARB_SARCONFIG(csr, arb_off, i, 0); - /* Unmap worker threads to service arbiters */ for (i = 0; i < hw_data->num_engines; i++) WRITE_CSR_ARB_WT2SAM(csr, arb_off, wt_off, i, 0); @@ -103,3 +99,28 @@ csr_ops->write_csr_ring_srv_arb_en(csr, i, 0); } EXPORT_SYMBOL_GPL(adf_exit_arb); + +int adf_disable_arb_thd(struct adf_accel_dev *accel_dev, u32 ae, u32 thr) +{ + void __iomem *csr = accel_dev->transport->banks[0].csr_addr; + struct adf_hw_device_data *hw_data = accel_dev->hw_device; + const u32 *thd_2_arb_cfg; + struct arb_info info; + u32 ae_thr_map; + + if (ADF_AE_STRAND0_THREAD == thr || ADF_AE_STRAND1_THREAD == thr) + thr = ADF_AE_ADMIN_THREAD; + + hw_data->get_arb_info(&info); + thd_2_arb_cfg = hw_data->get_arb_mapping(accel_dev); + if (!thd_2_arb_cfg) + return -EFAULT; + + /* Disable scheduling for this particular AE and thread */ + ae_thr_map = *(thd_2_arb_cfg + ae); + ae_thr_map &= ~(GENMASK(3, 0) << (thr * BIT(2))); + + WRITE_CSR_ARB_WT2SAM(csr, info.arb_offset, info.wt2sam_offset, ae, + ae_thr_map); + return 0; +} --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_init.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_init.c @@ -323,6 +323,8 @@ if (hw_data->stop_timer) hw_data->stop_timer(accel_dev); + hw_data->disable_iov(accel_dev); + if (wait) msleep(100); @@ -386,8 +388,6 @@ adf_tl_shutdown(accel_dev); - hw_data->disable_iov(accel_dev); - if (test_bit(ADF_STATUS_IRQ_ALLOCATED, &accel_dev->status)) { hw_data->free_irq(accel_dev); clear_bit(ADF_STATUS_IRQ_ALLOCATED, &accel_dev->status); @@ -433,6 +433,18 @@ return 0; } +void adf_error_notifier(struct adf_accel_dev *accel_dev) +{ + struct service_hndl *service; + + list_for_each_entry(service, &service_table, list) { + if (service->event_hld(accel_dev, ADF_EVENT_FATAL_ERROR)) + dev_err(&GET_DEV(accel_dev), + "Failed to send error event to %s.\n", + service->name); + } +} + static int adf_dev_shutdown_cache_cfg(struct adf_accel_dev *accel_dev) { char services[ADF_CFG_MAX_VAL_LEN_IN_BYTES] = {0}; --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_isr.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_isr.c @@ -139,8 +139,13 @@ if (ras_ops->handle_interrupt && ras_ops->handle_interrupt(accel_dev, &reset_required)) { - if (reset_required) + if (reset_required) { dev_err(&GET_DEV(accel_dev), "Fatal error, reset required\n"); + if (adf_notify_fatal_error(accel_dev)) + dev_err(&GET_DEV(accel_dev), + "Failed to notify fatal error\n"); + } + return true; } --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_pfvf_msg.h +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_pfvf_msg.h @@ -99,6 +99,8 @@ ADF_PF2VF_MSGTYPE_RESTARTING = 0x01, ADF_PF2VF_MSGTYPE_VERSION_RESP = 0x02, ADF_PF2VF_MSGTYPE_BLKMSG_RESP = 0x03, + ADF_PF2VF_MSGTYPE_FATAL_ERROR = 0x04, + ADF_PF2VF_MSGTYPE_RESTARTED = 0x05, /* Values from 0x10 are Gen4 specific, message type is only 4 bits in Gen2 devices. */ ADF_PF2VF_MSGTYPE_RP_RESET_RESP = 0x10, }; @@ -112,6 +114,7 @@ ADF_VF2PF_MSGTYPE_LARGE_BLOCK_REQ = 0x07, ADF_VF2PF_MSGTYPE_MEDIUM_BLOCK_REQ = 0x08, ADF_VF2PF_MSGTYPE_SMALL_BLOCK_REQ = 0x09, + ADF_VF2PF_MSGTYPE_RESTARTING_COMPLETE = 0x0a, /* Values from 0x10 are Gen4 specific, message type is only 4 bits in Gen2 devices. */ ADF_VF2PF_MSGTYPE_RP_RESET = 0x10, }; @@ -124,8 +127,10 @@ ADF_PFVF_COMPAT_FAST_ACK = 0x03, /* Ring to service mapping support for non-standard mappings */ ADF_PFVF_COMPAT_RING_TO_SVC_MAP = 0x04, + /* Fallback compat */ + ADF_PFVF_COMPAT_FALLBACK = 0x05, /* Reference to the latest version */ - ADF_PFVF_COMPAT_THIS_VERSION = 0x04, + ADF_PFVF_COMPAT_THIS_VERSION = 0x05, }; /* PF->VF Version Response */ --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_pfvf_pf_msg.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_pfvf_pf_msg.c @@ -1,24 +1,89 @@ // SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) /* Copyright(c) 2015 - 2021 Intel Corporation */ +#include #include #include "adf_accel_devices.h" #include "adf_pfvf_msg.h" #include "adf_pfvf_pf_msg.h" #include "adf_pfvf_pf_proto.h" +#define ADF_PF_WAIT_RESTARTING_COMPLETE_DELAY 100 +#define ADF_VF_SHUTDOWN_RETRY 100 + void adf_pf2vf_notify_restarting(struct adf_accel_dev *accel_dev) { struct adf_accel_vf_info *vf; struct pfvf_message msg = { .type = ADF_PF2VF_MSGTYPE_RESTARTING }; int i, num_vfs = pci_num_vf(accel_to_pci_dev(accel_dev)); + dev_dbg(&GET_DEV(accel_dev), "pf2vf notify restarting\n"); for (i = 0, vf = accel_dev->pf.vf_info; i < num_vfs; i++, vf++) { - if (vf->init && adf_send_pf2vf_msg(accel_dev, i, msg)) + if (vf->init && vf->vf_compat_ver >= ADF_PFVF_COMPAT_FALLBACK) + vf->restarting = true; + else + vf->restarting = false; + + if (!vf->init) + continue; + + if (adf_send_pf2vf_msg(accel_dev, i, msg)) dev_err(&GET_DEV(accel_dev), "Failed to send restarting msg to VF%d\n", i); } } +void adf_pf2vf_wait_for_restarting_complete(struct adf_accel_dev *accel_dev) +{ + int num_vfs = pci_num_vf(accel_to_pci_dev(accel_dev)); + int i, retries = ADF_VF_SHUTDOWN_RETRY; + struct adf_accel_vf_info *vf; + bool vf_running; + + dev_dbg(&GET_DEV(accel_dev), "pf2vf wait for restarting complete\n"); + do { + vf_running = false; + for (i = 0, vf = accel_dev->pf.vf_info; i < num_vfs; i++, vf++) + if (vf->restarting) + vf_running = true; + if (!vf_running) + break; + msleep(ADF_PF_WAIT_RESTARTING_COMPLETE_DELAY); + } while (--retries); + + if (vf_running) + dev_warn(&GET_DEV(accel_dev), "Some VFs are still running\n"); +} + +void adf_pf2vf_notify_restarted(struct adf_accel_dev *accel_dev) +{ + struct pfvf_message msg = { .type = ADF_PF2VF_MSGTYPE_RESTARTED }; + int i, num_vfs = pci_num_vf(accel_to_pci_dev(accel_dev)); + struct adf_accel_vf_info *vf; + + dev_dbg(&GET_DEV(accel_dev), "pf2vf notify restarted\n"); + for (i = 0, vf = accel_dev->pf.vf_info; i < num_vfs; i++, vf++) { + if (vf->init && vf->vf_compat_ver >= ADF_PFVF_COMPAT_FALLBACK && + adf_send_pf2vf_msg(accel_dev, i, msg)) + dev_err(&GET_DEV(accel_dev), + "Failed to send restarted msg to VF%d\n", i); + } +} + +void adf_pf2vf_notify_fatal_error(struct adf_accel_dev *accel_dev) +{ + struct pfvf_message msg = { .type = ADF_PF2VF_MSGTYPE_FATAL_ERROR }; + int i, num_vfs = pci_num_vf(accel_to_pci_dev(accel_dev)); + struct adf_accel_vf_info *vf; + + dev_dbg(&GET_DEV(accel_dev), "pf2vf notify fatal error\n"); + for (i = 0, vf = accel_dev->pf.vf_info; i < num_vfs; i++, vf++) { + if (vf->init && vf->vf_compat_ver >= ADF_PFVF_COMPAT_FALLBACK && + adf_send_pf2vf_msg(accel_dev, i, msg)) + dev_err(&GET_DEV(accel_dev), + "Failed to send fatal error msg to VF%d\n", i); + } +} + int adf_pf_capabilities_msg_provider(struct adf_accel_dev *accel_dev, u8 *buffer, u8 compat) { --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_pfvf_pf_msg.h +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_pfvf_pf_msg.h @@ -5,7 +5,28 @@ #include "adf_accel_devices.h" +#if defined(CONFIG_PCI_IOV) void adf_pf2vf_notify_restarting(struct adf_accel_dev *accel_dev); +void adf_pf2vf_wait_for_restarting_complete(struct adf_accel_dev *accel_dev); +void adf_pf2vf_notify_restarted(struct adf_accel_dev *accel_dev); +void adf_pf2vf_notify_fatal_error(struct adf_accel_dev *accel_dev); +#else +static inline void adf_pf2vf_notify_restarting(struct adf_accel_dev *accel_dev) +{ +} + +static inline void adf_pf2vf_wait_for_restarting_complete(struct adf_accel_dev *accel_dev) +{ +} + +static inline void adf_pf2vf_notify_restarted(struct adf_accel_dev *accel_dev) +{ +} + +static inline void adf_pf2vf_notify_fatal_error(struct adf_accel_dev *accel_dev) +{ +} +#endif typedef int (*adf_pf2vf_blkmsg_provider)(struct adf_accel_dev *accel_dev, u8 *buffer, u8 compat); --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_pfvf_pf_proto.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_pfvf_pf_proto.c @@ -291,6 +291,14 @@ vf_info->init = false; } break; + case ADF_VF2PF_MSGTYPE_RESTARTING_COMPLETE: + { + dev_dbg(&GET_DEV(accel_dev), + "Restarting Complete received from VF%d\n", vf_nr); + vf_info->restarting = false; + vf_info->init = false; + } + break; case ADF_VF2PF_MSGTYPE_LARGE_BLOCK_REQ: case ADF_VF2PF_MSGTYPE_MEDIUM_BLOCK_REQ: case ADF_VF2PF_MSGTYPE_SMALL_BLOCK_REQ: --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_pfvf_vf_msg.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_pfvf_vf_msg.c @@ -48,6 +48,20 @@ } EXPORT_SYMBOL_GPL(adf_vf2pf_notify_shutdown); +void adf_vf2pf_notify_restart_complete(struct adf_accel_dev *accel_dev) +{ + struct pfvf_message msg = { .type = ADF_VF2PF_MSGTYPE_RESTARTING_COMPLETE }; + + /* Check compatibility version */ + if (accel_dev->vf.pf_compat_ver < ADF_PFVF_COMPAT_FALLBACK) + return; + + if (adf_send_vf2pf_msg(accel_dev, msg)) + dev_err(&GET_DEV(accel_dev), + "Failed to send Restarting complete event to PF\n"); +} +EXPORT_SYMBOL_GPL(adf_vf2pf_notify_restart_complete); + int adf_vf2pf_request_version(struct adf_accel_dev *accel_dev) { u8 pf_version; --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_pfvf_vf_msg.h +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_pfvf_vf_msg.h @@ -6,6 +6,7 @@ #if defined(CONFIG_PCI_IOV) int adf_vf2pf_notify_init(struct adf_accel_dev *accel_dev); void adf_vf2pf_notify_shutdown(struct adf_accel_dev *accel_dev); +void adf_vf2pf_notify_restart_complete(struct adf_accel_dev *accel_dev); int adf_vf2pf_request_version(struct adf_accel_dev *accel_dev); int adf_vf2pf_get_capabilities(struct adf_accel_dev *accel_dev); int adf_vf2pf_get_ring_to_svc(struct adf_accel_dev *accel_dev); --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_pfvf_vf_proto.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_pfvf_vf_proto.c @@ -308,6 +308,12 @@ adf_pf2vf_handle_pf_restarting(accel_dev); return false; + case ADF_PF2VF_MSGTYPE_RESTARTED: + dev_dbg(&GET_DEV(accel_dev), "Restarted message received from PF\n"); + return true; + case ADF_PF2VF_MSGTYPE_FATAL_ERROR: + dev_err(&GET_DEV(accel_dev), "Fatal error received from PF\n"); + return true; case ADF_PF2VF_MSGTYPE_VERSION_RESP: case ADF_PF2VF_MSGTYPE_BLKMSG_RESP: case ADF_PF2VF_MSGTYPE_RP_RESET_RESP: --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_rl.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_rl.c @@ -788,6 +788,24 @@ sla_type_arr[node_id] = NULL; } +static void free_all_sla(struct adf_accel_dev *accel_dev) +{ + struct adf_rl *rl_data = accel_dev->rate_limiting; + int sla_id; + + mutex_lock(&rl_data->rl_lock); + + for (sla_id = 0; sla_id < RL_NODES_CNT_MAX; sla_id++) { + if (!rl_data->sla[sla_id]) + continue; + + kfree(rl_data->sla[sla_id]); + rl_data->sla[sla_id] = NULL; + } + + mutex_unlock(&rl_data->rl_lock); +} + /** * add_update_sla() - handles the creation and the update of an SLA * @accel_dev: pointer to acceleration device structure @@ -1088,6 +1106,7 @@ mutex_init(&rl->rl_lock); rl->device_data = &accel_dev->hw_device->rl_data; rl->accel_dev = accel_dev; + init_rwsem(&rl->user_input.lock); accel_dev->rate_limiting = rl; err_ret: @@ -1107,7 +1126,7 @@ } if ((fw_caps & RL_CAPABILITY_MASK) != RL_CAPABILITY_VALUE) { - dev_info(&GET_DEV(accel_dev), "not supported\n"); + dev_info(&GET_DEV(accel_dev), "feature not supported by FW\n"); ret = -EOPNOTSUPP; goto ret_free; } @@ -1155,7 +1174,7 @@ return; adf_sysfs_rl_rm(accel_dev); - adf_rl_remove_sla_all(accel_dev, true); + free_all_sla(accel_dev); } void adf_rl_exit(struct adf_accel_dev *accel_dev) --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_sriov.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_sriov.c @@ -60,7 +60,6 @@ /* This ptr will be populated when VFs will be created */ vf_info->accel_dev = accel_dev; vf_info->vf_nr = i; - vf_info->vf_compat_ver = 0; mutex_init(&vf_info->pf2vf_lock); ratelimit_state_init(&vf_info->vf2pf_ratelimit, @@ -84,6 +83,32 @@ return pci_enable_sriov(pdev, totalvfs); } +void adf_reenable_sriov(struct adf_accel_dev *accel_dev) +{ + struct pci_dev *pdev = accel_to_pci_dev(accel_dev); + char cfg[ADF_CFG_MAX_VAL_LEN_IN_BYTES] = {0}; + unsigned long val = 0; + + if (adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, + ADF_SRIOV_ENABLED, cfg)) + return; + + if (!accel_dev->pf.vf_info) + return; + + if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, ADF_NUM_CY, + &val, ADF_DEC)) + return; + + if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, ADF_NUM_DC, + &val, ADF_DEC)) + return; + + set_bit(ADF_STATUS_CONFIGURED, &accel_dev->status); + dev_dbg(&pdev->dev, "Re-enabling SRIOV\n"); + adf_enable_sriov(accel_dev); +} + /** * adf_disable_sriov() - Disable SRIOV for the device * @accel_dev: Pointer to accel device. @@ -103,6 +128,7 @@ return; adf_pf2vf_notify_restarting(accel_dev); + adf_pf2vf_wait_for_restarting_complete(accel_dev); pci_disable_sriov(accel_to_pci_dev(accel_dev)); /* Disable VF to PF interrupts */ @@ -115,8 +141,10 @@ for (i = 0, vf = accel_dev->pf.vf_info; i < totalvfs; i++, vf++) mutex_destroy(&vf->pf2vf_lock); - kfree(accel_dev->pf.vf_info); - accel_dev->pf.vf_info = NULL; + if (!test_bit(ADF_STATUS_RESTARTING, &accel_dev->status)) { + kfree(accel_dev->pf.vf_info); + accel_dev->pf.vf_info = NULL; + } } EXPORT_SYMBOL_GPL(adf_disable_sriov); @@ -194,6 +222,10 @@ if (ret) return ret; + val = 1; + adf_cfg_add_key_value_param(accel_dev, ADF_GENERAL_SEC, ADF_SRIOV_ENABLED, + &val, ADF_DEC); + return numvfs; } EXPORT_SYMBOL_GPL(adf_sriov_configure); --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_sysfs.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_sysfs.c @@ -204,6 +204,42 @@ } static DEVICE_ATTR_RW(pm_idle_enabled); +static ssize_t auto_reset_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + char *auto_reset; + struct adf_accel_dev *accel_dev; + + accel_dev = adf_devmgr_pci_to_accel_dev(to_pci_dev(dev)); + if (!accel_dev) + return -EINVAL; + + auto_reset = accel_dev->autoreset_on_error ? "on" : "off"; + + return sysfs_emit(buf, "%s\n", auto_reset); +} + +static ssize_t auto_reset_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct adf_accel_dev *accel_dev; + bool enabled = false; + int ret; + + ret = kstrtobool(buf, &enabled); + if (ret) + return ret; + + accel_dev = adf_devmgr_pci_to_accel_dev(to_pci_dev(dev)); + if (!accel_dev) + return -EINVAL; + + accel_dev->autoreset_on_error = enabled; + + return count; +} +static DEVICE_ATTR_RW(auto_reset); + static DEVICE_ATTR_RW(state); static DEVICE_ATTR_RW(cfg_services); @@ -291,6 +327,7 @@ &dev_attr_pm_idle_enabled.attr, &dev_attr_rp2srv.attr, &dev_attr_num_rps.attr, + &dev_attr_auto_reset.attr, NULL, }; --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_telemetry.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_telemetry.c @@ -41,6 +41,20 @@ return 0; } +static int validate_tl_slice_counters(struct icp_qat_fw_init_admin_slice_cnt *slice_count, + u8 max_slices_per_type) +{ + u8 *sl_counter = (u8 *)slice_count; + int i; + + for (i = 0; i < ADF_TL_SL_CNT_COUNT; i++) { + if (sl_counter[i] > max_slices_per_type) + return -EINVAL; + } + + return 0; +} + static int adf_tl_alloc_mem(struct adf_accel_dev *accel_dev) { struct adf_tl_hw_data *tl_data = &GET_TL_DATA(accel_dev); @@ -214,6 +228,13 @@ return ret; } + ret = validate_tl_slice_counters(&telemetry->slice_cnt, tl_data->max_sl_cnt); + if (ret) { + dev_err(dev, "invalid value returned by FW\n"); + adf_send_admin_tl_stop(accel_dev); + return ret; + } + telemetry->hbuffs = state; atomic_set(&telemetry->state, state); --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_telemetry.h +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_telemetry.h @@ -40,6 +40,7 @@ u8 num_dev_counters; u8 num_rp_counters; u8 max_rp; + u8 max_sl_cnt; }; struct adf_telemetry { --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/adf_vf_isr.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/adf_vf_isr.c @@ -13,6 +13,7 @@ #include "adf_cfg.h" #include "adf_cfg_strings.h" #include "adf_cfg_common.h" +#include "adf_pfvf_vf_msg.h" #include "adf_transport_access_macros.h" #include "adf_transport_internal.h" @@ -75,6 +76,7 @@ /* Re-enable PF2VF interrupts */ adf_enable_pf2vf_interrupts(accel_dev); + adf_vf2pf_notify_restart_complete(accel_dev); kfree(stop_data); } --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_common/qat_comp_algs.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_common/qat_comp_algs.c @@ -13,15 +13,6 @@ #include "qat_compression.h" #include "qat_algs_send.h" -#define QAT_RFC_1950_HDR_SIZE 2 -#define QAT_RFC_1950_FOOTER_SIZE 4 -#define QAT_RFC_1950_CM_DEFLATE 8 -#define QAT_RFC_1950_CM_DEFLATE_CINFO_32K 7 -#define QAT_RFC_1950_CM_MASK 0x0f -#define QAT_RFC_1950_CM_OFFSET 4 -#define QAT_RFC_1950_DICT_MASK 0x20 -#define QAT_RFC_1950_COMP_HDR 0x785e - static DEFINE_MUTEX(algs_lock); static unsigned int active_devs; --- linux-xilinx-6.8.0.orig/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c +++ linux-xilinx-6.8.0/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c @@ -192,8 +192,12 @@ ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, errmsk3); ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK5, errmsk5); - errmsk3 &= ADF_DH895XCC_ERR_MSK_VF2PF_L(sources | disabled); - errmsk5 &= ADF_DH895XCC_ERR_MSK_VF2PF_U(sources | disabled); + /* Update only section of errmsk3 and errmsk5 related to VF2PF */ + errmsk3 &= ~ADF_DH895XCC_ERR_MSK_VF2PF_L(ADF_DH895XCC_VF_MSK); + errmsk5 &= ~ADF_DH895XCC_ERR_MSK_VF2PF_U(ADF_DH895XCC_VF_MSK); + + errmsk3 |= ADF_DH895XCC_ERR_MSK_VF2PF_L(sources | disabled); + errmsk5 |= ADF_DH895XCC_ERR_MSK_VF2PF_U(sources | disabled); ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, errmsk3); ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK5, errmsk5); --- linux-xilinx-6.8.0.orig/drivers/crypto/marvell/Kconfig +++ linux-xilinx-6.8.0/drivers/crypto/marvell/Kconfig @@ -28,6 +28,7 @@ select CRYPTO_SKCIPHER select CRYPTO_HASH select CRYPTO_AEAD + select CRYPTO_AUTHENC select CRYPTO_DEV_MARVELL help This driver allows you to utilize the Marvell Cryptographic @@ -47,6 +48,7 @@ select CRYPTO_SKCIPHER select CRYPTO_HASH select CRYPTO_AEAD + select CRYPTO_AUTHENC select NET_DEVLINK help This driver allows you to utilize the Marvell Cryptographic --- linux-xilinx-6.8.0.orig/drivers/crypto/marvell/cesa/hash.c +++ linux-xilinx-6.8.0/drivers/crypto/marvell/cesa/hash.c @@ -947,7 +947,7 @@ .base = { .cra_name = "md5", .cra_driver_name = "mv-md5", - .cra_priority = 300, + .cra_priority = 0, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY | CRYPTO_ALG_KERN_DRIVER_ONLY, @@ -1018,7 +1018,7 @@ .base = { .cra_name = "sha1", .cra_driver_name = "mv-sha1", - .cra_priority = 300, + .cra_priority = 0, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY | CRYPTO_ALG_KERN_DRIVER_ONLY, @@ -1092,7 +1092,7 @@ .base = { .cra_name = "sha256", .cra_driver_name = "mv-sha256", - .cra_priority = 300, + .cra_priority = 0, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY | CRYPTO_ALG_KERN_DRIVER_ONLY, @@ -1302,7 +1302,7 @@ .base = { .cra_name = "hmac(md5)", .cra_driver_name = "mv-hmac-md5", - .cra_priority = 300, + .cra_priority = 0, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY | CRYPTO_ALG_KERN_DRIVER_ONLY, @@ -1373,7 +1373,7 @@ .base = { .cra_name = "hmac(sha1)", .cra_driver_name = "mv-hmac-sha1", - .cra_priority = 300, + .cra_priority = 0, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY | CRYPTO_ALG_KERN_DRIVER_ONLY, @@ -1444,7 +1444,7 @@ .base = { .cra_name = "hmac(sha256)", .cra_driver_name = "mv-hmac-sha256", - .cra_priority = 300, + .cra_priority = 0, .cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY | CRYPTO_ALG_KERN_DRIVER_ONLY, --- linux-xilinx-6.8.0.orig/drivers/crypto/marvell/octeontx/otx_cptvf_algs.c +++ linux-xilinx-6.8.0/drivers/crypto/marvell/octeontx/otx_cptvf_algs.c @@ -17,7 +17,6 @@ #include #include #include -#include #include #include #include "otx_cptvf.h" @@ -66,6 +65,8 @@ .count = ATOMIC_INIT(0) }; +static struct otx_cpt_sdesc *alloc_sdesc(struct crypto_shash *alg); + static inline int get_se_device(struct pci_dev **pdev, int *cpu_num) { int count, ret = 0; @@ -509,44 +510,61 @@ ctx->cipher_type = cipher_type; ctx->mac_type = mac_type; + switch (ctx->mac_type) { + case OTX_CPT_SHA1: + ctx->hashalg = crypto_alloc_shash("sha1", 0, 0); + break; + + case OTX_CPT_SHA256: + ctx->hashalg = crypto_alloc_shash("sha256", 0, 0); + break; + + case OTX_CPT_SHA384: + ctx->hashalg = crypto_alloc_shash("sha384", 0, 0); + break; + + case OTX_CPT_SHA512: + ctx->hashalg = crypto_alloc_shash("sha512", 0, 0); + break; + } + + if (IS_ERR(ctx->hashalg)) + return PTR_ERR(ctx->hashalg); + + crypto_aead_set_reqsize_dma(tfm, sizeof(struct otx_cpt_req_ctx)); + + if (!ctx->hashalg) + return 0; + /* * When selected cipher is NULL we use HMAC opcode instead of * FLEXICRYPTO opcode therefore we don't need to use HASH algorithms * for calculating ipad and opad */ if (ctx->cipher_type != OTX_CPT_CIPHER_NULL) { - switch (ctx->mac_type) { - case OTX_CPT_SHA1: - ctx->hashalg = crypto_alloc_shash("sha1", 0, - CRYPTO_ALG_ASYNC); - if (IS_ERR(ctx->hashalg)) - return PTR_ERR(ctx->hashalg); - break; - - case OTX_CPT_SHA256: - ctx->hashalg = crypto_alloc_shash("sha256", 0, - CRYPTO_ALG_ASYNC); - if (IS_ERR(ctx->hashalg)) - return PTR_ERR(ctx->hashalg); - break; - - case OTX_CPT_SHA384: - ctx->hashalg = crypto_alloc_shash("sha384", 0, - CRYPTO_ALG_ASYNC); - if (IS_ERR(ctx->hashalg)) - return PTR_ERR(ctx->hashalg); - break; - - case OTX_CPT_SHA512: - ctx->hashalg = crypto_alloc_shash("sha512", 0, - CRYPTO_ALG_ASYNC); - if (IS_ERR(ctx->hashalg)) - return PTR_ERR(ctx->hashalg); - break; + int ss = crypto_shash_statesize(ctx->hashalg); + + ctx->ipad = kzalloc(ss, GFP_KERNEL); + if (!ctx->ipad) { + crypto_free_shash(ctx->hashalg); + return -ENOMEM; + } + + ctx->opad = kzalloc(ss, GFP_KERNEL); + if (!ctx->opad) { + kfree(ctx->ipad); + crypto_free_shash(ctx->hashalg); + return -ENOMEM; } } - crypto_aead_set_reqsize_dma(tfm, sizeof(struct otx_cpt_req_ctx)); + ctx->sdesc = alloc_sdesc(ctx->hashalg); + if (!ctx->sdesc) { + kfree(ctx->opad); + kfree(ctx->ipad); + crypto_free_shash(ctx->hashalg); + return -ENOMEM; + } return 0; } @@ -602,8 +620,7 @@ kfree(ctx->ipad); kfree(ctx->opad); - if (ctx->hashalg) - crypto_free_shash(ctx->hashalg); + crypto_free_shash(ctx->hashalg); kfree(ctx->sdesc); } @@ -699,7 +716,7 @@ *dst = cpu_to_be64p(src); } -static int copy_pad(u8 mac_type, u8 *out_pad, u8 *in_pad) +static int swap_pad(u8 mac_type, u8 *pad) { struct sha512_state *sha512; struct sha256_state *sha256; @@ -707,22 +724,19 @@ switch (mac_type) { case OTX_CPT_SHA1: - sha1 = (struct sha1_state *) in_pad; + sha1 = (struct sha1_state *)pad; swap_data32(sha1->state, SHA1_DIGEST_SIZE); - memcpy(out_pad, &sha1->state, SHA1_DIGEST_SIZE); break; case OTX_CPT_SHA256: - sha256 = (struct sha256_state *) in_pad; + sha256 = (struct sha256_state *)pad; swap_data32(sha256->state, SHA256_DIGEST_SIZE); - memcpy(out_pad, &sha256->state, SHA256_DIGEST_SIZE); break; case OTX_CPT_SHA384: case OTX_CPT_SHA512: - sha512 = (struct sha512_state *) in_pad; + sha512 = (struct sha512_state *)pad; swap_data64(sha512->state, SHA512_DIGEST_SIZE); - memcpy(out_pad, &sha512->state, SHA512_DIGEST_SIZE); break; default: @@ -732,55 +746,53 @@ return 0; } -static int aead_hmac_init(struct crypto_aead *cipher) +static int aead_hmac_init(struct crypto_aead *cipher, + struct crypto_authenc_keys *keys) { struct otx_cpt_aead_ctx *ctx = crypto_aead_ctx_dma(cipher); - int state_size = crypto_shash_statesize(ctx->hashalg); int ds = crypto_shash_digestsize(ctx->hashalg); int bs = crypto_shash_blocksize(ctx->hashalg); - int authkeylen = ctx->auth_key_len; + int authkeylen = keys->authkeylen; u8 *ipad = NULL, *opad = NULL; - int ret = 0, icount = 0; + int icount = 0; + int ret; - ctx->sdesc = alloc_sdesc(ctx->hashalg); - if (!ctx->sdesc) - return -ENOMEM; + if (authkeylen > bs) { + ret = crypto_shash_digest(&ctx->sdesc->shash, keys->authkey, + authkeylen, ctx->key); + if (ret) + return ret; + authkeylen = ds; + } else + memcpy(ctx->key, keys->authkey, authkeylen); - ctx->ipad = kzalloc(bs, GFP_KERNEL); - if (!ctx->ipad) { - ret = -ENOMEM; - goto calc_fail; - } + ctx->enc_key_len = keys->enckeylen; + ctx->auth_key_len = authkeylen; - ctx->opad = kzalloc(bs, GFP_KERNEL); - if (!ctx->opad) { - ret = -ENOMEM; - goto calc_fail; - } + if (ctx->cipher_type == OTX_CPT_CIPHER_NULL) + return keys->enckeylen ? -EINVAL : 0; - ipad = kzalloc(state_size, GFP_KERNEL); - if (!ipad) { - ret = -ENOMEM; - goto calc_fail; + switch (keys->enckeylen) { + case AES_KEYSIZE_128: + ctx->key_type = OTX_CPT_AES_128_BIT; + break; + case AES_KEYSIZE_192: + ctx->key_type = OTX_CPT_AES_192_BIT; + break; + case AES_KEYSIZE_256: + ctx->key_type = OTX_CPT_AES_256_BIT; + break; + default: + /* Invalid key length */ + return -EINVAL; } - opad = kzalloc(state_size, GFP_KERNEL); - if (!opad) { - ret = -ENOMEM; - goto calc_fail; - } + memcpy(ctx->key + authkeylen, keys->enckey, keys->enckeylen); - if (authkeylen > bs) { - ret = crypto_shash_digest(&ctx->sdesc->shash, ctx->key, - authkeylen, ipad); - if (ret) - goto calc_fail; - - authkeylen = ds; - } else { - memcpy(ipad, ctx->key, authkeylen); - } + ipad = ctx->ipad; + opad = ctx->opad; + memcpy(ipad, ctx->key, authkeylen); memset(ipad + authkeylen, 0, bs - authkeylen); memcpy(opad, ipad, bs); @@ -798,7 +810,7 @@ crypto_shash_init(&ctx->sdesc->shash); crypto_shash_update(&ctx->sdesc->shash, ipad, bs); crypto_shash_export(&ctx->sdesc->shash, ipad); - ret = copy_pad(ctx->mac_type, ctx->ipad, ipad); + ret = swap_pad(ctx->mac_type, ipad); if (ret) goto calc_fail; @@ -806,25 +818,9 @@ crypto_shash_init(&ctx->sdesc->shash); crypto_shash_update(&ctx->sdesc->shash, opad, bs); crypto_shash_export(&ctx->sdesc->shash, opad); - ret = copy_pad(ctx->mac_type, ctx->opad, opad); - if (ret) - goto calc_fail; - - kfree(ipad); - kfree(opad); - - return 0; + ret = swap_pad(ctx->mac_type, opad); calc_fail: - kfree(ctx->ipad); - ctx->ipad = NULL; - kfree(ctx->opad); - ctx->opad = NULL; - kfree(ipad); - kfree(opad); - kfree(ctx->sdesc); - ctx->sdesc = NULL; - return ret; } @@ -832,57 +828,15 @@ const unsigned char *key, unsigned int keylen) { - struct otx_cpt_aead_ctx *ctx = crypto_aead_ctx_dma(cipher); - struct crypto_authenc_key_param *param; - int enckeylen = 0, authkeylen = 0; - struct rtattr *rta = (void *)key; - int status = -EINVAL; - - if (!RTA_OK(rta, keylen)) - goto badkey; - - if (rta->rta_type != CRYPTO_AUTHENC_KEYA_PARAM) - goto badkey; - - if (RTA_PAYLOAD(rta) < sizeof(*param)) - goto badkey; - - param = RTA_DATA(rta); - enckeylen = be32_to_cpu(param->enckeylen); - key += RTA_ALIGN(rta->rta_len); - keylen -= RTA_ALIGN(rta->rta_len); - if (keylen < enckeylen) - goto badkey; - - if (keylen > OTX_CPT_MAX_KEY_SIZE) - goto badkey; - - authkeylen = keylen - enckeylen; - memcpy(ctx->key, key, keylen); - - switch (enckeylen) { - case AES_KEYSIZE_128: - ctx->key_type = OTX_CPT_AES_128_BIT; - break; - case AES_KEYSIZE_192: - ctx->key_type = OTX_CPT_AES_192_BIT; - break; - case AES_KEYSIZE_256: - ctx->key_type = OTX_CPT_AES_256_BIT; - break; - default: - /* Invalid key length */ - goto badkey; - } + struct crypto_authenc_keys authenc_keys; + int status; - ctx->enc_key_len = enckeylen; - ctx->auth_key_len = authkeylen; - - status = aead_hmac_init(cipher); + status = crypto_authenc_extractkeys(&authenc_keys, key, keylen); if (status) goto badkey; - return 0; + status = aead_hmac_init(cipher, &authenc_keys); + badkey: return status; } @@ -891,36 +845,7 @@ const unsigned char *key, unsigned int keylen) { - struct otx_cpt_aead_ctx *ctx = crypto_aead_ctx_dma(cipher); - struct crypto_authenc_key_param *param; - struct rtattr *rta = (void *)key; - int enckeylen = 0; - - if (!RTA_OK(rta, keylen)) - goto badkey; - - if (rta->rta_type != CRYPTO_AUTHENC_KEYA_PARAM) - goto badkey; - - if (RTA_PAYLOAD(rta) < sizeof(*param)) - goto badkey; - - param = RTA_DATA(rta); - enckeylen = be32_to_cpu(param->enckeylen); - key += RTA_ALIGN(rta->rta_len); - keylen -= RTA_ALIGN(rta->rta_len); - if (enckeylen != 0) - goto badkey; - - if (keylen > OTX_CPT_MAX_KEY_SIZE) - goto badkey; - - memcpy(ctx->key, key, keylen); - ctx->enc_key_len = enckeylen; - ctx->auth_key_len = keylen; - return 0; -badkey: - return -EINVAL; + return otx_cpt_aead_cbc_aes_sha_setkey(cipher, key, keylen); } static int otx_cpt_aead_gcm_aes_setkey(struct crypto_aead *cipher, --- linux-xilinx-6.8.0.orig/drivers/crypto/marvell/octeontx2/cn10k_cpt.c +++ linux-xilinx-6.8.0/drivers/crypto/marvell/octeontx2/cn10k_cpt.c @@ -138,6 +138,10 @@ return -ENOMEM; cptr_dma = dma_map_single(&pdev->dev, hctx, CN10K_CPT_HW_CTX_SIZE, DMA_BIDIRECTIONAL); + if (dma_mapping_error(&pdev->dev, cptr_dma)) { + kfree(hctx); + return -ENOMEM; + } cn10k_cpt_hw_ctx_set(hctx, 1); er_ctx->hw_ctx = hctx; --- linux-xilinx-6.8.0.orig/drivers/crypto/marvell/octeontx2/otx2_cptvf_algs.c +++ linux-xilinx-6.8.0/drivers/crypto/marvell/octeontx2/otx2_cptvf_algs.c @@ -11,7 +11,6 @@ #include #include #include -#include #include #include #include "otx2_cptvf.h" @@ -55,6 +54,8 @@ .count = ATOMIC_INIT(0) }; +static struct otx2_cpt_sdesc *alloc_sdesc(struct crypto_shash *alg); + static inline int get_se_device(struct pci_dev **pdev, int *cpu_num) { int count; @@ -598,40 +599,56 @@ ctx->cipher_type = cipher_type; ctx->mac_type = mac_type; + switch (ctx->mac_type) { + case OTX2_CPT_SHA1: + ctx->hashalg = crypto_alloc_shash("sha1", 0, 0); + break; + + case OTX2_CPT_SHA256: + ctx->hashalg = crypto_alloc_shash("sha256", 0, 0); + break; + + case OTX2_CPT_SHA384: + ctx->hashalg = crypto_alloc_shash("sha384", 0, 0); + break; + + case OTX2_CPT_SHA512: + ctx->hashalg = crypto_alloc_shash("sha512", 0, 0); + break; + } + + if (IS_ERR(ctx->hashalg)) + return PTR_ERR(ctx->hashalg); + + if (ctx->hashalg) { + ctx->sdesc = alloc_sdesc(ctx->hashalg); + if (!ctx->sdesc) { + crypto_free_shash(ctx->hashalg); + return -ENOMEM; + } + } + /* * When selected cipher is NULL we use HMAC opcode instead of * FLEXICRYPTO opcode therefore we don't need to use HASH algorithms * for calculating ipad and opad */ - if (ctx->cipher_type != OTX2_CPT_CIPHER_NULL) { - switch (ctx->mac_type) { - case OTX2_CPT_SHA1: - ctx->hashalg = crypto_alloc_shash("sha1", 0, - CRYPTO_ALG_ASYNC); - if (IS_ERR(ctx->hashalg)) - return PTR_ERR(ctx->hashalg); - break; - - case OTX2_CPT_SHA256: - ctx->hashalg = crypto_alloc_shash("sha256", 0, - CRYPTO_ALG_ASYNC); - if (IS_ERR(ctx->hashalg)) - return PTR_ERR(ctx->hashalg); - break; - - case OTX2_CPT_SHA384: - ctx->hashalg = crypto_alloc_shash("sha384", 0, - CRYPTO_ALG_ASYNC); - if (IS_ERR(ctx->hashalg)) - return PTR_ERR(ctx->hashalg); - break; - - case OTX2_CPT_SHA512: - ctx->hashalg = crypto_alloc_shash("sha512", 0, - CRYPTO_ALG_ASYNC); - if (IS_ERR(ctx->hashalg)) - return PTR_ERR(ctx->hashalg); - break; + if (ctx->cipher_type != OTX2_CPT_CIPHER_NULL && ctx->hashalg) { + int ss = crypto_shash_statesize(ctx->hashalg); + + ctx->ipad = kzalloc(ss, GFP_KERNEL); + if (!ctx->ipad) { + kfree(ctx->sdesc); + crypto_free_shash(ctx->hashalg); + return -ENOMEM; + } + + ctx->opad = kzalloc(ss, GFP_KERNEL); + if (!ctx->opad) { + kfree(ctx->ipad); + kfree(ctx->sdesc); + crypto_free_shash(ctx->hashalg); + return -ENOMEM; } } switch (ctx->cipher_type) { @@ -713,8 +730,7 @@ kfree(ctx->ipad); kfree(ctx->opad); - if (ctx->hashalg) - crypto_free_shash(ctx->hashalg); + crypto_free_shash(ctx->hashalg); kfree(ctx->sdesc); if (ctx->fbk_cipher) { @@ -788,7 +804,7 @@ cpu_to_be64s(src); } -static int copy_pad(u8 mac_type, u8 *out_pad, u8 *in_pad) +static int swap_pad(u8 mac_type, u8 *pad) { struct sha512_state *sha512; struct sha256_state *sha256; @@ -796,22 +812,19 @@ switch (mac_type) { case OTX2_CPT_SHA1: - sha1 = (struct sha1_state *) in_pad; + sha1 = (struct sha1_state *)pad; swap_data32(sha1->state, SHA1_DIGEST_SIZE); - memcpy(out_pad, &sha1->state, SHA1_DIGEST_SIZE); break; case OTX2_CPT_SHA256: - sha256 = (struct sha256_state *) in_pad; + sha256 = (struct sha256_state *)pad; swap_data32(sha256->state, SHA256_DIGEST_SIZE); - memcpy(out_pad, &sha256->state, SHA256_DIGEST_SIZE); break; case OTX2_CPT_SHA384: case OTX2_CPT_SHA512: - sha512 = (struct sha512_state *) in_pad; + sha512 = (struct sha512_state *)pad; swap_data64(sha512->state, SHA512_DIGEST_SIZE); - memcpy(out_pad, &sha512->state, SHA512_DIGEST_SIZE); break; default: @@ -821,55 +834,54 @@ return 0; } -static int aead_hmac_init(struct crypto_aead *cipher) +static int aead_hmac_init(struct crypto_aead *cipher, + struct crypto_authenc_keys *keys) { struct otx2_cpt_aead_ctx *ctx = crypto_aead_ctx_dma(cipher); - int state_size = crypto_shash_statesize(ctx->hashalg); int ds = crypto_shash_digestsize(ctx->hashalg); int bs = crypto_shash_blocksize(ctx->hashalg); - int authkeylen = ctx->auth_key_len; + int authkeylen = keys->authkeylen; u8 *ipad = NULL, *opad = NULL; - int ret = 0, icount = 0; - - ctx->sdesc = alloc_sdesc(ctx->hashalg); - if (!ctx->sdesc) - return -ENOMEM; - - ctx->ipad = kzalloc(bs, GFP_KERNEL); - if (!ctx->ipad) { - ret = -ENOMEM; - goto calc_fail; - } - - ctx->opad = kzalloc(bs, GFP_KERNEL); - if (!ctx->opad) { - ret = -ENOMEM; - goto calc_fail; - } - - ipad = kzalloc(state_size, GFP_KERNEL); - if (!ipad) { - ret = -ENOMEM; - goto calc_fail; - } - - opad = kzalloc(state_size, GFP_KERNEL); - if (!opad) { - ret = -ENOMEM; - goto calc_fail; - } + int icount = 0; + int ret; if (authkeylen > bs) { - ret = crypto_shash_digest(&ctx->sdesc->shash, ctx->key, - authkeylen, ipad); + ret = crypto_shash_digest(&ctx->sdesc->shash, keys->authkey, + authkeylen, ctx->key); if (ret) goto calc_fail; authkeylen = ds; - } else { - memcpy(ipad, ctx->key, authkeylen); + } else + memcpy(ctx->key, keys->authkey, authkeylen); + + ctx->enc_key_len = keys->enckeylen; + ctx->auth_key_len = authkeylen; + + if (ctx->cipher_type == OTX2_CPT_CIPHER_NULL) + return keys->enckeylen ? -EINVAL : 0; + + switch (keys->enckeylen) { + case AES_KEYSIZE_128: + ctx->key_type = OTX2_CPT_AES_128_BIT; + break; + case AES_KEYSIZE_192: + ctx->key_type = OTX2_CPT_AES_192_BIT; + break; + case AES_KEYSIZE_256: + ctx->key_type = OTX2_CPT_AES_256_BIT; + break; + default: + /* Invalid key length */ + return -EINVAL; } + memcpy(ctx->key + authkeylen, keys->enckey, keys->enckeylen); + + ipad = ctx->ipad; + opad = ctx->opad; + + memcpy(ipad, ctx->key, authkeylen); memset(ipad + authkeylen, 0, bs - authkeylen); memcpy(opad, ipad, bs); @@ -887,7 +899,7 @@ crypto_shash_init(&ctx->sdesc->shash); crypto_shash_update(&ctx->sdesc->shash, ipad, bs); crypto_shash_export(&ctx->sdesc->shash, ipad); - ret = copy_pad(ctx->mac_type, ctx->ipad, ipad); + ret = swap_pad(ctx->mac_type, ipad); if (ret) goto calc_fail; @@ -895,25 +907,9 @@ crypto_shash_init(&ctx->sdesc->shash); crypto_shash_update(&ctx->sdesc->shash, opad, bs); crypto_shash_export(&ctx->sdesc->shash, opad); - ret = copy_pad(ctx->mac_type, ctx->opad, opad); - if (ret) - goto calc_fail; - - kfree(ipad); - kfree(opad); - - return 0; + ret = swap_pad(ctx->mac_type, opad); calc_fail: - kfree(ctx->ipad); - ctx->ipad = NULL; - kfree(ctx->opad); - ctx->opad = NULL; - kfree(ipad); - kfree(opad); - kfree(ctx->sdesc); - ctx->sdesc = NULL; - return ret; } @@ -921,87 +917,17 @@ const unsigned char *key, unsigned int keylen) { - struct otx2_cpt_aead_ctx *ctx = crypto_aead_ctx_dma(cipher); - struct crypto_authenc_key_param *param; - int enckeylen = 0, authkeylen = 0; - struct rtattr *rta = (void *)key; - - if (!RTA_OK(rta, keylen)) - return -EINVAL; - - if (rta->rta_type != CRYPTO_AUTHENC_KEYA_PARAM) - return -EINVAL; - - if (RTA_PAYLOAD(rta) < sizeof(*param)) - return -EINVAL; - - param = RTA_DATA(rta); - enckeylen = be32_to_cpu(param->enckeylen); - key += RTA_ALIGN(rta->rta_len); - keylen -= RTA_ALIGN(rta->rta_len); - if (keylen < enckeylen) - return -EINVAL; - - if (keylen > OTX2_CPT_MAX_KEY_SIZE) - return -EINVAL; - - authkeylen = keylen - enckeylen; - memcpy(ctx->key, key, keylen); - - switch (enckeylen) { - case AES_KEYSIZE_128: - ctx->key_type = OTX2_CPT_AES_128_BIT; - break; - case AES_KEYSIZE_192: - ctx->key_type = OTX2_CPT_AES_192_BIT; - break; - case AES_KEYSIZE_256: - ctx->key_type = OTX2_CPT_AES_256_BIT; - break; - default: - /* Invalid key length */ - return -EINVAL; - } + struct crypto_authenc_keys authenc_keys; - ctx->enc_key_len = enckeylen; - ctx->auth_key_len = authkeylen; - - return aead_hmac_init(cipher); + return crypto_authenc_extractkeys(&authenc_keys, key, keylen) ?: + aead_hmac_init(cipher, &authenc_keys); } static int otx2_cpt_aead_ecb_null_sha_setkey(struct crypto_aead *cipher, const unsigned char *key, unsigned int keylen) { - struct otx2_cpt_aead_ctx *ctx = crypto_aead_ctx_dma(cipher); - struct crypto_authenc_key_param *param; - struct rtattr *rta = (void *)key; - int enckeylen = 0; - - if (!RTA_OK(rta, keylen)) - return -EINVAL; - - if (rta->rta_type != CRYPTO_AUTHENC_KEYA_PARAM) - return -EINVAL; - - if (RTA_PAYLOAD(rta) < sizeof(*param)) - return -EINVAL; - - param = RTA_DATA(rta); - enckeylen = be32_to_cpu(param->enckeylen); - key += RTA_ALIGN(rta->rta_len); - keylen -= RTA_ALIGN(rta->rta_len); - if (enckeylen != 0) - return -EINVAL; - - if (keylen > OTX2_CPT_MAX_KEY_SIZE) - return -EINVAL; - - memcpy(ctx->key, key, keylen); - ctx->enc_key_len = enckeylen; - ctx->auth_key_len = keylen; - - return 0; + return otx2_cpt_aead_cbc_aes_sha_setkey(cipher, key, keylen); } static int otx2_cpt_aead_gcm_aes_setkey(struct crypto_aead *cipher, --- linux-xilinx-6.8.0.orig/drivers/crypto/mxs-dcp.c +++ linux-xilinx-6.8.0/drivers/crypto/mxs-dcp.c @@ -220,7 +220,8 @@ static int mxs_dcp_run_aes(struct dcp_async_ctx *actx, struct skcipher_request *req, int init) { - dma_addr_t key_phys, src_phys, dst_phys; + dma_addr_t key_phys = 0; + dma_addr_t src_phys, dst_phys; struct dcp *sdcp = global_sdcp; struct dcp_dma_desc *desc = &sdcp->coh->desc[actx->chan]; struct dcp_aes_req_ctx *rctx = skcipher_request_ctx(req); --- linux-xilinx-6.8.0.orig/drivers/crypto/n2_core.c +++ linux-xilinx-6.8.0/drivers/crypto/n2_core.c @@ -1357,6 +1357,7 @@ ahash->setkey = n2_hmac_async_setkey; base = &ahash->halg.base; + err = -EINVAL; if (snprintf(base->cra_name, CRYPTO_MAX_ALG_NAME, "hmac(%s)", p->child_alg) >= CRYPTO_MAX_ALG_NAME) goto out_free_p; --- linux-xilinx-6.8.0.orig/drivers/crypto/qce/aead.c +++ linux-xilinx-6.8.0/drivers/crypto/qce/aead.c @@ -786,7 +786,7 @@ alg->init = qce_aead_init; alg->exit = qce_aead_exit; - alg->base.cra_priority = 300; + alg->base.cra_priority = 275; alg->base.cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY | CRYPTO_ALG_KERN_DRIVER_ONLY | --- linux-xilinx-6.8.0.orig/drivers/crypto/qce/core.c +++ linux-xilinx-6.8.0/drivers/crypto/qce/core.c @@ -51,16 +51,19 @@ static int qce_register_algs(struct qce_device *qce) { const struct qce_algo_ops *ops; - int i, ret = -ENODEV; + int i, j, ret = -ENODEV; for (i = 0; i < ARRAY_SIZE(qce_ops); i++) { ops = qce_ops[i]; ret = ops->register_algs(qce); - if (ret) - break; + if (ret) { + for (j = i - 1; j >= 0; j--) + ops->unregister_algs(qce); + return ret; + } } - return ret; + return 0; } static int qce_handle_request(struct crypto_async_request *async_req) @@ -247,7 +250,7 @@ ret = qce_check_version(qce); if (ret) - goto err_clks; + goto err_dma; spin_lock_init(&qce->lock); tasklet_init(&qce->done_tasklet, qce_tasklet_req_done, --- linux-xilinx-6.8.0.orig/drivers/crypto/qce/sha.c +++ linux-xilinx-6.8.0/drivers/crypto/qce/sha.c @@ -482,7 +482,7 @@ base = &alg->halg.base; base->cra_blocksize = def->blocksize; - base->cra_priority = 300; + base->cra_priority = 175; base->cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY; base->cra_ctxsize = sizeof(struct qce_sha_ctx); base->cra_alignmask = 0; --- linux-xilinx-6.8.0.orig/drivers/crypto/qce/skcipher.c +++ linux-xilinx-6.8.0/drivers/crypto/qce/skcipher.c @@ -461,7 +461,7 @@ alg->encrypt = qce_skcipher_encrypt; alg->decrypt = qce_skcipher_decrypt; - alg->base.cra_priority = 300; + alg->base.cra_priority = 275; alg->base.cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY | CRYPTO_ALG_KERN_DRIVER_ONLY; --- linux-xilinx-6.8.0.orig/drivers/crypto/qcom-rng.c +++ linux-xilinx-6.8.0/drivers/crypto/qcom-rng.c @@ -196,7 +196,7 @@ if (IS_ERR(rng->clk)) return PTR_ERR(rng->clk); - rng->of_data = (struct qcom_rng_of_data *)of_device_get_match_data(&pdev->dev); + rng->of_data = (struct qcom_rng_of_data *)device_get_match_data(&pdev->dev); qcom_rng_dev = rng; ret = crypto_register_rng(&qcom_rng_alg); @@ -247,7 +247,7 @@ }; static const struct acpi_device_id __maybe_unused qcom_rng_acpi_match[] = { - { .id = "QCOM8160", .driver_data = 1 }, + { .id = "QCOM8160", .driver_data = (kernel_ulong_t)&qcom_prng_ee_of_data }, {} }; MODULE_DEVICE_TABLE(acpi, qcom_rng_acpi_match); --- linux-xilinx-6.8.0.orig/drivers/crypto/starfive/jh7110-cryp.h +++ linux-xilinx-6.8.0/drivers/crypto/starfive/jh7110-cryp.h @@ -30,6 +30,7 @@ #define MAX_KEY_SIZE SHA512_BLOCK_SIZE #define STARFIVE_AES_IV_LEN AES_BLOCK_SIZE #define STARFIVE_AES_CTR_LEN AES_BLOCK_SIZE +#define STARFIVE_RSA_MAX_KEYSZ 256 union starfive_aes_csr { u32 v; @@ -218,12 +219,11 @@ struct scatterlist *out_sg; struct ahash_request ahash_fbk_req; size_t total; - size_t nents; unsigned int blksize; unsigned int digsize; unsigned long in_sg_len; unsigned char *adata; - u8 rsa_data[] __aligned(sizeof(u32)); + u8 rsa_data[STARFIVE_RSA_MAX_KEYSZ] __aligned(sizeof(u32)); }; struct starfive_cryp_dev *starfive_cryp_find_dev(struct starfive_cryp_ctx *ctx); --- linux-xilinx-6.8.0.orig/drivers/crypto/starfive/jh7110-rsa.c +++ linux-xilinx-6.8.0/drivers/crypto/starfive/jh7110-rsa.c @@ -31,7 +31,6 @@ /* A * A * R mod N ==> A */ #define CRYPTO_CMD_AARN 0x7 -#define STARFIVE_RSA_MAX_KEYSZ 256 #define STARFIVE_RSA_RESET 0x2 static inline int starfive_pka_wait_done(struct starfive_cryp_ctx *ctx) @@ -71,7 +70,7 @@ { struct starfive_cryp_dev *cryp = ctx->cryp; struct starfive_cryp_request_ctx *rctx = ctx->rctx; - int count = rctx->total / sizeof(u32) - 1; + int count = (ALIGN(rctx->total, 4) / 4) - 1; int loop; u32 temp; u8 opsize; @@ -248,12 +247,17 @@ struct starfive_cryp_dev *cryp = ctx->cryp; struct starfive_cryp_request_ctx *rctx = ctx->rctx; struct starfive_rsa_key *key = &ctx->rsa_key; - int ret = 0; + int ret = 0, shift = 0; writel(STARFIVE_RSA_RESET, cryp->base + STARFIVE_PKA_CACR_OFFSET); - rctx->total = sg_copy_to_buffer(rctx->in_sg, rctx->nents, - rctx->rsa_data, rctx->total); + if (!IS_ALIGNED(rctx->total, sizeof(u32))) { + shift = sizeof(u32) - (rctx->total & 0x3); + memset(rctx->rsa_data, 0, shift); + } + + rctx->total = sg_copy_to_buffer(rctx->in_sg, sg_nents(rctx->in_sg), + rctx->rsa_data + shift, rctx->total); if (enc) { key->bitlen = key->e_bitlen; @@ -273,7 +277,6 @@ err_rsa_crypt: writel(STARFIVE_RSA_RESET, cryp->base + STARFIVE_PKA_CACR_OFFSET); - kfree(rctx->rsa_data); return ret; } @@ -303,7 +306,6 @@ rctx->in_sg = req->src; rctx->out_sg = req->dst; rctx->total = req->src_len; - rctx->nents = sg_nents(rctx->in_sg); ctx->rctx = rctx; return starfive_rsa_enc_core(ctx, 1); --- linux-xilinx-6.8.0.orig/drivers/crypto/stm32/stm32-cryp.c +++ linux-xilinx-6.8.0/drivers/crypto/stm32/stm32-cryp.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -1665,8 +1666,11 @@ it_mask &= ~IMSCR_OUT; stm32_cryp_write(cryp, cryp->caps->imsc, it_mask); - if (!cryp->payload_in && !cryp->header_in && !cryp->payload_out) + if (!cryp->payload_in && !cryp->header_in && !cryp->payload_out) { + local_bh_disable(); stm32_cryp_finish_req(cryp, 0); + local_bh_enable(); + } return IRQ_HANDLED; } --- linux-xilinx-6.8.0.orig/drivers/crypto/xilinx/Makefile +++ linux-xilinx-6.8.0/drivers/crypto/xilinx/Makefile @@ -1,3 +1,9 @@ # SPDX-License-Identifier: GPL-2.0-only +$(obj)/xilinx_ecdsasig.asn1.o: $(obj)/xilinx_ecdsasig.asn1.c $(obj)/xilinx_ecdsasig.asn1.h +xilinx-ecds-y += xilinx_ecdsasig.asn1.o +xilinx-ecds-y += xilinx-ecdsa.o +obj-$(CONFIG_CRYPTO_DEV_XILINX_ECDSA) += xilinx-ecds.o obj-$(CONFIG_CRYPTO_DEV_ZYNQMP_AES) += zynqmp-aes-gcm.o obj-$(CONFIG_CRYPTO_DEV_ZYNQMP_SHA3) += zynqmp-sha.o +obj-$(CONFIG_CRYPTO_DEV_XILINX_RSA) += zynqmp-rsa.o +obj-$(CONFIG_CRYPTO_DEV_XILINX_RSA_AKCIPHER) += xilinx-rsa.o --- linux-xilinx-6.8.0.orig/drivers/crypto/xilinx/xilinx-ecdsa.c +++ linux-xilinx-6.8.0/drivers/crypto/xilinx/xilinx-ecdsa.c @@ -0,0 +1,508 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * AMD Versal ECDSA Driver. + * Copyright (C) 2022 - 2024, Advanced Micro Devices, Inc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "xilinx_ecdsasig.asn1.h" + +/* PLM supports 32-bit addresses only */ +#define VERSAL_DMA_BIT_MASK 32U + +/* PLM can process HASH and signature in multiples of 8 bytes */ +#define ECDSA_P521_CURVE_ALIGN_BYTES 2U +/* Includes size for x and y coordinate. */ +#define ECDSA_MAX_KEY_SIZE (ECC_MAX_BYTES << 1) + +struct xilinx_sign_gen_params { + u64 hash_addr; + u64 privkey_addr; + u64 eprivkey_addr; + u32 curve_type; + u32 size; +}; + +struct xilinx_sign_verify_params { + u64 hash_addr; + u64 pubkey_addr; + u64 sign_addr; + u32 curve_type; + u32 size; +}; + +enum xilinx_crv_typ { + XSECURE_ECC_NIST_P384 = 4, + XSECURE_ECC_NIST_P521 = 5, +}; + +enum xilinx_crv_class { + XSECURE_ECDSA_PRIME = 0, + XSECURE_ECDSA_BINARY = 1, +}; + +struct xilinx_ecdsa_drv_ctx { + struct crypto_engine *engine; + struct akcipher_engine_alg alg; + struct device *dev; +}; + +enum xilinx_akcipher_op { + XILINX_ECDSA_DECRYPT = 0, + XILINX_ECDSA_ENCRYPT +}; + +struct xilinx_ecdsa_tfm_ctx { + dma_addr_t priv_key_addr, pub_key_addr; + struct crypto_akcipher *fbk_cipher; + const struct ecc_curve *curve; + unsigned int curve_id; + struct device *dev; + size_t key_size; + char *pub_kbuf; +}; + +struct xilinx_ecdsa_req_ctx { + enum xilinx_akcipher_op op; +}; + +static int xilinx_ecdsa_sign(struct akcipher_request *req) +{ + return 0; +} + +int xilinx_ecdsa_get_signature_r(void *context, size_t hdrlen, unsigned char tag, + const void *value, size_t vlen) +{ + struct ecdsa_signature_ctx *sig = context; + + return ecdsa_get_signature_rs(sig->r, hdrlen, tag, value, vlen, + sig->curve->g.ndigits); +} + +int xilinx_ecdsa_get_signature_s(void *context, size_t hdrlen, unsigned char tag, + const void *value, size_t vlen) +{ + struct ecdsa_signature_ctx *sig = context; + + return ecdsa_get_signature_rs(sig->s, hdrlen, tag, value, vlen, + sig->curve->g.ndigits); +} + +static int xilinx_ecdsa_verify(struct akcipher_request *req) +{ + struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); + struct xilinx_ecdsa_tfm_ctx *ctx = akcipher_tfm_ctx(tfm); + size_t keylen = ctx->curve->g.ndigits * sizeof(u64); + dma_addr_t dma_addr, dma_addr1, dma_addr2; + struct xilinx_sign_verify_params *para; + char *hash_buf, *sign_buf; + u8 rawhash[ECC_MAX_BYTES]; + unsigned char *buffer; + ssize_t diff; + int ret; + struct ecdsa_signature_ctx sig_ctx = { + .curve = ctx->curve, + }; + + buffer = kmalloc(req->src_len + req->dst_len, GFP_KERNEL); + if (!buffer) + return -ENOMEM; + + sg_pcopy_to_buffer(req->src, + sg_nents_for_len(req->src, + req->src_len + req->dst_len), + buffer, req->src_len + req->dst_len, 0); + + ret = asn1_ber_decoder(&xilinx_ecdsasig_decoder, &sig_ctx, + buffer, req->src_len); + if (ret < 0) + goto error; + + /* + * If the hash is shorter then we will add leading zeros + * to fit to ndigits + */ + diff = keylen - req->dst_len; + if (diff >= 0) { + if (diff) + memset(rawhash, 0, diff); + memcpy(&rawhash[diff], buffer + req->src_len, req->dst_len); + } else { + /* Given hash is longer, we take the left-most bytes */ + memcpy(&rawhash, buffer + req->src_len, keylen); + } + + para = dma_alloc_coherent(ctx->dev, + sizeof(struct xilinx_sign_verify_params), + &dma_addr, GFP_KERNEL); + if (!para) { + ret = -ENOMEM; + goto error; + } + + if (ctx->curve_id == XSECURE_ECC_NIST_P521) + keylen = ((ctx->curve->g.ndigits - 1) * sizeof(u64)) + ECDSA_P521_CURVE_ALIGN_BYTES; + /* ecc_swap_digits operates on u64 size data buffer */ + hash_buf = dma_alloc_coherent(ctx->dev, round_up(keylen, sizeof(u64)), + &dma_addr1, GFP_KERNEL); + if (!hash_buf) { + ret = -ENOMEM; + goto hash_fail; + } + + sign_buf = dma_alloc_coherent(ctx->dev, ctx->key_size, + &dma_addr2, GFP_KERNEL); + if (!sign_buf) { + ret = -ENOMEM; + goto sign_fail; + } + + para->pubkey_addr = ctx->pub_key_addr; + para->curve_type = ctx->curve_id; + para->sign_addr = dma_addr2; + para->hash_addr = dma_addr1; + para->size = keylen; + + memcpy(sign_buf, sig_ctx.r, keylen); + memcpy(sign_buf + keylen, sig_ctx.s, keylen); + + ecc_swap_digits((u64 *)rawhash, (u64 *)hash_buf, + ctx->curve->g.ndigits); + + ret = versal_pm_ecdsa_verify_sign(dma_addr); + + dma_free_coherent(ctx->dev, ctx->key_size, sign_buf, dma_addr2); + +sign_fail: + dma_free_coherent(ctx->dev, round_up(keylen, sizeof(u64)), hash_buf, dma_addr1); + +hash_fail: + dma_free_coherent(ctx->dev, sizeof(struct xilinx_sign_verify_params), + para, dma_addr); + +error: + kfree(buffer); + + return ret; +} + +static int xilinx_ecdsa_ctx_init(struct xilinx_ecdsa_tfm_ctx *ctx, + unsigned int curve_id) +{ + if (curve_id == ECC_CURVE_NIST_P384) + ctx->curve_id = XSECURE_ECC_NIST_P384; + else + ctx->curve_id = XSECURE_ECC_NIST_P521; + + ctx->curve = ecc_get_curve(curve_id); + if (!ctx->curve) + return -EINVAL; + + return 0; +} + +/* + * Set the public key given the raw uncompressed key data from an X509 + * certificate. The key data contain the concatenated X and Y coordinates of + * the public key. + */ +static int xilinx_ecdsa_set_pub_key(struct crypto_akcipher *tfm, + const void *key, unsigned int keylen) +{ + struct xilinx_ecdsa_tfm_ctx *ctx = akcipher_tfm_ctx(tfm); + unsigned int ndigits, key_size; + const unsigned char *d = key; + + if (keylen < 1 || ((keylen - 1) & 1) != 0) + return -EINVAL; + + /* The key should be in uncompressed format indicated by '4' */ + if (d[0] != 4) + return -EINVAL; + + keylen--; + ctx->key_size = keylen; + + key_size = keylen >> 1; + ndigits = DIV_ROUND_UP(key_size, sizeof(u64)); + if (ndigits != ctx->curve->g.ndigits) + return -EINVAL; + d++; + + ecc_digits_from_bytes(d, key_size, (u64 *)ctx->pub_kbuf, ndigits); + ecc_digits_from_bytes(&d[key_size], key_size, (u64 *)(ctx->pub_kbuf + key_size), ndigits); + + return versal_pm_ecdsa_validate_key(ctx->pub_key_addr, ctx->curve_id); +} + +static void xilinx_ecdsa_exit_tfm(struct crypto_akcipher *tfm) +{ + struct xilinx_ecdsa_tfm_ctx *ctx = akcipher_tfm_ctx(tfm); + + if (ctx->fbk_cipher) { + crypto_free_akcipher(ctx->fbk_cipher); + ctx->fbk_cipher = NULL; + } + + if (ctx->pub_kbuf) { + dma_free_coherent(ctx->dev, ECDSA_MAX_KEY_SIZE, + ctx->pub_kbuf, ctx->pub_key_addr); + } + + memzero_explicit(ctx, sizeof(struct xilinx_ecdsa_tfm_ctx)); +} + +static unsigned int xilinx_ecdsa_max_size(struct crypto_akcipher *tfm) +{ + const struct xilinx_ecdsa_tfm_ctx *ctx = akcipher_tfm_ctx(tfm); + + return DIV_ROUND_UP(ctx->curve->nbits, 8); +} + +static int xilinx_ecdsa_init_tfm(struct crypto_akcipher *tfm) +{ + struct xilinx_ecdsa_tfm_ctx *tfm_ctx = + (struct xilinx_ecdsa_tfm_ctx *)akcipher_tfm_ctx(tfm); + struct akcipher_alg *cipher_alg = crypto_akcipher_alg(tfm); + struct xilinx_ecdsa_drv_ctx *drv_ctx; + + drv_ctx = container_of(cipher_alg, struct xilinx_ecdsa_drv_ctx, alg.base); + tfm_ctx->dev = drv_ctx->dev; + + tfm_ctx->pub_kbuf = dma_alloc_coherent(tfm_ctx->dev, ECDSA_MAX_KEY_SIZE, + &tfm_ctx->pub_key_addr, GFP_KERNEL); + if (!tfm_ctx->pub_kbuf) + return -ENOMEM; + + tfm_ctx->fbk_cipher = crypto_alloc_akcipher(drv_ctx->alg.base.base.cra_name, + 0, + CRYPTO_ALG_NEED_FALLBACK); + if (IS_ERR(tfm_ctx->fbk_cipher)) { + pr_err("%s() Error: failed to allocate fallback for %s\n", + __func__, drv_ctx->alg.base.base.cra_name); + dma_free_coherent(tfm_ctx->dev, ECDSA_MAX_KEY_SIZE, + tfm_ctx->pub_kbuf, tfm_ctx->pub_key_addr); + return PTR_ERR(tfm_ctx->fbk_cipher); + } + + akcipher_set_reqsize(tfm, max(sizeof(struct xilinx_ecdsa_req_ctx), + sizeof(struct akcipher_request) + + crypto_akcipher_reqsize(tfm_ctx->fbk_cipher))); + + if (strcmp(drv_ctx->alg.base.base.cra_name, "ecdsa-nist-p384") == 0) + return xilinx_ecdsa_ctx_init(tfm_ctx, ECC_CURVE_NIST_P384); + else + return xilinx_ecdsa_ctx_init(tfm_ctx, ECC_CURVE_NIST_P521); +} + +static int handle_ecdsa_req(struct crypto_engine *engine, void *req) +{ + struct akcipher_request *areq = container_of(req, + struct akcipher_request, + base); + struct crypto_akcipher *akcipher = crypto_akcipher_reqtfm(req); + const struct xilinx_ecdsa_tfm_ctx *tfm_ctx = akcipher_tfm_ctx(akcipher); + const struct xilinx_ecdsa_req_ctx *rq_ctx = akcipher_request_ctx(areq); + struct akcipher_request *subreq = akcipher_request_ctx(req); + int err; + + akcipher_request_set_tfm(subreq, tfm_ctx->fbk_cipher); + + akcipher_request_set_callback(subreq, areq->base.flags, NULL, NULL); + akcipher_request_set_crypt(subreq, areq->src, areq->dst, + areq->src_len, areq->dst_len); + + if (rq_ctx->op == XILINX_ECDSA_ENCRYPT) + err = crypto_akcipher_encrypt(subreq); + else if (rq_ctx->op == XILINX_ECDSA_DECRYPT) + err = crypto_akcipher_decrypt(subreq); + else + err = -EOPNOTSUPP; + + crypto_finalize_akcipher_request(engine, areq, err); + + return 0; +} + +static struct xilinx_ecdsa_drv_ctx versal_ecdsa_drv_ctx[] = { + { + .alg.base = { + .verify = xilinx_ecdsa_verify, + .set_pub_key = xilinx_ecdsa_set_pub_key, + .max_size = xilinx_ecdsa_max_size, + .init = xilinx_ecdsa_init_tfm, + .exit = xilinx_ecdsa_exit_tfm, + .sign = xilinx_ecdsa_sign, + .base = { + .cra_name = "ecdsa-nist-p384", + .cra_driver_name = "xilinx-ecdsa-nist-p384", + .cra_priority = 100, + .cra_flags = CRYPTO_ALG_TYPE_AKCIPHER | + CRYPTO_ALG_KERN_DRIVER_ONLY | + CRYPTO_ALG_ALLOCATES_MEMORY | + CRYPTO_ALG_NEED_FALLBACK, + .cra_module = THIS_MODULE, + .cra_ctxsize = sizeof(struct xilinx_ecdsa_tfm_ctx), + }, + }, + .alg.op = { + .do_one_request = handle_ecdsa_req, + } + }, + { + .alg.base = { + .verify = xilinx_ecdsa_verify, + .set_pub_key = xilinx_ecdsa_set_pub_key, + .max_size = xilinx_ecdsa_max_size, + .init = xilinx_ecdsa_init_tfm, + .exit = xilinx_ecdsa_exit_tfm, + .sign = xilinx_ecdsa_sign, + .base = { + .cra_name = "ecdsa-nist-p521", + .cra_driver_name = "xilinx-ecdsa-nist-p521", + .cra_priority = 100, + .cra_flags = CRYPTO_ALG_TYPE_AKCIPHER | + CRYPTO_ALG_KERN_DRIVER_ONLY | + CRYPTO_ALG_ALLOCATES_MEMORY | + CRYPTO_ALG_NEED_FALLBACK, + .cra_module = THIS_MODULE, + .cra_ctxsize = sizeof(struct xilinx_ecdsa_tfm_ctx), + }, + }, + .alg.op = { + .do_one_request = handle_ecdsa_req, + }, + } +}; + +static struct xlnx_feature ecdsa_feature_map[] = { + { + .family = VERSAL_FAMILY_CODE, + .subfamily = VERSAL_SUB_FAMILY_CODE, + .feature_id = XSECURE_API_ELLIPTIC_VALIDATE_KEY, + .data = &versal_ecdsa_drv_ctx, + }, + { /* sentinel */ } +}; + +static int xilinx_ecdsa_probe(struct platform_device *pdev) +{ + struct xilinx_ecdsa_drv_ctx *ecdsa_drv_ctx; + struct device *dev = &pdev->dev; + int ret, i; + + /* Verify the hardware is present */ + ecdsa_drv_ctx = xlnx_get_crypto_dev_data(ecdsa_feature_map); + if (IS_ERR(ecdsa_drv_ctx)) { + dev_err(dev, "ECDSA is not supported on the platform\n"); + return PTR_ERR(ecdsa_drv_ctx); + } + + ret = dma_set_mask_and_coherent(&pdev->dev, + DMA_BIT_MASK(VERSAL_DMA_BIT_MASK)); + if (ret < 0) { + dev_err(dev, "no usable DMA configuration"); + return ret; + } + + ecdsa_drv_ctx->engine = crypto_engine_alloc_init(dev, 1); + if (!ecdsa_drv_ctx->engine) { + dev_err(dev, "Cannot alloc ECDSA engine\n"); + return -ENOMEM; + } + + ret = crypto_engine_start(ecdsa_drv_ctx->engine); + if (ret) { + dev_err(dev, "Cannot start ECDSA engine\n"); + return ret; + } + + platform_set_drvdata(pdev, ecdsa_drv_ctx); + + for (i = 0; i < ARRAY_SIZE(versal_ecdsa_drv_ctx); i++) { + ecdsa_drv_ctx[i].dev = dev; + ret = crypto_engine_register_akcipher(&ecdsa_drv_ctx[i].alg); + + if (ret) { + dev_err(dev, "failed to register %s (%d)!\n", + ecdsa_drv_ctx[i].alg.base.base.cra_name, ret); + goto crypto_engine_cleanup; + } + } + + return 0; + +crypto_engine_cleanup: + for (--i; i >= 0; --i) + crypto_engine_unregister_akcipher(&ecdsa_drv_ctx[i].alg); + + crypto_engine_exit(ecdsa_drv_ctx->engine); + + return ret; +} + +static int xilinx_ecdsa_remove(struct platform_device *pdev) +{ + struct xilinx_ecdsa_drv_ctx *ecdsa_drv_ctx; + + ecdsa_drv_ctx = platform_get_drvdata(pdev); + + for (int i = 0; i < ARRAY_SIZE(versal_ecdsa_drv_ctx); i++) + crypto_engine_unregister_akcipher(&ecdsa_drv_ctx[i].alg); + + return 0; +} + +static struct platform_driver xilinx_ecdsa_driver = { + .probe = xilinx_ecdsa_probe, + .remove = xilinx_ecdsa_remove, + .driver = { + .name = "xilinx_ecdsa", + }, +}; + +static struct platform_device *platform_dev; + +static int __init ecdsa_driver_init(void) +{ + int ret; + + ret = platform_driver_register(&xilinx_ecdsa_driver); + if (ret) + return ret; + + platform_dev = platform_device_register_simple(xilinx_ecdsa_driver.driver.name, + 0, NULL, 0); + if (IS_ERR(platform_dev)) { + ret = PTR_ERR(platform_dev); + platform_driver_unregister(&xilinx_ecdsa_driver); + } + + return ret; +} + +static void __exit ecdsa_driver_exit(void) +{ + platform_device_unregister(platform_dev); + platform_driver_unregister(&xilinx_ecdsa_driver); +} + +module_init(ecdsa_driver_init) +module_exit(ecdsa_driver_exit); + +MODULE_DESCRIPTION("Versal ECDSA hw acceleration support."); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Harsha "); --- linux-xilinx-6.8.0.orig/drivers/crypto/xilinx/xilinx-rsa.c +++ linux-xilinx-6.8.0/drivers/crypto/xilinx/xilinx-rsa.c @@ -0,0 +1,597 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022 - 2024, Advanced Micro Devices, Inc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define XILINX_DMA_BIT_MASK 32U +#define XILINX_RSA_MAX_KEY_SIZE 1024 +#define XILINX_RSA_BLOCKSIZE 64 + +/* Key size in bytes */ +#define XSECURE_RSA_2048_KEY_SIZE (2048U / 8U) +#define XSECURE_RSA_3072_KEY_SIZE (3072U / 8U) +#define XSECURE_RSA_4096_KEY_SIZE (4096U / 8U) + +enum xilinx_akcipher_op { + XILINX_RSA_DECRYPT = 0, + XILINX_RSA_ENCRYPT, + XILINX_RSA_SIGN, + XILINX_RSA_VERIFY +}; + +struct versal_rsa_in_param { + u64 key_addr; + u64 data_addr; + u32 size; +}; + +struct xilinx_rsa_drv_ctx { + struct akcipher_engine_alg alg; + struct device *dev; + struct crypto_engine *engine; + int (*xilinx_rsa_xcrypt)(struct akcipher_request *req); +}; + +struct xilinx_rsa_tfm_ctx { + struct device *dev; + struct crypto_akcipher *fbk_cipher; + u8 *e_buf; + u8 *n_buf; + u8 *d_buf; + unsigned int key_len; /* in bits */ + unsigned int e_len; + unsigned int n_len; + unsigned int d_len; +}; + +struct xilinx_rsa_req_ctx { + enum xilinx_akcipher_op op; +}; + +static int zynqmp_rsa_xcrypt(struct akcipher_request *req) +{ + struct xilinx_rsa_req_ctx *rq_ctx = akcipher_request_ctx(req); + unsigned int len, offset, diff = req->dst_len - req->src_len; + struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); + struct xilinx_rsa_tfm_ctx *tctx = akcipher_tfm_ctx(tfm); + dma_addr_t dma_addr; + char *kbuf; + const char *buf; + size_t dma_size; + u8 padding = 0; + int ret; + + if (rq_ctx->op == XILINX_RSA_ENCRYPT) { + padding = tctx->e_len % 2; + buf = tctx->e_buf; + len = tctx->e_len; + } else { + buf = tctx->d_buf; + len = tctx->d_len; + } + + dma_size = req->dst_len + tctx->n_len + len + padding; + offset = dma_size - len; + + kbuf = dma_alloc_coherent(tctx->dev, dma_size, &dma_addr, GFP_KERNEL); + if (!kbuf) + return -ENOMEM; + + scatterwalk_map_and_copy(kbuf + diff, req->src, 0, req->src_len, 0); + memcpy(kbuf + req->dst_len, tctx->n_buf, tctx->n_len); + + memcpy(kbuf + offset, buf, len); + + ret = zynqmp_pm_rsa(dma_addr, tctx->n_len, rq_ctx->op); + if (ret == 0) { + sg_copy_from_buffer(req->dst, sg_nents(req->dst), kbuf, + req->dst_len); + } + + dma_free_coherent(tctx->dev, dma_size, kbuf, dma_addr); + + return ret; +} + +static int versal_rsa_xcrypt(struct akcipher_request *req) +{ + const struct xilinx_rsa_req_ctx *rq_ctx = akcipher_request_ctx(req); + unsigned int len, offset, diff = req->dst_len - req->src_len; + struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); + struct xilinx_rsa_tfm_ctx *tctx = akcipher_tfm_ctx(tfm); + struct versal_rsa_in_param *para; + dma_addr_t dma_addr, dma_addr1; + char *kbuf; + const char *buf; + size_t dma_size; + u8 padding = 0; + int ret = 0; + + para = dma_alloc_coherent(tctx->dev, + sizeof(struct versal_rsa_in_param), + &dma_addr1, GFP_KERNEL); + if (!para) + return -ENOMEM; + + if (rq_ctx->op == XILINX_RSA_ENCRYPT) { + padding = tctx->e_len % 2; + buf = tctx->e_buf; + len = tctx->e_len; + } else { + buf = tctx->d_buf; + len = tctx->d_len; + } + + dma_size = req->dst_len + tctx->n_len + len + padding; + offset = dma_size - len; + + kbuf = dma_alloc_coherent(tctx->dev, dma_size, &dma_addr, GFP_KERNEL); + if (!kbuf) { + ret = -ENOMEM; + goto kbuf_fail; + } + + scatterwalk_map_and_copy(kbuf + diff, req->src, 0, req->src_len, 0); + + memcpy(kbuf + req->dst_len, tctx->n_buf, tctx->n_len); + + memcpy(kbuf + offset, buf, len); + + para->key_addr = (u64)(dma_addr + req->dst_len); + para->data_addr = (u64)dma_addr; + para->size = req->dst_len; + + if (rq_ctx->op == XILINX_RSA_ENCRYPT) + ret = versal_pm_rsa_encrypt(dma_addr1, dma_addr); + else + ret = versal_pm_rsa_decrypt(dma_addr1, dma_addr); + + if (ret == 0) { + sg_copy_from_buffer(req->dst, sg_nents(req->dst), kbuf, + req->dst_len); + } + dma_free_coherent(tctx->dev, dma_size, kbuf, dma_addr); + +kbuf_fail: + dma_free_coherent(tctx->dev, sizeof(struct versal_rsa_in_param), + para, dma_addr1); + + return ret; +} + +static int xilinx_rsa_decrypt(struct akcipher_request *req) +{ + struct xilinx_rsa_req_ctx *rctx = akcipher_request_ctx(req); + struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); + struct akcipher_alg *alg = crypto_akcipher_alg(tfm); + struct xilinx_rsa_drv_ctx *drv_ctx; + + rctx->op = XILINX_RSA_DECRYPT; + drv_ctx = container_of(alg, struct xilinx_rsa_drv_ctx, alg.base); + + return crypto_transfer_akcipher_request_to_engine(drv_ctx->engine, req); +} + +static int xilinx_rsa_encrypt(struct akcipher_request *req) +{ + struct xilinx_rsa_req_ctx *rctx = akcipher_request_ctx(req); + struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); + struct akcipher_alg *alg = crypto_akcipher_alg(tfm); + struct xilinx_rsa_drv_ctx *drv_ctx; + + rctx->op = XILINX_RSA_ENCRYPT; + drv_ctx = container_of(alg, struct xilinx_rsa_drv_ctx, alg.base); + + return crypto_transfer_akcipher_request_to_engine(drv_ctx->engine, req); +} + +static unsigned int xilinx_rsa_max_size(struct crypto_akcipher *tfm) +{ + const struct xilinx_rsa_tfm_ctx *tctx = akcipher_tfm_ctx(tfm); + + return tctx->n_len; +} + +static inline int xilinx_copy_and_save_keypart(u8 **kpbuf, unsigned int *kplen, + const u8 *buf, size_t sz) +{ + int nskip; + + for (nskip = 0; nskip < sz; nskip++) + if (buf[nskip]) + break; + + *kplen = sz - nskip; + *kpbuf = kmemdup(buf + nskip, *kplen, GFP_KERNEL); + if (!*kpbuf) + return -ENOMEM; + + return 0; +} + +static int xilinx_check_key_length(unsigned int len) +{ + if (len < 8 || len > 4096) + return -EINVAL; + return 0; +} + +static void xilinx_rsa_free_key_bufs(struct xilinx_rsa_tfm_ctx *ctx) +{ + /* Clean up old key data */ + kfree_sensitive(ctx->e_buf); + ctx->e_buf = NULL; + ctx->e_len = 0; + kfree_sensitive(ctx->n_buf); + ctx->n_buf = NULL; + ctx->n_len = 0; + kfree_sensitive(ctx->d_buf); + ctx->d_buf = NULL; + ctx->d_len = 0; +} + +static int xilinx_rsa_setkey(struct crypto_akcipher *tfm, const void *key, + unsigned int keylen, bool private) +{ + struct xilinx_rsa_tfm_ctx *tctx = akcipher_tfm_ctx(tfm); + struct rsa_key raw_key; + int ret; + + if (private) + ret = rsa_parse_priv_key(&raw_key, key, keylen); + else + ret = rsa_parse_pub_key(&raw_key, key, keylen); + if (ret) + return ret; + + ret = xilinx_copy_and_save_keypart(&tctx->n_buf, &tctx->n_len, + raw_key.n, raw_key.n_sz); + if (ret) + return ret; + + /* convert to bits */ + tctx->key_len = tctx->n_len << 3; + if (xilinx_check_key_length(tctx->key_len)) { + ret = -EINVAL; + goto key_err; + } + + ret = xilinx_copy_and_save_keypart(&tctx->e_buf, &tctx->e_len, + raw_key.e, raw_key.e_sz); + if (ret) + goto key_err; + + if (private) { + ret = xilinx_copy_and_save_keypart(&tctx->d_buf, &tctx->d_len, + raw_key.d, raw_key.d_sz); + if (ret) + goto key_err; + } + + return 0; + +key_err: + xilinx_rsa_free_key_bufs(tctx); + return ret; +} + +static int xilinx_rsa_set_priv_key(struct crypto_akcipher *tfm, const void *key, + unsigned int keylen) +{ + struct xilinx_rsa_tfm_ctx *tfm_ctx = akcipher_tfm_ctx(tfm); + int ret; + + tfm_ctx->fbk_cipher->base.crt_flags &= ~CRYPTO_TFM_REQ_MASK; + tfm_ctx->fbk_cipher->base.crt_flags |= (tfm->base.crt_flags & + CRYPTO_TFM_REQ_MASK); + + ret = crypto_akcipher_set_priv_key(tfm_ctx->fbk_cipher, key, keylen); + if (ret) + return ret; + + return xilinx_rsa_setkey(tfm, key, keylen, true); +} + +static int xilinx_rsa_set_pub_key(struct crypto_akcipher *tfm, const void *key, + unsigned int keylen) +{ + struct xilinx_rsa_tfm_ctx *tfm_ctx = akcipher_tfm_ctx(tfm); + int ret; + + tfm_ctx->fbk_cipher->base.crt_flags &= ~CRYPTO_TFM_REQ_MASK; + tfm_ctx->fbk_cipher->base.crt_flags |= (tfm->base.crt_flags & + CRYPTO_TFM_REQ_MASK); + + ret = crypto_akcipher_set_pub_key(tfm_ctx->fbk_cipher, key, keylen); + if (ret) + return ret; + + return xilinx_rsa_setkey(tfm, key, keylen, false); +} + +static int xilinx_fallback_check(const struct xilinx_rsa_tfm_ctx *tfm_ctx, + const struct akcipher_request *areq) +{ + /* Return 1 if fallback to crypto engine for performing requested operation */ + if (tfm_ctx->n_len != XSECURE_RSA_2048_KEY_SIZE && + tfm_ctx->n_len != XSECURE_RSA_3072_KEY_SIZE && + tfm_ctx->n_len != XSECURE_RSA_4096_KEY_SIZE) + return 1; + + if (areq->src_len > areq->dst_len) + return 1; + + return 0; +} + +static int handle_rsa_req(struct crypto_engine *engine, + void *req) +{ + struct akcipher_request *areq = container_of(req, + struct akcipher_request, + base); + struct crypto_akcipher *akcipher = crypto_akcipher_reqtfm(req); + struct akcipher_alg *cipher_alg = crypto_akcipher_alg(akcipher); + const struct xilinx_rsa_tfm_ctx *tfm_ctx = akcipher_tfm_ctx(akcipher); + const struct xilinx_rsa_req_ctx *rq_ctx = akcipher_request_ctx(areq); + struct akcipher_request *subreq = akcipher_request_ctx(req); + struct xilinx_rsa_drv_ctx *drv_ctx; + int need_fallback, err; + + drv_ctx = container_of(cipher_alg, struct xilinx_rsa_drv_ctx, alg.base); + + need_fallback = xilinx_fallback_check(tfm_ctx, areq); + if (need_fallback) { + akcipher_request_set_tfm(subreq, tfm_ctx->fbk_cipher); + + akcipher_request_set_callback(subreq, areq->base.flags, + NULL, NULL); + akcipher_request_set_crypt(subreq, areq->src, areq->dst, + areq->src_len, areq->dst_len); + + if (rq_ctx->op == XILINX_RSA_ENCRYPT) + err = crypto_akcipher_encrypt(subreq); + else if (rq_ctx->op == XILINX_RSA_DECRYPT) + err = crypto_akcipher_decrypt(subreq); + else + err = -EOPNOTSUPP; + } else { + err = drv_ctx->xilinx_rsa_xcrypt(areq); + } + + crypto_finalize_akcipher_request(engine, areq, err); + + return 0; +} + +static int xilinx_rsa_init(struct crypto_akcipher *tfm) +{ + struct xilinx_rsa_tfm_ctx *tfm_ctx = + (struct xilinx_rsa_tfm_ctx *)akcipher_tfm_ctx(tfm); + struct akcipher_alg *cipher_alg = crypto_akcipher_alg(tfm); + struct xilinx_rsa_drv_ctx *drv_ctx; + + drv_ctx = container_of(cipher_alg, struct xilinx_rsa_drv_ctx, alg.base); + tfm_ctx->dev = drv_ctx->dev; + tfm_ctx->fbk_cipher = crypto_alloc_akcipher(drv_ctx->alg.base.base.cra_name, + 0, + CRYPTO_ALG_NEED_FALLBACK); + if (IS_ERR(tfm_ctx->fbk_cipher)) { + pr_err("%s() Error: failed to allocate fallback for %s\n", + __func__, drv_ctx->alg.base.base.cra_name); + return PTR_ERR(tfm_ctx->fbk_cipher); + } + + akcipher_set_reqsize(tfm, max(sizeof(struct xilinx_rsa_req_ctx), + sizeof(struct akcipher_request) + + crypto_akcipher_reqsize(tfm_ctx->fbk_cipher))); + + return 0; +} + +static void xilinx_rsa_exit(struct crypto_akcipher *tfm) +{ + struct xilinx_rsa_tfm_ctx *tfm_ctx = + (struct xilinx_rsa_tfm_ctx *)akcipher_tfm_ctx(tfm); + + xilinx_rsa_free_key_bufs(tfm_ctx); + + if (tfm_ctx->fbk_cipher) { + crypto_free_akcipher(tfm_ctx->fbk_cipher); + tfm_ctx->fbk_cipher = NULL; + } + memzero_explicit(tfm_ctx, sizeof(struct xilinx_rsa_tfm_ctx)); +} + +static struct xilinx_rsa_drv_ctx zynqmp_rsa_drv_ctx = { + .xilinx_rsa_xcrypt = zynqmp_rsa_xcrypt, + .alg.base = { + .init = xilinx_rsa_init, + .set_pub_key = xilinx_rsa_set_pub_key, + .set_priv_key = xilinx_rsa_set_priv_key, + .max_size = xilinx_rsa_max_size, + .decrypt = xilinx_rsa_decrypt, + .encrypt = xilinx_rsa_encrypt, + .sign = xilinx_rsa_decrypt, + .verify = xilinx_rsa_encrypt, + .exit = xilinx_rsa_exit, + .base = { + .cra_name = "rsa", + .cra_driver_name = "zynqmp-rsa", + .cra_priority = 200, + .cra_flags = CRYPTO_ALG_TYPE_AKCIPHER | + CRYPTO_ALG_KERN_DRIVER_ONLY | + CRYPTO_ALG_ALLOCATES_MEMORY | + CRYPTO_ALG_NEED_FALLBACK, + .cra_blocksize = XILINX_RSA_BLOCKSIZE, + .cra_ctxsize = sizeof(struct xilinx_rsa_tfm_ctx), + .cra_alignmask = 15, + .cra_module = THIS_MODULE, + }, + }, + .alg.op = { + .do_one_request = handle_rsa_req, + }, +}; + +static struct xilinx_rsa_drv_ctx versal_rsa_drv_ctx = { + .xilinx_rsa_xcrypt = versal_rsa_xcrypt, + .alg.base = { + .init = xilinx_rsa_init, + .set_pub_key = xilinx_rsa_set_pub_key, + .set_priv_key = xilinx_rsa_set_priv_key, + .max_size = xilinx_rsa_max_size, + .decrypt = xilinx_rsa_decrypt, + .encrypt = xilinx_rsa_encrypt, + .sign = xilinx_rsa_decrypt, + .verify = xilinx_rsa_encrypt, + .exit = xilinx_rsa_exit, + .base = { + .cra_name = "rsa", + .cra_driver_name = "versal-rsa", + .cra_priority = 200, + .cra_flags = CRYPTO_ALG_TYPE_AKCIPHER | + CRYPTO_ALG_KERN_DRIVER_ONLY | + CRYPTO_ALG_ALLOCATES_MEMORY | + CRYPTO_ALG_NEED_FALLBACK, + .cra_blocksize = XILINX_RSA_BLOCKSIZE, + .cra_ctxsize = sizeof(struct xilinx_rsa_tfm_ctx), + .cra_alignmask = 15, + .cra_module = THIS_MODULE, + }, + }, + .alg.op = { + .do_one_request = handle_rsa_req, + }, +}; + +static struct xlnx_feature rsa_feature_map[] = { + { + .family = ZYNQMP_FAMILY_CODE, + .subfamily = ALL_SUB_FAMILY_CODE, + .feature_id = PM_SECURE_RSA, + .data = &zynqmp_rsa_drv_ctx, + }, + { + .family = VERSAL_FAMILY_CODE, + .subfamily = VERSAL_SUB_FAMILY_CODE, + .feature_id = XSECURE_API_RSA_PUBLIC_ENCRYPT, + .data = &versal_rsa_drv_ctx, + }, + { /* sentinel */ } +}; + +static int xilinx_rsa_probe(struct platform_device *pdev) +{ + struct xilinx_rsa_drv_ctx *rsa_drv_ctx; + struct device *dev = &pdev->dev; + int ret; + + /* Verify the hardware is present */ + rsa_drv_ctx = xlnx_get_crypto_dev_data(rsa_feature_map); + if (IS_ERR(rsa_drv_ctx)) { + dev_err(dev, "RSA is not supported on the platform\n"); + return PTR_ERR(rsa_drv_ctx); + } + + ret = dma_set_mask_and_coherent(dev, + DMA_BIT_MASK(XILINX_DMA_BIT_MASK)); + if (ret < 0) { + dev_err(dev, "no usable DMA configuration"); + return ret; + } + + rsa_drv_ctx->engine = crypto_engine_alloc_init(dev, 1); + if (!rsa_drv_ctx->engine) { + dev_err(dev, "Cannot alloc RSA engine\n"); + return -ENOMEM; + } + + ret = crypto_engine_start(rsa_drv_ctx->engine); + if (ret) { + dev_err(dev, "Cannot start RSA engine\n"); + goto out; + } + + rsa_drv_ctx->dev = dev; + platform_set_drvdata(pdev, rsa_drv_ctx); + + ret = crypto_engine_register_akcipher(&rsa_drv_ctx->alg); + if (ret < 0) { + dev_err(dev, "Failed to register akcipher alg.\n"); + goto out; + } + + return 0; + +out: + crypto_engine_exit(rsa_drv_ctx->engine); + + return ret; +} + +static int xilinx_rsa_remove(struct platform_device *pdev) +{ + struct xilinx_rsa_drv_ctx *rsa_drv_ctx; + + rsa_drv_ctx = platform_get_drvdata(pdev); + + crypto_engine_exit(rsa_drv_ctx->engine); + + crypto_engine_unregister_akcipher(&rsa_drv_ctx->alg); + + return 0; +} + +static struct platform_driver xilinx_rsa_driver = { + .probe = xilinx_rsa_probe, + .remove = xilinx_rsa_remove, + .driver = { + .name = "xilinx_rsa", + }, +}; + +static struct platform_device *platform_dev; + +static int __init xilinx_rsa_driver_init(void) +{ + int ret; + + ret = platform_driver_register(&xilinx_rsa_driver); + if (ret) + return ret; + + platform_dev = platform_device_register_simple(xilinx_rsa_driver.driver.name, + 0, NULL, 0); + if (IS_ERR(platform_dev)) { + ret = PTR_ERR(platform_dev); + platform_driver_unregister(&xilinx_rsa_driver); + } + + return ret; +} + +static void __exit xilinx_rsa_driver_exit(void) +{ + platform_device_unregister(platform_dev); + platform_driver_unregister(&xilinx_rsa_driver); +} + +module_init(xilinx_rsa_driver_init); +module_exit(xilinx_rsa_driver_exit); + +MODULE_DESCRIPTION("Xilinx RSA hw acceleration support."); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Harsha "); --- linux-xilinx-6.8.0.orig/drivers/crypto/xilinx/xilinx_ecdsasig.asn1 +++ linux-xilinx-6.8.0/drivers/crypto/xilinx/xilinx_ecdsasig.asn1 @@ -0,0 +1,4 @@ +ECDSASignature ::= SEQUENCE { + r INTEGER ({ xilinx_ecdsa_get_signature_r }), + s INTEGER ({ xilinx_ecdsa_get_signature_s }) +} --- linux-xilinx-6.8.0.orig/drivers/crypto/xilinx/zynqmp-aes-gcm.c +++ linux-xilinx-6.8.0/drivers/crypto/xilinx/zynqmp-aes-gcm.c @@ -1,7 +1,8 @@ // SPDX-License-Identifier: GPL-2.0 /* * Xilinx ZynqMP AES Driver. - * Copyright (c) 2020 Xilinx Inc. + * Copyright (C) 2020 - 2022 Xilinx Inc. + * Copyright (C) 2022 - 2023, Advanced Micro Devices, Inc. */ #include @@ -26,6 +27,8 @@ #define ZYNQMP_AES_BLK_SIZE 1U #define ZYNQMP_AES_MIN_INPUT_BLK_SIZE 4U #define ZYNQMP_AES_WORD_LEN 4U +#define VERSAL_AES_QWORD_LEN 16U +#define ZYNQMP_AES_DEVICE_LEY_LEN 1U #define ZYNQMP_AES_GCM_TAG_MISMATCH_ERR 0x01 #define ZYNQMP_AES_WRONG_KEY_SRC_ERR 0x13 @@ -42,12 +45,59 @@ ZYNQMP_AES_PUF_KEY }; -struct zynqmp_aead_drv_ctx { - union { - struct aead_engine_alg aead; - } alg; +enum versal_aead_keysrc { + VERSAL_AES_BBRAM_KEY = 0, + VERSAL_AES_BBRAM_RED_KEY, + VERSAL_AES_BH_KEY, + VERSAL_AES_BH_RED_KEY, + VERSAL_AES_EFUSE_KEY, + VERSAL_AES_EFUSE_RED_KEY, + VERSAL_AES_EFUSE_USER_KEY_0, + VERSAL_AES_EFUSE_USER_KEY_1, + VERSAL_AES_EFUSE_USER_RED_KEY_0, + VERSAL_AES_EFUSE_USER_RED_KEY_1, + VERSAL_AES_KUP_KEY, + VERSAL_AES_PUF_KEY, + VERSAL_AES_USER_KEY_0, + VERSAL_AES_USER_KEY_1, + VERSAL_AES_USER_KEY_2, + VERSAL_AES_USER_KEY_3, + VERSAL_AES_USER_KEY_4, + VERSAL_AES_USER_KEY_5, + VERSAL_AES_USER_KEY_6, + VERSAL_AES_USER_KEY_7, + VERSAL_AES_EXPANDED_KEYS, + VERSAL_AES_ALL_KEYS, +}; + +enum versal_aead_op { + VERSAL_AES_ENCRYPT = 0, + VERSAL_AES_DECRYPT +}; + +enum versal_aes_keysize { + AES_KEY_SIZE_128 = 0, + AES_KEY_SIZE_256 = 2, +}; + +struct zynqmp_aead_tfm_ctx { + struct device *dev; + u8 key[ZYNQMP_AES_KEY_SIZE]; + u8 *iv; + u32 keylen; + u32 authsize; + u8 keysrc; + struct crypto_aead *fbk_cipher; +}; + +struct xilinx_aead_drv_ctx { + struct aead_engine_alg aead; struct device *dev; struct crypto_engine *engine; + u8 keysrc; + int (*aes_aead_cipher)(struct aead_request *areq); + int (*fallback_check)(struct zynqmp_aead_tfm_ctx *ctx, + struct aead_request *areq); }; struct zynqmp_aead_hw_req { @@ -60,20 +110,23 @@ u64 keysrc; }; -struct zynqmp_aead_tfm_ctx { - struct device *dev; - u8 key[ZYNQMP_AES_KEY_SIZE]; - u8 *iv; - u32 keylen; - u32 authsize; - enum zynqmp_aead_keysrc keysrc; - struct crypto_aead *fbk_cipher; -}; - struct zynqmp_aead_req_ctx { enum zynqmp_aead_op op; }; +struct versal_init_ops { + u64 iv; + u32 op; + u32 keysrc; + u32 size; +}; + +struct versal_in_params { + u64 in_data_addr; + u32 size; + u32 is_last; +}; + static int zynqmp_aes_aead_cipher(struct aead_request *req) { struct crypto_aead *aead = crypto_aead_reqtfm(req); @@ -174,46 +227,210 @@ return err; } +static int versal_aes_aead_cipher(struct aead_request *req) +{ + struct crypto_aead *aead = crypto_aead_reqtfm(req); + struct zynqmp_aead_tfm_ctx *tfm_ctx = crypto_aead_ctx(aead); + struct zynqmp_aead_req_ctx *rq_ctx = aead_request_ctx(req); + dma_addr_t dma_addr_data, dma_addr_hw_req, dma_addr_in; + u32 total_len = req->assoclen + req->cryptlen; + u32 key_offset = total_len + GCM_AES_IV_SIZE; + struct device *dev = tfm_ctx->dev; + struct versal_init_ops *hwreq; + struct versal_in_params *in; + u32 gcm_offset, out_len; + size_t dma_size; + char *kbuf; + int ret; + + if (tfm_ctx->keylen != XSECURE_AES_KEY_SIZE_128 && + tfm_ctx->keylen != XSECURE_AES_KEY_SIZE_256) { + ret = -EINVAL; + goto err; + } + + dma_size = key_offset; + /* Allocate keylen for volatile user keys */ + if (tfm_ctx->keysrc >= VERSAL_AES_USER_KEY_0 && tfm_ctx->keysrc <= VERSAL_AES_USER_KEY_7) + dma_size += tfm_ctx->keylen; + + kbuf = dma_alloc_coherent(dev, dma_size, &dma_addr_data, GFP_KERNEL); + if (!kbuf) { + ret = -ENOMEM; + goto err; + } + + /* + * Allocated separate memory as separate structure for init ops + * Also to avoid big continuous memory allocation + */ + hwreq = dma_alloc_coherent(dev, sizeof(struct versal_init_ops), + &dma_addr_hw_req, GFP_KERNEL); + if (!hwreq) { + ret = -ENOMEM; + goto hwreq_fail; + } + + /* + * Allocated separate memory as separate structure for in params + * Also to avoid big continuous memory allocation + */ + in = dma_alloc_coherent(dev, sizeof(struct versal_in_params), + &dma_addr_in, GFP_KERNEL); + if (!in) { + ret = -ENOMEM; + goto in_fail; + } + + scatterwalk_map_and_copy(kbuf, req->src, 0, total_len, 0); + memcpy(kbuf + total_len, req->iv, GCM_AES_IV_SIZE); + hwreq->iv = dma_addr_data + total_len; + hwreq->keysrc = tfm_ctx->keysrc; + + if (rq_ctx->op == ZYNQMP_AES_ENCRYPT) { + hwreq->op = VERSAL_AES_ENCRYPT; + out_len = total_len + ZYNQMP_AES_AUTH_SIZE; + in->size = req->cryptlen; + } else { + hwreq->op = VERSAL_AES_DECRYPT; + out_len = total_len - ZYNQMP_AES_AUTH_SIZE; + in->size = req->cryptlen - ZYNQMP_AES_AUTH_SIZE; + } + + if (tfm_ctx->keylen == XSECURE_AES_KEY_SIZE_128) + hwreq->size = AES_KEY_SIZE_128; + else if (tfm_ctx->keylen == XSECURE_AES_KEY_SIZE_256) + hwreq->size = AES_KEY_SIZE_256; + + /* Request aes key write for volatile user keys */ + if (hwreq->keysrc >= VERSAL_AES_USER_KEY_0 && hwreq->keysrc <= VERSAL_AES_USER_KEY_7) { + memcpy(kbuf + key_offset, tfm_ctx->key, tfm_ctx->keylen); + ret = versal_pm_aes_key_write(hwreq->size, hwreq->keysrc, + dma_addr_data + key_offset); + if (ret) + goto key_fail; + } + + ret = versal_pm_aes_op_init(dma_addr_hw_req); + if (ret) + goto clearkey; + + if (req->assoclen > 0) { + /* Currently GMAC is OFF by default */ + ret = versal_pm_aes_update_aad(dma_addr_data, req->assoclen); + if (ret) + goto clearkey; + } + + in->in_data_addr = dma_addr_data + req->assoclen; + in->is_last = 1; + gcm_offset = req->assoclen + in->size; + + if (rq_ctx->op == ZYNQMP_AES_ENCRYPT) { + ret = versal_pm_aes_enc_update(dma_addr_in, + dma_addr_data + req->assoclen); + if (ret) + goto clearkey; + + ret = versal_pm_aes_enc_final(dma_addr_data + gcm_offset); + if (ret) + goto clearkey; + } else { + ret = versal_pm_aes_dec_update(dma_addr_in, + dma_addr_data + req->assoclen); + if (ret) + goto clearkey; + + ret = versal_pm_aes_dec_final(dma_addr_data + gcm_offset); + if (ret) { + ret = -EBADMSG; + goto clearkey; + } + } + + sg_copy_from_buffer(req->dst, sg_nents(req->dst), + kbuf, out_len); + +clearkey: + if (hwreq->keysrc >= VERSAL_AES_USER_KEY_0 && hwreq->keysrc <= VERSAL_AES_USER_KEY_7) + versal_pm_aes_key_zero(hwreq->keysrc); +key_fail: + dma_free_coherent(dev, sizeof(struct versal_in_params), in, dma_addr_in); +in_fail: + memzero_explicit(hwreq, sizeof(struct versal_init_ops)); + dma_free_coherent(dev, sizeof(struct versal_init_ops), hwreq, dma_addr_hw_req); +hwreq_fail: + memzero_explicit(kbuf, dma_size); + dma_free_coherent(dev, dma_size, kbuf, dma_addr_data); +err: + return ret; +} + static int zynqmp_fallback_check(struct zynqmp_aead_tfm_ctx *tfm_ctx, struct aead_request *req) { - int need_fallback = 0; struct zynqmp_aead_req_ctx *rq_ctx = aead_request_ctx(req); - if (tfm_ctx->authsize != ZYNQMP_AES_AUTH_SIZE) - need_fallback = 1; + if ((tfm_ctx->keysrc == ZYNQMP_AES_KUP_KEY && + tfm_ctx->keylen != ZYNQMP_AES_KEY_SIZE) || + (tfm_ctx->keysrc == ZYNQMP_AES_DEV_KEY && + tfm_ctx->keylen != ZYNQMP_AES_DEVICE_LEY_LEN)) + return 1; - if (tfm_ctx->keysrc == ZYNQMP_AES_KUP_KEY && - tfm_ctx->keylen != ZYNQMP_AES_KEY_SIZE) { - need_fallback = 1; - } if (req->assoclen != 0 || - req->cryptlen < ZYNQMP_AES_MIN_INPUT_BLK_SIZE) { - need_fallback = 1; - } + req->cryptlen < ZYNQMP_AES_MIN_INPUT_BLK_SIZE) + return 1; + if ((req->cryptlen % ZYNQMP_AES_WORD_LEN) != 0) - need_fallback = 1; + return 1; if (rq_ctx->op == ZYNQMP_AES_DECRYPT && - req->cryptlen <= ZYNQMP_AES_AUTH_SIZE) { - need_fallback = 1; - } - return need_fallback; + req->cryptlen <= ZYNQMP_AES_AUTH_SIZE) + return 1; + + return 0; +} + +static int versal_fallback_check(struct zynqmp_aead_tfm_ctx *tfm_ctx, + struct aead_request *req) +{ + struct zynqmp_aead_req_ctx *rq_ctx = aead_request_ctx(req); + + if (tfm_ctx->authsize != ZYNQMP_AES_AUTH_SIZE) + return 1; + + if (tfm_ctx->keylen != XSECURE_AES_KEY_SIZE_128 && + tfm_ctx->keylen != XSECURE_AES_KEY_SIZE_256) + return 1; + + if (req->cryptlen < ZYNQMP_AES_MIN_INPUT_BLK_SIZE || + req->cryptlen % ZYNQMP_AES_WORD_LEN || + req->assoclen % VERSAL_AES_QWORD_LEN) + return 1; + + if (rq_ctx->op == ZYNQMP_AES_DECRYPT && + req->cryptlen <= ZYNQMP_AES_AUTH_SIZE) + return 1; + + return 0; } -static int zynqmp_handle_aes_req(struct crypto_engine *engine, - void *req) +static int handle_aes_req(struct crypto_engine *engine, void *req) { struct aead_request *areq = container_of(req, struct aead_request, base); struct crypto_aead *aead = crypto_aead_reqtfm(req); struct zynqmp_aead_tfm_ctx *tfm_ctx = crypto_aead_ctx(aead); + struct aead_alg *alg = crypto_aead_alg(aead); + struct xilinx_aead_drv_ctx *drv_ctx; + struct zynqmp_aead_req_ctx *rq_ctx = aead_request_ctx(areq); struct aead_request *subreq = aead_request_ctx(req); int need_fallback; int err; - need_fallback = zynqmp_fallback_check(tfm_ctx, areq); + drv_ctx = container_of(alg, struct xilinx_aead_drv_ctx, aead.base); + need_fallback = drv_ctx->fallback_check(tfm_ctx, areq); if (need_fallback) { aead_request_set_tfm(subreq, tfm_ctx->fbk_cipher); @@ -228,10 +445,13 @@ else err = crypto_aead_decrypt(subreq); } else { - err = zynqmp_aes_aead_cipher(areq); + err = drv_ctx->aes_aead_cipher(areq); } + local_bh_disable(); crypto_finalize_aead_request(engine, areq, err); + local_bh_enable(); + return 0; } @@ -248,10 +468,10 @@ if (keysrc == ZYNQMP_AES_KUP_KEY || keysrc == ZYNQMP_AES_DEV_KEY || keysrc == ZYNQMP_AES_PUF_KEY) { - tfm_ctx->keysrc = (enum zynqmp_aead_keysrc)keysrc; - } else { + tfm_ctx->keysrc = keysrc; tfm_ctx->keylen = keylen; } + return 0; } else { tfm_ctx->keylen = keylen; if (keylen == ZYNQMP_AES_KEY_SIZE) { @@ -267,6 +487,48 @@ return crypto_aead_setkey(tfm_ctx->fbk_cipher, key, keylen); } +static int versal_aes_aead_setkey(struct crypto_aead *aead, const u8 *key, + unsigned int keylen) +{ + struct crypto_tfm *tfm = crypto_aead_tfm(aead); + struct zynqmp_aead_tfm_ctx *tfm_ctx = + (struct zynqmp_aead_tfm_ctx *)crypto_tfm_ctx(tfm); + + if (keylen == ZYNQMP_KEY_SRC_SEL_KEY_LEN) { + unsigned char keysrc = VERSAL_AES_EFUSE_USER_KEY_0; + + keysrc = *key; + if ((keysrc >= VERSAL_AES_EFUSE_USER_KEY_0 && + keysrc <= VERSAL_AES_USER_KEY_7) && + keysrc != VERSAL_AES_KUP_KEY) { + tfm_ctx->keysrc = keysrc; + return 0; + } + return -EINVAL; + } else { + tfm_ctx->keylen = keylen; + if (keylen == XSECURE_AES_KEY_SIZE_256 || + keylen == XSECURE_AES_KEY_SIZE_128) { + if (tfm_ctx->keysrc >= VERSAL_AES_USER_KEY_0 && + tfm_ctx->keysrc <= VERSAL_AES_USER_KEY_7) { + memcpy(tfm_ctx->key, key, keylen); + } + } + + if (tfm_ctx->keysrc < VERSAL_AES_EFUSE_USER_KEY_0 || + tfm_ctx->keysrc > VERSAL_AES_USER_KEY_7 || + tfm_ctx->keysrc == VERSAL_AES_KUP_KEY) { + tfm_ctx->keysrc = VERSAL_AES_USER_KEY_0; + } + } + + tfm_ctx->fbk_cipher->base.crt_flags &= ~CRYPTO_TFM_REQ_MASK; + tfm_ctx->fbk_cipher->base.crt_flags |= (aead->base.crt_flags & + CRYPTO_TFM_REQ_MASK); + + return crypto_aead_setkey(tfm_ctx->fbk_cipher, key, keylen); +} + static int zynqmp_aes_aead_setauthsize(struct crypto_aead *aead, unsigned int authsize) { @@ -280,48 +542,49 @@ static int zynqmp_aes_aead_encrypt(struct aead_request *req) { - struct zynqmp_aead_drv_ctx *drv_ctx; + struct xilinx_aead_drv_ctx *drv_ctx; struct crypto_aead *aead = crypto_aead_reqtfm(req); struct aead_alg *alg = crypto_aead_alg(aead); struct zynqmp_aead_req_ctx *rq_ctx = aead_request_ctx(req); rq_ctx->op = ZYNQMP_AES_ENCRYPT; - drv_ctx = container_of(alg, struct zynqmp_aead_drv_ctx, alg.aead.base); + drv_ctx = container_of(alg, struct xilinx_aead_drv_ctx, aead.base); return crypto_transfer_aead_request_to_engine(drv_ctx->engine, req); } static int zynqmp_aes_aead_decrypt(struct aead_request *req) { - struct zynqmp_aead_drv_ctx *drv_ctx; + struct xilinx_aead_drv_ctx *drv_ctx; struct crypto_aead *aead = crypto_aead_reqtfm(req); struct aead_alg *alg = crypto_aead_alg(aead); struct zynqmp_aead_req_ctx *rq_ctx = aead_request_ctx(req); rq_ctx->op = ZYNQMP_AES_DECRYPT; - drv_ctx = container_of(alg, struct zynqmp_aead_drv_ctx, alg.aead.base); + drv_ctx = container_of(alg, struct xilinx_aead_drv_ctx, aead.base); return crypto_transfer_aead_request_to_engine(drv_ctx->engine, req); } -static int zynqmp_aes_aead_init(struct crypto_aead *aead) +static int aes_aead_init(struct crypto_aead *aead) { struct crypto_tfm *tfm = crypto_aead_tfm(aead); struct zynqmp_aead_tfm_ctx *tfm_ctx = (struct zynqmp_aead_tfm_ctx *)crypto_tfm_ctx(tfm); - struct zynqmp_aead_drv_ctx *drv_ctx; + struct xilinx_aead_drv_ctx *drv_ctx; struct aead_alg *alg = crypto_aead_alg(aead); - drv_ctx = container_of(alg, struct zynqmp_aead_drv_ctx, alg.aead.base); + drv_ctx = container_of(alg, struct xilinx_aead_drv_ctx, aead.base); tfm_ctx->dev = drv_ctx->dev; + tfm_ctx->keysrc = drv_ctx->keysrc; - tfm_ctx->fbk_cipher = crypto_alloc_aead(drv_ctx->alg.aead.base.base.cra_name, + tfm_ctx->fbk_cipher = crypto_alloc_aead(drv_ctx->aead.base.base.cra_name, 0, CRYPTO_ALG_NEED_FALLBACK); if (IS_ERR(tfm_ctx->fbk_cipher)) { pr_err("%s() Error: failed to allocate fallback for %s\n", - __func__, drv_ctx->alg.aead.base.base.cra_name); + __func__, drv_ctx->aead.base.base.cra_name); return PTR_ERR(tfm_ctx->fbk_cipher); } @@ -345,20 +608,55 @@ memzero_explicit(tfm_ctx, sizeof(struct zynqmp_aead_tfm_ctx)); } -static struct zynqmp_aead_drv_ctx aes_drv_ctx = { - .alg.aead.base = { +static struct xilinx_aead_drv_ctx zynqmp_aes_drv_ctx = { + .fallback_check = zynqmp_fallback_check, + .aes_aead_cipher = zynqmp_aes_aead_cipher, + .keysrc = ZYNQMP_AES_KUP_KEY, + .aead.base = { .setkey = zynqmp_aes_aead_setkey, .setauthsize = zynqmp_aes_aead_setauthsize, .encrypt = zynqmp_aes_aead_encrypt, .decrypt = zynqmp_aes_aead_decrypt, - .init = zynqmp_aes_aead_init, + .init = aes_aead_init, + .exit = zynqmp_aes_aead_exit, + .ivsize = GCM_AES_IV_SIZE, + .maxauthsize = ZYNQMP_AES_AUTH_SIZE, + .base = { + .cra_name = "gcm(aes)", + .cra_driver_name = "zynqmp-aes-gcm", + .cra_priority = 300, + .cra_flags = CRYPTO_ALG_TYPE_AEAD | + CRYPTO_ALG_ASYNC | + CRYPTO_ALG_ALLOCATES_MEMORY | + CRYPTO_ALG_KERN_DRIVER_ONLY | + CRYPTO_ALG_NEED_FALLBACK, + .cra_blocksize = ZYNQMP_AES_BLK_SIZE, + .cra_ctxsize = sizeof(struct zynqmp_aead_tfm_ctx), + .cra_module = THIS_MODULE, + } + }, + .aead.op = { + .do_one_request = handle_aes_req, + }, +}; + +static struct xilinx_aead_drv_ctx versal_aes_drv_ctx = { + .fallback_check = versal_fallback_check, + .aes_aead_cipher = versal_aes_aead_cipher, + .keysrc = VERSAL_AES_USER_KEY_0, + .aead.base = { + .setkey = versal_aes_aead_setkey, + .setauthsize = zynqmp_aes_aead_setauthsize, + .encrypt = zynqmp_aes_aead_encrypt, + .decrypt = zynqmp_aes_aead_decrypt, + .init = aes_aead_init, .exit = zynqmp_aes_aead_exit, .ivsize = GCM_AES_IV_SIZE, .maxauthsize = ZYNQMP_AES_AUTH_SIZE, .base = { .cra_name = "gcm(aes)", - .cra_driver_name = "xilinx-zynqmp-aes-gcm", - .cra_priority = 200, + .cra_driver_name = "versal-aes-gcm", + .cra_priority = 300, .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY | @@ -369,78 +667,126 @@ .cra_module = THIS_MODULE, } }, - .alg.aead.op = { - .do_one_request = zynqmp_handle_aes_req, + .aead.op = { + .do_one_request = handle_aes_req, }, }; +static struct xlnx_feature aes_feature_map[] = { + { + .family = ZYNQMP_FAMILY_CODE, + .subfamily = ALL_SUB_FAMILY_CODE, + .feature_id = PM_SECURE_AES, + .data = &zynqmp_aes_drv_ctx, + }, + { + .family = VERSAL_FAMILY_CODE, + .subfamily = VERSAL_SUB_FAMILY_CODE, + .feature_id = XSECURE_API_AES_OP_INIT, + .data = &versal_aes_drv_ctx, + }, + { /* sentinel */ } +}; + static int zynqmp_aes_aead_probe(struct platform_device *pdev) { + struct xilinx_aead_drv_ctx *aes_drv_ctx; struct device *dev = &pdev->dev; int err; + /* Verify the hardware is present */ + aes_drv_ctx = xlnx_get_crypto_dev_data(aes_feature_map); + if (IS_ERR(aes_drv_ctx)) { + dev_err(dev, "AES is not supported on the platform\n"); + return PTR_ERR(aes_drv_ctx); + } + /* ZynqMP AES driver supports only one instance */ - if (!aes_drv_ctx.dev) - aes_drv_ctx.dev = dev; + if (!aes_drv_ctx->dev) + aes_drv_ctx->dev = dev; else return -ENODEV; + platform_set_drvdata(pdev, aes_drv_ctx); + err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(ZYNQMP_DMA_BIT_MASK)); if (err < 0) { dev_err(dev, "No usable DMA configuration\n"); return err; } - aes_drv_ctx.engine = crypto_engine_alloc_init(dev, 1); - if (!aes_drv_ctx.engine) { + aes_drv_ctx->engine = crypto_engine_alloc_init(dev, 1); + if (!aes_drv_ctx->engine) { dev_err(dev, "Cannot alloc AES engine\n"); err = -ENOMEM; goto err_engine; } - err = crypto_engine_start(aes_drv_ctx.engine); + err = crypto_engine_start(aes_drv_ctx->engine); if (err) { dev_err(dev, "Cannot start AES engine\n"); goto err_engine; } - err = crypto_engine_register_aead(&aes_drv_ctx.alg.aead); + err = crypto_engine_register_aead(&aes_drv_ctx->aead); if (err < 0) { dev_err(dev, "Failed to register AEAD alg.\n"); - goto err_aead; + goto err_engine; } return 0; -err_aead: - crypto_engine_unregister_aead(&aes_drv_ctx.alg.aead); - err_engine: - if (aes_drv_ctx.engine) - crypto_engine_exit(aes_drv_ctx.engine); + if (aes_drv_ctx->engine) + crypto_engine_exit(aes_drv_ctx->engine); return err; } static void zynqmp_aes_aead_remove(struct platform_device *pdev) { - crypto_engine_exit(aes_drv_ctx.engine); - crypto_engine_unregister_aead(&aes_drv_ctx.alg.aead); -} + struct xilinx_aead_drv_ctx *aes_drv_ctx; -static const struct of_device_id zynqmp_aes_dt_ids[] = { - { .compatible = "xlnx,zynqmp-aes" }, - { /* sentinel */ } -}; -MODULE_DEVICE_TABLE(of, zynqmp_aes_dt_ids); + aes_drv_ctx = platform_get_drvdata(pdev); + + crypto_engine_exit(aes_drv_ctx->engine); + crypto_engine_unregister_aead(&aes_drv_ctx->aead); +} static struct platform_driver zynqmp_aes_driver = { .probe = zynqmp_aes_aead_probe, .remove_new = zynqmp_aes_aead_remove, .driver = { .name = "zynqmp-aes", - .of_match_table = zynqmp_aes_dt_ids, }, }; -module_platform_driver(zynqmp_aes_driver); +static struct platform_device *platform_dev; + +static int __init aes_driver_init(void) +{ + int ret; + + ret = platform_driver_register(&zynqmp_aes_driver); + if (ret) + return ret; + + platform_dev = platform_device_register_simple(zynqmp_aes_driver.driver.name, + 0, NULL, 0); + if (IS_ERR(platform_dev)) { + ret = PTR_ERR(platform_dev); + platform_driver_unregister(&zynqmp_aes_driver); + } + + return ret; +} + +static void __exit aes_driver_exit(void) +{ + platform_device_unregister(platform_dev); + platform_driver_unregister(&zynqmp_aes_driver); +} + +device_initcall(aes_driver_init); +module_exit(aes_driver_exit); + MODULE_LICENSE("GPL"); --- linux-xilinx-6.8.0.orig/drivers/crypto/xilinx/zynqmp-rsa.c +++ linux-xilinx-6.8.0/drivers/crypto/xilinx/zynqmp-rsa.c @@ -0,0 +1,277 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2017 - 2022 Xilinx, Inc. + * Copyright (C) 2022 - 2023, Advanced Micro Devices, Inc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define ZYNQMP_RSA_QUEUE_LENGTH 1 +#define ZYNQMP_RSA_MAX_KEY_SIZE 1024 +#define ZYNQMP_RSA_BLOCKSIZE 64 + +/* Key size in bytes */ +#define XSECURE_RSA_2048_KEY_SIZE (2048U / 8U) +#define XSECURE_RSA_3072_KEY_SIZE (3072U / 8U) +#define XSECURE_RSA_4096_KEY_SIZE (4096U / 8U) + +static struct zynqmp_rsa_dev *rsa_dd; + +struct zynqmp_rsa_op { + struct zynqmp_rsa_dev *dd; + void *src; + void *dst; + int len; + u8 key[ZYNQMP_RSA_MAX_KEY_SIZE]; + u8 *iv; + u32 keylen; +}; + +struct zynqmp_rsa_dev { + struct list_head list; + struct device *dev; + /* the lock protects queue and dev list*/ + spinlock_t lock; + struct crypto_queue queue; + struct skcipher_alg *alg; +}; + +struct zynqmp_rsa_drv { + struct list_head dev_list; + /* the lock protects queue and dev list*/ + spinlock_t lock; +}; + +static struct zynqmp_rsa_drv zynqmp_rsa = { + .dev_list = LIST_HEAD_INIT(zynqmp_rsa.dev_list), + .lock = __SPIN_LOCK_UNLOCKED(zynqmp_rsa.lock), +}; + +static struct zynqmp_rsa_dev *zynqmp_rsa_find_dev(struct zynqmp_rsa_op *ctx) +{ + struct zynqmp_rsa_dev *dd = rsa_dd; + + spin_lock_bh(&zynqmp_rsa.lock); + if (!ctx->dd) + ctx->dd = dd; + else + dd = ctx->dd; + spin_unlock_bh(&zynqmp_rsa.lock); + + return dd; +} + +static int zynqmp_setkey_blk(struct crypto_skcipher *tfm, const u8 *key, + unsigned int len) +{ + struct zynqmp_rsa_op *op = crypto_skcipher_ctx(tfm); + + op->keylen = len; + memcpy(op->key, key, len); + return 0; +} + +static int zynqmp_rsa_xcrypt(struct skcipher_request *req, unsigned int flags) +{ + struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); + struct zynqmp_rsa_op *op = crypto_skcipher_ctx(tfm); + struct zynqmp_rsa_dev *dd = zynqmp_rsa_find_dev(op); + int err, datasize, src_data = 0, dst_data = 0; + struct skcipher_walk walk = {0}; + unsigned int nbytes; + char *kbuf; + size_t dma_size; + dma_addr_t dma_addr; + + nbytes = req->cryptlen; + if (nbytes != XSECURE_RSA_2048_KEY_SIZE && + nbytes != XSECURE_RSA_3072_KEY_SIZE && + nbytes != XSECURE_RSA_4096_KEY_SIZE) { + return -EOPNOTSUPP; + } + + dma_size = nbytes + op->keylen; + kbuf = dma_alloc_coherent(dd->dev, dma_size, &dma_addr, GFP_KERNEL); + if (!kbuf) + return -ENOMEM; + + err = skcipher_walk_virt(&walk, req, false); + if (err) + goto out; + + while ((datasize = walk.nbytes)) { + op->src = walk.src.virt.addr; + memcpy(kbuf + src_data, op->src, datasize); + src_data = src_data + datasize; + err = skcipher_walk_done(&walk, 0); + if (err) + goto out; + } + memcpy(kbuf + nbytes, op->key, op->keylen); + + zynqmp_pm_rsa(dma_addr, nbytes, flags); + + err = skcipher_walk_virt(&walk, req, false); + if (err) + goto out; + + while ((datasize = walk.nbytes)) { + memcpy(walk.dst.virt.addr, kbuf + dst_data, datasize); + dst_data = dst_data + datasize; + err = skcipher_walk_done(&walk, 0); + if (err) + goto out; + } + +out: + dma_free_coherent(dd->dev, dma_size, kbuf, dma_addr); + return err; +} + +static int zynqmp_rsa_decrypt(struct skcipher_request *req) +{ + return zynqmp_rsa_xcrypt(req, 0); +} + +static int zynqmp_rsa_encrypt(struct skcipher_request *req) +{ + return zynqmp_rsa_xcrypt(req, 1); +} + +static struct skcipher_alg zynqmp_alg = { + .base.cra_name = "xilinx-zynqmp-rsa", + .base.cra_driver_name = "zynqmp-rsa", + .base.cra_priority = 400, + .base.cra_flags = CRYPTO_ALG_TYPE_SKCIPHER | + CRYPTO_ALG_KERN_DRIVER_ONLY, + .base.cra_blocksize = ZYNQMP_RSA_BLOCKSIZE, + .base.cra_ctxsize = sizeof(struct zynqmp_rsa_op), + .base.cra_alignmask = 15, + .base.cra_module = THIS_MODULE, + .min_keysize = 0, + .max_keysize = ZYNQMP_RSA_MAX_KEY_SIZE, + .setkey = zynqmp_setkey_blk, + .encrypt = zynqmp_rsa_encrypt, + .decrypt = zynqmp_rsa_decrypt, + .ivsize = 1, +}; + +static struct xlnx_feature rsa_feature_map[] = { + { + .family = ZYNQMP_FAMILY_CODE, + .subfamily = ALL_SUB_FAMILY_CODE, + .feature_id = PM_SECURE_RSA, + .data = &zynqmp_alg, + }, + { /* sentinel */ } +}; + +static int zynqmp_rsa_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + int ret; + + rsa_dd = devm_kzalloc(&pdev->dev, sizeof(*rsa_dd), GFP_KERNEL); + if (!rsa_dd) + return -ENOMEM; + + rsa_dd->alg = xlnx_get_crypto_dev_data(rsa_feature_map); + if (IS_ERR(rsa_dd->alg)) { + dev_err(dev, "RSA is not supported on the platform\n"); + return PTR_ERR(rsa_dd->alg); + } + + dev_warn(dev, "This driver is deprecated. Please migrate to xilinx-rsa driver\n"); + rsa_dd->dev = dev; + platform_set_drvdata(pdev, rsa_dd); + + ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); + if (ret < 0) + dev_err(dev, "no usable DMA configuration"); + + INIT_LIST_HEAD(&rsa_dd->list); + spin_lock_init(&rsa_dd->lock); + crypto_init_queue(&rsa_dd->queue, ZYNQMP_RSA_QUEUE_LENGTH); + spin_lock(&zynqmp_rsa.lock); + list_add_tail(&rsa_dd->list, &zynqmp_rsa.dev_list); + spin_unlock(&zynqmp_rsa.lock); + + ret = crypto_register_skcipher(rsa_dd->alg); + if (ret) + goto err_algs; + + return 0; + +err_algs: + spin_lock(&zynqmp_rsa.lock); + list_del(&rsa_dd->list); + spin_unlock(&zynqmp_rsa.lock); + dev_err(dev, "initialization failed.\n"); + return ret; +} + +static int zynqmp_rsa_remove(struct platform_device *pdev) +{ + struct zynqmp_rsa_dev *drv_ctx; + + drv_ctx = platform_get_drvdata(pdev); + + crypto_unregister_skcipher(drv_ctx->alg); + + return 0; +} + +static struct platform_driver xilinx_rsa_driver = { + .probe = zynqmp_rsa_probe, + .remove = zynqmp_rsa_remove, + .driver = { + .name = "zynqmp_rsa", + }, +}; + +static struct platform_device *platform_dev; + +static int __init rsa_driver_init(void) +{ + int ret; + + ret = platform_driver_register(&xilinx_rsa_driver); + if (ret) + return ret; + + platform_dev = platform_device_register_simple(xilinx_rsa_driver.driver.name, + 0, NULL, 0); + if (IS_ERR(platform_dev)) { + ret = PTR_ERR(platform_dev); + platform_driver_unregister(&xilinx_rsa_driver); + } + + return ret; +} + +static void __exit rsa_driver_exit(void) +{ + platform_device_unregister(platform_dev); + platform_driver_unregister(&xilinx_rsa_driver); +} + +device_initcall(rsa_driver_init); +module_exit(rsa_driver_exit); + +MODULE_DESCRIPTION("ZynqMP RSA hw acceleration support."); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Nava kishore Manne "); --- linux-xilinx-6.8.0.orig/drivers/crypto/xilinx/zynqmp-sha.c +++ linux-xilinx-6.8.0/drivers/crypto/xilinx/zynqmp-sha.c @@ -2,8 +2,10 @@ /* * Xilinx ZynqMP SHA Driver. * Copyright (c) 2022 Xilinx Inc. + * Copyright (C) 2022-2023, Advanced Micro Devices, Inc. */ #include +#include #include #include #include @@ -17,7 +19,13 @@ #include #include +#define CONTINUE_PACKET BIT(31) +#define FIRST_PACKET BIT(30) +#define FINAL_PACKET 0 +#define RESET 0 + #define ZYNQMP_DMA_BIT_MASK 32U +#define VERSAL_DMA_BIT_MASK 64U #define ZYNQMP_DMA_ALLOC_FIXED_SIZE 0x1000U enum zynqmp_sha_op { @@ -26,198 +34,359 @@ ZYNQMP_SHA3_FINAL = 4, }; -struct zynqmp_sha_drv_ctx { - struct shash_alg sha3_384; +struct xilinx_sha_drv_ctx { + struct ahash_engine_alg sha3_384; + struct crypto_engine *engine; struct device *dev; + u8 dma_addr_size; }; struct zynqmp_sha_tfm_ctx { struct device *dev; - struct crypto_shash *fbk_tfm; + struct crypto_ahash *fbk_tfm; }; struct zynqmp_sha_desc_ctx { - struct shash_desc fbk_req; + struct ahash_request fallback_req; }; static dma_addr_t update_dma_addr, final_dma_addr; static char *ubuf, *fbuf; -static int zynqmp_sha_init_tfm(struct crypto_shash *hash) +static int zynqmp_sha_init_tfm(struct crypto_tfm *tfm) { - const char *fallback_driver_name = crypto_shash_alg_name(hash); - struct zynqmp_sha_tfm_ctx *tfm_ctx = crypto_shash_ctx(hash); - struct shash_alg *alg = crypto_shash_alg(hash); - struct crypto_shash *fallback_tfm; - struct zynqmp_sha_drv_ctx *drv_ctx; + const char *fallback_driver_name = crypto_tfm_alg_name(tfm); + struct zynqmp_sha_tfm_ctx *tfm_ctx = crypto_tfm_ctx(tfm); + struct hash_alg_common *alg = crypto_hash_alg_common(__crypto_ahash_cast(tfm)); + struct crypto_ahash *fallback_tfm; + struct xilinx_sha_drv_ctx *drv_ctx; - drv_ctx = container_of(alg, struct zynqmp_sha_drv_ctx, sha3_384); + drv_ctx = container_of(alg, struct xilinx_sha_drv_ctx, sha3_384.base.halg); tfm_ctx->dev = drv_ctx->dev; /* Allocate a fallback and abort if it failed. */ - fallback_tfm = crypto_alloc_shash(fallback_driver_name, 0, + fallback_tfm = crypto_alloc_ahash(fallback_driver_name, CRYPTO_ALG_TYPE_SHASH, CRYPTO_ALG_NEED_FALLBACK); if (IS_ERR(fallback_tfm)) return PTR_ERR(fallback_tfm); tfm_ctx->fbk_tfm = fallback_tfm; - hash->descsize += crypto_shash_descsize(tfm_ctx->fbk_tfm); + crypto_ahash_set_statesize(__crypto_ahash_cast(tfm), + crypto_ahash_statesize(fallback_tfm)); + crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm), + crypto_ahash_reqsize(tfm_ctx->fbk_tfm) + + sizeof(struct zynqmp_sha_desc_ctx)); return 0; } -static void zynqmp_sha_exit_tfm(struct crypto_shash *hash) +static void zynqmp_sha_exit_tfm(struct crypto_tfm *tfm) { - struct zynqmp_sha_tfm_ctx *tfm_ctx = crypto_shash_ctx(hash); + struct zynqmp_sha_tfm_ctx *tfm_ctx = crypto_tfm_ctx(tfm); if (tfm_ctx->fbk_tfm) { - crypto_free_shash(tfm_ctx->fbk_tfm); + crypto_free_ahash(tfm_ctx->fbk_tfm); tfm_ctx->fbk_tfm = NULL; } memzero_explicit(tfm_ctx, sizeof(struct zynqmp_sha_tfm_ctx)); } -static int zynqmp_sha_init(struct shash_desc *desc) +static int zynqmp_sha_init(struct ahash_request *req) +{ + struct zynqmp_sha_desc_ctx *dctx = ahash_request_ctx(req); + struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); + struct zynqmp_sha_tfm_ctx *tctx = crypto_ahash_ctx(tfm); + + ahash_request_set_tfm(&dctx->fallback_req, tctx->fbk_tfm); + dctx->fallback_req.base.flags = req->base.flags & + CRYPTO_TFM_REQ_MAY_SLEEP; + return crypto_ahash_init(&dctx->fallback_req); +} + +static int zynqmp_sha_update(struct ahash_request *req) { - struct zynqmp_sha_desc_ctx *dctx = shash_desc_ctx(desc); - struct zynqmp_sha_tfm_ctx *tctx = crypto_shash_ctx(desc->tfm); + struct zynqmp_sha_desc_ctx *dctx = ahash_request_ctx(req); + struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); + struct zynqmp_sha_tfm_ctx *tctx = crypto_ahash_ctx(tfm); - dctx->fbk_req.tfm = tctx->fbk_tfm; - return crypto_shash_init(&dctx->fbk_req); + ahash_request_set_tfm(&dctx->fallback_req, tctx->fbk_tfm); + dctx->fallback_req.base.flags = req->base.flags & + CRYPTO_TFM_REQ_MAY_SLEEP; + dctx->fallback_req.nbytes = req->nbytes; + dctx->fallback_req.src = req->src; + return crypto_ahash_update(&dctx->fallback_req); } -static int zynqmp_sha_update(struct shash_desc *desc, const u8 *data, unsigned int length) +static int zynqmp_sha_final(struct ahash_request *req) { - struct zynqmp_sha_desc_ctx *dctx = shash_desc_ctx(desc); + struct zynqmp_sha_desc_ctx *dctx = ahash_request_ctx(req); + struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); + struct zynqmp_sha_tfm_ctx *tctx = crypto_ahash_ctx(tfm); + + ahash_request_set_tfm(&dctx->fallback_req, tctx->fbk_tfm); + dctx->fallback_req.base.flags = req->base.flags & + CRYPTO_TFM_REQ_MAY_SLEEP; + dctx->fallback_req.result = req->result; - return crypto_shash_update(&dctx->fbk_req, data, length); + return crypto_ahash_final(&dctx->fallback_req); } -static int zynqmp_sha_final(struct shash_desc *desc, u8 *out) +static int zynqmp_sha_finup(struct ahash_request *req) { - struct zynqmp_sha_desc_ctx *dctx = shash_desc_ctx(desc); + struct zynqmp_sha_desc_ctx *dctx = ahash_request_ctx(req); + struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); + struct zynqmp_sha_tfm_ctx *tctx = crypto_ahash_ctx(tfm); - return crypto_shash_final(&dctx->fbk_req, out); + ahash_request_set_tfm(&dctx->fallback_req, tctx->fbk_tfm); + dctx->fallback_req.base.flags = req->base.flags & + CRYPTO_TFM_REQ_MAY_SLEEP; + + dctx->fallback_req.nbytes = req->nbytes; + dctx->fallback_req.src = req->src; + dctx->fallback_req.result = req->result; + + return crypto_ahash_finup(&dctx->fallback_req); } -static int zynqmp_sha_finup(struct shash_desc *desc, const u8 *data, unsigned int length, u8 *out) +static int zynqmp_sha_import(struct ahash_request *req, const void *in) { - struct zynqmp_sha_desc_ctx *dctx = shash_desc_ctx(desc); + struct zynqmp_sha_desc_ctx *dctx = ahash_request_ctx(req); + struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); + struct zynqmp_sha_tfm_ctx *tctx = crypto_ahash_ctx(tfm); + + ahash_request_set_tfm(&dctx->fallback_req, tctx->fbk_tfm); + dctx->fallback_req.base.flags = req->base.flags & + CRYPTO_TFM_REQ_MAY_SLEEP; - return crypto_shash_finup(&dctx->fbk_req, data, length, out); + return crypto_ahash_import(&dctx->fallback_req, in); } -static int zynqmp_sha_import(struct shash_desc *desc, const void *in) +static int zynqmp_sha_export(struct ahash_request *req, void *out) { - struct zynqmp_sha_desc_ctx *dctx = shash_desc_ctx(desc); - struct zynqmp_sha_tfm_ctx *tctx = crypto_shash_ctx(desc->tfm); + struct zynqmp_sha_desc_ctx *dctx = ahash_request_ctx(req); + struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); + struct zynqmp_sha_tfm_ctx *tctx = crypto_ahash_ctx(tfm); - dctx->fbk_req.tfm = tctx->fbk_tfm; - return crypto_shash_import(&dctx->fbk_req, in); + ahash_request_set_tfm(&dctx->fallback_req, tctx->fbk_tfm); + dctx->fallback_req.base.flags = req->base.flags & + CRYPTO_TFM_REQ_MAY_SLEEP; + + return crypto_ahash_export(&dctx->fallback_req, out); } -static int zynqmp_sha_export(struct shash_desc *desc, void *out) +static int sha_digest(struct ahash_request *req) { - struct zynqmp_sha_desc_ctx *dctx = shash_desc_ctx(desc); + struct crypto_tfm *tfm = crypto_ahash_tfm(crypto_ahash_reqtfm(req)); + struct hash_alg_common *alg = crypto_hash_alg_common(__crypto_ahash_cast(tfm)); + struct xilinx_sha_drv_ctx *drv_ctx; + + drv_ctx = container_of(alg, struct xilinx_sha_drv_ctx, sha3_384.base.halg); - return crypto_shash_export(&dctx->fbk_req, out); + return crypto_transfer_hash_request_to_engine(drv_ctx->engine, req); } -static int zynqmp_sha_digest(struct shash_desc *desc, const u8 *data, unsigned int len, u8 *out) +static int zynqmp_sha_digest(struct ahash_request *req) { - unsigned int remaining_len = len; + unsigned int processed = 0; + unsigned int remaining_len; int update_size; int ret; + remaining_len = req->nbytes; ret = zynqmp_pm_sha_hash(0, 0, ZYNQMP_SHA3_INIT); if (ret) return ret; - while (remaining_len != 0) { - memzero_explicit(ubuf, ZYNQMP_DMA_ALLOC_FIXED_SIZE); - if (remaining_len >= ZYNQMP_DMA_ALLOC_FIXED_SIZE) { + while (remaining_len) { + if (remaining_len >= ZYNQMP_DMA_ALLOC_FIXED_SIZE) update_size = ZYNQMP_DMA_ALLOC_FIXED_SIZE; - remaining_len -= ZYNQMP_DMA_ALLOC_FIXED_SIZE; - } else { + else update_size = remaining_len; - remaining_len = 0; - } - memcpy(ubuf, data, update_size); + sg_pcopy_to_buffer(req->src, sg_nents(req->src), ubuf, update_size, processed); flush_icache_range((unsigned long)ubuf, (unsigned long)ubuf + update_size); ret = zynqmp_pm_sha_hash(update_dma_addr, update_size, ZYNQMP_SHA3_UPDATE); if (ret) return ret; - data += update_size; + remaining_len -= update_size; + processed += update_size; } ret = zynqmp_pm_sha_hash(final_dma_addr, SHA3_384_DIGEST_SIZE, ZYNQMP_SHA3_FINAL); - memcpy(out, fbuf, SHA3_384_DIGEST_SIZE); + memcpy(req->result, fbuf, SHA3_384_DIGEST_SIZE); memzero_explicit(fbuf, SHA3_384_DIGEST_SIZE); return ret; } -static struct zynqmp_sha_drv_ctx sha3_drv_ctx = { - .sha3_384 = { +static int versal_sha_digest(struct ahash_request *req) +{ + int update_size, ret, flag = FIRST_PACKET; + unsigned int processed = 0; + unsigned int remaining_len; + + remaining_len = req->nbytes; + while (remaining_len) { + if (remaining_len >= ZYNQMP_DMA_ALLOC_FIXED_SIZE) + update_size = ZYNQMP_DMA_ALLOC_FIXED_SIZE; + else + update_size = remaining_len; + + sg_pcopy_to_buffer(req->src, sg_nents(req->src), ubuf, update_size, processed); + flush_icache_range((unsigned long)ubuf, + (unsigned long)ubuf + update_size); + + flag |= CONTINUE_PACKET; + ret = versal_pm_sha_hash(update_dma_addr, 0, + update_size | flag); + if (ret) + return ret; + + remaining_len -= update_size; + processed += update_size; + flag = RESET; + } + + flag |= FINAL_PACKET; + ret = versal_pm_sha_hash(0, final_dma_addr, flag); + if (ret) + return ret; + + memcpy(req->result, fbuf, SHA3_384_DIGEST_SIZE); + memzero_explicit(fbuf, SHA3_384_DIGEST_SIZE); + + return 0; +} + +static int handle_zynqmp_sha_engine_req(struct crypto_engine *engine, void *req) +{ + int err; + + err = zynqmp_sha_digest(req); + local_bh_disable(); + crypto_finalize_hash_request(engine, req, err); + local_bh_enable(); + + return 0; +} + +static int handle_versal_sha_engine_req(struct crypto_engine *engine, void *req) +{ + int err; + + err = versal_sha_digest(req); + local_bh_disable(); + crypto_finalize_hash_request(engine, req, err); + local_bh_enable(); + + return 0; +} + +static struct xilinx_sha_drv_ctx zynqmp_sha3_drv_ctx = { + .sha3_384.base = { .init = zynqmp_sha_init, .update = zynqmp_sha_update, .final = zynqmp_sha_final, .finup = zynqmp_sha_finup, - .digest = zynqmp_sha_digest, + .digest = sha_digest, .export = zynqmp_sha_export, .import = zynqmp_sha_import, - .init_tfm = zynqmp_sha_init_tfm, - .exit_tfm = zynqmp_sha_exit_tfm, - .descsize = sizeof(struct zynqmp_sha_desc_ctx), - .statesize = sizeof(struct sha3_state), - .digestsize = SHA3_384_DIGEST_SIZE, - .base = { - .cra_name = "sha3-384", - .cra_driver_name = "zynqmp-sha3-384", - .cra_priority = 300, - .cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY | - CRYPTO_ALG_ALLOCATES_MEMORY | - CRYPTO_ALG_NEED_FALLBACK, - .cra_blocksize = SHA3_384_BLOCK_SIZE, - .cra_ctxsize = sizeof(struct zynqmp_sha_tfm_ctx), - .cra_module = THIS_MODULE, + .halg = { + .digestsize = SHA3_384_DIGEST_SIZE, + .statesize = sizeof(struct sha3_state), + .base.cra_init = zynqmp_sha_init_tfm, + .base.cra_exit = zynqmp_sha_exit_tfm, + .base.cra_name = "sha3-384", + .base.cra_driver_name = "zynqmp-sha3-384", + .base.cra_priority = 300, + .base.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY | + CRYPTO_ALG_ALLOCATES_MEMORY | + CRYPTO_ALG_NEED_FALLBACK, + .base.cra_blocksize = SHA3_384_BLOCK_SIZE, + .base.cra_ctxsize = sizeof(struct zynqmp_sha_tfm_ctx), + .base.cra_module = THIS_MODULE, } - } + }, + .sha3_384.op = { + .do_one_request = handle_zynqmp_sha_engine_req, + }, + .dma_addr_size = ZYNQMP_DMA_BIT_MASK, +}; + +static struct xilinx_sha_drv_ctx versal_sha3_drv_ctx = { + .sha3_384.base = { + .init = zynqmp_sha_init, + .update = zynqmp_sha_update, + .final = zynqmp_sha_final, + .finup = zynqmp_sha_finup, + .digest = sha_digest, + .export = zynqmp_sha_export, + .import = zynqmp_sha_import, + .halg = { + .base.cra_init = zynqmp_sha_init_tfm, + .base.cra_exit = zynqmp_sha_exit_tfm, + .base.cra_name = "sha3-384", + .base.cra_driver_name = "versal-sha3-384", + .base.cra_priority = 300, + .base.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY | + CRYPTO_ALG_ALLOCATES_MEMORY | + CRYPTO_ALG_NEED_FALLBACK, + .base.cra_blocksize = SHA3_384_BLOCK_SIZE, + .base.cra_ctxsize = sizeof(struct zynqmp_sha_tfm_ctx), + .base.cra_module = THIS_MODULE, + .statesize = sizeof(struct sha3_state), + .digestsize = SHA3_384_DIGEST_SIZE, + } + }, + .sha3_384.op = { + .do_one_request = handle_versal_sha_engine_req, + }, + .dma_addr_size = VERSAL_DMA_BIT_MASK, +}; + +static struct xlnx_feature sha_feature_map[] = { + { + .family = ZYNQMP_FAMILY_CODE, + .subfamily = ALL_SUB_FAMILY_CODE, + .feature_id = PM_SECURE_SHA, + .data = &zynqmp_sha3_drv_ctx, + }, + { + .family = VERSAL_FAMILY_CODE, + .subfamily = VERSAL_SUB_FAMILY_CODE, + .feature_id = XSECURE_API_SHA3_UPDATE, + .data = &versal_sha3_drv_ctx, + }, + { /* sentinel */ } }; static int zynqmp_sha_probe(struct platform_device *pdev) { + struct xilinx_sha_drv_ctx *sha3_drv_ctx; struct device *dev = &pdev->dev; int err; - u32 v; /* Verify the hardware is present */ - err = zynqmp_pm_get_api_version(&v); - if (err) - return err; - - - err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(ZYNQMP_DMA_BIT_MASK)); - if (err < 0) { - dev_err(dev, "No usable DMA configuration\n"); - return err; + sha3_drv_ctx = xlnx_get_crypto_dev_data(sha_feature_map); + if (IS_ERR(sha3_drv_ctx)) { + dev_err(dev, "SHA is not supported on the platform\n"); + return PTR_ERR(sha3_drv_ctx); } - err = crypto_register_shash(&sha3_drv_ctx.sha3_384); + err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(sha3_drv_ctx->dma_addr_size)); if (err < 0) { - dev_err(dev, "Failed to register shash alg.\n"); + dev_err(dev, "No usable DMA configuration\n"); return err; } - sha3_drv_ctx.dev = dev; - platform_set_drvdata(pdev, &sha3_drv_ctx); + sha3_drv_ctx->dev = dev; + platform_set_drvdata(pdev, sha3_drv_ctx); ubuf = dma_alloc_coherent(dev, ZYNQMP_DMA_ALLOC_FIXED_SIZE, &update_dma_addr, GFP_KERNEL); if (!ubuf) { err = -ENOMEM; - goto err_shash; + return err; } fbuf = dma_alloc_coherent(dev, SHA3_384_DIGEST_SIZE, &final_dma_addr, GFP_KERNEL); @@ -226,24 +395,47 @@ goto err_mem; } + sha3_drv_ctx->engine = crypto_engine_alloc_init(dev, 1); + if (!sha3_drv_ctx->engine) { + dev_err(dev, "Cannot alloc Crypto engine\n"); + err = -ENOMEM; + goto err_engine; + } + + err = crypto_engine_start(sha3_drv_ctx->engine); + if (err) { + dev_err(dev, "Cannot start AES engine\n"); + goto err_start; + } + + err = crypto_engine_register_ahash(&sha3_drv_ctx->sha3_384); + if (err < 0) { + dev_err(dev, "Failed to register sha3 alg.\n"); + goto err_start; + } + return 0; -err_mem: - dma_free_coherent(sha3_drv_ctx.dev, ZYNQMP_DMA_ALLOC_FIXED_SIZE, ubuf, update_dma_addr); +err_start: + crypto_engine_exit(sha3_drv_ctx->engine); +err_engine: + dma_free_coherent(dev, SHA3_384_DIGEST_SIZE, fbuf, final_dma_addr); -err_shash: - crypto_unregister_shash(&sha3_drv_ctx.sha3_384); +err_mem: + dma_free_coherent(dev, ZYNQMP_DMA_ALLOC_FIXED_SIZE, ubuf, update_dma_addr); return err; } static void zynqmp_sha_remove(struct platform_device *pdev) { - sha3_drv_ctx.dev = platform_get_drvdata(pdev); + struct xilinx_sha_drv_ctx *sha3_drv_ctx; - dma_free_coherent(sha3_drv_ctx.dev, ZYNQMP_DMA_ALLOC_FIXED_SIZE, ubuf, update_dma_addr); - dma_free_coherent(sha3_drv_ctx.dev, SHA3_384_DIGEST_SIZE, fbuf, final_dma_addr); - crypto_unregister_shash(&sha3_drv_ctx.sha3_384); + sha3_drv_ctx = platform_get_drvdata(pdev); + crypto_engine_unregister_ahash(&sha3_drv_ctx->sha3_384); + crypto_engine_exit(sha3_drv_ctx->engine); + dma_free_coherent(sha3_drv_ctx->dev, ZYNQMP_DMA_ALLOC_FIXED_SIZE, ubuf, update_dma_addr); + dma_free_coherent(sha3_drv_ctx->dev, SHA3_384_DIGEST_SIZE, fbuf, final_dma_addr); } static struct platform_driver zynqmp_sha_driver = { @@ -254,7 +446,35 @@ }, }; -module_platform_driver(zynqmp_sha_driver); +static struct platform_device *platform_dev; + +static int __init sha_driver_init(void) +{ + int ret; + + ret = platform_driver_register(&zynqmp_sha_driver); + if (ret) + return ret; + + platform_dev = platform_device_register_simple(zynqmp_sha_driver.driver.name, + 0, NULL, 0); + if (IS_ERR(platform_dev)) { + ret = PTR_ERR(platform_dev); + platform_driver_unregister(&zynqmp_sha_driver); + } + + return ret; +} + +static void __exit sha_driver_exit(void) +{ + platform_device_unregister(platform_dev); + platform_driver_unregister(&zynqmp_sha_driver); +} + +device_initcall(sha_driver_init); +module_exit(sha_driver_exit); + MODULE_DESCRIPTION("ZynqMP SHA3 hardware acceleration support."); MODULE_LICENSE("GPL v2"); MODULE_AUTHOR("Harsha "); --- linux-xilinx-6.8.0.orig/drivers/cxl/Kconfig +++ linux-xilinx-6.8.0/drivers/cxl/Kconfig @@ -59,6 +59,7 @@ default CXL_BUS select ACPI_TABLE_LIB select ACPI_HMAT + select CXL_PORT help Enable support for host managed device memory (HDM) resources published by a platform's ACPI CXL memory layout description. See --- linux-xilinx-6.8.0.orig/drivers/cxl/Makefile +++ linux-xilinx-6.8.0/drivers/cxl/Makefile @@ -1,13 +1,21 @@ # SPDX-License-Identifier: GPL-2.0 + +# Order is important here for the built-in case: +# - 'core' first for fundamental init +# - 'port' before platform root drivers like 'acpi' so that CXL-root ports +# are immediately enabled +# - 'mem' and 'pmem' before endpoint drivers so that memdevs are +# immediately enabled +# - 'pci' last, also mirrors the hardware enumeration hierarchy obj-y += core/ -obj-$(CONFIG_CXL_PCI) += cxl_pci.o -obj-$(CONFIG_CXL_MEM) += cxl_mem.o +obj-$(CONFIG_CXL_PORT) += cxl_port.o obj-$(CONFIG_CXL_ACPI) += cxl_acpi.o obj-$(CONFIG_CXL_PMEM) += cxl_pmem.o -obj-$(CONFIG_CXL_PORT) += cxl_port.o +obj-$(CONFIG_CXL_MEM) += cxl_mem.o +obj-$(CONFIG_CXL_PCI) += cxl_pci.o -cxl_mem-y := mem.o -cxl_pci-y := pci.o +cxl_port-y := port.o cxl_acpi-y := acpi.o cxl_pmem-y := pmem.o security.o -cxl_port-y := port.o +cxl_mem-y := mem.o +cxl_pci-y := pci.o --- linux-xilinx-6.8.0.orig/drivers/cxl/acpi.c +++ linux-xilinx-6.8.0/drivers/cxl/acpi.c @@ -74,6 +74,43 @@ return cxlrd->cxlsd.target[n]; } +static u64 cxl_xor_hpa_to_spa(struct cxl_root_decoder *cxlrd, u64 hpa) +{ + struct cxl_cxims_data *cximsd = cxlrd->platform_data; + int hbiw = cxlrd->cxlsd.nr_targets; + u64 val; + int pos; + + /* No xormaps for host bridge interleave ways of 1 or 3 */ + if (hbiw == 1 || hbiw == 3) + return hpa; + + /* + * For root decoders using xormaps (hbiw: 2,4,6,8,12,16) restore + * the position bit to its value before the xormap was applied at + * HPA->DPA translation. + * + * pos is the lowest set bit in an XORMAP + * val is the XORALLBITS(HPA & XORMAP) + * + * XORALLBITS: The CXL spec (3.1 Table 9-22) defines XORALLBITS + * as an operation that outputs a single bit by XORing all the + * bits in the input (hpa & xormap). Implement XORALLBITS using + * hweight64(). If the hamming weight is even the XOR of those + * bits results in val==0, if odd the XOR result is val==1. + */ + + for (int i = 0; i < cximsd->nr_maps; i++) { + if (!cximsd->xormaps[i]) + continue; + pos = __ffs(cximsd->xormaps[i]); + val = (hweight64(hpa & cximsd->xormaps[i]) & 1); + hpa = (hpa & ~(1ULL << pos)) | (val << pos); + } + + return hpa; +} + struct cxl_cxims_context { struct device *dev; struct cxl_root_decoder *cxlrd; @@ -410,6 +447,9 @@ cxlrd->qos_class = cfmws->qtg_id; + if (cfmws->interleave_arithmetic == ACPI_CEDT_CFMWS_ARITHMETIC_XOR) + cxlrd->hpa_to_spa = cxl_xor_hpa_to_spa; + rc = cxl_decoder_add(cxld, target_map); err_xormap: if (rc) @@ -530,13 +570,15 @@ if (kstrtou32(acpi_device_uid(hb), 0, &uid)) return -EINVAL; - rc = acpi_get_genport_coordinates(uid, &dport->hb_coord); + rc = acpi_get_genport_coordinates(uid, dport->hb_coord); if (rc < 0) return rc; /* Adjust back to picoseconds from nanoseconds */ - dport->hb_coord.read_latency *= 1000; - dport->hb_coord.write_latency *= 1000; + for (int i = 0; i < ACCESS_COORDINATE_MAX; i++) { + dport->hb_coord[i].read_latency *= 1000; + dport->hb_coord[i].write_latency *= 1000; + } return 0; } @@ -920,6 +962,13 @@ /* load before dax_hmem sees 'Soft Reserved' CXL ranges */ subsys_initcall(cxl_acpi_init); + +/* + * Arrange for host-bridge ports to be active synchronous with + * cxl_acpi_probe() exit. + */ +MODULE_SOFTDEP("pre: cxl_port"); + module_exit(cxl_acpi_exit); MODULE_LICENSE("GPL v2"); MODULE_IMPORT_NS(CXL); --- linux-xilinx-6.8.0.orig/drivers/cxl/core/cdat.c +++ linux-xilinx-6.8.0/drivers/cxl/core/cdat.c @@ -162,15 +162,22 @@ static int cxl_port_perf_data_calculate(struct cxl_port *port, struct xarray *dsmas_xa) { - struct access_coordinate c; + struct access_coordinate ep_c; + struct access_coordinate coord[ACCESS_COORDINATE_MAX]; struct dsmas_entry *dent; int valid_entries = 0; unsigned long index; int rc; - rc = cxl_endpoint_get_perf_coordinates(port, &c); + rc = cxl_endpoint_get_perf_coordinates(port, &ep_c); if (rc) { - dev_dbg(&port->dev, "Failed to retrieve perf coordinates.\n"); + dev_dbg(&port->dev, "Failed to retrieve ep perf coordinates.\n"); + return rc; + } + + rc = cxl_hb_get_perf_coordinates(port, coord); + if (rc) { + dev_dbg(&port->dev, "Failed to retrieve hb perf coordinates.\n"); return rc; } @@ -185,18 +192,19 @@ xa_for_each(dsmas_xa, index, dent) { int qos_class; - dent->coord.read_latency = dent->coord.read_latency + - c.read_latency; - dent->coord.write_latency = dent->coord.write_latency + - c.write_latency; - dent->coord.read_bandwidth = min_t(int, c.read_bandwidth, - dent->coord.read_bandwidth); - dent->coord.write_bandwidth = min_t(int, c.write_bandwidth, - dent->coord.write_bandwidth); - + cxl_coordinates_combine(&dent->coord, &dent->coord, &ep_c); + /* + * Keeping the host bridge coordinates separate from the dsmas + * coordinates in order to allow calculation of access class + * 0 and 1 for region later. + */ + cxl_coordinates_combine(&coord[ACCESS_COORDINATE_LOCAL], + &coord[ACCESS_COORDINATE_LOCAL], + &dent->coord); dent->entries = 1; - rc = cxl_root->ops->qos_class(cxl_root, &dent->coord, 1, - &qos_class); + rc = cxl_root->ops->qos_class(cxl_root, + &coord[ACCESS_COORDINATE_LOCAL], + 1, &qos_class); if (rc != 1) continue; @@ -389,36 +397,38 @@ static int cdat_sslbis_handler(union acpi_subtable_headers *header, void *arg, const unsigned long end) { + struct acpi_cdat_sslbis_table { + struct acpi_cdat_header header; + struct acpi_cdat_sslbis sslbis_header; + struct acpi_cdat_sslbe entries[]; + } *tbl = (struct acpi_cdat_sslbis_table *)header; + int size = sizeof(header->cdat) + sizeof(tbl->sslbis_header); struct acpi_cdat_sslbis *sslbis; - int size = sizeof(header->cdat) + sizeof(*sslbis); struct cxl_port *port = arg; struct device *dev = &port->dev; - struct acpi_cdat_sslbe *entry; int remain, entries, i; u16 len; len = le16_to_cpu((__force __le16)header->cdat.length); remain = len - size; - if (!remain || remain % sizeof(*entry) || + if (!remain || remain % sizeof(tbl->entries[0]) || (unsigned long)header + len > end) { dev_warn(dev, "Malformed SSLBIS table length: (%u)\n", len); return -EINVAL; } - /* Skip common header */ - sslbis = (struct acpi_cdat_sslbis *)((unsigned long)header + - sizeof(header->cdat)); - + sslbis = &tbl->sslbis_header; /* Unrecognized data type, we can skip */ if (sslbis->data_type > ACPI_HMAT_WRITE_BANDWIDTH) return 0; - entries = remain / sizeof(*entry); - entry = (struct acpi_cdat_sslbe *)((unsigned long)header + sizeof(*sslbis)); + entries = remain / sizeof(tbl->entries[0]); + if (struct_size(tbl, entries, entries) != len) + return -EINVAL; for (i = 0; i < entries; i++) { - u16 x = le16_to_cpu((__force __le16)entry->portx_id); - u16 y = le16_to_cpu((__force __le16)entry->porty_id); + u16 x = le16_to_cpu((__force __le16)tbl->entries[i].portx_id); + u16 y = le16_to_cpu((__force __le16)tbl->entries[i].porty_id); __le64 le_base; __le16 le_val; struct cxl_dport *dport; @@ -448,8 +458,8 @@ break; } - le_base = (__force __le64)sslbis->entry_base_unit; - le_val = (__force __le16)entry->latency_or_bandwidth; + le_base = (__force __le64)tbl->sslbis_header.entry_base_unit; + le_val = (__force __le16)tbl->entries[i].latency_or_bandwidth; if (check_mul_overflow(le64_to_cpu(le_base), le16_to_cpu(le_val), &val)) @@ -462,8 +472,6 @@ sslbis->data_type, val); } - - entry++; } return 0; @@ -484,4 +492,26 @@ } EXPORT_SYMBOL_NS_GPL(cxl_switch_parse_cdat, CXL); +/** + * cxl_coordinates_combine - Combine the two input coordinates + * + * @out: Output coordinate of c1 and c2 combined + * @c1: input coordinates + * @c2: input coordinates + */ +void cxl_coordinates_combine(struct access_coordinate *out, + struct access_coordinate *c1, + struct access_coordinate *c2) +{ + if (c1->write_bandwidth && c2->write_bandwidth) + out->write_bandwidth = min(c1->write_bandwidth, + c2->write_bandwidth); + out->write_latency = c1->write_latency + c2->write_latency; + + if (c1->read_bandwidth && c2->read_bandwidth) + out->read_bandwidth = min(c1->read_bandwidth, + c2->read_bandwidth); + out->read_latency = c1->read_latency + c2->read_latency; +} + MODULE_IMPORT_NS(CXL); --- linux-xilinx-6.8.0.orig/drivers/cxl/core/core.h +++ linux-xilinx-6.8.0/drivers/cxl/core/core.h @@ -27,7 +27,14 @@ int cxl_region_init(void); void cxl_region_exit(void); int cxl_get_poison_by_endpoint(struct cxl_port *port); +struct cxl_region *cxl_dpa_to_region(const struct cxl_memdev *cxlmd, u64 dpa); + #else +static inline +struct cxl_region *cxl_dpa_to_region(const struct cxl_memdev *cxlmd, u64 dpa) +{ + return NULL; +} static inline int cxl_get_poison_by_endpoint(struct cxl_port *port) { return 0; --- linux-xilinx-6.8.0.orig/drivers/cxl/core/hdm.c +++ linux-xilinx-6.8.0/drivers/cxl/core/hdm.c @@ -52,6 +52,14 @@ struct cxl_dport *dport = NULL; int single_port_map[1]; unsigned long index; + struct cxl_hdm *cxlhdm = dev_get_drvdata(&port->dev); + + /* + * Capability checks are moot for passthrough decoders, support + * any and all possibilities. + */ + cxlhdm->interleave_mask = ~0U; + cxlhdm->iw_cap_mask = ~0UL; cxlsd = cxl_switch_decoder_alloc(port, 1); if (IS_ERR(cxlsd)) @@ -79,6 +87,11 @@ cxlhdm->interleave_mask |= GENMASK(11, 8); if (FIELD_GET(CXL_HDM_DECODER_INTERLEAVE_14_12, hdm_cap)) cxlhdm->interleave_mask |= GENMASK(14, 12); + cxlhdm->iw_cap_mask = BIT(1) | BIT(2) | BIT(4) | BIT(8); + if (FIELD_GET(CXL_HDM_DECODER_INTERLEAVE_3_6_12_WAY, hdm_cap)) + cxlhdm->iw_cap_mask |= BIT(3) | BIT(6) | BIT(12); + if (FIELD_GET(CXL_HDM_DECODER_INTERLEAVE_16_WAY, hdm_cap)) + cxlhdm->iw_cap_mask |= BIT(16); } static bool should_emulate_decoders(struct cxl_endpoint_dvsec_info *info) @@ -700,7 +713,44 @@ return 0; } -static int cxl_decoder_reset(struct cxl_decoder *cxld) +static int commit_reap(struct device *dev, const void *data) +{ + struct cxl_port *port = to_cxl_port(dev->parent); + struct cxl_decoder *cxld; + + if (!is_switch_decoder(dev) && !is_endpoint_decoder(dev)) + return 0; + + cxld = to_cxl_decoder(dev); + if (port->commit_end == cxld->id && + ((cxld->flags & CXL_DECODER_F_ENABLE) == 0)) { + port->commit_end--; + dev_dbg(&port->dev, "reap: %s commit_end: %d\n", + dev_name(&cxld->dev), port->commit_end); + } + + return 0; +} + +void cxl_port_commit_reap(struct cxl_decoder *cxld) +{ + struct cxl_port *port = to_cxl_port(cxld->dev.parent); + + lockdep_assert_held_write(&cxl_region_rwsem); + + /* + * Once the highest committed decoder is disabled, free any other + * decoders that were pinned allocated by out-of-order release. + */ + port->commit_end--; + dev_dbg(&port->dev, "reap: %s commit_end: %d\n", dev_name(&cxld->dev), + port->commit_end); + device_for_each_child_reverse_from(&port->dev, &cxld->dev, NULL, + commit_reap); +} +EXPORT_SYMBOL_NS_GPL(cxl_port_commit_reap, CXL); + +static void cxl_decoder_reset(struct cxl_decoder *cxld) { struct cxl_port *port = to_cxl_port(cxld->dev.parent); struct cxl_hdm *cxlhdm = dev_get_drvdata(&port->dev); @@ -709,14 +759,14 @@ u32 ctrl; if ((cxld->flags & CXL_DECODER_F_ENABLE) == 0) - return 0; + return; - if (port->commit_end != id) { + if (port->commit_end == id) + cxl_port_commit_reap(cxld); + else dev_dbg(&port->dev, "%s: out of order reset, expected decoder%d.%d\n", dev_name(&cxld->dev), port->id, port->commit_end); - return -EBUSY; - } down_read(&cxl_dpa_rwsem); ctrl = readl(hdm + CXL_HDM_DECODER0_CTRL_OFFSET(id)); @@ -729,7 +779,6 @@ writel(0, hdm + CXL_HDM_DECODER0_BASE_LOW_OFFSET(id)); up_read(&cxl_dpa_rwsem); - port->commit_end--; cxld->flags &= ~CXL_DECODER_F_ENABLE; /* Userspace is now responsible for reconfiguring this decoder */ @@ -739,8 +788,6 @@ cxled = to_cxl_endpoint_decoder(&cxld->dev); cxled->state = CXL_DECODER_STATE_MANUAL; } - - return 0; } static int cxl_setup_hdm_decoder_from_dvsec( --- linux-xilinx-6.8.0.orig/drivers/cxl/core/mbox.c +++ linux-xilinx-6.8.0/drivers/cxl/core/mbox.c @@ -915,7 +915,7 @@ payload->handles[i++] = gen->hdr.handle; dev_dbg(mds->cxlds.dev, "Event log '%d': Clearing %u\n", log, - le16_to_cpu(payload->handles[i])); + le16_to_cpu(payload->handles[i - 1])); if (i == max_handles) { payload->nr_recs = i; @@ -946,24 +946,22 @@ struct cxl_memdev *cxlmd = mds->cxlds.cxlmd; struct device *dev = mds->cxlds.dev; struct cxl_get_event_payload *payload; - struct cxl_mbox_cmd mbox_cmd; u8 log_type = type; u16 nr_rec; mutex_lock(&mds->event.log_lock); payload = mds->event.buf; - mbox_cmd = (struct cxl_mbox_cmd) { - .opcode = CXL_MBOX_OP_GET_EVENT_RECORD, - .payload_in = &log_type, - .size_in = sizeof(log_type), - .payload_out = payload, - .size_out = mds->payload_size, - .min_out = struct_size(payload, records, 0), - }; - do { int rc, i; + struct cxl_mbox_cmd mbox_cmd = (struct cxl_mbox_cmd) { + .opcode = CXL_MBOX_OP_GET_EVENT_RECORD, + .payload_in = &log_type, + .size_in = sizeof(log_type), + .payload_out = payload, + .size_out = mds->payload_size, + .min_out = struct_size(payload, records, 0), + }; rc = cxl_internal_send_cmd(mds, &mbox_cmd); if (rc) { @@ -1296,7 +1294,6 @@ struct cxl_memdev_state *mds = to_cxl_memdev_state(cxlmd->cxlds); struct cxl_mbox_poison_out *po; struct cxl_mbox_poison_in pi; - struct cxl_mbox_cmd mbox_cmd; int nr_records = 0; int rc; @@ -1308,16 +1305,16 @@ pi.offset = cpu_to_le64(offset); pi.length = cpu_to_le64(len / CXL_POISON_LEN_MULT); - mbox_cmd = (struct cxl_mbox_cmd) { - .opcode = CXL_MBOX_OP_GET_POISON, - .size_in = sizeof(pi), - .payload_in = &pi, - .size_out = mds->payload_size, - .payload_out = po, - .min_out = struct_size(po, record, 0), - }; - do { + struct cxl_mbox_cmd mbox_cmd = (struct cxl_mbox_cmd){ + .opcode = CXL_MBOX_OP_GET_POISON, + .size_in = sizeof(pi), + .payload_in = &pi, + .size_out = mds->payload_size, + .payload_out = po, + .min_out = struct_size(po, record, 0), + }; + rc = cxl_internal_send_cmd(mds, &mbox_cmd); if (rc) break; --- linux-xilinx-6.8.0.orig/drivers/cxl/core/memdev.c +++ linux-xilinx-6.8.0/drivers/cxl/core/memdev.c @@ -251,50 +251,6 @@ } EXPORT_SYMBOL_NS_GPL(cxl_trigger_poison_list, CXL); -struct cxl_dpa_to_region_context { - struct cxl_region *cxlr; - u64 dpa; -}; - -static int __cxl_dpa_to_region(struct device *dev, void *arg) -{ - struct cxl_dpa_to_region_context *ctx = arg; - struct cxl_endpoint_decoder *cxled; - u64 dpa = ctx->dpa; - - if (!is_endpoint_decoder(dev)) - return 0; - - cxled = to_cxl_endpoint_decoder(dev); - if (!cxled->dpa_res || !resource_size(cxled->dpa_res)) - return 0; - - if (dpa > cxled->dpa_res->end || dpa < cxled->dpa_res->start) - return 0; - - dev_dbg(dev, "dpa:0x%llx mapped in region:%s\n", dpa, - dev_name(&cxled->cxld.region->dev)); - - ctx->cxlr = cxled->cxld.region; - - return 1; -} - -static struct cxl_region *cxl_dpa_to_region(struct cxl_memdev *cxlmd, u64 dpa) -{ - struct cxl_dpa_to_region_context ctx; - struct cxl_port *port; - - ctx = (struct cxl_dpa_to_region_context) { - .dpa = dpa, - }; - port = cxlmd->endpoint; - if (port && is_cxl_endpoint(port) && cxl_num_decoders_committed(port)) - device_for_each_child(&port->dev, &ctx, __cxl_dpa_to_region); - - return ctx.cxlr; -} - static int cxl_validate_poison_dpa(struct cxl_memdev *cxlmd, u64 dpa) { struct cxl_dev_state *cxlds = cxlmd->cxlds; --- linux-xilinx-6.8.0.orig/drivers/cxl/core/pci.c +++ linux-xilinx-6.8.0/drivers/cxl/core/pci.c @@ -390,10 +390,6 @@ size |= temp & CXL_DVSEC_MEM_SIZE_LOW_MASK; if (!size) { - info->dvsec_range[i] = (struct range) { - .start = 0, - .end = CXL_RESOURCE_NONE, - }; continue; } @@ -411,12 +407,10 @@ base |= temp & CXL_DVSEC_MEM_BASE_LOW_MASK; - info->dvsec_range[i] = (struct range) { + info->dvsec_range[ranges++] = (struct range) { .start = base, .end = base + size - 1 }; - - ranges++; } info->ranges = ranges; @@ -1034,3 +1028,32 @@ return cxl_flit_size(pdev) * MEGA / bw; } + +static int __cxl_endpoint_decoder_reset_detected(struct device *dev, void *data) +{ + struct cxl_port *port = data; + struct cxl_decoder *cxld; + struct cxl_hdm *cxlhdm; + void __iomem *hdm; + u32 ctrl; + + if (!is_endpoint_decoder(dev)) + return 0; + + cxld = to_cxl_decoder(dev); + if ((cxld->flags & CXL_DECODER_F_ENABLE) == 0) + return 0; + + cxlhdm = dev_get_drvdata(&port->dev); + hdm = cxlhdm->regs.hdm_decoder; + ctrl = readl(hdm + CXL_HDM_DECODER0_CTRL_OFFSET(cxld->id)); + + return !FIELD_GET(CXL_HDM_DECODER0_CTRL_COMMITTED, ctrl); +} + +bool cxl_endpoint_decoder_reset_detected(struct cxl_port *port) +{ + return device_for_each_child(&port->dev, port, + __cxl_endpoint_decoder_reset_detected); +} +EXPORT_SYMBOL_NS_GPL(cxl_endpoint_decoder_reset_detected, CXL); --- linux-xilinx-6.8.0.orig/drivers/cxl/core/pmem.c +++ linux-xilinx-6.8.0/drivers/cxl/core/pmem.c @@ -62,10 +62,14 @@ return is_cxl_nvdimm_bridge(dev); } -struct cxl_nvdimm_bridge *cxl_find_nvdimm_bridge(struct cxl_memdev *cxlmd) +/** + * cxl_find_nvdimm_bridge() - find a bridge device relative to a port + * @port: any descendant port of an nvdimm-bridge associated + * root-cxl-port + */ +struct cxl_nvdimm_bridge *cxl_find_nvdimm_bridge(struct cxl_port *port) { - struct cxl_root *cxl_root __free(put_cxl_root) = - find_cxl_root(cxlmd->endpoint); + struct cxl_root *cxl_root __free(put_cxl_root) = find_cxl_root(port); struct device *dev; if (!cxl_root) @@ -242,18 +246,20 @@ /** * devm_cxl_add_nvdimm() - add a bridge between a cxl_memdev and an nvdimm + * @parent_port: parent port for the (to be added) @cxlmd endpoint port * @cxlmd: cxl_memdev instance that will perform LIBNVDIMM operations * * Return: 0 on success negative error code on failure. */ -int devm_cxl_add_nvdimm(struct cxl_memdev *cxlmd) +int devm_cxl_add_nvdimm(struct cxl_port *parent_port, + struct cxl_memdev *cxlmd) { struct cxl_nvdimm_bridge *cxl_nvb; struct cxl_nvdimm *cxl_nvd; struct device *dev; int rc; - cxl_nvb = cxl_find_nvdimm_bridge(cxlmd); + cxl_nvb = cxl_find_nvdimm_bridge(parent_port); if (!cxl_nvb) return -ENODEV; --- linux-xilinx-6.8.0.orig/drivers/cxl/core/port.c +++ linux-xilinx-6.8.0/drivers/cxl/core/port.c @@ -2069,11 +2069,18 @@ static struct workqueue_struct *cxl_bus_wq; -static void cxl_bus_rescan_queue(struct work_struct *w) +static int cxl_rescan_attach(struct device *dev, void *data) { - int rc = bus_rescan_devices(&cxl_bus_type); + int rc = device_attach(dev); + + dev_vdbg(dev, "rescan: %s\n", rc ? "attach" : "detached"); - pr_debug("CXL bus rescan result: %d\n", rc); + return 0; +} + +static void cxl_bus_rescan_queue(struct work_struct *w) +{ + bus_for_each_dev(&cxl_bus_type, NULL, NULL, cxl_rescan_attach); } void cxl_bus_rescan(void) @@ -2096,18 +2103,41 @@ } EXPORT_SYMBOL_NS_GPL(schedule_cxl_memdev_detach, CXL); -static void combine_coordinates(struct access_coordinate *c1, - struct access_coordinate *c2) +/** + * cxl_hb_get_perf_coordinates - Retrieve performance numbers between initiator + * and host bridge + * + * @port: endpoint cxl_port + * @coord: output access coordinates + * + * Return: errno on failure, 0 on success. + */ +int cxl_hb_get_perf_coordinates(struct cxl_port *port, + struct access_coordinate *coord) { - if (c2->write_bandwidth) - c1->write_bandwidth = min(c1->write_bandwidth, - c2->write_bandwidth); - c1->write_latency += c2->write_latency; - - if (c2->read_bandwidth) - c1->read_bandwidth = min(c1->read_bandwidth, - c2->read_bandwidth); - c1->read_latency += c2->read_latency; + struct cxl_port *iter = port; + struct cxl_dport *dport; + + if (!is_cxl_endpoint(port)) + return -EINVAL; + + dport = iter->parent_dport; + while (iter && !is_cxl_root(to_cxl_port(iter->dev.parent))) { + iter = to_cxl_port(iter->dev.parent); + dport = iter->parent_dport; + } + + coord[ACCESS_COORDINATE_LOCAL] = + dport->hb_coord[ACCESS_COORDINATE_LOCAL]; + coord[ACCESS_COORDINATE_CPU] = + dport->hb_coord[ACCESS_COORDINATE_CPU]; + + return 0; +} + +static bool parent_port_is_cxl_root(struct cxl_port *port) +{ + return is_cxl_root(to_cxl_port(port->dev.parent)); } /** @@ -2129,30 +2159,31 @@ struct cxl_dport *dport; struct pci_dev *pdev; unsigned int bw; + bool is_cxl_root; if (!is_cxl_endpoint(port)) return -EINVAL; - dport = iter->parent_dport; - /* - * Exit the loop when the parent port of the current port is cxl root. - * The iterative loop starts at the endpoint and gathers the - * latency of the CXL link from the current iter to the next downstream - * port each iteration. If the parent is cxl root then there is - * nothing to gather. + * Exit the loop when the parent port of the current iter port is cxl + * root. The iterative loop starts at the endpoint and gathers the + * latency of the CXL link from the current device/port to the connected + * downstream port each iteration. */ - while (iter && !is_cxl_root(to_cxl_port(iter->dev.parent))) { - combine_coordinates(&c, &dport->sw_coord); - c.write_latency += dport->link_latency; - c.read_latency += dport->link_latency; - - iter = to_cxl_port(iter->dev.parent); + do { dport = iter->parent_dport; - } + iter = to_cxl_port(iter->dev.parent); + is_cxl_root = parent_port_is_cxl_root(iter); - /* Augment with the generic port (host bridge) perf data */ - combine_coordinates(&c, &dport->hb_coord); + /* + * There's no valid access_coordinate for a root port since RPs do not + * have CDAT and therefore needs to be skipped. + */ + if (!is_cxl_root) + cxl_coordinates_combine(&c, &c, &dport->sw_coord); + c.write_latency += dport->link_latency; + c.read_latency += dport->link_latency; + } while (!is_cxl_root); /* Get the calculated PCI paths bandwidth */ pdev = to_pci_dev(port->uport_dev->parent); --- linux-xilinx-6.8.0.orig/drivers/cxl/core/region.c +++ linux-xilinx-6.8.0/drivers/cxl/core/region.c @@ -128,8 +128,8 @@ "Bypassing cpu_cache_invalidate_memregion() for testing!\n"); return 0; } else { - dev_err(&cxlr->dev, - "Failed to synchronize CPU cache state\n"); + dev_WARN(&cxlr->dev, + "Failed to synchronize CPU cache state\n"); return -ENXIO; } } @@ -138,19 +138,17 @@ return 0; } -static int cxl_region_decode_reset(struct cxl_region *cxlr, int count) +static void cxl_region_decode_reset(struct cxl_region *cxlr, int count) { struct cxl_region_params *p = &cxlr->params; - int i, rc = 0; + int i; /* - * Before region teardown attempt to flush, and if the flush - * fails cancel the region teardown for data consistency - * concerns + * Before region teardown attempt to flush, evict any data cached for + * this region, or scream loudly about missing arch / platform support + * for CXL teardown. */ - rc = cxl_region_invalidate_memregion(cxlr); - if (rc) - return rc; + cxl_region_invalidate_memregion(cxlr); for (i = count - 1; i >= 0; i--) { struct cxl_endpoint_decoder *cxled = p->targets[i]; @@ -173,23 +171,17 @@ cxl_rr = cxl_rr_load(iter, cxlr); cxld = cxl_rr->decoder; if (cxld->reset) - rc = cxld->reset(cxld); - if (rc) - return rc; + cxld->reset(cxld); set_bit(CXL_REGION_F_NEEDS_RESET, &cxlr->flags); } endpoint_reset: - rc = cxled->cxld.reset(&cxled->cxld); - if (rc) - return rc; + cxled->cxld.reset(&cxled->cxld); set_bit(CXL_REGION_F_NEEDS_RESET, &cxlr->flags); } /* all decoders associated with this region have been torn down */ clear_bit(CXL_REGION_F_NEEDS_RESET, &cxlr->flags); - - return 0; } static int commit_decoder(struct cxl_decoder *cxld) @@ -305,16 +297,8 @@ * still pending. */ if (p->state == CXL_CONFIG_RESET_PENDING) { - rc = cxl_region_decode_reset(cxlr, p->interleave_ways); - /* - * Revert to committed since there may still be active - * decoders associated with this region, or move forward - * to active to mark the reset successful - */ - if (rc) - p->state = CXL_CONFIG_COMMIT; - else - p->state = CXL_CONFIG_ACTIVE; + cxl_region_decode_reset(cxlr, p->interleave_ways); + p->state = CXL_CONFIG_ACTIVE; } } @@ -998,6 +982,26 @@ } cxld = cxl_rr->decoder; + /* + * the number of targets should not exceed the target_count + * of the decoder + */ + if (is_switch_decoder(&cxld->dev)) { + struct cxl_switch_decoder *cxlsd; + + cxlsd = to_cxl_switch_decoder(&cxld->dev); + if (cxl_rr->nr_targets > cxlsd->nr_targets) { + dev_dbg(&cxlr->dev, + "%s:%s %s add: %s:%s @ %d overflows targets: %d\n", + dev_name(port->uport_dev), dev_name(&port->dev), + dev_name(&cxld->dev), dev_name(&cxlmd->dev), + dev_name(&cxled->cxld.dev), pos, + cxlsd->nr_targets); + rc = -ENXIO; + goto out_erase; + } + } + rc = cxl_rr_ep_add(cxl_rr, cxled); if (rc) { dev_dbg(&cxlr->dev, @@ -1107,6 +1111,50 @@ return 0; } +static int check_interleave_cap(struct cxl_decoder *cxld, int iw, int ig) +{ + struct cxl_port *port = to_cxl_port(cxld->dev.parent); + struct cxl_hdm *cxlhdm = dev_get_drvdata(&port->dev); + unsigned int interleave_mask; + u8 eiw; + u16 eig; + int high_pos, low_pos; + + if (!test_bit(iw, &cxlhdm->iw_cap_mask)) + return -ENXIO; + /* + * Per CXL specification r3.1(8.2.4.20.13 Decoder Protection), + * if eiw < 8: + * DPAOFFSET[51: eig + 8] = HPAOFFSET[51: eig + 8 + eiw] + * DPAOFFSET[eig + 7: 0] = HPAOFFSET[eig + 7: 0] + * + * when the eiw is 0, all the bits of HPAOFFSET[51: 0] are used, the + * interleave bits are none. + * + * if eiw >= 8: + * DPAOFFSET[51: eig + 8] = HPAOFFSET[51: eig + eiw] / 3 + * DPAOFFSET[eig + 7: 0] = HPAOFFSET[eig + 7: 0] + * + * when the eiw is 8, all the bits of HPAOFFSET[51: 0] are used, the + * interleave bits are none. + */ + ways_to_eiw(iw, &eiw); + if (eiw == 0 || eiw == 8) + return 0; + + granularity_to_eig(ig, &eig); + if (eiw > 8) + high_pos = eiw + eig - 1; + else + high_pos = eiw + eig + 7; + low_pos = eig + 8; + interleave_mask = GENMASK(high_pos, low_pos); + if (interleave_mask & ~cxlhdm->interleave_mask) + return -ENXIO; + + return 0; +} + static int cxl_port_setup_targets(struct cxl_port *port, struct cxl_region *cxlr, struct cxl_endpoint_decoder *cxled) @@ -1120,6 +1168,7 @@ struct cxl_region_params *p = &cxlr->params; struct cxl_decoder *cxld = cxl_rr->decoder; struct cxl_switch_decoder *cxlsd; + struct cxl_port *iter = port; u16 eig, peig; u8 eiw, peiw; @@ -1136,16 +1185,26 @@ cxlsd = to_cxl_switch_decoder(&cxld->dev); if (cxl_rr->nr_targets_set) { - int i, distance; + int i, distance = 1; + struct cxl_region_ref *cxl_rr_iter; /* - * Passthrough decoders impose no distance requirements between - * peers + * The "distance" between peer downstream ports represents which + * endpoint positions in the region interleave a given port can + * host. + * + * For example, at the root of a hierarchy the distance is + * always 1 as every index targets a different host-bridge. At + * each subsequent switch level those ports map every Nth region + * position where N is the width of the switch == distance. */ - if (cxl_rr->nr_targets == 1) - distance = 0; - else - distance = p->nr_targets / cxl_rr->nr_targets; + do { + cxl_rr_iter = cxl_rr_load(iter, cxlr); + distance *= cxl_rr_iter->nr_targets; + iter = to_cxl_port(iter->dev.parent); + } while (!is_cxl_root(iter)); + distance *= cxlrd->cxlsd.cxld.interleave_ways; + for (i = 0; i < cxl_rr->nr_targets_set; i++) if (ep->dport == cxlsd->target[i]) { rc = check_last_peer(cxled, ep, cxl_rr, @@ -1257,6 +1316,15 @@ return -ENXIO; } } else { + rc = check_interleave_cap(cxld, iw, ig); + if (rc) { + dev_dbg(&cxlr->dev, + "%s:%s iw: %d ig: %d is not supported\n", + dev_name(port->uport_dev), + dev_name(&port->dev), iw, ig); + return rc; + } + cxld->interleave_ways = iw; cxld->interleave_granularity = ig; cxld->hpa_range = (struct range) { @@ -1456,10 +1524,13 @@ const struct cxl_dport *dport, int pos) { struct cxl_memdev *cxlmd = cxled_to_memdev(cxled); + struct cxl_switch_decoder *cxlsd = &cxlrd->cxlsd; + struct cxl_decoder *cxld = &cxlsd->cxld; + int iw = cxld->interleave_ways; struct cxl_port *iter; int rc; - if (cxlrd->calc_hb(cxlrd, pos) != dport) { + if (dport != cxlrd->cxlsd.target[pos % iw]) { dev_dbg(&cxlr->dev, "%s:%s invalid target position for %s\n", dev_name(&cxlmd->dev), dev_name(&cxled->cxld.dev), dev_name(&cxlrd->cxlsd.cxld.dev)); @@ -1693,6 +1764,15 @@ struct cxl_dport *dport; int rc = -ENXIO; + rc = check_interleave_cap(&cxled->cxld, p->interleave_ways, + p->interleave_granularity); + if (rc) { + dev_dbg(&cxlr->dev, "%s iw: %d ig: %d is not supported\n", + dev_name(&cxled->cxld.dev), p->interleave_ways, + p->interleave_granularity); + return rc; + } + if (cxled->mode != cxlr->mode) { dev_dbg(&cxlr->dev, "%s region mode: %d mismatch: %d\n", dev_name(&cxled->cxld.dev), cxlr->mode, cxled->mode); @@ -1861,13 +1941,7 @@ get_device(&cxlr->dev); if (p->state > CXL_CONFIG_ACTIVE) { - /* - * TODO: tear down all impacted regions if a device is - * removed out of order - */ - rc = cxl_region_decode_reset(cxlr, p->interleave_ways); - if (rc) - goto out; + cxl_region_decode_reset(cxlr, p->interleave_ways); p->state = CXL_CONFIG_ACTIVE; } @@ -2187,15 +2261,6 @@ struct device *dev; int rc; - switch (mode) { - case CXL_DECODER_RAM: - case CXL_DECODER_PMEM: - break; - default: - dev_err(&cxlrd->cxlsd.cxld.dev, "unsupported mode %d\n", mode); - return ERR_PTR(-EINVAL); - } - cxlr = cxl_region_alloc(cxlrd, id); if (IS_ERR(cxlr)) return cxlr; @@ -2246,6 +2311,15 @@ { int rc; + switch (mode) { + case CXL_DECODER_RAM: + case CXL_DECODER_PMEM: + break; + default: + dev_err(&cxlrd->cxlsd.cxld.dev, "unsupported mode %d\n", mode); + return ERR_PTR(-EINVAL); + } + rc = memregion_alloc(GFP_KERNEL); if (rc < 0) return ERR_PTR(rc); @@ -2510,28 +2584,78 @@ return rc; } +struct cxl_dpa_to_region_context { + struct cxl_region *cxlr; + u64 dpa; +}; + +static int __cxl_dpa_to_region(struct device *dev, void *arg) +{ + struct cxl_dpa_to_region_context *ctx = arg; + struct cxl_endpoint_decoder *cxled; + struct cxl_region *cxlr; + u64 dpa = ctx->dpa; + + if (!is_endpoint_decoder(dev)) + return 0; + + cxled = to_cxl_endpoint_decoder(dev); + if (!cxled || !cxled->dpa_res || !resource_size(cxled->dpa_res)) + return 0; + + if (dpa > cxled->dpa_res->end || dpa < cxled->dpa_res->start) + return 0; + + /* + * Stop the region search (return 1) when an endpoint mapping is + * found. The region may not be fully constructed so offering + * the cxlr in the context structure is not guaranteed. + */ + cxlr = cxled->cxld.region; + if (cxlr) + dev_dbg(dev, "dpa:0x%llx mapped in region:%s\n", dpa, + dev_name(&cxlr->dev)); + else + dev_dbg(dev, "dpa:0x%llx mapped in endpoint:%s\n", dpa, + dev_name(dev)); + + ctx->cxlr = cxlr; + + return 1; +} + +struct cxl_region *cxl_dpa_to_region(const struct cxl_memdev *cxlmd, u64 dpa) +{ + struct cxl_dpa_to_region_context ctx; + struct cxl_port *port; + + ctx = (struct cxl_dpa_to_region_context) { + .dpa = dpa, + }; + port = cxlmd->endpoint; + if (port && is_cxl_endpoint(port) && cxl_num_decoders_committed(port)) + device_for_each_child(&port->dev, &ctx, __cxl_dpa_to_region); + + return ctx.cxlr; +} + static struct lock_class_key cxl_pmem_region_key; -static struct cxl_pmem_region *cxl_pmem_region_alloc(struct cxl_region *cxlr) +static int cxl_pmem_region_alloc(struct cxl_region *cxlr) { struct cxl_region_params *p = &cxlr->params; struct cxl_nvdimm_bridge *cxl_nvb; - struct cxl_pmem_region *cxlr_pmem; struct device *dev; int i; - down_read(&cxl_region_rwsem); - if (p->state != CXL_CONFIG_COMMIT) { - cxlr_pmem = ERR_PTR(-ENXIO); - goto out; - } + guard(rwsem_read)(&cxl_region_rwsem); + if (p->state != CXL_CONFIG_COMMIT) + return -ENXIO; - cxlr_pmem = kzalloc(struct_size(cxlr_pmem, mapping, p->nr_targets), - GFP_KERNEL); - if (!cxlr_pmem) { - cxlr_pmem = ERR_PTR(-ENOMEM); - goto out; - } + struct cxl_pmem_region *cxlr_pmem __free(kfree) = + kzalloc(struct_size(cxlr_pmem, mapping, p->nr_targets), GFP_KERNEL); + if (!cxlr_pmem) + return -ENOMEM; cxlr_pmem->hpa_range.start = p->res->start; cxlr_pmem->hpa_range.end = p->res->end; @@ -2548,11 +2672,9 @@ * bridge for one device is the same for all. */ if (i == 0) { - cxl_nvb = cxl_find_nvdimm_bridge(cxlmd); - if (!cxl_nvb) { - cxlr_pmem = ERR_PTR(-ENODEV); - goto out; - } + cxl_nvb = cxl_find_nvdimm_bridge(cxlmd->endpoint); + if (!cxl_nvb) + return -ENODEV; cxlr->cxl_nvb = cxl_nvb; } m->cxlmd = cxlmd; @@ -2563,18 +2685,16 @@ } dev = &cxlr_pmem->dev; - cxlr_pmem->cxlr = cxlr; - cxlr->cxlr_pmem = cxlr_pmem; device_initialize(dev); lockdep_set_class(&dev->mutex, &cxl_pmem_region_key); device_set_pm_not_required(dev); dev->parent = &cxlr->dev; dev->bus = &cxl_bus_type; dev->type = &cxl_pmem_region_type; -out: - up_read(&cxl_region_rwsem); + cxlr_pmem->cxlr = cxlr; + cxlr->cxlr_pmem = no_free_ptr(cxlr_pmem); - return cxlr_pmem; + return 0; } static void cxl_dax_region_release(struct device *dev) @@ -2691,9 +2811,10 @@ struct device *dev; int rc; - cxlr_pmem = cxl_pmem_region_alloc(cxlr); - if (IS_ERR(cxlr_pmem)) - return PTR_ERR(cxlr_pmem); + rc = cxl_pmem_region_alloc(cxlr); + if (rc) + return rc; + cxlr_pmem = cxlr->cxlr_pmem; cxl_nvb = cxlr->cxl_nvb; dev = &cxlr_pmem->dev; --- linux-xilinx-6.8.0.orig/drivers/cxl/core/regs.c +++ linux-xilinx-6.8.0/drivers/cxl/core/regs.c @@ -271,6 +271,7 @@ static bool cxl_decode_regblock(struct pci_dev *pdev, u32 reg_lo, u32 reg_hi, struct cxl_register_map *map) { + u8 reg_type = FIELD_GET(CXL_DVSEC_REG_LOCATOR_BLOCK_ID_MASK, reg_lo); int bar = FIELD_GET(CXL_DVSEC_REG_LOCATOR_BIR_MASK, reg_lo); u64 offset = ((u64)reg_hi << 32) | (reg_lo & CXL_DVSEC_REG_LOCATOR_BLOCK_OFF_LOW_MASK); @@ -278,11 +279,11 @@ if (offset > pci_resource_len(pdev, bar)) { dev_warn(&pdev->dev, "BAR%d: %pr: too small (offset: %pa, type: %d)\n", bar, - &pdev->resource[bar], &offset, map->reg_type); + &pdev->resource[bar], &offset, reg_type); return false; } - map->reg_type = FIELD_GET(CXL_DVSEC_REG_LOCATOR_BLOCK_ID_MASK, reg_lo); + map->reg_type = reg_type; map->resource = pci_resource_start(pdev, bar) + offset; map->max_size = pci_resource_len(pdev, bar) - offset; return true; --- linux-xilinx-6.8.0.orig/drivers/cxl/core/trace.c +++ linux-xilinx-6.8.0/drivers/cxl/core/trace.c @@ -7,20 +7,13 @@ #define CREATE_TRACE_POINTS #include "trace.h" -static bool cxl_is_hpa_in_range(u64 hpa, struct cxl_region *cxlr, int pos) +static bool cxl_is_hpa_in_chunk(u64 hpa, struct cxl_region *cxlr, int pos) { struct cxl_region_params *p = &cxlr->params; int gran = p->interleave_granularity; int ways = p->interleave_ways; u64 offset; - /* Is the hpa within this region at all */ - if (hpa < p->res->start || hpa > p->res->end) { - dev_dbg(&cxlr->dev, - "Addr trans fail: hpa 0x%llx not in region\n", hpa); - return false; - } - /* Is the hpa in an expected chunk for its pos(-ition) */ offset = hpa - p->res->start; offset = do_div(offset, gran * ways); @@ -36,6 +29,7 @@ static u64 cxl_dpa_to_hpa(u64 dpa, struct cxl_region *cxlr, struct cxl_endpoint_decoder *cxled) { + struct cxl_root_decoder *cxlrd = to_cxl_root_decoder(cxlr->dev.parent); u64 dpa_offset, hpa_offset, bits_upper, mask_upper, hpa; struct cxl_region_params *p = &cxlr->params; int pos = cxled->pos; @@ -75,7 +69,18 @@ /* Apply the hpa_offset to the region base address */ hpa = hpa_offset + p->res->start; - if (!cxl_is_hpa_in_range(hpa, cxlr, cxled->pos)) + /* Root decoder translation overrides typical modulo decode */ + if (cxlrd->hpa_to_spa) + hpa = cxlrd->hpa_to_spa(cxlrd, hpa); + + if (hpa < p->res->start || hpa > p->res->end) { + dev_dbg(&cxlr->dev, + "Addr trans fail: hpa 0x%llx not in region\n", hpa); + return ULLONG_MAX; + } + + /* Simple chunk check, by pos & gran, only applies to modulo decodes */ + if (!cxlrd->hpa_to_spa && (!cxl_is_hpa_in_chunk(hpa, cxlr, pos))) return ULLONG_MAX; return hpa; --- linux-xilinx-6.8.0.orig/drivers/cxl/core/trace.h +++ linux-xilinx-6.8.0/drivers/cxl/core/trace.h @@ -253,8 +253,8 @@ * DRAM Event Record * CXL rev 3.0 section 8.2.9.2.1.2; Table 8-44 */ -#define CXL_DPA_FLAGS_MASK 0x3F -#define CXL_DPA_MASK (~CXL_DPA_FLAGS_MASK) +#define CXL_DPA_FLAGS_MASK GENMASK(1, 0) +#define CXL_DPA_MASK GENMASK_ULL(63, 6) #define CXL_DPA_VOLATILE BIT(0) #define CXL_DPA_NOT_REPAIRABLE BIT(1) @@ -279,7 +279,7 @@ #define CXL_GMER_MEM_EVT_TYPE_ECC_ERROR 0x00 #define CXL_GMER_MEM_EVT_TYPE_INV_ADDR 0x01 #define CXL_GMER_MEM_EVT_TYPE_DATA_PATH_ERROR 0x02 -#define show_mem_event_type(type) __print_symbolic(type, \ +#define show_gmer_mem_event_type(type) __print_symbolic(type, \ { CXL_GMER_MEM_EVT_TYPE_ECC_ERROR, "ECC Error" }, \ { CXL_GMER_MEM_EVT_TYPE_INV_ADDR, "Invalid Address" }, \ { CXL_GMER_MEM_EVT_TYPE_DATA_PATH_ERROR, "Data Path Error" } \ @@ -361,7 +361,7 @@ "device=%x comp_id=%s validity_flags='%s'", __entry->dpa, show_dpa_flags(__entry->dpa_flags), show_event_desc_flags(__entry->descriptor), - show_mem_event_type(__entry->type), + show_gmer_mem_event_type(__entry->type), show_trans_type(__entry->transaction_type), __entry->channel, __entry->rank, __entry->device, __print_hex(__entry->comp_id, CXL_EVENT_GEN_MED_COMP_ID_SIZE), @@ -378,6 +378,17 @@ * DRAM Event Record defines many fields the same as the General Media Event * Record. Reuse those definitions as appropriate. */ +#define CXL_DER_MEM_EVT_TYPE_ECC_ERROR 0x00 +#define CXL_DER_MEM_EVT_TYPE_SCRUB_MEDIA_ECC_ERROR 0x01 +#define CXL_DER_MEM_EVT_TYPE_INV_ADDR 0x02 +#define CXL_DER_MEM_EVT_TYPE_DATA_PATH_ERROR 0x03 +#define show_dram_mem_event_type(type) __print_symbolic(type, \ + { CXL_DER_MEM_EVT_TYPE_ECC_ERROR, "ECC Error" }, \ + { CXL_DER_MEM_EVT_TYPE_SCRUB_MEDIA_ECC_ERROR, "Scrub Media ECC Error" }, \ + { CXL_DER_MEM_EVT_TYPE_INV_ADDR, "Invalid Address" }, \ + { CXL_DER_MEM_EVT_TYPE_DATA_PATH_ERROR, "Data Path Error" } \ +) + #define CXL_DER_VALID_CHANNEL BIT(0) #define CXL_DER_VALID_RANK BIT(1) #define CXL_DER_VALID_NIBBLE BIT(2) @@ -452,7 +463,7 @@ "validity_flags='%s'", __entry->dpa, show_dpa_flags(__entry->dpa_flags), show_event_desc_flags(__entry->descriptor), - show_mem_event_type(__entry->type), + show_dram_mem_event_type(__entry->type), show_trans_type(__entry->transaction_type), __entry->channel, __entry->rank, __entry->nibble_mask, __entry->bank_group, __entry->bank, @@ -646,18 +657,18 @@ TRACE_EVENT(cxl_poison, - TP_PROTO(struct cxl_memdev *cxlmd, struct cxl_region *region, + TP_PROTO(struct cxl_memdev *cxlmd, struct cxl_region *cxlr, const struct cxl_poison_record *record, u8 flags, __le64 overflow_ts, enum cxl_poison_trace_type trace_type), - TP_ARGS(cxlmd, region, record, flags, overflow_ts, trace_type), + TP_ARGS(cxlmd, cxlr, record, flags, overflow_ts, trace_type), TP_STRUCT__entry( __string(memdev, dev_name(&cxlmd->dev)) __string(host, dev_name(cxlmd->dev.parent)) __field(u64, serial) __field(u8, trace_type) - __string(region, region) + __string(region, cxlr ? dev_name(&cxlr->dev) : "") __field(u64, overflow_ts) __field(u64, hpa) __field(u64, dpa) @@ -677,10 +688,10 @@ __entry->source = cxl_poison_record_source(record); __entry->trace_type = trace_type; __entry->flags = flags; - if (region) { - __assign_str(region, dev_name(®ion->dev)); - memcpy(__entry->uuid, ®ion->params.uuid, 16); - __entry->hpa = cxl_trace_hpa(region, cxlmd, + if (cxlr) { + __assign_str(region, dev_name(&cxlr->dev)); + memcpy(__entry->uuid, &cxlr->params.uuid, 16); + __entry->hpa = cxl_trace_hpa(cxlr, cxlmd, __entry->dpa); } else { __assign_str(region, ""); --- linux-xilinx-6.8.0.orig/drivers/cxl/cxl.h +++ linux-xilinx-6.8.0/drivers/cxl/cxl.h @@ -44,6 +44,8 @@ #define CXL_HDM_DECODER_TARGET_COUNT_MASK GENMASK(7, 4) #define CXL_HDM_DECODER_INTERLEAVE_11_8 BIT(8) #define CXL_HDM_DECODER_INTERLEAVE_14_12 BIT(9) +#define CXL_HDM_DECODER_INTERLEAVE_3_6_12_WAY BIT(11) +#define CXL_HDM_DECODER_INTERLEAVE_16_WAY BIT(12) #define CXL_HDM_DECODER_CTRL_OFFSET 0x4 #define CXL_HDM_DECODER_ENABLE BIT(1) #define CXL_HDM_DECODER0_BASE_LOW_OFFSET(i) (0x20 * (i) + 0x10) @@ -354,7 +356,7 @@ struct cxl_region *region; unsigned long flags; int (*commit)(struct cxl_decoder *cxld); - int (*reset)(struct cxl_decoder *cxld); + void (*reset)(struct cxl_decoder *cxld); }; /* @@ -431,12 +433,14 @@ struct cxl_root_decoder; typedef struct cxl_dport *(*cxl_calc_hb_fn)(struct cxl_root_decoder *cxlrd, int pos); +typedef u64 (*cxl_hpa_to_spa_fn)(struct cxl_root_decoder *cxlrd, u64 hpa); /** * struct cxl_root_decoder - Static platform CXL address decoder * @res: host / parent resource for region allocations * @region_id: region id for next region provisioning event * @calc_hb: which host bridge covers the n'th position by granularity + * @hpa_to_spa: translate CXL host-physical-address to Platform system-physical-address * @platform_data: platform specific configuration data * @range_lock: sync region autodiscovery by address range * @qos_class: QoS performance class cookie @@ -446,6 +450,7 @@ struct resource *res; atomic_t region_id; cxl_calc_hb_fn calc_hb; + cxl_hpa_to_spa_fn hpa_to_spa; void *platform_data; struct mutex range_lock; int qos_class; @@ -671,7 +676,7 @@ struct cxl_port *port; struct cxl_regs regs; struct access_coordinate sw_coord; - struct access_coordinate hb_coord; + struct access_coordinate hb_coord[ACCESS_COORDINATE_MAX]; long link_latency; }; @@ -722,6 +727,7 @@ int cxl_num_decoders_committed(struct cxl_port *port); bool is_cxl_port(const struct device *dev); struct cxl_port *to_cxl_port(const struct device *dev); +void cxl_port_commit_reap(struct cxl_decoder *cxld); struct pci_bus; int devm_cxl_register_pci_bus(struct device *host, struct device *uport_dev, struct pci_bus *bus); @@ -845,8 +851,8 @@ struct cxl_nvdimm *to_cxl_nvdimm(struct device *dev); bool is_cxl_nvdimm(struct device *dev); bool is_cxl_nvdimm_bridge(struct device *dev); -int devm_cxl_add_nvdimm(struct cxl_memdev *cxlmd); -struct cxl_nvdimm_bridge *cxl_find_nvdimm_bridge(struct cxl_memdev *cxlmd); +int devm_cxl_add_nvdimm(struct cxl_port *parent_port, struct cxl_memdev *cxlmd); +struct cxl_nvdimm_bridge *cxl_find_nvdimm_bridge(struct cxl_port *port); #ifdef CONFIG_CXL_REGION bool is_cxl_pmem_region(struct device *dev); @@ -879,9 +885,17 @@ int cxl_endpoint_get_perf_coordinates(struct cxl_port *port, struct access_coordinate *coord); +int cxl_hb_get_perf_coordinates(struct cxl_port *port, + struct access_coordinate *coord); void cxl_memdev_update_perf(struct cxl_memdev *cxlmd); +void cxl_coordinates_combine(struct access_coordinate *out, + struct access_coordinate *c1, + struct access_coordinate *c2); + +bool cxl_endpoint_decoder_reset_detected(struct cxl_port *port); + /* * Unit test builds overrides this to __weak, find the 'strong' version * of these symbols in tools/testing/cxl/. --- linux-xilinx-6.8.0.orig/drivers/cxl/cxlmem.h +++ linux-xilinx-6.8.0/drivers/cxl/cxlmem.h @@ -559,7 +559,7 @@ 0x3b, 0x3f, 0x17) #define DEFINE_CXL_VENDOR_DEBUG_UUID \ - UUID_INIT(0xe1819d9, 0x11a9, 0x400c, 0x81, 0x1f, 0xd6, 0x07, 0x19, \ + UUID_INIT(0x5e1819d9, 0x11a9, 0x400c, 0x81, 0x1f, 0xd6, 0x07, 0x19, \ 0x40, 0x3d, 0x86) struct cxl_mbox_get_supported_logs { @@ -848,11 +848,21 @@ int cxl_mem_sanitize(struct cxl_memdev *cxlmd, u16 cmd); +/** + * struct cxl_hdm - HDM Decoder registers and cached / decoded capabilities + * @regs: mapped registers, see devm_cxl_setup_hdm() + * @decoder_count: number of decoders for this port + * @target_count: for switch decoders, max downstream port targets + * @interleave_mask: interleave granularity capability, see check_interleave_cap() + * @iw_cap_mask: bitmask of supported interleave ways, see check_interleave_cap() + * @port: mapped cxl_port, see devm_cxl_setup_hdm() + */ struct cxl_hdm { struct cxl_component_regs regs; unsigned int decoder_count; unsigned int target_count; unsigned int interleave_mask; + unsigned long iw_cap_mask; struct cxl_port *port; }; --- linux-xilinx-6.8.0.orig/drivers/cxl/mem.c +++ linux-xilinx-6.8.0/drivers/cxl/mem.c @@ -152,6 +152,15 @@ return -ENXIO; } + if (resource_size(&cxlds->pmem_res) && IS_ENABLED(CONFIG_CXL_PMEM)) { + rc = devm_cxl_add_nvdimm(parent_port, cxlmd); + if (rc) { + if (rc == -ENODEV) + dev_info(dev, "PMEM disabled by platform\n"); + return rc; + } + } + if (dport->rch) endpoint_parent = parent_port->uport_dev; else @@ -174,14 +183,6 @@ if (rc) return rc; - if (resource_size(&cxlds->pmem_res) && IS_ENABLED(CONFIG_CXL_PMEM)) { - rc = devm_cxl_add_nvdimm(cxlmd); - if (rc == -ENODEV) - dev_info(dev, "PMEM disabled by platform\n"); - else - return rc; - } - /* * The kernel may be operating out of CXL memory on this device, * there is no spec defined way to determine whether this device --- linux-xilinx-6.8.0.orig/drivers/cxl/pci.c +++ linux-xilinx-6.8.0/drivers/cxl/pci.c @@ -917,8 +917,7 @@ if (rc) return rc; - rc = cxl_pci_ras_unmask(pdev); - if (rc) + if (cxl_pci_ras_unmask(pdev)) dev_dbg(&pdev->dev, "No RAS reporting unmasked\n"); pci_save_state(pdev); @@ -957,11 +956,33 @@ dev->driver ? "successful" : "failed"); } +static void cxl_reset_done(struct pci_dev *pdev) +{ + struct cxl_dev_state *cxlds = pci_get_drvdata(pdev); + struct cxl_memdev *cxlmd = cxlds->cxlmd; + struct device *dev = &pdev->dev; + + /* + * FLR does not expect to touch the HDM decoders and related + * registers. SBR, however, will wipe all device configurations. + * Issue a warning if there was an active decoder before the reset + * that no longer exists. + */ + guard(device)(&cxlmd->dev); + if (cxlmd->endpoint && + cxl_endpoint_decoder_reset_detected(cxlmd->endpoint)) { + dev_crit(dev, "SBR happened without memory regions removal.\n"); + dev_crit(dev, "System may be unstable if regions hosted system memory.\n"); + add_taint(TAINT_USER, LOCKDEP_STILL_OK); + } +} + static const struct pci_error_handlers cxl_error_handlers = { .error_detected = cxl_error_detected, .slot_reset = cxl_slot_reset, .resume = cxl_error_resume, .cor_error_detected = cxl_cor_error_detected, + .reset_done = cxl_reset_done, }; static struct pci_driver cxl_pci_driver = { --- linux-xilinx-6.8.0.orig/drivers/cxl/port.c +++ linux-xilinx-6.8.0/drivers/cxl/port.c @@ -208,7 +208,22 @@ }, }; -module_cxl_driver(cxl_port_driver); +static int __init cxl_port_init(void) +{ + return cxl_driver_register(&cxl_port_driver); +} +/* + * Be ready to immediately enable ports emitted by the platform CXL root + * (e.g. cxl_acpi) when CONFIG_CXL_PORT=y. + */ +subsys_initcall(cxl_port_init); + +static void __exit cxl_port_exit(void) +{ + cxl_driver_unregister(&cxl_port_driver); +} +module_exit(cxl_port_exit); + MODULE_LICENSE("GPL v2"); MODULE_IMPORT_NS(CXL); MODULE_ALIAS_CXL(CXL_DEVICE_PORT); --- linux-xilinx-6.8.0.orig/drivers/dax/device.c +++ linux-xilinx-6.8.0/drivers/dax/device.c @@ -86,7 +86,7 @@ nr_pages = 1; pgoff = linear_page_index(vmf->vma, - ALIGN(vmf->address, fault_size)); + ALIGN_DOWN(vmf->address, fault_size)); for (i = 0; i < nr_pages; i++) { struct page *page = pfn_to_page(pfn_t_to_pfn(pfn) + i); --- linux-xilinx-6.8.0.orig/drivers/dma-buf/dma-fence-array.c +++ linux-xilinx-6.8.0/drivers/dma-buf/dma-fence-array.c @@ -103,10 +103,36 @@ static bool dma_fence_array_signaled(struct dma_fence *fence) { struct dma_fence_array *array = to_dma_fence_array(fence); + int num_pending; + unsigned int i; - if (atomic_read(&array->num_pending) > 0) + /* + * We need to read num_pending before checking the enable_signal bit + * to avoid racing with the enable_signaling() implementation, which + * might decrement the counter, and cause a partial check. + * atomic_read_acquire() pairs with atomic_dec_and_test() in + * dma_fence_array_enable_signaling() + * + * The !--num_pending check is here to account for the any_signaled case + * if we race with enable_signaling(), that means the !num_pending check + * in the is_signalling_enabled branch might be outdated (num_pending + * might have been decremented), but that's fine. The user will get the + * right value when testing again later. + */ + num_pending = atomic_read_acquire(&array->num_pending); + if (test_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, &array->base.flags)) { + if (num_pending <= 0) + goto signal; return false; + } + for (i = 0; i < array->num_fences; ++i) { + if (dma_fence_is_signaled(array->fences[i]) && !--num_pending) + goto signal; + } + return false; + +signal: dma_fence_array_clear_pending_error(array); return true; } --- linux-xilinx-6.8.0.orig/drivers/dma-buf/dma-fence-unwrap.c +++ linux-xilinx-6.8.0/drivers/dma-buf/dma-fence-unwrap.c @@ -12,6 +12,7 @@ #include #include #include +#include /* Internal helper to start new array iteration, don't use directly */ static struct dma_fence * @@ -59,6 +60,25 @@ } EXPORT_SYMBOL_GPL(dma_fence_unwrap_next); + +static int fence_cmp(const void *_a, const void *_b) +{ + struct dma_fence *a = *(struct dma_fence **)_a; + struct dma_fence *b = *(struct dma_fence **)_b; + + if (a->context < b->context) + return -1; + else if (a->context > b->context) + return 1; + + if (dma_fence_is_later(b, a)) + return 1; + else if (dma_fence_is_later(a, b)) + return -1; + + return 0; +} + /* Implementation for the dma_fence_merge() marco, don't use directly */ struct dma_fence *__dma_fence_unwrap_merge(unsigned int num_fences, struct dma_fence **fences, @@ -67,8 +87,7 @@ struct dma_fence_array *result; struct dma_fence *tmp, **array; ktime_t timestamp; - unsigned int i; - size_t count; + int i, j, count; count = 0; timestamp = ns_to_ktime(0); @@ -96,78 +115,55 @@ if (!array) return NULL; - /* - * This trashes the input fence array and uses it as position for the - * following merge loop. This works because the dma_fence_merge() - * wrapper macro is creating this temporary array on the stack together - * with the iterators. - */ - for (i = 0; i < num_fences; ++i) - fences[i] = dma_fence_unwrap_first(fences[i], &iter[i]); - count = 0; - do { - unsigned int sel; - -restart: - tmp = NULL; - for (i = 0; i < num_fences; ++i) { - struct dma_fence *next; - - while (fences[i] && dma_fence_is_signaled(fences[i])) - fences[i] = dma_fence_unwrap_next(&iter[i]); - - next = fences[i]; - if (!next) - continue; - - /* - * We can't guarantee that inpute fences are ordered by - * context, but it is still quite likely when this - * function is used multiple times. So attempt to order - * the fences by context as we pass over them and merge - * fences with the same context. - */ - if (!tmp || tmp->context > next->context) { - tmp = next; - sel = i; - - } else if (tmp->context < next->context) { - continue; - - } else if (dma_fence_is_later(tmp, next)) { - fences[i] = dma_fence_unwrap_next(&iter[i]); - goto restart; + for (i = 0; i < num_fences; ++i) { + dma_fence_unwrap_for_each(tmp, &iter[i], fences[i]) { + if (!dma_fence_is_signaled(tmp)) { + array[count++] = dma_fence_get(tmp); } else { - fences[sel] = dma_fence_unwrap_next(&iter[sel]); - goto restart; + ktime_t t = dma_fence_timestamp(tmp); + + if (ktime_after(t, timestamp)) + timestamp = t; } } + } - if (tmp) { - array[count++] = dma_fence_get(tmp); - fences[sel] = dma_fence_unwrap_next(&iter[sel]); - } - } while (tmp); + if (count == 0 || count == 1) + goto return_fastpath; - if (count == 0) { - tmp = dma_fence_allocate_private_stub(ktime_get()); - goto return_tmp; - } + sort(array, count, sizeof(*array), fence_cmp, NULL); - if (count == 1) { - tmp = array[0]; - goto return_tmp; + /* + * Only keep the most recent fence for each context. + */ + j = 0; + for (i = 1; i < count; i++) { + if (array[i]->context == array[j]->context) + dma_fence_put(array[i]); + else + array[++j] = array[i]; } + count = ++j; - result = dma_fence_array_create(count, array, - dma_fence_context_alloc(1), - 1, false); - if (!result) { - tmp = NULL; - goto return_tmp; + if (count > 1) { + result = dma_fence_array_create(count, array, + dma_fence_context_alloc(1), + 1, false); + if (!result) { + for (i = 0; i < count; i++) + dma_fence_put(array[i]); + tmp = NULL; + goto return_tmp; + } + return &result->base; } - return &result->base; + +return_fastpath: + if (count == 0) + tmp = dma_fence_allocate_private_stub(timestamp); + else + tmp = array[0]; return_tmp: kfree(array); --- linux-xilinx-6.8.0.orig/drivers/dma-buf/heaps/cma_heap.c +++ linux-xilinx-6.8.0/drivers/dma-buf/heaps/cma_heap.c @@ -165,7 +165,7 @@ struct vm_area_struct *vma = vmf->vma; struct cma_heap_buffer *buffer = vma->vm_private_data; - if (vmf->pgoff > buffer->pagecount) + if (vmf->pgoff >= buffer->pagecount) return VM_FAULT_SIGBUS; return vmf_insert_pfn(vma, vmf->address, page_to_pfn(buffer->pages[vmf->pgoff])); --- linux-xilinx-6.8.0.orig/drivers/dma-buf/st-dma-fence-chain.c +++ linux-xilinx-6.8.0/drivers/dma-buf/st-dma-fence-chain.c @@ -84,11 +84,11 @@ return -ENOMEM; chain = mock_chain(NULL, f, 1); - if (!chain) + if (chain) + dma_fence_enable_sw_signaling(chain); + else err = -ENOMEM; - dma_fence_enable_sw_signaling(chain); - dma_fence_signal(f); dma_fence_put(f); --- linux-xilinx-6.8.0.orig/drivers/dma-buf/st-dma-fence.c +++ linux-xilinx-6.8.0/drivers/dma-buf/st-dma-fence.c @@ -540,6 +540,12 @@ t[i].before = pass; t[i].task = kthread_run(thread_signal_callback, &t[i], "dma-fence:%d", i); + if (IS_ERR(t[i].task)) { + ret = PTR_ERR(t[i].task); + while (--i >= 0) + kthread_stop_put(t[i].task); + return ret; + } get_task_struct(t[i].task); } --- linux-xilinx-6.8.0.orig/drivers/dma-buf/sync_debug.c +++ linux-xilinx-6.8.0/drivers/dma-buf/sync_debug.c @@ -110,12 +110,12 @@ seq_printf(s, "%s: %d\n", obj->name, obj->value); - spin_lock_irq(&obj->lock); + spin_lock(&obj->lock); /* Caller already disabled IRQ. */ list_for_each(pos, &obj->pt_list) { struct sync_pt *pt = container_of(pos, struct sync_pt, link); sync_print_fence(s, &pt->base, false); } - spin_unlock_irq(&obj->lock); + spin_unlock(&obj->lock); } static void sync_print_sync_file(struct seq_file *s, --- linux-xilinx-6.8.0.orig/drivers/dma-buf/udmabuf.c +++ linux-xilinx-6.8.0/drivers/dma-buf/udmabuf.c @@ -35,12 +35,13 @@ struct vm_area_struct *vma = vmf->vma; struct udmabuf *ubuf = vma->vm_private_data; pgoff_t pgoff = vmf->pgoff; + unsigned long pfn; if (pgoff >= ubuf->pagecount) return VM_FAULT_SIGBUS; - vmf->page = ubuf->pages[pgoff]; - get_page(vmf->page); - return 0; + + pfn = page_to_pfn(ubuf->pages[pgoff]); + return vmf_insert_pfn(vma, vmf->address, pfn); } static const struct vm_operations_struct udmabuf_vm_ops = { @@ -56,6 +57,7 @@ vma->vm_ops = &udmabuf_vm_ops; vma->vm_private_data = ubuf; + vm_flags_set(vma, VM_PFNMAP | VM_DONTEXPAND | VM_DONTDUMP); return 0; } @@ -192,7 +194,7 @@ }; #define SEALS_WANTED (F_SEAL_SHRINK) -#define SEALS_DENIED (F_SEAL_WRITE) +#define SEALS_DENIED (F_SEAL_WRITE|F_SEAL_FUTURE_WRITE) static long udmabuf_create(struct miscdevice *device, struct udmabuf_create_list *head, --- linux-xilinx-6.8.0.orig/drivers/dma/Kconfig +++ linux-xilinx-6.8.0/drivers/dma/Kconfig @@ -394,7 +394,7 @@ config MCF_EDMA tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs" - depends on M5441x || COMPILE_TEST + depends on M5441x || (COMPILE_TEST && FSL_EDMA=n) select DMA_ENGINE select DMA_VIRTUAL_CHANNELS help @@ -643,16 +643,16 @@ config TEGRA210_ADMA tristate "NVIDIA Tegra210 ADMA support" - depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST) + depends on (ARCH_TEGRA || COMPILE_TEST) select DMA_ENGINE select DMA_VIRTUAL_CHANNELS help - Support for the NVIDIA Tegra210 ADMA controller driver. The - DMA controller has multiple DMA channels and is used to service - various audio clients in the Tegra210 audio processing engine - (APE). This DMA controller transfers data from memory to - peripheral and vice versa. It does not support memory to - memory data transfer. + Support for the NVIDIA Tegra210/Tegra186/Tegra194/Tegra234 ADMA + controller driver. The DMA controller has multiple DMA channels + and is used to service various audio clients in the Tegra210 + audio processing engine (APE). This DMA controller transfers + data from memory to peripheral and vice versa. It does not + support memory to memory data transfer. config TIMB_DMA tristate "Timberdale FPGA DMA support" @@ -747,6 +747,12 @@ driver provides the dmaengine required by the DisplayPort subsystem display driver. +config XILINX_FRMBUF + tristate "Xilinx Framebuffer" + select DMA_ENGINE + help + Enable support for Xilinx Framebuffer DMA. + # driver files source "drivers/dma/bestcomm/Kconfig" @@ -798,4 +804,18 @@ config DMA_ENGINE_RAID bool +config XILINX_DMATEST + tristate "DMA Test client for AXI DMA and MCDMA" + depends on XILINX_DMA + help + Simple DMA test client. Say N unless you're debugging a + DMA Device driver. + +config XILINX_VDMATEST + tristate "DMA Test client for VDMA" + depends on XILINX_DMA + help + Simple xilinx VDMA test client. Say N unless you're debugging a + DMA Device driver. + endif --- linux-xilinx-6.8.0.orig/drivers/dma/altera-msgdma.c +++ linux-xilinx-6.8.0/drivers/dma/altera-msgdma.c @@ -233,7 +233,7 @@ struct msgdma_sw_desc *child, *next; mdev->desc_free_cnt++; - list_add_tail(&desc->node, &mdev->free_list); + list_move_tail(&desc->node, &mdev->free_list); list_for_each_entry_safe(child, next, &desc->tx_list, node) { mdev->desc_free_cnt++; list_move_tail(&child->node, &mdev->free_list); @@ -583,17 +583,16 @@ static void msgdma_chan_desc_cleanup(struct msgdma_device *mdev) { struct msgdma_sw_desc *desc, *next; + unsigned long irqflags; list_for_each_entry_safe(desc, next, &mdev->done_list, node) { struct dmaengine_desc_callback cb; - list_del(&desc->node); - dmaengine_desc_get_callback(&desc->async_tx, &cb); if (dmaengine_desc_callback_valid(&cb)) { - spin_unlock(&mdev->lock); + spin_unlock_irqrestore(&mdev->lock, irqflags); dmaengine_desc_callback_invoke(&cb, NULL); - spin_lock(&mdev->lock); + spin_lock_irqsave(&mdev->lock, irqflags); } /* Run any dependencies, then free the descriptor */ --- linux-xilinx-6.8.0.orig/drivers/dma/apple-admac.c +++ linux-xilinx-6.8.0/drivers/dma/apple-admac.c @@ -153,6 +153,8 @@ { struct admac_sram *sram; int i, ret = 0, nblocks; + ad->txcache.size = readl_relaxed(ad->base + REG_TX_SRAM_SIZE); + ad->rxcache.size = readl_relaxed(ad->base + REG_RX_SRAM_SIZE); if (dir == DMA_MEM_TO_DEV) sram = &ad->txcache; @@ -912,12 +914,7 @@ goto free_irq; } - ad->txcache.size = readl_relaxed(ad->base + REG_TX_SRAM_SIZE); - ad->rxcache.size = readl_relaxed(ad->base + REG_RX_SRAM_SIZE); - dev_info(&pdev->dev, "Audio DMA Controller\n"); - dev_info(&pdev->dev, "imprint %x TX cache %u RX cache %u\n", - readl_relaxed(ad->base + REG_IMPRINT), ad->txcache.size, ad->rxcache.size); return 0; --- linux-xilinx-6.8.0.orig/drivers/dma/at_xdmac.c +++ linux-xilinx-6.8.0/drivers/dma/at_xdmac.c @@ -1363,6 +1363,8 @@ return NULL; desc = at_xdmac_memset_create_desc(chan, atchan, dest, len, value); + if (!desc) + return NULL; list_add_tail(&desc->desc_node, &desc->descs_list); desc->tx_dma_desc.cookie = -EBUSY; --- linux-xilinx-6.8.0.orig/drivers/dma/dma-axi-dmac.c +++ linux-xilinx-6.8.0/drivers/dma/dma-axi-dmac.c @@ -1134,8 +1134,8 @@ { struct axi_dmac *dmac = platform_get_drvdata(pdev); - of_dma_controller_free(pdev->dev.of_node); free_irq(dmac->irq, dmac); + of_dma_controller_free(pdev->dev.of_node); tasklet_kill(&dmac->chan.vchan.task); dma_async_device_unregister(&dmac->dma_dev); clk_disable_unprepare(dmac->clk); --- linux-xilinx-6.8.0.orig/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c +++ linux-xilinx-6.8.0/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c @@ -302,6 +302,7 @@ kfree(desc); return NULL; } + desc->nr_hw_descs = num; return desc; } @@ -328,7 +329,7 @@ static void axi_desc_put(struct axi_dma_desc *desc) { struct axi_dma_chan *chan = desc->chan; - int count = atomic_read(&chan->descs_allocated); + int count = desc->nr_hw_descs; struct axi_dma_hw_desc *hw_desc; int descs_put; @@ -1139,9 +1140,6 @@ /* Remove the completed descriptor from issued list before completing */ list_del(&vd->node); vchan_cookie_complete(vd); - - /* Submit queued descriptors after processing the completed ones */ - axi_chan_start_first_queued(chan); } out: --- linux-xilinx-6.8.0.orig/drivers/dma/dw-axi-dmac/dw-axi-dmac.h +++ linux-xilinx-6.8.0/drivers/dma/dw-axi-dmac/dw-axi-dmac.h @@ -104,6 +104,7 @@ u32 completed_blocks; u32 length; u32 period_len; + u32 nr_hw_descs; }; struct axi_dma_chan_config { --- linux-xilinx-6.8.0.orig/drivers/dma/dw-edma/dw-hdma-v0-core.c +++ linux-xilinx-6.8.0/drivers/dma/dw-edma/dw-hdma-v0-core.c @@ -17,8 +17,8 @@ DW_HDMA_V0_CB = BIT(0), DW_HDMA_V0_TCB = BIT(1), DW_HDMA_V0_LLP = BIT(2), - DW_HDMA_V0_LIE = BIT(3), - DW_HDMA_V0_RIE = BIT(4), + DW_HDMA_V0_LWIE = BIT(3), + DW_HDMA_V0_RWIE = BIT(4), DW_HDMA_V0_CCS = BIT(8), DW_HDMA_V0_LLE = BIT(9), }; @@ -195,25 +195,14 @@ static void dw_hdma_v0_core_write_chunk(struct dw_edma_chunk *chunk) { struct dw_edma_burst *child; - struct dw_edma_chan *chan = chunk->chan; u32 control = 0, i = 0; - int j; if (chunk->cb) control = DW_HDMA_V0_CB; - j = chunk->bursts_alloc; - list_for_each_entry(child, &chunk->burst->list, list) { - j--; - if (!j) { - control |= DW_HDMA_V0_LIE; - if (!(chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL)) - control |= DW_HDMA_V0_RIE; - } - + list_for_each_entry(child, &chunk->burst->list, list) dw_hdma_v0_write_ll_data(chunk, i++, control, child->sz, child->sar, child->dar); - } control = DW_HDMA_V0_LLP | DW_HDMA_V0_TCB; if (!chunk->cb) @@ -247,10 +236,11 @@ if (first) { /* Enable engine */ SET_CH_32(dw, chan->dir, chan->id, ch_en, BIT(0)); - /* Interrupt enable&unmask - done, abort */ - tmp = GET_CH_32(dw, chan->dir, chan->id, int_setup) | - HDMA_V0_STOP_INT_MASK | HDMA_V0_ABORT_INT_MASK | - HDMA_V0_LOCAL_STOP_INT_EN | HDMA_V0_LOCAL_ABORT_INT_EN; + /* Interrupt unmask - stop, abort */ + tmp = GET_CH_32(dw, chan->dir, chan->id, int_setup); + tmp &= ~(HDMA_V0_STOP_INT_MASK | HDMA_V0_ABORT_INT_MASK); + /* Interrupt enable - stop, abort */ + tmp |= HDMA_V0_LOCAL_STOP_INT_EN | HDMA_V0_LOCAL_ABORT_INT_EN; if (!(dw->chip->flags & DW_EDMA_CHIP_LOCAL)) tmp |= HDMA_V0_REMOTE_STOP_INT_EN | HDMA_V0_REMOTE_ABORT_INT_EN; SET_CH_32(dw, chan->dir, chan->id, int_setup, tmp); --- linux-xilinx-6.8.0.orig/drivers/dma/dw/acpi.c +++ linux-xilinx-6.8.0/drivers/dma/dw/acpi.c @@ -8,13 +8,15 @@ static bool dw_dma_acpi_filter(struct dma_chan *chan, void *param) { + struct dw_dma *dw = to_dw_dma(chan->device); + struct dw_dma_chip_pdata *data = dev_get_drvdata(dw->dma.dev); struct acpi_dma_spec *dma_spec = param; struct dw_dma_slave slave = { .dma_dev = dma_spec->dev, .src_id = dma_spec->slave_id, .dst_id = dma_spec->slave_id, - .m_master = 0, - .p_master = 1, + .m_master = data->m_master, + .p_master = data->p_master, }; return dw_dma_filter(chan, &slave); --- linux-xilinx-6.8.0.orig/drivers/dma/dw/core.c +++ linux-xilinx-6.8.0/drivers/dma/dw/core.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -621,12 +622,10 @@ struct dw_desc *prev; struct dw_desc *first; u32 ctllo, ctlhi; - u8 m_master = dwc->dws.m_master; - u8 lms = DWC_LLP_LMS(m_master); + u8 lms = DWC_LLP_LMS(dwc->dws.m_master); dma_addr_t reg; unsigned int reg_width; unsigned int mem_width; - unsigned int data_width = dw->pdata->data_width[m_master]; unsigned int i; struct scatterlist *sg; size_t total_len = 0; @@ -660,7 +659,7 @@ mem = sg_dma_address(sg); len = sg_dma_len(sg); - mem_width = __ffs(data_width | mem | len); + mem_width = __ffs(sconfig->src_addr_width | mem | len); slave_sg_todev_fill_desc: desc = dwc_desc_get(dwc); @@ -720,7 +719,7 @@ lli_write(desc, sar, reg); lli_write(desc, dar, mem); lli_write(desc, ctlhi, ctlhi); - mem_width = __ffs(data_width | mem); + mem_width = __ffs(sconfig->dst_addr_width | mem); lli_write(desc, ctllo, ctllo | DWC_CTLL_DST_WIDTH(mem_width)); desc->len = dlen; @@ -780,17 +779,93 @@ } EXPORT_SYMBOL_GPL(dw_dma_filter); +static int dwc_verify_p_buswidth(struct dma_chan *chan) +{ + struct dw_dma_chan *dwc = to_dw_dma_chan(chan); + struct dw_dma *dw = to_dw_dma(chan->device); + u32 reg_width, max_width; + + if (dwc->dma_sconfig.direction == DMA_MEM_TO_DEV) + reg_width = dwc->dma_sconfig.dst_addr_width; + else if (dwc->dma_sconfig.direction == DMA_DEV_TO_MEM) + reg_width = dwc->dma_sconfig.src_addr_width; + else /* DMA_MEM_TO_MEM */ + return 0; + + max_width = dw->pdata->data_width[dwc->dws.p_master]; + + /* Fall-back to 1-byte transfer width if undefined */ + if (reg_width == DMA_SLAVE_BUSWIDTH_UNDEFINED) + reg_width = DMA_SLAVE_BUSWIDTH_1_BYTE; + else if (!is_power_of_2(reg_width) || reg_width > max_width) + return -EINVAL; + else /* bus width is valid */ + return 0; + + /* Update undefined addr width value */ + if (dwc->dma_sconfig.direction == DMA_MEM_TO_DEV) + dwc->dma_sconfig.dst_addr_width = reg_width; + else /* DMA_DEV_TO_MEM */ + dwc->dma_sconfig.src_addr_width = reg_width; + + return 0; +} + +static int dwc_verify_m_buswidth(struct dma_chan *chan) +{ + struct dw_dma_chan *dwc = to_dw_dma_chan(chan); + struct dw_dma *dw = to_dw_dma(chan->device); + u32 reg_width, reg_burst, mem_width; + + mem_width = dw->pdata->data_width[dwc->dws.m_master]; + + /* + * It's possible to have a data portion locked in the DMA FIFO in case + * of the channel suspension. Subsequent channel disabling will cause + * that data silent loss. In order to prevent that maintain the src and + * dst transfer widths coherency by means of the relation: + * (CTLx.SRC_TR_WIDTH * CTLx.SRC_MSIZE >= CTLx.DST_TR_WIDTH) + * Look for the details in the commit message that brings this change. + * + * Note the DMA configs utilized in the calculations below must have + * been verified to have correct values by this method call. + */ + if (dwc->dma_sconfig.direction == DMA_MEM_TO_DEV) { + reg_width = dwc->dma_sconfig.dst_addr_width; + if (mem_width < reg_width) + return -EINVAL; + + dwc->dma_sconfig.src_addr_width = mem_width; + } else if (dwc->dma_sconfig.direction == DMA_DEV_TO_MEM) { + reg_width = dwc->dma_sconfig.src_addr_width; + reg_burst = rounddown_pow_of_two(dwc->dma_sconfig.src_maxburst); + + dwc->dma_sconfig.dst_addr_width = min(mem_width, reg_width * reg_burst); + } + + return 0; +} + static int dwc_config(struct dma_chan *chan, struct dma_slave_config *sconfig) { struct dw_dma_chan *dwc = to_dw_dma_chan(chan); struct dw_dma *dw = to_dw_dma(chan->device); + int ret; memcpy(&dwc->dma_sconfig, sconfig, sizeof(*sconfig)); dwc->dma_sconfig.src_maxburst = - clamp(dwc->dma_sconfig.src_maxburst, 0U, dwc->max_burst); + clamp(dwc->dma_sconfig.src_maxburst, 1U, dwc->max_burst); dwc->dma_sconfig.dst_maxburst = - clamp(dwc->dma_sconfig.dst_maxburst, 0U, dwc->max_burst); + clamp(dwc->dma_sconfig.dst_maxburst, 1U, dwc->max_burst); + + ret = dwc_verify_p_buswidth(chan); + if (ret) + return ret; + + ret = dwc_verify_m_buswidth(chan); + if (ret) + return ret; dw->encode_maxburst(dwc, &dwc->dma_sconfig.src_maxburst); dw->encode_maxburst(dwc, &dwc->dma_sconfig.dst_maxburst); --- linux-xilinx-6.8.0.orig/drivers/dma/dw/internal.h +++ linux-xilinx-6.8.0/drivers/dma/dw/internal.h @@ -51,11 +51,15 @@ int (*probe)(struct dw_dma_chip *chip); int (*remove)(struct dw_dma_chip *chip); struct dw_dma_chip *chip; + u8 m_master; + u8 p_master; }; static __maybe_unused const struct dw_dma_chip_pdata dw_dma_chip_pdata = { .probe = dw_dma_probe, .remove = dw_dma_remove, + .m_master = 0, + .p_master = 1, }; static const struct dw_dma_platform_data idma32_pdata = { @@ -72,6 +76,8 @@ .pdata = &idma32_pdata, .probe = idma32_dma_probe, .remove = idma32_dma_remove, + .m_master = 0, + .p_master = 0, }; static const struct dw_dma_platform_data xbar_pdata = { @@ -88,6 +94,8 @@ .pdata = &xbar_pdata, .probe = idma32_dma_probe, .remove = idma32_dma_remove, + .m_master = 0, + .p_master = 0, }; #endif /* _DMA_DW_INTERNAL_H */ --- linux-xilinx-6.8.0.orig/drivers/dma/dw/pci.c +++ linux-xilinx-6.8.0/drivers/dma/dw/pci.c @@ -56,10 +56,10 @@ if (ret) return ret; - dw_dma_acpi_controller_register(chip->dw); - pci_set_drvdata(pdev, data); + dw_dma_acpi_controller_register(chip->dw); + return 0; } --- linux-xilinx-6.8.0.orig/drivers/dma/fsl-edma-common.c +++ linux-xilinx-6.8.0/drivers/dma/fsl-edma-common.c @@ -3,6 +3,7 @@ // Copyright (c) 2013-2014 Freescale Semiconductor, Inc // Copyright (c) 2017 Sysam, Angelo Dureghello +#include #include #include #include @@ -74,18 +75,10 @@ flags = fsl_edma_drvflags(fsl_chan); val = edma_readl_chreg(fsl_chan, ch_sbr); - /* Remote/local swapped wrongly on iMX8 QM Audio edma */ - if (flags & FSL_EDMA_DRV_QUIRK_SWAPPED) { - if (!fsl_chan->is_rxchan) - val |= EDMA_V3_CH_SBR_RD; - else - val |= EDMA_V3_CH_SBR_WR; - } else { - if (fsl_chan->is_rxchan) - val |= EDMA_V3_CH_SBR_RD; - else - val |= EDMA_V3_CH_SBR_WR; - } + if (fsl_chan->is_rxchan) + val |= EDMA_V3_CH_SBR_RD; + else + val |= EDMA_V3_CH_SBR_WR; if (fsl_chan->is_remote) val &= ~(EDMA_V3_CH_SBR_RD | EDMA_V3_CH_SBR_WR); @@ -97,8 +90,8 @@ * ch_mux: With the exception of 0, attempts to write a value * already in use will be forced to 0. */ - if (!edma_readl_chreg(fsl_chan, ch_mux)) - edma_writel_chreg(fsl_chan, fsl_chan->srcid, ch_mux); + if (!edma_readl(fsl_chan->edma, fsl_chan->mux_addr)) + edma_writel(fsl_chan->edma, fsl_chan->srcid, fsl_chan->mux_addr); } val = edma_readl_chreg(fsl_chan, ch_csr); @@ -134,7 +127,7 @@ flags = fsl_edma_drvflags(fsl_chan); if (flags & FSL_EDMA_DRV_HAS_CHMUX) - edma_writel_chreg(fsl_chan, 0, ch_mux); + edma_writel(fsl_chan->edma, 0, fsl_chan->mux_addr); val &= ~EDMA_V3_CH_CSR_ERQ; edma_writel_chreg(fsl_chan, val, ch_csr); @@ -754,6 +747,8 @@ fsl_desc->iscyclic = false; fsl_chan->is_sw = true; + if (fsl_edma_drvflags(fsl_chan) & FSL_EDMA_DRV_MEM_REMOTE) + fsl_chan->is_remote = true; /* To match with copy_align and max_seg_size so 1 tcd is enough */ fsl_edma_fill_tcd(fsl_chan, fsl_desc->tcd[0].vtcd, dma_src, dma_dst, @@ -802,6 +797,9 @@ { struct fsl_edma_chan *fsl_chan = to_fsl_edma_chan(chan); + if (fsl_edma_drvflags(fsl_chan) & FSL_EDMA_DRV_HAS_CHCLK) + clk_prepare_enable(fsl_chan->clk); + fsl_chan->tcd_pool = dma_pool_create("tcd_pool", chan->device->dev, sizeof(struct fsl_edma_hw_tcd), 32, 0); @@ -829,6 +827,9 @@ fsl_chan->tcd_pool = NULL; fsl_chan->is_sw = false; fsl_chan->srcid = 0; + fsl_chan->is_remote = false; + if (fsl_edma_drvflags(fsl_chan) & FSL_EDMA_DRV_HAS_CHCLK) + clk_disable_unprepare(fsl_chan->clk); } void fsl_edma_cleanup_vchan(struct dma_device *dmadev) --- linux-xilinx-6.8.0.orig/drivers/dma/fsl-edma-common.h +++ linux-xilinx-6.8.0/drivers/dma/fsl-edma-common.h @@ -146,10 +146,12 @@ enum dma_data_direction dma_dir; char chan_name[32]; struct fsl_edma_hw_tcd __iomem *tcd; + void __iomem *mux_addr; u32 real_count; struct work_struct issue_worker; struct platform_device *pdev; struct device *pd_dev; + struct device_link *pd_dev_link; u32 srcid; struct clk *clk; int priority; @@ -177,8 +179,7 @@ #define FSL_EDMA_DRV_HAS_PD BIT(5) #define FSL_EDMA_DRV_HAS_CHCLK BIT(6) #define FSL_EDMA_DRV_HAS_CHMUX BIT(7) -/* imx8 QM audio edma remote local swapped */ -#define FSL_EDMA_DRV_QUIRK_SWAPPED BIT(8) +#define FSL_EDMA_DRV_MEM_REMOTE BIT(8) /* control and status register is in tcd address space, edma3 reg layout */ #define FSL_EDMA_DRV_SPLIT_REG BIT(9) #define FSL_EDMA_DRV_BUS_8BYTE BIT(10) @@ -207,6 +208,8 @@ u32 chreg_off; u32 chreg_space_sz; u32 flags; + u32 mux_off; /* channel mux register offset */ + u32 mux_skip; /* how much skip for each channel */ int (*setup_irq)(struct platform_device *pdev, struct fsl_edma_engine *fsl_edma); }; --- linux-xilinx-6.8.0.orig/drivers/dma/fsl-edma-main.c +++ linux-xilinx-6.8.0/drivers/dma/fsl-edma-main.c @@ -336,16 +336,19 @@ }; static struct fsl_edma_drvdata imx8qm_data = { - .flags = FSL_EDMA_DRV_HAS_PD | FSL_EDMA_DRV_EDMA3, + .flags = FSL_EDMA_DRV_HAS_PD | FSL_EDMA_DRV_EDMA3 | FSL_EDMA_DRV_MEM_REMOTE, .chreg_space_sz = 0x10000, .chreg_off = 0x10000, .setup_irq = fsl_edma3_irq_init, }; -static struct fsl_edma_drvdata imx8qm_audio_data = { - .flags = FSL_EDMA_DRV_QUIRK_SWAPPED | FSL_EDMA_DRV_HAS_PD | FSL_EDMA_DRV_EDMA3, +static struct fsl_edma_drvdata imx8ulp_data = { + .flags = FSL_EDMA_DRV_HAS_CHMUX | FSL_EDMA_DRV_HAS_CHCLK | FSL_EDMA_DRV_HAS_DMACLK | + FSL_EDMA_DRV_EDMA3, .chreg_space_sz = 0x10000, .chreg_off = 0x10000, + .mux_off = 0x10000 + offsetof(struct fsl_edma3_ch_reg, ch_mux), + .mux_skip = 0x10000, .setup_irq = fsl_edma3_irq_init, }; @@ -360,6 +363,8 @@ .flags = FSL_EDMA_DRV_HAS_CHMUX | FSL_EDMA_DRV_HAS_DMACLK | FSL_EDMA_DRV_EDMA4, .chreg_space_sz = 0x8000, .chreg_off = 0x10000, + .mux_off = 0x10000 + offsetof(struct fsl_edma3_ch_reg, ch_mux), + .mux_skip = 0x8000, .setup_irq = fsl_edma3_irq_init, }; @@ -368,17 +373,40 @@ { .compatible = "fsl,ls1028a-edma", .data = &ls1028a_data}, { .compatible = "fsl,imx7ulp-edma", .data = &imx7ulp_data}, { .compatible = "fsl,imx8qm-edma", .data = &imx8qm_data}, - { .compatible = "fsl,imx8qm-adma", .data = &imx8qm_audio_data}, + { .compatible = "fsl,imx8ulp-edma", .data = &imx8ulp_data}, { .compatible = "fsl,imx93-edma3", .data = &imx93_data3}, { .compatible = "fsl,imx93-edma4", .data = &imx93_data4}, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, fsl_edma_dt_ids); +static void fsl_edma3_detach_pd(struct fsl_edma_engine *fsl_edma) +{ + struct fsl_edma_chan *fsl_chan; + int i; + + for (i = 0; i < fsl_edma->n_chans; i++) { + if (fsl_edma->chan_masked & BIT(i)) + continue; + fsl_chan = &fsl_edma->chans[i]; + if (fsl_chan->pd_dev_link) + device_link_del(fsl_chan->pd_dev_link); + if (fsl_chan->pd_dev) { + dev_pm_domain_detach(fsl_chan->pd_dev, false); + pm_runtime_dont_use_autosuspend(fsl_chan->pd_dev); + pm_runtime_set_suspended(fsl_chan->pd_dev); + } + } +} + +static void devm_fsl_edma3_detach_pd(void *data) +{ + fsl_edma3_detach_pd(data); +} + static int fsl_edma3_attach_pd(struct platform_device *pdev, struct fsl_edma_engine *fsl_edma) { struct fsl_edma_chan *fsl_chan; - struct device_link *link; struct device *pd_chan; struct device *dev; int i; @@ -394,15 +422,16 @@ pd_chan = dev_pm_domain_attach_by_id(dev, i); if (IS_ERR_OR_NULL(pd_chan)) { dev_err(dev, "Failed attach pd %d\n", i); - return -EINVAL; + goto detach; } - link = device_link_add(dev, pd_chan, DL_FLAG_STATELESS | + fsl_chan->pd_dev_link = device_link_add(dev, pd_chan, DL_FLAG_STATELESS | DL_FLAG_PM_RUNTIME | DL_FLAG_RPM_ACTIVE); - if (!link) { + if (!fsl_chan->pd_dev_link) { dev_err(dev, "Failed to add device_link to %d\n", i); - return -EINVAL; + dev_pm_domain_detach(pd_chan, false); + goto detach; } fsl_chan->pd_dev = pd_chan; @@ -413,6 +442,10 @@ } return 0; + +detach: + fsl_edma3_detach_pd(fsl_edma); + return -EINVAL; } static int fsl_edma_probe(struct platform_device *pdev) @@ -421,6 +454,7 @@ struct fsl_edma_engine *fsl_edma; const struct fsl_edma_drvdata *drvdata = NULL; u32 chan_mask[2] = {0, 0}; + char clk_name[36]; struct edma_regs *regs; int chans; int ret, i; @@ -509,6 +543,9 @@ ret = fsl_edma3_attach_pd(pdev, fsl_edma); if (ret) return ret; + ret = devm_add_action_or_reset(&pdev->dev, devm_fsl_edma3_detach_pd, fsl_edma); + if (ret) + return ret; } INIT_LIST_HEAD(&fsl_edma->dma_dev.channels); @@ -533,12 +570,23 @@ offsetof(struct fsl_edma3_ch_reg, tcd) : 0; fsl_chan->tcd = fsl_edma->membase + i * drvdata->chreg_space_sz + drvdata->chreg_off + len; + fsl_chan->mux_addr = fsl_edma->membase + drvdata->mux_off + i * drvdata->mux_skip; + if (drvdata->flags & FSL_EDMA_DRV_HAS_CHCLK) { + snprintf(clk_name, sizeof(clk_name), "ch%02d", i); + fsl_chan->clk = devm_clk_get_enabled(&pdev->dev, + (const char *)clk_name); + + if (IS_ERR(fsl_chan->clk)) + return PTR_ERR(fsl_chan->clk); + } fsl_chan->pdev = pdev; vchan_init(&fsl_chan->vchan, &fsl_edma->dma_dev); edma_write_tcdreg(fsl_chan, 0, csr); fsl_edma_chan_mux(fsl_chan, 0, false); + if (fsl_chan->edma->drvdata->flags & FSL_EDMA_DRV_HAS_CHCLK) + clk_disable_unprepare(fsl_chan->clk); } ret = fsl_edma->drvdata->setup_irq(pdev, fsl_edma); --- linux-xilinx-6.8.0.orig/drivers/dma/idma64.c +++ linux-xilinx-6.8.0/drivers/dma/idma64.c @@ -171,6 +171,10 @@ u32 status_err; unsigned short i; + /* Since IRQ may be shared, check if DMA controller is powered on */ + if (status == GENMASK(31, 0)) + return IRQ_NONE; + dev_vdbg(idma64->dma.dev, "%s: status=%#x\n", __func__, status); /* Check if we have any interrupt from the DMA controller */ @@ -594,7 +598,9 @@ idma64->dma.dev = chip->sysdev; - dma_set_max_seg_size(idma64->dma.dev, IDMA64C_CTLH_BLOCK_TS_MASK); + ret = dma_set_max_seg_size(idma64->dma.dev, IDMA64C_CTLH_BLOCK_TS_MASK); + if (ret) + return ret; ret = dma_async_device_register(&idma64->dma); if (ret) --- linux-xilinx-6.8.0.orig/drivers/dma/idxd/cdev.c +++ linux-xilinx-6.8.0/drivers/dma/idxd/cdev.c @@ -342,7 +342,7 @@ if (!evl) return; - spin_lock(&evl->lock); + mutex_lock(&evl->lock); status.bits = ioread64(idxd->reg_base + IDXD_EVLSTATUS_OFFSET); t = status.tail; h = status.head; @@ -354,9 +354,8 @@ set_bit(h, evl->bmap); h = (h + 1) % size; } - spin_unlock(&evl->lock); - drain_workqueue(wq->wq); + mutex_unlock(&evl->lock); } static int idxd_cdev_release(struct inode *node, struct file *filep) @@ -401,6 +400,18 @@ int rc; dev_dbg(&pdev->dev, "%s called\n", __func__); + + /* + * Due to an erratum in some of the devices supported by the driver, + * direct user submission to the device can be unsafe. + * (See document INTEL-SA-01084) + * + * For the devices that exhibit this behavior, require that the user + * has CAP_SYS_RAWIO capabilities. + */ + if (!idxd->user_submission_safe && !capable(CAP_SYS_RAWIO)) + return -EPERM; + rc = check_vma(wq, vma, __func__); if (rc < 0) return rc; @@ -415,6 +426,70 @@ vma->vm_page_prot); } +static int idxd_submit_user_descriptor(struct idxd_user_context *ctx, + struct dsa_hw_desc __user *udesc) +{ + struct idxd_wq *wq = ctx->wq; + struct idxd_dev *idxd_dev = &wq->idxd->idxd_dev; + const uint64_t comp_addr_align = is_dsa_dev(idxd_dev) ? 0x20 : 0x40; + void __iomem *portal = idxd_wq_portal_addr(wq); + struct dsa_hw_desc descriptor __aligned(64); + int rc; + + rc = copy_from_user(&descriptor, udesc, sizeof(descriptor)); + if (rc) + return -EFAULT; + + /* + * DSA devices are capable of indirect ("batch") command submission. + * On devices where direct user submissions are not safe, we cannot + * allow this since there is no good way for us to verify these + * indirect commands. + */ + if (is_dsa_dev(idxd_dev) && descriptor.opcode == DSA_OPCODE_BATCH && + !wq->idxd->user_submission_safe) + return -EINVAL; + /* + * As per the programming specification, the completion address must be + * aligned to 32 or 64 bytes. If this is violated the hardware + * engine can get very confused (security issue). + */ + if (!IS_ALIGNED(descriptor.completion_addr, comp_addr_align)) + return -EINVAL; + + if (wq_dedicated(wq)) + iosubmit_cmds512(portal, &descriptor, 1); + else { + descriptor.priv = 0; + descriptor.pasid = ctx->pasid; + rc = idxd_enqcmds(wq, portal, &descriptor); + if (rc < 0) + return rc; + } + + return 0; +} + +static ssize_t idxd_cdev_write(struct file *filp, const char __user *buf, size_t len, + loff_t *unused) +{ + struct dsa_hw_desc __user *udesc = (struct dsa_hw_desc __user *)buf; + struct idxd_user_context *ctx = filp->private_data; + ssize_t written = 0; + int i; + + for (i = 0; i < len/sizeof(struct dsa_hw_desc); i++) { + int rc = idxd_submit_user_descriptor(ctx, udesc + i); + + if (rc) + return written ? written : rc; + + written += sizeof(struct dsa_hw_desc); + } + + return written; +} + static __poll_t idxd_cdev_poll(struct file *filp, struct poll_table_struct *wait) { @@ -437,6 +512,7 @@ .open = idxd_cdev_open, .release = idxd_cdev_release, .mmap = idxd_cdev_mmap, + .write = idxd_cdev_write, .poll = idxd_cdev_poll, }; @@ -501,7 +577,6 @@ struct idxd_cdev *idxd_cdev; idxd_cdev = wq->idxd_cdev; - ida_destroy(&file_ida); wq->idxd_cdev = NULL; cdev_device_del(&idxd_cdev->cdev, cdev_dev(idxd_cdev)); put_device(cdev_dev(idxd_cdev)); --- linux-xilinx-6.8.0.orig/drivers/dma/idxd/debugfs.c +++ linux-xilinx-6.8.0/drivers/dma/idxd/debugfs.c @@ -66,7 +66,7 @@ if (!evl || !evl->log) return 0; - spin_lock(&evl->lock); + mutex_lock(&evl->lock); evl_status.bits = ioread64(idxd->reg_base + IDXD_EVLSTATUS_OFFSET); t = evl_status.tail; @@ -87,7 +87,7 @@ dump_event_entry(idxd, s, i, &count, processed); } - spin_unlock(&evl->lock); + mutex_unlock(&evl->lock); return 0; } --- linux-xilinx-6.8.0.orig/drivers/dma/idxd/device.c +++ linux-xilinx-6.8.0/drivers/dma/idxd/device.c @@ -775,7 +775,7 @@ goto err_alloc; } - spin_lock(&evl->lock); + mutex_lock(&evl->lock); evl->log = addr; evl->dma = dma_addr; evl->log_size = size; @@ -796,7 +796,7 @@ gencfg.evl_en = 1; iowrite32(gencfg.bits, idxd->reg_base + IDXD_GENCFG_OFFSET); - spin_unlock(&evl->lock); + mutex_unlock(&evl->lock); return 0; err_alloc: @@ -819,7 +819,7 @@ if (!gencfg.evl_en) return; - spin_lock(&evl->lock); + mutex_lock(&evl->lock); gencfg.evl_en = 0; iowrite32(gencfg.bits, idxd->reg_base + IDXD_GENCFG_OFFSET); @@ -836,7 +836,7 @@ evl_dma = evl->dma; evl->log = NULL; evl->size = IDXD_EVL_SIZE_MIN; - spin_unlock(&evl->lock); + mutex_unlock(&evl->lock); dma_free_coherent(dev, evl_log_size, evl_log, evl_dma); } --- linux-xilinx-6.8.0.orig/drivers/dma/idxd/idxd.h +++ linux-xilinx-6.8.0/drivers/dma/idxd/idxd.h @@ -288,12 +288,13 @@ int evl_cr_off; int cr_status_off; int cr_result_off; + bool user_submission_safe; load_device_defaults_fn_t load_device_defaults; }; struct idxd_evl { /* Lock to protect event log access. */ - spinlock_t lock; + struct mutex lock; void *log; dma_addr_t dma; /* Total size of event log = number of entries * entry size. */ @@ -374,6 +375,8 @@ struct dentry *dbgfs_dir; struct dentry *dbgfs_evl_file; + + bool user_submission_safe; }; static inline unsigned int evl_ent_size(struct idxd_device *idxd) --- linux-xilinx-6.8.0.orig/drivers/dma/idxd/init.c +++ linux-xilinx-6.8.0/drivers/dma/idxd/init.c @@ -47,6 +47,7 @@ .align = 32, .dev_type = &dsa_device_type, .evl_cr_off = offsetof(struct dsa_evl_entry, cr), + .user_submission_safe = false, /* See INTEL-SA-01084 erratum */ .cr_status_off = offsetof(struct dsa_completion_record, status), .cr_result_off = offsetof(struct dsa_completion_record, result), }, @@ -57,6 +58,7 @@ .align = 64, .dev_type = &iax_device_type, .evl_cr_off = offsetof(struct iax_evl_entry, cr), + .user_submission_safe = false, /* See INTEL-SA-01084 erratum */ .cr_status_off = offsetof(struct iax_completion_record, status), .cr_result_off = offsetof(struct iax_completion_record, error_code), .load_device_defaults = idxd_load_iaa_device_defaults, @@ -354,7 +356,7 @@ if (!evl) return -ENOMEM; - spin_lock_init(&evl->lock); + mutex_init(&evl->lock); evl->size = IDXD_EVL_SIZE_MIN; idxd_name = dev_name(idxd_confdev(idxd)); @@ -774,6 +776,8 @@ dev_info(&pdev->dev, "Intel(R) Accelerator Device (v%x)\n", idxd->hw.version); + idxd->user_submission_safe = data->user_submission_safe; + return 0; err_dev_register: --- linux-xilinx-6.8.0.orig/drivers/dma/idxd/irq.c +++ linux-xilinx-6.8.0/drivers/dma/idxd/irq.c @@ -363,7 +363,7 @@ evl_status.bits = 0; evl_status.int_pending = 1; - spin_lock(&evl->lock); + mutex_lock(&evl->lock); /* Clear interrupt pending bit */ iowrite32(evl_status.bits_upper32, idxd->reg_base + IDXD_EVLSTATUS_OFFSET + sizeof(u32)); @@ -380,7 +380,7 @@ evl_status.head = h; iowrite32(evl_status.bits_lower32, idxd->reg_base + IDXD_EVLSTATUS_OFFSET); - spin_unlock(&evl->lock); + mutex_unlock(&evl->lock); } irqreturn_t idxd_misc_thread(int vec, void *data) @@ -611,11 +611,13 @@ spin_unlock(&irq_entry->list_lock); - list_for_each_entry(desc, &flist, list) { + list_for_each_entry_safe(desc, n, &flist, list) { /* * Check against the original status as ABORT is software defined * and 0xff, which DSA_COMP_STATUS_MASK can mask out. */ + list_del(&desc->list); + if (unlikely(desc->completion->status == IDXD_COMP_DESC_ABORT)) { idxd_desc_complete(desc, IDXD_COMPLETE_ABORT, true); continue; --- linux-xilinx-6.8.0.orig/drivers/dma/idxd/perfmon.c +++ linux-xilinx-6.8.0/drivers/dma/idxd/perfmon.c @@ -528,14 +528,11 @@ return 0; target = cpumask_any_but(cpu_online_mask, cpu); - /* migrate events if there is a valid target */ - if (target < nr_cpu_ids) + if (target < nr_cpu_ids) { cpumask_set_cpu(target, &perfmon_dsa_cpu_mask); - else - target = -1; - - perf_pmu_migrate_context(&idxd_pmu->pmu, cpu, target); + perf_pmu_migrate_context(&idxd_pmu->pmu, cpu, target); + } return 0; } --- linux-xilinx-6.8.0.orig/drivers/dma/idxd/registers.h +++ linux-xilinx-6.8.0/drivers/dma/idxd/registers.h @@ -6,9 +6,6 @@ #include /* PCI Config */ -#define PCI_DEVICE_ID_INTEL_DSA_SPR0 0x0b25 -#define PCI_DEVICE_ID_INTEL_IAX_SPR0 0x0cfe - #define DEVICE_VERSION_1 0x100 #define DEVICE_VERSION_2 0x200 --- linux-xilinx-6.8.0.orig/drivers/dma/idxd/sysfs.c +++ linux-xilinx-6.8.0/drivers/dma/idxd/sysfs.c @@ -1197,12 +1197,35 @@ static struct device_attribute dev_attr_wq_enqcmds_retries = __ATTR(enqcmds_retries, 0644, wq_enqcmds_retries_show, wq_enqcmds_retries_store); +static ssize_t op_cap_show_common(struct device *dev, char *buf, unsigned long *opcap_bmap) +{ + ssize_t pos; + int i; + + pos = 0; + for (i = IDXD_MAX_OPCAP_BITS/64 - 1; i >= 0; i--) { + unsigned long val = opcap_bmap[i]; + + /* On systems where direct user submissions are not safe, we need to clear out + * the BATCH capability from the capability mask in sysfs since we cannot support + * that command on such systems. + */ + if (i == DSA_OPCODE_BATCH/64 && !confdev_to_idxd(dev)->user_submission_safe) + clear_bit(DSA_OPCODE_BATCH % 64, &val); + + pos += sysfs_emit_at(buf, pos, "%*pb", 64, &val); + pos += sysfs_emit_at(buf, pos, "%c", i == 0 ? '\n' : ','); + } + + return pos; +} + static ssize_t wq_op_config_show(struct device *dev, struct device_attribute *attr, char *buf) { struct idxd_wq *wq = confdev_to_wq(dev); - return sysfs_emit(buf, "%*pb\n", IDXD_MAX_OPCAP_BITS, wq->opcap_bmap); + return op_cap_show_common(dev, buf, wq->opcap_bmap); } static int idxd_verify_supported_opcap(struct idxd_device *idxd, unsigned long *opmask) @@ -1455,7 +1478,7 @@ { struct idxd_device *idxd = confdev_to_idxd(dev); - return sysfs_emit(buf, "%*pb\n", IDXD_MAX_OPCAP_BITS, idxd->opcap_bmap); + return op_cap_show_common(dev, buf, idxd->opcap_bmap); } static DEVICE_ATTR_RO(op_cap); --- linux-xilinx-6.8.0.orig/drivers/dma/ioat/init.c +++ linux-xilinx-6.8.0/drivers/dma/ioat/init.c @@ -534,18 +534,6 @@ return err; } -static int ioat_register(struct ioatdma_device *ioat_dma) -{ - int err = dma_async_device_register(&ioat_dma->dma_dev); - - if (err) { - ioat_disable_interrupts(ioat_dma); - dma_pool_destroy(ioat_dma->completion_pool); - } - - return err; -} - static void ioat_dma_remove(struct ioatdma_device *ioat_dma) { struct dma_device *dma = &ioat_dma->dma_dev; @@ -1181,9 +1169,9 @@ ioat_chan->reg_base + IOAT_DCACTRL_OFFSET); } - err = ioat_register(ioat_dma); + err = dma_async_device_register(&ioat_dma->dma_dev); if (err) - return err; + goto err_disable_interrupts; ioat_kobject_add(ioat_dma, &ioat_ktype); @@ -1192,20 +1180,29 @@ /* disable relaxed ordering */ err = pcie_capability_read_word(pdev, PCI_EXP_DEVCTL, &val16); - if (err) - return pcibios_err_to_errno(err); + if (err) { + err = pcibios_err_to_errno(err); + goto err_disable_interrupts; + } /* clear relaxed ordering enable */ val16 &= ~PCI_EXP_DEVCTL_RELAX_EN; err = pcie_capability_write_word(pdev, PCI_EXP_DEVCTL, val16); - if (err) - return pcibios_err_to_errno(err); + if (err) { + err = pcibios_err_to_errno(err); + goto err_disable_interrupts; + } if (ioat_dma->cap & IOAT_CAP_DPS) writeb(ioat_pending_level + 1, ioat_dma->reg_base + IOAT_PREFETCH_LIMIT_OFFSET); return 0; + +err_disable_interrupts: + ioat_disable_interrupts(ioat_dma); + dma_pool_destroy(ioat_dma->completion_pool); + return err; } static void ioat_shutdown(struct pci_dev *pdev) @@ -1350,6 +1347,8 @@ void __iomem * const *iomap; struct device *dev = &pdev->dev; struct ioatdma_device *device; + unsigned int i; + u8 version; int err; err = pcim_enable_device(pdev); @@ -1363,6 +1362,10 @@ if (!iomap) return -ENOMEM; + version = readb(iomap[IOAT_MMIO_BAR] + IOAT_VER_OFFSET); + if (version < IOAT_VER_3_0) + return -ENODEV; + err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); if (err) return err; @@ -1373,17 +1376,18 @@ pci_set_master(pdev); pci_set_drvdata(pdev, device); - device->version = readb(device->reg_base + IOAT_VER_OFFSET); + device->version = version; if (device->version >= IOAT_VER_3_4) ioat_dca_enabled = 0; - if (device->version >= IOAT_VER_3_0) { - if (is_skx_ioat(pdev)) - device->version = IOAT_VER_3_2; - err = ioat3_dma_probe(device, ioat_dca_enabled); - } else - return -ENODEV; + if (is_skx_ioat(pdev)) + device->version = IOAT_VER_3_2; + + err = ioat3_dma_probe(device, ioat_dca_enabled); if (err) { + for (i = 0; i < IOAT_MAX_CHANS; i++) + kfree(device->idx[i]); + kfree(device); dev_err(dev, "Intel(R) I/OAT DMA Engine init failed\n"); return -ENODEV; } @@ -1445,6 +1449,7 @@ static void __exit ioat_exit_module(void) { pci_unregister_driver(&ioat_pci_driver); + kmem_cache_destroy(ioat_sed_cache); kmem_cache_destroy(ioat_cache); } module_exit(ioat_exit_module); --- linux-xilinx-6.8.0.orig/drivers/dma/ls2x-apb-dma.c +++ linux-xilinx-6.8.0/drivers/dma/ls2x-apb-dma.c @@ -31,7 +31,7 @@ #define LDMA_ASK_VALID BIT(2) #define LDMA_START BIT(3) /* DMA start operation */ #define LDMA_STOP BIT(4) /* DMA stop operation */ -#define LDMA_CONFIG_MASK GENMASK(4, 0) /* DMA controller config bits mask */ +#define LDMA_CONFIG_MASK GENMASK_ULL(4, 0) /* DMA controller config bits mask */ /* Bitfields in ndesc_addr field of HW decriptor */ #define LDMA_DESC_EN BIT(0) /*1: The next descriptor is valid */ --- linux-xilinx-6.8.0.orig/drivers/dma/mv_xor.c +++ linux-xilinx-6.8.0/drivers/dma/mv_xor.c @@ -1388,6 +1388,7 @@ irq = irq_of_parse_and_map(np, 0); if (!irq) { ret = -ENODEV; + of_node_put(np); goto err_channel_add; } @@ -1396,6 +1397,7 @@ if (IS_ERR(chan)) { ret = PTR_ERR(chan); irq_dispose_mapping(irq); + of_node_put(np); goto err_channel_add; } --- linux-xilinx-6.8.0.orig/drivers/dma/owl-dma.c +++ linux-xilinx-6.8.0/drivers/dma/owl-dma.c @@ -250,7 +250,7 @@ else regval &= ~val; - writel(val, pchan->base + reg); + writel(regval, pchan->base + reg); } static void pchan_writel(struct owl_dma_pchan *pchan, u32 reg, u32 data) @@ -274,7 +274,7 @@ else regval &= ~val; - writel(val, od->base + reg); + writel(regval, od->base + reg); } static void dma_writel(struct owl_dma *od, u32 reg, u32 data) --- linux-xilinx-6.8.0.orig/drivers/dma/pl330.c +++ linux-xilinx-6.8.0/drivers/dma/pl330.c @@ -1053,9 +1053,6 @@ thrd->req_running = idx; - if (desc->rqtype == DMA_MEM_TO_DEV || desc->rqtype == DMA_DEV_TO_MEM) - UNTIL(thrd, PL330_STATE_WFP); - return true; } --- linux-xilinx-6.8.0.orig/drivers/dma/tegra186-gpc-dma.c +++ linux-xilinx-6.8.0/drivers/dma/tegra186-gpc-dma.c @@ -231,6 +231,7 @@ bool config_init; char name[30]; enum dma_transfer_direction sid_dir; + enum dma_status status; int id; int irq; int slave_id; @@ -393,6 +394,8 @@ tegra_dma_dump_chan_regs(tdc); } + tdc->status = DMA_PAUSED; + return ret; } @@ -419,6 +422,8 @@ val = tdc_read(tdc, TEGRA_GPCDMA_CHAN_CSRE); val &= ~TEGRA_GPCDMA_CHAN_CSRE_PAUSE; tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSRE, val); + + tdc->status = DMA_IN_PROGRESS; } static int tegra_dma_device_resume(struct dma_chan *dc) @@ -544,6 +549,7 @@ tegra_dma_sid_free(tdc); tdc->dma_desc = NULL; + tdc->status = DMA_COMPLETE; } static void tegra_dma_chan_decode_error(struct tegra_dma_channel *tdc, @@ -716,6 +722,7 @@ tdc->dma_desc = NULL; } + tdc->status = DMA_COMPLETE; tegra_dma_sid_free(tdc); vchan_get_all_descriptors(&tdc->vc, &head); spin_unlock_irqrestore(&tdc->vc.lock, flags); @@ -746,6 +753,9 @@ bytes_xfer = dma_desc->bytes_xfer + sg_req[dma_desc->sg_idx].len - (wcount * 4); + if (dma_desc->bytes_req == bytes_xfer) + return 0; + residual = dma_desc->bytes_req - (bytes_xfer % dma_desc->bytes_req); return residual; @@ -766,6 +776,9 @@ if (ret == DMA_COMPLETE) return ret; + if (tdc->status == DMA_PAUSED) + ret = DMA_PAUSED; + spin_lock_irqsave(&tdc->vc.lock, flags); vd = vchan_find_desc(&tdc->vc, cookie); if (vd) { --- linux-xilinx-6.8.0.orig/drivers/dma/ti/edma.c +++ linux-xilinx-6.8.0/drivers/dma/ti/edma.c @@ -208,7 +208,6 @@ struct edma_cc; struct edma_tc { - struct device_node *node; u16 id; }; @@ -2466,13 +2465,13 @@ if (ret || i == ecc->num_tc) break; - ecc->tc_list[i].node = tc_args.np; ecc->tc_list[i].id = i; queue_priority_mapping[i][1] = tc_args.args[0]; if (queue_priority_mapping[i][1] > lowest_priority) { lowest_priority = queue_priority_mapping[i][1]; info->default_queue = i; } + of_node_put(tc_args.np); } /* See if we have optional dma-channel-mask array */ --- linux-xilinx-6.8.0.orig/drivers/dma/ti/k3-udma.c +++ linux-xilinx-6.8.0/drivers/dma/ti/k3-udma.c @@ -4472,7 +4472,9 @@ ud->rchan_cnt = UDMA_CAP2_RCHAN_CNT(cap2); break; case DMA_TYPE_BCDMA: - ud->bchan_cnt = BCDMA_CAP2_BCHAN_CNT(cap2); + ud->bchan_cnt = BCDMA_CAP2_BCHAN_CNT(cap2) + + BCDMA_CAP3_HBCHAN_CNT(cap3) + + BCDMA_CAP3_UBCHAN_CNT(cap3); ud->tchan_cnt = BCDMA_CAP2_TCHAN_CNT(cap2); ud->rchan_cnt = BCDMA_CAP2_RCHAN_CNT(cap2); ud->rflow_cnt = ud->rchan_cnt; --- linux-xilinx-6.8.0.orig/drivers/dma/ti/omap-dma.c +++ linux-xilinx-6.8.0/drivers/dma/ti/omap-dma.c @@ -1186,10 +1186,10 @@ d->dev_addr = dev_addr; d->fi = burst; d->es = es; + d->sglen = 1; d->sg[0].addr = buf_addr; d->sg[0].en = period_len / es_bytes[es]; d->sg[0].fn = buf_len / period_len; - d->sglen = 1; d->ccr = c->ccr; if (dir == DMA_DEV_TO_MEM) @@ -1258,10 +1258,10 @@ d->dev_addr = src; d->fi = 0; d->es = data_type; + d->sglen = 1; d->sg[0].en = len / BIT(data_type); d->sg[0].fn = 1; d->sg[0].addr = dest; - d->sglen = 1; d->ccr = c->ccr; d->ccr |= CCR_DST_AMODE_POSTINC | CCR_SRC_AMODE_POSTINC; @@ -1309,6 +1309,7 @@ if (data_type > CSDP_DATA_TYPE_32) data_type = CSDP_DATA_TYPE_32; + d->sglen = 1; sg = &d->sg[0]; d->dir = DMA_MEM_TO_MEM; d->dev_addr = xt->src_start; @@ -1316,7 +1317,6 @@ sg->en = xt->sgl[0].size / BIT(data_type); sg->fn = xt->numf; sg->addr = xt->dst_start; - d->sglen = 1; d->ccr = c->ccr; src_icg = dmaengine_get_src_icg(xt, &xt->sgl[0]); --- linux-xilinx-6.8.0.orig/drivers/dma/xilinx/Makefile +++ linux-xilinx-6.8.0/drivers/dma/xilinx/Makefile @@ -1,5 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-only +obj-$(CONFIG_XILINX_DMATEST) += axidmatest.o +obj-$(CONFIG_XILINX_VDMATEST) += vdmatest.o obj-$(CONFIG_XILINX_DMA) += xilinx_dma.o obj-$(CONFIG_XILINX_XDMA) += xdma.o obj-$(CONFIG_XILINX_ZYNQMP_DMA) += zynqmp_dma.o obj-$(CONFIG_XILINX_ZYNQMP_DPDMA) += xilinx_dpdma.o +obj-$(CONFIG_XILINX_FRMBUF) += xilinx_frmbuf.o --- linux-xilinx-6.8.0.orig/drivers/dma/xilinx/axidmatest.c +++ linux-xilinx-6.8.0/drivers/dma/xilinx/axidmatest.c @@ -0,0 +1,698 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * XILINX AXI DMA and MCDMA Engine test module + * + * Copyright (C) 2010 Xilinx, Inc. All rights reserved. + * + * Based on Atmel DMA Test Client + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static unsigned int test_buf_size = 16384; +module_param(test_buf_size, uint, 0444); +MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer"); + +static unsigned int iterations = 5; +module_param(iterations, uint, 0444); +MODULE_PARM_DESC(iterations, + "Iterations before stopping test (default: infinite)"); + +/* + * Initialization patterns. All bytes in the source buffer has bit 7 + * set, all bytes in the destination buffer has bit 7 cleared. + * + * Bit 6 is set for all bytes which are to be copied by the DMA + * engine. Bit 5 is set for all bytes which are to be overwritten by + * the DMA engine. + * + * The remaining bits are the inverse of a counter which increments by + * one for each byte address. + */ +#define PATTERN_SRC 0x80 +#define PATTERN_DST 0x00 +#define PATTERN_COPY 0x40 +#define PATTERN_OVERWRITE 0x20 +#define PATTERN_COUNT_MASK 0x1f + +#define XILINX_DMATEST_BD_CNT 11 + +struct dmatest_slave_thread { + struct list_head node; + struct task_struct *task; + struct dma_chan *tx_chan; + struct dma_chan *rx_chan; + u8 **srcs; + u8 **dsts; + enum dma_transaction_type type; + bool done; +}; + +struct dmatest_chan { + struct list_head node; + struct dma_chan *chan; + struct list_head threads; +}; + +/* + * These are protected by dma_list_mutex since they're only used by + * the DMA filter function callback + */ +static DECLARE_WAIT_QUEUE_HEAD(thread_wait); +static LIST_HEAD(dmatest_channels); +static unsigned int nr_channels; + +static unsigned long long dmatest_persec(s64 runtime, unsigned int val) +{ + unsigned long long per_sec = 1000000; + + if (runtime <= 0) + return 0; + + /* drop precision until runtime is 32-bits */ + while (runtime > UINT_MAX) { + runtime >>= 1; + per_sec <<= 1; + } + + per_sec *= val; + do_div(per_sec, runtime); + return per_sec; +} + +static unsigned long long dmatest_KBs(s64 runtime, unsigned long long len) +{ + return dmatest_persec(runtime, len >> 10); +} + +static bool is_threaded_test_run(struct dmatest_chan *tx_dtc, + struct dmatest_chan *rx_dtc) +{ + struct dmatest_slave_thread *thread; + int ret = false; + + list_for_each_entry(thread, &tx_dtc->threads, node) { + if (!thread->done) + ret = true; + } + + list_for_each_entry(thread, &rx_dtc->threads, node) { + if (!thread->done) + ret = true; + } + return ret; +} + +static unsigned long dmatest_random(void) +{ + unsigned long buf; + + get_random_bytes(&buf, sizeof(buf)); + return buf; +} + +static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len) +{ + unsigned int i; + u8 *buf; + + for (; (buf = *bufs); bufs++) { + for (i = 0; i < start; i++) + buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK); + for ( ; i < start + len; i++) + buf[i] = PATTERN_SRC | PATTERN_COPY + | (~i & PATTERN_COUNT_MASK); + for ( ; i < test_buf_size; i++) + buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK); + } +} + +static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len) +{ + unsigned int i; + u8 *buf; + + for (; (buf = *bufs); bufs++) { + for (i = 0; i < start; i++) + buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK); + for ( ; i < start + len; i++) + buf[i] = PATTERN_DST | PATTERN_OVERWRITE + | (~i & PATTERN_COUNT_MASK); + for ( ; i < test_buf_size; i++) + buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK); + } +} + +static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index, + unsigned int counter, bool is_srcbuf) +{ + u8 diff = actual ^ pattern; + u8 expected = pattern | (~counter & PATTERN_COUNT_MASK); + const char *thread_name = current->comm; + + if (is_srcbuf) + pr_warn("%s: srcbuf[0x%x] overwritten! Expected %02x, got %02x\n", + thread_name, index, expected, actual); + else if ((pattern & PATTERN_COPY) && + (diff & (PATTERN_COPY | PATTERN_OVERWRITE))) + pr_warn("%s: dstbuf[0x%x] not copied! Expected %02x, got %02x\n", + thread_name, index, expected, actual); + else if (diff & PATTERN_SRC) + pr_warn("%s: dstbuf[0x%x] was copied! Expected %02x, got %02x\n", + thread_name, index, expected, actual); + else + pr_warn("%s: dstbuf[0x%x] mismatch! Expected %02x, got %02x\n", + thread_name, index, expected, actual); +} + +static unsigned int dmatest_verify(u8 **bufs, unsigned int start, + unsigned int end, unsigned int counter, + u8 pattern, bool is_srcbuf) +{ + unsigned int i; + unsigned int error_count = 0; + u8 actual; + u8 expected; + u8 *buf; + unsigned int counter_orig = counter; + + for (; (buf = *bufs); bufs++) { + counter = counter_orig; + for (i = start; i < end; i++) { + actual = buf[i]; + expected = pattern | (~counter & PATTERN_COUNT_MASK); + if (actual != expected) { + if (error_count < 32) + dmatest_mismatch(actual, pattern, i, + counter, is_srcbuf); + error_count++; + } + counter++; + } + } + + if (error_count > 32) + pr_warn("%s: %u errors suppressed\n", + current->comm, error_count - 32); + + return error_count; +} + +static void dmatest_slave_tx_callback(void *completion) +{ + complete(completion); +} + +static void dmatest_slave_rx_callback(void *completion) +{ + complete(completion); +} + +/* Function for slave transfers + * Each thread requires 2 channels, one for transmit, and one for receive + */ +static int dmatest_slave_func(void *data) +{ + struct dmatest_slave_thread *thread = data; + struct dma_chan *tx_chan; + struct dma_chan *rx_chan; + const char *thread_name; + unsigned int src_off, dst_off, len; + unsigned int error_count; + unsigned int failed_tests = 0; + unsigned int total_tests = 0; + dma_cookie_t tx_cookie; + dma_cookie_t rx_cookie; + enum dma_status status; + enum dma_ctrl_flags flags; + int ret; + int src_cnt; + int dst_cnt; + int bd_cnt = XILINX_DMATEST_BD_CNT; + int i; + + ktime_t ktime, start, diff; + ktime_t filltime = 0; + ktime_t comparetime = 0; + s64 runtime = 0; + unsigned long long total_len = 0; + thread_name = current->comm; + ret = -ENOMEM; + + + /* Ensure that all previous reads are complete */ + smp_rmb(); + tx_chan = thread->tx_chan; + rx_chan = thread->rx_chan; + dst_cnt = bd_cnt; + src_cnt = bd_cnt; + + thread->srcs = kcalloc(src_cnt + 1, sizeof(u8 *), GFP_KERNEL); + if (!thread->srcs) + goto err_srcs; + for (i = 0; i < src_cnt; i++) { + thread->srcs[i] = kmalloc(test_buf_size, GFP_KERNEL); + if (!thread->srcs[i]) + goto err_srcbuf; + } + thread->srcs[i] = NULL; + + thread->dsts = kcalloc(dst_cnt + 1, sizeof(u8 *), GFP_KERNEL); + if (!thread->dsts) + goto err_dsts; + for (i = 0; i < dst_cnt; i++) { + thread->dsts[i] = kmalloc(test_buf_size, GFP_KERNEL); + if (!thread->dsts[i]) + goto err_dstbuf; + } + thread->dsts[i] = NULL; + + set_user_nice(current, 10); + + flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT; + + ktime = ktime_get(); + while (!kthread_should_stop() && + !(iterations && total_tests >= iterations)) { + struct dma_device *tx_dev = tx_chan->device; + struct dma_device *rx_dev = rx_chan->device; + struct dma_async_tx_descriptor *txd = NULL; + struct dma_async_tx_descriptor *rxd = NULL; + dma_addr_t dma_srcs[XILINX_DMATEST_BD_CNT]; + dma_addr_t dma_dsts[XILINX_DMATEST_BD_CNT]; + struct completion rx_cmp; + struct completion tx_cmp; + unsigned long rx_tmo = + msecs_to_jiffies(300000); /* RX takes longer */ + unsigned long tx_tmo = msecs_to_jiffies(30000); + u8 align = 0; + struct scatterlist tx_sg[XILINX_DMATEST_BD_CNT]; + struct scatterlist rx_sg[XILINX_DMATEST_BD_CNT]; + + total_tests++; + + /* honor larger alignment restrictions */ + align = tx_dev->copy_align; + if (rx_dev->copy_align > align) + align = rx_dev->copy_align; + + if (1 << align > test_buf_size) { + pr_err("%u-byte buffer too small for %d-byte alignment\n", + test_buf_size, 1 << align); + break; + } + + len = dmatest_random() % test_buf_size + 1; + len = (len >> align) << align; + if (!len) + len = 1 << align; + src_off = dmatest_random() % (test_buf_size - len + 1); + dst_off = dmatest_random() % (test_buf_size - len + 1); + + src_off = (src_off >> align) << align; + dst_off = (dst_off >> align) << align; + + start = ktime_get(); + dmatest_init_srcs(thread->srcs, src_off, len); + dmatest_init_dsts(thread->dsts, dst_off, len); + diff = ktime_sub(ktime_get(), start); + filltime = ktime_add(filltime, diff); + + for (i = 0; i < src_cnt; i++) { + u8 *buf = thread->srcs[i] + src_off; + + dma_srcs[i] = dma_map_single(tx_dev->dev, buf, len, + DMA_TO_DEVICE); + } + + for (i = 0; i < dst_cnt; i++) { + dma_dsts[i] = dma_map_single(rx_dev->dev, + thread->dsts[i], + test_buf_size, + DMA_BIDIRECTIONAL); + } + + sg_init_table(tx_sg, bd_cnt); + sg_init_table(rx_sg, bd_cnt); + + for (i = 0; i < bd_cnt; i++) { + sg_dma_address(&tx_sg[i]) = dma_srcs[i]; + sg_dma_address(&rx_sg[i]) = dma_dsts[i] + dst_off; + + sg_dma_len(&tx_sg[i]) = len; + sg_dma_len(&rx_sg[i]) = len; + total_len += len; + } + + rxd = rx_dev->device_prep_slave_sg(rx_chan, rx_sg, bd_cnt, + DMA_DEV_TO_MEM, flags, NULL); + + txd = tx_dev->device_prep_slave_sg(tx_chan, tx_sg, bd_cnt, + DMA_MEM_TO_DEV, flags, NULL); + + if (!rxd || !txd) { + for (i = 0; i < src_cnt; i++) + dma_unmap_single(tx_dev->dev, dma_srcs[i], len, + DMA_TO_DEVICE); + for (i = 0; i < dst_cnt; i++) + dma_unmap_single(rx_dev->dev, dma_dsts[i], + test_buf_size, + DMA_BIDIRECTIONAL); + pr_warn("%s: #%u: prep error with src_off=0x%x ", + thread_name, total_tests - 1, src_off); + pr_warn("dst_off=0x%x len=0x%x\n", + dst_off, len); + msleep(100); + failed_tests++; + continue; + } + + init_completion(&rx_cmp); + rxd->callback = dmatest_slave_rx_callback; + rxd->callback_param = &rx_cmp; + rx_cookie = rxd->tx_submit(rxd); + + init_completion(&tx_cmp); + txd->callback = dmatest_slave_tx_callback; + txd->callback_param = &tx_cmp; + tx_cookie = txd->tx_submit(txd); + + if (dma_submit_error(rx_cookie) || + dma_submit_error(tx_cookie)) { + pr_warn("%s: #%u: submit error %d/%d with src_off=0x%x ", + thread_name, total_tests - 1, + rx_cookie, tx_cookie, src_off); + pr_warn("dst_off=0x%x len=0x%x\n", + dst_off, len); + msleep(100); + failed_tests++; + continue; + } + dma_async_issue_pending(rx_chan); + dma_async_issue_pending(tx_chan); + + tx_tmo = wait_for_completion_timeout(&tx_cmp, tx_tmo); + + status = dma_async_is_tx_complete(tx_chan, tx_cookie, + NULL, NULL); + + if (tx_tmo == 0) { + pr_warn("%s: #%u: tx test timed out\n", + thread_name, total_tests - 1); + failed_tests++; + continue; + } else if (status != DMA_COMPLETE) { + pr_warn("%s: #%u: tx got completion callback, ", + thread_name, total_tests - 1); + pr_warn("but status is \'%s\'\n", + status == DMA_ERROR ? "error" : + "in progress"); + failed_tests++; + continue; + } + + rx_tmo = wait_for_completion_timeout(&rx_cmp, rx_tmo); + status = dma_async_is_tx_complete(rx_chan, rx_cookie, + NULL, NULL); + + if (rx_tmo == 0) { + pr_warn("%s: #%u: rx test timed out\n", + thread_name, total_tests - 1); + failed_tests++; + continue; + } else if (status != DMA_COMPLETE) { + pr_warn("%s: #%u: rx got completion callback, ", + thread_name, total_tests - 1); + pr_warn("but status is \'%s\'\n", + status == DMA_ERROR ? "error" : + "in progress"); + failed_tests++; + continue; + } + + /* Unmap by myself */ + for (i = 0; i < dst_cnt; i++) + dma_unmap_single(rx_dev->dev, dma_dsts[i], + test_buf_size, DMA_BIDIRECTIONAL); + + error_count = 0; + start = ktime_get(); + pr_debug("%s: verifying source buffer...\n", thread_name); + error_count += dmatest_verify(thread->srcs, 0, src_off, + 0, PATTERN_SRC, true); + error_count += dmatest_verify(thread->srcs, src_off, + src_off + len, src_off, + PATTERN_SRC | PATTERN_COPY, true); + error_count += dmatest_verify(thread->srcs, src_off + len, + test_buf_size, src_off + len, + PATTERN_SRC, true); + + pr_debug("%s: verifying dest buffer...\n", + thread->task->comm); + error_count += dmatest_verify(thread->dsts, 0, dst_off, + 0, PATTERN_DST, false); + error_count += dmatest_verify(thread->dsts, dst_off, + dst_off + len, src_off, + PATTERN_SRC | PATTERN_COPY, false); + error_count += dmatest_verify(thread->dsts, dst_off + len, + test_buf_size, dst_off + len, + PATTERN_DST, false); + diff = ktime_sub(ktime_get(), start); + comparetime = ktime_add(comparetime, diff); + + if (error_count) { + pr_warn("%s: #%u: %u errors with ", + thread_name, total_tests - 1, error_count); + pr_warn("src_off=0x%x dst_off=0x%x len=0x%x\n", + src_off, dst_off, len); + failed_tests++; + } else { + pr_debug("%s: #%u: No errors with ", + thread_name, total_tests - 1); + pr_debug("src_off=0x%x dst_off=0x%x len=0x%x\n", + src_off, dst_off, len); + } + } + + ktime = ktime_sub(ktime_get(), ktime); + ktime = ktime_sub(ktime, comparetime); + ktime = ktime_sub(ktime, filltime); + runtime = ktime_to_us(ktime); + + ret = 0; + for (i = 0; thread->dsts[i]; i++) + kfree(thread->dsts[i]); +err_dstbuf: + kfree(thread->dsts); +err_dsts: + for (i = 0; thread->srcs[i]; i++) + kfree(thread->srcs[i]); +err_srcbuf: + kfree(thread->srcs); +err_srcs: + pr_notice("%s: terminating after %u tests, %u failures %llu iops %llu KB/s (status %d)\n", + thread_name, total_tests, failed_tests, + dmatest_persec(runtime, total_tests), + dmatest_KBs(runtime, total_len), ret); + + thread->done = true; + wake_up(&thread_wait); + + return ret; +} + +static void dmatest_cleanup_channel(struct dmatest_chan *dtc) +{ + struct dmatest_slave_thread *thread; + struct dmatest_slave_thread *_thread; + int ret; + + list_for_each_entry_safe(thread, _thread, &dtc->threads, node) { + ret = kthread_stop(thread->task); + pr_debug("dmatest: thread %s exited with status %d\n", + thread->task->comm, ret); + list_del(&thread->node); + put_task_struct(thread->task); + kfree(thread); + } + kfree(dtc); +} + +static int dmatest_add_slave_threads(struct dmatest_chan *tx_dtc, + struct dmatest_chan *rx_dtc) +{ + struct dmatest_slave_thread *thread; + struct dma_chan *tx_chan = tx_dtc->chan; + struct dma_chan *rx_chan = rx_dtc->chan; + int ret; + + thread = kzalloc(sizeof(struct dmatest_slave_thread), GFP_KERNEL); + if (!thread) { + pr_warn("dmatest: No memory for slave thread %s-%s\n", + dma_chan_name(tx_chan), dma_chan_name(rx_chan)); + } + + thread->tx_chan = tx_chan; + thread->rx_chan = rx_chan; + thread->type = (enum dma_transaction_type)DMA_SLAVE; + + /* Ensure that all previous writes are complete */ + smp_wmb(); + thread->task = kthread_run(dmatest_slave_func, thread, "%s-%s", + dma_chan_name(tx_chan), + dma_chan_name(rx_chan)); + ret = PTR_ERR(thread->task); + if (IS_ERR(thread->task)) { + pr_warn("dmatest: Failed to run thread %s-%s\n", + dma_chan_name(tx_chan), dma_chan_name(rx_chan)); + kfree(thread); + return ret; + } + + /* srcbuf and dstbuf are allocated by the thread itself */ + get_task_struct(thread->task); + list_add_tail(&thread->node, &tx_dtc->threads); + + /* Added one thread with 2 channels */ + return 1; +} + +static int dmatest_add_slave_channels(struct dma_chan *tx_chan, + struct dma_chan *rx_chan) +{ + struct dmatest_chan *tx_dtc; + struct dmatest_chan *rx_dtc; + unsigned int thread_count = 0; + + tx_dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL); + if (!tx_dtc) { + pr_warn("dmatest: No memory for tx %s\n", + dma_chan_name(tx_chan)); + return -ENOMEM; + } + + rx_dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL); + if (!rx_dtc) { + pr_warn("dmatest: No memory for rx %s\n", + dma_chan_name(rx_chan)); + return -ENOMEM; + } + + tx_dtc->chan = tx_chan; + rx_dtc->chan = rx_chan; + INIT_LIST_HEAD(&tx_dtc->threads); + INIT_LIST_HEAD(&rx_dtc->threads); + + dmatest_add_slave_threads(tx_dtc, rx_dtc); + thread_count += 1; + + pr_info("dmatest: Started %u threads using %s %s\n", + thread_count, dma_chan_name(tx_chan), dma_chan_name(rx_chan)); + + list_add_tail(&tx_dtc->node, &dmatest_channels); + list_add_tail(&rx_dtc->node, &dmatest_channels); + nr_channels += 2; + + if (iterations) + wait_event(thread_wait, !is_threaded_test_run(tx_dtc, rx_dtc)); + + return 0; +} + +static int xilinx_axidmatest_probe(struct platform_device *pdev) +{ + struct dma_chan *chan, *rx_chan; + int err; + + chan = dma_request_chan(&pdev->dev, "axidma0"); + if (IS_ERR(chan)) { + err = PTR_ERR(chan); + if (err != -EPROBE_DEFER) + pr_err("xilinx_dmatest: No Tx channel\n"); + return err; + } + + rx_chan = dma_request_chan(&pdev->dev, "axidma1"); + if (IS_ERR(rx_chan)) { + err = PTR_ERR(rx_chan); + if (err != -EPROBE_DEFER) + pr_err("xilinx_dmatest: No Rx channel\n"); + goto free_tx; + } + + err = dmatest_add_slave_channels(chan, rx_chan); + if (err) { + pr_err("xilinx_dmatest: Unable to add channels\n"); + goto free_rx; + } + + return 0; + +free_rx: + dma_release_channel(rx_chan); +free_tx: + dma_release_channel(chan); + + return err; +} + +static int xilinx_axidmatest_remove(struct platform_device *pdev) +{ + struct dmatest_chan *dtc, *_dtc; + struct dma_chan *chan; + + list_for_each_entry_safe(dtc, _dtc, &dmatest_channels, node) { + list_del(&dtc->node); + chan = dtc->chan; + dmatest_cleanup_channel(dtc); + pr_info("xilinx_dmatest: dropped channel %s\n", + dma_chan_name(chan)); + dmaengine_terminate_all(chan); + dma_release_channel(chan); + } + return 0; +} + +static const struct of_device_id xilinx_axidmatest_of_ids[] = { + { .compatible = "xlnx,axi-dma-test-1.00.a",}, + {} +}; + +static struct platform_driver xilinx_axidmatest_driver = { + .driver = { + .name = "xilinx_axidmatest", + .of_match_table = xilinx_axidmatest_of_ids, + }, + .probe = xilinx_axidmatest_probe, + .remove = xilinx_axidmatest_remove, +}; + +static int __init axidma_init(void) +{ + return platform_driver_register(&xilinx_axidmatest_driver); +} +late_initcall(axidma_init); + +static void __exit axidma_exit(void) +{ + platform_driver_unregister(&xilinx_axidmatest_driver); +} +module_exit(axidma_exit) + +MODULE_AUTHOR("Xilinx, Inc."); +MODULE_DESCRIPTION("Xilinx AXI DMA Test Client"); +MODULE_LICENSE("GPL"); --- linux-xilinx-6.8.0.orig/drivers/dma/xilinx/vdmatest.c +++ linux-xilinx-6.8.0/drivers/dma/xilinx/vdmatest.c @@ -0,0 +1,666 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * XILINX VDMA Engine test client driver + * + * Copyright (C) 2010-2014 Xilinx, Inc. All rights reserved. + * + * Based on Atmel DMA Test Client + * + * Description: + * This is a simple Xilinx VDMA test client for AXI VDMA driver. + * This test assumes both the channels of VDMA are enabled in the + * hardware design and configured in back-to-back connection. Test + * starts by pumping the data onto one channel (MM2S) and then + * compares the data that is received on the other channel (S2MM). + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static unsigned int test_buf_size = 64; +module_param(test_buf_size, uint, 0444); +MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer"); + +static unsigned int iterations = 1; +module_param(iterations, uint, 0444); +MODULE_PARM_DESC(iterations, + "Iterations before stopping test (default: infinite)"); + +static unsigned int hsize = 64; +module_param(hsize, uint, 0444); +MODULE_PARM_DESC(hsize, "Horizontal size in bytes"); + +static unsigned int vsize = 32; +module_param(vsize, uint, 0444); +MODULE_PARM_DESC(vsize, "Vertical size in bytes"); + +/* + * Initialization patterns. All bytes in the source buffer has bit 7 + * set, all bytes in the destination buffer has bit 7 cleared. + * + * Bit 6 is set for all bytes which are to be copied by the DMA + * engine. Bit 5 is set for all bytes which are to be overwritten by + * the DMA engine. + * + * The remaining bits are the inverse of a counter which increments by + * one for each byte address. + */ +#define PATTERN_SRC 0x80 +#define PATTERN_DST 0x00 +#define PATTERN_COPY 0x40 +#define PATTERN_OVERWRITE 0x20 +#define PATTERN_COUNT_MASK 0x1f + +/* Maximum number of frame buffers */ +#define MAX_NUM_FRAMES 32 + +/** + * struct vdmatest_slave_thread - VDMA test thread + * @node: Thread node + * @task: Task structure pointer + * @tx_chan: Tx channel pointer + * @rx_chan: Rx Channel pointer + * @srcs: Source buffer + * @dsts: Destination buffer + * @type: DMA transaction type + */ +struct xilinx_vdmatest_slave_thread { + struct list_head node; + struct task_struct *task; + struct dma_chan *tx_chan; + struct dma_chan *rx_chan; + u8 **srcs; + u8 **dsts; + enum dma_transaction_type type; + bool done; +}; + +/** + * struct vdmatest_chan - VDMA Test channel + * @node: Channel node + * @chan: DMA channel pointer + * @threads: List of VDMA test threads + */ +struct xilinx_vdmatest_chan { + struct list_head node; + struct dma_chan *chan; + struct list_head threads; +}; + +/* Global variables */ +static DECLARE_WAIT_QUEUE_HEAD(thread_wait); +static LIST_HEAD(xilinx_vdmatest_channels); +static unsigned int nr_channels; +static unsigned int frm_cnt; +static dma_addr_t dma_srcs[MAX_NUM_FRAMES]; +static dma_addr_t dma_dsts[MAX_NUM_FRAMES]; +static struct dma_interleaved_template xt; + +static bool is_threaded_test_run(struct xilinx_vdmatest_chan *tx_dtc, + struct xilinx_vdmatest_chan *rx_dtc) +{ + struct xilinx_vdmatest_slave_thread *thread; + int ret = false; + + list_for_each_entry(thread, &tx_dtc->threads, node) { + if (!thread->done) + ret = true; + } + + list_for_each_entry(thread, &rx_dtc->threads, node) { + if (!thread->done) + ret = true; + } + return ret; +} + +static void xilinx_vdmatest_init_srcs(u8 **bufs, unsigned int start, + unsigned int len) +{ + unsigned int i; + u8 *buf; + + for (; (buf = *bufs); bufs++) { + for (i = 0; i < start; i++) + buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK); + for (; i < start + len; i++) + buf[i] = PATTERN_SRC | PATTERN_COPY + | (~i & PATTERN_COUNT_MASK); + for (; i < test_buf_size; i++) + buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK); + buf++; + } +} + +static void xilinx_vdmatest_init_dsts(u8 **bufs, unsigned int start, + unsigned int len) +{ + unsigned int i; + u8 *buf; + + for (; (buf = *bufs); bufs++) { + for (i = 0; i < start; i++) + buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK); + for (; i < start + len; i++) + buf[i] = PATTERN_DST | PATTERN_OVERWRITE + | (~i & PATTERN_COUNT_MASK); + for (; i < test_buf_size; i++) + buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK); + } +} + +static void xilinx_vdmatest_mismatch(u8 actual, u8 pattern, unsigned int index, + unsigned int counter, bool is_srcbuf) +{ + u8 diff = actual ^ pattern; + u8 expected = pattern | (~counter & PATTERN_COUNT_MASK); + const char *thread_name = current->comm; + + if (is_srcbuf) + pr_warn( + "%s: srcbuf[0x%x] overwritten! Expected %02x, got %02x\n", + thread_name, index, expected, actual); + else if ((pattern & PATTERN_COPY) + && (diff & (PATTERN_COPY | PATTERN_OVERWRITE))) + pr_warn( + "%s: dstbuf[0x%x] not copied! Expected %02x, got %02x\n", + thread_name, index, expected, actual); + else if (diff & PATTERN_SRC) + pr_warn( + "%s: dstbuf[0x%x] was copied! Expected %02x, got %02x\n", + thread_name, index, expected, actual); + else + pr_warn( + "%s: dstbuf[0x%x] mismatch! Expected %02x, got %02x\n", + thread_name, index, expected, actual); +} + +static unsigned int xilinx_vdmatest_verify(u8 **bufs, unsigned int start, + unsigned int end, unsigned int counter, u8 pattern, + bool is_srcbuf) +{ + unsigned int i, error_count = 0; + u8 actual, expected, *buf; + unsigned int counter_orig = counter; + + for (; (buf = *bufs); bufs++) { + counter = counter_orig; + for (i = start; i < end; i++) { + actual = buf[i]; + expected = pattern | (~counter & PATTERN_COUNT_MASK); + if (actual != expected) { + if (error_count < 32) + xilinx_vdmatest_mismatch(actual, + pattern, i, + counter, is_srcbuf); + error_count++; + } + counter++; + } + } + + if (error_count > 32) + pr_warn("%s: %u errors suppressed\n", + current->comm, error_count - 32); + + return error_count; +} + +static void xilinx_vdmatest_slave_tx_callback(void *completion) +{ + pr_debug("Got tx callback\n"); + complete(completion); +} + +static void xilinx_vdmatest_slave_rx_callback(void *completion) +{ + pr_debug("Got rx callback\n"); + complete(completion); +} + +/* + * Function for slave transfers + * Each thread requires 2 channels, one for transmit, and one for receive + */ +static int xilinx_vdmatest_slave_func(void *data) +{ + struct xilinx_vdmatest_slave_thread *thread = data; + struct dma_chan *tx_chan, *rx_chan; + const char *thread_name; + unsigned int len, error_count; + unsigned int failed_tests = 0, total_tests = 0; + dma_cookie_t tx_cookie = 0, rx_cookie = 0; + enum dma_status status; + enum dma_ctrl_flags flags; + int ret = -ENOMEM, i; + struct xilinx_vdma_config config; + + thread_name = current->comm; + + /* Limit testing scope here */ + test_buf_size = hsize * vsize; + + /* This barrier ensures 'thread' is initialized and + * we get valid DMA channels + */ + smp_rmb(); + tx_chan = thread->tx_chan; + rx_chan = thread->rx_chan; + + thread->srcs = kcalloc(frm_cnt+1, sizeof(u8 *), GFP_KERNEL); + if (!thread->srcs) + goto err_srcs; + for (i = 0; i < frm_cnt; i++) { + thread->srcs[i] = kmalloc(test_buf_size, GFP_KERNEL); + if (!thread->srcs[i]) + goto err_srcbuf; + } + + thread->dsts = kcalloc(frm_cnt+1, sizeof(u8 *), GFP_KERNEL); + if (!thread->dsts) + goto err_dsts; + for (i = 0; i < frm_cnt; i++) { + thread->dsts[i] = kmalloc(test_buf_size, GFP_KERNEL); + if (!thread->dsts[i]) + goto err_dstbuf; + } + + set_user_nice(current, 10); + + flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT; + + while (!kthread_should_stop() + && !(iterations && total_tests >= iterations)) { + struct dma_device *tx_dev = tx_chan->device; + struct dma_device *rx_dev = rx_chan->device; + struct dma_async_tx_descriptor *txd = NULL; + struct dma_async_tx_descriptor *rxd = NULL; + struct completion rx_cmp, tx_cmp; + unsigned long rx_tmo = + msecs_to_jiffies(30000); /* RX takes longer */ + unsigned long tx_tmo = msecs_to_jiffies(30000); + u8 align = 0; + + total_tests++; + + /* honor larger alignment restrictions */ + align = tx_dev->copy_align; + if (rx_dev->copy_align > align) + align = rx_dev->copy_align; + + if (1 << align > test_buf_size) { + pr_err("%u-byte buffer too small for %d-byte alignment\n", + test_buf_size, 1 << align); + break; + } + + len = test_buf_size; + xilinx_vdmatest_init_srcs(thread->srcs, 0, len); + xilinx_vdmatest_init_dsts(thread->dsts, 0, len); + + /* Zero out configuration */ + memset(&config, 0, sizeof(struct xilinx_vdma_config)); + + /* Set up hardware configuration information */ + config.frm_cnt_en = 1; + config.coalesc = frm_cnt * 10; + config.park = 1; + xilinx_vdma_channel_set_config(tx_chan, &config); + + xilinx_vdma_channel_set_config(rx_chan, &config); + + for (i = 0; i < frm_cnt; i++) { + dma_dsts[i] = dma_map_single(rx_dev->dev, + thread->dsts[i], + test_buf_size, + DMA_FROM_DEVICE); + + if (dma_mapping_error(rx_dev->dev, dma_dsts[i])) { + failed_tests++; + continue; + } + xt.dst_start = dma_dsts[i]; + xt.dir = DMA_DEV_TO_MEM; + xt.numf = vsize; + xt.sgl[0].size = hsize; + xt.sgl[0].icg = 0; + xt.frame_size = 1; + rxd = rx_dev->device_prep_interleaved_dma(rx_chan, + &xt, flags); + rx_cookie = rxd->tx_submit(rxd); + } + + for (i = 0; i < frm_cnt; i++) { + u8 *buf = thread->srcs[i]; + + dma_srcs[i] = dma_map_single(tx_dev->dev, buf, len, + DMA_TO_DEVICE); + + if (dma_mapping_error(tx_dev->dev, dma_srcs[i])) { + failed_tests++; + continue; + } + xt.src_start = dma_srcs[i]; + xt.dir = DMA_MEM_TO_DEV; + xt.numf = vsize; + xt.sgl[0].size = hsize; + xt.sgl[0].icg = 0; + xt.frame_size = 1; + txd = tx_dev->device_prep_interleaved_dma(tx_chan, + &xt, flags); + tx_cookie = txd->tx_submit(txd); + } + + if (!rxd || !txd) { + for (i = 0; i < frm_cnt; i++) + dma_unmap_single(tx_dev->dev, dma_srcs[i], len, + DMA_TO_DEVICE); + for (i = 0; i < frm_cnt; i++) + dma_unmap_single(rx_dev->dev, dma_dsts[i], + test_buf_size, + DMA_FROM_DEVICE); + pr_warn("%s: #%u: prep error with len=0x%x ", + thread_name, total_tests - 1, len); + msleep(100); + failed_tests++; + continue; + } + + init_completion(&rx_cmp); + rxd->callback = xilinx_vdmatest_slave_rx_callback; + rxd->callback_param = &rx_cmp; + + init_completion(&tx_cmp); + txd->callback = xilinx_vdmatest_slave_tx_callback; + txd->callback_param = &tx_cmp; + + if (dma_submit_error(rx_cookie) || + dma_submit_error(tx_cookie)) { + pr_warn("%s: #%u: submit error %d/%d with len=0x%x ", + thread_name, total_tests - 1, + rx_cookie, tx_cookie, len); + msleep(100); + failed_tests++; + continue; + } + dma_async_issue_pending(tx_chan); + dma_async_issue_pending(rx_chan); + + tx_tmo = wait_for_completion_timeout(&tx_cmp, tx_tmo); + + status = dma_async_is_tx_complete(tx_chan, tx_cookie, + NULL, NULL); + + if (tx_tmo == 0) { + pr_warn("%s: #%u: tx test timed out\n", + thread_name, total_tests - 1); + failed_tests++; + continue; + } else if (status != DMA_COMPLETE) { + pr_warn( + "%s: #%u: tx got completion callback, ", + thread_name, total_tests - 1); + pr_warn("but status is \'%s\'\n", + status == DMA_ERROR ? "error" : + "in progress"); + failed_tests++; + continue; + } + + rx_tmo = wait_for_completion_timeout(&rx_cmp, rx_tmo); + status = dma_async_is_tx_complete(rx_chan, rx_cookie, + NULL, NULL); + + if (rx_tmo == 0) { + pr_warn("%s: #%u: rx test timed out\n", + thread_name, total_tests - 1); + failed_tests++; + continue; + } else if (status != DMA_COMPLETE) { + pr_warn( + "%s: #%u: rx got completion callback, ", + thread_name, total_tests - 1); + pr_warn("but status is \'%s\'\n", + status == DMA_ERROR ? "error" : + "in progress"); + failed_tests++; + continue; + } + + /* Unmap by myself */ + for (i = 0; i < frm_cnt; i++) + dma_unmap_single(rx_dev->dev, dma_dsts[i], + test_buf_size, DMA_FROM_DEVICE); + + error_count = 0; + + pr_debug("%s: verifying source buffer...\n", thread_name); + error_count += xilinx_vdmatest_verify(thread->srcs, 0, 0, + 0, PATTERN_SRC, true); + error_count += xilinx_vdmatest_verify(thread->srcs, 0, + len, 0, PATTERN_SRC | PATTERN_COPY, true); + error_count += xilinx_vdmatest_verify(thread->srcs, len, + test_buf_size, len, PATTERN_SRC, true); + + pr_debug("%s: verifying dest buffer...\n", + thread->task->comm); + error_count += xilinx_vdmatest_verify(thread->dsts, 0, 0, + 0, PATTERN_DST, false); + error_count += xilinx_vdmatest_verify(thread->dsts, 0, + len, 0, PATTERN_SRC | PATTERN_COPY, false); + error_count += xilinx_vdmatest_verify(thread->dsts, len, + test_buf_size, len, PATTERN_DST, false); + + if (error_count) { + pr_warn("%s: #%u: %u errors with len=0x%x\n", + thread_name, total_tests - 1, error_count, len); + failed_tests++; + } else { + pr_debug("%s: #%u: No errors with len=0x%x\n", + thread_name, total_tests - 1, len); + } + } + + ret = 0; + for (i = 0; thread->dsts[i]; i++) + kfree(thread->dsts[i]); +err_dstbuf: + kfree(thread->dsts); +err_dsts: + for (i = 0; thread->srcs[i]; i++) + kfree(thread->srcs[i]); +err_srcbuf: + kfree(thread->srcs); +err_srcs: + pr_notice("%s: terminating after %u tests, %u failures (status %d)\n", + thread_name, total_tests, failed_tests, ret); + + thread->done = true; + wake_up(&thread_wait); + + return ret; +} + +static void xilinx_vdmatest_cleanup_channel(struct xilinx_vdmatest_chan *dtc) +{ + struct xilinx_vdmatest_slave_thread *thread, *_thread; + int ret; + + list_for_each_entry_safe(thread, _thread, + &dtc->threads, node) { + ret = kthread_stop(thread->task); + pr_info("xilinx_vdmatest: thread %s exited with status %d\n", + thread->task->comm, ret); + list_del(&thread->node); + put_task_struct(thread->task); + kfree(thread); + } + kfree(dtc); +} + +static int +xilinx_vdmatest_add_slave_threads(struct xilinx_vdmatest_chan *tx_dtc, + struct xilinx_vdmatest_chan *rx_dtc) +{ + struct xilinx_vdmatest_slave_thread *thread; + struct dma_chan *tx_chan = tx_dtc->chan; + struct dma_chan *rx_chan = rx_dtc->chan; + + thread = kzalloc(sizeof(struct xilinx_vdmatest_slave_thread), + GFP_KERNEL); + if (!thread) + pr_warn("xilinx_vdmatest: No memory for slave thread %s-%s\n", + dma_chan_name(tx_chan), dma_chan_name(rx_chan)); + + thread->tx_chan = tx_chan; + thread->rx_chan = rx_chan; + thread->type = (enum dma_transaction_type)DMA_SLAVE; + + /* This barrier ensures the DMA channels in the 'thread' + * are initialized + */ + smp_wmb(); + thread->task = kthread_run(xilinx_vdmatest_slave_func, thread, "%s-%s", + dma_chan_name(tx_chan), dma_chan_name(rx_chan)); + if (IS_ERR(thread->task)) { + pr_warn("xilinx_vdmatest: Failed to run thread %s-%s\n", + dma_chan_name(tx_chan), dma_chan_name(rx_chan)); + kfree(thread); + return PTR_ERR(thread->task); + } + + get_task_struct(thread->task); + list_add_tail(&thread->node, &tx_dtc->threads); + + /* Added one thread with 2 channels */ + return 1; +} + +static int xilinx_vdmatest_add_slave_channels(struct dma_chan *tx_chan, + struct dma_chan *rx_chan) +{ + struct xilinx_vdmatest_chan *tx_dtc, *rx_dtc; + unsigned int thread_count = 0; + + tx_dtc = kmalloc(sizeof(struct xilinx_vdmatest_chan), GFP_KERNEL); + if (!tx_dtc) + return -ENOMEM; + + rx_dtc = kmalloc(sizeof(struct xilinx_vdmatest_chan), GFP_KERNEL); + if (!rx_dtc) + return -ENOMEM; + + tx_dtc->chan = tx_chan; + rx_dtc->chan = rx_chan; + INIT_LIST_HEAD(&tx_dtc->threads); + INIT_LIST_HEAD(&rx_dtc->threads); + + xilinx_vdmatest_add_slave_threads(tx_dtc, rx_dtc); + thread_count += 1; + + pr_info("xilinx_vdmatest: Started %u threads using %s %s\n", + thread_count, dma_chan_name(tx_chan), dma_chan_name(rx_chan)); + + list_add_tail(&tx_dtc->node, &xilinx_vdmatest_channels); + list_add_tail(&rx_dtc->node, &xilinx_vdmatest_channels); + nr_channels += 2; + + if (iterations) + wait_event(thread_wait, !is_threaded_test_run(tx_dtc, rx_dtc)); + + return 0; +} + +static int xilinx_vdmatest_probe(struct platform_device *pdev) +{ + struct dma_chan *chan, *rx_chan; + int err; + + err = of_property_read_u32(pdev->dev.of_node, + "xlnx,num-fstores", &frm_cnt); + if (err < 0) { + pr_err("xilinx_vdmatest: missing xlnx,num-fstores property\n"); + return err; + } + + chan = dma_request_chan(&pdev->dev, "vdma0"); + if (IS_ERR(chan)) { + err = PTR_ERR(chan); + if (err != -EPROBE_DEFER) + pr_err("xilinx_vdmatest: No Tx channel\n"); + return err; + } + + rx_chan = dma_request_chan(&pdev->dev, "vdma1"); + if (IS_ERR(rx_chan)) { + err = PTR_ERR(rx_chan); + if (err != -EPROBE_DEFER) + pr_err("xilinx_vdmatest: No Rx channel\n"); + goto free_tx; + } + + err = xilinx_vdmatest_add_slave_channels(chan, rx_chan); + if (err) { + pr_err("xilinx_vdmatest: Unable to add channels\n"); + goto free_rx; + } + return 0; + +free_rx: + dma_release_channel(rx_chan); +free_tx: + dma_release_channel(chan); + + return err; +} + +static int xilinx_vdmatest_remove(struct platform_device *pdev) +{ + struct xilinx_vdmatest_chan *dtc, *_dtc; + struct dma_chan *chan; + + list_for_each_entry_safe(dtc, _dtc, &xilinx_vdmatest_channels, node) { + list_del(&dtc->node); + chan = dtc->chan; + xilinx_vdmatest_cleanup_channel(dtc); + pr_info("xilinx_vdmatest: dropped channel %s\n", + dma_chan_name(chan)); + dmaengine_terminate_async(chan); + dma_release_channel(chan); + } + return 0; +} + +static const struct of_device_id xilinx_vdmatest_of_ids[] = { + { .compatible = "xlnx,axi-vdma-test-1.00.a",}, + {} +}; + +static struct platform_driver xilinx_vdmatest_driver = { + .driver = { + .name = "xilinx_vdmatest", + .owner = THIS_MODULE, + .of_match_table = xilinx_vdmatest_of_ids, + }, + .probe = xilinx_vdmatest_probe, + .remove = xilinx_vdmatest_remove, +}; + +module_platform_driver(xilinx_vdmatest_driver); + +MODULE_AUTHOR("Xilinx, Inc."); +MODULE_DESCRIPTION("Xilinx AXI VDMA Test Client"); +MODULE_LICENSE("GPL"); --- linux-xilinx-6.8.0.orig/drivers/dma/xilinx/xdma-regs.h +++ linux-xilinx-6.8.0/drivers/dma/xilinx/xdma-regs.h @@ -117,6 +117,9 @@ CHAN_CTRL_IE_WRITE_ERROR | \ CHAN_CTRL_IE_DESC_ERROR) +/* bits of the channel status register */ +#define XDMA_CHAN_STATUS_BUSY BIT(0) + #define XDMA_CHAN_STATUS_MASK CHAN_CTRL_START #define XDMA_CHAN_ERROR_MASK (CHAN_CTRL_IE_DESC_ALIGN_MISMATCH | \ --- linux-xilinx-6.8.0.orig/drivers/dma/xilinx/xdma.c +++ linux-xilinx-6.8.0/drivers/dma/xilinx/xdma.c @@ -71,6 +71,8 @@ enum dma_transfer_direction dir; struct dma_slave_config cfg; u32 irq; + struct completion last_interrupt; + bool stop_requested; }; /** @@ -376,6 +378,8 @@ return ret; xchan->busy = true; + xchan->stop_requested = false; + reinit_completion(&xchan->last_interrupt); return 0; } @@ -387,7 +391,6 @@ static int xdma_xfer_stop(struct xdma_chan *xchan) { int ret; - u32 val; struct xdma_device *xdev = xchan->xdev_hdl; /* clear run stop bit to prevent any further auto-triggering */ @@ -395,13 +398,7 @@ CHAN_CTRL_RUN_STOP); if (ret) return ret; - - /* Clear the channel status register */ - ret = regmap_read(xdev->rmap, xchan->base + XDMA_CHAN_STATUS_RC, &val); - if (ret) - return ret; - - return 0; + return ret; } /** @@ -474,6 +471,8 @@ xchan->xdev_hdl = xdev; xchan->base = base + i * XDMA_CHAN_STRIDE; xchan->dir = dir; + xchan->stop_requested = false; + init_completion(&xchan->last_interrupt); ret = xdma_channel_init(xchan); if (ret) @@ -521,6 +520,7 @@ spin_lock_irqsave(&xdma_chan->vchan.lock, flags); xdma_chan->busy = false; + xdma_chan->stop_requested = true; vd = vchan_next_desc(&xdma_chan->vchan); if (vd) { list_del(&vd->node); @@ -542,17 +542,26 @@ static void xdma_synchronize(struct dma_chan *chan) { struct xdma_chan *xdma_chan = to_xdma_chan(chan); + struct xdma_device *xdev = xdma_chan->xdev_hdl; + int st = 0; + + /* If the engine continues running, wait for the last interrupt */ + regmap_read(xdev->rmap, xdma_chan->base + XDMA_CHAN_STATUS, &st); + if (st & XDMA_CHAN_STATUS_BUSY) + wait_for_completion_timeout(&xdma_chan->last_interrupt, msecs_to_jiffies(1000)); vchan_synchronize(&xdma_chan->vchan); } /** - * xdma_fill_descs - Fill hardware descriptors with contiguous memory block addresses - * @sw_desc: tx descriptor state container - * @src_addr: Value for a ->src_addr field of a first descriptor - * @dst_addr: Value for a ->dst_addr field of a first descriptor - * @size: Total size of a contiguous memory block - * @filled_descs_num: Number of filled hardware descriptors for corresponding sw_desc + * xdma_fill_descs() - Fill hardware descriptors for one contiguous memory chunk. + * More than one descriptor will be used if the size is bigger + * than XDMA_DESC_BLEN_MAX. + * @sw_desc: Descriptor container + * @src_addr: First value for the ->src_addr field + * @dst_addr: First value for the ->dst_addr field + * @size: Size of the contiguous memory block + * @filled_descs_num: Index of the first descriptor to take care of in @sw_desc */ static inline u32 xdma_fill_descs(struct xdma_desc *sw_desc, u64 src_addr, u64 dst_addr, u32 size, u32 filled_descs_num) @@ -704,7 +713,7 @@ desc_num = 0; for (i = 0; i < periods; i++) { desc_num += xdma_fill_descs(sw_desc, *src, *dst, period_size, desc_num); - addr += i * period_size; + addr += period_size; } tx_desc = vchan_tx_prep(&xdma_chan->vchan, &sw_desc->vdesc, flags); @@ -878,6 +887,9 @@ spin_lock(&xchan->vchan.lock); + if (xchan->stop_requested) + complete(&xchan->last_interrupt); + /* get submitted request */ vd = vchan_next_desc(&xchan->vchan); if (!vd) --- linux-xilinx-6.8.0.orig/drivers/dma/xilinx/xilinx_dpdma.c +++ linux-xilinx-6.8.0/drivers/dma/xilinx/xilinx_dpdma.c @@ -214,7 +214,8 @@ * @running: true if the channel is running * @first_frame: flag for the first frame of stream * @video_group: flag if multi-channel operation is needed for video channels - * @lock: lock to access struct xilinx_dpdma_chan + * @lock: lock to access struct xilinx_dpdma_chan. Must be taken before + * @vchan.lock, if both are to be held. * @desc_pool: descriptor allocation pool * @err_task: error IRQ bottom half handler * @desc: References to descriptors being processed @@ -670,6 +671,84 @@ } /** + * xilinx_dpdma_chan_prep_cyclic - Prepare a cyclic dma descriptor + * @chan: DPDMA channel + * @buf_addr: buffer address + * @buf_len: buffer length + * @period_len: number of periods + * @flags: tx flags argument passed in to prepare function + * + * Prepare a tx descriptor incudling internal software/hardware descriptors + * for the given cyclic transaction. + * + * Return: A dma async tx descriptor on success, or NULL. + */ +static struct dma_async_tx_descriptor * +xilinx_dpdma_chan_prep_cyclic(struct xilinx_dpdma_chan *chan, + dma_addr_t buf_addr, size_t buf_len, + size_t period_len, unsigned long flags) +{ + struct xilinx_dpdma_tx_desc *tx_desc; + struct xilinx_dpdma_sw_desc *sw_desc, *last = NULL; + unsigned int periods = buf_len / period_len; + unsigned int i; + + tx_desc = xilinx_dpdma_chan_alloc_tx_desc(chan); + if (!tx_desc) + return (void *)tx_desc; + + for (i = 0; i < periods; i++) { + struct xilinx_dpdma_hw_desc *hw_desc; + + if (!IS_ALIGNED(buf_addr, XILINX_DPDMA_ALIGN_BYTES)) { + dev_err(chan->xdev->dev, + "buffer should be aligned at %d B\n", + XILINX_DPDMA_ALIGN_BYTES); + goto error; + } + + sw_desc = xilinx_dpdma_chan_alloc_sw_desc(chan); + if (!sw_desc) + goto error; + + xilinx_dpdma_sw_desc_set_dma_addrs(chan->xdev, sw_desc, last, + &buf_addr, 1); + hw_desc = &sw_desc->hw; + hw_desc->xfer_size = period_len; + hw_desc->hsize_stride = + FIELD_PREP(XILINX_DPDMA_DESC_HSIZE_STRIDE_HSIZE_MASK, + period_len) | + FIELD_PREP(XILINX_DPDMA_DESC_HSIZE_STRIDE_STRIDE_MASK, + period_len); + hw_desc->control |= XILINX_DPDMA_DESC_CONTROL_PREEMBLE; + hw_desc->control |= XILINX_DPDMA_DESC_CONTROL_IGNORE_DONE; + hw_desc->control |= XILINX_DPDMA_DESC_CONTROL_COMPLETE_INTR; + + list_add_tail(&sw_desc->node, &tx_desc->descriptors); + + buf_addr += period_len; + last = sw_desc; + } + + sw_desc = list_first_entry(&tx_desc->descriptors, + struct xilinx_dpdma_sw_desc, node); + last->hw.next_desc = lower_32_bits(sw_desc->dma_addr); + if (chan->xdev->ext_addr) + last->hw.addr_ext |= + FIELD_PREP(XILINX_DPDMA_DESC_ADDR_EXT_NEXT_ADDR_MASK, + upper_32_bits(sw_desc->dma_addr)); + + last->hw.control |= XILINX_DPDMA_DESC_CONTROL_LAST_OF_FRAME; + + return vchan_tx_prep(&chan->vchan, &tx_desc->vdesc, flags); + +error: + xilinx_dpdma_chan_free_tx_desc(&tx_desc->vdesc); + + return NULL; +} + +/** * xilinx_dpdma_chan_prep_interleaved_dma - Prepare an interleaved dma * descriptor * @chan: DPDMA channel @@ -1097,12 +1176,14 @@ * Complete the active descriptor, if any, promote the pending * descriptor to active, and queue the next transfer, if any. */ + spin_lock(&chan->vchan.lock); if (chan->desc.active) vchan_cookie_complete(&chan->desc.active->vdesc); chan->desc.active = pending; chan->desc.pending = NULL; xilinx_dpdma_chan_queue_transfer(chan); + spin_unlock(&chan->vchan.lock); out: spin_unlock_irqrestore(&chan->lock, flags); @@ -1188,6 +1269,23 @@ /* ----------------------------------------------------------------------------- * DMA Engine Operations */ +static struct dma_async_tx_descriptor * +xilinx_dpdma_prep_dma_cyclic(struct dma_chan *dchan, dma_addr_t buf_addr, + size_t buf_len, size_t period_len, + enum dma_transfer_direction direction, + unsigned long flags) +{ + struct xilinx_dpdma_chan *chan = to_xilinx_chan(dchan); + + if (direction != DMA_MEM_TO_DEV) + return NULL; + + if (buf_len % period_len) + return NULL; + + return xilinx_dpdma_chan_prep_cyclic(chan, buf_addr, buf_len, + period_len, flags); +} static struct dma_async_tx_descriptor * xilinx_dpdma_prep_interleaved_dma(struct dma_chan *dchan, @@ -1264,10 +1362,12 @@ struct xilinx_dpdma_chan *chan = to_xilinx_chan(dchan); unsigned long flags; - spin_lock_irqsave(&chan->vchan.lock, flags); + spin_lock_irqsave(&chan->lock, flags); + spin_lock(&chan->vchan.lock); if (vchan_issue_pending(&chan->vchan)) xilinx_dpdma_chan_queue_transfer(chan); - spin_unlock_irqrestore(&chan->vchan.lock, flags); + spin_unlock(&chan->vchan.lock); + spin_unlock_irqrestore(&chan->lock, flags); } static int xilinx_dpdma_config(struct dma_chan *dchan, @@ -1495,7 +1595,9 @@ XILINX_DPDMA_EINTR_CHAN_ERR_MASK << chan->id); spin_lock_irqsave(&chan->lock, flags); + spin_lock(&chan->vchan.lock); xilinx_dpdma_chan_queue_transfer(chan); + spin_unlock(&chan->vchan.lock); spin_unlock_irqrestore(&chan->lock, flags); } @@ -1667,6 +1769,7 @@ dma_cap_set(DMA_SLAVE, ddev->cap_mask); dma_cap_set(DMA_PRIVATE, ddev->cap_mask); + dma_cap_set(DMA_CYCLIC, ddev->cap_mask); dma_cap_set(DMA_INTERLEAVE, ddev->cap_mask); dma_cap_set(DMA_REPEAT, ddev->cap_mask); dma_cap_set(DMA_LOAD_EOT, ddev->cap_mask); @@ -1674,6 +1777,7 @@ ddev->device_alloc_chan_resources = xilinx_dpdma_alloc_chan_resources; ddev->device_free_chan_resources = xilinx_dpdma_free_chan_resources; + ddev->device_prep_dma_cyclic = xilinx_dpdma_prep_dma_cyclic; ddev->device_prep_interleaved_dma = xilinx_dpdma_prep_interleaved_dma; /* TODO: Can we achieve better granularity ? */ ddev->device_tx_status = dma_cookie_status; --- linux-xilinx-6.8.0.orig/drivers/dma/xilinx/xilinx_frmbuf.c +++ linux-xilinx-6.8.0/drivers/dma/xilinx/xilinx_frmbuf.c @@ -0,0 +1,1903 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * DMAEngine driver for Xilinx Framebuffer IP + * + * Copyright (C) 2016 - 2021 Xilinx, Inc. + * + * Authors: Radhey Shyam Pandey + * John Nichols + * Jeffrey Mouroux + * + * Based on the Freescale DMA driver. + * + * Description: + * The AXI Framebuffer core is a soft Xilinx IP core that + * provides high-bandwidth direct memory access between memory + * and AXI4-Stream. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "../dmaengine.h" + +/* Register/Descriptor Offsets */ +#define XILINX_FRMBUF_CTRL_OFFSET 0x00 +#define XILINX_FRMBUF_GIE_OFFSET 0x04 +#define XILINX_FRMBUF_IE_OFFSET 0x08 +#define XILINX_FRMBUF_ISR_OFFSET 0x0c +#define XILINX_FRMBUF_WIDTH_OFFSET 0x10 +#define XILINX_FRMBUF_HEIGHT_OFFSET 0x18 +#define XILINX_FRMBUF_STRIDE_OFFSET 0x20 +#define XILINX_FRMBUF_FMT_OFFSET 0x28 +#define XILINX_FRMBUF_ADDR_OFFSET 0x30 +#define XILINX_FRMBUF_ADDR2_OFFSET 0x3c +#define XILINX_FRMBUF_FID_OFFSET 0x48 +#define XILINX_FRMBUF_FID_MODE_OFFSET 0x50 +#define XILINX_FRMBUF_ADDR3_OFFSET 0x54 +#define XILINX_FRMBUF_FID_ERR_OFFSET 0x58 +#define XILINX_FRMBUF_FID_OUT_OFFSET 0x60 +#define XILINX_FRMBUF_RD_ADDR3_OFFSET 0x74 + +/* Control Registers */ +#define XILINX_FRMBUF_CTRL_AP_START BIT(0) +#define XILINX_FRMBUF_CTRL_AP_DONE BIT(1) +#define XILINX_FRMBUF_CTRL_AP_IDLE BIT(2) +#define XILINX_FRMBUF_CTRL_AP_READY BIT(3) +#define XILINX_FRMBUF_CTRL_FLUSH BIT(5) +#define XILINX_FRMBUF_CTRL_FLUSH_DONE BIT(6) +#define XILINX_FRMBUF_CTRL_AUTO_RESTART BIT(7) +#define XILINX_FRMBUF_GIE_EN BIT(0) + +/* Interrupt Status and Control */ +#define XILINX_FRMBUF_IE_AP_DONE BIT(0) +#define XILINX_FRMBUF_IE_AP_READY BIT(1) + +#define XILINX_FRMBUF_ISR_AP_DONE_IRQ BIT(0) +#define XILINX_FRMBUF_ISR_AP_READY_IRQ BIT(1) + +#define XILINX_FRMBUF_ISR_ALL_IRQ_MASK \ + (XILINX_FRMBUF_ISR_AP_DONE_IRQ | \ + XILINX_FRMBUF_ISR_AP_READY_IRQ) + +/* Video Format Register Settings */ +#define XILINX_FRMBUF_FMT_RGBX8 10 +#define XILINX_FRMBUF_FMT_YUVX8 11 +#define XILINX_FRMBUF_FMT_YUYV8 12 +#define XILINX_FRMBUF_FMT_RGBA8 13 +#define XILINX_FRMBUF_FMT_YUVA8 14 +#define XILINX_FRMBUF_FMT_RGBX10 15 +#define XILINX_FRMBUF_FMT_YUVX10 16 +#define XILINX_FRMBUF_FMT_Y_UV8 18 +#define XILINX_FRMBUF_FMT_Y_UV8_420 19 +#define XILINX_FRMBUF_FMT_RGB8 20 +#define XILINX_FRMBUF_FMT_YUV8 21 +#define XILINX_FRMBUF_FMT_Y_UV10 22 +#define XILINX_FRMBUF_FMT_Y_UV10_420 23 +#define XILINX_FRMBUF_FMT_Y8 24 +#define XILINX_FRMBUF_FMT_Y10 25 +#define XILINX_FRMBUF_FMT_BGRA8 26 +#define XILINX_FRMBUF_FMT_BGRX8 27 +#define XILINX_FRMBUF_FMT_UYVY8 28 +#define XILINX_FRMBUF_FMT_BGR8 29 +#define XILINX_FRMBUF_FMT_RGBX12 30 +#define XILINX_FRMBUF_FMT_RGB16 35 +#define XILINX_FRMBUF_FMT_Y_U_V8 42 +#define XILINX_FRMBUF_FMT_Y_U_V10 43 + +/* FID Register */ +#define XILINX_FRMBUF_FID_MASK BIT(0) + +/* FID ERR Register */ +#define XILINX_FRMBUF_FID_ERR_MASK BIT(0) +#define XILINX_FRMBUF_FID_OUT_MASK BIT(0) + +#define XILINX_FRMBUF_ALIGN_MUL 8 + +#define WAIT_FOR_FLUSH_DONE 25 + +/* Pixels per clock property flag */ +#define XILINX_PPC_PROP BIT(0) +#define XILINX_FLUSH_PROP BIT(1) +#define XILINX_FID_PROP BIT(2) +#define XILINX_CLK_PROP BIT(3) +#define XILINX_THREE_PLANES_PROP BIT(4) +#define XILINX_FID_ERR_DETECT_PROP BIT(5) + +#define XILINX_FRMBUF_MIN_HEIGHT (64) +#define XILINX_FRMBUF_MIN_WIDTH (64) + +/** + * struct xilinx_frmbuf_desc_hw - Hardware Descriptor + * @luma_plane_addr: Luma or packed plane buffer address + * @chroma_plane_addr: Chroma plane buffer address + * @vsize: Vertical Size + * @hsize: Horizontal Size + * @stride: Number of bytes between the first + * pixels of each horizontal line + */ +struct xilinx_frmbuf_desc_hw { + dma_addr_t luma_plane_addr; + dma_addr_t chroma_plane_addr[2]; + u32 vsize; + u32 hsize; + u32 stride; +}; + +/** + * struct xilinx_frmbuf_tx_descriptor - Per Transaction structure + * @async_tx: Async transaction descriptor + * @hw: Hardware descriptor + * @node: Node in the channel descriptors list + * @fid: Field ID of buffer + * @earlycb: Whether the callback should be called when in staged state + */ +struct xilinx_frmbuf_tx_descriptor { + struct dma_async_tx_descriptor async_tx; + struct xilinx_frmbuf_desc_hw hw; + struct list_head node; + u32 fid; + u32 earlycb; +}; + +/** + * struct xilinx_frmbuf_chan - Driver specific dma channel structure + * @xdev: Driver specific device structure + * @lock: Descriptor operation lock + * @chan_node: Member of a list of framebuffer channel instances + * @pending_list: Descriptors waiting + * @done_list: Complete descriptors + * @staged_desc: Next buffer to be programmed + * @active_desc: Currently active buffer being read/written to + * @common: DMA common channel + * @dev: The dma device + * @write_addr: callback that will write dma addresses to IP (32 or 64 bit) + * @irq: Channel IRQ + * @direction: Transfer direction + * @idle: Channel idle state + * @tasklet: Cleanup work after irq + * @vid_fmt: Reference to currently assigned video format description + * @hw_fid: FID enabled in hardware flag + * @mode: Select operation mode + * @fid_err_flag: Field id error detection flag + * @fid_out_val: Field id out val + * @fid_mode: Select fid mode + */ +struct xilinx_frmbuf_chan { + struct xilinx_frmbuf_device *xdev; + /* Descriptor operation lock */ + spinlock_t lock; + struct list_head chan_node; + struct list_head pending_list; + struct list_head done_list; + struct xilinx_frmbuf_tx_descriptor *staged_desc; + struct xilinx_frmbuf_tx_descriptor *active_desc; + struct dma_chan common; + struct device *dev; + void (*write_addr)(struct xilinx_frmbuf_chan *chan, u32 reg, + dma_addr_t value); + int irq; + enum dma_transfer_direction direction; + bool idle; + struct tasklet_struct tasklet; + const struct xilinx_frmbuf_format_desc *vid_fmt; + bool hw_fid; + enum operation_mode mode; + u8 fid_err_flag; + u8 fid_out_val; + enum fid_modes fid_mode; +}; + +/** + * struct xilinx_frmbuf_format_desc - lookup table to match fourcc to format + * @dts_name: Device tree name for this entry. + * @id: Format ID + * @bpw: Bits of pixel data + padding in a 32-bit word (luma plane for semi-pl) + * @ppw: Number of pixels represented in a 32-bit word (luma plane for semi-pl) + * @num_planes: Expected number of plane buffers in framebuffer for this format + * @drm_fmt: DRM video framework equivalent fourcc code + * @v4l2_fmt: Video 4 Linux framework equivalent fourcc code + * @fmt_bitmask: Flag identifying this format in device-specific "enabled" + * bitmap + */ +struct xilinx_frmbuf_format_desc { + const char *dts_name; + u32 id; + u32 bpw; + u32 ppw; + u32 num_planes; + u32 drm_fmt; + u32 v4l2_fmt; + u32 fmt_bitmask; +}; + +static LIST_HEAD(frmbuf_chan_list); +static DEFINE_MUTEX(frmbuf_chan_list_lock); + +static const struct xilinx_frmbuf_format_desc xilinx_frmbuf_formats[] = { + { + .dts_name = "xbgr8888", + .id = XILINX_FRMBUF_FMT_RGBX8, + .bpw = 32, + .ppw = 1, + .num_planes = 1, + .drm_fmt = DRM_FORMAT_XBGR8888, + .v4l2_fmt = V4L2_PIX_FMT_BGRX32, + .fmt_bitmask = BIT(0), + }, + { + .dts_name = "xbgr2101010", + .id = XILINX_FRMBUF_FMT_RGBX10, + .bpw = 32, + .ppw = 1, + .num_planes = 1, + .drm_fmt = DRM_FORMAT_XBGR2101010, + .v4l2_fmt = V4L2_PIX_FMT_XBGR30, + .fmt_bitmask = BIT(1), + }, + { + .dts_name = "xrgb8888", + .id = XILINX_FRMBUF_FMT_BGRX8, + .bpw = 32, + .ppw = 1, + .num_planes = 1, + .drm_fmt = DRM_FORMAT_XRGB8888, + .v4l2_fmt = V4L2_PIX_FMT_XBGR32, + .fmt_bitmask = BIT(2), + }, + { + .dts_name = "xvuy8888", + .id = XILINX_FRMBUF_FMT_YUVX8, + .bpw = 32, + .ppw = 1, + .num_planes = 1, + .drm_fmt = DRM_FORMAT_XVUY8888, + .v4l2_fmt = V4L2_PIX_FMT_XVUY32, + .fmt_bitmask = BIT(5), + }, + { + .dts_name = "vuy888", + .id = XILINX_FRMBUF_FMT_YUV8, + .bpw = 24, + .ppw = 1, + .num_planes = 1, + .drm_fmt = DRM_FORMAT_VUY888, + .v4l2_fmt = V4L2_PIX_FMT_VUY24, + .fmt_bitmask = BIT(6), + }, + { + .dts_name = "yuvx2101010", + .id = XILINX_FRMBUF_FMT_YUVX10, + .bpw = 32, + .ppw = 1, + .num_planes = 1, + .drm_fmt = DRM_FORMAT_XVUY2101010, + .v4l2_fmt = V4L2_PIX_FMT_XVUY10, + .fmt_bitmask = BIT(7), + }, + { + .dts_name = "yuyv", + .id = XILINX_FRMBUF_FMT_YUYV8, + .bpw = 32, + .ppw = 2, + .num_planes = 1, + .drm_fmt = DRM_FORMAT_YUYV, + .v4l2_fmt = V4L2_PIX_FMT_YUYV, + .fmt_bitmask = BIT(8), + }, + { + .dts_name = "uyvy", + .id = XILINX_FRMBUF_FMT_UYVY8, + .bpw = 32, + .ppw = 2, + .num_planes = 1, + .drm_fmt = DRM_FORMAT_UYVY, + .v4l2_fmt = V4L2_PIX_FMT_UYVY, + .fmt_bitmask = BIT(9), + }, + { + .dts_name = "nv16", + .id = XILINX_FRMBUF_FMT_Y_UV8, + .bpw = 32, + .ppw = 4, + .num_planes = 2, + .drm_fmt = DRM_FORMAT_NV16, + .v4l2_fmt = V4L2_PIX_FMT_NV16M, + .fmt_bitmask = BIT(11), + }, + { + .dts_name = "nv16", + .id = XILINX_FRMBUF_FMT_Y_UV8, + .bpw = 32, + .ppw = 4, + .num_planes = 2, + .drm_fmt = 0, + .v4l2_fmt = V4L2_PIX_FMT_NV16, + .fmt_bitmask = BIT(11), + }, + { + .dts_name = "nv12", + .id = XILINX_FRMBUF_FMT_Y_UV8_420, + .bpw = 32, + .ppw = 4, + .num_planes = 2, + .drm_fmt = DRM_FORMAT_NV12, + .v4l2_fmt = V4L2_PIX_FMT_NV12M, + .fmt_bitmask = BIT(12), + }, + { + .dts_name = "nv12", + .id = XILINX_FRMBUF_FMT_Y_UV8_420, + .bpw = 32, + .ppw = 4, + .num_planes = 2, + .drm_fmt = 0, + .v4l2_fmt = V4L2_PIX_FMT_NV12, + .fmt_bitmask = BIT(12), + }, + { + .dts_name = "xv15", + .id = XILINX_FRMBUF_FMT_Y_UV10_420, + .bpw = 32, + .ppw = 3, + .num_planes = 2, + .drm_fmt = DRM_FORMAT_XV15, + .v4l2_fmt = V4L2_PIX_FMT_XV15M, + .fmt_bitmask = BIT(13), + }, + { + .dts_name = "xv15", + .id = XILINX_FRMBUF_FMT_Y_UV10_420, + .bpw = 32, + .ppw = 3, + .num_planes = 2, + .drm_fmt = 0, + .v4l2_fmt = V4L2_PIX_FMT_XV15, + .fmt_bitmask = BIT(13), + }, + { + .dts_name = "xv20", + .id = XILINX_FRMBUF_FMT_Y_UV10, + .bpw = 32, + .ppw = 3, + .num_planes = 2, + .drm_fmt = DRM_FORMAT_XV20, + .v4l2_fmt = V4L2_PIX_FMT_XV20M, + .fmt_bitmask = BIT(14), + }, + { + .dts_name = "xv20", + .id = XILINX_FRMBUF_FMT_Y_UV10, + .bpw = 32, + .ppw = 3, + .num_planes = 2, + .drm_fmt = 0, + .v4l2_fmt = V4L2_PIX_FMT_XV20, + .fmt_bitmask = BIT(14), + }, + { + .dts_name = "bgr888", + .id = XILINX_FRMBUF_FMT_RGB8, + .bpw = 24, + .ppw = 1, + .num_planes = 1, + .drm_fmt = DRM_FORMAT_BGR888, + .v4l2_fmt = V4L2_PIX_FMT_RGB24, + .fmt_bitmask = BIT(15), + }, + { + .dts_name = "y8", + .id = XILINX_FRMBUF_FMT_Y8, + .bpw = 32, + .ppw = 4, + .num_planes = 1, + .drm_fmt = DRM_FORMAT_Y8, + .v4l2_fmt = V4L2_PIX_FMT_GREY, + .fmt_bitmask = BIT(16), + }, + { + .dts_name = "y10", + .id = XILINX_FRMBUF_FMT_Y10, + .bpw = 32, + .ppw = 3, + .num_planes = 1, + .drm_fmt = DRM_FORMAT_Y10, + .v4l2_fmt = V4L2_PIX_FMT_XY10, + .fmt_bitmask = BIT(17), + }, + { + .dts_name = "rgb888", + .id = XILINX_FRMBUF_FMT_BGR8, + .bpw = 24, + .ppw = 1, + .num_planes = 1, + .drm_fmt = DRM_FORMAT_RGB888, + .v4l2_fmt = V4L2_PIX_FMT_BGR24, + .fmt_bitmask = BIT(18), + }, + { + .dts_name = "abgr8888", + .id = XILINX_FRMBUF_FMT_RGBA8, + .bpw = 32, + .ppw = 1, + .num_planes = 1, + .drm_fmt = DRM_FORMAT_ABGR8888, + .v4l2_fmt = 0, + .fmt_bitmask = BIT(19), + }, + { + .dts_name = "argb8888", + .id = XILINX_FRMBUF_FMT_BGRA8, + .bpw = 32, + .ppw = 1, + .num_planes = 1, + .drm_fmt = DRM_FORMAT_ARGB8888, + .v4l2_fmt = 0, + .fmt_bitmask = BIT(20), + }, + { + .dts_name = "avuy8888", + .id = XILINX_FRMBUF_FMT_YUVA8, + .bpw = 32, + .ppw = 1, + .num_planes = 1, + .drm_fmt = DRM_FORMAT_AVUY, + .v4l2_fmt = 0, + .fmt_bitmask = BIT(21), + }, + { + .dts_name = "xbgr4121212", + .id = XILINX_FRMBUF_FMT_RGBX12, + .bpw = 40, + .ppw = 1, + .num_planes = 1, + .v4l2_fmt = V4L2_PIX_FMT_XBGR40, + .fmt_bitmask = BIT(22), + }, + { + .dts_name = "rgb16", + .id = XILINX_FRMBUF_FMT_RGB16, + .bpw = 48, + .ppw = 1, + .num_planes = 1, + .v4l2_fmt = V4L2_PIX_FMT_BGR48, + .fmt_bitmask = BIT(23), + }, + { + .dts_name = "y_u_v8", + .id = XILINX_FRMBUF_FMT_Y_U_V8, + .bpw = 32, + .ppw = 4, + .num_planes = 3, + .v4l2_fmt = V4L2_PIX_FMT_YUV444M, + .drm_fmt = DRM_FORMAT_YUV444, + .fmt_bitmask = BIT(24), + }, + { + .dts_name = "y_u_v8", + .id = XILINX_FRMBUF_FMT_Y_U_V8, + .bpw = 32, + .ppw = 4, + .num_planes = 3, + .v4l2_fmt = V4L2_PIX_FMT_YUV444P, + .drm_fmt = DRM_FORMAT_YUV444, + .fmt_bitmask = BIT(24), + }, + { + .dts_name = "y_u_v10", + .id = XILINX_FRMBUF_FMT_Y_U_V10, + .bpw = 32, + .ppw = 3, + .num_planes = 3, + .v4l2_fmt = V4L2_PIX_FMT_X403, + .drm_fmt = DRM_FORMAT_X403, + .fmt_bitmask = BIT(25), + }, +}; + +/** + * struct xilinx_frmbuf_feature - dt or IP property structure + * @direction: dma transfer mode and direction + * @flags: Bitmask of properties enabled in IP or dt + */ +struct xilinx_frmbuf_feature { + enum dma_transfer_direction direction; + u32 flags; +}; + +/** + * struct xilinx_frmbuf_device - dma device structure + * @regs: I/O mapped base address + * @dev: Device Structure + * @common: DMA device structure + * @chan: Driver specific dma channel + * @rst_gpio: GPIO reset + * @enabled_vid_fmts: Bitmask of video formats enabled in hardware + * @drm_memory_fmts: Array of supported DRM fourcc codes + * @drm_fmt_cnt: Count of supported DRM fourcc codes + * @v4l2_memory_fmts: Array of supported V4L2 fourcc codes + * @v4l2_fmt_cnt: Count of supported V4L2 fourcc codes + * @cfg: Pointer to Framebuffer Feature config struct + * @max_width: Maximum pixel width supported in IP. + * @max_height: Maximum number of lines supported in IP. + * @ppc: Pixels per clock supported in IP. + * @ap_clk: Video core clock + */ +struct xilinx_frmbuf_device { + void __iomem *regs; + struct device *dev; + struct dma_device common; + struct xilinx_frmbuf_chan chan; + struct gpio_desc *rst_gpio; + u32 enabled_vid_fmts; + u32 drm_memory_fmts[ARRAY_SIZE(xilinx_frmbuf_formats)]; + u32 drm_fmt_cnt; + u32 v4l2_memory_fmts[ARRAY_SIZE(xilinx_frmbuf_formats)]; + u32 v4l2_fmt_cnt; + const struct xilinx_frmbuf_feature *cfg; + u32 max_width; + u32 max_height; + u32 ppc; + struct clk *ap_clk; +}; + +static const struct xilinx_frmbuf_feature xlnx_fbwr_cfg_v20 = { + .direction = DMA_DEV_TO_MEM, +}; + +static const struct xilinx_frmbuf_feature xlnx_fbwr_cfg_v21 = { + .direction = DMA_DEV_TO_MEM, + .flags = XILINX_PPC_PROP | XILINX_FLUSH_PROP + | XILINX_FID_PROP | XILINX_CLK_PROP, +}; + +static const struct xilinx_frmbuf_feature xlnx_fbwr_cfg_v22 = { + .direction = DMA_DEV_TO_MEM, + .flags = XILINX_PPC_PROP | XILINX_FLUSH_PROP + | XILINX_FID_PROP | XILINX_CLK_PROP + | XILINX_THREE_PLANES_PROP, +}; + +static const struct xilinx_frmbuf_feature xlnx_fbrd_cfg_v20 = { + .direction = DMA_MEM_TO_DEV, +}; + +static const struct xilinx_frmbuf_feature xlnx_fbrd_cfg_v21 = { + .direction = DMA_MEM_TO_DEV, + .flags = XILINX_PPC_PROP | XILINX_FLUSH_PROP + | XILINX_FID_PROP | XILINX_CLK_PROP, +}; + +static const struct xilinx_frmbuf_feature xlnx_fbrd_cfg_v22 = { + .direction = DMA_MEM_TO_DEV, + .flags = XILINX_PPC_PROP | XILINX_FLUSH_PROP + | XILINX_FID_PROP | XILINX_CLK_PROP + | XILINX_THREE_PLANES_PROP + | XILINX_FID_ERR_DETECT_PROP, +}; + +static const struct of_device_id xilinx_frmbuf_of_ids[] = { + { .compatible = "xlnx,axi-frmbuf-wr-v2", + .data = (void *)&xlnx_fbwr_cfg_v20}, + { .compatible = "xlnx,axi-frmbuf-wr-v2.1", + .data = (void *)&xlnx_fbwr_cfg_v21}, + { .compatible = "xlnx,axi-frmbuf-wr-v2.2", + .data = (void *)&xlnx_fbwr_cfg_v22}, + { .compatible = "xlnx,axi-frmbuf-rd-v2", + .data = (void *)&xlnx_fbrd_cfg_v20}, + { .compatible = "xlnx,axi-frmbuf-rd-v2.1", + .data = (void *)&xlnx_fbrd_cfg_v21}, + { .compatible = "xlnx,axi-frmbuf-rd-v2.2", + .data = (void *)&xlnx_fbrd_cfg_v22}, + {/* end of list */} +}; + +/******************************PROTOTYPES*************************************/ +#define to_xilinx_chan(chan) \ + container_of(chan, struct xilinx_frmbuf_chan, common) +#define to_dma_tx_descriptor(tx) \ + container_of(tx, struct xilinx_frmbuf_tx_descriptor, async_tx) + +static inline u32 frmbuf_read(struct xilinx_frmbuf_chan *chan, u32 reg) +{ + return ioread32(chan->xdev->regs + reg); +} + +static inline void frmbuf_write(struct xilinx_frmbuf_chan *chan, u32 reg, + u32 value) +{ + iowrite32(value, chan->xdev->regs + reg); +} + +static inline void frmbuf_writeq(struct xilinx_frmbuf_chan *chan, u32 reg, + u64 value) +{ + iowrite32(lower_32_bits(value), chan->xdev->regs + reg); + iowrite32(upper_32_bits(value), chan->xdev->regs + reg + 4); +} + +static void writeq_addr(struct xilinx_frmbuf_chan *chan, u32 reg, + dma_addr_t addr) +{ + frmbuf_writeq(chan, reg, (u64)addr); +} + +static void write_addr(struct xilinx_frmbuf_chan *chan, u32 reg, + dma_addr_t addr) +{ + frmbuf_write(chan, reg, addr); +} + +static inline void frmbuf_clr(struct xilinx_frmbuf_chan *chan, u32 reg, + u32 clr) +{ + frmbuf_write(chan, reg, frmbuf_read(chan, reg) & ~clr); +} + +static inline void frmbuf_set(struct xilinx_frmbuf_chan *chan, u32 reg, + u32 set) +{ + frmbuf_write(chan, reg, frmbuf_read(chan, reg) | set); +} + +static void frmbuf_init_format_array(struct xilinx_frmbuf_device *xdev) +{ + u32 i, cnt; + + for (i = 0; i < ARRAY_SIZE(xilinx_frmbuf_formats); i++) { + if (!(xdev->enabled_vid_fmts & + xilinx_frmbuf_formats[i].fmt_bitmask)) + continue; + + if (xilinx_frmbuf_formats[i].drm_fmt) { + cnt = xdev->drm_fmt_cnt++; + xdev->drm_memory_fmts[cnt] = + xilinx_frmbuf_formats[i].drm_fmt; + } + + if (xilinx_frmbuf_formats[i].v4l2_fmt) { + cnt = xdev->v4l2_fmt_cnt++; + xdev->v4l2_memory_fmts[cnt] = + xilinx_frmbuf_formats[i].v4l2_fmt; + } + } +} + +static struct xilinx_frmbuf_chan *frmbuf_find_chan(struct dma_chan *chan) +{ + struct xilinx_frmbuf_chan *xil_chan; + bool found_xchan = false; + + mutex_lock(&frmbuf_chan_list_lock); + list_for_each_entry(xil_chan, &frmbuf_chan_list, chan_node) { + if (chan == &xil_chan->common) { + found_xchan = true; + break; + } + } + mutex_unlock(&frmbuf_chan_list_lock); + + if (!found_xchan) { + dev_dbg(chan->device->dev, + "dma chan not a Video Framebuffer channel instance\n"); + return ERR_PTR(-EINVAL); + } + + return xil_chan; +} + +static struct xilinx_frmbuf_device *frmbuf_find_dev(struct dma_chan *chan) +{ + struct xilinx_frmbuf_chan *xchan, *temp; + struct xilinx_frmbuf_device *xdev; + bool is_frmbuf_chan = false; + + list_for_each_entry_safe(xchan, temp, &frmbuf_chan_list, chan_node) { + if (chan == &xchan->common) + is_frmbuf_chan = true; + } + + if (!is_frmbuf_chan) + return ERR_PTR(-ENODEV); + + xchan = to_xilinx_chan(chan); + xdev = container_of(xchan, struct xilinx_frmbuf_device, chan); + + return xdev; +} + +static int frmbuf_verify_format(struct dma_chan *chan, u32 fourcc, u32 type) +{ + struct xilinx_frmbuf_chan *xil_chan = to_xilinx_chan(chan); + u32 i, sz = ARRAY_SIZE(xilinx_frmbuf_formats); + + for (i = 0; i < sz; i++) { + if ((type == XDMA_DRM && + fourcc != xilinx_frmbuf_formats[i].drm_fmt) || + (type == XDMA_V4L2 && + fourcc != xilinx_frmbuf_formats[i].v4l2_fmt)) + continue; + + if (!(xilinx_frmbuf_formats[i].fmt_bitmask & + xil_chan->xdev->enabled_vid_fmts)) + return -EINVAL; + + /* + * The Alpha color formats are supported in Framebuffer Read + * IP only as corresponding DRM formats. + */ + if (type == XDMA_DRM && + (xilinx_frmbuf_formats[i].drm_fmt == DRM_FORMAT_ABGR8888 || + xilinx_frmbuf_formats[i].drm_fmt == DRM_FORMAT_ARGB8888 || + xilinx_frmbuf_formats[i].drm_fmt == DRM_FORMAT_AVUY) && + xil_chan->direction != DMA_MEM_TO_DEV) + return -EINVAL; + + xil_chan->vid_fmt = &xilinx_frmbuf_formats[i]; + return 0; + } + return -EINVAL; +} + +static void xilinx_xdma_set_config(struct dma_chan *chan, u32 fourcc, u32 type) +{ + struct xilinx_frmbuf_chan *xil_chan; + struct xilinx_frmbuf_device *xdev; + const struct xilinx_frmbuf_format_desc *old_vid_fmt; + int ret; + + xil_chan = frmbuf_find_chan(chan); + if (IS_ERR(xil_chan)) + return; + + xdev = frmbuf_find_dev(chan); + if (IS_ERR(xdev)) + return; + + /* Save old video format */ + old_vid_fmt = xil_chan->vid_fmt; + + ret = frmbuf_verify_format(chan, fourcc, type); + if (ret == -EINVAL) { + dev_err(chan->device->dev, + "Framebuffer not configured for fourcc 0x%x\n", + fourcc); + return; + } + + if ((!(xdev->cfg->flags & XILINX_THREE_PLANES_PROP)) && + (xil_chan->vid_fmt->id == XILINX_FRMBUF_FMT_Y_U_V8 || + xil_chan->vid_fmt->id == XILINX_FRMBUF_FMT_Y_U_V10)) { + dev_err(chan->device->dev, "doesn't support %s format\n", + xil_chan->vid_fmt->dts_name); + /* Restore to old video format */ + xil_chan->vid_fmt = old_vid_fmt; + return; + } +} + +void xilinx_xdma_set_mode(struct dma_chan *chan, enum operation_mode + mode) +{ + struct xilinx_frmbuf_chan *xil_chan; + + xil_chan = frmbuf_find_chan(chan); + if (IS_ERR(xil_chan)) + return; + + xil_chan->mode = mode; + + return; + +} EXPORT_SYMBOL_GPL(xilinx_xdma_set_mode); + +void xilinx_xdma_drm_config(struct dma_chan *chan, u32 drm_fourcc) +{ + xilinx_xdma_set_config(chan, drm_fourcc, XDMA_DRM); + +} EXPORT_SYMBOL_GPL(xilinx_xdma_drm_config); + +void xilinx_xdma_v4l2_config(struct dma_chan *chan, u32 v4l2_fourcc) +{ + xilinx_xdma_set_config(chan, v4l2_fourcc, XDMA_V4L2); + +} EXPORT_SYMBOL_GPL(xilinx_xdma_v4l2_config); + +int xilinx_xdma_get_drm_vid_fmts(struct dma_chan *chan, u32 *fmt_cnt, + u32 **fmts) +{ + struct xilinx_frmbuf_device *xdev; + + xdev = frmbuf_find_dev(chan); + + if (IS_ERR(xdev)) + return PTR_ERR(xdev); + + *fmt_cnt = xdev->drm_fmt_cnt; + *fmts = xdev->drm_memory_fmts; + + return 0; +} +EXPORT_SYMBOL(xilinx_xdma_get_drm_vid_fmts); + +int xilinx_xdma_get_v4l2_vid_fmts(struct dma_chan *chan, u32 *fmt_cnt, + u32 **fmts) +{ + struct xilinx_frmbuf_device *xdev; + + xdev = frmbuf_find_dev(chan); + + if (IS_ERR(xdev)) + return PTR_ERR(xdev); + + *fmt_cnt = xdev->v4l2_fmt_cnt; + *fmts = xdev->v4l2_memory_fmts; + + return 0; +} +EXPORT_SYMBOL(xilinx_xdma_get_v4l2_vid_fmts); + +int xilinx_xdma_get_fid(struct dma_chan *chan, + struct dma_async_tx_descriptor *async_tx, u32 *fid) +{ + struct xilinx_frmbuf_device *xdev; + struct xilinx_frmbuf_tx_descriptor *desc; + + xdev = frmbuf_find_dev(chan); + if (IS_ERR(xdev)) + return PTR_ERR(xdev); + + if (!async_tx || !fid) + return -EINVAL; + + if (xdev->chan.direction != DMA_DEV_TO_MEM) + return -EINVAL; + + desc = to_dma_tx_descriptor(async_tx); + if (!desc) + return -EINVAL; + + *fid = desc->fid; + return 0; +} +EXPORT_SYMBOL(xilinx_xdma_get_fid); + +int xilinx_xdma_set_fid(struct dma_chan *chan, + struct dma_async_tx_descriptor *async_tx, u32 fid) +{ + struct xilinx_frmbuf_device *xdev; + struct xilinx_frmbuf_tx_descriptor *desc; + + if (fid > 1 || !async_tx) + return -EINVAL; + + xdev = frmbuf_find_dev(chan); + if (IS_ERR(xdev)) + return PTR_ERR(xdev); + + if (xdev->chan.direction != DMA_MEM_TO_DEV) + return -EINVAL; + + desc = to_dma_tx_descriptor(async_tx); + if (!desc) + return -EINVAL; + + desc->fid = fid; + return 0; +} +EXPORT_SYMBOL(xilinx_xdma_set_fid); + +int xilinx_xdma_get_fid_err_flag(struct dma_chan *chan, + u32 *fid_err_flag) +{ + struct xilinx_frmbuf_device *xdev; + + xdev = frmbuf_find_dev(chan); + if (IS_ERR(xdev)) + return PTR_ERR(xdev); + + if (xdev->chan.direction != DMA_MEM_TO_DEV || xdev->chan.idle) + return -EINVAL; + + *fid_err_flag = xdev->chan.fid_err_flag; + + return 0; +} +EXPORT_SYMBOL(xilinx_xdma_get_fid_err_flag); + +int xilinx_xdma_get_fid_out(struct dma_chan *chan, + u32 *fid_out_val) +{ + struct xilinx_frmbuf_device *xdev; + + xdev = frmbuf_find_dev(chan); + if (IS_ERR(xdev)) + return PTR_ERR(xdev); + + if (xdev->chan.direction != DMA_MEM_TO_DEV || xdev->chan.idle) + return -EINVAL; + + *fid_out_val = xdev->chan.fid_out_val; + + return 0; +} +EXPORT_SYMBOL(xilinx_xdma_get_fid_out); + +int xilinx_xdma_get_width_align(struct dma_chan *chan, u32 *width_align) +{ + struct xilinx_frmbuf_device *xdev; + + xdev = frmbuf_find_dev(chan); + if (IS_ERR(xdev)) + return PTR_ERR(xdev); + *width_align = xdev->ppc; + + return 0; +} +EXPORT_SYMBOL(xilinx_xdma_get_width_align); + +int xilinx_xdma_get_earlycb(struct dma_chan *chan, + struct dma_async_tx_descriptor *async_tx, + u32 *earlycb) +{ + struct xilinx_frmbuf_device *xdev; + struct xilinx_frmbuf_tx_descriptor *desc; + + xdev = frmbuf_find_dev(chan); + if (IS_ERR(xdev)) + return PTR_ERR(xdev); + + if (!async_tx || !earlycb) + return -EINVAL; + + desc = to_dma_tx_descriptor(async_tx); + if (!desc) + return -EINVAL; + + *earlycb = desc->earlycb; + return 0; +} +EXPORT_SYMBOL(xilinx_xdma_get_earlycb); + +int xilinx_xdma_set_earlycb(struct dma_chan *chan, + struct dma_async_tx_descriptor *async_tx, + u32 earlycb) +{ + struct xilinx_frmbuf_device *xdev; + struct xilinx_frmbuf_tx_descriptor *desc; + + if (!async_tx) + return -EINVAL; + + xdev = frmbuf_find_dev(chan); + if (IS_ERR(xdev)) + return PTR_ERR(xdev); + + desc = to_dma_tx_descriptor(async_tx); + if (!desc) + return -EINVAL; + + desc->earlycb = earlycb; + return 0; +} +EXPORT_SYMBOL(xilinx_xdma_set_earlycb); + +/** + * of_dma_xilinx_xlate - Translation function + * @dma_spec: Pointer to DMA specifier as found in the device tree + * @ofdma: Pointer to DMA controller data + * + * Return: DMA channel pointer on success or error code on error + */ +static struct dma_chan *of_dma_xilinx_xlate(struct of_phandle_args *dma_spec, + struct of_dma *ofdma) +{ + struct xilinx_frmbuf_device *xdev = ofdma->of_dma_data; + + return dma_get_slave_channel(&xdev->chan.common); +} + +/* ----------------------------------------------------------------------------- + * Descriptors alloc and free + */ + +/** + * xilinx_frmbuf_alloc_tx_descriptor - Allocate transaction descriptor + * @chan: Driver specific dma channel + * + * Return: The allocated descriptor on success and NULL on failure. + */ +static struct xilinx_frmbuf_tx_descriptor * +xilinx_frmbuf_alloc_tx_descriptor(struct xilinx_frmbuf_chan *chan) +{ + struct xilinx_frmbuf_tx_descriptor *desc; + + desc = kzalloc(sizeof(*desc), GFP_KERNEL); + if (!desc) + return NULL; + + return desc; +} + +/** + * xilinx_frmbuf_free_desc_list - Free descriptors list + * @chan: Driver specific dma channel + * @list: List to parse and delete the descriptor + */ +static void xilinx_frmbuf_free_desc_list(struct xilinx_frmbuf_chan *chan, + struct list_head *list) +{ + struct xilinx_frmbuf_tx_descriptor *desc, *next; + + list_for_each_entry_safe(desc, next, list, node) { + list_del(&desc->node); + kfree(desc); + } +} + +/** + * xilinx_frmbuf_free_descriptors - Free channel descriptors + * @chan: Driver specific dma channel + */ +static void xilinx_frmbuf_free_descriptors(struct xilinx_frmbuf_chan *chan) +{ + unsigned long flags; + + spin_lock_irqsave(&chan->lock, flags); + + xilinx_frmbuf_free_desc_list(chan, &chan->pending_list); + xilinx_frmbuf_free_desc_list(chan, &chan->done_list); + kfree(chan->active_desc); + kfree(chan->staged_desc); + + chan->staged_desc = NULL; + chan->active_desc = NULL; + INIT_LIST_HEAD(&chan->pending_list); + INIT_LIST_HEAD(&chan->done_list); + + spin_unlock_irqrestore(&chan->lock, flags); +} + +/** + * xilinx_frmbuf_free_chan_resources - Free channel resources + * @dchan: DMA channel + */ +static void xilinx_frmbuf_free_chan_resources(struct dma_chan *dchan) +{ + struct xilinx_frmbuf_chan *chan = to_xilinx_chan(dchan); + + xilinx_frmbuf_free_descriptors(chan); +} + +/** + * xilinx_frmbuf_chan_desc_cleanup - Clean channel descriptors + * @chan: Driver specific dma channel + */ +static void xilinx_frmbuf_chan_desc_cleanup(struct xilinx_frmbuf_chan *chan) +{ + struct xilinx_frmbuf_tx_descriptor *desc, *next; + unsigned long flags; + + spin_lock_irqsave(&chan->lock, flags); + + list_for_each_entry_safe(desc, next, &chan->done_list, node) { + dma_async_tx_callback callback; + void *callback_param; + + list_del(&desc->node); + + /* Run the link descriptor callback function */ + callback = desc->async_tx.callback; + callback_param = desc->async_tx.callback_param; + if (callback) { + spin_unlock_irqrestore(&chan->lock, flags); + callback(callback_param); + spin_lock_irqsave(&chan->lock, flags); + } + + /* Run any dependencies, then free the descriptor */ + dma_run_dependencies(&desc->async_tx); + kfree(desc); + } + + spin_unlock_irqrestore(&chan->lock, flags); +} + +/** + * xilinx_frmbuf_do_tasklet - Schedule completion tasklet + * @data: Pointer to the Xilinx frmbuf channel structure + */ +static void xilinx_frmbuf_do_tasklet(unsigned long data) +{ + struct xilinx_frmbuf_chan *chan = (struct xilinx_frmbuf_chan *)data; + + xilinx_frmbuf_chan_desc_cleanup(chan); +} + +/** + * xilinx_frmbuf_alloc_chan_resources - Allocate channel resources + * @dchan: DMA channel + * + * Return: '0' on success and failure value on error + */ +static int xilinx_frmbuf_alloc_chan_resources(struct dma_chan *dchan) +{ + dma_cookie_init(dchan); + + return 0; +} + +/** + * xilinx_frmbuf_tx_status - Get frmbuf transaction status + * @dchan: DMA channel + * @cookie: Transaction identifier + * @txstate: Transaction state + * + * Return: fmrbuf transaction status + */ +static enum dma_status xilinx_frmbuf_tx_status(struct dma_chan *dchan, + dma_cookie_t cookie, + struct dma_tx_state *txstate) +{ + return dma_cookie_status(dchan, cookie, txstate); +} + +/** + * xilinx_frmbuf_halt - Halt frmbuf channel + * @chan: Driver specific dma channel + */ +static void xilinx_frmbuf_halt(struct xilinx_frmbuf_chan *chan) +{ + frmbuf_clr(chan, XILINX_FRMBUF_CTRL_OFFSET, + XILINX_FRMBUF_CTRL_AP_START | chan->mode); + chan->idle = true; +} + +/** + * xilinx_frmbuf_start - Start dma channel + * @chan: Driver specific dma channel + */ +static void xilinx_frmbuf_start(struct xilinx_frmbuf_chan *chan) +{ + frmbuf_set(chan, XILINX_FRMBUF_CTRL_OFFSET, + XILINX_FRMBUF_CTRL_AP_START | chan->mode); + chan->idle = false; +} + +/** + * xilinx_frmbuf_complete_descriptor - Mark the active descriptor as complete + * This function is invoked with spinlock held + * @chan : xilinx frmbuf channel + * + * CONTEXT: hardirq + */ +static void xilinx_frmbuf_complete_descriptor(struct xilinx_frmbuf_chan *chan) +{ + struct xilinx_frmbuf_tx_descriptor *desc = chan->active_desc; + + /* + * In case of frame buffer write, read the fid register + * and associate it with descriptor + */ + if (chan->direction == DMA_DEV_TO_MEM && chan->hw_fid) + desc->fid = frmbuf_read(chan, XILINX_FRMBUF_FID_OFFSET) & + XILINX_FRMBUF_FID_MASK; + + dma_cookie_complete(&desc->async_tx); + list_add_tail(&desc->node, &chan->done_list); +} + +/** + * xilinx_frmbuf_start_transfer - Starts frmbuf transfer + * @chan: Driver specific channel struct pointer + */ +static void xilinx_frmbuf_start_transfer(struct xilinx_frmbuf_chan *chan) +{ + struct xilinx_frmbuf_tx_descriptor *desc; + struct xilinx_frmbuf_device *xdev; + + xdev = container_of(chan, struct xilinx_frmbuf_device, chan); + + if (!chan->idle) + return; + + if (chan->staged_desc) { + chan->active_desc = chan->staged_desc; + chan->staged_desc = NULL; + } + + if (list_empty(&chan->pending_list)) + return; + + desc = list_first_entry(&chan->pending_list, + struct xilinx_frmbuf_tx_descriptor, + node); + + if (desc->earlycb == EARLY_CALLBACK_START_DESC) { + dma_async_tx_callback callback; + void *callback_param; + + callback = desc->async_tx.callback; + callback_param = desc->async_tx.callback_param; + if (callback) { + callback(callback_param); + desc->async_tx.callback = NULL; + chan->active_desc = desc; + } + } + + /* Start the transfer */ + chan->write_addr(chan, XILINX_FRMBUF_ADDR_OFFSET, + desc->hw.luma_plane_addr); + chan->write_addr(chan, XILINX_FRMBUF_ADDR2_OFFSET, + desc->hw.chroma_plane_addr[0]); + if (xdev->cfg->flags & XILINX_THREE_PLANES_PROP) { + if (chan->direction == DMA_MEM_TO_DEV) + chan->write_addr(chan, XILINX_FRMBUF_RD_ADDR3_OFFSET, + desc->hw.chroma_plane_addr[1]); + else + chan->write_addr(chan, XILINX_FRMBUF_ADDR3_OFFSET, + desc->hw.chroma_plane_addr[1]); + } + + /* HW expects these parameters to be same for one transaction */ + frmbuf_write(chan, XILINX_FRMBUF_WIDTH_OFFSET, desc->hw.hsize); + frmbuf_write(chan, XILINX_FRMBUF_STRIDE_OFFSET, desc->hw.stride); + frmbuf_write(chan, XILINX_FRMBUF_HEIGHT_OFFSET, desc->hw.vsize); + frmbuf_write(chan, XILINX_FRMBUF_FMT_OFFSET, chan->vid_fmt->id); + + /* If it is framebuffer read IP set the FID */ + if (chan->direction == DMA_MEM_TO_DEV && chan->hw_fid) + frmbuf_write(chan, XILINX_FRMBUF_FID_OFFSET, desc->fid); + + /* Start the hardware */ + xilinx_frmbuf_start(chan); + list_del(&desc->node); + + /* No staging descriptor required when auto restart is disabled */ + if (chan->mode == AUTO_RESTART) + chan->staged_desc = desc; + else + chan->active_desc = desc; +} + +/** + * xilinx_frmbuf_issue_pending - Issue pending transactions + * @dchan: DMA channel + */ +static void xilinx_frmbuf_issue_pending(struct dma_chan *dchan) +{ + struct xilinx_frmbuf_chan *chan = to_xilinx_chan(dchan); + unsigned long flags; + + spin_lock_irqsave(&chan->lock, flags); + xilinx_frmbuf_start_transfer(chan); + spin_unlock_irqrestore(&chan->lock, flags); +} + +/** + * xilinx_frmbuf_reset - Reset frmbuf channel + * @chan: Driver specific dma channel + */ +static void xilinx_frmbuf_reset(struct xilinx_frmbuf_chan *chan) +{ + /* reset ip */ + gpiod_set_value(chan->xdev->rst_gpio, 1); + udelay(1); + gpiod_set_value(chan->xdev->rst_gpio, 0); +} + +/** + * xilinx_frmbuf_chan_reset - Reset frmbuf channel and enable interrupts + * @chan: Driver specific frmbuf channel + */ +static void xilinx_frmbuf_chan_reset(struct xilinx_frmbuf_chan *chan) +{ + xilinx_frmbuf_reset(chan); + frmbuf_write(chan, XILINX_FRMBUF_IE_OFFSET, XILINX_FRMBUF_IE_AP_DONE); + frmbuf_write(chan, XILINX_FRMBUF_GIE_OFFSET, XILINX_FRMBUF_GIE_EN); + chan->fid_err_flag = 0; + chan->fid_out_val = 0; +} + +/** + * xilinx_frmbuf_irq_handler - frmbuf Interrupt handler + * @irq: IRQ number + * @data: Pointer to the Xilinx frmbuf channel structure + * + * Return: IRQ_HANDLED/IRQ_NONE + */ +static irqreturn_t xilinx_frmbuf_irq_handler(int irq, void *data) +{ + struct xilinx_frmbuf_chan *chan = data; + u32 status; + dma_async_tx_callback callback = NULL; + void *callback_param; + struct xilinx_frmbuf_tx_descriptor *desc; + + status = frmbuf_read(chan, XILINX_FRMBUF_ISR_OFFSET); + if (!(status & XILINX_FRMBUF_ISR_ALL_IRQ_MASK)) + return IRQ_NONE; + + frmbuf_write(chan, XILINX_FRMBUF_ISR_OFFSET, + status & XILINX_FRMBUF_ISR_ALL_IRQ_MASK); + + /* Check if callback function needs to be called early */ + desc = chan->staged_desc; + if (desc && desc->earlycb == EARLY_CALLBACK) { + callback = desc->async_tx.callback; + callback_param = desc->async_tx.callback_param; + if (callback) { + callback(callback_param); + desc->async_tx.callback = NULL; + } + } + + if (status & XILINX_FRMBUF_ISR_AP_DONE_IRQ) { + spin_lock(&chan->lock); + chan->idle = true; + if (chan->active_desc) { + xilinx_frmbuf_complete_descriptor(chan); + chan->active_desc = NULL; + } + + /* Update fid err detect flag and out value */ + if (chan->direction == DMA_MEM_TO_DEV && + chan->hw_fid && chan->idle && + chan->xdev->cfg->flags & XILINX_FID_ERR_DETECT_PROP) { + if (chan->mode == AUTO_RESTART) + chan->fid_mode = FID_MODE_2; + else + chan->fid_mode = FID_MODE_1; + + frmbuf_write(chan, XILINX_FRMBUF_FID_MODE_OFFSET, + chan->fid_mode); + dev_dbg(chan->xdev->dev, "fid mode = %d\n", + frmbuf_read(chan, XILINX_FRMBUF_FID_MODE_OFFSET)); + + chan->fid_err_flag = frmbuf_read(chan, + XILINX_FRMBUF_FID_ERR_OFFSET) & + XILINX_FRMBUF_FID_ERR_MASK; + chan->fid_out_val = frmbuf_read(chan, + XILINX_FRMBUF_FID_OUT_OFFSET) & + XILINX_FRMBUF_FID_OUT_MASK; + dev_dbg(chan->xdev->dev, "fid err cnt = 0x%x\n", + frmbuf_read(chan, XILINX_FRMBUF_FID_ERR_OFFSET)); + } + + xilinx_frmbuf_start_transfer(chan); + spin_unlock(&chan->lock); + } + + tasklet_schedule(&chan->tasklet); + return IRQ_HANDLED; +} + +/** + * xilinx_frmbuf_tx_submit - Submit DMA transaction + * @tx: Async transaction descriptor + * + * Return: cookie value on success and failure value on error + */ +static dma_cookie_t xilinx_frmbuf_tx_submit(struct dma_async_tx_descriptor *tx) +{ + struct xilinx_frmbuf_tx_descriptor *desc = to_dma_tx_descriptor(tx); + struct xilinx_frmbuf_chan *chan = to_xilinx_chan(tx->chan); + dma_cookie_t cookie; + unsigned long flags; + + spin_lock_irqsave(&chan->lock, flags); + cookie = dma_cookie_assign(tx); + list_add_tail(&desc->node, &chan->pending_list); + spin_unlock_irqrestore(&chan->lock, flags); + + return cookie; +} + +/** + * xilinx_frmbuf_dma_prep_interleaved - prepare a descriptor for a + * DMA_SLAVE transaction + * @dchan: DMA channel + * @xt: Interleaved template pointer + * @flags: transfer ack flags + * + * Return: Async transaction descriptor on success and NULL on failure + */ +static struct dma_async_tx_descriptor * +xilinx_frmbuf_dma_prep_interleaved(struct dma_chan *dchan, + struct dma_interleaved_template *xt, + unsigned long flags) +{ + struct xilinx_frmbuf_chan *chan = to_xilinx_chan(dchan); + struct xilinx_frmbuf_tx_descriptor *desc; + struct xilinx_frmbuf_desc_hw *hw; + u32 vsize, hsize; + + if (chan->direction != xt->dir || !chan->vid_fmt) + goto error; + + if (!xt->numf || !xt->sgl[0].size) + goto error; + + if (xt->frame_size != chan->vid_fmt->num_planes) + goto error; + + vsize = xt->numf; + hsize = (xt->sgl[0].size * chan->vid_fmt->ppw * 8) / + chan->vid_fmt->bpw; + /* hsize calc should not have resulted in an odd number */ + if (hsize & 1) + hsize++; + + if (vsize > chan->xdev->max_height || hsize > chan->xdev->max_width) { + dev_dbg(chan->xdev->dev, + "vsize %d max vsize %d hsize %d max hsize %d\n", + vsize, chan->xdev->max_height, hsize, + chan->xdev->max_width); + dev_err(chan->xdev->dev, "Requested size not supported!\n"); + goto error; + } + + desc = xilinx_frmbuf_alloc_tx_descriptor(chan); + if (!desc) + return NULL; + + dma_async_tx_descriptor_init(&desc->async_tx, &chan->common); + desc->async_tx.tx_submit = xilinx_frmbuf_tx_submit; + async_tx_ack(&desc->async_tx); + + hw = &desc->hw; + hw->vsize = xt->numf; + hw->stride = xt->sgl[0].icg + xt->sgl[0].size; + hw->hsize = (xt->sgl[0].size * chan->vid_fmt->ppw * 8) / + chan->vid_fmt->bpw; + + /* hsize calc should not have resulted in an odd number */ + if (hw->hsize & 1) + hw->hsize++; + + if (chan->direction == DMA_MEM_TO_DEV) { + hw->luma_plane_addr = xt->src_start; + if (xt->frame_size == 2 || xt->frame_size == 3) + hw->chroma_plane_addr[0] = + xt->src_start + + xt->numf * hw->stride + + xt->sgl[0].src_icg; + if (xt->frame_size == 3) + hw->chroma_plane_addr[1] = + hw->chroma_plane_addr[0] + + xt->numf * hw->stride + + xt->sgl[0].src_icg; + } else { + hw->luma_plane_addr = xt->dst_start; + if (xt->frame_size == 2 || xt->frame_size == 3) + hw->chroma_plane_addr[0] = + xt->dst_start + + xt->numf * hw->stride + + xt->sgl[0].dst_icg; + if (xt->frame_size == 3) + hw->chroma_plane_addr[1] = + hw->chroma_plane_addr[0] + + xt->numf * hw->stride + + xt->sgl[0].dst_icg; + } + + return &desc->async_tx; + +error: + dev_err(chan->xdev->dev, + "Invalid dma template or missing dma video fmt config\n"); + return NULL; +} + +/** + * xilinx_frmbuf_terminate_all - Halt the channel and free descriptors + * @dchan: Driver specific dma channel pointer + * + * Return: 0 + */ +static int xilinx_frmbuf_terminate_all(struct dma_chan *dchan) +{ + struct xilinx_frmbuf_chan *chan = to_xilinx_chan(dchan); + + xilinx_frmbuf_halt(chan); + xilinx_frmbuf_free_descriptors(chan); + /* worst case frame-to-frame boundary; ensure frame output complete */ + msleep(50); + + if (chan->xdev->cfg->flags & XILINX_FLUSH_PROP) { + u8 count; + + /* + * Flush the framebuffer FIFO and + * wait for max 50ms for flush done + */ + frmbuf_set(chan, XILINX_FRMBUF_CTRL_OFFSET, + XILINX_FRMBUF_CTRL_FLUSH); + for (count = WAIT_FOR_FLUSH_DONE; count > 0; count--) { + if (frmbuf_read(chan, XILINX_FRMBUF_CTRL_OFFSET) & + XILINX_FRMBUF_CTRL_FLUSH_DONE) + break; + usleep_range(2000, 2100); + } + + if (!count) + dev_err(chan->xdev->dev, "Framebuffer Flush not done!\n"); + } + + xilinx_frmbuf_chan_reset(chan); + + return 0; +} + +/** + * xilinx_frmbuf_synchronize - kill tasklet to stop further descr processing + * @dchan: Driver specific dma channel pointer + */ +static void xilinx_frmbuf_synchronize(struct dma_chan *dchan) +{ + struct xilinx_frmbuf_chan *chan = to_xilinx_chan(dchan); + + tasklet_kill(&chan->tasklet); +} + +/* ----------------------------------------------------------------------------- + * Probe and remove + */ + +/** + * xilinx_frmbuf_chan_remove - Per Channel remove function + * @chan: Driver specific dma channel + */ +static void xilinx_frmbuf_chan_remove(struct xilinx_frmbuf_chan *chan) +{ + /* Disable all interrupts */ + frmbuf_clr(chan, XILINX_FRMBUF_IE_OFFSET, + XILINX_FRMBUF_ISR_ALL_IRQ_MASK); + + tasklet_kill(&chan->tasklet); + list_del(&chan->common.device_node); + + mutex_lock(&frmbuf_chan_list_lock); + list_del(&chan->chan_node); + mutex_unlock(&frmbuf_chan_list_lock); +} + +/** + * xilinx_frmbuf_chan_probe - Per Channel Probing + * It get channel features from the device tree entry and + * initialize special channel handling routines + * + * @xdev: Driver specific device structure + * @node: Device node + * + * Return: '0' on success and failure value on error + */ +static int xilinx_frmbuf_chan_probe(struct xilinx_frmbuf_device *xdev, + struct device_node *node) +{ + struct xilinx_frmbuf_chan *chan; + int err; + u32 dma_addr_size = 0; + + chan = &xdev->chan; + + chan->dev = xdev->dev; + chan->xdev = xdev; + chan->idle = true; + chan->fid_err_flag = 0; + chan->fid_out_val = 0; + chan->mode = AUTO_RESTART; + + err = of_property_read_u32(node, "xlnx,dma-addr-width", + &dma_addr_size); + if (err || (dma_addr_size != 32 && dma_addr_size != 64)) { + dev_err(xdev->dev, "missing or invalid addr width dts prop\n"); + return err; + } + + if (dma_addr_size == 64 && sizeof(dma_addr_t) == sizeof(u64)) + chan->write_addr = writeq_addr; + else + chan->write_addr = write_addr; + + if (xdev->cfg->flags & XILINX_FID_PROP) + chan->hw_fid = of_property_read_bool(node, "xlnx,fid"); + + spin_lock_init(&chan->lock); + INIT_LIST_HEAD(&chan->pending_list); + INIT_LIST_HEAD(&chan->done_list); + + chan->irq = irq_of_parse_and_map(node, 0); + err = devm_request_irq(xdev->dev, chan->irq, xilinx_frmbuf_irq_handler, + IRQF_SHARED, "xilinx_framebuffer", chan); + + if (err) { + dev_err(xdev->dev, "unable to request IRQ %d\n", chan->irq); + return err; + } + + tasklet_init(&chan->tasklet, xilinx_frmbuf_do_tasklet, + (unsigned long)chan); + + /* + * Initialize the DMA channel and add it to the DMA engine channels + * list. + */ + chan->common.device = &xdev->common; + + list_add_tail(&chan->common.device_node, &xdev->common.channels); + + mutex_lock(&frmbuf_chan_list_lock); + list_add_tail(&chan->chan_node, &frmbuf_chan_list); + mutex_unlock(&frmbuf_chan_list_lock); + + xilinx_frmbuf_chan_reset(chan); + + return 0; +} + +/** + * xilinx_frmbuf_probe - Driver probe function + * @pdev: Pointer to the platform_device structure + * + * Return: '0' on success and failure value on error + */ +static int xilinx_frmbuf_probe(struct platform_device *pdev) +{ + struct device_node *node = pdev->dev.of_node; + struct xilinx_frmbuf_device *xdev; + struct resource *io; + enum dma_transfer_direction dma_dir; + const struct of_device_id *match; + int err; + u32 i, j, align, max_width, max_height; + int hw_vid_fmt_cnt; + const char *vid_fmts[ARRAY_SIZE(xilinx_frmbuf_formats)]; + + xdev = devm_kzalloc(&pdev->dev, sizeof(*xdev), GFP_KERNEL); + if (!xdev) + return -ENOMEM; + + xdev->dev = &pdev->dev; + + match = of_match_node(xilinx_frmbuf_of_ids, node); + if (!match) + return -ENODEV; + + xdev->cfg = match->data; + + dma_dir = (enum dma_transfer_direction)xdev->cfg->direction; + + if (xdev->cfg->flags & XILINX_CLK_PROP) { + xdev->ap_clk = devm_clk_get(xdev->dev, "ap_clk"); + if (IS_ERR(xdev->ap_clk)) { + err = PTR_ERR(xdev->ap_clk); + dev_err(xdev->dev, "failed to get ap_clk (%d)\n", err); + return err; + } + } else { + dev_info(xdev->dev, "assuming clock is enabled!\n"); + } + + xdev->rst_gpio = devm_gpiod_get(&pdev->dev, "reset", + GPIOD_OUT_HIGH); + if (IS_ERR(xdev->rst_gpio)) { + err = PTR_ERR(xdev->rst_gpio); + if (err == -EPROBE_DEFER) + dev_info(&pdev->dev, + "Probe deferred due to GPIO reset defer\n"); + else + dev_err(&pdev->dev, + "Unable to locate reset property in dt\n"); + return err; + } + + gpiod_set_value_cansleep(xdev->rst_gpio, 0x0); + + io = platform_get_resource(pdev, IORESOURCE_MEM, 0); + xdev->regs = devm_ioremap_resource(&pdev->dev, io); + if (IS_ERR(xdev->regs)) + return PTR_ERR(xdev->regs); + + if (xdev->cfg->flags & XILINX_THREE_PLANES_PROP) + max_height = 8640; + else + max_height = 4320; + + err = of_property_read_u32(node, "xlnx,max-height", &xdev->max_height); + if (err < 0) { + dev_err(xdev->dev, "xlnx,max-height is missing!"); + return -EINVAL; + } else if (xdev->max_height > max_height || + xdev->max_height < XILINX_FRMBUF_MIN_HEIGHT) { + dev_err(&pdev->dev, "Invalid height in dt"); + return -EINVAL; + } + + if (xdev->cfg->flags & XILINX_THREE_PLANES_PROP) + max_width = 15360; + else + max_width = 8192; + + err = of_property_read_u32(node, "xlnx,max-width", &xdev->max_width); + if (err < 0) { + dev_err(xdev->dev, "xlnx,max-width is missing!"); + return -EINVAL; + } else if (xdev->max_width > max_width || + xdev->max_width < XILINX_FRMBUF_MIN_WIDTH) { + dev_err(&pdev->dev, "Invalid width in dt"); + return -EINVAL; + } + + /* Initialize the DMA engine */ + if (xdev->cfg->flags & XILINX_PPC_PROP) { + err = of_property_read_u32(node, "xlnx,pixels-per-clock", &xdev->ppc); + if (err || (xdev->ppc != 1 && xdev->ppc != 2 && + xdev->ppc != 4 && xdev->ppc != 8)) { + dev_err(&pdev->dev, "missing or invalid pixels per clock dts prop\n"); + return err; + } + err = of_property_read_u32(node, "xlnx,dma-align", &align); + if (err) + align = xdev->ppc * XILINX_FRMBUF_ALIGN_MUL; + + if (align < (xdev->ppc * XILINX_FRMBUF_ALIGN_MUL) || + ffs(align) != fls(align)) { + dev_err(&pdev->dev, "invalid dma align dts prop\n"); + return -EINVAL; + } + } else { + align = 16; + } + + xdev->common.copy_align = (enum dmaengine_alignment)(fls(align) - 1); + xdev->common.dev = &pdev->dev; + + if (xdev->cfg->flags & XILINX_CLK_PROP) { + err = clk_prepare_enable(xdev->ap_clk); + if (err) { + dev_err(&pdev->dev, " failed to enable ap_clk (%d)\n", + err); + return err; + } + } + + INIT_LIST_HEAD(&xdev->common.channels); + dma_cap_set(DMA_SLAVE, xdev->common.cap_mask); + dma_cap_set(DMA_PRIVATE, xdev->common.cap_mask); + + /* Initialize the channels */ + err = xilinx_frmbuf_chan_probe(xdev, node); + if (err < 0) + goto disable_clk; + + xdev->chan.direction = dma_dir; + + if (xdev->chan.direction == DMA_DEV_TO_MEM) { + xdev->common.directions = BIT(DMA_DEV_TO_MEM); + dev_info(&pdev->dev, "Xilinx AXI frmbuf DMA_DEV_TO_MEM\n"); + } else if (xdev->chan.direction == DMA_MEM_TO_DEV) { + xdev->common.directions = BIT(DMA_MEM_TO_DEV); + dev_info(&pdev->dev, "Xilinx AXI frmbuf DMA_MEM_TO_DEV\n"); + } else { + err = -EINVAL; + goto remove_chan; + } + + /* read supported video formats and update internal table */ + hw_vid_fmt_cnt = of_property_count_strings(node, "xlnx,vid-formats"); + + err = of_property_read_string_array(node, "xlnx,vid-formats", + vid_fmts, hw_vid_fmt_cnt); + if (err < 0) { + dev_err(&pdev->dev, + "Missing or invalid xlnx,vid-formats dts prop\n"); + goto remove_chan; + } + + for (i = 0; i < hw_vid_fmt_cnt; i++) { + const char *vid_fmt_name = vid_fmts[i]; + + for (j = 0; j < ARRAY_SIZE(xilinx_frmbuf_formats); j++) { + const char *dts_name = + xilinx_frmbuf_formats[j].dts_name; + + if (strcmp(vid_fmt_name, dts_name)) + continue; + + xdev->enabled_vid_fmts |= + xilinx_frmbuf_formats[j].fmt_bitmask; + } + } + + /* Determine supported vid framework formats */ + frmbuf_init_format_array(xdev); + + xdev->common.device_alloc_chan_resources = + xilinx_frmbuf_alloc_chan_resources; + xdev->common.device_free_chan_resources = + xilinx_frmbuf_free_chan_resources; + xdev->common.device_prep_interleaved_dma = + xilinx_frmbuf_dma_prep_interleaved; + xdev->common.device_terminate_all = xilinx_frmbuf_terminate_all; + xdev->common.device_synchronize = xilinx_frmbuf_synchronize; + xdev->common.device_tx_status = xilinx_frmbuf_tx_status; + xdev->common.device_issue_pending = xilinx_frmbuf_issue_pending; + + platform_set_drvdata(pdev, xdev); + + /* Register the DMA engine with the core */ + dma_async_device_register(&xdev->common); + + err = of_dma_controller_register(node, of_dma_xilinx_xlate, xdev); + if (err < 0) { + dev_err(&pdev->dev, "Unable to register DMA to DT\n"); + goto error; + } + + dev_info(&pdev->dev, "Xilinx AXI FrameBuffer Engine Driver Probed!!\n"); + + return 0; +error: + dma_async_device_unregister(&xdev->common); +remove_chan: + xilinx_frmbuf_chan_remove(&xdev->chan); +disable_clk: + clk_disable_unprepare(xdev->ap_clk); + return err; +} + +/** + * xilinx_frmbuf_remove - Driver remove function + * @pdev: Pointer to the platform_device structure + * + * Return: Always '0' + */ +static int xilinx_frmbuf_remove(struct platform_device *pdev) +{ + struct xilinx_frmbuf_device *xdev = platform_get_drvdata(pdev); + + of_dma_controller_free(pdev->dev.of_node); + + dma_async_device_unregister(&xdev->common); + xilinx_frmbuf_chan_remove(&xdev->chan); + clk_disable_unprepare(xdev->ap_clk); + + return 0; +} + +MODULE_DEVICE_TABLE(of, xilinx_frmbuf_of_ids); + +static struct platform_driver xilinx_frmbuf_driver = { + .driver = { + .name = "xilinx-frmbuf", + .of_match_table = xilinx_frmbuf_of_ids, + }, + .probe = xilinx_frmbuf_probe, + .remove = xilinx_frmbuf_remove, +}; + +module_platform_driver(xilinx_frmbuf_driver); + +MODULE_AUTHOR("Xilinx, Inc."); +MODULE_DESCRIPTION("Xilinx Framebuffer driver"); +MODULE_LICENSE("GPL"); --- linux-xilinx-6.8.0.orig/drivers/dma/xilinx/zynqmp_dma.c +++ linux-xilinx-6.8.0/drivers/dma/xilinx/zynqmp_dma.c @@ -22,10 +22,10 @@ #include "../dmaengine.h" /* Register Offsets */ -#define ZYNQMP_DMA_ISR 0x100 -#define ZYNQMP_DMA_IMR 0x104 -#define ZYNQMP_DMA_IER 0x108 -#define ZYNQMP_DMA_IDS 0x10C +#define ZYNQMP_DMA_ISR (chan->irq_offset + 0x100) +#define ZYNQMP_DMA_IMR (chan->irq_offset + 0x104) +#define ZYNQMP_DMA_IER (chan->irq_offset + 0x108) +#define ZYNQMP_DMA_IDS (chan->irq_offset + 0x10c) #define ZYNQMP_DMA_CTRL0 0x110 #define ZYNQMP_DMA_CTRL1 0x114 #define ZYNQMP_DMA_DATA_ATTR 0x120 @@ -132,6 +132,9 @@ #define ZYNQMP_DMA_IDS_DEFAULT_MASK 0xFFF +/* Reset value for control reg attributes */ +#define ZYNQMP_DMA_RESET_VAL 0x80 + /* Bus width in bits */ #define ZYNQMP_DMA_BUS_WIDTH_64 64 #define ZYNQMP_DMA_BUS_WIDTH_128 128 @@ -145,6 +148,9 @@ #define tx_to_desc(tx) container_of(tx, struct zynqmp_dma_desc_sw, \ async_tx) +/* IRQ Register offset for Versal Gen 2 */ +#define IRQ_REG_OFFSET 0x308 + /** * struct zynqmp_dma_desc_ll - Hw linked list descriptor * @addr: Buffer address @@ -211,6 +217,7 @@ * @bus_width: Bus width * @src_burst_len: Source burst length * @dst_burst_len: Dest burst length + * @irq_offset: Irq register offset */ struct zynqmp_dma_chan { struct zynqmp_dma_device *zdev; @@ -235,6 +242,7 @@ u32 bus_width; u32 src_burst_len; u32 dst_burst_len; + u32 irq_offset; }; /** @@ -253,6 +261,14 @@ struct clk *clk_apb; }; +struct zynqmp_dma_config { + u32 offset; +}; + +static const struct zynqmp_dma_config versal2_dma_config = { + .offset = IRQ_REG_OFFSET, +}; + static inline void zynqmp_dma_writeq(struct zynqmp_dma_chan *chan, u32 reg, u64 value) { @@ -337,6 +353,9 @@ val = readl(chan->regs + ZYNQMP_DMA_ISR); writel(val, chan->regs + ZYNQMP_DMA_ISR); + if (readl(chan->regs + ZYNQMP_DMA_CTRL0) != ZYNQMP_DMA_RESET_VAL) + writel(ZYNQMP_DMA_RESET_VAL, chan->regs + ZYNQMP_DMA_CTRL0); + if (chan->is_dmacoherent) { val = ZYNQMP_DMA_AXCOHRNT; val = (val & ~ZYNQMP_DMA_AXCACHE) | @@ -892,6 +911,7 @@ { struct zynqmp_dma_chan *chan; struct device_node *node = pdev->dev.of_node; + const struct zynqmp_dma_config *match_data; int err; chan = devm_kzalloc(zdev->dev, sizeof(*chan), GFP_KERNEL); @@ -919,6 +939,10 @@ return -EINVAL; } + match_data = of_device_get_match_data(&pdev->dev); + if (match_data) + chan->irq_offset = match_data->offset; + chan->is_dmacoherent = of_property_read_bool(node, "dma-coherent"); zdev->chan = chan; tasklet_setup(&chan->tasklet, zynqmp_dma_do_tasklet); @@ -1161,6 +1185,7 @@ } static const struct of_device_id zynqmp_dma_of_match[] = { + { .compatible = "amd,versal2-dma-1.0", .data = &versal2_dma_config }, { .compatible = "xlnx,zynqmp-dma-1.0", }, {} }; --- linux-xilinx-6.8.0.orig/drivers/dpll/Kconfig +++ linux-xilinx-6.8.0/drivers/dpll/Kconfig @@ -4,4 +4,4 @@ # config DPLL - bool + bool --- linux-xilinx-6.8.0.orig/drivers/dpll/dpll_core.c +++ linux-xilinx-6.8.0/drivers/dpll/dpll_core.c @@ -29,6 +29,8 @@ WARN_ON_ONCE(!xa_get_mark(&dpll_device_xa, (d)->id, DPLL_REGISTERED)) #define ASSERT_DPLL_NOT_REGISTERED(d) \ WARN_ON_ONCE(xa_get_mark(&dpll_device_xa, (d)->id, DPLL_REGISTERED)) +#define ASSERT_DPLL_PIN_REGISTERED(p) \ + WARN_ON_ONCE(!xa_get_mark(&dpll_pin_xa, (p)->id, DPLL_REGISTERED)) struct dpll_device_registration { struct list_head list; @@ -40,6 +42,7 @@ struct list_head list; const struct dpll_pin_ops *ops; void *priv; + void *cookie; }; struct dpll_device *dpll_device_get_by_id(int id) @@ -52,12 +55,14 @@ static struct dpll_pin_registration * dpll_pin_registration_find(struct dpll_pin_ref *ref, - const struct dpll_pin_ops *ops, void *priv) + const struct dpll_pin_ops *ops, void *priv, + void *cookie) { struct dpll_pin_registration *reg; list_for_each_entry(reg, &ref->registration_list, list) { - if (reg->ops == ops && reg->priv == priv) + if (reg->ops == ops && reg->priv == priv && + reg->cookie == cookie) return reg; } return NULL; @@ -65,7 +70,8 @@ static int dpll_xa_ref_pin_add(struct xarray *xa_pins, struct dpll_pin *pin, - const struct dpll_pin_ops *ops, void *priv) + const struct dpll_pin_ops *ops, void *priv, + void *cookie) { struct dpll_pin_registration *reg; struct dpll_pin_ref *ref; @@ -76,7 +82,7 @@ xa_for_each(xa_pins, i, ref) { if (ref->pin != pin) continue; - reg = dpll_pin_registration_find(ref, ops, priv); + reg = dpll_pin_registration_find(ref, ops, priv, cookie); if (reg) { refcount_inc(&ref->refcount); return 0; @@ -109,6 +115,7 @@ } reg->ops = ops; reg->priv = priv; + reg->cookie = cookie; if (ref_exists) refcount_inc(&ref->refcount); list_add_tail(®->list, &ref->registration_list); @@ -117,7 +124,8 @@ } static int dpll_xa_ref_pin_del(struct xarray *xa_pins, struct dpll_pin *pin, - const struct dpll_pin_ops *ops, void *priv) + const struct dpll_pin_ops *ops, void *priv, + void *cookie) { struct dpll_pin_registration *reg; struct dpll_pin_ref *ref; @@ -126,12 +134,12 @@ xa_for_each(xa_pins, i, ref) { if (ref->pin != pin) continue; - reg = dpll_pin_registration_find(ref, ops, priv); + reg = dpll_pin_registration_find(ref, ops, priv, cookie); if (WARN_ON(!reg)) return -EINVAL; + list_del(®->list); + kfree(reg); if (refcount_dec_and_test(&ref->refcount)) { - list_del(®->list); - kfree(reg); xa_erase(xa_pins, i); WARN_ON(!list_empty(&ref->registration_list)); kfree(ref); @@ -144,7 +152,7 @@ static int dpll_xa_ref_dpll_add(struct xarray *xa_dplls, struct dpll_device *dpll, - const struct dpll_pin_ops *ops, void *priv) + const struct dpll_pin_ops *ops, void *priv, void *cookie) { struct dpll_pin_registration *reg; struct dpll_pin_ref *ref; @@ -155,7 +163,7 @@ xa_for_each(xa_dplls, i, ref) { if (ref->dpll != dpll) continue; - reg = dpll_pin_registration_find(ref, ops, priv); + reg = dpll_pin_registration_find(ref, ops, priv, cookie); if (reg) { refcount_inc(&ref->refcount); return 0; @@ -188,6 +196,7 @@ } reg->ops = ops; reg->priv = priv; + reg->cookie = cookie; if (ref_exists) refcount_inc(&ref->refcount); list_add_tail(®->list, &ref->registration_list); @@ -197,7 +206,7 @@ static void dpll_xa_ref_dpll_del(struct xarray *xa_dplls, struct dpll_device *dpll, - const struct dpll_pin_ops *ops, void *priv) + const struct dpll_pin_ops *ops, void *priv, void *cookie) { struct dpll_pin_registration *reg; struct dpll_pin_ref *ref; @@ -206,12 +215,12 @@ xa_for_each(xa_dplls, i, ref) { if (ref->dpll != dpll) continue; - reg = dpll_pin_registration_find(ref, ops, priv); + reg = dpll_pin_registration_find(ref, ops, priv, cookie); if (WARN_ON(!reg)) return; + list_del(®->list); + kfree(reg); if (refcount_dec_and_test(&ref->refcount)) { - list_del(®->list); - kfree(reg); xa_erase(xa_dplls, i); WARN_ON(!list_empty(&ref->registration_list)); kfree(ref); @@ -440,7 +449,7 @@ sizeof(*src->freq_supported); dst->freq_supported = kmemdup(src->freq_supported, freq_size, GFP_KERNEL); - if (!src->freq_supported) + if (!dst->freq_supported) return -ENOMEM; } if (src->board_label) { @@ -592,14 +601,14 @@ static int __dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin, - const struct dpll_pin_ops *ops, void *priv) + const struct dpll_pin_ops *ops, void *priv, void *cookie) { int ret; - ret = dpll_xa_ref_pin_add(&dpll->pin_refs, pin, ops, priv); + ret = dpll_xa_ref_pin_add(&dpll->pin_refs, pin, ops, priv, cookie); if (ret) return ret; - ret = dpll_xa_ref_dpll_add(&pin->dpll_refs, dpll, ops, priv); + ret = dpll_xa_ref_dpll_add(&pin->dpll_refs, dpll, ops, priv, cookie); if (ret) goto ref_pin_del; xa_set_mark(&dpll_pin_xa, pin->id, DPLL_REGISTERED); @@ -608,7 +617,7 @@ return ret; ref_pin_del: - dpll_xa_ref_pin_del(&dpll->pin_refs, pin, ops, priv); + dpll_xa_ref_pin_del(&dpll->pin_refs, pin, ops, priv, cookie); return ret; } @@ -640,7 +649,7 @@ dpll->clock_id == pin->clock_id))) ret = -EINVAL; else - ret = __dpll_pin_register(dpll, pin, ops, priv); + ret = __dpll_pin_register(dpll, pin, ops, priv, NULL); mutex_unlock(&dpll_lock); return ret; @@ -649,10 +658,11 @@ static void __dpll_pin_unregister(struct dpll_device *dpll, struct dpll_pin *pin, - const struct dpll_pin_ops *ops, void *priv) + const struct dpll_pin_ops *ops, void *priv, void *cookie) { - dpll_xa_ref_pin_del(&dpll->pin_refs, pin, ops, priv); - dpll_xa_ref_dpll_del(&pin->dpll_refs, dpll, ops, priv); + ASSERT_DPLL_PIN_REGISTERED(pin); + dpll_xa_ref_pin_del(&dpll->pin_refs, pin, ops, priv, cookie); + dpll_xa_ref_dpll_del(&pin->dpll_refs, dpll, ops, priv, cookie); if (xa_empty(&pin->dpll_refs)) xa_clear_mark(&dpll_pin_xa, pin->id, DPLL_REGISTERED); } @@ -677,7 +687,7 @@ mutex_lock(&dpll_lock); dpll_pin_delete_ntf(pin); - __dpll_pin_unregister(dpll, pin, ops, priv); + __dpll_pin_unregister(dpll, pin, ops, priv, NULL); mutex_unlock(&dpll_lock); } EXPORT_SYMBOL_GPL(dpll_pin_unregister); @@ -713,12 +723,12 @@ return -EINVAL; mutex_lock(&dpll_lock); - ret = dpll_xa_ref_pin_add(&pin->parent_refs, parent, ops, priv); + ret = dpll_xa_ref_pin_add(&pin->parent_refs, parent, ops, priv, pin); if (ret) goto unlock; refcount_inc(&pin->refcount); xa_for_each(&parent->dpll_refs, i, ref) { - ret = __dpll_pin_register(ref->dpll, pin, ops, priv); + ret = __dpll_pin_register(ref->dpll, pin, ops, priv, parent); if (ret) { stop = i; goto dpll_unregister; @@ -732,11 +742,12 @@ dpll_unregister: xa_for_each(&parent->dpll_refs, i, ref) if (i < stop) { - __dpll_pin_unregister(ref->dpll, pin, ops, priv); + __dpll_pin_unregister(ref->dpll, pin, ops, priv, + parent); dpll_pin_delete_ntf(pin); } refcount_dec(&pin->refcount); - dpll_xa_ref_pin_del(&pin->parent_refs, parent, ops, priv); + dpll_xa_ref_pin_del(&pin->parent_refs, parent, ops, priv, pin); unlock: mutex_unlock(&dpll_lock); return ret; @@ -761,10 +772,10 @@ mutex_lock(&dpll_lock); dpll_pin_delete_ntf(pin); - dpll_xa_ref_pin_del(&pin->parent_refs, parent, ops, priv); + dpll_xa_ref_pin_del(&pin->parent_refs, parent, ops, priv, pin); refcount_dec(&pin->refcount); xa_for_each(&pin->dpll_refs, i, ref) - __dpll_pin_unregister(ref->dpll, pin, ops, priv); + __dpll_pin_unregister(ref->dpll, pin, ops, priv, parent); mutex_unlock(&dpll_lock); } EXPORT_SYMBOL_GPL(dpll_pin_on_pin_unregister); --- linux-xilinx-6.8.0.orig/drivers/dpll/dpll_netlink.c +++ linux-xilinx-6.8.0/drivers/dpll/dpll_netlink.c @@ -335,6 +335,51 @@ return 0; } +static int +dpll_msg_add_pin_esync(struct sk_buff *msg, struct dpll_pin *pin, + struct dpll_pin_ref *ref, struct netlink_ext_ack *extack) +{ + const struct dpll_pin_ops *ops = dpll_pin_ops(ref); + struct dpll_device *dpll = ref->dpll; + struct dpll_pin_esync esync; + struct nlattr *nest; + int ret, i; + + if (!ops->esync_get) + return 0; + ret = ops->esync_get(pin, dpll_pin_on_dpll_priv(dpll, pin), dpll, + dpll_priv(dpll), &esync, extack); + if (ret == -EOPNOTSUPP) + return 0; + else if (ret) + return ret; + if (nla_put_64bit(msg, DPLL_A_PIN_ESYNC_FREQUENCY, sizeof(esync.freq), + &esync.freq, DPLL_A_PIN_PAD)) + return -EMSGSIZE; + if (nla_put_u32(msg, DPLL_A_PIN_ESYNC_PULSE, esync.pulse)) + return -EMSGSIZE; + for (i = 0; i < esync.range_num; i++) { + nest = nla_nest_start(msg, + DPLL_A_PIN_ESYNC_FREQUENCY_SUPPORTED); + if (!nest) + return -EMSGSIZE; + if (nla_put_64bit(msg, DPLL_A_PIN_FREQUENCY_MIN, + sizeof(esync.range[i].min), + &esync.range[i].min, DPLL_A_PIN_PAD)) + goto nest_cancel; + if (nla_put_64bit(msg, DPLL_A_PIN_FREQUENCY_MAX, + sizeof(esync.range[i].max), + &esync.range[i].max, DPLL_A_PIN_PAD)) + goto nest_cancel; + nla_nest_end(msg, nest); + } + return 0; + +nest_cancel: + nla_nest_cancel(msg, nest); + return -EMSGSIZE; +} + static bool dpll_pin_is_freq_supported(struct dpll_pin *pin, u32 freq) { int fs; @@ -476,6 +521,9 @@ ret = dpll_msg_add_ffo(msg, pin, ref, extack); if (ret) return ret; + ret = dpll_msg_add_pin_esync(msg, pin, ref, extack); + if (ret) + return ret; if (xa_empty(&pin->parent_refs)) ret = dpll_msg_add_pin_dplls(msg, pin, extack); else @@ -732,6 +780,83 @@ } static int +dpll_pin_esync_set(struct dpll_pin *pin, struct nlattr *a, + struct netlink_ext_ack *extack) +{ + struct dpll_pin_ref *ref, *failed; + const struct dpll_pin_ops *ops; + struct dpll_pin_esync esync; + u64 freq = nla_get_u64(a); + struct dpll_device *dpll; + bool supported = false; + unsigned long i; + int ret; + + xa_for_each(&pin->dpll_refs, i, ref) { + ops = dpll_pin_ops(ref); + if (!ops->esync_set || !ops->esync_get) { + NL_SET_ERR_MSG(extack, + "embedded sync feature is not supported by this device"); + return -EOPNOTSUPP; + } + } + ref = dpll_xa_ref_dpll_first(&pin->dpll_refs); + ops = dpll_pin_ops(ref); + dpll = ref->dpll; + ret = ops->esync_get(pin, dpll_pin_on_dpll_priv(dpll, pin), dpll, + dpll_priv(dpll), &esync, extack); + if (ret) { + NL_SET_ERR_MSG(extack, "unable to get current embedded sync frequency value"); + return ret; + } + if (freq == esync.freq) + return 0; + for (i = 0; i < esync.range_num; i++) + if (freq <= esync.range[i].max && freq >= esync.range[i].min) + supported = true; + if (!supported) { + NL_SET_ERR_MSG_ATTR(extack, a, + "requested embedded sync frequency value is not supported by this device"); + return -EINVAL; + } + + xa_for_each(&pin->dpll_refs, i, ref) { + void *pin_dpll_priv; + + ops = dpll_pin_ops(ref); + dpll = ref->dpll; + pin_dpll_priv = dpll_pin_on_dpll_priv(dpll, pin); + ret = ops->esync_set(pin, pin_dpll_priv, dpll, dpll_priv(dpll), + freq, extack); + if (ret) { + failed = ref; + NL_SET_ERR_MSG_FMT(extack, + "embedded sync frequency set failed for dpll_id: %u", + dpll->id); + goto rollback; + } + } + __dpll_pin_change_ntf(pin); + + return 0; + +rollback: + xa_for_each(&pin->dpll_refs, i, ref) { + void *pin_dpll_priv; + + if (ref == failed) + break; + ops = dpll_pin_ops(ref); + dpll = ref->dpll; + pin_dpll_priv = dpll_pin_on_dpll_priv(dpll, pin); + if (ops->esync_set(pin, pin_dpll_priv, dpll, dpll_priv(dpll), + esync.freq, extack)) + NL_SET_ERR_MSG(extack, "set embedded sync frequency rollback failed"); + } + return ret; +} + +static int dpll_pin_on_pin_state_set(struct dpll_pin *pin, u32 parent_idx, enum dpll_pin_state state, struct netlink_ext_ack *extack) @@ -1032,6 +1157,11 @@ if (ret) return ret; break; + case DPLL_A_PIN_ESYNC_FREQUENCY: + ret = dpll_pin_esync_set(pin, a, info->extack); + if (ret) + return ret; + break; } } --- linux-xilinx-6.8.0.orig/drivers/dpll/dpll_nl.c +++ linux-xilinx-6.8.0/drivers/dpll/dpll_nl.c @@ -62,7 +62,7 @@ }; /* DPLL_CMD_PIN_SET - do */ -static const struct nla_policy dpll_pin_set_nl_policy[DPLL_A_PIN_PHASE_ADJUST + 1] = { +static const struct nla_policy dpll_pin_set_nl_policy[DPLL_A_PIN_ESYNC_FREQUENCY + 1] = { [DPLL_A_PIN_ID] = { .type = NLA_U32, }, [DPLL_A_PIN_FREQUENCY] = { .type = NLA_U64, }, [DPLL_A_PIN_DIRECTION] = NLA_POLICY_RANGE(NLA_U32, 1, 2), @@ -71,6 +71,7 @@ [DPLL_A_PIN_PARENT_DEVICE] = NLA_POLICY_NESTED(dpll_pin_parent_device_nl_policy), [DPLL_A_PIN_PARENT_PIN] = NLA_POLICY_NESTED(dpll_pin_parent_pin_nl_policy), [DPLL_A_PIN_PHASE_ADJUST] = { .type = NLA_S32, }, + [DPLL_A_PIN_ESYNC_FREQUENCY] = { .type = NLA_U64, }, }; /* Ops table for dpll */ @@ -138,7 +139,7 @@ .doit = dpll_nl_pin_set_doit, .post_doit = dpll_pin_post_doit, .policy = dpll_pin_set_nl_policy, - .maxattr = DPLL_A_PIN_PHASE_ADJUST, + .maxattr = DPLL_A_PIN_ESYNC_FREQUENCY, .flags = GENL_ADMIN_PERM | GENL_CMD_CAP_DO, }, }; --- linux-xilinx-6.8.0.orig/drivers/edac/Kconfig +++ linux-xilinx-6.8.0/drivers/edac/Kconfig @@ -573,4 +573,20 @@ for debugging purposes. +config EDAC_XILINX_XILSEM + tristate "Xilinx Versal XilSEM Controller" + depends on ARCH_ZYNQMP && ZYNQMP_FIRMWARE + help + Support for handling error events on the Xilinx Versal Xilsem + controller. + + Xilinx Versal Soft Error Mitigation (XilSEM) is part of the + Platform Loader and Manager (PLM) which is loaded into and runs on the + Platform Management Controller (PMC). XilSEM is responsible for detecting + and optionally correcting soft errors in Configuration Memory of Versal. + Whenever an error is detected, be it correctable or uncorrectable, XilSEM + reports the errors to user application. + This driver is responsible for handling the reported correctable and + uncorrectable errors. + endif # EDAC --- linux-xilinx-6.8.0.orig/drivers/edac/Makefile +++ linux-xilinx-6.8.0/drivers/edac/Makefile @@ -54,11 +54,13 @@ layerscape_edac_mod-y := fsl_ddr_edac.o layerscape_edac.o obj-$(CONFIG_EDAC_LAYERSCAPE) += layerscape_edac_mod.o -skx_edac-y := skx_common.o skx_base.o -obj-$(CONFIG_EDAC_SKX) += skx_edac.o +skx_edac_common-y := skx_common.o -i10nm_edac-y := skx_common.o i10nm_base.o -obj-$(CONFIG_EDAC_I10NM) += i10nm_edac.o +skx_edac-y := skx_base.o +obj-$(CONFIG_EDAC_SKX) += skx_edac.o skx_edac_common.o + +i10nm_edac-y := i10nm_base.o +obj-$(CONFIG_EDAC_I10NM) += i10nm_edac.o skx_edac_common.o obj-$(CONFIG_EDAC_CELL) += cell_edac.o obj-$(CONFIG_EDAC_PPC4XX) += ppc4xx_edac.o @@ -83,6 +85,7 @@ obj-$(CONFIG_EDAC_QCOM) += qcom_edac.o obj-$(CONFIG_EDAC_ASPEED) += aspeed_edac.o obj-$(CONFIG_EDAC_BLUEFIELD) += bluefield_edac.o +obj-$(CONFIG_EDAC_XILINX_XILSEM) += xilinx_xilsem_edac.o obj-$(CONFIG_EDAC_DMC520) += dmc520_edac.o obj-$(CONFIG_EDAC_NPCM) += npcm_edac.o obj-$(CONFIG_EDAC_ZYNQMP) += zynqmp_edac.o --- linux-xilinx-6.8.0.orig/drivers/edac/amd64_edac.c +++ linux-xilinx-6.8.0/drivers/edac/amd64_edac.c @@ -80,7 +80,7 @@ amd64_warn("%s: error reading F%dx%03x.\n", func, PCI_FUNC(pdev->devfn), offset); - return err; + return pcibios_err_to_errno(err); } int __amd64_write_pci_cfg_dword(struct pci_dev *pdev, int offset, @@ -93,7 +93,7 @@ amd64_warn("%s: error writing to F%dx%03x.\n", func, PCI_FUNC(pdev->devfn), offset); - return err; + return pcibios_err_to_errno(err); } /* @@ -1024,8 +1024,10 @@ } ret = pci_read_config_dword(pdev, REG_LOCAL_NODE_TYPE_MAP, &tmp); - if (ret) + if (ret) { + ret = pcibios_err_to_errno(ret); goto out; + } gpu_node_map.node_count = FIELD_GET(LNTM_NODE_COUNT, tmp); gpu_node_map.base_node_id = FIELD_GET(LNTM_BASE_NODE_ID, tmp); @@ -3626,36 +3628,24 @@ static bool umc_ecc_enabled(struct amd64_pvt *pvt) { - u8 umc_en_mask = 0, ecc_en_mask = 0; - u16 nid = pvt->mc_node_id; struct amd64_umc *umc; - u8 ecc_en = 0, i; + bool ecc_en = false; + int i; + /* Check whether at least one UMC is enabled: */ for_each_umc(i) { umc = &pvt->umc[i]; - /* Only check enabled UMCs. */ - if (!(umc->sdp_ctrl & UMC_SDP_INIT)) - continue; - - umc_en_mask |= BIT(i); - - if (umc->umc_cap_hi & UMC_ECC_ENABLED) - ecc_en_mask |= BIT(i); + if (umc->sdp_ctrl & UMC_SDP_INIT && + umc->umc_cap_hi & UMC_ECC_ENABLED) { + ecc_en = true; + break; + } } - /* Check whether at least one UMC is enabled: */ - if (umc_en_mask) - ecc_en = umc_en_mask == ecc_en_mask; - else - edac_dbg(0, "Node %d: No enabled UMCs.\n", nid); + edac_dbg(3, "Node %d: DRAM ECC %s.\n", pvt->mc_node_id, (ecc_en ? "enabled" : "disabled")); - edac_dbg(3, "Node %d: DRAM ECC %s.\n", nid, (ecc_en ? "enabled" : "disabled")); - - if (!ecc_en) - return false; - else - return true; + return ecc_en; } static inline void --- linux-xilinx-6.8.0.orig/drivers/edac/bluefield_edac.c +++ linux-xilinx-6.8.0/drivers/edac/bluefield_edac.c @@ -180,7 +180,7 @@ static void bluefield_edac_init_dimms(struct mem_ctl_info *mci) { struct bluefield_edac_priv *priv = mci->pvt_info; - int mem_ctrl_idx = mci->mc_idx; + u64 mem_ctrl_idx = mci->mc_idx; struct dimm_info *dimm; u64 smc_info, smc_arg; int is_empty = 1, i; --- linux-xilinx-6.8.0.orig/drivers/edac/fsl_ddr_edac.c +++ linux-xilinx-6.8.0/drivers/edac/fsl_ddr_edac.c @@ -328,21 +328,25 @@ * TODO: Add support for 32-bit wide buses */ if ((err_detect & DDR_EDE_SBE) && (bus_width == 64)) { + u64 cap = (u64)cap_high << 32 | cap_low; + u32 s = syndrome; + sbe_ecc_decode(cap_high, cap_low, syndrome, &bad_data_bit, &bad_ecc_bit); - if (bad_data_bit != -1) - fsl_mc_printk(mci, KERN_ERR, - "Faulty Data bit: %d\n", bad_data_bit); - if (bad_ecc_bit != -1) - fsl_mc_printk(mci, KERN_ERR, - "Faulty ECC bit: %d\n", bad_ecc_bit); + if (bad_data_bit >= 0) { + fsl_mc_printk(mci, KERN_ERR, "Faulty Data bit: %d\n", bad_data_bit); + cap ^= 1ULL << bad_data_bit; + } + + if (bad_ecc_bit >= 0) { + fsl_mc_printk(mci, KERN_ERR, "Faulty ECC bit: %d\n", bad_ecc_bit); + s ^= 1 << bad_ecc_bit; + } fsl_mc_printk(mci, KERN_ERR, "Expected Data / ECC:\t%#8.8x_%08x / %#2.2x\n", - cap_high ^ (1 << (bad_data_bit - 32)), - cap_low ^ (1 << bad_data_bit), - syndrome ^ (1 << bad_ecc_bit)); + upper_32_bits(cap), lower_32_bits(cap), s); } fsl_mc_printk(mci, KERN_ERR, --- linux-xilinx-6.8.0.orig/drivers/edac/i10nm_base.c +++ linux-xilinx-6.8.0/drivers/edac/i10nm_base.c @@ -1088,6 +1088,7 @@ return -ENODEV; cfg = (struct res_config *)id->driver_data; + skx_set_res_cfg(cfg); res_cfg = cfg; rc = skx_get_hi_lo(0x09a2, off, &tolm, &tohm); --- linux-xilinx-6.8.0.orig/drivers/edac/igen6_edac.c +++ linux-xilinx-6.8.0/drivers/edac/igen6_edac.c @@ -257,6 +257,11 @@ #define DID_MTL_P_SKU2 0x7d02 #define DID_MTL_P_SKU3 0x7d14 +/* Compute die IDs for Arrow Lake-UH with IBECC */ +#define DID_ARL_UH_SKU1 0x7d06 +#define DID_ARL_UH_SKU2 0x7d20 +#define DID_ARL_UH_SKU3 0x7d30 + static int get_mchbar(struct pci_dev *pdev, u64 *mchbar) { union { @@ -310,7 +315,7 @@ if (igen6_tom <= _4GB) return eaddr + igen6_tolud - _4GB; - if (eaddr < _4GB) + if (eaddr >= igen6_tom) return eaddr + igen6_tolud - igen6_tom; return eaddr; @@ -595,6 +600,9 @@ { PCI_VDEVICE(INTEL, DID_MTL_P_SKU1), (kernel_ulong_t)&mtl_p_cfg }, { PCI_VDEVICE(INTEL, DID_MTL_P_SKU2), (kernel_ulong_t)&mtl_p_cfg }, { PCI_VDEVICE(INTEL, DID_MTL_P_SKU3), (kernel_ulong_t)&mtl_p_cfg }, + { PCI_VDEVICE(INTEL, DID_ARL_UH_SKU1), (kernel_ulong_t)&mtl_p_cfg }, + { PCI_VDEVICE(INTEL, DID_ARL_UH_SKU2), (kernel_ulong_t)&mtl_p_cfg }, + { PCI_VDEVICE(INTEL, DID_ARL_UH_SKU3), (kernel_ulong_t)&mtl_p_cfg }, { }, }; MODULE_DEVICE_TABLE(pci, igen6_pci_tbl); @@ -798,7 +806,7 @@ rc = pci_read_config_word(imc->pdev, ERRCMD_OFFSET, &errcmd); if (rc) - return rc; + return pcibios_err_to_errno(rc); if (enable) errcmd |= ERRCMD_CE | ERRSTS_UE; @@ -807,7 +815,7 @@ rc = pci_write_config_word(imc->pdev, ERRCMD_OFFSET, errcmd); if (rc) - return rc; + return pcibios_err_to_errno(rc); return 0; } @@ -1235,6 +1243,7 @@ imc->mci = mci; return 0; fail3: + mci->pvt_info = NULL; kfree(mci->ctl_name); fail2: edac_mc_free(mci); @@ -1259,6 +1268,7 @@ edac_mc_del_mc(mci->pdev); kfree(mci->ctl_name); + mci->pvt_info = NULL; edac_mc_free(mci); iounmap(imc->window); } --- linux-xilinx-6.8.0.orig/drivers/edac/qcom_edac.c +++ linux-xilinx-6.8.0/drivers/edac/qcom_edac.c @@ -95,7 +95,7 @@ * Configure interrupt enable registers such that Tag, Data RAM related * interrupts are propagated to interrupt controller for servicing */ - ret = regmap_update_bits(llcc_bcast_regmap, drv->edac_reg_offset->cmn_interrupt_2_enable, + ret = regmap_update_bits(llcc_bcast_regmap, drv->edac_reg_offset->cmn_interrupt_0_enable, TRP0_INTERRUPT_ENABLE, TRP0_INTERRUPT_ENABLE); if (ret) @@ -113,7 +113,7 @@ if (ret) return ret; - ret = regmap_update_bits(llcc_bcast_regmap, drv->edac_reg_offset->cmn_interrupt_2_enable, + ret = regmap_update_bits(llcc_bcast_regmap, drv->edac_reg_offset->cmn_interrupt_0_enable, DRP0_INTERRUPT_ENABLE, DRP0_INTERRUPT_ENABLE); if (ret) @@ -342,9 +342,11 @@ int ecc_irq; int rc; - rc = qcom_llcc_core_setup(llcc_driv_data, llcc_driv_data->bcast_regmap); - if (rc) - return rc; + if (!llcc_driv_data->ecc_irq_configured) { + rc = qcom_llcc_core_setup(llcc_driv_data, llcc_driv_data->bcast_regmap); + if (rc) + return rc; + } /* Allocate edac control info */ edev_ctl = edac_device_alloc_ctl_info(0, "qcom-llcc", 1, "bank", --- linux-xilinx-6.8.0.orig/drivers/edac/skx_common.c +++ linux-xilinx-6.8.0/drivers/edac/skx_common.c @@ -47,8 +47,9 @@ static u64 skx_tolm, skx_tohm; static LIST_HEAD(dev_edac_list); static bool skx_mem_cfg_2lm; +static struct res_config *skx_res_cfg; -int __init skx_adxl_get(void) +int skx_adxl_get(void) { const char * const *names; int i, j; @@ -110,14 +111,16 @@ return -ENODEV; } +EXPORT_SYMBOL_GPL(skx_adxl_get); -void __exit skx_adxl_put(void) +void skx_adxl_put(void) { kfree(adxl_values); kfree(adxl_msg); } +EXPORT_SYMBOL_GPL(skx_adxl_put); -static bool skx_adxl_decode(struct decoded_addr *res, bool error_in_1st_level_mem) +static bool skx_adxl_decode(struct decoded_addr *res, enum error_source err_src) { struct skx_dev *d; int i, len = 0; @@ -133,8 +136,24 @@ return false; } + /* + * GNR with a Flat2LM memory configuration may mistakenly classify + * a near-memory error(DDR5) as a far-memory error(CXL), resulting + * in the incorrect selection of decoded ADXL components. + * To address this, prefetch the decoded far-memory controller ID + * and adjust the error source to near-memory if the far-memory + * controller ID is invalid. + */ + if (skx_res_cfg && skx_res_cfg->type == GNR && err_src == ERR_SRC_2LM_FM) { + res->imc = (int)adxl_values[component_indices[INDEX_MEMCTRL]]; + if (res->imc == -1) { + err_src = ERR_SRC_2LM_NM; + edac_dbg(0, "Adjust the error source to near-memory.\n"); + } + } + res->socket = (int)adxl_values[component_indices[INDEX_SOCKET]]; - if (error_in_1st_level_mem) { + if (err_src == ERR_SRC_2LM_NM) { res->imc = (adxl_nm_bitmap & BIT_NM_MEMCTRL) ? (int)adxl_values[component_indices[INDEX_NM_MEMCTRL]] : -1; res->channel = (adxl_nm_bitmap & BIT_NM_CHANNEL) ? @@ -187,12 +206,20 @@ { skx_mem_cfg_2lm = mem_cfg_2lm; } +EXPORT_SYMBOL_GPL(skx_set_mem_cfg); + +void skx_set_res_cfg(struct res_config *cfg) +{ + skx_res_cfg = cfg; +} +EXPORT_SYMBOL_GPL(skx_set_res_cfg); void skx_set_decode(skx_decode_f decode, skx_show_retry_log_f show_retry_log) { driver_decode = decode; skx_show_retry_rd_err_log = show_retry_log; } +EXPORT_SYMBOL_GPL(skx_set_decode); int skx_get_src_id(struct skx_dev *d, int off, u8 *id) { @@ -206,6 +233,7 @@ *id = GET_BITFIELD(reg, 12, 14); return 0; } +EXPORT_SYMBOL_GPL(skx_get_src_id); int skx_get_node_id(struct skx_dev *d, u8 *id) { @@ -219,6 +247,7 @@ *id = GET_BITFIELD(reg, 0, 2); return 0; } +EXPORT_SYMBOL_GPL(skx_get_node_id); static int get_width(u32 mtr) { @@ -284,6 +313,7 @@ *list = &dev_edac_list; return ndev; } +EXPORT_SYMBOL_GPL(skx_get_all_bus_mappings); int skx_get_hi_lo(unsigned int did, int off[], u64 *tolm, u64 *tohm) { @@ -323,6 +353,7 @@ pci_dev_put(pdev); return -ENODEV; } +EXPORT_SYMBOL_GPL(skx_get_hi_lo); static int skx_get_dimm_attr(u32 reg, int lobit, int hibit, int add, int minval, int maxval, const char *name) @@ -394,6 +425,7 @@ return 1; } +EXPORT_SYMBOL_GPL(skx_get_dimm_info); int skx_get_nvdimm_info(struct dimm_info *dimm, struct skx_imc *imc, int chan, int dimmno, const char *mod_str) @@ -442,6 +474,7 @@ return (size == 0 || size == ~0ull) ? 0 : 1; } +EXPORT_SYMBOL_GPL(skx_get_nvdimm_info); int skx_register_mci(struct skx_imc *imc, struct pci_dev *pdev, const char *ctl_name, const char *mod_str, @@ -512,6 +545,7 @@ imc->mci = NULL; return rc; } +EXPORT_SYMBOL_GPL(skx_register_mci); static void skx_unregister_mci(struct skx_imc *imc) { @@ -609,31 +643,27 @@ optype, skx_msg); } -static bool skx_error_in_1st_level_mem(const struct mce *m) +static enum error_source skx_error_source(const struct mce *m) { - u32 errcode; + u32 errcode = GET_BITFIELD(m->status, 0, 15) & MCACOD_MEM_ERR_MASK; - if (!skx_mem_cfg_2lm) - return false; - - errcode = GET_BITFIELD(m->status, 0, 15) & MCACOD_MEM_ERR_MASK; - - return errcode == MCACOD_EXT_MEM_ERR; -} + if (errcode != MCACOD_MEM_CTL_ERR && errcode != MCACOD_EXT_MEM_ERR) + return ERR_SRC_NOT_MEMORY; -static bool skx_error_in_mem(const struct mce *m) -{ - u32 errcode; + if (!skx_mem_cfg_2lm) + return ERR_SRC_1LM; - errcode = GET_BITFIELD(m->status, 0, 15) & MCACOD_MEM_ERR_MASK; + if (errcode == MCACOD_EXT_MEM_ERR) + return ERR_SRC_2LM_NM; - return (errcode == MCACOD_MEM_CTL_ERR || errcode == MCACOD_EXT_MEM_ERR); + return ERR_SRC_2LM_FM; } int skx_mce_check_error(struct notifier_block *nb, unsigned long val, void *data) { struct mce *mce = (struct mce *)data; + enum error_source err_src; struct decoded_addr res; struct mem_ctl_info *mci; char *type; @@ -641,14 +671,16 @@ if (mce->kflags & MCE_HANDLED_CEC) return NOTIFY_DONE; + err_src = skx_error_source(mce); + /* Ignore unless this is memory related with an address */ - if (!skx_error_in_mem(mce) || !(mce->status & MCI_STATUS_ADDRV)) + if (err_src == ERR_SRC_NOT_MEMORY || !(mce->status & MCI_STATUS_ADDRV)) return NOTIFY_DONE; memset(&res, 0, sizeof(res)); res.mce = mce; res.addr = mce->addr & MCI_ADDR_PHYSADDR; - if (!pfn_to_online_page(res.addr >> PAGE_SHIFT)) { + if (!pfn_to_online_page(res.addr >> PAGE_SHIFT) && !arch_is_platform_page(res.addr)) { pr_err("Invalid address 0x%llx in IA32_MC%d_ADDR\n", mce->addr, mce->bank); return NOTIFY_DONE; } @@ -656,7 +688,7 @@ /* Try driver decoder first */ if (!(driver_decode && driver_decode(&res))) { /* Then try firmware decoder (ACPI DSM methods) */ - if (!(adxl_component_count && skx_adxl_decode(&res, skx_error_in_1st_level_mem(mce)))) + if (!(adxl_component_count && skx_adxl_decode(&res, err_src))) return NOTIFY_DONE; } @@ -688,6 +720,7 @@ mce->kflags |= MCE_HANDLED_EDAC; return NOTIFY_DONE; } +EXPORT_SYMBOL_GPL(skx_mce_check_error); void skx_remove(void) { @@ -725,3 +758,8 @@ kfree(d); } } +EXPORT_SYMBOL_GPL(skx_remove); + +MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Tony Luck"); +MODULE_DESCRIPTION("MC Driver for Intel server processors"); --- linux-xilinx-6.8.0.orig/drivers/edac/skx_common.h +++ linux-xilinx-6.8.0/drivers/edac/skx_common.h @@ -147,6 +147,13 @@ INDEX_MAX }; +enum error_source { + ERR_SRC_1LM, + ERR_SRC_2LM_NM, + ERR_SRC_2LM_FM, + ERR_SRC_NOT_MEMORY, +}; + #define BIT_NM_MEMCTRL BIT_ULL(INDEX_NM_MEMCTRL) #define BIT_NM_CHANNEL BIT_ULL(INDEX_NM_CHANNEL) #define BIT_NM_DIMM BIT_ULL(INDEX_NM_DIMM) @@ -231,10 +238,11 @@ typedef bool (*skx_decode_f)(struct decoded_addr *res); typedef void (*skx_show_retry_log_f)(struct decoded_addr *res, char *msg, int len, bool scrub_err); -int __init skx_adxl_get(void); -void __exit skx_adxl_put(void); +int skx_adxl_get(void); +void skx_adxl_put(void); void skx_set_decode(skx_decode_f decode, skx_show_retry_log_f show_retry_log); void skx_set_mem_cfg(bool mem_cfg_2lm); +void skx_set_res_cfg(struct res_config *cfg); int skx_get_src_id(struct skx_dev *d, int off, u8 *id); int skx_get_node_id(struct skx_dev *d, u8 *id); --- linux-xilinx-6.8.0.orig/drivers/edac/synopsys_edac.c +++ linux-xilinx-6.8.0/drivers/edac/synopsys_edac.c @@ -9,6 +9,8 @@ #include #include #include +#include +#include #include #include @@ -299,6 +301,7 @@ /** * struct synps_edac_priv - DDR memory controller private instance data. * @baseaddr: Base address of the DDR controller. + * @reglock: Concurrent CSRs access lock. * @message: Buffer for framing the event specific info. * @stat: ECC status information. * @p_data: Platform data. @@ -313,6 +316,7 @@ */ struct synps_edac_priv { void __iomem *baseaddr; + spinlock_t reglock; char message[SYNPS_EDAC_MSG_SIZE]; struct synps_ecc_status stat; const struct synps_platform_data *p_data; @@ -334,6 +338,7 @@ * @get_mtype: Get mtype. * @get_dtype: Get dtype. * @get_ecc_state: Get ECC state. + * @get_mem_info: Get EDAC memory info * @quirks: To differentiate IPs. */ struct synps_platform_data { @@ -341,6 +346,9 @@ enum mem_type (*get_mtype)(const void __iomem *base); enum dev_type (*get_dtype)(const void __iomem *base); bool (*get_ecc_state)(void __iomem *base); +#ifdef CONFIG_EDAC_DEBUG + u64 (*get_mem_info)(struct synps_edac_priv *priv); +#endif int quirks; }; @@ -399,6 +407,25 @@ return 0; } +#ifdef CONFIG_EDAC_DEBUG +/** + * zynqmp_get_mem_info - Get the current memory info. + * @priv: DDR memory controller private instance data. + * + * Return: host interface address. + */ +static u64 zynqmp_get_mem_info(struct synps_edac_priv *priv) +{ + u64 hif_addr = 0, linear_addr; + + linear_addr = priv->poison_addr; + if (linear_addr >= SZ_32G) + linear_addr = linear_addr - SZ_32G + SZ_2G; + hif_addr = linear_addr >> 3; + return hif_addr; +} +#endif + /** * zynqmp_get_error_info - Get the current ECC error info. * @priv: DDR memory controller private instance data. @@ -408,7 +435,8 @@ static int zynqmp_get_error_info(struct synps_edac_priv *priv) { struct synps_ecc_status *p; - u32 regval, clearval = 0; + u32 regval, clearval; + unsigned long flags; void __iomem *base; base = priv->baseaddr; @@ -452,10 +480,14 @@ p->ueinfo.blknr = (regval & ECC_CEADDR1_BLKNR_MASK); p->ueinfo.data = readl(base + ECC_UESYND0_OFST); out: - clearval = ECC_CTRL_CLR_CE_ERR | ECC_CTRL_CLR_CE_ERRCNT; - clearval |= ECC_CTRL_CLR_UE_ERR | ECC_CTRL_CLR_UE_ERRCNT; + spin_lock_irqsave(&priv->reglock, flags); + + clearval = readl(base + ECC_CLR_OFST) | + ECC_CTRL_CLR_CE_ERR | ECC_CTRL_CLR_CE_ERRCNT | + ECC_CTRL_CLR_UE_ERR | ECC_CTRL_CLR_UE_ERRCNT; writel(clearval, base + ECC_CLR_OFST); - writel(0x0, base + ECC_CLR_OFST); + + spin_unlock_irqrestore(&priv->reglock, flags); return 0; } @@ -515,24 +547,41 @@ static void enable_intr(struct synps_edac_priv *priv) { + unsigned long flags; + /* Enable UE/CE Interrupts */ - if (priv->p_data->quirks & DDR_ECC_INTR_SELF_CLEAR) - writel(DDR_UE_MASK | DDR_CE_MASK, - priv->baseaddr + ECC_CLR_OFST); - else + if (!(priv->p_data->quirks & DDR_ECC_INTR_SELF_CLEAR)) { writel(DDR_QOSUE_MASK | DDR_QOSCE_MASK, priv->baseaddr + DDR_QOS_IRQ_EN_OFST); + return; + } + + spin_lock_irqsave(&priv->reglock, flags); + + writel(DDR_UE_MASK | DDR_CE_MASK, + priv->baseaddr + ECC_CLR_OFST); + + spin_unlock_irqrestore(&priv->reglock, flags); } static void disable_intr(struct synps_edac_priv *priv) { + unsigned long flags; + /* Disable UE/CE Interrupts */ - if (priv->p_data->quirks & DDR_ECC_INTR_SELF_CLEAR) - writel(0x0, priv->baseaddr + ECC_CLR_OFST); - else + if (!(priv->p_data->quirks & DDR_ECC_INTR_SELF_CLEAR)) { writel(DDR_QOSUE_MASK | DDR_QOSCE_MASK, priv->baseaddr + DDR_QOS_IRQ_DB_OFST); + + return; + } + + spin_lock_irqsave(&priv->reglock, flags); + + writel(0, priv->baseaddr + ECC_CLR_OFST); + + spin_unlock_irqrestore(&priv->reglock, flags); } /** @@ -576,8 +625,6 @@ /* v3.0 of the controller does not have this register */ if (!(priv->p_data->quirks & DDR_ECC_INTR_SELF_CLEAR)) writel(regval, priv->baseaddr + DDR_QOS_IRQ_STAT_OFST); - else - enable_intr(priv); return IRQ_HANDLED; } @@ -899,6 +946,9 @@ .get_mtype = zynqmp_get_mtype, .get_dtype = zynqmp_get_dtype, .get_ecc_state = zynqmp_get_ecc_state, +#ifdef CONFIG_EDAC_DEBUG + .get_mem_info = zynqmp_get_mem_info, +#endif .quirks = (DDR_ECC_INTR_SUPPORT #ifdef CONFIG_EDAC_DEBUG | DDR_ECC_DATA_POISON_SUPPORT @@ -952,10 +1002,16 @@ static void ddr_poison_setup(struct synps_edac_priv *priv) { int col = 0, row = 0, bank = 0, bankgrp = 0, rank = 0, regval; + const struct synps_platform_data *p_data; int index; ulong hif_addr = 0; - hif_addr = priv->poison_addr >> 3; + p_data = priv->p_data; + + if (p_data->get_mem_info) + hif_addr = p_data->get_mem_info(priv); + else + hif_addr = priv->poison_addr >> 3; for (index = 0; index < DDR_MAX_ROW_SHIFT; index++) { if (priv->row_shift[index]) @@ -1359,6 +1415,7 @@ priv = mci->pvt_info; priv->baseaddr = baseaddr; priv->p_data = p_data; + spin_lock_init(&priv->reglock); mc_init(mci, pdev); --- linux-xilinx-6.8.0.orig/drivers/edac/versal_edac.c +++ linux-xilinx-6.8.0/drivers/edac/versal_edac.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include "edac_module.h" @@ -42,8 +43,11 @@ #define ECCW0_FLIP_CTRL 0x109C #define ECCW0_FLIP0_OFFSET 0x10A0 +#define ECCW0_FLIP0_BITS 31 +#define ECCW0_FLIP1_OFFSET 0x10A4 #define ECCW1_FLIP_CTRL 0x10AC #define ECCW1_FLIP0_OFFSET 0x10B0 +#define ECCW1_FLIP1_OFFSET 0x10B4 #define ECCR0_CERR_STAT_OFFSET 0x10BC #define ECCR0_CE_ADDR_LO_OFFSET 0x10C0 #define ECCR0_CE_ADDR_HI_OFFSET 0x10C4 @@ -116,9 +120,6 @@ #define XDDR_BUS_WIDTH_32 1 #define XDDR_BUS_WIDTH_16 2 -#define ECC_CEPOISON_MASK 0x1 -#define ECC_UEPOISON_MASK 0x3 - #define XDDR_MAX_ROW_CNT 18 #define XDDR_MAX_COL_CNT 10 #define XDDR_MAX_RANK_CNT 2 @@ -133,6 +134,7 @@ * https://docs.xilinx.com/r/en-US/am012-versal-register-reference/PCSR_LOCK-XRAM_SLCR-Register */ #define PCSR_UNLOCK_VAL 0xF9E8D7C6 +#define PCSR_LOCK_VAL 1 #define XDDR_ERR_TYPE_CE 0 #define XDDR_ERR_TYPE_UE 1 @@ -142,6 +144,9 @@ #define XILINX_DRAM_SIZE_12G 3 #define XILINX_DRAM_SIZE_16G 4 #define XILINX_DRAM_SIZE_32G 5 +#define NUM_UE_BITPOS 2 +#define NUM_ECC_BITS 72 +#define DATA_BITS 64 /** * struct ecc_error_info - ECC error log information. @@ -243,6 +248,72 @@ #endif }; +static int rowa[] = { 0x7, 0xB, 0x13, 0x23, 0x43, 0x83, 0xD, 0x15, + 0x25, 0x45, 0x85, 0x19, 0x29, 0x49, 0x89, 0x31, + 0x51, 0x91, 0x61, 0xa1, 0xc1, 0x0e, 0x16, 0x26, + 0x46, 0x86, 0x1a, 0x2a, 0x4a, 0x8a, 0x32, 0x52, + 0x92, 0x62, 0xa2, 0xc2, 0x1c, 0x2c, 0x4c, 0x8c, + 0x34, 0x54, 0x94, 0x64, 0xa4, 0xc4, 0x38, 0x58, + 0x98, 0x68, 0xa8, 0xc8, 0x70, 0xB0, 0xD0, 0xE0, + 0x1f, 0x2f, 0x4f, 0x8f, 0x37, 0x57, 0x97, 0x67, + 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80 }; + +/* + * Report the bit that was corrupted in the CE errors + * + * The function takes the data and the parity as inputs. + * It derive the corrupted bit from a fixed H Matrix and the data + * and parity. + * + */ +static void calculate_ce_bit_value(u32 eccr0_corr_err_data_hi, u32 regval, u32 parity) +{ + u8 rows[NUM_ECC_BITS] = {0}; + u8 bit, xor[BITS_PER_BYTE], match = 0; + bool field, prev; + u64 data; + int i, j; + + data = (u64)eccr0_corr_err_data_hi << 32; + data |= regval; + + for (i = 0 ; i < DATA_BITS; i++) { + if (data & BIT(i)) + rows[i] = rowa[i]; + } + + for (i = DATA_BITS ; i < NUM_ECC_BITS; i++) { + j = i - DATA_BITS; + if (parity & BIT(j)) + rows[i] = rowa[i]; + } + + for (j = 0 ; j < BITS_PER_BYTE; j++) { + bit = rows[0] & BIT(j); + prev = !!bit; + + for (i = 1 ; i < NUM_ECC_BITS; i++) { + bit = rows[i] & BIT(j); + field = !!bit; + if (field != prev) + prev = true; + else + prev = false; + } + xor[j] = prev; + } + + for (j = 0 ; j < BITS_PER_BYTE; j++) + match |= xor[j] << j; + + for (i = 0 ; i < NUM_ECC_BITS; i++) { + if (match == rowa[i]) { + edac_dbg(2, "bit found is 0x%08X\n", i); + return; + } + } +} + static void get_ce_error_info(struct edac_priv *priv) { void __iomem *ddrmc_base; @@ -269,6 +340,15 @@ p->ceinfo[1].i = regval | reghi << 32; regval = readl(ddrmc_base + ECCR1_CE_ADDR_HI_OFFSET); + if (IS_ENABLED(CONFIG_EDAC_DEBUG)) { + u32 eccr0_corr_err_data_hi, par; + + par = readl(ddrmc_base + ECCR0_CE_DATA_PAR_OFFSET); + regval = readl(ddrmc_base + ECCR0_CE_DATA_LO_OFFSET); + eccr0_corr_err_data_hi = readl(ddrmc_base + ECCR0_CE_DATA_HI_OFFSET); + calculate_ce_bit_value(eccr0_corr_err_data_hi, regval, par); + } + edac_dbg(2, "ERR DATA: 0x%08X%08X ERR DATA PARITY: 0x%08X\n", readl(ddrmc_base + ECCR1_CE_DATA_LO_OFFSET), readl(ddrmc_base + ECCR1_CE_DATA_HI_OFFSET), @@ -423,7 +503,7 @@ convert_to_physical(priv, pinf), pinf.burstpos); edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, - priv->ce_cnt, 0, 0, 0, 0, 0, -1, + 1, 0, 0, 0, 0, 0, -1, priv->message, ""); } @@ -436,7 +516,7 @@ convert_to_physical(priv, pinf), pinf.burstpos); edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, - priv->ue_cnt, 0, 0, 0, 0, 0, -1, + 1, 0, 0, 0, 0, 0, -1, priv->message, ""); } @@ -462,9 +542,9 @@ regval = readl(priv->ddrmc_baseaddr + XDDR_ISR_OFFSET); - if (payload[EVENT] == XPM_EVENT_ERROR_MASK_DDRMC_CR) + if (payload[EVENT] == XPM_VERSAL_EVENT_ERROR_MASK_DDRMC_CR) p->error_type = XDDR_ERR_TYPE_CE; - if (payload[EVENT] == XPM_EVENT_ERROR_MASK_DDRMC_NCR) + if (payload[EVENT] == XPM_VERSAL_EVENT_ERROR_MASK_DDRMC_NCR) p->error_type = XDDR_ERR_TYPE_UE; if (get_error_info(priv)) @@ -479,7 +559,7 @@ writel(regval, priv->ddrmc_baseaddr + XDDR_ISR_OFFSET); /* Lock the PCSR registers */ - writel(1, priv->ddrmc_baseaddr + XDDR_PCSR_OFFSET); + writel(PCSR_LOCK_VAL, priv->ddrmc_baseaddr + XDDR_PCSR_OFFSET); edac_dbg(3, "Total error count CE %d UE %d\n", priv->ce_cnt, priv->ue_cnt); } @@ -650,7 +730,7 @@ writel(XDDR_IRQ_UE_MASK, priv->ddrmc_baseaddr + XDDR_IRQ1_EN_OFFSET); /* Lock the PCSR registers */ - writel(1, priv->ddrmc_baseaddr + XDDR_PCSR_OFFSET); + writel(PCSR_LOCK_VAL, priv->ddrmc_baseaddr + XDDR_PCSR_OFFSET); } static void disable_intr(struct edac_priv *priv) @@ -663,7 +743,7 @@ priv->ddrmc_baseaddr + XDDR_IRQ_DIS_OFFSET); /* Lock the PCSR registers */ - writel(1, priv->ddrmc_baseaddr + XDDR_PCSR_OFFSET); + writel(PCSR_LOCK_VAL, priv->ddrmc_baseaddr + XDDR_PCSR_OFFSET); } #define to_mci(k) container_of(k, struct mem_ctl_info, dev) @@ -734,38 +814,63 @@ writel(regval, priv->ddrmc_noc_baseaddr + XDDR_NOC_REG_ADEC15_OFFSET); } -static ssize_t xddr_inject_data_poison_store(struct mem_ctl_info *mci, - const char __user *data) +static void xddr_inject_data_ce_store(struct mem_ctl_info *mci, u8 ce_bitpos) { + u32 ecc0_flip0, ecc1_flip0, ecc0_flip1, ecc1_flip1; struct edac_priv *priv = mci->pvt_info; - writel(0, priv->ddrmc_baseaddr + ECCW0_FLIP0_OFFSET); - writel(0, priv->ddrmc_baseaddr + ECCW1_FLIP0_OFFSET); - - if (strncmp(data, "CE", 2) == 0) { - writel(ECC_CEPOISON_MASK, priv->ddrmc_baseaddr + - ECCW0_FLIP0_OFFSET); - writel(ECC_CEPOISON_MASK, priv->ddrmc_baseaddr + - ECCW1_FLIP0_OFFSET); + if (ce_bitpos <= ECCW0_FLIP0_BITS) { + ecc0_flip0 = BIT(ce_bitpos); + ecc1_flip0 = BIT(ce_bitpos); + ecc0_flip1 = 0; + ecc1_flip1 = 0; } else { - writel(ECC_UEPOISON_MASK, priv->ddrmc_baseaddr + - ECCW0_FLIP0_OFFSET); - writel(ECC_UEPOISON_MASK, priv->ddrmc_baseaddr + - ECCW1_FLIP0_OFFSET); + ce_bitpos = ce_bitpos - ECCW0_FLIP0_BITS - 1; + ecc0_flip1 = BIT(ce_bitpos); + ecc1_flip1 = BIT(ce_bitpos); + ecc0_flip0 = 0; + ecc1_flip0 = 0; } - /* Lock the PCSR registers */ - writel(1, priv->ddrmc_baseaddr + XDDR_PCSR_OFFSET); - - return 0; + writel(ecc0_flip0, priv->ddrmc_baseaddr + ECCW0_FLIP0_OFFSET); + writel(ecc1_flip0, priv->ddrmc_baseaddr + ECCW1_FLIP0_OFFSET); + writel(ecc0_flip1, priv->ddrmc_baseaddr + ECCW0_FLIP1_OFFSET); + writel(ecc1_flip1, priv->ddrmc_baseaddr + ECCW1_FLIP1_OFFSET); } -static ssize_t inject_data_poison_store(struct file *file, const char __user *data, - size_t count, loff_t *ppos) +/* + * To inject a correctable error, the following steps are needed: + * + * - Write the correctable error bit position value: + * echo > /sys/kernel/debug/edac//inject_ce + * + * poison_setup() derives the row, column, bank, group and rank and + * writes to the ADEC registers based on the address given by the user. + * + * The ADEC12 and ADEC13 are mask registers; write 0 to make sure default + * configuration is there and no addresses are masked. + * + * The row, column, bank, group and rank registers are written to the + * match ADEC bit to generate errors at the particular address. ADEC14 + * and ADEC15 have the match bits. + * + * xddr_inject_data_ce_store() updates the ECC FLIP registers with the + * bits to be corrupted based on the bit position given by the user. + * + * Upon doing a read to the address the errors are injected. + */ +static ssize_t inject_data_ce_store(struct file *file, const char __user *data, + size_t count, loff_t *ppos) { struct device *dev = file->private_data; struct mem_ctl_info *mci = to_mci(dev); struct edac_priv *priv = mci->pvt_info; + u8 ce_bitpos; + int ret; + + ret = kstrtou8_from_user(data, count, 0, &ce_bitpos); + if (ret) + return ret; /* Unlock the PCSR registers */ writel(PCSR_UNLOCK_VAL, priv->ddrmc_baseaddr + XDDR_PCSR_OFFSET); @@ -773,17 +878,113 @@ poison_setup(priv); + xddr_inject_data_ce_store(mci, ce_bitpos); + ret = count; + /* Lock the PCSR registers */ - writel(1, priv->ddrmc_noc_baseaddr + XDDR_PCSR_OFFSET); + writel(PCSR_LOCK_VAL, priv->ddrmc_baseaddr + XDDR_PCSR_OFFSET); + writel(PCSR_LOCK_VAL, priv->ddrmc_noc_baseaddr + XDDR_PCSR_OFFSET); + + return ret; +} + +static const struct file_operations xddr_inject_ce_fops = { + .open = simple_open, + .write = inject_data_ce_store, + .llseek = generic_file_llseek, +}; + +static void xddr_inject_data_ue_store(struct mem_ctl_info *mci, u32 val0, u32 val1) +{ + struct edac_priv *priv = mci->pvt_info; + + writel(val0, priv->ddrmc_baseaddr + ECCW0_FLIP0_OFFSET); + writel(val0, priv->ddrmc_baseaddr + ECCW0_FLIP1_OFFSET); + writel(val1, priv->ddrmc_baseaddr + ECCW1_FLIP1_OFFSET); + writel(val1, priv->ddrmc_baseaddr + ECCW1_FLIP1_OFFSET); +} + +/* + * To inject an uncorrectable error, the following steps are needed: + * echo > /sys/kernel/debug/edac//inject_ue + * + * poison_setup() derives the row, column, bank, group and rank and + * writes to the ADEC registers based on the address given by the user. + * + * The ADEC12 and ADEC13 are mask registers; write 0 so that none of the + * addresses are masked. The row, column, bank, group and rank registers + * are written to the match ADEC bit to generate errors at the + * particular address. ADEC14 and ADEC15 have the match bits. + * + * xddr_inject_data_ue_store() updates the ECC FLIP registers with the + * bits to be corrupted based on the bit position given by the user. For + * uncorrectable errors + * 2 bit errors are injected. + * + * Upon doing a read to the address the errors are injected. + */ +static ssize_t inject_data_ue_store(struct file *file, const char __user *data, + size_t count, loff_t *ppos) +{ + struct device *dev = file->private_data; + struct mem_ctl_info *mci = to_mci(dev); + struct edac_priv *priv = mci->pvt_info; + char buf[6], *pbuf, *token[2]; + u32 val0 = 0, val1 = 0; + u8 len, ue0, ue1; + int i, ret; + + len = min_t(size_t, count, sizeof(buf)); + if (copy_from_user(buf, data, len)) + return -EFAULT; + + buf[len] = '\0'; + pbuf = &buf[0]; + for (i = 0; i < NUM_UE_BITPOS; i++) + token[i] = strsep(&pbuf, ","); + + if (!token[0] || !token[1]) + return -EFAULT; + + ret = kstrtou8(token[0], 0, &ue0); + if (ret) + return ret; + + ret = kstrtou8(token[1], 0, &ue1); + if (ret) + return ret; - xddr_inject_data_poison_store(mci, data); + if (ue0 <= ECCW0_FLIP0_BITS) { + val0 = BIT(ue0); + } else { + ue0 = ue0 - ECCW0_FLIP0_BITS - 1; + val1 = BIT(ue0); + } + + if (ue1 <= ECCW0_FLIP0_BITS) { + val0 |= BIT(ue1); + } else { + ue1 = ue1 - ECCW0_FLIP0_BITS - 1; + val1 |= BIT(ue1); + } + + /* Unlock the PCSR registers */ + writel(PCSR_UNLOCK_VAL, priv->ddrmc_baseaddr + XDDR_PCSR_OFFSET); + writel(PCSR_UNLOCK_VAL, priv->ddrmc_noc_baseaddr + XDDR_PCSR_OFFSET); + poison_setup(priv); + + xddr_inject_data_ue_store(mci, val0, val1); + + /* Lock the PCSR registers */ + writel(PCSR_LOCK_VAL, priv->ddrmc_noc_baseaddr + XDDR_PCSR_OFFSET); + writel(PCSR_LOCK_VAL, priv->ddrmc_baseaddr + XDDR_PCSR_OFFSET); return count; } -static const struct file_operations xddr_inject_enable_fops = { +static const struct file_operations xddr_inject_ue_fops = { .open = simple_open, - .write = inject_data_poison_store, + .write = inject_data_ue_store, .llseek = generic_file_llseek, }; @@ -795,8 +996,17 @@ if (!priv->debugfs) return; - edac_debugfs_create_file("inject_error", 0200, priv->debugfs, - &mci->dev, &xddr_inject_enable_fops); + if (!edac_debugfs_create_file("inject_ce", 0200, priv->debugfs, + &mci->dev, &xddr_inject_ce_fops)) { + debugfs_remove_recursive(priv->debugfs); + return; + } + + if (!edac_debugfs_create_file("inject_ue", 0200, priv->debugfs, + &mci->dev, &xddr_inject_ue_fops)) { + debugfs_remove_recursive(priv->debugfs); + return; + } debugfs_create_x64("address", 0600, priv->debugfs, &priv->err_inject_addr); mci->debugfs = priv->debugfs; @@ -1006,8 +1216,8 @@ } rc = xlnx_register_event(PM_NOTIFY_CB, VERSAL_EVENT_ERROR_PMC_ERR1, - XPM_EVENT_ERROR_MASK_DDRMC_CR | XPM_EVENT_ERROR_MASK_DDRMC_NCR | - XPM_EVENT_ERROR_MASK_NOC_CR | XPM_EVENT_ERROR_MASK_NOC_NCR, + XPM_VERSAL_EVENT_ERROR_MASK_DDRMC_CR | + XPM_VERSAL_EVENT_ERROR_MASK_DDRMC_NCR, false, err_callback, mci); if (rc) { if (rc == -EACCES) @@ -1043,10 +1253,8 @@ #endif xlnx_unregister_event(PM_NOTIFY_CB, VERSAL_EVENT_ERROR_PMC_ERR1, - XPM_EVENT_ERROR_MASK_DDRMC_CR | - XPM_EVENT_ERROR_MASK_NOC_CR | - XPM_EVENT_ERROR_MASK_NOC_NCR | - XPM_EVENT_ERROR_MASK_DDRMC_NCR, err_callback, mci); + XPM_VERSAL_EVENT_ERROR_MASK_DDRMC_CR | + XPM_VERSAL_EVENT_ERROR_MASK_DDRMC_NCR, err_callback, mci); edac_mc_del_mc(&pdev->dev); edac_mc_free(mci); --- linux-xilinx-6.8.0.orig/drivers/edac/xilinx_xilsem_edac.c +++ linux-xilinx-6.8.0/drivers/edac/xilinx_xilsem_edac.c @@ -0,0 +1,781 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022 - 2023, Advanced Micro Devices, Inc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "edac_module.h" + +#define VERSAL_XILSEM_EDAC_MSG_SIZE 256 +#define VERSAL_XILSEM_EDAC_STRNG "versal_xilsem" +#define EDAC_DEVICE "Xilsem" + +/* XilSem CE Error log count */ +#define XILSEM_MAX_CE_LOG_CNT 0x07 + +/* XilSem_CRAM scan error info registers */ +#define CRAM_STS_INFO_OFFSET 0x34 +#define CRAM_CE_ADDRL0_OFFSET 0x38 +#define CRAM_CE_ADDRH0_OFFSET 0x3C +#define CRAM_CE_COUNT_OFFSET 0x70 + +/* XilSem_NPI_Scan uncorrectable error info registers */ +#define NPI_SCAN_COUNT 0x24 +#define NPI_SCAN_HB_COUNT 0x28 +#define NPI_ERR0_INFO_OFFSET 0x2C +#define NPI_ERR1_INFO_OFFSET 0x30 + +/* XilSem bit masks for extracting error details */ +#define CRAM_ERR_ROW_MASK GENMASK(26, 23) +#define CRAM_ERR_BIT_MASK GENMASK(22, 16) +#define CRAM_ERR_QWRD_MASK GENMASK(27, 23) +#define CRAM_ERR_FRAME_MASK GENMASK(22, 0) + +enum xsem_cmd_id { + CRAM_INIT_SCAN = 1, /* To initialize CRAM scan */ + CRAM_START_SCAN = 2, /* To start CRAM scan */ + CRAM_STOP_SCAN = 3, /* To stop CRAM scan */ + CRAM_ERR_INJECT = 4, /* To inject CRAM error */ + NPI_START_SCAN = 5, /* To start NPI scan */ + NPI_STOP_SCAN = 6, /* To stop NPI scan */ + NPI_ERR_INJECT = 7, /* To inject NPI error */ +}; + +/* XilSem Module IDs */ +#define CRAM_MOD_ID 0x1 +#define NPI_MOD_ID 0x2 + +/** + * struct ecc_error_info - ECC error log information + * @status: CRAM/NPI scan error status + * @data0: Checksum of the error descriptor + * @data1: Index of the error descriptor + * @frame_addr: Frame location at which error occurred + * @block_type: Block type + * @row_id: Row number + * @bit_loc: Bit position in the Qword + * @qword: Qword location in the frame + */ +struct ecc_error_info { + u32 status; + u32 data0; + u32 data1; + u32 frame_addr; + u8 block_type; + u8 row_id; + u8 bit_loc; + u8 qword; +}; + +/** + * struct xsem_error_status - ECC status information to report + * @ce_cnt: Correctable error count + * @ue_cnt: Uncorrectable error count + * @ceinfo: Correctable error log information + * @ueinfo: Uncorrectable error log information + */ +struct xsem_error_status { + u32 ce_cnt; + u32 ue_cnt; + struct ecc_error_info ceinfo; + struct ecc_error_info ueinfo; +}; + +/** + * struct xsem_edac_priv - Xilsem private instance data + * @baseaddr: Base address of the XilSem PLM RTCA module + * @scan_ctrl_status: Buffer for scan ctrl commands + * @cram_errinj_status: Buffer for CRAM error injection + * @cram_frame_ecc: Buffer for CRAM frame ECC + * @xilsem_status: Buffer for CRAM & NPI status + * @sw_event_node_id: Error event node Id + * @xilsem_cfg: Buffer for CRAM & NPI configuration + * @cram_ce_mask: Event bit mask for CRAM correctable error + * @cram_ue_mask: Event bit mask for CRAM uncorrectable error + * @npi_ue_mask: Event bit mask for NPI uncorrectable error + * @ce_cnt: Correctable Error count + * @ue_cnt: Uncorrectable Error count + */ +struct xsem_edac_priv { + void __iomem *baseaddr; + u32 scan_ctrl_status[2]; + u32 cram_errinj_status[2]; + u32 cram_frame_ecc[4]; + u32 xilsem_status[4]; + u32 sw_event_node_id; + u32 xilsem_cfg[4]; + u32 cram_ce_mask; + u32 cram_ue_mask; + u32 npi_ue_mask; + u32 ce_cnt; + u32 ue_cnt; +}; + +/** + * xsem_scan_control_show - Shows scan control operation status + * @dci: Pointer to the edac device struct + * @data: Pointer to user data + * + * Shows the scan control operations status + * Return: Number of bytes copied. + */ +static ssize_t xsem_scan_control_show(struct edac_device_ctl_info + *dci, char *data) +{ + struct xsem_edac_priv *priv = dci->pvt_info; + + return sprintf(data, "[0x%x][0x%x]\n\r", + priv->scan_ctrl_status[0], priv->scan_ctrl_status[1]); +} + +/** + * xsem_scan_control_store - Set scan control operation + * @dci: Pointer to the edac device struct + * @data: Pointer to user data + * @count: read the size bytes from buffer + * + * User-space interface for doing Xilsem scan operations + * + * To control scan operations + * echo > /sys/devices/system/edac/versal_xilsem/xsem_scan_control + * Usage: + * echo 1 > /sys/devices/system/edac/versal_xilsem/xsem_scan_control + * + * Set scan control (init, start, stop) operations + * Return: count argument if request succeeds, else error code + */ +static ssize_t xsem_scan_control_store(struct edac_device_ctl_info *dci, + const char *data, size_t count) +{ + struct xsem_edac_priv *priv = dci->pvt_info; + u32 cmd; + int ret; + + if (!data) + return -EFAULT; + + if (kstrtouint(data, 0, &cmd)) + return -EINVAL; + + if (cmd < CRAM_INIT_SCAN || cmd > NPI_ERR_INJECT || + cmd == CRAM_ERR_INJECT) + return -EINVAL; + + ret = zynqmp_pm_xilsem_cntrl_ops(cmd, priv->scan_ctrl_status); + if (ret) + return ret; + + return count; +} + +/** + * xsem_cram_injecterr_show - Shows CRAM error injection status + * @dci: Pointer to the edac device struct + * @data: Pointer to user data + * + * Shows CRAM error injection status + * Return: Number of bytes copied. + */ +static ssize_t xsem_cram_injecterr_show(struct edac_device_ctl_info *dci, char *data) +{ + struct xsem_edac_priv *priv = dci->pvt_info; + + return sprintf(data, "[0x%x][0x%x]\n\r", priv->cram_errinj_status[0], + priv->cram_errinj_status[1]); +} + +/** + * xsem_cram_injecterr_store - Start error injection + * @dci: Pointer to the edac device struct + * @data: Pointer to user data + * @count: read the size bytes from buffer + * + * User-space interface for doing CRAM error injection + * + * To inject error + * echo > /sys/devices/system/edac/versal_xilsem/xsem_cram_injecterr + * Usage: + * echo 1 2 2 1 > /sys/devices/system/edac/versal_xilsem/xsem_cram_injecterr + * + * Start error injection + * Return: count argument if request succeeds, else error code + */ +static ssize_t xsem_cram_injecterr_store(struct edac_device_ctl_info *dci, + const char *data, size_t count) +{ + struct xsem_edac_priv *priv = dci->pvt_info; + char *kern_buff, *inbuf, *tok; + u32 row, frame, qword, bitloc; + int ret; + + kern_buff = kzalloc(count, GFP_KERNEL); + if (!kern_buff) + return -ENOMEM; + + strscpy(kern_buff, data, count); + + inbuf = kern_buff; + + /* Read Frame number */ + tok = strsep(&inbuf, " "); + if (!tok) { + ret = -EFAULT; + goto err; + } + + ret = kstrtouint(tok, 0, &frame); + if (ret) { + ret = -EFAULT; + goto err; + } + + /* Read Qword number */ + tok = strsep(&inbuf, " "); + if (!tok) { + ret = -EFAULT; + goto err; + } + + ret = kstrtouint(tok, 0, &qword); + if (ret) { + ret = -EFAULT; + goto err; + } + + /* Read Bit location */ + tok = strsep(&inbuf, " "); + if (!tok) { + ret = -EFAULT; + goto err; + } + + ret = kstrtouint(tok, 0, &bitloc); + if (ret) { + ret = -EFAULT; + goto err; + } + + /* Read Row number */ + tok = strsep(&inbuf, " "); + if (!tok) { + ret = -EFAULT; + goto err; + } + + ret = kstrtouint(tok, 0, &row); + if (ret) { + ret = -EFAULT; + goto err; + } + + ret = zynqmp_pm_xilsem_cram_errinj(frame, qword, bitloc, row, + priv->cram_errinj_status); +err: + kfree(kern_buff); + + if (ret) + return ret; + + return count; +} + +/** + * xsem_cram_framecc_read_show - Shows CRAM Frame ECC + * @dci: Pointer to the edac device struct + * @data: Pointer to user data + * + * Shows CRAM Frame ECC value + * Return: Number of bytes copied. + */ +static ssize_t xsem_cram_framecc_read_show(struct edac_device_ctl_info *dci, + char *data) +{ + struct xsem_edac_priv *priv = dci->pvt_info; + + return sprintf(data, "[0x%x][0x%x][0x%x][0x%x]\n\r", + priv->cram_frame_ecc[0], priv->cram_frame_ecc[1], + priv->cram_frame_ecc[2], priv->cram_frame_ecc[3]); +} + +/** + * xsem_cram_framecc_read_store - Read CRAM Frame ECC + * @dci: Pointer to the edac device struct + * @data: Pointer to user data + * @count: read the size bytes from buffer + * + * User-space interface for reading CRAM frame ECC + * + * To read ecc + * echo > /sys/devices/system/edac/versal_xilsem/xsem_cram_framecc_read + * Usage: + * echo 1 2 > /sys/devices/system/edac/versal_xilsem/xsem_cram_framecc_read + * + * Read CRAM Frame ECC + * Return: count argument if request succeeds, else error code + */ +static ssize_t xsem_cram_framecc_read_store(struct edac_device_ctl_info *dci, + const char *data, size_t count) +{ + struct xsem_edac_priv *priv = dci->pvt_info; + char *kern_buff, *inbuf, *tok; + u32 frameaddr, row; + int ret; + + kern_buff = kzalloc(count, GFP_KERNEL); + if (!kern_buff) + return -ENOMEM; + + strscpy(kern_buff, data, count); + + inbuf = kern_buff; + + /* Read Frame address */ + tok = strsep(&inbuf, " "); + if (!tok) { + ret = -EFAULT; + goto err; + } + + ret = kstrtouint(tok, 0, &frameaddr); + if (ret) { + ret = -EFAULT; + goto err; + } + + /* Read Row number */ + tok = strsep(&inbuf, " "); + if (!tok) { + ret = -EFAULT; + goto err; + } + + ret = kstrtouint(tok, 0, &row); + if (ret) { + ret = -EFAULT; + goto err; + } + + ret = zynqmp_pm_xilsem_cram_readecc(frameaddr, row, priv->cram_frame_ecc); +err: + kfree(kern_buff); + + if (ret) + return ret; + + return count; +} + +/** + * xsem_read_status_show - Shows CRAM & NPI scan status + * @dci: Pointer to the edac device struct + * @data: Pointer to user data + * + * Shows CRAM & NPI scan status + * Return: Number of bytes copied. + */ +static ssize_t xsem_read_status_show(struct edac_device_ctl_info *dci, char *data) +{ + struct xsem_edac_priv *priv = dci->pvt_info; + + return sprintf(data, "[0x%x][0x%x][0x%x]\n\r", + priv->xilsem_status[0], priv->xilsem_status[1], + priv->xilsem_status[2]); +} + +/** + * xsem_read_status_store - Read CRAM & NPI scan status + * @dci: Pointer to the edac device struct + * @data: Pointer to user data + * @count: read the size bytes from buffer + * + * User-space interface for reading Xilsem status + * + * To read status + * echo > /sys/devices/system/edac/versal_xilsem/xsem_read_status + * Usage: + * echo 1 > /sys/devices/system/edac/versal_xilsem/xsem_read_status + * + * Read CRAM & NPI scan status + * Return: count argument if rea succeeds, else error code + */ +static ssize_t xsem_read_status_store(struct edac_device_ctl_info *dci, + const char *data, size_t count) +{ + struct xsem_edac_priv *priv = dci->pvt_info; + u32 module; + + if (!data) + return -EFAULT; + + if (kstrtouint(data, 0, &module)) + return -EINVAL; + + if (module == CRAM_MOD_ID) { + priv->xilsem_status[0] = readl(priv->baseaddr + CRAM_STS_INFO_OFFSET); + priv->xilsem_status[1] = readl(priv->baseaddr + CRAM_CE_COUNT_OFFSET); + priv->xilsem_status[2] = 0; + } else if (module == NPI_MOD_ID) { + priv->xilsem_status[0] = readl(priv->baseaddr); + priv->xilsem_status[1] = readl(priv->baseaddr + NPI_SCAN_COUNT); + priv->xilsem_status[2] = readl(priv->baseaddr + NPI_SCAN_HB_COUNT); + } else { + edac_printk(KERN_ERR, EDAC_DEVICE, "Invalid module %d\n", module); + return -EINVAL; + } + + return count; +} + +/** + * xsem_read_config_show - Shows CRAM & NPI configuration + * @dci: Pointer to the edac device struct + * @data: Pointer to user data + * + * Shows CRAM & NPI configuration + * Return: Number of bytes copied. + */ +static ssize_t xsem_read_config_show(struct edac_device_ctl_info *dci, char *data) +{ + struct xsem_edac_priv *priv = dci->pvt_info; + + return sprintf(data, "[0x%x][0x%x][0x%x][0x%x]\n\r", + priv->xilsem_cfg[0], priv->xilsem_cfg[1], + priv->xilsem_cfg[2], priv->xilsem_cfg[3]); +} + +/** + * xsem_read_config_store - Read CRAM & NPI configuration + * @dci: Pointer to the edac device struct + * @data: Pointer to user data + * @count: read the size bytes from buffer + * + * User-space interface for reading Xilsem configuration + * + * To read configuration + * echo 1 > /sys/devices/system/edac/versal_xilsem/xsem_read_config + * Usage: + * echo 1 > /sys/devices/system/edac/versal_xilsem/xsem_read_config + * + * Read CRAM & NPI configuration + * Return: count argument if request succeeds, else error code + */ +static ssize_t xsem_read_config_store(struct edac_device_ctl_info *dci, + const char *data, size_t count) +{ + struct xsem_edac_priv *priv = dci->pvt_info; + int ret; + + if (!data) + return -EFAULT; + + ret = zynqmp_pm_xilsem_read_cfg(priv->xilsem_cfg); + + if (ret) + return ret; + + return count; +} + +/** + * xsem_handle_error - Handle XilSem error types CE and UE + * @dci: Pointer to the edac device controller instance + * @p: Pointer to the xilsem error status structure + * + * Handles the correctable and uncorrectable error. + */ +static void xsem_handle_error(struct edac_device_ctl_info *dci, struct xsem_error_status *p) +{ + struct ecc_error_info *pinf; + char message[VERSAL_XILSEM_EDAC_MSG_SIZE]; + + if (p->ce_cnt) { + pinf = &p->ceinfo; + snprintf(message, VERSAL_XILSEM_EDAC_MSG_SIZE, + "\n\rXILSEM CRAM error type :%s\n\r" + "\nFrame_Addr: [0x%X]\t Row_num: [0x%X]\t Bit_loc: [0x%X]\t Qword: [0x%X]\n\r", + "CE", pinf->frame_addr, pinf->row_id, + pinf->bit_loc, pinf->qword); + edac_device_handle_ce(dci, 0, 0, message); + } + + if (p->ue_cnt) { + pinf = &p->ueinfo; + snprintf(message, VERSAL_XILSEM_EDAC_MSG_SIZE, + "\n\rXILSEM error type :%s\n\r" + "status: [0x%X]\n\rError_Info0: [0x%X]\n\r" + "Error_Info1: [0x%X]", + "UE", pinf->status, pinf->data0, pinf->data1); + edac_device_handle_ue(dci, 0, 0, message); + } +} + +/** + * xsem_geterror_info - Get the current ecc error info + * @dci: Pointer to the edac device controller instance + * @p: Pointer to the Xilsem error status structure + * @mask: mask indictaes the error type + * + * Determines there is any ecc error or not + */ +static void xsem_geterror_info(struct edac_device_ctl_info *dci, struct xsem_error_status *p, + int mask) +{ + struct xsem_edac_priv *priv = dci->pvt_info; + u32 error_word_0, error_word_1, ce_count; + u8 index; + + if (mask & priv->cram_ce_mask) { + p->ce_cnt++; + + /* Read CRAM total correctable error count */ + ce_count = readl(priv->baseaddr + CRAM_CE_COUNT_OFFSET); + /* Calculate index for error log */ + index = (ce_count % XILSEM_MAX_CE_LOG_CNT); + /* + * Check if addr index is not 0 + * if yes, then decrement index, else set index as last entry + */ + if (index != 0U) { + /* Decrement Index */ + --index; + } else { + /* Set log index to 6 (Max-1) */ + index = (XILSEM_MAX_CE_LOG_CNT - 1); + } + error_word_0 = readl(priv->baseaddr + CRAM_CE_ADDRL0_OFFSET + (index * 8U)); + error_word_1 = readl(priv->baseaddr + CRAM_CE_ADDRH0_OFFSET + (index * 8U)); + + /* Frame is at 22:0 bits of SEM_CRAMERR_ADDRH0 reg */ + p->ceinfo.frame_addr = FIELD_GET(CRAM_ERR_FRAME_MASK, error_word_1); + + /* row is at 26:23 bits of SEM_CRAMERR_ADDRH0 reg */ + p->ceinfo.row_id = FIELD_GET(CRAM_ERR_ROW_MASK, error_word_1); + + /* bit is at 22:16 bits of SEM_CRAMERR_ADDRL0 reg */ + p->ceinfo.bit_loc = FIELD_GET(CRAM_ERR_BIT_MASK, error_word_0); + + /* Qword is at 27:23 bits of SEM_CRAMERR_ADDRL0 reg */ + p->ceinfo.qword = FIELD_GET(CRAM_ERR_QWRD_MASK, error_word_0); + + /* Read CRAM status */ + p->ceinfo.status = readl(priv->baseaddr + CRAM_STS_INFO_OFFSET); + } else if (mask & priv->cram_ue_mask) { + p->ue_cnt++; + p->ueinfo.data0 = 0; + p->ueinfo.data1 = 0; + p->ueinfo.status = readl(priv->baseaddr + CRAM_STS_INFO_OFFSET); + } else if (mask & priv->npi_ue_mask) { + p->ue_cnt++; + p->ueinfo.data0 = readl(priv->baseaddr + NPI_ERR0_INFO_OFFSET); + p->ueinfo.data1 = readl(priv->baseaddr + NPI_ERR1_INFO_OFFSET); + p->ueinfo.status = readl(priv->baseaddr); + } else { + edac_printk(KERN_ERR, EDAC_DEVICE, "Invalid Event received %d\n", mask); + } +} + +/** + * xsem_err_callback - Handle Correctable and Uncorrectable errors. + * @payload: payload data. + * @data: controller data. + * + * Handles ECC correctable and uncorrectable errors. + */ +static void xsem_err_callback(const u32 *payload, void *data) +{ + struct edac_device_ctl_info *dci = (struct edac_device_ctl_info *)data; + struct xsem_error_status stat; + struct xsem_edac_priv *priv; + int event; + + priv = dci->pvt_info; + memset(&stat, 0, sizeof(stat)); + /* Read payload to get the event type */ + event = payload[2]; + edac_printk(KERN_INFO, EDAC_DEVICE, "Event received %x\n", event); + xsem_geterror_info(dci, &stat, event); + + priv->ce_cnt += stat.ce_cnt; + priv->ue_cnt += stat.ue_cnt; + xsem_handle_error(dci, &stat); +} + +static struct edac_dev_sysfs_attribute xsem_edac_sysfs_attributes[] = { + { + .attr = { + .name = "xsem_scan_control_ops", + .mode = (0644) + }, + .show = xsem_scan_control_show, + .store = xsem_scan_control_store}, + { + .attr = { + .name = "xsem_cram_injecterr", + .mode = (0644) + }, + .show = xsem_cram_injecterr_show, + .store = xsem_cram_injecterr_store}, + { + .attr = { + .name = "xsem_cram_framecc_read", + .mode = (0644) + }, + .show = xsem_cram_framecc_read_show, + .store = xsem_cram_framecc_read_store}, + { + .attr = { + .name = "xsem_read_status", + .mode = (0644) + }, + .show = xsem_read_status_show, + .store = xsem_read_status_store}, + { + .attr = { + .name = "xsem_read_config", + .mode = (0644) + }, + .show = xsem_read_config_show, + .store = xsem_read_config_store}, + { + .attr = {.name = NULL} + } +}; + +/** + * xsem_edac_probe - Check controller and bind driver. + * @pdev: platform device. + * + * Probe a specific controller instance for binding with the driver. + * + * Return: 0 if the controller instance was successfully bound to the + * driver; otherwise, < 0 on error. + */ +static int xsem_edac_probe(struct platform_device *pdev) +{ + struct xsem_edac_priv *priv; + void __iomem *plmrtca_baseaddr; + struct edac_device_ctl_info *dci; + u32 device_sub_family_code; + u32 family_code; + int rc; + + plmrtca_baseaddr = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(plmrtca_baseaddr)) + return PTR_ERR(plmrtca_baseaddr); + + dci = edac_device_alloc_ctl_info(sizeof(*priv), VERSAL_XILSEM_EDAC_STRNG, + 1, VERSAL_XILSEM_EDAC_STRNG, 1, 0, NULL, 0, + edac_device_alloc_index()); + if (!dci) { + edac_printk(KERN_ERR, EDAC_DEVICE, "Unable to allocate EDAC device\n"); + return -ENOMEM; + } + + priv = dci->pvt_info; + platform_set_drvdata(pdev, dci); + dci->dev = &pdev->dev; + priv->baseaddr = plmrtca_baseaddr; + dci->mod_name = pdev->dev.driver->name; + dci->ctl_name = VERSAL_XILSEM_EDAC_STRNG; + dci->dev_name = dev_name(&pdev->dev); + + dci->sysfs_attributes = xsem_edac_sysfs_attributes; + rc = edac_device_add_device(dci); + if (rc) + goto free_dev_ctl; + + rc = zynqmp_pm_get_family_info(&family_code, &device_sub_family_code); + if (rc) { + if (rc == -ENODEV) + rc = -EPROBE_DEFER; + goto free_edac_dev; + } + + if (device_sub_family_code == VERSALNET_SUB_FAMILY_CODE) { + priv->sw_event_node_id = VERSAL_NET_EVENT_ERROR_SW_ERR; + priv->cram_ce_mask = XPM_VERSAL_NET_EVENT_ERROR_MASK_XSEM_CRAM_CE; + priv->cram_ue_mask = XPM_VERSAL_NET_EVENT_ERROR_MASK_XSEM_CRAM_UE; + priv->npi_ue_mask = XPM_VERSAL_NET_EVENT_ERROR_MASK_XSEM_NPI_UE; + } else if (device_sub_family_code == VERSAL_SUB_FAMILY_CODE) { + priv->sw_event_node_id = VERSAL_EVENT_ERROR_SW_ERR; + priv->cram_ce_mask = XPM_VERSAL_EVENT_ERROR_MASK_XSEM_CRAM_CE_5; + priv->cram_ue_mask = XPM_VERSAL_EVENT_ERROR_MASK_XSEM_CRAM_UE_6; + priv->npi_ue_mask = XPM_VERSAL_EVENT_ERROR_MASK_XSEM_NPI_UE_7; + } else { + edac_printk(KERN_ERR, EDAC_DEVICE, "Invalid Device Sub family code %d\n", + device_sub_family_code); + } + rc = xlnx_register_event(PM_NOTIFY_CB, priv->sw_event_node_id, + priv->cram_ce_mask | priv->cram_ue_mask | priv->npi_ue_mask, + false, xsem_err_callback, dci); + if (rc) { + if (rc == -EACCES) + rc = -EPROBE_DEFER; + goto free_edac_dev; + } + + edac_printk(KERN_DEBUG, EDAC_DEVICE, "%s success\n", __func__); + return rc; + +free_edac_dev: + edac_device_del_device(&pdev->dev); +free_dev_ctl: + edac_device_free_ctl_info(dci); + + return rc; +} + +/** + * xsem_edac_remove - Unbind driver from controller. + * @pdev: Platform device. + * + * Return: Unconditionally 0 + */ +static int xsem_edac_remove(struct platform_device *pdev) +{ + struct edac_device_ctl_info *dci = platform_get_drvdata(pdev); + struct xsem_edac_priv *priv = dci->pvt_info; + + xlnx_unregister_event(PM_NOTIFY_CB, priv->sw_event_node_id, + priv->cram_ce_mask | priv->cram_ue_mask | priv->npi_ue_mask, + xsem_err_callback, dci); + edac_device_del_device(&pdev->dev); + edac_device_free_ctl_info(dci); + + return 0; +} + +static const struct of_device_id xlnx_xsem_edac_match[] = { + { .compatible = "xlnx,versal-xilsem-edac", }, + { + /* end of table */ + } +}; + +MODULE_DEVICE_TABLE(of, xlnx_xsem_edac_match); + +static struct platform_driver xilinx_xsem_edac_driver = { + .driver = { + .name = "xilinx-xilsem-edac", + .of_match_table = xlnx_xsem_edac_match, + }, + .probe = xsem_edac_probe, + .remove = xsem_edac_remove, +}; + +module_platform_driver(xilinx_xsem_edac_driver); + +MODULE_AUTHOR("Advanced Micro Devices, Inc."); +MODULE_DESCRIPTION("Xilinx XilSEM driver"); +MODULE_LICENSE("GPL"); --- linux-xilinx-6.8.0.orig/drivers/extcon/Kconfig +++ linux-xilinx-6.8.0/drivers/extcon/Kconfig @@ -116,7 +116,8 @@ config EXTCON_MAX8997 tristate "Maxim MAX8997 EXTCON Support" - depends on MFD_MAX8997 && IRQ_DOMAIN + depends on MFD_MAX8997 + select IRQ_DOMAIN help If you say yes here you get support for the MUIC device of Maxim MAX8997 PMIC. The MAX8997 MUIC is a USB port accessory --- linux-xilinx-6.8.0.orig/drivers/firewire/core-cdev.c +++ linux-xilinx-6.8.0/drivers/firewire/core-cdev.c @@ -598,11 +598,11 @@ queue_event(client, &e->event, rsp, sizeof(*rsp) + rsp->length, NULL, 0); break; + } default: WARN_ON(1); break; } - } /* Drop the idr's reference */ client_put(client); --- linux-xilinx-6.8.0.orig/drivers/firewire/device-attribute-test.c +++ linux-xilinx-6.8.0/drivers/firewire/device-attribute-test.c @@ -99,6 +99,7 @@ struct device *unit0_dev = (struct device *)&unit0.device; static const int unit0_expected_ids[] = {0x00ffffff, 0x00ffffff, 0x0000a02d, 0x00010001}; char *buf = kunit_kzalloc(test, PAGE_SIZE, GFP_KERNEL); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, buf); int ids[4] = {0, 0, 0, 0}; // Ensure associations for node and unit devices. @@ -180,6 +181,7 @@ struct device *unit0_dev = (struct device *)&unit0.device; static const int unit0_expected_ids[] = {0x00012345, 0x00fedcba, 0x00abcdef, 0x00543210}; char *buf = kunit_kzalloc(test, PAGE_SIZE, GFP_KERNEL); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, buf); int ids[4] = {0, 0, 0, 0}; // Ensure associations for node and unit devices. --- linux-xilinx-6.8.0.orig/drivers/firewire/nosy.c +++ linux-xilinx-6.8.0/drivers/firewire/nosy.c @@ -148,10 +148,12 @@ if (atomic_read(&buffer->size) == 0) return -ENODEV; - /* FIXME: Check length <= user_length. */ + length = buffer->head->length; + + if (length > user_length) + return 0; end = buffer->data + buffer->capacity; - length = buffer->head->length; if (&buffer->head->data[length] < end) { if (copy_to_user(data, buffer->head->data, length)) --- linux-xilinx-6.8.0.orig/drivers/firewire/ohci.c +++ linux-xilinx-6.8.0/drivers/firewire/ohci.c @@ -1556,6 +1556,8 @@ #define HEADER_GET_DATA_LENGTH(q) (((q) >> 16) & 0xffff) #define HEADER_GET_EXTENDED_TCODE(q) (((q) >> 0) & 0xffff) +static u32 get_cycle_time(struct fw_ohci *ohci); + static void handle_local_rom(struct fw_ohci *ohci, struct fw_packet *packet, u32 csr) { @@ -1580,6 +1582,8 @@ (void *) ohci->config_rom + i, length); } + // Timestamping on behalf of the hardware. + response.timestamp = cycle_time_to_ohci_tstamp(get_cycle_time(ohci)); fw_core_handle_response(&ohci->card, &response); } @@ -1628,6 +1632,8 @@ fw_fill_response(&response, packet->header, RCODE_BUSY, NULL, 0); out: + // Timestamping on behalf of the hardware. + response.timestamp = cycle_time_to_ohci_tstamp(get_cycle_time(ohci)); fw_core_handle_response(&ohci->card, &response); } @@ -1670,8 +1676,6 @@ } } -static u32 get_cycle_time(struct fw_ohci *ohci); - static void at_context_transmit(struct context *ctx, struct fw_packet *packet) { unsigned long flags; @@ -2060,6 +2064,8 @@ ohci->generation = generation; reg_write(ohci, OHCI1394_IntEventClear, OHCI1394_busReset); + if (param_debug & OHCI_PARAM_DEBUG_BUSRESETS) + reg_write(ohci, OHCI1394_IntMaskSet, OHCI1394_busReset); if (ohci->quirks & QUIRK_RESET_PACKET) ohci->request_generation = generation; @@ -2125,12 +2131,14 @@ return IRQ_NONE; /* - * busReset and postedWriteErr must not be cleared yet + * busReset and postedWriteErr events must not be cleared yet * (OHCI 1.1 clauses 7.2.3.2 and 13.2.8.1) */ reg_write(ohci, OHCI1394_IntEventClear, event & ~(OHCI1394_busReset | OHCI1394_postedWriteErr)); log_irqs(ohci, event); + if (event & OHCI1394_busReset) + reg_write(ohci, OHCI1394_IntMaskClear, OHCI1394_busReset); if (event & OHCI1394_selfIDComplete) queue_work(selfid_workqueue, &ohci->bus_reset_work); --- linux-xilinx-6.8.0.orig/drivers/firmware/Kconfig +++ linux-xilinx-6.8.0/drivers/firmware/Kconfig @@ -106,7 +106,7 @@ select ISCSI_BOOT_SYSFS select ISCSI_IBFT_FIND if X86 depends on ACPI && SCSI && SCSI_LOWLEVEL - default n + default n help This option enables support for detection and exposing of iSCSI Boot Firmware Table (iBFT) via sysfs to userspace. If you wish to @@ -182,6 +182,7 @@ config SYSFB bool select BOOT_VESA_SUPPORT + select SCREEN_INFO config SYSFB_SIMPLEFB bool "Mark VGA/VBE/EFI FB as generic system framebuffer" --- linux-xilinx-6.8.0.orig/drivers/firmware/arm_ffa/driver.c +++ linux-xilinx-6.8.0/drivers/firmware/arm_ffa/driver.c @@ -790,7 +790,7 @@ part_id = packed_id_list[ids_processed++]; - if (!ids_count[list]) { /* Global Notification */ + if (ids_count[list] == 1) { /* Global Notification */ __do_sched_recv_cb(part_id, 0, false); continue; } --- linux-xilinx-6.8.0.orig/drivers/firmware/arm_scmi/bus.c +++ linux-xilinx-6.8.0/drivers/firmware/arm_scmi/bus.c @@ -305,7 +305,10 @@ static void scmi_device_release(struct device *dev) { - kfree(to_scmi_dev(dev)); + struct scmi_device *scmi_dev = to_scmi_dev(dev); + + kfree_const(scmi_dev->name); + kfree(scmi_dev); } static void __scmi_device_destroy(struct scmi_device *scmi_dev) @@ -318,7 +321,6 @@ if (scmi_dev->protocol_id == SCMI_PROTOCOL_SYSTEM) atomic_set(&scmi_syspower_registered, 0); - kfree_const(scmi_dev->name); ida_free(&scmi_bus_id, scmi_dev->id); device_unregister(&scmi_dev->dev); } @@ -390,7 +392,6 @@ return scmi_dev; put_dev: - kfree_const(scmi_dev->name); put_device(&scmi_dev->dev); ida_free(&scmi_bus_id, id); return NULL; --- linux-xilinx-6.8.0.orig/drivers/firmware/arm_scmi/common.h +++ linux-xilinx-6.8.0/drivers/firmware/arm_scmi/common.h @@ -163,6 +163,7 @@ * used to initialize this channel * @dev: Reference to device in the SCMI hierarchy corresponding to this * channel + * @is_p2a: A flag to identify a channel as P2A (RX) * @rx_timeout_ms: The configured RX timeout in milliseconds. * @handle: Pointer to SCMI entity handle * @no_completion_irq: Flag to indicate that this channel has no completion @@ -174,6 +175,7 @@ struct scmi_chan_info { int id; struct device *dev; + bool is_p2a; unsigned int rx_timeout_ms; struct scmi_handle *handle; bool no_completion_irq; --- linux-xilinx-6.8.0.orig/drivers/firmware/arm_scmi/driver.c +++ linux-xilinx-6.8.0/drivers/firmware/arm_scmi/driver.c @@ -857,6 +857,11 @@ static inline void scmi_clear_channel(struct scmi_info *info, struct scmi_chan_info *cinfo) { + if (!cinfo->is_p2a) { + dev_warn(cinfo->dev, "Invalid clear on A2P channel !\n"); + return; + } + if (info->desc->ops->clear_channel) info->desc->ops->clear_channel(cinfo); } @@ -2333,6 +2338,7 @@ if (!cinfo) return -ENOMEM; + cinfo->is_p2a = !tx; cinfo->rx_timeout_ms = info->desc->max_rx_timeout_ms; /* Create a unique name for this transport device */ @@ -2617,10 +2623,8 @@ dbg->top_dentry = top_dentry; if (devm_add_action_or_reset(info->dev, - scmi_debugfs_common_cleanup, dbg)) { - scmi_debugfs_common_cleanup(dbg); + scmi_debugfs_common_cleanup, dbg)) return NULL; - } return dbg; } --- linux-xilinx-6.8.0.orig/drivers/firmware/arm_scmi/mailbox.c +++ linux-xilinx-6.8.0/drivers/firmware/arm_scmi/mailbox.c @@ -23,6 +23,7 @@ * @chan_receiver: Optional Receiver mailbox unidirectional channel * @cinfo: SCMI channel info * @shmem: Transmit/Receive shared memory area + * @chan_lock: Lock that prevents multiple xfers from being queued */ struct scmi_mailbox { struct mbox_client cl; @@ -30,6 +31,7 @@ struct mbox_chan *chan_receiver; struct scmi_chan_info *cinfo; struct scmi_shared_mem __iomem *shmem; + struct mutex chan_lock; }; #define client_to_scmi_mailbox(c) container_of(c, struct scmi_mailbox, cl) @@ -228,6 +230,7 @@ cinfo->transport_info = smbox; smbox->cinfo = cinfo; + mutex_init(&smbox->chan_lock); return 0; } @@ -255,13 +258,23 @@ struct scmi_mailbox *smbox = cinfo->transport_info; int ret; - ret = mbox_send_message(smbox->chan, xfer); + /* + * The mailbox layer has its own queue. However the mailbox queue + * confuses the per message SCMI timeouts since the clock starts when + * the message is submitted into the mailbox queue. So when multiple + * messages are queued up the clock starts on all messages instead of + * only the one inflight. + */ + mutex_lock(&smbox->chan_lock); - /* mbox_send_message returns non-negative value on success, so reset */ - if (ret > 0) - ret = 0; + ret = mbox_send_message(smbox->chan, xfer); + /* mbox_send_message returns non-negative value on success */ + if (ret < 0) { + mutex_unlock(&smbox->chan_lock); + return ret; + } - return ret; + return 0; } static void mailbox_mark_txdone(struct scmi_chan_info *cinfo, int ret, @@ -269,13 +282,10 @@ { struct scmi_mailbox *smbox = cinfo->transport_info; - /* - * NOTE: we might prefer not to need the mailbox ticker to manage the - * transfer queueing since the protocol layer queues things by itself. - * Unfortunately, we have to kick the mailbox framework after we have - * received our message. - */ mbox_client_txdone(smbox->chan, ret); + + /* Release channel */ + mutex_unlock(&smbox->chan_lock); } static void mailbox_fetch_response(struct scmi_chan_info *cinfo, --- linux-xilinx-6.8.0.orig/drivers/firmware/arm_scmi/optee.c +++ linux-xilinx-6.8.0/drivers/firmware/arm_scmi/optee.c @@ -471,6 +471,13 @@ struct scmi_chan_info *cinfo = p; struct scmi_optee_channel *channel = cinfo->transport_info; + /* + * Different protocols might share the same chan info, so a previous + * call might have already freed the structure. + */ + if (!channel) + return 0; + mutex_lock(&scmi_optee_private->mu); list_del(&channel->link); mutex_unlock(&scmi_optee_private->mu); --- linux-xilinx-6.8.0.orig/drivers/firmware/arm_scmi/raw_mode.c +++ linux-xilinx-6.8.0/drivers/firmware/arm_scmi/raw_mode.c @@ -921,7 +921,7 @@ rd->raw = raw; filp->private_data = rd; - return 0; + return nonseekable_open(inode, filp); } static int scmi_dbg_raw_mode_release(struct inode *inode, struct file *filp) @@ -950,6 +950,7 @@ .open = scmi_dbg_raw_mode_open, .release = scmi_dbg_raw_mode_release, .write = scmi_dbg_raw_mode_reset_write, + .llseek = no_llseek, .owner = THIS_MODULE, }; @@ -959,6 +960,7 @@ .read = scmi_dbg_raw_mode_message_read, .write = scmi_dbg_raw_mode_message_write, .poll = scmi_dbg_raw_mode_message_poll, + .llseek = no_llseek, .owner = THIS_MODULE, }; @@ -975,6 +977,7 @@ .read = scmi_dbg_raw_mode_message_read, .write = scmi_dbg_raw_mode_message_async_write, .poll = scmi_dbg_raw_mode_message_poll, + .llseek = no_llseek, .owner = THIS_MODULE, }; @@ -998,6 +1001,7 @@ .release = scmi_dbg_raw_mode_release, .read = scmi_test_dbg_raw_mode_notif_read, .poll = scmi_test_dbg_raw_mode_notif_poll, + .llseek = no_llseek, .owner = THIS_MODULE, }; @@ -1021,6 +1025,7 @@ .release = scmi_dbg_raw_mode_release, .read = scmi_test_dbg_raw_mode_errors_read, .poll = scmi_test_dbg_raw_mode_errors_poll, + .llseek = no_llseek, .owner = THIS_MODULE, }; --- linux-xilinx-6.8.0.orig/drivers/firmware/arm_scmi/smc.c +++ linux-xilinx-6.8.0/drivers/firmware/arm_scmi/smc.c @@ -214,6 +214,13 @@ struct scmi_chan_info *cinfo = p; struct scmi_smc *scmi_info = cinfo->transport_info; + /* + * Different protocols might share the same chan info, so a previous + * smc_chan_free call might have already freed the structure. + */ + if (!scmi_info) + return 0; + /* Ignore any possible further reception on the IRQ path */ if (scmi_info->irq > 0) free_irq(scmi_info->irq, scmi_info); --- linux-xilinx-6.8.0.orig/drivers/firmware/arm_scpi.c +++ linux-xilinx-6.8.0/drivers/firmware/arm_scpi.c @@ -630,6 +630,9 @@ if (ret) return ERR_PTR(ret); + if (!buf.opp_count) + return ERR_PTR(-ENOENT); + info = kmalloc(sizeof(*info), GFP_KERNEL); if (!info) return ERR_PTR(-ENOMEM); --- linux-xilinx-6.8.0.orig/drivers/firmware/arm_sdei.c +++ linux-xilinx-6.8.0/drivers/firmware/arm_sdei.c @@ -763,7 +763,7 @@ int err; /* unregister private events */ - cpuhp_remove_state(sdei_entry_point); + cpuhp_remove_state(sdei_hp_state); err = sdei_unregister_shared(); if (err) --- linux-xilinx-6.8.0.orig/drivers/firmware/cirrus/cs_dsp.c +++ linux-xilinx-6.8.0/drivers/firmware/cirrus/cs_dsp.c @@ -522,7 +522,7 @@ { cs_dsp_debugfs_clear(dsp); debugfs_remove_recursive(dsp->debugfs_root); - dsp->debugfs_root = NULL; + dsp->debugfs_root = ERR_PTR(-ENODEV); } EXPORT_SYMBOL_NS_GPL(cs_dsp_cleanup_debugfs, FW_CS_DSP); #else @@ -796,6 +796,9 @@ lockdep_assert_held(&ctl->dsp->pwr_lock); + if (ctl->flags && !(ctl->flags & WMFW_CTL_FLAG_WRITEABLE)) + return -EPERM; + if (len + off * sizeof(u32) > ctl->len) return -EINVAL; @@ -1053,9 +1056,16 @@ int len; }; -static int cs_dsp_coeff_parse_string(int bytes, const u8 **pos, const u8 **str) +static int cs_dsp_coeff_parse_string(int bytes, const u8 **pos, unsigned int avail, + const u8 **str) { - int length; + int length, total_field_len; + + /* String fields are at least one __le32 */ + if (sizeof(__le32) > avail) { + *pos = NULL; + return 0; + } switch (bytes) { case 1: @@ -1068,10 +1078,16 @@ return 0; } + total_field_len = ((length + bytes) + 3) & ~0x03; + if ((unsigned int)total_field_len > avail) { + *pos = NULL; + return 0; + } + if (str) *str = *pos + bytes; - *pos += ((length + bytes) + 3) & ~0x03; + *pos += total_field_len; return length; } @@ -1096,71 +1112,134 @@ return val; } -static inline void cs_dsp_coeff_parse_alg(struct cs_dsp *dsp, const u8 **data, - struct cs_dsp_coeff_parsed_alg *blk) +static int cs_dsp_coeff_parse_alg(struct cs_dsp *dsp, + const struct wmfw_region *region, + struct cs_dsp_coeff_parsed_alg *blk) { const struct wmfw_adsp_alg_data *raw; + unsigned int data_len = le32_to_cpu(region->len); + unsigned int pos; + const u8 *tmp; + + raw = (const struct wmfw_adsp_alg_data *)region->data; switch (dsp->fw_ver) { case 0: case 1: - raw = (const struct wmfw_adsp_alg_data *)*data; - *data = raw->data; + if (sizeof(*raw) > data_len) + return -EOVERFLOW; blk->id = le32_to_cpu(raw->id); blk->name = raw->name; - blk->name_len = strlen(raw->name); + blk->name_len = strnlen(raw->name, ARRAY_SIZE(raw->name)); blk->ncoeff = le32_to_cpu(raw->ncoeff); + + pos = sizeof(*raw); break; default: - blk->id = cs_dsp_coeff_parse_int(sizeof(raw->id), data); - blk->name_len = cs_dsp_coeff_parse_string(sizeof(u8), data, + if (sizeof(raw->id) > data_len) + return -EOVERFLOW; + + tmp = region->data; + blk->id = cs_dsp_coeff_parse_int(sizeof(raw->id), &tmp); + pos = tmp - region->data; + + tmp = ®ion->data[pos]; + blk->name_len = cs_dsp_coeff_parse_string(sizeof(u8), &tmp, data_len - pos, &blk->name); - cs_dsp_coeff_parse_string(sizeof(u16), data, NULL); - blk->ncoeff = cs_dsp_coeff_parse_int(sizeof(raw->ncoeff), data); + if (!tmp) + return -EOVERFLOW; + + pos = tmp - region->data; + cs_dsp_coeff_parse_string(sizeof(u16), &tmp, data_len - pos, NULL); + if (!tmp) + return -EOVERFLOW; + + pos = tmp - region->data; + if (sizeof(raw->ncoeff) > (data_len - pos)) + return -EOVERFLOW; + + blk->ncoeff = cs_dsp_coeff_parse_int(sizeof(raw->ncoeff), &tmp); + pos += sizeof(raw->ncoeff); break; } + if ((int)blk->ncoeff < 0) + return -EOVERFLOW; + cs_dsp_dbg(dsp, "Algorithm ID: %#x\n", blk->id); cs_dsp_dbg(dsp, "Algorithm name: %.*s\n", blk->name_len, blk->name); cs_dsp_dbg(dsp, "# of coefficient descriptors: %#x\n", blk->ncoeff); + + return pos; } -static inline void cs_dsp_coeff_parse_coeff(struct cs_dsp *dsp, const u8 **data, - struct cs_dsp_coeff_parsed_coeff *blk) +static int cs_dsp_coeff_parse_coeff(struct cs_dsp *dsp, + const struct wmfw_region *region, + unsigned int pos, + struct cs_dsp_coeff_parsed_coeff *blk) { const struct wmfw_adsp_coeff_data *raw; + unsigned int data_len = le32_to_cpu(region->len); + unsigned int blk_len, blk_end_pos; const u8 *tmp; - int length; + + raw = (const struct wmfw_adsp_coeff_data *)®ion->data[pos]; + if (sizeof(raw->hdr) > (data_len - pos)) + return -EOVERFLOW; + + blk_len = le32_to_cpu(raw->hdr.size); + if (blk_len > S32_MAX) + return -EOVERFLOW; + + if (blk_len > (data_len - pos - sizeof(raw->hdr))) + return -EOVERFLOW; + + blk_end_pos = pos + sizeof(raw->hdr) + blk_len; + + blk->offset = le16_to_cpu(raw->hdr.offset); + blk->mem_type = le16_to_cpu(raw->hdr.type); switch (dsp->fw_ver) { case 0: case 1: - raw = (const struct wmfw_adsp_coeff_data *)*data; - *data = *data + sizeof(raw->hdr) + le32_to_cpu(raw->hdr.size); + if (sizeof(*raw) > (data_len - pos)) + return -EOVERFLOW; - blk->offset = le16_to_cpu(raw->hdr.offset); - blk->mem_type = le16_to_cpu(raw->hdr.type); blk->name = raw->name; - blk->name_len = strlen(raw->name); + blk->name_len = strnlen(raw->name, ARRAY_SIZE(raw->name)); blk->ctl_type = le16_to_cpu(raw->ctl_type); blk->flags = le16_to_cpu(raw->flags); blk->len = le32_to_cpu(raw->len); break; default: - tmp = *data; - blk->offset = cs_dsp_coeff_parse_int(sizeof(raw->hdr.offset), &tmp); - blk->mem_type = cs_dsp_coeff_parse_int(sizeof(raw->hdr.type), &tmp); - length = cs_dsp_coeff_parse_int(sizeof(raw->hdr.size), &tmp); - blk->name_len = cs_dsp_coeff_parse_string(sizeof(u8), &tmp, + pos += sizeof(raw->hdr); + tmp = ®ion->data[pos]; + blk->name_len = cs_dsp_coeff_parse_string(sizeof(u8), &tmp, data_len - pos, &blk->name); - cs_dsp_coeff_parse_string(sizeof(u8), &tmp, NULL); - cs_dsp_coeff_parse_string(sizeof(u16), &tmp, NULL); + if (!tmp) + return -EOVERFLOW; + + pos = tmp - region->data; + cs_dsp_coeff_parse_string(sizeof(u8), &tmp, data_len - pos, NULL); + if (!tmp) + return -EOVERFLOW; + + pos = tmp - region->data; + cs_dsp_coeff_parse_string(sizeof(u16), &tmp, data_len - pos, NULL); + if (!tmp) + return -EOVERFLOW; + + pos = tmp - region->data; + if (sizeof(raw->ctl_type) + sizeof(raw->flags) + sizeof(raw->len) > + (data_len - pos)) + return -EOVERFLOW; + blk->ctl_type = cs_dsp_coeff_parse_int(sizeof(raw->ctl_type), &tmp); + pos += sizeof(raw->ctl_type); blk->flags = cs_dsp_coeff_parse_int(sizeof(raw->flags), &tmp); + pos += sizeof(raw->flags); blk->len = cs_dsp_coeff_parse_int(sizeof(raw->len), &tmp); - - *data = *data + sizeof(raw->hdr) + length; break; } @@ -1170,6 +1249,8 @@ cs_dsp_dbg(dsp, "\tCoefficient flags: %#x\n", blk->flags); cs_dsp_dbg(dsp, "\tALSA control type: %#x\n", blk->ctl_type); cs_dsp_dbg(dsp, "\tALSA control len: %#x\n", blk->len); + + return blk_end_pos; } static int cs_dsp_check_coeff_flags(struct cs_dsp *dsp, @@ -1193,12 +1274,16 @@ struct cs_dsp_alg_region alg_region = {}; struct cs_dsp_coeff_parsed_alg alg_blk; struct cs_dsp_coeff_parsed_coeff coeff_blk; - const u8 *data = region->data; - int i, ret; + int i, pos, ret; + + pos = cs_dsp_coeff_parse_alg(dsp, region, &alg_blk); + if (pos < 0) + return pos; - cs_dsp_coeff_parse_alg(dsp, &data, &alg_blk); for (i = 0; i < alg_blk.ncoeff; i++) { - cs_dsp_coeff_parse_coeff(dsp, &data, &coeff_blk); + pos = cs_dsp_coeff_parse_coeff(dsp, region, pos, &coeff_blk); + if (pos < 0) + return pos; switch (coeff_blk.ctl_type) { case WMFW_CTL_TYPE_BYTES: @@ -1267,6 +1352,10 @@ const struct wmfw_adsp1_sizes *adsp1_sizes; adsp1_sizes = (void *)&firmware->data[pos]; + if (sizeof(*adsp1_sizes) > firmware->size - pos) { + cs_dsp_err(dsp, "%s: file truncated\n", file); + return 0; + } cs_dsp_dbg(dsp, "%s: %d DM, %d PM, %d ZM\n", file, le32_to_cpu(adsp1_sizes->dm), le32_to_cpu(adsp1_sizes->pm), @@ -1283,6 +1372,10 @@ const struct wmfw_adsp2_sizes *adsp2_sizes; adsp2_sizes = (void *)&firmware->data[pos]; + if (sizeof(*adsp2_sizes) > firmware->size - pos) { + cs_dsp_err(dsp, "%s: file truncated\n", file); + return 0; + } cs_dsp_dbg(dsp, "%s: %d XM, %d YM %d PM, %d ZM\n", file, le32_to_cpu(adsp2_sizes->xm), le32_to_cpu(adsp2_sizes->ym), @@ -1322,7 +1415,6 @@ struct regmap *regmap = dsp->regmap; unsigned int pos = 0; const struct wmfw_header *header; - const struct wmfw_adsp1_sizes *adsp1_sizes; const struct wmfw_footer *footer; const struct wmfw_region *region; const struct cs_dsp_region *mem; @@ -1338,10 +1430,8 @@ ret = -EINVAL; - pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer); - if (pos >= firmware->size) { - cs_dsp_err(dsp, "%s: file too short, %zu bytes\n", - file, firmware->size); + if (sizeof(*header) >= firmware->size) { + ret = -EOVERFLOW; goto out_fw; } @@ -1369,22 +1459,36 @@ pos = sizeof(*header); pos = dsp->ops->parse_sizes(dsp, file, pos, firmware); + if ((pos == 0) || (sizeof(*footer) > firmware->size - pos)) { + ret = -EOVERFLOW; + goto out_fw; + } footer = (void *)&firmware->data[pos]; pos += sizeof(*footer); if (le32_to_cpu(header->len) != pos) { - cs_dsp_err(dsp, "%s: unexpected header length %d\n", - file, le32_to_cpu(header->len)); + ret = -EOVERFLOW; goto out_fw; } cs_dsp_dbg(dsp, "%s: timestamp %llu\n", file, le64_to_cpu(footer->timestamp)); - while (pos < firmware->size && - sizeof(*region) < firmware->size - pos) { + while (pos < firmware->size) { + /* Is there enough data for a complete block header? */ + if (sizeof(*region) > firmware->size - pos) { + ret = -EOVERFLOW; + goto out_fw; + } + region = (void *)&(firmware->data[pos]); + + if (le32_to_cpu(region->len) > firmware->size - pos - sizeof(*region)) { + ret = -EOVERFLOW; + goto out_fw; + } + region_name = "Unknown"; reg = 0; text = NULL; @@ -1441,16 +1545,6 @@ regions, le32_to_cpu(region->len), offset, region_name); - if (le32_to_cpu(region->len) > - firmware->size - pos - sizeof(*region)) { - cs_dsp_err(dsp, - "%s.%d: %s region len %d bytes exceeds file length %zu\n", - file, regions, region_name, - le32_to_cpu(region->len), firmware->size); - ret = -EINVAL; - goto out_fw; - } - if (text) { memcpy(text, region->data, le32_to_cpu(region->len)); cs_dsp_info(dsp, "%s: %s\n", file, text); @@ -1501,6 +1595,9 @@ cs_dsp_buf_free(&buf_list); kfree(text); + if (ret == -EOVERFLOW) + cs_dsp_err(dsp, "%s: file content overflows file data\n", file); + return ret; } @@ -2068,10 +2165,20 @@ pos = le32_to_cpu(hdr->len); blocks = 0; - while (pos < firmware->size && - sizeof(*blk) < firmware->size - pos) { + while (pos < firmware->size) { + /* Is there enough data for a complete block header? */ + if (sizeof(*blk) > firmware->size - pos) { + ret = -EOVERFLOW; + goto out_fw; + } + blk = (void *)(&firmware->data[pos]); + if (le32_to_cpu(blk->len) > firmware->size - pos - sizeof(*blk)) { + ret = -EOVERFLOW; + goto out_fw; + } + type = le16_to_cpu(blk->type); offset = le16_to_cpu(blk->offset); version = le32_to_cpu(blk->ver) >> 8; @@ -2168,17 +2275,6 @@ } if (reg) { - if (le32_to_cpu(blk->len) > - firmware->size - pos - sizeof(*blk)) { - cs_dsp_err(dsp, - "%s.%d: %s region len %d bytes exceeds file length %zu\n", - file, blocks, region_name, - le32_to_cpu(blk->len), - firmware->size); - ret = -EINVAL; - goto out_fw; - } - buf = cs_dsp_buf_alloc(blk->data, le32_to_cpu(blk->len), &buf_list); @@ -2218,6 +2314,10 @@ regmap_async_complete(regmap); cs_dsp_buf_free(&buf_list); kfree(text); + + if (ret == -EOVERFLOW) + cs_dsp_err(dsp, "%s: file content overflows file data\n", file); + return ret; } @@ -2246,6 +2346,11 @@ mutex_init(&dsp->pwr_lock); +#ifdef CONFIG_DEBUG_FS + /* Ensure this is invalid if client never provides a debugfs root */ + dsp->debugfs_root = ERR_PTR(-ENODEV); +#endif + return 0; } --- linux-xilinx-6.8.0.orig/drivers/firmware/dmi-id.c +++ linux-xilinx-6.8.0/drivers/firmware/dmi-id.c @@ -169,9 +169,14 @@ return 0; } +static void dmi_dev_release(struct device *dev) +{ + kfree(dev); +} + static struct class dmi_class = { .name = "dmi", - .dev_release = (void(*)(struct device *)) kfree, + .dev_release = dmi_dev_release, .dev_uevent = dmi_dev_uevent, }; --- linux-xilinx-6.8.0.orig/drivers/firmware/dmi_scan.c +++ linux-xilinx-6.8.0/drivers/firmware/dmi_scan.c @@ -102,6 +102,17 @@ const struct dmi_header *dm = (const struct dmi_header *)data; /* + * If a short entry is found (less than 4 bytes), not only it + * is invalid, but we cannot reliably locate the next entry. + */ + if (dm->length < sizeof(struct dmi_header)) { + pr_warn(FW_BUG + "Corrupted DMI table, offset %zd (only %d entries processed)\n", + data - buf, i); + break; + } + + /* * We want to know the total length (formatted area and * strings) before decoding to make sure we won't run off the * table in dmi_decode or dmi_string --- linux-xilinx-6.8.0.orig/drivers/firmware/efi/Kconfig +++ linux-xilinx-6.8.0/drivers/firmware/efi/Kconfig @@ -76,10 +76,6 @@ bool "Enable the generic EFI decompressor" depends on EFI_GENERIC_STUB && !ARM select HAVE_KERNEL_GZIP - select HAVE_KERNEL_LZ4 - select HAVE_KERNEL_LZMA - select HAVE_KERNEL_LZO - select HAVE_KERNEL_XZ select HAVE_KERNEL_ZSTD help Create the bootable image as an EFI application that carries the --- linux-xilinx-6.8.0.orig/drivers/firmware/efi/Makefile +++ linux-xilinx-6.8.0/drivers/firmware/efi/Makefile @@ -25,6 +25,7 @@ obj-$(CONFIG_EFI_BOOTLOADER_CONTROL) += efibc.o obj-$(CONFIG_EFI_TEST) += test/ obj-$(CONFIG_EFI_DEV_PATH_PARSER) += dev-path-parser.o +obj-$(CONFIG_EFI) += secureboot.o obj-$(CONFIG_APPLE_PROPERTIES) += apple-properties.o obj-$(CONFIG_EFI_RCI2_TABLE) += rci2-table.o obj-$(CONFIG_EFI_EMBEDDED_FIRMWARE) += embedded-firmware.o --- linux-xilinx-6.8.0.orig/drivers/firmware/efi/efi-init.c +++ linux-xilinx-6.8.0/drivers/firmware/efi/efi-init.c @@ -19,6 +19,7 @@ #include #include #include +#include #include @@ -237,6 +238,13 @@ return; } + efi_set_secure_boot(efi_get__secure_boot()); + +#ifdef CONFIG_LOCK_DOWN_IN_SECURE_BOOT + if (efi_enabled(EFI_SECURE_BOOT)) + security_lock_kernel_down("EFI Secure Boot mode", LOCKDOWN_INTEGRITY_MAX); +#endif + reserve_regions(); /* * For memblock manipulation, the cap should come after the memblock_add(). --- linux-xilinx-6.8.0.orig/drivers/firmware/efi/efi.c +++ linux-xilinx-6.8.0/drivers/firmware/efi/efi.c @@ -33,6 +33,7 @@ #include #include #include +#include #include @@ -203,6 +204,8 @@ name_size = sizeof(name); + if (!efi.get_next_variable) + return false; status = efi.get_next_variable(&name_size, &name, &guid); if (status == EFI_UNSUPPORTED) return false; @@ -597,7 +600,8 @@ {EFI_MEMORY_ATTRIBUTES_TABLE_GUID, &efi_mem_attr_table, "MEMATTR" }, {LINUX_EFI_RANDOM_SEED_TABLE_GUID, &efi_rng_seed, "RNG" }, {LINUX_EFI_TPM_EVENT_LOG_GUID, &efi.tpm_log, "TPMEventLog" }, - {LINUX_EFI_TPM_FINAL_LOG_GUID, &efi.tpm_final_log, "TPMFinalLog" }, + {EFI_TCG2_FINAL_EVENTS_TABLE_GUID, &efi.tpm_final_log, "TPMFinalLog" }, + {EFI_CC_FINAL_EVENTS_TABLE_GUID, &efi.tpm_final_log, "CCFinalLog" }, {LINUX_EFI_MEMRESERVE_TABLE_GUID, &mem_reserve, "MEMRESERVE" }, {LINUX_EFI_INITRD_MEDIA_GUID, &initrd, "INITRD" }, {EFI_RT_PROPERTIES_TABLE_GUID, &rt_prop, "RTPROP" }, @@ -919,13 +923,15 @@ EFI_MEMORY_WB | EFI_MEMORY_UCE | EFI_MEMORY_RO | EFI_MEMORY_WP | EFI_MEMORY_RP | EFI_MEMORY_XP | EFI_MEMORY_NV | EFI_MEMORY_SP | EFI_MEMORY_CPU_CRYPTO | - EFI_MEMORY_RUNTIME | EFI_MEMORY_MORE_RELIABLE)) + EFI_MEMORY_MORE_RELIABLE | EFI_MEMORY_HOT_PLUGGABLE | + EFI_MEMORY_RUNTIME)) snprintf(pos, size, "|attr=0x%016llx]", (unsigned long long)attr); else snprintf(pos, size, - "|%3s|%2s|%2s|%2s|%2s|%2s|%2s|%2s|%2s|%3s|%2s|%2s|%2s|%2s]", + "|%3s|%2s|%2s|%2s|%2s|%2s|%2s|%2s|%2s|%2s|%3s|%2s|%2s|%2s|%2s]", attr & EFI_MEMORY_RUNTIME ? "RUN" : "", + attr & EFI_MEMORY_HOT_PLUGGABLE ? "HP" : "", attr & EFI_MEMORY_MORE_RELIABLE ? "MR" : "", attr & EFI_MEMORY_CPU_CRYPTO ? "CC" : "", attr & EFI_MEMORY_SP ? "SP" : "", @@ -990,40 +996,101 @@ return -EINVAL; } +struct efi_error_code { + efi_status_t status; + int errno; + const char *description; +}; + +static const struct efi_error_code efi_error_codes[] = { + { EFI_SUCCESS, 0, "Success"}, +#if 0 + { EFI_LOAD_ERROR, -EPICK_AN_ERRNO, "Load Error"}, +#endif + { EFI_INVALID_PARAMETER, -EINVAL, "Invalid Parameter"}, + { EFI_UNSUPPORTED, -ENOSYS, "Unsupported"}, + { EFI_BAD_BUFFER_SIZE, -ENOSPC, "Bad Buffer Size"}, + { EFI_BUFFER_TOO_SMALL, -ENOSPC, "Buffer Too Small"}, + { EFI_NOT_READY, -EAGAIN, "Not Ready"}, + { EFI_DEVICE_ERROR, -EIO, "Device Error"}, + { EFI_WRITE_PROTECTED, -EROFS, "Write Protected"}, + { EFI_OUT_OF_RESOURCES, -ENOMEM, "Out of Resources"}, +#if 0 + { EFI_VOLUME_CORRUPTED, -EPICK_AN_ERRNO, "Volume Corrupt"}, + { EFI_VOLUME_FULL, -EPICK_AN_ERRNO, "Volume Full"}, + { EFI_NO_MEDIA, -EPICK_AN_ERRNO, "No Media"}, + { EFI_MEDIA_CHANGED, -EPICK_AN_ERRNO, "Media changed"}, +#endif + { EFI_NOT_FOUND, -ENOENT, "Not Found"}, +#if 0 + { EFI_ACCESS_DENIED, -EPICK_AN_ERRNO, "Access Denied"}, + { EFI_NO_RESPONSE, -EPICK_AN_ERRNO, "No Response"}, + { EFI_NO_MAPPING, -EPICK_AN_ERRNO, "No mapping"}, + { EFI_TIMEOUT, -EPICK_AN_ERRNO, "Time out"}, + { EFI_NOT_STARTED, -EPICK_AN_ERRNO, "Not started"}, + { EFI_ALREADY_STARTED, -EPICK_AN_ERRNO, "Already started"}, +#endif + { EFI_ABORTED, -EINTR, "Aborted"}, +#if 0 + { EFI_ICMP_ERROR, -EPICK_AN_ERRNO, "ICMP Error"}, + { EFI_TFTP_ERROR, -EPICK_AN_ERRNO, "TFTP Error"}, + { EFI_PROTOCOL_ERROR, -EPICK_AN_ERRNO, "Protocol Error"}, + { EFI_INCOMPATIBLE_VERSION, -EPICK_AN_ERRNO, "Incompatible Version"}, +#endif + { EFI_SECURITY_VIOLATION, -EACCES, "Security Policy Violation"}, +#if 0 + { EFI_CRC_ERROR, -EPICK_AN_ERRNO, "CRC Error"}, + { EFI_END_OF_MEDIA, -EPICK_AN_ERRNO, "End of Media"}, + { EFI_END_OF_FILE, -EPICK_AN_ERRNO, "End of File"}, + { EFI_INVALID_LANGUAGE, -EPICK_AN_ERRNO, "Invalid Languages"}, + { EFI_COMPROMISED_DATA, -EPICK_AN_ERRNO, "Compromised Data"}, + + // warnings + { EFI_WARN_UNKOWN_GLYPH, -EPICK_AN_ERRNO, "Warning Unknown Glyph"}, + { EFI_WARN_DELETE_FAILURE, -EPICK_AN_ERRNO, "Warning Delete Failure"}, + { EFI_WARN_WRITE_FAILURE, -EPICK_AN_ERRNO, "Warning Write Failure"}, + { EFI_WARN_BUFFER_TOO_SMALL, -EPICK_AN_ERRNO, "Warning Buffer Too Small"}, +#endif +}; + +static int +efi_status_cmp_bsearch(const void *key, const void *item) +{ + u64 status = (u64)(uintptr_t)key; + struct efi_error_code *code = (struct efi_error_code *)item; + + if (status < code->status) + return -1; + if (status > code->status) + return 1; + return 0; +} + int efi_status_to_err(efi_status_t status) { - int err; + struct efi_error_code *found; + size_t num = sizeof(efi_error_codes) / sizeof(struct efi_error_code); - switch (status) { - case EFI_SUCCESS: - err = 0; - break; - case EFI_INVALID_PARAMETER: - err = -EINVAL; - break; - case EFI_OUT_OF_RESOURCES: - err = -ENOSPC; - break; - case EFI_DEVICE_ERROR: - err = -EIO; - break; - case EFI_WRITE_PROTECTED: - err = -EROFS; - break; - case EFI_SECURITY_VIOLATION: - err = -EACCES; - break; - case EFI_NOT_FOUND: - err = -ENOENT; - break; - case EFI_ABORTED: - err = -EINTR; - break; - default: - err = -EINVAL; - } + found = bsearch((void *)(uintptr_t)status, efi_error_codes, + sizeof(struct efi_error_code), num, + efi_status_cmp_bsearch); + if (!found) + return -EINVAL; + return found->errno; +} + +const char * +efi_status_to_str(efi_status_t status) +{ + struct efi_error_code *found; + size_t num = sizeof(efi_error_codes) / sizeof(struct efi_error_code); - return err; + found = bsearch((void *)(uintptr_t)status, efi_error_codes, + sizeof(struct efi_error_code), num, + efi_status_cmp_bsearch); + if (!found) + return "Unknown error code"; + return found->description; } EXPORT_SYMBOL_GPL(efi_status_to_err); --- linux-xilinx-6.8.0.orig/drivers/firmware/efi/fdtparams.c +++ linux-xilinx-6.8.0/drivers/firmware/efi/fdtparams.c @@ -16,16 +16,24 @@ MMSIZE, DCSIZE, DCVERS, + SCBOOT, PARAMCOUNT }; +static u32 __secure_boot __initdata = efi_secureboot_mode_unset; +u32 __init efi_get__secure_boot(void) +{ + return __secure_boot; +} + static __initconst const char name[][22] = { [SYSTAB] = "System Table ", [MMBASE] = "MemMap Address ", [MMSIZE] = "MemMap Size ", [DCSIZE] = "MemMap Desc. Size ", [DCVERS] = "MemMap Desc. Version ", + [SCBOOT] = "Secure Boot Enabled ", }; static __initconst const struct { @@ -53,6 +61,7 @@ [MMSIZE] = "linux,uefi-mmap-size", [DCSIZE] = "linux,uefi-mmap-desc-size", [DCVERS] = "linux,uefi-mmap-desc-ver", + [SCBOOT] = "linux,uefi-secure-boot", } } }; @@ -95,6 +104,7 @@ [MMSIZE] = { &mm->size, sizeof(mm->size) }, [DCSIZE] = { &mm->desc_size, sizeof(mm->desc_size) }, [DCVERS] = { &mm->desc_version, sizeof(mm->desc_version) }, + [SCBOOT] = { &__secure_boot, sizeof(__secure_boot) }, }; BUILD_BUG_ON(ARRAY_SIZE(target) != ARRAY_SIZE(name)); --- linux-xilinx-6.8.0.orig/drivers/firmware/efi/libstub/Makefile +++ linux-xilinx-6.8.0/drivers/firmware/efi/libstub/Makefile @@ -11,7 +11,7 @@ cflags-$(CONFIG_X86_32) := -march=i386 cflags-$(CONFIG_X86_64) := -mcmodel=small -cflags-$(CONFIG_X86) += -m$(BITS) -D__KERNEL__ \ +cflags-$(CONFIG_X86) += -m$(BITS) -D__KERNEL__ -std=gnu11 \ -fPIC -fno-strict-aliasing -mno-red-zone \ -mno-mmx -mno-sse -fshort-wchar \ -Wno-pointer-sign \ --- linux-xilinx-6.8.0.orig/drivers/firmware/efi/libstub/Makefile.zboot +++ linux-xilinx-6.8.0/drivers/firmware/efi/libstub/Makefile.zboot @@ -12,22 +12,16 @@ $(obj)/vmlinux.bin: $(obj)/$(EFI_ZBOOT_PAYLOAD) FORCE $(call if_changed,copy_and_pad) -comp-type-$(CONFIG_KERNEL_GZIP) := gzip -comp-type-$(CONFIG_KERNEL_LZ4) := lz4 -comp-type-$(CONFIG_KERNEL_LZMA) := lzma -comp-type-$(CONFIG_KERNEL_LZO) := lzo -comp-type-$(CONFIG_KERNEL_XZ) := xzkern -comp-type-$(CONFIG_KERNEL_ZSTD) := zstd22 - # in GZIP, the appended le32 carrying the uncompressed size is part of the # format, but in other cases, we just append it at the end for convenience, # causing the original tools to complain when checking image integrity. -# So disregard it when calculating the payload size in the zimage header. -zboot-method-y := $(comp-type-y)_with_size -zboot-size-len-y := 4 +comp-type-y := gzip +zboot-method-y := gzip +zboot-size-len-y := 0 -zboot-method-$(CONFIG_KERNEL_GZIP) := gzip -zboot-size-len-$(CONFIG_KERNEL_GZIP) := 0 +comp-type-$(CONFIG_KERNEL_ZSTD) := zstd +zboot-method-$(CONFIG_KERNEL_ZSTD) := zstd22_with_size +zboot-size-len-$(CONFIG_KERNEL_ZSTD) := 4 $(obj)/vmlinuz: $(obj)/vmlinux.bin FORCE $(call if_changed,$(zboot-method-y)) --- linux-xilinx-6.8.0.orig/drivers/firmware/efi/libstub/efi-stub-helper.c +++ linux-xilinx-6.8.0/drivers/firmware/efi/libstub/efi-stub-helper.c @@ -11,6 +11,7 @@ #include #include +#include #include #include @@ -24,6 +25,8 @@ static bool efi_nosoftreserve; static bool efi_disable_pci_dma = IS_ENABLED(CONFIG_EFI_DISABLE_PCI_DMA); +int efi_mem_encrypt; + bool __pure __efi_soft_reserve_enabled(void) { return !efi_nosoftreserve; @@ -75,6 +78,12 @@ efi_noinitrd = true; } else if (IS_ENABLED(CONFIG_X86_64) && !strcmp(param, "no5lvl")) { efi_no5lvl = true; + } else if (IS_ENABLED(CONFIG_ARCH_HAS_MEM_ENCRYPT) && + !strcmp(param, "mem_encrypt") && val) { + if (parse_option_str(val, "on")) + efi_mem_encrypt = 1; + else if (parse_option_str(val, "off")) + efi_mem_encrypt = -1; } else if (!strcmp(param, "efi") && val) { efi_nochunk = parse_option_str(val, "nochunk"); efi_novamap |= parse_option_str(val, "novamap"); @@ -193,7 +202,7 @@ *load_options_size = load_option_unpacked.optional_data_size; } -enum efistub_event { +enum efistub_event_type { EFISTUB_EVT_INITRD, EFISTUB_EVT_LOAD_OPTIONS, EFISTUB_EVT_COUNT, @@ -219,54 +228,95 @@ }, }; +static_assert(sizeof(efi_tcg2_event_t) == sizeof(efi_cc_event_t)); + +union efistub_event { + efi_tcg2_event_t tcg2_data; + efi_cc_event_t cc_data; +}; + +struct efistub_measured_event { + union efistub_event event_data; + TCG_PCClientTaggedEvent tagged_event __packed; +}; + static efi_status_t efi_measure_tagged_event(unsigned long load_addr, unsigned long load_size, - enum efistub_event event) + enum efistub_event_type event) { + union { + efi_status_t + (__efiapi *hash_log_extend_event)(void *, u64, efi_physical_addr_t, + u64, const union efistub_event *); + struct { u32 hash_log_extend_event; } mixed_mode; + } method; + struct efistub_measured_event *evt; + int size = struct_size(evt, tagged_event.tagged_event_data, + events[event].event_data_len); efi_guid_t tcg2_guid = EFI_TCG2_PROTOCOL_GUID; efi_tcg2_protocol_t *tcg2 = NULL; + union efistub_event ev; efi_status_t status; + void *protocol; efi_bs_call(locate_protocol, &tcg2_guid, NULL, (void **)&tcg2); if (tcg2) { - struct efi_measured_event { - efi_tcg2_event_t event_data; - efi_tcg2_tagged_event_t tagged_event; - u8 tagged_event_data[]; - } *evt; - int size = sizeof(*evt) + events[event].event_data_len; - - status = efi_bs_call(allocate_pool, EFI_LOADER_DATA, size, - (void **)&evt); - if (status != EFI_SUCCESS) - goto fail; - - evt->event_data = (struct efi_tcg2_event){ + ev.tcg2_data = (struct efi_tcg2_event){ .event_size = size, - .event_header.header_size = sizeof(evt->event_data.event_header), + .event_header.header_size = sizeof(ev.tcg2_data.event_header), .event_header.header_version = EFI_TCG2_EVENT_HEADER_VERSION, .event_header.pcr_index = events[event].pcr_index, .event_header.event_type = EV_EVENT_TAG, }; + protocol = tcg2; + method.hash_log_extend_event = + (void *)efi_table_attr(tcg2, hash_log_extend_event); + } else { + efi_guid_t cc_guid = EFI_CC_MEASUREMENT_PROTOCOL_GUID; + efi_cc_protocol_t *cc = NULL; + + efi_bs_call(locate_protocol, &cc_guid, NULL, (void **)&cc); + if (!cc) + return EFI_UNSUPPORTED; - evt->tagged_event = (struct efi_tcg2_tagged_event){ - .tagged_event_id = events[event].event_id, - .tagged_event_data_size = events[event].event_data_len, + ev.cc_data = (struct efi_cc_event){ + .event_size = size, + .event_header.header_size = sizeof(ev.cc_data.event_header), + .event_header.header_version = EFI_CC_EVENT_HEADER_VERSION, + .event_header.event_type = EV_EVENT_TAG, }; - memcpy(evt->tagged_event_data, events[event].event_data, - events[event].event_data_len); - - status = efi_call_proto(tcg2, hash_log_extend_event, 0, - load_addr, load_size, &evt->event_data); - efi_bs_call(free_pool, evt); - + status = efi_call_proto(cc, map_pcr_to_mr_index, + events[event].pcr_index, + &ev.cc_data.event_header.mr_index); if (status != EFI_SUCCESS) goto fail; - return EFI_SUCCESS; + + protocol = cc; + method.hash_log_extend_event = + (void *)efi_table_attr(cc, hash_log_extend_event); } - return EFI_UNSUPPORTED; + status = efi_bs_call(allocate_pool, EFI_LOADER_DATA, size, (void **)&evt); + if (status != EFI_SUCCESS) + goto fail; + + *evt = (struct efistub_measured_event) { + .event_data = ev, + .tagged_event.tagged_event_id = events[event].event_id, + .tagged_event.tagged_event_data_size = events[event].event_data_len, + }; + + memcpy(evt->tagged_event.tagged_event_data, events[event].event_data, + events[event].event_data_len); + + status = efi_fn_call(&method, hash_log_extend_event, protocol, 0, + load_addr, load_size, &evt->event_data); + efi_bs_call(free_pool, evt); + + if (status == EFI_SUCCESS) + return EFI_SUCCESS; + fail: efi_warn("Failed to measure data for event %d: 0x%lx\n", event, status); return status; --- linux-xilinx-6.8.0.orig/drivers/firmware/efi/libstub/efi-stub.c +++ linux-xilinx-6.8.0/drivers/firmware/efi/libstub/efi-stub.c @@ -129,7 +129,7 @@ if (IS_ENABLED(CONFIG_CMDLINE_EXTEND) || IS_ENABLED(CONFIG_CMDLINE_FORCE) || - cmdline_size == 0) { + cmdline[0] == 0) { status = efi_parse_options(CONFIG_CMDLINE); if (status != EFI_SUCCESS) { efi_err("Failed to parse options\n"); @@ -149,7 +149,7 @@ return EFI_SUCCESS; fail_free_cmdline: - efi_bs_call(free_pool, cmdline_ptr); + efi_bs_call(free_pool, cmdline); return status; } @@ -167,7 +167,7 @@ si = setup_graphics(); - efi_retrieve_tpm2_eventlog(); + efi_retrieve_eventlog(); /* Ask the firmware to clear memory on unclean shutdown */ efi_enable_reset_attack_mitigation(); --- linux-xilinx-6.8.0.orig/drivers/firmware/efi/libstub/efistub.h +++ linux-xilinx-6.8.0/drivers/firmware/efi/libstub/efistub.h @@ -37,8 +37,8 @@ extern bool efi_nochunk; extern bool efi_nokaslr; extern int efi_loglevel; +extern int efi_mem_encrypt; extern bool efi_novamap; - extern const efi_system_table_t *efi_system_table; typedef union efi_dxe_services_table efi_dxe_services_table_t; @@ -171,7 +171,7 @@ * the EFI memory map. Other related structures, e.g. x86 e820ext, need * to factor in this headroom requirement as well. */ -#define EFI_MMAP_NR_SLACK_SLOTS 8 +#define EFI_MMAP_NR_SLACK_SLOTS 16 typedef struct efi_generic_dev_path efi_device_path_protocol_t; @@ -843,14 +843,14 @@ /* u8[] event follows here */ } __packed; -struct efi_tcg2_tagged_event { - u32 tagged_event_id; - u32 tagged_event_data_size; - /* u8 tagged event data follows here */ -} __packed; +/* from TCG PC Client Platform Firmware Profile Specification */ +typedef struct tdTCG_PCClientTaggedEvent { + u32 tagged_event_id; + u32 tagged_event_data_size; + u8 tagged_event_data[]; +} TCG_PCClientTaggedEvent; typedef struct efi_tcg2_event efi_tcg2_event_t; -typedef struct efi_tcg2_tagged_event efi_tcg2_tagged_event_t; typedef union efi_tcg2_protocol efi_tcg2_protocol_t; union efi_tcg2_protocol { @@ -882,6 +882,87 @@ } mixed_mode; }; +typedef struct { + u8 major; + u8 minor; +} efi_cc_version_t; + +typedef struct { + u8 type; + u8 sub_type; +} efi_cc_type_t; + +/* EFI CC type/subtype defines */ +#define EFI_CC_TYPE_NONE 0 +#define EFI_CC_TYPE_AMD_SEV 1 +#define EFI_CC_TYPE_INTEL_TDX 2 + +typedef u32 efi_cc_mr_index_t; + +struct efi_cc_event { + u32 event_size; + struct { + u32 header_size; + u16 header_version; + u32 mr_index; + u32 event_type; + } __packed event_header; + /* u8[] event follows here */ +} __packed; + +typedef struct efi_cc_event efi_cc_event_t; + +typedef u32 efi_cc_event_log_bitmap_t; +typedef u32 efi_cc_event_log_format_t; +typedef u32 efi_cc_event_algorithm_bitmap_t; + +typedef struct { + u8 size; + efi_cc_version_t structure_version; + efi_cc_version_t protocol_version; + efi_cc_event_algorithm_bitmap_t hash_algorithm_bitmap; + efi_cc_event_log_bitmap_t supported_event_logs; + efi_cc_type_t cc_type; +} efi_cc_boot_service_cap_t; + +#define EFI_CC_EVENT_HEADER_VERSION 1 + +#define EFI_CC_BOOT_HASH_ALG_SHA384 0x00000004 + +#define EFI_CC_EVENT_LOG_FORMAT_TCG_2 0x00000002 + +typedef union efi_cc_protocol efi_cc_protocol_t; + +union efi_cc_protocol { + struct { + efi_status_t + (__efiapi *get_capability)(efi_cc_protocol_t *, + efi_cc_boot_service_cap_t *); + + efi_status_t + (__efiapi *get_event_log)(efi_cc_protocol_t *, + efi_cc_event_log_format_t, + efi_physical_addr_t *, + efi_physical_addr_t *, + efi_bool_t *); + + efi_status_t + (__efiapi *hash_log_extend_event)(efi_cc_protocol_t *, u64, + efi_physical_addr_t, u64, + const efi_cc_event_t *); + + efi_status_t + (__efiapi *map_pcr_to_mr_index)(efi_cc_protocol_t *, u32, + efi_cc_mr_index_t *); + }; + struct { + u32 get_capability; + u32 get_event_log; + u32 hash_log_extend_event; + u32 map_pcr_to_mr_index; + } mixed_mode; +}; + struct riscv_efi_boot_protocol { u64 revision; @@ -1061,7 +1142,7 @@ efi_enable_reset_attack_mitigation(void) { } #endif -void efi_retrieve_tpm2_eventlog(void); +void efi_retrieve_eventlog(void); struct screen_info *alloc_screen_info(void); struct screen_info *__alloc_screen_info(void); --- linux-xilinx-6.8.0.orig/drivers/firmware/efi/libstub/fdt.c +++ linux-xilinx-6.8.0/drivers/firmware/efi/libstub/fdt.c @@ -132,6 +132,12 @@ } } + fdt_val32 = cpu_to_fdt32(efi_get_secureboot()); + status = fdt_setprop(fdt, node, "linux,uefi-secure-boot", + &fdt_val32, sizeof(fdt_val32)); + if (status) + goto fdt_set_fail; + /* Shrink the FDT back to its minimum size: */ fdt_pack(fdt); @@ -335,8 +341,8 @@ fail: efi_free(fdt_size, fdt_addr); - - efi_bs_call(free_pool, priv.runtime_map); + if (!efi_novamap) + efi_bs_call(free_pool, priv.runtime_map); return EFI_LOAD_ERROR; } --- linux-xilinx-6.8.0.orig/drivers/firmware/efi/libstub/loongarch.c +++ linux-xilinx-6.8.0/drivers/firmware/efi/libstub/loongarch.c @@ -41,7 +41,7 @@ unsigned long __weak kernel_entry_address(unsigned long kernel_addr, efi_loaded_image_t *image) { - return *(unsigned long *)(kernel_addr + 8) - VMLINUX_LOAD_ADDRESS + kernel_addr; + return *(unsigned long *)(kernel_addr + 8) - PHYSADDR(VMLINUX_LOAD_ADDRESS) + kernel_addr; } efi_status_t efi_boot_kernel(void *handle, efi_loaded_image_t *image, --- linux-xilinx-6.8.0.orig/drivers/firmware/efi/libstub/randomalloc.c +++ linux-xilinx-6.8.0/drivers/firmware/efi/libstub/randomalloc.c @@ -25,6 +25,9 @@ if (md->type != EFI_CONVENTIONAL_MEMORY) return 0; + if (md->attribute & EFI_MEMORY_HOT_PLUGGABLE) + return 0; + if (efi_soft_reserve_enabled() && (md->attribute & EFI_MEMORY_SP)) return 0; @@ -120,7 +123,7 @@ continue; } - target = round_up(md->phys_addr, align) + target_slot * align; + target = round_up(max_t(u64, md->phys_addr, alloc_min), align) + target_slot * align; pages = size / EFI_PAGE_SIZE; status = efi_bs_call(allocate_pages, EFI_ALLOCATE_ADDRESS, --- linux-xilinx-6.8.0.orig/drivers/firmware/efi/libstub/relocate.c +++ linux-xilinx-6.8.0/drivers/firmware/efi/libstub/relocate.c @@ -53,6 +53,9 @@ if (desc->type != EFI_CONVENTIONAL_MEMORY) continue; + if (desc->attribute & EFI_MEMORY_HOT_PLUGGABLE) + continue; + if (efi_soft_reserve_enabled() && (desc->attribute & EFI_MEMORY_SP)) continue; --- linux-xilinx-6.8.0.orig/drivers/firmware/efi/libstub/screen_info.c +++ linux-xilinx-6.8.0/drivers/firmware/efi/libstub/screen_info.c @@ -32,6 +32,8 @@ if (status != EFI_SUCCESS) return NULL; + memset(si, 0, sizeof(*si)); + status = efi_bs_call(install_configuration_table, &screen_info_guid, si); if (status == EFI_SUCCESS) --- linux-xilinx-6.8.0.orig/drivers/firmware/efi/libstub/tpm.c +++ linux-xilinx-6.8.0/drivers/firmware/efi/libstub/tpm.c @@ -47,39 +47,18 @@ #endif -void efi_retrieve_tpm2_eventlog(void) +static void efi_retrieve_tcg2_eventlog(int version, efi_physical_addr_t log_location, + efi_physical_addr_t log_last_entry, + efi_bool_t truncated, + struct efi_tcg2_final_events_table *final_events_table) { - efi_guid_t tcg2_guid = EFI_TCG2_PROTOCOL_GUID; efi_guid_t linux_eventlog_guid = LINUX_EFI_TPM_EVENT_LOG_GUID; efi_status_t status; - efi_physical_addr_t log_location = 0, log_last_entry = 0; struct linux_efi_tpm_eventlog *log_tbl = NULL; - struct efi_tcg2_final_events_table *final_events_table = NULL; unsigned long first_entry_addr, last_entry_addr; size_t log_size, last_entry_size; - efi_bool_t truncated; - int version = EFI_TCG2_EVENT_LOG_FORMAT_TCG_2; - efi_tcg2_protocol_t *tcg2_protocol = NULL; int final_events_size = 0; - status = efi_bs_call(locate_protocol, &tcg2_guid, NULL, - (void **)&tcg2_protocol); - if (status != EFI_SUCCESS) - return; - - status = efi_call_proto(tcg2_protocol, get_event_log, version, - &log_location, &log_last_entry, &truncated); - - if (status != EFI_SUCCESS || !log_location) { - version = EFI_TCG2_EVENT_LOG_FORMAT_TCG_1_2; - status = efi_call_proto(tcg2_protocol, get_event_log, version, - &log_location, &log_last_entry, - &truncated); - if (status != EFI_SUCCESS || !log_location) - return; - - } - first_entry_addr = (unsigned long) log_location; /* @@ -93,8 +72,10 @@ * get_event_log only returns the address of the last entry. * We need to calculate its size to deduce the full size of * the logs. + * + * CC Event log also uses TCG2 format, handle it same as TPM2. */ - if (version == EFI_TCG2_EVENT_LOG_FORMAT_TCG_2) { + if (version > EFI_TCG2_EVENT_LOG_FORMAT_TCG_1_2) { /* * The TCG2 log format has variable length entries, * and the information to decode the hash algorithms @@ -115,7 +96,7 @@ } /* Allocate space for the logs and copy them. */ - status = efi_bs_call(allocate_pool, EFI_LOADER_DATA, + status = efi_bs_call(allocate_pool, EFI_ACPI_RECLAIM_MEMORY, sizeof(*log_tbl) + log_size, (void **)&log_tbl); if (status != EFI_SUCCESS) { @@ -127,8 +108,6 @@ * Figure out whether any events have already been logged to the * final events structure, and if so how much space they take up */ - if (version == EFI_TCG2_EVENT_LOG_FORMAT_TCG_2) - final_events_table = get_efi_config_table(LINUX_EFI_TPM_FINAL_LOG_GUID); if (final_events_table && final_events_table->nr_events) { struct tcg_pcr_event2_head *header; int offset; @@ -165,3 +144,50 @@ err_free: efi_bs_call(free_pool, log_tbl); } + +void efi_retrieve_eventlog(void) +{ + struct efi_tcg2_final_events_table *final_events_table = NULL; + efi_physical_addr_t log_location = 0, log_last_entry = 0; + efi_guid_t tpm2_guid = EFI_TCG2_PROTOCOL_GUID; + int version = EFI_TCG2_EVENT_LOG_FORMAT_TCG_2; + efi_tcg2_protocol_t *tpm2 = NULL; + efi_bool_t truncated; + efi_status_t status; + + status = efi_bs_call(locate_protocol, &tpm2_guid, NULL, (void **)&tpm2); + if (status == EFI_SUCCESS) { + status = efi_call_proto(tpm2, get_event_log, version, &log_location, + &log_last_entry, &truncated); + + if (status != EFI_SUCCESS || !log_location) { + version = EFI_TCG2_EVENT_LOG_FORMAT_TCG_1_2; + status = efi_call_proto(tpm2, get_event_log, version, + &log_location, &log_last_entry, + &truncated); + } else { + final_events_table = + get_efi_config_table(EFI_TCG2_FINAL_EVENTS_TABLE_GUID); + } + } else { + efi_guid_t cc_guid = EFI_CC_MEASUREMENT_PROTOCOL_GUID; + efi_cc_protocol_t *cc = NULL; + + status = efi_bs_call(locate_protocol, &cc_guid, NULL, (void **)&cc); + if (status != EFI_SUCCESS) + return; + + version = EFI_CC_EVENT_LOG_FORMAT_TCG_2; + status = efi_call_proto(cc, get_event_log, version, &log_location, + &log_last_entry, &truncated); + + final_events_table = + get_efi_config_table(EFI_CC_FINAL_EVENTS_TABLE_GUID); + } + + if (status != EFI_SUCCESS || !log_location) + return; + + efi_retrieve_tcg2_eventlog(version, log_location, log_last_entry, + truncated, final_events_table); +} --- linux-xilinx-6.8.0.orig/drivers/firmware/efi/libstub/x86-stub.c +++ linux-xilinx-6.8.0/drivers/firmware/efi/libstub/x86-stub.c @@ -21,6 +21,8 @@ #include "efistub.h" #include "x86-stub.h" +extern char _bss[], _ebss[]; + const efi_system_table_t *efi_system_table; const efi_dxe_services_table_t *efi_dxe_table; static efi_loaded_image_t *image = NULL; @@ -236,6 +238,15 @@ rounded_end = roundup(start + size, EFI_PAGE_SIZE); if (memattr != NULL) { + status = efi_call_proto(memattr, set_memory_attributes, + rounded_start, + rounded_end - rounded_start, + EFI_MEMORY_RO); + if (status != EFI_SUCCESS) { + efi_warn("Failed to set EFI_MEMORY_RO attribute\n"); + return status; + } + status = efi_call_proto(memattr, clear_memory_attributes, rounded_start, rounded_end - rounded_start, @@ -458,13 +469,17 @@ efi_status_t __efiapi efi_pe_entry(efi_handle_t handle, efi_system_table_t *sys_table_arg) { - static struct boot_params boot_params __page_aligned_bss; - struct setup_header *hdr = &boot_params.hdr; efi_guid_t proto = LOADED_IMAGE_PROTOCOL_GUID; + struct boot_params *boot_params; + struct setup_header *hdr; int options_size = 0; efi_status_t status; + unsigned long alloc; char *cmdline_ptr; + if (efi_is_native()) + memset(_bss, 0, _ebss - _bss); + efi_system_table = sys_table_arg; /* Check if we were booted by the EFI firmware */ @@ -477,25 +492,32 @@ efi_exit(handle, status); } + status = efi_allocate_pages(PARAM_SIZE, &alloc, ULONG_MAX); + if (status != EFI_SUCCESS) + efi_exit(handle, status); + + boot_params = memset((void *)alloc, 0x0, PARAM_SIZE); + hdr = &boot_params->hdr; + /* Assign the setup_header fields that the kernel actually cares about */ hdr->root_flags = 1; hdr->vid_mode = 0xffff; hdr->type_of_loader = 0x21; + hdr->initrd_addr_max = INT_MAX; /* Convert unicode cmdline to ascii */ cmdline_ptr = efi_convert_cmdline(image, &options_size); - if (!cmdline_ptr) - goto fail; + if (!cmdline_ptr) { + efi_free(PARAM_SIZE, alloc); + efi_exit(handle, EFI_OUT_OF_RESOURCES); + } efi_set_u64_split((unsigned long)cmdline_ptr, &hdr->cmd_line_ptr, - &boot_params.ext_cmd_line_ptr); + &boot_params->ext_cmd_line_ptr); - efi_stub_entry(handle, sys_table_arg, &boot_params); + efi_stub_entry(handle, sys_table_arg, boot_params); /* not reached */ - -fail: - efi_exit(handle, status); } static void add_e820ext(struct boot_params *params, @@ -761,6 +783,26 @@ efi_warn("Decompression failed: %s\n", str); } +static const char *cmdline_memmap_override; + +static efi_status_t parse_options(const char *cmdline) +{ + static const char opts[][14] = { + "mem=", "memmap=", "efi_fake_mem=", "hugepages=" + }; + + for (int i = 0; i < ARRAY_SIZE(opts); i++) { + const char *p = strstr(cmdline, opts[i]); + + if (p == cmdline || (p > cmdline && isspace(p[-1]))) { + cmdline_memmap_override = opts[i]; + break; + } + } + + return efi_parse_options(cmdline); +} + static efi_status_t efi_decompress_kernel(unsigned long *kernel_entry) { unsigned long virt_addr = LOAD_PHYSICAL_ADDR; @@ -792,6 +834,10 @@ !memcmp(efistub_fw_vendor(), ami, sizeof(ami))) { efi_debug("AMI firmware v2.0 or older detected - disabling physical KASLR\n"); seed[0] = 0; + } else if (cmdline_memmap_override) { + efi_info("%s detected on the kernel command line - disabling physical KASLR\n", + cmdline_memmap_override); + seed[0] = 0; } boot_params_ptr->hdr.loadflags |= KASLR_FLAG; @@ -812,7 +858,7 @@ *kernel_entry = addr + entry; - return efi_adjust_memory_range_protection(addr, kernel_total_size); + return efi_adjust_memory_range_protection(addr, kernel_text_size); } static void __noreturn enter_kernel(unsigned long kernel_addr, @@ -868,7 +914,7 @@ } #ifdef CONFIG_CMDLINE_BOOL - status = efi_parse_options(CONFIG_CMDLINE); + status = parse_options(CONFIG_CMDLINE); if (status != EFI_SUCCESS) { efi_err("Failed to parse options\n"); goto fail; @@ -877,13 +923,16 @@ if (!IS_ENABLED(CONFIG_CMDLINE_OVERRIDE)) { unsigned long cmdline_paddr = ((u64)hdr->cmd_line_ptr | ((u64)boot_params->ext_cmd_line_ptr << 32)); - status = efi_parse_options((char *)cmdline_paddr); + status = parse_options((char *)cmdline_paddr); if (status != EFI_SUCCESS) { efi_err("Failed to parse options\n"); goto fail; } } + if (efi_mem_encrypt > 0) + hdr->xloadflags |= XLF_MEM_ENCRYPTION; + status = efi_decompress_kernel(&kernel_entry); if (status != EFI_SUCCESS) { efi_err("Failed to decompress kernel\n"); @@ -923,7 +972,7 @@ efi_random_get_seed(); - efi_retrieve_tpm2_eventlog(); + efi_retrieve_eventlog(); setup_graphics(boot_params); @@ -958,8 +1007,6 @@ void efi_handover_entry(efi_handle_t handle, efi_system_table_t *sys_table_arg, struct boot_params *boot_params) { - extern char _bss[], _ebss[]; - memset(_bss, 0, _ebss - _bss); efi_stub_entry(handle, sys_table_arg, boot_params); } --- linux-xilinx-6.8.0.orig/drivers/firmware/efi/libstub/zboot.lds +++ linux-xilinx-6.8.0/drivers/firmware/efi/libstub/zboot.lds @@ -41,6 +41,7 @@ } /DISCARD/ : { + *(.discard .discard.*) *(.modinfo .init.modinfo) } } --- linux-xilinx-6.8.0.orig/drivers/firmware/efi/memmap.c +++ linux-xilinx-6.8.0/drivers/firmware/efi/memmap.c @@ -15,10 +15,6 @@ #include #include -#ifndef __efi_memmap_free -#define __efi_memmap_free(phys, size, flags) do { } while (0) -#endif - /** * __efi_memmap_init - Common code for mapping the EFI memory map * @data: EFI memory map data @@ -51,11 +47,6 @@ return -ENOMEM; } - if (efi.memmap.flags & (EFI_MEMMAP_MEMBLOCK | EFI_MEMMAP_SLAB)) - __efi_memmap_free(efi.memmap.phys_map, - efi.memmap.desc_size * efi.memmap.nr_map, - efi.memmap.flags); - map.phys_map = data->phys_map; map.nr_map = data->size / data->desc_size; map.map_end = map.map + data->size; --- linux-xilinx-6.8.0.orig/drivers/firmware/efi/secureboot.c +++ linux-xilinx-6.8.0/drivers/firmware/efi/secureboot.c @@ -0,0 +1,38 @@ +/* Core kernel secure boot support. + * + * Copyright (C) 2017 Red Hat, Inc. All Rights Reserved. + * Written by David Howells (dhowells@redhat.com) + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public Licence + * as published by the Free Software Foundation; either version + * 2 of the Licence, or (at your option) any later version. + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include + +/* + * Decide what to do when UEFI secure boot mode is enabled. + */ +void __init efi_set_secure_boot(enum efi_secureboot_mode mode) +{ + if (efi_enabled(EFI_BOOT)) { + switch (mode) { + case efi_secureboot_mode_disabled: + pr_info("Secure boot disabled\n"); + break; + case efi_secureboot_mode_enabled: + set_bit(EFI_SECURE_BOOT, &efi.flags); + pr_info("Secure boot enabled\n"); + break; + default: + pr_warn("Secure boot could not be determined (mode %u)\n", + mode); + break; + } + } +} --- linux-xilinx-6.8.0.orig/drivers/firmware/efi/sysfb_efi.c +++ linux-xilinx-6.8.0/drivers/firmware/efi/sysfb_efi.c @@ -91,6 +91,7 @@ _ret_; \ }) +#ifdef CONFIG_EFI static int __init efifb_set_system(const struct dmi_system_id *id) { struct efifb_dmi_info *info = id->driver_data; @@ -346,7 +347,6 @@ .add_links = efifb_add_links, }; -#ifdef CONFIG_EFI static struct fwnode_handle efifb_fwnode; __init void sysfb_apply_efi_quirks(void) --- linux-xilinx-6.8.0.orig/drivers/firmware/efi/tpm.c +++ linux-xilinx-6.8.0/drivers/firmware/efi/tpm.c @@ -40,7 +40,8 @@ { struct linux_efi_tpm_eventlog *log_tbl; struct efi_tcg2_final_events_table *final_tbl; - int tbl_size; + unsigned int tbl_size; + int final_tbl_size; int ret = 0; if (efi.tpm_log == EFI_INVALID_TABLE_ADDR) { @@ -80,26 +81,26 @@ goto out; } - tbl_size = 0; + final_tbl_size = 0; if (final_tbl->nr_events != 0) { void *events = (void *)efi.tpm_final_log + sizeof(final_tbl->version) + sizeof(final_tbl->nr_events); - tbl_size = tpm2_calc_event_log_size(events, - final_tbl->nr_events, - log_tbl->log); + final_tbl_size = tpm2_calc_event_log_size(events, + final_tbl->nr_events, + log_tbl->log); } - if (tbl_size < 0) { + if (final_tbl_size < 0) { pr_err(FW_BUG "Failed to parse event in TPM Final Events Log\n"); ret = -EINVAL; goto out_calc; } memblock_reserve(efi.tpm_final_log, - tbl_size + sizeof(*final_tbl)); - efi_tpm_final_log_size = tbl_size; + final_tbl_size + sizeof(*final_tbl)); + efi_tpm_final_log_size = final_tbl_size; out_calc: early_memunmap(final_tbl, sizeof(*final_tbl)); --- linux-xilinx-6.8.0.orig/drivers/firmware/efi/unaccepted_memory.c +++ linux-xilinx-6.8.0/drivers/firmware/efi/unaccepted_memory.c @@ -4,6 +4,7 @@ #include #include #include +#include #include /* Protects unaccepted memory bitmap and accepting_list */ @@ -149,6 +150,9 @@ } list_del(&range.list); + + touch_softlockup_watchdog(); + spin_unlock_irqrestore(&unaccepted_memory_lock, flags); } --- linux-xilinx-6.8.0.orig/drivers/firmware/google/gsmi.c +++ linux-xilinx-6.8.0/drivers/firmware/google/gsmi.c @@ -918,7 +918,8 @@ gsmi_dev.pdev = platform_device_register_full(&gsmi_dev_info); if (IS_ERR(gsmi_dev.pdev)) { printk(KERN_ERR "gsmi: unable to register platform device\n"); - return PTR_ERR(gsmi_dev.pdev); + ret = PTR_ERR(gsmi_dev.pdev); + goto out_unregister; } /* SMI access needs to be serialized */ @@ -1056,10 +1057,11 @@ gsmi_buf_free(gsmi_dev.name_buf); kmem_cache_destroy(gsmi_dev.mem_pool); platform_device_unregister(gsmi_dev.pdev); - pr_info("gsmi: failed to load: %d\n", ret); +out_unregister: #ifdef CONFIG_PM platform_driver_unregister(&gsmi_driver_info); #endif + pr_info("gsmi: failed to load: %d\n", ret); return ret; } --- linux-xilinx-6.8.0.orig/drivers/firmware/iscsi_ibft.c +++ linux-xilinx-6.8.0/drivers/firmware/iscsi_ibft.c @@ -310,7 +310,10 @@ str += sprintf_ipaddr(str, nic->ip_addr); break; case ISCSI_BOOT_ETH_SUBNET_MASK: - val = cpu_to_be32(~((1 << (32-nic->subnet_mask_prefix))-1)); + if (nic->subnet_mask_prefix > 32) + val = cpu_to_be32(~0); + else + val = cpu_to_be32(~((1 << (32-nic->subnet_mask_prefix))-1)); str += sprintf(str, "%pI4", &val); break; case ISCSI_BOOT_ETH_PREFIX_LEN: --- linux-xilinx-6.8.0.orig/drivers/firmware/microchip/mpfs-auto-update.c +++ linux-xilinx-6.8.0/drivers/firmware/microchip/mpfs-auto-update.c @@ -74,14 +74,11 @@ #define AUTO_UPDATE_RESERVED_SIZE SZ_1M #define AUTO_UPDATE_BITSTREAM_BASE (AUTO_UPDATE_DIRECTORY_SIZE + AUTO_UPDATE_RESERVED_SIZE) -#define AUTO_UPDATE_TIMEOUT_MS 60000 - struct mpfs_auto_update_priv { struct mpfs_sys_controller *sys_controller; struct device *dev; struct mtd_info *flash; struct fw_upload *fw_uploader; - struct completion programming_complete; size_t size_per_bitstream; bool cancel_request; }; @@ -143,19 +140,6 @@ static enum fw_upload_err mpfs_auto_update_poll_complete(struct fw_upload *fw_uploader) { - struct mpfs_auto_update_priv *priv = fw_uploader->dd_handle; - int ret; - - /* - * There is no meaningful way to get the status of the programming while - * it is in progress, so attempting anything other than waiting for it - * to complete would be misplaced. - */ - ret = wait_for_completion_timeout(&priv->programming_complete, - msecs_to_jiffies(AUTO_UPDATE_TIMEOUT_MS)); - if (ret) - return FW_UPLOAD_ERR_TIMEOUT; - return FW_UPLOAD_ERR_NONE; } @@ -206,10 +190,12 @@ if (ret | response->resp_status) { dev_warn(priv->dev, "Verification of Upgrade Image failed!\n"); ret = ret ? ret : -EBADMSG; + goto free_message; } dev_info(priv->dev, "Verification of Upgrade Image passed!\n"); +free_message: devm_kfree(priv->dev, message); free_response: devm_kfree(priv->dev, response); @@ -344,30 +330,20 @@ u32 offset, u32 size, u32 *written) { struct mpfs_auto_update_priv *priv = fw_uploader->dd_handle; - enum fw_upload_err err = FW_UPLOAD_ERR_NONE; int ret; - reinit_completion(&priv->programming_complete); - ret = mpfs_auto_update_write_bitstream(fw_uploader, data, offset, size, written); - if (ret) { - err = FW_UPLOAD_ERR_RW_ERROR; - goto out; - } + if (ret) + return FW_UPLOAD_ERR_RW_ERROR; - if (priv->cancel_request) { - err = FW_UPLOAD_ERR_CANCELED; - goto out; - } + if (priv->cancel_request) + return FW_UPLOAD_ERR_CANCELED; ret = mpfs_auto_update_verify_image(fw_uploader); if (ret) - err = FW_UPLOAD_ERR_FW_INVALID; + return FW_UPLOAD_ERR_FW_INVALID; -out: - complete(&priv->programming_complete); - - return err; + return FW_UPLOAD_ERR_NONE; } static const struct fw_upload_ops mpfs_auto_update_ops = { @@ -461,8 +437,6 @@ return dev_err_probe(dev, ret, "The current bitstream does not support auto-update\n"); - init_completion(&priv->programming_complete); - fw_uploader = firmware_upload_register(THIS_MODULE, dev, "mpfs-auto-update", &mpfs_auto_update_ops, priv); if (IS_ERR(fw_uploader)) --- linux-xilinx-6.8.0.orig/drivers/firmware/psci/psci.c +++ linux-xilinx-6.8.0/drivers/firmware/psci/psci.c @@ -497,10 +497,12 @@ static int psci_system_suspend(unsigned long unused) { + int err; phys_addr_t pa_cpu_resume = __pa_symbol(cpu_resume); - return invoke_psci_fn(PSCI_FN_NATIVE(1_0, SYSTEM_SUSPEND), + err = invoke_psci_fn(PSCI_FN_NATIVE(1_0, SYSTEM_SUSPEND), pa_cpu_resume, 0, 0); + return psci_to_linux_errno(err); } static int psci_system_suspend_enter(suspend_state_t state) --- linux-xilinx-6.8.0.orig/drivers/firmware/qcom/qcom_qseecom_uefisecapp.c +++ linux-xilinx-6.8.0/drivers/firmware/qcom/qcom_qseecom_uefisecapp.c @@ -221,6 +221,19 @@ * alignment of 8 bytes (64 bits) for GUIDs. Our definition of efi_guid_t, * however, has an alignment of 4 byte (32 bits). So far, this seems to work * fine here. See also the comment on the typedef of efi_guid_t. + * + * Note: It looks like uefisecapp is quite picky about how the memory passed to + * it is structured and aligned. In particular the request/response setup used + * for QSEE_CMD_UEFI_GET_VARIABLE. While qcom_qseecom_app_send(), in theory, + * accepts separate buffers/addresses for the request and response parts, in + * practice, however, it seems to expect them to be both part of a larger + * contiguous block. We initially allocated separate buffers for the request + * and response but this caused the QSEE_CMD_UEFI_GET_VARIABLE command to + * either not write any response to the response buffer or outright crash the + * device. Therefore, we now allocate a single contiguous block of DMA memory + * for both and properly align the data using the macros below. In particular, + * request and response structs are aligned at 8 byte (via __reqdata_offs()), + * following the driver that this has been reverse-engineered from. */ #define qcuefi_buf_align_fields(fields...) \ ({ \ @@ -244,6 +257,12 @@ #define __array_offs(type, count, offset) \ __field_impl(sizeof(type) * (count), __alignof__(type), offset) +#define __array_offs_aligned(type, count, align, offset) \ + __field_impl(sizeof(type) * (count), align, offset) + +#define __reqdata_offs(size, offset) \ + __array_offs_aligned(u8, size, 8, offset) + #define __array(type, count) __array_offs(type, count, NULL) #define __field_offs(type, offset) __array_offs(type, 1, offset) #define __field(type) __array_offs(type, 1, NULL) @@ -277,10 +296,15 @@ unsigned long buffer_size = *data_size; efi_status_t efi_status = EFI_SUCCESS; unsigned long name_length; + dma_addr_t cmd_buf_dma; + size_t cmd_buf_size; + void *cmd_buf; size_t guid_offs; size_t name_offs; size_t req_size; size_t rsp_size; + size_t req_offs; + size_t rsp_offs; ssize_t status; if (!name || !guid) @@ -304,17 +328,19 @@ __array(u8, buffer_size) ); - req_data = kzalloc(req_size, GFP_KERNEL); - if (!req_data) { + cmd_buf_size = qcuefi_buf_align_fields( + __reqdata_offs(req_size, &req_offs) + __reqdata_offs(rsp_size, &rsp_offs) + ); + + cmd_buf = qseecom_dma_alloc(qcuefi->client, cmd_buf_size, &cmd_buf_dma, GFP_KERNEL); + if (!cmd_buf) { efi_status = EFI_OUT_OF_RESOURCES; goto out; } - rsp_data = kzalloc(rsp_size, GFP_KERNEL); - if (!rsp_data) { - efi_status = EFI_OUT_OF_RESOURCES; - goto out_free_req; - } + req_data = cmd_buf + req_offs; + rsp_data = cmd_buf + rsp_offs; req_data->command_id = QSEE_CMD_UEFI_GET_VARIABLE; req_data->data_size = buffer_size; @@ -332,7 +358,9 @@ memcpy(((void *)req_data) + req_data->guid_offset, guid, req_data->guid_size); - status = qcom_qseecom_app_send(qcuefi->client, req_data, req_size, rsp_data, rsp_size); + status = qcom_qseecom_app_send(qcuefi->client, + cmd_buf_dma + req_offs, req_size, + cmd_buf_dma + rsp_offs, rsp_size); if (status) { efi_status = EFI_DEVICE_ERROR; goto out_free; @@ -407,9 +435,7 @@ memcpy(data, ((void *)rsp_data) + rsp_data->data_offset, rsp_data->data_size); out_free: - kfree(rsp_data); -out_free_req: - kfree(req_data); + qseecom_dma_free(qcuefi->client, cmd_buf_size, cmd_buf, cmd_buf_dma); out: return efi_status; } @@ -422,10 +448,15 @@ struct qsee_rsp_uefi_set_variable *rsp_data; efi_status_t efi_status = EFI_SUCCESS; unsigned long name_length; + dma_addr_t cmd_buf_dma; + size_t cmd_buf_size; + void *cmd_buf; size_t name_offs; size_t guid_offs; size_t data_offs; size_t req_size; + size_t req_offs; + size_t rsp_offs; ssize_t status; if (!name || !guid) @@ -450,17 +481,19 @@ __array_offs(u8, data_size, &data_offs) ); - req_data = kzalloc(req_size, GFP_KERNEL); - if (!req_data) { + cmd_buf_size = qcuefi_buf_align_fields( + __reqdata_offs(req_size, &req_offs) + __reqdata_offs(sizeof(*rsp_data), &rsp_offs) + ); + + cmd_buf = qseecom_dma_alloc(qcuefi->client, cmd_buf_size, &cmd_buf_dma, GFP_KERNEL); + if (!cmd_buf) { efi_status = EFI_OUT_OF_RESOURCES; goto out; } - rsp_data = kzalloc(sizeof(*rsp_data), GFP_KERNEL); - if (!rsp_data) { - efi_status = EFI_OUT_OF_RESOURCES; - goto out_free_req; - } + req_data = cmd_buf + req_offs; + rsp_data = cmd_buf + rsp_offs; req_data->command_id = QSEE_CMD_UEFI_SET_VARIABLE; req_data->attributes = attributes; @@ -483,8 +516,9 @@ if (data_size) memcpy(((void *)req_data) + req_data->data_offset, data, req_data->data_size); - status = qcom_qseecom_app_send(qcuefi->client, req_data, req_size, rsp_data, - sizeof(*rsp_data)); + status = qcom_qseecom_app_send(qcuefi->client, + cmd_buf_dma + req_offs, req_size, + cmd_buf_dma + rsp_offs, sizeof(*rsp_data)); if (status) { efi_status = EFI_DEVICE_ERROR; goto out_free; @@ -507,9 +541,7 @@ } out_free: - kfree(rsp_data); -out_free_req: - kfree(req_data); + qseecom_dma_free(qcuefi->client, cmd_buf_size, cmd_buf, cmd_buf_dma); out: return efi_status; } @@ -521,10 +553,15 @@ struct qsee_req_uefi_get_next_variable *req_data; struct qsee_rsp_uefi_get_next_variable *rsp_data; efi_status_t efi_status = EFI_SUCCESS; + dma_addr_t cmd_buf_dma; + size_t cmd_buf_size; + void *cmd_buf; size_t guid_offs; size_t name_offs; size_t req_size; size_t rsp_size; + size_t req_offs; + size_t rsp_offs; ssize_t status; if (!name_size || !name || !guid) @@ -545,17 +582,19 @@ __array(*name, *name_size / sizeof(*name)) ); - req_data = kzalloc(req_size, GFP_KERNEL); - if (!req_data) { + cmd_buf_size = qcuefi_buf_align_fields( + __reqdata_offs(req_size, &req_offs) + __reqdata_offs(rsp_size, &rsp_offs) + ); + + cmd_buf = qseecom_dma_alloc(qcuefi->client, cmd_buf_size, &cmd_buf_dma, GFP_KERNEL); + if (!cmd_buf) { efi_status = EFI_OUT_OF_RESOURCES; goto out; } - rsp_data = kzalloc(rsp_size, GFP_KERNEL); - if (!rsp_data) { - efi_status = EFI_OUT_OF_RESOURCES; - goto out_free_req; - } + req_data = cmd_buf + req_offs; + rsp_data = cmd_buf + rsp_offs; req_data->command_id = QSEE_CMD_UEFI_GET_NEXT_VARIABLE; req_data->guid_offset = guid_offs; @@ -572,7 +611,9 @@ goto out_free; } - status = qcom_qseecom_app_send(qcuefi->client, req_data, req_size, rsp_data, rsp_size); + status = qcom_qseecom_app_send(qcuefi->client, + cmd_buf_dma + req_offs, req_size, + cmd_buf_dma + rsp_offs, rsp_size); if (status) { efi_status = EFI_DEVICE_ERROR; goto out_free; @@ -645,9 +686,7 @@ } out_free: - kfree(rsp_data); -out_free_req: - kfree(req_data); + qseecom_dma_free(qcuefi->client, cmd_buf_size, cmd_buf, cmd_buf_dma); out: return efi_status; } @@ -659,26 +698,34 @@ struct qsee_req_uefi_query_variable_info *req_data; struct qsee_rsp_uefi_query_variable_info *rsp_data; efi_status_t efi_status = EFI_SUCCESS; + dma_addr_t cmd_buf_dma; + size_t cmd_buf_size; + void *cmd_buf; + size_t req_offs; + size_t rsp_offs; int status; - req_data = kzalloc(sizeof(*req_data), GFP_KERNEL); - if (!req_data) { + cmd_buf_size = qcuefi_buf_align_fields( + __reqdata_offs(sizeof(*req_data), &req_offs) + __reqdata_offs(sizeof(*rsp_data), &rsp_offs) + ); + + cmd_buf = qseecom_dma_alloc(qcuefi->client, cmd_buf_size, &cmd_buf_dma, GFP_KERNEL); + if (!cmd_buf) { efi_status = EFI_OUT_OF_RESOURCES; goto out; } - rsp_data = kzalloc(sizeof(*rsp_data), GFP_KERNEL); - if (!rsp_data) { - efi_status = EFI_OUT_OF_RESOURCES; - goto out_free_req; - } + req_data = cmd_buf + req_offs; + rsp_data = cmd_buf + rsp_offs; req_data->command_id = QSEE_CMD_UEFI_QUERY_VARIABLE_INFO; req_data->attributes = attr; req_data->length = sizeof(*req_data); - status = qcom_qseecom_app_send(qcuefi->client, req_data, sizeof(*req_data), rsp_data, - sizeof(*rsp_data)); + status = qcom_qseecom_app_send(qcuefi->client, + cmd_buf_dma + req_offs, sizeof(*req_data), + cmd_buf_dma + rsp_offs, sizeof(*rsp_data)); if (status) { efi_status = EFI_DEVICE_ERROR; goto out_free; @@ -711,9 +758,7 @@ *max_variable_size = rsp_data->max_variable_size; out_free: - kfree(rsp_data); -out_free_req: - kfree(req_data); + qseecom_dma_free(qcuefi->client, cmd_buf_size, cmd_buf, cmd_buf_dma); out: return efi_status; } @@ -741,6 +786,10 @@ static struct qcuefi_client *qcuefi_acquire(void) { mutex_lock(&__qcuefi_lock); + if (!__qcuefi) { + mutex_unlock(&__qcuefi_lock); + return NULL; + } return __qcuefi; } --- linux-xilinx-6.8.0.orig/drivers/firmware/qcom/qcom_scm-smc.c +++ linux-xilinx-6.8.0/drivers/firmware/qcom/qcom_scm-smc.c @@ -71,7 +71,7 @@ struct arm_smccc_res get_wq_res; struct arm_smccc_args get_wq_ctx = {0}; - get_wq_ctx.args[0] = ARM_SMCCC_CALL_VAL(ARM_SMCCC_STD_CALL, + get_wq_ctx.args[0] = ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, ARM_SMCCC_SMC_64, ARM_SMCCC_OWNER_SIP, SCM_SMC_FNID(QCOM_SCM_SVC_WAITQ, QCOM_SCM_WAITQ_GET_WQ_CTX)); --- linux-xilinx-6.8.0.orig/drivers/firmware/qcom/qcom_scm.c +++ linux-xilinx-6.8.0/drivers/firmware/qcom/qcom_scm.c @@ -569,13 +569,14 @@ ret = qcom_scm_bw_enable(); if (ret) - return ret; + goto disable_clk; desc.args[1] = mdata_phys; ret = qcom_scm_call(__scm->dev, &desc, &res); - qcom_scm_bw_disable(); + +disable_clk: qcom_scm_clk_disable(); out: @@ -637,10 +638,12 @@ ret = qcom_scm_bw_enable(); if (ret) - return ret; + goto disable_clk; ret = qcom_scm_call(__scm->dev, &desc, &res); qcom_scm_bw_disable(); + +disable_clk: qcom_scm_clk_disable(); return ret ? : res.result[0]; @@ -672,10 +675,12 @@ ret = qcom_scm_bw_enable(); if (ret) - return ret; + goto disable_clk; ret = qcom_scm_call(__scm->dev, &desc, &res); qcom_scm_bw_disable(); + +disable_clk: qcom_scm_clk_disable(); return ret ? : res.result[0]; @@ -706,11 +711,12 @@ ret = qcom_scm_bw_enable(); if (ret) - return ret; + goto disable_clk; ret = qcom_scm_call(__scm->dev, &desc, &res); - qcom_scm_bw_disable(); + +disable_clk: qcom_scm_clk_disable(); return ret ? : res.result[0]; @@ -1576,9 +1582,9 @@ /** * qcom_scm_qseecom_app_send() - Send to and receive data from a given QSEE app. * @app_id: The ID of the target app. - * @req: Request buffer sent to the app (must be DMA-mappable). + * @req: DMA address of the request buffer sent to the app. * @req_size: Size of the request buffer. - * @rsp: Response buffer, written to by the app (must be DMA-mappable). + * @rsp: DMA address of the response buffer, written to by the app. * @rsp_size: Size of the response buffer. * * Sends a request to the QSEE app associated with the given ID and read back @@ -1589,33 +1595,13 @@ * * Return: Zero on success, nonzero on failure. */ -int qcom_scm_qseecom_app_send(u32 app_id, void *req, size_t req_size, void *rsp, - size_t rsp_size) +int qcom_scm_qseecom_app_send(u32 app_id, dma_addr_t req, size_t req_size, + dma_addr_t rsp, size_t rsp_size) { struct qcom_scm_qseecom_resp res = {}; struct qcom_scm_desc desc = {}; - dma_addr_t req_phys; - dma_addr_t rsp_phys; int status; - /* Map request buffer */ - req_phys = dma_map_single(__scm->dev, req, req_size, DMA_TO_DEVICE); - status = dma_mapping_error(__scm->dev, req_phys); - if (status) { - dev_err(__scm->dev, "qseecom: failed to map request buffer\n"); - return status; - } - - /* Map response buffer */ - rsp_phys = dma_map_single(__scm->dev, rsp, rsp_size, DMA_FROM_DEVICE); - status = dma_mapping_error(__scm->dev, rsp_phys); - if (status) { - dma_unmap_single(__scm->dev, req_phys, req_size, DMA_TO_DEVICE); - dev_err(__scm->dev, "qseecom: failed to map response buffer\n"); - return status; - } - - /* Set up SCM call data */ desc.owner = QSEECOM_TZ_OWNER_TZ_APPS; desc.svc = QSEECOM_TZ_SVC_APP_ID_PLACEHOLDER; desc.cmd = QSEECOM_TZ_CMD_APP_SEND; @@ -1623,18 +1609,13 @@ QCOM_SCM_RW, QCOM_SCM_VAL, QCOM_SCM_RW, QCOM_SCM_VAL); desc.args[0] = app_id; - desc.args[1] = req_phys; + desc.args[1] = req; desc.args[2] = req_size; - desc.args[3] = rsp_phys; + desc.args[3] = rsp; desc.args[4] = rsp_size; - /* Perform call */ status = qcom_scm_qseecom_call(&desc, &res); - /* Unmap buffers */ - dma_unmap_single(__scm->dev, rsp_phys, rsp_size, DMA_FROM_DEVICE); - dma_unmap_single(__scm->dev, req_phys, req_size, DMA_TO_DEVICE); - if (status) return status; @@ -1649,7 +1630,7 @@ * We do not yet support re-entrant calls via the qseecom interface. To prevent + any potential issues with this, only allow validated machines for now. */ -static const struct of_device_id qcom_scm_qseecom_allowlist[] = { +static const struct of_device_id qcom_scm_qseecom_allowlist[] __maybe_unused = { { .compatible = "lenovo,thinkpad-x13s", }, { } }; @@ -1738,7 +1719,8 @@ */ bool qcom_scm_is_available(void) { - return !!__scm; + /* Paired with smp_store_release() in qcom_scm_probe */ + return !!smp_load_acquire(&__scm); } EXPORT_SYMBOL_GPL(qcom_scm_is_available); @@ -1819,10 +1801,12 @@ if (!scm) return -ENOMEM; + scm->dev = &pdev->dev; ret = qcom_scm_find_dload_address(&pdev->dev, &scm->dload_mode_addr); if (ret < 0) return ret; + init_completion(&scm->waitq_comp); mutex_init(&scm->scm_bw_lock); scm->path = devm_of_icc_get(&pdev->dev, NULL); @@ -1854,10 +1838,8 @@ if (ret) return ret; - __scm = scm; - __scm->dev = &pdev->dev; - - init_completion(&__scm->waitq_comp); + /* Paired with smp_load_acquire() in qcom_scm_is_available(). */ + smp_store_release(&__scm, scm); irq = platform_get_irq_optional(pdev, 0); if (irq < 0) { @@ -1877,14 +1859,12 @@ * will cause the boot stages to enter download mode, unless * disabled below by a clean shutdown/reboot. */ - if (download_mode) - qcom_scm_set_download_mode(true); - + qcom_scm_set_download_mode(download_mode); /* * Disable SDI if indicated by DT that it is enabled by default. */ - if (of_property_read_bool(pdev->dev.of_node, "qcom,sdi-enabled")) + if (of_property_read_bool(pdev->dev.of_node, "qcom,sdi-enabled") || !download_mode) qcom_scm_disable_sdi(); /* --- linux-xilinx-6.8.0.orig/drivers/firmware/raspberrypi.c +++ linux-xilinx-6.8.0/drivers/firmware/raspberrypi.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -97,8 +98,8 @@ if (size & 3) return -EINVAL; - buf = dma_alloc_coherent(fw->cl.dev, PAGE_ALIGN(size), &bus_addr, - GFP_ATOMIC); + buf = dma_alloc_coherent(fw->chan->mbox->dev, PAGE_ALIGN(size), + &bus_addr, GFP_ATOMIC); if (!buf) return -ENOMEM; @@ -126,7 +127,7 @@ ret = -EINVAL; } - dma_free_coherent(fw->cl.dev, PAGE_ALIGN(size), buf, bus_addr); + dma_free_coherent(fw->chan->mbox->dev, PAGE_ALIGN(size), buf, bus_addr); return ret; } --- linux-xilinx-6.8.0.orig/drivers/firmware/smccc/smccc.c +++ linux-xilinx-6.8.0/drivers/firmware/smccc/smccc.c @@ -16,7 +16,6 @@ static enum arm_smccc_conduit smccc_conduit = SMCCC_CONDUIT_NONE; bool __ro_after_init smccc_trng_available = false; -u64 __ro_after_init smccc_has_sve_hint = false; s32 __ro_after_init smccc_soc_id_version = SMCCC_RET_NOT_SUPPORTED; s32 __ro_after_init smccc_soc_id_revision = SMCCC_RET_NOT_SUPPORTED; @@ -28,9 +27,6 @@ smccc_conduit = conduit; smccc_trng_available = smccc_probe_trng(); - if (IS_ENABLED(CONFIG_ARM64_SVE) && - smccc_version >= ARM_SMCCC_VERSION_1_3) - smccc_has_sve_hint = true; if ((smccc_version >= ARM_SMCCC_VERSION_1_2) && (smccc_conduit != SMCCC_CONDUIT_NONE)) { --- linux-xilinx-6.8.0.orig/drivers/firmware/sysfb.c +++ linux-xilinx-6.8.0/drivers/firmware/sysfb.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include #include @@ -38,6 +39,8 @@ static DEFINE_MUTEX(disable_lock); static bool disabled; +static struct device *sysfb_parent_dev(const struct screen_info *si); + static bool sysfb_unregister(void) { if (IS_ERR_OR_NULL(pd)) @@ -51,6 +54,7 @@ /** * sysfb_disable() - disable the Generic System Framebuffers support + * @dev: the device to check if non-NULL * * This disables the registration of system framebuffer devices that match the * generic drivers that make use of the system framebuffer set up by firmware. @@ -60,33 +64,85 @@ * Context: The function can sleep. A @disable_lock mutex is acquired to serialize * against sysfb_init(), that registers a system framebuffer device. */ -void sysfb_disable(void) +void sysfb_disable(struct device *dev) { + struct screen_info *si = &screen_info; + struct device *parent; + mutex_lock(&disable_lock); - sysfb_unregister(); - disabled = true; + parent = sysfb_parent_dev(si); + if (!dev || !parent || dev == parent) { + sysfb_unregister(); + disabled = true; + } mutex_unlock(&disable_lock); } EXPORT_SYMBOL_GPL(sysfb_disable); +#if defined(CONFIG_PCI) +static bool sysfb_pci_dev_is_enabled(struct pci_dev *pdev) +{ + /* + * TODO: Try to integrate this code into the PCI subsystem + */ + int ret; + u16 command; + + ret = pci_read_config_word(pdev, PCI_COMMAND, &command); + if (ret != PCIBIOS_SUCCESSFUL) + return false; + if (!(command & PCI_COMMAND_MEMORY)) + return false; + return true; +} +#else +static bool sysfb_pci_dev_is_enabled(struct pci_dev *pdev) +{ + return false; +} +#endif + +static struct device *sysfb_parent_dev(const struct screen_info *si) +{ + struct pci_dev *pdev; + + pdev = screen_info_pci_dev(si); + if (IS_ERR(pdev)) { + return ERR_CAST(pdev); + } else if (pdev) { + if (!sysfb_pci_dev_is_enabled(pdev)) + return ERR_PTR(-ENODEV); + return &pdev->dev; + } + + return NULL; +} + static __init int sysfb_init(void) { struct screen_info *si = &screen_info; + struct device *parent; struct simplefb_platform_data mode; const char *name; bool compatible; int ret = 0; + screen_info_apply_fixups(); + mutex_lock(&disable_lock); if (disabled) goto unlock_mutex; sysfb_apply_efi_quirks(); + parent = sysfb_parent_dev(si); + if (IS_ERR(parent)) + goto unlock_mutex; + /* try to create a simple-framebuffer device */ compatible = sysfb_parse_mode(si, &mode); if (compatible) { - pd = sysfb_create_simplefb(si, &mode); + pd = sysfb_create_simplefb(si, &mode, parent); if (!IS_ERR(pd)) goto unlock_mutex; } @@ -109,6 +165,8 @@ goto unlock_mutex; } + pd->dev.parent = parent; + sysfb_set_efifb_fwnode(pd); ret = platform_device_add_data(pd, si, sizeof(*si)); --- linux-xilinx-6.8.0.orig/drivers/firmware/sysfb_simplefb.c +++ linux-xilinx-6.8.0/drivers/firmware/sysfb_simplefb.c @@ -91,7 +91,8 @@ } __init struct platform_device *sysfb_create_simplefb(const struct screen_info *si, - const struct simplefb_platform_data *mode) + const struct simplefb_platform_data *mode, + struct device *parent) { struct platform_device *pd; struct resource res; @@ -143,6 +144,8 @@ if (!pd) return ERR_PTR(-ENOMEM); + pd->dev.parent = parent; + sysfb_set_efifb_fwnode(pd); ret = platform_device_add_resources(pd, &res, 1); --- linux-xilinx-6.8.0.orig/drivers/firmware/tegra/bpmp-debugfs.c +++ linux-xilinx-6.8.0/drivers/firmware/tegra/bpmp-debugfs.c @@ -77,7 +77,7 @@ root_path_buf = kzalloc(root_path_buf_len, GFP_KERNEL); if (!root_path_buf) - goto out; + return NULL; root_path = dentry_path(bpmp->debugfs_mirror, root_path_buf, root_path_buf_len); --- linux-xilinx-6.8.0.orig/drivers/firmware/tegra/bpmp.c +++ linux-xilinx-6.8.0/drivers/firmware/tegra/bpmp.c @@ -24,12 +24,6 @@ #define MSG_RING BIT(1) #define TAG_SZ 32 -static inline struct tegra_bpmp * -mbox_client_to_bpmp(struct mbox_client *client) -{ - return container_of(client, struct tegra_bpmp, mbox.client); -} - static inline const struct tegra_bpmp_ops * channel_to_ops(struct tegra_bpmp_channel *channel) { --- linux-xilinx-6.8.0.orig/drivers/firmware/turris-mox-rwtm.c +++ linux-xilinx-6.8.0/drivers/firmware/turris-mox-rwtm.c @@ -2,7 +2,7 @@ /* * Turris Mox rWTM firmware driver * - * Copyright (C) 2019 Marek Behún + * Copyright (C) 2019, 2024 Marek Behún */ #include @@ -174,6 +174,9 @@ struct mox_rwtm *rwtm = dev_get_drvdata(cl->dev); struct armada_37xx_rwtm_rx_msg *msg = data; + if (completion_done(&rwtm->cmd_done)) + return; + rwtm->reply = *msg; complete(&rwtm->cmd_done); } @@ -199,9 +202,8 @@ if (ret < 0) return ret; - ret = wait_for_completion_timeout(&rwtm->cmd_done, HZ / 2); - if (ret < 0) - return ret; + if (!wait_for_completion_timeout(&rwtm->cmd_done, HZ / 2)) + return -ETIMEDOUT; ret = mox_get_status(MBOX_CMD_BOARD_INFO, reply->retval); if (ret == -ENODATA) { @@ -235,9 +237,8 @@ if (ret < 0) return ret; - ret = wait_for_completion_timeout(&rwtm->cmd_done, HZ / 2); - if (ret < 0) - return ret; + if (!wait_for_completion_timeout(&rwtm->cmd_done, HZ / 2)) + return -ETIMEDOUT; ret = mox_get_status(MBOX_CMD_ECDSA_PUB_KEY, reply->retval); if (ret == -ENODATA) { @@ -274,9 +275,8 @@ if (ret < 0) return ret; - ret = wait_for_completion_timeout(&rwtm->cmd_done, HZ / 2); - if (ret < 0) - return ret; + if (!wait_for_completion_timeout(&rwtm->cmd_done, HZ / 2)) + return -ETIMEDOUT; return mox_get_status(MBOX_CMD_GET_RANDOM, rwtm->reply.retval); } @@ -499,6 +499,7 @@ platform_set_drvdata(pdev, rwtm); mutex_init(&rwtm->busy); + init_completion(&rwtm->cmd_done); rwtm->mbox_client.dev = dev; rwtm->mbox_client.rx_callback = mox_rwtm_rx_callback; @@ -512,8 +513,6 @@ goto remove_files; } - init_completion(&rwtm->cmd_done); - ret = mox_get_board_info(rwtm); if (ret < 0) dev_warn(dev, "Cannot read board information: %i\n", ret); --- linux-xilinx-6.8.0.orig/drivers/firmware/xilinx/Kconfig +++ linux-xilinx-6.8.0/drivers/firmware/xilinx/Kconfig @@ -23,4 +23,12 @@ Say yes to enable ZynqMP firmware interface debug APIs. If in doubt, say N. +config ZYNQMP_FIRMWARE_SECURE + bool "Enable Xilinx Zynq MPSoC secure firmware loading APIs" + help + Firmware secure driver is used as an interface to load + Authenticated and/or Encrypted firmware with single loadable + partition. Say yes to enable ZynqMP secure firmware loading + APIs.If in doubt, say N + endmenu --- linux-xilinx-6.8.0.orig/drivers/firmware/xilinx/Makefile +++ linux-xilinx-6.8.0/drivers/firmware/xilinx/Makefile @@ -3,3 +3,4 @@ obj-$(CONFIG_ZYNQMP_FIRMWARE) += zynqmp.o obj-$(CONFIG_ZYNQMP_FIRMWARE_DEBUG) += zynqmp-debug.o +obj-$(CONFIG_ZYNQMP_FIRMWARE_SECURE) += zynqmp-secure.o --- linux-xilinx-6.8.0.orig/drivers/firmware/xilinx/zynqmp-debug.c +++ linux-xilinx-6.8.0/drivers/firmware/xilinx/zynqmp-debug.c @@ -2,7 +2,7 @@ /* * Xilinx Zynq MPSoC Firmware layer for debugfs APIs * - * Copyright (C) 2014-2018 Xilinx, Inc. + * Copyright (C) 2014-2021 Xilinx, Inc. * * Michal Simek * Davorin Mista @@ -31,13 +31,52 @@ #define PM_API(id) {id, #id, strlen(#id)} static struct pm_api_info pm_api_list[] = { + PM_API(PM_FORCE_POWERDOWN), + PM_API(PM_REQUEST_WAKEUP), + PM_API(PM_SYSTEM_SHUTDOWN), + PM_API(PM_REQUEST_NODE), + PM_API(PM_RELEASE_NODE), + PM_API(PM_SET_REQUIREMENT), PM_API(PM_GET_API_VERSION), + PM_API(PM_GET_NODE_STATUS), + PM_API(PM_REGISTER_NOTIFIER), + PM_API(PM_RESET_ASSERT), + PM_API(PM_RESET_GET_STATUS), + PM_API(PM_GET_CHIPID), + PM_API(PM_PINCTRL_SET_FUNCTION), + PM_API(PM_PINCTRL_CONFIG_PARAM_GET), + PM_API(PM_PINCTRL_CONFIG_PARAM_SET), + PM_API(PM_IOCTL), + PM_API(PM_CLOCK_ENABLE), + PM_API(PM_CLOCK_DISABLE), + PM_API(PM_CLOCK_GETSTATE), + PM_API(PM_CLOCK_SETDIVIDER), + PM_API(PM_CLOCK_GETDIVIDER), + PM_API(PM_CLOCK_SETPARENT), + PM_API(PM_CLOCK_GETPARENT), PM_API(PM_QUERY_DATA), }; static struct dentry *firmware_debugfs_root; /** + * zynqmp_pm_ioctl - PM IOCTL for device control and configs + * @node: Node ID of the device + * @ioctl: ID of the requested IOCTL + * @arg1: Argument 1 of requested IOCTL call + * @arg2: Argument 2 of requested IOCTL call + * @arg3: Argument 3 of requested IOCTL call + * @out: Returned output value + * + * Return: Returns status, either success or error+reason + */ +static int zynqmp_pm_ioctl(const u32 node, const u32 ioctl, const u32 arg1, + const u32 arg2, const u32 arg3, u32 *out) +{ + return zynqmp_pm_invoke_fn(PM_IOCTL, out, 5, node, ioctl, arg1, arg2, arg3); +} + +/** * zynqmp_pm_argument_value() - Extract argument value from a PM-API request * @arg: Entered PM-API argument in string format * @@ -95,6 +134,139 @@ sprintf(debugfs_buf, "PM-API Version = %d.%d\n", pm_api_version >> 16, pm_api_version & 0xffff); break; + case PM_FORCE_POWERDOWN: + ret = zynqmp_pm_force_pwrdwn(pm_api_arg[0], + pm_api_arg[1] ? pm_api_arg[1] : + ZYNQMP_PM_REQUEST_ACK_NO); + break; + case PM_REQUEST_WAKEUP: + ret = zynqmp_pm_request_wake(pm_api_arg[0], + pm_api_arg[1], pm_api_arg[2], + pm_api_arg[3] ? pm_api_arg[3] : + ZYNQMP_PM_REQUEST_ACK_NO); + break; + case PM_SYSTEM_SHUTDOWN: + ret = zynqmp_pm_system_shutdown(pm_api_arg[0], pm_api_arg[1]); + break; + case PM_REQUEST_NODE: + ret = zynqmp_pm_request_node(pm_api_arg[0], + pm_api_arg[1] ? pm_api_arg[1] : + ZYNQMP_PM_CAPABILITY_ACCESS, + pm_api_arg[2] ? pm_api_arg[2] : 0, + pm_api_arg[3] ? pm_api_arg[3] : + ZYNQMP_PM_REQUEST_ACK_BLOCKING); + break; + case PM_RELEASE_NODE: + ret = zynqmp_pm_release_node(pm_api_arg[0]); + break; + case PM_SET_REQUIREMENT: + ret = zynqmp_pm_set_requirement(pm_api_arg[0], + pm_api_arg[1] ? pm_api_arg[1] : + ZYNQMP_PM_CAPABILITY_CONTEXT, + pm_api_arg[2] ? + pm_api_arg[2] : 0, + pm_api_arg[3] ? pm_api_arg[3] : + ZYNQMP_PM_REQUEST_ACK_BLOCKING); + break; + case PM_GET_NODE_STATUS: + ret = zynqmp_pm_get_node_status(pm_api_arg[0], + &pm_api_ret[0], + &pm_api_ret[1], + &pm_api_ret[2]); + if (!ret) + sprintf(debugfs_buf, + "GET_NODE_STATUS:\n\tNodeId: %llu\n\tStatus: %u\n\tRequirements: %u\n\tUsage: %u\n", + pm_api_arg[0], pm_api_ret[0], + pm_api_ret[1], pm_api_ret[2]); + break; + case PM_REGISTER_NOTIFIER: + ret = zynqmp_pm_register_notifier(pm_api_arg[0], + pm_api_arg[1] ? + pm_api_arg[1] : 0, + pm_api_arg[2] ? + pm_api_arg[2] : 0, + pm_api_arg[3] ? + pm_api_arg[3] : 0); + break; + case PM_RESET_ASSERT: + ret = zynqmp_pm_reset_assert(pm_api_arg[0], pm_api_arg[1]); + break; + case PM_RESET_GET_STATUS: + ret = zynqmp_pm_reset_get_status(pm_api_arg[0], &pm_api_ret[0]); + if (!ret) + sprintf(debugfs_buf, "Reset status: %u\n", + pm_api_ret[0]); + break; + case PM_GET_CHIPID: + ret = zynqmp_pm_get_chipid(&pm_api_ret[0], &pm_api_ret[1]); + if (!ret) + sprintf(debugfs_buf, "Idcode: %#x, Version:%#x\n", + pm_api_ret[0], pm_api_ret[1]); + break; + case PM_PINCTRL_SET_FUNCTION: + ret = zynqmp_pm_pinctrl_set_function(pm_api_arg[0], + pm_api_arg[1]); + break; + case PM_PINCTRL_CONFIG_PARAM_GET: + ret = zynqmp_pm_pinctrl_get_config(pm_api_arg[0], pm_api_arg[1], + &pm_api_ret[0]); + if (!ret) + sprintf(debugfs_buf, + "Pin: %llu, Param: %llu, Value: %u\n", + pm_api_arg[0], pm_api_arg[1], + pm_api_ret[0]); + break; + case PM_PINCTRL_CONFIG_PARAM_SET: + ret = zynqmp_pm_pinctrl_set_config(pm_api_arg[0], + pm_api_arg[1], + pm_api_arg[2]); + break; + case PM_IOCTL: + ret = zynqmp_pm_ioctl(pm_api_arg[0], pm_api_arg[1], + pm_api_arg[2], pm_api_arg[3], + pm_api_arg[4], &pm_api_ret[0]); + if (!ret && (pm_api_arg[1] == IOCTL_GET_RPU_OPER_MODE || + pm_api_arg[1] == IOCTL_GET_PLL_FRAC_MODE || + pm_api_arg[1] == IOCTL_GET_PLL_FRAC_DATA || + pm_api_arg[1] == IOCTL_READ_GGS || + pm_api_arg[1] == IOCTL_READ_PGGS || + pm_api_arg[1] == IOCTL_READ_REG)) + sprintf(debugfs_buf, "IOCTL return value: %u\n", + pm_api_ret[1]); + if (!ret && pm_api_arg[1] == IOCTL_GET_QOS) + sprintf(debugfs_buf, "Default QoS: %u\nCurrent QoS: %u\n", + pm_api_ret[1], pm_api_ret[2]); + break; + case PM_CLOCK_ENABLE: + ret = zynqmp_pm_clock_enable(pm_api_arg[0]); + break; + case PM_CLOCK_DISABLE: + ret = zynqmp_pm_clock_disable(pm_api_arg[0]); + break; + case PM_CLOCK_GETSTATE: + ret = zynqmp_pm_clock_getstate(pm_api_arg[0], &pm_api_ret[0]); + if (!ret) + sprintf(debugfs_buf, "Clock state: %u\n", + pm_api_ret[0]); + break; + case PM_CLOCK_SETDIVIDER: + ret = zynqmp_pm_clock_setdivider(pm_api_arg[0], pm_api_arg[1]); + break; + case PM_CLOCK_GETDIVIDER: + ret = zynqmp_pm_clock_getdivider(pm_api_arg[0], &pm_api_ret[0]); + if (!ret) + sprintf(debugfs_buf, "Divider Value: %d\n", + pm_api_ret[0]); + break; + case PM_CLOCK_SETPARENT: + ret = zynqmp_pm_clock_setparent(pm_api_arg[0], pm_api_arg[1]); + break; + case PM_CLOCK_GETPARENT: + ret = zynqmp_pm_clock_getparent(pm_api_arg[0], &pm_api_ret[0]); + if (!ret) + sprintf(debugfs_buf, + "Clock parent Index: %u\n", pm_api_ret[0]); + break; case PM_QUERY_DATA: qdata.qid = pm_api_arg[0]; qdata.arg1 = pm_api_arg[1]; @@ -150,7 +322,7 @@ char *kern_buff, *tmp_buff; char *pm_api_req; u32 pm_id = 0; - u64 pm_api_arg[4] = {0, 0, 0, 0}; + u64 pm_api_arg[5] = {0, 0, 0, 0, 0}; /* Return values from PM APIs calls */ u32 pm_api_ret[4] = {0, 0, 0, 0}; --- linux-xilinx-6.8.0.orig/drivers/firmware/xilinx/zynqmp-secure.c +++ linux-xilinx-6.8.0/drivers/firmware/xilinx/zynqmp-secure.c @@ -0,0 +1,194 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx ZynqMP SecureFw Driver. + * Copyright (c) 2018 Xilinx Inc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define ZYNQMP_AES_KEY_SIZE 64 + +static u8 key[ZYNQMP_AES_KEY_SIZE] = {0}; +static dma_addr_t dma_addr; +static u8 *keyptr; +static size_t dma_size; +static char *kbuf; + +static ssize_t secure_load_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + const struct firmware *fw; + char image_name[NAME_MAX]; + u64 dst, ret; + int len; + + len = strscpy(image_name, buf, NAME_MAX - 1); + if (len > 0) { + if (image_name[len - 1] == '\n') + image_name[len - 1] = 0; + } else { + return -E2BIG; + } + + ret = request_firmware(&fw, image_name, dev); + if (ret) { + dev_err(dev, "Error requesting firmware %s\n", image_name); + return ret; + } + dma_size = fw->size; + + if (keyptr) + dma_size = fw->size + ZYNQMP_AES_KEY_SIZE; + + kbuf = dma_alloc_coherent(dev, dma_size, + &dma_addr, GFP_KERNEL); + if (!kbuf) { + release_firmware(fw); + return -ENOMEM; + } + + memcpy(kbuf, fw->data, fw->size); + + if (keyptr) + memcpy(kbuf + fw->size, key, ZYNQMP_AES_KEY_SIZE); + + /* To ensure cache coherency */ + caches_clean_inval_user_pou((unsigned long)kbuf, + (unsigned long)kbuf + dma_size); + + if (keyptr) + ret = zynqmp_pm_secure_load(dma_addr, dma_addr + fw->size, + &dst); + else + ret = zynqmp_pm_secure_load(dma_addr, 0, &dst); + + release_firmware(fw); + + if (ret) { + dev_info(dev, "Failed to load secure image \r\n"); + return ret; + } + dev_info(dev, "Verified image at 0x%llx\n", dst); + + return count; +} + +static ssize_t key_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + return snprintf(buf, ZYNQMP_AES_KEY_SIZE + 1, "%s\n", key); +} + +static ssize_t key_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + memcpy(key, buf, count); + keyptr = &key[0]; + return count; +} + +static ssize_t secure_load_done_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + int ret; + unsigned int value; + + ret = kstrtouint(buf, 10, &value); + if (ret) + return ret; + if (value) + dma_free_coherent(dev, dma_size, kbuf, dma_addr); + + return count; +} + +static DEVICE_ATTR_RW(key); +static DEVICE_ATTR_WO(secure_load); +static DEVICE_ATTR_WO(secure_load_done); + +static struct attribute *securefw_attrs[] = { + &dev_attr_secure_load_done.attr, + &dev_attr_secure_load.attr, + &dev_attr_key.attr, + NULL, +}; + +ATTRIBUTE_GROUPS(securefw); + +static int securefw_probe(struct platform_device *pdev) +{ + int ret; + struct platform_device *securefw_pdev; + + securefw_pdev = pdev; + + securefw_pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32); + + ret = of_dma_configure(&securefw_pdev->dev, NULL, true); + if (ret < 0) { + dev_info(&securefw_pdev->dev, "Cannot setup DMA ops\r\n"); + return ret; + } + + ret = sysfs_create_groups(&securefw_pdev->dev.kobj, securefw_groups); + if (ret) + return ret; + + dev_info(&securefw_pdev->dev, "securefw probed\r\n"); + return ret; +} + +static int securefw_remove(struct platform_device *pdev) +{ + sysfs_remove_groups(&pdev->dev.kobj, securefw_groups); + return 0; +} + +static struct platform_driver securefw_driver = { + .driver = { + .name = "securefw", + }, + .probe = securefw_probe, + .remove = securefw_remove, +}; + +static struct platform_device *securefw_dev_reg; + +static int __init zynqmp_secure_init(void) +{ + int ret; + + ret = platform_driver_register(&securefw_driver); + if (ret) + return ret; + + securefw_dev_reg = platform_device_register_simple("securefw", -1, + NULL, 0); + if (IS_ERR(securefw_dev_reg)) { + ret = PTR_ERR(securefw_dev_reg); + platform_driver_unregister(&securefw_driver); + return ret; + } + return 0; +} + +static void __exit zynqmp_secure_exit(void) +{ + platform_device_unregister(securefw_dev_reg); + platform_driver_unregister(&securefw_driver); +} + +module_init(zynqmp_secure_init); +module_exit(zynqmp_secure_exit); --- linux-xilinx-6.8.0.orig/drivers/firmware/xilinx/zynqmp.c +++ linux-xilinx-6.8.0/drivers/firmware/xilinx/zynqmp.c @@ -3,6 +3,7 @@ * Xilinx Zynq MPSoC Firmware layer * * Copyright (C) 2014-2022 Xilinx, Inc. + * Copyright (C), 2022 - 2024 Advanced Micro Devices, Inc. * * Michal Simek * Davorin Mista @@ -13,6 +14,8 @@ #include #include #include +#include +#include #include #include #include @@ -37,19 +40,25 @@ /* BOOT_PIN_CTRL_MASK- out_val[11:8], out_en[3:0] */ #define CRL_APB_BOOTPIN_CTRL_MASK 0xF0FU +/* firmware required uid buff size */ +#define UID_BUFF_SIZE 786 +#define UID_SET_LEN 4 +#define UID_LEN 4 + /* IOCTL/QUERY feature payload size */ #define FEATURE_PAYLOAD_SIZE 2 -/* Firmware feature check version mask */ -#define FIRMWARE_VERSION_MASK GENMASK(15, 0) - static bool feature_check_enabled; static DEFINE_HASHTABLE(pm_api_features_map, PM_API_FEATURE_CHECK_MAX_ORDER); static u32 ioctl_features[FEATURE_PAYLOAD_SIZE]; static u32 query_features[FEATURE_PAYLOAD_SIZE]; +static u32 sip_svc_version; +static unsigned long register_address; static struct platform_device *em_dev; +static char image_name[NAME_MAX]; + /** * struct zynqmp_devinfo - Structure for Zynqmp device instance * @dev: Device Pointer @@ -153,6 +162,9 @@ ret_payload[1] = upper_32_bits(res.a0); ret_payload[2] = lower_32_bits(res.a1); ret_payload[3] = upper_32_bits(res.a1); + ret_payload[4] = lower_32_bits(res.a2); + ret_payload[5] = upper_32_bits(res.a2); + ret_payload[6] = lower_32_bits(res.a3); } return zynqmp_pm_ret_code((enum pm_ret_status)res.a0); @@ -193,6 +205,9 @@ ret_payload[1] = upper_32_bits(res.a0); ret_payload[2] = lower_32_bits(res.a1); ret_payload[3] = upper_32_bits(res.a1); + ret_payload[4] = lower_32_bits(res.a2); + ret_payload[5] = upper_32_bits(res.a2); + ret_payload[6] = lower_32_bits(res.a3); } return zynqmp_pm_ret_code((enum pm_ret_status)res.a0); @@ -220,11 +235,14 @@ * Feature check of TF-A APIs is done in the TF-A layer and it expects for * MODULE_ID_MASK bits of SMC's arg[0] to be the same as PM_MODULE_ID. */ - if (module_id == TF_A_MODULE_ID) + if (module_id == TF_A_MODULE_ID) { module_id = PM_MODULE_ID; + smc_arg[1] = api_id; + } else { + smc_arg[1] = (api_id & API_ID_MASK); + } smc_arg[0] = PM_SIP_SVC | FIELD_PREP(MODULE_ID_MASK, module_id) | feature_check_api_id; - smc_arg[1] = (api_id & API_ID_MASK); ret = do_fw_call(ret_payload, 2, smc_arg[0], smc_arg[1]); if (ret) @@ -334,6 +352,70 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_is_function_supported); /** + * zynqmp_pm_invoke_fw_fn() - Invoke the system-level platform management layer + * caller function depending on the configuration + * @pm_api_id: Requested PM-API call + * @ret_payload: Returned value array + * @num_args: Number of arguments to requested PM-API call + * + * Invoke platform management function for SMC or HVC call, depending on + * configuration. + * Following SMC Calling Convention (SMCCC) for SMC64: + * Pm Function Identifier, + * PM_SIP_SVC + PASS_THROUGH_FW_CMD_ID = + * ((SMC_TYPE_FAST << FUNCID_TYPE_SHIFT) + * ((SMC_64) << FUNCID_CC_SHIFT) + * ((SIP_START) << FUNCID_OEN_SHIFT) + * (PASS_THROUGH_FW_CMD_ID)) + * + * PM_SIP_SVC - Registered ZynqMP SIP Service Call. + * PASS_THROUGH_FW_CMD_ID - Fixed SiP SVC call ID for FW specific calls. + * + * Return: Returns status, either success or error+reason + */ +int zynqmp_pm_invoke_fw_fn(u32 pm_api_id, u32 *ret_payload, u32 num_args, ...) +{ + /* + * Added SIP service call Function Identifier + * Make sure to stay in x0 register + */ + u64 smc_arg[SMC_ARG_CNT_64]; + int ret, i; + va_list arg_list; + u32 args[SMC_ARG_CNT_32] = {0}; + u32 module_id; + + if (num_args > SMC_ARG_CNT_32) + return -EINVAL; + + va_start(arg_list, num_args); + + /* Check if feature is supported or not */ + ret = zynqmp_pm_feature(pm_api_id); + if (ret < 0) + return ret; + + for (i = 0; i < num_args; i++) + args[i] = va_arg(arg_list, u32); + + va_end(arg_list); + + module_id = FIELD_GET(PLM_MODULE_ID_MASK, pm_api_id); + + if (module_id == 0) + module_id = XPM_MODULE_ID; + + smc_arg[0] = PM_SIP_SVC | PASS_THROUGH_FW_CMD_ID; + smc_arg[1] = ((u64)args[0] << 32U) | FIELD_PREP(PLM_MODULE_ID_MASK, module_id) | + (pm_api_id & API_ID_MASK); + for (i = 1; i < (SMC_ARG_CNT_64 - 1); i++) + smc_arg[i + 1] = ((u64)args[(i * 2)] << 32U) | args[(i * 2) - 1]; + + return do_fw_call(ret_payload, 8, smc_arg[0], smc_arg[1], smc_arg[2], smc_arg[3], + smc_arg[4], smc_arg[5], smc_arg[6], smc_arg[7]); +} + +/** * zynqmp_pm_invoke_fn() - Invoke the system-level platform management layer * caller function depending on the configuration * @pm_api_id: Requested PM-API call @@ -491,6 +573,72 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_get_family_info); /** + * xlnx_get_crypto_dev_data() - Get crypto dev data of platform + * @feature_map: List of available feature map of all platform + * + * Return: Returns crypto dev data, either address crypto dev or ERR PTR + */ +void *xlnx_get_crypto_dev_data(struct xlnx_feature *feature_map) +{ + struct xlnx_feature *feature; + u32 v; + int ret; + + ret = zynqmp_pm_get_api_version(&v); + if (ret) + return ERR_PTR(ret); + + feature = feature_map; + for (; feature->family; feature++) { + if (feature->family == pm_family_code && + (feature->subfamily == ALL_SUB_FAMILY_CODE || + feature->subfamily == pm_sub_family_code)) { + if (feature->family == ZYNQMP_FAMILY_CODE || + feature->family == VERSAL_FAMILY_CODE) { + ret = zynqmp_pm_feature(feature->feature_id); + if (ret < 0) + return ERR_PTR(ret); + } else { + return ERR_PTR(-ENODEV); + } + + return feature->data; + } + } + return ERR_PTR(-ENODEV); +} +EXPORT_SYMBOL_GPL(xlnx_get_crypto_dev_data); + +/** + * zynqmp_pm_get_sip_svc_version() - Get SiP service call version + * @version: Returned version value + * + * Return: Returns status, either success or error+reason + */ +static int zynqmp_pm_get_sip_svc_version(u32 *version) +{ + struct arm_smccc_res res; + u64 args[SMC_ARG_CNT_64] = {0}; + + if (!version) + return -EINVAL; + + /* Check if SiP SVC version already verified */ + if (sip_svc_version > 0) { + *version = sip_svc_version; + return 0; + } + + args[0] = GET_SIP_SVC_VERSION; + + arm_smccc_smc(args[0], args[1], args[2], args[3], args[4], args[5], args[6], args[7], &res); + + *version = ((lower_32_bits(res.a0) << 16U) | lower_32_bits(res.a1)); + + return zynqmp_pm_ret_code(XST_PM_SUCCESS); +} + +/** * zynqmp_pm_get_trustzone_version() - Get secure trustzone firmware version * @version: Returned version value * @@ -554,11 +702,34 @@ */ int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out) { - int ret; + int ret, i = 0; + u32 ret_payload[PAYLOAD_ARG_CNT] = {0}; + + if (sip_svc_version >= SIP_SVC_PASSTHROUGH_VERSION) { + ret = zynqmp_pm_invoke_fw_fn(PM_QUERY_DATA, ret_payload, 4, + qdata.qid, qdata.arg1, + qdata.arg2, qdata.arg3); + /* To support backward compatibility */ + if (!ret && !ret_payload[0]) { + /* + * TF-A passes return status on 0th index but + * api to get clock name reads data from 0th + * index so pass data at 0th index instead of + * return status + */ + if (qdata.qid == PM_QID_CLOCK_GET_NAME || + qdata.qid == PM_QID_PINCTRL_GET_FUNCTION_NAME) + i = 1; - ret = zynqmp_pm_invoke_fn(PM_QUERY_DATA, out, 4, qdata.qid, qdata.arg1, qdata.arg2, - qdata.arg3); + for (; i < PAYLOAD_ARG_CNT; i++, out++) + *out = ret_payload[i]; + return ret; + } + } + + ret = zynqmp_pm_invoke_fn(PM_QUERY_DATA, out, 4, qdata.qid, + qdata.arg1, qdata.arg2, qdata.arg3); /* * For clock name query, all bytes in SMC response are clock name * characters and return code is always success. For invalid clocks, @@ -833,6 +1004,63 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_ospi_mux_select); /** + * versal2_pm_ufs_get_txrx_cfgrdy() - API to read the UFS TX/RX Configuration ready + * + * @node_id: Node Id of the UFS device. + * @value: Tx/Rx configuration ready status information. + * + * This function read the UFS TX/RX Configuration ready status. + * + * Return: Returns status, either success or error+reason + */ +int versal2_pm_ufs_get_txrx_cfgrdy(u32 node_id, u32 *value) +{ + u32 ret_payload[PAYLOAD_ARG_CNT]; + int ret; + + if (!value) + return -EINVAL; + + ret = zynqmp_pm_invoke_fn(PM_IOCTL, ret_payload, 2, node_id, IOCTL_UFS_TXRX_CFGRDY_GET); + *value = ret_payload[1]; + + return ret; +} +EXPORT_SYMBOL_GPL(versal2_pm_ufs_get_txrx_cfgrdy); + +/** + * versal2_pm_ufs_sram_csr_sel() - API to read or write the UFS SRAM CSR register + * + * @node_id: Node Id of the UFS device. + * @type: read(0) or write(1) to SRAM CSR register. + * @value: SRAM CSR register information. + * + * This function read or write the UFS SRAM CSR register. + * + * Return: Returns status, either success or error+reason + */ +int versal2_pm_ufs_sram_csr_sel(u32 node_id, u32 type, u32 *value) +{ + u32 ret_payload[PAYLOAD_ARG_CNT]; + int ret; + + if (!value) + return -EINVAL; + + if (type == PM_UFS_SRAM_CSR_READ) { + ret = zynqmp_pm_invoke_fn(PM_IOCTL, ret_payload, 3, node_id, + IOCTL_UFS_SRAM_CSR_SEL, type); + *value = ret_payload[1]; + } else { + ret = zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, node_id, IOCTL_UFS_SRAM_CSR_SEL, type, + *value); + } + + return ret; +} +EXPORT_SYMBOL_GPL(versal2_pm_ufs_sram_csr_sel); + +/** * zynqmp_pm_write_ggs() - PM API for writing global general storage (ggs) * @index: GGS register index * @value: Register value to be written @@ -900,6 +1128,25 @@ } EXPORT_SYMBOL_GPL(zynqmp_pm_set_tapdelay_bypass); +int zynqmp_pm_usb_set_state(u32 node, u32 state, u32 value) +{ + return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, node, IOCTL_USB_SET_STATE, + state, value); +} +EXPORT_SYMBOL_GPL(zynqmp_pm_usb_set_state); + +int zynqmp_pm_get_last_reset_reason(u32 *reset_reason) +{ + return zynqmp_pm_invoke_fn(PM_IOCTL, reset_reason, 2, 0, IOCTL_GET_LAST_RESET_REASON); +} +EXPORT_SYMBOL_GPL(zynqmp_pm_get_last_reset_reason); + +int zynqmp_pm_afi(u32 index, u32 value) +{ + return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_AFI, index, value); +} +EXPORT_SYMBOL_GPL(zynqmp_pm_afi); + /** * zynqmp_pm_set_boot_health_status() - PM API for setting healthy boot status * @value: Status value to be written @@ -915,6 +1162,26 @@ } /** + * zynqmp_pm_aie_operation - AI engine run time operations + * @node: AI engine node id + * @start_col: Starting column of AI partition + * @num_col: Number of column in AI partition + * @operation: ORed value of operations + * + * Return: Returns status, either success or error+reason + */ +int zynqmp_pm_aie_operation(u32 node, u16 start_col, u16 num_col, u32 operation) +{ + u32 partition; + + partition = num_col; + partition = ((partition << 16U) | start_col); + return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, node, IOCTL_AIE_OPS, + partition, operation); +} +EXPORT_SYMBOL_GPL(zynqmp_pm_aie_operation); + +/** * zynqmp_pm_reset_assert - Request setting of reset (1 - assert, 0 - release) * @reset: Reset to be configured * @assert_flag: Flag stating should reset be asserted (1) or @@ -1014,17 +1281,13 @@ int zynqmp_pm_fpga_get_config_status(u32 *value) { u32 ret_payload[PAYLOAD_ARG_CNT]; - u32 buf, lower_addr, upper_addr; int ret; if (!value) return -EINVAL; - lower_addr = lower_32_bits((u64)&buf); - upper_addr = upper_32_bits((u64)&buf); - ret = zynqmp_pm_invoke_fn(PM_FPGA_READ, ret_payload, 4, - XILINX_ZYNQMP_PM_FPGA_CONFIG_STAT_OFFSET, lower_addr, upper_addr, + XILINX_ZYNQMP_PM_FPGA_CONFIG_STAT_OFFSET, 0, 0, XILINX_ZYNQMP_PM_FPGA_READ_CONFIG_REG); *value = ret_payload[1]; @@ -1034,6 +1297,56 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_config_status); /** + * zynqmp_pm_fpga_get_version -Get xilfpga component version info + * @value: Value to read + * + * This function provides access to the pmufw to get the xilfpga + * component version info. + * + * Return: Returns status, either success or error+reason + */ +int zynqmp_pm_fpga_get_version(u32 *value) +{ + u32 ret_payload[PAYLOAD_ARG_CNT]; + int ret; + + if (!value) + return -EINVAL; + + ret = zynqmp_pm_invoke_fn(PM_FPGA_GET_VERSION, ret_payload, 0); + *value = ret_payload[1]; + + return ret; +} +EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_version); + +/** + * zynqmp_pm_fpga_get_feature_list - Get xilfpga component supported feature + * list. + * @value: Value to read + * + * This function provides access to the pmufw to get the xilfpga component + * supported feature list. + * + * Return: Returns status, either success or error+reason + */ +int zynqmp_pm_fpga_get_feature_list(u32 *value) +{ + u32 ret_payload[PAYLOAD_ARG_CNT]; + int ret; + + if (!value) + return -EINVAL; + + ret = zynqmp_pm_invoke_fn(PM_FPGA_GET_FEATURE_LIST, ret_payload, 0); + + *value = ret_payload[1]; + + return ret; +} +EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_feature_list); + +/** * zynqmp_pm_pinctrl_request - Request Pin from firmware * @pin: Pin number to request * @@ -1120,8 +1433,11 @@ if (pm_family_code == ZYNQMP_FAMILY_CODE && param == PM_PINCTRL_CONFIG_TRI_STATE) { ret = zynqmp_pm_feature(PM_PINCTRL_CONFIG_PARAM_SET); - if (ret < PM_PINCTRL_PARAM_SET_VERSION) + if (ret < PM_PINCTRL_PARAM_SET_VERSION) { + pr_warn("The requested pinctrl feature is not supported in the current firmware.\n" + "Expected firmware version is 2023.1 and above for this feature to work.\r\n"); return -EOPNOTSUPP; + } } return zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_SET, NULL, 3, pin, param, value); @@ -1182,6 +1498,193 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_init_finalize); /** + * zynqmp_pm_bbram_write_aeskey - Write AES key in BBRAM + * @keylen: Size of the input key to be written + * @keyaddr: Address of a buffer which should contain the key + * to be written + * + * This function provides support to write AES keys into BBRAM. + * + * Return: Returns status, either success or error+reason + */ +int zynqmp_pm_bbram_write_aeskey(u32 keylen, const u64 keyaddr) +{ + return zynqmp_pm_invoke_fn(PM_BBRAM_WRITE_KEY, NULL, 4, keylen, + lower_32_bits(keyaddr), + upper_32_bits(keyaddr)); +} +EXPORT_SYMBOL_GPL(zynqmp_pm_bbram_write_aeskey); + +/** + * zynqmp_pm_bbram_write_usrdata - Write user data in BBRAM + * @data: User data to be written in BBRAM + * + * This function provides support to write user data into BBRAM. + * The size of the user data must be 4 bytes. + * + * Return: Returns status, either success or error+reason + */ +int zynqmp_pm_bbram_write_usrdata(u32 data) +{ + return zynqmp_pm_invoke_fn(PM_BBRAM_WRITE_USERDATA, NULL, 1, data); +} +EXPORT_SYMBOL_GPL(zynqmp_pm_bbram_write_usrdata); + +/** + * zynqmp_pm_bbram_read_usrdata - Read user data in BBRAM + * @outaddr: Address of a buffer to store the user data read from BBRAM + * + * This function provides support to read user data in BBRAM. + * + * Return: Returns status, either success or error+reason + */ +int zynqmp_pm_bbram_read_usrdata(const u64 outaddr) +{ + return zynqmp_pm_invoke_fn(PM_BBRAM_READ_USERDATA, NULL, 1, outaddr); +} +EXPORT_SYMBOL_GPL(zynqmp_pm_bbram_read_usrdata); + +/** + * zynqmp_pm_bbram_zeroize - Zeroizes AES key in BBRAM + * + * Description: + * This function provides support to zeroize AES key in BBRAM. + * + * Return: Returns status, either success or error+reason + */ +int zynqmp_pm_bbram_zeroize(void) +{ + return zynqmp_pm_invoke_fn(PM_BBRAM_ZEROIZE, NULL, 0); +} +EXPORT_SYMBOL_GPL(zynqmp_pm_bbram_zeroize); + +/** + * zynqmp_pm_bbram_lock_userdata - Locks user data for write + * + * Description: + * This function disables writing user data into BBRAM. + * + * Return: Returns status, either success or error+reason + */ +int zynqmp_pm_bbram_lock_userdata(void) +{ + return zynqmp_pm_invoke_fn(PM_BBRAM_LOCK_USERDATA, NULL, 0); +} +EXPORT_SYMBOL_GPL(zynqmp_pm_bbram_lock_userdata); + +/** + * zynqmp_pm_get_uid_info - It is used to get image Info List + * @address: Buffer address + * @size: Number of bytes required to read from the firmware. + * @count: Number of bytes read from the firmware. + * + * This function provides support to used to get image Info List + * + * Return: Returns status, either success or error+reason + */ +int zynqmp_pm_get_uid_info(const u64 address, const u32 size, u32 *count) +{ + u32 ret_payload[PAYLOAD_ARG_CNT]; + int ret; + + if (!count) + return -EINVAL; + + ret = zynqmp_pm_invoke_fn(PM_GET_UID_INFO_LIST, ret_payload, 3, + upper_32_bits(address), + lower_32_bits(address), + size); + + *count = ret_payload[1]; + + return ret; +} +EXPORT_SYMBOL_GPL(zynqmp_pm_get_uid_info); + +/** + * zynqmp_pm_get_meta_header - It is used to get image meta header Info + * @src: PDI Image source buffer address. + * @dst: Meta-header destination buffer address + * @size: Size of the PDI image. + * @count: Number of bytes read from the firmware. + * + * This function provides a support to get the image meta header Info + * + * Return: Returns status, either success or error+reason + */ +int zynqmp_pm_get_meta_header(const u64 src, const u64 dst, + const u32 size, u32 *count) +{ + u32 ret_payload[PAYLOAD_ARG_CNT]; + int ret; + + if (!count) + return -EINVAL; + + ret = zynqmp_pm_invoke_fn(PM_GET_META_HEADER_INFO_LIST, ret_payload, 5, + upper_32_bits(src), lower_32_bits(src), + upper_32_bits(dst), lower_32_bits(dst), + size); + + *count = ret_payload[1]; + + return ret; +} +EXPORT_SYMBOL_GPL(zynqmp_pm_get_meta_header); + +/** + * zynqmp_pm_fpga_read - Perform the fpga configuration readback + * @reg_numframes: Configuration register offset (or) Number of frames to read + * @phys_address: Physical Address of the buffer + * @readback_type: Type of fpga readback operation + * @value: Value to read + * + * This function provides access to xilfpga library to perform + * fpga configuration readback. + * + * Return: Returns status, either success or error+reason + */ +int zynqmp_pm_fpga_read(const u32 reg_numframes, const u64 phys_address, + u32 readback_type, u32 *value) +{ + u32 ret_payload[PAYLOAD_ARG_CNT]; + int ret; + + if (!value) + return -EINVAL; + + ret = zynqmp_pm_invoke_fn(PM_FPGA_READ, ret_payload, 4, reg_numframes, + lower_32_bits(phys_address), + upper_32_bits(phys_address), + readback_type); + *value = ret_payload[1]; + + return ret; +} +EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_read); + +/** + * zynqmp_pm_config_reg_access - PM Config API for Config register access + * @register_access_id: ID of the requested REGISTER_ACCESS + * @address: Address of the register to be accessed + * @mask: Mask to be written to the register + * @value: Value to be written to the register + * @out: Returned output value + * + * This function calls REGISTER_ACCESS to configure CSU/PMU registers. + * + * Return: Returns status, either success or error+reason + */ +int zynqmp_pm_config_reg_access(u32 register_access_id, u32 address, + u32 mask, u32 value, u32 *out) +{ + return zynqmp_pm_invoke_fn(PM_REGISTER_ACCESS, out, 4, + register_access_id, + address, mask, value); +} +EXPORT_SYMBOL_GPL(zynqmp_pm_config_reg_access); + +/** * zynqmp_pm_set_suspend_mode() - Set system suspend mode * @mode: Mode to set for system suspend * @@ -1290,6 +1793,47 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_set_tcm_config); /** + * zynqmp_pm_get_node_status - PM call to request a node's current power state + * @node: ID of the component or sub-system in question + * @status: Current operating state of the requested node + * @requirements: Current requirements asserted on the node, + * used for slave nodes only. + * @usage: Usage information, used for slave nodes only: + * PM_USAGE_NO_MASTER - No master is currently using + * the node + * PM_USAGE_CURRENT_MASTER - Only requesting master is + * currently using the node + * PM_USAGE_OTHER_MASTER - Only other masters are + * currently using the node + * PM_USAGE_BOTH_MASTERS - Both the current and at least + * one other master is currently + * using the node + * + * Return: Returns status, either success or error+reason + */ +int zynqmp_pm_get_node_status(const u32 node, u32 *const status, + u32 *const requirements, u32 *const usage) +{ + u32 ret_payload[PAYLOAD_ARG_CNT]; + int ret; + + if (!status) + return -EINVAL; + + ret = zynqmp_pm_invoke_fn(PM_GET_NODE_STATUS, ret_payload, 1, node); + if (ret_payload[0] == XST_PM_SUCCESS) { + *status = ret_payload[1]; + if (requirements) + *requirements = ret_payload[2]; + if (usage) + *usage = ret_payload[3]; + } + + return ret; +} +EXPORT_SYMBOL_GPL(zynqmp_pm_get_node_status); + +/** * zynqmp_pm_force_pwrdwn - PM call to request for another PU or subsystem to * be powered down forcefully * @node: Node ID of the targeted PU or subsystem @@ -1355,8 +1899,16 @@ */ int zynqmp_pm_load_pdi(const u32 src, const u64 address) { - return zynqmp_pm_invoke_fn(PM_LOAD_PDI, NULL, 3, src, lower_32_bits(address), - upper_32_bits(address)); + u32 ret_payload[PAYLOAD_ARG_CNT]; + int ret; + + ret = zynqmp_pm_invoke_fn(PM_LOAD_PDI, ret_payload, 3, src, + lower_32_bits(address), + upper_32_bits(address)); + if (ret_payload[0]) + return ret_payload[0]; + + return ret; } EXPORT_SYMBOL_GPL(zynqmp_pm_load_pdi); @@ -1385,6 +1937,263 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_aes_engine); /** + * versal_pm_aes_key_write - Write AES key registers + * @keylen: Size of the input key to be written + * @keysrc: Key Source to be selected to which provided + * key should be updated + * @keyaddr: Address of a buffer which should contain the key + * to be written + * + * This function provides support to write AES volatile user keys. + * + * Return: Returns status, either success or error+reason + */ +int versal_pm_aes_key_write(const u32 keylen, + const u32 keysrc, const u64 keyaddr) +{ + return zynqmp_pm_invoke_fn(XSECURE_API_AES_WRITE_KEY, NULL, 4, + keylen, keysrc, + lower_32_bits(keyaddr), + upper_32_bits(keyaddr)); +} +EXPORT_SYMBOL_GPL(versal_pm_aes_key_write); + +/** + * versal_pm_aes_key_zero - Zeroise AES User key registers + * @keysrc: Key Source to be selected to which provided + * key should be updated + * + * This function provides support to zeroise AES volatile user keys. + * + * Return: Returns status, either success or error+reason + */ +int versal_pm_aes_key_zero(const u32 keysrc) +{ + return zynqmp_pm_invoke_fn(XSECURE_API_AES_KEY_ZERO, NULL, 1, keysrc); +} +EXPORT_SYMBOL_GPL(versal_pm_aes_key_zero); + +/** + * versal_pm_efuse_read - Reads efuse. + * @address: Address of the payload + * @offset: Efuse offset + * @size: Size of data to be read + * + * This function provides support to read data from eFuse. + * + * Return: status, either success or error code. + */ +int versal_pm_efuse_read(const u64 address, u32 offset, u32 size) +{ + return zynqmp_pm_invoke_fn(PM_EFUSE_READ_VERSAL, NULL, 4, offset, + lower_32_bits(address), + upper_32_bits(address), size); +} +EXPORT_SYMBOL_GPL(versal_pm_efuse_read); + +/** + * versal_pm_efuse_write - Write efuse + * @address: Address of the payload + * @operationid: operationid which includes module and API id + * @envdis: Environment disable variable + * + * This function provides support to write data into eFuse. + * + * Return: status, either success or error+reason + */ +int versal_pm_efuse_write(const u64 address, const u32 operationid, + const u8 envdis) +{ + return zynqmp_pm_invoke_fn(operationid, NULL, 3, lower_32_bits(address), + upper_32_bits(address), envdis); +} +EXPORT_SYMBOL_GPL(versal_pm_efuse_write); + +/** + * versal_pm_aes_op_init - Init AES operation + * @hw_req: AES op init structure address + * + * This function provides support to init AES operation. + * + * Return: Returns status, either success or error+reason + */ +int versal_pm_aes_op_init(const u64 hw_req) +{ + return zynqmp_pm_invoke_fn(XSECURE_API_AES_OP_INIT, NULL, 2, + lower_32_bits(hw_req), + upper_32_bits(hw_req)); +} +EXPORT_SYMBOL_GPL(versal_pm_aes_op_init); + +/** + * versal_pm_aes_update_aad - AES update aad + * @aad_addr: AES aad address + * @aad_len: AES aad data length + * + * This function provides support to update AAD data. + * + * Return: Returns status, either success or error+reason + */ +int versal_pm_aes_update_aad(const u64 aad_addr, const u32 aad_len) +{ + return zynqmp_pm_invoke_fn(XSECURE_API_AES_UPDATE_AAD, NULL, 3, + lower_32_bits(aad_addr), + upper_32_bits(aad_addr), + aad_len); +} +EXPORT_SYMBOL_GPL(versal_pm_aes_update_aad); + +/** + * versal_pm_aes_enc_update - Access AES hardware to encrypt the data using + * AES-GCM core. + * @in_params: Address of the AesParams structure + * @in_addr: Address of input buffer + * + * Return: Returns status, either success or error code. + */ +int versal_pm_aes_enc_update(const u64 in_params, const u64 in_addr) +{ + return zynqmp_pm_invoke_fn(XSECURE_API_AES_ENCRYPT_UPDATE, NULL, 4, + lower_32_bits(in_params), + upper_32_bits(in_params), + lower_32_bits(in_addr), + upper_32_bits(in_addr)); +} +EXPORT_SYMBOL_GPL(versal_pm_aes_enc_update); + +/** + * versal_pm_aes_enc_final - Access AES hardware to store the GCM tag + * @gcm_addr: Address of the gcm tag + * + * Return: Returns status, either success or error code. + */ +int versal_pm_aes_enc_final(const u64 gcm_addr) +{ + return zynqmp_pm_invoke_fn(XSECURE_API_AES_ENCRYPT_FINAL, NULL, 2, + lower_32_bits(gcm_addr), + upper_32_bits(gcm_addr)); +} +EXPORT_SYMBOL_GPL(versal_pm_aes_enc_final); + +/** + * versal_pm_aes_dec_update - Access AES hardware to decrypt the data using + * AES-GCM core. + * @in_params: Address of the AesParams structure + * @in_addr: Address of input buffer + * + * Return: Returns status, either success or error code. + */ +int versal_pm_aes_dec_update(const u64 in_params, const u64 in_addr) +{ + return zynqmp_pm_invoke_fn(XSECURE_API_AES_DECRYPT_UPDATE, NULL, 4, + lower_32_bits(in_params), + upper_32_bits(in_params), + lower_32_bits(in_addr), + upper_32_bits(in_addr)); +} +EXPORT_SYMBOL_GPL(versal_pm_aes_dec_update); + +/** + * versal_pm_aes_dec_final - Access AES hardware to get the GCM tag + * @gcm_addr: Address of the gcm tag + * + * Return: Returns status, either success or error code. + */ +int versal_pm_aes_dec_final(const u64 gcm_addr) +{ + return zynqmp_pm_invoke_fn(XSECURE_API_AES_DECRYPT_FINAL, NULL, 2, + lower_32_bits(gcm_addr), + upper_32_bits(gcm_addr)); +} +EXPORT_SYMBOL_GPL(versal_pm_aes_dec_final); + +/** + * versal_pm_aes_init - Init AES block + * + * This function initialise AES block. + * + * Return: Returns status, either success or error+reason + */ +int versal_pm_aes_init(void) +{ + return zynqmp_pm_invoke_fn(XSECURE_API_AES_INIT, NULL, 0); +} +EXPORT_SYMBOL_GPL(versal_pm_aes_init); + +/** + * versal_pm_ecdsa_validate_key - Access ECDSA hardware to validate key + * @key_addr: Address of the key + * @curve_id: Type of ECC curve + * + * Return: Returns status, either success or error code. + */ +int versal_pm_ecdsa_validate_key(const u64 key_addr, const u32 curve_id) +{ + return zynqmp_pm_invoke_fn(XSECURE_API_ELLIPTIC_VALIDATE_KEY, + NULL, 3, curve_id, + lower_32_bits(key_addr), + upper_32_bits(key_addr)); +} +EXPORT_SYMBOL_GPL(versal_pm_ecdsa_validate_key); + +/** + * versal_pm_ecdsa_verify_sign - Access ECDSA hardware to verify sign + * @sign_param_addr: Address of the sign params + * + * Return: Returns status, either success or error code. + */ +int versal_pm_ecdsa_verify_sign(const u64 sign_param_addr) +{ + return zynqmp_pm_invoke_fn(XSECURE_API_ELLIPTIC_VERIFY_SIGN, + NULL, 2, lower_32_bits(sign_param_addr), + upper_32_bits(sign_param_addr)); +} +EXPORT_SYMBOL_GPL(versal_pm_ecdsa_verify_sign); + +/** + * zynqmp_pm_efuse_access - Provides access to efuse memory. + * @address: Address of the efuse params structure + * @out: Returned output value + * + * Return: Returns status, either success or error code. + */ +int zynqmp_pm_efuse_access(const u64 address, u32 *out) +{ + u32 ret_payload[PAYLOAD_ARG_CNT]; + int ret; + + if (!out) + return -EINVAL; + + ret = zynqmp_pm_invoke_fn(PM_EFUSE_ACCESS, ret_payload, 2, + upper_32_bits(address), + lower_32_bits(address)); + *out = ret_payload[1]; + + return ret; +} +EXPORT_SYMBOL_GPL(zynqmp_pm_efuse_access); + +int zynqmp_pm_secure_load(const u64 src_addr, u64 key_addr, u64 *dst) +{ + u32 ret_payload[PAYLOAD_ARG_CNT]; + int ret_value; + + if (!dst) + return -EINVAL; + + ret_value = zynqmp_pm_invoke_fn(PM_SECURE_IMAGE, ret_payload, 4, + lower_32_bits(src_addr), + upper_32_bits(src_addr), + lower_32_bits(key_addr), + upper_32_bits(key_addr)); + *dst = ((u64)ret_payload[1] << 32) | ret_payload[2]; + + return ret_value; +} +EXPORT_SYMBOL_GPL(zynqmp_pm_secure_load); + +/** * zynqmp_pm_sha_hash - Access the SHA engine to calculate the hash * @address: Address of the data/ Address of output buffer where * hash should be stored. @@ -1410,6 +2219,78 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_sha_hash); /** + * versal_pm_sha_hash - Access the SHA engine to calculate the hash + * @src: Address of the data + * @dst: Address of the output buffer + * @size: Size of the data. + * + * Return: Returns status, either success or error code. + */ +int versal_pm_sha_hash(const u64 src, const u64 dst, const u32 size) +{ + return zynqmp_pm_invoke_fn(XSECURE_API_SHA3_UPDATE, NULL, 5, + lower_32_bits(src), upper_32_bits(src), + size, + lower_32_bits(dst), upper_32_bits(dst)); +} +EXPORT_SYMBOL_GPL(versal_pm_sha_hash); + +/** + * zynqmp_pm_rsa - Access RSA hardware to encrypt/decrypt the data with RSA. + * @address: Address of the data + * @size: Size of the data. + * @flags: + * BIT(0) - Encryption/Decryption + * 0 - RSA decryption with private key + * 1 - RSA encryption with public key. + * + * Return: Returns status, either success or error code. + */ +int zynqmp_pm_rsa(const u64 address, const u32 size, const u32 flags) +{ + u32 lower_32_bits = lower_32_bits(address); + u32 upper_32_bits = upper_32_bits(address); + + return zynqmp_pm_invoke_fn(PM_SECURE_RSA, NULL, 4, upper_32_bits, + lower_32_bits, size, flags); +} +EXPORT_SYMBOL_GPL(zynqmp_pm_rsa); + +/** + * versal_pm_rsa_encrypt - Access RSA hardware to encrypt the data with RSA. + * @in_params: Address of the input parameter + * @in_addr: Address of input buffer + * + * Return: Returns status, either success or error code. + */ +int versal_pm_rsa_encrypt(const u64 in_params, const u64 in_addr) +{ + return zynqmp_pm_invoke_fn(XSECURE_API_RSA_PUBLIC_ENCRYPT, NULL, 4, + lower_32_bits(in_params), + upper_32_bits(in_params), + lower_32_bits(in_addr), + upper_32_bits(in_addr)); +} +EXPORT_SYMBOL_GPL(versal_pm_rsa_encrypt); + +/** + * versal_pm_rsa_decrypt - Access RSA hardware to decrypt the data with RSA. + * @in_params: Address of the input parameter + * @in_addr: Address of input buffer + * + * Return: Returns status, either success or error code. + */ +int versal_pm_rsa_decrypt(const u64 in_params, const u64 in_addr) +{ + return zynqmp_pm_invoke_fn(XSECURE_API_RSA_PRIVATE_DECRYPT, NULL, 4, + lower_32_bits(in_params), + upper_32_bits(in_params), + lower_32_bits(in_addr), + upper_32_bits(in_addr)); +} +EXPORT_SYMBOL_GPL(versal_pm_rsa_decrypt); + +/** * zynqmp_pm_register_notifier() - PM API for register a subsystem * to be notified about specific * event/error. @@ -1469,6 +2350,78 @@ } /** + * zynqmp_pm_sec_read_reg - PM call to securely read from given offset + * of the node + * @node_id: Node Id of the device + * @offset: Offset to be used (20-bit) + * @ret_value: Output data read from the given offset after + * firmware access policy is successfully enforced + * + * Return: Returns 0 on success or error value on failure + */ +int zynqmp_pm_sec_read_reg(u32 node_id, u32 offset, u32 *ret_value) +{ + u32 ret_payload[PAYLOAD_ARG_CNT]; + u32 count = 1; + int ret; + + if (!ret_value) + return -EINVAL; + + ret = zynqmp_pm_invoke_fn(PM_IOCTL, ret_payload, 4, node_id, IOCTL_READ_REG, + offset, count); + + *ret_value = ret_payload[1]; + + return ret; +} +EXPORT_SYMBOL_GPL(zynqmp_pm_sec_read_reg); + +/** + * zynqmp_pm_sec_mask_write_reg - PM call to securely write to given offset + * of the node + * @node_id: Node Id of the device + * @offset: Offset to be used (20-bit) + * @mask: Mask to be used + * @value: Value to be written + * + * Return: Returns 0 on success or error value on failure + */ +int zynqmp_pm_sec_mask_write_reg(const u32 node_id, const u32 offset, u32 mask, + u32 value) +{ + return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 5, node_id, IOCTL_MASK_WRITE_REG, + offset, mask, value); +} +EXPORT_SYMBOL_GPL(zynqmp_pm_sec_mask_write_reg); + +/** + * zynqmp_pm_get_qos - PM call to query default and current QoS of the node + * @node: Node Id of the device + * @def_qos: Default QoS value + * @qos: Current QoS value + * + * Return: Returns 0 on success and the default and current QoS registers in + * @def_qos and @qos or error value on failure + */ +int zynqmp_pm_get_qos(u32 node, u32 *const def_qos, u32 *const qos) +{ + u32 ret_payload[PAYLOAD_ARG_CNT]; + int ret; + + if (!def_qos || !qos) + return -EINVAL; + + ret = zynqmp_pm_invoke_fn(PM_IOCTL, ret_payload, 2, node, IOCTL_GET_QOS); + + *def_qos = ret_payload[1]; + *qos = ret_payload[2]; + + return ret; +} +EXPORT_SYMBOL_GPL(zynqmp_pm_get_qos); + +/** * zynqmp_pm_set_sd_config - PM call to set value of SD config registers * @node: SD node ID * @config: The config type of SD registers @@ -1498,6 +2451,118 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_set_gem_config); /** + * zynqmp_pm_xilsem_cntrl_ops - PM call to perform XilSEM operations + * @cmd: Command for XilSEM scan control operations + * @response: Output response (command header, error code or status) + * + * Return: Returns 0 on success or error value on failure. + */ +int zynqmp_pm_xilsem_cntrl_ops(u32 cmd, u32 *const response) +{ + u32 ret_buf[PAYLOAD_ARG_CNT]; + int ret; + + ret = zynqmp_pm_invoke_fn(PM_XSEM_HEADER | cmd, ret_buf, 0); + response[0] = ret_buf[1]; + response[1] = ret_buf[2]; + + return ret; +} +EXPORT_SYMBOL_GPL(zynqmp_pm_xilsem_cntrl_ops); + +/** + * zynqmp_pm_xilsem_cram_errinj - PM call to perform CRAM error injection + * @frame: Frame number to be used for error injection + * @qword: Word number to be used for error injection + * @bit: Bit location to be used for error injection + * @row: CFRAME row number to be used for error injection + * @response: Output response (command header, error code or status) + * + * Return: Returns 0 on success or error value on failure. + */ +int zynqmp_pm_xilsem_cram_errinj(u32 frame, u32 qword, u32 bit, u32 row, + u32 *const response) +{ + u32 ret_buf[PAYLOAD_ARG_CNT]; + int ret; + + ret = zynqmp_pm_invoke_fn(PM_XSEM_CRAM_ERRINJ, ret_buf, 4, frame, + qword, bit, row); + response[0] = ret_buf[1]; + response[1] = ret_buf[2]; + + return ret; +} +EXPORT_SYMBOL_GPL(zynqmp_pm_xilsem_cram_errinj); + +int versal_pm_puf_registration(const u64 in_addr) +{ + return zynqmp_pm_invoke_fn(XPUF_API_PUF_REGISTRATION, NULL, + 2, lower_32_bits(in_addr), + upper_32_bits(in_addr)); +} +EXPORT_SYMBOL_GPL(versal_pm_puf_registration); + +int versal_pm_puf_clear_id(void) +{ + return zynqmp_pm_invoke_fn(XPUF_API_PUF_CLEAR_PUF_ID, NULL, + 2, NULL, NULL); +} +EXPORT_SYMBOL_GPL(versal_pm_puf_clear_id); + +int versal_pm_puf_regeneration(const u64 in_addr) +{ + return zynqmp_pm_invoke_fn(XPUF_API_PUF_REGENERATION, NULL, + 2, lower_32_bits(in_addr), + upper_32_bits(in_addr)); +} +EXPORT_SYMBOL_GPL(versal_pm_puf_regeneration); + +/** + * zynqmp_pm_xilsem_cram_readecc - PM call to perform CFRAME ECC read + * @frame: Frame number to be used for reading ECC + * @row: CFRAME row number to be used for reading ECC + * @response: Output response (status, Frame ecc header, ECC values) + * + * Return: Returns 0 on success or error value on failure. + */ +int zynqmp_pm_xilsem_cram_readecc(u32 frame, u32 row, u32 *const response) +{ + u32 ret_buf[PAYLOAD_ARG_CNT]; + int ret; + + ret = zynqmp_pm_invoke_fn(PM_XSEM_CRAM_RD_ECC, ret_buf, 2, frame, row); + response[0] = ret_buf[0]; + response[1] = ret_buf[1]; + response[2] = ret_buf[2]; + response[3] = ret_buf[3]; + + return ret; +} +EXPORT_SYMBOL_GPL(zynqmp_pm_xilsem_cram_readecc); + +/** + * zynqmp_pm_xilsem_read_cfg - PM call to perform Xilsem configuration read + * @response: Output response (status, config header, Xilsem config) + * + * Return: Returns 0 on success or error value on failure. + */ +int zynqmp_pm_xilsem_read_cfg(u32 *const response) +{ + u32 ret_buf[PAYLOAD_ARG_CNT]; + int ret; + + ret = zynqmp_pm_invoke_fn(PM_XSEM_RD_CONFIG, ret_buf, 0); + response[0] = ret_buf[0]; + response[1] = ret_buf[1]; + response[2] = ret_buf[2]; + response[3] = ret_buf[3]; + + return ret; +} +EXPORT_SYMBOL_GPL(zynqmp_pm_xilsem_read_cfg); + +/** * struct zynqmp_pm_shutdown_scope - Struct for shutdown scope * @subtype: Shutdown subtype * @name: Matching string for scope argument @@ -1837,6 +2902,56 @@ static DEVICE_ATTR_RW(feature_config_value); +static ssize_t last_reset_reason_show(struct device *device, + struct device_attribute *attr, + char *buf) +{ + u32 ret_payload[PAYLOAD_ARG_CNT]; + int ret; + + ret = zynqmp_pm_get_last_reset_reason(ret_payload); + if (ret) + return ret; + + switch (ret_payload[1]) { + case PM_RESET_REASON_EXT_POR: + return sprintf(buf, "ext_por\n"); + case PM_RESET_REASON_SW_POR: + return sprintf(buf, "sw_por\n"); + case PM_RESET_REASON_SLR_POR: + return sprintf(buf, "slr_por\n"); + case PM_RESET_REASON_ERR_POR: + return sprintf(buf, "err_por\n"); + case PM_RESET_REASON_DAP_SRST: + return sprintf(buf, "dap_srst\n"); + case PM_RESET_REASON_ERR_SRST: + return sprintf(buf, "err_srst\n"); + case PM_RESET_REASON_SW_SRST: + return sprintf(buf, "sw_srst\n"); + case PM_RESET_REASON_SLR_SRST: + return sprintf(buf, "slr_srst\n"); + default: + return sprintf(buf, "unknown reset\n"); + } +} + +static DEVICE_ATTR_RO(last_reset_reason); + +static ssize_t firmware_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + unsigned int len; + + len = strscpy(image_name, buf, NAME_MAX); + /* lose terminating \n */ + if (image_name[len - 1] == '\n') + image_name[len - 1] = 0; + + return count; +} +static DEVICE_ATTR_WO(firmware); + static struct attribute *zynqmp_firmware_attrs[] = { &dev_attr_ggs0.attr, &dev_attr_ggs1.attr, @@ -1850,11 +2965,252 @@ &dev_attr_health_status.attr, &dev_attr_feature_config_id.attr, &dev_attr_feature_config_value.attr, + &dev_attr_last_reset_reason.attr, + &dev_attr_firmware.attr, NULL, }; ATTRIBUTE_GROUPS(zynqmp_firmware); +/** + * config_reg_store - Write config_reg sysfs attribute + * @kobj: Kobject structure + * @attr: Kobject attribute structure + * @buf: User entered health_status attribute string + * @count: Buffer size + * + * User-space interface for setting the config register. + * + * To write any CSU/PMU register + * echo
> /sys/firmware/zynqmp/config_reg + * Usage: + * echo 0x345AB234 0xFFFFFFFF 0x1234ABCD > /sys/firmware/zynqmp/config_reg + * + * To Read any CSU/PMU register, write address to the variable like below + * echo
> /sys/firmware/zynqmp/config_reg + * + * Return: count argument if request succeeds, the corresponding error + * code otherwise + */ +static ssize_t config_reg_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, size_t count) +{ + char *kern_buff, *inbuf, *tok; + unsigned long address, value, mask; + int ret; + + kern_buff = kzalloc(count + 1, GFP_KERNEL); + if (!kern_buff) + return -ENOMEM; + + ret = strscpy(kern_buff, buf, count + 1); + if (ret < 0) { + ret = -EFAULT; + goto err; + } + + inbuf = kern_buff; + + /* Read the addess */ + tok = strsep(&inbuf, " "); + if (!tok) { + ret = -EFAULT; + goto err; + } + ret = kstrtol(tok, 16, &address); + if (ret) { + ret = -EFAULT; + goto err; + } + /* Read the write value */ + tok = strsep(&inbuf, " "); + /* + * If parameter provided is only address, then its a read operation. + * Store the address in a global variable and retrieve whenever + * required. + */ + if (!tok) { + register_address = address; + goto err; + } + register_address = address; + + ret = kstrtol(tok, 16, &mask); + if (ret) { + ret = -EFAULT; + goto err; + } + tok = strsep(&inbuf, " "); + if (!tok) { + ret = -EFAULT; + goto err; + } + ret = kstrtol(tok, 16, &value); + if (ret) { + ret = -EFAULT; + goto err; + } + ret = zynqmp_pm_config_reg_access(CONFIG_REG_WRITE, address, + mask, value, NULL); + if (ret) + pr_err("unable to write value to %lx\n", value); +err: + kfree(kern_buff); + if (ret) + return ret; + return count; +} + +/** + * config_reg_show - Read config_reg sysfs attribute + * @kobj: Kobject structure + * @attr: Kobject attribute structure + * @buf: User entered health_status attribute string + * + * User-space interface for getting the config register. + * + * To Read any CSU/PMU register, write address to the variable like below + * echo
> /sys/firmware/zynqmp/config_reg + * + * Then Read the address using below command + * cat /sys/firmware/zynqmp/config_reg + * + * Return: number of chars written to buf. + */ +static ssize_t config_reg_show(struct kobject *kobj, + struct kobj_attribute *attr, + char *buf) +{ + int ret; + u32 ret_payload[PAYLOAD_ARG_CNT]; + + ret = zynqmp_pm_config_reg_access(CONFIG_REG_READ, register_address, + 0, 0, ret_payload); + if (ret) + return ret; + + return sprintf(buf, "0x%x\n", ret_payload[1]); +} + +static struct kobj_attribute zynqmp_attr_config_reg = + __ATTR_RW(config_reg); + +static struct attribute *attrs[] = { + &zynqmp_attr_config_reg.attr, + NULL, +}; + +static const struct attribute_group attr_group = { + .attrs = attrs, + NULL, +}; + +static int zynqmp_pm_sysfs_init(void) +{ + struct kobject *zynqmp_kobj; + int ret; + + zynqmp_kobj = kobject_create_and_add("zynqmp", firmware_kobj); + if (!zynqmp_kobj) { + pr_err("zynqmp: Firmware kobj add failed.\n"); + return -ENOMEM; + } + + ret = sysfs_create_group(zynqmp_kobj, &attr_group); + if (ret) { + pr_err("%s() sysfs creation fail with error %d\n", + __func__, ret); + } + + return ret; +} + +static ssize_t firmware_uid_get_data(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, char *buf, + loff_t off, size_t count) +{ + struct device *kdev = kobj_to_dev(kobj); + dma_addr_t dma_addr = 0; + char *kbuf; + u32 size; + int ret; + + kbuf = dma_alloc_coherent(kdev, UID_BUFF_SIZE, &dma_addr, GFP_KERNEL); + if (!kbuf) + return -ENOMEM; + + /* Read from the firmware memory */ + ret = zynqmp_pm_get_uid_info(dma_addr, UID_BUFF_SIZE, &size); + if (ret) { + dma_free_coherent(kdev, UID_BUFF_SIZE, kbuf, dma_addr); + return ret; + } + + size = size * UID_SET_LEN * UID_LEN; + memcpy(buf, kbuf, size); + dma_free_coherent(kdev, UID_BUFF_SIZE, kbuf, dma_addr); + + return size; +} + +static const struct bin_attribute uid_attr = { + .attr.name = "uid-read", + .attr.mode = 00400, + .size = 1, + .read = firmware_uid_get_data, +}; + +static ssize_t firmware_meta_header_get_data(struct file *filp, + struct kobject *kobj, + struct bin_attribute *attr, + char *buf, loff_t off, + size_t count) +{ + struct device *kdev = kobj_to_dev(kobj); + const struct firmware *fw; + dma_addr_t dma_addr = 0; + char *kbuf; + u32 size; + int ret; + + ret = request_firmware(&fw, image_name, kdev); + if (ret) { + dev_err(kdev, "Error requesting firmware %s\n", image_name); + return ret; + } + + kbuf = dma_alloc_coherent(kdev, fw->size, &dma_addr, GFP_KERNEL); + if (!kbuf) { + ret = -ENOMEM; + goto free_firmware; + } + + memcpy(kbuf, fw->data, fw->size); + + /* Read from the firmware memory */ + ret = zynqmp_pm_get_meta_header(dma_addr, dma_addr, fw->size, &size); + if (ret) + goto free_dma; + + memcpy(buf, kbuf, size); + ret = size; + +free_dma: + dma_free_coherent(kdev, fw->size, kbuf, dma_addr); +free_firmware: + release_firmware(fw); + + return ret; +} + +static const struct bin_attribute meta_header_attr = { + .attr.name = "meta-header-read", + .attr.mode = 00400, + .size = 1, + .read = firmware_meta_header_get_data, +}; + static int zynqmp_firmware_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -1865,6 +3221,11 @@ if (ret) return ret; + /* Get SiP SVC version number */ + ret = zynqmp_pm_get_sip_svc_version(&sip_svc_version); + if (ret) + return ret; + ret = do_feature_check_call(PM_FEATURE_CHECK); if (ret >= 0 && ((ret & FIRMWARE_VERSION_MASK) >= PM_API_VERSION_1)) feature_check_enabled = true; @@ -1918,11 +3279,37 @@ return ret; } + ret = zynqmp_pm_sysfs_init(); + if (ret) { + pr_err("%s() sysfs init fail with error %d\n", __func__, ret); + return ret; + } + + ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); + if (ret < 0) { + dev_err(dev, "no usable DMA configuration"); + return ret; + } + + ret = sysfs_create_bin_file(&pdev->dev.kobj, &uid_attr); + if (ret) { + pr_err("%s() Failed to create sysfs binary file for uid-read with error%d\n", + __func__, ret); + return ret; + } + + ret = sysfs_create_bin_file(&pdev->dev.kobj, &meta_header_attr); + if (ret) { + dev_err(dev, "%s() Failed to create sysfs binary file for meta-header-read with error%d\n", + __func__, ret); + return ret; + } + zynqmp_pm_api_debugfs_init(); if (pm_family_code == VERSAL_FAMILY_CODE) { em_dev = platform_device_register_data(&pdev->dev, "xlnx_event_manager", - -1, NULL, 0); + -1, &pm_sub_family_code, 4); if (IS_ERR(em_dev)) dev_err_probe(&pdev->dev, PTR_ERR(em_dev), "EM register fail with error\n"); } --- linux-xilinx-6.8.0.orig/drivers/fpga/Kconfig +++ linux-xilinx-6.8.0/drivers/fpga/Kconfig @@ -12,6 +12,16 @@ if FPGA +config FPGA_MGR_DEBUG_FS + tristate "FPGA debug fs" + select DEBUG_FS + help + Say Y here if you want to expose a DebugFS interface for the + FPGA Manager Framework. FPGA manager DebugFS provides a user + interface to read the fpga specific configuration information. + + If unsure, say N. + config FPGA_MGR_SOCFPGA tristate "Altera SOCFPGA FPGA Manager" depends on ARCH_INTEL_SOCFPGA || COMPILE_TEST @@ -91,6 +101,24 @@ FPGA manager driver support for the Altera Cyclone II FPGA present on the TS-73xx SBC boards. +config FPGA_MGR_ZYNQ_AFI_FPGA + bool "Xilinx AFI FPGA" + depends on FPGA_MGR_ZYNQ_FPGA + help + Zynq AFI driver support for writing to the AFI registers + for configuring the PS_PL interface. For some of the bitstream + or designs to work the PS to PL interfaces need to be configured + like the data bus-width etc. + +config XILINX_AFI_FPGA + bool "Xilinx AFI FPGA" + depends on FPGA_MGR_ZYNQMP_FPGA || COMPILE_TEST + help + FPGA manager driver support for writing to the AFI registers + for configuring the PS_PL interface. For some of the bitstream + or designs to work the PS to PL interfaces need to be configured + like the datawidth etc. + config FPGA_BRIDGE tristate "FPGA Bridge Framework" help --- linux-xilinx-6.8.0.orig/drivers/fpga/Makefile +++ linux-xilinx-6.8.0/drivers/fpga/Makefile @@ -17,8 +17,10 @@ obj-$(CONFIG_FPGA_MGR_TS73XX) += ts73xx-fpga.o obj-$(CONFIG_FPGA_MGR_XILINX_SPI) += xilinx-spi.o obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA) += zynq-fpga.o +obj-$(CONFIG_FPGA_MGR_ZYNQ_AFI_FPGA) += zynq-afi.o obj-$(CONFIG_FPGA_MGR_ZYNQMP_FPGA) += zynqmp-fpga.o obj-$(CONFIG_FPGA_MGR_VERSAL_FPGA) += versal-fpga.o +obj-$(CONFIG_XILINX_AFI_FPGA) += xilinx-afi.o obj-$(CONFIG_FPGA_MGR_MICROCHIP_SPI) += microchip-spi.o obj-$(CONFIG_FPGA_MGR_LATTICE_SYSCONFIG) += lattice-sysconfig.o obj-$(CONFIG_FPGA_MGR_LATTICE_SYSCONFIG_SPI) += lattice-sysconfig-spi.o --- linux-xilinx-6.8.0.orig/drivers/fpga/dfl-pci.c +++ linux-xilinx-6.8.0/drivers/fpga/dfl-pci.c @@ -78,6 +78,7 @@ #define PCIE_DEVICE_ID_SILICOM_PAC_N5011 0x1001 #define PCIE_DEVICE_ID_INTEL_DFL 0xbcce /* PCI Subdevice ID for PCIE_DEVICE_ID_INTEL_DFL */ +#define PCIE_SUBDEVICE_ID_INTEL_D5005 0x138d #define PCIE_SUBDEVICE_ID_INTEL_N6000 0x1770 #define PCIE_SUBDEVICE_ID_INTEL_N6001 0x1771 #define PCIE_SUBDEVICE_ID_INTEL_C6100 0x17d4 @@ -102,6 +103,8 @@ {PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5010),}, {PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5011),}, {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL, + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_D5005),}, + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL, PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6000),}, {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF, PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6000),}, --- linux-xilinx-6.8.0.orig/drivers/fpga/fpga-bridge.c +++ linux-xilinx-6.8.0/drivers/fpga/fpga-bridge.c @@ -13,6 +13,12 @@ #include #include +/* For enabling manual bridge set(enable/disable) function */ +#ifdef CONFIG_DEBUG_KERNEL +#undef DEBUG +#define DEBUG +#endif + static DEFINE_IDA(fpga_bridge_ida); static const struct class fpga_bridge_class; @@ -55,33 +61,26 @@ } EXPORT_SYMBOL_GPL(fpga_bridge_disable); -static struct fpga_bridge *__fpga_bridge_get(struct device *dev, +static struct fpga_bridge *__fpga_bridge_get(struct device *bridge_dev, struct fpga_image_info *info) { struct fpga_bridge *bridge; - int ret = -ENODEV; - bridge = to_fpga_bridge(dev); + bridge = to_fpga_bridge(bridge_dev); bridge->info = info; - if (!mutex_trylock(&bridge->mutex)) { - ret = -EBUSY; - goto err_dev; - } + if (!mutex_trylock(&bridge->mutex)) + return ERR_PTR(-EBUSY); - if (!try_module_get(dev->parent->driver->owner)) - goto err_ll_mod; + if (!try_module_get(bridge->br_ops_owner)) { + mutex_unlock(&bridge->mutex); + return ERR_PTR(-ENODEV); + } dev_dbg(&bridge->dev, "get\n"); return bridge; - -err_ll_mod: - mutex_unlock(&bridge->mutex); -err_dev: - put_device(dev); - return ERR_PTR(ret); } /** @@ -98,13 +97,18 @@ struct fpga_bridge *of_fpga_bridge_get(struct device_node *np, struct fpga_image_info *info) { - struct device *dev; + struct fpga_bridge *bridge; + struct device *bridge_dev; - dev = class_find_device_by_of_node(&fpga_bridge_class, np); - if (!dev) + bridge_dev = class_find_device_by_of_node(&fpga_bridge_class, np); + if (!bridge_dev) return ERR_PTR(-ENODEV); - return __fpga_bridge_get(dev, info); + bridge = __fpga_bridge_get(bridge_dev, info); + if (IS_ERR(bridge)) + put_device(bridge_dev); + + return bridge; } EXPORT_SYMBOL_GPL(of_fpga_bridge_get); @@ -125,6 +129,7 @@ struct fpga_bridge *fpga_bridge_get(struct device *dev, struct fpga_image_info *info) { + struct fpga_bridge *bridge; struct device *bridge_dev; bridge_dev = class_find_device(&fpga_bridge_class, NULL, dev, @@ -132,7 +137,11 @@ if (!bridge_dev) return ERR_PTR(-ENODEV); - return __fpga_bridge_get(bridge_dev, info); + bridge = __fpga_bridge_get(bridge_dev, info); + if (IS_ERR(bridge)) + put_device(bridge_dev); + + return bridge; } EXPORT_SYMBOL_GPL(fpga_bridge_get); @@ -146,7 +155,7 @@ dev_dbg(&bridge->dev, "put\n"); bridge->info = NULL; - module_put(bridge->dev.parent->driver->owner); + module_put(bridge->br_ops_owner); mutex_unlock(&bridge->mutex); put_device(&bridge->dev); } @@ -308,26 +317,51 @@ static DEVICE_ATTR_RO(name); static DEVICE_ATTR_RO(state); +#ifdef DEBUG +static ssize_t set_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct fpga_bridge *bridge = to_fpga_bridge(dev); + long enable; + int ret; + + ret = kstrtol(buf, 16, &enable); + if (ret) + return ret; + + if (bridge->br_ops && bridge->br_ops->enable_set) + enable = bridge->br_ops->enable_set(bridge, !!enable); + + return count; +} +static DEVICE_ATTR_WO(set); +#endif + static struct attribute *fpga_bridge_attrs[] = { &dev_attr_name.attr, &dev_attr_state.attr, +#ifdef DEBUG + &dev_attr_set.attr, +#endif NULL, }; ATTRIBUTE_GROUPS(fpga_bridge); /** - * fpga_bridge_register - create and register an FPGA Bridge device + * __fpga_bridge_register - create and register an FPGA Bridge device * @parent: FPGA bridge device from pdev * @name: FPGA bridge name * @br_ops: pointer to structure of fpga bridge ops * @priv: FPGA bridge private data + * @owner: owner module containing the br_ops * * Return: struct fpga_bridge pointer or ERR_PTR() */ struct fpga_bridge * -fpga_bridge_register(struct device *parent, const char *name, - const struct fpga_bridge_ops *br_ops, - void *priv) +__fpga_bridge_register(struct device *parent, const char *name, + const struct fpga_bridge_ops *br_ops, + void *priv, struct module *owner) { struct fpga_bridge *bridge; int id, ret; @@ -357,6 +391,7 @@ bridge->name = name; bridge->br_ops = br_ops; + bridge->br_ops_owner = owner; bridge->priv = priv; bridge->dev.groups = br_ops->groups; @@ -386,7 +421,7 @@ return ERR_PTR(ret); } -EXPORT_SYMBOL_GPL(fpga_bridge_register); +EXPORT_SYMBOL_GPL(__fpga_bridge_register); /** * fpga_bridge_unregister - unregister an FPGA bridge --- linux-xilinx-6.8.0.orig/drivers/fpga/fpga-mgr.c +++ linux-xilinx-6.8.0/drivers/fpga/fpga-mgr.c @@ -8,6 +8,9 @@ * With code from the mailing list: * Copyright (C) 2013 Xilinx, Inc. */ +#include +#include +#include #include #include #include @@ -61,12 +64,14 @@ { int ret = 0; + mgr->err = 0; mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE; if (mgr->mops->write_complete) ret = mgr->mops->write_complete(mgr, info); if (ret) { dev_err(&mgr->dev, "Error after writing image data to FPGA\n"); mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR; + mgr->err = ret; return ret; } mgr->state = FPGA_MGR_STATE_OPERATING; @@ -272,6 +277,7 @@ size_t header_size = info->header_size; int ret; + mgr->err = 0; mgr->state = FPGA_MGR_STATE_WRITE_INIT; if (header_size > count) @@ -284,6 +290,7 @@ if (ret) { dev_err(&mgr->dev, "Error preparing FPGA for writing\n"); mgr->state = FPGA_MGR_STATE_WRITE_INIT_ERR; + mgr->err = ret; return ret; } @@ -364,11 +371,15 @@ { int ret; + if (info->flags & FPGA_MGR_USERKEY_ENCRYPTED_BITSTREAM) + memcpy(info->key, mgr->key, ENCRYPTED_KEY_LEN); + ret = fpga_mgr_prepare_sg(mgr, info, sgt); if (ret) return ret; /* Write the FPGA image to the FPGA. */ + mgr->err = 0; mgr->state = FPGA_MGR_STATE_WRITE; if (mgr->mops->write_sg) { ret = fpga_mgr_write_sg(mgr, sgt); @@ -405,6 +416,7 @@ if (ret) { dev_err(&mgr->dev, "Error while writing image data to FPGA\n"); mgr->state = FPGA_MGR_STATE_WRITE_ERR; + mgr->err = ret; return ret; } @@ -436,11 +448,13 @@ /* * Write the FPGA image to the FPGA. */ + mgr->err = 0; mgr->state = FPGA_MGR_STATE_WRITE; ret = fpga_mgr_write(mgr, buf, count); if (ret) { dev_err(&mgr->dev, "Error while writing image data to FPGA\n"); mgr->state = FPGA_MGR_STATE_WRITE_ERR; + mgr->err = ret; return ret; } @@ -519,6 +533,39 @@ return rc; } +static int fpga_dmabuf_load(struct fpga_manager *mgr, + struct fpga_image_info *info) +{ + struct dma_buf_attachment *attach; + struct sg_table *sgt; + int ret; + + /* create attachment for dmabuf with the user device */ + attach = dma_buf_attach(mgr->dmabuf, &mgr->dev); + if (IS_ERR(attach)) { + pr_err("failed to attach dmabuf\n"); + ret = PTR_ERR(attach); + goto fail_put; + } + + sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL); + if (IS_ERR(sgt)) { + ret = PTR_ERR(sgt); + goto fail_detach; + } + + info->sgt = sgt; + ret = fpga_mgr_buf_load_sg(mgr, info, info->sgt); + dma_buf_unmap_attachment(attach, sgt, DMA_BIDIRECTIONAL); + +fail_detach: + dma_buf_detach(mgr->dmabuf, attach); +fail_put: + dma_buf_put(mgr->dmabuf); + + return ret; +} + /** * fpga_mgr_firmware_load - request firmware and load to fpga * @mgr: fpga manager @@ -543,11 +590,17 @@ dev_info(dev, "writing %s to %s\n", image_name, mgr->name); + mgr->err = 0; mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ; + /* flags indicates whether to do full or partial reconfiguration */ + info->flags = mgr->flags; + memcpy(info->key, mgr->key, ENCRYPTED_KEY_LEN); + ret = request_firmware(&fw, image_name, dev); if (ret) { mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ_ERR; + mgr->err = ret; dev_err(dev, "Error requesting firmware %s\n", image_name); return ret; } @@ -573,6 +626,8 @@ { info->header_size = mgr->mops->initial_header_size; + if (mgr->flags & FPGA_MGR_CONFIG_DMA_BUF) + return fpga_dmabuf_load(mgr, info); if (info->sgt) return fpga_mgr_buf_load_sg(mgr, info, info->sgt); if (info->buf && info->count) @@ -626,6 +681,9 @@ { struct fpga_manager *mgr = to_fpga_manager(dev); + if (mgr->err) + return sprintf(buf, "%s: 0x%x\n", state_str[mgr->state], mgr->err); + return sprintf(buf, "%s\n", state_str[mgr->state]); } @@ -652,32 +710,102 @@ return len; } +static ssize_t firmware_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct fpga_manager *mgr = to_fpga_manager(dev); + unsigned int len; + char image_name[NAME_MAX]; + int ret; + + /* struct with information about the FPGA image to program. */ + struct fpga_image_info info = {0}; + + info.header_size = mgr->mops->initial_header_size; + + /* lose terminating \n */ + strcpy(image_name, buf); + len = strlen(image_name); + if (image_name[len - 1] == '\n') + image_name[len - 1] = 0; + + ret = fpga_mgr_firmware_load(mgr, &info, image_name); + if (ret) + return ret; + + return count; +} + +static ssize_t key_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct fpga_manager *mgr = to_fpga_manager(dev); + + return snprintf(buf, ENCRYPTED_KEY_LEN + 1, "%s\n", mgr->key); +} + +static ssize_t key_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct fpga_manager *mgr = to_fpga_manager(dev); + + memcpy(mgr->key, buf, count); + + return count; +} + +static ssize_t flags_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct fpga_manager *mgr = to_fpga_manager(dev); + + return sprintf(buf, "%lx\n", mgr->flags); +} + +static ssize_t flags_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct fpga_manager *mgr = to_fpga_manager(dev); + int ret; + + ret = kstrtol(buf, 16, &mgr->flags); + if (ret) + return ret; + + return count; +} + static DEVICE_ATTR_RO(name); static DEVICE_ATTR_RO(state); static DEVICE_ATTR_RO(status); +static DEVICE_ATTR_WO(firmware); +static DEVICE_ATTR_RW(flags); +static DEVICE_ATTR_RW(key); static struct attribute *fpga_mgr_attrs[] = { &dev_attr_name.attr, &dev_attr_state.attr, &dev_attr_status.attr, + &dev_attr_firmware.attr, + &dev_attr_flags.attr, + &dev_attr_key.attr, NULL, }; ATTRIBUTE_GROUPS(fpga_mgr); -static struct fpga_manager *__fpga_mgr_get(struct device *dev) +static struct fpga_manager *__fpga_mgr_get(struct device *mgr_dev) { struct fpga_manager *mgr; - mgr = to_fpga_manager(dev); + mgr = to_fpga_manager(mgr_dev); - if (!try_module_get(dev->parent->driver->owner)) - goto err_dev; + if (!try_module_get(mgr->mops_owner)) + mgr = ERR_PTR(-ENODEV); return mgr; - -err_dev: - put_device(dev); - return ERR_PTR(-ENODEV); } static int fpga_mgr_dev_match(struct device *dev, const void *data) @@ -693,12 +821,18 @@ */ struct fpga_manager *fpga_mgr_get(struct device *dev) { - struct device *mgr_dev = class_find_device(&fpga_mgr_class, NULL, dev, - fpga_mgr_dev_match); + struct fpga_manager *mgr; + struct device *mgr_dev; + + mgr_dev = class_find_device(&fpga_mgr_class, NULL, dev, fpga_mgr_dev_match); if (!mgr_dev) return ERR_PTR(-ENODEV); - return __fpga_mgr_get(mgr_dev); + mgr = __fpga_mgr_get(mgr_dev); + if (IS_ERR(mgr)) + put_device(mgr_dev); + + return mgr; } EXPORT_SYMBOL_GPL(fpga_mgr_get); @@ -711,13 +845,18 @@ */ struct fpga_manager *of_fpga_mgr_get(struct device_node *node) { - struct device *dev; + struct fpga_manager *mgr; + struct device *mgr_dev; - dev = class_find_device_by_of_node(&fpga_mgr_class, node); - if (!dev) + mgr_dev = class_find_device_by_of_node(&fpga_mgr_class, node); + if (!mgr_dev) return ERR_PTR(-ENODEV); - return __fpga_mgr_get(dev); + mgr = __fpga_mgr_get(mgr_dev); + if (IS_ERR(mgr)) + put_device(mgr_dev); + + return mgr; } EXPORT_SYMBOL_GPL(of_fpga_mgr_get); @@ -727,11 +866,111 @@ */ void fpga_mgr_put(struct fpga_manager *mgr) { - module_put(mgr->dev.parent->driver->owner); + module_put(mgr->mops_owner); put_device(&mgr->dev); } EXPORT_SYMBOL_GPL(fpga_mgr_put); +#ifdef CONFIG_FPGA_MGR_DEBUG_FS +#include + +static int fpga_mgr_read(struct seq_file *s, void *data) +{ + struct fpga_manager *mgr = (struct fpga_manager *)s->private; + int ret = 0; + + if (!mgr->mops->read) + return -ENOENT; + + if (!mutex_trylock(&mgr->ref_mutex)) + return -EBUSY; + + if (mgr->state != FPGA_MGR_STATE_OPERATING) { + ret = -EPERM; + goto err_unlock; + } + + /* Read the FPGA configuration data from the fabric */ + ret = mgr->mops->read(mgr, s); + if (ret) + dev_err(&mgr->dev, "Error while reading configuration data from FPGA\n"); + +err_unlock: + mutex_unlock(&mgr->ref_mutex); + + return ret; +} + +static int fpga_mgr_read_open(struct inode *inode, struct file *file) +{ + return single_open(file, fpga_mgr_read, inode->i_private); +} + +static const struct file_operations fpga_mgr_ops_image = { + .owner = THIS_MODULE, + .open = fpga_mgr_read_open, + .read = seq_read, +}; +#endif + +static int fpga_dmabuf_fd_get(struct file *file, char __user *argp) +{ + struct fpga_manager *mgr = (struct fpga_manager *)(file->private_data); + int buffd; + + if (copy_from_user(&buffd, argp, sizeof(buffd))) + return -EFAULT; + + mgr->dmabuf = dma_buf_get(buffd); + if (IS_ERR_OR_NULL(mgr->dmabuf)) + return -EINVAL; + + mgr->flags = FPGA_MGR_CONFIG_DMA_BUF; + + return 0; +} + +static int fpga_device_open(struct inode *inode, struct file *file) +{ + struct miscdevice *miscdev = file->private_data; + struct fpga_manager *mgr = container_of(miscdev, + struct fpga_manager, miscdev); + + file->private_data = mgr; + + return 0; +} + +static int fpga_device_release(struct inode *inode, struct file *file) +{ + return 0; +} + +static long fpga_device_ioctl(struct file *file, unsigned int cmd, + unsigned long arg) +{ + char __user *argp = (char __user *)arg; + int err; + + switch (cmd) { + case FPGA_IOCTL_LOAD_DMA_BUFF: + err = fpga_dmabuf_fd_get(file, argp); + break; + default: + err = -ENOTTY; + } + + return err; +} + +static const struct file_operations fpga_fops = { + .owner = THIS_MODULE, + .open = fpga_device_open, + .release = fpga_device_release, + .unlocked_ioctl = fpga_device_ioctl, + .compat_ioctl = fpga_device_ioctl, +}; + /** * fpga_mgr_lock - Lock FPGA manager for exclusive use * @mgr: fpga manager @@ -766,9 +1005,10 @@ EXPORT_SYMBOL_GPL(fpga_mgr_unlock); /** - * fpga_mgr_register_full - create and register an FPGA Manager device + * __fpga_mgr_register_full - create and register an FPGA Manager device * @parent: fpga manager device from pdev * @info: parameters for fpga manager + * @owner: owner module containing the ops * * The caller of this function is responsible for calling fpga_mgr_unregister(). * Using devm_fpga_mgr_register_full() instead is recommended. @@ -776,9 +1016,13 @@ * Return: pointer to struct fpga_manager pointer or ERR_PTR() */ struct fpga_manager * -fpga_mgr_register_full(struct device *parent, const struct fpga_manager_info *info) +__fpga_mgr_register_full(struct device *parent, const struct fpga_manager_info *info, + struct module *owner) { const struct fpga_manager_ops *mops = info->mops; +#ifdef CONFIG_FPGA_MGR_DEBUG_FS + struct dentry *d, *parent_dir; +#endif struct fpga_manager *mgr; int id, ret; @@ -804,6 +1048,8 @@ mutex_init(&mgr->ref_mutex); + mgr->mops_owner = owner; + mgr->name = info->name; mgr->mops = info->mops; mgr->priv = info->priv; @@ -815,10 +1061,28 @@ mgr->dev.of_node = parent->of_node; mgr->dev.id = id; + /* Make device dma capable by inheriting from parent's */ + set_dma_ops(&mgr->dev, get_dma_ops(parent)); + ret = dma_coerce_mask_and_coherent(&mgr->dev, dma_get_mask(parent)); + if (ret) { + dev_warn(parent, + "Failed to set DMA mask %llx. Trying to continue... %x\n", + dma_get_mask(parent), ret); + } + ret = dev_set_name(&mgr->dev, "fpga%d", id); if (ret) goto error_device; + mgr->miscdev.minor = MISC_DYNAMIC_MINOR; + mgr->miscdev.name = kobject_name(&mgr->dev.kobj); + mgr->miscdev.fops = &fpga_fops; + ret = misc_register(&mgr->miscdev); + if (ret) { + pr_err("fpga: failed to register misc device.\n"); + goto error_device; + } + /* * Initialize framework state by requesting low level driver read state * from device. FPGA may be in reset mode or may have been programmed @@ -832,6 +1096,28 @@ return ERR_PTR(ret); } +#ifdef CONFIG_FPGA_MGR_DEBUG_FS + mgr->dir = debugfs_create_dir("fpga", NULL); + if (!mgr->dir) + goto error_device; + + parent_dir = mgr->dir; + d = debugfs_create_dir(mgr->dev.kobj.name, parent_dir); + if (!d) { + debugfs_remove_recursive(parent_dir); + goto error_device; + } + + parent_dir = d; + d = debugfs_create_file("image", 0644, parent_dir, mgr, + &fpga_mgr_ops_image); + if (!d) { + debugfs_remove_recursive(mgr->dir); + goto error_device; + } +#endif + dev_info(&mgr->dev, "%s registered\n", mgr->name); + return mgr; error_device: @@ -841,14 +1127,15 @@ return ERR_PTR(ret); } -EXPORT_SYMBOL_GPL(fpga_mgr_register_full); +EXPORT_SYMBOL_GPL(__fpga_mgr_register_full); /** - * fpga_mgr_register - create and register an FPGA Manager device + * __fpga_mgr_register - create and register an FPGA Manager device * @parent: fpga manager device from pdev * @name: fpga manager name * @mops: pointer to structure of fpga manager ops * @priv: fpga manager private data + * @owner: owner module containing the ops * * The caller of this function is responsible for calling fpga_mgr_unregister(). * Using devm_fpga_mgr_register() instead is recommended. This simple @@ -859,8 +1146,8 @@ * Return: pointer to struct fpga_manager pointer or ERR_PTR() */ struct fpga_manager * -fpga_mgr_register(struct device *parent, const char *name, - const struct fpga_manager_ops *mops, void *priv) +__fpga_mgr_register(struct device *parent, const char *name, + const struct fpga_manager_ops *mops, void *priv, struct module *owner) { struct fpga_manager_info info = { 0 }; @@ -868,9 +1155,9 @@ info.mops = mops; info.priv = priv; - return fpga_mgr_register_full(parent, &info); + return __fpga_mgr_register_full(parent, &info, owner); } -EXPORT_SYMBOL_GPL(fpga_mgr_register); +EXPORT_SYMBOL_GPL(__fpga_mgr_register); /** * fpga_mgr_unregister - unregister an FPGA manager @@ -882,6 +1169,10 @@ { dev_info(&mgr->dev, "%s %s\n", __func__, mgr->name); +#ifdef CONFIG_FPGA_MGR_DEBUG_FS + debugfs_remove_recursive(mgr->dir); +#endif + /* * If the low level driver provides a method for putting fpga into * a desired state upon unregister, do it. @@ -900,9 +1191,10 @@ } /** - * devm_fpga_mgr_register_full - resource managed variant of fpga_mgr_register() + * __devm_fpga_mgr_register_full - resource managed variant of fpga_mgr_register() * @parent: fpga manager device from pdev * @info: parameters for fpga manager + * @owner: owner module containing the ops * * Return: fpga manager pointer on success, negative error code otherwise. * @@ -910,7 +1202,8 @@ * function will be called automatically when the managing device is detached. */ struct fpga_manager * -devm_fpga_mgr_register_full(struct device *parent, const struct fpga_manager_info *info) +__devm_fpga_mgr_register_full(struct device *parent, const struct fpga_manager_info *info, + struct module *owner) { struct fpga_mgr_devres *dr; struct fpga_manager *mgr; @@ -919,7 +1212,7 @@ if (!dr) return ERR_PTR(-ENOMEM); - mgr = fpga_mgr_register_full(parent, info); + mgr = __fpga_mgr_register_full(parent, info, owner); if (IS_ERR(mgr)) { devres_free(dr); return mgr; @@ -930,14 +1223,15 @@ return mgr; } -EXPORT_SYMBOL_GPL(devm_fpga_mgr_register_full); +EXPORT_SYMBOL_GPL(__devm_fpga_mgr_register_full); /** - * devm_fpga_mgr_register - resource managed variant of fpga_mgr_register() + * __devm_fpga_mgr_register - resource managed variant of fpga_mgr_register() * @parent: fpga manager device from pdev * @name: fpga manager name * @mops: pointer to structure of fpga manager ops * @priv: fpga manager private data + * @owner: owner module containing the ops * * Return: fpga manager pointer on success, negative error code otherwise. * @@ -946,8 +1240,9 @@ * device is detached. */ struct fpga_manager * -devm_fpga_mgr_register(struct device *parent, const char *name, - const struct fpga_manager_ops *mops, void *priv) +__devm_fpga_mgr_register(struct device *parent, const char *name, + const struct fpga_manager_ops *mops, void *priv, + struct module *owner) { struct fpga_manager_info info = { 0 }; @@ -955,9 +1250,9 @@ info.mops = mops; info.priv = priv; - return devm_fpga_mgr_register_full(parent, &info); + return __devm_fpga_mgr_register_full(parent, &info, owner); } -EXPORT_SYMBOL_GPL(devm_fpga_mgr_register); +EXPORT_SYMBOL_GPL(__devm_fpga_mgr_register); static void fpga_mgr_dev_release(struct device *dev) { --- linux-xilinx-6.8.0.orig/drivers/fpga/fpga-region.c +++ linux-xilinx-6.8.0/drivers/fpga/fpga-region.c @@ -53,7 +53,7 @@ } get_device(dev); - if (!try_module_get(dev->parent->driver->owner)) { + if (!try_module_get(region->ops_owner)) { put_device(dev); mutex_unlock(®ion->mutex); return ERR_PTR(-ENODEV); @@ -75,7 +75,7 @@ dev_dbg(dev, "put\n"); - module_put(dev->parent->driver->owner); + module_put(region->ops_owner); put_device(dev); mutex_unlock(®ion->mutex); } @@ -181,14 +181,16 @@ ATTRIBUTE_GROUPS(fpga_region); /** - * fpga_region_register_full - create and register an FPGA Region device + * __fpga_region_register_full - create and register an FPGA Region device * @parent: device parent * @info: parameters for FPGA Region + * @owner: module containing the get_bridges function * * Return: struct fpga_region or ERR_PTR() */ struct fpga_region * -fpga_region_register_full(struct device *parent, const struct fpga_region_info *info) +__fpga_region_register_full(struct device *parent, const struct fpga_region_info *info, + struct module *owner) { struct fpga_region *region; int id, ret = 0; @@ -213,6 +215,7 @@ region->compat_id = info->compat_id; region->priv = info->priv; region->get_bridges = info->get_bridges; + region->ops_owner = owner; mutex_init(®ion->mutex); INIT_LIST_HEAD(®ion->bridge_list); @@ -241,13 +244,14 @@ return ERR_PTR(ret); } -EXPORT_SYMBOL_GPL(fpga_region_register_full); +EXPORT_SYMBOL_GPL(__fpga_region_register_full); /** - * fpga_region_register - create and register an FPGA Region device + * __fpga_region_register - create and register an FPGA Region device * @parent: device parent * @mgr: manager that programs this region * @get_bridges: optional function to get bridges to a list + * @owner: module containing the get_bridges function * * This simple version of the register function should be sufficient for most users. * The fpga_region_register_full() function is available for users that need to @@ -256,17 +260,17 @@ * Return: struct fpga_region or ERR_PTR() */ struct fpga_region * -fpga_region_register(struct device *parent, struct fpga_manager *mgr, - int (*get_bridges)(struct fpga_region *)) +__fpga_region_register(struct device *parent, struct fpga_manager *mgr, + int (*get_bridges)(struct fpga_region *), struct module *owner) { struct fpga_region_info info = { 0 }; info.mgr = mgr; info.get_bridges = get_bridges; - return fpga_region_register_full(parent, &info); + return __fpga_region_register_full(parent, &info, owner); } -EXPORT_SYMBOL_GPL(fpga_region_register); +EXPORT_SYMBOL_GPL(__fpga_region_register); /** * fpga_region_unregister - unregister an FPGA region --- linux-xilinx-6.8.0.orig/drivers/fpga/of-fpga-region.c +++ linux-xilinx-6.8.0/drivers/fpga/of-fpga-region.c @@ -230,6 +230,16 @@ if (of_property_read_bool(overlay, "encrypted-fpga-config")) info->flags |= FPGA_MGR_ENCRYPTED_BITSTREAM; + if (of_property_read_bool(overlay, "userkey-encrypted-fpga-config")) + info->flags |= FPGA_MGR_USERKEY_ENCRYPTED_BITSTREAM; + + if (of_property_read_bool(overlay, "ddrmem-authenticated-fpga-config")) + info->flags |= FPGA_MGR_DDR_MEM_AUTH_BITSTREAM; + + if (of_property_read_bool(overlay, + "securemem-authenticated-fpga-config")) + info->flags |= FPGA_MGR_SECURE_MEM_AUTH_BITSTREAM; + if (!of_property_read_string(overlay, "firmware-name", &firmware_name)) { info->firmware_name = devm_kstrdup(dev, firmware_name, --- linux-xilinx-6.8.0.orig/drivers/fpga/versal-fpga.c +++ linux-xilinx-6.8.0/drivers/fpga/versal-fpga.c @@ -19,6 +19,18 @@ return 0; } +static int versal_fpga_ops_write_sg(struct fpga_manager *mgr, + struct sg_table *sgt) +{ + dma_addr_t dma_addr; + int ret; + + dma_addr = sg_dma_address(sgt->sgl); + ret = zynqmp_pm_load_pdi(PDI_SRC_DDR, dma_addr); + + return ret; +} + static int versal_fpga_ops_write(struct fpga_manager *mgr, const char *buf, size_t size) { @@ -40,6 +52,7 @@ static const struct fpga_manager_ops versal_fpga_ops = { .write_init = versal_fpga_ops_write_init, .write = versal_fpga_ops_write, + .write_sg = versal_fpga_ops_write_sg, }; static int versal_fpga_probe(struct platform_device *pdev) --- linux-xilinx-6.8.0.orig/drivers/fpga/xilinx-afi.c +++ linux-xilinx-6.8.0/drivers/fpga/xilinx-afi.c @@ -0,0 +1,96 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx FPGA AFI bridge. + * Copyright (c) 2018 Xilinx Inc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +/** + * struct afi_fpga - AFI register description + * @value: value to be written to the register + * @regid: Register id for the register to be written + * @resets: Pointer to the reset control for ps-pl resets. + */ +struct afi_fpga { + u32 value; + u32 regid; + struct reset_control *resets; +}; + +static int afi_fpga_probe(struct platform_device *pdev) +{ + struct afi_fpga *afi_fpga; + struct device_node *np = pdev->dev.of_node; + int ret; + int i, entries, pairs; + u32 reg, val; + + afi_fpga = devm_kzalloc(&pdev->dev, sizeof(*afi_fpga), GFP_KERNEL); + if (!afi_fpga) + return -ENOMEM; + platform_set_drvdata(pdev, afi_fpga); + + /* Reset PL */ + afi_fpga->resets = devm_reset_control_array_get_optional_exclusive(&pdev->dev); + if (IS_ERR(afi_fpga->resets)) + return PTR_ERR(afi_fpga->resets); + + entries = of_property_count_u32_elems(np, "config-afi"); + if (!entries || (entries % 2)) { + dev_err(&pdev->dev, "Invalid number of registers\n"); + return -EINVAL; + } + pairs = entries / 2; + + for (i = 0; i < pairs; i++) { + ret = of_property_read_u32_index(np, "config-afi", i * 2, + ®); + if (ret) { + dev_err(&pdev->dev, "failed to read register\n"); + return -EINVAL; + } + ret = of_property_read_u32_index(np, "config-afi", i * 2 + 1, + &val); + if (ret) { + dev_err(&pdev->dev, "failed to read value\n"); + return -EINVAL; + } + ret = zynqmp_pm_afi(reg, val); + if (ret < 0) { + dev_err(&pdev->dev, "AFI register write error %d\n", + ret); + return ret; + } + } + + reset_control_reset(afi_fpga->resets); + + return 0; +} + +static const struct of_device_id afi_fpga_ids[] = { + { .compatible = "xlnx,afi-fpga" }, + { }, +}; +MODULE_DEVICE_TABLE(of, afi_fpga_ids); + +static struct platform_driver afi_fpga_driver = { + .driver = { + .name = "afi-fpga", + .of_match_table = afi_fpga_ids, + }, + .probe = afi_fpga_probe, +}; +module_platform_driver(afi_fpga_driver); + +MODULE_DESCRIPTION("FPGA afi module"); +MODULE_AUTHOR("Shubhrajyoti Datta "); +MODULE_LICENSE("GPL"); --- linux-xilinx-6.8.0.orig/drivers/fpga/zynq-afi.c +++ linux-xilinx-6.8.0/drivers/fpga/zynq-afi.c @@ -0,0 +1,81 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx FPGA AFI driver. + * Copyright (c) 2018 Xilinx Inc. + */ + +#include +#include +#include +#include +#include + +/* Registers and special values for doing register-based operations */ +#define AFI_RDCHAN_CTRL_OFFSET 0x00 +#define AFI_WRCHAN_CTRL_OFFSET 0x14 + +#define AFI_BUSWIDTH_MASK 0x01 + +/** + * struct afi_fpga - AFI register description + * @membase: pointer to register struct + * @afi_width: AFI bus width to be written + */ +struct zynq_afi_fpga { + void __iomem *membase; + u32 afi_width; +}; + +static int zynq_afi_fpga_probe(struct platform_device *pdev) +{ + struct zynq_afi_fpga *afi_fpga; + struct resource *res; + u32 reg_val; + u32 val; + + afi_fpga = devm_kzalloc(&pdev->dev, sizeof(*afi_fpga), GFP_KERNEL); + if (!afi_fpga) + return -ENOMEM; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + afi_fpga->membase = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(afi_fpga->membase)) + return PTR_ERR(afi_fpga->membase); + + val = device_property_read_u32(&pdev->dev, "xlnx,afi-width", + &afi_fpga->afi_width); + if (val) { + dev_err(&pdev->dev, "Fail to get the afi bus width\n"); + return -EINVAL; + } + + reg_val = readl(afi_fpga->membase + AFI_RDCHAN_CTRL_OFFSET); + reg_val &= ~AFI_BUSWIDTH_MASK; + writel(reg_val | afi_fpga->afi_width, + afi_fpga->membase + AFI_RDCHAN_CTRL_OFFSET); + reg_val = readl(afi_fpga->membase + AFI_WRCHAN_CTRL_OFFSET); + reg_val &= ~AFI_BUSWIDTH_MASK; + writel(reg_val | afi_fpga->afi_width, + afi_fpga->membase + AFI_WRCHAN_CTRL_OFFSET); + + return 0; +} + +static const struct of_device_id zynq_afi_fpga_ids[] = { + { .compatible = "xlnx,zynq-afi-fpga" }, + { }, +}; +MODULE_DEVICE_TABLE(of, zynq_afi_fpga_ids); + +static struct platform_driver zynq_afi_fpga_driver = { + .driver = { + .name = "zynq-afi-fpga", + .of_match_table = zynq_afi_fpga_ids, + }, + .probe = zynq_afi_fpga_probe, +}; +module_platform_driver(zynq_afi_fpga_driver); + +MODULE_DESCRIPTION("ZYNQ FPGA AFI module"); +MODULE_AUTHOR("Nava kishore Manne "); +MODULE_LICENSE("GPL"); --- linux-xilinx-6.8.0.orig/drivers/fpga/zynqmp-fpga.c +++ linux-xilinx-6.8.0/drivers/fpga/zynqmp-fpga.c @@ -9,20 +9,85 @@ #include #include #include +#include #include #include /* Constant Definitions */ #define IXR_FPGA_DONE_MASK BIT(3) +#define READ_DMA_SIZE 0x200 +#define DUMMY_FRAMES_SIZE 0x64 +#define DUMMY_PAD_BYTE 0xFF +#define FPGA_WORD_SIZE 4 + +#define XILINX_ZYNQMP_PM_FPGA_READ_BACK BIT(6) +#define XILINX_ZYNQMP_PM_FPGA_REG_READ_BACK BIT(7) + +#define DEFAULT_FEATURE_LIST (XILINX_ZYNQMP_PM_FPGA_FULL | \ + XILINX_ZYNQMP_PM_FPGA_PARTIAL | \ + XILINX_ZYNQMP_PM_FPGA_AUTHENTICATION_DDR | \ + XILINX_ZYNQMP_PM_FPGA_AUTHENTICATION_OCM | \ + XILINX_ZYNQMP_PM_FPGA_ENCRYPTION_USERKEY | \ + XILINX_ZYNQMP_PM_FPGA_ENCRYPTION_DEVKEY | \ + XILINX_ZYNQMP_PM_FPGA_READ_BACK | \ + XILINX_ZYNQMP_PM_FPGA_REG_READ_BACK) + +static bool readback_type; +module_param(readback_type, bool, 0644); +MODULE_PARM_DESC(readback_type, + "readback_type 0-configuration register read " + "1- configuration data read (default: 0)"); + +/** + * struct zynqmp_configreg - Configuration register offsets + * @reg: Name of the configuration register. + * @offset: Register offset. + */ +struct zynqmp_configreg { + char *reg; + u32 offset; +}; + +static struct zynqmp_configreg cfgreg[] = { + {.reg = "CRC", .offset = 0}, + {.reg = "FAR", .offset = 1}, + {.reg = "FDRI", .offset = 2}, + {.reg = "FDRO", .offset = 3}, + {.reg = "CMD", .offset = 4}, + {.reg = "CTRL0", .offset = 5}, + {.reg = "MASK", .offset = 6}, + {.reg = "STAT", .offset = 7}, + {.reg = "LOUT", .offset = 8}, + {.reg = "COR0", .offset = 9}, + {.reg = "MFWR", .offset = 10}, + {.reg = "CBC", .offset = 11}, + {.reg = "IDCODE", .offset = 12}, + {.reg = "AXSS", .offset = 13}, + {.reg = "COR1", .offset = 14}, + {.reg = "WBSTR", .offset = 16}, + {.reg = "TIMER", .offset = 17}, + {.reg = "BOOTSTS", .offset = 22}, + {.reg = "CTRL1", .offset = 24}, + {} +}; + /** * struct zynqmp_fpga_priv - Private data structure * @dev: Device data structure + * @feature_list: Firmware supported feature list + * @version: Firmware version info. The higher 16 bytes belong to + * the major version number and the lower 16 bytes belong + * to a minor version number. * @flags: flags which is used to identify the bitfile type + * @size: Size of the Bit-stream used for readback */ struct zynqmp_fpga_priv { struct device *dev; + u32 feature_list; + u32 version; u32 flags; + u32 size; }; static int zynqmp_fpga_ops_write_init(struct fpga_manager *mgr, @@ -30,10 +95,27 @@ const char *buf, size_t size) { struct zynqmp_fpga_priv *priv; + int eemi_flags = 0; priv = mgr->priv; priv->flags = info->flags; + /* Update firmware flags */ + if (priv->flags & FPGA_MGR_USERKEY_ENCRYPTED_BITSTREAM) + eemi_flags |= XILINX_ZYNQMP_PM_FPGA_ENCRYPTION_USERKEY; + else if (priv->flags & FPGA_MGR_ENCRYPTED_BITSTREAM) + eemi_flags |= XILINX_ZYNQMP_PM_FPGA_ENCRYPTION_DEVKEY; + if (priv->flags & FPGA_MGR_DDR_MEM_AUTH_BITSTREAM) + eemi_flags |= XILINX_ZYNQMP_PM_FPGA_AUTHENTICATION_DDR; + else if (priv->flags & FPGA_MGR_SECURE_MEM_AUTH_BITSTREAM) + eemi_flags |= XILINX_ZYNQMP_PM_FPGA_AUTHENTICATION_OCM; + if (priv->flags & FPGA_MGR_PARTIAL_RECONFIG) + eemi_flags |= XILINX_ZYNQMP_PM_FPGA_PARTIAL; + + /* Validate user flgas with firmware feature list */ + if ((priv->feature_list & eemi_flags) != eemi_flags) + return -EINVAL; + return 0; } @@ -41,27 +123,116 @@ const char *buf, size_t size) { struct zynqmp_fpga_priv *priv; + int word_align, ret, index; dma_addr_t dma_addr; u32 eemi_flags = 0; + size_t dma_size; char *kbuf; - int ret; priv = mgr->priv; + word_align = size % FPGA_WORD_SIZE; + if (word_align) + word_align = FPGA_WORD_SIZE - word_align; + + size = size + word_align; + priv->size = size; + + if (priv->flags & FPGA_MGR_USERKEY_ENCRYPTED_BITSTREAM) + dma_size = size + ENCRYPTED_KEY_LEN; + else + dma_size = size; - kbuf = dma_alloc_coherent(priv->dev, size, &dma_addr, GFP_KERNEL); + kbuf = dma_alloc_coherent(priv->dev, dma_size, &dma_addr, GFP_KERNEL); if (!kbuf) return -ENOMEM; - memcpy(kbuf, buf, size); + for (index = 0; index < word_align; index++) + kbuf[index] = DUMMY_PAD_BYTE; + + memcpy(&kbuf[index], buf, size - index); + + if (priv->flags & FPGA_MGR_USERKEY_ENCRYPTED_BITSTREAM) { + eemi_flags |= XILINX_ZYNQMP_PM_FPGA_ENCRYPTION_USERKEY; + memcpy(kbuf + size, mgr->key, ENCRYPTED_KEY_LEN); + } else if (priv->flags & FPGA_MGR_ENCRYPTED_BITSTREAM) { + eemi_flags |= XILINX_ZYNQMP_PM_FPGA_ENCRYPTION_DEVKEY; + } wmb(); /* ensure all writes are done before initiate FW call */ + if (priv->flags & FPGA_MGR_DDR_MEM_AUTH_BITSTREAM) + eemi_flags |= XILINX_ZYNQMP_PM_FPGA_AUTHENTICATION_DDR; + else if (priv->flags & FPGA_MGR_SECURE_MEM_AUTH_BITSTREAM) + eemi_flags |= XILINX_ZYNQMP_PM_FPGA_AUTHENTICATION_OCM; + if (priv->flags & FPGA_MGR_PARTIAL_RECONFIG) eemi_flags |= XILINX_ZYNQMP_PM_FPGA_PARTIAL; - ret = zynqmp_pm_fpga_load(dma_addr, size, eemi_flags); + if (priv->flags & FPGA_MGR_USERKEY_ENCRYPTED_BITSTREAM) + ret = zynqmp_pm_fpga_load(dma_addr, dma_addr + size, + eemi_flags); + else + ret = zynqmp_pm_fpga_load(dma_addr, size, eemi_flags); + + dma_free_coherent(priv->dev, dma_size, kbuf, dma_addr); + + return ret; +} + +static unsigned long zynqmp_fpga_get_contiguous_size(struct sg_table *sgt) +{ + dma_addr_t expected = sg_dma_address(sgt->sgl); + unsigned long size = 0; + struct scatterlist *s; + unsigned int i; + + for_each_sg(sgt->sgl, s, sgt->nents, i) { + if (sg_dma_address(s) != expected) + break; + expected = sg_dma_address(s) + sg_dma_len(s); + size += sg_dma_len(s); + } + + return size; +} + +static int zynqmp_fpga_ops_write_sg(struct fpga_manager *mgr, + struct sg_table *sgt) +{ + dma_addr_t dma_addr, key_addr = 0; + struct zynqmp_fpga_priv *priv; + unsigned long contig_size; + u32 eemi_flags = 0; + char *kbuf; + int ret; + + priv = mgr->priv; - dma_free_coherent(priv->dev, size, kbuf, dma_addr); + dma_addr = sg_dma_address(sgt->sgl); + contig_size = zynqmp_fpga_get_contiguous_size(sgt); + + if (priv->flags & FPGA_MGR_PARTIAL_RECONFIG) + eemi_flags |= XILINX_ZYNQMP_PM_FPGA_PARTIAL; + if (priv->flags & FPGA_MGR_USERKEY_ENCRYPTED_BITSTREAM) + eemi_flags |= XILINX_ZYNQMP_PM_FPGA_ENCRYPTION_USERKEY; + else if (priv->flags & FPGA_MGR_ENCRYPTED_BITSTREAM) + eemi_flags |= XILINX_ZYNQMP_PM_FPGA_ENCRYPTION_DEVKEY; + if (priv->flags & FPGA_MGR_DDR_MEM_AUTH_BITSTREAM) + eemi_flags |= XILINX_ZYNQMP_PM_FPGA_AUTHENTICATION_DDR; + else if (priv->flags & FPGA_MGR_SECURE_MEM_AUTH_BITSTREAM) + eemi_flags |= XILINX_ZYNQMP_PM_FPGA_AUTHENTICATION_OCM; + + if (priv->flags & FPGA_MGR_USERKEY_ENCRYPTED_BITSTREAM) { + kbuf = dma_alloc_coherent(priv->dev, ENCRYPTED_KEY_LEN, + &key_addr, GFP_KERNEL); + if (!kbuf) + return -ENOMEM; + memcpy(kbuf, mgr->key, ENCRYPTED_KEY_LEN); + ret = zynqmp_pm_fpga_load(dma_addr, key_addr, eemi_flags); + dma_free_coherent(priv->dev, ENCRYPTED_KEY_LEN, kbuf, key_addr); + } else { + ret = zynqmp_pm_fpga_load(dma_addr, contig_size, eemi_flags); + } return ret; } @@ -97,10 +268,98 @@ }; ATTRIBUTE_GROUPS(zynqmp_fpga); +static int zynqmp_fpga_read_cfgreg(struct fpga_manager *mgr, + struct seq_file *s) +{ + int ret = 0; + u32 val; + unsigned int *buf; + dma_addr_t dma_addr = 0; + struct zynqmp_fpga_priv *priv; + struct zynqmp_configreg *p = cfgreg; + + priv = mgr->priv; + + if (!(priv->feature_list & XILINX_ZYNQMP_PM_FPGA_READ_BACK)) + return -EINVAL; + + buf = dma_alloc_coherent(mgr->dev.parent, READ_DMA_SIZE, + &dma_addr, GFP_KERNEL); + if (!buf) + return -ENOMEM; + + seq_puts(s, "zynqMP FPGA Configuration register contents are\n"); + + while (p->reg) { + ret = zynqmp_pm_fpga_read(p->offset, dma_addr, readback_type, + &val); + if (ret) + goto free_dmabuf; + seq_printf(s, "%s --> \t %x \t\r\n", p->reg, val); + p++; + } + +free_dmabuf: + dma_free_coherent(mgr->dev.parent, READ_DMA_SIZE, buf, + dma_addr); + + return ret; +} + +static int zynqmp_fpga_read_cfgdata(struct fpga_manager *mgr, + struct seq_file *s) +{ + struct zynqmp_fpga_priv *priv; + int ret; + u32 data_offset; + unsigned int *buf; + dma_addr_t dma_addr = 0; + size_t size; + + priv = mgr->priv; + + if (!(priv->feature_list & XILINX_ZYNQMP_PM_FPGA_REG_READ_BACK)) + return -EINVAL; + + size = priv->size + READ_DMA_SIZE + DUMMY_FRAMES_SIZE; + + buf = dma_alloc_coherent(mgr->dev.parent, size, &dma_addr, + GFP_KERNEL); + if (!buf) + return -ENOMEM; + + seq_puts(s, "zynqMP FPGA Configuration data contents are\n"); + ret = zynqmp_pm_fpga_read((priv->size + DUMMY_FRAMES_SIZE) / 4, + dma_addr, readback_type, &data_offset); + if (ret) + goto free_dmabuf; + + seq_write(s, &buf[data_offset], priv->size); + +free_dmabuf: + dma_free_coherent(mgr->dev.parent, size, buf, dma_addr); + + return ret; +} + +static int zynqmp_fpga_ops_read(struct fpga_manager *mgr, struct seq_file *s) +{ + int ret; + + if (readback_type) + ret = zynqmp_fpga_read_cfgdata(mgr, s); + else + ret = zynqmp_fpga_read_cfgreg(mgr, s); + + return ret; +} + static const struct fpga_manager_ops zynqmp_fpga_ops = { .state = zynqmp_fpga_ops_state, .write_init = zynqmp_fpga_ops_write_init, .write = zynqmp_fpga_ops_write, + .write_sg = zynqmp_fpga_ops_write_sg, + .read = zynqmp_fpga_ops_read, }; static int zynqmp_fpga_probe(struct platform_device *pdev) @@ -115,6 +374,13 @@ priv->dev = dev; + if (!(zynqmp_pm_fpga_get_version(&priv->version))) { + if (zynqmp_pm_fpga_get_feature_list(&priv->feature_list)) + priv->feature_list = DEFAULT_FEATURE_LIST; + } else { + priv->feature_list = DEFAULT_FEATURE_LIST; + } + mgr = devm_fpga_mgr_register(dev, "Xilinx ZynqMP FPGA Manager", &zynqmp_fpga_ops, priv); return PTR_ERR_OR_ZERO(mgr); --- linux-xilinx-6.8.0.orig/drivers/gpio/Kconfig +++ linux-xilinx-6.8.0/drivers/gpio/Kconfig @@ -711,7 +711,8 @@ Say yes here to support UniPhier GPIOs. config GPIO_VF610 - def_bool y + bool "VF610 GPIO support" + default y if SOC_VF610 depends on ARCH_MXC select GPIOLIB_IRQCHIP help @@ -1526,7 +1527,7 @@ are "output only" GPIOs. config GPIO_TQMX86 - tristate "TQ-Systems QTMX86 GPIO" + tristate "TQ-Systems TQMx86 GPIO" depends on MFD_TQMX86 || COMPILE_TEST depends on HAS_IOPORT_MAP select GPIOLIB_IRQCHIP @@ -1586,6 +1587,18 @@ menu "PCI GPIO expanders" depends on PCI +config GPIO_AAEON + tristate "AAEON GPIO support" + depends on ASUS_WMI + depends on UBUNTU_ODM_DRIVERS + select MFD_AAEON + help + Say yes here to support GPIO pins on Single Board Computers produced + by AAEON. + + This driver leverages the ASUS WMI interface to access device + resources. + config GPIO_AMD8111 tristate "AMD 8111 GPIO driver" depends on X86 || COMPILE_TEST @@ -1793,6 +1806,8 @@ config GPIO_AGGREGATOR tristate "GPIO Aggregator" + select CONFIGFS_FS + select DEV_SYNC_PROBE help Say yes here to enable the GPIO Aggregator, which provides a way to aggregate existing GPIO lines into a new virtual GPIO chip. @@ -1842,3 +1857,6 @@ endmenu endif + +config DEV_SYNC_PROBE + tristate --- linux-xilinx-6.8.0.orig/drivers/gpio/Makefile +++ linux-xilinx-6.8.0/drivers/gpio/Makefile @@ -19,11 +19,15 @@ # directly supported by gpio-generic gpio-generic-$(CONFIG_GPIO_GENERIC) += gpio-mmio.o +# Utilities for drivers that need synchronous fake device creation +obj-$(CONFIG_DEV_SYNC_PROBE) += dev-sync-probe.o + obj-$(CONFIG_GPIO_104_DIO_48E) += gpio-104-dio-48e.o obj-$(CONFIG_GPIO_104_IDI_48) += gpio-104-idi-48.o obj-$(CONFIG_GPIO_104_IDIO_16) += gpio-104-idio-16.o obj-$(CONFIG_GPIO_74X164) += gpio-74x164.o obj-$(CONFIG_GPIO_74XX_MMIO) += gpio-74xx-mmio.o +obj-$(CONFIG_GPIO_AAEON) += gpio-aaeon.o obj-$(CONFIG_GPIO_ADNP) += gpio-adnp.o obj-$(CONFIG_GPIO_ADP5520) += gpio-adp5520.o obj-$(CONFIG_GPIO_AGGREGATOR) += gpio-aggregator.o --- linux-xilinx-6.8.0.orig/drivers/gpio/dev-sync-probe.c +++ linux-xilinx-6.8.0/drivers/gpio/dev-sync-probe.c @@ -0,0 +1,97 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Common code for drivers creating fake platform devices. + * + * Provides synchronous device creation: waits for probe completion and + * returns the probe success or error status to the device creator. + * + * Copyright (C) 2021 Bartosz Golaszewski + * Copyright (C) 2025 Koichiro Den + */ + +#include +#include + +#include "dev-sync-probe.h" + +static int dev_sync_probe_notifier_call(struct notifier_block *nb, + unsigned long action, void *data) +{ + struct dev_sync_probe_data *pdata; + struct device *dev = data; + + pdata = container_of(nb, struct dev_sync_probe_data, bus_notifier); + if (!device_match_name(dev, pdata->name)) + return NOTIFY_DONE; + + switch (action) { + case BUS_NOTIFY_BOUND_DRIVER: + pdata->driver_bound = true; + break; + case BUS_NOTIFY_DRIVER_NOT_BOUND: + pdata->driver_bound = false; + break; + default: + return NOTIFY_DONE; + } + + complete(&pdata->probe_completion); + return NOTIFY_OK; +} + +void dev_sync_probe_init(struct dev_sync_probe_data *data) +{ + memset(data, 0, sizeof(*data)); + init_completion(&data->probe_completion); + data->bus_notifier.notifier_call = dev_sync_probe_notifier_call; +} +EXPORT_SYMBOL_GPL(dev_sync_probe_init); + +int dev_sync_probe_register(struct dev_sync_probe_data *data, + struct platform_device_info *pdevinfo) +{ + struct platform_device *pdev; + char *name; + + name = kasprintf(GFP_KERNEL, "%s.%d", pdevinfo->name, pdevinfo->id); + if (!name) + return -ENOMEM; + + data->driver_bound = false; + data->name = name; + reinit_completion(&data->probe_completion); + bus_register_notifier(&platform_bus_type, &data->bus_notifier); + + pdev = platform_device_register_full(pdevinfo); + if (IS_ERR(pdev)) { + bus_unregister_notifier(&platform_bus_type, &data->bus_notifier); + kfree(data->name); + return PTR_ERR(pdev); + } + + wait_for_completion(&data->probe_completion); + bus_unregister_notifier(&platform_bus_type, &data->bus_notifier); + + if (!data->driver_bound) { + platform_device_unregister(pdev); + kfree(data->name); + return -ENXIO; + } + + data->pdev = pdev; + return 0; +} +EXPORT_SYMBOL_GPL(dev_sync_probe_register); + +void dev_sync_probe_unregister(struct dev_sync_probe_data *data) +{ + platform_device_unregister(data->pdev); + kfree(data->name); + data->pdev = NULL; +} +EXPORT_SYMBOL_GPL(dev_sync_probe_unregister); + +MODULE_AUTHOR("Bartosz Golaszewski"); +MODULE_AUTHOR("Koichiro Den"); +MODULE_DESCRIPTION("Utilities for synchronous fake device creation"); +MODULE_LICENSE("GPL"); --- linux-xilinx-6.8.0.orig/drivers/gpio/dev-sync-probe.h +++ linux-xilinx-6.8.0/drivers/gpio/dev-sync-probe.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef DEV_SYNC_PROBE_H +#define DEV_SYNC_PROBE_H + +#include +#include +#include + +struct dev_sync_probe_data { + struct platform_device *pdev; + const char *name; + + /* Synchronize with probe */ + struct notifier_block bus_notifier; + struct completion probe_completion; + bool driver_bound; +}; + +void dev_sync_probe_init(struct dev_sync_probe_data *data); +int dev_sync_probe_register(struct dev_sync_probe_data *data, + struct platform_device_info *pdevinfo); +void dev_sync_probe_unregister(struct dev_sync_probe_data *data); + +#endif /* DEV_SYNC_PROBE_H */ --- linux-xilinx-6.8.0.orig/drivers/gpio/gpio-aaeon.c +++ linux-xilinx-6.8.0/drivers/gpio/gpio-aaeon.c @@ -0,0 +1,205 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * AAEON GPIO driver + * Copyright (c) 2021, AAEON Ltd. + * + * Author: Edward Lin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRVNAME "gpio_aaeon" +#define ASUS_NB_WMI_EVENT_GUID "0B3CBB35-E3C2-45ED-91C2-4C5A6D195D1C" +#define AAEON_WMI_MGMT_GUID "97845ED0-4E6D-11DE-8A39-0800200C9A66" + +#define GET_GPIO_NUMBER_ID 0x00010000 +#define GET_LEVEL_METHOD_ID 0x00010001 +#define SET_LEVEL_METHOD_ID 0x00010002 +#define GET_DIRECTION_METHOD_ID 0x00010003 +#define SET_DIRECTION_METHOD_ID 0x00010004 +#define GET_SIO_NUMBER_METHOD_ID 0xF0010 + +struct aaeon_gpio_bank { + struct gpio_chip chip; + unsigned int regbase; + struct aaeon_gpio_data *data; +}; + +struct aaeon_gpio_data { + int nr_bank; + struct aaeon_gpio_bank *bank; +}; + +static int aaeon_gpio_get_number(void); +static int aaeon_gpio_get_direction(struct gpio_chip *chip, + unsigned int offset); +static int aaeon_gpio_output_set_direction(struct gpio_chip *chip, + unsigned int offset, int value); +static int aaeon_gpio_input_set_direction(struct gpio_chip *chip, + unsigned int offset); +static int aaeon_gpio_get(struct gpio_chip *chip, + unsigned int offset); +static void aaeon_gpio_set(struct gpio_chip *chip, unsigned int offset, + int value); + +#define AAEON_GPIO_BANK(_base, _ngpio, _regbase) \ +{ \ + .chip = { \ + .label = DRVNAME, \ + .owner = THIS_MODULE, \ + .get_direction = aaeon_gpio_get_direction, \ + .direction_input = aaeon_gpio_input_set_direction, \ + .direction_output = aaeon_gpio_output_set_direction, \ + .get = aaeon_gpio_get, \ + .set = aaeon_gpio_set, \ + .base = _base, \ + .ngpio = _ngpio, \ + .can_sleep = true, \ + }, \ + .regbase = _regbase, \ +} + +static struct aaeon_gpio_bank aaeon_gpio_bank[] = { + AAEON_GPIO_BANK(0, 0, 0xF0), +}; + +static int aaeon_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) +{ + int err, retval; + u32 dev_id = 0x0; + + dev_id |= offset; + err = asus_wmi_evaluate_method(GET_DIRECTION_METHOD_ID, dev_id, + 0, &retval); + if (err) + return err; + + return retval; +} + +static int aaeon_gpio_input_set_direction(struct gpio_chip *chip, + unsigned int offset) +{ + int err, retval; + u32 dev_id; + + dev_id = BIT(16) | offset; + err = asus_wmi_evaluate_method(SET_DIRECTION_METHOD_ID, dev_id, + 0, &retval); + if (err) + return err; + + return retval; +} + +static int aaeon_gpio_output_set_direction(struct gpio_chip *chip, + unsigned int offset, int value) +{ + int err, retval; + u32 dev_id = 0x0; + + dev_id |= offset; + err = asus_wmi_evaluate_method(SET_DIRECTION_METHOD_ID, dev_id, + 0, &retval); + if (err) + return err; + + return retval; +} + +static int aaeon_gpio_get(struct gpio_chip *chip, unsigned int offset) +{ + int err, retval; + u32 dev_id = 0x0; + + dev_id |= offset; + err = asus_wmi_evaluate_method(GET_LEVEL_METHOD_ID, dev_id, 0, &retval); + if (err) + return err; + + return retval; +} + +static void aaeon_gpio_set(struct gpio_chip *chip, unsigned int offset, + int value) +{ + int retval; + u32 dev_id = offset; + + if (value) + dev_id = BIT(16) | dev_id; + + asus_wmi_evaluate_method(SET_LEVEL_METHOD_ID, dev_id, 0, &retval); +} + +static int aaeon_gpio_get_number(void) +{ + int err, retval; + + err = asus_wmi_evaluate_method(GET_GPIO_NUMBER_ID, + GET_SIO_NUMBER_METHOD_ID, + 0, &retval); + if (err) + return err; + + return retval; +} + +static int __init aaeon_gpio_probe(struct platform_device *pdev) +{ + int err, i; + int dio_number = 0; + struct aaeon_gpio_data *data; + struct aaeon_gpio_bank *bank; + + /* Prevent other drivers adding this platfom device */ + if (!wmi_has_guid(AAEON_WMI_MGMT_GUID)) { + pr_debug("AAEON Management GUID not found\n"); + return -ENODEV; + } + + dio_number = aaeon_gpio_get_number(); + if (dio_number < 0) + return -ENODEV; + + data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->nr_bank = ARRAY_SIZE(aaeon_gpio_bank); + data->bank = aaeon_gpio_bank; + platform_set_drvdata(pdev, data); + bank = &data->bank[0]; + bank->chip.parent = &pdev->dev; + bank->chip.ngpio = dio_number; + bank->data = data; + err = devm_gpiochip_add_data(&pdev->dev, &bank->chip, bank); + if (err) + pr_debug("Failed to register gpiochip %d: %d\n", i, err); + + return err; +} + +static struct platform_driver aaeon_gpio_driver = { + .driver = { + .name = "gpio-aaeon", + }, +}; + +module_platform_driver_probe(aaeon_gpio_driver, aaeon_gpio_probe); + +MODULE_ALIAS("platform:gpio-aaeon"); +MODULE_DESCRIPTION("AAEON GPIO Driver"); +MODULE_AUTHOR("Edward Lin "); +MODULE_LICENSE("GPL v2"); --- linux-xilinx-6.8.0.orig/drivers/gpio/gpio-aggregator.c +++ linux-xilinx-6.8.0/drivers/gpio/gpio-aggregator.c @@ -9,10 +9,13 @@ #include #include +#include #include #include #include #include +#include +#include #include #include #include @@ -27,23 +30,88 @@ #include #include +#include "dev-sync-probe.h" + #define AGGREGATOR_MAX_GPIOS 512 +#define AGGREGATOR_LEGACY_PREFIX "_sysfs" /* * GPIO Aggregator sysfs interface */ struct gpio_aggregator { + struct dev_sync_probe_data probe_data; + struct config_group group; struct gpiod_lookup_table *lookups; - struct platform_device *pdev; + struct mutex lock; + int id; + + /* List of gpio_aggregator_line. Always added in order */ + struct list_head list_head; + + /* used by legacy sysfs interface only */ + bool init_via_sysfs; char args[]; }; +struct gpio_aggregator_line { + struct config_group group; + struct gpio_aggregator *parent; + struct list_head entry; + + /* Line index within the aggregator device */ + unsigned int idx; + + /* Custom name for the virtual line */ + const char *name; + /* GPIO chip label or line name */ + const char *key; + /* Can be negative to indicate lookup by line name */ + int offset; + + enum gpio_lookup_flags flags; +}; + +struct gpio_aggregator_pdev_meta { + bool init_via_sysfs; +}; + static DEFINE_MUTEX(gpio_aggregator_lock); /* protects idr */ static DEFINE_IDR(gpio_aggregator_idr); -static int aggr_add_gpio(struct gpio_aggregator *aggr, const char *key, - int hwnum, unsigned int *n) +static int gpio_aggregator_alloc(struct gpio_aggregator **aggr, size_t arg_size) +{ + int ret; + + struct gpio_aggregator *new __free(kfree) = kzalloc( + sizeof(*new) + arg_size, GFP_KERNEL); + if (!new) + return -ENOMEM; + + scoped_guard(mutex, &gpio_aggregator_lock) + ret = idr_alloc(&gpio_aggregator_idr, new, 0, 0, GFP_KERNEL); + + if (ret < 0) + return ret; + + new->id = ret; + INIT_LIST_HEAD(&new->list_head); + mutex_init(&new->lock); + *aggr = no_free_ptr(new); + return 0; +} + +static void gpio_aggregator_free(struct gpio_aggregator *aggr) +{ + scoped_guard(mutex, &gpio_aggregator_lock) + idr_remove(&gpio_aggregator_idr, aggr->id); + + mutex_destroy(&aggr->lock); + kfree(aggr); +} + +static int gpio_aggregator_add_gpio(struct gpio_aggregator *aggr, + const char *key, int hwnum, unsigned int *n) { struct gpiod_lookup_table *lookups; @@ -61,180 +129,101 @@ return 0; } -static int aggr_parse(struct gpio_aggregator *aggr) +static bool gpio_aggregator_is_active(struct gpio_aggregator *aggr) { - char *args = skip_spaces(aggr->args); - char *name, *offsets, *p; - unsigned long *bitmap; - unsigned int i, n = 0; - int error = 0; - - bitmap = bitmap_alloc(AGGREGATOR_MAX_GPIOS, GFP_KERNEL); - if (!bitmap) - return -ENOMEM; + lockdep_assert_held(&aggr->lock); - args = next_arg(args, &name, &p); - while (*args) { - args = next_arg(args, &offsets, &p); - - p = get_options(offsets, 0, &error); - if (error == 0 || *p) { - /* Named GPIO line */ - error = aggr_add_gpio(aggr, name, U16_MAX, &n); - if (error) - goto free_bitmap; - - name = offsets; - continue; - } - - /* GPIO chip + offset(s) */ - error = bitmap_parselist(offsets, bitmap, AGGREGATOR_MAX_GPIOS); - if (error) { - pr_err("Cannot parse %s: %d\n", offsets, error); - goto free_bitmap; - } - - for_each_set_bit(i, bitmap, AGGREGATOR_MAX_GPIOS) { - error = aggr_add_gpio(aggr, name, i, &n); - if (error) - goto free_bitmap; - } - - args = next_arg(args, &name, &p); - } - - if (!n) { - pr_err("No GPIOs specified\n"); - error = -EINVAL; - } - -free_bitmap: - bitmap_free(bitmap); - return error; + return aggr->probe_data.pdev && platform_get_drvdata(aggr->probe_data.pdev); } -static ssize_t new_device_store(struct device_driver *driver, const char *buf, - size_t count) +/* Only aggregators created via legacy sysfs can be "activating". */ +static bool gpio_aggregator_is_activating(struct gpio_aggregator *aggr) { - struct gpio_aggregator *aggr; - struct platform_device *pdev; - int res, id; - - /* kernfs guarantees string termination, so count + 1 is safe */ - aggr = kzalloc(sizeof(*aggr) + count + 1, GFP_KERNEL); - if (!aggr) - return -ENOMEM; - - memcpy(aggr->args, buf, count + 1); - - aggr->lookups = kzalloc(struct_size(aggr->lookups, table, 1), - GFP_KERNEL); - if (!aggr->lookups) { - res = -ENOMEM; - goto free_ga; - } + lockdep_assert_held(&aggr->lock); - mutex_lock(&gpio_aggregator_lock); - id = idr_alloc(&gpio_aggregator_idr, aggr, 0, 0, GFP_KERNEL); - mutex_unlock(&gpio_aggregator_lock); + return aggr->probe_data.pdev && !platform_get_drvdata(aggr->probe_data.pdev); +} - if (id < 0) { - res = id; - goto free_table; - } +static size_t gpio_aggregator_count_lines(struct gpio_aggregator *aggr) +{ + lockdep_assert_held(&aggr->lock); - aggr->lookups->dev_id = kasprintf(GFP_KERNEL, "%s.%d", DRV_NAME, id); - if (!aggr->lookups->dev_id) { - res = -ENOMEM; - goto remove_idr; - } + return list_count_nodes(&aggr->list_head); +} - res = aggr_parse(aggr); - if (res) - goto free_dev_id; +static struct gpio_aggregator_line * +gpio_aggregator_line_alloc(struct gpio_aggregator *parent, unsigned int idx, + char *key, int offset) +{ + struct gpio_aggregator_line *line; - gpiod_add_lookup_table(aggr->lookups); + line = kzalloc(sizeof(*line), GFP_KERNEL); + if (!line) + return ERR_PTR(-ENOMEM); - pdev = platform_device_register_simple(DRV_NAME, id, NULL, 0); - if (IS_ERR(pdev)) { - res = PTR_ERR(pdev); - goto remove_table; + if (key) { + line->key = kstrdup(key, GFP_KERNEL); + if (!line->key) { + kfree(line); + return ERR_PTR(-ENOMEM); + } } - aggr->pdev = pdev; - return count; + line->flags = GPIO_LOOKUP_FLAGS_DEFAULT; + line->parent = parent; + line->idx = idx; + line->offset = offset; + INIT_LIST_HEAD(&line->entry); -remove_table: - gpiod_remove_lookup_table(aggr->lookups); -free_dev_id: - kfree(aggr->lookups->dev_id); -remove_idr: - mutex_lock(&gpio_aggregator_lock); - idr_remove(&gpio_aggregator_idr, id); - mutex_unlock(&gpio_aggregator_lock); -free_table: - kfree(aggr->lookups); -free_ga: - kfree(aggr); - return res; -} - -static DRIVER_ATTR_WO(new_device); - -static void gpio_aggregator_free(struct gpio_aggregator *aggr) -{ - platform_device_unregister(aggr->pdev); - gpiod_remove_lookup_table(aggr->lookups); - kfree(aggr->lookups->dev_id); - kfree(aggr->lookups); - kfree(aggr); + return line; } -static ssize_t delete_device_store(struct device_driver *driver, - const char *buf, size_t count) +static void gpio_aggregator_line_add(struct gpio_aggregator *aggr, + struct gpio_aggregator_line *line) { - struct gpio_aggregator *aggr; - unsigned int id; - int error; + struct gpio_aggregator_line *tmp; - if (!str_has_prefix(buf, DRV_NAME ".")) - return -EINVAL; + lockdep_assert_held(&aggr->lock); - error = kstrtouint(buf + strlen(DRV_NAME "."), 10, &id); - if (error) - return error; - - mutex_lock(&gpio_aggregator_lock); - aggr = idr_remove(&gpio_aggregator_idr, id); - mutex_unlock(&gpio_aggregator_lock); - if (!aggr) - return -ENOENT; - - gpio_aggregator_free(aggr); - return count; + list_for_each_entry(tmp, &aggr->list_head, entry) { + if (tmp->idx > line->idx) { + list_add_tail(&line->entry, &tmp->entry); + return; + } + } + list_add_tail(&line->entry, &aggr->list_head); } -static DRIVER_ATTR_WO(delete_device); - -static struct attribute *gpio_aggregator_attrs[] = { - &driver_attr_new_device.attr, - &driver_attr_delete_device.attr, - NULL -}; -ATTRIBUTE_GROUPS(gpio_aggregator); -static int __exit gpio_aggregator_idr_remove(int id, void *p, void *data) +static void gpio_aggregator_line_del(struct gpio_aggregator *aggr, + struct gpio_aggregator_line *line) { - gpio_aggregator_free(p); - return 0; -} + lockdep_assert_held(&aggr->lock); -static void __exit gpio_aggregator_remove_all(void) -{ - mutex_lock(&gpio_aggregator_lock); - idr_for_each(&gpio_aggregator_idr, gpio_aggregator_idr_remove, NULL); - idr_destroy(&gpio_aggregator_idr); - mutex_unlock(&gpio_aggregator_lock); + list_del(&line->entry); +} + +static void gpio_aggregator_free_lines(struct gpio_aggregator *aggr) +{ + struct gpio_aggregator_line *line, *tmp; + + list_for_each_entry_safe(line, tmp, &aggr->list_head, entry) { + configfs_unregister_group(&line->group); + /* + * Normally, we acquire aggr->lock within the configfs + * callback. However, in the legacy sysfs interface case, + * calling configfs_(un)register_group while holding + * aggr->lock could cause a deadlock. Fortunately, this is + * unnecessary because the new_device/delete_device path + * and the module unload path are mutually exclusive, + * thanks to an explicit try_module_get. That's why this + * minimal scoped_guard suffices. + */ + scoped_guard(mutex, &aggr->lock) + gpio_aggregator_line_del(aggr, line); + kfree(line->key); + kfree(line->name); + kfree(line); + } } @@ -560,6 +549,728 @@ return fwd; } +/* + * Configfs interface + */ + +static struct gpio_aggregator * +to_gpio_aggregator(struct config_item *item) +{ + struct config_group *group = to_config_group(item); + + return container_of(group, struct gpio_aggregator, group); +} + +static struct gpio_aggregator_line * +to_gpio_aggregator_line(struct config_item *item) +{ + struct config_group *group = to_config_group(item); + + return container_of(group, struct gpio_aggregator_line, group); +} + +static struct fwnode_handle * +gpio_aggregator_make_device_sw_node(struct gpio_aggregator *aggr) +{ + struct property_entry properties[2]; + struct gpio_aggregator_line *line; + size_t num_lines; + int n = 0; + + memset(properties, 0, sizeof(properties)); + + num_lines = gpio_aggregator_count_lines(aggr); + if (num_lines == 0) + return NULL; + + const char **line_names __free(kfree) = kcalloc( + num_lines, sizeof(*line_names), GFP_KERNEL); + if (!line_names) + return ERR_PTR(-ENOMEM); + + /* The list is always sorted as new elements are inserted in order. */ + list_for_each_entry(line, &aggr->list_head, entry) + line_names[n++] = line->name ?: ""; + + properties[0] = PROPERTY_ENTRY_STRING_ARRAY_LEN( + "gpio-line-names", + line_names, num_lines); + + return fwnode_create_software_node(properties, NULL); +} + +static int gpio_aggregator_activate(struct gpio_aggregator *aggr) +{ + struct platform_device_info pdevinfo; + struct gpio_aggregator_line *line; + struct fwnode_handle *swnode; + unsigned int n = 0; + int ret = 0; + + if (gpio_aggregator_count_lines(aggr) == 0) + return -EINVAL; + + aggr->lookups = kzalloc(struct_size(aggr->lookups, table, 1), + GFP_KERNEL); + if (!aggr->lookups) + return -ENOMEM; + + swnode = gpio_aggregator_make_device_sw_node(aggr); + if (IS_ERR(swnode)) { + ret = PTR_ERR(swnode); + goto err_remove_lookups; + } + + memset(&pdevinfo, 0, sizeof(pdevinfo)); + pdevinfo.name = DRV_NAME; + pdevinfo.id = aggr->id; + pdevinfo.fwnode = swnode; + + /* The list is always sorted as new elements are inserted in order. */ + list_for_each_entry(line, &aggr->list_head, entry) { + /* + * - Either GPIO chip label or line name must be configured + * (i.e. line->key must be non-NULL) + * - Line directories must be named with sequential numeric + * suffixes starting from 0. (i.e. ./line0, ./line1, ...) + */ + if (!line->key || line->idx != n) { + ret = -EINVAL; + goto err_remove_swnode; + } + + if (line->offset < 0) + ret = gpio_aggregator_add_gpio(aggr, line->key, + U16_MAX, &n); + else + ret = gpio_aggregator_add_gpio(aggr, line->key, + line->offset, &n); + if (ret) + goto err_remove_swnode; + } + + aggr->lookups->dev_id = kasprintf(GFP_KERNEL, "%s.%d", DRV_NAME, aggr->id); + if (!aggr->lookups->dev_id) { + ret = -ENOMEM; + goto err_remove_swnode; + } + + gpiod_add_lookup_table(aggr->lookups); + + ret = dev_sync_probe_register(&aggr->probe_data, &pdevinfo); + if (ret) + goto err_remove_lookup_table; + + return 0; + +err_remove_lookup_table: + kfree(aggr->lookups->dev_id); + gpiod_remove_lookup_table(aggr->lookups); +err_remove_swnode: + fwnode_remove_software_node(swnode); +err_remove_lookups: + kfree(aggr->lookups); + + return ret; +} + +static void gpio_aggregator_deactivate(struct gpio_aggregator *aggr) +{ + dev_sync_probe_unregister(&aggr->probe_data); + gpiod_remove_lookup_table(aggr->lookups); + kfree(aggr->lookups->dev_id); + kfree(aggr->lookups); +} + +static void gpio_aggregator_lockup_configfs(struct gpio_aggregator *aggr, + bool lock) +{ + struct configfs_subsystem *subsys = aggr->group.cg_subsys; + struct gpio_aggregator_line *line; + + /* + * The device only needs to depend on leaf lines. This is + * sufficient to lock up all the configfs entries that the + * instantiated, alive device depends on. + */ + list_for_each_entry(line, &aggr->list_head, entry) { + if (lock) + configfs_depend_item_unlocked( + subsys, &line->group.cg_item); + else + configfs_undepend_item_unlocked( + &line->group.cg_item); + } +} + +static ssize_t +gpio_aggregator_line_key_show(struct config_item *item, char *page) +{ + struct gpio_aggregator_line *line = to_gpio_aggregator_line(item); + struct gpio_aggregator *aggr = line->parent; + + guard(mutex)(&aggr->lock); + + return sysfs_emit(page, "%s\n", line->key ?: ""); +} + +static ssize_t +gpio_aggregator_line_key_store(struct config_item *item, const char *page, + size_t count) +{ + struct gpio_aggregator_line *line = to_gpio_aggregator_line(item); + struct gpio_aggregator *aggr = line->parent; + + char *key __free(kfree) = kstrndup(skip_spaces(page), count, + GFP_KERNEL); + if (!key) + return -ENOMEM; + + strim(key); + + guard(mutex)(&aggr->lock); + + if (gpio_aggregator_is_activating(aggr) || + gpio_aggregator_is_active(aggr)) + return -EBUSY; + + kfree(line->key); + line->key = no_free_ptr(key); + + return count; +} +CONFIGFS_ATTR(gpio_aggregator_line_, key); + +static ssize_t +gpio_aggregator_line_name_show(struct config_item *item, char *page) +{ + struct gpio_aggregator_line *line = to_gpio_aggregator_line(item); + struct gpio_aggregator *aggr = line->parent; + + guard(mutex)(&aggr->lock); + + return sysfs_emit(page, "%s\n", line->name ?: ""); +} + +static ssize_t +gpio_aggregator_line_name_store(struct config_item *item, const char *page, + size_t count) +{ + struct gpio_aggregator_line *line = to_gpio_aggregator_line(item); + struct gpio_aggregator *aggr = line->parent; + + char *name __free(kfree) = kstrndup(skip_spaces(page), count, + GFP_KERNEL); + if (!name) + return -ENOMEM; + + strim(name); + + guard(mutex)(&aggr->lock); + + if (gpio_aggregator_is_activating(aggr) || + gpio_aggregator_is_active(aggr)) + return -EBUSY; + + kfree(line->name); + line->name = no_free_ptr(name); + + return count; +} +CONFIGFS_ATTR(gpio_aggregator_line_, name); + +static ssize_t +gpio_aggregator_line_offset_show(struct config_item *item, char *page) +{ + struct gpio_aggregator_line *line = to_gpio_aggregator_line(item); + struct gpio_aggregator *aggr = line->parent; + + guard(mutex)(&aggr->lock); + + return sysfs_emit(page, "%d\n", line->offset); +} + +static ssize_t +gpio_aggregator_line_offset_store(struct config_item *item, const char *page, + size_t count) +{ + struct gpio_aggregator_line *line = to_gpio_aggregator_line(item); + struct gpio_aggregator *aggr = line->parent; + int offset, ret; + + ret = kstrtoint(page, 0, &offset); + if (ret) + return ret; + + /* + * When offset == -1, 'key' represents a line name to lookup. + * When 0 <= offset < 65535, 'key' represents the label of the chip with + * the 'offset' value representing the line within that chip. + * + * GPIOLIB uses the U16_MAX value to indicate lookup by line name so + * the greatest offset we can accept is (U16_MAX - 1). + */ + if (offset > (U16_MAX - 1) || offset < -1) + return -EINVAL; + + guard(mutex)(&aggr->lock); + + if (gpio_aggregator_is_activating(aggr) || + gpio_aggregator_is_active(aggr)) + return -EBUSY; + + line->offset = offset; + + return count; +} +CONFIGFS_ATTR(gpio_aggregator_line_, offset); + +static struct configfs_attribute *gpio_aggregator_line_attrs[] = { + &gpio_aggregator_line_attr_key, + &gpio_aggregator_line_attr_name, + &gpio_aggregator_line_attr_offset, + NULL +}; + +static ssize_t +gpio_aggregator_device_dev_name_show(struct config_item *item, char *page) +{ + struct gpio_aggregator *aggr = to_gpio_aggregator(item); + struct platform_device *pdev; + + guard(mutex)(&aggr->lock); + + pdev = aggr->probe_data.pdev; + if (pdev) + return sysfs_emit(page, "%s\n", dev_name(&pdev->dev)); + + return sysfs_emit(page, "%s.%d\n", DRV_NAME, aggr->id); +} +CONFIGFS_ATTR_RO(gpio_aggregator_device_, dev_name); + +static ssize_t +gpio_aggregator_device_live_show(struct config_item *item, char *page) +{ + struct gpio_aggregator *aggr = to_gpio_aggregator(item); + + guard(mutex)(&aggr->lock); + + return sysfs_emit(page, "%c\n", + gpio_aggregator_is_active(aggr) ? '1' : '0'); +} + +static ssize_t +gpio_aggregator_device_live_store(struct config_item *item, const char *page, + size_t count) +{ + struct gpio_aggregator *aggr = to_gpio_aggregator(item); + int ret = 0; + bool live; + + ret = kstrtobool(page, &live); + if (ret) + return ret; + + if (!try_module_get(THIS_MODULE)) + return -ENOENT; + + if (live && !aggr->init_via_sysfs) + gpio_aggregator_lockup_configfs(aggr, true); + + scoped_guard(mutex, &aggr->lock) { + if (gpio_aggregator_is_activating(aggr) || + (live == gpio_aggregator_is_active(aggr))) + ret = -EPERM; + else if (live) + ret = gpio_aggregator_activate(aggr); + else + gpio_aggregator_deactivate(aggr); + } + + /* + * Undepend is required only if device disablement (live == 0) + * succeeds or if device enablement (live == 1) fails. + */ + if (live == !!ret && !aggr->init_via_sysfs) + gpio_aggregator_lockup_configfs(aggr, false); + + module_put(THIS_MODULE); + + return ret ?: count; +} +CONFIGFS_ATTR(gpio_aggregator_device_, live); + +static struct configfs_attribute *gpio_aggregator_device_attrs[] = { + &gpio_aggregator_device_attr_dev_name, + &gpio_aggregator_device_attr_live, + NULL +}; + +static void +gpio_aggregator_line_release(struct config_item *item) +{ + struct gpio_aggregator_line *line = to_gpio_aggregator_line(item); + struct gpio_aggregator *aggr = line->parent; + + guard(mutex)(&aggr->lock); + + gpio_aggregator_line_del(aggr, line); + kfree(line->key); + kfree(line->name); + kfree(line); +} + +static struct configfs_item_operations gpio_aggregator_line_item_ops = { + .release = gpio_aggregator_line_release, +}; + +static const struct config_item_type gpio_aggregator_line_type = { + .ct_item_ops = &gpio_aggregator_line_item_ops, + .ct_attrs = gpio_aggregator_line_attrs, + .ct_owner = THIS_MODULE, +}; + +static void gpio_aggregator_device_release(struct config_item *item) +{ + struct gpio_aggregator *aggr = to_gpio_aggregator(item); + + /* + * At this point, aggr is neither active nor activating, + * so calling gpio_aggregator_deactivate() is always unnecessary. + */ + gpio_aggregator_free(aggr); +} + +static struct configfs_item_operations gpio_aggregator_device_item_ops = { + .release = gpio_aggregator_device_release, +}; + +static struct config_group * +gpio_aggregator_device_make_group(struct config_group *group, const char *name) +{ + struct gpio_aggregator *aggr = to_gpio_aggregator(&group->cg_item); + struct gpio_aggregator_line *line; + unsigned int idx; + int ret, nchar; + + ret = sscanf(name, "line%u%n", &idx, &nchar); + if (ret != 1 || nchar != strlen(name)) + return ERR_PTR(-EINVAL); + + if (aggr->init_via_sysfs) + /* + * Aggregators created via legacy sysfs interface are exposed as + * default groups, which means rmdir(2) is prohibited for them. + * For simplicity, and to avoid confusion, we also prohibit + * mkdir(2). + */ + return ERR_PTR(-EPERM); + + guard(mutex)(&aggr->lock); + + if (gpio_aggregator_is_active(aggr)) + return ERR_PTR(-EBUSY); + + list_for_each_entry(line, &aggr->list_head, entry) + if (line->idx == idx) + return ERR_PTR(-EINVAL); + + line = gpio_aggregator_line_alloc(aggr, idx, NULL, -1); + if (IS_ERR(line)) + return ERR_CAST(line); + + config_group_init_type_name(&line->group, name, &gpio_aggregator_line_type); + + gpio_aggregator_line_add(aggr, line); + + return &line->group; +} + +static struct configfs_group_operations gpio_aggregator_device_group_ops = { + .make_group = gpio_aggregator_device_make_group, +}; + +static const struct config_item_type gpio_aggregator_device_type = { + .ct_group_ops = &gpio_aggregator_device_group_ops, + .ct_item_ops = &gpio_aggregator_device_item_ops, + .ct_attrs = gpio_aggregator_device_attrs, + .ct_owner = THIS_MODULE, +}; + +static struct config_group * +gpio_aggregator_make_group(struct config_group *group, const char *name) +{ + struct gpio_aggregator *aggr; + int ret; + + /* + * "_sysfs" prefix is reserved for auto-generated config group + * for devices create via legacy sysfs interface. + */ + if (strncmp(name, AGGREGATOR_LEGACY_PREFIX, + sizeof(AGGREGATOR_LEGACY_PREFIX) - 1) == 0) + return ERR_PTR(-EINVAL); + + /* arg space is unneeded */ + ret = gpio_aggregator_alloc(&aggr, 0); + if (ret) + return ERR_PTR(ret); + + config_group_init_type_name(&aggr->group, name, &gpio_aggregator_device_type); + dev_sync_probe_init(&aggr->probe_data); + + return &aggr->group; +} + +static struct configfs_group_operations gpio_aggregator_group_ops = { + .make_group = gpio_aggregator_make_group, +}; + +static const struct config_item_type gpio_aggregator_type = { + .ct_group_ops = &gpio_aggregator_group_ops, + .ct_owner = THIS_MODULE, +}; + +static struct configfs_subsystem gpio_aggregator_subsys = { + .su_group = { + .cg_item = { + .ci_namebuf = DRV_NAME, + .ci_type = &gpio_aggregator_type, + }, + }, +}; + +/* + * Sysfs interface + */ +static int gpio_aggregator_parse(struct gpio_aggregator *aggr) +{ + char *args = skip_spaces(aggr->args); + struct gpio_aggregator_line *line; + char name[CONFIGFS_ITEM_NAME_LEN]; + char *key, *offsets, *p; + unsigned int i, n = 0; + int error = 0; + + unsigned long *bitmap __free(bitmap) = + bitmap_alloc(AGGREGATOR_MAX_GPIOS, GFP_KERNEL); + if (!bitmap) + return -ENOMEM; + + args = next_arg(args, &key, &p); + while (*args) { + args = next_arg(args, &offsets, &p); + + p = get_options(offsets, 0, &error); + if (error == 0 || *p) { + /* Named GPIO line */ + scnprintf(name, sizeof(name), "line%u", n); + line = gpio_aggregator_line_alloc(aggr, n, key, -1); + if (IS_ERR(line)) { + error = PTR_ERR(line); + goto err; + } + config_group_init_type_name(&line->group, name, + &gpio_aggregator_line_type); + error = configfs_register_group(&aggr->group, + &line->group); + if (error) + goto err; + scoped_guard(mutex, &aggr->lock) + gpio_aggregator_line_add(aggr, line); + + error = gpio_aggregator_add_gpio(aggr, key, U16_MAX, &n); + if (error) + goto err; + + key = offsets; + continue; + } + + /* GPIO chip + offset(s) */ + error = bitmap_parselist(offsets, bitmap, AGGREGATOR_MAX_GPIOS); + if (error) { + pr_err("Cannot parse %s: %d\n", offsets, error); + goto err; + } + + for_each_set_bit(i, bitmap, AGGREGATOR_MAX_GPIOS) { + scnprintf(name, sizeof(name), "line%u", n); + line = gpio_aggregator_line_alloc(aggr, n, key, i); + if (IS_ERR(line)) { + error = PTR_ERR(line); + goto err; + } + config_group_init_type_name(&line->group, name, + &gpio_aggregator_line_type); + error = configfs_register_group(&aggr->group, + &line->group); + if (error) + goto err; + scoped_guard(mutex, &aggr->lock) + gpio_aggregator_line_add(aggr, line); + + error = gpio_aggregator_add_gpio(aggr, key, i, &n); + if (error) + goto err; + } + + args = next_arg(args, &key, &p); + } + + if (!n) { + pr_err("No GPIOs specified\n"); + error = -EINVAL; + goto err; + } + + return 0; + +err: + gpio_aggregator_free_lines(aggr); + return error; +} + +static ssize_t gpio_aggregator_new_device_store(struct device_driver *driver, + const char *buf, size_t count) +{ + struct gpio_aggregator_pdev_meta meta = { .init_via_sysfs = true }; + char name[CONFIGFS_ITEM_NAME_LEN]; + struct gpio_aggregator *aggr; + struct platform_device *pdev; + int res; + + if (!try_module_get(THIS_MODULE)) + return -ENOENT; + + /* kernfs guarantees string termination, so count + 1 is safe */ + res = gpio_aggregator_alloc(&aggr, count + 1); + if (res) + goto put_module; + + memcpy(aggr->args, buf, count + 1); + + aggr->init_via_sysfs = true; + aggr->lookups = kzalloc(struct_size(aggr->lookups, table, 1), + GFP_KERNEL); + if (!aggr->lookups) { + res = -ENOMEM; + goto free_ga; + } + + aggr->lookups->dev_id = kasprintf(GFP_KERNEL, "%s.%d", DRV_NAME, aggr->id); + if (!aggr->lookups->dev_id) { + res = -ENOMEM; + goto free_table; + } + + scnprintf(name, sizeof(name), "%s.%d", AGGREGATOR_LEGACY_PREFIX, aggr->id); + config_group_init_type_name(&aggr->group, name, &gpio_aggregator_device_type); + + /* + * Since the device created by sysfs might be toggled via configfs + * 'live' attribute later, this initialization is needed. + */ + dev_sync_probe_init(&aggr->probe_data); + + /* Expose to configfs */ + res = configfs_register_group(&gpio_aggregator_subsys.su_group, + &aggr->group); + if (res) + goto free_dev_id; + + res = gpio_aggregator_parse(aggr); + if (res) + goto unregister_group; + + gpiod_add_lookup_table(aggr->lookups); + + pdev = platform_device_register_data(NULL, DRV_NAME, aggr->id, &meta, sizeof(meta)); + if (IS_ERR(pdev)) { + res = PTR_ERR(pdev); + goto remove_table; + } + + aggr->probe_data.pdev = pdev; + module_put(THIS_MODULE); + return count; + +remove_table: + gpiod_remove_lookup_table(aggr->lookups); +unregister_group: + configfs_unregister_group(&aggr->group); +free_dev_id: + kfree(aggr->lookups->dev_id); +free_table: + kfree(aggr->lookups); +free_ga: + gpio_aggregator_free(aggr); +put_module: + module_put(THIS_MODULE); + return res; +} + +static struct driver_attribute driver_attr_gpio_aggregator_new_device = + __ATTR(new_device, 0200, NULL, gpio_aggregator_new_device_store); + +static void gpio_aggregator_destroy(struct gpio_aggregator *aggr) +{ + scoped_guard(mutex, &aggr->lock) { + if (gpio_aggregator_is_activating(aggr) || + gpio_aggregator_is_active(aggr)) + gpio_aggregator_deactivate(aggr); + } + gpio_aggregator_free_lines(aggr); + configfs_unregister_group(&aggr->group); + kfree(aggr); +} + +static ssize_t gpio_aggregator_delete_device_store(struct device_driver *driver, + const char *buf, size_t count) +{ + struct gpio_aggregator *aggr; + unsigned int id; + int error; + + if (!str_has_prefix(buf, DRV_NAME ".")) + return -EINVAL; + + error = kstrtouint(buf + strlen(DRV_NAME "."), 10, &id); + if (error) + return error; + + if (!try_module_get(THIS_MODULE)) + return -ENOENT; + + mutex_lock(&gpio_aggregator_lock); + aggr = idr_find(&gpio_aggregator_idr, id); + /* + * For simplicity, devices created via configfs cannot be deleted + * via sysfs. + */ + if (aggr && aggr->init_via_sysfs) + idr_remove(&gpio_aggregator_idr, id); + else { + mutex_unlock(&gpio_aggregator_lock); + module_put(THIS_MODULE); + return -ENOENT; + } + mutex_unlock(&gpio_aggregator_lock); + + gpio_aggregator_destroy(aggr); + module_put(THIS_MODULE); + return count; +} + +static struct driver_attribute driver_attr_gpio_aggregator_delete_device = + __ATTR(delete_device, 0200, NULL, gpio_aggregator_delete_device_store); + +static struct attribute *gpio_aggregator_attrs[] = { + &driver_attr_gpio_aggregator_new_device.attr, + &driver_attr_gpio_aggregator_delete_device.attr, + NULL +}; +ATTRIBUTE_GROUPS(gpio_aggregator); /* * GPIO Aggregator platform device @@ -567,7 +1278,9 @@ static int gpio_aggregator_probe(struct platform_device *pdev) { + struct gpio_aggregator_pdev_meta *meta; struct device *dev = &pdev->dev; + bool init_via_sysfs = false; struct gpio_desc **descs; struct gpiochip_fwd *fwd; unsigned long features; @@ -581,10 +1294,28 @@ if (!descs) return -ENOMEM; + meta = dev_get_platdata(&pdev->dev); + if (meta && meta->init_via_sysfs) + init_via_sysfs = true; + for (i = 0; i < n; i++) { descs[i] = devm_gpiod_get_index(dev, NULL, i, GPIOD_ASIS); - if (IS_ERR(descs[i])) + if (IS_ERR(descs[i])) { + /* + * Deferred probing is not suitable when the aggregator + * is created via configfs. They should just retry later + * whenever they like. For device creation via sysfs, + * error is propagated without overriding for backward + * compatibility. .prevent_deferred_probe is kept unset + * for other cases. + */ + if (!init_via_sysfs && !dev_of_node(dev) && + descs[i] == ERR_PTR(-EPROBE_DEFER)) { + pr_warn("Deferred probe canceled for creation via configfs.\n"); + return -ENODEV; + } return PTR_ERR(descs[i]); + } } features = (uintptr_t)device_get_match_data(dev); @@ -618,9 +1349,63 @@ }, }; +static int __exit gpio_aggregator_idr_remove(int id, void *p, void *data) +{ + /* + * There should be no aggregator created via configfs, as their + * presence would prevent module unloading. + */ + gpio_aggregator_destroy(p); + return 0; +} + +static void __exit gpio_aggregator_remove_all(void) +{ + /* + * Configfs callbacks acquire gpio_aggregator_lock when accessing + * gpio_aggregator_idr, so to prevent lock inversion deadlock, we + * cannot protect idr_for_each invocation here with + * gpio_aggregator_lock, as gpio_aggregator_idr_remove() accesses + * configfs groups. Fortunately, the new_device/delete_device path + * and the module unload path are mutually exclusive, thanks to an + * explicit try_module_get inside of those driver attr handlers. + * Also, when we reach here, no configfs entries present or being + * created. Therefore, no need to protect with gpio_aggregator_lock + * below. + */ + idr_for_each(&gpio_aggregator_idr, gpio_aggregator_idr_remove, NULL); + idr_destroy(&gpio_aggregator_idr); +} + static int __init gpio_aggregator_init(void) { - return platform_driver_register(&gpio_aggregator_driver); + int ret = 0; + + config_group_init(&gpio_aggregator_subsys.su_group); + mutex_init(&gpio_aggregator_subsys.su_mutex); + ret = configfs_register_subsystem(&gpio_aggregator_subsys); + if (ret) { + pr_err("Failed to register the '%s' configfs subsystem: %d\n", + gpio_aggregator_subsys.su_group.cg_item.ci_namebuf, ret); + mutex_destroy(&gpio_aggregator_subsys.su_mutex); + return ret; + } + + /* + * CAVEAT: This must occur after configfs registration. Otherwise, + * a race condition could arise: driver attribute groups might be + * exposed and accessed by users before configfs registration + * completes. new_device_store() does not expect a partially + * initialized configfs state. + */ + ret = platform_driver_register(&gpio_aggregator_driver); + if (ret) { + pr_err("Failed to register the platform driver: %d\n", ret); + mutex_destroy(&gpio_aggregator_subsys.su_mutex); + configfs_unregister_subsystem(&gpio_aggregator_subsys); + } + + return ret; } module_init(gpio_aggregator_init); @@ -628,6 +1413,7 @@ { gpio_aggregator_remove_all(); platform_driver_unregister(&gpio_aggregator_driver); + configfs_unregister_subsystem(&gpio_aggregator_subsys); } module_exit(gpio_aggregator_exit); --- linux-xilinx-6.8.0.orig/drivers/gpio/gpio-aspeed.c +++ linux-xilinx-6.8.0/drivers/gpio/gpio-aspeed.c @@ -406,6 +406,8 @@ gpio->dcache[GPIO_BANK(offset)] = reg; iowrite32(reg, addr); + /* Flush write */ + ioread32(addr); } static void aspeed_gpio_set(struct gpio_chip *gc, unsigned int offset, @@ -1191,7 +1193,7 @@ if (!gpio_id) return -EINVAL; - gpio->clk = of_clk_get(pdev->dev.of_node, 0); + gpio->clk = devm_clk_get_enabled(&pdev->dev, NULL); if (IS_ERR(gpio->clk)) { dev_warn(&pdev->dev, "Failed to get clock from devicetree, debouncing disabled\n"); --- linux-xilinx-6.8.0.orig/drivers/gpio/gpio-bcm-kona.c +++ linux-xilinx-6.8.0/drivers/gpio/gpio-bcm-kona.c @@ -69,6 +69,22 @@ struct bcm_kona_gpio_bank { int id; int irq; + /* + * Used to keep track of lock/unlock operations for each GPIO in the + * bank. + * + * All GPIOs are locked by default (see bcm_kona_gpio_reset), and the + * unlock count for all GPIOs is 0 by default. Each unlock increments + * the counter, and each lock decrements the counter. + * + * The lock function only locks the GPIO once its unlock counter is + * down to 0. This is necessary because the GPIO is unlocked in two + * places in this driver: once for requested GPIOs, and once for + * requested IRQs. Since it is possible for a GPIO to be requested + * as both a GPIO and an IRQ, we need to ensure that we don't lock it + * too early. + */ + u8 gpio_unlock_count[GPIO_PER_BANK]; /* Used in the interrupt handler */ struct bcm_kona_gpio *kona_gpio; }; @@ -86,14 +102,24 @@ u32 val; unsigned long flags; int bank_id = GPIO_BANK(gpio); + int bit = GPIO_BIT(gpio); + struct bcm_kona_gpio_bank *bank = &kona_gpio->banks[bank_id]; - raw_spin_lock_irqsave(&kona_gpio->lock, flags); + if (bank->gpio_unlock_count[bit] == 0) { + dev_err(kona_gpio->gpio_chip.parent, + "Unbalanced locks for GPIO %u\n", gpio); + return; + } - val = readl(kona_gpio->reg_base + GPIO_PWD_STATUS(bank_id)); - val |= BIT(gpio); - bcm_kona_gpio_write_lock_regs(kona_gpio->reg_base, bank_id, val); + if (--bank->gpio_unlock_count[bit] == 0) { + raw_spin_lock_irqsave(&kona_gpio->lock, flags); - raw_spin_unlock_irqrestore(&kona_gpio->lock, flags); + val = readl(kona_gpio->reg_base + GPIO_PWD_STATUS(bank_id)); + val |= BIT(bit); + bcm_kona_gpio_write_lock_regs(kona_gpio->reg_base, bank_id, val); + + raw_spin_unlock_irqrestore(&kona_gpio->lock, flags); + } } static void bcm_kona_gpio_unlock_gpio(struct bcm_kona_gpio *kona_gpio, @@ -102,14 +128,20 @@ u32 val; unsigned long flags; int bank_id = GPIO_BANK(gpio); + int bit = GPIO_BIT(gpio); + struct bcm_kona_gpio_bank *bank = &kona_gpio->banks[bank_id]; - raw_spin_lock_irqsave(&kona_gpio->lock, flags); + if (bank->gpio_unlock_count[bit] == 0) { + raw_spin_lock_irqsave(&kona_gpio->lock, flags); - val = readl(kona_gpio->reg_base + GPIO_PWD_STATUS(bank_id)); - val &= ~BIT(gpio); - bcm_kona_gpio_write_lock_regs(kona_gpio->reg_base, bank_id, val); + val = readl(kona_gpio->reg_base + GPIO_PWD_STATUS(bank_id)); + val &= ~BIT(bit); + bcm_kona_gpio_write_lock_regs(kona_gpio->reg_base, bank_id, val); - raw_spin_unlock_irqrestore(&kona_gpio->lock, flags); + raw_spin_unlock_irqrestore(&kona_gpio->lock, flags); + } + + ++bank->gpio_unlock_count[bit]; } static int bcm_kona_gpio_get_dir(struct gpio_chip *chip, unsigned gpio) @@ -360,6 +392,7 @@ kona_gpio = irq_data_get_irq_chip_data(d); reg_base = kona_gpio->reg_base; + raw_spin_lock_irqsave(&kona_gpio->lock, flags); val = readl(reg_base + GPIO_INT_MASK(bank_id)); @@ -382,6 +415,7 @@ kona_gpio = irq_data_get_irq_chip_data(d); reg_base = kona_gpio->reg_base; + raw_spin_lock_irqsave(&kona_gpio->lock, flags); val = readl(reg_base + GPIO_INT_MSKCLR(bank_id)); @@ -477,15 +511,26 @@ static int bcm_kona_gpio_irq_reqres(struct irq_data *d) { struct bcm_kona_gpio *kona_gpio = irq_data_get_irq_chip_data(d); + unsigned int gpio = d->hwirq; - return gpiochip_reqres_irq(&kona_gpio->gpio_chip, d->hwirq); + /* + * We need to unlock the GPIO before any other operations are performed + * on the relevant GPIO configuration registers + */ + bcm_kona_gpio_unlock_gpio(kona_gpio, gpio); + + return gpiochip_reqres_irq(&kona_gpio->gpio_chip, gpio); } static void bcm_kona_gpio_irq_relres(struct irq_data *d) { struct bcm_kona_gpio *kona_gpio = irq_data_get_irq_chip_data(d); + unsigned int gpio = d->hwirq; + + /* Once we no longer use it, lock the GPIO again */ + bcm_kona_gpio_lock_gpio(kona_gpio, gpio); - gpiochip_relres_irq(&kona_gpio->gpio_chip, d->hwirq); + gpiochip_relres_irq(&kona_gpio->gpio_chip, gpio); } static struct irq_chip bcm_gpio_irq_chip = { @@ -614,7 +659,7 @@ bank->irq = platform_get_irq(pdev, i); bank->kona_gpio = kona_gpio; if (bank->irq < 0) { - dev_err(dev, "Couldn't get IRQ for bank %d", i); + dev_err(dev, "Couldn't get IRQ for bank %d\n", i); ret = -ENOENT; goto err_irq_domain; } --- linux-xilinx-6.8.0.orig/drivers/gpio/gpio-brcmstb.c +++ linux-xilinx-6.8.0/drivers/gpio/gpio-brcmstb.c @@ -592,8 +592,6 @@ void __iomem *reg_base; struct brcmstb_gpio_priv *priv; struct resource *res; - struct property *prop; - const __be32 *p; u32 bank_width; int num_banks = 0; int err; @@ -638,8 +636,7 @@ flags = BGPIOF_BIG_ENDIAN_BYTE_ORDER; #endif - of_property_for_each_u32(np, "brcm,gpio-bank-widths", prop, p, - bank_width) { + of_property_for_each_u32(np, "brcm,gpio-bank-widths", bank_width) { struct brcmstb_gpio_bank *bank; struct gpio_chip *gc; --- linux-xilinx-6.8.0.orig/drivers/gpio/gpio-crystalcove.c +++ linux-xilinx-6.8.0/drivers/gpio/gpio-crystalcove.c @@ -92,7 +92,7 @@ case 0x5e: return GPIOPANELCTL; default: - return -EOPNOTSUPP; + return -ENOTSUPP; } } --- linux-xilinx-6.8.0.orig/drivers/gpio/gpio-davinci.c +++ linux-xilinx-6.8.0/drivers/gpio/gpio-davinci.c @@ -225,6 +225,11 @@ else nirq = DIV_ROUND_UP(ngpio, 16); + if (nirq > MAX_INT_PER_BANK) { + dev_err(dev, "Too many IRQs!\n"); + return -EINVAL; + } + chips = devm_kzalloc(dev, sizeof(*chips), GFP_KERNEL); if (!chips) return -ENOMEM; @@ -284,7 +289,7 @@ * serve as EDMA event triggers. */ -static void gpio_irq_disable(struct irq_data *d) +static void gpio_irq_mask(struct irq_data *d) { struct davinci_gpio_regs __iomem *g = irq2regs(d); uintptr_t mask = (uintptr_t)irq_data_get_irq_handler_data(d); @@ -293,7 +298,7 @@ writel_relaxed(mask, &g->clr_rising); } -static void gpio_irq_enable(struct irq_data *d) +static void gpio_irq_unmask(struct irq_data *d) { struct davinci_gpio_regs __iomem *g = irq2regs(d); uintptr_t mask = (uintptr_t)irq_data_get_irq_handler_data(d); @@ -319,8 +324,8 @@ static struct irq_chip gpio_irqchip = { .name = "GPIO", - .irq_enable = gpio_irq_enable, - .irq_disable = gpio_irq_disable, + .irq_unmask = gpio_irq_unmask, + .irq_mask = gpio_irq_mask, .irq_set_type = gpio_irq_type, .flags = IRQCHIP_SET_TYPE_MASKED | IRQCHIP_SKIP_SET_WAKE, }; --- linux-xilinx-6.8.0.orig/drivers/gpio/gpio-exar.c +++ linux-xilinx-6.8.0/drivers/gpio/gpio-exar.c @@ -99,11 +99,13 @@ struct exar_gpio_chip *exar_gpio = gpiochip_get_data(chip); unsigned int addr = exar_offset_to_lvl_addr(exar_gpio, offset); unsigned int bit = exar_offset_to_bit(exar_gpio, offset); + unsigned int bit_value = value ? BIT(bit) : 0; - if (value) - regmap_set_bits(exar_gpio->regmap, addr, BIT(bit)); - else - regmap_clear_bits(exar_gpio->regmap, addr, BIT(bit)); + /* + * regmap_write_bits() forces value to be written when an external + * pull up/down might otherwise indicate value was already set. + */ + regmap_write_bits(exar_gpio->regmap, addr, BIT(bit), bit_value); } static int exar_direction_output(struct gpio_chip *chip, unsigned int offset, --- linux-xilinx-6.8.0.orig/drivers/gpio/gpio-grgpio.c +++ linux-xilinx-6.8.0/drivers/gpio/gpio-grgpio.c @@ -328,6 +328,7 @@ static int grgpio_probe(struct platform_device *ofdev) { struct device_node *np = ofdev->dev.of_node; + struct device *dev = &ofdev->dev; void __iomem *regs; struct gpio_chip *gc; struct grgpio_priv *priv; @@ -337,7 +338,7 @@ int size; int i; - priv = devm_kzalloc(&ofdev->dev, sizeof(*priv), GFP_KERNEL); + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) return -ENOMEM; @@ -346,28 +347,31 @@ return PTR_ERR(regs); gc = &priv->gc; - err = bgpio_init(gc, &ofdev->dev, 4, regs + GRGPIO_DATA, + err = bgpio_init(gc, dev, 4, regs + GRGPIO_DATA, regs + GRGPIO_OUTPUT, NULL, regs + GRGPIO_DIR, NULL, BGPIOF_BIG_ENDIAN_BYTE_ORDER); if (err) { - dev_err(&ofdev->dev, "bgpio_init() failed\n"); + dev_err(dev, "bgpio_init() failed\n"); return err; } priv->regs = regs; priv->imask = gc->read_reg(regs + GRGPIO_IMASK); - priv->dev = &ofdev->dev; + priv->dev = dev; gc->owner = THIS_MODULE; gc->to_irq = grgpio_to_irq; - gc->label = devm_kasprintf(&ofdev->dev, GFP_KERNEL, "%pOF", np); + gc->label = devm_kasprintf(dev, GFP_KERNEL, "%pOF", np); + if (!gc->label) + return -ENOMEM; + gc->base = -1; err = of_property_read_u32(np, "nbits", &prop); if (err || prop <= 0 || prop > GRGPIO_MAX_NGPIO) { gc->ngpio = GRGPIO_MAX_NGPIO; - dev_dbg(&ofdev->dev, - "No or invalid nbits property: assume %d\n", gc->ngpio); + dev_dbg(dev, "No or invalid nbits property: assume %d\n", + gc->ngpio); } else { gc->ngpio = prop; } @@ -379,7 +383,7 @@ irqmap = (s32 *)of_get_property(np, "irqmap", &size); if (irqmap) { if (size < gc->ngpio) { - dev_err(&ofdev->dev, + dev_err(dev, "irqmap shorter than ngpio (%d < %d)\n", size, gc->ngpio); return -EINVAL; @@ -389,7 +393,7 @@ &grgpio_irq_domain_ops, priv); if (!priv->domain) { - dev_err(&ofdev->dev, "Could not add irq domain\n"); + dev_err(dev, "Could not add irq domain\n"); return -EINVAL; } @@ -419,13 +423,13 @@ err = gpiochip_add_data(gc, priv); if (err) { - dev_err(&ofdev->dev, "Could not add gpiochip\n"); + dev_err(dev, "Could not add gpiochip\n"); if (priv->domain) irq_domain_remove(priv->domain); return err; } - dev_info(&ofdev->dev, "regs=0x%p, base=%d, ngpio=%d, irqs=%s\n", + dev_info(dev, "regs=0x%p, base=%d, ngpio=%d, irqs=%s\n", priv->regs, gc->base, gc->ngpio, priv->domain ? "on" : "off"); return 0; --- linux-xilinx-6.8.0.orig/drivers/gpio/gpio-ljca.c +++ linux-xilinx-6.8.0/drivers/gpio/gpio-ljca.c @@ -82,9 +82,9 @@ int ret; mutex_lock(&ljca_gpio->trans_lock); + packet->num = 1; packet->item[0].index = gpio_id; packet->item[0].value = config | ljca_gpio->connect_mode[gpio_id]; - packet->num = 1; ret = ljca_transfer(ljca_gpio->ljca, LJCA_GPIO_CONFIG, (u8 *)packet, struct_size(packet, item, packet->num), NULL, 0); --- linux-xilinx-6.8.0.orig/drivers/gpio/gpio-loongson-64bit.c +++ linux-xilinx-6.8.0/drivers/gpio/gpio-loongson-64bit.c @@ -237,9 +237,9 @@ static const struct loongson_gpio_chip_data loongson_gpio_ls2k2000_data2 = { .label = "ls2k2000_gpio", .mode = BIT_CTRL_MODE, - .conf_offset = 0x84, - .in_offset = 0x88, - .out_offset = 0x80, + .conf_offset = 0x4, + .in_offset = 0x8, + .out_offset = 0x0, }; static const struct loongson_gpio_chip_data loongson_gpio_ls3a5000_data = { --- linux-xilinx-6.8.0.orig/drivers/gpio/gpio-lpc32xx.c +++ linux-xilinx-6.8.0/drivers/gpio/gpio-lpc32xx.c @@ -529,6 +529,7 @@ { .compatible = "nxp,lpc3220-gpio", }, { }, }; +MODULE_DEVICE_TABLE(of, lpc32xx_gpio_of_match); static struct platform_driver lpc32xx_gpio_driver = { .driver = { --- linux-xilinx-6.8.0.orig/drivers/gpio/gpio-mlxbf3.c +++ linux-xilinx-6.8.0/drivers/gpio/gpio-mlxbf3.c @@ -39,6 +39,8 @@ #define MLXBF_GPIO_CAUSE_OR_EVTEN0 0x14 #define MLXBF_GPIO_CAUSE_OR_CLRCAUSE 0x18 +#define MLXBF_GPIO_CLR_ALL_INTS GENMASK(31, 0) + struct mlxbf3_gpio_context { struct gpio_chip gc; @@ -82,6 +84,8 @@ val = readl(gs->gpio_cause_io + MLXBF_GPIO_CAUSE_OR_EVTEN0); val &= ~BIT(offset); writel(val, gs->gpio_cause_io + MLXBF_GPIO_CAUSE_OR_EVTEN0); + + writel(BIT(offset), gs->gpio_cause_io + MLXBF_GPIO_CAUSE_OR_CLRCAUSE); raw_spin_unlock_irqrestore(&gs->gc.bgpio_lock, flags); gpiochip_disable_irq(gc, offset); @@ -253,6 +257,15 @@ return 0; } +static void mlxbf3_gpio_shutdown(struct platform_device *pdev) +{ + struct mlxbf3_gpio_context *gs = platform_get_drvdata(pdev); + + /* Disable and clear all interrupts */ + writel(0, gs->gpio_cause_io + MLXBF_GPIO_CAUSE_OR_EVTEN0); + writel(MLXBF_GPIO_CLR_ALL_INTS, gs->gpio_cause_io + MLXBF_GPIO_CAUSE_OR_CLRCAUSE); +} + static const struct acpi_device_id mlxbf3_gpio_acpi_match[] = { { "MLNXBF33", 0 }, {} @@ -265,6 +278,7 @@ .acpi_match_table = mlxbf3_gpio_acpi_match, }, .probe = mlxbf3_gpio_probe, + .shutdown = mlxbf3_gpio_shutdown, }; module_platform_driver(mlxbf3_gpio_driver); --- linux-xilinx-6.8.0.orig/drivers/gpio/gpio-mmio.c +++ linux-xilinx-6.8.0/drivers/gpio/gpio-mmio.c @@ -619,8 +619,6 @@ ret = gpiochip_get_ngpios(gc, dev); if (ret) gc->ngpio = gc->bgpio_bits; - else - gc->bgpio_bits = roundup_pow_of_two(round_up(gc->ngpio, 8)); ret = bgpio_setup_io(gc, dat, set, clr, flags); if (ret) --- linux-xilinx-6.8.0.orig/drivers/gpio/gpio-mxc.c +++ linux-xilinx-6.8.0/drivers/gpio/gpio-mxc.c @@ -490,8 +490,7 @@ port->gc.request = mxc_gpio_request; port->gc.free = mxc_gpio_free; port->gc.to_irq = mxc_gpio_to_irq; - port->gc.base = (pdev->id < 0) ? of_alias_get_id(np, "gpio") * 32 : - pdev->id * 32; + port->gc.base = of_alias_get_id(np, "gpio") * 32; err = devm_gpiochip_add_data(&pdev->dev, &port->gc, port); if (err) --- linux-xilinx-6.8.0.orig/drivers/gpio/gpio-npcm-sgpio.c +++ linux-xilinx-6.8.0/drivers/gpio/gpio-npcm-sgpio.c @@ -434,7 +434,7 @@ struct gpio_chip *gc = irq_desc_get_handler_data(desc); struct irq_chip *ic = irq_desc_get_chip(desc); struct npcm_sgpio *gpio = gpiochip_get_data(gc); - unsigned int i, j, girq; + unsigned int i, j; unsigned long reg; chained_irq_enter(ic, desc); @@ -443,11 +443,9 @@ const struct npcm_sgpio_bank *bank = &npcm_sgpio_banks[i]; reg = ioread8(bank_reg(gpio, bank, EVENT_STS)); - for_each_set_bit(j, ®, 8) { - girq = irq_find_mapping(gc->irq.domain, - i * 8 + gpio->nout_sgpio + j); - generic_handle_domain_irq(gc->irq.domain, girq); - } + for_each_set_bit(j, ®, 8) + generic_handle_domain_irq(gc->irq.domain, + i * 8 + gpio->nout_sgpio + j); } chained_irq_exit(ic, desc); --- linux-xilinx-6.8.0.orig/drivers/gpio/gpio-pca953x.c +++ linux-xilinx-6.8.0/drivers/gpio/gpio-pca953x.c @@ -758,6 +758,8 @@ int level; if (chip->driver_data & PCA_PCAL) { + guard(mutex)(&chip->i2c_lock); + /* Enable latch on interrupt-enabled inputs */ pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask); @@ -839,25 +841,6 @@ DECLARE_BITMAP(trigger, MAX_LINE); int ret; - if (chip->driver_data & PCA_PCAL) { - /* Read the current interrupt status from the device */ - ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger); - if (ret) - return false; - - /* Check latched inputs and clear interrupt status */ - ret = pca953x_read_regs(chip, chip->regs->input, cur_stat); - if (ret) - return false; - - /* Apply filter for rising/falling edge selection */ - bitmap_replace(new_stat, chip->irq_trig_fall, chip->irq_trig_raise, cur_stat, gc->ngpio); - - bitmap_and(pending, new_stat, trigger, gc->ngpio); - - return !bitmap_empty(pending, gc->ngpio); - } - ret = pca953x_read_regs(chip, chip->regs->input, cur_stat); if (ret) return false; @@ -1086,7 +1069,8 @@ */ reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); if (IS_ERR(reset_gpio)) - return PTR_ERR(reset_gpio); + return dev_err_probe(dev, PTR_ERR(reset_gpio), + "Failed to get reset gpio\n"); } chip->client = client; --- linux-xilinx-6.8.0.orig/drivers/gpio/gpio-rockchip.c +++ linux-xilinx-6.8.0/drivers/gpio/gpio-rockchip.c @@ -713,6 +713,7 @@ return -ENODEV; pctldev = of_pinctrl_get(pctlnp); + of_node_put(pctlnp); if (!pctldev) return -EPROBE_DEFER; --- linux-xilinx-6.8.0.orig/drivers/gpio/gpio-sim.c +++ linux-xilinx-6.8.0/drivers/gpio/gpio-sim.c @@ -1009,6 +1009,33 @@ dev->pdev = NULL; } +static void +gpio_sim_device_lockup_configfs(struct gpio_sim_device *dev, bool lock) +{ + struct configfs_subsystem *subsys = dev->group.cg_subsys; + struct gpio_sim_bank *bank; + struct gpio_sim_line *line; + struct config_item *item; + + /* + * The device only needs to depend on leaf entries. This is + * sufficient to lock up all the configfs entries that the + * instantiated, alive device depends on. + */ + list_for_each_entry(bank, &dev->bank_list, siblings) { + list_for_each_entry(line, &bank->line_list, siblings) { + item = line->hog ? &line->hog->item + : &line->group.cg_item; + + if (lock) + WARN_ON(configfs_depend_item_unlocked(subsys, + item)); + else + configfs_undepend_item_unlocked(item); + } + } +} + static ssize_t gpio_sim_device_config_live_store(struct config_item *item, const char *page, size_t count) @@ -1021,14 +1048,24 @@ if (ret) return ret; - guard(mutex)(&dev->lock); + if (live) + gpio_sim_device_lockup_configfs(dev, true); + + scoped_guard(mutex, &dev->lock) { + if (live == gpio_sim_device_is_live_unlocked(dev)) + ret = -EPERM; + else if (live) + ret = gpio_sim_device_activate_unlocked(dev); + else + gpio_sim_device_deactivate_unlocked(dev); + } - if (live == gpio_sim_device_is_live_unlocked(dev)) - ret = -EPERM; - else if (live) - ret = gpio_sim_device_activate_unlocked(dev); - else - gpio_sim_device_deactivate_unlocked(dev); + /* + * Undepend is required only if device disablement (live == 0) + * succeeds or if device enablement (live == 1) fails. + */ + if (live == !!ret) + gpio_sim_device_lockup_configfs(dev, false); return ret ?: count; } --- linux-xilinx-6.8.0.orig/drivers/gpio/gpio-stmpe.c +++ linux-xilinx-6.8.0/drivers/gpio/gpio-stmpe.c @@ -192,7 +192,7 @@ [REG_IE][CSB] = STMPE_IDX_IEGPIOR_CSB, [REG_IE][MSB] = STMPE_IDX_IEGPIOR_MSB, }; - int i, j; + int ret, i, j; /* * STMPE1600: to be able to get IRQ from pins, @@ -200,8 +200,16 @@ * GPSR or GPCR registers */ if (stmpe->partnum == STMPE1600) { - stmpe_reg_read(stmpe, stmpe->regs[STMPE_IDX_GPMR_LSB]); - stmpe_reg_read(stmpe, stmpe->regs[STMPE_IDX_GPMR_CSB]); + ret = stmpe_reg_read(stmpe, stmpe->regs[STMPE_IDX_GPMR_LSB]); + if (ret < 0) { + dev_err(stmpe->dev, "Failed to read GPMR_LSB: %d\n", ret); + goto err; + } + ret = stmpe_reg_read(stmpe, stmpe->regs[STMPE_IDX_GPMR_CSB]); + if (ret < 0) { + dev_err(stmpe->dev, "Failed to read GPMR_CSB: %d\n", ret); + goto err; + } } for (i = 0; i < CACHE_NR_REGS; i++) { @@ -223,6 +231,7 @@ } } +err: mutex_unlock(&stmpe_gpio->irq_lock); } --- linux-xilinx-6.8.0.orig/drivers/gpio/gpio-tangier.c +++ linux-xilinx-6.8.0/drivers/gpio/gpio-tangier.c @@ -195,7 +195,8 @@ static void tng_irq_ack(struct irq_data *d) { - struct tng_gpio *priv = irq_data_get_irq_chip_data(d); + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct tng_gpio *priv = gpiochip_get_data(gc); irq_hw_number_t gpio = irqd_to_hwirq(d); void __iomem *gisr; u8 shift; @@ -227,7 +228,8 @@ static void tng_irq_mask(struct irq_data *d) { - struct tng_gpio *priv = irq_data_get_irq_chip_data(d); + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct tng_gpio *priv = gpiochip_get_data(gc); irq_hw_number_t gpio = irqd_to_hwirq(d); tng_irq_unmask_mask(priv, gpio, false); @@ -236,7 +238,8 @@ static void tng_irq_unmask(struct irq_data *d) { - struct tng_gpio *priv = irq_data_get_irq_chip_data(d); + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct tng_gpio *priv = gpiochip_get_data(gc); irq_hw_number_t gpio = irqd_to_hwirq(d); gpiochip_enable_irq(&priv->chip, gpio); --- linux-xilinx-6.8.0.orig/drivers/gpio/gpio-tegra186.c +++ linux-xilinx-6.8.0/drivers/gpio/gpio-tegra186.c @@ -36,12 +36,6 @@ #define TEGRA186_GPIO_SCR_SEC_REN BIT(27) #define TEGRA186_GPIO_SCR_SEC_G1W BIT(9) #define TEGRA186_GPIO_SCR_SEC_G1R BIT(1) -#define TEGRA186_GPIO_FULL_ACCESS (TEGRA186_GPIO_SCR_SEC_WEN | \ - TEGRA186_GPIO_SCR_SEC_REN | \ - TEGRA186_GPIO_SCR_SEC_G1R | \ - TEGRA186_GPIO_SCR_SEC_G1W) -#define TEGRA186_GPIO_SCR_SEC_ENABLE (TEGRA186_GPIO_SCR_SEC_WEN | \ - TEGRA186_GPIO_SCR_SEC_REN) /* control registers */ #define TEGRA186_GPIO_ENABLE_CONFIG 0x00 @@ -177,10 +171,18 @@ value = __raw_readl(secure + TEGRA186_GPIO_SCR); - if ((value & TEGRA186_GPIO_SCR_SEC_ENABLE) == 0) - return true; - - if ((value & TEGRA186_GPIO_FULL_ACCESS) == TEGRA186_GPIO_FULL_ACCESS) + /* + * When SCR_SEC_[R|W]EN is unset, then we have full read/write access to all the + * registers for given GPIO pin. + * When SCR_SEC[R|W]EN is set, then there is need to further check the accompanying + * SCR_SEC_G1[R|W] bit to determine read/write access to all the registers for given + * GPIO pin. + */ + + if (((value & TEGRA186_GPIO_SCR_SEC_REN) == 0 || + ((value & TEGRA186_GPIO_SCR_SEC_REN) && (value & TEGRA186_GPIO_SCR_SEC_G1R))) && + ((value & TEGRA186_GPIO_SCR_SEC_WEN) == 0 || + ((value & TEGRA186_GPIO_SCR_SEC_WEN) && (value & TEGRA186_GPIO_SCR_SEC_G1W)))) return true; return false; --- linux-xilinx-6.8.0.orig/drivers/gpio/gpio-tqmx86.c +++ linux-xilinx-6.8.0/drivers/gpio/gpio-tqmx86.c @@ -6,6 +6,7 @@ * Vadim V.Vlasov */ +#include #include #include #include @@ -28,16 +29,25 @@ #define TQMX86_GPIIC 3 /* GPI Interrupt Configuration Register */ #define TQMX86_GPIIS 4 /* GPI Interrupt Status Register */ +#define TQMX86_GPII_NONE 0 #define TQMX86_GPII_FALLING BIT(0) #define TQMX86_GPII_RISING BIT(1) +/* Stored in irq_type as a trigger type, but not actually valid as a register + * value, so the name doesn't use "GPII" + */ +#define TQMX86_INT_BOTH (BIT(0) | BIT(1)) #define TQMX86_GPII_MASK (BIT(0) | BIT(1)) #define TQMX86_GPII_BITS 2 +/* Stored in irq_type with GPII bits */ +#define TQMX86_INT_UNMASKED BIT(2) struct tqmx86_gpio_data { struct gpio_chip chip; void __iomem *io_base; int irq; + /* Lock must be held for accessing output and irq_type fields */ raw_spinlock_t spinlock; + DECLARE_BITMAP(output, TQMX86_NGPIO); u8 irq_type[TQMX86_NGPI]; }; @@ -64,15 +74,10 @@ { struct tqmx86_gpio_data *gpio = gpiochip_get_data(chip); unsigned long flags; - u8 val; raw_spin_lock_irqsave(&gpio->spinlock, flags); - val = tqmx86_gpio_read(gpio, TQMX86_GPIOD); - if (value) - val |= BIT(offset); - else - val &= ~BIT(offset); - tqmx86_gpio_write(gpio, val, TQMX86_GPIOD); + __assign_bit(offset, gpio->output, value); + tqmx86_gpio_write(gpio, bitmap_get_value8(gpio->output, 0), TQMX86_GPIOD); raw_spin_unlock_irqrestore(&gpio->spinlock, flags); } @@ -107,21 +112,38 @@ return GPIO_LINE_DIRECTION_OUT; } +static void tqmx86_gpio_irq_config(struct tqmx86_gpio_data *gpio, int offset) + __must_hold(&gpio->spinlock) +{ + u8 type = TQMX86_GPII_NONE, gpiic; + + if (gpio->irq_type[offset] & TQMX86_INT_UNMASKED) { + type = gpio->irq_type[offset] & TQMX86_GPII_MASK; + + if (type == TQMX86_INT_BOTH) + type = tqmx86_gpio_get(&gpio->chip, offset + TQMX86_NGPO) + ? TQMX86_GPII_FALLING + : TQMX86_GPII_RISING; + } + + gpiic = tqmx86_gpio_read(gpio, TQMX86_GPIIC); + gpiic &= ~(TQMX86_GPII_MASK << (offset * TQMX86_GPII_BITS)); + gpiic |= type << (offset * TQMX86_GPII_BITS); + tqmx86_gpio_write(gpio, gpiic, TQMX86_GPIIC); +} + static void tqmx86_gpio_irq_mask(struct irq_data *data) { unsigned int offset = (data->hwirq - TQMX86_NGPO); struct tqmx86_gpio_data *gpio = gpiochip_get_data( irq_data_get_irq_chip_data(data)); unsigned long flags; - u8 gpiic, mask; - - mask = TQMX86_GPII_MASK << (offset * TQMX86_GPII_BITS); raw_spin_lock_irqsave(&gpio->spinlock, flags); - gpiic = tqmx86_gpio_read(gpio, TQMX86_GPIIC); - gpiic &= ~mask; - tqmx86_gpio_write(gpio, gpiic, TQMX86_GPIIC); + gpio->irq_type[offset] &= ~TQMX86_INT_UNMASKED; + tqmx86_gpio_irq_config(gpio, offset); raw_spin_unlock_irqrestore(&gpio->spinlock, flags); + gpiochip_disable_irq(&gpio->chip, irqd_to_hwirq(data)); } @@ -131,16 +153,12 @@ struct tqmx86_gpio_data *gpio = gpiochip_get_data( irq_data_get_irq_chip_data(data)); unsigned long flags; - u8 gpiic, mask; - - mask = TQMX86_GPII_MASK << (offset * TQMX86_GPII_BITS); gpiochip_enable_irq(&gpio->chip, irqd_to_hwirq(data)); + raw_spin_lock_irqsave(&gpio->spinlock, flags); - gpiic = tqmx86_gpio_read(gpio, TQMX86_GPIIC); - gpiic &= ~mask; - gpiic |= gpio->irq_type[offset] << (offset * TQMX86_GPII_BITS); - tqmx86_gpio_write(gpio, gpiic, TQMX86_GPIIC); + gpio->irq_type[offset] |= TQMX86_INT_UNMASKED; + tqmx86_gpio_irq_config(gpio, offset); raw_spin_unlock_irqrestore(&gpio->spinlock, flags); } @@ -151,7 +169,7 @@ unsigned int offset = (data->hwirq - TQMX86_NGPO); unsigned int edge_type = type & IRQF_TRIGGER_MASK; unsigned long flags; - u8 new_type, gpiic; + u8 new_type; switch (edge_type) { case IRQ_TYPE_EDGE_RISING: @@ -161,19 +179,16 @@ new_type = TQMX86_GPII_FALLING; break; case IRQ_TYPE_EDGE_BOTH: - new_type = TQMX86_GPII_FALLING | TQMX86_GPII_RISING; + new_type = TQMX86_INT_BOTH; break; default: return -EINVAL; /* not supported */ } - gpio->irq_type[offset] = new_type; - raw_spin_lock_irqsave(&gpio->spinlock, flags); - gpiic = tqmx86_gpio_read(gpio, TQMX86_GPIIC); - gpiic &= ~((TQMX86_GPII_MASK) << (offset * TQMX86_GPII_BITS)); - gpiic |= new_type << (offset * TQMX86_GPII_BITS); - tqmx86_gpio_write(gpio, gpiic, TQMX86_GPIIC); + gpio->irq_type[offset] &= ~TQMX86_GPII_MASK; + gpio->irq_type[offset] |= new_type; + tqmx86_gpio_irq_config(gpio, offset); raw_spin_unlock_irqrestore(&gpio->spinlock, flags); return 0; @@ -184,8 +199,8 @@ struct gpio_chip *chip = irq_desc_get_handler_data(desc); struct tqmx86_gpio_data *gpio = gpiochip_get_data(chip); struct irq_chip *irq_chip = irq_desc_get_chip(desc); - unsigned long irq_bits; - int i = 0; + unsigned long irq_bits, flags; + int i; u8 irq_status; chained_irq_enter(irq_chip, desc); @@ -194,6 +209,34 @@ tqmx86_gpio_write(gpio, irq_status, TQMX86_GPIIS); irq_bits = irq_status; + + raw_spin_lock_irqsave(&gpio->spinlock, flags); + for_each_set_bit(i, &irq_bits, TQMX86_NGPI) { + /* + * Edge-both triggers are implemented by flipping the edge + * trigger after each interrupt, as the controller only supports + * either rising or falling edge triggers, but not both. + * + * Internally, the TQMx86 GPIO controller has separate status + * registers for rising and falling edge interrupts. GPIIC + * configures which bits from which register are visible in the + * interrupt status register GPIIS and defines what triggers the + * parent IRQ line. Writing to GPIIS always clears both rising + * and falling interrupt flags internally, regardless of the + * currently configured trigger. + * + * In consequence, we can cleanly implement the edge-both + * trigger in software by first clearing the interrupt and then + * setting the new trigger based on the current GPIO input in + * tqmx86_gpio_irq_config() - even if an edge arrives between + * reading the input and setting the trigger, we will have a new + * interrupt pending. + */ + if ((gpio->irq_type[i] & TQMX86_GPII_MASK) == TQMX86_INT_BOTH) + tqmx86_gpio_irq_config(gpio, i); + } + raw_spin_unlock_irqrestore(&gpio->spinlock, flags); + for_each_set_bit(i, &irq_bits, TQMX86_NGPI) generic_handle_domain_irq(gpio->chip.irq.domain, i + TQMX86_NGPO); @@ -277,6 +320,13 @@ tqmx86_gpio_write(gpio, (u8)~TQMX86_DIR_INPUT_MASK, TQMX86_GPIODD); + /* + * Reading the previous output state is not possible with TQMx86 hardware. + * Initialize all outputs to 0 to have a defined state that matches the + * shadow register. + */ + tqmx86_gpio_write(gpio, 0, TQMX86_GPIOD); + chip = &gpio->chip; chip->label = "gpio-tqmx86"; chip->owner = THIS_MODULE; --- linux-xilinx-6.8.0.orig/drivers/gpio/gpio-wcove.c +++ linux-xilinx-6.8.0/drivers/gpio/gpio-wcove.c @@ -104,7 +104,7 @@ unsigned int reg = type == CTRL_IN ? GPIO_IN_CTRL_BASE : GPIO_OUT_CTRL_BASE; if (gpio >= WCOVE_GPIO_NUM) - return -EOPNOTSUPP; + return -ENOTSUPP; return reg + gpio; } --- linux-xilinx-6.8.0.orig/drivers/gpio/gpio-xilinx.c +++ linux-xilinx-6.8.0/drivers/gpio/gpio-xilinx.c @@ -65,7 +65,7 @@ DECLARE_BITMAP(state, 64); DECLARE_BITMAP(last_irq_read, 64); DECLARE_BITMAP(dir, 64); - spinlock_t gpio_lock; /* For serializing operations */ + raw_spinlock_t gpio_lock; /* For serializing operations */ int irq; DECLARE_BITMAP(enable, 64); DECLARE_BITMAP(rising_edge, 64); @@ -179,14 +179,14 @@ struct xgpio_instance *chip = gpiochip_get_data(gc); int bit = xgpio_to_bit(chip, gpio); - spin_lock_irqsave(&chip->gpio_lock, flags); + raw_spin_lock_irqsave(&chip->gpio_lock, flags); /* Write to GPIO signal and set its direction to output */ __assign_bit(bit, chip->state, val); xgpio_write_ch(chip, XGPIO_DATA_OFFSET, bit, chip->state); - spin_unlock_irqrestore(&chip->gpio_lock, flags); + raw_spin_unlock_irqrestore(&chip->gpio_lock, flags); } /** @@ -210,7 +210,7 @@ bitmap_remap(hw_mask, mask, chip->sw_map, chip->hw_map, 64); bitmap_remap(hw_bits, bits, chip->sw_map, chip->hw_map, 64); - spin_lock_irqsave(&chip->gpio_lock, flags); + raw_spin_lock_irqsave(&chip->gpio_lock, flags); bitmap_replace(state, chip->state, hw_bits, hw_mask, 64); @@ -218,7 +218,7 @@ bitmap_copy(chip->state, state, 64); - spin_unlock_irqrestore(&chip->gpio_lock, flags); + raw_spin_unlock_irqrestore(&chip->gpio_lock, flags); } /** @@ -236,13 +236,13 @@ struct xgpio_instance *chip = gpiochip_get_data(gc); int bit = xgpio_to_bit(chip, gpio); - spin_lock_irqsave(&chip->gpio_lock, flags); + raw_spin_lock_irqsave(&chip->gpio_lock, flags); /* Set the GPIO bit in shadow register and set direction as input */ __set_bit(bit, chip->dir); xgpio_write_ch(chip, XGPIO_TRI_OFFSET, bit, chip->dir); - spin_unlock_irqrestore(&chip->gpio_lock, flags); + raw_spin_unlock_irqrestore(&chip->gpio_lock, flags); return 0; } @@ -265,7 +265,7 @@ struct xgpio_instance *chip = gpiochip_get_data(gc); int bit = xgpio_to_bit(chip, gpio); - spin_lock_irqsave(&chip->gpio_lock, flags); + raw_spin_lock_irqsave(&chip->gpio_lock, flags); /* Write state of GPIO signal */ __assign_bit(bit, chip->state, val); @@ -275,7 +275,7 @@ __clear_bit(bit, chip->dir); xgpio_write_ch(chip, XGPIO_TRI_OFFSET, bit, chip->dir); - spin_unlock_irqrestore(&chip->gpio_lock, flags); + raw_spin_unlock_irqrestore(&chip->gpio_lock, flags); return 0; } @@ -401,7 +401,7 @@ int bit = xgpio_to_bit(chip, irq_offset); u32 mask = BIT(bit / 32), temp; - spin_lock_irqsave(&chip->gpio_lock, flags); + raw_spin_lock_irqsave(&chip->gpio_lock, flags); __clear_bit(bit, chip->enable); @@ -411,7 +411,7 @@ temp &= ~mask; xgpio_writereg(chip->regs + XGPIO_IPIER_OFFSET, temp); } - spin_unlock_irqrestore(&chip->gpio_lock, flags); + raw_spin_unlock_irqrestore(&chip->gpio_lock, flags); gpiochip_disable_irq(&chip->gc, irq_offset); } @@ -431,7 +431,7 @@ gpiochip_enable_irq(&chip->gc, irq_offset); - spin_lock_irqsave(&chip->gpio_lock, flags); + raw_spin_lock_irqsave(&chip->gpio_lock, flags); __set_bit(bit, chip->enable); @@ -450,7 +450,7 @@ xgpio_writereg(chip->regs + XGPIO_IPIER_OFFSET, val); } - spin_unlock_irqrestore(&chip->gpio_lock, flags); + raw_spin_unlock_irqrestore(&chip->gpio_lock, flags); } /** @@ -515,7 +515,7 @@ chained_irq_enter(irqchip, desc); - spin_lock(&chip->gpio_lock); + raw_spin_lock(&chip->gpio_lock); xgpio_read_ch_all(chip, XGPIO_DATA_OFFSET, all); @@ -532,7 +532,7 @@ bitmap_copy(chip->last_irq_read, all, 64); bitmap_or(all, rising, falling, 64); - spin_unlock(&chip->gpio_lock); + raw_spin_unlock(&chip->gpio_lock); dev_dbg(gc->parent, "IRQ rising %*pb falling %*pb\n", 64, rising, 64, falling); @@ -623,7 +623,7 @@ bitmap_set(chip->hw_map, 0, width[0]); bitmap_set(chip->hw_map, 32, width[1]); - spin_lock_init(&chip->gpio_lock); + raw_spin_lock_init(&chip->gpio_lock); chip->gc.base = -1; chip->gc.ngpio = bitmap_weight(chip->hw_map, 64); --- linux-xilinx-6.8.0.orig/drivers/gpio/gpio-zevio.c +++ linux-xilinx-6.8.0/drivers/gpio/gpio-zevio.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include @@ -169,6 +170,7 @@ /* Initialization */ static int zevio_gpio_probe(struct platform_device *pdev) { + struct device *dev = &pdev->dev; struct zevio_gpio *controller; int status, i; @@ -180,6 +182,10 @@ controller->chip = zevio_gpio_chip; controller->chip.parent = &pdev->dev; + controller->chip.label = devm_kasprintf(dev, GFP_KERNEL, "%pfw", dev_fwnode(dev)); + if (!controller->chip.label) + return -ENOMEM; + controller->regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(controller->regs)) return dev_err_probe(&pdev->dev, PTR_ERR(controller->regs), --- linux-xilinx-6.8.0.orig/drivers/gpio/gpio-zynqmp-modepin.c +++ linux-xilinx-6.8.0/drivers/gpio/gpio-zynqmp-modepin.c @@ -146,6 +146,7 @@ { .compatible = "xlnx,zynqmp-gpio-modepin", }, { } }; +MODULE_DEVICE_TABLE(of, modepin_platform_id); static struct platform_driver modepin_platform_driver = { .driver = { --- linux-xilinx-6.8.0.orig/drivers/gpio/gpiolib-acpi.c +++ linux-xilinx-6.8.0/drivers/gpio/gpiolib-acpi.c @@ -128,7 +128,24 @@ static int acpi_gpiochip_find(struct gpio_chip *gc, void *data) { - return device_match_acpi_handle(&gc->gpiodev->dev, data); + /* First check the actual GPIO device */ + if (device_match_acpi_handle(&gc->gpiodev->dev, data)) + return true; + + /* + * When the ACPI device is artificially split to the banks of GPIOs, + * where each of them is represented by a separate GPIO device, + * the firmware node of the physical device may not be shared among + * the banks as they may require different values for the same property, + * e.g., number of GPIOs in a certain bank. In such case the ACPI handle + * of a GPIO device is NULL and can not be used. Hence we have to check + * the parent device to be sure that there is no match before bailing + * out. + */ + if (gc->parent) + return device_match_acpi_handle(gc->parent, data); + + return false; } /** @@ -1665,6 +1682,20 @@ .ignore_wake = "PNP0C50:00@8", }, }, + { + /* + * Spurious wakeups from GPIO 11 + * Found in BIOS 1.04 + * https://gitlab.freedesktop.org/drm/amd/-/issues/3954 + */ + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Acer"), + DMI_MATCH(DMI_PRODUCT_FAMILY, "Acer Nitro V 14"), + }, + .driver_data = &(struct acpi_gpiolib_dmi_quirk) { + .ignore_interrupt = "AMDI0030:00@11", + }, + }, {} /* Terminating entry */ }; --- linux-xilinx-6.8.0.orig/drivers/gpio/gpiolib-cdev.c +++ linux-xilinx-6.8.0/drivers/gpio/gpiolib-cdev.c @@ -95,6 +95,10 @@ GPIOHANDLE_REQUEST_OPEN_DRAIN | \ GPIOHANDLE_REQUEST_OPEN_SOURCE) +#define GPIOHANDLE_REQUEST_DIRECTION_FLAGS \ + (GPIOHANDLE_REQUEST_INPUT | \ + GPIOHANDLE_REQUEST_OUTPUT) + static int linehandle_validate_flags(u32 flags) { /* Return an error if an unknown flag is set */ @@ -175,21 +179,21 @@ if (ret) return ret; + /* Lines must be reconfigured explicitly as input or output. */ + if (!(lflags & GPIOHANDLE_REQUEST_DIRECTION_FLAGS)) + return -EINVAL; + for (i = 0; i < lh->num_descs; i++) { desc = lh->descs[i]; - linehandle_flags_to_desc_flags(gcnf.flags, &desc->flags); + linehandle_flags_to_desc_flags(lflags, &desc->flags); - /* - * Lines have to be requested explicitly for input - * or output, else the line will be treated "as is". - */ if (lflags & GPIOHANDLE_REQUEST_OUTPUT) { int val = !!gcnf.default_values[i]; ret = gpiod_direction_output(desc, val); if (ret) return ret; - } else if (lflags & GPIOHANDLE_REQUEST_INPUT) { + } else { ret = gpiod_direction_input(desc); if (ret) return ret; @@ -734,6 +738,25 @@ GPIO_V2_LINE_EVENT_FALLING_EDGE; } +static inline char *make_irq_label(const char *orig) +{ + char *new; + + if (!orig) + return NULL; + + new = kstrdup_and_replace(orig, '/', ':', GFP_KERNEL); + if (!new) + return ERR_PTR(-ENOMEM); + + return new; +} + +static inline void free_irq_label(const char *label) +{ + kfree(label); +} + #ifdef CONFIG_HTE static enum hte_return process_hw_ts_thread(void *p) @@ -1021,6 +1044,7 @@ { unsigned long irqflags; int ret, level, irq; + char *label; /* try hardware */ ret = gpiod_set_debounce(line->desc, debounce_period_us); @@ -1043,11 +1067,17 @@ if (irq < 0) return -ENXIO; + label = make_irq_label(line->req->label); + if (IS_ERR(label)) + return -ENOMEM; + irqflags = IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING; ret = request_irq(irq, debounce_irq_handler, irqflags, - line->req->label, line); - if (ret) + label, line); + if (ret) { + free_irq_label(label); return ret; + } line->irq = irq; } else { ret = hte_edge_setup(line, GPIO_V2_LINE_FLAG_EDGE_BOTH); @@ -1092,7 +1122,7 @@ static void edge_detector_stop(struct line *line) { if (line->irq) { - free_irq(line->irq, line); + free_irq_label(free_irq(line->irq, line)); line->irq = 0; } @@ -1116,6 +1146,7 @@ unsigned long irqflags = 0; u64 eflags; int irq, ret; + char *label; eflags = edflags & GPIO_V2_LINE_EDGE_FLAGS; if (eflags && !kfifo_initialized(&line->req->events)) { @@ -1152,11 +1183,17 @@ IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING; irqflags |= IRQF_ONESHOT; + label = make_irq_label(line->req->label); + if (IS_ERR(label)) + return PTR_ERR(label); + /* Request a thread to read the events */ ret = request_threaded_irq(irq, edge_irq_handler, edge_irq_thread, - irqflags, line->req->label, line); - if (ret) + irqflags, label, line); + if (ret) { + free_irq_label(label); return ret; + } line->irq = irq; return 0; @@ -1166,6 +1203,8 @@ struct gpio_v2_line_config *lc, unsigned int line_idx, u64 edflags) { + u64 eflags; + int ret; u64 active_edflags = READ_ONCE(line->edflags); unsigned int debounce_period_us = gpio_v2_line_config_debounce_period(lc, line_idx); @@ -1177,6 +1216,18 @@ /* sw debounced and still will be...*/ if (debounce_period_us && READ_ONCE(line->sw_debounced)) { line_set_debounce_period(line, debounce_period_us); + /* + * ensure event fifo is initialised if edge detection + * is now enabled. + */ + eflags = edflags & GPIO_V2_LINE_EDGE_FLAGS; + if (eflags && !kfifo_initialized(&line->req->events)) { + ret = kfifo_alloc(&line->req->events, + line->req->event_buffer_size, + GFP_KERNEL); + if (ret) + return ret; + } return 0; } @@ -1489,12 +1540,14 @@ line = &lr->lines[i]; desc = lr->lines[i].desc; flags = gpio_v2_line_config_flags(&lc, i); - gpio_v2_line_config_flags_to_desc_flags(flags, &desc->flags); - edflags = flags & GPIO_V2_LINE_EDGE_DETECTOR_FLAGS; /* - * Lines have to be requested explicitly for input - * or output, else the line will be treated "as is". + * Lines not explicitly reconfigured as input or output + * are left unchanged. */ + if (!(flags & GPIO_V2_LINE_DIRECTION_FLAGS)) + continue; + gpio_v2_line_config_flags_to_desc_flags(flags, &desc->flags); + edflags = flags & GPIO_V2_LINE_EDGE_DETECTOR_FLAGS; if (flags & GPIO_V2_LINE_FLAG_OUTPUT) { int val = gpio_v2_line_config_output_value(&lc, i); @@ -1502,7 +1555,7 @@ ret = gpiod_direction_output(desc, val); if (ret) return ret; - } else if (flags & GPIO_V2_LINE_FLAG_INPUT) { + } else { ret = gpiod_direction_input(desc); if (ret) return ret; @@ -1979,7 +2032,7 @@ blocking_notifier_chain_unregister(&le->gdev->device_notifier, &le->device_unregistered_nb); if (le->irq) - free_irq(le->irq, le); + free_irq_label(free_irq(le->irq, le)); if (le->desc) gpiod_free(le->desc); kfree(le->label); @@ -2120,6 +2173,7 @@ int fd; int ret; int irq, irqflags = 0; + char *label; if (copy_from_user(&eventreq, ip, sizeof(eventreq))) return -EFAULT; @@ -2204,15 +2258,23 @@ if (ret) goto out_free_le; + label = make_irq_label(le->label); + if (IS_ERR(label)) { + ret = PTR_ERR(label); + goto out_free_le; + } + /* Request a thread to read the events */ ret = request_threaded_irq(irq, lineevent_irq_handler, lineevent_irq_thread, irqflags, - le->label, + label, le); - if (ret) + if (ret) { + free_irq_label(label); goto out_free_le; + } le->irq = irq; @@ -2758,11 +2820,11 @@ struct gpio_chardev_data *cdev = file->private_data; struct gpio_device *gdev = cdev->gdev; - bitmap_free(cdev->watched_lines); blocking_notifier_chain_unregister(&gdev->device_notifier, &cdev->device_unregistered_nb); blocking_notifier_chain_unregister(&gdev->line_state_notifier, &cdev->lineinfo_changed_nb); + bitmap_free(cdev->watched_lines); gpio_device_put(gdev); kfree(cdev); --- linux-xilinx-6.8.0.orig/drivers/gpio/gpiolib-devres.c +++ linux-xilinx-6.8.0/drivers/gpio/gpiolib-devres.c @@ -158,7 +158,7 @@ if (!dr) return ERR_PTR(-ENOMEM); - desc = fwnode_gpiod_get_index(fwnode, con_id, index, flags, label); + desc = gpiod_find_and_request(dev, fwnode, con_id, index, flags, label, false); if (IS_ERR(desc)) { devres_free(dr); return desc; --- linux-xilinx-6.8.0.orig/drivers/gpio/gpiolib-of.c +++ linux-xilinx-6.8.0/drivers/gpio/gpiolib-of.c @@ -202,6 +202,24 @@ */ { "qi,lb60", "rb-gpios", true }, #endif +#if IS_ENABLED(CONFIG_PCI_LANTIQ) + /* + * According to the PCI specification, the RST# pin is an + * active-low signal. However, most of the device trees that + * have been widely used for a long time incorrectly describe + * reset GPIO as active-high, and were also using wrong name + * for the property. + */ + { "lantiq,pci-xway", "gpio-reset", false }, +#endif +#if IS_ENABLED(CONFIG_TOUCHSCREEN_TSC2005) + /* + * DTS for Nokia N900 incorrectly specified "active high" + * polarity for the reset line, while the chip actually + * treats it as "active low". + */ + { "ti,tsc2005", "reset-gpios", false }, +#endif }; unsigned int i; @@ -501,9 +519,9 @@ { "reset", "reset-n-io", "marvell,nfc-uart" }, { "reset", "reset-n-io", "mrvl,nfc-uart" }, #endif -#if !IS_ENABLED(CONFIG_PCI_LANTIQ) +#if IS_ENABLED(CONFIG_PCI_LANTIQ) /* MIPS Lantiq PCI */ - { "reset", "gpios-reset", "lantiq,pci-xway" }, + { "reset", "gpio-reset", "lantiq,pci-xway" }, #endif /* --- linux-xilinx-6.8.0.orig/drivers/gpio/gpiolib-sysfs.c +++ linux-xilinx-6.8.0/drivers/gpio/gpiolib-sysfs.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 #include +#include #include #include #include @@ -773,15 +774,15 @@ struct gpio_desc *desc; struct gpio_chip *chip = gdev->chip; - if (!gdev->mockdev) - return; + scoped_guard(mutex, &sysfs_lock) { + if (!gdev->mockdev) + return; - device_unregister(gdev->mockdev); + device_unregister(gdev->mockdev); - /* prevent further gpiod exports */ - mutex_lock(&sysfs_lock); - gdev->mockdev = NULL; - mutex_unlock(&sysfs_lock); + /* prevent further gpiod exports */ + gdev->mockdev = NULL; + } /* unregister gpiod class devices owned by sysfs */ for_each_gpio_desc_with_flag(chip, desc, FLAG_SYSFS) { --- linux-xilinx-6.8.0.orig/drivers/gpio/gpiolib.c +++ linux-xilinx-6.8.0/drivers/gpio/gpiolib.c @@ -12,9 +12,11 @@ #include #include #include +#include #include #include #include +#include #include #include #include @@ -174,7 +176,7 @@ if (hwnum >= gdev->ngpio) return ERR_PTR(-EINVAL); - return &gdev->descs[hwnum]; + return &gdev->descs[array_index_nospec(hwnum, gdev->ngpio)]; } EXPORT_SYMBOL_GPL(gpio_device_get_desc); @@ -653,6 +655,45 @@ } EXPORT_SYMBOL_GPL(gpiochip_line_is_valid); +static void gpiod_free_irqs(struct gpio_desc *desc) +{ + int irq = gpiod_to_irq(desc); + struct irq_desc *irqd = irq_to_desc(irq); + void *cookie; + + for (;;) { + /* + * Make sure the action doesn't go away while we're + * dereferencing it. Retrieve and store the cookie value. + * If the irq is freed after we release the lock, that's + * alright - the underlying maple tree lookup will return NULL + * and nothing will happen in free_irq(). + */ + scoped_guard(mutex, &irqd->request_mutex) { + if (!irq_desc_has_action(irqd)) + return; + + cookie = irqd->action->dev_id; + } + + free_irq(irq, cookie); + } +} + +/* + * The chip is going away but there may be users who had requested interrupts + * on its GPIO lines who have no idea about its removal and have no way of + * being notified about it. We need to free any interrupts still in use here or + * we'll leak memory and resources (like procfs files). + */ +static void gpiochip_free_remaining_irqs(struct gpio_chip *gc) +{ + struct gpio_desc *desc; + + for_each_gpio_desc_with_flag(gc, desc, FLAG_USED_AS_IRQ) + gpiod_free_irqs(desc); +} + static void gpiodev_release(struct device *dev) { struct gpio_device *gdev = to_gpio_device(dev); @@ -796,13 +837,13 @@ } if (gc->ngpio == 0) { - chip_err(gc, "tried to insert a GPIO chip with zero lines\n"); + dev_err(dev, "tried to insert a GPIO chip with zero lines\n"); return -EINVAL; } if (gc->ngpio > FASTPATH_NGPIO) - chip_warn(gc, "line cnt %u is greater than fast path cnt %u\n", - gc->ngpio, FASTPATH_NGPIO); + dev_warn(dev, "line cnt %u is greater than fast path cnt %u\n", + gc->ngpio, FASTPATH_NGPIO); return 0; } @@ -1052,6 +1093,8 @@ /* FIXME: should the legacy sysfs handling be moved to gpio_device? */ gpiochip_sysfs_unregister(gdev); gpiochip_free_hogs(gc); + gpiochip_free_remaining_irqs(gc); + /* Numb the device, cancelling all outstanding operations */ gdev->chip = NULL; gpiochip_irqchip_remove(gc); @@ -2402,6 +2445,11 @@ } EXPORT_SYMBOL_GPL(gpiochip_dup_line_label); +static inline const char *function_name_or_default(const char *con_id) +{ + return con_id ?: "(default)"; +} + /** * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor * @gc: GPIO chip @@ -2430,10 +2478,11 @@ enum gpiod_flags dflags) { struct gpio_desc *desc = gpiochip_get_desc(gc, hwnum); + const char *name = function_name_or_default(label); int ret; if (IS_ERR(desc)) { - chip_err(gc, "failed to get GPIO descriptor\n"); + chip_err(gc, "failed to get GPIO %s descriptor\n", name); return desc; } @@ -2443,8 +2492,8 @@ ret = gpiod_configure_flags(desc, label, lflags, dflags); if (ret) { - chip_err(gc, "setup of own GPIO %s failed\n", label); gpiod_free_commit(desc); + chip_err(gc, "setup of own GPIO %s failed\n", name); return ERR_PTR(ret); } @@ -4119,34 +4168,33 @@ enum gpiod_flags *flags, unsigned long *lookupflags) { + const char *name = function_name_or_default(con_id); struct gpio_desc *desc = ERR_PTR(-ENOENT); if (is_of_node(fwnode)) { - dev_dbg(consumer, "using DT '%pfw' for '%s' GPIO lookup\n", - fwnode, con_id); + dev_dbg(consumer, "using DT '%pfw' for '%s' GPIO lookup\n", fwnode, name); desc = of_find_gpio(to_of_node(fwnode), con_id, idx, lookupflags); } else if (is_acpi_node(fwnode)) { - dev_dbg(consumer, "using ACPI '%pfw' for '%s' GPIO lookup\n", - fwnode, con_id); + dev_dbg(consumer, "using ACPI '%pfw' for '%s' GPIO lookup\n", fwnode, name); desc = acpi_find_gpio(fwnode, con_id, idx, flags, lookupflags); } else if (is_software_node(fwnode)) { - dev_dbg(consumer, "using swnode '%pfw' for '%s' GPIO lookup\n", - fwnode, con_id); + dev_dbg(consumer, "using swnode '%pfw' for '%s' GPIO lookup\n", fwnode, name); desc = swnode_find_gpio(fwnode, con_id, idx, lookupflags); } return desc; } -static struct gpio_desc *gpiod_find_and_request(struct device *consumer, - struct fwnode_handle *fwnode, - const char *con_id, - unsigned int idx, - enum gpiod_flags flags, - const char *label, - bool platform_lookup_allowed) +struct gpio_desc *gpiod_find_and_request(struct device *consumer, + struct fwnode_handle *fwnode, + const char *con_id, + unsigned int idx, + enum gpiod_flags flags, + const char *label, + bool platform_lookup_allowed) { unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT; + const char *name = function_name_or_default(con_id); struct gpio_desc *desc; int ret; @@ -4162,7 +4210,7 @@ } if (IS_ERR(desc)) { - dev_dbg(consumer, "No GPIO consumer %s found\n", con_id); + dev_dbg(consumer, "No GPIO consumer %s found\n", name); return desc; } @@ -4183,15 +4231,14 @@ * * FIXME: Make this more sane and safe. */ - dev_info(consumer, - "nonexclusive access to GPIO for %s\n", con_id); + dev_info(consumer, "nonexclusive access to GPIO for %s\n", name); return desc; } ret = gpiod_configure_flags(desc, con_id, lookupflags, flags); if (ret < 0) { - dev_dbg(consumer, "setup of GPIO %s failed\n", con_id); gpiod_put(desc); + dev_dbg(consumer, "setup of GPIO %s failed\n", name); return ERR_PTR(ret); } @@ -4307,6 +4354,7 @@ int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id, unsigned long lflags, enum gpiod_flags dflags) { + const char *name = function_name_or_default(con_id); int ret; if (lflags & GPIO_ACTIVE_LOW) @@ -4350,7 +4398,7 @@ /* No particular flag request, return here... */ if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) { - gpiod_dbg(desc, "no flags found for %s\n", con_id); + gpiod_dbg(desc, "no flags found for GPIO %s\n", name); return 0; } --- linux-xilinx-6.8.0.orig/drivers/gpio/gpiolib.h +++ linux-xilinx-6.8.0/drivers/gpio/gpiolib.h @@ -202,6 +202,14 @@ return ret; } +struct gpio_desc *gpiod_find_and_request(struct device *consumer, + struct fwnode_handle *fwnode, + const char *con_id, + unsigned int idx, + enum gpiod_flags flags, + const char *label, + bool platform_lookup_allowed); + int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id, unsigned long lflags, enum gpiod_flags dflags); int gpio_set_debounce_timeout(struct gpio_desc *desc, unsigned int debounce); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/Kconfig +++ linux-xilinx-6.8.0/drivers/gpu/drm/Kconfig @@ -221,6 +221,7 @@ config DRM_GPUVM tristate depends on DRM + select DRM_EXEC help GPU-VM representation providing helpers to manage a GPUs virtual address space @@ -420,6 +421,10 @@ config DRM_PANEL_ORIENTATION_QUIRKS tristate +# Separate option as not all DRM drivers use it +config DRM_PANEL_BACKLIGHT_QUIRKS + tristate + config DRM_LIB_RANDOM bool default n --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/Makefile +++ linux-xilinx-6.8.0/drivers/gpu/drm/Makefile @@ -63,6 +63,7 @@ obj-$(CONFIG_DRM) += drm.o obj-$(CONFIG_DRM_PANEL_ORIENTATION_QUIRKS) += drm_panel_orientation_quirks.o +obj-$(CONFIG_DRM_PANEL_BACKLIGHT_QUIRKS) += drm_panel_backlight_quirks.o # # Memory-management helpers --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/aldebaran.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/aldebaran.c @@ -97,7 +97,7 @@ adev->ip_blocks[i].status.hw = false; } - return r; + return 0; } static int --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -198,7 +198,7 @@ extern uint amdgpu_dc_feature_mask; extern uint amdgpu_dc_debug_mask; extern uint amdgpu_dc_visual_confirm; -extern uint amdgpu_dm_abm_level; +extern int amdgpu_dm_abm_level; extern int amdgpu_backlight; extern int amdgpu_damage_clips; extern struct amdgpu_mgpu_info mgpu_info; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c @@ -147,6 +147,7 @@ struct acpi_buffer *params) { acpi_status status; + union acpi_object *obj; union acpi_object atif_arg_elements[2]; struct acpi_object_list atif_arg; struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; @@ -169,16 +170,24 @@ status = acpi_evaluate_object(atif->handle, NULL, &atif_arg, &buffer); + obj = (union acpi_object *)buffer.pointer; - /* Fail only if calling the method fails and ATIF is supported */ - if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) { + /* Fail if calling the method fails */ + if (ACPI_FAILURE(status)) { DRM_DEBUG_DRIVER("failed to evaluate ATIF got %s\n", acpi_format_exception(status)); - kfree(buffer.pointer); + kfree(obj); return NULL; } - return buffer.pointer; + if (obj->type != ACPI_TYPE_BUFFER) { + DRM_DEBUG_DRIVER("bad object returned from ATIF: %d\n", + obj->type); + kfree(obj); + return NULL; + } + + return obj; } /** @@ -789,6 +798,7 @@ return -EIO; } + kfree(info); return 0; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c @@ -100,6 +100,7 @@ amdgpu_afmt_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000); amdgpu_afmt_calc_cts(clock, &res.cts_44_1khz, &res.n_44_1khz, 44100); amdgpu_afmt_calc_cts(clock, &res.cts_48khz, &res.n_48khz, 48000); + res.clock = clock; return res; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c @@ -146,7 +146,7 @@ { int ret; - if (!adev->kfd.init_complete) + if (!adev->kfd.init_complete || adev->kfd.client.dev) return 0; ret = drm_client_init(&adev->ddev, &adev->kfd.client, "kfd", @@ -360,15 +360,15 @@ return r; } -void amdgpu_amdkfd_free_gtt_mem(struct amdgpu_device *adev, void *mem_obj) +void amdgpu_amdkfd_free_gtt_mem(struct amdgpu_device *adev, void **mem_obj) { - struct amdgpu_bo *bo = (struct amdgpu_bo *) mem_obj; + struct amdgpu_bo **bo = (struct amdgpu_bo **) mem_obj; - amdgpu_bo_reserve(bo, true); - amdgpu_bo_kunmap(bo); - amdgpu_bo_unpin(bo); - amdgpu_bo_unreserve(bo); - amdgpu_bo_unref(&(bo)); + amdgpu_bo_reserve(*bo, true); + amdgpu_bo_kunmap(*bo); + amdgpu_bo_unpin(*bo); + amdgpu_bo_unreserve(*bo); + amdgpu_bo_unref(bo); } int amdgpu_amdkfd_alloc_gws(struct amdgpu_device *adev, size_t size, @@ -455,6 +455,9 @@ else mem_info->local_mem_size_private = KFD_XCP_MEMORY_SIZE(adev, xcp->id); + } else if (adev->flags & AMD_IS_APU) { + mem_info->local_mem_size_public = (ttm_tt_pages_limit() << PAGE_SHIFT); + mem_info->local_mem_size_private = 0; } else { mem_info->local_mem_size_public = adev->gmc.visible_vram_size; mem_info->local_mem_size_private = adev->gmc.real_vram_size - @@ -708,8 +711,9 @@ void amdgpu_amdkfd_set_compute_idle(struct amdgpu_device *adev, bool idle) { enum amd_powergating_state state = idle ? AMD_PG_STATE_GATE : AMD_PG_STATE_UNGATE; - if (IP_VERSION_MAJ(amdgpu_ip_version(adev, GC_HWIP, 0)) == 11 && - ((adev->mes.kiq_version & AMDGPU_MES_VERSION_MASK) <= 64)) { + if ((IP_VERSION_MAJ(amdgpu_ip_version(adev, GC_HWIP, 0)) == 11 && + ((adev->mes.kiq_version & AMDGPU_MES_VERSION_MASK) <= 64)) || + (IP_VERSION_MAJ(amdgpu_ip_version(adev, GC_HWIP, 0)) == 12)) { pr_debug("GFXOFF is %s\n", idle ? "enabled" : "disabled"); amdgpu_gfx_off_ctrl(adev, idle); } else if ((IP_VERSION_MAJ(amdgpu_ip_version(adev, GC_HWIP, 0)) == 9) && @@ -803,6 +807,8 @@ } do_div(tmp, adev->xcp_mgr->num_xcp_per_mem_partition); return ALIGN_DOWN(tmp, PAGE_SIZE); + } else if (adev->flags & AMD_IS_APU) { + return (ttm_tt_pages_limit() << PAGE_SHIFT); } else { return adev->gmc.real_vram_size; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h @@ -223,7 +223,7 @@ int amdgpu_amdkfd_alloc_gtt_mem(struct amdgpu_device *adev, size_t size, void **mem_obj, uint64_t *gpu_addr, void **cpu_ptr, bool mqd_gfx9); -void amdgpu_amdkfd_free_gtt_mem(struct amdgpu_device *adev, void *mem_obj); +void amdgpu_amdkfd_free_gtt_mem(struct amdgpu_device *adev, void **mem_obj); int amdgpu_amdkfd_alloc_gws(struct amdgpu_device *adev, size_t size, void **mem_obj); void amdgpu_amdkfd_free_gws(struct amdgpu_device *adev, void *mem_obj); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c @@ -196,7 +196,7 @@ return -EINVAL; vram_size = KFD_XCP_MEMORY_SIZE(adev, xcp_id); - if (adev->gmc.is_app_apu) { + if (adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) { system_mem_needed = size; ttm_mem_needed = size; } @@ -220,7 +220,7 @@ (kfd_mem_limit.ttm_mem_used + ttm_mem_needed > kfd_mem_limit.max_ttm_mem_limit) || (adev && xcp_id >= 0 && adev->kfd.vram_used[xcp_id] + vram_needed > - vram_size - reserved_for_pt)) { + vram_size - reserved_for_pt - atomic64_read(&adev->vram_pin_size))) { ret = -ENOMEM; goto release; } @@ -232,7 +232,8 @@ "adev reference can't be null when vram is used"); if (adev && xcp_id >= 0) { adev->kfd.vram_used[xcp_id] += vram_needed; - adev->kfd.vram_used_aligned[xcp_id] += adev->gmc.is_app_apu ? + adev->kfd.vram_used_aligned[xcp_id] += + (adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) ? vram_needed : ALIGN(vram_needed, VRAM_AVAILABLITY_ALIGN); } @@ -260,7 +261,7 @@ if (adev) { adev->kfd.vram_used[xcp_id] -= size; - if (adev->gmc.is_app_apu) { + if (adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) { adev->kfd.vram_used_aligned[xcp_id] -= size; kfd_mem_limit.system_mem_used -= size; kfd_mem_limit.ttm_mem_used -= size; @@ -414,6 +415,10 @@ "Called with userptr BO")) return -EINVAL; + /* bo has been pinned, not need validate it */ + if (bo->tbo.pin_count) + return 0; + amdgpu_bo_placement_from_domain(bo, domain); ret = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); @@ -887,7 +892,7 @@ * if peer device has large BAR. In contrast, access over xGMI is * allowed for both small and large BAR configurations of peer device */ - if ((adev != bo_adev && !adev->gmc.is_app_apu) && + if ((adev != bo_adev && !(adev->gmc.is_app_apu || adev->flags & AMD_IS_APU)) && ((mem->domain == AMDGPU_GEM_DOMAIN_VRAM) || (mem->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) || (mem->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP))) { @@ -1186,7 +1191,8 @@ int ret; ctx->sync = &mem->sync; - drm_exec_init(&ctx->exec, DRM_EXEC_INTERRUPTIBLE_WAIT, 0); + drm_exec_init(&ctx->exec, DRM_EXEC_INTERRUPTIBLE_WAIT | + DRM_EXEC_IGNORE_DUPLICATES, 0); drm_exec_until_all_locked(&ctx->exec) { ctx->n_vms = 0; list_for_each_entry(entry, &mem->attachments, list) { @@ -1424,8 +1430,8 @@ list_add_tail(&vm->vm_list_node, &(vm->process_info->vm_list_head)); vm->process_info->n_vms++; - - *ef = dma_fence_get(&vm->process_info->eviction_fence->base); + if (ef) + *ef = dma_fence_get(&vm->process_info->eviction_fence->base); mutex_unlock(&vm->process_info->lock); return 0; @@ -1653,7 +1659,7 @@ - atomic64_read(&adev->vram_pin_size) - reserved_for_pt; - if (adev->gmc.is_app_apu) { + if (adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) { system_mem_available = no_system_mem_limit ? kfd_mem_limit.max_system_mem_limit : kfd_mem_limit.max_system_mem_limit - @@ -1701,7 +1707,7 @@ if (flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) { domain = alloc_domain = AMDGPU_GEM_DOMAIN_VRAM; - if (adev->gmc.is_app_apu) { + if (adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) { domain = AMDGPU_GEM_DOMAIN_GTT; alloc_domain = AMDGPU_GEM_DOMAIN_GTT; alloc_flags = 0; @@ -1851,6 +1857,7 @@ err_bo_create: amdgpu_amdkfd_unreserve_mem_limit(adev, aligned_size, flags, xcp_id); err_reserve_limit: + amdgpu_sync_free(&(*mem)->sync); mutex_destroy(&(*mem)->lock); if (gobj) drm_gem_object_put(gobj); @@ -1947,7 +1954,7 @@ if (size) { if (!is_imported && (mem->bo->preferred_domains == AMDGPU_GEM_DOMAIN_VRAM || - (adev->gmc.is_app_apu && + ((adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) && mem->bo->preferred_domains == AMDGPU_GEM_DOMAIN_GTT))) *size = bo_size; else @@ -2370,8 +2377,9 @@ (*mem)->dmabuf = dma_buf; (*mem)->bo = bo; (*mem)->va = va; - (*mem)->domain = (bo->preferred_domains & AMDGPU_GEM_DOMAIN_VRAM) && !adev->gmc.is_app_apu ? - AMDGPU_GEM_DOMAIN_VRAM : AMDGPU_GEM_DOMAIN_GTT; + (*mem)->domain = (bo->preferred_domains & AMDGPU_GEM_DOMAIN_VRAM) && + !(adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) ? + AMDGPU_GEM_DOMAIN_VRAM : AMDGPU_GEM_DOMAIN_GTT; (*mem)->mapped_to_gpu_memory = 0; (*mem)->process_info = avm->process_info; @@ -2706,7 +2714,7 @@ /* keep mem without hmm range at userptr_inval_list */ if (!mem->range) - continue; + continue; /* Only check mem with hmm range associated */ valid = amdgpu_ttm_tt_get_user_pages_done( @@ -2934,9 +2942,6 @@ if (!attachment->is_mapped) continue; - if (attachment->bo_va->base.bo->tbo.pin_count) - continue; - kfd_mem_dmaunmap_attachment(mem, attachment); ret = update_gpuvm_pte(mem, attachment, &sync_obj); if (ret) { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c @@ -1018,7 +1018,9 @@ if (clock_type == COMPUTE_ENGINE_PLL_PARAM) { args.v3.ulClockParams = cpu_to_le32((clock_type << 24) | clock); - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + if (amdgpu_atom_execute_table(adev->mode_info.atom_context, + index, (uint32_t *)&args, sizeof(args))) + return -EINVAL; dividers->post_div = args.v3.ucPostDiv; dividers->enable_post_div = (args.v3.ucCntlFlag & @@ -1038,7 +1040,9 @@ if (strobe_mode) args.v5.ucInputFlag = ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN; - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + if (amdgpu_atom_execute_table(adev->mode_info.atom_context, + index, (uint32_t *)&args, sizeof(args))) + return -EINVAL; dividers->post_div = args.v5.ucPostDiv; dividers->enable_post_div = (args.v5.ucCntlFlag & @@ -1056,7 +1060,9 @@ /* fusion */ args.v4.ulClock = cpu_to_le32(clock); /* 10 khz */ - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + if (amdgpu_atom_execute_table(adev->mode_info.atom_context, + index, (uint32_t *)&args, sizeof(args))) + return -EINVAL; dividers->post_divider = dividers->post_div = args.v4.ucPostDiv; dividers->real_clock = le32_to_cpu(args.v4.ulClock); @@ -1067,7 +1073,9 @@ args.v6_in.ulClock.ulComputeClockFlag = clock_type; args.v6_in.ulClock.ulClockFreq = cpu_to_le32(clock); /* 10 khz */ - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + if (amdgpu_atom_execute_table(adev->mode_info.atom_context, + index, (uint32_t *)&args, sizeof(args))) + return -EINVAL; dividers->whole_fb_div = le16_to_cpu(args.v6_out.ulFbDiv.usFbDiv); dividers->frac_fb_div = le16_to_cpu(args.v6_out.ulFbDiv.usFbDivFrac); @@ -1109,7 +1117,9 @@ if (strobe_mode) args.ucInputFlag |= MPLL_INPUT_FLAG_STROBE_MODE_EN; - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + if (amdgpu_atom_execute_table(adev->mode_info.atom_context, + index, (uint32_t *)&args, sizeof(args))) + return -EINVAL; mpll_param->clkfrac = le16_to_cpu(args.ulFbDiv.usFbDivFrac); mpll_param->clkf = le16_to_cpu(args.ulFbDiv.usFbDiv); @@ -1151,7 +1161,8 @@ if (mem_clock) args.sReserved.ulClock = cpu_to_le32(mem_clock & SET_CLOCK_FREQ_MASK); - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args, + sizeof(args)); } void amdgpu_atombios_get_default_voltages(struct amdgpu_device *adev, @@ -1205,7 +1216,9 @@ args.v2.ucVoltageMode = 0; args.v2.usVoltageLevel = 0; - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + if (amdgpu_atom_execute_table(adev->mode_info.atom_context, + index, (uint32_t *)&args, sizeof(args))) + return -EINVAL; *voltage = le16_to_cpu(args.v2.usVoltageLevel); break; @@ -1214,7 +1227,9 @@ args.v3.ucVoltageMode = ATOM_GET_VOLTAGE_LEVEL; args.v3.usVoltageLevel = cpu_to_le16(voltage_id); - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + if (amdgpu_atom_execute_table(adev->mode_info.atom_context, + index, (uint32_t *)&args, sizeof(args))) + return -EINVAL; *voltage = le16_to_cpu(args.v3.usVoltageLevel); break; @@ -1476,6 +1491,8 @@ (u32)le32_to_cpu(*((u32 *)reg_data + j)); j++; } else if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_EQU_PREV) { + if (i == 0) + continue; reg_table->mc_reg_table_entry[num_ranges].mc_data[i] = reg_table->mc_reg_table_entry[num_ranges].mc_data[i - 1]; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c @@ -211,6 +211,7 @@ struct atom_integrated_system_info_v1_11 v11; struct atom_integrated_system_info_v1_12 v12; struct atom_integrated_system_info_v2_1 v21; + struct atom_integrated_system_info_v2_3 v23; }; union umc_info { @@ -359,6 +360,20 @@ if (vram_type) *vram_type = convert_atom_mem_type_to_vram_type(adev, mem_type); break; + case 3: + mem_channel_number = igp_info->v23.umachannelnumber; + if (!mem_channel_number) + mem_channel_number = 1; + mem_type = igp_info->v23.memorytype; + if (mem_type == LpDdr5MemType) + mem_channel_width = 32; + else + mem_channel_width = 64; + if (vram_width) + *vram_width = mem_channel_number * mem_channel_width; + if (vram_type) + *vram_type = convert_atom_mem_type_to_vram_type(adev, mem_type); + break; default: return -EINVAL; } @@ -384,7 +399,7 @@ mem_channel_number = vram_info->v30.channel_num; mem_channel_width = vram_info->v30.channel_width; if (vram_width) - *vram_width = mem_channel_number * (1 << mem_channel_width); + *vram_width = mem_channel_number * 16; break; default: return -EINVAL; @@ -941,5 +956,6 @@ return -EINVAL; } - return amdgpu_atom_execute_table(ctx, ATOM_CMD_INIT, (uint32_t *)&asic_init_ps_v2_1); + return amdgpu_atom_execute_table(ctx, ATOM_CMD_INIT, (uint32_t *)&asic_init_ps_v2_1, + sizeof(asic_init_ps_v2_1)); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c @@ -213,6 +213,9 @@ struct amdgpu_firmware_info *ucode; id = fw_type_convert(cgs_device, type); + if (id >= AMDGPU_UCODE_ID_MAXIMUM) + return -EINVAL; + ucode = &adev->firmware.ucode[id]; if (ucode->fw == NULL) return -EINVAL; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c @@ -263,6 +263,10 @@ if (size < sizeof(struct drm_amdgpu_bo_list_in)) goto free_partial_kdata; + /* Only a single BO list is allowed to simplify handling. */ + if (p->bo_list) + goto free_partial_kdata; + ret = amdgpu_cs_p1_bo_handles(p, p->chunks[i].kdata); if (ret) goto free_partial_kdata; @@ -819,7 +823,7 @@ p->bytes_moved += ctx.bytes_moved; if (!amdgpu_gmc_vram_full_visible(&adev->gmc) && - amdgpu_bo_in_cpu_visible_vram(bo)) + amdgpu_res_cpu_visible(adev, bo->tbo.resource)) p->bytes_moved_vis += ctx.bytes_moved; if (unlikely(r == -ENOMEM) && domain != bo->allowed_domains) { @@ -1057,6 +1061,9 @@ r = amdgpu_ring_parse_cs(ring, p, job, ib); if (r) return r; + + if (ib->sa_bo) + ib->gpu_addr = amdgpu_sa_bo_gpu_addr(ib->sa_bo); } else { ib->ptr = (uint32_t *)kptr; r = amdgpu_ring_patch_cs_in_place(ring, p, job, ib); @@ -1093,6 +1100,21 @@ unsigned int i; int r; + /* + * We can't use gang submit on with reserved VMIDs when the VM changes + * can't be invalidated by more than one engine at the same time. + */ + if (p->gang_size > 1 && !p->adev->vm_manager.concurrent_flush) { + for (i = 0; i < p->gang_size; ++i) { + struct drm_sched_entity *entity = p->entities[i]; + struct drm_gpu_scheduler *sched = entity->rq->sched; + struct amdgpu_ring *ring = to_amdgpu_ring(sched); + + if (amdgpu_vmid_uses_reserved(vm, ring->vm_hub)) + return -EINVAL; + } + } + r = amdgpu_vm_clear_freed(adev, vm, NULL); if (r) return r; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c @@ -685,16 +685,24 @@ switch (args->in.op) { case AMDGPU_CTX_OP_ALLOC_CTX: + if (args->in.flags) + return -EINVAL; r = amdgpu_ctx_alloc(adev, fpriv, filp, priority, &id); args->out.alloc.ctx_id = id; break; case AMDGPU_CTX_OP_FREE_CTX: + if (args->in.flags) + return -EINVAL; r = amdgpu_ctx_free(fpriv, id); break; case AMDGPU_CTX_OP_QUERY_STATE: + if (args->in.flags) + return -EINVAL; r = amdgpu_ctx_query(adev, fpriv, id, &args->out); break; case AMDGPU_CTX_OP_QUERY_STATE2: + if (args->in.flags) + return -EINVAL; r = amdgpu_ctx_query2(adev, fpriv, id, &args->out); break; case AMDGPU_CTX_OP_GET_STABLE_PSTATE: --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c @@ -402,7 +402,7 @@ int r; uint32_t *data, x; - if (size & 0x3 || *pos & 0x3) + if (size > 4096 || size & 0x3 || *pos & 0x3) return -EINVAL; r = pm_runtime_get_sync(adev_to_drm(adev)->dev); @@ -1648,7 +1648,7 @@ for (i = 0; i < ARRAY_SIZE(debugfs_regs); i++) { ent = debugfs_create_file(debugfs_regs_names[i], - S_IFREG | 0444, root, + S_IFREG | 0400, root, adev, debugfs_regs[i]); if (!i && !IS_ERR_OR_NULL(ent)) i_size_write(ent->d_inode, adev->rmmio_size); @@ -2060,12 +2060,13 @@ struct amdgpu_device *adev = (struct amdgpu_device *)file_inode(f)->i_private; char reg_offset[11]; uint32_t *new = NULL, *tmp = NULL; - int ret, i = 0, len = 0; + unsigned int len = 0; + int ret, i = 0; do { memset(reg_offset, 0, 11); if (copy_from_user(reg_offset, buf + len, - min(10, ((int)size-len)))) { + min(10, (size-len)))) { ret = -EFAULT; goto error_free; } @@ -2185,11 +2186,11 @@ amdgpu_securedisplay_debugfs_init(adev); amdgpu_fw_attestation_debugfs_init(adev); - debugfs_create_file("amdgpu_evict_vram", 0444, root, adev, + debugfs_create_file("amdgpu_evict_vram", 0400, root, adev, &amdgpu_evict_vram_fops); - debugfs_create_file("amdgpu_evict_gtt", 0444, root, adev, + debugfs_create_file("amdgpu_evict_gtt", 0400, root, adev, &amdgpu_evict_gtt_fops); - debugfs_create_file("amdgpu_test_ib", 0444, root, adev, + debugfs_create_file("amdgpu_test_ib", 0400, root, adev, &amdgpu_debugfs_test_ib_fops); debugfs_create_file("amdgpu_vm_info", 0444, root, adev, &amdgpu_debugfs_vm_info_fops); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -3945,6 +3945,7 @@ mutex_init(&adev->grbm_idx_mutex); mutex_init(&adev->mn_lock); mutex_init(&adev->virt.vf_errors.lock); + mutex_init(&adev->virt.rlcg_reg_lock); hash_init(adev->mn_hash); mutex_init(&adev->psp.mutex); mutex_init(&adev->notifier_lock); @@ -4120,18 +4121,22 @@ adev->ip_blocks[i].status.hw = true; } } + } else if (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 10) && + !amdgpu_device_has_display_hardware(adev)) { + r = psp_gpu_reset(adev); } else { - tmp = amdgpu_reset_method; - /* It should do a default reset when loading or reloading the driver, - * regardless of the module parameter reset_method. - */ - amdgpu_reset_method = AMD_RESET_METHOD_NONE; - r = amdgpu_asic_reset(adev); - amdgpu_reset_method = tmp; - if (r) { - dev_err(adev->dev, "asic reset on init failed\n"); - goto failed; - } + tmp = amdgpu_reset_method; + /* It should do a default reset when loading or reloading the driver, + * regardless of the module parameter reset_method. + */ + amdgpu_reset_method = AMD_RESET_METHOD_NONE; + r = amdgpu_asic_reset(adev); + amdgpu_reset_method = tmp; + } + + if (r) { + dev_err(adev->dev, "asic reset on init failed\n"); + goto failed; } } @@ -4421,8 +4426,8 @@ int idx; bool px; - amdgpu_fence_driver_sw_fini(adev); amdgpu_device_ip_fini(adev); + amdgpu_fence_driver_sw_fini(adev); amdgpu_ucode_release(&adev->firmware.gpu_info_fw); adev->accel_working = false; dma_fence_put(rcu_dereference_protected(adev->gang_submit, true)); @@ -4524,6 +4529,8 @@ if (r) goto unprepare; + flush_delayed_work(&adev->gfx.gfx_off_delay_work); + for (i = 0; i < adev->num_ip_blocks; i++) { if (!adev->ip_blocks[i].status.valid) continue; @@ -4894,7 +4901,8 @@ shadow = vmbo->shadow; /* No need to recover an evicted BO */ - if (shadow->tbo.resource->mem_type != TTM_PL_TT || + if (!shadow->tbo.resource || + shadow->tbo.resource->mem_type != TTM_PL_TT || shadow->tbo.resource->start == AMDGPU_BO_INVALID_OFFSET || shadow->parent->tbo.resource->mem_type != TTM_PL_VRAM) continue; @@ -4938,27 +4946,26 @@ * amdgpu_device_reset_sriov - reset ASIC for SR-IOV vf * * @adev: amdgpu_device pointer - * @from_hypervisor: request from hypervisor + * @reset_context: amdgpu reset context pointer * * do VF FLR and reinitialize Asic * return 0 means succeeded otherwise failed */ static int amdgpu_device_reset_sriov(struct amdgpu_device *adev, - bool from_hypervisor) + struct amdgpu_reset_context *reset_context) { int r; struct amdgpu_hive_info *hive = NULL; - int retry_limit = 0; -retry: - amdgpu_amdkfd_pre_reset(adev); - - if (from_hypervisor) + if (test_bit(AMDGPU_HOST_FLR, &reset_context->flags)) { + clear_bit(AMDGPU_HOST_FLR, &reset_context->flags); r = amdgpu_virt_request_full_gpu(adev, true); - else + } else { r = amdgpu_virt_reset_gpu(adev); + } if (r) return r; + amdgpu_irq_gpu_reset_resume_helper(adev); /* some sw clean up VF needs to do before recover */ @@ -4967,7 +4974,7 @@ /* Resume IP prior to SMC */ r = amdgpu_device_ip_reinit_early_sriov(adev); if (r) - goto error; + return r; amdgpu_virt_init_data_exchange(adev); @@ -4978,38 +4985,35 @@ /* now we are okay to resume SMC/CP/SDMA */ r = amdgpu_device_ip_reinit_late_sriov(adev); if (r) - goto error; + return r; hive = amdgpu_get_xgmi_hive(adev); /* Update PSP FW topology after reset */ if (hive && adev->gmc.xgmi.num_physical_nodes > 1) r = amdgpu_xgmi_update_topology(hive, adev); - if (hive) amdgpu_put_xgmi_hive(hive); + if (r) + return r; - if (!r) { - r = amdgpu_ib_ring_tests(adev); - - amdgpu_amdkfd_post_reset(adev); - } + r = amdgpu_ib_ring_tests(adev); + if (r) + return r; -error: - if (!r && adev->virt.gim_feature & AMDGIM_FEATURE_GIM_FLR_VRAMLOST) { + if (adev->virt.gim_feature & AMDGIM_FEATURE_GIM_FLR_VRAMLOST) { amdgpu_inc_vram_lost(adev); r = amdgpu_device_recover_vram(adev); } - amdgpu_virt_release_full_gpu(adev, true); + if (r) + return r; - if (AMDGPU_RETRY_SRIOV_RESET(r)) { - if (retry_limit < AMDGPU_MAX_RETRY_LIMIT) { - retry_limit++; - goto retry; - } else - DRM_ERROR("GPU reset retry is beyond the retry limit\n"); - } + /* need to be called during full access so we can't do it later like + * bare-metal does. + */ + amdgpu_amdkfd_post_reset(adev); + amdgpu_virt_release_full_gpu(adev, true); - return r; + return 0; } /** @@ -5100,11 +5104,14 @@ dev_info(adev->dev, "GPU mode1 reset\n"); + /* Cache the state before bus master disable. The saved config space + * values are used in other cases like restore after mode-2 reset. + */ + amdgpu_device_cache_pci_state(adev->pdev); + /* disable BM */ pci_clear_master(adev->pdev); - amdgpu_device_cache_pci_state(adev->pdev); - if (amdgpu_dpm_is_mode1_reset_supported(adev)) { dev_info(adev->dev, "GPU smu mode1 reset\n"); ret = amdgpu_dpm_mode1_reset(adev); @@ -5539,6 +5546,7 @@ int i, r = 0; bool need_emergency_restart = false; bool audio_suspended = false; + int retry_limit = AMDGPU_MAX_RETRY_LIMIT; /* * Special case: RAS triggered and full reset isn't supported @@ -5573,7 +5581,7 @@ * to put adev in the 1st position. */ INIT_LIST_HEAD(&device_list); - if (!amdgpu_sriov_vf(adev) && (adev->gmc.xgmi.num_physical_nodes > 1)) { + if (!amdgpu_sriov_vf(adev) && (adev->gmc.xgmi.num_physical_nodes > 1) && hive) { list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head) { list_add_tail(&tmp_adev->reset_list, &device_list); if (adev->shutdown) @@ -5614,8 +5622,7 @@ cancel_delayed_work_sync(&tmp_adev->delayed_init_work); - if (!amdgpu_sriov_vf(tmp_adev)) - amdgpu_amdkfd_pre_reset(tmp_adev); + amdgpu_amdkfd_pre_reset(tmp_adev); /* * Mark these ASICs to be reseted as untracked first @@ -5668,18 +5675,16 @@ r, adev_to_drm(tmp_adev)->unique); tmp_adev->asic_reset_res = r; } - - /* - * Drop all pending non scheduler resets. Scheduler resets - * were already dropped during drm_sched_stop - */ - amdgpu_device_stop_pending_resets(tmp_adev); } /* Actual ASIC resets if needed.*/ /* Host driver will handle XGMI hive reset for SRIOV */ if (amdgpu_sriov_vf(adev)) { - r = amdgpu_device_reset_sriov(adev, job ? false : true); + r = amdgpu_device_reset_sriov(adev, reset_context); + if (AMDGPU_RETRY_SRIOV_RESET(r) && (retry_limit--) > 0) { + amdgpu_virt_release_full_gpu(adev, true); + goto retry; + } if (r) adev->asic_reset_res = r; @@ -5694,6 +5699,16 @@ goto retry; } + list_for_each_entry(tmp_adev, device_list_handle, reset_list) { + /* + * Drop any pending non scheduler resets queued before reset is done. + * Any reset scheduled after this point would be valid. Scheduler resets + * were already dropped during drm_sched_stop and no new ones can come + * in before drm_sched_start. + */ + amdgpu_device_stop_pending_resets(tmp_adev); + } + skip_hw_reset: /* Post ASIC reset for all devs .*/ @@ -5786,13 +5801,18 @@ *speed = PCI_SPEED_UNKNOWN; *width = PCIE_LNK_WIDTH_UNKNOWN; - while ((parent = pci_upstream_bridge(parent))) { - /* skip upstream/downstream switches internal to dGPU*/ - if (parent->vendor == PCI_VENDOR_ID_ATI) - continue; - *speed = pcie_get_speed_cap(parent); - *width = pcie_get_width_cap(parent); - break; + if (amdgpu_device_pcie_dynamic_switching_supported(adev)) { + while ((parent = pci_upstream_bridge(parent))) { + /* skip upstream/downstream switches internal to dGPU*/ + if (parent->vendor == PCI_VENDOR_ID_ATI) + continue; + *speed = pcie_get_speed_cap(parent); + *width = pcie_get_width_cap(parent); + break; + } + } else { + /* use the current speeds rather than max if switching is not supported */ + pcie_bandwidth_available(adev->pdev, NULL, speed, width); } } @@ -6007,7 +6027,7 @@ adev->nbio.funcs->enable_doorbell_interrupt) adev->nbio.funcs->enable_doorbell_interrupt(adev, true); - if (amdgpu_passthrough(adev) && + if (amdgpu_passthrough(adev) && adev->nbio.funcs && adev->nbio.funcs->clear_doorbell_interrupt) adev->nbio.funcs->clear_doorbell_interrupt(adev); @@ -6107,6 +6127,20 @@ struct amdgpu_reset_context reset_context; u32 memsize; struct list_head device_list; + struct amdgpu_hive_info *hive; + int hive_ras_recovery = 0; + struct amdgpu_ras *ras; + + /* PCI error slot reset should be skipped During RAS recovery */ + hive = amdgpu_get_xgmi_hive(adev); + if (hive) { + hive_ras_recovery = atomic_read(&hive->ras_recovery); + amdgpu_put_xgmi_hive(hive); + } + ras = amdgpu_ras_get_context(adev); + if ((amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 3)) && + ras && (atomic_read(&ras->in_recovery) || hive_ras_recovery)) + return PCI_ERS_RESULT_RECOVERED; DRM_INFO("PCI error: slot reset callback!!\n"); @@ -6201,6 +6235,9 @@ struct amdgpu_device *adev = drm_to_adev(dev); int r; + if (amdgpu_sriov_vf(adev)) + return false; + r = pci_save_state(pdev); if (!r) { kfree(adev->pci_state); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c @@ -1278,11 +1278,10 @@ * 0b10 : encode is disabled * 0b01 : decode is disabled */ - adev->vcn.vcn_config[adev->vcn.num_vcn_inst] = - ip->revision & 0xc0; - ip->revision &= ~0xc0; if (adev->vcn.num_vcn_inst < AMDGPU_MAX_VCN_INSTANCES) { + adev->vcn.vcn_config[adev->vcn.num_vcn_inst] = + ip->revision & 0xc0; adev->vcn.num_vcn_inst++; adev->vcn.inst_mask |= (1U << ip->instance_number); @@ -1293,6 +1292,7 @@ adev->vcn.num_vcn_inst + 1, AMDGPU_MAX_VCN_INSTANCES); } + ip->revision &= ~0xc0; } if (le16_to_cpu(ip->hw_id) == SDMA0_HWID || le16_to_cpu(ip->hw_id) == SDMA1_HWID || @@ -1572,7 +1572,7 @@ break; case 2: mall_size_per_umc = le32_to_cpu(mall_info->v2.mall_size_per_umc); - adev->gmc.mall_size = mall_size_per_umc * adev->gmc.num_umc; + adev->gmc.mall_size = (uint64_t)mall_size_per_umc * adev->gmc.num_umc; break; default: dev_err(adev->dev, @@ -1867,6 +1867,7 @@ amdgpu_device_ip_block_add(adev, &smu_v13_0_ip_block); break; case IP_VERSION(14, 0, 0): + case IP_VERSION(14, 0, 1): amdgpu_device_ip_block_add(adev, &smu_v14_0_ip_block); break; default: --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c @@ -917,8 +917,7 @@ { u64 micro_tile_mode; - /* Zero swizzle mode means linear */ - if (AMDGPU_TILING_GET(afb->tiling_flags, SWIZZLE_MODE) == 0) + if (AMDGPU_TILING_GET(afb->tiling_flags, ARRAY_MODE) == 1) /* LINEAR_ALIGNED */ return 0; micro_tile_mode = AMDGPU_TILING_GET(afb->tiling_flags, MICRO_TILE_MODE); @@ -1042,6 +1041,30 @@ block_width = 256 / format_info->cpp[i]; block_height = 1; block_size_log2 = 8; + } else if (AMD_FMT_MOD_GET(TILE_VERSION, modifier) >= AMD_FMT_MOD_TILE_VER_GFX12) { + int swizzle = AMD_FMT_MOD_GET(TILE, modifier); + + switch (swizzle) { + case AMD_FMT_MOD_TILE_GFX12_256B_2D: + block_size_log2 = 8; + break; + case AMD_FMT_MOD_TILE_GFX12_4K_2D: + block_size_log2 = 12; + break; + case AMD_FMT_MOD_TILE_GFX12_64K_2D: + block_size_log2 = 16; + break; + case AMD_FMT_MOD_TILE_GFX12_256K_2D: + block_size_log2 = 18; + break; + default: + drm_dbg_kms(rfb->base.dev, + "Gfx12 swizzle mode with unknown block size: %d\n", swizzle); + return -EINVAL; + } + + get_block_dimensions(block_size_log2, format_info->cpp[i], + &block_width, &block_height); } else { int swizzle = AMD_FMT_MOD_GET(TILE, modifier); @@ -1077,7 +1100,8 @@ return ret; } - if (AMD_FMT_MOD_GET(DCC, modifier)) { + if (AMD_FMT_MOD_GET(TILE_VERSION, modifier) <= AMD_FMT_MOD_TILE_VER_GFX11 && + AMD_FMT_MOD_GET(DCC, modifier)) { if (AMD_FMT_MOD_GET(DCC_RETILE, modifier)) { block_size_log2 = get_dcc_block_size(modifier, false, false); get_block_dimensions(block_size_log2 + 8, format_info->cpp[0], --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c @@ -849,12 +849,13 @@ * the ABM algorithm, with 1 being the least reduction and 4 being the most * reduction. * - * Defaults to 0, or disabled. Userspace can still override this level later - * after boot. + * Defaults to -1, or disabled. Userspace can only override this level after + * boot if it's set to auto. */ -uint amdgpu_dm_abm_level; -MODULE_PARM_DESC(abmlevel, "ABM level (0 = off (default), 1-4 = backlight reduction level) "); -module_param_named(abmlevel, amdgpu_dm_abm_level, uint, 0444); +int amdgpu_dm_abm_level = -1; +MODULE_PARM_DESC(abmlevel, + "ABM level (0 = off, 1-4 = backlight reduction level, -1 auto (default))"); +module_param_named(abmlevel, amdgpu_dm_abm_level, int, 0444); int amdgpu_backlight = -1; MODULE_PARM_DESC(backlight, "Backlight control (0 = pwm, 1 = aux, -1 auto (default))"); @@ -2451,8 +2452,11 @@ } for (i = 0; i < mgpu_info.num_dgpu; i++) { adev = mgpu_info.gpu_ins[i].adev; - if (!adev->kfd.init_complete) + if (!adev->kfd.init_complete) { + kgd2kfd_init_zone_device(adev); amdgpu_amdkfd_device_init(adev); + amdgpu_amdkfd_drm_client_create(adev); + } amdgpu_ttm_set_buffer_funcs_status(adev, true); } } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.c @@ -179,7 +179,7 @@ * Returns the number of bytes read/written; -errno on error. */ static int amdgpu_eeprom_xfer(struct i2c_adapter *i2c_adap, u32 eeprom_addr, - u8 *eeprom_buf, u16 buf_size, bool read) + u8 *eeprom_buf, u32 buf_size, bool read) { const struct i2c_adapter_quirks *quirks = i2c_adap->quirks; u16 limit; @@ -225,7 +225,7 @@ int amdgpu_eeprom_read(struct i2c_adapter *i2c_adap, u32 eeprom_addr, u8 *eeprom_buf, - u16 bytes) + u32 bytes) { return amdgpu_eeprom_xfer(i2c_adap, eeprom_addr, eeprom_buf, bytes, true); @@ -233,7 +233,7 @@ int amdgpu_eeprom_write(struct i2c_adapter *i2c_adap, u32 eeprom_addr, u8 *eeprom_buf, - u16 bytes) + u32 bytes) { return amdgpu_eeprom_xfer(i2c_adap, eeprom_addr, eeprom_buf, bytes, false); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.h @@ -28,10 +28,10 @@ int amdgpu_eeprom_read(struct i2c_adapter *i2c_adap, u32 eeprom_addr, u8 *eeprom_buf, - u16 bytes); + u32 bytes); int amdgpu_eeprom_write(struct i2c_adapter *i2c_adap, u32 eeprom_addr, u8 *eeprom_buf, - u16 bytes); + u32 bytes); #endif --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c @@ -97,6 +97,10 @@ stats.requested_visible_vram/1024UL); drm_printf(p, "amd-requested-gtt:\t%llu KiB\n", stats.requested_gtt/1024UL); + drm_printf(p, "drm-shared-vram:\t%llu KiB\n", stats.vram_shared/1024UL); + drm_printf(p, "drm-shared-gtt:\t%llu KiB\n", stats.gtt_shared/1024UL); + drm_printf(p, "drm-shared-cpu:\t%llu KiB\n", stats.cpu_shared/1024UL); + for (hw_ip = 0; hw_ip < AMDGPU_HW_IP_NUM; ++hw_ip) { if (!usage[hw_ip]) continue; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_fw_attestation.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_fw_attestation.c @@ -122,6 +122,10 @@ if (adev->flags & AMD_IS_APU) return 0; + if (amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(14, 0, 2) || + amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(14, 0, 3)) + return 0; + if (adev->asic_type >= CHIP_SIENNA_CICHLID) return 1; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c @@ -34,6 +34,7 @@ #include #endif #include "amdgpu.h" +#include "amdgpu_reset.h" #include #include @@ -408,7 +409,10 @@ return; mb(); - amdgpu_device_flush_hdp(adev, NULL); + if (down_read_trylock(&adev->reset_domain->sem)) { + amdgpu_device_flush_hdp(adev, NULL); + up_read(&adev->reset_domain->sem); + } for_each_set_bit(i, adev->vmhubs_mask, AMDGPU_MAX_VMHUBS) amdgpu_gmc_flush_gpu_tlb(adev, 0, i, 0); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c @@ -313,6 +313,9 @@ return -EINVAL; } + /* always clear VRAM */ + flags |= AMDGPU_GEM_CREATE_VRAM_CLEARED; + /* create a gem object to contain this object in */ if (args->in.domains & (AMDGPU_GEM_DOMAIN_GDS | AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA)) { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c @@ -814,8 +814,11 @@ int r; if (amdgpu_ras_is_supported(adev, ras_block->block)) { - if (!amdgpu_persistent_edc_harvesting_supported(adev)) - amdgpu_ras_reset_error_status(adev, AMDGPU_RAS_BLOCK__GFX); + if (!amdgpu_persistent_edc_harvesting_supported(adev)) { + r = amdgpu_ras_reset_error_status(adev, AMDGPU_RAS_BLOCK__GFX); + if (r) + return r; + } r = amdgpu_ras_block_late_init(adev, ras_block); if (r) @@ -959,7 +962,10 @@ pr_err("critical bug! too many kiq readers\n"); goto failed_unlock; } - amdgpu_ring_alloc(ring, 32); + r = amdgpu_ring_alloc(ring, 32); + if (r) + goto failed_unlock; + amdgpu_ring_emit_rreg(ring, reg, reg_val_offs); r = amdgpu_fence_emit_polling(ring, &seq, MAX_KIQ_REG_WAIT); if (r) @@ -1025,7 +1031,10 @@ } spin_lock_irqsave(&kiq->ring_lock, flags); - amdgpu_ring_alloc(ring, 32); + r = amdgpu_ring_alloc(ring, 32); + if (r) + goto failed_unlock; + amdgpu_ring_emit_wreg(ring, reg, v); r = amdgpu_fence_emit_polling(ring, &seq, MAX_KIQ_REG_WAIT); if (r) @@ -1061,6 +1070,7 @@ failed_undo: amdgpu_ring_undo(ring); +failed_unlock: spin_unlock_irqrestore(&kiq->ring_lock, flags); failed_kiq_write: dev_err(adev->dev, "failed to write reg:%x\n", reg); @@ -1205,7 +1215,8 @@ fw_size = le32_to_cpu(cp_hdr_v2_0->data_size_bytes); break; default: - break; + dev_err(adev->dev, "Invalid ucode id %u\n", ucode_id); + return; } if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c @@ -684,12 +684,17 @@ struct amdgpu_ring *ring = &adev->gfx.kiq[inst].ring; struct amdgpu_kiq *kiq = &adev->gfx.kiq[inst]; unsigned int ndw; - signed long r; + int r; uint32_t seq; - if (!adev->gmc.flush_pasid_uses_kiq || !ring->sched.ready || - !down_read_trylock(&adev->reset_domain->sem)) { + /* + * A GPU reset should flush all TLBs anyway, so no need to do + * this while one is ongoing. + */ + if (!down_read_trylock(&adev->reset_domain->sem)) + return 0; + if (!adev->gmc.flush_pasid_uses_kiq || !ring->sched.ready) { if (adev->gmc.flush_tlb_needs_extra_type_2) adev->gmc.gmc_funcs->flush_gpu_tlb_pasid(adev, pasid, 2, all_hub, @@ -703,43 +708,44 @@ adev->gmc.gmc_funcs->flush_gpu_tlb_pasid(adev, pasid, flush_type, all_hub, inst); - return 0; - } + r = 0; + } else { + /* 2 dwords flush + 8 dwords fence */ + ndw = kiq->pmf->invalidate_tlbs_size + 8; + + if (adev->gmc.flush_tlb_needs_extra_type_2) + ndw += kiq->pmf->invalidate_tlbs_size; + + if (adev->gmc.flush_tlb_needs_extra_type_0) + ndw += kiq->pmf->invalidate_tlbs_size; - /* 2 dwords flush + 8 dwords fence */ - ndw = kiq->pmf->invalidate_tlbs_size + 8; + spin_lock(&adev->gfx.kiq[inst].ring_lock); + r = amdgpu_ring_alloc(ring, ndw); + if (r) { + spin_unlock(&adev->gfx.kiq[inst].ring_lock); + goto error_unlock_reset; + } + if (adev->gmc.flush_tlb_needs_extra_type_2) + kiq->pmf->kiq_invalidate_tlbs(ring, pasid, 2, all_hub); - if (adev->gmc.flush_tlb_needs_extra_type_2) - ndw += kiq->pmf->invalidate_tlbs_size; + if (flush_type == 2 && adev->gmc.flush_tlb_needs_extra_type_0) + kiq->pmf->kiq_invalidate_tlbs(ring, pasid, 0, all_hub); - if (adev->gmc.flush_tlb_needs_extra_type_0) - ndw += kiq->pmf->invalidate_tlbs_size; + kiq->pmf->kiq_invalidate_tlbs(ring, pasid, flush_type, all_hub); + r = amdgpu_fence_emit_polling(ring, &seq, MAX_KIQ_REG_WAIT); + if (r) { + amdgpu_ring_undo(ring); + spin_unlock(&adev->gfx.kiq[inst].ring_lock); + goto error_unlock_reset; + } - spin_lock(&adev->gfx.kiq[inst].ring_lock); - amdgpu_ring_alloc(ring, ndw); - if (adev->gmc.flush_tlb_needs_extra_type_2) - kiq->pmf->kiq_invalidate_tlbs(ring, pasid, 2, all_hub); - - if (flush_type == 2 && adev->gmc.flush_tlb_needs_extra_type_0) - kiq->pmf->kiq_invalidate_tlbs(ring, pasid, 0, all_hub); - - kiq->pmf->kiq_invalidate_tlbs(ring, pasid, flush_type, all_hub); - r = amdgpu_fence_emit_polling(ring, &seq, MAX_KIQ_REG_WAIT); - if (r) { - amdgpu_ring_undo(ring); + amdgpu_ring_commit(ring); spin_unlock(&adev->gfx.kiq[inst].ring_lock); - goto error_unlock_reset; - } - - amdgpu_ring_commit(ring); - spin_unlock(&adev->gfx.kiq[inst].ring_lock); - r = amdgpu_fence_wait_polling(ring, seq, usec_timeout); - if (r < 1) { - dev_err(adev->dev, "wait for kiq fence error: %ld.\n", r); - r = -ETIME; - goto error_unlock_reset; + if (amdgpu_fence_wait_polling(ring, seq, usec_timeout) < 1) { + dev_err(adev->dev, "timeout waiting for kiq fence\n"); + r = -ETIME; + } } - r = 0; error_unlock_reset: up_read(&adev->reset_domain->sem); @@ -822,7 +828,6 @@ struct amdgpu_gmc *gmc = &adev->gmc; uint32_t gc_ver = amdgpu_ip_version(adev, GC_HWIP, 0); bool noretry_default = (gc_ver == IP_VERSION(9, 0, 1) || - gc_ver == IP_VERSION(9, 3, 0) || gc_ver == IP_VERSION(9, 4, 0) || gc_ver == IP_VERSION(9, 4, 1) || gc_ver == IP_VERSION(9, 4, 2) || --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.c @@ -129,13 +129,25 @@ */ int amdgpu_hmm_register(struct amdgpu_bo *bo, unsigned long addr) { + int r; + if (bo->kfd_bo) - return mmu_interval_notifier_insert(&bo->notifier, current->mm, + r = mmu_interval_notifier_insert(&bo->notifier, current->mm, addr, amdgpu_bo_size(bo), &amdgpu_hmm_hsa_ops); - return mmu_interval_notifier_insert(&bo->notifier, current->mm, addr, - amdgpu_bo_size(bo), - &amdgpu_hmm_gfx_ops); + else + r = mmu_interval_notifier_insert(&bo->notifier, current->mm, addr, + amdgpu_bo_size(bo), + &amdgpu_hmm_gfx_ops); + if (r) + /* + * Make sure amdgpu_hmm_unregister() doesn't call + * mmu_interval_notifier_remove() when the notifier isn't properly + * initialized. + */ + bo->notifier.mm = NULL; + + return r; } /** --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c @@ -193,8 +193,8 @@ need_ctx_switch = ring->current_ctx != fence_ctx; if (ring->funcs->emit_pipeline_sync && job && ((tmp = amdgpu_sync_get_fence(&job->explicit_sync)) || - (amdgpu_sriov_vf(adev) && need_ctx_switch) || - amdgpu_vm_need_pipeline_sync(ring, job))) { + need_ctx_switch || amdgpu_vm_need_pipeline_sync(ring, job))) { + need_pipe_sync = true; if (tmp) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c @@ -407,7 +407,7 @@ if (r || !idle) goto error; - if (vm->reserved_vmid[vmhub] || (enforce_isolation && (vmhub == AMDGPU_GFXHUB(0)))) { + if (amdgpu_vmid_uses_reserved(vm, vmhub)) { r = amdgpu_vmid_grab_reserved(vm, ring, job, &id, fence); if (r || !id) goto error; @@ -457,6 +457,19 @@ return r; } +/* + * amdgpu_vmid_uses_reserved - check if a VM will use a reserved VMID + * @vm: the VM to check + * @vmhub: the VMHUB which will be used + * + * Returns: True if the VM will use a reserved VMID. + */ +bool amdgpu_vmid_uses_reserved(struct amdgpu_vm *vm, unsigned int vmhub) +{ + return vm->reserved_vmid[vmhub] || + (enforce_isolation && (vmhub == AMDGPU_GFXHUB(0))); +} + int amdgpu_vmid_alloc_reserved(struct amdgpu_device *adev, unsigned vmhub) { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.h @@ -78,6 +78,7 @@ bool amdgpu_vmid_had_gpu_reset(struct amdgpu_device *adev, struct amdgpu_vmid *id); +bool amdgpu_vmid_uses_reserved(struct amdgpu_vm *vm, unsigned int vmhub); int amdgpu_vmid_alloc_reserved(struct amdgpu_device *adev, unsigned vmhub); void amdgpu_vmid_free_reserved(struct amdgpu_device *adev, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c @@ -445,6 +445,14 @@ entry.ih = ih; entry.iv_entry = (const uint32_t *)&ih->ring[ring_index]; + + /* + * timestamp is not supported on some legacy SOCs (cik, cz, iceland, + * si and tonga), so initialize timestamp and timestamp_src to 0 + */ + entry.timestamp = 0; + entry.timestamp_src = 0; + amdgpu_ih_decode_iv(adev, &entry); trace_amdgpu_iv(ih - &adev->irq.ih, &entry); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c @@ -159,7 +159,6 @@ void amdgpu_job_free_resources(struct amdgpu_job *job) { - struct amdgpu_ring *ring = to_amdgpu_ring(job->base.sched); struct dma_fence *f; unsigned i; @@ -172,7 +171,7 @@ f = NULL; for (i = 0; i < job->num_ibs; ++i) - amdgpu_ib_free(ring->adev, &job->ibs[i], f); + amdgpu_ib_free(NULL, &job->ibs[i], f); } static void amdgpu_job_free_cb(struct drm_sched_job *s_job) @@ -258,9 +257,8 @@ struct dma_fence *fence = NULL; int r; - /* Ignore soft recovered fences here */ r = drm_sched_entity_error(s_entity); - if (r && r != -ENODATA) + if (r) goto error; if (!fence && job->gang_submit) @@ -300,12 +298,15 @@ dma_fence_set_error(finished, -ECANCELED); if (finished->error < 0) { - DRM_INFO("Skip scheduling IBs!\n"); + dev_dbg(adev->dev, "Skip scheduling IBs in ring(%s)", + ring->name); } else { r = amdgpu_ib_schedule(ring, job->num_ibs, job->ibs, job, &fence); if (r) - DRM_ERROR("Error scheduling IBs (%d)\n", r); + dev_err(adev->dev, + "Error scheduling IBs (%d) in ring(%s)", r, + ring->name); } job->job_run_counter++; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c @@ -43,6 +43,7 @@ #include "amdgpu_gem.h" #include "amdgpu_display.h" #include "amdgpu_ras.h" +#include "amdgpu_reset.h" #include "amd_pcie.h" void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev) @@ -654,25 +655,32 @@ switch (type) { case AMD_IP_BLOCK_TYPE_GFX: ret = amdgpu_xcp_get_inst_details(xcp, AMDGPU_XCP_GFX, &inst_mask); + if (ret) + return ret; count = hweight32(inst_mask); break; case AMD_IP_BLOCK_TYPE_SDMA: ret = amdgpu_xcp_get_inst_details(xcp, AMDGPU_XCP_SDMA, &inst_mask); + if (ret) + return ret; count = hweight32(inst_mask); break; case AMD_IP_BLOCK_TYPE_JPEG: ret = amdgpu_xcp_get_inst_details(xcp, AMDGPU_XCP_VCN, &inst_mask); + if (ret) + return ret; count = hweight32(inst_mask) * adev->jpeg.num_jpeg_rings; break; case AMD_IP_BLOCK_TYPE_VCN: ret = amdgpu_xcp_get_inst_details(xcp, AMDGPU_XCP_VCN, &inst_mask); + if (ret) + return ret; count = hweight32(inst_mask); break; default: return -EINVAL; } - if (ret) - return ret; + return copy_to_user(out, &count, min(size, 4u)) ? -EFAULT : 0; } @@ -802,6 +810,7 @@ ? -EFAULT : 0; } case AMDGPU_INFO_READ_MMR_REG: { + int ret = 0; unsigned int n, alloc_size; uint32_t *regs; unsigned int se_num = (info->read_mmr_reg.instance >> @@ -811,24 +820,37 @@ AMDGPU_INFO_MMR_SH_INDEX_SHIFT) & AMDGPU_INFO_MMR_SH_INDEX_MASK; + if (!down_read_trylock(&adev->reset_domain->sem)) + return -ENOENT; + /* set full masks if the userspace set all bits * in the bitfields */ - if (se_num == AMDGPU_INFO_MMR_SE_INDEX_MASK) + if (se_num == AMDGPU_INFO_MMR_SE_INDEX_MASK) { se_num = 0xffffffff; - else if (se_num >= AMDGPU_GFX_MAX_SE) - return -EINVAL; - if (sh_num == AMDGPU_INFO_MMR_SH_INDEX_MASK) + } else if (se_num >= AMDGPU_GFX_MAX_SE) { + ret = -EINVAL; + goto out; + } + + if (sh_num == AMDGPU_INFO_MMR_SH_INDEX_MASK) { sh_num = 0xffffffff; - else if (sh_num >= AMDGPU_GFX_MAX_SH_PER_SE) - return -EINVAL; + } else if (sh_num >= AMDGPU_GFX_MAX_SH_PER_SE) { + ret = -EINVAL; + goto out; + } - if (info->read_mmr_reg.count > 128) - return -EINVAL; + if (info->read_mmr_reg.count > 128) { + ret = -EINVAL; + goto out; + } regs = kmalloc_array(info->read_mmr_reg.count, sizeof(*regs), GFP_KERNEL); - if (!regs) - return -ENOMEM; + if (!regs) { + ret = -ENOMEM; + goto out; + } + alloc_size = info->read_mmr_reg.count * sizeof(*regs); amdgpu_gfx_off_ctrl(adev, false); @@ -840,13 +862,17 @@ info->read_mmr_reg.dword_offset + i); kfree(regs); amdgpu_gfx_off_ctrl(adev, true); - return -EFAULT; + ret = -EFAULT; + goto out; } } amdgpu_gfx_off_ctrl(adev, true); n = copy_to_user(out, regs, min(size, alloc_size)); kfree(regs); - return n ? -EFAULT : 0; + ret = (n ? -EFAULT : 0); +out: + up_read(&adev->reset_domain->sem); + return ret; } case AMDGPU_INFO_DEV_INFO: { struct drm_amdgpu_info_device *dev_info; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c @@ -1084,8 +1084,10 @@ r = amdgpu_ring_init(adev, ring, 1024, NULL, 0, AMDGPU_RING_PRIO_DEFAULT, NULL); - if (r) + if (r) { + amdgpu_mes_unlock(&adev->mes); goto clean_up_memory; + } amdgpu_mes_ring_to_queue_props(adev, ring, &qprops); @@ -1118,7 +1120,6 @@ amdgpu_ring_fini(ring); clean_up_memory: kfree(ring); - amdgpu_mes_unlock(&adev->mes); return r; } @@ -1129,6 +1130,7 @@ return; amdgpu_mes_remove_hw_queue(adev, ring->hw_queue_id); + del_timer_sync(&ring->fence_drv.fallback_timer); amdgpu_ring_fini(ring); kfree(ring); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c @@ -608,6 +608,8 @@ else amdgpu_bo_placement_from_domain(bo, bp->domain); if (bp->type == ttm_bo_type_kernel) + bo->tbo.priority = 2; + else if (!(bp->flags & AMDGPU_GEM_CREATE_DISCARDABLE)) bo->tbo.priority = 1; if (!bp->destroy) @@ -620,8 +622,7 @@ return r; if (!amdgpu_gmc_vram_full_visible(&adev->gmc) && - bo->tbo.resource->mem_type == TTM_PL_VRAM && - amdgpu_bo_in_cpu_visible_vram(bo)) + amdgpu_res_cpu_visible(adev, bo->tbo.resource)) amdgpu_cs_report_moved_bytes(adev, ctx.bytes_moved, ctx.bytes_moved); else @@ -1245,14 +1246,18 @@ * amdgpu_bo_move_notify - notification about a memory move * @bo: pointer to a buffer object * @evict: if this move is evicting the buffer from the graphics address space + * @new_mem: new resource for backing the BO * * Marks the corresponding &amdgpu_bo buffer object as invalid, also performs * bookkeeping. * TTM driver callback which is called when ttm moves a buffer. */ -void amdgpu_bo_move_notify(struct ttm_buffer_object *bo, bool evict) +void amdgpu_bo_move_notify(struct ttm_buffer_object *bo, + bool evict, + struct ttm_resource *new_mem) { struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev); + struct ttm_resource *old_mem = bo->resource; struct amdgpu_bo *abo; if (!amdgpu_bo_is_amdgpu_bo(bo)) @@ -1264,37 +1269,50 @@ amdgpu_bo_kunmap(abo); if (abo->tbo.base.dma_buf && !abo->tbo.base.import_attach && - bo->resource->mem_type != TTM_PL_SYSTEM) + old_mem && old_mem->mem_type != TTM_PL_SYSTEM) dma_buf_move_notify(abo->tbo.base.dma_buf); - /* remember the eviction */ - if (evict) - atomic64_inc(&adev->num_evictions); + /* move_notify is called before move happens */ + trace_amdgpu_bo_move(abo, new_mem ? new_mem->mem_type : -1, + old_mem ? old_mem->mem_type : -1); } void amdgpu_bo_get_memory(struct amdgpu_bo *bo, struct amdgpu_mem_stats *stats) { + struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); + struct ttm_resource *res = bo->tbo.resource; uint64_t size = amdgpu_bo_size(bo); + struct drm_gem_object *obj; unsigned int domain; + bool shared; /* Abort if the BO doesn't currently have a backing store */ - if (!bo->tbo.resource) + if (!res) return; - domain = amdgpu_mem_type_to_domain(bo->tbo.resource->mem_type); + obj = &bo->tbo.base; + shared = drm_gem_object_is_shared_for_memory_stats(obj); + + domain = amdgpu_mem_type_to_domain(res->mem_type); switch (domain) { case AMDGPU_GEM_DOMAIN_VRAM: stats->vram += size; - if (amdgpu_bo_in_cpu_visible_vram(bo)) + if (amdgpu_res_cpu_visible(adev, bo->tbo.resource)) stats->visible_vram += size; + if (shared) + stats->vram_shared += size; break; case AMDGPU_GEM_DOMAIN_GTT: stats->gtt += size; + if (shared) + stats->gtt_shared += size; break; case AMDGPU_GEM_DOMAIN_CPU: default: stats->cpu += size; + if (shared) + stats->cpu_shared += size; break; } @@ -1381,10 +1399,7 @@ /* Remember that this BO was accessed by the CPU */ abo->flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED; - if (bo->resource->mem_type != TTM_PL_VRAM) - return 0; - - if (amdgpu_bo_in_cpu_visible_vram(abo)) + if (amdgpu_res_cpu_visible(adev, bo->resource)) return 0; /* Can't move a pinned BO to visible VRAM */ @@ -1408,7 +1423,7 @@ /* this should never happen */ if (bo->resource->mem_type == TTM_PL_VRAM && - !amdgpu_bo_in_cpu_visible_vram(abo)) + !amdgpu_res_cpu_visible(adev, bo->resource)) return VM_FAULT_SIGBUS; ttm_bo_move_to_lru_tail_unlocked(bo); @@ -1572,6 +1587,7 @@ */ u64 amdgpu_bo_print_info(int id, struct amdgpu_bo *bo, struct seq_file *m) { + struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); struct dma_buf_attachment *attachment; struct dma_buf *dma_buf; const char *placement; @@ -1580,10 +1596,11 @@ if (dma_resv_trylock(bo->tbo.base.resv)) { unsigned int domain; + domain = amdgpu_mem_type_to_domain(bo->tbo.resource->mem_type); switch (domain) { case AMDGPU_GEM_DOMAIN_VRAM: - if (amdgpu_bo_in_cpu_visible_vram(bo)) + if (amdgpu_res_cpu_visible(adev, bo->tbo.resource)) placement = "VRAM VISIBLE"; else placement = "VRAM"; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h @@ -138,12 +138,18 @@ struct amdgpu_mem_stats { /* current VRAM usage, includes visible VRAM */ uint64_t vram; + /* current shared VRAM usage, includes visible VRAM */ + uint64_t vram_shared; /* current visible VRAM usage */ uint64_t visible_vram; /* current GTT usage */ uint64_t gtt; + /* current shared GTT usage */ + uint64_t gtt_shared; /* current system memory usage */ uint64_t cpu; + /* current shared system memory usage */ + uint64_t cpu_shared; /* sum of evicted buffers, includes visible VRAM */ uint64_t evicted_vram; /* sum of evicted buffers due to CPU access */ @@ -245,28 +251,6 @@ } /** - * amdgpu_bo_in_cpu_visible_vram - check if BO is (partly) in visible VRAM - */ -static inline bool amdgpu_bo_in_cpu_visible_vram(struct amdgpu_bo *bo) -{ - struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); - struct amdgpu_res_cursor cursor; - - if (!bo->tbo.resource || bo->tbo.resource->mem_type != TTM_PL_VRAM) - return false; - - amdgpu_res_first(bo->tbo.resource, 0, amdgpu_bo_size(bo), &cursor); - while (cursor.remaining) { - if (cursor.start < adev->gmc.visible_vram_size) - return true; - - amdgpu_res_next(&cursor, cursor.size); - } - - return false; -} - -/** * amdgpu_bo_explicit_sync - return whether the bo is explicitly synced */ static inline bool amdgpu_bo_explicit_sync(struct amdgpu_bo *bo) @@ -344,7 +328,9 @@ int amdgpu_bo_get_metadata(struct amdgpu_bo *bo, void *buffer, size_t buffer_size, uint32_t *metadata_size, uint64_t *flags); -void amdgpu_bo_move_notify(struct ttm_buffer_object *bo, bool evict); +void amdgpu_bo_move_notify(struct ttm_buffer_object *bo, + bool evict, + struct ttm_resource *new_mem); void amdgpu_bo_release_notify(struct ttm_buffer_object *bo); vm_fault_t amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo); void amdgpu_bo_fence(struct amdgpu_bo *bo, struct dma_fence *fence, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c @@ -1340,6 +1340,9 @@ uint8_t dst_num_links = node_info.num_links; hive = amdgpu_get_xgmi_hive(psp->adev); + if (WARN_ON(!hive)) + return; + list_for_each_entry(mirror_adev, &hive->device_list, gmc.xgmi.head) { struct psp_xgmi_topology_info *mirror_top_info; int j; @@ -1546,6 +1549,68 @@ } } +static int psp_ras_send_cmd(struct psp_context *psp, + enum ras_command cmd_id, void *in, void *out) +{ + struct ta_ras_shared_memory *ras_cmd; + uint32_t cmd = cmd_id; + int ret = 0; + + if (!in) + return -EINVAL; + + mutex_lock(&psp->ras_context.mutex); + ras_cmd = (struct ta_ras_shared_memory *)psp->ras_context.context.mem_context.shared_buf; + memset(ras_cmd, 0, sizeof(struct ta_ras_shared_memory)); + + switch (cmd) { + case TA_RAS_COMMAND__ENABLE_FEATURES: + case TA_RAS_COMMAND__DISABLE_FEATURES: + memcpy(&ras_cmd->ras_in_message, + in, sizeof(ras_cmd->ras_in_message)); + break; + case TA_RAS_COMMAND__TRIGGER_ERROR: + memcpy(&ras_cmd->ras_in_message.trigger_error, + in, sizeof(ras_cmd->ras_in_message.trigger_error)); + break; + case TA_RAS_COMMAND__QUERY_ADDRESS: + memcpy(&ras_cmd->ras_in_message.address, + in, sizeof(ras_cmd->ras_in_message.address)); + break; + default: + dev_err(psp->adev->dev, "Invalid ras cmd id: %u\n", cmd); + ret = -EINVAL; + goto err_out; + } + + ras_cmd->cmd_id = cmd; + ret = psp_ras_invoke(psp, ras_cmd->cmd_id); + + switch (cmd) { + case TA_RAS_COMMAND__TRIGGER_ERROR: + if (ret || psp->cmd_buf_mem->resp.status) + ret = -EINVAL; + else if (out) + memcpy(out, &ras_cmd->ras_status, sizeof(ras_cmd->ras_status)); + break; + case TA_RAS_COMMAND__QUERY_ADDRESS: + if (ret || ras_cmd->ras_status || psp->cmd_buf_mem->resp.status) + ret = -EINVAL; + else if (out) + memcpy(out, + &ras_cmd->ras_out_message.address, + sizeof(ras_cmd->ras_out_message.address)); + break; + default: + break; + } + +err_out: + mutex_unlock(&psp->ras_context.mutex); + + return ret; +} + int psp_ras_invoke(struct psp_context *psp, uint32_t ta_cmd_id) { struct ta_ras_shared_memory *ras_cmd; @@ -1587,23 +1652,15 @@ int psp_ras_enable_features(struct psp_context *psp, union ta_ras_cmd_input *info, bool enable) { - struct ta_ras_shared_memory *ras_cmd; + enum ras_command cmd_id; int ret; - if (!psp->ras_context.context.initialized) + if (!psp->ras_context.context.initialized || !info) return -EINVAL; - ras_cmd = (struct ta_ras_shared_memory *)psp->ras_context.context.mem_context.shared_buf; - memset(ras_cmd, 0, sizeof(struct ta_ras_shared_memory)); - - if (enable) - ras_cmd->cmd_id = TA_RAS_COMMAND__ENABLE_FEATURES; - else - ras_cmd->cmd_id = TA_RAS_COMMAND__DISABLE_FEATURES; - - ras_cmd->ras_in_message = *info; - - ret = psp_ras_invoke(psp, ras_cmd->cmd_id); + cmd_id = enable ? + TA_RAS_COMMAND__ENABLE_FEATURES : TA_RAS_COMMAND__DISABLE_FEATURES; + ret = psp_ras_send_cmd(psp, cmd_id, info, NULL); if (ret) return -EINVAL; @@ -1627,6 +1684,8 @@ psp->ras_context.context.initialized = false; + mutex_destroy(&psp->ras_context.mutex); + return ret; } @@ -1711,9 +1770,10 @@ ret = psp_ta_load(psp, &psp->ras_context.context); - if (!ret && !ras_cmd->ras_status) + if (!ret && !ras_cmd->ras_status) { psp->ras_context.context.initialized = true; - else { + mutex_init(&psp->ras_context.mutex); + } else { if (ras_cmd->ras_status) dev_warn(psp->adev->dev, "RAS Init Status: 0x%X\n", ras_cmd->ras_status); @@ -1727,12 +1787,12 @@ int psp_ras_trigger_error(struct psp_context *psp, struct ta_ras_trigger_error_input *info, uint32_t instance_mask) { - struct ta_ras_shared_memory *ras_cmd; struct amdgpu_device *adev = psp->adev; int ret; uint32_t dev_mask; + uint32_t ras_status = 0; - if (!psp->ras_context.context.initialized) + if (!psp->ras_context.context.initialized || !info) return -EINVAL; switch (info->block_id) { @@ -1756,13 +1816,8 @@ dev_mask &= AMDGPU_RAS_INST_MASK; info->sub_block_index |= dev_mask; - ras_cmd = (struct ta_ras_shared_memory *)psp->ras_context.context.mem_context.shared_buf; - memset(ras_cmd, 0, sizeof(struct ta_ras_shared_memory)); - - ras_cmd->cmd_id = TA_RAS_COMMAND__TRIGGER_ERROR; - ras_cmd->ras_in_message.trigger_error = *info; - - ret = psp_ras_invoke(psp, ras_cmd->cmd_id); + ret = psp_ras_send_cmd(psp, + TA_RAS_COMMAND__TRIGGER_ERROR, info, &ras_status); if (ret) return -EINVAL; @@ -1772,11 +1827,36 @@ if (amdgpu_ras_intr_triggered()) return 0; - if (ras_cmd->ras_status == TA_RAS_STATUS__TEE_ERROR_ACCESS_DENIED) + if (ras_status == TA_RAS_STATUS__TEE_ERROR_ACCESS_DENIED) return -EACCES; - else if (ras_cmd->ras_status) + else if (ras_status) + return -EINVAL; + + return 0; +} + +int psp_ras_query_address(struct psp_context *psp, + struct ta_ras_query_address_input *addr_in, + struct ta_ras_query_address_output *addr_out) +{ + struct ta_ras_shared_memory *ras_cmd; + int ret; + + if (!psp->ras_context.context.initialized) + return -EINVAL; + + ras_cmd = (struct ta_ras_shared_memory *)psp->ras_context.context.mem_context.shared_buf; + memset(ras_cmd, 0, sizeof(struct ta_ras_shared_memory)); + + ras_cmd->cmd_id = TA_RAS_COMMAND__QUERY_ADDRESS; + ras_cmd->ras_in_message.address = *addr_in; + + ret = psp_ras_invoke(psp, ras_cmd->cmd_id); + if (ret || ras_cmd->ras_status || psp->cmd_buf_mem->resp.status) return -EINVAL; + *addr_out = ras_cmd->ras_out_message.address; + return 0; } // ras end @@ -3552,9 +3632,10 @@ if (err == -ENODEV) { dev_warn(adev->dev, "cap microcode does not exist, skip\n"); err = 0; - goto out; + } else { + dev_err(adev->dev, "fail to initialize cap microcode\n"); } - dev_err(adev->dev, "fail to initialize cap microcode\n"); + goto out; } info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CAP]; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h @@ -197,6 +197,7 @@ struct psp_ras_context { struct ta_context context; struct amdgpu_ras *ras; + struct mutex mutex; }; #define MEM_TRAIN_SYSTEM_SIGNATURE 0x54534942 @@ -502,6 +503,9 @@ int psp_ras_trigger_error(struct psp_context *psp, struct ta_ras_trigger_error_input *info, uint32_t instance_mask); int psp_ras_terminate(struct psp_context *psp); +int psp_ras_query_address(struct psp_context *psp, + struct ta_ras_query_address_input *addr_in, + struct ta_ras_query_address_output *addr_out); int psp_hdcp_invoke(struct psp_context *psp, uint32_t ta_cmd_id); int psp_dtm_invoke(struct psp_context *psp, uint32_t ta_cmd_id); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_psp_ta.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_psp_ta.c @@ -166,6 +166,9 @@ if (ret) return -EFAULT; + if (ta_bin_len > PSP_1_MEG) + return -EINVAL; + copy_pos += sizeof(uint32_t); ta_bin = kzalloc(ta_bin_len, GFP_KERNEL); @@ -334,7 +337,7 @@ set_ta_context_funcs(psp, ta_type, &context); - if (!context->initialized) { + if (!context || !context->initialized) { dev_err(adev->dev, "TA is not initialized\n"); ret = -EINVAL; goto err_free_shared_buf; @@ -348,6 +351,7 @@ context->session_id = ta_id; + mutex_lock(&psp->ras_context.mutex); ret = prep_ta_mem_context(&context->mem_context, shared_buf, shared_buf_len); if (ret) goto err_free_shared_buf; @@ -366,6 +370,7 @@ ret = -EFAULT; err_free_shared_buf: + mutex_unlock(&psp->ras_context.mutex); kfree(shared_buf); return ret; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c @@ -1998,12 +1998,15 @@ int amdgpu_ras_interrupt_dispatch(struct amdgpu_device *adev, struct ras_dispatch_if *info) { - struct ras_manager *obj = amdgpu_ras_find_obj(adev, &info->head); - struct ras_ih_data *data = &obj->ih_data; + struct ras_manager *obj; + struct ras_ih_data *data; + obj = amdgpu_ras_find_obj(adev, &info->head); if (!obj) return -EINVAL; + data = &obj->ih_data; + if (data->inuse == 0) return 0; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h @@ -38,6 +38,7 @@ */ #define AMDGPU_RAS_INST_MASK 0xfffff000 #define AMDGPU_RAS_INST_SHIFT 0xc +#define AMDGPU_RAS_GPU_ERR_HBM_ID(x) AMDGPU_GET_REG_FIELD(x, 14, 13) enum amdgpu_ras_block { AMDGPU_RAS_BLOCK__UMC = 0, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h @@ -32,6 +32,7 @@ AMDGPU_NEED_FULL_RESET = 0, AMDGPU_SKIP_HW_RESET = 1, + AMDGPU_HOST_FLR = 2, }; struct amdgpu_reset_context { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c @@ -352,7 +352,7 @@ ring->max_dw = max_dw; ring->hw_prio = hw_prio; - if (!ring->no_scheduler) { + if (!ring->no_scheduler && ring->funcs->type < AMDGPU_HW_IP_NUM) { hw_ip = ring->funcs->type; num_sched = &adev->gpu_sched[hw_ip][hw_prio].num_scheds; adev->gpu_sched[hw_ip][hw_prio].sched[(*num_sched)++] = @@ -473,8 +473,9 @@ size_t size, loff_t *pos) { struct amdgpu_ring *ring = file_inode(f)->i_private; - int r, i; uint32_t value, result, early[3]; + loff_t i; + int r; if (*pos & 3 || size & 3) return -EINVAL; @@ -524,46 +525,58 @@ { struct amdgpu_ring *ring = file_inode(f)->i_private; volatile u32 *mqd; - int r; + u32 *kbuf; + int r, i; uint32_t value, result; if (*pos & 3 || size & 3) return -EINVAL; - result = 0; + kbuf = kmalloc(ring->mqd_size, GFP_KERNEL); + if (!kbuf) + return -ENOMEM; r = amdgpu_bo_reserve(ring->mqd_obj, false); if (unlikely(r != 0)) - return r; + goto err_free; r = amdgpu_bo_kmap(ring->mqd_obj, (void **)&mqd); - if (r) { - amdgpu_bo_unreserve(ring->mqd_obj); - return r; - } + if (r) + goto err_unreserve; + + /* + * Copy to local buffer to avoid put_user(), which might fault + * and acquire mmap_sem, under reservation_ww_class_mutex. + */ + for (i = 0; i < ring->mqd_size/sizeof(u32); i++) + kbuf[i] = mqd[i]; + + amdgpu_bo_kunmap(ring->mqd_obj); + amdgpu_bo_unreserve(ring->mqd_obj); + result = 0; while (size) { if (*pos >= ring->mqd_size) - goto done; + break; - value = mqd[*pos/4]; + value = kbuf[*pos/4]; r = put_user(value, (uint32_t *)buf); if (r) - goto done; + goto err_free; buf += 4; result += 4; size -= 4; *pos += 4; } -done: - amdgpu_bo_kunmap(ring->mqd_obj); - mqd = NULL; - amdgpu_bo_unreserve(ring->mqd_obj); - if (r) - return r; - + kfree(kbuf); return result; + +err_unreserve: + amdgpu_bo_unreserve(ring->mqd_obj); +err_free: + kfree(kbuf); + return r; } static const struct file_operations amdgpu_debugfs_mqd_fops = { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_securedisplay.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_securedisplay.c @@ -135,6 +135,10 @@ mutex_unlock(&psp->securedisplay_context.mutex); break; case 2: + if (size < 3 || phy_id >= TA_SECUREDISPLAY_MAX_PHY) { + dev_err(adev->dev, "Invalid input: %s\n", str); + return -EINVAL; + } mutex_lock(&psp->securedisplay_context.mutex); psp_prep_securedisplay_cmd_buf(psp, &securedisplay_cmd, TA_SECUREDISPLAY_COMMAND__SEND_ROI_CRC); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -137,7 +137,7 @@ amdgpu_bo_placement_from_domain(abo, AMDGPU_GEM_DOMAIN_CPU); } else if (!amdgpu_gmc_vram_full_visible(&adev->gmc) && !(abo->flags & AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED) && - amdgpu_bo_in_cpu_visible_vram(abo)) { + amdgpu_res_cpu_visible(adev, bo->resource)) { /* Try evicting to the CPU inaccessible part of VRAM * first, but only set GTT as busy placement, so this @@ -408,40 +408,55 @@ return r; } -/* - * amdgpu_mem_visible - Check that memory can be accessed by ttm_bo_move_memcpy +/** + * amdgpu_res_cpu_visible - Check that resource can be accessed by CPU + * @adev: amdgpu device + * @res: the resource to check * - * Called by amdgpu_bo_move() + * Returns: true if the full resource is CPU visible, false otherwise. */ -static bool amdgpu_mem_visible(struct amdgpu_device *adev, - struct ttm_resource *mem) +bool amdgpu_res_cpu_visible(struct amdgpu_device *adev, + struct ttm_resource *res) { - u64 mem_size = (u64)mem->size; struct amdgpu_res_cursor cursor; - u64 end; - if (mem->mem_type == TTM_PL_SYSTEM || - mem->mem_type == TTM_PL_TT) + if (!res) + return false; + + if (res->mem_type == TTM_PL_SYSTEM || res->mem_type == TTM_PL_TT || + res->mem_type == AMDGPU_PL_PREEMPT || res->mem_type == AMDGPU_PL_DOORBELL) return true; - if (mem->mem_type != TTM_PL_VRAM) + + if (res->mem_type != TTM_PL_VRAM) return false; - amdgpu_res_first(mem, 0, mem_size, &cursor); - end = cursor.start + cursor.size; + amdgpu_res_first(res, 0, res->size, &cursor); while (cursor.remaining) { + if ((cursor.start + cursor.size) > adev->gmc.visible_vram_size) + return false; amdgpu_res_next(&cursor, cursor.size); + } - if (!cursor.remaining) - break; + return true; +} - /* ttm_resource_ioremap only supports contiguous memory */ - if (end != cursor.start) - return false; +/* + * amdgpu_res_copyable - Check that memory can be accessed by ttm_bo_move_memcpy + * + * Called by amdgpu_bo_move() + */ +static bool amdgpu_res_copyable(struct amdgpu_device *adev, + struct ttm_resource *mem) +{ + if (!amdgpu_res_cpu_visible(adev, mem)) + return false; - end = cursor.start + cursor.size; - } + /* ttm_resource_ioremap only supports contiguous memory */ + if (mem->mem_type == TTM_PL_VRAM && + !(mem->placement & TTM_PL_FLAG_CONTIGUOUS)) + return false; - return end <= adev->gmc.visible_vram_size; + return true; } /* @@ -471,14 +486,16 @@ if (!old_mem || (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL)) { + amdgpu_bo_move_notify(bo, evict, new_mem); ttm_bo_move_null(bo, new_mem); - goto out; + return 0; } if (old_mem->mem_type == TTM_PL_SYSTEM && (new_mem->mem_type == TTM_PL_TT || new_mem->mem_type == AMDGPU_PL_PREEMPT)) { + amdgpu_bo_move_notify(bo, evict, new_mem); ttm_bo_move_null(bo, new_mem); - goto out; + return 0; } if ((old_mem->mem_type == TTM_PL_TT || old_mem->mem_type == AMDGPU_PL_PREEMPT) && @@ -488,9 +505,10 @@ return r; amdgpu_ttm_backend_unbind(bo->bdev, bo->ttm); + amdgpu_bo_move_notify(bo, evict, new_mem); ttm_resource_free(bo, &bo->resource); ttm_bo_assign_mem(bo, new_mem); - goto out; + return 0; } if (old_mem->mem_type == AMDGPU_PL_GDS || @@ -502,8 +520,9 @@ new_mem->mem_type == AMDGPU_PL_OA || new_mem->mem_type == AMDGPU_PL_DOORBELL) { /* Nothing to save here */ + amdgpu_bo_move_notify(bo, evict, new_mem); ttm_bo_move_null(bo, new_mem); - goto out; + return 0; } if (bo->type == ttm_bo_type_device && @@ -515,27 +534,28 @@ abo->flags &= ~AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED; } - if (adev->mman.buffer_funcs_enabled) { - if (((old_mem->mem_type == TTM_PL_SYSTEM && - new_mem->mem_type == TTM_PL_VRAM) || - (old_mem->mem_type == TTM_PL_VRAM && - new_mem->mem_type == TTM_PL_SYSTEM))) { - hop->fpfn = 0; - hop->lpfn = 0; - hop->mem_type = TTM_PL_TT; - hop->flags = TTM_PL_FLAG_TEMPORARY; - return -EMULTIHOP; - } + if (adev->mman.buffer_funcs_enabled && + ((old_mem->mem_type == TTM_PL_SYSTEM && + new_mem->mem_type == TTM_PL_VRAM) || + (old_mem->mem_type == TTM_PL_VRAM && + new_mem->mem_type == TTM_PL_SYSTEM))) { + hop->fpfn = 0; + hop->lpfn = 0; + hop->mem_type = TTM_PL_TT; + hop->flags = TTM_PL_FLAG_TEMPORARY; + return -EMULTIHOP; + } + amdgpu_bo_move_notify(bo, evict, new_mem); + if (adev->mman.buffer_funcs_enabled) r = amdgpu_move_blit(bo, evict, new_mem, old_mem); - } else { + else r = -ENODEV; - } if (r) { /* Check that all memory is CPU accessible */ - if (!amdgpu_mem_visible(adev, old_mem) || - !amdgpu_mem_visible(adev, new_mem)) { + if (!amdgpu_res_copyable(adev, old_mem) || + !amdgpu_res_copyable(adev, new_mem)) { pr_err("Move buffer fallback to memcpy unavailable\n"); return r; } @@ -545,11 +565,10 @@ return r; } - trace_amdgpu_bo_move(abo, new_mem->mem_type, old_mem->mem_type); -out: - /* update statistics */ + /* update statistics after the move */ + if (evict) + atomic64_inc(&adev->num_evictions); atomic64_add(bo->base.size, &adev->num_bytes_moved); - amdgpu_bo_move_notify(bo, evict); return 0; } @@ -562,7 +581,6 @@ struct ttm_resource *mem) { struct amdgpu_device *adev = amdgpu_ttm_adev(bdev); - size_t bus_size = (size_t)mem->size; switch (mem->mem_type) { case TTM_PL_SYSTEM: @@ -573,9 +591,6 @@ break; case TTM_PL_VRAM: mem->bus.offset = mem->start << PAGE_SHIFT; - /* check if it's visible */ - if ((mem->bus.offset + bus_size) > adev->gmc.visible_vram_size) - return -EINVAL; if (adev->mman.aper_base_kaddr && mem->placement & TTM_PL_FLAG_CONTIGUOUS) @@ -779,7 +794,7 @@ /* Map SG to device */ r = dma_map_sgtable(adev->dev, ttm->sg, direction, 0); if (r) - goto release_sg; + goto release_sg_table; /* convert SG to linear array of pages and dma addresses */ drm_prime_sg_to_dma_addr_array(ttm->sg, gtt->ttm.dma_address, @@ -787,6 +802,8 @@ return 0; +release_sg_table: + sg_free_table(ttm->sg); release_sg: kfree(ttm->sg); ttm->sg = NULL; @@ -869,6 +886,7 @@ amdgpu_gart_bind(adev, gtt->offset, ttm->num_pages, gtt->ttm.dma_address, flags); } + gtt->bound = true; } /* @@ -1554,7 +1572,7 @@ static void amdgpu_bo_delete_mem_notify(struct ttm_buffer_object *bo) { - amdgpu_bo_move_notify(bo, false); + amdgpu_bo_move_notify(bo, false, NULL); } static struct ttm_device_funcs amdgpu_bo_driver = { @@ -1816,6 +1834,7 @@ mutex_init(&adev->mman.gtt_window_lock); + dma_set_max_seg_size(adev->dev, UINT_MAX); /* No others user of address space so set it to 0 */ r = ttm_device_init(&adev->mman.bdev, &amdgpu_bo_driver, adev->dev, adev_to_drm(adev)->anon_inode->i_mapping, @@ -2029,6 +2048,7 @@ ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_GDS); ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_GWS); ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_OA); + ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_DOORBELL); ttm_device_fini(&adev->mman.bdev); adev->mman.initialized = false; DRM_INFO("amdgpu: ttm finalized\n"); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h @@ -139,6 +139,9 @@ int amdgpu_vram_mgr_query_page_status(struct amdgpu_vram_mgr *mgr, uint64_t start); +bool amdgpu_res_cpu_visible(struct amdgpu_device *adev, + struct ttm_resource *res); + int amdgpu_ttm_init(struct amdgpu_device *adev); void amdgpu_ttm_fini(struct amdgpu_device *adev); void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c @@ -175,6 +175,7 @@ } kfree(err_data->err_addr); + err_data->err_addr = NULL; return AMDGPU_RAS_SUCCESS; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c @@ -766,6 +766,9 @@ { struct amdgpu_device *adev = (struct amdgpu_device *)handle; + if (amdgpu_in_reset(adev) || adev->in_s0ix || adev->in_suspend) + return 0; + return umsch_mm_test(adev); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c @@ -214,15 +214,15 @@ drm_sched_entity_destroy(&adev->vce.entity); - amdgpu_bo_free_kernel(&adev->vce.vcpu_bo, &adev->vce.gpu_addr, - (void **)&adev->vce.cpu_addr); - for (i = 0; i < adev->vce.num_rings; i++) amdgpu_ring_fini(&adev->vce.ring[i]); amdgpu_ucode_release(&adev->vce.fw); mutex_destroy(&adev->vce.idle_mutex); + amdgpu_bo_free_kernel(&adev->vce.vcpu_bo, &adev->vce.gpu_addr, + (void **)&adev->vce.cpu_addr); + return 0; } @@ -743,7 +743,8 @@ uint32_t created = 0; uint32_t allocated = 0; uint32_t tmp, handle = 0; - uint32_t *size = &tmp; + uint32_t dummy = 0xffffffff; + uint32_t *size = &dummy; unsigned int idx; int i, r = 0; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c @@ -137,6 +137,10 @@ } } + /* from vcn4 and above, only unified queue is used */ + adev->vcn.using_unified_queue = + amdgpu_ip_version(adev, UVD_HWIP, 0) >= IP_VERSION(4, 0, 0); + hdr = (const struct common_firmware_header *)adev->vcn.fw->data; adev->vcn.fw_version = le32_to_cpu(hdr->ucode_version); @@ -261,18 +265,6 @@ return 0; } -/* from vcn4 and above, only unified queue is used */ -static bool amdgpu_vcn_using_unified_queue(struct amdgpu_ring *ring) -{ - struct amdgpu_device *adev = ring->adev; - bool ret = false; - - if (amdgpu_ip_version(adev, UVD_HWIP, 0) >= IP_VERSION(4, 0, 0)) - ret = true; - - return ret; -} - bool amdgpu_vcn_is_disabled_vcn(struct amdgpu_device *adev, enum vcn_ring_type type, uint32_t vcn_instance) { bool ret = false; @@ -382,7 +374,9 @@ for (i = 0; i < adev->vcn.num_enc_rings; ++i) fence[j] += amdgpu_fence_count_emitted(&adev->vcn.inst[j].ring_enc[i]); - if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) { + /* Only set DPG pause for VCN3 or below, VCN4 and above will be handled by FW */ + if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG && + !adev->vcn.using_unified_queue) { struct dpg_pause_state new_state; if (fence[j] || @@ -428,7 +422,9 @@ amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCN, AMD_PG_STATE_UNGATE); - if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) { + /* Only set DPG pause for VCN3 or below, VCN4 and above will be handled by FW */ + if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG && + !adev->vcn.using_unified_queue) { struct dpg_pause_state new_state; if (ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC) { @@ -454,8 +450,12 @@ void amdgpu_vcn_ring_end_use(struct amdgpu_ring *ring) { + struct amdgpu_device *adev = ring->adev; + + /* Only set DPG pause for VCN3 or below, VCN4 and above will be handled by FW */ if (ring->adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG && - ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC) + ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC && + !adev->vcn.using_unified_queue) atomic_dec(&ring->adev->vcn.inst[ring->me].dpg_enc_submission_cnt); atomic_dec(&ring->adev->vcn.total_submission_cnt); @@ -709,12 +709,11 @@ struct amdgpu_job *job; struct amdgpu_ib *ib; uint64_t addr = AMDGPU_GPU_PAGE_ALIGN(ib_msg->gpu_addr); - bool sq = amdgpu_vcn_using_unified_queue(ring); uint32_t *ib_checksum; uint32_t ib_pack_in_dw; int i, r; - if (sq) + if (adev->vcn.using_unified_queue) ib_size_dw += 8; r = amdgpu_job_alloc_with_ib(ring->adev, NULL, NULL, @@ -727,7 +726,7 @@ ib->length_dw = 0; /* single queue headers */ - if (sq) { + if (adev->vcn.using_unified_queue) { ib_pack_in_dw = sizeof(struct amdgpu_vcn_decode_buffer) / sizeof(uint32_t) + 4 + 2; /* engine info + decoding ib in dw */ ib_checksum = amdgpu_vcn_unified_ring_ib_header(ib, ib_pack_in_dw, false); @@ -746,7 +745,7 @@ for (i = ib->length_dw; i < ib_size_dw; ++i) ib->ptr[i] = 0x0; - if (sq) + if (adev->vcn.using_unified_queue) amdgpu_vcn_unified_ring_ib_checksum(&ib_checksum, ib_pack_in_dw); r = amdgpu_job_submit_direct(job, ring, &f); @@ -836,15 +835,15 @@ struct dma_fence **fence) { unsigned int ib_size_dw = 16; + struct amdgpu_device *adev = ring->adev; struct amdgpu_job *job; struct amdgpu_ib *ib; struct dma_fence *f = NULL; uint32_t *ib_checksum = NULL; uint64_t addr; - bool sq = amdgpu_vcn_using_unified_queue(ring); int i, r; - if (sq) + if (adev->vcn.using_unified_queue) ib_size_dw += 8; r = amdgpu_job_alloc_with_ib(ring->adev, NULL, NULL, @@ -858,7 +857,7 @@ ib->length_dw = 0; - if (sq) + if (adev->vcn.using_unified_queue) ib_checksum = amdgpu_vcn_unified_ring_ib_header(ib, 0x11, true); ib->ptr[ib->length_dw++] = 0x00000018; @@ -880,7 +879,7 @@ for (i = ib->length_dw; i < ib_size_dw; ++i) ib->ptr[i] = 0x0; - if (sq) + if (adev->vcn.using_unified_queue) amdgpu_vcn_unified_ring_ib_checksum(&ib_checksum, 0x11); r = amdgpu_job_submit_direct(job, ring, &f); @@ -903,15 +902,15 @@ struct dma_fence **fence) { unsigned int ib_size_dw = 16; + struct amdgpu_device *adev = ring->adev; struct amdgpu_job *job; struct amdgpu_ib *ib; struct dma_fence *f = NULL; uint32_t *ib_checksum = NULL; uint64_t addr; - bool sq = amdgpu_vcn_using_unified_queue(ring); int i, r; - if (sq) + if (adev->vcn.using_unified_queue) ib_size_dw += 8; r = amdgpu_job_alloc_with_ib(ring->adev, NULL, NULL, @@ -925,7 +924,7 @@ ib->length_dw = 0; - if (sq) + if (adev->vcn.using_unified_queue) ib_checksum = amdgpu_vcn_unified_ring_ib_header(ib, 0x11, true); ib->ptr[ib->length_dw++] = 0x00000018; @@ -947,7 +946,7 @@ for (i = ib->length_dw; i < ib_size_dw; ++i) ib->ptr[i] = 0x0; - if (sq) + if (adev->vcn.using_unified_queue) amdgpu_vcn_unified_ring_ib_checksum(&ib_checksum, 0x11); r = amdgpu_job_submit_direct(job, ring, &f); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h @@ -287,6 +287,7 @@ uint16_t inst_mask; uint8_t num_inst_per_aid; + bool using_unified_queue; }; struct amdgpu_fw_shared_rb_ptrs_struct { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c @@ -138,8 +138,10 @@ if (virt->ops && virt->ops->req_full_gpu) { r = virt->ops->req_full_gpu(adev, init); - if (r) + if (r) { + adev->no_hw_access = true; return r; + } adev->virt.caps &= ~AMDGPU_SRIOV_CAPS_RUNTIME; } @@ -437,6 +439,8 @@ else vram_usage_va = adev->mman.drv_vram_usage_va; + memset(&bp, 0, sizeof(bp)); + if (bp_block_size) { bp_cnt = bp_block_size / sizeof(uint64_t); for (bp_idx = 0; bp_idx < bp_cnt; bp_idx++) { @@ -616,7 +620,7 @@ vf2pf_info->dummy_page_addr = (uint64_t)adev->dummy_page_addr; vf2pf_info->checksum = amd_sriov_msg_checksum( - vf2pf_info, vf2pf_info->header.size, 0, 0); + vf2pf_info, sizeof(*vf2pf_info), 0, 0); return 0; } @@ -999,11 +1003,17 @@ return 0; } + if (amdgpu_device_skip_hw_access(adev)) + return 0; + reg_access_ctrl = &adev->gfx.rlc.reg_access_ctrl[xcc_id]; scratch_reg0 = (void __iomem *)adev->rmmio + 4 * reg_access_ctrl->scratch_reg0; scratch_reg1 = (void __iomem *)adev->rmmio + 4 * reg_access_ctrl->scratch_reg1; scratch_reg2 = (void __iomem *)adev->rmmio + 4 * reg_access_ctrl->scratch_reg2; scratch_reg3 = (void __iomem *)adev->rmmio + 4 * reg_access_ctrl->scratch_reg3; + + mutex_lock(&adev->virt.rlcg_reg_lock); + if (reg_access_ctrl->spare_int) spare_int = (void __iomem *)adev->rmmio + 4 * reg_access_ctrl->spare_int; @@ -1059,6 +1069,9 @@ } ret = readl(scratch_reg0); + + mutex_unlock(&adev->virt.rlcg_reg_lock); + return ret; } @@ -1068,6 +1081,9 @@ { u32 rlcg_flag; + if (amdgpu_device_skip_hw_access(adev)) + return; + if (!amdgpu_sriov_runtime(adev) && amdgpu_virt_get_rlcg_reg_access_flag(adev, acc_flags, hwip, true, &rlcg_flag)) { amdgpu_virt_rlcg_reg_rw(adev, offset, value, rlcg_flag, xcc_id); @@ -1085,6 +1101,9 @@ { u32 rlcg_flag; + if (amdgpu_device_skip_hw_access(adev)) + return 0; + if (!amdgpu_sriov_runtime(adev) && amdgpu_virt_get_rlcg_reg_access_flag(adev, acc_flags, hwip, false, &rlcg_flag)) return amdgpu_virt_rlcg_reg_rw(adev, offset, 0, rlcg_flag, xcc_id); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h @@ -265,6 +265,8 @@ /* the ucode id to signal the autoload */ uint32_t autoload_ucode_id; + + struct mutex rlcg_reg_lock; }; struct amdgpu_video_codec_info; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c @@ -3,6 +3,7 @@ #include #include #include +#include #include #include "amdgpu.h" @@ -314,7 +315,13 @@ return 0; } afb = to_amdgpu_framebuffer(new_state->fb); - obj = new_state->fb->obj[0]; + + obj = drm_gem_fb_get_obj(new_state->fb, 0); + if (!obj) { + DRM_ERROR("Failed to get obj from framebuffer\n"); + return -EINVAL; + } + rbo = gem_to_amdgpu_bo(obj); adev = amdgpu_ttm_adev(rbo->tbo.bdev); @@ -368,12 +375,19 @@ struct drm_plane_state *old_state) { struct amdgpu_bo *rbo; + struct drm_gem_object *obj; int r; if (!old_state->fb) return; - rbo = gem_to_amdgpu_bo(old_state->fb->obj[0]); + obj = drm_gem_fb_get_obj(old_state->fb, 0); + if (!obj) { + DRM_ERROR("Failed to get obj from framebuffer\n"); + return; + } + + rbo = gem_to_amdgpu_bo(obj); r = amdgpu_bo_reserve(rbo, false); if (unlikely(r)) { DRM_ERROR("failed to reserve rbo before unpin\n"); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c @@ -418,7 +418,7 @@ if (!vm) return result; - result += vm->generation; + result += lower_32_bits(vm->generation); /* Add one if the page tables will be re-generated on next CS */ if (drm_sched_entity_error(&vm->delayed)) ++result; @@ -443,13 +443,14 @@ int (*validate)(void *p, struct amdgpu_bo *bo), void *param) { + uint64_t new_vm_generation = amdgpu_vm_generation(adev, vm); struct amdgpu_vm_bo_base *bo_base; struct amdgpu_bo *shadow; struct amdgpu_bo *bo; int r; - if (drm_sched_entity_error(&vm->delayed)) { - ++vm->generation; + if (vm->generation != new_vm_generation) { + vm->generation = new_vm_generation; amdgpu_vm_bo_reset_state_machine(vm); amdgpu_vm_fini_entities(vm); r = amdgpu_vm_init_entities(adev, vm); @@ -1165,10 +1166,9 @@ * next command submission. */ if (bo && bo->tbo.base.resv == vm->root.bo->tbo.base.resv) { - uint32_t mem_type = bo->tbo.resource->mem_type; - - if (!(bo->preferred_domains & - amdgpu_mem_type_to_domain(mem_type))) + if (bo->tbo.resource && + !(bo->preferred_domains & + amdgpu_mem_type_to_domain(bo->tbo.resource->mem_type))) amdgpu_vm_bo_evicted(&bo_va->base); else amdgpu_vm_bo_idle(&bo_va->base); @@ -1559,6 +1559,37 @@ trace_amdgpu_vm_bo_map(bo_va, mapping); } +/* Validate operation parameters to prevent potential abuse */ +static int amdgpu_vm_verify_parameters(struct amdgpu_device *adev, + struct amdgpu_bo *bo, + uint64_t saddr, + uint64_t offset, + uint64_t size) +{ + uint64_t tmp, lpfn; + + if (saddr & AMDGPU_GPU_PAGE_MASK + || offset & AMDGPU_GPU_PAGE_MASK + || size & AMDGPU_GPU_PAGE_MASK) + return -EINVAL; + + if (check_add_overflow(saddr, size, &tmp) + || check_add_overflow(offset, size, &tmp) + || size == 0 /* which also leads to end < begin */) + return -EINVAL; + + /* make sure object fit at this offset */ + if (bo && offset + size > amdgpu_bo_size(bo)) + return -EINVAL; + + /* Ensure last pfn not exceed max_pfn */ + lpfn = (saddr + size - 1) >> AMDGPU_GPU_PAGE_SHIFT; + if (lpfn >= adev->vm_manager.max_pfn) + return -EINVAL; + + return 0; +} + /** * amdgpu_vm_bo_map - map bo inside a vm * @@ -1585,21 +1616,14 @@ struct amdgpu_bo *bo = bo_va->base.bo; struct amdgpu_vm *vm = bo_va->base.vm; uint64_t eaddr; + int r; - /* validate the parameters */ - if (saddr & ~PAGE_MASK || offset & ~PAGE_MASK || size & ~PAGE_MASK) - return -EINVAL; - if (saddr + size <= saddr || offset + size <= offset) - return -EINVAL; - - /* make sure object fit at this offset */ - eaddr = saddr + size - 1; - if ((bo && offset + size > amdgpu_bo_size(bo)) || - (eaddr >= adev->vm_manager.max_pfn << AMDGPU_GPU_PAGE_SHIFT)) - return -EINVAL; + r = amdgpu_vm_verify_parameters(adev, bo, saddr, offset, size); + if (r) + return r; saddr /= AMDGPU_GPU_PAGE_SIZE; - eaddr /= AMDGPU_GPU_PAGE_SIZE; + eaddr = saddr + (size - 1) / AMDGPU_GPU_PAGE_SIZE; tmp = amdgpu_vm_it_iter_first(&vm->va, saddr, eaddr); if (tmp) { @@ -1652,17 +1676,9 @@ uint64_t eaddr; int r; - /* validate the parameters */ - if (saddr & ~PAGE_MASK || offset & ~PAGE_MASK || size & ~PAGE_MASK) - return -EINVAL; - if (saddr + size <= saddr || offset + size <= offset) - return -EINVAL; - - /* make sure object fit at this offset */ - eaddr = saddr + size - 1; - if ((bo && offset + size > amdgpu_bo_size(bo)) || - (eaddr >= adev->vm_manager.max_pfn << AMDGPU_GPU_PAGE_SHIFT)) - return -EINVAL; + r = amdgpu_vm_verify_parameters(adev, bo, saddr, offset, size); + if (r) + return r; /* Allocate all the needed memory */ mapping = kmalloc(sizeof(*mapping), GFP_KERNEL); @@ -1676,7 +1692,7 @@ } saddr /= AMDGPU_GPU_PAGE_SIZE; - eaddr /= AMDGPU_GPU_PAGE_SIZE; + eaddr = saddr + (size - 1) / AMDGPU_GPU_PAGE_SIZE; mapping->start = saddr; mapping->last = eaddr; @@ -1763,10 +1779,14 @@ struct amdgpu_bo_va_mapping *before, *after, *tmp, *next; LIST_HEAD(removed); uint64_t eaddr; + int r; + + r = amdgpu_vm_verify_parameters(adev, NULL, saddr, 0, size); + if (r) + return r; - eaddr = saddr + size - 1; saddr /= AMDGPU_GPU_PAGE_SIZE; - eaddr /= AMDGPU_GPU_PAGE_SIZE; + eaddr = saddr + (size - 1) / AMDGPU_GPU_PAGE_SIZE; /* Allocate all the needed memory */ before = kzalloc(sizeof(*before), GFP_KERNEL); @@ -2231,7 +2251,7 @@ vm->last_update = dma_fence_get_stub(); vm->last_unlocked = dma_fence_get_stub(); vm->last_tlb_flush = dma_fence_get_stub(); - vm->generation = 0; + vm->generation = amdgpu_vm_generation(adev, NULL); mutex_init(&vm->eviction_lock); vm->evicting = false; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c @@ -766,11 +766,15 @@ struct amdgpu_vm_bo_base *entry) { struct amdgpu_vm_bo_base *parent = amdgpu_vm_pt_parent(entry); - struct amdgpu_bo *bo = parent->bo, *pbo; + struct amdgpu_bo *bo, *pbo; struct amdgpu_vm *vm = params->vm; uint64_t pde, pt, flags; unsigned int level; + if (WARN_ON(!parent)) + return -EINVAL; + + bo = parent->bo; for (level = 0, pbo = bo->parent; pbo; ++level) pbo = pbo->parent; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c @@ -102,6 +102,11 @@ if (!r) r = amdgpu_sync_push_to_job(&sync, p->job); amdgpu_sync_free(&sync); + + if (r) { + p->num_dw_left = 0; + amdgpu_job_free(p->job); + } return r; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c @@ -390,6 +390,12 @@ struct amdgpu_vpe *vpe = &adev->vpe; int ret; + /* Power on VPE */ + ret = amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VPE, + AMD_PG_STATE_UNGATE); + if (ret) + return ret; + ret = vpe_load_microcode(vpe); if (ret) return ret; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c @@ -31,6 +31,8 @@ #include "amdgpu_atomfirmware.h" #include "atom.h" +#define AMDGPU_MAX_SG_SEGMENT_SIZE (2UL << 30) + struct amdgpu_vram_reservation { u64 start; u64 size; @@ -516,9 +518,7 @@ BUG_ON(min_block_size < mm->chunk_size); - /* Limit maximum size to 2GiB due to SG table limitations */ - size = min(remaining_size, 2ULL << 30); - + size = remaining_size; if ((size >= (u64)pages_per_block << PAGE_SHIFT) && !(size & (((u64)pages_per_block << PAGE_SHIFT) - 1))) min_block_size = (u64)pages_per_block << PAGE_SHIFT; @@ -646,7 +646,7 @@ amdgpu_res_first(res, offset, length, &cursor); while (cursor.remaining) { num_entries++; - amdgpu_res_next(&cursor, cursor.size); + amdgpu_res_next(&cursor, min(cursor.size, AMDGPU_MAX_SG_SEGMENT_SIZE)); } r = sg_alloc_table(*sgt, num_entries, GFP_KERNEL); @@ -666,7 +666,7 @@ amdgpu_res_first(res, offset, length, &cursor); for_each_sgtable_sg((*sgt), sg, i) { phys_addr_t phys = cursor.start + adev->gmc.aper_base; - size_t size = cursor.size; + unsigned long size = min(cursor.size, AMDGPU_MAX_SG_SEGMENT_SIZE); dma_addr_t addr; addr = dma_map_resource(dev, phys, size, dir, @@ -679,7 +679,7 @@ sg_dma_address(sg) = addr; sg_dma_len(sg) = size; - amdgpu_res_next(&cursor, cursor.size); + amdgpu_res_next(&cursor, size); } return 0; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.h @@ -180,6 +180,6 @@ #define for_each_xcp(xcp_mgr, xcp, i) \ for (i = 0, xcp = amdgpu_get_next_xcp(xcp_mgr, &i); xcp; \ - xcp = amdgpu_get_next_xcp(xcp_mgr, &i)) + ++i, xcp = amdgpu_get_next_xcp(xcp_mgr, &i)) #endif --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c @@ -434,6 +434,9 @@ } } + if (i == top->num_nodes) + return -EINVAL; + for (i = 0; i < top->num_nodes; i++) { for (j = 0; j < top->nodes[i].num_links; j++) /* node id in sysfs starts from 1 rather than 0 so +1 here */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h @@ -210,7 +210,7 @@ uint32_t pcie_atomic_ops_support_flags; /* reserved */ uint32_t reserved[256 - AMD_SRIOV_MSG_PF2VF_INFO_FILLED_SIZE]; -}; +} __packed; struct amd_sriov_msg_vf2pf_info_header { /* the total structure size in byte */ @@ -268,7 +268,7 @@ /* reserved */ uint32_t reserved[256 - AMD_SRIOV_MSG_VF2PF_INFO_FILLED_SIZE]; -}; +} __packed; /* mailbox message send from guest to host */ enum amd_sriov_mailbox_request_message { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c @@ -62,6 +62,11 @@ adev->doorbell_index.max_assignment = AMDGPU_DOORBELL_LAYOUT1_MAX_ASSIGNMENT << 1; } +static bool aqua_vanjaram_xcp_vcn_shared(struct amdgpu_device *adev) +{ + return (adev->xcp_mgr->num_xcps > adev->vcn.num_vcn_inst); +} + static void aqua_vanjaram_set_xcp_id(struct amdgpu_device *adev, uint32_t inst_idx, struct amdgpu_ring *ring) { @@ -87,7 +92,7 @@ case AMDGPU_RING_TYPE_VCN_ENC: case AMDGPU_RING_TYPE_VCN_JPEG: ip_blk = AMDGPU_XCP_VCN; - if (adev->xcp_mgr->mode == AMDGPU_CPX_PARTITION_MODE) + if (aqua_vanjaram_xcp_vcn_shared(adev)) inst_mask = 1 << (inst_idx * 2); break; default: @@ -140,10 +145,12 @@ aqua_vanjaram_xcp_gpu_sched_update(adev, ring, ring->xcp_id); - /* VCN is shared by two partitions under CPX MODE */ + /* VCN may be shared by two partitions under CPX MODE in certain + * configs. + */ if ((ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC || - ring->funcs->type == AMDGPU_RING_TYPE_VCN_JPEG) && - adev->xcp_mgr->mode == AMDGPU_CPX_PARTITION_MODE) + ring->funcs->type == AMDGPU_RING_TYPE_VCN_JPEG) && + aqua_vanjaram_xcp_vcn_shared(adev)) aqua_vanjaram_xcp_gpu_sched_update(adev, ring, ring->xcp_id + 1); } @@ -434,7 +441,7 @@ case AMDGPU_SPX_PARTITION_MODE: return adev->gmc.num_mem_partitions == 1 && num_xcc > 0; case AMDGPU_DPX_PARTITION_MODE: - return adev->gmc.num_mem_partitions != 8 && (num_xcc % 4) == 0; + return adev->gmc.num_mem_partitions <= 2 && (num_xcc % 4) == 0; case AMDGPU_TPX_PARTITION_MODE: return (adev->gmc.num_mem_partitions == 1 || adev->gmc.num_mem_partitions == 3) && @@ -494,6 +501,12 @@ if (mode == AMDGPU_AUTO_COMPUTE_PARTITION_MODE) { mode = __aqua_vanjaram_get_auto_mode(xcp_mgr); + if (mode == AMDGPU_UNKNOWN_COMPUTE_PARTITION_MODE) { + dev_err(adev->dev, + "Invalid config, no compatible compute partition mode found, available memory partitions: %d", + adev->gmc.num_mem_partitions); + return -EINVAL; + } } else if (!__aqua_vanjaram_is_valid_mode(xcp_mgr, mode)) { dev_err(adev->dev, "Invalid compute partition mode requested, requested: %s, available memory partitions: %d", --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/atom.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/atom.c @@ -62,6 +62,7 @@ typedef struct { struct atom_context *ctx; uint32_t *ps, *ws; + int ps_size, ws_size; int ps_shift; uint16_t start; unsigned last_jump; @@ -70,8 +71,8 @@ } atom_exec_context; int amdgpu_atom_debug; -static int amdgpu_atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t *params); -int amdgpu_atom_execute_table(struct atom_context *ctx, int index, uint32_t *params); +static int amdgpu_atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t *params, int params_size); +int amdgpu_atom_execute_table(struct atom_context *ctx, int index, uint32_t *params, int params_size); static uint32_t atom_arg_mask[8] = { 0xFFFFFFFF, 0xFFFF, 0xFFFF00, 0xFFFF0000, 0xFF, 0xFF00, 0xFF0000, @@ -223,7 +224,10 @@ (*ptr)++; /* get_unaligned_le32 avoids unaligned accesses from atombios * tables, noticed on a DEC Alpha. */ - val = get_unaligned_le32((u32 *)&ctx->ps[idx]); + if (idx < ctx->ps_size) + val = get_unaligned_le32((u32 *)&ctx->ps[idx]); + else + pr_info("PS index out of range: %i > %i\n", idx, ctx->ps_size); if (print) DEBUG("PS[0x%02X,0x%04X]", idx, val); break; @@ -261,7 +265,10 @@ val = gctx->reg_block; break; default: - val = ctx->ws[idx]; + if (idx < ctx->ws_size) + val = ctx->ws[idx]; + else + pr_info("WS index out of range: %i > %i\n", idx, ctx->ws_size); } break; case ATOM_ARG_ID: @@ -313,7 +320,7 @@ DEBUG("IMM 0x%02X\n", val); return val; } - return 0; + break; case ATOM_ARG_PLL: idx = U8(*ptr); (*ptr)++; @@ -495,6 +502,10 @@ idx = U8(*ptr); (*ptr)++; DEBUG("PS[0x%02X]", idx); + if (idx >= ctx->ps_size) { + pr_info("PS index out of range: %i > %i\n", idx, ctx->ps_size); + return; + } ctx->ps[idx] = cpu_to_le32(val); break; case ATOM_ARG_WS: @@ -527,6 +538,10 @@ gctx->reg_block = val; break; default: + if (idx >= ctx->ws_size) { + pr_info("WS index out of range: %i > %i\n", idx, ctx->ws_size); + return; + } ctx->ws[idx] = val; } break; @@ -624,7 +639,7 @@ else SDEBUG(" table: %d\n", idx); if (U16(ctx->ctx->cmd_table + 4 + 2 * idx)) - r = amdgpu_atom_execute_table_locked(ctx->ctx, idx, ctx->ps + ctx->ps_shift); + r = amdgpu_atom_execute_table_locked(ctx->ctx, idx, ctx->ps + ctx->ps_shift, ctx->ps_size - ctx->ps_shift); if (r) { ctx->abort = true; } @@ -1203,7 +1218,7 @@ atom_op_div32, ATOM_ARG_WS}, }; -static int amdgpu_atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t *params) +static int amdgpu_atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t *params, int params_size) { int base = CU16(ctx->cmd_table + 4 + 2 * index); int len, ws, ps, ptr; @@ -1225,12 +1240,16 @@ ectx.ps_shift = ps / 4; ectx.start = base; ectx.ps = params; + ectx.ps_size = params_size; ectx.abort = false; ectx.last_jump = 0; - if (ws) + if (ws) { ectx.ws = kcalloc(4, ws, GFP_KERNEL); - else + ectx.ws_size = ws; + } else { ectx.ws = NULL; + ectx.ws_size = 0; + } debug_depth++; while (1) { @@ -1264,7 +1283,7 @@ return ret; } -int amdgpu_atom_execute_table(struct atom_context *ctx, int index, uint32_t *params) +int amdgpu_atom_execute_table(struct atom_context *ctx, int index, uint32_t *params, int params_size) { int r; @@ -1280,7 +1299,7 @@ /* reset divmul */ ctx->divmul[0] = 0; ctx->divmul[1] = 0; - r = amdgpu_atom_execute_table_locked(ctx, index, params); + r = amdgpu_atom_execute_table_locked(ctx, index, params, params_size); mutex_unlock(&ctx->mutex); return r; } @@ -1552,7 +1571,7 @@ if (!CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_INIT)) return 1; - ret = amdgpu_atom_execute_table(ctx, ATOM_CMD_INIT, ps); + ret = amdgpu_atom_execute_table(ctx, ATOM_CMD_INIT, ps, 16); if (ret) return ret; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/atom.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/atom.h @@ -156,7 +156,7 @@ extern int amdgpu_atom_debug; struct atom_context *amdgpu_atom_parse(struct card_info *card, void *bios); -int amdgpu_atom_execute_table(struct atom_context *ctx, int index, uint32_t *params); +int amdgpu_atom_execute_table(struct atom_context *ctx, int index, uint32_t *params, int params_size); int amdgpu_atom_asic_init(struct atom_context *ctx); void amdgpu_atom_destroy(struct atom_context *ctx); bool amdgpu_atom_parse_data_header(struct atom_context *ctx, int index, uint16_t *size, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/atombios_crtc.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/atombios_crtc.c @@ -77,7 +77,7 @@ args.usOverscanTop = cpu_to_le16(amdgpu_crtc->v_border); break; } - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args, sizeof(args)); } void amdgpu_atombios_crtc_scaler_setup(struct drm_crtc *crtc) @@ -106,7 +106,7 @@ args.ucEnable = ATOM_SCALER_DISABLE; break; } - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args, sizeof(args)); } void amdgpu_atombios_crtc_lock(struct drm_crtc *crtc, int lock) @@ -123,7 +123,7 @@ args.ucCRTC = amdgpu_crtc->crtc_id; args.ucEnable = lock; - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args, sizeof(args)); } void amdgpu_atombios_crtc_enable(struct drm_crtc *crtc, int state) @@ -139,7 +139,7 @@ args.ucCRTC = amdgpu_crtc->crtc_id; args.ucEnable = state; - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args, sizeof(args)); } void amdgpu_atombios_crtc_blank(struct drm_crtc *crtc, int state) @@ -155,7 +155,7 @@ args.ucCRTC = amdgpu_crtc->crtc_id; args.ucBlanking = state; - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args, sizeof(args)); } void amdgpu_atombios_crtc_powergate(struct drm_crtc *crtc, int state) @@ -171,7 +171,7 @@ args.ucDispPipeId = amdgpu_crtc->crtc_id; args.ucEnable = state; - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args, sizeof(args)); } void amdgpu_atombios_crtc_powergate_init(struct amdgpu_device *adev) @@ -183,7 +183,7 @@ args.ucEnable = ATOM_INIT; - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args, sizeof(args)); } void amdgpu_atombios_crtc_set_dtd_timing(struct drm_crtc *crtc, @@ -228,7 +228,7 @@ args.susModeMiscInfo.usAccess = cpu_to_le16(misc); args.ucCRTC = amdgpu_crtc->crtc_id; - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args, sizeof(args)); } union atom_enable_ss { @@ -293,7 +293,7 @@ args.v3.usSpreadSpectrumStep = cpu_to_le16(ss->step); args.v3.ucEnable = enable; - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args, sizeof(args)); } union adjust_pixel_clock { @@ -395,7 +395,7 @@ ADJUST_DISPLAY_CONFIG_SS_ENABLE; amdgpu_atom_execute_table(adev->mode_info.atom_context, - index, (uint32_t *)&args); + index, (uint32_t *)&args, sizeof(args)); adjusted_clock = le16_to_cpu(args.v1.usPixelClock) * 10; break; case 3: @@ -428,7 +428,7 @@ args.v3.sInput.ucExtTransmitterID = 0; amdgpu_atom_execute_table(adev->mode_info.atom_context, - index, (uint32_t *)&args); + index, (uint32_t *)&args, sizeof(args)); adjusted_clock = le32_to_cpu(args.v3.sOutput.ulDispPllFreq) * 10; if (args.v3.sOutput.ucRefDiv) { amdgpu_crtc->pll_flags |= AMDGPU_PLL_USE_FRAC_FB_DIV; @@ -514,7 +514,7 @@ DRM_ERROR("Unknown table version %d %d\n", frev, crev); return; } - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args, sizeof(args)); } union set_dce_clock { @@ -544,7 +544,7 @@ args.v2_1.asParam.ulDCEClkFreq = cpu_to_le32(freq); /* 10kHz units */ args.v2_1.asParam.ucDCEClkType = clk_type; args.v2_1.asParam.ucDCEClkSrc = clk_src; - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args, sizeof(args)); ret_freq = le32_to_cpu(args.v2_1.asParam.ulDCEClkFreq) * 10; break; default: @@ -740,7 +740,7 @@ return; } - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args, sizeof(args)); } int amdgpu_atombios_crtc_prepare_pll(struct drm_crtc *crtc, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/atombios_dp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/atombios_dp.c @@ -83,7 +83,7 @@ args.v2.ucDelay = delay / 10; args.v2.ucHPD_ID = chan->rec.hpd; - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args, sizeof(args)); *ack = args.v2.ucReplyStatus; @@ -301,7 +301,7 @@ args.ucLaneNum = lane_num; args.ucStatus = 0; - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args, sizeof(args)); return args.ucStatus; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/atombios_encoders.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/atombios_encoders.c @@ -335,7 +335,7 @@ args.ucDacStandard = ATOM_DAC1_PS2; args.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args, sizeof(args)); } @@ -432,7 +432,7 @@ break; } - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args, sizeof(args)); } int amdgpu_atombios_encoder_get_encoder_mode(struct drm_encoder *encoder) @@ -732,7 +732,7 @@ break; } - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args, sizeof(args)); } @@ -1136,7 +1136,7 @@ break; } - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args, sizeof(args)); } bool @@ -1164,7 +1164,7 @@ args.v1.ucAction = action; - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args, sizeof(args)); /* wait for the panel to power up */ if (action == ATOM_TRANSMITTER_ACTION_POWER_ON) { @@ -1288,7 +1288,7 @@ DRM_ERROR("Unknown table version: %d, %d\n", frev, crev); return; } - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args, sizeof(args)); } static void @@ -1633,7 +1633,7 @@ return; } - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args, sizeof(args)); } /* This only needs to be called once at startup */ @@ -1706,7 +1706,7 @@ args.sDacload.ucMisc = DAC_LOAD_MISC_YPrPb; } - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args, sizeof(args)); return true; } else @@ -2065,26 +2065,29 @@ fake_edid_record = (ATOM_FAKE_EDID_PATCH_RECORD *)record; if (fake_edid_record->ucFakeEDIDLength) { struct edid *edid; - int edid_size = - max((int)EDID_LENGTH, (int)fake_edid_record->ucFakeEDIDLength); - edid = kmalloc(edid_size, GFP_KERNEL); - if (edid) { - memcpy((u8 *)edid, (u8 *)&fake_edid_record->ucFakeEDIDString[0], - fake_edid_record->ucFakeEDIDLength); + int edid_size; + if (fake_edid_record->ucFakeEDIDLength == 128) + edid_size = fake_edid_record->ucFakeEDIDLength; + else + edid_size = fake_edid_record->ucFakeEDIDLength * 128; + edid = kmemdup(&fake_edid_record->ucFakeEDIDString[0], + edid_size, GFP_KERNEL); + if (edid) { if (drm_edid_is_valid(edid)) { adev->mode_info.bios_hardcoded_edid = edid; adev->mode_info.bios_hardcoded_edid_size = edid_size; - } else + } else { kfree(edid); + } } + record += struct_size(fake_edid_record, + ucFakeEDIDString, + edid_size); + } else { + /* empty fake edid record must be 3 bytes long */ + record += sizeof(ATOM_FAKE_EDID_PATCH_RECORD) + 1; } - record += fake_edid_record->ucFakeEDIDLength ? - struct_size(fake_edid_record, - ucFakeEDIDString, - fake_edid_record->ucFakeEDIDLength) : - /* empty fake edid record must be 3 bytes long */ - sizeof(ATOM_FAKE_EDID_PATCH_RECORD) + 1; break; case LCD_PANEL_RESOLUTION_RECORD_TYPE: panel_res_record = (ATOM_PANEL_RESOLUTION_PATCH_RECORD *)record; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/atombios_i2c.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/atombios_i2c.c @@ -86,7 +86,7 @@ args.ucSlaveAddr = slave_addr << 1; args.ucLineNumber = chan->rec.i2c_id; - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args, sizeof(args)); /* error */ if (args.ucStatus != HW_ASSISTED_I2C_STATUS_SUCCESS) { @@ -172,5 +172,5 @@ args.ucSlaveAddr = slave_addr; args.ucLineNumber = line_number; - amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); + amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args, sizeof(args)); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/df_v1_7.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/df_v1_7.c @@ -70,6 +70,8 @@ int fb_channel_number; fb_channel_number = adev->df.funcs->get_fb_channel_number(adev); + if (fb_channel_number >= ARRAY_SIZE(df_v1_7_channel_number)) + fb_channel_number = 0; return df_v1_7_channel_number[fb_channel_number]; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c @@ -8792,7 +8792,9 @@ value = REG_SET_FIELD(value, SQ_CMD, MODE, 0x01); value = REG_SET_FIELD(value, SQ_CMD, CHECK_VMID, 1); value = REG_SET_FIELD(value, SQ_CMD, VM_ID, vmid); + amdgpu_gfx_rlc_enter_safe_mode(adev, 0); WREG32_SOC15(GC, 0, mmSQ_CMD, value); + amdgpu_gfx_rlc_exit_safe_mode(adev, 0); } static void @@ -9194,7 +9196,7 @@ 7 + /* PIPELINE_SYNC */ SOC15_FLUSH_GPU_TLB_NUM_WREG * 5 + SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 7 + - 2 + /* VM_FLUSH */ + 4 + /* VM_FLUSH */ 8 + /* FENCE for VM_FLUSH */ 20 + /* GDS switch */ 4 + /* double SWITCH_BUFFER, @@ -9285,7 +9287,6 @@ 7 + /* gfx_v10_0_ring_emit_pipeline_sync */ SOC15_FLUSH_GPU_TLB_NUM_WREG * 5 + SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 7 + - 2 + /* gfx_v10_0_ring_emit_vm_flush */ 8 + 8 + 8, /* gfx_v10_0_ring_emit_fence_kiq x3 for user fence, vm fence */ .emit_ib_size = 7, /* gfx_v10_0_ring_emit_ib_compute */ .emit_ib = gfx_v10_0_ring_emit_ib_compute, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c @@ -1630,7 +1630,7 @@ active_rb_bitmap |= (0x3 << (i * rb_bitmap_width_per_sa)); } - active_rb_bitmap |= global_active_rb_bitmap; + active_rb_bitmap &= global_active_rb_bitmap; adev->gfx.config.backend_enable_mask = active_rb_bitmap; adev->gfx.config.num_rbs = hweight32(active_rb_bitmap); } @@ -4287,11 +4287,11 @@ /* RLC autoload sequence 1: Program rlc ram */ if (adev->gfx.imu.funcs->program_rlc_ram) adev->gfx.imu.funcs->program_rlc_ram(adev); + /* rlc autoload firmware */ + r = gfx_v11_0_rlc_backdoor_autoload_enable(adev); + if (r) + return r; } - /* rlc autoload firmware */ - r = gfx_v11_0_rlc_backdoor_autoload_enable(adev); - if (r) - return r; } else { if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT) { if (adev->gfx.imu.funcs && (amdgpu_dpm > 0)) { @@ -4491,6 +4491,8 @@ int r, i, j, k; struct amdgpu_device *adev = (struct amdgpu_device *)handle; + gfx_v11_0_set_safe_mode(adev, 0); + tmp = RREG32_SOC15(GC, 0, regCP_INT_CNTL); tmp = REG_SET_FIELD(tmp, CP_INT_CNTL, CMP_BUSY_INT_ENABLE, 0); tmp = REG_SET_FIELD(tmp, CP_INT_CNTL, CNTX_BUSY_INT_ENABLE, 0); @@ -4498,8 +4500,6 @@ tmp = REG_SET_FIELD(tmp, CP_INT_CNTL, GFX_IDLE_INT_ENABLE, 0); WREG32_SOC15(GC, 0, regCP_INT_CNTL, tmp); - gfx_v11_0_set_safe_mode(adev, 0); - for (i = 0; i < adev->gfx.mec.num_mec; ++i) { for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) { for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { @@ -5716,7 +5716,9 @@ value = REG_SET_FIELD(value, SQ_CMD, MODE, 0x01); value = REG_SET_FIELD(value, SQ_CMD, CHECK_VMID, 1); value = REG_SET_FIELD(value, SQ_CMD, VM_ID, vmid); + amdgpu_gfx_rlc_enter_safe_mode(adev, 0); WREG32_SOC15(GC, 0, regSQ_CMD, value); + amdgpu_gfx_rlc_exit_safe_mode(adev, 0); } static void @@ -6110,7 +6112,7 @@ 7 + /* PIPELINE_SYNC */ SOC15_FLUSH_GPU_TLB_NUM_WREG * 5 + SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 7 + - 2 + /* VM_FLUSH */ + 4 + /* VM_FLUSH */ 8 + /* FENCE for VM_FLUSH */ 20 + /* GDS switch */ 5 + /* COND_EXEC */ @@ -6195,7 +6197,6 @@ 7 + /* gfx_v11_0_ring_emit_pipeline_sync */ SOC15_FLUSH_GPU_TLB_NUM_WREG * 5 + SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 7 + - 2 + /* gfx_v11_0_ring_emit_vm_flush */ 8 + 8 + 8, /* gfx_v11_0_ring_emit_fence_kiq x3 for user fence, vm fence */ .emit_ib_size = 7, /* gfx_v11_0_ring_emit_ib_compute */ .emit_ib = gfx_v11_0_ring_emit_ib_compute, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c @@ -1172,6 +1172,10 @@ { 0x1002, 0x15dd, 0x1002, 0x15dd, 0xc6 }, /* Apple MacBook Pro (15-inch, 2019) Radeon Pro Vega 20 4 GB */ { 0x1002, 0x69af, 0x106b, 0x019a, 0xc0 }, + /* https://bbs.openkylin.top/t/topic/171497 */ + { 0x1002, 0x15d8, 0x19e5, 0x3e14, 0xc2 }, + /* HP 705G4 DM with R5 2400G */ + { 0x1002, 0x15dd, 0x103c, 0x8464, 0xd6 }, { 0, 0, 0, 0, 0 }, }; @@ -2474,7 +2478,7 @@ tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_BUSY_INT_ENABLE, enable ? 1 : 0); tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_EMPTY_INT_ENABLE, enable ? 1 : 0); tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CMP_BUSY_INT_ENABLE, enable ? 1 : 0); - if(adev->gfx.num_gfx_rings) + if (adev->gfx.num_gfx_rings) tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, GFX_IDLE_INT_ENABLE, enable ? 1 : 0); WREG32_SOC15(GC, 0, mmCP_INT_CNTL_RING0, tmp); @@ -5708,7 +5712,9 @@ value = REG_SET_FIELD(value, SQ_CMD, MODE, 0x01); value = REG_SET_FIELD(value, SQ_CMD, CHECK_VMID, 1); value = REG_SET_FIELD(value, SQ_CMD, VM_ID, vmid); + amdgpu_gfx_rlc_enter_safe_mode(adev, 0); WREG32_SOC15(GC, 0, mmSQ_CMD, value); + amdgpu_gfx_rlc_exit_safe_mode(adev, 0); } static void gfx_v9_0_set_gfx_eop_interrupt_state(struct amdgpu_device *adev, @@ -5779,17 +5785,59 @@ } } +static u32 gfx_v9_0_get_cpc_int_cntl(struct amdgpu_device *adev, + int me, int pipe) +{ + /* + * amdgpu controls only the first MEC. That's why this function only + * handles the setting of interrupts for this specific MEC. All other + * pipes' interrupts are set by amdkfd. + */ + if (me != 1) + return 0; + + switch (pipe) { + case 0: + return SOC15_REG_OFFSET(GC, 0, mmCP_ME1_PIPE0_INT_CNTL); + case 1: + return SOC15_REG_OFFSET(GC, 0, mmCP_ME1_PIPE1_INT_CNTL); + case 2: + return SOC15_REG_OFFSET(GC, 0, mmCP_ME1_PIPE2_INT_CNTL); + case 3: + return SOC15_REG_OFFSET(GC, 0, mmCP_ME1_PIPE3_INT_CNTL); + default: + return 0; + } +} + static int gfx_v9_0_set_priv_reg_fault_state(struct amdgpu_device *adev, struct amdgpu_irq_src *source, unsigned type, enum amdgpu_interrupt_state state) { + u32 cp_int_cntl_reg, cp_int_cntl; + int i, j; + switch (state) { case AMDGPU_IRQ_STATE_DISABLE: case AMDGPU_IRQ_STATE_ENABLE: WREG32_FIELD15(GC, 0, CP_INT_CNTL_RING0, PRIV_REG_INT_ENABLE, state == AMDGPU_IRQ_STATE_ENABLE ? 1 : 0); + for (i = 0; i < adev->gfx.mec.num_mec; i++) { + for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) { + /* MECs start at 1 */ + cp_int_cntl_reg = gfx_v9_0_get_cpc_int_cntl(adev, i + 1, j); + + if (cp_int_cntl_reg) { + cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg); + cp_int_cntl = REG_SET_FIELD(cp_int_cntl, CP_ME1_PIPE0_INT_CNTL, + PRIV_REG_INT_ENABLE, + state == AMDGPU_IRQ_STATE_ENABLE ? 1 : 0); + WREG32_SOC15_IP(GC, cp_int_cntl_reg, cp_int_cntl); + } + } + } break; default: break; @@ -6991,7 +7039,6 @@ 7 + /* gfx_v9_0_ring_emit_pipeline_sync */ SOC15_FLUSH_GPU_TLB_NUM_WREG * 5 + SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 7 + - 2 + /* gfx_v9_0_ring_emit_vm_flush */ 8 + 8 + 8 + /* gfx_v9_0_ring_emit_fence x3 for user fence, vm fence */ 7 + /* gfx_v9_0_emit_mem_sync */ 5 + /* gfx_v9_0_emit_wave_limit for updating mmSPI_WCL_PIPE_PERCENT_GFX register */ @@ -7029,7 +7076,6 @@ 7 + /* gfx_v9_0_ring_emit_pipeline_sync */ SOC15_FLUSH_GPU_TLB_NUM_WREG * 5 + SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 7 + - 2 + /* gfx_v9_0_ring_emit_vm_flush */ 8 + 8 + 8, /* gfx_v9_0_ring_emit_fence_kiq x3 for user fence, vm fence */ .emit_ib_size = 7, /* gfx_v9_0_ring_emit_ib_compute */ .emit_fence = gfx_v9_0_ring_emit_fence_kiq, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c @@ -426,16 +426,16 @@ static int gfx_v9_4_3_init_microcode(struct amdgpu_device *adev) { - const char *chip_name; + char ucode_prefix[15]; int r; - chip_name = "gc_9_4_3"; + amdgpu_ucode_ip_version_decode(adev, GC_HWIP, ucode_prefix, sizeof(ucode_prefix)); - r = gfx_v9_4_3_init_rlc_microcode(adev, chip_name); + r = gfx_v9_4_3_init_rlc_microcode(adev, ucode_prefix); if (r) return r; - r = gfx_v9_4_3_init_cp_compute_microcode(adev, chip_name); + r = gfx_v9_4_3_init_cp_compute_microcode(adev, ucode_prefix); if (r) return r; @@ -2755,21 +2755,63 @@ } } +static u32 gfx_v9_4_3_get_cpc_int_cntl(struct amdgpu_device *adev, + int xcc_id, int me, int pipe) +{ + /* + * amdgpu controls only the first MEC. That's why this function only + * handles the setting of interrupts for this specific MEC. All other + * pipes' interrupts are set by amdkfd. + */ + if (me != 1) + return 0; + + switch (pipe) { + case 0: + return SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regCP_ME1_PIPE0_INT_CNTL); + case 1: + return SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regCP_ME1_PIPE1_INT_CNTL); + case 2: + return SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regCP_ME1_PIPE2_INT_CNTL); + case 3: + return SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regCP_ME1_PIPE3_INT_CNTL); + default: + return 0; + } +} + static int gfx_v9_4_3_set_priv_reg_fault_state(struct amdgpu_device *adev, struct amdgpu_irq_src *source, unsigned type, enum amdgpu_interrupt_state state) { - int i, num_xcc; + u32 mec_int_cntl_reg, mec_int_cntl; + int i, j, k, num_xcc; num_xcc = NUM_XCC(adev->gfx.xcc_mask); switch (state) { case AMDGPU_IRQ_STATE_DISABLE: case AMDGPU_IRQ_STATE_ENABLE: - for (i = 0; i < num_xcc; i++) + for (i = 0; i < num_xcc; i++) { WREG32_FIELD15_PREREG(GC, GET_INST(GC, i), CP_INT_CNTL_RING0, - PRIV_REG_INT_ENABLE, - state == AMDGPU_IRQ_STATE_ENABLE ? 1 : 0); + PRIV_REG_INT_ENABLE, + state == AMDGPU_IRQ_STATE_ENABLE ? 1 : 0); + for (j = 0; j < adev->gfx.mec.num_mec; j++) { + for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { + /* MECs start at 1 */ + mec_int_cntl_reg = gfx_v9_4_3_get_cpc_int_cntl(adev, i, j + 1, k); + + if (mec_int_cntl_reg) { + mec_int_cntl = RREG32_XCC(mec_int_cntl_reg, i); + mec_int_cntl = REG_SET_FIELD(mec_int_cntl, CP_ME1_PIPE0_INT_CNTL, + PRIV_REG_INT_ENABLE, + state == AMDGPU_IRQ_STATE_ENABLE ? + 1 : 0); + WREG32_XCC(mec_int_cntl_reg, mec_int_cntl, i); + } + } + } + } break; default: break; @@ -4121,9 +4163,10 @@ static int gfx_v9_4_3_get_cu_info(struct amdgpu_device *adev, struct amdgpu_cu_info *cu_info) { - int i, j, k, counter, xcc_id, active_cu_number = 0; - u32 mask, bitmap, ao_bitmap, ao_cu_mask = 0; + int i, j, k, prev_counter, counter, xcc_id, active_cu_number = 0; + u32 mask, bitmap, ao_bitmap, ao_cu_mask = 0, tmp; unsigned disable_masks[4 * 4]; + bool is_symmetric_cus; if (!adev || !cu_info) return -EINVAL; @@ -4141,6 +4184,7 @@ mutex_lock(&adev->grbm_idx_mutex); for (xcc_id = 0; xcc_id < NUM_XCC(adev->gfx.xcc_mask); xcc_id++) { + is_symmetric_cus = true; for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { mask = 1; @@ -4168,6 +4212,15 @@ ao_cu_mask |= (ao_bitmap << (i * 16 + j * 8)); cu_info->ao_cu_bitmap[i][j] = ao_bitmap; } + if (i && is_symmetric_cus && prev_counter != counter) + is_symmetric_cus = false; + prev_counter = counter; + } + if (is_symmetric_cus) { + tmp = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_CPC_DEBUG); + tmp = REG_SET_FIELD(tmp, CP_CPC_DEBUG, CPC_HARVESTING_RELAUNCH_DISABLE, 1); + tmp = REG_SET_FIELD(tmp, CP_CPC_DEBUG, CPC_HARVESTING_DISPATCH_DISABLE, 1); + WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_CPC_DEBUG, tmp); } gfx_v9_4_3_xcc_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff, xcc_id); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c @@ -570,6 +570,7 @@ adev->mmhub.funcs = &mmhub_v3_0_2_funcs; break; case IP_VERSION(3, 3, 0): + case IP_VERSION(3, 3, 1): adev->mmhub.funcs = &mmhub_v3_3_funcs; break; default: --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c @@ -1107,8 +1107,10 @@ uint64_t *flags) { struct amdgpu_device *bo_adev = amdgpu_ttm_adev(bo->tbo.bdev); - bool is_vram = bo->tbo.resource->mem_type == TTM_PL_VRAM; - bool coherent = bo->flags & (AMDGPU_GEM_CREATE_COHERENT | AMDGPU_GEM_CREATE_EXT_COHERENT); + bool is_vram = bo->tbo.resource && + bo->tbo.resource->mem_type == TTM_PL_VRAM; + bool coherent = bo->flags & (AMDGPU_GEM_CREATE_COHERENT | + AMDGPU_GEM_CREATE_EXT_COHERENT); bool ext_coherent = bo->flags & AMDGPU_GEM_CREATE_EXT_COHERENT; bool uncached = bo->flags & AMDGPU_GEM_CREATE_UNCACHED; struct amdgpu_vm *vm = mapping->bo_va->base.vm; @@ -1116,6 +1118,8 @@ bool snoop = false; bool is_local; + dma_resv_assert_held(bo->tbo.base.resv); + switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { case IP_VERSION(9, 4, 1): case IP_VERSION(9, 4, 2): @@ -1233,9 +1237,8 @@ *flags &= ~AMDGPU_PTE_VALID; } - if (bo && bo->tbo.resource) - gmc_v9_0_get_coherence_flags(adev, mapping->bo_va->base.bo, - mapping, flags); + if ((*flags & AMDGPU_PTE_VALID) && bo) + gmc_v9_0_get_coherence_flags(adev, bo, mapping, flags); } static void gmc_v9_0_override_vm_pte_flags(struct amdgpu_device *adev, @@ -1897,7 +1900,7 @@ break; } - size = adev->gmc.real_vram_size >> AMDGPU_GPU_PAGE_SHIFT; + size = (adev->gmc.real_vram_size + SZ_16M) >> AMDGPU_GPU_PAGE_SHIFT; size /= adev->gmc.num_mem_partitions; for (i = 0; i < adev->gmc.num_mem_partitions; ++i) { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c @@ -40,10 +40,17 @@ static void hdp_v4_0_flush_hdp(struct amdgpu_device *adev, struct amdgpu_ring *ring) { - if (!ring || !ring->funcs->emit_wreg) - WREG32_NO_KIQ((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0); - else + if (!ring || !ring->funcs->emit_wreg) { + WREG32((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0); + /* We just need to read back a register to post the write. + * Reading back the remapped register causes problems on + * some platforms so just read back the memory size register. + */ + if (adev->nbio.funcs->get_memsize) + adev->nbio.funcs->get_memsize(adev); + } else { amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0); + } } static void hdp_v4_0_invalidate_hdp(struct amdgpu_device *adev, @@ -53,11 +60,13 @@ amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(4, 4, 2)) return; - if (!ring || !ring->funcs->emit_wreg) + if (!ring || !ring->funcs->emit_wreg) { WREG32_SOC15_NO_KIQ(HDP, 0, mmHDP_READ_CACHE_INVALIDATE, 1); - else + RREG32_SOC15_NO_KIQ(HDP, 0, mmHDP_READ_CACHE_INVALIDATE); + } else { amdgpu_ring_emit_wreg(ring, SOC15_REG_OFFSET( HDP, 0, mmHDP_READ_CACHE_INVALIDATE), 1); + } } static void hdp_v4_0_query_ras_error_count(struct amdgpu_device *adev, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/hdp_v5_0.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/hdp_v5_0.c @@ -31,10 +31,17 @@ static void hdp_v5_0_flush_hdp(struct amdgpu_device *adev, struct amdgpu_ring *ring) { - if (!ring || !ring->funcs->emit_wreg) - WREG32_NO_KIQ((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0); - else + if (!ring || !ring->funcs->emit_wreg) { + WREG32((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0); + /* We just need to read back a register to post the write. + * Reading back the remapped register causes problems on + * some platforms so just read back the memory size register. + */ + if (adev->nbio.funcs->get_memsize) + adev->nbio.funcs->get_memsize(adev); + } else { amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0); + } } static void hdp_v5_0_invalidate_hdp(struct amdgpu_device *adev, @@ -42,6 +49,7 @@ { if (!ring || !ring->funcs->emit_wreg) { WREG32_SOC15_NO_KIQ(HDP, 0, mmHDP_READ_CACHE_INVALIDATE, 1); + RREG32_SOC15_NO_KIQ(HDP, 0, mmHDP_READ_CACHE_INVALIDATE); } else { amdgpu_ring_emit_wreg(ring, SOC15_REG_OFFSET( HDP, 0, mmHDP_READ_CACHE_INVALIDATE), 1); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/hdp_v5_2.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/hdp_v5_2.c @@ -31,13 +31,25 @@ static void hdp_v5_2_flush_hdp(struct amdgpu_device *adev, struct amdgpu_ring *ring) { - if (!ring || !ring->funcs->emit_wreg) + if (!ring || !ring->funcs->emit_wreg) { WREG32_NO_KIQ((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0); - else + if (amdgpu_sriov_vf(adev)) { + /* this is fine because SR_IOV doesn't remap the register */ + RREG32_NO_KIQ((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2); + } else { + /* We just need to read back a register to post the write. + * Reading back the remapped register causes problems on + * some platforms so just read back the memory size register. + */ + if (adev->nbio.funcs->get_memsize) + adev->nbio.funcs->get_memsize(adev); + } + } else { amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0); + } } static void hdp_v5_2_update_mem_power_gating(struct amdgpu_device *adev, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c @@ -34,10 +34,17 @@ static void hdp_v6_0_flush_hdp(struct amdgpu_device *adev, struct amdgpu_ring *ring) { - if (!ring || !ring->funcs->emit_wreg) - WREG32_NO_KIQ((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0); - else + if (!ring || !ring->funcs->emit_wreg) { + WREG32((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0); + /* We just need to read back a register to post the write. + * Reading back the remapped register causes problems on + * some platforms so just read back the memory size register. + */ + if (adev->nbio.funcs->get_memsize) + adev->nbio.funcs->get_memsize(adev); + } else { amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0); + } } static void hdp_v6_0_update_clock_gating(struct amdgpu_device *adev, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/ih_v6_0.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/ih_v6_0.c @@ -135,6 +135,34 @@ tmp = RREG32(ih_regs->ih_rb_cntl); tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, RB_ENABLE, (enable ? 1 : 0)); + + if (enable) { + /* Unset the CLEAR_OVERFLOW bit to make sure the next step + * is switching the bit from 0 to 1 + */ + tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 0); + if (amdgpu_sriov_vf(adev) && amdgpu_sriov_reg_indirect_ih(adev)) { + if (psp_reg_program(&adev->psp, ih_regs->psp_reg_id, tmp)) + return -ETIMEDOUT; + } else { + WREG32_NO_KIQ(ih_regs->ih_rb_cntl, tmp); + } + + /* Clear RB_OVERFLOW bit */ + tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); + if (amdgpu_sriov_vf(adev) && amdgpu_sriov_reg_indirect_ih(adev)) { + if (psp_reg_program(&adev->psp, ih_regs->psp_reg_id, tmp)) + return -ETIMEDOUT; + } else { + WREG32_NO_KIQ(ih_regs->ih_rb_cntl, tmp); + } + + /* Unset the CLEAR_OVERFLOW bit immediately so new overflows + * can be detected. + */ + tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 0); + } + /* enable_intr field is only valid in ring0 */ if (ih == &adev->irq.ih) tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, ENABLE_INTR, (enable ? 1 : 0)); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c @@ -23,6 +23,7 @@ #include "amdgpu.h" #include "amdgpu_jpeg.h" +#include "amdgpu_cs.h" #include "soc15.h" #include "soc15d.h" #include "vcn_v1_0.h" @@ -34,6 +35,9 @@ static void jpeg_v1_0_set_dec_ring_funcs(struct amdgpu_device *adev); static void jpeg_v1_0_set_irq_funcs(struct amdgpu_device *adev); static void jpeg_v1_0_ring_begin_use(struct amdgpu_ring *ring); +static int jpeg_v1_dec_ring_parse_cs(struct amdgpu_cs_parser *parser, + struct amdgpu_job *job, + struct amdgpu_ib *ib); static void jpeg_v1_0_decode_ring_patch_wreg(struct amdgpu_ring *ring, uint32_t *ptr, uint32_t reg_offset, uint32_t val) { @@ -300,7 +304,10 @@ amdgpu_ring_write(ring, PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_LMI_JRBC_IB_VMID), 0, 0, PACKETJ_TYPE0)); - amdgpu_ring_write(ring, (vmid | (vmid << 4))); + if (ring->funcs->parse_cs) + amdgpu_ring_write(ring, 0); + else + amdgpu_ring_write(ring, (vmid | (vmid << 4))); amdgpu_ring_write(ring, PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_LMI_JPEG_VMID), 0, 0, PACKETJ_TYPE0)); @@ -554,6 +561,7 @@ .get_rptr = jpeg_v1_0_decode_ring_get_rptr, .get_wptr = jpeg_v1_0_decode_ring_get_wptr, .set_wptr = jpeg_v1_0_decode_ring_set_wptr, + .parse_cs = jpeg_v1_dec_ring_parse_cs, .emit_frame_size = 6 + 6 + /* hdp invalidate / flush */ SOC15_FLUSH_GPU_TLB_NUM_WREG * 6 + @@ -612,3 +620,69 @@ vcn_v1_0_set_pg_for_begin_use(ring, set_clocks); } + +/** + * jpeg_v1_dec_ring_parse_cs - command submission parser + * + * @parser: Command submission parser context + * @job: the job to parse + * @ib: the IB to parse + * + * Parse the command stream, return -EINVAL for invalid packet, + * 0 otherwise + */ +static int jpeg_v1_dec_ring_parse_cs(struct amdgpu_cs_parser *parser, + struct amdgpu_job *job, + struct amdgpu_ib *ib) +{ + u32 i, reg, res, cond, type; + int ret = 0; + struct amdgpu_device *adev = parser->adev; + + for (i = 0; i < ib->length_dw ; i += 2) { + reg = CP_PACKETJ_GET_REG(ib->ptr[i]); + res = CP_PACKETJ_GET_RES(ib->ptr[i]); + cond = CP_PACKETJ_GET_COND(ib->ptr[i]); + type = CP_PACKETJ_GET_TYPE(ib->ptr[i]); + + if (res || cond != PACKETJ_CONDITION_CHECK0) /* only allow 0 for now */ + return -EINVAL; + + if (reg >= JPEG_V1_REG_RANGE_START && reg <= JPEG_V1_REG_RANGE_END) + continue; + + switch (type) { + case PACKETJ_TYPE0: + if (reg != JPEG_V1_LMI_JPEG_WRITE_64BIT_BAR_HIGH && + reg != JPEG_V1_LMI_JPEG_WRITE_64BIT_BAR_LOW && + reg != JPEG_V1_LMI_JPEG_READ_64BIT_BAR_HIGH && + reg != JPEG_V1_LMI_JPEG_READ_64BIT_BAR_LOW && + reg != JPEG_V1_REG_CTX_INDEX && + reg != JPEG_V1_REG_CTX_DATA) { + ret = -EINVAL; + } + break; + case PACKETJ_TYPE1: + if (reg != JPEG_V1_REG_CTX_DATA) + ret = -EINVAL; + break; + case PACKETJ_TYPE3: + if (reg != JPEG_V1_REG_SOFT_RESET) + ret = -EINVAL; + break; + case PACKETJ_TYPE6: + if (ib->ptr[i] != CP_PACKETJ_NOP) + ret = -EINVAL; + break; + default: + ret = -EINVAL; + } + + if (ret) { + dev_err(adev->dev, "Invalid packet [0x%08x]!\n", ib->ptr[i]); + break; + } + } + + return ret; +} --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.h @@ -29,4 +29,15 @@ void jpeg_v1_0_sw_fini(void *handle); void jpeg_v1_0_start(struct amdgpu_device *adev, int mode); +#define JPEG_V1_REG_RANGE_START 0x8000 +#define JPEG_V1_REG_RANGE_END 0x803f + +#define JPEG_V1_LMI_JPEG_WRITE_64BIT_BAR_HIGH 0x8238 +#define JPEG_V1_LMI_JPEG_WRITE_64BIT_BAR_LOW 0x8239 +#define JPEG_V1_LMI_JPEG_READ_64BIT_BAR_HIGH 0x825a +#define JPEG_V1_LMI_JPEG_READ_64BIT_BAR_LOW 0x825b +#define JPEG_V1_REG_CTX_INDEX 0x8328 +#define JPEG_V1_REG_CTX_DATA 0x8329 +#define JPEG_V1_REG_SOFT_RESET 0x83a0 + #endif /*__JPEG_V1_0_H__*/ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c @@ -23,6 +23,7 @@ #include "amdgpu.h" #include "amdgpu_jpeg.h" +#include "amdgpu_cs.h" #include "amdgpu_pm.h" #include "soc15.h" #include "soc15d.h" @@ -543,11 +544,15 @@ amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JRBC_IB_VMID_INTERNAL_OFFSET, 0, 0, PACKETJ_TYPE0)); - amdgpu_ring_write(ring, (vmid | (vmid << 4))); + + if (ring->funcs->parse_cs) + amdgpu_ring_write(ring, 0); + else + amdgpu_ring_write(ring, (vmid | (vmid << 4) | (vmid << 8))); amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JPEG_VMID_INTERNAL_OFFSET, 0, 0, PACKETJ_TYPE0)); - amdgpu_ring_write(ring, (vmid | (vmid << 4))); + amdgpu_ring_write(ring, (vmid | (vmid << 4) | (vmid << 8))); amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JRBC_IB_64BIT_BAR_LOW_INTERNAL_OFFSET, 0, 0, PACKETJ_TYPE0)); @@ -767,6 +772,7 @@ .get_rptr = jpeg_v2_0_dec_ring_get_rptr, .get_wptr = jpeg_v2_0_dec_ring_get_wptr, .set_wptr = jpeg_v2_0_dec_ring_set_wptr, + .parse_cs = jpeg_v2_dec_ring_parse_cs, .emit_frame_size = SOC15_FLUSH_GPU_TLB_NUM_WREG * 6 + SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 + @@ -814,3 +820,58 @@ .rev = 0, .funcs = &jpeg_v2_0_ip_funcs, }; + +/** + * jpeg_v2_dec_ring_parse_cs - command submission parser + * + * @parser: Command submission parser context + * @job: the job to parse + * @ib: the IB to parse + * + * Parse the command stream, return -EINVAL for invalid packet, + * 0 otherwise + */ +int jpeg_v2_dec_ring_parse_cs(struct amdgpu_cs_parser *parser, + struct amdgpu_job *job, + struct amdgpu_ib *ib) +{ + u32 i, reg, res, cond, type; + struct amdgpu_device *adev = parser->adev; + + for (i = 0; i < ib->length_dw ; i += 2) { + reg = CP_PACKETJ_GET_REG(ib->ptr[i]); + res = CP_PACKETJ_GET_RES(ib->ptr[i]); + cond = CP_PACKETJ_GET_COND(ib->ptr[i]); + type = CP_PACKETJ_GET_TYPE(ib->ptr[i]); + + if (res) /* only support 0 at the moment */ + return -EINVAL; + + switch (type) { + case PACKETJ_TYPE0: + if (cond != PACKETJ_CONDITION_CHECK0 || reg < JPEG_REG_RANGE_START || + reg > JPEG_REG_RANGE_END) { + dev_err(adev->dev, "Invalid packet [0x%08x]!\n", ib->ptr[i]); + return -EINVAL; + } + break; + case PACKETJ_TYPE3: + if (cond != PACKETJ_CONDITION_CHECK3 || reg < JPEG_REG_RANGE_START || + reg > JPEG_REG_RANGE_END) { + dev_err(adev->dev, "Invalid packet [0x%08x]!\n", ib->ptr[i]); + return -EINVAL; + } + break; + case PACKETJ_TYPE6: + if (ib->ptr[i] == CP_PACKETJ_NOP) + continue; + dev_err(adev->dev, "Invalid packet [0x%08x]!\n", ib->ptr[i]); + return -EINVAL; + default: + dev_err(adev->dev, "Unknown packet type %d !\n", type); + return -EINVAL; + } + } + + return 0; +} --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.h @@ -45,6 +45,9 @@ #define JRBC_DEC_EXTERNAL_REG_WRITE_ADDR 0x18000 +#define JPEG_REG_RANGE_START 0x4000 +#define JPEG_REG_RANGE_END 0x41c2 + void jpeg_v2_0_dec_ring_insert_start(struct amdgpu_ring *ring); void jpeg_v2_0_dec_ring_insert_end(struct amdgpu_ring *ring); void jpeg_v2_0_dec_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq, @@ -57,6 +60,9 @@ unsigned vmid, uint64_t pd_addr); void jpeg_v2_0_dec_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val); void jpeg_v2_0_dec_ring_nop(struct amdgpu_ring *ring, uint32_t count); +int jpeg_v2_dec_ring_parse_cs(struct amdgpu_cs_parser *parser, + struct amdgpu_job *job, + struct amdgpu_ib *ib); extern const struct amdgpu_ip_block_version jpeg_v2_0_ip_block; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c @@ -660,6 +660,7 @@ .get_rptr = jpeg_v2_5_dec_ring_get_rptr, .get_wptr = jpeg_v2_5_dec_ring_get_wptr, .set_wptr = jpeg_v2_5_dec_ring_set_wptr, + .parse_cs = jpeg_v2_dec_ring_parse_cs, .emit_frame_size = SOC15_FLUSH_GPU_TLB_NUM_WREG * 6 + SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 + @@ -689,6 +690,7 @@ .get_rptr = jpeg_v2_5_dec_ring_get_rptr, .get_wptr = jpeg_v2_5_dec_ring_get_wptr, .set_wptr = jpeg_v2_5_dec_ring_set_wptr, + .parse_cs = jpeg_v2_dec_ring_parse_cs, .emit_frame_size = SOC15_FLUSH_GPU_TLB_NUM_WREG * 6 + SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 + --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c @@ -565,6 +565,7 @@ .get_rptr = jpeg_v3_0_dec_ring_get_rptr, .get_wptr = jpeg_v3_0_dec_ring_get_wptr, .set_wptr = jpeg_v3_0_dec_ring_set_wptr, + .parse_cs = jpeg_v2_dec_ring_parse_cs, .emit_frame_size = SOC15_FLUSH_GPU_TLB_NUM_WREG * 6 + SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 + --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c @@ -727,6 +727,7 @@ .get_rptr = jpeg_v4_0_dec_ring_get_rptr, .get_wptr = jpeg_v4_0_dec_ring_get_wptr, .set_wptr = jpeg_v4_0_dec_ring_set_wptr, + .parse_cs = jpeg_v2_dec_ring_parse_cs, .emit_frame_size = SOC15_FLUSH_GPU_TLB_NUM_WREG * 6 + SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 + --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.h @@ -32,5 +32,4 @@ }; extern const struct amdgpu_ip_block_version jpeg_v4_0_ip_block; - #endif /* __JPEG_V4_0_H__ */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c @@ -25,6 +25,7 @@ #include "amdgpu_jpeg.h" #include "soc15.h" #include "soc15d.h" +#include "jpeg_v2_0.h" #include "jpeg_v4_0_3.h" #include "mmsch_v4_0_3.h" @@ -658,11 +659,12 @@ amdgpu_ring_write(ring, PACKETJ(regUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET, 0, 0, PACKETJ_TYPE0)); amdgpu_ring_write(ring, 0x62a04); /* PCTL0_MMHUB_DEEPSLEEP_IB */ - } - amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR, - 0, 0, PACKETJ_TYPE0)); - amdgpu_ring_write(ring, 0x80004000); + amdgpu_ring_write(ring, + PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR, 0, + 0, PACKETJ_TYPE0)); + amdgpu_ring_write(ring, 0x80004000); + } } /** @@ -678,11 +680,12 @@ amdgpu_ring_write(ring, PACKETJ(regUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET, 0, 0, PACKETJ_TYPE0)); amdgpu_ring_write(ring, 0x62a04); - } - amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR, - 0, 0, PACKETJ_TYPE0)); - amdgpu_ring_write(ring, 0x00004000); + amdgpu_ring_write(ring, + PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR, 0, + 0, PACKETJ_TYPE0)); + amdgpu_ring_write(ring, 0x00004000); + } } /** @@ -773,11 +776,15 @@ amdgpu_ring_write(ring, PACKETJ(regUVD_LMI_JRBC_IB_VMID_INTERNAL_OFFSET, 0, 0, PACKETJ_TYPE0)); - amdgpu_ring_write(ring, (vmid | (vmid << 4))); + + if (ring->funcs->parse_cs) + amdgpu_ring_write(ring, 0); + else + amdgpu_ring_write(ring, (vmid | (vmid << 4) | (vmid << 8))); amdgpu_ring_write(ring, PACKETJ(regUVD_LMI_JPEG_VMID_INTERNAL_OFFSET, 0, 0, PACKETJ_TYPE0)); - amdgpu_ring_write(ring, (vmid | (vmid << 4))); + amdgpu_ring_write(ring, (vmid | (vmid << 4) | (vmid << 8))); amdgpu_ring_write(ring, PACKETJ(regUVD_LMI_JRBC_IB_64BIT_BAR_LOW_INTERNAL_OFFSET, 0, 0, PACKETJ_TYPE0)); @@ -1061,6 +1068,7 @@ .get_rptr = jpeg_v4_0_3_dec_ring_get_rptr, .get_wptr = jpeg_v4_0_3_dec_ring_get_wptr, .set_wptr = jpeg_v4_0_3_dec_ring_set_wptr, + .parse_cs = jpeg_v2_dec_ring_parse_cs, .emit_frame_size = SOC15_FLUSH_GPU_TLB_NUM_WREG * 6 + SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 + --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c @@ -153,7 +153,7 @@ { struct amdgpu_device *adev = (struct amdgpu_device *)handle; struct amdgpu_ring *ring = adev->jpeg.inst->ring_dec; - int r; + int r = 0; r = amdgpu_ring_test_helper(ring); if (r) @@ -564,6 +564,7 @@ .get_rptr = jpeg_v4_0_5_dec_ring_get_rptr, .get_wptr = jpeg_v4_0_5_dec_ring_get_wptr, .set_wptr = jpeg_v4_0_5_dec_ring_set_wptr, + .parse_cs = jpeg_v2_dec_ring_parse_cs, .emit_frame_size = SOC15_FLUSH_GPU_TLB_NUM_WREG * 6 + SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 + --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c @@ -544,7 +544,7 @@ static void mmhub_v1_7_get_clockgating(struct amdgpu_device *adev, u64 *flags) { - int data, data1; + u32 data, data1; if (amdgpu_sriov_vf(adev)) *flags = 0; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c @@ -671,7 +671,7 @@ static void mmhub_v2_0_get_clockgating(struct amdgpu_device *adev, u64 *flags) { - int data, data1; + u32 data, data1; if (amdgpu_sriov_vf(adev)) *flags = 0; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c @@ -98,16 +98,16 @@ switch (amdgpu_ip_version(adev, MMHUB_HWIP, 0)) { case IP_VERSION(3, 3, 0): - mmhub_cid = mmhub_client_ids_v3_3[cid][rw]; + case IP_VERSION(3, 3, 1): + mmhub_cid = cid < ARRAY_SIZE(mmhub_client_ids_v3_3) ? + mmhub_client_ids_v3_3[cid][rw] : + cid == 0x140 ? "UMSCH" : NULL; break; default: mmhub_cid = NULL; break; } - if (!mmhub_cid && cid == 0x140) - mmhub_cid = "UMSCH"; - dev_err(adev->dev, "\t Faulty UTCL2 client ID: %s (0x%x)\n", mmhub_cid ? mmhub_cid : "unknown", cid); dev_err(adev->dev, "\t MORE_FAULTS: 0x%lx\n", @@ -560,7 +560,7 @@ static void mmhub_v3_3_get_clockgating(struct amdgpu_device *adev, u64 *flags) { - int data; + u32 data; if (amdgpu_sriov_vf(adev)) *flags = 0; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c @@ -657,7 +657,7 @@ static void mmhub_v9_4_get_clockgating(struct amdgpu_device *adev, u64 *flags) { - int data, data1; + u32 data, data1; if (amdgpu_sriov_vf(adev)) *flags = 0; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c @@ -290,6 +290,7 @@ reset_context.method = AMD_RESET_METHOD_NONE; reset_context.reset_req_dev = adev; clear_bit(AMDGPU_NEED_FULL_RESET, &reset_context.flags); + set_bit(AMDGPU_HOST_FLR, &reset_context.flags); amdgpu_device_gpu_recover(adev, NULL, &reset_context); } @@ -317,7 +318,7 @@ switch (event) { case IDH_FLR_NOTIFICATION: - if (amdgpu_sriov_runtime(adev) && !amdgpu_in_reset(adev)) + if (amdgpu_sriov_runtime(adev)) WARN_ONCE(!amdgpu_reset_domain_schedule(adev->reset_domain, &adev->virt.flr_work), "Failed to queue work! at %s", --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c @@ -315,6 +315,7 @@ reset_context.method = AMD_RESET_METHOD_NONE; reset_context.reset_req_dev = adev; clear_bit(AMDGPU_NEED_FULL_RESET, &reset_context.flags); + set_bit(AMDGPU_HOST_FLR, &reset_context.flags); amdgpu_device_gpu_recover(adev, NULL, &reset_context); } @@ -345,7 +346,7 @@ switch (event) { case IDH_FLR_NOTIFICATION: - if (amdgpu_sriov_runtime(adev) && !amdgpu_in_reset(adev)) + if (amdgpu_sriov_runtime(adev)) WARN_ONCE(!amdgpu_reset_domain_schedule(adev->reset_domain, &adev->virt.flr_work), "Failed to queue work! at %s", --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c @@ -529,6 +529,7 @@ reset_context.method = AMD_RESET_METHOD_NONE; reset_context.reset_req_dev = adev; clear_bit(AMDGPU_NEED_FULL_RESET, &reset_context.flags); + set_bit(AMDGPU_HOST_FLR, &reset_context.flags); amdgpu_device_gpu_recover(adev, NULL, &reset_context); } @@ -560,7 +561,7 @@ r = xgpu_vi_mailbox_rcv_msg(adev, IDH_FLR_NOTIFICATION); /* only handle FLR_NOTIFY now */ - if (!r && !amdgpu_in_reset(adev)) + if (!r) WARN_ONCE(!amdgpu_reset_domain_schedule(adev->reset_domain, &adev->virt.flr_work), "Failed to queue work! at %s", --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c @@ -270,6 +270,15 @@ if (def != data) WREG32_SOC15(NBIO, 0, regBIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3, data); + switch (amdgpu_ip_version(adev, NBIO_HWIP, 0)) { + case IP_VERSION(7, 11, 0): + case IP_VERSION(7, 11, 1): + case IP_VERSION(7, 11, 2): + case IP_VERSION(7, 11, 3): + data = RREG32_SOC15(NBIO, 0, regRCC_DEV0_EPF5_STRAP4) & ~BIT(23); + WREG32_SOC15(NBIO, 0, regRCC_DEV0_EPF5_STRAP4, data); + break; + } } static void nbio_v7_11_update_medium_grain_clock_gating(struct amdgpu_device *adev, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c @@ -387,7 +387,7 @@ else WREG32_SOC15(NBIO, 0, mmBIF_DOORBELL_INT_CNTL, bif_doorbell_intr_cntl); - if (!ras->disable_ras_err_cnt_harvest) { + if (ras && !ras->disable_ras_err_cnt_harvest && obj) { /* * clear error status after ras_controller_intr * according to hw team and count ue number --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c @@ -247,6 +247,12 @@ if (def != data) WREG32_SOC15(NBIO, 0, regBIF0_PCIE_MST_CTRL_3, data); + switch (amdgpu_ip_version(adev, NBIO_HWIP, 0)) { + case IP_VERSION(7, 7, 0): + data = RREG32_SOC15(NBIO, 0, regRCC_DEV0_EPF5_STRAP4) & ~BIT(23); + WREG32_SOC15(NBIO, 0, regRCC_DEV0_EPF5_STRAP4, data); + break; + } } static void nbio_v7_7_update_medium_grain_clock_gating(struct amdgpu_device *adev, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/nv.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/nv.c @@ -68,8 +68,8 @@ /* Navi */ static const struct amdgpu_video_codec_info nv_video_codecs_encode_array[] = { - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 2304, 0)}, - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 4096, 2304, 0)}, + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 0)}, + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 4096, 4096, 0)}, }; static const struct amdgpu_video_codecs nv_video_codecs_encode = { @@ -95,8 +95,8 @@ /* Sienna Cichlid */ static const struct amdgpu_video_codec_info sc_video_codecs_encode_array[] = { - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 2160, 0)}, - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 7680, 4352, 0)}, + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 0)}, + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 8192, 4352, 0)}, }; static const struct amdgpu_video_codecs sc_video_codecs_encode = { @@ -137,8 +137,8 @@ /* SRIOV Sienna Cichlid, not const since data is controlled by host */ static struct amdgpu_video_codec_info sriov_sc_video_codecs_encode_array[] = { - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 2160, 0)}, - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 7680, 4352, 0)}, + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 0)}, + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 8192, 4352, 0)}, }; static struct amdgpu_video_codec_info sriov_sc_video_codecs_decode_array_vcn0[] = { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c @@ -2017,10 +2017,13 @@ struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) { - uint32_t instance; + int instance; DRM_DEBUG("IH: SDMA trap\n"); instance = sdma_v4_0_irq_id_to_seq(entry->client_id); + if (instance < 0) + return instance; + switch (entry->ring_id) { case 0: amdgpu_fence_process(&adev->sdma.instance[instance].ring); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c @@ -366,7 +366,8 @@ u32 ref_and_mask = 0; const struct nbio_hdp_flush_reg *nbio_hf_reg = adev->nbio.hdp_flush_reg; - ref_and_mask = nbio_hf_reg->ref_and_mask_sdma0 << ring->me; + ref_and_mask = nbio_hf_reg->ref_and_mask_sdma0 + << (ring->me % adev->sdma.num_inst_per_aid); sdma_v4_4_2_wait_reg_mem(ring, 0, 1, adev->nbio.funcs->get_hdp_flush_done_offset(adev), @@ -429,16 +430,11 @@ struct amdgpu_ring *sdma[AMDGPU_MAX_SDMA_INSTANCES]; u32 doorbell_offset, doorbell; u32 rb_cntl, ib_cntl; - int i, unset = 0; + int i; for_each_inst(i, inst_mask) { sdma[i] = &adev->sdma.instance[i].ring; - if ((adev->mman.buffer_funcs_ring == sdma[i]) && unset != 1) { - amdgpu_ttm_set_buffer_funcs_status(adev, false); - unset = 1; - } - rb_cntl = RREG32_SDMA(i, regSDMA_GFX_RB_CNTL); rb_cntl = REG_SET_FIELD(rb_cntl, SDMA_GFX_RB_CNTL, RB_ENABLE, 0); WREG32_SDMA(i, regSDMA_GFX_RB_CNTL, rb_cntl); @@ -485,20 +481,10 @@ static void sdma_v4_4_2_inst_page_stop(struct amdgpu_device *adev, uint32_t inst_mask) { - struct amdgpu_ring *sdma[AMDGPU_MAX_SDMA_INSTANCES]; u32 rb_cntl, ib_cntl; int i; - bool unset = false; for_each_inst(i, inst_mask) { - sdma[i] = &adev->sdma.instance[i].page; - - if ((adev->mman.buffer_funcs_ring == sdma[i]) && - (!unset)) { - amdgpu_ttm_set_buffer_funcs_status(adev, false); - unset = true; - } - rb_cntl = RREG32_SDMA(i, regSDMA_PAGE_RB_CNTL); rb_cntl = REG_SET_FIELD(rb_cntl, SDMA_PAGE_RB_CNTL, RB_ENABLE, 0); @@ -911,10 +897,12 @@ /* set utc l1 enable flag always to 1 */ temp = RREG32_SDMA(i, regSDMA_CNTL); temp = REG_SET_FIELD(temp, SDMA_CNTL, UTC_L1_ENABLE, 1); - /* enable context empty interrupt during initialization */ - temp = REG_SET_FIELD(temp, SDMA_CNTL, CTXEMPTY_INT_ENABLE, 1); - WREG32_SDMA(i, regSDMA_CNTL, temp); + if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) < IP_VERSION(4, 4, 5)) { + /* enable context empty interrupt during initialization */ + temp = REG_SET_FIELD(temp, SDMA_CNTL, CTXEMPTY_INT_ENABLE, 1); + WREG32_SDMA(i, regSDMA_CNTL, temp); + } if (!amdgpu_sriov_vf(adev)) { if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) { /* unhalt engine */ @@ -948,13 +936,7 @@ r = amdgpu_ring_test_helper(page); if (r) return r; - - if (adev->mman.buffer_funcs_ring == page) - amdgpu_ttm_set_buffer_funcs_status(adev, true); } - - if (adev->mman.buffer_funcs_ring == ring) - amdgpu_ttm_set_buffer_funcs_status(adev, true); } return r; @@ -1621,19 +1603,9 @@ u32 sdma_cntl; sdma_cntl = RREG32_SDMA(type, regSDMA_CNTL); - switch (state) { - case AMDGPU_IRQ_STATE_DISABLE: - sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA_CNTL, - DRAM_ECC_INT_ENABLE, 0); - WREG32_SDMA(type, regSDMA_CNTL, sdma_cntl); - break; - /* sdma ecc interrupt is enabled by default - * driver doesn't need to do anything to - * enable the interrupt */ - case AMDGPU_IRQ_STATE_ENABLE: - default: - break; - } + sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA_CNTL, DRAM_ECC_INT_ENABLE, + state == AMDGPU_IRQ_STATE_ENABLE ? 1 : 0); + WREG32_SDMA(type, regSDMA_CNTL, sdma_cntl); return 0; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c @@ -188,6 +188,16 @@ DRM_DEBUG("calling WDOORBELL64(0x%08x, 0x%016llx)\n", ring->doorbell_index, ring->wptr << 2); WDOORBELL64(ring->doorbell_index, ring->wptr << 2); + if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) == IP_VERSION(5, 2, 1)) { + /* SDMA seems to miss doorbells sometimes when powergating kicks in. + * Updating the wptr directly will wake it. This is only safe because + * we disallow gfxoff in begin_use() and then allow it again in end_use(). + */ + WREG32(sdma_v5_2_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR), + lower_32_bits(ring->wptr << 2)); + WREG32(sdma_v5_2_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR_HI), + upper_32_bits(ring->wptr << 2)); + } } else { DRM_DEBUG("Not using doorbell -- " "mmSDMA%i_GFX_RB_WPTR == 0x%08x " @@ -292,17 +302,21 @@ u32 ref_and_mask = 0; const struct nbio_hdp_flush_reg *nbio_hf_reg = adev->nbio.hdp_flush_reg; - ref_and_mask = nbio_hf_reg->ref_and_mask_sdma0 << ring->me; + if (ring->me > 1) { + amdgpu_asic_flush_hdp(adev, ring); + } else { + ref_and_mask = nbio_hf_reg->ref_and_mask_sdma0 << ring->me; - amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_POLL_REGMEM) | - SDMA_PKT_POLL_REGMEM_HEADER_HDP_FLUSH(1) | - SDMA_PKT_POLL_REGMEM_HEADER_FUNC(3)); /* == */ - amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_done_offset(adev)) << 2); - amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_req_offset(adev)) << 2); - amdgpu_ring_write(ring, ref_and_mask); /* reference */ - amdgpu_ring_write(ring, ref_and_mask); /* mask */ - amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) | - SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(10)); /* retry count, poll interval */ + amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_POLL_REGMEM) | + SDMA_PKT_POLL_REGMEM_HEADER_HDP_FLUSH(1) | + SDMA_PKT_POLL_REGMEM_HEADER_FUNC(3)); /* == */ + amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_done_offset(adev)) << 2); + amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_req_offset(adev)) << 2); + amdgpu_ring_write(ring, ref_and_mask); /* reference */ + amdgpu_ring_write(ring, ref_and_mask); /* mask */ + amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) | + SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(10)); /* retry count, poll interval */ + } } /** @@ -1654,6 +1668,10 @@ * but it shouldn't hurt for other parts since * this GFXOFF will be disallowed anyway when SDMA is * active, this just makes it explicit. + * sdma_v5_2_ring_set_wptr() takes advantage of this + * to update the wptr because sometimes SDMA seems to miss + * doorbells when entering PG. If you remove this, update + * sdma_v5_2_ring_set_wptr() as well! */ amdgpu_gfx_off_ctrl(adev, false); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c @@ -92,7 +92,7 @@ adev->ip_blocks[i].status.hw = false; } - return r; + return 0; } static int --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/smu_v13_0_10.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/smu_v13_0_10.c @@ -91,7 +91,7 @@ adev->ip_blocks[i].status.hw = false; } - return r; + return 0; } static int --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/soc15.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/soc15.c @@ -90,8 +90,8 @@ /* Vega, Raven, Arcturus */ static const struct amdgpu_video_codec_info vega_video_codecs_encode_array[] = { - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 2304, 0)}, - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 4096, 2304, 0)}, + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 0)}, + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 4096, 4096, 0)}, }; static const struct amdgpu_video_codecs vega_video_codecs_encode = --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/soc15d.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/soc15d.h @@ -76,6 +76,12 @@ ((cond & 0xF) << 24) | \ ((type & 0xF) << 28)) +#define CP_PACKETJ_NOP 0x60000000 +#define CP_PACKETJ_GET_REG(x) ((x) & 0x3FFFF) +#define CP_PACKETJ_GET_RES(x) (((x) >> 18) & 0x3F) +#define CP_PACKETJ_GET_COND(x) (((x) >> 24) & 0xF) +#define CP_PACKETJ_GET_TYPE(x) (((x) >> 28) & 0xF) + /* Packet 3 types */ #define PACKET3_NOP 0x10 #define PACKET3_SET_BASE 0x11 --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/soc21.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/soc21.c @@ -49,13 +49,13 @@ /* SOC21 */ static const struct amdgpu_video_codec_info vcn_4_0_0_video_codecs_encode_array_vcn0[] = { - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 2304, 0)}, + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 0)}, {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 8192, 4352, 0)}, {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_AV1, 8192, 4352, 0)}, }; static const struct amdgpu_video_codec_info vcn_4_0_0_video_codecs_encode_array_vcn1[] = { - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 2304, 0)}, + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 0)}, {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 8192, 4352, 0)}, }; @@ -96,14 +96,14 @@ /* SRIOV SOC21, not const since data is controlled by host */ static struct amdgpu_video_codec_info sriov_vcn_4_0_0_video_codecs_encode_array_vcn0[] = { - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 2304, 0)}, - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 4096, 2304, 0)}, + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 0)}, + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 8192, 4352, 0)}, {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_AV1, 8192, 4352, 0)}, }; static struct amdgpu_video_codec_info sriov_vcn_4_0_0_video_codecs_encode_array_vcn1[] = { - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 2304, 0)}, - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 4096, 2304, 0)}, + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 0)}, + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 8192, 4352, 0)}, }; static struct amdgpu_video_codecs sriov_vcn_4_0_0_video_codecs_encode_vcn0 = { @@ -450,10 +450,8 @@ { switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { case IP_VERSION(11, 0, 0): - return amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__UMC); case IP_VERSION(11, 0, 2): case IP_VERSION(11, 0, 3): - return false; default: return true; } @@ -714,7 +712,10 @@ AMD_PG_SUPPORT_VCN | AMD_PG_SUPPORT_JPEG | AMD_PG_SUPPORT_GFX_PG; - adev->external_rev_id = adev->rev_id + 0x1; + if (adev->rev_id == 0) + adev->external_rev_id = 0x1; + else + adev->external_rev_id = adev->rev_id + 0x10; break; default: /* FIXME: not supported yet */ @@ -832,10 +833,35 @@ return soc21_common_hw_fini(adev); } +static bool soc21_need_reset_on_resume(struct amdgpu_device *adev) +{ + u32 sol_reg1, sol_reg2; + + /* Will reset for the following suspend abort cases. + * 1) Only reset dGPU side. + * 2) S3 suspend got aborted and TOS is active. + */ + if (!(adev->flags & AMD_IS_APU) && adev->in_s3 && + !adev->suspend_complete) { + sol_reg1 = RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_81); + msleep(100); + sol_reg2 = RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_81); + + return (sol_reg1 != sol_reg2); + } + + return false; +} + static int soc21_common_resume(void *handle) { struct amdgpu_device *adev = (struct amdgpu_device *)handle; + if (soc21_need_reset_on_resume(adev)) { + dev_info(adev->dev, "S3 suspend aborted, resetting..."); + soc21_asic_reset(adev); + } + return soc21_common_hw_init(adev); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/ta_ras_if.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/ta_ras_if.h @@ -36,6 +36,9 @@ TA_RAS_COMMAND__ENABLE_FEATURES = 0, TA_RAS_COMMAND__DISABLE_FEATURES, TA_RAS_COMMAND__TRIGGER_ERROR, + TA_RAS_COMMAND__QUERY_BLOCK_INFO, + TA_RAS_COMMAND__QUERY_SUB_BLOCK_INFO, + TA_RAS_COMMAND__QUERY_ADDRESS, }; enum ta_ras_status { @@ -105,6 +108,11 @@ TA_RAS_ERROR__POISON = 8, }; +enum ta_ras_address_type { + TA_RAS_MCA_TO_PA, + TA_RAS_PA_TO_MCA, +}; + /* Input/output structures for RAS commands */ /**********************************************************/ @@ -133,12 +141,38 @@ uint8_t channel_dis_num; }; +struct ta_ras_mca_addr { + uint64_t err_addr; + uint32_t ch_inst; + uint32_t umc_inst; + uint32_t node_inst; +}; + +struct ta_ras_phy_addr { + uint64_t pa; + uint32_t bank; + uint32_t channel_idx; +}; + +struct ta_ras_query_address_input { + enum ta_ras_address_type addr_type; + struct ta_ras_mca_addr ma; + struct ta_ras_phy_addr pa; +}; + struct ta_ras_output_flags { uint8_t ras_init_success_flag; uint8_t err_inject_switch_disable_flag; uint8_t reg_access_failure_flag; }; +struct ta_ras_query_address_output { + /* don't use the flags here */ + struct ta_ras_output_flags flags; + struct ta_ras_mca_addr ma; + struct ta_ras_phy_addr pa; +}; + /* Common input structure for RAS callbacks */ /**********************************************************/ union ta_ras_cmd_input { @@ -146,12 +180,14 @@ struct ta_ras_enable_features_input enable_features; struct ta_ras_disable_features_input disable_features; struct ta_ras_trigger_error_input trigger_error; + struct ta_ras_query_address_input address; uint32_t reserve_pad[256]; }; union ta_ras_cmd_output { struct ta_ras_output_flags flags; + struct ta_ras_query_address_output address; uint32_t reserve_pad[256]; }; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c @@ -225,6 +225,8 @@ WREG32_SOC15(VCN, 0, regVCN_UMSCH_RB_SIZE, ring->ring_size); + ring->wptr = 0; + data = RREG32_SOC15(VCN, 0, regVCN_RB_ENABLE); data &= ~(VCN_RB_ENABLE__AUDIO_RB_EN_MASK); WREG32_SOC15(VCN, 0, regVCN_RB_ENABLE, data); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c @@ -1289,7 +1289,7 @@ struct amdgpu_job *job, struct amdgpu_ib *ib) { - struct amdgpu_ring *ring = to_amdgpu_ring(job->base.sched); + struct amdgpu_ring *ring = amdgpu_job_ring(job); unsigned i; /* No patching necessary for the first instance */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c @@ -77,6 +77,20 @@ return amdgpu_vcn_early_init(adev); } +static int vcn_v4_0_3_fw_shared_init(struct amdgpu_device *adev, int inst_idx) +{ + struct amdgpu_vcn4_fw_shared *fw_shared; + + fw_shared = adev->vcn.inst[inst_idx].fw_shared.cpu_addr; + fw_shared->present_flag_0 = cpu_to_le32(AMDGPU_FW_SHARED_FLAG_0_UNIFIED_QUEUE); + fw_shared->sq.is_enabled = 1; + + if (amdgpu_vcnfw_log) + amdgpu_vcn_fwlog_init(&adev->vcn.inst[inst_idx]); + + return 0; +} + /** * vcn_v4_0_3_sw_init - sw init for VCN block * @@ -107,8 +121,6 @@ return r; for (i = 0; i < adev->vcn.num_vcn_inst; i++) { - volatile struct amdgpu_vcn4_fw_shared *fw_shared; - vcn_inst = GET_INST(VCN, i); ring = &adev->vcn.inst[i].ring_enc[0]; @@ -131,12 +143,7 @@ if (r) return r; - fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; - fw_shared->present_flag_0 = cpu_to_le32(AMDGPU_FW_SHARED_FLAG_0_UNIFIED_QUEUE); - fw_shared->sq.is_enabled = true; - - if (amdgpu_vcnfw_log) - amdgpu_vcn_fwlog_init(&adev->vcn.inst[i]); + vcn_v4_0_3_fw_shared_init(adev, i); } if (amdgpu_sriov_vf(adev)) { @@ -221,6 +228,8 @@ } } else { for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { + struct amdgpu_vcn4_fw_shared *fw_shared; + vcn_inst = GET_INST(VCN, i); ring = &adev->vcn.inst[i].ring_enc[0]; @@ -244,6 +253,11 @@ regVCN_RB1_DB_CTRL); } + /* Re-init fw_shared when RAS fatal error occurred */ + fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; + if (!fw_shared->sq.is_enabled) + vcn_v4_0_3_fw_shared_init(adev, i); + r = amdgpu_ring_test_helper(ring); if (r) goto done; @@ -882,6 +896,8 @@ for (i = 0; i < adev->vcn.num_vcn_inst; i++) { vcn_inst = GET_INST(VCN, i); + vcn_v4_0_3_fw_shared_init(adev, vcn_inst); + memset(&header, 0, sizeof(struct mmsch_v4_0_3_init_header)); header.version = MMSCH_VERSION; header.total_size = sizeof(struct mmsch_v4_0_3_init_header) >> 2; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c @@ -1346,170 +1346,6 @@ } } -static int vcn_v4_0_5_limit_sched(struct amdgpu_cs_parser *p, - struct amdgpu_job *job) -{ - struct drm_gpu_scheduler **scheds; - - /* The create msg must be in the first IB submitted */ - if (atomic_read(&job->base.entity->fence_seq)) - return -EINVAL; - - /* if VCN0 is harvested, we can't support AV1 */ - if (p->adev->vcn.harvest_config & AMDGPU_VCN_HARVEST_VCN0) - return -EINVAL; - - scheds = p->adev->gpu_sched[AMDGPU_HW_IP_VCN_ENC] - [AMDGPU_RING_PRIO_0].sched; - drm_sched_entity_modify_sched(job->base.entity, scheds, 1); - return 0; -} - -static int vcn_v4_0_5_dec_msg(struct amdgpu_cs_parser *p, struct amdgpu_job *job, - uint64_t addr) -{ - struct ttm_operation_ctx ctx = { false, false }; - struct amdgpu_bo_va_mapping *map; - uint32_t *msg, num_buffers; - struct amdgpu_bo *bo; - uint64_t start, end; - unsigned int i; - void *ptr; - int r; - - addr &= AMDGPU_GMC_HOLE_MASK; - r = amdgpu_cs_find_mapping(p, addr, &bo, &map); - if (r) { - DRM_ERROR("Can't find BO for addr 0x%08llx\n", addr); - return r; - } - - start = map->start * AMDGPU_GPU_PAGE_SIZE; - end = (map->last + 1) * AMDGPU_GPU_PAGE_SIZE; - if (addr & 0x7) { - DRM_ERROR("VCN messages must be 8 byte aligned!\n"); - return -EINVAL; - } - - bo->flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED; - amdgpu_bo_placement_from_domain(bo, bo->allowed_domains); - r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); - if (r) { - DRM_ERROR("Failed validating the VCN message BO (%d)!\n", r); - return r; - } - - r = amdgpu_bo_kmap(bo, &ptr); - if (r) { - DRM_ERROR("Failed mapping the VCN message (%d)!\n", r); - return r; - } - - msg = ptr + addr - start; - - /* Check length */ - if (msg[1] > end - addr) { - r = -EINVAL; - goto out; - } - - if (msg[3] != RDECODE_MSG_CREATE) - goto out; - - num_buffers = msg[2]; - for (i = 0, msg = &msg[6]; i < num_buffers; ++i, msg += 4) { - uint32_t offset, size, *create; - - if (msg[0] != RDECODE_MESSAGE_CREATE) - continue; - - offset = msg[1]; - size = msg[2]; - - if (offset + size > end) { - r = -EINVAL; - goto out; - } - - create = ptr + addr + offset - start; - - /* H264, HEVC and VP9 can run on any instance */ - if (create[0] == 0x7 || create[0] == 0x10 || create[0] == 0x11) - continue; - - r = vcn_v4_0_5_limit_sched(p, job); - if (r) - goto out; - } - -out: - amdgpu_bo_kunmap(bo); - return r; -} - -#define RADEON_VCN_ENGINE_TYPE_ENCODE (0x00000002) -#define RADEON_VCN_ENGINE_TYPE_DECODE (0x00000003) - -#define RADEON_VCN_ENGINE_INFO (0x30000001) -#define RADEON_VCN_ENGINE_INFO_MAX_OFFSET 16 - -#define RENCODE_ENCODE_STANDARD_AV1 2 -#define RENCODE_IB_PARAM_SESSION_INIT 0x00000003 -#define RENCODE_IB_PARAM_SESSION_INIT_MAX_OFFSET 64 - -/* return the offset in ib if id is found, -1 otherwise - * to speed up the searching we only search upto max_offset - */ -static int vcn_v4_0_5_enc_find_ib_param(struct amdgpu_ib *ib, uint32_t id, int max_offset) -{ - int i; - - for (i = 0; i < ib->length_dw && i < max_offset && ib->ptr[i] >= 8; i += ib->ptr[i]/4) { - if (ib->ptr[i + 1] == id) - return i; - } - return -1; -} - -static int vcn_v4_0_5_ring_patch_cs_in_place(struct amdgpu_cs_parser *p, - struct amdgpu_job *job, - struct amdgpu_ib *ib) -{ - struct amdgpu_ring *ring = amdgpu_job_ring(job); - struct amdgpu_vcn_decode_buffer *decode_buffer; - uint64_t addr; - uint32_t val; - int idx; - - /* The first instance can decode anything */ - if (!ring->me) - return 0; - - /* RADEON_VCN_ENGINE_INFO is at the top of ib block */ - idx = vcn_v4_0_5_enc_find_ib_param(ib, RADEON_VCN_ENGINE_INFO, - RADEON_VCN_ENGINE_INFO_MAX_OFFSET); - if (idx < 0) /* engine info is missing */ - return 0; - - val = amdgpu_ib_get_value(ib, idx + 2); /* RADEON_VCN_ENGINE_TYPE */ - if (val == RADEON_VCN_ENGINE_TYPE_DECODE) { - decode_buffer = (struct amdgpu_vcn_decode_buffer *)&ib->ptr[idx + 6]; - - if (!(decode_buffer->valid_buf_flag & 0x1)) - return 0; - - addr = ((u64)decode_buffer->msg_buffer_address_hi) << 32 | - decode_buffer->msg_buffer_address_lo; - return vcn_v4_0_5_dec_msg(p, job, addr); - } else if (val == RADEON_VCN_ENGINE_TYPE_ENCODE) { - idx = vcn_v4_0_5_enc_find_ib_param(ib, RENCODE_IB_PARAM_SESSION_INIT, - RENCODE_IB_PARAM_SESSION_INIT_MAX_OFFSET); - if (idx >= 0 && ib->ptr[idx + 2] == RENCODE_ENCODE_STANDARD_AV1) - return vcn_v4_0_5_limit_sched(p, job); - } - return 0; -} - static const struct amdgpu_ring_funcs vcn_v4_0_5_unified_ring_vm_funcs = { .type = AMDGPU_RING_TYPE_VCN_ENC, .align_mask = 0x3f, @@ -1517,7 +1353,6 @@ .get_rptr = vcn_v4_0_5_unified_ring_get_rptr, .get_wptr = vcn_v4_0_5_unified_ring_get_wptr, .set_wptr = vcn_v4_0_5_unified_ring_set_wptr, - .patch_cs_in_place = vcn_v4_0_5_ring_patch_cs_in_place, .emit_frame_size = SOC15_FLUSH_GPU_TLB_NUM_WREG * 3 + SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 4 + --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/vega20_ih.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/vega20_ih.c @@ -114,6 +114,33 @@ tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, RB_ENABLE, (enable ? 1 : 0)); tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, RB_GPU_TS_ENABLE, 1); + if (enable) { + /* Unset the CLEAR_OVERFLOW bit to make sure the next step + * is switching the bit from 0 to 1 + */ + tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 0); + if (amdgpu_sriov_vf(adev) && amdgpu_sriov_reg_indirect_ih(adev)) { + if (psp_reg_program(&adev->psp, ih_regs->psp_reg_id, tmp)) + return -ETIMEDOUT; + } else { + WREG32_NO_KIQ(ih_regs->ih_rb_cntl, tmp); + } + + /* Clear RB_OVERFLOW bit */ + tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); + if (amdgpu_sriov_vf(adev) && amdgpu_sriov_reg_indirect_ih(adev)) { + if (psp_reg_program(&adev->psp, ih_regs->psp_reg_id, tmp)) + return -ETIMEDOUT; + } else { + WREG32_NO_KIQ(ih_regs->ih_rb_cntl, tmp); + } + + /* Unset the CLEAR_OVERFLOW bit immediately so new overflows + * can be detected. + */ + tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 0); + } + /* enable_intr field is only valid in ring0 */ if (ih == &adev->irq.ih) tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, ENABLE_INTR, (enable ? 1 : 0)); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdgpu/vi.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdgpu/vi.c @@ -136,15 +136,15 @@ { .codec_type = AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, .max_width = 4096, - .max_height = 2304, - .max_pixels_per_frame = 4096 * 2304, + .max_height = 4096, + .max_pixels_per_frame = 4096 * 4096, .max_level = 0, }, { .codec_type = AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, .max_width = 4096, - .max_height = 2304, - .max_pixels_per_frame = 4096 * 2304, + .max_height = 4096, + .max_pixels_per_frame = 4096 * 4096, .max_level = 0, }, }; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c @@ -417,7 +417,7 @@ err_create_queue: if (wptr_bo) - amdgpu_amdkfd_free_gtt_mem(dev->adev, wptr_bo); + amdgpu_amdkfd_free_gtt_mem(dev->adev, (void **)&wptr_bo); err_wptr_map_gart: err_bind_process: err_pdd: @@ -778,8 +778,8 @@ * nodes, but not more than args->num_of_nodes as that is * the amount of memory allocated by user */ - pa = kzalloc((sizeof(struct kfd_process_device_apertures) * - args->num_of_nodes), GFP_KERNEL); + pa = kcalloc(args->num_of_nodes, sizeof(struct kfd_process_device_apertures), + GFP_KERNEL); if (!pa) return -ENOMEM; @@ -1138,7 +1138,7 @@ goto err_unlock; } offset = dev->adev->rmmio_remap.bus_addr; - if (!offset) { + if (!offset || (PAGE_SIZE > 4096)) { err = -ENOMEM; goto err_unlock; } @@ -1164,7 +1164,7 @@ if (flags & KFD_IOC_ALLOC_MEM_FLAGS_AQL_QUEUE_MEM) size >>= 1; - WRITE_ONCE(pdd->vram_usage, pdd->vram_usage + PAGE_ALIGN(size)); + atomic64_add(PAGE_ALIGN(size), &pdd->vram_usage); } mutex_unlock(&p->mutex); @@ -1235,7 +1235,7 @@ kfd_process_device_remove_obj_handle( pdd, GET_IDR_HANDLE(args->handle)); - WRITE_ONCE(pdd->vram_usage, pdd->vram_usage - size); + atomic64_sub(size, &pdd->vram_usage); err_unlock: err_pdd: @@ -1522,7 +1522,7 @@ /* Find a KFD GPU device that supports the get_dmabuf_info query */ for (i = 0; kfd_topology_enum_kfd_devices(i, &dev) == 0; i++) - if (dev) + if (dev && !kfd_devcgroup_check_permission(dev)) break; if (!dev) return -EINVAL; @@ -1544,7 +1544,7 @@ if (xcp_id >= 0) args->gpu_id = dmabuf_adev->kfd.dev->nodes[xcp_id]->id; else - args->gpu_id = dmabuf_adev->kfd.dev->nodes[0]->id; + args->gpu_id = dev->id; args->flags = flags; /* Copy metadata buffer to user mode */ @@ -2306,7 +2306,7 @@ return -EINVAL; } offset = pdd->dev->adev->rmmio_remap.bus_addr; - if (!offset) { + if (!offset || (PAGE_SIZE > 4096)) { pr_err("amdgpu_amdkfd_get_mmio_remap_phys_addr failed\n"); return -ENOMEM; } @@ -2345,7 +2345,7 @@ } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) { bo_bucket->restored_offset = offset; /* Update the VRAM usage count */ - WRITE_ONCE(pdd->vram_usage, pdd->vram_usage + bo_bucket->size); + atomic64_add(bo_bucket->size, &pdd->vram_usage); } return 0; } @@ -3347,6 +3347,9 @@ if (vma->vm_end - vma->vm_start != PAGE_SIZE) return -EINVAL; + if (PAGE_SIZE > 4096) + return -EINVAL; + address = dev->adev->rmmio_remap.bus_addr; vm_flags_set(vma, VM_IO | VM_DONTCOPY | VM_DONTEXPAND | VM_NORESERVE | --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdkfd/kfd_crat.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdkfd/kfd_crat.h @@ -42,8 +42,6 @@ #define CRAT_OEMTABLEID_LENGTH 8 #define CRAT_RESERVED_LENGTH 6 -#define CRAT_OEMID_64BIT_MASK ((1ULL << (CRAT_OEMID_LENGTH * 8)) - 1) - /* Compute Unit flags */ #define COMPUTE_UNIT_CPU (1 << 0) /* Create Virtual CRAT for CPU */ #define COMPUTE_UNIT_GPU (1 << 1) /* Create Virtual CRAT for GPU */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdkfd/kfd_debug.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdkfd/kfd_debug.c @@ -103,7 +103,8 @@ struct kfd_process, debug_event_workarea); - kernel_write(process->dbg_ev_file, &write_data, 1, &pos); + if (process->debug_trap_enabled && process->dbg_ev_file) + kernel_write(process->dbg_ev_file, &write_data, 1, &pos); } /* update process/device/queue exception status, write to descriptor @@ -348,10 +349,27 @@ { uint32_t spi_dbg_cntl = pdd->spi_dbg_override | pdd->spi_dbg_launch_mode; uint32_t flags = pdd->process->dbg_flags; + struct amdgpu_device *adev = pdd->dev->adev; + int r; if (!kfd_dbg_is_per_vmid_supported(pdd->dev)) return 0; + if (!pdd->proc_ctx_cpu_ptr) { + r = amdgpu_amdkfd_alloc_gtt_mem(adev, + AMDGPU_MES_PROC_CTX_SIZE, + &pdd->proc_ctx_bo, + &pdd->proc_ctx_gpu_addr, + &pdd->proc_ctx_cpu_ptr, + false); + if (r) { + dev_err(adev->dev, + "failed to allocate process context bo\n"); + return r; + } + memset(pdd->proc_ctx_cpu_ptr, 0, AMDGPU_MES_PROC_CTX_SIZE); + } + return amdgpu_mes_set_shader_debugger(pdd->dev->adev, pdd->proc_ctx_gpu_addr, spi_dbg_cntl, pdd->watch_points, flags, sq_trap_en); } @@ -645,6 +663,7 @@ else if (target->runtime_info.runtime_state != DEBUG_RUNTIME_STATE_DISABLED) target->runtime_info.runtime_state = DEBUG_RUNTIME_STATE_ENABLED; + cancel_work_sync(&target->debug_event_workarea); fput(target->dbg_ev_file); target->dbg_ev_file = NULL; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdkfd/kfd_device.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdkfd/kfd_device.c @@ -405,15 +405,8 @@ f2g = &gfx_v11_kfd2kgd; break; case IP_VERSION(11, 0, 3): - if ((adev->pdev->device == 0x7460 && - adev->pdev->revision == 0x00) || - (adev->pdev->device == 0x7461 && - adev->pdev->revision == 0x00)) - /* Note: Compiler version is 11.0.5 while HW version is 11.0.3 */ - gfx_target_version = 110005; - else - /* Note: Compiler version is 11.0.1 while HW version is 11.0.3 */ - gfx_target_version = 110001; + /* Note: Compiler version is 11.0.1 while HW version is 11.0.3 */ + gfx_target_version = 110001; f2g = &gfx_v11_kfd2kgd; break; case IP_VERSION(11, 5, 0): @@ -586,6 +579,14 @@ struct kfd_node *knode; unsigned int i; + /* + * flush_work ensures that there are no outstanding + * work-queue items that will access interrupt_ring. New work items + * can't be created because we stopped interrupt handling above. + */ + flush_workqueue(kfd->ih_wq); + destroy_workqueue(kfd->ih_wq); + for (i = 0; i < num_nodes; i++) { knode = kfd->nodes[i]; device_queue_manager_uninit(knode->dqm); @@ -854,7 +855,7 @@ kfd_doorbell_error: kfd_gtt_sa_fini(kfd); kfd_gtt_sa_init_error: - amdgpu_amdkfd_free_gtt_mem(kfd->adev, kfd->gtt_mem); + amdgpu_amdkfd_free_gtt_mem(kfd->adev, &kfd->gtt_mem); alloc_gtt_mem_failure: dev_err(kfd_device, "device %x:%x NOT added due to errors\n", @@ -872,7 +873,7 @@ kfd_doorbell_fini(kfd); ida_destroy(&kfd->doorbell_ida); kfd_gtt_sa_fini(kfd); - amdgpu_amdkfd_free_gtt_mem(kfd->adev, kfd->gtt_mem); + amdgpu_amdkfd_free_gtt_mem(kfd->adev, &kfd->gtt_mem); } kfree(kfd); @@ -944,7 +945,6 @@ { struct kfd_node *node; int i; - int count; if (!kfd->init_complete) return; @@ -952,12 +952,10 @@ /* for runtime suspend, skip locking kfd */ if (!run_pm) { mutex_lock(&kfd_processes_mutex); - count = ++kfd_locked; - mutex_unlock(&kfd_processes_mutex); - /* For first KFD device suspend all the KFD processes */ - if (count == 1) + if (++kfd_locked == 1) kfd_suspend_all_processes(); + mutex_unlock(&kfd_processes_mutex); } for (i = 0; i < kfd->num_nodes; i++) { @@ -968,7 +966,7 @@ int kgd2kfd_resume(struct kfd_dev *kfd, bool run_pm) { - int ret, count, i; + int ret, i; if (!kfd->init_complete) return 0; @@ -982,12 +980,10 @@ /* for runtime resume, skip unlocking kfd */ if (!run_pm) { mutex_lock(&kfd_processes_mutex); - count = --kfd_locked; - mutex_unlock(&kfd_processes_mutex); - - WARN_ONCE(count < 0, "KFD suspend / resume ref. error"); - if (count == 0) + if (--kfd_locked == 0) ret = kfd_resume_all_processes(); + WARN_ONCE(kfd_locked < 0, "KFD suspend / resume ref. error"); + mutex_unlock(&kfd_processes_mutex); } return ret; @@ -1006,21 +1002,6 @@ return err; } -static inline void kfd_queue_work(struct workqueue_struct *wq, - struct work_struct *work) -{ - int cpu, new_cpu; - - cpu = new_cpu = smp_processor_id(); - do { - new_cpu = cpumask_next(new_cpu, cpu_online_mask) % nr_cpu_ids; - if (cpu_to_node(new_cpu) == numa_node_id()) - break; - } while (cpu != new_cpu); - - queue_work_on(new_cpu, wq, work); -} - /* This is called directly from KGD at ISR. */ void kgd2kfd_interrupt(struct kfd_dev *kfd, const void *ih_ring_entry) { @@ -1046,7 +1027,7 @@ patched_ihre, &is_patched) && enqueue_ih_ring_entry(node, is_patched ? patched_ihre : ih_ring_entry)) { - kfd_queue_work(node->ih_wq, &node->interrupt_work); + queue_work(node->kfd->ih_wq, &node->interrupt_work); spin_unlock_irqrestore(&node->interrupt_lock, flags); return; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c @@ -197,6 +197,21 @@ if (dqm->is_hws_hang) return -EIO; + if (!pdd->proc_ctx_cpu_ptr) { + r = amdgpu_amdkfd_alloc_gtt_mem(adev, + AMDGPU_MES_PROC_CTX_SIZE, + &pdd->proc_ctx_bo, + &pdd->proc_ctx_gpu_addr, + &pdd->proc_ctx_cpu_ptr, + false); + if (r) { + dev_err(adev->dev, + "failed to allocate process context bo\n"); + return r; + } + memset(pdd->proc_ctx_cpu_ptr, 0, AMDGPU_MES_PROC_CTX_SIZE); + } + memset(&queue_input, 0x0, sizeof(struct mes_add_queue_input)); queue_input.process_id = qpd->pqm->process->pasid; queue_input.page_table_base_addr = qpd->page_table_base; @@ -1997,6 +2012,7 @@ dev_err(dev, "HIQ MQD's queue_doorbell_id0 is not 0, Queue preemption time out\n"); while (halt_if_hws_hang) schedule(); + kfd_hws_hang(dqm); return -ETIME; } @@ -2629,7 +2645,7 @@ { WARN(!mqd, "No hiq sdma mqd trunk to free"); - amdgpu_amdkfd_free_gtt_mem(dev->adev, mqd->gtt_mem); + amdgpu_amdkfd_free_gtt_mem(dev->adev, &mqd->gtt_mem); } void device_queue_manager_uninit(struct device_queue_manager *dqm) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c @@ -373,7 +373,8 @@ pdd = kfd_create_process_device_data(dev, process); if (!pdd) { - pr_err("Failed to create process device data\n"); + dev_err(dev->adev->dev, + "Failed to create process device data\n"); return -ENOMEM; } /* --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c @@ -336,7 +336,8 @@ break; } kfd_signal_event_interrupt(pasid, context_id0 & 0x7fffff, 23); - } else if (source_id == SOC15_INTSRC_CP_BAD_OPCODE) { + } else if (source_id == SOC15_INTSRC_CP_BAD_OPCODE && + KFD_DBG_EC_TYPE_IS_PACKET(KFD_DEBUG_CP_BAD_OP_ECODE(context_id0))) { kfd_set_dbg_ev_from_interrupt(dev, pasid, KFD_DEBUG_DOORBELL_ID(context_id0), KFD_EC_MASK(KFD_DEBUG_CP_BAD_OP_ECODE(context_id0)), --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c @@ -325,7 +325,8 @@ /* CP */ if (source_id == SOC15_INTSRC_CP_END_OF_PIPE) kfd_signal_event_interrupt(pasid, context_id0, 32); - else if (source_id == SOC15_INTSRC_CP_BAD_OPCODE) + else if (source_id == SOC15_INTSRC_CP_BAD_OPCODE && + KFD_DBG_EC_TYPE_IS_PACKET(KFD_CTXID0_CP_BAD_OP_ECODE(context_id0))) kfd_set_dbg_ev_from_interrupt(dev, pasid, KFD_CTXID0_DOORBELL_ID(context_id0), KFD_EC_MASK(KFD_CTXID0_CP_BAD_OP_ECODE(context_id0)), --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c @@ -385,7 +385,8 @@ break; } kfd_signal_event_interrupt(pasid, sq_int_data, 24); - } else if (source_id == SOC15_INTSRC_CP_BAD_OPCODE) { + } else if (source_id == SOC15_INTSRC_CP_BAD_OPCODE && + KFD_DBG_EC_TYPE_IS_PACKET(KFD_DEBUG_CP_BAD_OP_ECODE(context_id0))) { kfd_set_dbg_ev_from_interrupt(dev, pasid, KFD_DEBUG_DOORBELL_ID(context_id0), KFD_EC_MASK(KFD_DEBUG_CP_BAD_OP_ECODE(context_id0)), --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdkfd/kfd_interrupt.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdkfd/kfd_interrupt.c @@ -62,11 +62,14 @@ return r; } - node->ih_wq = alloc_workqueue("KFD IH", WQ_HIGHPRI, 1); - if (unlikely(!node->ih_wq)) { - kfifo_free(&node->ih_fifo); - dev_err(node->adev->dev, "Failed to allocate KFD IH workqueue\n"); - return -ENOMEM; + if (!node->kfd->ih_wq) { + node->kfd->ih_wq = alloc_workqueue("KFD IH", WQ_HIGHPRI | WQ_UNBOUND, + node->kfd->num_nodes); + if (unlikely(!node->kfd->ih_wq)) { + kfifo_free(&node->ih_fifo); + dev_err(node->adev->dev, "Failed to allocate KFD IH workqueue\n"); + return -ENOMEM; + } } spin_lock_init(&node->interrupt_lock); @@ -96,14 +99,6 @@ spin_lock_irqsave(&node->interrupt_lock, flags); node->interrupts_active = false; spin_unlock_irqrestore(&node->interrupt_lock, flags); - - /* - * flush_work ensures that there are no outstanding - * work-queue items that will access interrupt_ring. New work items - * can't be created because we stopped interrupt handling above. - */ - flush_workqueue(node->ih_wq); - kfifo_free(&node->ih_fifo); } @@ -160,7 +155,7 @@ /* If we spent more than a second processing signals, * reschedule the worker to avoid soft-lockup warnings */ - queue_work(dev->ih_wq, &dev->interrupt_work); + queue_work(dev->kfd->ih_wq, &dev->interrupt_work); break; } } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c @@ -68,7 +68,7 @@ kq->mqd_mgr = dev->dqm->mqd_mgrs[KFD_MQD_TYPE_HIQ]; break; default: - pr_err("Invalid queue type %d\n", type); + dev_err(dev->adev->dev, "Invalid queue type %d\n", type); return false; } @@ -78,13 +78,14 @@ prop.doorbell_ptr = kfd_get_kernel_doorbell(dev->kfd, &prop.doorbell_off); if (!prop.doorbell_ptr) { - pr_err("Failed to initialize doorbell"); + dev_err(dev->adev->dev, "Failed to initialize doorbell"); goto err_get_kernel_doorbell; } retval = kfd_gtt_sa_allocate(dev, queue_size, &kq->pq); if (retval != 0) { - pr_err("Failed to init pq queues size %d\n", queue_size); + dev_err(dev->adev->dev, "Failed to init pq queues size %d\n", + queue_size); goto err_pq_allocate_vidmem; } @@ -123,7 +124,7 @@ memset(kq->pq_kernel_addr, 0, queue_size); memset(kq->rptr_kernel, 0, sizeof(*kq->rptr_kernel)); - memset(kq->wptr_kernel, 0, sizeof(*kq->wptr_kernel)); + memset(kq->wptr_kernel, 0, dev->kfd->device_info.doorbell_size); prop.queue_size = queue_size; prop.is_interop = false; @@ -332,7 +333,7 @@ if (kq_initialize(kq, dev, type, KFD_KERNEL_QUEUE_SIZE)) return kq; - pr_err("Failed to init kernel queue\n"); + dev_err(dev->adev->dev, "Failed to init kernel queue\n"); kfree(kq); return NULL; @@ -351,26 +352,26 @@ uint32_t *buffer, i; int retval; - pr_err("Starting kernel queue test\n"); + dev_err(dev->adev->dev, "Starting kernel queue test\n"); kq = kernel_queue_init(dev, KFD_QUEUE_TYPE_HIQ); if (unlikely(!kq)) { - pr_err(" Failed to initialize HIQ\n"); - pr_err("Kernel queue test failed\n"); + dev_err(dev->adev->dev, " Failed to initialize HIQ\n"); + dev_err(dev->adev->dev, "Kernel queue test failed\n"); return; } retval = kq_acquire_packet_buffer(kq, 5, &buffer); if (unlikely(retval != 0)) { - pr_err(" Failed to acquire packet buffer\n"); - pr_err("Kernel queue test failed\n"); + dev_err(dev->adev->dev, " Failed to acquire packet buffer\n"); + dev_err(dev->adev->dev, "Kernel queue test failed\n"); return; } for (i = 0; i < 5; i++) buffer[i] = kq->nop_packet; kq_submit_packet(kq); - pr_err("Ending kernel queue test\n"); + dev_err(dev->adev->dev, "Ending kernel queue test\n"); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c @@ -306,7 +306,7 @@ spage = migrate_pfn_to_page(migrate->src[i]); if (spage && !is_zone_device_page(spage)) { src[i] = dma_map_page(dev, spage, 0, PAGE_SIZE, - DMA_TO_DEVICE); + DMA_BIDIRECTIONAL); r = dma_mapping_error(dev, src[i]); if (r) { dev_err(dev, "%s: fail %d dma_map_page\n", @@ -509,10 +509,19 @@ start = start_mgr << PAGE_SHIFT; end = (last_mgr + 1) << PAGE_SHIFT; + r = amdgpu_amdkfd_reserve_mem_limit(node->adev, + prange->npages * PAGE_SIZE, + KFD_IOC_ALLOC_MEM_FLAGS_VRAM, + node->xcp ? node->xcp->id : 0); + if (r) { + dev_dbg(node->adev->dev, "failed to reserve VRAM, r: %ld\n", r); + return -ENOSPC; + } + r = svm_range_vram_node_new(node, prange, true); if (r) { dev_dbg(node->adev->dev, "fail %ld to alloc vram\n", r); - return r; + goto out; } ttm_res_offset = (start_mgr - prange->start + prange->offset) << PAGE_SHIFT; @@ -545,6 +554,11 @@ svm_range_vram_node_free(prange); } +out: + amdgpu_amdkfd_unreserve_mem_limit(node->adev, + prange->npages * PAGE_SIZE, + KFD_IOC_ALLOC_MEM_FLAGS_VRAM, + node->xcp ? node->xcp->id : 0); return r < 0 ? r : 0; } @@ -616,7 +630,7 @@ goto out_oom; } - dst[i] = dma_map_page(dev, dpage, 0, PAGE_SIZE, DMA_FROM_DEVICE); + dst[i] = dma_map_page(dev, dpage, 0, PAGE_SIZE, DMA_BIDIRECTIONAL); r = dma_mapping_error(dev, dst[i]); if (r) { dev_err(adev->dev, "%s: fail %d dma_map_page\n", __func__, r); @@ -1009,7 +1023,7 @@ if (amdgpu_ip_version(adev, GC_HWIP, 0) < IP_VERSION(9, 0, 1)) return -EINVAL; - if (adev->gmc.is_app_apu) + if (adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) return 0; pgmap = &kfddev->pgmap; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c @@ -118,12 +118,14 @@ * attention grabbing. */ if (gfx_info->max_shader_engines > KFD_MAX_NUM_SE) { - pr_err("Exceeded KFD_MAX_NUM_SE, chip reports %d\n", - gfx_info->max_shader_engines); + dev_err(mm->dev->adev->dev, + "Exceeded KFD_MAX_NUM_SE, chip reports %d\n", + gfx_info->max_shader_engines); return; } if (gfx_info->max_sh_per_se > KFD_MAX_NUM_SH_PER_SE) { - pr_err("Exceeded KFD_MAX_NUM_SH, chip reports %d\n", + dev_err(mm->dev->adev->dev, + "Exceeded KFD_MAX_NUM_SH, chip reports %d\n", gfx_info->max_sh_per_se * gfx_info->max_shader_engines); return; } @@ -223,7 +225,7 @@ struct kfd_mem_obj *mqd_mem_obj) { if (mqd_mem_obj->gtt_mem) { - amdgpu_amdkfd_free_gtt_mem(mm->dev->adev, mqd_mem_obj->gtt_mem); + amdgpu_amdkfd_free_gtt_mem(mm->dev->adev, &mqd_mem_obj->gtt_mem); kfree(mqd_mem_obj); } else { kfd_gtt_sa_free(mm->dev, mqd_mem_obj); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c @@ -695,7 +695,7 @@ m = get_mqd(mqd + size * xcc); update_mqd(mm, m, q, minfo); - update_cu_mask(mm, mqd, minfo, xcc); + update_cu_mask(mm, m, minfo, xcc); if (q->format == KFD_QUEUE_FORMAT_AQL) { switch (xcc) { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c @@ -45,7 +45,8 @@ unsigned int process_count, queue_count, compute_queue_count, gws_queue_count; unsigned int map_queue_size; unsigned int max_proc_per_quantum = 1; - struct kfd_node *dev = pm->dqm->dev; + struct kfd_node *node = pm->dqm->dev; + struct device *dev = node->adev->dev; process_count = pm->dqm->processes_count; queue_count = pm->dqm->active_queue_count; @@ -59,14 +60,14 @@ */ *over_subscription = false; - if (dev->max_proc_per_quantum > 1) - max_proc_per_quantum = dev->max_proc_per_quantum; + if (node->max_proc_per_quantum > 1) + max_proc_per_quantum = node->max_proc_per_quantum; if ((process_count > max_proc_per_quantum) || compute_queue_count > get_cp_queues_num(pm->dqm) || gws_queue_count > 1) { *over_subscription = true; - pr_debug("Over subscribed runlist\n"); + dev_dbg(dev, "Over subscribed runlist\n"); } map_queue_size = pm->pmf->map_queues_size; @@ -81,7 +82,7 @@ if (*over_subscription) *rlib_size += pm->pmf->runlist_size; - pr_debug("runlist ib size %d\n", *rlib_size); + dev_dbg(dev, "runlist ib size %d\n", *rlib_size); } static int pm_allocate_runlist_ib(struct packet_manager *pm, @@ -90,6 +91,8 @@ unsigned int *rl_buffer_size, bool *is_over_subscription) { + struct kfd_node *node = pm->dqm->dev; + struct device *dev = node->adev->dev; int retval; if (WARN_ON(pm->allocated)) @@ -99,11 +102,10 @@ mutex_lock(&pm->lock); - retval = kfd_gtt_sa_allocate(pm->dqm->dev, *rl_buffer_size, - &pm->ib_buffer_obj); + retval = kfd_gtt_sa_allocate(node, *rl_buffer_size, &pm->ib_buffer_obj); if (retval) { - pr_err("Failed to allocate runlist IB\n"); + dev_err(dev, "Failed to allocate runlist IB\n"); goto out; } @@ -125,6 +127,8 @@ { unsigned int alloc_size_bytes; unsigned int *rl_buffer, rl_wptr, i; + struct kfd_node *node = pm->dqm->dev; + struct device *dev = node->adev->dev; int retval, processes_mapped; struct device_process_node *cur; struct qcm_process_device *qpd; @@ -142,7 +146,7 @@ *rl_size_bytes = alloc_size_bytes; pm->ib_size_bytes = alloc_size_bytes; - pr_debug("Building runlist ib process count: %d queues count %d\n", + dev_dbg(dev, "Building runlist ib process count: %d queues count %d\n", pm->dqm->processes_count, pm->dqm->active_queue_count); /* build the run list ib packet */ @@ -150,7 +154,7 @@ qpd = cur->qpd; /* build map process packet */ if (processes_mapped >= pm->dqm->processes_count) { - pr_debug("Not enough space left in runlist IB\n"); + dev_dbg(dev, "Not enough space left in runlist IB\n"); pm_release_ib(pm); return -ENOMEM; } @@ -167,7 +171,8 @@ if (!kq->queue->properties.is_active) continue; - pr_debug("static_queue, mapping kernel q %d, is debug status %d\n", + dev_dbg(dev, + "static_queue, mapping kernel q %d, is debug status %d\n", kq->queue->queue, qpd->is_debug); retval = pm->pmf->map_queues(pm, @@ -186,7 +191,8 @@ if (!q->properties.is_active) continue; - pr_debug("static_queue, mapping user queue %d, is debug status %d\n", + dev_dbg(dev, + "static_queue, mapping user queue %d, is debug status %d\n", q->queue, qpd->is_debug); retval = pm->pmf->map_queues(pm, @@ -203,11 +209,13 @@ } } - pr_debug("Finished map process and queues to runlist\n"); + dev_dbg(dev, "Finished map process and queues to runlist\n"); if (is_over_subscription) { if (!pm->is_over_subscription) - pr_warn("Runlist is getting oversubscribed. Expect reduced ROCm performance.\n"); + dev_warn( + dev, + "Runlist is getting oversubscribed. Expect reduced ROCm performance.\n"); retval = pm->pmf->runlist(pm, &rl_buffer[rl_wptr], *rl_gpu_addr, alloc_size_bytes / sizeof(uint32_t), @@ -272,6 +280,8 @@ int pm_send_set_resources(struct packet_manager *pm, struct scheduling_resources *res) { + struct kfd_node *node = pm->dqm->dev; + struct device *dev = node->adev->dev; uint32_t *buffer, size; int retval = 0; @@ -281,7 +291,7 @@ size / sizeof(uint32_t), (unsigned int **)&buffer); if (!buffer) { - pr_err("Failed to allocate buffer on kernel queue\n"); + dev_err(dev, "Failed to allocate buffer on kernel queue\n"); retval = -ENOMEM; goto out; } @@ -343,6 +353,8 @@ int pm_send_query_status(struct packet_manager *pm, uint64_t fence_address, uint64_t fence_value) { + struct kfd_node *node = pm->dqm->dev; + struct device *dev = node->adev->dev; uint32_t *buffer, size; int retval = 0; @@ -354,7 +366,7 @@ kq_acquire_packet_buffer(pm->priv_queue, size / sizeof(uint32_t), (unsigned int **)&buffer); if (!buffer) { - pr_err("Failed to allocate buffer on kernel queue\n"); + dev_err(dev, "Failed to allocate buffer on kernel queue\n"); retval = -ENOMEM; goto out; } @@ -372,6 +384,8 @@ int pm_update_grace_period(struct packet_manager *pm, uint32_t grace_period) { + struct kfd_node *node = pm->dqm->dev; + struct device *dev = node->adev->dev; int retval = 0; uint32_t *buffer, size; @@ -385,7 +399,8 @@ (unsigned int **)&buffer); if (!buffer) { - pr_err("Failed to allocate buffer on kernel queue\n"); + dev_err(dev, + "Failed to allocate buffer on kernel queue\n"); retval = -ENOMEM; goto out; } @@ -406,6 +421,8 @@ enum kfd_unmap_queues_filter filter, uint32_t filter_param, bool reset) { + struct kfd_node *node = pm->dqm->dev; + struct device *dev = node->adev->dev; uint32_t *buffer, size; int retval = 0; @@ -414,7 +431,7 @@ kq_acquire_packet_buffer(pm->priv_queue, size / sizeof(uint32_t), (unsigned int **)&buffer); if (!buffer) { - pr_err("Failed to allocate buffer on kernel queue\n"); + dev_err(dev, "Failed to allocate buffer on kernel queue\n"); retval = -ENOMEM; goto out; } @@ -463,6 +480,8 @@ int pm_debugfs_hang_hws(struct packet_manager *pm) { + struct kfd_node *node = pm->dqm->dev; + struct device *dev = node->adev->dev; uint32_t *buffer, size; int r = 0; @@ -474,16 +493,16 @@ kq_acquire_packet_buffer(pm->priv_queue, size / sizeof(uint32_t), (unsigned int **)&buffer); if (!buffer) { - pr_err("Failed to allocate buffer on kernel queue\n"); + dev_err(dev, "Failed to allocate buffer on kernel queue\n"); r = -ENOMEM; goto out; } memset(buffer, 0x55, size); kq_submit_packet(pm->priv_queue); - pr_info("Submitting %x %x %x %x %x %x %x to HIQ to hang the HWS.", - buffer[0], buffer[1], buffer[2], buffer[3], - buffer[4], buffer[5], buffer[6]); + dev_info(dev, "Submitting %x %x %x %x %x %x %x to HIQ to hang the HWS.", + buffer[0], buffer[1], buffer[2], buffer[3], buffer[4], + buffer[5], buffer[6]); out: mutex_unlock(&pm->lock); return r; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdkfd/kfd_priv.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdkfd/kfd_priv.h @@ -272,7 +272,6 @@ /* Interrupts */ struct kfifo ih_fifo; - struct workqueue_struct *ih_wq; struct work_struct interrupt_work; spinlock_t interrupt_lock; @@ -365,6 +364,8 @@ uint32_t alloc_watch_ids; spinlock_t watch_points_lock; + struct workqueue_struct *ih_wq; + /* Kernel doorbells for KFD device */ struct amdgpu_bo *doorbells; @@ -765,7 +766,7 @@ enum kfd_pdd_bound bound; /* VRAM usage */ - uint64_t vram_usage; + atomic64_t vram_usage; struct attribute attr_vram; char vram_filename[MAX_SYSFS_FILENAME_LEN]; @@ -1473,7 +1474,7 @@ static inline bool kfd_flush_tlb_after_unmap(struct kfd_dev *dev) { - return KFD_GC_VERSION(dev) > IP_VERSION(9, 4, 2) || + return KFD_GC_VERSION(dev) >= IP_VERSION(9, 4, 2) || (KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 1) && dev->sdma_fw_version >= 18) || KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 0); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdkfd/kfd_process.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdkfd/kfd_process.c @@ -306,14 +306,14 @@ } else if (strncmp(attr->name, "vram_", 5) == 0) { struct kfd_process_device *pdd = container_of(attr, struct kfd_process_device, attr_vram); - return snprintf(buffer, PAGE_SIZE, "%llu\n", READ_ONCE(pdd->vram_usage)); + return snprintf(buffer, PAGE_SIZE, "%llu\n", atomic64_read(&pdd->vram_usage)); } else if (strncmp(attr->name, "sdma_", 5) == 0) { struct kfd_process_device *pdd = container_of(attr, struct kfd_process_device, attr_sdma); struct kfd_sdma_activity_handler_workarea sdma_activity_work_handler; - INIT_WORK(&sdma_activity_work_handler.sdma_activity_work, - kfd_sdma_activity_worker); + INIT_WORK_ONSTACK(&sdma_activity_work_handler.sdma_activity_work, + kfd_sdma_activity_worker); sdma_activity_work_handler.pdd = pdd; sdma_activity_work_handler.sdma_activity_counter = 0; @@ -321,6 +321,7 @@ schedule_work(&sdma_activity_work_handler.sdma_activity_work); flush_work(&sdma_activity_work_handler.sdma_activity_work); + destroy_work_on_stack(&sdma_activity_work_handler.sdma_activity_work); return snprintf(buffer, PAGE_SIZE, "%llu\n", (sdma_activity_work_handler.sdma_activity_counter)/ @@ -819,9 +820,9 @@ mutex_lock(&kfd_processes_mutex); if (kfd_is_locked()) { - mutex_unlock(&kfd_processes_mutex); pr_debug("KFD is locked! Cannot create process"); - return ERR_PTR(-EINVAL); + process = ERR_PTR(-EINVAL); + goto out; } /* A prior open of /dev/kfd could have already created the process. */ @@ -829,6 +830,14 @@ if (process) { pr_debug("Process already found\n"); } else { + /* If the process just called exec(3), it is possible that the + * cleanup of the kfd_process (following the release of the mm + * of the old process image) is still in the cleanup work queue. + * Make sure to drain any job before trying to recreate any + * resource for this process. + */ + flush_workqueue(kfd_process_wq); + process = create_process(thread); if (IS_ERR(process)) goto out; @@ -1038,9 +1047,10 @@ kfd_free_process_doorbells(pdd->dev->kfd, pdd); - if (pdd->dev->kfd->shared_resources.enable_mes) + if (pdd->dev->kfd->shared_resources.enable_mes && + pdd->proc_ctx_cpu_ptr) amdgpu_amdkfd_free_gtt_mem(pdd->dev->adev, - pdd->proc_ctx_bo); + &pdd->proc_ctx_bo); /* * before destroying pdd, make sure to report availability * for auto suspend @@ -1121,7 +1131,8 @@ */ synchronize_rcu(); ef = rcu_access_pointer(p->ef); - dma_fence_signal(ef); + if (ef) + dma_fence_signal(ef); kfd_process_remove_sysfs(p); @@ -1303,7 +1314,8 @@ if (IS_ERR_VALUE(qpd->tba_addr)) { int err = qpd->tba_addr; - pr_err("Failure to set tba address. error %d.\n", err); + dev_err(dev->adev->dev, + "Failure to set tba address. error %d.\n", err); qpd->tba_addr = 0; qpd->cwsr_kaddr = NULL; return err; @@ -1571,7 +1583,6 @@ struct kfd_process *p) { struct kfd_process_device *pdd = NULL; - int retval = 0; if (WARN_ON_ONCE(p->n_pdds >= MAX_GPU_INSTANCE)) return NULL; @@ -1590,25 +1601,11 @@ pdd->bound = PDD_UNBOUND; pdd->already_dequeued = false; pdd->runtime_inuse = false; - pdd->vram_usage = 0; + atomic64_set(&pdd->vram_usage, 0); pdd->sdma_past_activity_counter = 0; pdd->user_gpu_id = dev->id; atomic64_set(&pdd->evict_duration_counter, 0); - if (dev->kfd->shared_resources.enable_mes) { - retval = amdgpu_amdkfd_alloc_gtt_mem(dev->adev, - AMDGPU_MES_PROC_CTX_SIZE, - &pdd->proc_ctx_bo, - &pdd->proc_ctx_gpu_addr, - &pdd->proc_ctx_cpu_ptr, - false); - if (retval) { - pr_err("failed to allocate process context bo\n"); - goto err_free_pdd; - } - memset(pdd->proc_ctx_cpu_ptr, 0, AMDGPU_MES_PROC_CTX_SIZE); - } - p->pdds[p->n_pdds++] = pdd; if (kfd_dbg_is_per_vmid_supported(pdd->dev)) pdd->spi_dbg_override = pdd->dev->kfd2kgd->disable_debug_trap( @@ -1620,10 +1617,6 @@ idr_init(&pdd->alloc_idr); return pdd; - -err_free_pdd: - kfree(pdd); - return NULL; } /** @@ -1666,12 +1659,15 @@ ret = amdgpu_amdkfd_gpuvm_acquire_process_vm(dev->adev, avm, &p->kgd_process_info, - &ef); + p->ef ? NULL : &ef); if (ret) { - pr_err("Failed to create process VM object\n"); + dev_err(dev->adev->dev, "Failed to create process VM object\n"); return ret; } - RCU_INIT_POINTER(p->ef, ef); + + if (!p->ef) + RCU_INIT_POINTER(p->ef, ef); + pdd->drm_priv = drm_file->private_data; ret = kfd_process_device_reserve_ib_mem(pdd); @@ -1715,7 +1711,7 @@ pdd = kfd_get_process_device_data(dev, p); if (!pdd) { - pr_err("Process device data doesn't exist\n"); + dev_err(dev->adev->dev, "Process device data doesn't exist\n"); return ERR_PTR(-ENOMEM); } @@ -1825,6 +1821,7 @@ for (i = 0; i < p->n_pdds; i++) { struct kfd_process_device *pdd = p->pdds[i]; + struct device *dev = pdd->dev->adev->dev; kfd_smi_event_queue_eviction(pdd->dev, p->lead_thread->pid, trigger); @@ -1836,7 +1833,7 @@ * them been add back since they actually not be saved right now. */ if (r && r != -EIO) { - pr_err("Failed to evict process queues\n"); + dev_err(dev, "Failed to evict process queues\n"); goto fail; } n_evicted++; @@ -1858,7 +1855,8 @@ if (pdd->dev->dqm->ops.restore_process_queues(pdd->dev->dqm, &pdd->qpd)) - pr_err("Failed to restore queues\n"); + dev_err(pdd->dev->adev->dev, + "Failed to restore queues\n"); n_evicted--; } @@ -1874,13 +1872,14 @@ for (i = 0; i < p->n_pdds; i++) { struct kfd_process_device *pdd = p->pdds[i]; + struct device *dev = pdd->dev->adev->dev; kfd_smi_event_queue_restore(pdd->dev, p->lead_thread->pid); r = pdd->dev->dqm->ops.restore_process_queues(pdd->dev->dqm, &pdd->qpd); if (r) { - pr_err("Failed to restore process queues\n"); + dev_err(dev, "Failed to restore process queues\n"); if (!ret) ret = r; } @@ -1922,6 +1921,8 @@ rcu_read_lock(); ef = dma_fence_get_rcu_safe(&p->ef); rcu_read_unlock(); + if (!ef) + return -EINVAL; ret = dma_fence_signal(ef); dma_fence_put(ef); @@ -1949,10 +1950,9 @@ * they are responsible stopping the queues and scheduling * the restore work. */ - if (!signal_eviction_fence(p)) - queue_delayed_work(kfd_restore_wq, &p->restore_work, - msecs_to_jiffies(PROCESS_RESTORE_TIME_MS)); - else + if (signal_eviction_fence(p) || + mod_delayed_work(kfd_restore_wq, &p->restore_work, + msecs_to_jiffies(PROCESS_RESTORE_TIME_MS))) kfd_process_restore_queues(p); pr_debug("Finished evicting pasid 0x%x\n", p->pasid); @@ -2011,9 +2011,9 @@ if (ret) { pr_debug("Failed to restore BOs of pasid 0x%x, retry after %d ms\n", p->pasid, PROCESS_BACK_OFF_TIME_MS); - ret = queue_delayed_work(kfd_restore_wq, &p->restore_work, - msecs_to_jiffies(PROCESS_BACK_OFF_TIME_MS)); - WARN(!ret, "reschedule restore work failed\n"); + if (mod_delayed_work(kfd_restore_wq, &p->restore_work, + msecs_to_jiffies(PROCESS_RESTORE_TIME_MS))) + kfd_process_restore_queues(p); } } @@ -2056,7 +2056,7 @@ struct qcm_process_device *qpd; if ((vma->vm_end - vma->vm_start) != KFD_CWSR_TBA_TMA_SIZE) { - pr_err("Incorrect CWSR mapping size.\n"); + dev_err(dev->adev->dev, "Incorrect CWSR mapping size.\n"); return -EINVAL; } @@ -2068,7 +2068,8 @@ qpd->cwsr_kaddr = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, get_order(KFD_CWSR_TBA_TMA_SIZE)); if (!qpd->cwsr_kaddr) { - pr_err("Error allocating per process CWSR buffer.\n"); + dev_err(dev->adev->dev, + "Error allocating per process CWSR buffer.\n"); return -ENOMEM; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c @@ -28,6 +28,7 @@ #include "kfd_priv.h" #include "kfd_kernel_queue.h" #include "amdgpu_amdkfd.h" +#include "amdgpu_reset.h" static inline struct process_queue_node *get_queue_by_qid( struct process_queue_manager *pqm, unsigned int qid) @@ -85,10 +86,17 @@ if (pdd->already_dequeued) return; - + /* The MES context flush needs to filter out the case which the + * KFD process is created without setting up the MES context and + * queue for creating a compute queue. + */ dev->dqm->ops.process_termination(dev->dqm, &pdd->qpd); - if (dev->kfd->shared_resources.enable_mes) - amdgpu_mes_flush_shader_debugger(dev->adev, pdd->proc_ctx_gpu_addr); + if (dev->kfd->shared_resources.enable_mes && !!pdd->proc_ctx_gpu_addr && + down_read_trylock(&dev->adev->reset_domain->sem)) { + amdgpu_mes_flush_shader_debugger(dev->adev, + pdd->proc_ctx_gpu_addr); + up_read(&dev->adev->reset_domain->sem); + } pdd->already_dequeued = true; } @@ -196,9 +204,9 @@ } if (dev->kfd->shared_resources.enable_mes) { - amdgpu_amdkfd_free_gtt_mem(dev->adev, pqn->q->gang_ctx_bo); + amdgpu_amdkfd_free_gtt_mem(dev->adev, &pqn->q->gang_ctx_bo); if (pqn->q->wptr_bo) - amdgpu_amdkfd_free_gtt_mem(dev->adev, pqn->q->wptr_bo); + amdgpu_amdkfd_free_gtt_mem(dev->adev, (void **)&pqn->q->wptr_bo); } } @@ -979,6 +987,7 @@ pr_debug("Queue id %d was restored successfully\n", queue_id); kfree(q_data); + kfree(q_extra_data); return ret; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdkfd/kfd_svm.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdkfd/kfd_svm.c @@ -404,6 +404,27 @@ spin_lock(&svm_bo->list_lock); } spin_unlock(&svm_bo->list_lock); + + if (mmget_not_zero(svm_bo->eviction_fence->mm)) { + struct kfd_process_device *pdd; + struct kfd_process *p; + struct mm_struct *mm; + + mm = svm_bo->eviction_fence->mm; + /* + * The forked child process takes svm_bo device pages ref, svm_bo could be + * released after parent process is gone. + */ + p = kfd_lookup_process_by_mm(mm); + if (p) { + pdd = kfd_get_process_device_data(svm_bo->node, p); + if (pdd) + atomic64_sub(amdgpu_bo_size(svm_bo->bo), &pdd->vram_usage); + kfd_unref_process(p); + } + mmput(mm); + } + if (!dma_fence_is_signaled(&svm_bo->eviction_fence->base)) /* We're not in the eviction worker. Signal the fence. */ dma_fence_signal(&svm_bo->eviction_fence->base); @@ -531,6 +552,7 @@ svm_range_vram_node_new(struct kfd_node *node, struct svm_range *prange, bool clear) { + struct kfd_process_device *pdd; struct amdgpu_bo_param bp; struct svm_range_bo *svm_bo; struct amdgpu_bo_user *ubo; @@ -622,6 +644,10 @@ list_add(&prange->svm_bo_list, &svm_bo->range_list); spin_unlock(&svm_bo->list_lock); + pdd = svm_range_get_pdd_by_node(prange, node); + if (pdd) + atomic64_add(amdgpu_bo_size(bo), &pdd->vram_usage); + return 0; reserve_bo_failed: @@ -1656,7 +1682,7 @@ start = map_start << PAGE_SHIFT; end = (map_last + 1) << PAGE_SHIFT; for (addr = start; !r && addr < end; ) { - struct hmm_range *hmm_range; + struct hmm_range *hmm_range = NULL; unsigned long map_start_vma; unsigned long map_last_vma; struct vm_area_struct *vma; @@ -1694,7 +1720,12 @@ } svm_range_lock(prange); - if (!r && amdgpu_hmm_range_get_pages_done(hmm_range)) { + + /* Free backing memory of hmm_range if it was initialized + * Overrride return value to TRY AGAIN only if prior returns + * were successful + */ + if (hmm_range && amdgpu_hmm_range_get_pages_done(hmm_range) && !r) { pr_debug("hmm update the range, need validate again\n"); r = -EAGAIN; } @@ -2617,7 +2648,8 @@ return -1; } - if (node->adev->gmc.is_app_apu) + if (node->adev->gmc.is_app_apu || + node->adev->flags & AMD_IS_APU) return 0; if (prange->preferred_loc == gpuid || @@ -3335,7 +3367,8 @@ goto out; } - if (bo_node->adev->gmc.is_app_apu) { + if (bo_node->adev->gmc.is_app_apu || + bo_node->adev->flags & AMD_IS_APU) { best_loc = 0; goto out; } @@ -3424,7 +3457,7 @@ mm, KFD_MIGRATE_TRIGGER_PREFETCH); *migrated = !r; - return r; + return 0; } int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdkfd/kfd_svm.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdkfd/kfd_svm.h @@ -201,7 +201,8 @@ * is initialized to not 0 when page migration register device memory. */ #define KFD_IS_SVM_API_SUPPORTED(adev) ((adev)->kfd.pgmap.type != 0 ||\ - (adev)->gmc.is_app_apu) + (adev)->gmc.is_app_apu ||\ + ((adev)->flags & AMD_IS_APU)) void svm_range_bo_unref_async(struct svm_range_bo *svm_bo); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdkfd/kfd_topology.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdkfd/kfd_topology.c @@ -958,8 +958,7 @@ dev = list_last_entry(&topology_device_list, struct kfd_topology_device, list); if (dev) { - sys_props.platform_id = - (*((uint64_t *)dev->oem_id)) & CRAT_OEMID_64BIT_MASK; + sys_props.platform_id = dev->oem_id64; sys_props.platform_oem = *((uint64_t *)dev->oem_table_id); sys_props.platform_rev = dev->oem_revision; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/amdkfd/kfd_topology.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/amdkfd/kfd_topology.h @@ -154,7 +154,10 @@ struct attribute attr_gpuid; struct attribute attr_name; struct attribute attr_props; - uint8_t oem_id[CRAT_OEMID_LENGTH]; + union { + uint8_t oem_id[CRAT_OEMID_LENGTH]; + uint64_t oem_id64; + }; uint8_t oem_table_id[CRAT_OEMTABLEID_LENGTH]; uint32_t oem_revision; }; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -147,6 +147,9 @@ #define FIRMWARE_DCN_35_DMUB "amdgpu/dcn_3_5_dmcub.bin" MODULE_FIRMWARE(FIRMWARE_DCN_35_DMUB); +#define FIRMWARE_DCN_351_DMUB "amdgpu/dcn_3_5_1_dmcub.bin" +MODULE_FIRMWARE(FIRMWARE_DCN_351_DMUB); + /* Number of bytes in PSP header for firmware. */ #define PSP_HEADER_BYTES 0x100 @@ -270,7 +273,7 @@ static int dm_crtc_get_scanoutpos(struct amdgpu_device *adev, int crtc, u32 *vbl, u32 *position) { - u32 v_blank_start, v_blank_end, h_position, v_position; + u32 v_blank_start = 0, v_blank_end = 0, h_position = 0, v_position = 0; struct amdgpu_crtc *acrtc = NULL; struct dc *dc = adev->dm.dc; @@ -590,12 +593,14 @@ if (!acrtc) return; - if (acrtc->wb_pending) { - if (acrtc->wb_conn) { - spin_lock_irqsave(&acrtc->wb_conn->job_lock, flags); + if (acrtc->wb_conn) { + spin_lock_irqsave(&acrtc->wb_conn->job_lock, flags); + + if (acrtc->wb_pending) { job = list_first_entry_or_null(&acrtc->wb_conn->job_queue, struct drm_writeback_job, list_entry); + acrtc->wb_pending = false; spin_unlock_irqrestore(&acrtc->wb_conn->job_lock, flags); if (job) { @@ -613,8 +618,7 @@ acrtc->dm_irq_params.stream, 0); } } else - DRM_ERROR("%s: no amdgpu_crtc wb_conn\n", __func__); - acrtc->wb_pending = false; + spin_unlock_irqrestore(&acrtc->wb_conn->job_lock, flags); } vrr_active = amdgpu_dm_crtc_vrr_active_irq(acrtc); @@ -753,6 +757,12 @@ return; } + /* Skip DMUB HPD IRQ in suspend/resume. We will probe them later. */ + if (notify->type == DMUB_NOTIFICATION_HPD && adev->in_suspend) { + DRM_INFO("Skip DMUB HPD IRQ callback in suspend/resume\n"); + return; + } + link_index = notify->link_index; link = adev->dm.dc->links[link_index]; dev = adev->dm.ddev; @@ -844,7 +854,7 @@ */ static void dm_dmub_outbox1_low_irq(void *interrupt_params) { - struct dmub_notification notify; + struct dmub_notification notify = {0}; struct common_irq_params *irq_params = interrupt_params; struct amdgpu_device *adev = irq_params->adev; struct amdgpu_display_manager *dm = &adev->dm; @@ -995,8 +1005,10 @@ continue; *enabled = true; + mutex_lock(&connector->eld_mutex); ret = drm_eld_size(connector->eld); memcpy(buf, connector->eld, min(max_bytes, ret)); + mutex_unlock(&connector->eld_mutex); break; } @@ -1683,7 +1695,11 @@ else init_data.flags.gpu_vm_support = (amdgpu_sg_display != 0); } else { - init_data.flags.gpu_vm_support = (amdgpu_sg_display != 0) && (adev->flags & AMD_IS_APU); + if (amdgpu_ip_version(adev, DCE_HWIP, 0) == IP_VERSION(2, 0, 3)) + init_data.flags.gpu_vm_support = (amdgpu_sg_display == 1); + else + init_data.flags.gpu_vm_support = + (amdgpu_sg_display != 0) && (adev->flags & AMD_IS_APU); } adev->mode_info.gpu_vm_support = init_data.flags.gpu_vm_support; @@ -1929,17 +1945,15 @@ adev->dm.hdcp_workqueue = NULL; } - if (adev->dm.dc) + if (adev->dm.dc) { dc_deinit_callbacks(adev->dm.dc); - - if (adev->dm.dc) dc_dmub_srv_destroy(&adev->dm.dc->ctx->dmub_srv); - - if (dc_enable_dmub_notifications(adev->dm.dc)) { - kfree(adev->dm.dmub_notify); - adev->dm.dmub_notify = NULL; - destroy_workqueue(adev->dm.delayed_hpd_wq); - adev->dm.delayed_hpd_wq = NULL; + if (dc_enable_dmub_notifications(adev->dm.dc)) { + kfree(adev->dm.dmub_notify); + adev->dm.dmub_notify = NULL; + destroy_workqueue(adev->dm.delayed_hpd_wq); + adev->dm.delayed_hpd_wq = NULL; + } } if (adev->dm.dmub_bo) @@ -2667,7 +2681,8 @@ dm->cached_dc_state = dc_state_create_copy(dm->dc->current_state); - dm_gpureset_toggle_interrupts(adev, dm->cached_dc_state, false); + if (dm->cached_dc_state) + dm_gpureset_toggle_interrupts(adev, dm->cached_dc_state, false); amdgpu_dm_commit_zero_streams(dm->dc); @@ -2690,6 +2705,10 @@ hpd_rx_irq_work_suspend(dm); dc_set_power_state(dm->dc, DC_ACPI_CM_POWER_STATE_D3); + + if (dm->dc->caps.ips_support && adev->in_s0ix) + dc_allow_idle_optimizations(dm->dc, true); + dc_dmub_srv_set_power_state(dm->dc->ctx->dmub_srv, DC_ACPI_CM_POWER_STATE_D3); return 0; @@ -2906,6 +2925,7 @@ dc_enable_dmub_outbox(adev->dm.dc); } + dc_exit_ips_for_hw_access(dm->dc); WARN_ON(!dc_commit_streams(dm->dc, dc_state->streams, dc_state->stream_count)); dm_gpureset_commit_state(dm->cached_dc_state, dm); @@ -2978,7 +2998,8 @@ emulated_link_detect(aconnector->dc_link); } else { mutex_lock(&dm->dc_lock); - dc_link_detect(aconnector->dc_link, DETECT_REASON_HPD); + dc_exit_ips_for_hw_access(dm->dc); + dc_link_detect(aconnector->dc_link, DETECT_REASON_RESUMEFROMS3S4); mutex_unlock(&dm->dc_lock); } @@ -3009,6 +3030,7 @@ dc_stream_release(dm_new_crtc_state->stream); dm_new_crtc_state->stream = NULL; } + dm_new_crtc_state->base.color_mgmt_changed = true; } for_each_new_plane_in_state(dm->cached_state, plane, new_plane_state, i) { @@ -3027,6 +3049,10 @@ /* Do mst topology probing after resuming cached state*/ drm_connector_list_iter_begin(ddev, &iter); drm_for_each_connector_iter(connector, &iter) { + + if (connector->connector_type == DRM_MODE_CONNECTOR_WRITEBACK) + continue; + aconnector = to_amdgpu_dm_connector(connector); if (aconnector->dc_link->type != dc_connection_mst_branch || aconnector->mst_root) @@ -3307,6 +3333,7 @@ enum dc_connection_type new_connection_type = dc_connection_none; struct amdgpu_device *adev = drm_to_adev(dev); struct dm_connector_state *dm_con_state = to_dm_connector_state(connector->state); + struct dc *dc = aconnector->dc_link->ctx->dc; bool ret = false; if (adev->dm.disable_hpd_irq) @@ -3341,6 +3368,7 @@ drm_kms_helper_connector_hotplug_event(connector); } else { mutex_lock(&adev->dm.dc_lock); + dc_exit_ips_for_hw_access(dc); ret = dc_link_detect(aconnector->dc_link, DETECT_REASON_HPD); mutex_unlock(&adev->dm.dc_lock); if (ret) { @@ -3400,6 +3428,7 @@ bool has_left_work = false; int idx = dc_link->link_index; struct hpd_rx_irq_offload_work_queue *offload_wq = &adev->dm.hpd_rx_offload_wq[idx]; + struct dc *dc = aconnector->dc_link->ctx->dc; memset(&hpd_irq_data, 0, sizeof(hpd_irq_data)); @@ -3489,6 +3518,7 @@ bool ret = false; mutex_lock(&adev->dm.dc_lock); + dc_exit_ips_for_hw_access(dc); ret = dc_link_detect(dc_link, DETECT_REASON_HPDRX); mutex_unlock(&adev->dm.dc_lock); @@ -4075,8 +4105,11 @@ } #ifdef AMD_PRIVATE_COLOR - if (amdgpu_dm_create_color_properties(adev)) + if (amdgpu_dm_create_color_properties(adev)) { + dc_state_release(state->context); + kfree(state); return -ENOMEM; + } #endif r = amdgpu_dm_audio_init(adev); @@ -4091,6 +4124,7 @@ #define AMDGPU_DM_DEFAULT_MIN_BACKLIGHT 12 #define AMDGPU_DM_DEFAULT_MAX_BACKLIGHT 255 +#define AMDGPU_DM_MIN_SPREAD ((AMDGPU_DM_DEFAULT_MAX_BACKLIGHT - AMDGPU_DM_DEFAULT_MIN_BACKLIGHT) / 2) #define AUX_BL_DEFAULT_TRANSITION_TIME_MS 50 static void amdgpu_dm_update_backlight_caps(struct amdgpu_display_manager *dm, @@ -4105,6 +4139,21 @@ return; amdgpu_acpi_get_backlight_caps(&caps); + + /* validate the firmware value is sane */ + if (caps.caps_valid) { + int spread = caps.max_input_signal - caps.min_input_signal; + + if (caps.max_input_signal > AMDGPU_DM_DEFAULT_MAX_BACKLIGHT || + caps.min_input_signal < 0 || + spread > AMDGPU_DM_DEFAULT_MAX_BACKLIGHT || + spread < AMDGPU_DM_MIN_SPREAD) { + DRM_DEBUG_KMS("DM: Invalid backlight caps: min=%d, max=%d\n", + caps.min_input_signal, caps.max_input_signal); + caps.caps_valid = false; + } + } + if (caps.caps_valid) { dm->backlight_caps[bl_idx].caps_valid = true; if (caps.aux_support) @@ -4179,7 +4228,7 @@ struct amdgpu_dm_backlight_caps caps; struct dc_link *link; u32 brightness; - bool rc; + bool rc, reallow_idle = false; amdgpu_dm_update_backlight_caps(dm, bl_idx); caps = dm->backlight_caps[bl_idx]; @@ -4192,6 +4241,12 @@ link = (struct dc_link *)dm->backlight_link[bl_idx]; /* Change brightness based on AUX property */ + mutex_lock(&dm->dc_lock); + if (dm->dc->caps.ips_support && dm->dc->ctx->dmub_srv->idle_allowed) { + dc_allow_idle_optimizations(dm->dc, false); + reallow_idle = true; + } + if (caps.aux_support) { rc = dc_link_set_backlight_level_nits(link, true, brightness, AUX_BL_DEFAULT_TRANSITION_TIME_MS); @@ -4203,6 +4258,11 @@ DRM_DEBUG("DM: Failed to update backlight on eDP[%d]\n", bl_idx); } + if (dm->dc->caps.ips_support && reallow_idle) + dc_allow_idle_optimizations(dm->dc, true); + + mutex_unlock(&dm->dc_lock); + if (rc) dm->actual_brightness[bl_idx] = user_brightness; } @@ -4411,7 +4471,10 @@ /* There is one primary plane per CRTC */ primary_planes = dm->dc->caps.max_streams; - ASSERT(primary_planes <= AMDGPU_MAX_PLANES); + if (primary_planes > AMDGPU_MAX_PLANES) { + DRM_ERROR("DM: Plane nums out of 6 planes\n"); + return -EINVAL; + } /* * Initialize primary planes, implicit planes for legacy IOCTLS. @@ -4506,17 +4569,17 @@ } } + if (link_cnt > MAX_LINKS) { + DRM_ERROR( + "KMS: Cannot support more than %d display indexes\n", + MAX_LINKS); + goto fail; + } + /* loops over all connectors on the board */ for (i = 0; i < link_cnt; i++) { struct dc_link *link = NULL; - if (i > AMDGPU_DM_MAX_DISPLAY_INDEX) { - DRM_ERROR( - "KMS: Cannot support more than %d display indexes\n", - AMDGPU_DM_MAX_DISPLAY_INDEX); - continue; - } - link = dc_get_link_at_index(dm->dc, i); if (link->connector_signal == SIGNAL_TYPE_VIRTUAL) { @@ -4571,6 +4634,7 @@ bool ret = false; mutex_lock(&dm->dc_lock); + dc_exit_ips_for_hw_access(dm->dc); ret = dc_link_detect(link, DETECT_REASON_BOOT); mutex_unlock(&dm->dc_lock); @@ -4778,6 +4842,9 @@ case IP_VERSION(3, 5, 0): fw_name_dmub = FIRMWARE_DCN_35_DMUB; break; + case IP_VERSION(3, 5, 1): + fw_name_dmub = FIRMWARE_DCN_351_DMUB; + break; default: /* ASIC doesn't support DMUB. */ return 0; @@ -4996,8 +5063,7 @@ const u64 tiling_flags, struct dc_plane_info *plane_info, struct dc_plane_address *address, - bool tmz_surface, - bool force_disable_dcc) + bool tmz_surface) { const struct drm_framebuffer *fb = plane_state->fb; const struct amdgpu_framebuffer *afb = @@ -5096,7 +5162,7 @@ &plane_info->tiling_info, &plane_info->plane_size, &plane_info->dcc, address, - tmz_surface, force_disable_dcc); + tmz_surface); if (ret) return ret; @@ -5117,7 +5183,6 @@ struct dc_scaling_info scaling_info; struct dc_plane_info plane_info; int ret; - bool force_disable_dcc = false; ret = amdgpu_dm_plane_fill_dc_scaling_info(adev, plane_state, &scaling_info); if (ret) @@ -5128,13 +5193,11 @@ dc_plane_state->clip_rect = scaling_info.clip_rect; dc_plane_state->scaling_quality = scaling_info.scaling_quality; - force_disable_dcc = adev->asic_type == CHIP_RAVEN && adev->in_suspend; ret = fill_dc_plane_info_and_addr(adev, plane_state, afb->tiling_flags, &plane_info, &dc_plane_state->address, - afb->tmz_surface, - force_disable_dcc); + afb->tmz_surface); if (ret) return ret; @@ -5201,6 +5264,10 @@ * @new_plane_state: New state of @plane * @crtc_state: New state of CRTC connected to the @plane * @flip_addrs: DC flip tracking struct, which also tracts dirty rects + * @is_psr_su: Flag indicating whether Panel Self Refresh Selective Update (PSR SU) is enabled. + * If PSR SU is enabled and damage clips are available, only the regions of the screen + * that have changed will be updated. If PSR SU is not enabled, + * or if damage clips are not available, the entire screen will be updated. * @dirty_regions_changed: dirty regions changed * * For PSR SU, DC informs the DMUB uController of dirty rectangle regions @@ -5871,6 +5938,9 @@ &aconnector->base.probed_modes : &aconnector->base.modes; + if (aconnector->base.connector_type == DRM_MODE_CONNECTOR_WRITEBACK) + return NULL; + if (aconnector->freesync_vid_base.clock != 0) return &aconnector->freesync_vid_base; @@ -6254,27 +6324,31 @@ if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A) mod_build_hf_vsif_infopacket(stream, &stream->vsp_infopacket); - else if (stream->signal == SIGNAL_TYPE_DISPLAY_PORT || - stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST || - stream->signal == SIGNAL_TYPE_EDP) { + + if (stream->signal == SIGNAL_TYPE_DISPLAY_PORT || + stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST || + stream->signal == SIGNAL_TYPE_EDP) { + const struct dc_edid_caps *edid_caps; + unsigned int disable_colorimetry = 0; + + if (aconnector->dc_sink) { + edid_caps = &aconnector->dc_sink->edid_caps; + disable_colorimetry = edid_caps->panel_patch.disable_colorimetry; + } + // // should decide stream support vsc sdp colorimetry capability // before building vsc info packet // - stream->use_vsc_sdp_for_colorimetry = false; - if (aconnector->dc_sink->sink_signal == SIGNAL_TYPE_DISPLAY_PORT_MST) { - stream->use_vsc_sdp_for_colorimetry = - aconnector->dc_sink->is_vsc_sdp_colorimetry_supported; - } else { - if (stream->link->dpcd_caps.dprx_feature.bits.VSC_SDP_COLORIMETRY_SUPPORTED) - stream->use_vsc_sdp_for_colorimetry = true; - } + stream->use_vsc_sdp_for_colorimetry = stream->link->dpcd_caps.dpcd_rev.raw >= 0x14 && + stream->link->dpcd_caps.dprx_feature.bits.VSC_SDP_COLORIMETRY_SUPPORTED && + !disable_colorimetry; + if (stream->out_transfer_func->tf == TRANSFER_FUNCTION_GAMMA22) tf = TRANSFER_FUNC_GAMMA_22; mod_build_vsc_infopacket(stream, &stream->vsc_infopacket, stream->output_color_space, tf); + aconnector->sr_skip_count = AMDGPU_DM_PSR_ENTRY_DELAY; - if (stream->link->psr_settings.psr_feature_enabled) - aconnector->psr_skip_count = AMDGPU_DM_PSR_ENTRY_DELAY; } finish: dc_sink_release(sink); @@ -6409,10 +6483,104 @@ return ret; } +/** + * DOC: panel power savings + * + * The display manager allows you to set your desired **panel power savings** + * level (between 0-4, with 0 representing off), e.g. using the following:: + * + * # echo 3 > /sys/class/drm/card0-eDP-1/amdgpu/panel_power_savings + * + * Modifying this value can have implications on color accuracy, so tread + * carefully. + */ + +static ssize_t panel_power_savings_show(struct device *device, + struct device_attribute *attr, + char *buf) +{ + struct drm_connector *connector = dev_get_drvdata(device); + struct drm_device *dev = connector->dev; + u8 val; + + drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); + val = to_dm_connector_state(connector->state)->abm_level == + ABM_LEVEL_IMMEDIATE_DISABLE ? 0 : + to_dm_connector_state(connector->state)->abm_level; + drm_modeset_unlock(&dev->mode_config.connection_mutex); + + return sysfs_emit(buf, "%u\n", val); +} + +static ssize_t panel_power_savings_store(struct device *device, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct drm_connector *connector = dev_get_drvdata(device); + struct drm_device *dev = connector->dev; + long val; + int ret; + + ret = kstrtol(buf, 0, &val); + + if (ret) + return ret; + + if (val < 0 || val > 4) + return -EINVAL; + + drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); + to_dm_connector_state(connector->state)->abm_level = val ?: + ABM_LEVEL_IMMEDIATE_DISABLE; + drm_modeset_unlock(&dev->mode_config.connection_mutex); + + drm_kms_helper_hotplug_event(dev); + + return count; +} + +static DEVICE_ATTR_RW(panel_power_savings); + +static struct attribute *amdgpu_attrs[] = { + &dev_attr_panel_power_savings.attr, + NULL +}; + +static const struct attribute_group amdgpu_group = { + .name = "amdgpu", + .attrs = amdgpu_attrs +}; + +static bool +amdgpu_dm_should_create_sysfs(struct amdgpu_dm_connector *amdgpu_dm_connector) +{ + if (amdgpu_dm_abm_level >= 0) + return false; + + if (amdgpu_dm_connector->base.connector_type != DRM_MODE_CONNECTOR_eDP) + return false; + + /* check for OLED panels */ + if (amdgpu_dm_connector->bl_idx >= 0) { + struct drm_device *drm = amdgpu_dm_connector->base.dev; + struct amdgpu_display_manager *dm = &drm_to_adev(drm)->dm; + struct amdgpu_dm_backlight_caps *caps; + + caps = &dm->backlight_caps[amdgpu_dm_connector->bl_idx]; + if (caps->aux_support) + return false; + } + + return true; +} + static void amdgpu_dm_connector_unregister(struct drm_connector *connector) { struct amdgpu_dm_connector *amdgpu_dm_connector = to_amdgpu_dm_connector(connector); + if (amdgpu_dm_should_create_sysfs(amdgpu_dm_connector)) + sysfs_remove_group(&connector->kdev->kobj, &amdgpu_group); + drm_dp_aux_unregister(&amdgpu_dm_connector->dm_dp_aux.aux); } @@ -6474,9 +6642,12 @@ state->vcpi_slots = 0; state->pbn = 0; - if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) - state->abm_level = amdgpu_dm_abm_level ?: - ABM_LEVEL_IMMEDIATE_DISABLE; + if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { + if (amdgpu_dm_abm_level <= 0) + state->abm_level = ABM_LEVEL_IMMEDIATE_DISABLE; + else + state->abm_level = amdgpu_dm_abm_level; + } __drm_atomic_helper_connector_reset(connector, &state->base); } @@ -6514,6 +6685,13 @@ to_amdgpu_dm_connector(connector); int r; + if (amdgpu_dm_should_create_sysfs(amdgpu_dm_connector)) { + r = sysfs_create_group(&connector->kdev->kobj, + &amdgpu_group); + if (r) + return r; + } + amdgpu_dm_register_backlight_device(amdgpu_dm_connector); if ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) || @@ -6631,7 +6809,8 @@ aconnector->dc_sink = aconnector->dc_link->local_sink ? aconnector->dc_link->local_sink : aconnector->dc_em_sink; - dc_sink_retain(aconnector->dc_sink); + if (aconnector->dc_sink) + dc_sink_retain(aconnector->dc_sink); } } @@ -6726,6 +6905,14 @@ const struct drm_connector_state *drm_state = dm_state ? &dm_state->base : NULL; int requested_bpc = drm_state ? drm_state->max_requested_bpc : 8; enum dc_status dc_result = DC_OK; + uint8_t bpc_limit = 6; + + if (!dm_state) + return NULL; + + if (aconnector->dc_link->connector_signal == SIGNAL_TYPE_HDMI_TYPE_A || + aconnector->dc_link->dpcd_caps.dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER) + bpc_limit = 8; do { stream = create_stream_for_sink(connector, drm_mode, @@ -6747,11 +6934,12 @@ dc_result = dm_validate_stream_and_context(adev->dm.dc, stream); if (dc_result != DC_OK) { - DRM_DEBUG_KMS("Mode %dx%d (clk %d) failed DC validation with error %d (%s)\n", + DRM_DEBUG_KMS("Mode %dx%d (clk %d) pixel_encoding:%s color_depth:%s failed validation -- %s\n", drm_mode->hdisplay, drm_mode->vdisplay, drm_mode->clock, - dc_result, + dc_pixel_encoding_to_str(stream->timing.pixel_encoding), + dc_color_depth_to_str(stream->timing.display_color_depth), dc_status_to_str(dc_result)); dc_stream_release(stream); @@ -6759,10 +6947,13 @@ requested_bpc -= 2; /* lower bpc to retry validation */ } - } while (stream == NULL && requested_bpc >= 6); + } while (stream == NULL && requested_bpc >= bpc_limit); - if (dc_result == DC_FAIL_ENC_VALIDATE && !aconnector->force_yuv420_output) { - DRM_DEBUG_KMS("Retry forcing YCbCr420 encoding\n"); + if ((dc_result == DC_FAIL_ENC_VALIDATE || + dc_result == DC_EXCEED_DONGLE_CAP) && + !aconnector->force_yuv420_output) { + DRM_DEBUG_KMS("%s:%d Retry forcing yuv420 encoding\n", + __func__, __LINE__); aconnector->force_yuv420_output = true; stream = create_validate_stream_for_sink(aconnector, drm_mode, @@ -7054,7 +7245,7 @@ struct amdgpu_dm_connector *aconnector; struct dm_connector_state *dm_conn_state; int i, j, ret; - int vcpi, pbn_div, pbn, slot_num = 0; + int vcpi, pbn_div, pbn = 0, slot_num = 0; for_each_new_connector_in_state(state, connector, new_con_state, i) { @@ -7094,7 +7285,7 @@ } } - if (j == dc_state->stream_count) + if (j == dc_state->stream_count || pbn_div == 0) continue; slot_num = DIV_ROUND_UP(pbn, pbn_div); @@ -7458,7 +7649,8 @@ drm_add_modes_noedid(connector, 1920, 1080); } else { amdgpu_dm_connector_ddc_get_modes(connector, edid); - amdgpu_dm_connector_add_common_modes(encoder, connector); + if (encoder) + amdgpu_dm_connector_add_common_modes(encoder, connector); amdgpu_dm_connector_add_freesync_modes(connector, edid); } amdgpu_dm_fbc_init(connector); @@ -7548,7 +7740,8 @@ aconnector->base.state->max_requested_bpc = aconnector->base.state->max_bpc; if (connector_type == DRM_MODE_CONNECTOR_eDP && - (dc_is_dmcu_initialized(adev->dm.dc) || adev->dm.dc->ctx->dmub_srv)) { + (dc_is_dmcu_initialized(adev->dm.dc) || + adev->dm.dc->ctx->dmub_srv) && amdgpu_dm_abm_level < 0) { drm_object_attach_property(&aconnector->base.base, adev->mode_info.abm_level_property, 0); } @@ -8302,7 +8495,7 @@ afb->tiling_flags, &bundle->plane_infos[planes_count], &bundle->flip_addrs[planes_count].address, - afb->tmz_surface, false); + afb->tmz_surface); drm_dbg_state(state->dev, "plane: id=%d dcc_en=%d\n", new_plane_state->plane->index, @@ -8327,7 +8520,7 @@ * during the PSR-SU was disabled. */ if (acrtc_state->stream->link->psr_settings.psr_version >= DC_PSR_VERSION_SU_1 && - acrtc_attach->dm_irq_params.allow_psr_entry && + acrtc_attach->dm_irq_params.allow_sr_entry && #ifdef CONFIG_DRM_AMD_SECURE_DISPLAY !amdgpu_dm_crc_window_is_activated(acrtc_state->base.crtc) && #endif @@ -8454,15 +8647,13 @@ bundle->stream_update.vrr_infopacket = &acrtc_state->stream->vrr_infopacket; } - } else if (cursor_update && acrtc_state->active_planes > 0 && - acrtc_attach->base.state->event) { - drm_crtc_vblank_get(pcrtc); - + } else if (cursor_update && acrtc_state->active_planes > 0) { spin_lock_irqsave(&pcrtc->dev->event_lock, flags); - - acrtc_attach->event = acrtc_attach->base.state->event; - acrtc_attach->base.state->event = NULL; - + if (acrtc_attach->base.state->event) { + drm_crtc_vblank_get(pcrtc); + acrtc_attach->event = acrtc_attach->base.state->event; + acrtc_attach->base.state->event = NULL; + } spin_unlock_irqrestore(&pcrtc->dev->event_lock, flags); } @@ -8551,27 +8742,27 @@ !acrtc_state->stream->link->psr_settings.psr_feature_enabled) amdgpu_dm_link_setup_psr(acrtc_state->stream); - /* Decrement skip count when PSR is enabled and we're doing fast updates. */ + /* Decrement skip count when SR is enabled and we're doing fast updates. */ if (acrtc_state->update_type == UPDATE_TYPE_FAST && acrtc_state->stream->link->psr_settings.psr_feature_enabled) { struct amdgpu_dm_connector *aconn = (struct amdgpu_dm_connector *)acrtc_state->stream->dm_stream_context; - if (aconn->psr_skip_count > 0) - aconn->psr_skip_count--; + if (aconn->sr_skip_count > 0) + aconn->sr_skip_count--; - /* Allow PSR when skip count is 0. */ - acrtc_attach->dm_irq_params.allow_psr_entry = !aconn->psr_skip_count; + /* Allow SR when skip count is 0. */ + acrtc_attach->dm_irq_params.allow_sr_entry = !aconn->sr_skip_count; /* - * If sink supports PSR SU, there is no need to rely on - * a vblank event disable request to enable PSR. PSR SU + * If sink supports PSR SU/Panel Replay, there is no need to rely on + * a vblank event disable request to enable PSR/RP. PSR SU/RP * can be enabled immediately once OS demonstrates an * adequate number of fast atomic commits to notify KMD * of update events. See `vblank_control_worker()`. */ - if (acrtc_state->stream->link->psr_settings.psr_version >= DC_PSR_VERSION_SU_1 && - acrtc_attach->dm_irq_params.allow_psr_entry && + if (acrtc_state->stream->link->psr_settings.psr_version == DC_PSR_VERSION_SU_1 && + acrtc_attach->dm_irq_params.allow_sr_entry && #ifdef CONFIG_DRM_AMD_SECURE_DISPLAY !amdgpu_dm_crc_window_is_activated(acrtc_state->base.crtc) && #endif @@ -8581,7 +8772,7 @@ 500000000) amdgpu_dm_psr_enable(acrtc_state->stream); } else { - acrtc_attach->dm_irq_params.allow_psr_entry = false; + acrtc_attach->dm_irq_params.allow_sr_entry = false; } mutex_unlock(&dm->dc_lock); @@ -8630,10 +8821,10 @@ if (!drm_atomic_crtc_needs_modeset(new_crtc_state)) continue; +notify: if (connector->connector_type == DRM_MODE_CONNECTOR_WRITEBACK) continue; -notify: aconnector = to_amdgpu_dm_connector(connector); mutex_lock(&adev->dm.audio_lock); @@ -8713,6 +8904,7 @@ struct drm_connector *connector; bool mode_set_reset_required = false; u32 i; + bool set_backlight_level = false; /* Disable writeback */ for_each_old_connector_in_state(state, connector, old_con_state, i) { @@ -8732,7 +8924,7 @@ if (acrtc) old_crtc_state = drm_atomic_get_old_crtc_state(state, &acrtc->base); - if (!acrtc->wb_enabled) + if (!acrtc || !acrtc->wb_enabled) continue; dm_old_crtc_state = to_dm_crtc_state(old_crtc_state); @@ -8780,7 +8972,8 @@ memset(&position, 0, sizeof(position)); mutex_lock(&dm->dc_lock); - dc_stream_set_cursor_position(dm_old_crtc_state->stream, &position); + dc_exit_ips_for_hw_access(dm->dc); + dc_stream_program_cursor_position(dm_old_crtc_state->stream, &position); mutex_unlock(&dm->dc_lock); } @@ -8828,6 +9021,7 @@ acrtc->hw_mode = new_crtc_state->mode; crtc->hwmode = new_crtc_state->mode; mode_set_reset_required = true; + set_backlight_level = true; } else if (modereset_required(new_crtc_state)) { DRM_DEBUG_ATOMIC("Atomic commit: RESET. crtc id %d:[%p]\n", acrtc->crtc_id, acrtc); /* i.e. reset mode */ @@ -8848,6 +9042,7 @@ dm_enable_per_frame_crtc_master_sync(dc_state); mutex_lock(&dm->dc_lock); + dc_exit_ips_for_hw_access(dm->dc); WARN_ON(!dc_commit_streams(dm->dc, dc_state->streams, dc_state->stream_count)); /* Allow idle optimization when vblank count is 0 for display off */ @@ -8875,6 +9070,19 @@ acrtc->otg_inst = status->primary_otg_inst; } } + + /* During boot up and resume the DC layer will reset the panel brightness + * to fix a flicker issue. + * It will cause the dm->actual_brightness is not the current panel brightness + * level. (the dm->brightness is the correct panel level) + * So we set the backlight level with dm->brightness value after set mode + */ + if (set_backlight_level) { + for (i = 0; i < dm->num_of_edps; i++) { + if (dm->backlight_dev[i]) + amdgpu_dm_backlight_set_level(dm, i, dm->brightness[i]); + } + } } static void dm_set_writeback(struct amdgpu_display_manager *dm, @@ -9003,9 +9211,6 @@ trace_amdgpu_dm_atomic_commit_tail_begin(state); - if (dm->dc->caps.ips_support && dm->dc->idle_optimizations_allowed) - dc_allow_idle_optimizations(dm->dc, false); - drm_atomic_helper_update_legacy_modeset_state(dev, state); drm_dp_mst_atomic_wait_for_dependencies(state); @@ -9131,9 +9336,10 @@ DRM_INFO("[HDCP_DM] hdcp_update_display enable_encryption = %x\n", enable_encryption); - hdcp_update_display( - adev->dm.hdcp_workqueue, aconnector->dc_link->link_index, aconnector, - new_con_state->hdcp_content_type, enable_encryption); + if (aconnector->dc_link) + hdcp_update_display( + adev->dm.hdcp_workqueue, aconnector->dc_link->link_index, aconnector, + new_con_state->hdcp_content_type, enable_encryption); } } @@ -9216,6 +9422,7 @@ mutex_lock(&dm->dc_lock); + dc_exit_ips_for_hw_access(dm->dc); dc_update_planes_and_stream(dm->dc, dummy_updates, status->plane_count, @@ -10280,8 +10487,8 @@ int plane_src_w, plane_src_h; dm_get_oriented_plane_size(plane_state, &plane_src_w, &plane_src_h); - *out_plane_scale_w = plane_state->crtc_w * 1000 / plane_src_w; - *out_plane_scale_h = plane_state->crtc_h * 1000 / plane_src_h; + *out_plane_scale_w = plane_src_w ? plane_state->crtc_w * 1000 / plane_src_w : 0; + *out_plane_scale_h = plane_src_h ? plane_state->crtc_h * 1000 / plane_src_h : 0; } static int dm_check_crtc_cursor(struct drm_atomic_state *state, @@ -10407,6 +10614,25 @@ return drm_dp_mst_add_affected_dsc_crtcs(state, &aconnector->mst_root->mst_mgr); } +static bool amdgpu_dm_crtc_mem_type_changed(struct drm_device *dev, + struct drm_atomic_state *state, + struct drm_crtc_state *crtc_state) +{ + struct drm_plane *plane; + struct drm_plane_state *new_plane_state, *old_plane_state; + + drm_for_each_plane_mask(plane, dev, crtc_state->plane_mask) { + new_plane_state = drm_atomic_get_plane_state(state, plane); + old_plane_state = drm_atomic_get_plane_state(state, plane); + + if (old_plane_state->fb && new_plane_state->fb && + get_mem_type(old_plane_state->fb) != get_mem_type(new_plane_state->fb)) + return true; + } + + return false; +} + /** * amdgpu_dm_atomic_check() - Atomic check implementation for AMDgpu DM. * @@ -10451,7 +10677,7 @@ struct dm_crtc_state *dm_old_crtc_state, *dm_new_crtc_state; struct drm_dp_mst_topology_mgr *mgr; struct drm_dp_mst_topology_state *mst_state; - struct dsc_mst_fairness_vars vars[MAX_PIPES]; + struct dsc_mst_fairness_vars vars[MAX_PIPES] = {0}; trace_amdgpu_dm_atomic_check_begin(state); @@ -10578,10 +10804,6 @@ /* Remove exiting planes if they are modified */ for_each_oldnew_plane_in_state_reverse(state, plane, old_plane_state, new_plane_state, i) { - if (old_plane_state->fb && new_plane_state->fb && - get_mem_type(old_plane_state->fb) != - get_mem_type(new_plane_state->fb)) - lock_and_validation_needed = true; ret = dm_update_plane_state(dc, state, plane, old_plane_state, @@ -10834,9 +11056,11 @@ /* * Only allow async flips for fast updates that don't change - * the FB pitch, the DCC state, rotation, etc. + * the FB pitch, the DCC state, rotation, mem_type, etc. */ - if (new_crtc_state->async_flip && lock_and_validation_needed) { + if (new_crtc_state->async_flip && + (lock_and_validation_needed || + amdgpu_dm_crtc_mem_type_changed(dev, state, new_crtc_state))) { drm_dbg_atomic(crtc->dev, "[CRTC:%d:%s] async flips are only supported for fast updates\n", crtc->base.id, crtc->name); @@ -10868,25 +11092,6 @@ return ret; } -static bool is_dp_capable_without_timing_msa(struct dc *dc, - struct amdgpu_dm_connector *amdgpu_dm_connector) -{ - u8 dpcd_data; - bool capable = false; - - if (amdgpu_dm_connector->dc_link && - dm_helpers_dp_read_dpcd( - NULL, - amdgpu_dm_connector->dc_link, - DP_DOWN_STREAM_PORT_COUNT, - &dpcd_data, - sizeof(dpcd_data))) { - capable = (dpcd_data & DP_MSA_TIMING_PAR_IGNORED) ? true:false; - } - - return capable; -} - static bool dm_edid_parser_send_cea(struct amdgpu_display_manager *dm, unsigned int offset, unsigned int total_length, @@ -11017,6 +11222,49 @@ return ret; } +static void parse_edid_displayid_vrr(struct drm_connector *connector, + struct edid *edid) +{ + u8 *edid_ext = NULL; + int i; + int j = 0; + u16 min_vfreq; + u16 max_vfreq; + + if (edid == NULL || edid->extensions == 0) + return; + + /* Find DisplayID extension */ + for (i = 0; i < edid->extensions; i++) { + edid_ext = (void *)(edid + (i + 1)); + if (edid_ext[0] == DISPLAYID_EXT) + break; + } + + if (edid_ext == NULL) + return; + + while (j < EDID_LENGTH) { + /* Get dynamic video timing range from DisplayID if available */ + if (EDID_LENGTH - j > 13 && edid_ext[j] == 0x25 && + (edid_ext[j+1] & 0xFE) == 0 && (edid_ext[j+2] == 9)) { + min_vfreq = edid_ext[j+9]; + if (edid_ext[j+1] & 7) + max_vfreq = edid_ext[j+10] + ((edid_ext[j+11] & 3) << 8); + else + max_vfreq = edid_ext[j+10]; + + if (max_vfreq && min_vfreq) { + connector->display_info.monitor_range.max_vfreq = max_vfreq; + connector->display_info.monitor_range.min_vfreq = min_vfreq; + + return; + } + } + j++; + } +} + static int parse_amd_vsdb(struct amdgpu_dm_connector *aconnector, struct edid *edid, struct amdgpu_hdmi_vsdb_info *vsdb_info) { @@ -11034,7 +11282,7 @@ break; } - while (j < EDID_LENGTH) { + while (j < EDID_LENGTH - sizeof(struct amd_vsdb_block)) { struct amd_vsdb_block *amd_vsdb = (struct amd_vsdb_block *)&edid_ext[j]; unsigned int ieeeId = (amd_vsdb->ieee_id[2] << 16) | (amd_vsdb->ieee_id[1] << 8) | (amd_vsdb->ieee_id[0]); @@ -11138,18 +11386,31 @@ if (!adev->dm.freesync_module) goto update; - if (sink->sink_signal == SIGNAL_TYPE_DISPLAY_PORT - || sink->sink_signal == SIGNAL_TYPE_EDP) { + /* Some eDP panels only have the refresh rate range info in DisplayID */ + if ((connector->display_info.monitor_range.min_vfreq == 0 || + connector->display_info.monitor_range.max_vfreq == 0)) + parse_edid_displayid_vrr(connector, edid); + + if (edid && (sink->sink_signal == SIGNAL_TYPE_DISPLAY_PORT || + sink->sink_signal == SIGNAL_TYPE_EDP)) { bool edid_check_required = false; - if (edid) { - edid_check_required = is_dp_capable_without_timing_msa( - adev->dm.dc, - amdgpu_dm_connector); + if (amdgpu_dm_connector->dc_link && + amdgpu_dm_connector->dc_link->dpcd_caps.allow_invalid_MSA_timing_param) { + if (edid->features & DRM_EDID_FEATURE_CONTINUOUS_FREQ) { + amdgpu_dm_connector->min_vfreq = connector->display_info.monitor_range.min_vfreq; + amdgpu_dm_connector->max_vfreq = connector->display_info.monitor_range.max_vfreq; + if (amdgpu_dm_connector->max_vfreq - + amdgpu_dm_connector->min_vfreq > 10) + freesync_capable = true; + } else { + edid_check_required = edid->version > 1 || + (edid->version == 1 && + edid->revision > 1); + } } - if (edid_check_required == true && (edid->version > 1 || - (edid->version == 1 && edid->revision > 1))) { + if (edid_check_required) { for (i = 0; i < 4; i++) { timing = &edid->detailed_timings[i]; @@ -11243,6 +11504,12 @@ if (dm_con_state) dm_con_state->freesync_capable = freesync_capable; + if (connector->state && amdgpu_dm_connector->dc_link && !freesync_capable && + amdgpu_dm_connector->dc_link->replay_settings.config.replay_supported) { + amdgpu_dm_connector->dc_link->replay_settings.config.replay_supported = false; + amdgpu_dm_connector->dc_link->replay_settings.replay_feature_enabled = false; + } + if (connector->vrr_capable_property) drm_connector_set_vrr_capable_property(connector, freesync_capable); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h @@ -50,7 +50,7 @@ #define AMDGPU_DM_MAX_NUM_EDP 2 -#define AMDGPU_DMUB_NOTIFICATION_MAX 5 +#define AMDGPU_DMUB_NOTIFICATION_MAX 6 #define HDMI_AMD_VENDOR_SPECIFIC_DATA_BLOCK_IEEE_REGISTRATION_ID 0x00001A #define AMD_VSDB_VERSION_3_FEATURECAP_REPLAYMODE 0x40 @@ -692,7 +692,7 @@ /* Cached display modes */ struct drm_display_mode freesync_vid_base; - int psr_skip_count; + int sr_skip_count; /* Record progress status of mst*/ uint8_t mst_status; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c @@ -108,9 +108,10 @@ else if (dm->active_vblank_irq_count) dm->active_vblank_irq_count--; - dc_allow_idle_optimizations(dm->dc, dm->active_vblank_irq_count == 0); - - DRM_DEBUG_KMS("Allow idle optimizations (MALL): %d\n", dm->active_vblank_irq_count == 0); + if (dm->active_vblank_irq_count > 0) { + DRM_DEBUG_KMS("Allow idle optimizations (MALL): false\n"); + dc_allow_idle_optimizations(dm->dc, false); + } /* * Control PSR based on vblank requirements from OS @@ -132,11 +133,16 @@ #ifdef CONFIG_DRM_AMD_SECURE_DISPLAY !amdgpu_dm_crc_window_is_activated(&vblank_work->acrtc->base) && #endif - vblank_work->acrtc->dm_irq_params.allow_psr_entry) { + vblank_work->acrtc->dm_irq_params.allow_sr_entry) { amdgpu_dm_psr_enable(vblank_work->stream); } } + if (dm->active_vblank_irq_count == 0) { + DRM_DEBUG_KMS("Allow idle optimizations (MALL): true\n"); + dc_allow_idle_optimizations(dm->dc, true); + } + mutex_unlock(&dm->dc_lock); dc_stream_release(vblank_work->stream); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c @@ -1249,7 +1249,7 @@ size_t size, loff_t *pos) { int r; - uint8_t data[36]; + uint8_t data[36] = {0}; struct amdgpu_dm_connector *connector = file_inode(f)->i_private; struct dm_crtc_state *acrtc_state; uint32_t write_size = 36; @@ -1483,7 +1483,7 @@ const uint32_t rd_buf_size = 10; struct pipe_ctx *pipe_ctx; ssize_t result = 0; - int i, r, str_len = 30; + int i, r, str_len = 10; rd_buf = kcalloc(rd_buf_size, sizeof(char), GFP_KERNEL); @@ -1495,7 +1495,9 @@ for (i = 0; i < MAX_PIPES; i++) { pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i]; if (pipe_ctx->stream && - pipe_ctx->stream->link == aconnector->dc_link) + pipe_ctx->stream->link == aconnector->dc_link && + pipe_ctx->stream->sink && + pipe_ctx->stream->sink == aconnector->dc_sink) break; } @@ -1596,7 +1598,9 @@ for (i = 0; i < MAX_PIPES; i++) { pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i]; if (pipe_ctx->stream && - pipe_ctx->stream->link == aconnector->dc_link) + pipe_ctx->stream->link == aconnector->dc_link && + pipe_ctx->stream->sink && + pipe_ctx->stream->sink == aconnector->dc_sink) break; } @@ -1681,7 +1685,9 @@ for (i = 0; i < MAX_PIPES; i++) { pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i]; if (pipe_ctx->stream && - pipe_ctx->stream->link == aconnector->dc_link) + pipe_ctx->stream->link == aconnector->dc_link && + pipe_ctx->stream->sink && + pipe_ctx->stream->sink == aconnector->dc_sink) break; } @@ -1780,7 +1786,9 @@ for (i = 0; i < MAX_PIPES; i++) { pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i]; if (pipe_ctx->stream && - pipe_ctx->stream->link == aconnector->dc_link) + pipe_ctx->stream->link == aconnector->dc_link && + pipe_ctx->stream->sink && + pipe_ctx->stream->sink == aconnector->dc_sink) break; } @@ -1865,7 +1873,9 @@ for (i = 0; i < MAX_PIPES; i++) { pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i]; if (pipe_ctx->stream && - pipe_ctx->stream->link == aconnector->dc_link) + pipe_ctx->stream->link == aconnector->dc_link && + pipe_ctx->stream->sink && + pipe_ctx->stream->sink == aconnector->dc_sink) break; } @@ -1964,7 +1974,9 @@ for (i = 0; i < MAX_PIPES; i++) { pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i]; if (pipe_ctx->stream && - pipe_ctx->stream->link == aconnector->dc_link) + pipe_ctx->stream->link == aconnector->dc_link && + pipe_ctx->stream->sink && + pipe_ctx->stream->sink == aconnector->dc_sink) break; } @@ -2045,7 +2057,9 @@ for (i = 0; i < MAX_PIPES; i++) { pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i]; if (pipe_ctx->stream && - pipe_ctx->stream->link == aconnector->dc_link) + pipe_ctx->stream->link == aconnector->dc_link && + pipe_ctx->stream->sink && + pipe_ctx->stream->sink == aconnector->dc_sink) break; } @@ -2141,7 +2155,9 @@ for (i = 0; i < MAX_PIPES; i++) { pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i]; if (pipe_ctx->stream && - pipe_ctx->stream->link == aconnector->dc_link) + pipe_ctx->stream->link == aconnector->dc_link && + pipe_ctx->stream->sink && + pipe_ctx->stream->sink == aconnector->dc_sink) break; } @@ -2220,7 +2236,9 @@ for (i = 0; i < MAX_PIPES; i++) { pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i]; if (pipe_ctx->stream && - pipe_ctx->stream->link == aconnector->dc_link) + pipe_ctx->stream->link == aconnector->dc_link && + pipe_ctx->stream->sink && + pipe_ctx->stream->sink == aconnector->dc_sink) break; } @@ -2276,7 +2294,9 @@ for (i = 0; i < MAX_PIPES; i++) { pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i]; if (pipe_ctx->stream && - pipe_ctx->stream->link == aconnector->dc_link) + pipe_ctx->stream->link == aconnector->dc_link && + pipe_ctx->stream->sink && + pipe_ctx->stream->sink == aconnector->dc_sink) break; } @@ -2347,7 +2367,9 @@ for (i = 0; i < MAX_PIPES; i++) { pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i]; if (pipe_ctx->stream && - pipe_ctx->stream->link == aconnector->dc_link) + pipe_ctx->stream->link == aconnector->dc_link && + pipe_ctx->stream->sink && + pipe_ctx->stream->sink == aconnector->dc_sink) break; } @@ -2418,7 +2440,9 @@ for (i = 0; i < MAX_PIPES; i++) { pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i]; if (pipe_ctx->stream && - pipe_ctx->stream->link == aconnector->dc_link) + pipe_ctx->stream->link == aconnector->dc_link && + pipe_ctx->stream->sink && + pipe_ctx->stream->sink == aconnector->dc_sink) break; } @@ -2936,7 +2960,7 @@ { struct amdgpu_dm_connector *connector = data; struct dc_link *link = connector->dc_link; - u32 residency; + u32 residency = 0; link->dc->link_srv->edp_get_psr_residency(link, &residency); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c @@ -72,6 +72,10 @@ DRM_DEBUG_DRIVER("Clearing DPCD 0x317 on monitor with panel id %X\n", panel_id); edid_caps->panel_patch.remove_sink_ext_caps = true; break; + case drm_edid_encode_panel_id('S', 'D', 'C', 0x4154): + DRM_DEBUG_DRIVER("Disabling VSC on monitor with panel id %X\n", panel_id); + edid_caps->panel_patch.disable_colorimetry = true; + break; default: return; } @@ -363,7 +367,7 @@ mst_state = to_drm_dp_mst_topology_state(mst_mgr->base.state); new_payload = drm_atomic_get_mst_payload_state(mst_state, aconnector->mst_output_port); - ret = drm_dp_add_payload_part2(mst_mgr, mst_state->base.state, new_payload); + ret = drm_dp_add_payload_part2(mst_mgr, new_payload); if (ret) { amdgpu_dm_set_mst_status(&aconnector->mst_status, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq_params.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq_params.h @@ -33,7 +33,7 @@ struct mod_vrr_params vrr_params; struct dc_stream_state *stream; int active_planes; - bool allow_psr_entry; + bool allow_sr_entry; struct mod_freesync_config freesync_config; #ifdef CONFIG_DEBUG_FS --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c @@ -182,6 +182,8 @@ dc_sink_release(dc_sink); aconnector->dc_sink = NULL; aconnector->edid = NULL; + aconnector->dsc_aux = NULL; + port->passthrough_aux = NULL; } aconnector->mst_status = MST_STATUS_DEFAULT; @@ -249,7 +251,7 @@ aconnector->dsc_aux = &aconnector->mst_root->dm_dp_aux.aux; /* synaptics cascaded MST hub case */ - if (!aconnector->dsc_aux && is_synaptics_cascaded_panamera(aconnector->dc_link, port)) + if (is_synaptics_cascaded_panamera(aconnector->dc_link, port)) aconnector->dsc_aux = port->mgr->aux; if (!aconnector->dsc_aux) @@ -494,6 +496,8 @@ dc_sink_release(aconnector->dc_sink); aconnector->dc_sink = NULL; aconnector->edid = NULL; + aconnector->dsc_aux = NULL; + port->passthrough_aux = NULL; amdgpu_dm_set_mst_status(&aconnector->mst_status, MST_REMOTE_EDID | MST_ALLOCATE_NEW_PAYLOAD | MST_CLEAR_ALLOCATED_PAYLOAD, @@ -613,6 +617,9 @@ &connector->base, dev->mode_config.tile_property, 0); + connector->colorspace_property = master->base.colorspace_property; + if (connector->colorspace_property) + drm_connector_attach_colorspace_property(connector); drm_connector_set_path_property(connector, pathprop); @@ -1012,6 +1019,7 @@ int remaining_to_try = 0; int ret; uint16_t fec_overhead_multiplier_x1000 = get_fec_overhead_multiplier(dc_link); + int var_pbn; for (i = 0; i < count; i++) { if (vars[i + k].dsc_enabled @@ -1041,26 +1049,34 @@ if (next_index == -1) break; + var_pbn = vars[next_index].pbn; vars[next_index].pbn = kbps_to_peak_pbn(params[next_index].bw_range.stream_kbps, fec_overhead_multiplier_x1000); ret = drm_dp_atomic_find_time_slots(state, params[next_index].port->mgr, params[next_index].port, vars[next_index].pbn); - if (ret < 0) + if (ret < 0) { + DRM_DEBUG_DRIVER("%s:%d MST_DSC index #%d, failed to set pbn to the state, %d\n", + __func__, __LINE__, next_index, ret); + vars[next_index].pbn = var_pbn; return ret; + } ret = drm_dp_mst_atomic_check(state); if (ret == 0) { vars[next_index].dsc_enabled = false; vars[next_index].bpp_x16 = 0; } else { - vars[next_index].pbn = kbps_to_peak_pbn(params[next_index].bw_range.max_kbps, fec_overhead_multiplier_x1000); + vars[next_index].pbn = var_pbn; ret = drm_dp_atomic_find_time_slots(state, params[next_index].port->mgr, params[next_index].port, vars[next_index].pbn); - if (ret < 0) + if (ret < 0) { + DRM_DEBUG_DRIVER("%s:%d MST_DSC index #%d, failed to set pbn to the state, %d\n", + __func__, __LINE__, next_index, ret); return ret; + } } tried[next_index] = true; @@ -1084,6 +1100,7 @@ int i, k, ret; bool debugfs_overwrite = false; uint16_t fec_overhead_multiplier_x1000 = get_fec_overhead_multiplier(dc_link); + struct drm_connector_state *new_conn_state; memset(params, 0, sizeof(params)); @@ -1106,6 +1123,14 @@ if (!aconnector->mst_output_port) continue; + new_conn_state = drm_atomic_get_new_connector_state(state, &aconnector->base); + + if (!new_conn_state) { + DRM_DEBUG_DRIVER("%s:%d MST_DSC Skip the stream 0x%p with invalid new_conn_state\n", + __func__, __LINE__, stream); + continue; + } + stream->timing.flags.DSC = 0; params[count].timing = &stream->timing; @@ -1119,7 +1144,7 @@ params[count].num_slices_v = aconnector->dsc_settings.dsc_num_slices_v; params[count].bpp_overwrite = aconnector->dsc_settings.dsc_bits_per_pixel; params[count].compression_possible = stream->sink->dsc_caps.dsc_dec_caps.is_dsc_supported; - dc_dsc_get_policy_for_timing(params[count].timing, 0, &dsc_policy); + dc_dsc_get_policy_for_timing(params[count].timing, 0, &dsc_policy, dc_link_get_highest_encoding_format(stream->link)); if (!dc_dsc_compute_bandwidth_range( stream->sink->ctx->dc->res_pool->dscs[0], stream->sink->ctx->dc->debug.dsc_min_slice_height_override, @@ -1135,6 +1160,8 @@ count++; } + DRM_DEBUG_DRIVER("%s: MST_DSC Params set up for %d streams\n", __func__, count); + if (count == 0) { ASSERT(0); return 0; @@ -1219,10 +1246,6 @@ if (dc_link->type != dc_connection_mst_branch) return false; - if (!(dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT || - dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_PASSTHROUGH_SUPPORT)) - return false; - for (i = 0; i < MAX_PIPES; i++) stream_on_link[i] = NULL; @@ -1243,6 +1266,18 @@ if (!aconnector) continue; + /* + * Check if cached virtual MST DSC caps are available and DSC is supported + * this change takes care of newer MST DSC capable devices that report their + * DPCD caps as per specifications in their Virtual DPCD registers. + + * TODO: implement the check for older MST DSC devices that do not conform to + * specifications. + */ + if (!(aconnector->dc_sink->dsc_caps.dsc_dec_caps.is_dsc_supported || + aconnector->dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_PASSTHROUGH_SUPPORT)) + continue; + stream_on_link[new_stream_on_link_num] = aconnector; new_stream_on_link_num++; @@ -1569,16 +1604,16 @@ return ret; } -static unsigned int kbps_from_pbn(unsigned int pbn) +static uint32_t kbps_from_pbn(unsigned int pbn) { - unsigned int kbps = pbn; + uint64_t kbps = (uint64_t)pbn; kbps *= (1000000 / PEAK_FACTOR_X1000); kbps *= 8; kbps *= 54; kbps /= 64; - return kbps; + return (uint32_t)kbps; } static bool is_dsc_common_config_possible(struct dc_stream_state *stream, @@ -1586,7 +1621,7 @@ { struct dc_dsc_policy dsc_policy = {0}; - dc_dsc_get_policy_for_timing(&stream->timing, 0, &dsc_policy); + dc_dsc_get_policy_for_timing(&stream->timing, 0, &dsc_policy, dc_link_get_highest_encoding_format(stream->link)); dc_dsc_compute_bandwidth_range(stream->sink->ctx->dc->res_pool->dscs[0], stream->sink->ctx->dc->debug.dsc_min_slice_height_override, dsc_policy.min_target_bpp * 16, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include "amdgpu.h" @@ -310,8 +311,7 @@ const struct plane_size *plane_size, union dc_tiling_info *tiling_info, struct dc_plane_dcc_param *dcc, - struct dc_plane_address *address, - const bool force_disable_dcc) + struct dc_plane_address *address) { const uint64_t modifier = afb->base.modifier; int ret = 0; @@ -319,7 +319,7 @@ amdgpu_dm_plane_fill_gfx9_tiling_info_from_modifier(adev, tiling_info, modifier); tiling_info->gfx9.swizzle = amdgpu_dm_plane_modifier_gfx9_swizzle_mode(modifier); - if (amdgpu_dm_plane_modifier_has_dcc(modifier) && !force_disable_dcc) { + if (amdgpu_dm_plane_modifier_has_dcc(modifier)) { uint64_t dcc_address = afb->address + afb->base.offsets[1]; bool independent_64b_blks = AMD_FMT_MOD_GET(DCC_INDEPENDENT_64B, modifier); bool independent_128b_blks = AMD_FMT_MOD_GET(DCC_INDEPENDENT_128B, modifier); @@ -765,8 +765,7 @@ struct plane_size *plane_size, struct dc_plane_dcc_param *dcc, struct dc_plane_address *address, - bool tmz_surface, - bool force_disable_dcc) + bool tmz_surface) { const struct drm_framebuffer *fb = &afb->base; int ret; @@ -826,8 +825,7 @@ ret = amdgpu_dm_plane_fill_gfx9_plane_attributes_from_modifiers(adev, afb, format, rotation, plane_size, tiling_info, dcc, - address, - force_disable_dcc); + address); if (ret) return ret; } else { @@ -854,10 +852,14 @@ } afb = to_amdgpu_framebuffer(new_state->fb); - obj = new_state->fb->obj[0]; + obj = drm_gem_fb_get_obj(new_state->fb, 0); + if (!obj) { + DRM_ERROR("Failed to get obj from framebuffer\n"); + return -EINVAL; + } + rbo = gem_to_amdgpu_bo(obj); adev = amdgpu_ttm_adev(rbo->tbo.bdev); - r = amdgpu_bo_reserve(rbo, true); if (r) { dev_err(adev->dev, "fail to reserve bo (%d)\n", r); @@ -913,14 +915,13 @@ dm_plane_state_old->dc_state != dm_plane_state_new->dc_state) { struct dc_plane_state *plane_state = dm_plane_state_new->dc_state; - bool force_disable_dcc = !plane_state->dcc.enable; amdgpu_dm_plane_fill_plane_buffer_attributes( adev, afb, plane_state->format, plane_state->rotation, afb->tiling_flags, &plane_state->tiling_info, &plane_state->plane_size, &plane_state->dcc, &plane_state->address, - afb->tmz_surface, force_disable_dcc); + afb->tmz_surface); } return 0; @@ -1254,7 +1255,7 @@ /* turn off cursor */ if (crtc_state && crtc_state->stream) { mutex_lock(&adev->dm.dc_lock); - dc_stream_set_cursor_position(crtc_state->stream, + dc_stream_program_cursor_position(crtc_state->stream, &position); mutex_unlock(&adev->dm.dc_lock); } @@ -1280,15 +1281,16 @@ adev->dm.dc->caps.color.dpp.gamma_corr) attributes.attribute_flags.bits.ENABLE_CURSOR_DEGAMMA = 1; - attributes.pitch = afb->base.pitches[0] / afb->base.format->cpp[0]; + if (afb) + attributes.pitch = afb->base.pitches[0] / afb->base.format->cpp[0]; if (crtc_state->stream) { mutex_lock(&adev->dm.dc_lock); - if (!dc_stream_set_cursor_attributes(crtc_state->stream, + if (!dc_stream_program_cursor_attributes(crtc_state->stream, &attributes)) DRM_ERROR("DC failed to set cursor attributes\n"); - if (!dc_stream_set_cursor_position(crtc_state->stream, + if (!dc_stream_program_cursor_position(crtc_state->stream, &position)) DRM_ERROR("DC failed to set cursor position\n"); mutex_unlock(&adev->dm.dc_lock); @@ -1395,8 +1397,6 @@ const struct drm_format_info *info = drm_format_info(format); int i; - enum dm_micro_swizzle microtile = amdgpu_dm_plane_modifier_gfx9_swizzle_mode(modifier) & 3; - if (!info) return false; @@ -1418,29 +1418,34 @@ if (i == plane->modifier_count) return false; - /* - * For D swizzle the canonical modifier depends on the bpp, so check - * it here. - */ - if (AMD_FMT_MOD_GET(TILE_VERSION, modifier) == AMD_FMT_MOD_TILE_VER_GFX9 && - adev->family >= AMDGPU_FAMILY_NV) { - if (microtile == MICRO_SWIZZLE_D && info->cpp[0] == 4) - return false; - } + /* GFX12 doesn't have these limitations. */ + if (AMD_FMT_MOD_GET(TILE_VERSION, modifier) <= AMD_FMT_MOD_TILE_VER_GFX11) { + enum dm_micro_swizzle microtile = amdgpu_dm_plane_modifier_gfx9_swizzle_mode(modifier) & 3; - if (adev->family >= AMDGPU_FAMILY_RV && microtile == MICRO_SWIZZLE_D && - info->cpp[0] < 8) - return false; - - if (amdgpu_dm_plane_modifier_has_dcc(modifier)) { - /* Per radeonsi comments 16/64 bpp are more complicated. */ - if (info->cpp[0] != 4) - return false; - /* We support multi-planar formats, but not when combined with - * additional DCC metadata planes. + /* + * For D swizzle the canonical modifier depends on the bpp, so check + * it here. */ - if (info->num_planes > 1) + if (AMD_FMT_MOD_GET(TILE_VERSION, modifier) == AMD_FMT_MOD_TILE_VER_GFX9 && + adev->family >= AMDGPU_FAMILY_NV) { + if (microtile == MICRO_SWIZZLE_D && info->cpp[0] == 4) + return false; + } + + if (adev->family >= AMDGPU_FAMILY_RV && microtile == MICRO_SWIZZLE_D && + info->cpp[0] < 8) return false; + + if (amdgpu_dm_plane_modifier_has_dcc(modifier)) { + /* Per radeonsi comments 16/64 bpp are more complicated. */ + if (info->cpp[0] != 4) + return false; + /* We support multi-planar formats, but not when combined with + * additional DCC metadata planes. + */ + if (info->num_planes > 1) + return false; + } } return true; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.h @@ -48,8 +48,7 @@ struct plane_size *plane_size, struct dc_plane_dcc_param *dcc, struct dc_plane_address *address, - bool tmz_surface, - bool force_disable_dcc); + bool tmz_surface); int amdgpu_dm_plane_init(struct amdgpu_display_manager *dm, struct drm_plane *plane, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c @@ -141,9 +141,8 @@ * amdgpu_dm_psr_enable() - enable psr f/w * @stream: stream state * - * Return: true if success */ -bool amdgpu_dm_psr_enable(struct dc_stream_state *stream) +void amdgpu_dm_psr_enable(struct dc_stream_state *stream) { struct dc_link *link = stream->link; unsigned int vsync_rate_hz = 0; @@ -190,7 +189,10 @@ if (link->psr_settings.psr_version < DC_PSR_VERSION_SU_1) power_opt |= psr_power_opt_z10_static_screen; - return dc_link_set_psr_allow_active(link, &psr_enable, false, false, &power_opt); + dc_link_set_psr_allow_active(link, &psr_enable, false, false, &power_opt); + + if (link->ctx->dc->caps.ips_support) + dc_allow_idle_optimizations(link->ctx->dc, true); } /* --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.h @@ -32,7 +32,7 @@ #define AMDGPU_DM_PSR_ENTRY_DELAY 5 void amdgpu_dm_set_psr_caps(struct dc_link *link); -bool amdgpu_dm_psr_enable(struct dc_stream_state *stream); +void amdgpu_dm_psr_enable(struct dc_stream_state *stream); bool amdgpu_dm_link_setup_psr(struct dc_stream_state *stream); bool amdgpu_dm_psr_disable(struct dc_stream_state *stream); bool amdgpu_dm_psr_disable_all(struct amdgpu_display_manager *dm); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c @@ -76,10 +76,8 @@ static int amdgpu_dm_wb_connector_get_modes(struct drm_connector *connector) { - struct drm_device *dev = connector->dev; - - return drm_add_modes_noedid(connector, dev->mode_config.max_width, - dev->mode_config.max_height); + /* Maximum resolution supported by DWB */ + return drm_add_modes_noedid(connector, 3840, 2160); } static int amdgpu_dm_wb_prepare_job(struct drm_writeback_connector *wb_connector, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c @@ -667,6 +667,9 @@ ss_table_header_include = ((ATOM_ASIC_INTERNAL_SS_INFO_V3 *) bios_get_image(&bp->base, DATA_TABLES(ASIC_InternalSS_Info), struct_size(ss_table_header_include, asSpreadSpectrum, 1))); + if (!ss_table_header_include) + return BP_RESULT_UNSUPPORTED; + table_size = (le16_to_cpu(ss_table_header_include->sHeader.usStructureSize) - sizeof(ATOM_COMMON_TABLE_HEADER)) @@ -1036,6 +1039,8 @@ &bp->base, DATA_TABLES(ASIC_InternalSS_Info), struct_size(header, asSpreadSpectrum, 1))); + if (!header) + return result; memset(info, 0, sizeof(struct spread_spectrum_info)); @@ -1109,6 +1114,8 @@ get_atom_data_table_revision(header, &revision); tbl = GET_IMAGE(ATOM_SPREAD_SPECTRUM_INFO, DATA_TABLES(SS_Info)); + if (!tbl) + return result; if (1 != revision.major || 2 > revision.minor) return result; @@ -1636,6 +1643,8 @@ tbl = GET_IMAGE(ATOM_SPREAD_SPECTRUM_INFO, DATA_TABLES(SS_Info)); + if (!tbl) + return number; if (1 != revision.major || 2 > revision.minor) return number; @@ -1718,6 +1727,8 @@ &bp->base, DATA_TABLES(ASIC_InternalSS_Info), struct_size(header_include, asSpreadSpectrum, 1))); + if (!header_include) + return 0; size = (le16_to_cpu(header_include->sHeader.usStructureSize) - sizeof(ATOM_COMMON_TABLE_HEADER)) @@ -1756,6 +1767,9 @@ header_include = ((ATOM_ASIC_INTERNAL_SS_INFO_V3 *) bios_get_image(&bp->base, DATA_TABLES(ASIC_InternalSS_Info), struct_size(header_include, asSpreadSpectrum, 1))); + if (!header_include) + return number; + size = (le16_to_cpu(header_include->sHeader.usStructureSize) - sizeof(ATOM_COMMON_TABLE_HEADER)) / sizeof(ATOM_ASIC_SS_ASSIGNMENT_V3); @@ -2552,8 +2566,8 @@ /* Sort voltage table from low to high*/ if (result == BP_RESULT_OK) { - uint32_t i; - uint32_t j; + int32_t i; + int32_t j; for (i = 1; i < NUMBER_OF_DISP_CLK_VOLTAGE; ++i) { for (j = i; j > 0; --j) { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c @@ -2922,8 +2922,11 @@ struct atom_common_table_header *header; struct atom_data_revision revision; - uint32_t i; - uint32_t j; + int32_t i; + int32_t j; + + if (!info) + return result; if (info && DATA_TABLES(integratedsysteminfo)) { header = GET_IMAGE(struct atom_common_table_header, @@ -2948,6 +2951,7 @@ result = get_integrated_info_v2_1(bp, info); break; case 2: + case 3: result = get_integrated_info_v2_2(bp, info); break; default: @@ -3037,7 +3041,7 @@ struct dc_vram_info *info) { struct bios_parser *bp = BP_FROM_DCB(dcb); - static enum bp_result result = BP_RESULT_BADBIOSTABLE; + enum bp_result result = BP_RESULT_BADBIOSTABLE; struct atom_common_table_header *header; struct atom_data_revision revision; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/bios/command_table.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/bios/command_table.c @@ -37,7 +37,7 @@ #define EXEC_BIOS_CMD_TABLE(command, params)\ (amdgpu_atom_execute_table(((struct amdgpu_device *)bp->base.ctx->driver_context)->mode_info.atom_context, \ GetIndexIntoMasterTable(COMMAND, command), \ - (uint32_t *)¶ms) == 0) + (uint32_t *)¶ms, sizeof(params)) == 0) #define BIOS_CMD_TABLE_REVISION(command, frev, crev)\ amdgpu_atom_parse_cmd_header(((struct amdgpu_device *)bp->base.ctx->driver_context)->mode_info.atom_context, \ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/bios/command_table2.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/bios/command_table2.c @@ -49,7 +49,7 @@ #define EXEC_BIOS_CMD_TABLE(fname, params)\ (amdgpu_atom_execute_table(((struct amdgpu_device *)bp->base.ctx->driver_context)->mode_info.atom_context, \ GET_INDEX_INTO_MASTER_TABLE(command, fname), \ - (uint32_t *)¶ms) == 0) + (uint32_t *)¶ms, sizeof(params)) == 0) #define BIOS_CMD_TABLE_REVISION(fname, frev, crev)\ amdgpu_atom_parse_cmd_header(((struct amdgpu_device *)bp->base.ctx->driver_context)->mode_info.atom_context, \ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c @@ -195,7 +195,7 @@ * , then change minimum memory clock based on real-time bandwidth * limitation. */ - if ((dc->ctx->asic_id.chip_family == FAMILY_AI) && + if (dc->bw_vbios && (dc->ctx->asic_id.chip_family == FAMILY_AI) && ASICREV_IS_VEGA20_P(dc->ctx->asic_id.hw_internal_rev) && (context->stream_count >= 2)) { pp_display_cfg->min_memory_clock_khz = max(pp_display_cfg->min_memory_clock_khz, (uint32_t) div64_s64( --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c @@ -503,7 +503,7 @@ clk_mgr->cur_phyclk_req_table[link->link_index] = link->cur_link_settings.link_rate * LINK_RATE_REF_FREQ_IN_KHZ; - for (i = 0; i < MAX_PIPES * 2; i++) { + for (i = 0; i < MAX_LINKS; i++) { if (clk_mgr->cur_phyclk_req_table[i] > max_phyclk_req) max_phyclk_req = clk_mgr->cur_phyclk_req_table[i]; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c @@ -484,7 +484,8 @@ ranges->reader_wm_sets[num_valid_sets].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; /* Modify previous watermark range to cover up to max */ - ranges->reader_wm_sets[num_valid_sets - 1].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; + if (num_valid_sets > 0) + ranges->reader_wm_sets[num_valid_sets - 1].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; } num_valid_sets++; } @@ -548,7 +549,7 @@ clk_mgr->cur_phyclk_req_table[link->link_index] = link->cur_link_settings.link_rate * LINK_RATE_REF_FREQ_IN_KHZ; - for (i = 0; i < MAX_PIPES * 2; i++) { + for (i = 0; i < MAX_LINKS; i++) { if (clk_mgr->cur_phyclk_req_table[i] > max_phyclk_req) max_phyclk_req = clk_mgr->cur_phyclk_req_table[i]; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c @@ -474,7 +474,7 @@ clk_mgr->cur_phyclk_req_table[link->link_index] = link->cur_link_settings.link_rate * LINK_RATE_REF_FREQ_IN_KHZ; - for (i = 0; i < MAX_PIPES * 2; i++) { + for (i = 0; i < MAX_LINKS; i++) { if (clk_mgr->cur_phyclk_req_table[i] > max_phyclk_req) max_phyclk_req = clk_mgr->cur_phyclk_req_table[i]; } @@ -560,11 +560,19 @@ dce_clock_read_ss_info(clk_mgr); clk_mgr->base.bw_params = kzalloc(sizeof(*clk_mgr->base.bw_params), GFP_KERNEL); + if (!clk_mgr->base.bw_params) { + BREAK_TO_DEBUGGER(); + return; + } /* need physical address of table to give to PMFW */ clk_mgr->wm_range_table = dm_helpers_allocate_gpu_mem(clk_mgr->base.ctx, DC_MEM_ALLOC_TYPE_GART, sizeof(WatermarksExternal_t), &clk_mgr->wm_range_table_addr); + if (!clk_mgr->wm_range_table) { + BREAK_TO_DEBUGGER(); + return; + } } void dcn3_clk_mgr_destroy(struct clk_mgr_internal *clk_mgr) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c @@ -50,12 +50,13 @@ #include "link.h" #include "logger_types.h" + + +#include "yellow_carp_offset.h" #undef DC_LOGGER #define DC_LOGGER \ clk_mgr->base.base.ctx->logger -#include "yellow_carp_offset.h" - #define regCLK1_CLK_PLL_REQ 0x0237 #define regCLK1_CLK_PLL_REQ_BASE_IDX 0 --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c @@ -53,9 +53,6 @@ #include "logger_types.h" -#undef DC_LOGGER -#define DC_LOGGER \ - clk_mgr->base.base.ctx->logger #define MAX_INSTANCE 7 @@ -77,6 +74,9 @@ { { 0x0001B200, 0x0242DC00, 0, 0, 0, 0, 0, 0 } }, { { 0x0001B400, 0x0242E000, 0, 0, 0, 0, 0, 0 } } } }; +#undef DC_LOGGER +#define DC_LOGGER \ + clk_mgr->base.base.ctx->logger #define regCLK1_CLK_PLL_REQ 0x0237 #define regCLK1_CLK_PLL_REQ_BASE_IDX 0 --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c @@ -145,6 +145,10 @@ */ clk_mgr_base->clks.zstate_support = new_clocks->zstate_support; if (safe_to_lower) { + if (clk_mgr_base->clks.dtbclk_en && !new_clocks->dtbclk_en) { + dcn315_smu_set_dtbclk(clk_mgr, false); + clk_mgr_base->clks.dtbclk_en = new_clocks->dtbclk_en; + } /* check that we're not already in lower */ if (clk_mgr_base->clks.pwr_state != DCN_PWR_STATE_LOW_POWER) { display_count = dcn315_get_active_display_cnt_wa(dc, context); @@ -160,6 +164,10 @@ } } } else { + if (!clk_mgr_base->clks.dtbclk_en && new_clocks->dtbclk_en) { + dcn315_smu_set_dtbclk(clk_mgr, true); + clk_mgr_base->clks.dtbclk_en = new_clocks->dtbclk_en; + } /* check that we're not already in D0 */ if (clk_mgr_base->clks.pwr_state != DCN_PWR_STATE_MISSION_MODE) { union display_idle_optimization_u idle_info = { 0 }; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c @@ -99,20 +99,25 @@ return display_count; } -static void dcn316_disable_otg_wa(struct clk_mgr *clk_mgr_base, struct dc_state *context, bool disable) +static void dcn316_disable_otg_wa(struct clk_mgr *clk_mgr_base, struct dc_state *context, + bool safe_to_lower, bool disable) { struct dc *dc = clk_mgr_base->ctx->dc; int i; for (i = 0; i < dc->res_pool->pipe_count; ++i) { - struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i]; + struct pipe_ctx *pipe = safe_to_lower + ? &context->res_ctx.pipe_ctx[i] + : &dc->current_state->res_ctx.pipe_ctx[i]; if (pipe->top_pipe || pipe->prev_odm_pipe) continue; - if (pipe->stream && (pipe->stream->dpms_off || pipe->plane_state == NULL || - dc_is_virtual_signal(pipe->stream->signal))) { + if (pipe->stream && (pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal) || + !pipe->stream->link_enc)) { if (disable) { - pipe->stream_res.tg->funcs->immediate_disable_crtc(pipe->stream_res.tg); + if (pipe->stream_res.tg && pipe->stream_res.tg->funcs->immediate_disable_crtc) + pipe->stream_res.tg->funcs->immediate_disable_crtc(pipe->stream_res.tg); + reset_sync_context_for_pipe(dc, context, i); } else pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg); @@ -207,11 +212,11 @@ } if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) { - dcn316_disable_otg_wa(clk_mgr_base, context, true); + dcn316_disable_otg_wa(clk_mgr_base, context, safe_to_lower, true); clk_mgr_base->clks.dispclk_khz = new_clocks->dispclk_khz; dcn316_smu_set_dispclk(clk_mgr, clk_mgr_base->clks.dispclk_khz); - dcn316_disable_otg_wa(clk_mgr_base, context, false); + dcn316_disable_otg_wa(clk_mgr_base, context, safe_to_lower, false); update_dispclk = true; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c @@ -216,6 +216,16 @@ if (clk_mgr_base->bw_params->dc_mode_limit.dispclk_mhz > 1950) clk_mgr_base->bw_params->dc_mode_limit.dispclk_mhz = 1950; + /* DPPCLK */ + dcn32_init_single_clock(clk_mgr, PPCLK_DPPCLK, + &clk_mgr_base->bw_params->clk_table.entries[0].dppclk_mhz, + &num_entries_per_clk->num_dppclk_levels); + num_levels = num_entries_per_clk->num_dppclk_levels; + clk_mgr_base->bw_params->dc_mode_limit.dppclk_mhz = dcn30_smu_get_dc_mode_max_dpm_freq(clk_mgr, PPCLK_DPPCLK); + //HW recommends limit of 1950 MHz in display clock for all DCN3.2.x + if (clk_mgr_base->bw_params->dc_mode_limit.dppclk_mhz > 1950) + clk_mgr_base->bw_params->dc_mode_limit.dppclk_mhz = 1950; + if (num_entries_per_clk->num_dcfclk_levels && num_entries_per_clk->num_dtbclk_levels && num_entries_per_clk->num_dispclk_levels) @@ -240,6 +250,10 @@ = khz_to_mhz_ceil(clk_mgr_base->ctx->dc->debug.min_dpp_clk_khz); } + for (i = 0; i < num_levels; i++) + if (clk_mgr_base->bw_params->clk_table.entries[i].dppclk_mhz > 1950) + clk_mgr_base->bw_params->clk_table.entries[i].dppclk_mhz = 1950; + /* Get UCLK, update bounding box */ clk_mgr_base->funcs->get_memclk_states_from_smu(clk_mgr_base); @@ -682,8 +696,12 @@ * since we calculate mode support based on softmax being the max UCLK * frequency. */ - dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, - dc->clk_mgr->bw_params->dc_mode_softmax_memclk); + if (dc->debug.disable_dc_mode_overwrite) { + dcn30_smu_set_hard_max_by_freq(clk_mgr, PPCLK_UCLK, dc->clk_mgr->bw_params->max_memclk_mhz); + dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, dc->clk_mgr->bw_params->max_memclk_mhz); + } else + dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, + dc->clk_mgr->bw_params->dc_mode_softmax_memclk); } else { dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, dc->clk_mgr->bw_params->max_memclk_mhz); } @@ -716,8 +734,13 @@ /* set UCLK to requested value if P-State switching is supported, or to re-enable P-State switching */ if (clk_mgr_base->clks.p_state_change_support && (update_uclk || !clk_mgr_base->clks.prev_p_state_change_support) && - !dc->work_arounds.clock_update_disable_mask.uclk) + !dc->work_arounds.clock_update_disable_mask.uclk) { + if (dc->clk_mgr->dc_mode_softmax_enabled && dc->debug.disable_dc_mode_overwrite) + dcn30_smu_set_hard_max_by_freq(clk_mgr, PPCLK_UCLK, + max((int)dc->clk_mgr->bw_params->dc_mode_softmax_memclk, khz_to_mhz_ceil(clk_mgr_base->clks.dramclk_khz))); + dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dramclk_khz)); + } if (clk_mgr_base->clks.num_ways != new_clocks->num_ways && clk_mgr_base->clks.num_ways > new_clocks->num_ways) { @@ -1153,11 +1176,19 @@ clk_mgr->smu_present = false; clk_mgr->base.bw_params = kzalloc(sizeof(*clk_mgr->base.bw_params), GFP_KERNEL); + if (!clk_mgr->base.bw_params) { + BREAK_TO_DEBUGGER(); + return; + } /* need physical address of table to give to PMFW */ clk_mgr->wm_range_table = dm_helpers_allocate_gpu_mem(clk_mgr->base.ctx, DC_MEM_ALLOC_TYPE_GART, sizeof(WatermarksExternal_t), &clk_mgr->wm_range_table_addr); + if (!clk_mgr->wm_range_table) { + BREAK_TO_DEBUGGER(); + return; + } } void dcn32_clk_mgr_destroy(struct clk_mgr_internal *clk_mgr) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c @@ -55,6 +55,7 @@ #define DC_LOGGER \ clk_mgr->base.base.ctx->logger + #define regCLK1_CLK_PLL_REQ 0x0237 #define regCLK1_CLK_PLL_REQ_BASE_IDX 0 @@ -384,19 +385,6 @@ dcn35_smu_enable_pme_wa(clk_mgr); } -void dcn35_init_clocks(struct clk_mgr *clk_mgr) -{ - uint32_t ref_dtbclk = clk_mgr->clks.ref_dtbclk_khz; - - memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks)); - - // Assumption is that boot state always supports pstate - clk_mgr->clks.ref_dtbclk_khz = ref_dtbclk; // restore ref_dtbclk - clk_mgr->clks.p_state_change_support = true; - clk_mgr->clks.prev_p_state_change_support = true; - clk_mgr->clks.pwr_state = DCN_PWR_STATE_UNKNOWN; - clk_mgr->clks.zstate_support = DCN_ZSTATE_SUPPORT_UNKNOWN; -} bool dcn35_are_clock_states_equal(struct dc_clocks *a, struct dc_clocks *b) @@ -421,7 +409,19 @@ struct clk_mgr_dcn35 *clk_mgr) { } +void dcn35_init_clocks(struct clk_mgr *clk_mgr) +{ + uint32_t ref_dtbclk = clk_mgr->clks.ref_dtbclk_khz; + memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks)); + + // Assumption is that boot state always supports pstate + clk_mgr->clks.ref_dtbclk_khz = ref_dtbclk; // restore ref_dtbclk + clk_mgr->clks.p_state_change_support = true; + clk_mgr->clks.prev_p_state_change_support = true; + clk_mgr->clks.pwr_state = DCN_PWR_STATE_UNKNOWN; + clk_mgr->clks.zstate_support = DCN_ZSTATE_SUPPORT_UNKNOWN; +} static struct clk_bw_params dcn35_bw_params = { .vram_type = Ddr4MemType, .num_channels = 1, @@ -706,7 +706,7 @@ clock_table->NumFclkLevelsEnabled; max_fclk = find_max_clk_value(clock_table->FclkClocks_Freq, num_fclk); - num_dcfclk = (clock_table->NumFclkLevelsEnabled > NUM_DCFCLK_DPM_LEVELS) ? NUM_DCFCLK_DPM_LEVELS : + num_dcfclk = (clock_table->NumDcfClkLevelsEnabled > NUM_DCFCLK_DPM_LEVELS) ? NUM_DCFCLK_DPM_LEVELS : clock_table->NumDcfClkLevelsEnabled; for (i = 0; i < num_dcfclk; i++) { int j; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/core/dc.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/core/dc.c @@ -212,7 +212,8 @@ connectors_num, num_virtual_links); - for (i = 0; i < connectors_num; i++) { + // condition loop on link_count to allow skipping invalid indices + for (i = 0; dc->link_count < connectors_num && i < MAX_LINKS; i++) { struct link_init_data link_init_params = {0}; struct dc_link *link; @@ -411,9 +412,14 @@ * avoid conflicting with firmware updates. */ if (dc->ctx->dce_version > DCE_VERSION_MAX) - if (dc->optimized_required || dc->wm_optimized_required) + if (dc->optimized_required) return false; + if (!memcmp(&stream->adjust, adjust, sizeof(*adjust))) + return true; + + dc_exit_ips_for_hw_access(dc); + stream->adjust.v_total_max = adjust->v_total_max; stream->adjust.v_total_mid = adjust->v_total_mid; stream->adjust.v_total_mid_frame_num = adjust->v_total_mid_frame_num; @@ -454,6 +460,8 @@ int i = 0; + dc_exit_ips_for_hw_access(dc); + for (i = 0; i < MAX_PIPES; i++) { struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i]; @@ -484,6 +492,8 @@ bool ret = false; struct crtc_position position; + dc_exit_ips_for_hw_access(dc); + for (i = 0; i < MAX_PIPES; i++) { struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i]; @@ -603,6 +613,8 @@ if (pipe == NULL) return false; + dc_exit_ips_for_hw_access(dc); + /* By default, capture the full frame */ param.windowa_x_start = 0; param.windowa_y_start = 0; @@ -662,6 +674,8 @@ struct pipe_ctx *pipe; struct timing_generator *tg; + dc_exit_ips_for_hw_access(dc); + for (i = 0; i < MAX_PIPES; i++) { pipe = &dc->current_state->res_ctx.pipe_ctx[i]; if (pipe->stream == stream) @@ -686,6 +700,8 @@ int i; struct pipe_ctx *pipe_ctx; + dc_exit_ips_for_hw_access(dc); + for (i = 0; i < MAX_PIPES; i++) { if (dc->current_state->res_ctx.pipe_ctx[i].stream == stream) { @@ -721,6 +737,8 @@ if (option > DITHER_OPTION_MAX) return; + dc_exit_ips_for_hw_access(stream->ctx->dc); + stream->dither_option = option; memset(¶ms, 0, sizeof(params)); @@ -745,6 +763,8 @@ bool ret = false; struct pipe_ctx *pipes; + dc_exit_ips_for_hw_access(dc); + for (i = 0; i < MAX_PIPES; i++) { if (dc->current_state->res_ctx.pipe_ctx[i].stream == stream) { pipes = &dc->current_state->res_ctx.pipe_ctx[i]; @@ -762,6 +782,8 @@ bool ret = false; struct pipe_ctx *pipes; + dc_exit_ips_for_hw_access(dc); + for (i = 0; i < MAX_PIPES; i++) { if (dc->current_state->res_ctx.pipe_ctx[i].stream == stream) { @@ -788,6 +810,8 @@ struct pipe_ctx *pipes_affected[MAX_PIPES]; int num_pipes_affected = 0; + dc_exit_ips_for_hw_access(dc); + for (i = 0; i < num_streams; i++) { struct dc_stream_state *stream = streams[i]; @@ -1282,6 +1306,54 @@ } } +/** + * wait_for_blank_complete - wait for all active OPPs to finish pending blank + * pattern updates + * + * @dc: [in] dc reference + * @context: [in] hardware context in use + */ +static void wait_for_blank_complete(struct dc *dc, + struct dc_state *context) +{ + struct pipe_ctx *opp_head; + struct dce_hwseq *hws = dc->hwseq; + int i; + + if (!hws->funcs.wait_for_blank_complete) + return; + + for (i = 0; i < MAX_PIPES; i++) { + opp_head = &context->res_ctx.pipe_ctx[i]; + + if (!resource_is_pipe_type(opp_head, OPP_HEAD) || + dc_state_get_pipe_subvp_type(context, opp_head) == SUBVP_PHANTOM) + continue; + + hws->funcs.wait_for_blank_complete(opp_head->stream_res.opp); + } +} + +static void wait_for_odm_update_pending_complete(struct dc *dc, struct dc_state *context) +{ + struct pipe_ctx *otg_master; + struct timing_generator *tg; + int i; + + for (i = 0; i < MAX_PIPES; i++) { + otg_master = &context->res_ctx.pipe_ctx[i]; + if (!resource_is_pipe_type(otg_master, OTG_MASTER) || + dc_state_get_pipe_subvp_type(context, otg_master) == SUBVP_PHANTOM) + continue; + tg = otg_master->stream_res.tg; + if (tg->funcs->wait_odm_doublebuffer_pending_clear) + tg->funcs->wait_odm_doublebuffer_pending_clear(tg); + } + + /* ODM update may require to reprogram blank pattern for each OPP */ + wait_for_blank_complete(dc, context); +} + static void wait_for_no_pipes_pending(struct dc *dc, struct dc_state *context) { int i; @@ -1319,6 +1391,7 @@ return NULL; if (init_params->dce_environment == DCE_ENV_VIRTUAL_HW) { + dc->caps.linear_pitch_alignment = 64; if (!dc_construct_ctx(dc, init_params)) goto destruct_dc; } else { @@ -1713,7 +1786,7 @@ if (crtc_timing->pix_clk_100hz != pix_clk_100hz) return false; - if (!se->funcs->dp_get_pixel_format) + if (!se || !se->funcs->dp_get_pixel_format) return false; if (!se->funcs->dp_get_pixel_format( @@ -1733,6 +1806,9 @@ return false; } + if (link->dpcd_caps.channel_coding_cap.bits.DP_128b_132b_SUPPORTED) + return false; + if (dc->link_srv->edp_is_ilr_optimization_required(link, crtc_timing)) { DC_LOG_EVENT_LINK_TRAINING("Seamless boot disabled to optimize eDP link rate\n"); return false; @@ -1766,6 +1842,8 @@ int i, j; struct pipe_ctx *pipe; + dc_exit_ips_for_hw_access(dc); + for (i = 0; i < MAX_PIPES; i++) { if (context != NULL) { pipe = &context->res_ctx.pipe_ctx[i]; @@ -1785,6 +1863,8 @@ void dc_trigger_sync(struct dc *dc, struct dc_state *context) { if (context->stream_count > 1 && !dc->debug.disable_timing_sync) { + dc_exit_ips_for_hw_access(dc); + enable_timing_multisync(dc, context); program_timing_sync(dc, context); } @@ -1965,10 +2045,15 @@ dc_enable_stereo(dc, context, dc_streams, context->stream_count); - if (context->stream_count > get_seamless_boot_stream_count(context) || + if (get_seamless_boot_stream_count(context) == 0 || context->stream_count == 0) { /* Must wait for no flips to be pending before doing optimize bw */ wait_for_no_pipes_pending(dc, context); + /* + * optimized dispclk depends on ODM setup. Need to wait for ODM + * update pending complete before optimizing bandwidth. + */ + wait_for_odm_update_pending_complete(dc, context); /* pplib is notified if disp_num changed */ dc->hwss.optimize_bandwidth(dc, context); /* Need to do otg sync again as otg could be out of sync due to otg @@ -2041,6 +2126,8 @@ if (!streams_changed(dc, streams, stream_count)) return res; + dc_exit_ips_for_hw_access(dc); + DC_LOG_DC("%s: %d streams\n", __func__, stream_count); for (i = 0; i < stream_count; i++) { @@ -2227,7 +2314,6 @@ } dc->optimized_required = false; - dc->wm_optimized_required = false; } bool dc_set_generic_gpio_for_stereo(bool enable, @@ -2650,8 +2736,6 @@ } else if (memcmp(&dc->current_state->bw_ctx.bw.dcn.clk, &dc->clk_mgr->clks, offsetof(struct dc_clocks, prev_p_state_change_support)) != 0) { dc->optimized_required = true; } - - dc->optimized_required |= dc->wm_optimized_required; } return type; @@ -2859,9 +2943,6 @@ if (update->vrr_active_fixed) stream->vrr_active_fixed = *update->vrr_active_fixed; - if (update->crtc_timing_adjust) - stream->adjust = *update->crtc_timing_adjust; - if (update->dpms_off) stream->dpms_off = *update->dpms_off; @@ -2922,7 +3003,7 @@ } static void backup_plane_states_for_stream( - struct dc_plane_state plane_states[MAX_SURFACE_NUM], + struct dc_plane_state plane_states[MAX_SURFACES], struct dc_stream_state *stream) { int i; @@ -2936,7 +3017,7 @@ } static void restore_plane_states_for_stream( - struct dc_plane_state plane_states[MAX_SURFACE_NUM], + struct dc_plane_state plane_states[MAX_SURFACES], struct dc_stream_state *stream) { int i; @@ -2945,8 +3026,12 @@ if (!status) return; - for (i = 0; i < status->plane_count; i++) + for (i = 0; i < status->plane_count; i++) { + /* refcount will always be valid, restore everything else */ + struct kref refcount = status->plane_states[i]->refcount; *status->plane_states[i] = plane_states[i]; + status->plane_states[i]->refcount = refcount; + } } static bool update_planes_and_stream_state(struct dc *dc, @@ -3223,6 +3308,9 @@ if (stream->link->replay_settings.config.replay_supported) return true; + if (stream->ctx->dce_version >= DCN_VERSION_3_5 && stream->abm_level) + return true; + return false; } @@ -3376,6 +3464,8 @@ int i, j; struct pipe_ctx *top_pipe_to_program = NULL; struct dc_stream_status *stream_status = NULL; + dc_exit_ips_for_hw_access(dc); + dc_z10_restore(dc); top_pipe_to_program = resource_get_otg_master_for_stream( @@ -3418,23 +3508,26 @@ stream_status = dc_state_get_stream_status(context, stream); - build_dmub_cmd_list(dc, - srf_updates, - surface_count, - stream, - context, - context->dc_dmub_cmd, - &(context->dmub_cmd_count)); - hwss_build_fast_sequence(dc, - context->dc_dmub_cmd, - context->dmub_cmd_count, - context->block_sequence, - &(context->block_sequence_steps), - top_pipe_to_program, - stream_status); - hwss_execute_sequence(dc, - context->block_sequence, - context->block_sequence_steps); + if (stream_status) { + build_dmub_cmd_list(dc, + srf_updates, + surface_count, + stream, + context, + context->dc_dmub_cmd, + &(context->dmub_cmd_count)); + hwss_build_fast_sequence(dc, + context->dc_dmub_cmd, + context->dmub_cmd_count, + context->block_sequence, + &(context->block_sequence_steps), + top_pipe_to_program, + stream_status); + hwss_execute_sequence(dc, + context->block_sequence, + context->block_sequence_steps); + } + /* Clear update flags so next flip doesn't have redundant programming * (if there's no stream update, the update flags are not cleared). * Surface updates are cleared unconditionally at the beginning of each flip, @@ -3444,7 +3537,7 @@ top_pipe_to_program->stream->update_flags.raw = 0; } -static void wait_for_outstanding_hw_updates(struct dc *dc, const struct dc_state *dc_context) +static void wait_for_outstanding_hw_updates(struct dc *dc, struct dc_state *dc_context) { /* * This function calls HWSS to wait for any potentially double buffered @@ -3482,6 +3575,7 @@ } } } + wait_for_odm_update_pending_complete(dc, dc_context); } static void commit_planes_for_stream(struct dc *dc, @@ -3503,6 +3597,8 @@ // dc->current_state anymore, so we have to cache it before we apply // the new SubVP context subvp_prev_use = false; + dc_exit_ips_for_hw_access(dc); + dc_z10_restore(dc); if (update_type == UPDATE_TYPE_FULL) wait_for_outstanding_hw_updates(dc, context); @@ -3772,7 +3868,8 @@ } if ((update_type != UPDATE_TYPE_FAST) && stream->update_flags.bits.dsc_changed) - if (top_pipe_to_program->stream_res.tg->funcs->lock_doublebuffer_enable) { + if (top_pipe_to_program && + top_pipe_to_program->stream_res.tg->funcs->lock_doublebuffer_enable) { top_pipe_to_program->stream_res.tg->funcs->wait_for_state( top_pipe_to_program->stream_res.tg, CRTC_STATE_VACTIVE); @@ -4293,8 +4390,7 @@ stream_update->mst_bw_update || stream_update->func_shaper || stream_update->lut3d_func || - stream_update->pending_test_pattern || - stream_update->crtc_timing_adjust)) + stream_update->pending_test_pattern)) return true; if (stream) { @@ -4384,6 +4480,8 @@ bool is_plane_addition = 0; bool is_fast_update_only; + dc_exit_ips_for_hw_access(dc); + populate_fast_updates(fast_update, srf_updates, surface_count, stream_update); is_fast_update_only = fast_update_only(dc, fast_update, srf_updates, surface_count, stream_update, stream); @@ -4504,6 +4602,8 @@ int i, j; struct dc_fast_update fast_update[MAX_SURFACES] = {0}; + dc_exit_ips_for_hw_access(dc); + populate_fast_updates(fast_update, srf_updates, surface_count, stream_update); stream_status = dc_stream_get_status(stream); context = dc->current_state; @@ -4688,6 +4788,8 @@ case DC_ACPI_CM_POWER_STATE_D0: dc_state_construct(dc, dc->current_state); + dc_exit_ips_for_hw_access(dc); + dc_z10_restore(dc); dc->hwss.init_hw(dc); @@ -4825,28 +4927,29 @@ if (allow == dc->idle_optimizations_allowed) return; - if (dc->hwss.apply_idle_power_optimizations && dc->hwss.apply_idle_power_optimizations(dc, allow)) + if (dc->hwss.apply_idle_power_optimizations && dc->clk_mgr != NULL && + dc->hwss.apply_idle_power_optimizations(dc, allow)) dc->idle_optimizations_allowed = allow; } -bool dc_dmub_is_ips_idle_state(struct dc *dc) +void dc_exit_ips_for_hw_access(struct dc *dc) { - uint32_t idle_state = 0; + if (dc->caps.ips_support) + dc_allow_idle_optimizations(dc, false); +} +bool dc_dmub_is_ips_idle_state(struct dc *dc) +{ if (dc->debug.disable_idle_power_optimizations) return false; if (!dc->caps.ips_support || (dc->config.disable_ips == DMUB_IPS_DISABLE_ALL)) return false; - if (dc->hwss.get_idle_state) - idle_state = dc->hwss.get_idle_state(dc); - - if (!(idle_state & DMUB_IPS1_ALLOW_MASK) || - !(idle_state & DMUB_IPS2_ALLOW_MASK)) - return true; + if (!dc->ctx->dmub_srv) + return false; - return false; + return dc->ctx->dmub_srv->idle_allowed; } /* set min and max memory clock to lowest and highest DPM level, respectively */ @@ -5445,3 +5548,20 @@ return profile; } +/* + ********************************************************************************** + * dc_get_det_buffer_size_from_state() - extracts detile buffer size from dc state + * + * Called when DM wants to log detile buffer size from dc_state + * + ********************************************************************************** + */ +unsigned int dc_get_det_buffer_size_from_state(const struct dc_state *context) +{ + struct dc *dc = context->clk_mgr->ctx->dc; + + if (dc->res_pool->funcs->get_det_buffer_size) + return dc->res_pool->funcs->get_det_buffer_size(context); + else + return 0; +} --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/core/dc_debug.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/core/dc_debug.c @@ -434,3 +434,43 @@ return "Unexpected status error"; } + +char *dc_pixel_encoding_to_str(enum dc_pixel_encoding pixel_encoding) +{ + switch (pixel_encoding) { + case PIXEL_ENCODING_RGB: + return "RGB"; + case PIXEL_ENCODING_YCBCR422: + return "YUV422"; + case PIXEL_ENCODING_YCBCR444: + return "YUV444"; + case PIXEL_ENCODING_YCBCR420: + return "YUV420"; + default: + return "Unknown"; + } +} + +char *dc_color_depth_to_str(enum dc_color_depth color_depth) +{ + switch (color_depth) { + case COLOR_DEPTH_666: + return "6-bpc"; + case COLOR_DEPTH_888: + return "8-bpc"; + case COLOR_DEPTH_101010: + return "10-bpc"; + case COLOR_DEPTH_121212: + return "12-bpc"; + case COLOR_DEPTH_141414: + return "14-bpc"; + case COLOR_DEPTH_161616: + return "16-bpc"; + case COLOR_DEPTH_999: + return "9-bpc"; + case COLOR_DEPTH_111111: + return "11-bpc"; + default: + return "Unknown"; + } +} --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c @@ -602,57 +602,59 @@ while (current_pipe) { current_mpc_pipe = current_pipe; while (current_mpc_pipe) { - if (dc->hwss.set_flip_control_gsl && current_mpc_pipe->plane_state && current_mpc_pipe->plane_state->update_flags.raw) { - block_sequence[*num_steps].params.set_flip_control_gsl_params.pipe_ctx = current_mpc_pipe; - block_sequence[*num_steps].params.set_flip_control_gsl_params.flip_immediate = current_mpc_pipe->plane_state->flip_immediate; - block_sequence[*num_steps].func = HUBP_SET_FLIP_CONTROL_GSL; - (*num_steps)++; - } - if (dc->hwss.program_triplebuffer && dc->debug.enable_tri_buf && current_mpc_pipe->plane_state->update_flags.raw) { - block_sequence[*num_steps].params.program_triplebuffer_params.dc = dc; - block_sequence[*num_steps].params.program_triplebuffer_params.pipe_ctx = current_mpc_pipe; - block_sequence[*num_steps].params.program_triplebuffer_params.enableTripleBuffer = current_mpc_pipe->plane_state->triplebuffer_flips; - block_sequence[*num_steps].func = HUBP_PROGRAM_TRIPLEBUFFER; - (*num_steps)++; - } - if (dc->hwss.update_plane_addr && current_mpc_pipe->plane_state->update_flags.bits.addr_update) { - if (resource_is_pipe_type(current_mpc_pipe, OTG_MASTER) && - stream_status->mall_stream_config.type == SUBVP_MAIN) { - block_sequence[*num_steps].params.subvp_save_surf_addr.dc_dmub_srv = dc->ctx->dmub_srv; - block_sequence[*num_steps].params.subvp_save_surf_addr.addr = ¤t_mpc_pipe->plane_state->address; - block_sequence[*num_steps].params.subvp_save_surf_addr.subvp_index = current_mpc_pipe->subvp_index; - block_sequence[*num_steps].func = DMUB_SUBVP_SAVE_SURF_ADDR; + if (current_mpc_pipe->plane_state) { + if (dc->hwss.set_flip_control_gsl && current_mpc_pipe->plane_state->update_flags.raw) { + block_sequence[*num_steps].params.set_flip_control_gsl_params.pipe_ctx = current_mpc_pipe; + block_sequence[*num_steps].params.set_flip_control_gsl_params.flip_immediate = current_mpc_pipe->plane_state->flip_immediate; + block_sequence[*num_steps].func = HUBP_SET_FLIP_CONTROL_GSL; + (*num_steps)++; + } + if (dc->hwss.program_triplebuffer && dc->debug.enable_tri_buf && current_mpc_pipe->plane_state->update_flags.raw) { + block_sequence[*num_steps].params.program_triplebuffer_params.dc = dc; + block_sequence[*num_steps].params.program_triplebuffer_params.pipe_ctx = current_mpc_pipe; + block_sequence[*num_steps].params.program_triplebuffer_params.enableTripleBuffer = current_mpc_pipe->plane_state->triplebuffer_flips; + block_sequence[*num_steps].func = HUBP_PROGRAM_TRIPLEBUFFER; + (*num_steps)++; + } + if (dc->hwss.update_plane_addr && current_mpc_pipe->plane_state->update_flags.bits.addr_update) { + if (resource_is_pipe_type(current_mpc_pipe, OTG_MASTER) && + stream_status->mall_stream_config.type == SUBVP_MAIN) { + block_sequence[*num_steps].params.subvp_save_surf_addr.dc_dmub_srv = dc->ctx->dmub_srv; + block_sequence[*num_steps].params.subvp_save_surf_addr.addr = ¤t_mpc_pipe->plane_state->address; + block_sequence[*num_steps].params.subvp_save_surf_addr.subvp_index = current_mpc_pipe->subvp_index; + block_sequence[*num_steps].func = DMUB_SUBVP_SAVE_SURF_ADDR; + (*num_steps)++; + } + + block_sequence[*num_steps].params.update_plane_addr_params.dc = dc; + block_sequence[*num_steps].params.update_plane_addr_params.pipe_ctx = current_mpc_pipe; + block_sequence[*num_steps].func = HUBP_UPDATE_PLANE_ADDR; (*num_steps)++; } - block_sequence[*num_steps].params.update_plane_addr_params.dc = dc; - block_sequence[*num_steps].params.update_plane_addr_params.pipe_ctx = current_mpc_pipe; - block_sequence[*num_steps].func = HUBP_UPDATE_PLANE_ADDR; - (*num_steps)++; - } - - if (hws->funcs.set_input_transfer_func && current_mpc_pipe->plane_state->update_flags.bits.gamma_change) { - block_sequence[*num_steps].params.set_input_transfer_func_params.dc = dc; - block_sequence[*num_steps].params.set_input_transfer_func_params.pipe_ctx = current_mpc_pipe; - block_sequence[*num_steps].params.set_input_transfer_func_params.plane_state = current_mpc_pipe->plane_state; - block_sequence[*num_steps].func = DPP_SET_INPUT_TRANSFER_FUNC; - (*num_steps)++; - } + if (hws->funcs.set_input_transfer_func && current_mpc_pipe->plane_state->update_flags.bits.gamma_change) { + block_sequence[*num_steps].params.set_input_transfer_func_params.dc = dc; + block_sequence[*num_steps].params.set_input_transfer_func_params.pipe_ctx = current_mpc_pipe; + block_sequence[*num_steps].params.set_input_transfer_func_params.plane_state = current_mpc_pipe->plane_state; + block_sequence[*num_steps].func = DPP_SET_INPUT_TRANSFER_FUNC; + (*num_steps)++; + } - if (dc->hwss.program_gamut_remap && current_mpc_pipe->plane_state->update_flags.bits.gamut_remap_change) { - block_sequence[*num_steps].params.program_gamut_remap_params.pipe_ctx = current_mpc_pipe; - block_sequence[*num_steps].func = DPP_PROGRAM_GAMUT_REMAP; - (*num_steps)++; - } - if (current_mpc_pipe->plane_state->update_flags.bits.input_csc_change) { - block_sequence[*num_steps].params.setup_dpp_params.pipe_ctx = current_mpc_pipe; - block_sequence[*num_steps].func = DPP_SETUP_DPP; - (*num_steps)++; - } - if (current_mpc_pipe->plane_state->update_flags.bits.coeff_reduction_change) { - block_sequence[*num_steps].params.program_bias_and_scale_params.pipe_ctx = current_mpc_pipe; - block_sequence[*num_steps].func = DPP_PROGRAM_BIAS_AND_SCALE; - (*num_steps)++; + if (dc->hwss.program_gamut_remap && current_mpc_pipe->plane_state->update_flags.bits.gamut_remap_change) { + block_sequence[*num_steps].params.program_gamut_remap_params.pipe_ctx = current_mpc_pipe; + block_sequence[*num_steps].func = DPP_PROGRAM_GAMUT_REMAP; + (*num_steps)++; + } + if (current_mpc_pipe->plane_state->update_flags.bits.input_csc_change) { + block_sequence[*num_steps].params.setup_dpp_params.pipe_ctx = current_mpc_pipe; + block_sequence[*num_steps].func = DPP_SETUP_DPP; + (*num_steps)++; + } + if (current_mpc_pipe->plane_state->update_flags.bits.coeff_reduction_change) { + block_sequence[*num_steps].params.program_bias_and_scale_params.pipe_ctx = current_mpc_pipe; + block_sequence[*num_steps].func = DPP_PROGRAM_BIAS_AND_SCALE; + (*num_steps)++; + } } if (hws->funcs.set_output_transfer_func && current_mpc_pipe->stream->update_flags.bits.out_tf) { block_sequence[*num_steps].params.set_output_transfer_func_params.dc = dc; @@ -830,6 +832,9 @@ struct dpp *dpp = pipe_ctx->plane_res.dpp; struct dc_plane_state *plane_state = pipe_ctx->plane_state; + if (!plane_state) + return; + if (dpp && dpp->funcs->dpp_setup) { // program the input csc dpp->funcs->dpp_setup(dpp, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/core/dc_link_exports.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/core/dc_link_exports.c @@ -37,6 +37,9 @@ #include "dce/dce_i2c.h" struct dc_link *dc_get_link_at_index(struct dc *dc, uint32_t link_index) { + if (link_index >= MAX_LINKS) + return NULL; + return dc->links[link_index]; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/core/dc_resource.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/core/dc_resource.c @@ -750,25 +750,6 @@ *flip_horz_scan_dir = !*flip_horz_scan_dir; } -/* - * This is a preliminary vp size calculation to allow us to check taps support. - * The result is completely overridden afterwards. - */ -static void calculate_viewport_size(struct pipe_ctx *pipe_ctx) -{ - struct scaler_data *data = &pipe_ctx->plane_res.scl_data; - - data->viewport.width = dc_fixpt_ceil(dc_fixpt_mul_int(data->ratios.horz, data->recout.width)); - data->viewport.height = dc_fixpt_ceil(dc_fixpt_mul_int(data->ratios.vert, data->recout.height)); - data->viewport_c.width = dc_fixpt_ceil(dc_fixpt_mul_int(data->ratios.horz_c, data->recout.width)); - data->viewport_c.height = dc_fixpt_ceil(dc_fixpt_mul_int(data->ratios.vert_c, data->recout.height)); - if (pipe_ctx->plane_state->rotation == ROTATION_ANGLE_90 || - pipe_ctx->plane_state->rotation == ROTATION_ANGLE_270) { - swap(data->viewport.width, data->viewport.height); - swap(data->viewport_c.width, data->viewport_c.height); - } -} - static struct rect intersect_rec(const struct rect *r0, const struct rect *r1) { struct rect rec; @@ -1478,6 +1459,7 @@ const struct dc_plane_state *plane_state = pipe_ctx->plane_state; struct dc_crtc_timing *timing = &pipe_ctx->stream->timing; const struct rect odm_slice_rec = calculate_odm_slice_in_timing_active(pipe_ctx); + struct scaling_taps temp = {0}; bool res = false; DC_LOGGER_INIT(pipe_ctx->stream->ctx->logger); @@ -1509,8 +1491,6 @@ calculate_recout(pipe_ctx); /* depends on pixel format */ calculate_scaling_ratios(pipe_ctx); - /* depends on scaling ratios and recout, does not calculate offset yet */ - calculate_viewport_size(pipe_ctx); /* * LB calculations depend on vp size, h/v_active and scaling ratios @@ -1531,6 +1511,24 @@ pipe_ctx->plane_res.scl_data.lb_params.alpha_en = plane_state->per_pixel_alpha; + // get TAP value with 100x100 dummy data for max scaling qualify, override + // if a new scaling quality required + pipe_ctx->plane_res.scl_data.viewport.width = 100; + pipe_ctx->plane_res.scl_data.viewport.height = 100; + pipe_ctx->plane_res.scl_data.viewport_c.width = 100; + pipe_ctx->plane_res.scl_data.viewport_c.height = 100; + if (pipe_ctx->plane_res.xfm != NULL) + res = pipe_ctx->plane_res.xfm->funcs->transform_get_optimal_number_of_taps( + pipe_ctx->plane_res.xfm, &pipe_ctx->plane_res.scl_data, &plane_state->scaling_quality); + + if (pipe_ctx->plane_res.dpp != NULL) + res = pipe_ctx->plane_res.dpp->funcs->dpp_get_optimal_number_of_taps( + pipe_ctx->plane_res.dpp, &pipe_ctx->plane_res.scl_data, &plane_state->scaling_quality); + + temp = pipe_ctx->plane_res.scl_data.taps; + + calculate_inits_and_viewports(pipe_ctx); + if (pipe_ctx->plane_res.xfm != NULL) res = pipe_ctx->plane_res.xfm->funcs->transform_get_optimal_number_of_taps( pipe_ctx->plane_res.xfm, &pipe_ctx->plane_res.scl_data, &plane_state->scaling_quality); @@ -1557,11 +1555,14 @@ &plane_state->scaling_quality); } - /* - * Depends on recout, scaling ratios, h_active and taps - * May need to re-check lb size after this in some obscure scenario - */ - if (res) + /* Ignore scaler failure if pipe context plane is phantom plane */ + if (!res && plane_state->is_phantom) + res = true; + + if (res && (pipe_ctx->plane_res.scl_data.taps.v_taps != temp.v_taps || + pipe_ctx->plane_res.scl_data.taps.h_taps != temp.h_taps || + pipe_ctx->plane_res.scl_data.taps.v_taps_c != temp.v_taps_c || + pipe_ctx->plane_res.scl_data.taps.h_taps_c != temp.h_taps_c)) calculate_inits_and_viewports(pipe_ctx); /* @@ -2179,50 +2180,98 @@ } } -void resource_log_pipe_topology_update(struct dc *dc, struct dc_state *state) +static void resource_log_pipe_for_stream(struct dc *dc, struct dc_state *state, + struct pipe_ctx *otg_master, int stream_idx) { - struct pipe_ctx *otg_master; struct pipe_ctx *opp_heads[MAX_PIPES]; struct pipe_ctx *dpp_pipes[MAX_PIPES]; - int stream_idx, slice_idx, dpp_idx, plane_idx, slice_count, dpp_count; + int slice_idx, dpp_idx, plane_idx, slice_count, dpp_count; bool is_primary; DC_LOGGER_INIT(dc->ctx->logger); + slice_count = resource_get_opp_heads_for_otg_master(otg_master, + &state->res_ctx, opp_heads); + for (slice_idx = 0; slice_idx < slice_count; slice_idx++) { + plane_idx = -1; + if (opp_heads[slice_idx]->plane_state) { + dpp_count = resource_get_dpp_pipes_for_opp_head( + opp_heads[slice_idx], + &state->res_ctx, + dpp_pipes); + for (dpp_idx = 0; dpp_idx < dpp_count; dpp_idx++) { + is_primary = !dpp_pipes[dpp_idx]->top_pipe || + dpp_pipes[dpp_idx]->top_pipe->plane_state != dpp_pipes[dpp_idx]->plane_state; + if (is_primary) + plane_idx++; + resource_log_pipe(dc, dpp_pipes[dpp_idx], + stream_idx, slice_idx, + plane_idx, slice_count, + is_primary); + } + } else { + resource_log_pipe(dc, opp_heads[slice_idx], + stream_idx, slice_idx, plane_idx, + slice_count, true); + } + + } +} + +static int resource_stream_to_stream_idx(struct dc_state *state, + struct dc_stream_state *stream) +{ + int i, stream_idx = -1; + + for (i = 0; i < state->stream_count; i++) + if (state->streams[i] == stream) { + stream_idx = i; + break; + } + + /* never return negative array index */ + if (stream_idx == -1) { + ASSERT(0); + return 0; + } + + return stream_idx; +} + +void resource_log_pipe_topology_update(struct dc *dc, struct dc_state *state) +{ + struct pipe_ctx *otg_master; + int stream_idx, phantom_stream_idx; + DC_LOGGER_INIT(dc->ctx->logger); + DC_LOG_DC(" pipe topology update"); DC_LOG_DC(" ________________________"); for (stream_idx = 0; stream_idx < state->stream_count; stream_idx++) { + if (state->streams[stream_idx]->is_phantom) + continue; + otg_master = resource_get_otg_master_for_stream( &state->res_ctx, state->streams[stream_idx]); - if (!otg_master || otg_master->stream_res.tg == NULL) { - DC_LOG_DC("topology update: otg_master NULL stream_idx %d!\n", stream_idx); - return; - } - slice_count = resource_get_opp_heads_for_otg_master(otg_master, - &state->res_ctx, opp_heads); - for (slice_idx = 0; slice_idx < slice_count; slice_idx++) { - plane_idx = -1; - if (opp_heads[slice_idx]->plane_state) { - dpp_count = resource_get_dpp_pipes_for_opp_head( - opp_heads[slice_idx], - &state->res_ctx, - dpp_pipes); - for (dpp_idx = 0; dpp_idx < dpp_count; dpp_idx++) { - is_primary = !dpp_pipes[dpp_idx]->top_pipe || - dpp_pipes[dpp_idx]->top_pipe->plane_state != dpp_pipes[dpp_idx]->plane_state; - if (is_primary) - plane_idx++; - resource_log_pipe(dc, dpp_pipes[dpp_idx], - stream_idx, slice_idx, - plane_idx, slice_count, - is_primary); - } - } else { - resource_log_pipe(dc, opp_heads[slice_idx], - stream_idx, slice_idx, plane_idx, - slice_count, true); - } + if (!otg_master) + continue; + + resource_log_pipe_for_stream(dc, state, otg_master, stream_idx); + } + if (state->phantom_stream_count > 0) { + DC_LOG_DC(" | (phantom pipes) |"); + for (stream_idx = 0; stream_idx < state->stream_count; stream_idx++) { + if (state->stream_status[stream_idx].mall_stream_config.type != SUBVP_MAIN) + continue; + + phantom_stream_idx = resource_stream_to_stream_idx(state, + state->stream_status[stream_idx].mall_stream_config.paired_stream); + otg_master = resource_get_otg_master_for_stream( + &state->res_ctx, state->streams[phantom_stream_idx]); + if (!otg_master) + continue; + + resource_log_pipe_for_stream(dc, state, otg_master, stream_idx); } } DC_LOG_DC(" |________________________|\n"); @@ -2448,6 +2497,17 @@ } } +static int get_num_of_free_pipes(const struct resource_pool *pool, const struct dc_state *context) +{ + int i; + int count = 0; + + for (i = 0; i < pool->pipe_count; i++) + if (resource_is_pipe_type(&context->res_ctx.pipe_ctx[i], FREE_PIPE)) + count++; + return count; +} + enum dc_status resource_add_otg_master_for_stream_output(struct dc_state *new_ctx, const struct resource_pool *pool, struct dc_stream_state *stream) @@ -2581,37 +2641,33 @@ struct dc_state *cur_ctx, struct resource_pool *pool) { - struct pipe_ctx *opp_head_pipe, *sec_pipe, *tail_pipe; + struct pipe_ctx *sec_pipe, *tail_pipe; + struct pipe_ctx *opp_heads[MAX_PIPES]; + int opp_head_count; + int i; if (!pool->funcs->acquire_free_pipe_as_secondary_dpp_pipe) { ASSERT(0); return false; } - opp_head_pipe = otg_master_pipe; - while (opp_head_pipe) { + opp_head_count = resource_get_opp_heads_for_otg_master(otg_master_pipe, + &new_ctx->res_ctx, opp_heads); + if (get_num_of_free_pipes(pool, new_ctx) < opp_head_count) + /* not enough free pipes */ + return false; + + for (i = 0; i < opp_head_count; i++) { sec_pipe = pool->funcs->acquire_free_pipe_as_secondary_dpp_pipe( cur_ctx, new_ctx, pool, - opp_head_pipe); - if (!sec_pipe) { - /* try tearing down MPCC combine */ - int pipe_idx = acquire_first_split_pipe( - &new_ctx->res_ctx, pool, - otg_master_pipe->stream); - - if (pipe_idx >= 0) - sec_pipe = &new_ctx->res_ctx.pipe_ctx[pipe_idx]; - } - - if (!sec_pipe) - return false; - + opp_heads[i]); + ASSERT(sec_pipe); sec_pipe->plane_state = plane_state; /* establish pipe relationship */ - tail_pipe = get_tail_pipe(opp_head_pipe); + tail_pipe = get_tail_pipe(opp_heads[i]); tail_pipe->bottom_pipe = sec_pipe; sec_pipe->top_pipe = tail_pipe; sec_pipe->bottom_pipe = NULL; @@ -2622,8 +2678,6 @@ } else { sec_pipe->prev_odm_pipe = NULL; } - - opp_head_pipe = opp_head_pipe->next_odm_pipe; } return true; } @@ -3049,6 +3103,8 @@ bool dc_is_stream_unchanged( struct dc_stream_state *old_stream, struct dc_stream_state *stream) { + if (!old_stream || !stream) + return false; if (!are_stream_backends_same(old_stream, stream)) return false; @@ -3128,6 +3184,9 @@ { int i, available_audio_count; + if (id == ENGINE_ID_UNKNOWN) + return NULL; + available_audio_count = pool->audio_count; for (i = 0; i < available_audio_count; i++) { @@ -3403,7 +3462,7 @@ if (pool->dpps[pipe_idx]) pipe_ctx->plane_res.mpcc_inst = pool->dpps[pipe_idx]->inst; - if (pipe_idx >= pool->timing_generator_count) { + if (pipe_idx >= pool->timing_generator_count && pool->timing_generator_count != 0) { int tg_inst = pool->timing_generator_count - 1; pipe_ctx->stream_res.tg = pool->timing_generators[tg_inst]; @@ -3554,8 +3613,10 @@ } } - if (!stream_status) + if (!stream_status) { ASSERT(0); + return false; + } for (i = 0; i < set_count; i++) if (set[i].stream == stream) @@ -4564,6 +4625,9 @@ enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream) { + if (dc == NULL || stream == NULL) + return DC_ERROR_UNEXPECTED; + struct dc_link *link = stream->link; struct timing_generator *tg = dc->res_pool->timing_generators[0]; enum dc_status res = DC_OK; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/core/dc_state.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/core/dc_state.c @@ -200,8 +200,12 @@ dc_state_construct(dc, state); #ifdef CONFIG_DRM_AMD_DC_FP - if (dc->debug.using_dml2) - dml2_create(dc, &dc->dml2_options, &state->bw_ctx.dml2); + if (dc->debug.using_dml2) { + if (!dml2_create(dc, &dc->dml2_options, &state->bw_ctx.dml2)) { + dc_state_release(state); + return NULL; + } + } #endif kref_init(&state->refcount); @@ -240,6 +244,8 @@ dc_state_copy_internal(new_state, src_state); #ifdef CONFIG_DRM_AMD_DC_FP + new_state->bw_ctx.dml2 = NULL; + if (src_state->bw_ctx.dml2 && !dml2_create_copy(&new_state->bw_ctx.dml2, src_state->bw_ctx.dml2)) { dc_state_release(new_state); @@ -334,7 +340,8 @@ void dc_state_release(struct dc_state *state) { - kref_put(&state->refcount, dc_state_free); + if (state != NULL) + kref_put(&state->refcount, dc_state_free); } /* * dc_state_add_stream() - Add a new dc_stream_state to a dc_state. @@ -414,6 +421,19 @@ return DC_OK; } +static void remove_mpc_combine_for_stream(const struct dc *dc, + struct dc_state *new_ctx, + const struct dc_state *cur_ctx, + struct dc_stream_status *status) +{ + int i; + + for (i = 0; i < status->plane_count; i++) + resource_update_pipes_for_plane_with_slice_count( + new_ctx, cur_ctx, dc->res_pool, + status->plane_states[i], 1); +} + bool dc_state_add_plane( const struct dc *dc, struct dc_stream_state *stream, @@ -424,22 +444,52 @@ struct pipe_ctx *otg_master_pipe; struct dc_stream_status *stream_status = NULL; bool added = false; + int odm_slice_count; + int i; stream_status = dc_state_get_stream_status(state, stream); + otg_master_pipe = resource_get_otg_master_for_stream( + &state->res_ctx, stream); if (stream_status == NULL) { dm_error("Existing stream not found; failed to attach surface!\n"); goto out; - } else if (stream_status->plane_count == MAX_SURFACE_NUM) { + } else if (stream_status->plane_count == MAX_SURFACES) { dm_error("Surface: can not attach plane_state %p! Maximum is: %d\n", - plane_state, MAX_SURFACE_NUM); + plane_state, MAX_SURFACES); + goto out; + } else if (!otg_master_pipe) { goto out; } - otg_master_pipe = resource_get_otg_master_for_stream( - &state->res_ctx, stream); - if (otg_master_pipe) + added = resource_append_dpp_pipes_for_plane_composition(state, + dc->current_state, pool, otg_master_pipe, plane_state); + + if (!added) { + /* try to remove MPC combine to free up pipes */ + for (i = 0; i < state->stream_count; i++) + remove_mpc_combine_for_stream(dc, state, + dc->current_state, + &state->stream_status[i]); added = resource_append_dpp_pipes_for_plane_composition(state, - dc->current_state, pool, otg_master_pipe, plane_state); + dc->current_state, pool, + otg_master_pipe, plane_state); + } + + if (!added) { + /* try to decrease ODM slice count gradually to free up pipes */ + odm_slice_count = resource_get_odm_slice_count(otg_master_pipe); + for (i = odm_slice_count - 1; i > 0; i--) { + resource_update_pipes_for_stream_with_slice_count(state, + dc->current_state, dc->res_pool, stream, + i); + added = resource_append_dpp_pipes_for_plane_composition( + state, + dc->current_state, pool, + otg_master_pipe, plane_state); + if (added) + break; + } + } if (added) { stream_status->plane_states[stream_status->plane_count] = @@ -499,15 +549,6 @@ stream_status->plane_states[stream_status->plane_count] = NULL; - if (stream_status->plane_count == 0 && dc->config.enable_windowed_mpo_odm) - /* ODM combine could prevent us from supporting more planes - * we will reset ODM slice count back to 1 when all planes have - * been removed to maximize the amount of planes supported when - * new planes are added. - */ - resource_update_pipes_for_stream_with_slice_count( - state, dc->current_state, dc->res_pool, stream, 1); - return true; } @@ -529,7 +570,7 @@ { int i, old_plane_count; struct dc_stream_status *stream_status = NULL; - struct dc_plane_state *del_planes[MAX_SURFACE_NUM] = { 0 }; + struct dc_plane_state *del_planes[MAX_SURFACES] = { 0 }; for (i = 0; i < state->stream_count; i++) if (state->streams[i] == stream) { @@ -796,7 +837,7 @@ { int i, old_plane_count; struct dc_stream_status *stream_status = NULL; - struct dc_plane_state *del_planes[MAX_SURFACE_NUM] = { 0 }; + struct dc_plane_state *del_planes[MAX_SURFACES] = { 0 }; for (i = 0; i < state->stream_count; i++) if (state->streams[i] == phantom_stream) { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/core/dc_stream.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/core/dc_stream.c @@ -278,7 +278,6 @@ const struct dc_cursor_attributes *attributes) { struct dc *dc; - bool reset_idle_optimizations = false; if (NULL == stream) { dm_error("DC: dc_stream is NULL!\n"); @@ -309,20 +308,36 @@ stream->cursor_attributes = *attributes; - dc_z10_restore(dc); - /* disable idle optimizations while updating cursor */ - if (dc->idle_optimizations_allowed) { - dc_allow_idle_optimizations(dc, false); - reset_idle_optimizations = true; - } + return true; +} - program_cursor_attributes(dc, stream, attributes); - - /* re-enable idle optimizations if necessary */ - if (reset_idle_optimizations) - dc_allow_idle_optimizations(dc, true); +bool dc_stream_program_cursor_attributes( + struct dc_stream_state *stream, + const struct dc_cursor_attributes *attributes) +{ + struct dc *dc; + bool reset_idle_optimizations = false; - return true; + dc = stream ? stream->ctx->dc : NULL; + + if (dc_stream_set_cursor_attributes(stream, attributes)) { + dc_z10_restore(dc); + /* disable idle optimizations while updating cursor */ + if (dc->idle_optimizations_allowed) { + dc_allow_idle_optimizations(dc, false); + reset_idle_optimizations = true; + } + + program_cursor_attributes(dc, stream, attributes); + + /* re-enable idle optimizations if necessary */ + if (reset_idle_optimizations && !dc->debug.disable_dmub_reallow_idle) + dc_allow_idle_optimizations(dc, true); + + return true; + } + + return false; } static void program_cursor_position( @@ -367,9 +382,6 @@ struct dc_stream_state *stream, const struct dc_cursor_position *position) { - struct dc *dc; - bool reset_idle_optimizations = false; - if (NULL == stream) { dm_error("DC: dc_stream is NULL!\n"); return false; @@ -380,24 +392,46 @@ return false; } + stream->cursor_position = *position; + + + return true; +} + +bool dc_stream_program_cursor_position( + struct dc_stream_state *stream, + const struct dc_cursor_position *position) +{ + struct dc *dc; + bool reset_idle_optimizations = false; + const struct dc_cursor_position *old_position; + + if (!stream) + return false; + + old_position = &stream->cursor_position; dc = stream->ctx->dc; - dc_z10_restore(dc); - /* disable idle optimizations if enabling cursor */ - if (dc->idle_optimizations_allowed && (!stream->cursor_position.enable || dc->debug.exit_idle_opt_for_cursor_updates) - && position->enable) { - dc_allow_idle_optimizations(dc, false); - reset_idle_optimizations = true; - } + if (dc_stream_set_cursor_position(stream, position)) { + dc_z10_restore(dc); - stream->cursor_position = *position; + /* disable idle optimizations if enabling cursor */ + if (dc->idle_optimizations_allowed && + (!old_position->enable || dc->debug.exit_idle_opt_for_cursor_updates) && + position->enable) { + dc_allow_idle_optimizations(dc, false); + reset_idle_optimizations = true; + } - program_cursor_position(dc, stream, position); - /* re-enable idle optimizations if necessary */ - if (reset_idle_optimizations) - dc_allow_idle_optimizations(dc, true); + program_cursor_position(dc, stream, position); + /* re-enable idle optimizations if necessary */ + if (reset_idle_optimizations && !dc->debug.disable_dmub_reallow_idle) + dc_allow_idle_optimizations(dc, true); - return true; + return true; + } + + return false; } bool dc_stream_add_writeback(struct dc *dc, @@ -423,6 +457,8 @@ return false; } + dc_exit_ips_for_hw_access(dc); + wb_info->dwb_params.out_transfer_func = stream->out_transfer_func; dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; @@ -493,6 +529,8 @@ return false; } + dc_exit_ips_for_hw_access(dc); + if (dwb->funcs->set_fc_enable) dwb->funcs->set_fc_enable(dwb, DWB_FRAME_CAPTURE_DISABLE); @@ -542,6 +580,8 @@ return false; } + dc_exit_ips_for_hw_access(dc); + /* disable writeback */ if (dc->hwss.disable_writeback) { struct dwbc *dwb = dc->res_pool->dwbc[dwb_pipe_inst]; @@ -557,6 +597,8 @@ int num_dwb, struct dc_writeback_info *wb_info) { + dc_exit_ips_for_hw_access(dc); + if (dc->hwss.mmhubbub_warmup) return dc->hwss.mmhubbub_warmup(dc, num_dwb, wb_info); else @@ -569,6 +611,8 @@ struct resource_context *res_ctx = &dc->current_state->res_ctx; + dc_exit_ips_for_hw_access(dc); + for (i = 0; i < MAX_PIPES; i++) { struct timing_generator *tg = res_ctx->pipe_ctx[i].stream_res.tg; @@ -597,6 +641,8 @@ dc = stream->ctx->dc; res_ctx = &dc->current_state->res_ctx; + dc_exit_ips_for_hw_access(dc); + for (i = 0; i < MAX_PIPES; i++) { struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; @@ -628,6 +674,8 @@ struct resource_context *res_ctx = &dc->current_state->res_ctx; + dc_exit_ips_for_hw_access(dc); + for (i = 0; i < MAX_PIPES; i++) { struct timing_generator *tg = res_ctx->pipe_ctx[i].stream_res.tg; @@ -664,6 +712,8 @@ if (i == MAX_PIPES) return true; + dc_exit_ips_for_hw_access(dc); + return dc->hwss.dmdata_status_done(pipe); } @@ -698,6 +748,8 @@ pipe_ctx->stream->dmdata_address = attr->address; + dc_exit_ips_for_hw_access(dc); + dc->hwss.program_dmdata_engine(pipe_ctx); if (hubp->funcs->dmdata_set_attributes != NULL && @@ -748,12 +800,12 @@ stream->dst.height, stream->output_color_space); DC_LOG_DC( - "\tpix_clk_khz: %d, h_total: %d, v_total: %d, pixelencoder:%d, displaycolorDepth:%d\n", + "\tpix_clk_khz: %d, h_total: %d, v_total: %d, pixel_encoding:%s, color_depth:%s\n", stream->timing.pix_clk_100hz / 10, stream->timing.h_total, stream->timing.v_total, - stream->timing.pixel_encoding, - stream->timing.display_color_depth); + dc_pixel_encoding_to_str(stream->timing.pixel_encoding), + dc_color_depth_to_str(stream->timing.display_color_depth)); DC_LOG_DC( "\tlink: %d\n", stream->link->link_index); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/core/dc_surface.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/core/dc_surface.c @@ -156,11 +156,14 @@ if (pipe_ctx->plane_state != plane_state) continue; - pipe_ctx->plane_state->status.is_flip_pending = false; + if (pipe_ctx->plane_state) + pipe_ctx->plane_state->status.is_flip_pending = false; break; } + dc_exit_ips_for_hw_access(dc); + for (i = 0; i < dc->res_pool->pipe_count; i++) { struct pipe_ctx *pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dc.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dc.h @@ -53,7 +53,7 @@ #define DC_VER "3.2.266" -#define MAX_SURFACES 3 +#define MAX_SURFACES 4 #define MAX_PLANES 6 #define MAX_STREAMS 6 #define MIN_VIEWPORT_SIZE 12 @@ -987,6 +987,7 @@ bool psp_disabled_wa; unsigned int ips2_eval_delay_us; unsigned int ips2_entry_delay_us; + bool disable_dmub_reallow_idle; bool disable_timeout; bool disable_extblankadj; unsigned int static_screen_wait_frames; @@ -1013,7 +1014,7 @@ struct dc_phy_addr_space_config vm_pa_config; uint8_t link_count; - struct dc_link *links[MAX_PIPES * 2]; + struct dc_link *links[MAX_LINKS]; struct link_service *link_srv; struct dc_state *current_state; @@ -1037,7 +1038,6 @@ /* Require to optimize clocks and bandwidth for added/removed planes */ bool optimized_required; - bool wm_optimized_required; bool idle_optimizations_allowed; bool enable_c20_dtm_b0; @@ -2325,6 +2325,7 @@ struct dc_cursor_attributes *cursor_attr); void dc_allow_idle_optimizations(struct dc *dc, bool allow); +void dc_exit_ips_for_hw_access(struct dc *dc); bool dc_dmub_is_ips_idle_state(struct dc *dc); /* set min and max memory clock to lowest and highest DPM level, respectively */ @@ -2390,6 +2391,8 @@ struct dc_power_profile dc_get_power_profile_for_dc_state(const struct dc_state *context); +unsigned int dc_get_det_buffer_size_from_state(const struct dc_state *context); + /* DSC Interfaces */ #include "dc_dsc.h" --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c @@ -231,7 +231,9 @@ if (status == DMUB_STATUS_POWER_STATE_D3) return false; - dmub_srv_wait_for_idle(dmub, 100000); + status = dmub_srv_wait_for_idle(dmub, 100000); + if (status != DMUB_STATUS_OK) + return false; /* Requeue the command. */ status = dmub_srv_cmd_queue(dmub, &cmd_list[i]); @@ -497,7 +499,8 @@ union dmub_rb_cmd cmd = { 0 }; unsigned int panel_inst = 0; - dc_get_edp_link_panel_inst(dc, pipe_ctx->stream->link, &panel_inst); + if (!dc_get_edp_link_panel_inst(dc, pipe_ctx->stream->link, &panel_inst)) + return; memset(&cmd, 0, sizeof(cmd)); @@ -1320,16 +1323,27 @@ * Powering up the hardware requires notifying PMFW and DMCUB. * Clearing the driver idle allow requires a DMCUB command. * DMCUB commands requires the DMCUB to be powered up and restored. - * - * Exit out early to prevent an infinite loop of DMCUB commands - * triggering exit low power - use software state to track this. */ - dc_dmub_srv->idle_allowed = allow_idle; - if (!allow_idle) + if (!allow_idle) { dc_dmub_srv_exit_low_power_state(dc); - else + /* + * Idle is considered fully exited only after the sequence above + * fully completes. If we have a race of two threads exiting + * at the same time then it's safe to perform the sequence + * twice as long as we're not re-entering. + * + * Infinite command submission is avoided by using the + * dm_execute_dmub_cmd submission instead of the "wake" helpers. + */ + dc_dmub_srv->idle_allowed = false; + } else { + /* Consider idle as notified prior to the actual submission to + * prevent multiple entries. */ + dc_dmub_srv->idle_allowed = true; + dc_dmub_srv_notify_idle(dc, allow_idle); + } } bool dc_wake_and_execute_dmub_cmd(const struct dc_context *ctx, union dmub_rb_cmd *cmd, @@ -1364,7 +1378,7 @@ else result = dm_execute_dmub_cmd(ctx, cmd, wait_type); - if (result && reallow_idle) + if (result && reallow_idle && !ctx->dc->debug.disable_dmub_reallow_idle) dc_dmub_srv_apply_idle_power_optimizations(ctx->dc, true); return result; @@ -1413,7 +1427,7 @@ result = dc_dmub_execute_gpint(ctx, command_code, param, response, wait_type); - if (result && reallow_idle) + if (result && reallow_idle && !ctx->dc->debug.disable_dmub_reallow_idle) dc_dmub_srv_apply_idle_power_optimizations(ctx->dc, true); return result; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dc_dsc.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dc_dsc.h @@ -100,7 +100,8 @@ */ void dc_dsc_get_policy_for_timing(const struct dc_crtc_timing *timing, uint32_t max_target_bpp_limit_override_x16, - struct dc_dsc_policy *policy); + struct dc_dsc_policy *policy, + const enum dc_link_encoding_format link_encoding); void dc_dsc_policy_set_max_target_bpp_limit(uint32_t limit); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dc_stream.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dc_stream.h @@ -56,7 +56,7 @@ int plane_count; int audio_inst; struct timing_sync_info timing_sync_info; - struct dc_plane_state *plane_states[MAX_SURFACE_NUM]; + struct dc_plane_state *plane_states[MAX_SURFACES]; bool is_abm_supported; struct mall_stream_config mall_stream_config; }; @@ -139,7 +139,6 @@ uint32_t wb_update:1; uint32_t dsc_changed : 1; uint32_t mst_bw : 1; - uint32_t crtc_timing_adjust : 1; uint32_t fams_changed : 1; } bits; @@ -326,7 +325,6 @@ struct dc_3dlut *lut3d_func; struct test_pattern *pending_test_pattern; - struct dc_crtc_timing_adjust *crtc_timing_adjust; }; bool dc_is_stream_unchanged( @@ -478,10 +476,18 @@ struct dc_stream_state *stream, const struct dc_cursor_attributes *attributes); +bool dc_stream_program_cursor_attributes( + struct dc_stream_state *stream, + const struct dc_cursor_attributes *attributes); + bool dc_stream_set_cursor_position( struct dc_stream_state *stream, const struct dc_cursor_position *position); +bool dc_stream_program_cursor_position( + struct dc_stream_state *stream, + const struct dc_cursor_position *position); + bool dc_stream_adjust_vmin_vmax(struct dc *dc, struct dc_stream_state *stream, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dc_types.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dc_types.h @@ -76,7 +76,6 @@ unsigned long last_entry_write; }; -#define MAX_SURFACE_NUM 6 #define NUM_PIXEL_FORMATS 10 enum tiling_mode { @@ -178,6 +177,7 @@ unsigned int skip_avmute; unsigned int mst_start_top_delay; unsigned int remove_sink_ext_caps; + unsigned int disable_colorimetry; }; struct dc_edid_caps { @@ -1085,9 +1085,9 @@ /* SMU optimization is enabled */ bool replay_smu_opt_enable; /* Current Coasting vtotal */ - uint16_t coasting_vtotal; + uint32_t coasting_vtotal; /* Coasting vtotal table */ - uint16_t coasting_vtotal_table[PR_COASTING_TYPE_NUM]; + uint32_t coasting_vtotal_table[PR_COASTING_TYPE_NUM]; /* Maximum link off frame count */ enum replay_link_off_frame_count_level link_off_frame_count_level; /* Replay pseudo vtotal for abm + ips on full screen video which can improve ips residency */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dce/dmub_abm_lcd.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dce/dmub_abm_lcd.c @@ -262,7 +262,7 @@ { union dmub_rb_cmd cmd; struct dc_context *dc = abm->ctx; - uint32_t ramping_boundary = 0xFFFF; + uint8_t ramping_boundary = 0xFF; memset(&cmd, 0, sizeof(cmd)); cmd.abm_set_pipe.header.type = DMUB_CMD__ABM; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c @@ -84,7 +84,7 @@ cmd.replay_enable.header.payload_bytes = sizeof(struct dmub_rb_cmd_replay_enable_data); - dm_execute_dmub_cmd(dc, &cmd, DM_DMUB_WAIT_TYPE_WAIT); + dc_wake_and_execute_dmub_cmd(dc, &cmd, DM_DMUB_WAIT_TYPE_WAIT); /* Below loops 1000 x 500us = 500 ms. * Exit REPLAY may need to wait 1-2 frames to power up. Timeout after at @@ -102,7 +102,8 @@ break; } - fsleep(500); + /* must *not* be fsleep - this can be called from high irq levels */ + udelay(500); } /* assert if max retry hit */ @@ -127,7 +128,7 @@ cmd.replay_set_power_opt.replay_set_power_opt_data.power_opt = power_opt; cmd.replay_set_power_opt.replay_set_power_opt_data.panel_inst = panel_inst; - dm_execute_dmub_cmd(dc, &cmd, DM_DMUB_WAIT_TYPE_WAIT); + dc_wake_and_execute_dmub_cmd(dc, &cmd, DM_DMUB_WAIT_TYPE_WAIT); } /* @@ -209,8 +210,7 @@ else copy_settings_data->flags.bitfields.force_wakeup_by_tps3 = 0; - - dm_execute_dmub_cmd(dc, &cmd, DM_DMUB_WAIT_TYPE_WAIT); + dc_wake_and_execute_dmub_cmd(dc, &cmd, DM_DMUB_WAIT_TYPE_WAIT); return true; } @@ -231,7 +231,7 @@ cmd.replay_set_coasting_vtotal.header.payload_bytes = sizeof(struct dmub_cmd_replay_set_coasting_vtotal_data); cmd.replay_set_coasting_vtotal.replay_set_coasting_vtotal_data.coasting_vtotal = coasting_vtotal; - dm_execute_dmub_cmd(dc, &cmd, DM_DMUB_WAIT_TYPE_WAIT); + dc_wake_and_execute_dmub_cmd(dc, &cmd, DM_DMUB_WAIT_TYPE_WAIT); } /* --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dce110/Makefile +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dce110/Makefile @@ -23,7 +23,7 @@ # Makefile for the 'controller' sub-component of DAL. # It provides the control and status of HW CRTC block. -CFLAGS_$(AMDDALPATH)/dc/dce110/dce110_resource.o = $(call cc-disable-warning, override-init) +CFLAGS_$(AMDDALPATH)/dc/dce110/dce110_resource.o = -Wno-override-init DCE110 = dce110_timing_generator.o \ dce110_compressor.o dce110_opp_regamma_v.o \ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dce112/Makefile +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dce112/Makefile @@ -23,7 +23,7 @@ # Makefile for the 'controller' sub-component of DAL. # It provides the control and status of HW CRTC block. -CFLAGS_$(AMDDALPATH)/dc/dce112/dce112_resource.o = $(call cc-disable-warning, override-init) +CFLAGS_$(AMDDALPATH)/dc/dce112/dce112_resource.o = -Wno-override-init DCE112 = dce112_compressor.o --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dce120/Makefile +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dce120/Makefile @@ -24,7 +24,7 @@ # It provides the control and status of HW CRTC block. -CFLAGS_$(AMDDALPATH)/dc/dce120/dce120_resource.o = $(call cc-disable-warning, override-init) +CFLAGS_$(AMDDALPATH)/dc/dce120/dce120_resource.o = -Wno-override-init DCE120 = dce120_timing_generator.o --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dce60/Makefile +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dce60/Makefile @@ -23,7 +23,7 @@ # Makefile for the 'controller' sub-component of DAL. # It provides the control and status of HW CRTC block. -CFLAGS_$(AMDDALPATH)/dc/dce60/dce60_resource.o = $(call cc-disable-warning, override-init) +CFLAGS_$(AMDDALPATH)/dc/dce60/dce60_resource.o = -Wno-override-init DCE60 = dce60_timing_generator.o dce60_hw_sequencer.o \ dce60_resource.o --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dce80/Makefile +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dce80/Makefile @@ -23,7 +23,7 @@ # Makefile for the 'controller' sub-component of DAL. # It provides the control and status of HW CRTC block. -CFLAGS_$(AMDDALPATH)/dc/dce80/dce80_resource.o = $(call cc-disable-warning, override-init) +CFLAGS_$(AMDDALPATH)/dc/dce80/dce80_resource.o = -Wno-override-init DCE80 = dce80_timing_generator.o --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c @@ -382,6 +382,11 @@ i += increment) { if (j == hw_points - 1) break; + if (i >= TRANSFER_FUNC_POINTS) { + DC_LOG_ERROR("Index out of bounds: i=%d, TRANSFER_FUNC_POINTS=%d\n", + i, TRANSFER_FUNC_POINTS); + return false; + } rgb_resulted[j].red = output_tf->tf_pts.red[i]; rgb_resulted[j].green = output_tf->tf_pts.green[i]; rgb_resulted[j].blue = output_tf->tf_pts.blue[i]; @@ -566,6 +571,8 @@ i += increment) { if (j == hw_points - 1) break; + if (i >= TRANSFER_FUNC_POINTS) + return false; rgb_resulted[j].red = output_tf->tf_pts.red[i]; rgb_resulted[j].green = output_tf->tf_pts.green[i]; rgb_resulted[j].blue = output_tf->tf_pts.blue[i]; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c @@ -194,6 +194,9 @@ dpp->filter_h = NULL; dpp->filter_v = NULL; + memset(&dpp_base->pos, 0, sizeof(dpp_base->pos)); + memset(&dpp_base->att, 0, sizeof(dpp_base->att)); + memset(&dpp->scl_data, 0, sizeof(dpp->scl_data)); memset(&dpp->pwl_data, 0, sizeof(dpp->pwl_data)); } @@ -480,10 +483,11 @@ if (src_y_offset + cursor_height <= 0) cur_en = 0; /* not visible beyond top edge*/ - REG_UPDATE(CURSOR0_CONTROL, - CUR0_ENABLE, cur_en); + if (dpp_base->pos.cur0_ctl.bits.cur0_enable != cur_en) { + REG_UPDATE(CURSOR0_CONTROL, CUR0_ENABLE, cur_en); - dpp_base->pos.cur0_ctl.bits.cur0_enable = cur_en; + dpp_base->pos.cur0_ctl.bits.cur0_enable = cur_en; + } } void dpp1_cnv_set_optional_cursor_attributes( --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c @@ -532,6 +532,12 @@ SECONDARY_SURFACE_DCC_IND_64B_BLK, dcc_ind_64b_blk); } +void hubp_reset(struct hubp *hubp) +{ + memset(&hubp->pos, 0, sizeof(hubp->pos)); + memset(&hubp->att, 0, sizeof(hubp->att)); +} + void hubp1_program_surface_config( struct hubp *hubp, enum surface_pixel_format format, @@ -749,7 +755,8 @@ if (flip_pending) return true; - if (earliest_inuse_address.grph.addr.quad_part != hubp->request_address.grph.addr.quad_part) + if (hubp && + earliest_inuse_address.grph.addr.quad_part != hubp->request_address.grph.addr.quad_part) return true; return false; @@ -1336,8 +1343,9 @@ void hubp1_init(struct hubp *hubp) { - //do nothing + hubp_reset(hubp); } + static const struct hubp_funcs dcn10_hubp_funcs = { .hubp_program_surface_flip_and_addr = hubp1_program_surface_flip_and_addr, @@ -1350,6 +1358,7 @@ .hubp_set_vm_context0_settings = hubp1_set_vm_context0_settings, .set_blank = hubp1_set_blank, .dcc_control = hubp1_dcc_control, + .hubp_reset = hubp_reset, .mem_program_viewport = min_set_viewport, .set_hubp_blank_en = hubp1_set_hubp_blank_en, .set_cursor_attributes = hubp1_cursor_set_attributes, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h @@ -745,6 +745,8 @@ bool enable, enum hubp_ind_block_size independent_64b_blks); +void hubp_reset(struct hubp *hubp); + bool hubp1_program_surface_flip_and_addr( struct hubp *hubp, const struct dc_plane_address *address, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c @@ -377,6 +377,7 @@ .opp_set_disp_pattern_generator = NULL, .opp_program_dpg_dimensions = NULL, .dpg_is_blanked = NULL, + .dpg_is_pending = NULL, .opp_destroy = opp1_destroy }; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c @@ -690,6 +690,9 @@ int pair; uint16_t odd_coef, even_coef; + if (!filter) + return; + for (phase = 0; phase < (NUM_PHASES / 2 + 1); phase++) { for (pair = 0; pair < tap_pairs; pair++) { even_coef = filter[phase * taps + 2 * pair]; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c @@ -595,7 +595,8 @@ hubbub1->base.ctx->dc->clk_mgr->clks.p_state_change_support == false) safe_to_lower = true; - hubbub1_program_pstate_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower); + if (hubbub1_program_pstate_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower)) + wm_pending = true; REG_SET(DCHUBBUB_ARB_SAT_LEVEL, 0, DCHUBBUB_ARB_SAT_LEVEL, 60 * refclk_mhz); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c @@ -927,7 +927,8 @@ if (flip_pending) return true; - if (earliest_inuse_address.grph.addr.quad_part != hubp->request_address.grph.addr.quad_part) + if (hubp && + earliest_inuse_address.grph.addr.quad_part != hubp->request_address.grph.addr.quad_part) return true; return false; @@ -1043,11 +1044,13 @@ if (src_y_offset + cursor_height <= 0) cur_en = 0; /* not visible beyond top edge*/ - if (cur_en && REG_READ(CURSOR_SURFACE_ADDRESS) == 0) - hubp->funcs->set_cursor_attributes(hubp, &hubp->curs_attr); + if (hubp->pos.cur_ctl.bits.cur_enable != cur_en) { + if (cur_en && REG_READ(CURSOR_SURFACE_ADDRESS) == 0) + hubp->funcs->set_cursor_attributes(hubp, &hubp->curs_attr); - REG_UPDATE(CURSOR_CONTROL, + REG_UPDATE(CURSOR_CONTROL, CURSOR_ENABLE, cur_en); + } REG_SET_2(CURSOR_POSITION, 0, CURSOR_X_POSITION, pos->x, @@ -1653,6 +1656,7 @@ .set_blank = hubp2_set_blank, .set_blank_regs = hubp2_set_blank_regs, .dcc_control = hubp2_dcc_control, + .hubp_reset = hubp_reset, .mem_program_viewport = min_set_viewport, .set_cursor_attributes = hubp2_cursor_set_attributes, .set_cursor_position = hubp2_cursor_set_position, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_opp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_opp.c @@ -337,6 +337,19 @@ (double_buffer_pending == 0); } +bool opp2_dpg_is_pending(struct output_pixel_processor *opp) +{ + struct dcn20_opp *oppn20 = TO_DCN20_OPP(opp); + uint32_t double_buffer_pending; + uint32_t dpg_en; + + REG_GET(DPG_CONTROL, DPG_EN, &dpg_en); + + REG_GET(DPG_STATUS, DPG_DOUBLE_BUFFER_PENDING, &double_buffer_pending); + + return (dpg_en == 1 && double_buffer_pending == 1); +} + void opp2_program_left_edge_extra_pixel ( struct output_pixel_processor *opp, bool count) @@ -363,6 +376,7 @@ .opp_set_disp_pattern_generator = opp2_set_disp_pattern_generator, .opp_program_dpg_dimensions = opp2_program_dpg_dimensions, .dpg_is_blanked = opp2_dpg_is_blanked, + .dpg_is_pending = opp2_dpg_is_pending, .opp_dpg_set_blank_color = opp2_dpg_set_blank_color, .opp_destroy = opp1_destroy, .opp_program_left_edge_extra_pixel = opp2_program_left_edge_extra_pixel, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_opp.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_opp.h @@ -159,6 +159,8 @@ bool opp2_dpg_is_blanked(struct output_pixel_processor *opp); +bool opp2_dpg_is_pending(struct output_pixel_processor *opp); + void opp2_dpg_set_blank_color( struct output_pixel_processor *opp, const struct tg_color *color); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hubp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hubp.c @@ -116,6 +116,7 @@ .set_cursor_position = hubp1_cursor_set_position, .set_blank = hubp1_set_blank, .dcc_control = hubp1_dcc_control, + .hubp_reset = hubp_reset, .mem_program_viewport = min_set_viewport, .hubp_clk_cntl = hubp1_clk_cntl, .hubp_vtg_sel = hubp1_vtg_sel, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_opp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_opp.c @@ -50,6 +50,7 @@ .opp_set_disp_pattern_generator = opp2_set_disp_pattern_generator, .opp_program_dpg_dimensions = opp2_program_dpg_dimensions, .dpg_is_blanked = opp2_dpg_is_blanked, + .dpg_is_pending = opp2_dpg_is_pending, .opp_dpg_set_blank_color = opp2_dpg_set_blank_color, .opp_destroy = opp1_destroy, .opp_program_left_edge_extra_pixel = opp2_program_left_edge_extra_pixel, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c @@ -811,6 +811,8 @@ struct dcn21_hubp *hubp21 = TO_DCN21_HUBP(hubp); //hubp[i].HUBPREQ_DEBUG.HUBPREQ_DEBUG[26] = 1; REG_WRITE(HUBPREQ_DEBUG, 1 << 26); + + hubp_reset(hubp); } static struct hubp_funcs dcn21_hubp_funcs = { .hubp_enable_tripleBuffer = hubp2_enable_triplebuffer, @@ -823,6 +825,7 @@ .hubp_set_vm_system_aperture_settings = hubp21_set_vm_system_aperture_settings, .set_blank = hubp1_set_blank, .dcc_control = hubp1_dcc_control, + .hubp_reset = hubp_reset, .mem_program_viewport = hubp21_set_viewport, .set_cursor_attributes = hubp2_cursor_set_attributes, .set_cursor_position = hubp1_cursor_set_position, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c @@ -177,6 +177,8 @@ i += increment) { if (j == hw_points) break; + if (i >= TRANSFER_FUNC_POINTS) + return false; rgb_resulted[j].red = output_tf->tf_pts.red[i]; rgb_resulted[j].green = output_tf->tf_pts.green[i]; rgb_resulted[j].blue = output_tf->tf_pts.blue[i]; @@ -335,6 +337,8 @@ i += increment) { if (j == hw_points - 1) break; + if (i >= TRANSFER_FUNC_POINTS) + return false; rgb_resulted[j].red = output_tf->tf_pts.red[i]; rgb_resulted[j].green = output_tf->tf_pts.green[i]; rgb_resulted[j].blue = output_tf->tf_pts.blue[i]; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubbub.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubbub.c @@ -129,7 +129,8 @@ REG_UPDATE(DCHUBBUB_ARB_DF_REQ_OUTSTAND, DCHUBBUB_ARB_MIN_REQ_OUTSTAND, 0x1FF); - hubbub1_allow_self_refresh_control(hubbub, !hubbub->ctx->dc->debug.disable_stutter); + if (safe_to_lower || hubbub->ctx->dc->debug.disable_stutter) + hubbub1_allow_self_refresh_control(hubbub, !hubbub->ctx->dc->debug.disable_stutter); return wm_pending; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubp.c @@ -480,6 +480,10 @@ struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp); //hubp[i].HUBPREQ_DEBUG.HUBPREQ_DEBUG[26] = 1; REG_WRITE(HUBPREQ_DEBUG, 1 << 26); + + REG_UPDATE(DCHUBP_CNTL, HUBP_TTU_DISABLE, 0); + + hubp_reset(hubp); } static struct hubp_funcs dcn30_hubp_funcs = { @@ -494,6 +498,7 @@ .set_blank = hubp2_set_blank, .set_blank_regs = hubp2_set_blank_regs, .dcc_control = hubp3_dcc_control, + .hubp_reset = hubp_reset, .mem_program_viewport = min_set_viewport, .set_cursor_attributes = hubp2_cursor_set_attributes, .set_cursor_position = hubp2_cursor_set_position, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c @@ -44,6 +44,36 @@ #define NUM_ELEMENTS(a) (sizeof(a) / sizeof((a)[0])) +void mpc3_mpc_init(struct mpc *mpc) +{ + struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc); + int opp_id; + + mpc1_mpc_init(mpc); + + for (opp_id = 0; opp_id < MAX_OPP; opp_id++) { + if (REG(MUX[opp_id])) + /* disable mpc out rate and flow control */ + REG_UPDATE_2(MUX[opp_id], MPC_OUT_RATE_CONTROL_DISABLE, + 1, MPC_OUT_FLOW_CONTROL_COUNT, 0); + } +} + +void mpc3_mpc_init_single_inst(struct mpc *mpc, unsigned int mpcc_id) +{ + struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc); + + mpc1_mpc_init_single_inst(mpc, mpcc_id); + + /* assuming mpc out mux is connected to opp with the same index at this + * point in time (e.g. transitioning from vbios to driver) + */ + if (mpcc_id < MAX_OPP && REG(MUX[mpcc_id])) + /* disable mpc out rate and flow control */ + REG_UPDATE_2(MUX[mpcc_id], MPC_OUT_RATE_CONTROL_DISABLE, + 1, MPC_OUT_FLOW_CONTROL_COUNT, 0); +} + bool mpc3_is_dwb_idle( struct mpc *mpc, int dwb_id) @@ -80,25 +110,6 @@ MPC_DWB0_MUX, 0xf); } -void mpc3_set_out_rate_control( - struct mpc *mpc, - int opp_id, - bool enable, - bool rate_2x_mode, - struct mpc_dwb_flow_control *flow_control) -{ - struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc); - - REG_UPDATE_2(MUX[opp_id], - MPC_OUT_RATE_CONTROL_DISABLE, !enable, - MPC_OUT_RATE_CONTROL, rate_2x_mode); - - if (flow_control) - REG_UPDATE_2(MUX[opp_id], - MPC_OUT_FLOW_CONTROL_MODE, flow_control->flow_ctrl_mode, - MPC_OUT_FLOW_CONTROL_COUNT, flow_control->flow_ctrl_cnt1); -} - enum dc_lut_mode mpc3_get_ogam_current(struct mpc *mpc, int mpcc_id) { /*Contrary to DCN2 and DCN1 wherein a single status register field holds this info; @@ -1386,8 +1397,8 @@ .read_mpcc_state = mpc1_read_mpcc_state, .insert_plane = mpc1_insert_plane, .remove_mpcc = mpc1_remove_mpcc, - .mpc_init = mpc1_mpc_init, - .mpc_init_single_inst = mpc1_mpc_init_single_inst, + .mpc_init = mpc3_mpc_init, + .mpc_init_single_inst = mpc3_mpc_init_single_inst, .update_blending = mpc2_update_blending, .cursor_lock = mpc1_cursor_lock, .get_mpcc_for_dpp = mpc1_get_mpcc_for_dpp, @@ -1404,7 +1415,6 @@ .set_dwb_mux = mpc3_set_dwb_mux, .disable_dwb_mux = mpc3_disable_dwb_mux, .is_dwb_idle = mpc3_is_dwb_idle, - .set_out_rate_control = mpc3_set_out_rate_control, .set_gamut_remap = mpc3_set_gamut_remap, .program_shaper = mpc3_program_shaper, .acquire_rmu = mpcc3_acquire_rmu, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.h @@ -1007,6 +1007,13 @@ int num_mpcc, int num_rmu); +void mpc3_mpc_init( + struct mpc *mpc); + +void mpc3_mpc_init_single_inst( + struct mpc *mpc, + unsigned int mpcc_id); + bool mpc3_program_shaper( struct mpc *mpc, const struct pwl_params *params, @@ -1074,13 +1081,6 @@ struct mpc *mpc, int dwb_id); -void mpc3_set_out_rate_control( - struct mpc *mpc, - int opp_id, - bool enable, - bool rate_2x_mode, - struct mpc_dwb_flow_control *flow_control); - void mpc3_power_on_ogam_lut( struct mpc *mpc, int mpcc_id, bool power_on); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hpo_dp_link_encoder.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hpo_dp_link_encoder.c @@ -395,6 +395,12 @@ x), 25)); + // If y rounds up to integer, carry it over to x. + if (y >> 25) { + x += 1; + y = 0; + } + switch (stream_encoder_inst) { case 0: REG_SET_2(DP_DPHY_SYM32_VC_RATE_CNTL0, 0, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hubbub.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hubbub.c @@ -750,7 +750,8 @@ REG_UPDATE(DCHUBBUB_ARB_DF_REQ_OUTSTAND, DCHUBBUB_ARB_MIN_REQ_OUTSTAND, 0x1FF);*/ - hubbub1_allow_self_refresh_control(hubbub, !hubbub->ctx->dc->debug.disable_stutter); + if (safe_to_lower || hubbub->ctx->dc->debug.disable_stutter) + hubbub1_allow_self_refresh_control(hubbub, !hubbub->ctx->dc->debug.disable_stutter); return wm_pending; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hubp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hubp.c @@ -79,6 +79,7 @@ .hubp_set_vm_system_aperture_settings = hubp3_set_vm_system_aperture_settings, .set_blank = hubp2_set_blank, .dcc_control = hubp3_dcc_control, + .hubp_reset = hubp_reset, .mem_program_viewport = min_set_viewport, .set_cursor_attributes = hubp2_cursor_set_attributes, .set_cursor_position = hubp2_cursor_set_position, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_link_encoder.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_link_encoder.c @@ -34,6 +34,7 @@ #include "dc_bios_types.h" #include "link_enc_cfg.h" +#include "dc_dmub_srv.h" #include "gpio_service_interface.h" #ifndef MIN @@ -61,6 +62,38 @@ #define AUX_REG_WRITE(reg_name, val) \ dm_write_reg(CTX, AUX_REG(reg_name), val) +static uint8_t phy_id_from_transmitter(enum transmitter t) +{ + uint8_t phy_id; + + switch (t) { + case TRANSMITTER_UNIPHY_A: + phy_id = 0; + break; + case TRANSMITTER_UNIPHY_B: + phy_id = 1; + break; + case TRANSMITTER_UNIPHY_C: + phy_id = 2; + break; + case TRANSMITTER_UNIPHY_D: + phy_id = 3; + break; + case TRANSMITTER_UNIPHY_E: + phy_id = 4; + break; + case TRANSMITTER_UNIPHY_F: + phy_id = 5; + break; + case TRANSMITTER_UNIPHY_G: + phy_id = 6; + break; + default: + phy_id = 0; + break; + } + return phy_id; +} void enc32_hw_init(struct link_encoder *enc) { @@ -117,38 +150,50 @@ } } -static bool dcn32_link_encoder_is_in_alt_mode(struct link_encoder *enc) +static bool query_dp_alt_from_dmub(struct link_encoder *enc, + union dmub_rb_cmd *cmd) { struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); - uint32_t dp_alt_mode_disable = 0; - bool is_usb_c_alt_mode = false; - if (enc->features.flags.bits.DP_IS_USB_C) { - /* if value == 1 alt mode is disabled, otherwise it is enabled */ - REG_GET(RDPCSPIPE_PHY_CNTL6, RDPCS_PHY_DPALT_DISABLE, &dp_alt_mode_disable); - is_usb_c_alt_mode = (dp_alt_mode_disable == 0); - } + memset(cmd, 0, sizeof(*cmd)); + cmd->query_dp_alt.header.type = DMUB_CMD__VBIOS; + cmd->query_dp_alt.header.sub_type = + DMUB_CMD__VBIOS_TRANSMITTER_QUERY_DP_ALT; + cmd->query_dp_alt.header.payload_bytes = sizeof(cmd->query_dp_alt.data); + cmd->query_dp_alt.data.phy_id = phy_id_from_transmitter(enc10->base.transmitter); - return is_usb_c_alt_mode; + if (!dc_wake_and_execute_dmub_cmd(enc->ctx, cmd, DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY)) + return false; + + return true; } -static void dcn32_link_encoder_get_max_link_cap(struct link_encoder *enc, +bool dcn32_link_encoder_is_in_alt_mode(struct link_encoder *enc) +{ + union dmub_rb_cmd cmd; + + if (!query_dp_alt_from_dmub(enc, &cmd)) + return false; + + return (cmd.query_dp_alt.data.is_dp_alt_disable == 0); +} + +void dcn32_link_encoder_get_max_link_cap(struct link_encoder *enc, struct dc_link_settings *link_settings) { - struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); - uint32_t is_in_usb_c_dp4_mode = 0; + union dmub_rb_cmd cmd; dcn10_link_encoder_get_max_link_cap(enc, link_settings); - /* in usb c dp2 mode, max lane count is 2 */ - if (enc->funcs->is_in_alt_mode && enc->funcs->is_in_alt_mode(enc)) { - REG_GET(RDPCSPIPE_PHY_CNTL6, RDPCS_PHY_DPALT_DP4, &is_in_usb_c_dp4_mode); - if (!is_in_usb_c_dp4_mode) - link_settings->lane_count = MIN(LANE_COUNT_TWO, link_settings->lane_count); - } + if (!query_dp_alt_from_dmub(enc, &cmd)) + return; + if (cmd.query_dp_alt.data.is_usb && + cmd.query_dp_alt.data.is_dp4 == 0) + link_settings->lane_count = MIN(LANE_COUNT_TWO, link_settings->lane_count); } + static const struct link_encoder_funcs dcn32_link_enc_funcs = { .read_state = link_enc2_read_state, .validate_output_with_stream = @@ -203,12 +248,12 @@ enc10->base.hpd_source = init_data->hpd_source; enc10->base.connector = init_data->connector; + if (enc10->base.connector.id == CONNECTOR_ID_USBC) + enc10->base.features.flags.bits.DP_IS_USB_C = 1; enc10->base.preferred_engine = ENGINE_ID_UNKNOWN; enc10->base.features = *enc_features; - if (enc10->base.connector.id == CONNECTOR_ID_USBC) - enc10->base.features.flags.bits.DP_IS_USB_C = 1; enc10->base.transmitter = init_data->transmitter; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_link_encoder.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_link_encoder.h @@ -53,4 +53,9 @@ const struct dc_link_settings *link_settings, enum clock_source_id clock_source); +bool dcn32_link_encoder_is_in_alt_mode(struct link_encoder *enc); + +void dcn32_link_encoder_get_max_link_cap(struct link_encoder *enc, + struct dc_link_settings *link_settings); + #endif /* __DC_LINK_ENCODER__DCN32_H__ */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubbub.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubbub.c @@ -786,7 +786,8 @@ REG_UPDATE(DCHUBBUB_ARB_DF_REQ_OUTSTAND, DCHUBBUB_ARB_MIN_REQ_OUTSTAND, 0x1FF);*/ - hubbub1_allow_self_refresh_control(hubbub, !hubbub->ctx->dc->debug.disable_stutter); + if (safe_to_lower || hubbub->ctx->dc->debug.disable_stutter) + hubbub1_allow_self_refresh_control(hubbub, !hubbub->ctx->dc->debug.disable_stutter); hubbub32_force_usr_retraining_allow(hubbub, hubbub->ctx->dc->debug.force_usr_allow); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubp.c @@ -168,6 +168,8 @@ { struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp); REG_WRITE(HUBPREQ_DEBUG_DB, 1 << 8); + + REG_UPDATE(DCHUBP_CNTL, HUBP_TTU_DISABLE, 0); } static struct hubp_funcs dcn32_hubp_funcs = { .hubp_enable_tripleBuffer = hubp2_enable_triplebuffer, @@ -181,6 +183,7 @@ .set_blank = hubp2_set_blank, .set_blank_regs = hubp2_set_blank_regs, .dcc_control = hubp3_dcc_control, + .hubp_reset = hubp_reset, .mem_program_viewport = min_set_viewport, .set_cursor_attributes = hubp32_cursor_set_attributes, .set_cursor_position = hubp2_cursor_set_position, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_mpc.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_mpc.c @@ -47,7 +47,7 @@ struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc); int mpcc_id; - mpc1_mpc_init(mpc); + mpc3_mpc_init(mpc); if (mpc->ctx->dc->debug.enable_mem_low_power.bits.mpc) { if (mpc30->mpc_mask->MPCC_MCM_SHAPER_MEM_LOW_PWR_MODE && mpc30->mpc_mask->MPCC_MCM_3DLUT_MEM_LOW_PWR_MODE) { @@ -991,7 +991,7 @@ .insert_plane = mpc1_insert_plane, .remove_mpcc = mpc1_remove_mpcc, .mpc_init = mpc32_mpc_init, - .mpc_init_single_inst = mpc1_mpc_init_single_inst, + .mpc_init_single_inst = mpc3_mpc_init_single_inst, .update_blending = mpc2_update_blending, .cursor_lock = mpc1_cursor_lock, .get_mpcc_for_dpp = mpc1_get_mpcc_for_dpp, @@ -1008,7 +1008,6 @@ .set_dwb_mux = mpc3_set_dwb_mux, .disable_dwb_mux = mpc3_disable_dwb_mux, .is_dwb_idle = mpc3_is_dwb_idle, - .set_out_rate_control = mpc3_set_out_rate_control, .set_gamut_remap = mpc3_set_gamut_remap, .program_shaper = mpc32_program_shaper, .program_3dlut = mpc32_program_3dlut, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c @@ -234,12 +234,12 @@ pipe->stream->timing.v_addressable != pipe->stream->src.height) { is_center_timing = true; } - } - if (pipe->plane_state) { - if (pipe->stream->timing.v_addressable != pipe->plane_state->dst_rect.height && - pipe->stream->timing.v_addressable != pipe->plane_state->src_rect.height) { - is_center_timing = true; + if (pipe->plane_state) { + if (pipe->stream->timing.v_addressable != pipe->plane_state->dst_rect.height && + pipe->stream->timing.v_addressable != pipe->plane_state->src_rect.height) { + is_center_timing = true; + } } } @@ -673,7 +673,7 @@ subvp_disallow |= disallow_subvp_in_active_plus_blank(pipe); refresh_rate = (pipe->stream->timing.pix_clk_100hz * (uint64_t)100 + - pipe->stream->timing.v_total * pipe->stream->timing.h_total - (uint64_t)1); + pipe->stream->timing.v_total * (unsigned long long)pipe->stream->timing.h_total - (uint64_t)1); refresh_rate = div_u64(refresh_rate, pipe->stream->timing.v_total); refresh_rate = div_u64(refresh_rate, pipe->stream->timing.h_total); } @@ -734,7 +734,7 @@ subvp_disallow |= disallow_subvp_in_active_plus_blank(pipe); refresh_rate = (pipe->stream->timing.pix_clk_100hz * (uint64_t)100 + - pipe->stream->timing.v_total * pipe->stream->timing.h_total - (uint64_t)1); + pipe->stream->timing.v_total * (unsigned long long)pipe->stream->timing.h_total - (uint64_t)1); refresh_rate = div_u64(refresh_rate, pipe->stream->timing.v_total); refresh_rate = div_u64(refresh_rate, pipe->stream->timing.h_total); } @@ -782,3 +782,9 @@ pipe_cnt++; } } + +void dcn32_override_min_req_dcfclk(struct dc *dc, struct dc_state *context) +{ + if (dcn32_subvp_in_use(dc, context) && context->bw_ctx.bw.dcn.clk.dcfclk_khz <= MIN_SUBVP_DCFCLK_KHZ) + context->bw_ctx.bw.dcn.clk.dcfclk_khz = MIN_SUBVP_DCFCLK_KHZ; +} --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dccg.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dccg.c @@ -290,10 +290,10 @@ /* The recommended programming sequence to enable DTBCLK DTO to generate * valid pixel HPO DPSTREAM ENCODER, specifies that DTO source select should - * be set only after DTO is enabled + * be set only after DTO is enabled. + * PIPEx_DTO_SRC_SEL should not be programmed during DTBCLK update since OTG may still be on, and the + * programming is handled in program_pix_clk() regardless, so it can be removed from here. */ - REG_UPDATE(OTG_PIXEL_RATE_CNTL[params->otg_inst], - PIPE_DTO_SRC_SEL[params->otg_inst], 2); } else { switch (params->otg_inst) { case 0: @@ -310,9 +310,12 @@ break; } - REG_UPDATE_2(OTG_PIXEL_RATE_CNTL[params->otg_inst], - DTBCLK_DTO_ENABLE[params->otg_inst], 0, - PIPE_DTO_SRC_SEL[params->otg_inst], params->is_hdmi ? 0 : 1); + /** + * PIPEx_DTO_SRC_SEL should not be programmed during DTBCLK update since OTG may still be on, and the + * programming is handled in program_pix_clk() regardless, so it can be removed from here. + */ + REG_UPDATE(OTG_PIXEL_RATE_CNTL[params->otg_inst], + DTBCLK_DTO_ENABLE[params->otg_inst], 0); REG_WRITE(DTBCLK_DTO_MODULO[params->otg_inst], 0); REG_WRITE(DTBCLK_DTO_PHASE[params->otg_inst], 0); @@ -768,7 +771,7 @@ /* for DPMST, this backend could be used by multiple front end. only disable the backend if this stream_enc_ins is the last active stream enc connected to this back_end*/ uint8_t i; - for (i = 0; i != link_enc_inst && i < sizeof(fe_clk_en); i++) { + for (i = 0; i != link_enc_inst && i < ARRAY_SIZE(fe_clk_en); i++) { if (fe_clk_en[i] && be_clk_sel[i] == link_enc_inst) num_enabled_symclk_fe++; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_link_encoder.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_link_encoder.c @@ -184,6 +184,8 @@ enc10->base.hpd_source = init_data->hpd_source; enc10->base.connector = init_data->connector; + if (enc10->base.connector.id == CONNECTOR_ID_USBC) + enc10->base.features.flags.bits.DP_IS_USB_C = 1; enc10->base.preferred_engine = ENGINE_ID_UNKNOWN; @@ -238,8 +240,6 @@ } enc10->base.features.flags.bits.HDMI_6GB_EN = 1; - if (enc10->base.connector.id == CONNECTOR_ID_USBC) - enc10->base.features.flags.bits.DP_IS_USB_C = 1; if (bp_funcs->get_connector_speed_cap_info) result = bp_funcs->get_connector_speed_cap_info(enc10->base.ctx->dc_bios, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_hubbub.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_hubbub.c @@ -326,7 +326,8 @@ DCHUBBUB_ARB_MIN_REQ_OUTSTAND_COMMIT_THRESHOLD, 0xA);/*hw delta*/ REG_UPDATE(DCHUBBUB_ARB_HOSTVM_CNTL, DCHUBBUB_ARB_MAX_QOS_COMMIT_THRESHOLD, 0xF); - hubbub1_allow_self_refresh_control(hubbub, !hubbub->ctx->dc->debug.disable_stutter); + if (safe_to_lower || hubbub->ctx->dc->debug.disable_stutter) + hubbub1_allow_self_refresh_control(hubbub, !hubbub->ctx->dc->debug.disable_stutter); hubbub32_force_usr_retraining_allow(hubbub, hubbub->ctx->dc->debug.force_usr_allow); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_hubp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_hubp.c @@ -199,6 +199,7 @@ .hubp_set_vm_system_aperture_settings = hubp3_set_vm_system_aperture_settings, .set_blank = hubp2_set_blank, .dcc_control = hubp3_dcc_control, + .hubp_reset = hubp_reset, .mem_program_viewport = min_set_viewport, .set_cursor_attributes = hubp2_cursor_set_attributes, .set_cursor_position = hubp2_cursor_set_position, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c @@ -1453,10 +1453,9 @@ ASSERT(fclks->num_levels); vmin0p65_idx = 0; - vmid0p72_idx = fclks->num_levels - - (fclks->num_levels > 2 ? 3 : (fclks->num_levels > 1 ? 2 : 1)); - vnom0p8_idx = fclks->num_levels - (fclks->num_levels > 1 ? 2 : 1); - vmax0p9_idx = fclks->num_levels - 1; + vmid0p72_idx = fclks->num_levels > 2 ? fclks->num_levels - 3 : 0; + vnom0p8_idx = fclks->num_levels > 1 ? fclks->num_levels - 2 : 0; + vmax0p9_idx = fclks->num_levels > 0 ? fclks->num_levels - 1 : 0; dc->dcn_soc->fabric_and_dram_bandwidth_vmin0p65 = 32 * (fclks->data[vmin0p65_idx].clocks_in_khz / 1000.0) / 1000.0; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c @@ -78,7 +78,7 @@ static unsigned int get_bytes_per_element(enum source_format_class source_format, bool is_chroma) { - unsigned int ret_val = 0; + unsigned int ret_val = 1; if (source_format == dm_444_16) { if (!is_chroma) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c @@ -78,7 +78,7 @@ static unsigned int get_bytes_per_element(enum source_format_class source_format, bool is_chroma) { - unsigned int ret_val = 0; + unsigned int ret_val = 1; if (source_format == dm_444_16) { if (!is_chroma) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c @@ -53,7 +53,7 @@ static unsigned int get_bytes_per_element(enum source_format_class source_format, bool is_chroma) { - unsigned int ret_val = 0; + unsigned int ret_val = 1; if (source_format == dm_444_16) { if (!is_chroma) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c @@ -4273,7 +4273,7 @@ //Calculate Swath, DET Configuration, DCFCLKDeepSleep // - for (i = 0; i < mode_lib->soc.num_states; ++i) { + for (i = start_state; i < mode_lib->soc.num_states; ++i) { for (j = 0; j <= 1; ++j) { for (k = 0; k < v->NumberOfActivePlanes; ++k) { v->RequiredDPPCLKThisState[k] = v->RequiredDPPCLK[i][j][k]; @@ -4576,7 +4576,7 @@ //Calculate Return BW - for (i = 0; i < mode_lib->soc.num_states; ++i) { + for (i = start_state; i < mode_lib->soc.num_states; ++i) { for (j = 0; j <= 1; ++j) { for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) { if (v->BlendingAndTiming[k] == k) { @@ -4635,7 +4635,7 @@ v->UrgentOutOfOrderReturnPerChannelVMDataOnly); v->FinalDRAMClockChangeLatency = (v->DRAMClockChangeLatencyOverride > 0 ? v->DRAMClockChangeLatencyOverride : v->DRAMClockChangeLatency); - for (i = 0; i < mode_lib->soc.num_states; ++i) { + for (i = start_state; i < mode_lib->soc.num_states; ++i) { for (j = 0; j <= 1; ++j) { v->DCFCLKState[i][j] = v->DCFCLKPerState[i]; } @@ -4646,7 +4646,7 @@ if (v->ClampMinDCFCLK) { /* Clamp calculated values to actual minimum */ - for (i = 0; i < mode_lib->soc.num_states; ++i) { + for (i = start_state; i < mode_lib->soc.num_states; ++i) { for (j = 0; j <= 1; ++j) { if (v->DCFCLKState[i][j] < mode_lib->soc.min_dcfclk) { v->DCFCLKState[i][j] = mode_lib->soc.min_dcfclk; @@ -4656,7 +4656,7 @@ } } - for (i = 0; i < mode_lib->soc.num_states; ++i) { + for (i = start_state; i < mode_lib->soc.num_states; ++i) { for (j = 0; j <= 1; ++j) { v->IdealSDPPortBandwidthPerState[i][j] = dml_min3( v->ReturnBusWidth * v->DCFCLKState[i][j], @@ -4674,7 +4674,7 @@ //Re-ordering Buffer Support Check - for (i = 0; i < mode_lib->soc.num_states; ++i) { + for (i = start_state; i < mode_lib->soc.num_states; ++i) { for (j = 0; j <= 1; ++j) { if ((v->ROBBufferSizeInKByte - v->PixelChunkSizeInKByte) * 1024 / v->ReturnBWPerState[i][j] > (v->RoundTripPingLatencyCycles + 32) / v->DCFCLKState[i][j] + ReorderingBytes / v->ReturnBWPerState[i][j]) { @@ -4692,7 +4692,7 @@ MaxTotalVActiveRDBandwidth = MaxTotalVActiveRDBandwidth + v->ReadBandwidthLuma[k] + v->ReadBandwidthChroma[k]; } - for (i = 0; i < mode_lib->soc.num_states; ++i) { + for (i = start_state; i < mode_lib->soc.num_states; ++i) { for (j = 0; j <= 1; ++j) { v->MaxTotalVerticalActiveAvailableBandwidth[i][j] = dml_min( v->IdealSDPPortBandwidthPerState[i][j] * v->MaxAveragePercentOfIdealSDPPortBWDisplayCanUseInNormalSystemOperation / 100, @@ -4708,7 +4708,7 @@ //Prefetch Check - for (i = 0; i < mode_lib->soc.num_states; ++i) { + for (i = start_state; i < mode_lib->soc.num_states; ++i) { for (j = 0; j <= 1; ++j) { int NextPrefetchModeState = MinPrefetchMode; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dml/dcn302/dcn302_fpu.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dml/dcn302/dcn302_fpu.c @@ -304,6 +304,16 @@ dram_speed_mts[num_states++] = bw_params->clk_table.entries[j++].memclk_mhz * 16; } + /* bw_params->clk_table.entries[MAX_NUM_DPM_LVL]. + * MAX_NUM_DPM_LVL is 8. + * dcn3_02_soc.clock_limits[DC__VOLTAGE_STATES]. + * DC__VOLTAGE_STATES is 40. + */ + if (num_states > MAX_NUM_DPM_LVL) { + ASSERT(0); + return; + } + dcn3_02_soc.num_states = num_states; for (i = 0; i < dcn3_02_soc.num_states; i++) { dcn3_02_soc.clock_limits[i].state = i; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dml/dcn303/dcn303_fpu.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dml/dcn303/dcn303_fpu.c @@ -266,6 +266,17 @@ optimal_uclk_for_dcfclk_sta_targets[i] = bw_params->clk_table.entries[j].memclk_mhz * 16; break; + } else { + /* condition where (dcfclk_sta_targets[i] >= optimal_dcfclk_for_uclk[j]): + * This is required for dcn303 because it just so happens that the memory + * bandwidth is low enough such that all the optimal DCFCLK for each UCLK + * is lower than the smallest DCFCLK STA target. In this case we need to + * populate the optimal UCLK for each DCFCLK STA target to be the max UCLK. + */ + if (j == num_uclk_states - 1) { + optimal_uclk_for_dcfclk_sta_targets[i] = + bw_params->clk_table.entries[j].memclk_mhz * 16; + } } } } @@ -299,6 +310,16 @@ dram_speed_mts[num_states++] = bw_params->clk_table.entries[j++].memclk_mhz * 16; } + /* bw_params->clk_table.entries[MAX_NUM_DPM_LVL]. + * MAX_NUM_DPM_LVL is 8. + * dcn3_02_soc.clock_limits[DC__VOLTAGE_STATES]. + * DC__VOLTAGE_STATES is 40. + */ + if (num_states > MAX_NUM_DPM_LVL) { + ASSERT(0); + return; + } + dcn3_03_soc.num_states = num_states; for (i = 0; i < dcn3_03_soc.num_states; i++) { dcn3_03_soc.clock_limits[i].state = i; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c @@ -291,6 +291,7 @@ .do_urgent_latency_adjustment = false, .urgent_latency_adjustment_fabric_clock_component_us = 0, .urgent_latency_adjustment_fabric_clock_reference_mhz = 0, + .dispclk_dppclk_vco_speed_mhz = 2400.0, .num_chans = 4, .dummy_pstate_latency_us = 10.0 }; @@ -438,6 +439,7 @@ .do_urgent_latency_adjustment = false, .urgent_latency_adjustment_fabric_clock_component_us = 0, .urgent_latency_adjustment_fabric_clock_reference_mhz = 0, + .dispclk_dppclk_vco_speed_mhz = 2500.0, }; void dcn31_zero_pipe_dcc_fraction(display_e2e_pipe_params_st *pipes, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c @@ -868,8 +868,9 @@ * for VBLANK: (VACTIVE region of the SubVP pipe can fit the MALL prefetch, VBLANK frame time, * and the max of (VBLANK blanking time, MALL region)). */ - if (stretched_drr_us < (1 / (double)drr_timing->min_refresh_in_uhz) * 1000000 * 1000000 && - subvp_active_us - prefetch_us - stretched_drr_us - max_vblank_mallregion > 0) + if (drr_timing && + stretched_drr_us < (1 / (double)drr_timing->min_refresh_in_uhz) * 1000000 * 1000000 && + subvp_active_us - prefetch_us - stretched_drr_us - max_vblank_mallregion > 0) schedulable = true; return schedulable; @@ -934,7 +935,7 @@ if (!subvp_pipe && pipe_mall_type == SUBVP_MAIN) subvp_pipe = pipe; } - if (found) { + if (found && subvp_pipe) { phantom_stream = dc_state_get_paired_subvp_stream(context, subvp_pipe->stream); main_timing = &subvp_pipe->stream->timing; phantom_timing = &phantom_stream->timing; @@ -2760,7 +2761,7 @@ struct _vcs_dpi_voltage_scaling_st entry = {0}; struct clk_limit_table_entry max_clk_data = {0}; - unsigned int min_dcfclk_mhz = 199, min_fclk_mhz = 299; + unsigned int min_dcfclk_mhz = 399, min_fclk_mhz = 599; static const unsigned int num_dcfclk_stas = 5; unsigned int dcfclk_sta_targets[DC__VOLTAGE_STATES] = {199, 615, 906, 1324, 1564}; @@ -3207,6 +3208,16 @@ dram_speed_mts[num_states++] = bw_params->clk_table.entries[j++].memclk_mhz * 16; } + /* bw_params->clk_table.entries[MAX_NUM_DPM_LVL]. + * MAX_NUM_DPM_LVL is 8. + * dcn3_02_soc.clock_limits[DC__VOLTAGE_STATES]. + * DC__VOLTAGE_STATES is 40. + */ + if (num_states > MAX_NUM_DPM_LVL) { + ASSERT(0); + return; + } + dcn3_2_soc.num_states = num_states; for (i = 0; i < dcn3_2_soc.num_states; i++) { dcn3_2_soc.clock_limits[i].state = i; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c @@ -3364,6 +3364,9 @@ &mode_lib->vba.UrgentBurstFactorLumaPre[k], &mode_lib->vba.UrgentBurstFactorChromaPre[k], &mode_lib->vba.NotUrgentLatencyHidingPre[k]); + + v->cursor_bw_pre[k] = mode_lib->vba.NumberOfCursors[k] * mode_lib->vba.CursorWidth[k][0] * mode_lib->vba.CursorBPP[k][0] / + 8.0 / (mode_lib->vba.HTotal[k] / mode_lib->vba.PixelClock[k]) * v->VRatioPreY[i][j][k]; } { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dml/dcn321/dcn321_fpu.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dml/dcn321/dcn321_fpu.c @@ -803,6 +803,16 @@ dram_speed_mts[num_states++] = bw_params->clk_table.entries[j++].memclk_mhz * 16; } + /* bw_params->clk_table.entries[MAX_NUM_DPM_LVL]. + * MAX_NUM_DPM_LVL is 8. + * dcn3_02_soc.clock_limits[DC__VOLTAGE_STATES]. + * DC__VOLTAGE_STATES is 40. + */ + if (num_states > MAX_NUM_DPM_LVL) { + ASSERT(0); + return; + } + dcn3_21_soc.num_states = num_states; for (i = 0; i < dcn3_21_soc.num_states; i++) { dcn3_21_soc.clock_limits[i].state = i; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c @@ -177,7 +177,7 @@ .urgent_latency_pixel_data_only_us = 4.0, .urgent_latency_pixel_mixed_with_vm_data_us = 4.0, .urgent_latency_vm_data_only_us = 4.0, - .dram_clock_change_latency_us = 11.72, + .dram_clock_change_latency_us = 34.0, .urgent_out_of_order_return_per_channel_pixel_only_bytes = 4096, .urgent_out_of_order_return_per_channel_pixel_and_vm_bytes = 4096, .urgent_out_of_order_return_per_channel_vm_only_bytes = 4096, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c @@ -1099,8 +1099,13 @@ // Total Available Pipes Support Check for (k = 0; k < mode_lib->vba.NumberOfActivePlanes; ++k) { - total_pipes += mode_lib->vba.DPPPerPlane[k]; pipe_idx = get_pipe_idx(mode_lib, k); + if (pipe_idx == -1) { + ASSERT(0); + continue; // skip inactive planes + } + total_pipes += mode_lib->vba.DPPPerPlane[k]; + if (mode_lib->vba.cache_pipes[pipe_idx].clks_cfg.dppclk_mhz > 0.0) mode_lib->vba.DPPCLK[k] = mode_lib->vba.cache_pipes[pipe_idx].clks_cfg.dppclk_mhz; else --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c @@ -39,7 +39,7 @@ static unsigned int get_bytes_per_element(enum source_format_class source_format, bool is_chroma) { - unsigned int ret_val = 0; + unsigned int ret_val = 1; if (source_format == dm_444_16) { if (!is_chroma) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dml/dml_inline_defs.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dml/dml_inline_defs.h @@ -66,11 +66,15 @@ static inline double dml_ceil(double a, double granularity) { + if (granularity == 0) + return 0; return (double) dcn_bw_ceil2(a, granularity); } static inline double dml_floor(double a, double granularity) { + if (granularity == 0) + return 0; return (double) dcn_bw_floor2(a, granularity); } @@ -114,11 +118,15 @@ static inline double dml_ceil_ex(double x, double granularity) { + if (granularity == 0) + return 0; return (double) dcn_bw_ceil2(x, granularity); } static inline double dml_floor_ex(double x, double granularity) { + if (granularity == 0) + return 0; return (double) dcn_bw_floor2(x, granularity); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dml2/Makefile +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dml2/Makefile @@ -61,7 +61,11 @@ ifneq ($(CONFIG_FRAME_WARN),0) ifeq ($(filter y,$(CONFIG_KASAN)$(CONFIG_KCSAN)),y) +ifeq ($(CONFIG_CC_IS_CLANG)$(CONFIG_COMPILE_TEST),yy) +frame_warn_flag := -Wframe-larger-than=4096 +else frame_warn_flag := -Wframe-larger-than=3072 +endif else frame_warn_flag := -Wframe-larger-than=2048 endif --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c @@ -1219,6 +1219,7 @@ s->dst_y_prefetch_oto = s->Tvm_oto_lines + 2 * s->Tr0_oto_lines + s->Lsw_oto; s->dst_y_prefetch_equ = p->VStartup - (*p->TSetup + dml_max(p->TWait + p->TCalc, *p->Tdmdl)) / s->LineTime - (*p->DSTYAfterScaler + (dml_float_t) *p->DSTXAfterScaler / (dml_float_t)p->myPipe->HTotal); + s->dst_y_prefetch_equ = dml_min(s->dst_y_prefetch_equ, 63.75); // limit to the reg limit of U6.2 for DST_Y_PREFETCH #ifdef __DML_VBA_DEBUG__ dml_print("DML::%s: HTotal = %u\n", __func__, p->myPipe->HTotal); @@ -4282,7 +4283,7 @@ } *p->compbuf_reserved_space_64b = 2 * p->PixelChunkSizeInKByte * 1024 / 64; - if (p->UnboundedRequestEnabled) { + if (*p->UnboundedRequestEnabled) { *p->compbuf_reserved_space_64b = dml_max(*p->compbuf_reserved_space_64b, (dml_float_t)(p->ROBBufferSizeInKByte * 1024/64) - (dml_float_t)(RoundedUpSwathSizeBytesY[SurfaceDoingUnboundedRequest] * TTUFIFODEPTH / MAXIMUMCOMPRESSION/64)); @@ -6298,9 +6299,9 @@ mode_lib->ms.meta_row_bandwidth_this_state, mode_lib->ms.dpte_row_bandwidth_this_state, mode_lib->ms.NoOfDPPThisState, - mode_lib->ms.UrgentBurstFactorLuma, - mode_lib->ms.UrgentBurstFactorChroma, - mode_lib->ms.UrgentBurstFactorCursor); + mode_lib->ms.UrgentBurstFactorLuma[j], + mode_lib->ms.UrgentBurstFactorChroma[j], + mode_lib->ms.UrgentBurstFactorCursor[j]); s->VMDataOnlyReturnBWPerState = dml_get_return_bw_mbps_vm_only( &mode_lib->ms.soc, @@ -6431,7 +6432,7 @@ /* Output */ &mode_lib->ms.UrgentBurstFactorCursorPre[k], &mode_lib->ms.UrgentBurstFactorLumaPre[k], - &mode_lib->ms.UrgentBurstFactorChroma[k], + &mode_lib->ms.UrgentBurstFactorChromaPre[k], &mode_lib->ms.NotUrgentLatencyHidingPre[k]); mode_lib->ms.cursor_bw_pre[k] = mode_lib->ms.cache_display_cfg.plane.NumberOfCursors[k] * mode_lib->ms.cache_display_cfg.plane.CursorWidth[k] * @@ -6455,9 +6456,9 @@ mode_lib->ms.cursor_bw_pre, mode_lib->ms.prefetch_vmrow_bw, mode_lib->ms.NoOfDPPThisState, - mode_lib->ms.UrgentBurstFactorLuma, - mode_lib->ms.UrgentBurstFactorChroma, - mode_lib->ms.UrgentBurstFactorCursor, + mode_lib->ms.UrgentBurstFactorLuma[j], + mode_lib->ms.UrgentBurstFactorChroma[j], + mode_lib->ms.UrgentBurstFactorCursor[j], mode_lib->ms.UrgentBurstFactorLumaPre, mode_lib->ms.UrgentBurstFactorChromaPre, mode_lib->ms.UrgentBurstFactorCursorPre, @@ -6514,9 +6515,9 @@ mode_lib->ms.cursor_bw, mode_lib->ms.cursor_bw_pre, mode_lib->ms.NoOfDPPThisState, - mode_lib->ms.UrgentBurstFactorLuma, - mode_lib->ms.UrgentBurstFactorChroma, - mode_lib->ms.UrgentBurstFactorCursor, + mode_lib->ms.UrgentBurstFactorLuma[j], + mode_lib->ms.UrgentBurstFactorChroma[j], + mode_lib->ms.UrgentBurstFactorCursor[j], mode_lib->ms.UrgentBurstFactorLumaPre, mode_lib->ms.UrgentBurstFactorChromaPre, mode_lib->ms.UrgentBurstFactorCursorPre); @@ -6583,9 +6584,9 @@ mode_lib->ms.cursor_bw_pre, mode_lib->ms.prefetch_vmrow_bw, mode_lib->ms.NoOfDPP[j], // VBA_ERROR DPPPerSurface is not assigned at this point, should use NoOfDpp here - mode_lib->ms.UrgentBurstFactorLuma, - mode_lib->ms.UrgentBurstFactorChroma, - mode_lib->ms.UrgentBurstFactorCursor, + mode_lib->ms.UrgentBurstFactorLuma[j], + mode_lib->ms.UrgentBurstFactorChroma[j], + mode_lib->ms.UrgentBurstFactorCursor[j], mode_lib->ms.UrgentBurstFactorLumaPre, mode_lib->ms.UrgentBurstFactorChromaPre, mode_lib->ms.UrgentBurstFactorCursorPre, @@ -7799,9 +7800,9 @@ mode_lib->ms.DETBufferSizeYThisState[k], mode_lib->ms.DETBufferSizeCThisState[k], /* Output */ - &mode_lib->ms.UrgentBurstFactorCursor[k], - &mode_lib->ms.UrgentBurstFactorLuma[k], - &mode_lib->ms.UrgentBurstFactorChroma[k], + &mode_lib->ms.UrgentBurstFactorCursor[j][k], + &mode_lib->ms.UrgentBurstFactorLuma[j][k], + &mode_lib->ms.UrgentBurstFactorChroma[j][k], &mode_lib->ms.NotUrgentLatencyHiding[k]); } @@ -9180,6 +9181,8 @@ &locals->FractionOfUrgentBandwidth, &s->dummy_boolean[0]); // dml_bool_t *PrefetchBandwidthSupport + + if (s->VRatioPrefetchMoreThanMax != false || s->DestinationLineTimesForPrefetchLessThan2 != false) { dml_print("DML::%s: VRatioPrefetchMoreThanMax = %u\n", __func__, s->VRatioPrefetchMoreThanMax); dml_print("DML::%s: DestinationLineTimesForPrefetchLessThan2 = %u\n", __func__, s->DestinationLineTimesForPrefetchLessThan2); @@ -9194,6 +9197,7 @@ } } + if (locals->PrefetchModeSupported == true && mode_lib->ms.support.ImmediateFlipSupport == true) { locals->BandwidthAvailableForImmediateFlip = CalculateBandwidthAvailableForImmediateFlip( mode_lib->ms.num_active_planes, @@ -9460,8 +9464,10 @@ /* Copy the calculated watermarks to mp.Watermark as the getter functions are * implemented by the DML team to copy the calculated values from the mp.Watermark interface. + * &mode_lib->mp.Watermark and &locals->Watermark are the same address, memcpy may lead to + * unexpected behavior. memmove should be used. */ - memcpy(&mode_lib->mp.Watermark, CalculateWatermarks_params->Watermark, sizeof(struct Watermarks)); + memmove(&mode_lib->mp.Watermark, CalculateWatermarks_params->Watermark, sizeof(struct Watermarks)); for (k = 0; k < mode_lib->ms.num_active_planes; ++k) { if (mode_lib->ms.cache_display_cfg.writeback.WritebackEnable[k] == true) { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core_structs.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core_structs.h @@ -882,11 +882,11 @@ dml_uint_t meta_row_height[__DML_NUM_PLANES__]; dml_uint_t meta_row_height_chroma[__DML_NUM_PLANES__]; dml_float_t UrgLatency; - dml_float_t UrgentBurstFactorCursor[__DML_NUM_PLANES__]; + dml_float_t UrgentBurstFactorCursor[2][__DML_NUM_PLANES__]; dml_float_t UrgentBurstFactorCursorPre[__DML_NUM_PLANES__]; - dml_float_t UrgentBurstFactorLuma[__DML_NUM_PLANES__]; + dml_float_t UrgentBurstFactorLuma[2][__DML_NUM_PLANES__]; dml_float_t UrgentBurstFactorLumaPre[__DML_NUM_PLANES__]; - dml_float_t UrgentBurstFactorChroma[__DML_NUM_PLANES__]; + dml_float_t UrgentBurstFactorChroma[2][__DML_NUM_PLANES__]; dml_float_t UrgentBurstFactorChromaPre[__DML_NUM_PLANES__]; dml_float_t MaximumSwathWidthInLineBufferLuma; dml_float_t MaximumSwathWidthInLineBufferChroma; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c @@ -88,7 +88,8 @@ return i; } - return -1; + ASSERT(false); + return __DML2_WRAPPER_MAX_STREAMS_PLANES__; } static int find_disp_cfg_idx_by_stream_id(struct dml2_dml_to_dc_pipe_mapping *mapping, unsigned int stream_id) @@ -100,7 +101,8 @@ return i; } - return -1; + ASSERT(false); + return __DML2_WRAPPER_MAX_STREAMS_PLANES__; } // The master pipe of a stream is defined as the top pipe in odm slice 0 @@ -237,12 +239,25 @@ * However this condition comes with a caveat. We need to ignore pipes that will * require a change in OPP but still have the same stream id. For example during * an MPC to ODM transiton. + * + * Adding check to avoid pipe select on the head pipe by utilizing dc resource + * helper function resource_get_primary_dpp_pipe and comparing the pipe index. */ if (existing_state) { for (i = 0; i < pipe_count; i++) { if (existing_state->res_ctx.pipe_ctx[i].stream && existing_state->res_ctx.pipe_ctx[i].stream->stream_id == stream_id) { + struct pipe_ctx *head_pipe = + resource_is_pipe_type(&existing_state->res_ctx.pipe_ctx[i], DPP_PIPE) ? + resource_get_primary_dpp_pipe(&existing_state->res_ctx.pipe_ctx[i]) : + NULL; + + // we should always respect the head pipe from selection + if (head_pipe && head_pipe->pipe_idx == i) + continue; if (existing_state->res_ctx.pipe_ctx[i].plane_res.hubp && - existing_state->res_ctx.pipe_ctx[i].plane_res.hubp->opp_id != i) + existing_state->res_ctx.pipe_ctx[i].plane_res.hubp->opp_id != i && + (existing_state->res_ctx.pipe_ctx[i].prev_odm_pipe || + existing_state->res_ctx.pipe_ctx[i].next_odm_pipe)) continue; preferred_pipe_candidates[num_preferred_candidates++] = i; @@ -271,6 +286,14 @@ */ if (existing_state) { for (i = 0; i < pipe_count; i++) { + struct pipe_ctx *head_pipe = + resource_is_pipe_type(&existing_state->res_ctx.pipe_ctx[i], DPP_PIPE) ? + resource_get_primary_dpp_pipe(&existing_state->res_ctx.pipe_ctx[i]) : + NULL; + + // we should always respect the head pipe from selection + if (head_pipe && head_pipe->pipe_idx == i) + continue; if ((existing_state->res_ctx.pipe_ctx[i].plane_res.hubp && existing_state->res_ctx.pipe_ctx[i].plane_res.hubp->opp_id != i) || existing_state->res_ctx.pipe_ctx[i].stream_res.tg) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dml2/dml2_mall_phantom.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dml2/dml2_mall_phantom.c @@ -750,6 +750,8 @@ ctx->config.svp_pstate.callbacks.dc, state, curr_pipe->plane_state); + if (!phantom_plane) + return; } memcpy(&phantom_plane->address, &curr_pipe->plane_state->address, sizeof(phantom_plane->address)); @@ -811,7 +813,7 @@ { int i, old_plane_count; struct dc_stream_status *stream_status = NULL; - struct dc_plane_state *del_planes[MAX_SURFACE_NUM] = { 0 }; + struct dc_plane_state *del_planes[MAX_SURFACES] = { 0 }; for (i = 0; i < context->stream_count; i++) if (context->streams[i] == stream) { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c @@ -228,17 +228,14 @@ break; case dml_project_dcn35: + case dml_project_dcn351: out->num_chans = 4; out->round_trip_ping_latency_dcfclk_cycles = 106; out->smn_latency_us = 2; out->dispclk_dppclk_vco_speed_mhz = 3600; + out->pct_ideal_dram_bw_after_urgent_pixel_only = 65.0; break; - case dml_project_dcn351: - out->num_chans = 16; - out->round_trip_ping_latency_dcfclk_cycles = 1100; - out->smn_latency_us = 2; - break; } /* ---Overrides if available--- */ if (dml2->config.bbox_overrides.dram_num_chan) @@ -798,7 +795,7 @@ } } -static struct scaler_data get_scaler_data_for_plane(const struct dc_plane_state *in, struct dc_state *context) +static void get_scaler_data_for_plane(const struct dc_plane_state *in, struct dc_state *context, struct scaler_data *out) { int i; struct pipe_ctx *temp_pipe = &context->res_ctx.temp_pipe; @@ -819,18 +816,32 @@ } ASSERT(i < MAX_PIPES); - return temp_pipe->plane_res.scl_data; + memcpy(out, &temp_pipe->plane_res.scl_data, sizeof(*out)); } -static void populate_dummy_dml_plane_cfg(struct dml_plane_cfg_st *out, unsigned int location, const struct dc_stream_state *in) +static void populate_dummy_dml_plane_cfg(struct dml_plane_cfg_st *out, unsigned int location, + const struct dc_stream_state *in, + const struct soc_bounding_box_st *soc) { + dml_uint_t width, height; + + if (in->timing.h_addressable > 3840) + width = 3840; + else + width = in->timing.h_addressable; // 4K max + + if (in->timing.v_addressable > 2160) + height = 2160; + else + height = in->timing.v_addressable; // 4K max + out->CursorBPP[location] = dml_cur_32bit; out->CursorWidth[location] = 256; - out->GPUVMMinPageSizeKBytes[location] = 256; + out->GPUVMMinPageSizeKBytes[location] = soc->gpuvm_min_page_size_kbytes; - out->ViewportWidth[location] = in->timing.h_addressable; - out->ViewportHeight[location] = in->timing.v_addressable; + out->ViewportWidth[location] = width; + out->ViewportHeight[location] = height; out->ViewportStationary[location] = false; out->ViewportWidthChroma[location] = 0; out->ViewportHeightChroma[location] = 0; @@ -849,7 +860,7 @@ out->HTapsChroma[location] = 0; out->VTapsChroma[location] = 0; out->SourceScan[location] = dml_rotation_0; - out->ScalerRecoutWidth[location] = in->timing.h_addressable; + out->ScalerRecoutWidth[location] = width; out->LBBitPerPixel[location] = 57; @@ -864,29 +875,35 @@ out->ScalerEnabled[location] = false; } -static void populate_dml_plane_cfg_from_plane_state(struct dml_plane_cfg_st *out, unsigned int location, const struct dc_plane_state *in, struct dc_state *context) -{ - const struct scaler_data scaler_data = get_scaler_data_for_plane(in, context); +static void populate_dml_plane_cfg_from_plane_state(struct dml_plane_cfg_st *out, unsigned int location, + const struct dc_plane_state *in, struct dc_state *context, + const struct soc_bounding_box_st *soc) +{ + struct scaler_data *scaler_data = kzalloc(sizeof(*scaler_data), GFP_KERNEL); + if (!scaler_data) + return; + + get_scaler_data_for_plane(in, context, scaler_data); out->CursorBPP[location] = dml_cur_32bit; out->CursorWidth[location] = 256; - out->GPUVMMinPageSizeKBytes[location] = 256; + out->GPUVMMinPageSizeKBytes[location] = soc->gpuvm_min_page_size_kbytes; - out->ViewportWidth[location] = scaler_data.viewport.width; - out->ViewportHeight[location] = scaler_data.viewport.height; - out->ViewportWidthChroma[location] = scaler_data.viewport_c.width; - out->ViewportHeightChroma[location] = scaler_data.viewport_c.height; - out->ViewportXStart[location] = scaler_data.viewport.x; - out->ViewportYStart[location] = scaler_data.viewport.y; - out->ViewportXStartC[location] = scaler_data.viewport_c.x; - out->ViewportYStartC[location] = scaler_data.viewport_c.y; + out->ViewportWidth[location] = scaler_data->viewport.width; + out->ViewportHeight[location] = scaler_data->viewport.height; + out->ViewportWidthChroma[location] = scaler_data->viewport_c.width; + out->ViewportHeightChroma[location] = scaler_data->viewport_c.height; + out->ViewportXStart[location] = scaler_data->viewport.x; + out->ViewportYStart[location] = scaler_data->viewport.y; + out->ViewportXStartC[location] = scaler_data->viewport_c.x; + out->ViewportYStartC[location] = scaler_data->viewport_c.y; out->ViewportStationary[location] = false; - out->ScalerEnabled[location] = scaler_data.ratios.horz.value != dc_fixpt_one.value || - scaler_data.ratios.horz_c.value != dc_fixpt_one.value || - scaler_data.ratios.vert.value != dc_fixpt_one.value || - scaler_data.ratios.vert_c.value != dc_fixpt_one.value; + out->ScalerEnabled[location] = scaler_data->ratios.horz.value != dc_fixpt_one.value || + scaler_data->ratios.horz_c.value != dc_fixpt_one.value || + scaler_data->ratios.vert.value != dc_fixpt_one.value || + scaler_data->ratios.vert_c.value != dc_fixpt_one.value; /* Current driver code base uses LBBitPerPixel as 57. There is a discrepancy * from the HW/DML teams about this value. Initialize LBBitPerPixel with the @@ -902,25 +919,25 @@ out->VRatioChroma[location] = 1; } else { /* Follow the original dml_wrapper.c code direction to fix scaling issues */ - out->HRatio[location] = (dml_float_t)scaler_data.ratios.horz.value / (1ULL << 32); - out->HRatioChroma[location] = (dml_float_t)scaler_data.ratios.horz_c.value / (1ULL << 32); - out->VRatio[location] = (dml_float_t)scaler_data.ratios.vert.value / (1ULL << 32); - out->VRatioChroma[location] = (dml_float_t)scaler_data.ratios.vert_c.value / (1ULL << 32); + out->HRatio[location] = (dml_float_t)scaler_data->ratios.horz.value / (1ULL << 32); + out->HRatioChroma[location] = (dml_float_t)scaler_data->ratios.horz_c.value / (1ULL << 32); + out->VRatio[location] = (dml_float_t)scaler_data->ratios.vert.value / (1ULL << 32); + out->VRatioChroma[location] = (dml_float_t)scaler_data->ratios.vert_c.value / (1ULL << 32); } - if (!scaler_data.taps.h_taps) { + if (!scaler_data->taps.h_taps) { out->HTaps[location] = 1; out->HTapsChroma[location] = 1; } else { - out->HTaps[location] = scaler_data.taps.h_taps; - out->HTapsChroma[location] = scaler_data.taps.h_taps_c; + out->HTaps[location] = scaler_data->taps.h_taps; + out->HTapsChroma[location] = scaler_data->taps.h_taps_c; } - if (!scaler_data.taps.v_taps) { + if (!scaler_data->taps.v_taps) { out->VTaps[location] = 1; out->VTapsChroma[location] = 1; } else { - out->VTaps[location] = scaler_data.taps.v_taps; - out->VTapsChroma[location] = scaler_data.taps.v_taps_c; + out->VTaps[location] = scaler_data->taps.v_taps; + out->VTapsChroma[location] = scaler_data->taps.v_taps_c; } out->SourceScan[location] = (enum dml_rotation_angle)in->rotation; @@ -931,6 +948,8 @@ out->DynamicMetadataTransmittedBytes[location] = 0; out->NumberOfCursors[location] = 1; + + kfree(scaler_data); } static unsigned int map_stream_to_dml_display_cfg(const struct dml2_context *dml2, @@ -1107,7 +1126,8 @@ disp_cfg_plane_location = dml_dispcfg->num_surfaces++; populate_dummy_dml_surface_cfg(&dml_dispcfg->surface, disp_cfg_plane_location, context->streams[i]); - populate_dummy_dml_plane_cfg(&dml_dispcfg->plane, disp_cfg_plane_location, context->streams[i]); + populate_dummy_dml_plane_cfg(&dml_dispcfg->plane, disp_cfg_plane_location, + context->streams[i], &dml2->v20.dml_core_ctx.soc); dml_dispcfg->plane.BlendingAndTiming[disp_cfg_plane_location] = disp_cfg_stream_location; @@ -1123,7 +1143,10 @@ ASSERT(disp_cfg_plane_location >= 0 && disp_cfg_plane_location <= __DML2_WRAPPER_MAX_STREAMS_PLANES__); populate_dml_surface_cfg_from_plane_state(dml2->v20.dml_core_ctx.project, &dml_dispcfg->surface, disp_cfg_plane_location, context->stream_status[i].plane_states[j]); - populate_dml_plane_cfg_from_plane_state(&dml_dispcfg->plane, disp_cfg_plane_location, context->stream_status[i].plane_states[j], context); + populate_dml_plane_cfg_from_plane_state( + &dml_dispcfg->plane, disp_cfg_plane_location, + context->stream_status[i].plane_states[j], context, + &dml2->v20.dml_core_ctx.soc); if (stream_mall_type == SUBVP_MAIN) { dml_dispcfg->plane.UseMALLForPStateChange[disp_cfg_plane_location] = dml_use_mall_pstate_change_sub_viewport; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c @@ -294,7 +294,7 @@ context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz = (unsigned int)in_ctx->v20.dml_core_ctx.mp.DCFCLKDeepSleep * 1000; context->bw_ctx.bw.dcn.clk.dppclk_khz = 0; - if (in_ctx->v20.dml_core_ctx.ms.support.FCLKChangeSupport[in_ctx->v20.scratch.mode_support_params.out_lowest_state_idx] == dml_fclock_change_unsupported) + if (in_ctx->v20.dml_core_ctx.ms.support.FCLKChangeSupport[0] == dml_fclock_change_unsupported) context->bw_ctx.bw.dcn.clk.fclk_p_state_change_support = false; else context->bw_ctx.bw.dcn.clk.fclk_p_state_change_support = true; @@ -327,6 +327,8 @@ dml_pipe_idx = dml2_helper_find_dml_pipe_idx_by_stream_id(in_ctx, context->res_ctx.pipe_ctx[dc_pipe_ctx_index].stream->stream_id); } + if (dml_pipe_idx == 0xFFFFFFFF) + continue; ASSERT(in_ctx->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_stream_id_valid[dml_pipe_idx]); ASSERT(in_ctx->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_stream_id[dml_pipe_idx] == context->res_ctx.pipe_ctx[dc_pipe_ctx_index].stream->stream_id); @@ -468,6 +470,9 @@ dml_pipe_idx = find_dml_pipe_idx_by_plane_id(in_ctx, plane_id); else dml_pipe_idx = dml2_helper_find_dml_pipe_idx_by_stream_id(in_ctx, display_state->res_ctx.pipe_ctx[i].stream->stream_id); + + if (dml_pipe_idx == 0xFFFFFFFF) + continue; total_det_allocated += dml_get_det_buffer_size_kbytes(&in_ctx->v20.dml_core_ctx, dml_pipe_idx); if (total_det_allocated > max_det_size) { need_recalculation = true; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c @@ -534,14 +534,21 @@ static bool call_dml_mode_support_and_programming(struct dc_state *context) { unsigned int result = 0; - unsigned int min_state; + unsigned int min_state = 0; int min_state_for_g6_temp_read = 0; + + + if (!context) + return false; + struct dml2_context *dml2 = context->bw_ctx.dml2; struct dml2_wrapper_scratch *s = &dml2->v20.scratch; - min_state_for_g6_temp_read = calculate_lowest_supported_state_for_temp_read(dml2, context); + if (!context->streams[0]->sink->link->dc->caps.is_apu) { + min_state_for_g6_temp_read = calculate_lowest_supported_state_for_temp_read(dml2, context); - ASSERT(min_state_for_g6_temp_read >= 0); + ASSERT(min_state_for_g6_temp_read >= 0); + } if (!dml2->config.use_native_pstate_optimization) { result = optimize_pstate_with_svp_and_drr(dml2, context); @@ -552,14 +559,20 @@ /* Upon trying to sett certain frequencies in FRL, min_state_for_g6_temp_read is reported as -1. This leads to an invalid value of min_state causing crashes later on. * Use the default logic for min_state only when min_state_for_g6_temp_read is a valid value. In other cases, use the value calculated by the DML directly. */ - if (min_state_for_g6_temp_read >= 0) - min_state = min_state_for_g6_temp_read > s->mode_support_params.out_lowest_state_idx ? min_state_for_g6_temp_read : s->mode_support_params.out_lowest_state_idx; - else - min_state = s->mode_support_params.out_lowest_state_idx; - - if (result) - result = dml_mode_programming(&dml2->v20.dml_core_ctx, min_state, &s->cur_display_config, true); + if (!context->streams[0]->sink->link->dc->caps.is_apu) { + if (min_state_for_g6_temp_read >= 0) + min_state = min_state_for_g6_temp_read > s->mode_support_params.out_lowest_state_idx ? min_state_for_g6_temp_read : s->mode_support_params.out_lowest_state_idx; + else + min_state = s->mode_support_params.out_lowest_state_idx; + } + if (result) { + if (!context->streams[0]->sink->link->dc->caps.is_apu) { + result = dml_mode_programming(&dml2->v20.dml_core_ctx, min_state, &s->cur_display_config, true); + } else { + result = dml_mode_programming(&dml2->v20.dml_core_ctx, s->mode_support_params.out_lowest_state_idx, &s->cur_display_config, true); + } + } return result; } @@ -663,6 +676,8 @@ build_unoptimized_policy_settings(dml2->v20.dml_core_ctx.project, &dml2->v20.dml_core_ctx.policy); map_dc_state_into_dml_display_cfg(dml2, context, &dml2->v20.scratch.cur_display_config); + if (!dml2->config.skip_hw_state_mapping) + dml2_apply_det_buffer_allocation_policy(dml2, &dml2->v20.scratch.cur_display_config); result = pack_and_call_dml_mode_support_ex(dml2, &dml2->v20.scratch.cur_display_config, @@ -703,13 +718,8 @@ return (struct dml2_context *) kzalloc(sizeof(struct dml2_context), GFP_KERNEL); } -bool dml2_create(const struct dc *in_dc, const struct dml2_configuration_options *config, struct dml2_context **dml2) +static void dml2_init(const struct dc *in_dc, const struct dml2_configuration_options *config, struct dml2_context **dml2) { - // Allocate Mode Lib Ctx - *dml2 = dml2_allocate_memory(); - - if (!(*dml2)) - return false; // Store config options (*dml2)->config = *config; @@ -737,9 +747,18 @@ initialize_dml2_soc_bbox(*dml2, in_dc, &(*dml2)->v20.dml_core_ctx.soc); initialize_dml2_soc_states(*dml2, in_dc, &(*dml2)->v20.dml_core_ctx.soc, &(*dml2)->v20.dml_core_ctx.states); +} + +bool dml2_create(const struct dc *in_dc, const struct dml2_configuration_options *config, struct dml2_context **dml2) +{ + // Allocate Mode Lib Ctx + *dml2 = dml2_allocate_memory(); + + if (!(*dml2)) + return false; + + dml2_init(in_dc, config, dml2); - /*Initialize DML20 instance which calls dml2_core_create, and core_dcn3_populate_informative*/ - //dml2_initialize_instance(&(*dml_ctx)->v20.dml_init); return true; } @@ -779,3 +798,11 @@ return true; } + +void dml2_reinit(const struct dc *in_dc, + const struct dml2_configuration_options *config, + struct dml2_context **dml2) +{ + + dml2_init(in_dc, config, dml2); +} --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h @@ -214,6 +214,9 @@ struct dml2_context *src_dml2); bool dml2_create_copy(struct dml2_context **dst_dml2, struct dml2_context *src_dml2); +void dml2_reinit(const struct dc *in_dc, + const struct dml2_configuration_options *config, + struct dml2_context **dml2); /* * dml2_validate - Determines if a display configuration is supported or not. --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c @@ -878,7 +878,7 @@ memset(dsc_cfg, 0, sizeof(struct dc_dsc_config)); - dc_dsc_get_policy_for_timing(timing, options->max_target_bpp_limit_override_x16, &policy); + dc_dsc_get_policy_for_timing(timing, options->max_target_bpp_limit_override_x16, &policy, link_encoding); pic_width = timing->h_addressable + timing->h_border_left + timing->h_border_right; pic_height = timing->v_addressable + timing->v_border_top + timing->v_border_bottom; @@ -1050,7 +1050,12 @@ if (!is_dsc_possible) goto done; - dsc_cfg->num_slices_v = pic_height/slice_height; + if (slice_height > 0) { + dsc_cfg->num_slices_v = pic_height / slice_height; + } else { + is_dsc_possible = false; + goto done; + } if (target_bandwidth_kbps > 0) { is_dsc_possible = decide_dsc_target_bpp_x16( @@ -1146,7 +1151,8 @@ void dc_dsc_get_policy_for_timing(const struct dc_crtc_timing *timing, uint32_t max_target_bpp_limit_override_x16, - struct dc_dsc_policy *policy) + struct dc_dsc_policy *policy, + const enum dc_link_encoding_format link_encoding) { uint32_t bpc = 0; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c @@ -56,7 +56,7 @@ struct dc_context *ctx) { struct gpio_service *service; - uint32_t index_of_id; + int32_t index_of_id; service = kzalloc(sizeof(struct gpio_service), GFP_KERNEL); @@ -112,7 +112,7 @@ return service; failure_2: - while (index_of_id) { + while (index_of_id > 0) { --index_of_id; kfree(service->busyness[index_of_id]); } @@ -239,6 +239,9 @@ enum gpio_id id, uint32_t en) { + if (id == GPIO_ID_UNKNOWN) + return false; + return service->busyness[id][en]; } @@ -247,6 +250,9 @@ enum gpio_id id, uint32_t en) { + if (id == GPIO_ID_UNKNOWN) + return; + service->busyness[id][en] = true; } @@ -255,6 +261,9 @@ enum gpio_id id, uint32_t en) { + if (id == GPIO_ID_UNKNOWN) + return; + service->busyness[id][en] = false; } @@ -263,7 +272,7 @@ enum gpio_id id, uint32_t en) { - if (!service->busyness[id]) { + if (id != GPIO_ID_UNKNOWN && !service->busyness[id]) { ASSERT_CRITICAL(false); return GPIO_RESULT_OPEN_FAILED; } @@ -277,7 +286,7 @@ enum gpio_id id, uint32_t en) { - if (!service->busyness[id]) { + if (id != GPIO_ID_UNKNOWN && !service->busyness[id]) { ASSERT_CRITICAL(false); return GPIO_RESULT_OPEN_FAILED; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/hdcp/hdcp_msg.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/hdcp/hdcp_msg.c @@ -130,13 +130,21 @@ const uint8_t hdcp_i2c_addr_link_primary = 0x3a; /* 0x74 >> 1*/ const uint8_t hdcp_i2c_addr_link_secondary = 0x3b; /* 0x76 >> 1*/ struct i2c_command i2c_command; - uint8_t offset = hdcp_i2c_offsets[message_info->msg_id]; + uint8_t offset; struct i2c_payload i2c_payloads[] = { - { true, 0, 1, &offset }, + { true, 0, 1, 0 }, /* actual hdcp payload, will be filled later, zeroed for now*/ { 0 } }; + if (message_info->msg_id == HDCP_MESSAGE_ID_INVALID) { + DC_LOG_ERROR("%s: Invalid message_info msg_id - %d\n", __func__, message_info->msg_id); + return false; + } + + offset = hdcp_i2c_offsets[message_info->msg_id]; + i2c_payloads[0].data = &offset; + switch (message_info->link) { case HDCP_LINK_SECONDARY: i2c_payloads[0].address = hdcp_i2c_addr_link_secondary; @@ -310,6 +318,11 @@ struct dc_link *link, struct hdcp_protection_message *message_info) { + if (message_info->msg_id == HDCP_MESSAGE_ID_INVALID) { + DC_LOG_ERROR("%s: Invalid message_info msg_id - %d\n", __func__, message_info->msg_id); + return false; + } + return dpcd_access_helper( link, message_info->length, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c @@ -57,6 +57,7 @@ #include "panel_cntl.h" #include "dc_state_priv.h" #include "dpcd_defs.h" +#include "dsc.h" /* include DCE11 register header files */ #include "dce/dce_11_0_d.h" #include "dce/dce_11_0_sh_mask.h" @@ -957,7 +958,7 @@ { struct dc_context *ctx = link->ctx; struct bp_transmitter_control cntl = { 0 }; - uint8_t pwrseq_instance; + uint8_t pwrseq_instance = 0; unsigned int pre_T11_delay = OLED_PRE_T11_DELAY; unsigned int post_T7_delay = OLED_POST_T7_DELAY; @@ -1010,7 +1011,8 @@ */ /* dc_service_sleep_in_milliseconds(50); */ /*edp 1.2*/ - pwrseq_instance = link->panel_cntl->pwrseq_inst; + if (link->panel_cntl) + pwrseq_instance = link->panel_cntl->pwrseq_inst; if (cntl.action == TRANSMITTER_CONTROL_BACKLIGHT_ON) { if (!link->dc->config.edp_no_power_sequencing) @@ -1185,7 +1187,8 @@ if (dccg) { dccg->funcs->disable_symclk32_se(dccg, dp_hpo_inst); dccg->funcs->set_dpstreamclk(dccg, REFCLK, tg->inst, dp_hpo_inst); - dccg->funcs->set_dtbclk_dto(dccg, &dto_params); + if (dccg && dccg->funcs->set_dtbclk_dto) + dccg->funcs->set_dtbclk_dto(dccg, &dto_params); } } else if (dccg && dccg->funcs->disable_symclk_se) { dccg->funcs->disable_symclk_se(dccg, stream_enc->stream_enc_inst, @@ -1726,6 +1729,48 @@ } } +static void clean_up_dsc_blocks(struct dc *dc) +{ + struct display_stream_compressor *dsc = NULL; + struct timing_generator *tg = NULL; + struct stream_encoder *se = NULL; + struct dccg *dccg = dc->res_pool->dccg; + struct pg_cntl *pg_cntl = dc->res_pool->pg_cntl; + int i; + + if (dc->ctx->dce_version != DCN_VERSION_3_5 && + dc->ctx->dce_version != DCN_VERSION_3_51) + return; + + for (i = 0; i < dc->res_pool->res_cap->num_dsc; i++) { + struct dcn_dsc_state s = {0}; + + dsc = dc->res_pool->dscs[i]; + dsc->funcs->dsc_read_state(dsc, &s); + if (s.dsc_fw_en) { + /* disable DSC in OPTC */ + if (i < dc->res_pool->timing_generator_count) { + tg = dc->res_pool->timing_generators[i]; + tg->funcs->set_dsc_config(tg, OPTC_DSC_DISABLED, 0, 0); + } + /* disable DSC in stream encoder */ + if (i < dc->res_pool->stream_enc_count) { + se = dc->res_pool->stream_enc[i]; + se->funcs->dp_set_dsc_config(se, OPTC_DSC_DISABLED, 0, 0); + se->funcs->dp_set_dsc_pps_info_packet(se, false, NULL, true); + } + /* disable DSC block */ + if (dccg->funcs->set_ref_dscclk) + dccg->funcs->set_ref_dscclk(dccg, dsc->inst); + dsc->funcs->dsc_disable(dsc); + + /* power down DSC */ + if (pg_cntl != NULL) + pg_cntl->funcs->dsc_pg_control(pg_cntl, dsc->inst, false); + } + } +} + /* * When ASIC goes from VBIOS/VGA mode to driver/accelerated mode we need: * 1. Power down all DC HW blocks @@ -1810,6 +1855,13 @@ clk_mgr_exit_optimized_pwr_state(dc, dc->clk_mgr); power_down_all_hw_blocks(dc); + + /* DSC could be enabled on eDP during VBIOS post. + * To clean up dsc blocks if eDP is in link but not active. + */ + if (edp_link_with_sink && (edp_stream_num == 0)) + clean_up_dsc_blocks(dc); + disable_vga_and_power_gate_all_controllers(dc); if (edp_link_with_sink && !keep_edp_vdd_on) dc->hwss.edp_power_control(edp_link_with_sink, false); @@ -1928,13 +1980,20 @@ * as well. */ for (i = 0; i < num_pipes; i++) { - pipe_ctx[i]->stream_res.tg->funcs->set_drr( - pipe_ctx[i]->stream_res.tg, ¶ms); + /* dc_state_destruct() might null the stream resources, so fetch tg + * here first to avoid a race condition. The lifetime of the pointee + * itself (the timing_generator object) is not a problem here. + */ + struct timing_generator *tg = pipe_ctx[i]->stream_res.tg; - if (adjust.v_total_max != 0 && adjust.v_total_min != 0) - pipe_ctx[i]->stream_res.tg->funcs->set_static_screen_control( - pipe_ctx[i]->stream_res.tg, - event_triggers, num_frames); + if ((tg != NULL) && tg->funcs) { + if (tg->funcs->set_drr) + tg->funcs->set_drr(tg, ¶ms); + if (adjust.v_total_max != 0 && adjust.v_total_min != 0) + if (tg->funcs->set_static_screen_control) + tg->funcs->set_static_screen_control( + tg, event_triggers, num_frames); + } } } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c @@ -1246,6 +1246,7 @@ if (hws->funcs.hubp_pg_control) hws->funcs.hubp_pg_control(hws, hubp->inst, false); + hubp->funcs->hubp_reset(hubp); dpp->funcs->dpp_reset(dpp); REG_SET(DC_IP_REQUEST_CNTL, 0, @@ -1403,6 +1404,7 @@ /* Disable on the current state so the new one isn't cleared. */ pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; + hubp->funcs->hubp_reset(hubp); dpp->funcs->dpp_reset(dpp); pipe_ctx->stream_res.tg = tg; @@ -1497,7 +1499,7 @@ dc->clk_mgr->funcs->init_clocks(dc->clk_mgr); /* Align bw context with hw config when system resume. */ - if (dc->clk_mgr->clks.dispclk_khz != 0 && dc->clk_mgr->clks.dppclk_khz != 0) { + if (dc->clk_mgr && dc->clk_mgr->clks.dispclk_khz != 0 && dc->clk_mgr->clks.dppclk_khz != 0) { dc->current_state->bw_ctx.bw.dcn.clk.dispclk_khz = dc->clk_mgr->clks.dispclk_khz; dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz = dc->clk_mgr->clks.dppclk_khz; } @@ -1617,7 +1619,7 @@ REG_UPDATE(DCFCLK_CNTL, DCFCLK_GATE_DIS, 0); } - if (dc->clk_mgr->funcs->notify_wm_ranges) + if (dc->clk_mgr && dc->clk_mgr->funcs->notify_wm_ranges) dc->clk_mgr->funcs->notify_wm_ranges(dc->clk_mgr); } @@ -1840,6 +1842,9 @@ { struct dpp *dpp = pipe_ctx->plane_res.dpp; + if (!stream) + return false; + if (dpp == NULL) return false; @@ -1862,8 +1867,8 @@ } else dpp->funcs->dpp_program_regamma_pwl(dpp, NULL, OPP_REGAMMA_BYPASS); - if (stream != NULL && stream->ctx != NULL && - stream->out_transfer_func != NULL) { + if (stream->ctx && + stream->out_transfer_func) { log_tf(stream->ctx, stream->out_transfer_func, dpp->regamma_params.hw_points_num); @@ -3076,7 +3081,7 @@ context, false); - dc->wm_optimized_required = hubbub->funcs->program_watermarks(hubbub, + dc->optimized_required |= hubbub->funcs->program_watermarks(hubbub, &context->bw_ctx.bw.dcn.watermarks, dc->res_pool->ref_clocks.dchub_ref_clock_inKhz / 1000, true); @@ -3153,15 +3158,19 @@ * as well. */ for (i = 0; i < num_pipes; i++) { - if ((pipe_ctx[i]->stream_res.tg != NULL) && pipe_ctx[i]->stream_res.tg->funcs) { - if (pipe_ctx[i]->stream_res.tg->funcs->set_drr) - pipe_ctx[i]->stream_res.tg->funcs->set_drr( - pipe_ctx[i]->stream_res.tg, ¶ms); + /* dc_state_destruct() might null the stream resources, so fetch tg + * here first to avoid a race condition. The lifetime of the pointee + * itself (the timing_generator object) is not a problem here. + */ + struct timing_generator *tg = pipe_ctx[i]->stream_res.tg; + + if ((tg != NULL) && tg->funcs) { + if (tg->funcs->set_drr) + tg->funcs->set_drr(tg, ¶ms); if (adjust.v_total_max != 0 && adjust.v_total_min != 0) - if (pipe_ctx[i]->stream_res.tg->funcs->set_static_screen_control) - pipe_ctx[i]->stream_res.tg->funcs->set_static_screen_control( - pipe_ctx[i]->stream_res.tg, - event_triggers, num_frames); + if (tg->funcs->set_static_screen_control) + tg->funcs->set_static_screen_control( + tg, event_triggers, num_frames); } } } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c @@ -934,7 +934,8 @@ /* * if above if is not executed then 'params' equal to 0 and set in bypass */ - mpc->funcs->set_output_gamma(mpc, mpcc_id, params); + if (mpc->funcs->set_output_gamma) + mpc->funcs->set_output_gamma(mpc, mpcc_id, params); return true; } @@ -1392,6 +1393,11 @@ return; } + if (resource_is_pipe_type(new_pipe, OTG_MASTER) && + resource_is_odm_topology_changed(new_pipe, old_pipe)) + /* Detect odm changes */ + new_pipe->update_flags.bits.odm = 1; + /* Exit on unchanged, unused pipe */ if (!old_pipe->plane_state && !new_pipe->plane_state) return; @@ -1445,10 +1451,6 @@ /* Detect top pipe only changes */ if (resource_is_pipe_type(new_pipe, OTG_MASTER)) { - /* Detect odm changes */ - if (resource_is_odm_topology_changed(new_pipe, old_pipe)) - new_pipe->update_flags.bits.odm = 1; - /* Detect global sync changes */ if (old_pipe->pipe_dlg_param.vready_offset != new_pipe->pipe_dlg_param.vready_offset || old_pipe->pipe_dlg_param.vstartup_start != new_pipe->pipe_dlg_param.vstartup_start @@ -1812,17 +1814,26 @@ dc->res_pool->hubbub->funcs->program_det_size( dc->res_pool->hubbub, pipe_ctx->plane_res.hubp->inst, pipe_ctx->det_buffer_size_kb); - if (pipe_ctx->update_flags.raw || pipe_ctx->plane_state->update_flags.raw || pipe_ctx->stream->update_flags.raw) + if (pipe_ctx->plane_state && (pipe_ctx->update_flags.raw || + pipe_ctx->plane_state->update_flags.raw || + pipe_ctx->stream->update_flags.raw)) dcn20_update_dchubp_dpp(dc, pipe_ctx, context); - if (pipe_ctx->update_flags.bits.enable - || pipe_ctx->plane_state->update_flags.bits.hdr_mult) + if (pipe_ctx->update_flags.bits.enable || + (pipe_ctx->plane_state && pipe_ctx->plane_state->update_flags.bits.hdr_mult)) hws->funcs.set_hdr_multiplier(pipe_ctx); - if (pipe_ctx->update_flags.bits.enable || - pipe_ctx->plane_state->update_flags.bits.in_transfer_func_change || - pipe_ctx->plane_state->update_flags.bits.gamma_change || - pipe_ctx->plane_state->update_flags.bits.lut_3d) + if ((pipe_ctx->plane_state && pipe_ctx->plane_state->update_flags.bits.hdr_mult) || + pipe_ctx->update_flags.bits.enable) + hws->funcs.set_hdr_multiplier(pipe_ctx); + + if ((pipe_ctx->plane_state && + pipe_ctx->plane_state->update_flags.bits.in_transfer_func_change) || + (pipe_ctx->plane_state && + pipe_ctx->plane_state->update_flags.bits.gamma_change) || + (pipe_ctx->plane_state && + pipe_ctx->plane_state->update_flags.bits.lut_3d) || + pipe_ctx->update_flags.bits.enable) hws->funcs.set_input_transfer_func(dc, pipe_ctx, pipe_ctx->plane_state); /* dcn10_translate_regamma_to_hw_format takes 750us to finish @@ -1832,7 +1843,8 @@ if (pipe_ctx->update_flags.bits.enable || pipe_ctx->update_flags.bits.plane_changed || pipe_ctx->stream->update_flags.bits.out_tf || - pipe_ctx->plane_state->update_flags.bits.output_tf_change) + (pipe_ctx->plane_state && + pipe_ctx->plane_state->update_flags.bits.output_tf_change)) hws->funcs.set_output_transfer_func(dc, pipe_ctx, pipe_ctx->stream); /* If the pipe has been enabled or has a different opp, we @@ -1856,7 +1868,7 @@ } /* Set ABM pipe after other pipe configurations done */ - if (pipe_ctx->plane_state->visible) { + if ((pipe_ctx->plane_state && pipe_ctx->plane_state->visible)) { if (pipe_ctx->stream_res.abm) { dc->hwss.set_pipe(pipe_ctx); pipe_ctx->stream_res.abm->funcs->set_abm_level(pipe_ctx->stream_res.abm, @@ -1891,19 +1903,20 @@ DC_LOGGER_INIT(dc->ctx->logger); unsigned int prev_hubp_count = 0; unsigned int hubp_count = 0; + struct pipe_ctx *pipe; if (resource_is_pipe_topology_changed(dc->current_state, context)) resource_log_pipe_topology_update(dc, context); if (dc->hwss.program_triplebuffer != NULL && dc->debug.enable_tri_buf) { for (i = 0; i < dc->res_pool->pipe_count; i++) { - struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; + pipe = &context->res_ctx.pipe_ctx[i]; - if (!pipe_ctx->top_pipe && !pipe_ctx->prev_odm_pipe && pipe_ctx->plane_state) { - ASSERT(!pipe_ctx->plane_state->triplebuffer_flips); + if (!pipe->top_pipe && !pipe->prev_odm_pipe && pipe->plane_state) { + ASSERT(!pipe->plane_state->triplebuffer_flips); /*turn off triple buffer for full update*/ dc->hwss.program_triplebuffer( - dc, pipe_ctx, pipe_ctx->plane_state->triplebuffer_flips); + dc, pipe, pipe->plane_state->triplebuffer_flips); } } } @@ -1978,12 +1991,22 @@ DC_LOG_DC("Reset mpcc for pipe %d\n", dc->current_state->res_ctx.pipe_ctx[i].pipe_idx); } + /* update ODM for blanked OTG master pipes */ + for (i = 0; i < dc->res_pool->pipe_count; i++) { + pipe = &context->res_ctx.pipe_ctx[i]; + if (resource_is_pipe_type(pipe, OTG_MASTER) && + !resource_is_pipe_type(pipe, DPP_PIPE) && + pipe->update_flags.bits.odm && + hws->funcs.update_odm) + hws->funcs.update_odm(dc, context, pipe); + } + /* * Program all updated pipes, order matters for mpcc setup. Start with * top pipe and program all pipes that follow in order */ for (i = 0; i < dc->res_pool->pipe_count; i++) { - struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; + pipe = &context->res_ctx.pipe_ctx[i]; if (pipe->plane_state && !pipe->top_pipe) { while (pipe) { @@ -2022,17 +2045,6 @@ context->stream_status[0].plane_count > 1) { pipe->plane_res.hubp->funcs->hubp_wait_pipe_read_start(pipe->plane_res.hubp); } - - /* when dynamic ODM is active, pipes must be reconfigured when all planes are - * disabled, as some transitions will leave software and hardware state - * mismatched. - */ - if (dc->debug.enable_single_display_2to1_odm_policy && - pipe->stream && - pipe->update_flags.bits.disable && - !pipe->prev_odm_pipe && - hws->funcs.update_odm) - hws->funcs.update_odm(dc, context, pipe); } } @@ -2097,6 +2109,9 @@ } } + if (!hwseq) + return; + /* P-State support transitions: * Natural -> FPO: P-State disabled in prepare, force disallow anytime is safe * FPO -> Natural: Unforce anytime after FW disable is safe (P-State will assert naturally) @@ -2104,7 +2119,7 @@ * FPO -> Unsupported: P-State disabled in prepare, unforce disallow anytime is safe * FPO <-> SubVP: Force disallow is maintained on the FPO / SubVP pipes */ - if (hwseq && hwseq->funcs.update_force_pstate) + if (hwseq->funcs.update_force_pstate) dc->hwseq->funcs.update_force_pstate(dc, context); /* Only program the MALL registers after all the main and phantom pipes @@ -2159,10 +2174,10 @@ } /* program dchubbub watermarks: - * For assigning wm_optimized_required, use |= operator since we don't want + * For assigning optimized_required, use |= operator since we don't want * to clear the value if the optimize has not happened yet */ - dc->wm_optimized_required |= hubbub->funcs->program_watermarks(hubbub, + dc->optimized_required |= hubbub->funcs->program_watermarks(hubbub, &context->bw_ctx.bw.dcn.watermarks, dc->res_pool->ref_clocks.dchub_ref_clock_inKhz / 1000, false); @@ -2175,10 +2190,10 @@ if (hubbub->funcs->program_compbuf_size) { if (context->bw_ctx.dml.ip.min_comp_buffer_size_kbytes) { compbuf_size_kb = context->bw_ctx.dml.ip.min_comp_buffer_size_kbytes; - dc->wm_optimized_required |= (compbuf_size_kb != dc->current_state->bw_ctx.dml.ip.min_comp_buffer_size_kbytes); + dc->optimized_required |= (compbuf_size_kb != dc->current_state->bw_ctx.dml.ip.min_comp_buffer_size_kbytes); } else { compbuf_size_kb = context->bw_ctx.bw.dcn.compbuf_size_kb; - dc->wm_optimized_required |= (compbuf_size_kb != dc->current_state->bw_ctx.bw.dcn.compbuf_size_kb); + dc->optimized_required |= (compbuf_size_kb != dc->current_state->bw_ctx.bw.dcn.compbuf_size_kb); } hubbub->funcs->program_compbuf_size(hubbub, compbuf_size_kb, false); @@ -2343,8 +2358,11 @@ { int counter; + if (!opp) + return false; + for (counter = 0; counter < 1000; counter++) { - if (opp->funcs->dpg_is_blanked(opp)) + if (!opp->funcs->dpg_is_pending(opp)) break; udelay(100); @@ -2355,7 +2373,7 @@ return false; } - return true; + return opp->funcs->dpg_is_blanked(opp); } bool dcn20_dmdata_status_done(struct pipe_ctx *pipe_ctx) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c @@ -95,8 +95,11 @@ } else if (hwseq->fb_offset.quad_part <= addr->quad_part && addr->quad_part <= hwseq->uma_top.quad_part) { is_in_uma = true; + } else if (addr->quad_part == 0) { + is_in_uma = false; } else { is_in_uma = false; + BREAK_TO_DEBUGGER(); } return is_in_uma; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c @@ -142,7 +142,7 @@ { union dmub_rb_cmd cmd; struct dc_context *dc = abm->ctx; - uint32_t ramping_boundary = 0xFFFF; + uint8_t ramping_boundary = 0xFF; memset(&cmd, 0, sizeof(cmd)); cmd.abm_set_pipe.header.type = DMUB_CMD__ABM; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c @@ -251,7 +251,11 @@ } } - mpc->funcs->set_output_gamma(mpc, mpcc_id, params); + if (mpc->funcs->set_output_gamma) + mpc->funcs->set_output_gamma(mpc, mpcc_id, params); + else + DC_LOG_ERROR("%s: set_output_gamma function pointer is NULL.\n", __func__); + return ret; } @@ -478,7 +482,7 @@ uint32_t backlight = MAX_BACKLIGHT_LEVEL; uint32_t user_level = MAX_BACKLIGHT_LEVEL; - if (dc->clk_mgr && dc->clk_mgr->funcs->init_clocks) + if (dc->clk_mgr && dc->clk_mgr->funcs && dc->clk_mgr->funcs->init_clocks) dc->clk_mgr->funcs->init_clocks(dc->clk_mgr); // Initialize the dccg @@ -639,11 +643,12 @@ if (!dcb->funcs->is_accelerated_mode(dcb) && dc->res_pool->hubbub->funcs->init_watermarks) dc->res_pool->hubbub->funcs->init_watermarks(dc->res_pool->hubbub); - if (dc->clk_mgr->funcs->notify_wm_ranges) + if (dc->clk_mgr && dc->clk_mgr->funcs && dc->clk_mgr->funcs->notify_wm_ranges) dc->clk_mgr->funcs->notify_wm_ranges(dc->clk_mgr); //if softmax is enabled then hardmax will be set by a different call - if (dc->clk_mgr->funcs->set_hard_max_memclk && !dc->clk_mgr->dc_mode_softmax_enabled) + if (dc->clk_mgr && dc->clk_mgr->funcs && dc->clk_mgr->funcs->set_hard_max_memclk && + !dc->clk_mgr->dc_mode_softmax_enabled) dc->clk_mgr->funcs->set_hard_max_memclk(dc->clk_mgr); if (dc->res_pool->hubbub->funcs->force_pstate_change_control) @@ -663,10 +668,20 @@ if (pipe_ctx == NULL) return; - if (dc_is_hdmi_signal(pipe_ctx->stream->signal) && pipe_ctx->stream_res.stream_enc != NULL) + if (dc_is_hdmi_signal(pipe_ctx->stream->signal) && pipe_ctx->stream_res.stream_enc != NULL) { pipe_ctx->stream_res.stream_enc->funcs->set_avmute( pipe_ctx->stream_res.stream_enc, enable); + + /* Wait for two frame to make sure AV mute is sent out */ + if (enable) { + pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, CRTC_STATE_VACTIVE); + pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, CRTC_STATE_VBLANK); + pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, CRTC_STATE_VACTIVE); + pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, CRTC_STATE_VBLANK); + pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, CRTC_STATE_VACTIVE); + } + } } void dcn30_update_info_frame(struct pipe_ctx *pipe_ctx) @@ -765,6 +780,9 @@ stream = dc->current_state->streams[0]; plane = (stream ? dc->current_state->stream_status[0].plane_states[0] : NULL); + if (!stream || !plane) + return false; + if (stream && plane) { cursor_cache_enable = stream->cursor_position.enable && plane->address.grph.cursor_cache_addr.quad_part; @@ -883,7 +901,7 @@ /* Use copied cursor, and it's okay to not switch back */ cursor_attr.address.quad_part = cmd.mall.cursor_copy_dst.quad_part; - dc_stream_set_cursor_attributes(stream, &cursor_attr); + dc_stream_program_cursor_attributes(stream, &cursor_attr); } /* Enable MALL */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c @@ -258,10 +258,10 @@ if (!dcb->funcs->is_accelerated_mode(dcb) && dc->res_pool->hubbub->funcs->init_watermarks) dc->res_pool->hubbub->funcs->init_watermarks(dc->res_pool->hubbub); - if (dc->clk_mgr->funcs->notify_wm_ranges) + if (dc->clk_mgr && dc->clk_mgr->funcs->notify_wm_ranges) dc->clk_mgr->funcs->notify_wm_ranges(dc->clk_mgr); - if (dc->clk_mgr->funcs->set_hard_max_memclk && !dc->clk_mgr->dc_mode_softmax_enabled) + if (dc->clk_mgr && dc->clk_mgr->funcs->set_hard_max_memclk && !dc->clk_mgr->dc_mode_softmax_enabled) dc->clk_mgr->funcs->set_hard_max_memclk(dc->clk_mgr); if (dc->res_pool->hubbub->funcs->force_pstate_change_control) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c @@ -69,29 +69,6 @@ #define FN(reg_name, field_name) \ hws->shifts->field_name, hws->masks->field_name -static int calc_mpc_flow_ctrl_cnt(const struct dc_stream_state *stream, - int opp_cnt) -{ - bool hblank_halved = optc2_is_two_pixels_per_containter(&stream->timing); - int flow_ctrl_cnt; - - if (opp_cnt >= 2) - hblank_halved = true; - - flow_ctrl_cnt = stream->timing.h_total - stream->timing.h_addressable - - stream->timing.h_border_left - - stream->timing.h_border_right; - - if (hblank_halved) - flow_ctrl_cnt /= 2; - - /* ODM combine 4:1 case */ - if (opp_cnt == 4) - flow_ctrl_cnt /= 2; - - return flow_ctrl_cnt; -} - static void update_dsc_on_stream(struct pipe_ctx *pipe_ctx, bool enable) { struct display_stream_compressor *dsc = pipe_ctx->stream_res.dsc; @@ -183,10 +160,6 @@ struct pipe_ctx *odm_pipe; int opp_cnt = 0; int opp_inst[MAX_PIPES] = {0}; - bool rate_control_2x_pclk = (pipe_ctx->stream->timing.flags.INTERLACE || optc2_is_two_pixels_per_containter(&pipe_ctx->stream->timing)); - struct mpc_dwb_flow_control flow_control; - struct mpc *mpc = dc->res_pool->mpc; - int i; opp_cnt = get_odm_config(pipe_ctx, opp_inst); @@ -199,20 +172,6 @@ pipe_ctx->stream_res.tg->funcs->set_odm_bypass( pipe_ctx->stream_res.tg, &pipe_ctx->stream->timing); - rate_control_2x_pclk = rate_control_2x_pclk || opp_cnt > 1; - flow_control.flow_ctrl_mode = 0; - flow_control.flow_ctrl_cnt0 = 0x80; - flow_control.flow_ctrl_cnt1 = calc_mpc_flow_ctrl_cnt(pipe_ctx->stream, opp_cnt); - if (mpc->funcs->set_out_rate_control) { - for (i = 0; i < opp_cnt; ++i) { - mpc->funcs->set_out_rate_control( - mpc, opp_inst[i], - true, - rate_control_2x_pclk, - &flow_control); - } - } - for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { odm_pipe->stream_res.opp->funcs->opp_pipe_clock_control( odm_pipe->stream_res.opp, @@ -402,7 +361,9 @@ if (pipe->top_pipe || pipe->prev_odm_pipe) continue; - if (pipe->stream && (pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal))) { + if (pipe->stream && (pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal)) && + !pipe->stream->apply_seamless_boot_optimization && + !pipe->stream->apply_edp_fast_boot_optimization) { pipe->stream_res.tg->funcs->disable_crtc(pipe->stream_res.tg); reset_sync_context_for_pipe(dc, context, i); otg_disabled[i] = true; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c @@ -584,7 +584,9 @@ } } - mpc->funcs->set_output_gamma(mpc, mpcc_id, params); + if (mpc->funcs->set_output_gamma) + mpc->funcs->set_output_gamma(mpc, mpcc_id, params); + return ret; } @@ -755,7 +757,7 @@ uint32_t backlight = MAX_BACKLIGHT_LEVEL; uint32_t user_level = MAX_BACKLIGHT_LEVEL; - if (dc->clk_mgr && dc->clk_mgr->funcs->init_clocks) + if (dc->clk_mgr && dc->clk_mgr->funcs && dc->clk_mgr->funcs->init_clocks) dc->clk_mgr->funcs->init_clocks(dc->clk_mgr); // Initialize the dccg @@ -934,10 +936,11 @@ if (!dcb->funcs->is_accelerated_mode(dcb) && dc->res_pool->hubbub->funcs->init_watermarks) dc->res_pool->hubbub->funcs->init_watermarks(dc->res_pool->hubbub); - if (dc->clk_mgr->funcs->notify_wm_ranges) + if (dc->clk_mgr && dc->clk_mgr->funcs && dc->clk_mgr->funcs->notify_wm_ranges) dc->clk_mgr->funcs->notify_wm_ranges(dc->clk_mgr); - if (dc->clk_mgr->funcs->set_hard_max_memclk && !dc->clk_mgr->dc_mode_softmax_enabled) + if (dc->clk_mgr && dc->clk_mgr->funcs && dc->clk_mgr->funcs->set_hard_max_memclk && + !dc->clk_mgr->dc_mode_softmax_enabled) dc->clk_mgr->funcs->set_hard_max_memclk(dc->clk_mgr); if (dc->res_pool->hubbub->funcs->force_pstate_change_control) @@ -966,29 +969,6 @@ } } -static int calc_mpc_flow_ctrl_cnt(const struct dc_stream_state *stream, - int opp_cnt) -{ - bool hblank_halved = optc2_is_two_pixels_per_containter(&stream->timing); - int flow_ctrl_cnt; - - if (opp_cnt >= 2) - hblank_halved = true; - - flow_ctrl_cnt = stream->timing.h_total - stream->timing.h_addressable - - stream->timing.h_border_left - - stream->timing.h_border_right; - - if (hblank_halved) - flow_ctrl_cnt /= 2; - - /* ODM combine 4:1 case */ - if (opp_cnt == 4) - flow_ctrl_cnt /= 2; - - return flow_ctrl_cnt; -} - static void update_dsc_on_stream(struct pipe_ctx *pipe_ctx, bool enable) { struct display_stream_compressor *dsc = pipe_ctx->stream_res.dsc; @@ -1017,6 +997,20 @@ struct dsc_config dsc_cfg; struct dsc_optc_config dsc_optc_cfg; enum optc_dsc_mode optc_dsc_mode; + struct dcn_dsc_state dsc_state = {0}; + + if (!dsc) { + DC_LOG_DSC("DSC is NULL for tg instance %d:", pipe_ctx->stream_res.tg->inst); + return; + } + + if (dsc->funcs->dsc_read_state) { + dsc->funcs->dsc_read_state(dsc, &dsc_state); + if (!dsc_state.dsc_fw_en) { + DC_LOG_DSC("DSC has been disabled for tg instance %d:", pipe_ctx->stream_res.tg->inst); + return; + } + } /* Enable DSC hw block */ dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.h_border_right) / opp_cnt; @@ -1103,10 +1097,6 @@ struct pipe_ctx *odm_pipe; int opp_cnt = 0; int opp_inst[MAX_PIPES] = {0}; - bool rate_control_2x_pclk = (pipe_ctx->stream->timing.flags.INTERLACE || optc2_is_two_pixels_per_containter(&pipe_ctx->stream->timing)); - struct mpc_dwb_flow_control flow_control; - struct mpc *mpc = dc->res_pool->mpc; - int i; opp_cnt = get_odm_config(pipe_ctx, opp_inst); @@ -1119,20 +1109,6 @@ pipe_ctx->stream_res.tg->funcs->set_odm_bypass( pipe_ctx->stream_res.tg, &pipe_ctx->stream->timing); - rate_control_2x_pclk = rate_control_2x_pclk || opp_cnt > 1; - flow_control.flow_ctrl_mode = 0; - flow_control.flow_ctrl_cnt0 = 0x80; - flow_control.flow_ctrl_cnt1 = calc_mpc_flow_ctrl_cnt(pipe_ctx->stream, opp_cnt); - if (mpc->funcs->set_out_rate_control) { - for (i = 0; i < opp_cnt; ++i) { - mpc->funcs->set_out_rate_control( - mpc, opp_inst[i], - true, - rate_control_2x_pclk, - &flow_control); - } - } - for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { odm_pipe->stream_res.opp->funcs->opp_pipe_clock_control( odm_pipe->stream_res.opp, @@ -1156,6 +1132,13 @@ dsc->funcs->dsc_disconnect(dsc); } } + + if (!resource_is_pipe_type(pipe_ctx, DPP_PIPE)) + /* + * blank pattern is generated by OPP, reprogram blank pattern + * due to OPP count change + */ + dc->hwseq->funcs.blank_pixel_data(dc, pipe_ctx, true); } unsigned int dcn32_calculate_dccg_k1_k2_values(struct pipe_ctx *pipe_ctx, unsigned int *k1_div, unsigned int *k2_div) @@ -1778,3 +1761,26 @@ context->bw_ctx.bw.dcn.clk.p_state_change_support = p_state_change_support; } } + +void dcn32_interdependent_update_lock(struct dc *dc, + struct dc_state *context, bool lock) +{ + unsigned int i; + struct pipe_ctx *pipe; + struct timing_generator *tg; + + for (i = 0; i < dc->res_pool->pipe_count; i++) { + pipe = &context->res_ctx.pipe_ctx[i]; + tg = pipe->stream_res.tg; + + if (!resource_is_pipe_type(pipe, OTG_MASTER) || + !tg->funcs->is_tg_enabled(tg) || + dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_PHANTOM) + continue; + + if (lock) + dc->hwss.pipe_control_lock(dc, pipe, true); + else + dc->hwss.pipe_control_lock(dc, pipe, false); + } +} --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.h @@ -129,4 +129,6 @@ void dcn32_prepare_bandwidth(struct dc *dc, struct dc_state *context); +void dcn32_interdependent_update_lock(struct dc *dc, + struct dc_state *context, bool lock); #endif /* __DC_HWSS_DCN32_H__ */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_init.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_init.c @@ -58,7 +58,7 @@ .disable_plane = dcn20_disable_plane, .disable_pixel_data = dcn20_disable_pixel_data, .pipe_control_lock = dcn20_pipe_control_lock, - .interdependent_update_lock = dcn10_lock_all_pipes, + .interdependent_update_lock = dcn32_interdependent_update_lock, .cursor_lock = dcn10_cursor_lock, .prepare_bandwidth = dcn32_prepare_bandwidth, .optimize_bandwidth = dcn20_optimize_bandwidth, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c @@ -235,7 +235,7 @@ if (hws->funcs.enable_power_gating_plane) hws->funcs.enable_power_gating_plane(dc->hwseq, true); */ - if (res_pool->hubbub->funcs->dchubbub_init) + if (res_pool->hubbub && res_pool->hubbub->funcs->dchubbub_init) res_pool->hubbub->funcs->dchubbub_init(dc->res_pool->hubbub); /* If taking control over from VBIOS, we may want to optimize our first * mode set, so we need to skip powering down pipes until we know which @@ -267,7 +267,8 @@ } hws->funcs.init_pipes(dc, dc->current_state); - if (dc->res_pool->hubbub->funcs->allow_self_refresh_control) + if (dc->res_pool->hubbub->funcs->allow_self_refresh_control && + !dc->res_pool->hubbub->ctx->dc->debug.disable_stutter) dc->res_pool->hubbub->funcs->allow_self_refresh_control(dc->res_pool->hubbub, !dc->res_pool->hubbub->ctx->dc->debug.disable_stutter); } @@ -328,10 +329,10 @@ if (!dcb->funcs->is_accelerated_mode(dcb) && dc->res_pool->hubbub->funcs->init_watermarks) dc->res_pool->hubbub->funcs->init_watermarks(dc->res_pool->hubbub); - if (dc->clk_mgr->funcs->notify_wm_ranges) + if (dc->clk_mgr && dc->clk_mgr->funcs->notify_wm_ranges) dc->clk_mgr->funcs->notify_wm_ranges(dc->clk_mgr); - if (dc->clk_mgr->funcs->set_hard_max_memclk && !dc->clk_mgr->dc_mode_softmax_enabled) + if (dc->clk_mgr && dc->clk_mgr->funcs->set_hard_max_memclk && !dc->clk_mgr->dc_mode_softmax_enabled) dc->clk_mgr->funcs->set_hard_max_memclk(dc->clk_mgr); @@ -358,29 +359,6 @@ } } -static int calc_mpc_flow_ctrl_cnt(const struct dc_stream_state *stream, - int opp_cnt) -{ - bool hblank_halved = optc2_is_two_pixels_per_containter(&stream->timing); - int flow_ctrl_cnt; - - if (opp_cnt >= 2) - hblank_halved = true; - - flow_ctrl_cnt = stream->timing.h_total - stream->timing.h_addressable - - stream->timing.h_border_left - - stream->timing.h_border_right; - - if (hblank_halved) - flow_ctrl_cnt /= 2; - - /* ODM combine 4:1 case */ - if (opp_cnt == 4) - flow_ctrl_cnt /= 2; - - return flow_ctrl_cnt; -} - static void update_dsc_on_stream(struct pipe_ctx *pipe_ctx, bool enable) { struct display_stream_compressor *dsc = pipe_ctx->stream_res.dsc; @@ -398,7 +376,20 @@ struct dsc_config dsc_cfg; struct dsc_optc_config dsc_optc_cfg; enum optc_dsc_mode optc_dsc_mode; + struct dcn_dsc_state dsc_state = {0}; + + if (!dsc) { + DC_LOG_DSC("DSC is NULL for tg instance %d:", pipe_ctx->stream_res.tg->inst); + return; + } + if (dsc->funcs->dsc_read_state) { + dsc->funcs->dsc_read_state(dsc, &dsc_state); + if (!dsc_state.dsc_fw_en) { + DC_LOG_DSC("DSC has been disabled for tg instance %d:", pipe_ctx->stream_res.tg->inst); + return; + } + } /* Enable DSC hw block */ dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.h_border_right) / opp_cnt; dsc_cfg.pic_height = stream->timing.v_addressable + stream->timing.v_border_top + stream->timing.v_border_bottom; @@ -474,10 +465,6 @@ struct pipe_ctx *odm_pipe; int opp_cnt = 0; int opp_inst[MAX_PIPES] = {0}; - bool rate_control_2x_pclk = (pipe_ctx->stream->timing.flags.INTERLACE || optc2_is_two_pixels_per_containter(&pipe_ctx->stream->timing)); - struct mpc_dwb_flow_control flow_control; - struct mpc *mpc = dc->res_pool->mpc; - int i; opp_cnt = get_odm_config(pipe_ctx, opp_inst); @@ -490,20 +477,6 @@ pipe_ctx->stream_res.tg->funcs->set_odm_bypass( pipe_ctx->stream_res.tg, &pipe_ctx->stream->timing); - rate_control_2x_pclk = rate_control_2x_pclk || opp_cnt > 1; - flow_control.flow_ctrl_mode = 0; - flow_control.flow_ctrl_cnt0 = 0x80; - flow_control.flow_ctrl_cnt1 = calc_mpc_flow_ctrl_cnt(pipe_ctx->stream, opp_cnt); - if (mpc->funcs->set_out_rate_control) { - for (i = 0; i < opp_cnt; ++i) { - mpc->funcs->set_out_rate_control( - mpc, opp_inst[i], - true, - rate_control_2x_pclk, - &flow_control); - } - } - for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { odm_pipe->stream_res.opp->funcs->opp_pipe_clock_control( odm_pipe->stream_res.opp, @@ -679,22 +652,43 @@ bool dcn35_apply_idle_power_optimizations(struct dc *dc, bool enable) { - struct dc_link *edp_links[MAX_NUM_EDP]; - int i, edp_num; if (dc->debug.dmcub_emulation) return true; if (enable) { - dc_get_edp_links(dc, edp_links, &edp_num); - if (edp_num == 0 || edp_num > 1) - return false; + uint32_t num_active_edp = 0; + int i; for (i = 0; i < dc->current_state->stream_count; ++i) { struct dc_stream_state *stream = dc->current_state->streams[i]; + struct dc_link *link = stream->link; + bool is_psr = link && !link->panel_config.psr.disable_psr && + (link->psr_settings.psr_version == DC_PSR_VERSION_1 || + link->psr_settings.psr_version == DC_PSR_VERSION_SU_1); + bool is_replay = link && link->replay_settings.replay_feature_enabled; + + /* Ignore streams that disabled. */ + if (stream->dpms_off) + continue; - if (!stream->dpms_off && !dc_is_embedded_signal(stream->signal)) + /* Active external displays block idle optimizations. */ + if (!dc_is_embedded_signal(stream->signal)) return false; + + /* If not PWRSEQ0 can't enter idle optimizations */ + if (link && link->link_index != 0) + return false; + + /* Check for panel power features required for idle optimizations. */ + if (!is_psr && !is_replay) + return false; + + num_active_edp += 1; } + + /* If more than one active eDP then disallow. */ + if (num_active_edp > 1) + return false; } // TODO: review other cases when idle optimization is allowed @@ -807,6 +801,7 @@ /* Disable on the current state so the new one isn't cleared. */ pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; + hubp->funcs->hubp_reset(hubp); dpp->funcs->dpp_reset(dpp); pipe_ctx->stream_res.tg = tg; @@ -946,6 +941,7 @@ /*to do, need to support both case*/ hubp->power_gated = true; + hubp->funcs->hubp_reset(hubp); dpp->funcs->dpp_reset(dpp); pipe_ctx->stream = NULL; @@ -1016,11 +1012,10 @@ if (pipe_ctx->plane_res.hubp) update_state->pg_pipe_res_update[PG_HUBP][pipe_ctx->plane_res.hubp->inst] = false; - if (pipe_ctx->plane_res.dpp) + if (pipe_ctx->plane_res.dpp && pipe_ctx->plane_res.hubp) update_state->pg_pipe_res_update[PG_DPP][pipe_ctx->plane_res.hubp->inst] = false; - if ((pipe_ctx->plane_res.dpp || pipe_ctx->stream_res.opp) && - pipe_ctx->plane_res.mpcc_inst >= 0) + if (pipe_ctx->plane_res.dpp || pipe_ctx->stream_res.opp) update_state->pg_pipe_res_update[PG_MPCC][pipe_ctx->plane_res.mpcc_inst] = false; if (pipe_ctx->stream_res.dsc) @@ -1065,7 +1060,8 @@ continue; if ((!cur_pipe->plane_state && new_pipe->plane_state) || - (!cur_pipe->stream && new_pipe->stream)) { + (!cur_pipe->stream && new_pipe->stream) || + (cur_pipe->stream != new_pipe->stream && new_pipe->stream)) { // New pipe addition for (j = 0; j < PG_HW_PIPE_RESOURCES_NUM_ELEMENT; j++) { if (j == PG_HUBP && new_pipe->plane_res.hubp) @@ -1353,7 +1349,13 @@ params.vertical_total_mid_frame_num = adjust.v_total_mid_frame_num; for (i = 0; i < num_pipes; i++) { - if ((pipe_ctx[i]->stream_res.tg != NULL) && pipe_ctx[i]->stream_res.tg->funcs) { + /* dc_state_destruct() might null the stream resources, so fetch tg + * here first to avoid a race condition. The lifetime of the pointee + * itself (the timing_generator object) is not a problem here. + */ + struct timing_generator *tg = pipe_ctx[i]->stream_res.tg; + + if ((tg != NULL) && tg->funcs) { struct dc_crtc_timing *timing = &pipe_ctx[i]->stream->timing; struct dc *dc = pipe_ctx[i]->stream->ctx->dc; @@ -1366,14 +1368,84 @@ num_frames = 2 * (frame_rate % 60); } } - if (pipe_ctx[i]->stream_res.tg->funcs->set_drr) - pipe_ctx[i]->stream_res.tg->funcs->set_drr( - pipe_ctx[i]->stream_res.tg, ¶ms); + if (tg->funcs->set_drr) + tg->funcs->set_drr(tg, ¶ms); if (adjust.v_total_max != 0 && adjust.v_total_min != 0) - if (pipe_ctx[i]->stream_res.tg->funcs->set_static_screen_control) - pipe_ctx[i]->stream_res.tg->funcs->set_static_screen_control( - pipe_ctx[i]->stream_res.tg, - event_triggers, num_frames); + if (tg->funcs->set_static_screen_control) + tg->funcs->set_static_screen_control( + tg, event_triggers, num_frames); } } } + +static bool should_avoid_empty_tu(struct pipe_ctx *pipe_ctx) +{ + /* Calculate average pixel count per TU, return false if under ~2.00 to + * avoid empty TUs. This is only required for DPIA tunneling as empty TUs + * are legal to generate for native DP links. Assume TU size 64 as there + * is currently no scenario where it's reprogrammed from HW default. + * MTPs have no such limitation, so this does not affect MST use cases. + */ + unsigned int pix_clk_mhz; + unsigned int symclk_mhz; + unsigned int avg_pix_per_tu_x1000; + unsigned int tu_size_bytes = 64; + struct dc_crtc_timing *timing = &pipe_ctx->stream->timing; + struct dc_link_settings *link_settings = &pipe_ctx->link_config.dp_link_settings; + const struct dc *dc = pipe_ctx->stream->link->dc; + + if (pipe_ctx->stream->link->ep_type != DISPLAY_ENDPOINT_USB4_DPIA) + return false; + + // Not necessary for MST configurations + if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST) + return false; + + pix_clk_mhz = timing->pix_clk_100hz / 10000; + + // If this is true, can't block due to dynamic ODM + if (pix_clk_mhz > dc->clk_mgr->bw_params->clk_table.entries[0].dispclk_mhz) + return false; + + switch (link_settings->link_rate) { + case LINK_RATE_LOW: + symclk_mhz = 162; + break; + case LINK_RATE_HIGH: + symclk_mhz = 270; + break; + case LINK_RATE_HIGH2: + symclk_mhz = 540; + break; + case LINK_RATE_HIGH3: + symclk_mhz = 810; + break; + default: + // We shouldn't be tunneling any other rates, something is wrong + ASSERT(0); + return false; + } + + avg_pix_per_tu_x1000 = (1000 * pix_clk_mhz * tu_size_bytes) + / (symclk_mhz * link_settings->lane_count); + + // Add small empirically-decided margin to account for potential jitter + return (avg_pix_per_tu_x1000 < 2020); +} + +bool dcn35_is_dp_dig_pixel_rate_div_policy(struct pipe_ctx *pipe_ctx) +{ + struct dc *dc = pipe_ctx->stream->ctx->dc; + + if (!is_h_timing_divisible_by_2(pipe_ctx->stream)) + return false; + + if (should_avoid_empty_tu(pipe_ctx)) + return false; + + if (dc_is_dp_signal(pipe_ctx->stream->signal) && !dc->link_srv->dp_is_128b_132b_signal(pipe_ctx) && + dc->debug.enable_dp_dig_pixel_rate_div_policy) + return true; + + return false; +} --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h @@ -90,4 +90,6 @@ void dcn35_set_drr(struct pipe_ctx **pipe_ctx, int num_pipes, struct dc_crtc_timing_adjust adjust); +bool dcn35_is_dp_dig_pixel_rate_div_policy(struct pipe_ctx *pipe_ctx); + #endif /* __DC_HWSS_DCN35_H__ */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c @@ -158,7 +158,7 @@ .setup_hpo_hw_control = dcn35_setup_hpo_hw_control, .calculate_dccg_k1_k2_values = dcn32_calculate_dccg_k1_k2_values, .set_pixels_per_cycle = dcn32_set_pixels_per_cycle, - .is_dp_dig_pixel_rate_div_policy = dcn32_is_dp_dig_pixel_rate_div_policy, + .is_dp_dig_pixel_rate_div_policy = dcn35_is_dp_dig_pixel_rate_div_policy, .dsc_pg_control = dcn35_dsc_pg_control, .dsc_pg_status = dcn32_dsc_pg_status, .enable_plane = dcn35_enable_plane, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/inc/core_status.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/inc/core_status.h @@ -60,5 +60,7 @@ }; char *dc_status_to_str(enum dc_status status); +char *dc_pixel_encoding_to_str(enum dc_pixel_encoding pixel_encoding); +char *dc_color_depth_to_str(enum dc_color_depth color_depth); #endif /* _CORE_STATUS_H_ */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/inc/core_types.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/inc/core_types.h @@ -202,6 +202,7 @@ void (*get_panel_config_defaults)(struct dc_panel_config *panel_config); void (*build_pipe_pix_clk_params)(struct pipe_ctx *pipe_ctx); + unsigned int (*get_det_buffer_size)(const struct dc_state *context); }; struct audio_support{ @@ -612,7 +613,7 @@ * store current value in plane states so we can still recover * a valid current state during dc update. */ - struct dc_plane_state plane_states[MAX_SURFACE_NUM]; + struct dc_plane_state plane_states[MAX_SURFACES]; } scratch; }; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h @@ -349,7 +349,7 @@ enum dm_pp_clocks_state cur_min_clks_state; bool periodic_retraining_disabled; - unsigned int cur_phyclk_req_table[MAX_PIPES * 2]; + unsigned int cur_phyclk_req_table[MAX_LINKS]; bool smu_present; void *wm_range_table; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h @@ -108,6 +108,8 @@ void (*dcc_control)(struct hubp *hubp, bool enable, enum hubp_ind_block_size blk_size); + void (*hubp_reset)(struct hubp *hubp); + void (*mem_program_viewport)( struct hubp *hubp, const struct rect *viewport, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h @@ -44,6 +44,7 @@ */ #define MAX_PIPES 6 #define MAX_PHANTOM_PIPES (MAX_PIPES / 2) +#define MAX_LINKS (MAX_PIPES * 2 +2) #define MAX_DIG_LINK_ENCODERS 7 #define MAX_DWB_PIPES 1 #define MAX_HPO_DP2_ENCODERS 4 --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/inc/hw/opp.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/inc/hw/opp.h @@ -321,6 +321,9 @@ bool (*dpg_is_blanked)( struct output_pixel_processor *opp); + bool (*dpg_is_pending)(struct output_pixel_processor *opp); + + void (*opp_dpg_set_blank_color)( struct output_pixel_processor *opp, const struct tg_color *color); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h @@ -333,6 +333,7 @@ void (*init_odm)(struct timing_generator *tg); void (*wait_drr_doublebuffer_pending_clear)(struct timing_generator *tg); + void (*wait_odm_doublebuffer_pending_clear)(struct timing_generator *tg); }; #endif --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/inc/link.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/inc/link.h @@ -285,12 +285,12 @@ enum replay_FW_Message_type msg, union dmub_replay_cmd_set *cmd_data); bool (*edp_set_coasting_vtotal)( - struct dc_link *link, uint16_t coasting_vtotal); + struct dc_link *link, uint32_t coasting_vtotal); bool (*edp_replay_residency)(const struct dc_link *link, unsigned int *residency, const bool is_start, const bool is_alpm); bool (*edp_set_replay_power_opt_and_coasting_vtotal)(struct dc_link *link, - const unsigned int *power_opts, uint16_t coasting_vtotal); + const unsigned int *power_opts, uint32_t coasting_vtotal); bool (*edp_wait_for_t12)(struct dc_link *link); bool (*edp_is_ilr_optimization_required)(struct dc_link *link, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c @@ -211,8 +211,12 @@ info->ext_id); uint8_t pipe_offset = dal_irq_src - IRQ_TYPE_VBLANK; - struct timing_generator *tg = - dc->current_state->res_ctx.pipe_ctx[pipe_offset].stream_res.tg; + struct timing_generator *tg; + + if (pipe_offset >= MAX_PIPES) + return false; + + tg = dc->current_state->res_ctx.pipe_ctx[pipe_offset].stream_res.tg; if (enable) { if (!tg || !tg->funcs->arm_vert_intr(tg, 2)) { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c @@ -816,8 +816,11 @@ break; } + if (!pipe_ctx->stream) + return false; + if (pipe_ctx->stream_res.tg->funcs->lock_doublebuffer_enable) { - if (pipe_ctx->stream && should_use_dmub_lock(pipe_ctx->stream->link)) { + if (should_use_dmub_lock(pipe_ctx->stream->link)) { union dmub_hw_lock_flags hw_locks = { 0 }; struct dmub_hw_lock_inst_flags inst_flags = { 0 }; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c @@ -58,7 +58,10 @@ struct link_encoder *link_enc = link_enc_cfg_get_link_enc(pipe_ctx->stream->link); struct stream_encoder *stream_enc = pipe_ctx->stream_res.stream_enc; - if (stream_enc && stream_enc->funcs->disable_fifo) + if (!stream_enc) + return; + + if (stream_enc->funcs->disable_fifo) stream_enc->funcs->disable_fifo(stream_enc); link_enc->funcs->connect_dig_be_to_fe( --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c @@ -28,6 +28,8 @@ #include "dccg.h" #include "clk_mgr.h" +#define DC_LOGGER link->ctx->logger + void set_hpo_dp_throttled_vcp_size(struct pipe_ctx *pipe_ctx, struct fixed31_32 throttled_vcp_size) { @@ -108,6 +110,11 @@ enum clock_source_id clock_source, const struct dc_link_settings *link_settings) { + if (!link_res->hpo_dp_link_enc) { + DC_LOG_ERROR("%s: invalid hpo_dp_link_enc\n", __func__); + return; + } + if (link->dc->res_pool->dccg->funcs->set_symclk32_le_root_clock_gating) link->dc->res_pool->dccg->funcs->set_symclk32_le_root_clock_gating( link->dc->res_pool->dccg, @@ -124,6 +131,11 @@ const struct link_resource *link_res, enum signal_type signal) { + if (!link_res->hpo_dp_link_enc) { + DC_LOG_ERROR("%s: invalid hpo_dp_link_enc\n", __func__); + return; + } + link_res->hpo_dp_link_enc->funcs->link_disable(link_res->hpo_dp_link_enc); link_res->hpo_dp_link_enc->funcs->disable_link_phy( link_res->hpo_dp_link_enc, signal); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_fixed_vs_pe_retimer_dp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_fixed_vs_pe_retimer_dp.c @@ -162,7 +162,12 @@ link_res->hpo_dp_link_enc->funcs->set_link_test_pattern( link_res->hpo_dp_link_enc, tp_params); } + link->dc->link_srv->dp_trace_source_sequence(link, DPCD_SOURCE_SEQ_AFTER_SET_SOURCE_PATTERN); + + // Give retimer extra time to lock before updating DP_TRAINING_PATTERN_SET to TPS1 + if (tp_params->dp_phy_pattern == DP_TEST_PATTERN_128b_132b_TPS1_TRAINING_MODE) + msleep(30); } static void set_hpo_fixed_vs_pe_retimer_dp_lane_settings(struct dc_link *link, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/link/link_factory.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/link/link_factory.c @@ -385,7 +385,7 @@ if (link->panel_cntl) link->panel_cntl->funcs->destroy(&link->panel_cntl); - if (link->link_enc) { + if (link->link_enc && !link->is_dig_mapping_flexible) { /* Update link encoder resource tracking variables. These are used for * the dynamic assignment of link encoders to streams. Virtual links * are not assigned encoder resources on creation. @@ -611,14 +611,14 @@ link->link_enc = link->dc->res_pool->funcs->link_enc_create(dc_ctx, &enc_init_data); - DC_LOG_DC("BIOS object table - DP_IS_USB_C: %d", link->link_enc->features.flags.bits.DP_IS_USB_C); - DC_LOG_DC("BIOS object table - IS_DP2_CAPABLE: %d", link->link_enc->features.flags.bits.IS_DP2_CAPABLE); - if (!link->link_enc) { DC_ERROR("Failed to create link encoder!\n"); goto link_enc_create_fail; } + DC_LOG_DC("BIOS object table - DP_IS_USB_C: %d", link->link_enc->features.flags.bits.DP_IS_USB_C); + DC_LOG_DC("BIOS object table - IS_DP2_CAPABLE: %d", link->link_enc->features.flags.bits.IS_DP2_CAPABLE); + /* Update link encoder tracking variables. These are used for the dynamic * assignment of link encoders to streams. */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c @@ -51,9 +51,10 @@ #include "dc_dmub_srv.h" #include "gpio_service_interface.h" +#define DC_TRACE_LEVEL_MESSAGE(...) /* do nothing */ + #define DC_LOGGER \ link->ctx->logger -#define DC_TRACE_LEVEL_MESSAGE(...) /* do nothing */ #ifndef MAX #define MAX(X, Y) ((X) > (Y) ? (X) : (Y)) @@ -534,7 +535,7 @@ struct dc_link_settings *cur, enum link_training_result training_result) { - uint8_t cur_idx = 0, next_idx; + uint32_t cur_idx = 0, next_idx; bool found = false; if (training_result == LINK_TRAINING_ABORT) @@ -914,21 +915,17 @@ memset(link_setting, 0, sizeof(*link_setting)); - /* if preferred is specified through AMDDP, use it, if it's enough - * to drive the mode - */ - if (link->preferred_link_setting.lane_count != - LANE_COUNT_UNKNOWN && - link->preferred_link_setting.link_rate != - LINK_RATE_UNKNOWN) { + if (dc_is_dp_signal(stream->signal) && + link->preferred_link_setting.lane_count != LANE_COUNT_UNKNOWN && + link->preferred_link_setting.link_rate != LINK_RATE_UNKNOWN) { + /* if preferred is specified through AMDDP, use it, if it's enough + * to drive the mode + */ *link_setting = link->preferred_link_setting; - return true; - } - - /* MST doesn't perform link training for now - * TODO: add MST specific link training routine - */ - if (stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST) { + } else if (stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST) { + /* MST doesn't perform link training for now + * TODO: add MST specific link training routine + */ decide_mst_link_settings(link, link_setting); } else if (link->connector_signal == SIGNAL_TYPE_EDP) { /* enable edp link optimization for DSC eDP case */ @@ -1590,9 +1587,17 @@ return false; } - if (dp_is_lttpr_present(link)) + if (dp_is_lttpr_present(link)) { configure_lttpr_mode_transparent(link); + // Echo TOTAL_LTTPR_CNT back downstream + core_link_write_dpcd( + link, + DP_TOTAL_LTTPR_CNT, + &link->dpcd_caps.lttpr_caps.phy_repeater_cnt, + sizeof(link->dpcd_caps.lttpr_caps.phy_repeater_cnt)); + } + /* Read DP tunneling information. */ status = dpcd_get_tunneling_device_data(link); @@ -2215,7 +2220,7 @@ memset(&link->verified_link_cap, 0, sizeof(struct dc_link_settings)); - if (!link_detect_connection_type(link, &type) || type == dc_connection_none) { + if (link->link_enc && (!link_detect_connection_type(link, &type) || type == dc_connection_none)) { link->verified_link_cap = fail_safe_link_settings; break; } else if (dp_verify_link_cap(link, known_limit_link_setting, &fail_count)) { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c @@ -166,7 +166,7 @@ uint8_t idx = 0xFF; int i; - for (i = 0; i < MAX_PIPES * 2; ++i) { + for (i = 0; i < MAX_LINKS; ++i) { if (!dc_struct->links[i] || dc_struct->links[i]->ep_type != DISPLAY_ENDPOINT_USB4_DPIA) @@ -196,7 +196,7 @@ struct dc_link *link_dpia_primary, *link_dpia_secondary; int total_bw = 0; - for (uint8_t i = 0; i < (MAX_PIPES * 2) - 1; ++i) { + for (uint8_t i = 0; i < MAX_LINKS - 1; ++i) { if (!dc->links[i] || dc->links[i]->ep_type != DISPLAY_ENDPOINT_USB4_DPIA) continue; @@ -270,7 +270,7 @@ /* Error check whether requested and allocated are equal */ req_bw = requested_bw * (Kbps_TO_Gbps / link->dpia_bw_alloc_config.bw_granularity); - if (req_bw == link->dpia_bw_alloc_config.allocated_bw) { + if (req_bw && (req_bw == link->dpia_bw_alloc_config.allocated_bw)) { DC_LOG_ERROR("%s: Request bw equals to allocated bw for link(%d)\n", __func__, link->link_index); } @@ -341,6 +341,14 @@ ret = true; init_usb4_bw_struct(link); link->dpia_bw_alloc_config.bw_alloc_enabled = true; + + /* + * During DP tunnel creation, CM preallocates BW and reduces estimated BW of other + * DPIA. CM release preallocation only when allocation is complete. Do zero alloc + * to make the CM to release preallocation and update estimated BW correctly for + * all DPIAs per host router + */ + link_dp_dpia_allocate_usb4_bandwidth_for_stream(link, 0); } } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c @@ -454,7 +454,8 @@ * If we got sink count changed it means * Downstream port status changed, * then DM should call DC to do the detection. - * NOTE: Do not handle link loss on eDP since it is internal link*/ + * NOTE: Do not handle link loss on eDP since it is internal link + */ if ((link->connector_signal != SIGNAL_TYPE_EDP) && dp_parse_link_loss_status( link, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_phy.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_phy.c @@ -143,32 +143,25 @@ link_enc = link_enc_cfg_get_link_enc(link); ASSERT(link_enc); + if (link_enc->funcs->fec_set_ready == NULL) + return DC_NOT_SUPPORTED; - if (!dp_should_enable_fec(link)) - return status; + if (ready && dp_should_enable_fec(link)) { + fec_config = 1; - if (link_enc->funcs->fec_set_ready && - link->dpcd_caps.fec_cap.bits.FEC_CAPABLE) { - if (ready) { - fec_config = 1; - status = core_link_write_dpcd(link, - DP_FEC_CONFIGURATION, - &fec_config, - sizeof(fec_config)); - if (status == DC_OK) { - link_enc->funcs->fec_set_ready(link_enc, true); - link->fec_state = dc_link_fec_ready; - } else { - link_enc->funcs->fec_set_ready(link_enc, false); - link->fec_state = dc_link_fec_not_ready; - dm_error("dpcd write failed to set fec_ready"); - } - } else if (link->fec_state == dc_link_fec_ready) { + status = core_link_write_dpcd(link, DP_FEC_CONFIGURATION, + &fec_config, sizeof(fec_config)); + + if (status == DC_OK) { + link_enc->funcs->fec_set_ready(link_enc, true); + link->fec_state = dc_link_fec_ready; + } + } else { + if (link->fec_state == dc_link_fec_ready) { fec_config = 0; - status = core_link_write_dpcd(link, - DP_FEC_CONFIGURATION, - &fec_config, - sizeof(fec_config)); + core_link_write_dpcd(link, DP_FEC_CONFIGURATION, + &fec_config, sizeof(fec_config)); + link_enc->funcs->fec_set_ready(link_enc, false); link->fec_state = dc_link_fec_not_ready; } @@ -183,14 +176,12 @@ link_enc = link_enc_cfg_get_link_enc(link); ASSERT(link_enc); - - if (!dp_should_enable_fec(link)) + if (link_enc->funcs->fec_set_enable == NULL) return; - if (link_enc->funcs->fec_set_enable && - link->dpcd_caps.fec_cap.bits.FEC_CAPABLE) { - if (link->fec_state == dc_link_fec_ready && enable) { - /* Accord to DP spec, FEC enable sequence can first + if (enable && dp_should_enable_fec(link)) { + if (link->fec_state == dc_link_fec_ready) { + /* According to DP spec, FEC enable sequence can first * be transmitted anytime after 1000 LL codes have * been transmitted on the link after link training * completion. Using 1 lane RBR should have the maximum @@ -200,7 +191,9 @@ udelay(7); link_enc->funcs->fec_set_enable(link_enc, true); link->fec_state = dc_link_fec_enabled; - } else if (link->fec_state == dc_link_fec_enabled && !enable) { + } + } else { + if (link->fec_state == dc_link_fec_enabled) { link_enc->funcs->fec_set_enable(link_enc, false); link->fec_state = dc_link_fec_ready; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c @@ -914,10 +914,10 @@ /* Driver does not need to train the first hop. Skip DPCD read and clear * AUX_RD_INTERVAL for DPTX-to-DPIA hop. */ - if (link->ep_type == DISPLAY_ENDPOINT_USB4_DPIA) + if (link->ep_type == DISPLAY_ENDPOINT_USB4_DPIA && repeater_cnt > 0 && repeater_cnt < MAX_REPEATER_CNT) link->dpcd_caps.lttpr_caps.aux_rd_interval[--repeater_cnt] = 0; - for (repeater_id = repeater_cnt; repeater_id > 0; repeater_id--) { + for (repeater_id = repeater_cnt; repeater_id > 0 && repeater_id < MAX_REPEATER_CNT; repeater_id--) { aux_interval_address = DP_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1 + ((DP_REPEATER_CONFIGURATION_AND_STATUS_SIZE) * (repeater_id - 1)); core_link_read_dpcd( @@ -1676,8 +1676,7 @@ if (status == LINK_TRAINING_ABORT) { enum dc_connection_type type = dc_connection_none; - link_detect_connection_type(link, &type); - if (type == dc_connection_none) { + if (link_detect_connection_type(link, &type) && type == dc_connection_none) { DC_LOG_HW_LINK_TRAINING("%s: Aborting training because sink unplugged\n", __func__); break; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/link/protocols/link_dpcd.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/link/protocols/link_dpcd.c @@ -164,7 +164,8 @@ if (new_addr_range.start != in_address || new_addr_range.end != end_address) { *out_address = new_addr_range.start; *out_size = ADDRESS_RANGE_SIZE(new_addr_range.start, new_addr_range.end); - *out_data = kzalloc(*out_size * sizeof(**out_data), GFP_KERNEL); + *out_data = kcalloc(*out_size, sizeof(**out_data), GFP_KERNEL); + ASSERT(*out_data); } } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c @@ -892,7 +892,8 @@ /* Set power optimization flag */ if (power_opts && link->replay_settings.replay_power_opt_active != *power_opts) { - if (link->replay_settings.replay_feature_enabled && replay->funcs->replay_set_power_opt) { + if (replay != NULL && link->replay_settings.replay_feature_enabled && + replay->funcs->replay_set_power_opt) { replay->funcs->replay_set_power_opt(replay, *power_opts, panel_inst); link->replay_settings.replay_power_opt_active = *power_opts; } @@ -1033,7 +1034,7 @@ return true; } -bool edp_set_coasting_vtotal(struct dc_link *link, uint16_t coasting_vtotal) +bool edp_set_coasting_vtotal(struct dc_link *link, uint32_t coasting_vtotal) { struct dc *dc = link->ctx->dc; struct dmub_replay *replay = dc->res_pool->replay; @@ -1072,7 +1073,7 @@ } bool edp_set_replay_power_opt_and_coasting_vtotal(struct dc_link *link, - const unsigned int *power_opts, uint16_t coasting_vtotal) + const unsigned int *power_opts, uint32_t coasting_vtotal) { struct dc *dc = link->ctx->dc; struct dmub_replay *replay = dc->res_pool->replay; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h @@ -59,12 +59,12 @@ bool edp_send_replay_cmd(struct dc_link *link, enum replay_FW_Message_type msg, union dmub_replay_cmd_set *cmd_data); -bool edp_set_coasting_vtotal(struct dc_link *link, uint16_t coasting_vtotal); +bool edp_set_coasting_vtotal(struct dc_link *link, uint32_t coasting_vtotal); bool edp_replay_residency(const struct dc_link *link, unsigned int *residency, const bool is_start, const bool is_alpm); bool edp_get_replay_state(const struct dc_link *link, uint64_t *state); bool edp_set_replay_power_opt_and_coasting_vtotal(struct dc_link *link, - const unsigned int *power_opts, uint16_t coasting_vtotal); + const unsigned int *power_opts, uint32_t coasting_vtotal); bool edp_wait_for_t12(struct dc_link *link); bool edp_is_ilr_optimization_required(struct dc_link *link, struct dc_crtc_timing *crtc_timing); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.h @@ -557,7 +557,8 @@ type OTG_CRC_DATA_STREAM_SPLIT_MODE;\ type OTG_CRC_DATA_FORMAT;\ type OTG_V_TOTAL_LAST_USED_BY_DRR;\ - type OTG_DRR_TIMING_DBUF_UPDATE_PENDING; + type OTG_DRR_TIMING_DBUF_UPDATE_PENDING;\ + type OTG_H_TIMING_DIV_MODE_DB_UPDATE_PENDING; #define TG_REG_FIELD_LIST_DCN3_2(type) \ type OTG_H_TIMING_DIV_MODE_MANUAL; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.c @@ -122,6 +122,13 @@ } } +void optc32_wait_odm_doublebuffer_pending_clear(struct timing_generator *tg) +{ + struct optc *optc1 = DCN10TG_FROM_TG(tg); + + REG_WAIT(OTG_DOUBLE_BUFFER_CONTROL, OTG_H_TIMING_DIV_MODE_DB_UPDATE_PENDING, 0, 2, 50000); +} + void optc32_set_h_timing_div_manual_mode(struct timing_generator *optc, bool manual_mode) { struct optc *optc1 = DCN10TG_FROM_TG(optc); @@ -260,9 +267,6 @@ OTG_V_TOTAL_MAX_SEL, 1, OTG_FORCE_LOCK_ON_EVENT, 0, OTG_SET_V_TOTAL_MIN_MASK, (1 << 1)); /* TRIGA */ - - // Setup manual flow control for EOF via TRIG_A - optc->funcs->setup_manual_trigger(optc); } } @@ -345,6 +349,7 @@ .set_odm_bypass = optc32_set_odm_bypass, .set_odm_combine = optc32_set_odm_combine, .get_odm_combine_segments = optc32_get_odm_combine_segments, + .wait_odm_doublebuffer_pending_clear = optc32_wait_odm_doublebuffer_pending_clear, .set_h_timing_div_manual_mode = optc32_set_h_timing_div_manual_mode, .get_optc_source = optc2_get_optc_source, .set_out_mux = optc3_set_out_mux, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.h @@ -183,5 +183,6 @@ void optc32_get_odm_combine_segments(struct timing_generator *tg, int *odm_combine_segments); void optc32_set_odm_bypass(struct timing_generator *optc, const struct dc_crtc_timing *dc_crtc_timing); +void optc32_wait_odm_doublebuffer_pending_clear(struct timing_generator *tg); #endif /* __DC_OPTC_DCN32_H__ */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c @@ -1069,7 +1069,10 @@ struct dm_pp_clock_levels clks = {0}; int memory_type_multiplier = MEMORY_TYPE_MULTIPLIER_CZ; - if (dc->bw_vbios && dc->bw_vbios->memory_type == bw_def_hbm) + if (!dc->bw_vbios) + return; + + if (dc->bw_vbios->memory_type == bw_def_hbm) memory_type_multiplier = MEMORY_TYPE_HBM; /*do system clock TODO PPLIB: after PPLIB implement, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c @@ -1539,6 +1539,7 @@ if (dce83_construct(num_virtual_links, dc, pool)) return &pool->base; + kfree(pool); BREAK_TO_DEBUGGER(); return NULL; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c @@ -2031,6 +2031,7 @@ { bool out = false; int split[MAX_PIPES] = { 0 }; + bool merge[MAX_PIPES] = { false }; int pipe_cnt, i, pipe_idx, vlevel; ASSERT(pipes); @@ -2055,7 +2056,7 @@ if (vlevel > context->bw_ctx.dml.soc.num_states) goto validate_fail; - vlevel = dcn20_validate_apply_pipe_split_flags(dc, context, vlevel, split, NULL); + vlevel = dcn20_validate_apply_pipe_split_flags(dc, context, vlevel, split, merge); /*initialize pipe_just_split_from to invalid idx*/ for (i = 0; i < MAX_PIPES; i++) @@ -2191,10 +2192,11 @@ const struct dc_dcc_surface_param *input, struct dc_surface_dcc_cap *output) { - return dc->res_pool->hubbub->funcs->get_dcc_compression_cap( - dc->res_pool->hubbub, - input, - output); + if (dc->res_pool->hubbub->funcs->get_dcc_compression_cap) + return dc->res_pool->hubbub->funcs->get_dcc_compression_cap( + dc->res_pool->hubbub, input, output); + + return false; } static void dcn20_destroy_resource_pool(struct resource_pool **pool) @@ -2451,6 +2453,7 @@ dc->caps.post_blend_color_processing = true; dc->caps.force_dp_tps4_for_cp2520 = true; dc->caps.extended_aux_timeout_support = true; + dc->caps.dmcub_support = true; /* Color pipeline capabilities */ dc->caps.color.dpp.dcn_arch = 1; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c @@ -1003,8 +1003,10 @@ struct pipe_ctx *head_pipe = resource_get_otg_master_for_stream(res_ctx, opp_head_pipe->stream); struct pipe_ctx *idle_pipe = resource_find_free_secondary_pipe_legacy(res_ctx, pool, head_pipe); - if (!head_pipe) + if (!head_pipe) { ASSERT(0); + return NULL; + } if (!idle_pipe) return NULL; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c @@ -800,6 +800,7 @@ { bool out = false; int split[MAX_PIPES] = { 0 }; + bool merge[MAX_PIPES] = { false }; int pipe_cnt, i, pipe_idx, vlevel; ASSERT(pipes); @@ -842,7 +843,7 @@ goto validate_fail; } - vlevel = dcn20_validate_apply_pipe_split_flags(dc, context, vlevel, split, NULL); + vlevel = dcn20_validate_apply_pipe_split_flags(dc, context, vlevel, split, merge); for (i = 0, pipe_idx = 0; i < dc->res_pool->pipe_count; i++) { struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; @@ -1323,7 +1324,7 @@ kzalloc(sizeof(struct dcn21_link_encoder), GFP_KERNEL); int link_regs_id; - if (!enc21) + if (!enc21 || enc_init_data->hpd_source >= ARRAY_SIZE(link_enc_hpd_regs)) return NULL; link_regs_id = --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c @@ -2050,6 +2050,9 @@ BW_VAL_TRACE_COUNT(); + if (!pipes) + goto validate_fail; + DC_FP_START(); out = dcn30_internal_validate_bw(dc, context, pipes, &pipe_cnt, &vlevel, fast_validate, true); DC_FP_END(); @@ -2169,6 +2172,17 @@ optimal_uclk_for_dcfclk_sta_targets[i] = bw_params->clk_table.entries[j].memclk_mhz * 16; break; + } else { + /* condition where (dcfclk_sta_targets[i] >= optimal_dcfclk_for_uclk[j]): + * If it just so happens that the memory bandwidth is low enough such that + * all the optimal DCFCLK for each UCLK is lower than the smallest DCFCLK STA + * target, we need to populate the optimal UCLK for each DCFCLK STA target to + * be the max UCLK. + */ + if (j == num_uclk_states - 1) { + optimal_uclk_for_dcfclk_sta_targets[i] = + bw_params->clk_table.entries[j].memclk_mhz * 16; + } } } } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c @@ -671,9 +671,9 @@ /* 6:1 downscaling ratio: 1000/6 = 166.666 */ .max_downscale_factor = { - .argb8888 = 167, - .nv12 = 167, - .fp16 = 167 + .argb8888 = 358, + .nv12 = 358, + .fp16 = 358 }, 64, 64 @@ -694,7 +694,7 @@ .disable_dcc = DCC_ENABLE, .vsr_support = true, .performance_trace = false, - .max_downscale_src_width = 7680,/*upto 8K*/ + .max_downscale_src_width = 4096,/*upto true 4k*/ .scl_reset_length10 = true, .sanity_checks = false, .underflow_assert_delay_us = 0xFFFFFFFF, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c @@ -892,7 +892,7 @@ .disable_z10 = true, .enable_legacy_fast_update = true, .enable_z9_disable_interface = true, /* Allow support for the PMFW interface for disable Z9*/ - .dml_hostvm_override = DML_HOSTVM_OVERRIDE_FALSE, + .dml_hostvm_override = DML_HOSTVM_NO_OVERRIDE, .using_dml2 = false, }; @@ -1311,6 +1311,8 @@ /* allocate HPO link encoder */ hpo_dp_enc31 = kzalloc(sizeof(struct dcn31_hpo_dp_link_encoder), GFP_KERNEL); + if (!hpo_dp_enc31) + return NULL; /* out of memory */ hpo_dp_link_encoder31_construct(hpo_dp_enc31, ctx, inst, &hpo_dp_link_enc_regs[inst], @@ -1720,6 +1722,12 @@ return pipe_cnt; } +unsigned int dcn31_get_det_buffer_size( + const struct dc_state *context) +{ + return context->bw_ctx.dml.ip.det_buffer_size_kbytes; +} + void dcn31_calculate_wm_and_dlg( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, @@ -1767,6 +1775,9 @@ BW_VAL_TRACE_COUNT(); + if (!pipes) + goto validate_fail; + DC_FP_START(); out = dcn30_internal_validate_bw(dc, context, pipes, &pipe_cnt, &vlevel, fast_validate, true); DC_FP_END(); @@ -1839,6 +1850,7 @@ .update_bw_bounding_box = dcn31_update_bw_bounding_box, .patch_unknown_plane_state = dcn20_patch_unknown_plane_state, .get_panel_config_defaults = dcn31_get_panel_config_defaults, + .get_det_buffer_size = dcn31_get_det_buffer_size, }; static struct clock_source *dcn30_clock_source_create( @@ -1860,6 +1872,7 @@ return &clk_src->base; } + kfree(clk_src); BREAK_TO_DEBUGGER(); return NULL; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.h @@ -63,6 +63,9 @@ const struct dc_init_data *init_data, struct dc *dc); +unsigned int dcn31_get_det_buffer_size( + const struct dc_state *context); + /*temp: B0 specific before switch to dcn313 headers*/ #ifndef regPHYPLLF_PIXCLK_RESYNC_CNTL #define regPHYPLLF_PIXCLK_RESYNC_CNTL 0x007e --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c @@ -1384,6 +1384,8 @@ /* allocate HPO link encoder */ hpo_dp_enc31 = kzalloc(sizeof(struct dcn31_hpo_dp_link_encoder), GFP_KERNEL); + if (!hpo_dp_enc31) + return NULL; /* out of memory */ hpo_dp_link_encoder31_construct(hpo_dp_enc31, ctx, inst, &hpo_dp_link_enc_regs[inst], @@ -1675,8 +1677,8 @@ return &clk_src->base; } - BREAK_TO_DEBUGGER(); kfree(clk_src); + BREAK_TO_DEBUGGER(); return NULL; } @@ -1744,6 +1746,9 @@ BW_VAL_TRACE_COUNT(); + if (!pipes) + goto validate_fail; + if (filter_modes_for_single_channel_workaround(dc, context)) goto validate_fail; @@ -1812,6 +1817,7 @@ .patch_unknown_plane_state = dcn20_patch_unknown_plane_state, .get_panel_config_defaults = dcn314_get_panel_config_defaults, .get_preferred_eng_id_dpia = dcn314_get_preferred_eng_id_dpia, + .get_det_buffer_size = dcn31_get_det_buffer_size, }; static struct clock_source *dcn30_clock_source_create( @@ -1833,8 +1839,8 @@ return &clk_src->base; } - BREAK_TO_DEBUGGER(); kfree(clk_src); + BREAK_TO_DEBUGGER(); return NULL; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c @@ -1309,6 +1309,8 @@ /* allocate HPO link encoder */ hpo_dp_enc31 = kzalloc(sizeof(struct dcn31_hpo_dp_link_encoder), GFP_KERNEL); + if (!hpo_dp_enc31) + return NULL; /* out of memory */ hpo_dp_link_encoder31_construct(hpo_dp_enc31, ctx, inst, &hpo_dp_link_enc_regs[inst], @@ -1754,7 +1756,7 @@ bool split_required = pipe->stream->timing.pix_clk_100hz >= dcn_get_max_non_odm_pix_rate_100hz(&dc->dml.soc) || (pipe->plane_state && pipe->plane_state->src_rect.width > 5120); - if (remaining_det_segs > MIN_RESERVED_DET_SEGS) + if (remaining_det_segs > MIN_RESERVED_DET_SEGS && crb_pipes != 0) pipes[pipe_cnt].pipe.src.det_size_override += (remaining_det_segs - MIN_RESERVED_DET_SEGS) / crb_pipes + (crb_idx < (remaining_det_segs - MIN_RESERVED_DET_SEGS) % crb_pipes ? 1 : 0); if (pipes[pipe_cnt].pipe.src.det_size_override > 2 * DCN3_15_MAX_DET_SEGS) { @@ -1834,6 +1836,7 @@ .update_bw_bounding_box = dcn315_update_bw_bounding_box, .patch_unknown_plane_state = dcn20_patch_unknown_plane_state, .get_panel_config_defaults = dcn315_get_panel_config_defaults, + .get_det_buffer_size = dcn31_get_det_buffer_size, }; static bool dcn315_resource_construct( --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c @@ -1306,6 +1306,8 @@ /* allocate HPO link encoder */ hpo_dp_enc31 = kzalloc(sizeof(struct dcn31_hpo_dp_link_encoder), GFP_KERNEL); + if (!hpo_dp_enc31) + return NULL; /* out of memory */ hpo_dp_link_encoder31_construct(hpo_dp_enc31, ctx, inst, &hpo_dp_link_enc_regs[inst], @@ -1719,6 +1721,7 @@ .update_bw_bounding_box = dcn316_update_bw_bounding_box, .patch_unknown_plane_state = dcn20_patch_unknown_plane_state, .get_panel_config_defaults = dcn316_get_panel_config_defaults, + .get_det_buffer_size = dcn31_get_det_buffer_size, }; static bool dcn316_resource_construct( --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c @@ -1304,6 +1304,8 @@ /* allocate HPO link encoder */ hpo_dp_enc31 = kzalloc(sizeof(struct dcn31_hpo_dp_link_encoder), GFP_KERNEL); + if (!hpo_dp_enc31) + return NULL; /* out of memory */ #undef REG_STRUCT #define REG_STRUCT hpo_dp_link_enc_regs @@ -1648,6 +1650,9 @@ else phantom_plane = dc_state_create_phantom_plane(dc, context, curr_pipe->plane_state); + if (!phantom_plane) + continue; + memcpy(&phantom_plane->address, &curr_pipe->plane_state->address, sizeof(phantom_plane->address)); memcpy(&phantom_plane->scaling_quality, &curr_pipe->plane_state->scaling_quality, sizeof(phantom_plane->scaling_quality)); @@ -1712,6 +1717,9 @@ // be a valid candidate for SubVP (i.e. has a plane, stream, doesn't // already have phantom pipe assigned, etc.) by previous checks. phantom_stream = dcn32_enable_phantom_stream(dc, context, pipes, pipe_cnt, index); + if (!phantom_stream) + return; + dcn32_enable_phantom_plane(dc, context, phantom_stream, index); for (i = 0; i < dc->res_pool->pipe_count; i++) { @@ -1751,6 +1759,9 @@ BW_VAL_TRACE_COUNT(); + if (!pipes) + goto validate_fail; + DC_FP_START(); out = dcn32_internal_validate_bw(dc, context, pipes, &pipe_cnt, &vlevel, fast_validate); DC_FP_END(); @@ -1771,6 +1782,7 @@ dc->res_pool->funcs->calculate_wm_and_dlg(dc, context, pipes, pipe_cnt, vlevel); dcn32_override_min_req_memclk(dc, context); + dcn32_override_min_req_dcfclk(dc, context); BW_VAL_TRACE_END_WATERMARKS(); @@ -1930,6 +1942,8 @@ { DC_FP_START(); dcn32_update_bw_bounding_box_fpu(dc, bw_params); + if (dc->debug.using_dml2 && dc->current_state && dc->current_state->bw_ctx.dml2) + dml2_reinit(dc, &dc->dml2_options, &dc->current_state->bw_ctx.dml2); DC_FP_END(); } @@ -2589,8 +2603,10 @@ struct resource_context *old_ctx = &stream->ctx->dc->current_state->res_ctx; int head_index; - if (!head_pipe) + if (!head_pipe) { ASSERT(0); + return NULL; + } /* * Modified from dcn20_acquire_idle_pipe_for_layer --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h @@ -42,6 +42,7 @@ #define SUBVP_ACTIVE_MARGIN_LIST_LEN 2 #define DCN3_2_MAX_SUBVP_PIXEL_RATE_MHZ 1800 #define DCN3_2_VMIN_DISPCLK_HZ 717000000 +#define MIN_SUBVP_DCFCLK_KHZ 400000 #define TO_DCN32_RES_POOL(pool)\ container_of(pool, struct dcn32_resource_pool, base) @@ -181,6 +182,8 @@ void dcn32_update_dml_pipes_odm_policy_based_on_context(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes); +void dcn32_override_min_req_dcfclk(struct dc *dc, struct dc_state *context); + /* definitions for run time init of reg offsets */ /* CLK SRC */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c @@ -1288,6 +1288,8 @@ /* allocate HPO link encoder */ hpo_dp_enc31 = kzalloc(sizeof(struct dcn31_hpo_dp_link_encoder), GFP_KERNEL); + if (!hpo_dp_enc31) + return NULL; /* out of memory */ #undef REG_STRUCT #define REG_STRUCT hpo_dp_link_enc_regs @@ -1581,6 +1583,8 @@ { DC_FP_START(); dcn321_update_bw_bounding_box_fpu(dc, bw_params); + if (dc->debug.using_dml2 && dc->current_state && dc->current_state->bw_ctx.dml2) + dml2_reinit(dc, &dc->dml2_options, &dc->current_state->bw_ctx.dml2); DC_FP_END(); } @@ -1759,6 +1763,9 @@ dc->caps.color.mpc.ogam_rom_caps.hlg = 0; dc->caps.color.mpc.ocsc = 1; + /* Use pipe context based otg sync logic */ + dc->config.use_pipe_ctx_sync_logic = true; + dc->config.dc_mode_clk_limit_support = true; /* read VBIOS LTTPR caps */ { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c @@ -701,7 +701,7 @@ // 6:1 downscaling ratio: 1000/6 = 166.666 .max_downscale_factor = { - .argb8888 = 167, + .argb8888 = 250, .nv12 = 167, .fp16 = 167 }, @@ -782,7 +782,9 @@ .psp_disabled_wa = true, .ips2_eval_delay_us = 2000, .ips2_entry_delay_us = 800, + .disable_dmub_reallow_idle = true, .static_screen_wait_frames = 2, + .disable_timeout = true, }; static const struct dc_panel_config panel_config_defaults = { @@ -1366,6 +1368,8 @@ /* allocate HPO link encoder */ hpo_dp_enc31 = kzalloc(sizeof(struct dcn31_hpo_dp_link_encoder), GFP_KERNEL); + if (!hpo_dp_enc31) + return NULL; /* out of memory */ #undef REG_STRUCT #define REG_STRUCT hpo_dp_link_enc_regs @@ -1712,6 +1716,7 @@ return &clk_src->base; } + kfree(clk_src); BREAK_TO_DEBUGGER(); return NULL; } @@ -1770,6 +1775,7 @@ .patch_unknown_plane_state = dcn20_patch_unknown_plane_state, .get_panel_config_defaults = dcn35_get_panel_config_defaults, .get_preferred_eng_id_dpia = dcn35_get_preferred_eng_id_dpia, + .get_det_buffer_size = dcn31_get_det_buffer_size, }; static bool dcn35_resource_construct( --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h @@ -3133,6 +3133,14 @@ * Currently the support is only for 0 or 1 */ uint8_t panel_inst; + /** + * 16-bit value dicated by driver that indicates the coasting vtotal high byte part. + */ + uint16_t coasting_vtotal_high; + /** + * Explicit padding to 4 byte boundary. + */ + uint8_t pad[2]; }; /** --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c @@ -448,7 +448,7 @@ void dmub_dcn35_get_diagnostic_data(struct dmub_srv *dmub, struct dmub_diagnostic_data *diag_data) { uint32_t is_dmub_enabled, is_soft_reset, is_sec_reset; - uint32_t is_traceport_enabled, is_cw0_enabled, is_cw6_enabled; + uint32_t is_traceport_enabled, is_cw6_enabled; if (!dmub || !diag_data) return; @@ -499,9 +499,6 @@ REG_GET(DMCUB_CNTL, DMCUB_TRACEPORT_EN, &is_traceport_enabled); diag_data->is_traceport_en = is_traceport_enabled; - REG_GET(DMCUB_REGION3_CW0_TOP_ADDRESS, DMCUB_REGION3_CW0_ENABLE, &is_cw0_enabled); - diag_data->is_cw0_enabled = is_cw0_enabled; - REG_GET(DMCUB_REGION3_CW6_TOP_ADDRESS, DMCUB_REGION3_CW6_ENABLE, &is_cw6_enabled); diag_data->is_cw6_enabled = is_cw6_enabled; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/include/dpcd_defs.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/include/dpcd_defs.h @@ -177,4 +177,9 @@ #define DP_SINK_PR_PIXEL_DEVIATION_PER_LINE 0x379 #define DP_SINK_PR_MAX_NUMBER_OF_DEVIATION_LINE 0x37A +/* Remove once drm_dp_helper.h is updated upstream */ +#ifndef DP_TOTAL_LTTPR_CNT +#define DP_TOTAL_LTTPR_CNT 0xF000A /* 2.1 */ +#endif + #endif /* __DAL_DPCD_DEFS_H__ */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/modules/freesync/freesync.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/modules/freesync/freesync.c @@ -134,7 +134,7 @@ v_total = div64_u64(div64_u64(((unsigned long long)( frame_duration_in_ns) * (stream->timing.pix_clk_100hz / 10)), - stream->timing.h_total), 1000000); + stream->timing.h_total) + 500000, 1000000); /* v_total cannot be less than nominal */ if (v_total < stream->timing.v_total) { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c @@ -432,18 +432,18 @@ goto out; } - if (status == MOD_HDCP_STATUS_SUCCESS) - mod_hdcp_execute_and_set(mod_hdcp_read_bstatus, - &input->bstatus_read, &status, - hdcp, "bstatus_read"); - if (status == MOD_HDCP_STATUS_SUCCESS) - mod_hdcp_execute_and_set(check_link_integrity_dp, - &input->link_integrity_check, &status, - hdcp, "link_integrity_check"); - if (status == MOD_HDCP_STATUS_SUCCESS) - mod_hdcp_execute_and_set(check_no_reauthentication_request_dp, - &input->reauth_request_check, &status, - hdcp, "reauth_request_check"); + mod_hdcp_execute_and_set(mod_hdcp_read_bstatus, + &input->bstatus_read, &status, + hdcp, "bstatus_read"); + + mod_hdcp_execute_and_set(check_link_integrity_dp, + &input->link_integrity_check, &status, + hdcp, "link_integrity_check"); + + mod_hdcp_execute_and_set(check_no_reauthentication_request_dp, + &input->reauth_request_check, &status, + hdcp, "reauth_request_check"); + out: return status; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c @@ -156,7 +156,16 @@ uint32_t cur_size = 0; uint32_t data_offset = 0; + if (msg_id == MOD_HDCP_MESSAGE_ID_INVALID || + msg_id >= MOD_HDCP_MESSAGE_ID_MAX) + return MOD_HDCP_STATUS_DDC_FAILURE; + if (is_dp_hdcp(hdcp)) { + int num_dpcd_addrs = sizeof(hdcp_dpcd_addrs) / + sizeof(hdcp_dpcd_addrs[0]); + if (msg_id >= num_dpcd_addrs) + return MOD_HDCP_STATUS_DDC_FAILURE; + while (buf_len > 0) { cur_size = MIN(buf_len, HDCP_MAX_AUX_TRANSACTION_SIZE); success = hdcp->config.ddc.funcs.read_dpcd(hdcp->config.ddc.handle, @@ -171,6 +180,11 @@ data_offset += cur_size; } } else { + int num_i2c_offsets = sizeof(hdcp_i2c_offsets) / + sizeof(hdcp_i2c_offsets[0]); + if (msg_id >= num_i2c_offsets) + return MOD_HDCP_STATUS_DDC_FAILURE; + success = hdcp->config.ddc.funcs.read_i2c( hdcp->config.ddc.handle, HDCP_I2C_ADDR, @@ -215,7 +229,16 @@ uint32_t cur_size = 0; uint32_t data_offset = 0; + if (msg_id == MOD_HDCP_MESSAGE_ID_INVALID || + msg_id >= MOD_HDCP_MESSAGE_ID_MAX) + return MOD_HDCP_STATUS_DDC_FAILURE; + if (is_dp_hdcp(hdcp)) { + int num_dpcd_addrs = sizeof(hdcp_dpcd_addrs) / + sizeof(hdcp_dpcd_addrs[0]); + if (msg_id >= num_dpcd_addrs) + return MOD_HDCP_STATUS_DDC_FAILURE; + while (buf_len > 0) { cur_size = MIN(buf_len, HDCP_MAX_AUX_TRANSACTION_SIZE); success = hdcp->config.ddc.funcs.write_dpcd( @@ -231,6 +254,11 @@ data_offset += cur_size; } } else { + int num_i2c_offsets = sizeof(hdcp_i2c_offsets) / + sizeof(hdcp_i2c_offsets[0]); + if (msg_id >= num_i2c_offsets) + return MOD_HDCP_STATUS_DDC_FAILURE; + hdcp->buf[0] = hdcp_i2c_offsets[msg_id]; memmove(&hdcp->buf[1], buf, buf_len); success = hdcp->config.ddc.funcs.write_i2c( --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c @@ -513,6 +513,9 @@ hdcp_cmd = (struct ta_hdcp_shared_memory *)psp->hdcp_context.context.mem_context.shared_buf; memset(hdcp_cmd, 0, sizeof(struct ta_hdcp_shared_memory)); + if (!display) + return MOD_HDCP_STATUS_DISPLAY_NOT_FOUND; + hdcp_cmd->in_msg.hdcp2_create_session_v2.display_handle = display->index; if (hdcp->connection.link.adjust.hdcp2.force_type == MOD_HDCP_FORCE_TYPE_0) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/modules/inc/mod_stats.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/modules/inc/mod_stats.h @@ -57,10 +57,10 @@ unsigned int length); void mod_stats_update_flip(struct mod_stats *mod_stats, - unsigned long timestamp_in_ns); + unsigned long long timestamp_in_ns); void mod_stats_update_vupdate(struct mod_stats *mod_stats, - unsigned long timestamp_in_ns); + unsigned long long timestamp_in_ns); void mod_stats_update_freesync(struct mod_stats *mod_stats, unsigned int v_total_min, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c @@ -147,15 +147,12 @@ } /* VSC packet set to 4 for PSR-SU, or 2 for PSR1 */ - if (stream->link->psr_settings.psr_feature_enabled) { - if (stream->link->psr_settings.psr_version == DC_PSR_VERSION_SU_1) - vsc_packet_revision = vsc_packet_rev4; - else if (stream->link->psr_settings.psr_version == DC_PSR_VERSION_1) - vsc_packet_revision = vsc_packet_rev2; - } - - if (stream->link->replay_settings.config.replay_supported) + if (stream->link->psr_settings.psr_version == DC_PSR_VERSION_SU_1) + vsc_packet_revision = vsc_packet_rev4; + else if (stream->link->replay_settings.config.replay_supported) vsc_packet_revision = vsc_packet_rev4; + else if (stream->link->psr_settings.psr_version == DC_PSR_VERSION_1) + vsc_packet_revision = vsc_packet_rev2; /* Update to revision 5 for extended colorimetry support */ if (stream->use_vsc_sdp_for_colorimetry) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/modules/power/power_helpers.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/modules/power/power_helpers.c @@ -841,6 +841,8 @@ isPSRSUSupported = false; else if (dpcd_caps->sink_dev_id_str[1] == 0x08 && dpcd_caps->sink_dev_id_str[0] == 0x03) isPSRSUSupported = false; + else if (dpcd_caps->sink_dev_id_str[1] == 0x08 && dpcd_caps->sink_dev_id_str[0] == 0x01) + isPSRSUSupported = false; else if (dpcd_caps->psr_info.force_psrsu_cap == 0x1) isPSRSUSupported = true; } @@ -975,7 +977,7 @@ void set_replay_coasting_vtotal(struct dc_link *link, enum replay_coasting_vtotal_type type, - uint16_t vtotal) + uint32_t vtotal) { link->replay_settings.coasting_vtotal_table[type] = vtotal; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/display/modules/power/power_helpers.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/display/modules/power/power_helpers.h @@ -56,7 +56,7 @@ void init_replay_config(struct dc_link *link, struct replay_config *pr_config); void set_replay_coasting_vtotal(struct dc_link *link, enum replay_coasting_vtotal_type type, - uint16_t vtotal); + uint32_t vtotal); void set_replay_ips_full_screen_video_src_vtotal(struct dc_link *link, uint16_t vtotal); void calculate_replay_link_off_frame_count(struct dc_link *link, uint16_t vtotal, uint16_t htotal); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_11_0_offset.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_11_0_offset.h @@ -7571,6 +7571,8 @@ // base address: 0x10100000 #define regRCC_STRAP0_RCC_DEV0_EPF0_STRAP0 0xd000 #define regRCC_STRAP0_RCC_DEV0_EPF0_STRAP0_BASE_IDX 5 +#define regRCC_DEV0_EPF5_STRAP4 0xd284 +#define regRCC_DEV0_EPF5_STRAP4_BASE_IDX 5 // addressBlock: nbio_nbif0_bif_rst_bif_rst_regblk --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_11_0_sh_mask.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_11_0_sh_mask.h @@ -50665,6 +50665,19 @@ #define RCC_STRAP0_RCC_DEV0_EPF0_STRAP0__STRAP_D1_SUPPORT_DEV0_F0_MASK 0x40000000L #define RCC_STRAP0_RCC_DEV0_EPF0_STRAP0__STRAP_D2_SUPPORT_DEV0_F0_MASK 0x80000000L +//RCC_DEV0_EPF5_STRAP4 +#define RCC_DEV0_EPF5_STRAP4__STRAP_ATOMIC_64BIT_EN_DEV0_F5__SHIFT 0x14 +#define RCC_DEV0_EPF5_STRAP4__STRAP_ATOMIC_EN_DEV0_F5__SHIFT 0x15 +#define RCC_DEV0_EPF5_STRAP4__STRAP_FLR_EN_DEV0_F5__SHIFT 0x16 +#define RCC_DEV0_EPF5_STRAP4__STRAP_PME_SUPPORT_DEV0_F5__SHIFT 0x17 +#define RCC_DEV0_EPF5_STRAP4__STRAP_INTERRUPT_PIN_DEV0_F5__SHIFT 0x1c +#define RCC_DEV0_EPF5_STRAP4__STRAP_AUXPWR_SUPPORT_DEV0_F5__SHIFT 0x1f +#define RCC_DEV0_EPF5_STRAP4__STRAP_ATOMIC_64BIT_EN_DEV0_F5_MASK 0x00100000L +#define RCC_DEV0_EPF5_STRAP4__STRAP_ATOMIC_EN_DEV0_F5_MASK 0x00200000L +#define RCC_DEV0_EPF5_STRAP4__STRAP_FLR_EN_DEV0_F5_MASK 0x00400000L +#define RCC_DEV0_EPF5_STRAP4__STRAP_PME_SUPPORT_DEV0_F5_MASK 0x0F800000L +#define RCC_DEV0_EPF5_STRAP4__STRAP_INTERRUPT_PIN_DEV0_F5_MASK 0x70000000L +#define RCC_DEV0_EPF5_STRAP4__STRAP_AUXPWR_SUPPORT_DEV0_F5_MASK 0x80000000L // addressBlock: nbio_nbif0_bif_rst_bif_rst_regblk //HARD_RST_CTRL --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/include/atomfirmware.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/include/atomfirmware.h @@ -702,7 +702,7 @@ { struct atom_common_table_header table_header; /*the real number of this included in the structure is calcualted by using the (whole structure size - the header size)/size of atom_gpio_pin_lut */ - struct atom_gpio_pin_assignment gpio_pin[8]; + struct atom_gpio_pin_assignment gpio_pin[]; }; @@ -1006,7 +1006,7 @@ uint16_t supporteddevices; uint8_t number_of_path; uint8_t reserved; - struct atom_display_object_path_v2 display_path[8]; //the real number of this included in the structure is calculated by using the (whole structure size - the header size- number_of_path)/size of atom_display_object_path + struct atom_display_object_path_v2 display_path[]; //the real number of this included in the structure is calculated by using the (whole structure size - the header size- number_of_path)/size of atom_display_object_path }; struct display_object_info_table_v1_5 { @@ -1016,7 +1016,7 @@ uint8_t reserved; // the real number of this included in the structure is calculated by using the // (whole structure size - the header size- number_of_path)/size of atom_display_object_path - struct atom_display_object_path_v3 display_path[8]; + struct atom_display_object_path_v3 display_path[]; }; /* @@ -1625,6 +1625,49 @@ uint32_t reserved4[189]; }; +struct uma_carveout_option { + char optionName[29]; //max length of string is 28chars + '\0'. Current design is for "minimum", "Medium", "High". This makes entire struct size 64bits + uint8_t memoryCarvedGb; //memory carved out with setting + uint8_t memoryRemainingGb; //memory remaining on system + union { + struct _flags { + uint8_t Auto : 1; + uint8_t Custom : 1; + uint8_t Reserved : 6; + } flags; + uint8_t all8; + } uma_carveout_option_flags; +}; + +struct atom_integrated_system_info_v2_3 { + struct atom_common_table_header table_header; + uint32_t vbios_misc; // enum of atom_system_vbiosmisc_def + uint32_t gpucapinfo; // enum of atom_system_gpucapinf_def + uint32_t system_config; + uint32_t cpucapinfo; + uint16_t gpuclk_ss_percentage; // unit of 0.001%, 1000 mean 1% + uint16_t gpuclk_ss_type; + uint16_t dpphy_override; // bit vector, enum of atom_sysinfo_dpphy_override_def + uint8_t memorytype; // enum of atom_dmi_t17_mem_type_def, APU memory type indication. + uint8_t umachannelnumber; // number of memory channels + uint8_t htc_hyst_limit; + uint8_t htc_tmp_limit; + uint8_t reserved1; // dp_ss_control + uint8_t gpu_package_id; + struct edp_info_table edp1_info; + struct edp_info_table edp2_info; + uint32_t reserved2[8]; + struct atom_external_display_connection_info extdispconninfo; + uint8_t UMACarveoutVersion; + uint8_t UMACarveoutIndexMax; + uint8_t UMACarveoutTypeDefault; + uint8_t UMACarveoutIndexDefault; + uint8_t UMACarveoutType; //Auto or Custom + uint8_t UMACarveoutIndex; + struct uma_carveout_option UMASizeControlOption[20]; + uint8_t reserved3[110]; +}; + // system_config enum atom_system_vbiosmisc_def{ INTEGRATED_SYSTEM_INFO__GET_EDID_CALLBACK_FUNC_SUPPORT = 0x01, @@ -3508,7 +3551,7 @@ uint8_t phase_delay_us; // phase delay in unit of micro second uint8_t reserved; uint32_t gpio_mask_val; // GPIO Mask value - struct atom_voltage_gpio_map_lut voltage_gpio_lut[1]; + struct atom_voltage_gpio_map_lut voltage_gpio_lut[] __counted_by(gpio_entry_num); }; struct atom_svid2_voltage_object_v4 --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/include/pptable.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/include/pptable.h @@ -477,31 +477,30 @@ } ATOM_PPLIB_STATE_V2; typedef struct _StateArray{ - //how many states we have - UCHAR ucNumEntries; - - ATOM_PPLIB_STATE_V2 states[1]; + //how many states we have + UCHAR ucNumEntries; + + ATOM_PPLIB_STATE_V2 states[] /* __counted_by(ucNumEntries) */; }StateArray; typedef struct _ClockInfoArray{ - //how many clock levels we have - UCHAR ucNumEntries; - - //sizeof(ATOM_PPLIB_CLOCK_INFO) - UCHAR ucEntrySize; - - UCHAR clockInfo[1]; + //how many clock levels we have + UCHAR ucNumEntries; + + //sizeof(ATOM_PPLIB_CLOCK_INFO) + UCHAR ucEntrySize; + + UCHAR clockInfo[]; }ClockInfoArray; typedef struct _NonClockInfoArray{ + //how many non-clock levels we have. normally should be same as number of states + UCHAR ucNumEntries; + //sizeof(ATOM_PPLIB_NONCLOCK_INFO) + UCHAR ucEntrySize; - //how many non-clock levels we have. normally should be same as number of states - UCHAR ucNumEntries; - //sizeof(ATOM_PPLIB_NONCLOCK_INFO) - UCHAR ucEntrySize; - - ATOM_PPLIB_NONCLOCK_INFO nonClockInfo[1]; + ATOM_PPLIB_NONCLOCK_INFO nonClockInfo[] __counted_by(ucNumEntries); }NonClockInfoArray; typedef struct _ATOM_PPLIB_Clock_Voltage_Dependency_Record @@ -513,8 +512,10 @@ typedef struct _ATOM_PPLIB_Clock_Voltage_Dependency_Table { - UCHAR ucNumEntries; // Number of entries. - ATOM_PPLIB_Clock_Voltage_Dependency_Record entries[1]; // Dynamically allocate entries. + // Number of entries. + UCHAR ucNumEntries; + // Dynamically allocate entries. + ATOM_PPLIB_Clock_Voltage_Dependency_Record entries[] __counted_by(ucNumEntries); }ATOM_PPLIB_Clock_Voltage_Dependency_Table; typedef struct _ATOM_PPLIB_Clock_Voltage_Limit_Record @@ -529,8 +530,10 @@ typedef struct _ATOM_PPLIB_Clock_Voltage_Limit_Table { - UCHAR ucNumEntries; // Number of entries. - ATOM_PPLIB_Clock_Voltage_Limit_Record entries[1]; // Dynamically allocate entries. + // Number of entries. + UCHAR ucNumEntries; + // Dynamically allocate entries. + ATOM_PPLIB_Clock_Voltage_Limit_Record entries[] __counted_by(ucNumEntries); }ATOM_PPLIB_Clock_Voltage_Limit_Table; union _ATOM_PPLIB_CAC_Leakage_Record @@ -553,8 +556,10 @@ typedef struct _ATOM_PPLIB_CAC_Leakage_Table { - UCHAR ucNumEntries; // Number of entries. - ATOM_PPLIB_CAC_Leakage_Record entries[1]; // Dynamically allocate entries. + // Number of entries. + UCHAR ucNumEntries; + // Dynamically allocate entries. + ATOM_PPLIB_CAC_Leakage_Record entries[] __counted_by(ucNumEntries); }ATOM_PPLIB_CAC_Leakage_Table; typedef struct _ATOM_PPLIB_PhaseSheddingLimits_Record @@ -568,8 +573,10 @@ typedef struct _ATOM_PPLIB_PhaseSheddingLimits_Table { - UCHAR ucNumEntries; // Number of entries. - ATOM_PPLIB_PhaseSheddingLimits_Record entries[1]; // Dynamically allocate entries. + // Number of entries. + UCHAR ucNumEntries; + // Dynamically allocate entries. + ATOM_PPLIB_PhaseSheddingLimits_Record entries[] __counted_by(ucNumEntries); }ATOM_PPLIB_PhaseSheddingLimits_Table; typedef struct _VCEClockInfo{ @@ -580,8 +587,8 @@ }VCEClockInfo; typedef struct _VCEClockInfoArray{ - UCHAR ucNumEntries; - VCEClockInfo entries[1]; + UCHAR ucNumEntries; + VCEClockInfo entries[] __counted_by(ucNumEntries); }VCEClockInfoArray; typedef struct _ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record @@ -592,8 +599,8 @@ typedef struct _ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table { - UCHAR numEntries; - ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record entries[1]; + UCHAR numEntries; + ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record entries[] __counted_by(numEntries); }ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table; typedef struct _ATOM_PPLIB_VCE_State_Record @@ -604,8 +611,8 @@ typedef struct _ATOM_PPLIB_VCE_State_Table { - UCHAR numEntries; - ATOM_PPLIB_VCE_State_Record entries[1]; + UCHAR numEntries; + ATOM_PPLIB_VCE_State_Record entries[] __counted_by(numEntries); }ATOM_PPLIB_VCE_State_Table; @@ -626,8 +633,8 @@ }UVDClockInfo; typedef struct _UVDClockInfoArray{ - UCHAR ucNumEntries; - UVDClockInfo entries[1]; + UCHAR ucNumEntries; + UVDClockInfo entries[] __counted_by(ucNumEntries); }UVDClockInfoArray; typedef struct _ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record @@ -638,8 +645,8 @@ typedef struct _ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table { - UCHAR numEntries; - ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record entries[1]; + UCHAR numEntries; + ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record entries[] __counted_by(numEntries); }ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table; typedef struct _ATOM_PPLIB_UVD_Table @@ -657,8 +664,8 @@ }ATOM_PPLIB_SAMClk_Voltage_Limit_Record; typedef struct _ATOM_PPLIB_SAMClk_Voltage_Limit_Table{ - UCHAR numEntries; - ATOM_PPLIB_SAMClk_Voltage_Limit_Record entries[1]; + UCHAR numEntries; + ATOM_PPLIB_SAMClk_Voltage_Limit_Record entries[] __counted_by(numEntries); }ATOM_PPLIB_SAMClk_Voltage_Limit_Table; typedef struct _ATOM_PPLIB_SAMU_Table @@ -675,8 +682,8 @@ }ATOM_PPLIB_ACPClk_Voltage_Limit_Record; typedef struct _ATOM_PPLIB_ACPClk_Voltage_Limit_Table{ - UCHAR numEntries; - ATOM_PPLIB_ACPClk_Voltage_Limit_Record entries[1]; + UCHAR numEntries; + ATOM_PPLIB_ACPClk_Voltage_Limit_Record entries[] __counted_by(numEntries); }ATOM_PPLIB_ACPClk_Voltage_Limit_Table; typedef struct _ATOM_PPLIB_ACP_Table @@ -743,9 +750,9 @@ } ATOM_PPLIB_VQ_Budgeting_Record; typedef struct ATOM_PPLIB_VQ_Budgeting_Table { - UCHAR revid; - UCHAR numEntries; - ATOM_PPLIB_VQ_Budgeting_Record entries[1]; + UCHAR revid; + UCHAR numEntries; + ATOM_PPLIB_VQ_Budgeting_Record entries[] __counted_by(numEntries); } ATOM_PPLIB_VQ_Budgeting_Table; #pragma pack() --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/amdgpu_pm.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/amdgpu_pm.c @@ -4217,6 +4217,13 @@ } } + /* + * If gpu_od is the only member in the list, that means gpu_od is an + * empty directory, so remove it. + */ + if (list_is_singular(&adev->pm.od_kobj_list)) + goto err_out; + return 0; err_out: @@ -4244,8 +4251,8 @@ /* under multi-vf mode, the hwmon attributes are all not supported */ if (mode != SRIOV_VF_MODE_MULTI_VF) { adev->pm.int_hwmon_dev = hwmon_device_register_with_groups(adev->dev, - DRIVER_NAME, adev, - hwmon_groups); + DRIVER_NAME, adev, + hwmon_groups); if (IS_ERR(adev->pm.int_hwmon_dev)) { ret = PTR_ERR(adev->pm.int_hwmon_dev); dev_err(adev->dev, "Unable to register hwmon device: %d\n", ret); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c @@ -164,6 +164,8 @@ for (i = 0; i < SUMO_MAX_HARDWARE_POWERLEVELS; i++) { if (table[i].ulSupportedSCLK != 0) { + if (table[i].usVoltageIndex >= SUMO_MAX_NUMBER_VOLTAGES) + continue; vid_mapping_table->entries[table[i].usVoltageIndex].vid_7bit = table[i].usVoltageID; vid_mapping_table->entries[table[i].usVoltageIndex].vid_2bit = --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c @@ -99,7 +99,7 @@ struct amdgpu_device *adev = hwmgr->adev; struct amdgpu_dpm_thermal *range = &adev->pm.dpm.thermal; - uint32_t gpu_temperature, size; + uint32_t gpu_temperature, size = sizeof(gpu_temperature); int ret; /* @@ -927,7 +927,7 @@ enum PP_SMC_POWER_PROFILE type, bool en) { struct pp_hwmgr *hwmgr = handle; - long workload; + long workload[1]; uint32_t index; if (!hwmgr || !hwmgr->pm_en) @@ -945,12 +945,12 @@ hwmgr->workload_mask &= ~(1 << hwmgr->workload_prority[type]); index = fls(hwmgr->workload_mask); index = index > 0 && index <= Workload_Policy_Max ? index - 1 : 0; - workload = hwmgr->workload_setting[index]; + workload[0] = hwmgr->workload_setting[index]; } else { hwmgr->workload_mask |= (1 << hwmgr->workload_prority[type]); index = fls(hwmgr->workload_mask); index = index <= Workload_Policy_Max ? index - 1 : 0; - workload = hwmgr->workload_setting[index]; + workload[0] = hwmgr->workload_setting[index]; } if (type == PP_SMC_POWER_PROFILE_COMPUTE && @@ -960,7 +960,7 @@ } if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) - hwmgr->hwmgr_func->set_power_profile_mode(hwmgr, &workload, 0); + hwmgr->hwmgr_func->set_power_profile_mode(hwmgr, workload, 0); return 0; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/powerplay/hwmgr/pp_psm.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/powerplay/hwmgr/pp_psm.c @@ -30,9 +30,8 @@ { int result; unsigned int i; - unsigned int table_entries; struct pp_power_state *state; - int size; + int size, table_entries; if (hwmgr->hwmgr_func->get_num_of_pp_table_entries == NULL) return 0; @@ -40,15 +39,19 @@ if (hwmgr->hwmgr_func->get_power_state_size == NULL) return 0; - hwmgr->num_ps = table_entries = hwmgr->hwmgr_func->get_num_of_pp_table_entries(hwmgr); + table_entries = hwmgr->hwmgr_func->get_num_of_pp_table_entries(hwmgr); - hwmgr->ps_size = size = hwmgr->hwmgr_func->get_power_state_size(hwmgr) + + size = hwmgr->hwmgr_func->get_power_state_size(hwmgr) + sizeof(struct pp_power_state); - if (table_entries == 0 || size == 0) { + if (table_entries <= 0 || size == 0) { pr_warn("Please check whether power state management is supported on this asic\n"); + hwmgr->num_ps = 0; + hwmgr->ps_size = 0; return 0; } + hwmgr->num_ps = table_entries; + hwmgr->ps_size = size; hwmgr->ps = kcalloc(table_entries, size, GFP_KERNEL); if (hwmgr->ps == NULL) @@ -269,7 +272,7 @@ struct pp_power_state *new_ps) { uint32_t index; - long workload; + long workload[1]; if (hwmgr->not_vf) { if (!skip_display_settings) @@ -294,10 +297,10 @@ if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) { index = fls(hwmgr->workload_mask); index = index > 0 && index <= Workload_Policy_Max ? index - 1 : 0; - workload = hwmgr->workload_setting[index]; + workload[0] = hwmgr->workload_setting[index]; - if (hwmgr->power_profile_mode != workload && hwmgr->hwmgr_func->set_power_profile_mode) - hwmgr->hwmgr_func->set_power_profile_mode(hwmgr, &workload, 0); + if (hwmgr->power_profile_mode != workload[0] && hwmgr->hwmgr_func->set_power_profile_mode) + hwmgr->hwmgr_func->set_power_profile_mode(hwmgr, workload, 0); } return 0; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c @@ -73,8 +73,9 @@ j++; } else if ((table->mc_reg_address[i].uc_pre_reg_data & LOW_NIBBLE_MASK) == DATA_EQU_PREV) { - table->mc_reg_table_entry[num_ranges].mc_data[i] = - table->mc_reg_table_entry[num_ranges].mc_data[i-1]; + if (i) + table->mc_reg_table_entry[num_ranges].mc_data[i] = + table->mc_reg_table_entry[num_ranges].mc_data[i-1]; } } num_ranges++; @@ -226,7 +227,7 @@ return amdgpu_atom_execute_table(adev->mode_info.atom_context, GetIndexIntoMasterTable(COMMAND, DynamicMemorySettings), - (uint32_t *)&engine_clock_parameters); + (uint32_t *)&engine_clock_parameters, sizeof(engine_clock_parameters)); } /* @@ -297,7 +298,7 @@ result = amdgpu_atom_execute_table(adev->mode_info.atom_context, GetIndexIntoMasterTable(COMMAND, ComputeMemoryClockParam), - (uint32_t *)&mpll_parameters); + (uint32_t *)&mpll_parameters, sizeof(mpll_parameters)); if (0 == result) { mpll_param->mpll_fb_divider.clk_frac = @@ -345,7 +346,7 @@ result = amdgpu_atom_execute_table(adev->mode_info.atom_context, GetIndexIntoMasterTable(COMMAND, ComputeMemoryClockParam), - (uint32_t *)&mpll_parameters); + (uint32_t *)&mpll_parameters, sizeof(mpll_parameters)); if (!result) mpll_param->mpll_post_divider = @@ -366,7 +367,7 @@ result = amdgpu_atom_execute_table(adev->mode_info.atom_context, GetIndexIntoMasterTable(COMMAND, ComputeMemoryClockParam), - (uint32_t *)&mpll_parameters); + (uint32_t *)&mpll_parameters, sizeof(mpll_parameters)); /* VEGAM's mpll takes sometime to finish computing */ udelay(10); @@ -396,7 +397,7 @@ result = amdgpu_atom_execute_table(adev->mode_info.atom_context, GetIndexIntoMasterTable(COMMAND, ComputeMemoryEnginePLL), - (uint32_t *)&pll_parameters); + (uint32_t *)&pll_parameters, sizeof(pll_parameters)); if (0 == result) { dividers->pll_post_divider = pll_parameters.ucPostDiv; @@ -420,7 +421,7 @@ result = amdgpu_atom_execute_table(adev->mode_info.atom_context, GetIndexIntoMasterTable(COMMAND, ComputeMemoryEnginePLL), - (uint32_t *)&pll_patameters); + (uint32_t *)&pll_patameters, sizeof(pll_patameters)); if (0 == result) { dividers->pll_post_divider = @@ -457,7 +458,7 @@ result = amdgpu_atom_execute_table(adev->mode_info.atom_context, GetIndexIntoMasterTable(COMMAND, ComputeMemoryEnginePLL), - (uint32_t *)&pll_patameters); + (uint32_t *)&pll_patameters, sizeof(pll_patameters)); if (0 == result) { dividers->usSclk_fcw_frac = le16_to_cpu(pll_patameters.usSclk_fcw_frac); @@ -490,7 +491,7 @@ result = amdgpu_atom_execute_table(adev->mode_info.atom_context, GetIndexIntoMasterTable(COMMAND, ComputeMemoryEnginePLL), - (uint32_t *)&pll_patameters); + (uint32_t *)&pll_patameters, sizeof(pll_patameters)); if (0 == result) { dividers->pll_post_divider = @@ -773,7 +774,7 @@ result = amdgpu_atom_execute_table(adev->mode_info.atom_context, GetIndexIntoMasterTable(COMMAND, ReadEfuseValue), - (uint32_t *)&sOutput_FuseValues); + (uint32_t *)&sOutput_FuseValues, sizeof(sOutput_FuseValues)); if (result) return result; @@ -794,7 +795,7 @@ result = amdgpu_atom_execute_table(adev->mode_info.atom_context, GetIndexIntoMasterTable(COMMAND, ReadEfuseValue), - (uint32_t *)&sOutput_FuseValues); + (uint32_t *)&sOutput_FuseValues, sizeof(sOutput_FuseValues)); if (result) return result; @@ -814,7 +815,7 @@ result = amdgpu_atom_execute_table(adev->mode_info.atom_context, GetIndexIntoMasterTable(COMMAND, ReadEfuseValue), - (uint32_t *)&sOutput_FuseValues); + (uint32_t *)&sOutput_FuseValues, sizeof(sOutput_FuseValues)); if (result) return result; @@ -835,7 +836,7 @@ result = amdgpu_atom_execute_table(adev->mode_info.atom_context, GetIndexIntoMasterTable(COMMAND, ReadEfuseValue), - (uint32_t *)&sOutput_FuseValues); + (uint32_t *)&sOutput_FuseValues, sizeof(sOutput_FuseValues)); if (result) return result; @@ -857,7 +858,7 @@ result = amdgpu_atom_execute_table(adev->mode_info.atom_context, GetIndexIntoMasterTable(COMMAND, ReadEfuseValue), - (uint32_t *)&sOutput_FuseValues); + (uint32_t *)&sOutput_FuseValues, sizeof(sOutput_FuseValues)); if (result) return result; @@ -878,7 +879,7 @@ result = amdgpu_atom_execute_table(adev->mode_info.atom_context, GetIndexIntoMasterTable(COMMAND, ReadEfuseValue), - (uint32_t *)&sOutput_FuseValues); + (uint32_t *)&sOutput_FuseValues, sizeof(sOutput_FuseValues)); if (result) return result; @@ -909,7 +910,7 @@ result = amdgpu_atom_execute_table(adev->mode_info.atom_context, GetIndexIntoMasterTable(COMMAND, ReadEfuseValue), - (uint32_t *)&sOutput_FuseValues); + (uint32_t *)&sOutput_FuseValues, sizeof(sOutput_FuseValues)); if (result) return result; @@ -1134,7 +1135,7 @@ result = amdgpu_atom_execute_table(adev->mode_info.atom_context, GetIndexIntoMasterTable(COMMAND, GetVoltageInfo), - (uint32_t *)&get_voltage_info_param_space); + (uint32_t *)&get_voltage_info_param_space, sizeof(get_voltage_info_param_space)); *voltage = result ? 0 : le16_to_cpu(((GET_EVV_VOLTAGE_INFO_OUTPUT_PARAMETER_V1_2 *) @@ -1179,7 +1180,7 @@ result = amdgpu_atom_execute_table(adev->mode_info.atom_context, GetIndexIntoMasterTable(COMMAND, GetVoltageInfo), - (uint32_t *)&get_voltage_info_param_space); + (uint32_t *)&get_voltage_info_param_space, sizeof(get_voltage_info_param_space)); if (0 != result) return result; @@ -1359,7 +1360,7 @@ result = amdgpu_atom_execute_table(adev->mode_info.atom_context, GetIndexIntoMasterTable(COMMAND, ReadEfuseValue), - (uint32_t *)&efuse_param); + (uint32_t *)&efuse_param, sizeof(efuse_param)); *efuse = result ? 0 : le32_to_cpu(efuse_param.ulEfuseValue) & mask; return result; @@ -1380,7 +1381,7 @@ result = amdgpu_atom_execute_table(adev->mode_info.atom_context, GetIndexIntoMasterTable(COMMAND, DynamicMemorySettings), - (uint32_t *)&memory_clock_parameters); + (uint32_t *)&memory_clock_parameters, sizeof(memory_clock_parameters)); return result; } @@ -1399,7 +1400,7 @@ result = amdgpu_atom_execute_table(adev->mode_info.atom_context, GetIndexIntoMasterTable(COMMAND, GetVoltageInfo), - (uint32_t *)&get_voltage_info_param_space); + (uint32_t *)&get_voltage_info_param_space, sizeof(get_voltage_info_param_space)); *voltage = result ? 0 : le32_to_cpu(((GET_EVV_VOLTAGE_INFO_OUTPUT_PARAMETER_V1_3 *)(&get_voltage_info_param_space))->ulVoltageLevel); @@ -1419,6 +1420,8 @@ GetIndexIntoMasterTable(DATA, SMU_Info), &size, &frev, &crev); + if (!psmu_info) + return -EINVAL; for (i = 0; i < psmu_info->ucSclkEntryNum; i++) { table->entry[i].ucVco_setting = psmu_info->asSclkFcwRangeEntry[i].ucVco_setting; @@ -1526,7 +1529,7 @@ result = amdgpu_atom_execute_table(adev->mode_info.atom_context, GetIndexIntoMasterTable(COMMAND, SetVoltage), - (uint32_t *)voltage_parameters); + (uint32_t *)voltage_parameters, sizeof(*voltage_parameters)); *virtual_voltage_id = voltage_parameters->usVoltageLevel; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomfwctrl.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomfwctrl.c @@ -258,7 +258,7 @@ idx = GetIndexIntoMasterCmdTable(computegpuclockparam); if (amdgpu_atom_execute_table( - adev->mode_info.atom_context, idx, (uint32_t *)&pll_parameters)) + adev->mode_info.atom_context, idx, (uint32_t *)&pll_parameters, sizeof(pll_parameters))) return -EINVAL; pll_output = (struct compute_gpu_clock_output_parameter_v1_8 *) @@ -505,7 +505,7 @@ ix = GetIndexIntoMasterCmdTable(getsmuclockinfo); if (amdgpu_atom_execute_table( - adev->mode_info.atom_context, ix, (uint32_t *)¶meters)) + adev->mode_info.atom_context, ix, (uint32_t *)¶meters, sizeof(parameters))) return -EINVAL; output = (struct atom_get_smu_clock_info_output_parameters_v3_1 *)¶meters; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/powerplay/hwmgr/processpptables.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/powerplay/hwmgr/processpptables.c @@ -1185,6 +1185,8 @@ fw_info = smu_atom_get_data_table(hwmgr->adev, GetIndexIntoMasterTable(DATA, FirmwareInfo), &size, &frev, &crev); + PP_ASSERT_WITH_CODE(fw_info != NULL, + "Missing firmware info!", return -EINVAL); if ((fw_info->ucTableFormatRevision == 1) && (le16_to_cpu(fw_info->usStructureSize) >= sizeof(ATOM_FIRMWARE_INFO_V1_4))) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c @@ -1036,7 +1036,9 @@ switch (type) { case PP_SCLK: - smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetGfxclkFrequency, &now); + ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetGfxclkFrequency, &now); + if (ret) + return ret; /* driver only know min/max gfx_clk, Add level 1 for all other gfx clks */ if (now == data->gfx_max_freq_limit/100) @@ -1057,7 +1059,9 @@ i == 2 ? "*" : ""); break; case PP_MCLK: - smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetFclkFrequency, &now); + ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetFclkFrequency, &now); + if (ret) + return ret; for (i = 0; i < mclk_table->count; i++) size += sprintf(buf + size, "%d: %uMhz %s\n", @@ -1550,7 +1554,10 @@ } if (input[0] == 0) { - smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMinGfxclkFrequency, &min_freq); + ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMinGfxclkFrequency, &min_freq); + if (ret) + return ret; + if (input[1] < min_freq) { pr_err("Fine grain setting minimum sclk (%ld) MHz is less than the minimum allowed (%d) MHz\n", input[1], min_freq); @@ -1558,7 +1565,10 @@ } smu10_data->gfx_actual_soft_min_freq = input[1]; } else if (input[0] == 1) { - smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxGfxclkFrequency, &max_freq); + ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxGfxclkFrequency, &max_freq); + if (ret) + return ret; + if (input[1] > max_freq) { pr_err("Fine grain setting maximum sclk (%ld) MHz is greater than the maximum allowed (%d) MHz\n", input[1], max_freq); @@ -1573,10 +1583,15 @@ pr_err("Input parameter number not correct\n"); return -EINVAL; } - smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMinGfxclkFrequency, &min_freq); - smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxGfxclkFrequency, &max_freq); - + ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMinGfxclkFrequency, &min_freq); + if (ret) + return ret; smu10_data->gfx_actual_soft_min_freq = min_freq; + + ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxGfxclkFrequency, &max_freq); + if (ret) + return ret; + smu10_data->gfx_actual_soft_max_freq = max_freq; } else if (type == PP_OD_COMMIT_DPM_TABLE) { if (size != 0) { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c @@ -2957,6 +2957,7 @@ static int smu7_hwmgr_backend_init(struct pp_hwmgr *hwmgr) { + struct amdgpu_device *adev = hwmgr->adev; struct smu7_hwmgr *data; int result = 0; @@ -2993,40 +2994,37 @@ /* Initalize Dynamic State Adjustment Rule Settings */ result = phm_initializa_dynamic_state_adjustment_rule_settings(hwmgr); - if (0 == result) { - struct amdgpu_device *adev = hwmgr->adev; + if (result) + goto fail; - data->is_tlu_enabled = false; + data->is_tlu_enabled = false; - hwmgr->platform_descriptor.hardwareActivityPerformanceLevels = + hwmgr->platform_descriptor.hardwareActivityPerformanceLevels = SMU7_MAX_HARDWARE_POWERLEVELS; - hwmgr->platform_descriptor.hardwarePerformanceLevels = 2; - hwmgr->platform_descriptor.minimumClocksReductionPercentage = 50; + hwmgr->platform_descriptor.hardwarePerformanceLevels = 2; + hwmgr->platform_descriptor.minimumClocksReductionPercentage = 50; - data->pcie_gen_cap = adev->pm.pcie_gen_mask; - if (data->pcie_gen_cap & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3) - data->pcie_spc_cap = 20; - else - data->pcie_spc_cap = 16; - data->pcie_lane_cap = adev->pm.pcie_mlw_mask; + data->pcie_gen_cap = adev->pm.pcie_gen_mask; + if (data->pcie_gen_cap & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3) + data->pcie_spc_cap = 20; + else + data->pcie_spc_cap = 16; + data->pcie_lane_cap = adev->pm.pcie_mlw_mask; - hwmgr->platform_descriptor.vbiosInterruptId = 0x20000400; /* IRQ_SOURCE1_SW_INT */ -/* The true clock step depends on the frequency, typically 4.5 or 9 MHz. Here we use 5. */ - hwmgr->platform_descriptor.clockStep.engineClock = 500; - hwmgr->platform_descriptor.clockStep.memoryClock = 500; - smu7_thermal_parameter_init(hwmgr); - } else { - /* Ignore return value in here, we are cleaning up a mess. */ - smu7_hwmgr_backend_fini(hwmgr); - } + hwmgr->platform_descriptor.vbiosInterruptId = 0x20000400; /* IRQ_SOURCE1_SW_INT */ + /* The true clock step depends on the frequency, typically 4.5 or 9 MHz. Here we use 5. */ + hwmgr->platform_descriptor.clockStep.engineClock = 500; + hwmgr->platform_descriptor.clockStep.memoryClock = 500; + smu7_thermal_parameter_init(hwmgr); result = smu7_update_edc_leakage_table(hwmgr); - if (result) { - smu7_hwmgr_backend_fini(hwmgr); - return result; - } + if (result) + goto fail; return 0; +fail: + smu7_hwmgr_backend_fini(hwmgr); + return result; } static int smu7_force_dpm_highest(struct pp_hwmgr *hwmgr) @@ -3316,8 +3314,7 @@ const struct pp_power_state *current_ps) { struct amdgpu_device *adev = hwmgr->adev; - struct smu7_power_state *smu7_ps = - cast_phw_smu7_power_state(&request_ps->hardware); + struct smu7_power_state *smu7_ps; uint32_t sclk; uint32_t mclk; struct PP_Clocks minimum_clocks = {0}; @@ -3334,6 +3331,10 @@ uint32_t latency; bool latency_allowed = false; + smu7_ps = cast_phw_smu7_power_state(&request_ps->hardware); + if (!smu7_ps) + return -EINVAL; + data->battery_state = (PP_StateUILabel_Battery == request_ps->classification.ui_label); data->mclk_ignore_signal = false; @@ -5640,7 +5641,7 @@ mode = input[size]; switch (mode) { case PP_SMC_POWER_PROFILE_CUSTOM: - if (size < 8 && size != 0) + if (size != 8 && size != 0) return -EINVAL; /* If only CUSTOM is passed in, use the saved values. Check * that we actually have a CUSTOM profile by ensuring that --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c @@ -584,6 +584,7 @@ hwmgr->dyn_state.uvd_clock_voltage_dependency_table; unsigned long clock = 0; uint32_t level; + int ret; if (NULL == table || table->count <= 0) return -EINVAL; @@ -591,7 +592,9 @@ data->uvd_dpm.soft_min_clk = 0; data->uvd_dpm.hard_min_clk = 0; - smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxUvdLevel, &level); + ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxUvdLevel, &level); + if (ret) + return ret; if (level < table->count) clock = table->entries[level].vclk; @@ -611,6 +614,7 @@ hwmgr->dyn_state.vce_clock_voltage_dependency_table; unsigned long clock = 0; uint32_t level; + int ret; if (NULL == table || table->count <= 0) return -EINVAL; @@ -618,7 +622,9 @@ data->vce_dpm.soft_min_clk = 0; data->vce_dpm.hard_min_clk = 0; - smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxEclkLevel, &level); + ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxEclkLevel, &level); + if (ret) + return ret; if (level < table->count) clock = table->entries[level].ecclk; @@ -638,6 +644,7 @@ hwmgr->dyn_state.acp_clock_voltage_dependency_table; unsigned long clock = 0; uint32_t level; + int ret; if (NULL == table || table->count <= 0) return -EINVAL; @@ -645,7 +652,9 @@ data->acp_dpm.soft_min_clk = 0; data->acp_dpm.hard_min_clk = 0; - smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxAclkLevel, &level); + ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxAclkLevel, &level); + if (ret) + return ret; if (level < table->count) clock = table->entries[level].acpclk; @@ -1065,16 +1074,18 @@ struct pp_power_state *prequest_ps, const struct pp_power_state *pcurrent_ps) { - struct smu8_power_state *smu8_ps = - cast_smu8_power_state(&prequest_ps->hardware); - - const struct smu8_power_state *smu8_current_ps = - cast_const_smu8_power_state(&pcurrent_ps->hardware); - + struct smu8_power_state *smu8_ps; + const struct smu8_power_state *smu8_current_ps; struct smu8_hwmgr *data = hwmgr->backend; struct PP_Clocks clocks = {0, 0, 0, 0}; bool force_high; + smu8_ps = cast_smu8_power_state(&prequest_ps->hardware); + smu8_current_ps = cast_const_smu8_power_state(&pcurrent_ps->hardware); + + if (!smu8_ps || !smu8_current_ps) + return -EINVAL; + smu8_ps->need_dfs_bypass = true; data->battery_state = (PP_StateUILabel_Battery == prequest_ps->classification.ui_label); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c @@ -354,13 +354,13 @@ return 0; } -static void vega10_init_dpm_defaults(struct pp_hwmgr *hwmgr) +static int vega10_init_dpm_defaults(struct pp_hwmgr *hwmgr) { struct vega10_hwmgr *data = hwmgr->backend; - int i; uint32_t sub_vendor_id, hw_revision; uint32_t top32, bottom32; struct amdgpu_device *adev = hwmgr->adev; + int ret, i; vega10_initialize_power_tune_defaults(hwmgr); @@ -485,9 +485,12 @@ if (data->registry_data.vr0hot_enabled) data->smu_features[GNLD_VR0HOT].supported = true; - smum_send_msg_to_smc(hwmgr, + ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetSmuVersion, &hwmgr->smu_version); + if (ret) + return ret; + /* ACG firmware has major version 5 */ if ((hwmgr->smu_version & 0xff000000) == 0x5000000) data->smu_features[GNLD_ACG].supported = true; @@ -505,10 +508,16 @@ data->smu_features[GNLD_PCC_LIMIT].supported = true; /* Get the SN to turn into a Unique ID */ - smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumTop32, &top32); - smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumBottom32, &bottom32); + ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumTop32, &top32); + if (ret) + return ret; + + ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumBottom32, &bottom32); + if (ret) + return ret; adev->unique_id = ((uint64_t)bottom32 << 32) | top32; + return 0; } #ifdef PPLIB_VEGA10_EVV_SUPPORT @@ -882,7 +891,9 @@ vega10_set_features_platform_caps(hwmgr); - vega10_init_dpm_defaults(hwmgr); + result = vega10_init_dpm_defaults(hwmgr); + if (result) + return result; #ifdef PPLIB_VEGA10_EVV_SUPPORT /* Get leakage voltage based on leakage ID. */ @@ -2350,15 +2361,20 @@ { struct vega10_hwmgr *data = hwmgr->backend; uint32_t agc_btc_response; + int ret; if (data->smu_features[GNLD_ACG].supported) { if (0 == vega10_enable_smc_features(hwmgr, true, data->smu_features[GNLD_DPM_PREFETCHER].smu_feature_bitmap)) data->smu_features[GNLD_DPM_PREFETCHER].enabled = true; - smum_send_msg_to_smc(hwmgr, PPSMC_MSG_InitializeAcg, NULL); + ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_InitializeAcg, NULL); + if (ret) + return ret; - smum_send_msg_to_smc(hwmgr, PPSMC_MSG_RunAcgBtc, &agc_btc_response); + ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_RunAcgBtc, &agc_btc_response); + if (ret) + agc_btc_response = 0; if (1 == agc_btc_response) { if (1 == data->acg_loop_state) @@ -2571,8 +2587,11 @@ } } - pp_atomfwctrl_get_voltage_table_v4(hwmgr, VOLTAGE_TYPE_VDDC, + result = pp_atomfwctrl_get_voltage_table_v4(hwmgr, VOLTAGE_TYPE_VDDC, VOLTAGE_OBJ_SVID2, &voltage_table); + PP_ASSERT_WITH_CODE(!result, + "Failed to get voltage table!", + return result); pp_table->MaxVidStep = voltage_table.max_vid_step; pp_table->GfxDpmVoltageMode = @@ -3259,8 +3278,7 @@ const struct pp_power_state *current_ps) { struct amdgpu_device *adev = hwmgr->adev; - struct vega10_power_state *vega10_ps = - cast_phw_vega10_power_state(&request_ps->hardware); + struct vega10_power_state *vega10_ps; uint32_t sclk; uint32_t mclk; struct PP_Clocks minimum_clocks = {0}; @@ -3278,6 +3296,10 @@ uint32_t stable_pstate_sclk = 0, stable_pstate_mclk = 0; uint32_t latency; + vega10_ps = cast_phw_vega10_power_state(&request_ps->hardware); + if (!vega10_ps) + return -EINVAL; + data->battery_state = (PP_StateUILabel_Battery == request_ps->classification.ui_label); @@ -3415,13 +3437,17 @@ const struct vega10_power_state *vega10_ps = cast_const_phw_vega10_power_state(states->pnew_state); struct vega10_single_dpm_table *sclk_table = &(data->dpm_table.gfx_table); - uint32_t sclk = vega10_ps->performance_levels - [vega10_ps->performance_level_count - 1].gfx_clock; struct vega10_single_dpm_table *mclk_table = &(data->dpm_table.mem_table); - uint32_t mclk = vega10_ps->performance_levels - [vega10_ps->performance_level_count - 1].mem_clock; + uint32_t sclk, mclk; uint32_t i; + if (vega10_ps == NULL) + return -EINVAL; + sclk = vega10_ps->performance_levels + [vega10_ps->performance_level_count - 1].gfx_clock; + mclk = vega10_ps->performance_levels + [vega10_ps->performance_level_count - 1].mem_clock; + for (i = 0; i < sclk_table->count; i++) { if (sclk == sclk_table->dpm_levels[i].value) break; @@ -3728,6 +3754,9 @@ cast_const_phw_vega10_power_state(states->pnew_state); int i; + if (vega10_ps == NULL) + return -EINVAL; + PP_ASSERT_WITH_CODE(!vega10_trim_dpm_states(hwmgr, vega10_ps), "Attempt to Trim DPM States Failed!", return -1); @@ -3900,11 +3929,14 @@ uint32_t *query) { uint32_t value; + int ret; if (!query) return -EINVAL; - smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrPkgPwr, &value); + ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrPkgPwr, &value); + if (ret) + return ret; /* SMC returning actual watts, keep consistent with legacy asics, low 8 bit as 8 fractional bits */ *query = value << 8; @@ -4800,14 +4832,16 @@ uint32_t gen_speed, lane_width, current_gen_speed, current_lane_width; PPTable_t *pptable = &(data->smc_state_table.pp_table); - int i, now, size = 0, count = 0; + int i, ret, now, size = 0, count = 0; switch (type) { case PP_SCLK: if (data->registry_data.sclk_dpm_key_disabled) break; - smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrentGfxclkIndex, &now); + ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrentGfxclkIndex, &now); + if (ret) + break; if (hwmgr->pp_one_vf && (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK)) @@ -4823,7 +4857,9 @@ if (data->registry_data.mclk_dpm_key_disabled) break; - smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrentUclkIndex, &now); + ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrentUclkIndex, &now); + if (ret) + break; for (i = 0; i < mclk_table->count; i++) size += sprintf(buf + size, "%d: %uMhz %s\n", @@ -4834,7 +4870,9 @@ if (data->registry_data.socclk_dpm_key_disabled) break; - smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrentSocclkIndex, &now); + ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrentSocclkIndex, &now); + if (ret) + break; for (i = 0; i < soc_table->count; i++) size += sprintf(buf + size, "%d: %uMhz %s\n", @@ -4845,8 +4883,10 @@ if (data->registry_data.dcefclk_dpm_key_disabled) break; - smum_send_msg_to_smc_with_parameter(hwmgr, + ret = smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_GetClockFreqMHz, CLK_DCEFCLK, &now); + if (ret) + break; for (i = 0; i < dcef_table->count; i++) size += sprintf(buf + size, "%d: %uMhz %s\n", @@ -4995,6 +5035,8 @@ vega10_psa = cast_const_phw_vega10_power_state(pstate1); vega10_psb = cast_const_phw_vega10_power_state(pstate2); + if (vega10_psa == NULL || vega10_psb == NULL) + return -EINVAL; /* If the two states don't even have the same number of performance levels * they cannot be the same state. @@ -5128,6 +5170,8 @@ return -EINVAL; vega10_ps = cast_phw_vega10_power_state(&ps->hardware); + if (vega10_ps == NULL) + return -EINVAL; vega10_ps->performance_levels [vega10_ps->performance_level_count - 1].gfx_clock = @@ -5179,6 +5223,8 @@ return -EINVAL; vega10_ps = cast_phw_vega10_power_state(&ps->hardware); + if (vega10_ps == NULL) + return -EINVAL; vega10_ps->performance_levels [vega10_ps->performance_level_count - 1].mem_clock = @@ -5420,6 +5466,9 @@ return; vega10_ps = cast_phw_vega10_power_state(&ps->hardware); + if (vega10_ps == NULL) + return; + max_level = vega10_ps->performance_level_count - 1; if (vega10_ps->performance_levels[max_level].gfx_clock != @@ -5442,6 +5491,9 @@ ps = (struct pp_power_state *)((unsigned long)(hwmgr->ps) + hwmgr->ps_size * (hwmgr->num_ps - 1)); vega10_ps = cast_phw_vega10_power_state(&ps->hardware); + if (vega10_ps == NULL) + return; + max_level = vega10_ps->performance_level_count - 1; if (vega10_ps->performance_levels[max_level].gfx_clock != @@ -5632,6 +5684,8 @@ return -EINVAL; vega10_ps = cast_const_phw_vega10_power_state(state); + if (vega10_ps == NULL) + return -EINVAL; i = index > vega10_ps->performance_level_count - 1 ? vega10_ps->performance_level_count - 1 : index; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c @@ -1120,13 +1120,14 @@ result = vega10_program_didt_config_registers(hwmgr, SEEDCForceStallPatternConfig_Vega10, VEGA10_CONFIGREG_DIDT); result |= vega10_program_didt_config_registers(hwmgr, SEEDCCtrlForceStallConfig_Vega10, VEGA10_CONFIGREG_DIDT); if (0 != result) - return result; + goto exit_safe_mode; vega10_didt_set_mask(hwmgr, false); +exit_safe_mode: amdgpu_gfx_rlc_exit_safe_mode(adev, 0); - return 0; + return result; } static int vega10_disable_se_edc_force_stall_config(struct pp_hwmgr *hwmgr) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c @@ -293,12 +293,12 @@ return 0; } -static void vega12_init_dpm_defaults(struct pp_hwmgr *hwmgr) +static int vega12_init_dpm_defaults(struct pp_hwmgr *hwmgr) { struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend); struct amdgpu_device *adev = hwmgr->adev; uint32_t top32, bottom32; - int i; + int i, ret; data->smu_features[GNLD_DPM_PREFETCHER].smu_feature_id = FEATURE_DPM_PREFETCHER_BIT; @@ -364,10 +364,16 @@ } /* Get the SN to turn into a Unique ID */ - smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumTop32, &top32); - smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumBottom32, &bottom32); + ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumTop32, &top32); + if (ret) + return ret; + ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumBottom32, &bottom32); + if (ret) + return ret; adev->unique_id = ((uint64_t)bottom32 << 32) | top32; + + return 0; } static int vega12_set_private_data_based_on_pptable(struct pp_hwmgr *hwmgr) @@ -410,7 +416,11 @@ vega12_set_features_platform_caps(hwmgr); - vega12_init_dpm_defaults(hwmgr); + result = vega12_init_dpm_defaults(hwmgr); + if (result) { + pr_err("%s failed\n", __func__); + return result; + } /* Parse pptable data read from VBIOS */ vega12_set_private_data_based_on_pptable(hwmgr); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c @@ -328,12 +328,12 @@ return 0; } -static void vega20_init_dpm_defaults(struct pp_hwmgr *hwmgr) +static int vega20_init_dpm_defaults(struct pp_hwmgr *hwmgr) { struct vega20_hwmgr *data = (struct vega20_hwmgr *)(hwmgr->backend); struct amdgpu_device *adev = hwmgr->adev; uint32_t top32, bottom32; - int i; + int i, ret; data->smu_features[GNLD_DPM_PREFETCHER].smu_feature_id = FEATURE_DPM_PREFETCHER_BIT; @@ -404,10 +404,17 @@ } /* Get the SN to turn into a Unique ID */ - smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumTop32, &top32); - smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumBottom32, &bottom32); + ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumTop32, &top32); + if (ret) + return ret; + + ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumBottom32, &bottom32); + if (ret) + return ret; adev->unique_id = ((uint64_t)bottom32 << 32) | top32; + + return 0; } static int vega20_set_private_data_based_on_pptable(struct pp_hwmgr *hwmgr) @@ -427,6 +434,7 @@ { struct vega20_hwmgr *data; struct amdgpu_device *adev = hwmgr->adev; + int result; data = kzalloc(sizeof(struct vega20_hwmgr), GFP_KERNEL); if (data == NULL) @@ -452,8 +460,11 @@ vega20_set_features_platform_caps(hwmgr); - vega20_init_dpm_defaults(hwmgr); - + result = vega20_init_dpm_defaults(hwmgr); + if (result) { + pr_err("%s failed\n", __func__); + return result; + } /* Parse pptable data read from VBIOS */ vega20_set_private_data_based_on_pptable(hwmgr); @@ -4091,9 +4102,11 @@ if (power_profile_mode == PP_SMC_POWER_PROFILE_CUSTOM) { struct vega20_hwmgr *data = (struct vega20_hwmgr *)(hwmgr->backend); - if (size == 0 && !data->is_custom_profile_set) + + if (size != 10 && size != 0) return -EINVAL; - if (size < 10 && size != 0) + + if (size == 0 && !data->is_custom_profile_set) return -EINVAL; result = vega20_get_activity_monitor_coeff(hwmgr, @@ -4155,6 +4168,8 @@ activity_monitor.Fclk_PD_Data_error_coeff = input[8]; activity_monitor.Fclk_PD_Data_error_rate_coeff = input[9]; break; + default: + return -EINVAL; } result = vega20_set_activity_monitor_coeff(hwmgr, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/powerplay/smumgr/vega10_smumgr.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/powerplay/smumgr/vega10_smumgr.c @@ -130,13 +130,17 @@ uint64_t *features_enabled) { uint32_t enabled_features; + int ret; if (features_enabled == NULL) return -EINVAL; - smum_send_msg_to_smc(hwmgr, + ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetEnabledSmuFeatures, &enabled_features); + if (ret) + return ret; + *features_enabled = enabled_features; return 0; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c @@ -590,7 +590,8 @@ return -EIO; } - if (!smu_table->hardcode_pptable) { + if (!smu_table->hardcode_pptable || smu_table->power_play_table_size < size) { + kfree(smu_table->hardcode_pptable); smu_table->hardcode_pptable = kzalloc(size, GFP_KERNEL); if (!smu_table->hardcode_pptable) return -ENOMEM; @@ -734,7 +735,7 @@ smu->adev = adev; smu->pm_enabled = !!amdgpu_dpm; smu->is_apu = false; - smu->smu_baco.state = SMU_BACO_STATE_EXIT; + smu->smu_baco.state = SMU_BACO_STATE_NONE; smu->smu_baco.platform_support = false; smu->user_dpm_profile.fan_mode = -1; @@ -1192,6 +1193,14 @@ smu->plpd_mode = XGMI_PLPD_NONE; } +static bool smu_is_workload_profile_available(struct smu_context *smu, + u32 profile) +{ + if (profile >= PP_SMC_POWER_PROFILE_COUNT) + return false; + return smu->workload_map && smu->workload_map[profile].valid_mapping; +} + static int smu_sw_init(void *handle) { struct amdgpu_device *adev = (struct amdgpu_device *)handle; @@ -1215,7 +1224,6 @@ atomic_set(&smu->smu_power.power_gate.vpe_gated, 1); atomic_set(&smu->smu_power.power_gate.umsch_mm_gated, 1); - smu->workload_mask = 1 << smu->workload_prority[PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT]; smu->workload_prority[PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT] = 0; smu->workload_prority[PP_SMC_POWER_PROFILE_FULLSCREEN3D] = 1; smu->workload_prority[PP_SMC_POWER_PROFILE_POWERSAVING] = 2; @@ -1224,6 +1232,12 @@ smu->workload_prority[PP_SMC_POWER_PROFILE_COMPUTE] = 5; smu->workload_prority[PP_SMC_POWER_PROFILE_CUSTOM] = 6; + if (smu->is_apu || + !smu_is_workload_profile_available(smu, PP_SMC_POWER_PROFILE_FULLSCREEN3D)) + smu->workload_mask = 1 << smu->workload_prority[PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT]; + else + smu->workload_mask = 1 << smu->workload_prority[PP_SMC_POWER_PROFILE_FULLSCREEN3D]; + smu->workload_setting[0] = PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT; smu->workload_setting[1] = PP_SMC_POWER_PROFILE_FULLSCREEN3D; smu->workload_setting[2] = PP_SMC_POWER_PROFILE_POWERSAVING; @@ -1954,10 +1968,25 @@ return 0; } +static int smu_reset_mp1_state(struct smu_context *smu) +{ + struct amdgpu_device *adev = smu->adev; + int ret = 0; + + if ((!adev->in_runpm) && (!adev->in_suspend) && + (!amdgpu_in_reset(adev)) && amdgpu_ip_version(adev, MP1_HWIP, 0) == + IP_VERSION(13, 0, 10) && + !amdgpu_device_has_display_hardware(adev)) + ret = smu_set_mp1_state(smu, PP_MP1_STATE_UNLOAD); + + return ret; +} + static int smu_hw_fini(void *handle) { struct amdgpu_device *adev = (struct amdgpu_device *)handle; struct smu_context *smu = adev->powerplay.pp_handle; + int ret; if (amdgpu_sriov_vf(adev) && !amdgpu_sriov_is_pp_one_vf(adev)) return 0; @@ -1975,7 +2004,15 @@ adev->pm.dpm_enabled = false; - return smu_smc_hw_cleanup(smu); + ret = smu_smc_hw_cleanup(smu); + if (ret) + return ret; + + ret = smu_reset_mp1_state(smu); + if (ret) + return ret; + + return 0; } static void smu_late_fini(void *handle) @@ -2161,12 +2198,13 @@ } static int smu_adjust_power_state_dynamic(struct smu_context *smu, - enum amd_dpm_forced_level level, - bool skip_display_settings) + enum amd_dpm_forced_level level, + bool skip_display_settings, + bool init) { int ret = 0; int index = 0; - long workload; + long workload[1]; struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm); if (!skip_display_settings) { @@ -2206,10 +2244,10 @@ smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM) { index = fls(smu->workload_mask); index = index > 0 && index <= WORKLOAD_POLICY_MAX ? index - 1 : 0; - workload = smu->workload_setting[index]; + workload[0] = smu->workload_setting[index]; - if (smu->power_profile_mode != workload) - smu_bump_power_profile_mode(smu, &workload, 0); + if (init || smu->power_profile_mode != workload[0]) + smu_bump_power_profile_mode(smu, workload, 0); } return ret; @@ -2229,11 +2267,13 @@ ret = smu_pre_display_config_changed(smu); if (ret) return ret; - ret = smu_adjust_power_state_dynamic(smu, level, false); + ret = smu_adjust_power_state_dynamic(smu, level, false, false); break; case AMD_PP_TASK_COMPLETE_INIT: + ret = smu_adjust_power_state_dynamic(smu, level, true, true); + break; case AMD_PP_TASK_READJUST_POWER_STATE: - ret = smu_adjust_power_state_dynamic(smu, level, true); + ret = smu_adjust_power_state_dynamic(smu, level, true, false); break; default: break; @@ -2259,7 +2299,7 @@ { struct smu_context *smu = handle; struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm); - long workload; + long workload[1]; uint32_t index; if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled) @@ -2272,17 +2312,17 @@ smu->workload_mask &= ~(1 << smu->workload_prority[type]); index = fls(smu->workload_mask); index = index > 0 && index <= WORKLOAD_POLICY_MAX ? index - 1 : 0; - workload = smu->workload_setting[index]; + workload[0] = smu->workload_setting[index]; } else { smu->workload_mask |= (1 << smu->workload_prority[type]); index = fls(smu->workload_mask); index = index <= WORKLOAD_POLICY_MAX ? index - 1 : 0; - workload = smu->workload_setting[index]; + workload[0] = smu->workload_setting[index]; } if (smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL && smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM) - smu_bump_power_profile_mode(smu, &workload, 0); + smu_bump_power_profile_mode(smu, workload, 0); return 0; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h @@ -424,6 +424,7 @@ enum smu_baco_state { SMU_BACO_STATE_ENTER = 0, SMU_BACO_STATE_EXIT, + SMU_BACO_STATE_NONE, }; struct smu_baco_context { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h @@ -298,5 +298,11 @@ int smu_v13_0_set_wbrf_exclusion_ranges(struct smu_context *smu, struct freq_band_range *exclusion_ranges); + +int smu_v13_0_get_boot_freq_by_index(struct smu_context *smu, + enum smu_clk_type clk_type, + uint32_t *value); + +void smu_v13_0_interrupt_work(struct smu_context *smu); #endif #endif --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c @@ -1283,10 +1283,8 @@ uint32_t *max_power_limit, uint32_t *min_power_limit) { - struct smu_11_0_powerplay_table *powerplay_table = - (struct smu_11_0_powerplay_table *)smu->smu_table.power_play_table; PPTable_t *pptable = smu->smu_table.driver_pptable; - uint32_t power_limit, od_percent_upper, od_percent_lower; + uint32_t power_limit; if (smu_v11_0_get_current_power_limit(smu, &power_limit)) { /* the last hope to figure out the ppt limit */ @@ -1302,26 +1300,14 @@ *current_power_limit = power_limit; if (default_power_limit) *default_power_limit = power_limit; - - if (smu->od_enabled) - od_percent_upper = le32_to_cpu(powerplay_table->overdrive_table.max[SMU_11_0_ODSETTING_POWERPERCENTAGE]); - else - od_percent_upper = 0; - - od_percent_lower = le32_to_cpu(powerplay_table->overdrive_table.min[SMU_11_0_ODSETTING_POWERPERCENTAGE]); - - dev_dbg(smu->adev->dev, "od percent upper:%d, od percent lower:%d (default power: %d)\n", - od_percent_upper, od_percent_lower, power_limit); - - if (max_power_limit) { - *max_power_limit = power_limit * (100 + od_percent_upper); - *max_power_limit /= 100; - } - - if (min_power_limit) { - *min_power_limit = power_limit * (100 - od_percent_lower); - *min_power_limit /= 100; - } + if (max_power_limit) + *max_power_limit = power_limit; + /** + * No lower bound is imposed on the limit. Any unreasonable limit set + * will result in frequent throttling. + */ + if (min_power_limit) + *min_power_limit = 0; return 0; } @@ -1434,6 +1420,9 @@ if ((profile_mode == PP_SMC_POWER_PROFILE_CUSTOM) && (smu->smc_fw_version >= 0x360d00)) { + if (size != 10) + return -EINVAL; + ret = smu_cmn_update_table(smu, SMU_TABLE_ACTIVITY_MONITOR_COEFF, WORKLOAD_PPLIB_CUSTOM_BIT, @@ -1467,6 +1456,8 @@ activity_monitor.Mem_PD_Data_error_coeff = input[8]; activity_monitor.Mem_PD_Data_error_rate_coeff = input[9]; break; + default: + return -EINVAL; } ret = smu_cmn_update_table(smu, @@ -2272,8 +2263,8 @@ /* TODO: confirm this on real target */ esm_ctrl = RREG32_PCIE(smnPCIE_ESM_CTRL); - if ((esm_ctrl >> 15) & 0x1FFFF) - return (uint16_t)(((esm_ctrl >> 8) & 0x3F) + 128); + if ((esm_ctrl >> 15) & 0x1) + return (uint16_t)(((esm_ctrl >> 8) & 0x7F) + 128); return smu_v11_0_get_current_pcie_link_speed(smu); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c @@ -1219,19 +1219,22 @@ value); } -static bool navi10_is_support_fine_grained_dpm(struct smu_context *smu, enum smu_clk_type clk_type) +static int navi10_is_support_fine_grained_dpm(struct smu_context *smu, enum smu_clk_type clk_type) { PPTable_t *pptable = smu->smu_table.driver_pptable; DpmDescriptor_t *dpm_desc = NULL; - uint32_t clk_index = 0; + int clk_index = 0; clk_index = smu_cmn_to_asic_specific_index(smu, CMN2ASIC_MAPPING_CLK, clk_type); + if (clk_index < 0) + return clk_index; + dpm_desc = &pptable->DpmDescriptor[clk_index]; /* 0 - Fine grained DPM, 1 - Discrete DPM */ - return dpm_desc->SnapToDiscrete == 0; + return dpm_desc->SnapToDiscrete == 0 ? 1 : 0; } static inline bool navi10_od_feature_is_supported(struct smu_11_0_overdrive_table *od_table, enum SMU_11_0_ODFEATURE_CAP cap) @@ -1287,7 +1290,11 @@ if (ret) return ret; - if (!navi10_is_support_fine_grained_dpm(smu, clk_type)) { + ret = navi10_is_support_fine_grained_dpm(smu, clk_type); + if (ret < 0) + return ret; + + if (!ret) { for (i = 0; i < count; i++) { ret = smu_v11_0_get_dpm_freq_by_index(smu, clk_type, i, &value); @@ -1496,7 +1503,11 @@ if (ret) return size; - if (!navi10_is_support_fine_grained_dpm(smu, clk_type)) { + ret = navi10_is_support_fine_grained_dpm(smu, clk_type); + if (ret < 0) + return ret; + + if (!ret) { for (i = 0; i < count; i++) { ret = smu_v11_0_get_dpm_freq_by_index(smu, clk_type, i, &value); if (ret) @@ -1665,7 +1676,11 @@ case SMU_UCLK: case SMU_FCLK: /* There is only 2 levels for fine grained DPM */ - if (navi10_is_support_fine_grained_dpm(smu, clk_type)) { + ret = navi10_is_support_fine_grained_dpm(smu, clk_type); + if (ret < 0) + return ret; + + if (ret) { soft_max_level = (soft_max_level >= 1 ? 1 : 0); soft_min_level = (soft_min_level >= 1 ? 1 : 0); } @@ -2006,6 +2021,8 @@ } if (smu->power_profile_mode == PP_SMC_POWER_PROFILE_CUSTOM) { + if (size != 10) + return -EINVAL; ret = smu_cmn_update_table(smu, SMU_TABLE_ACTIVITY_MONITOR_COEFF, WORKLOAD_PPLIB_CUSTOM_BIT, @@ -2049,6 +2066,8 @@ activity_monitor.Mem_PD_Data_error_coeff = input[8]; activity_monitor.Mem_PD_Data_error_rate_coeff = input[9]; break; + default: + return -EINVAL; } ret = smu_cmn_update_table(smu, @@ -2339,7 +2358,7 @@ (struct smu_11_0_powerplay_table *)smu->smu_table.power_play_table; struct smu_11_0_overdrive_table *od_settings = smu->od_settings; PPTable_t *pptable = smu->smu_table.driver_pptable; - uint32_t power_limit, od_percent_upper, od_percent_lower; + uint32_t power_limit, od_percent_upper = 0, od_percent_lower = 0; if (smu_v11_0_get_current_power_limit(smu, &power_limit)) { /* the last hope to figure out the ppt limit */ @@ -2356,13 +2375,16 @@ if (default_power_limit) *default_power_limit = power_limit; - if (smu->od_enabled && - navi10_od_feature_is_supported(od_settings, SMU_11_0_ODCAP_POWER_LIMIT)) - od_percent_upper = le32_to_cpu(powerplay_table->overdrive_table.max[SMU_11_0_ODSETTING_POWERPERCENTAGE]); - else - od_percent_upper = 0; - - od_percent_lower = le32_to_cpu(powerplay_table->overdrive_table.min[SMU_11_0_ODSETTING_POWERPERCENTAGE]); + if (powerplay_table) { + if (smu->od_enabled && + navi10_od_feature_is_supported(od_settings, SMU_11_0_ODCAP_POWER_LIMIT)) { + od_percent_upper = le32_to_cpu(powerplay_table->overdrive_table.max[SMU_11_0_ODSETTING_POWERPERCENTAGE]); + od_percent_lower = le32_to_cpu(powerplay_table->overdrive_table.min[SMU_11_0_ODSETTING_POWERPERCENTAGE]); + } else if (navi10_od_feature_is_supported(od_settings, SMU_11_0_ODCAP_POWER_LIMIT)) { + od_percent_upper = 0; + od_percent_lower = le32_to_cpu(powerplay_table->overdrive_table.min[SMU_11_0_ODSETTING_POWERPERCENTAGE]); + } + } dev_dbg(smu->adev->dev, "od percent upper:%d, od percent lower:%d (default power: %d)\n", od_percent_upper, od_percent_lower, power_limit); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c @@ -617,6 +617,12 @@ return throttler_status; } +static bool sienna_cichlid_is_od_feature_supported(struct smu_11_0_7_overdrive_table *od_table, + enum SMU_11_0_7_ODFEATURE_CAP cap) +{ + return od_table->cap[cap]; +} + static int sienna_cichlid_get_power_limit(struct smu_context *smu, uint32_t *current_power_limit, uint32_t *default_power_limit, @@ -625,7 +631,8 @@ { struct smu_11_0_7_powerplay_table *powerplay_table = (struct smu_11_0_7_powerplay_table *)smu->smu_table.power_play_table; - uint32_t power_limit, od_percent_upper, od_percent_lower; + struct smu_11_0_7_overdrive_table *od_settings = smu->od_settings; + uint32_t power_limit, od_percent_upper = 0, od_percent_lower = 0; uint16_t *table_member; GET_PPTABLE_MEMBER(SocketPowerLimitAc, &table_member); @@ -640,12 +647,16 @@ if (default_power_limit) *default_power_limit = power_limit; - if (smu->od_enabled) - od_percent_upper = le32_to_cpu(powerplay_table->overdrive_table.max[SMU_11_0_7_ODSETTING_POWERPERCENTAGE]); - else - od_percent_upper = 0; - - od_percent_lower = le32_to_cpu(powerplay_table->overdrive_table.min[SMU_11_0_7_ODSETTING_POWERPERCENTAGE]); + if (powerplay_table) { + if (smu->od_enabled && + sienna_cichlid_is_od_feature_supported(od_settings, SMU_11_0_7_ODCAP_POWER_LIMIT)) { + od_percent_upper = le32_to_cpu(powerplay_table->overdrive_table.max[SMU_11_0_7_ODSETTING_POWERPERCENTAGE]); + od_percent_lower = le32_to_cpu(powerplay_table->overdrive_table.min[SMU_11_0_7_ODSETTING_POWERPERCENTAGE]); + } else if ((sienna_cichlid_is_od_feature_supported(od_settings, SMU_11_0_7_ODCAP_POWER_LIMIT))) { + od_percent_upper = 0; + od_percent_lower = le32_to_cpu(powerplay_table->overdrive_table.min[SMU_11_0_7_ODSETTING_POWERPERCENTAGE]); + } + } dev_dbg(smu->adev->dev, "od percent upper:%d, od percent lower:%d (default power: %d)\n", od_percent_upper, od_percent_lower, power_limit); @@ -1250,12 +1261,6 @@ return dpm_desc->SnapToDiscrete == 0; } -static bool sienna_cichlid_is_od_feature_supported(struct smu_11_0_7_overdrive_table *od_table, - enum SMU_11_0_7_ODFEATURE_CAP cap) -{ - return od_table->cap[cap]; -} - static void sienna_cichlid_get_od_setting_range(struct smu_11_0_7_overdrive_table *od_table, enum SMU_11_0_7_ODSETTING_ID setting, uint32_t *min, uint32_t *max) @@ -1717,6 +1722,8 @@ } if (smu->power_profile_mode == PP_SMC_POWER_PROFILE_CUSTOM) { + if (size != 10) + return -EINVAL; ret = smu_cmn_update_table(smu, SMU_TABLE_ACTIVITY_MONITOR_COEFF, WORKLOAD_PPLIB_CUSTOM_BIT, @@ -1760,6 +1767,8 @@ activity_monitor->Mem_PD_Data_error_coeff = input[8]; activity_monitor->Mem_PD_Data_error_rate_coeff = input[9]; break; + default: + return -EINVAL; } ret = smu_cmn_update_table(smu, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c @@ -514,7 +514,7 @@ getsmuclockinfo); ret = amdgpu_atom_execute_table(adev->mode_info.atom_context, index, - (uint32_t *)&input); + (uint32_t *)&input, sizeof(input)); if (ret) return -EINVAL; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c @@ -242,7 +242,9 @@ goto err0_out; smu_table->metrics_time = 0; - smu_table->gpu_metrics_table_size = max(sizeof(struct gpu_metrics_v2_3), sizeof(struct gpu_metrics_v2_2)); + smu_table->gpu_metrics_table_size = sizeof(struct gpu_metrics_v2_2); + smu_table->gpu_metrics_table_size = max(smu_table->gpu_metrics_table_size, sizeof(struct gpu_metrics_v2_3)); + smu_table->gpu_metrics_table_size = max(smu_table->gpu_metrics_table_size, sizeof(struct gpu_metrics_v2_4)); smu_table->gpu_metrics_table = kzalloc(smu_table->gpu_metrics_table_size, GFP_KERNEL); if (!smu_table->gpu_metrics_table) goto err1_out; @@ -976,6 +978,18 @@ } } if (min) { + ret = vangogh_get_profiling_clk_mask(smu, + AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK, + NULL, + NULL, + &mclk_mask, + &fclk_mask, + &soc_mask); + if (ret) + goto failed; + + vclk_mask = dclk_mask = 0; + switch (clk_type) { case SMU_UCLK: case SMU_MCLK: @@ -2444,6 +2458,8 @@ ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_LogGfxOffResidency, start, &residency); + if (ret) + return ret; if (!start) adev->gfx.gfx_off_residency = residency; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c @@ -301,7 +301,7 @@ getsmuclockinfo); ret = amdgpu_atom_execute_table(adev->mode_info.atom_context, index, - (uint32_t *)&input); + (uint32_t *)&input, sizeof(input)); if (ret) return -EINVAL; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c @@ -1682,8 +1682,8 @@ /* TODO: confirm this on real target */ esm_ctrl = RREG32_PCIE(smnPCIE_ESM_CTRL); - if ((esm_ctrl >> 15) & 0x1FFFF) - return (((esm_ctrl >> 8) & 0x3F) + 128); + if ((esm_ctrl >> 15) & 0x1) + return (((esm_ctrl >> 8) & 0x7F) + 128); return smu_v13_0_get_current_pcie_link_speed(smu); } @@ -1714,7 +1714,6 @@ gpu_metrics->average_gfx_activity = metrics.AverageGfxActivity; gpu_metrics->average_umc_activity = metrics.AverageUclkActivity; - gpu_metrics->average_mm_activity = 0; /* Valid power data is available only from primary die */ if (aldebaran_is_primary(smu)) { @@ -1880,7 +1879,8 @@ index = smu_cmn_to_asic_specific_index(smu, CMN2ASIC_MAPPING_MSG, SMU_MSG_GfxDeviceDriverReset); - + if (index < 0 ) + return -EINVAL; mutex_lock(&smu->message_lock); if (smu->smc_fw_version >= 0x00441400) { ret = smu_cmn_send_msg_without_waiting(smu, (uint16_t)index, SMU_RESET_MODE_2); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c @@ -79,8 +79,8 @@ #define PCIE_LC_LINK_WIDTH_CNTL__LC_LINK_WIDTH_RD_MASK 0x00000070L #define PCIE_LC_LINK_WIDTH_CNTL__LC_LINK_WIDTH_RD__SHIFT 0x4 #define smnPCIE_LC_SPEED_CNTL 0x11140290 -#define PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE_MASK 0xC000 -#define PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE__SHIFT 0xE +#define PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE_MASK 0xE0 +#define PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE__SHIFT 0x5 #define ENABLE_IMU_ARG_GFXOFF_ENABLE 1 @@ -1321,11 +1321,11 @@ return 0; } -static int smu_v13_0_ack_ac_dc_interrupt(struct smu_context *smu) +void smu_v13_0_interrupt_work(struct smu_context *smu) { - return smu_cmn_send_smc_msg(smu, - SMU_MSG_ReenableAcDcInterrupt, - NULL); + smu_cmn_send_smc_msg(smu, + SMU_MSG_ReenableAcDcInterrupt, + NULL); } #define THM_11_0__SRCID__THM_DIG_THERM_L2H 0 /* ASIC_TEMP > CG_THERMAL_INT.DIG_THERM_INTH */ @@ -1378,12 +1378,12 @@ switch (ctxid) { case 0x3: dev_dbg(adev->dev, "Switched to AC mode!\n"); - smu_v13_0_ack_ac_dc_interrupt(smu); + schedule_work(&smu->interrupt_work); adev->pm.ac_power = true; break; case 0x4: dev_dbg(adev->dev, "Switched to DC mode!\n"); - smu_v13_0_ack_ac_dc_interrupt(smu); + schedule_work(&smu->interrupt_work); adev->pm.ac_power = false; break; case 0x7: @@ -1555,22 +1555,9 @@ uint32_t clock_limit; if (!smu_cmn_clk_dpm_is_enabled(smu, clk_type)) { - switch (clk_type) { - case SMU_MCLK: - case SMU_UCLK: - clock_limit = smu->smu_table.boot_values.uclk; - break; - case SMU_GFXCLK: - case SMU_SCLK: - clock_limit = smu->smu_table.boot_values.gfxclk; - break; - case SMU_SOCCLK: - clock_limit = smu->smu_table.boot_values.socclk; - break; - default: - clock_limit = 0; - break; - } + ret = smu_v13_0_get_boot_freq_by_index(smu, clk_type, &clock_limit); + if (ret) + return ret; /* clock in Mhz unit */ if (min) @@ -1890,6 +1877,40 @@ NULL); } +int smu_v13_0_get_boot_freq_by_index(struct smu_context *smu, + enum smu_clk_type clk_type, + uint32_t *value) +{ + int ret = 0; + + switch (clk_type) { + case SMU_MCLK: + case SMU_UCLK: + *value = smu->smu_table.boot_values.uclk; + break; + case SMU_FCLK: + *value = smu->smu_table.boot_values.fclk; + break; + case SMU_GFXCLK: + case SMU_SCLK: + *value = smu->smu_table.boot_values.gfxclk; + break; + case SMU_SOCCLK: + *value = smu->smu_table.boot_values.socclk; + break; + case SMU_VCLK: + *value = smu->smu_table.boot_values.vclk; + break; + case SMU_DCLK: + *value = smu->smu_table.boot_values.dclk; + break; + default: + ret = -EINVAL; + break; + } + return ret; +} + int smu_v13_0_get_dpm_freq_by_index(struct smu_context *smu, enum smu_clk_type clk_type, uint16_t level, uint32_t *value) @@ -1901,7 +1922,7 @@ return -EINVAL; if (!smu_cmn_clk_dpm_is_enabled(smu, clk_type)) - return 0; + return smu_v13_0_get_boot_freq_by_index(smu, clk_type, value); clk_id = smu_cmn_to_asic_specific_index(smu, CMN2ASIC_MAPPING_CLK, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c @@ -2356,7 +2356,7 @@ (struct smu_13_0_0_powerplay_table *)table_context->power_play_table; PPTable_t *pptable = table_context->driver_pptable; SkuTable_t *skutable = &pptable->SkuTable; - uint32_t power_limit, od_percent_upper, od_percent_lower; + uint32_t power_limit, od_percent_upper = 0, od_percent_lower = 0; uint32_t msg_limit = skutable->MsgLimits.Power[PPT_THROTTLER_PPT0][POWER_SOURCE_AC]; if (smu_v13_0_get_current_power_limit(smu, &power_limit)) @@ -2369,12 +2369,16 @@ if (default_power_limit) *default_power_limit = power_limit; - if (smu->od_enabled) - od_percent_upper = le32_to_cpu(powerplay_table->overdrive_table.max[SMU_13_0_0_ODSETTING_POWERPERCENTAGE]); - else - od_percent_upper = 0; - - od_percent_lower = le32_to_cpu(powerplay_table->overdrive_table.min[SMU_13_0_0_ODSETTING_POWERPERCENTAGE]); + if (powerplay_table) { + if (smu->od_enabled && + smu_v13_0_0_is_od_feature_supported(smu, PP_OD_FEATURE_PPT_BIT)) { + od_percent_upper = le32_to_cpu(powerplay_table->overdrive_table.max[SMU_13_0_0_ODSETTING_POWERPERCENTAGE]); + od_percent_lower = le32_to_cpu(powerplay_table->overdrive_table.min[SMU_13_0_0_ODSETTING_POWERPERCENTAGE]); + } else if (smu_v13_0_0_is_od_feature_supported(smu, PP_OD_FEATURE_PPT_BIT)) { + od_percent_upper = 0; + od_percent_lower = le32_to_cpu(powerplay_table->overdrive_table.min[SMU_13_0_0_ODSETTING_POWERPERCENTAGE]); + } + } dev_dbg(smu->adev->dev, "od percent upper:%d, od percent lower:%d (default power: %d)\n", od_percent_upper, od_percent_lower, power_limit); @@ -2491,6 +2495,9 @@ } if (smu->power_profile_mode == PP_SMC_POWER_PROFILE_CUSTOM) { + if (size != 9) + return -EINVAL; + ret = smu_cmn_update_table(smu, SMU_TABLE_ACTIVITY_MONITOR_COEFF, WORKLOAD_PPLIB_CUSTOM_BIT, @@ -2522,6 +2529,8 @@ activity_monitor->Fclk_PD_Data_error_coeff = input[7]; activity_monitor->Fclk_PD_Data_error_rate_coeff = input[8]; break; + default: + return -EINVAL; } ret = smu_cmn_update_table(smu, @@ -2546,18 +2555,17 @@ workload_mask = 1 << workload_type; /* Add optimizations for SMU13.0.0/10. Reuse the power saving profile */ - if (smu->power_profile_mode == PP_SMC_POWER_PROFILE_COMPUTE) { - if ((amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 0) && - ((smu->adev->pm.fw_version == 0x004e6601) || - (smu->adev->pm.fw_version >= 0x004e7300))) || - (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 10) && - smu->adev->pm.fw_version >= 0x00504500)) { - workload_type = smu_cmn_to_asic_specific_index(smu, - CMN2ASIC_MAPPING_WORKLOAD, - PP_SMC_POWER_PROFILE_POWERSAVING); - if (workload_type >= 0) - workload_mask |= 1 << workload_type; - } + if ((workload_mask & (1 << PP_SMC_POWER_PROFILE_COMPUTE)) && + ((amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 0) && + ((smu->adev->pm.fw_version == 0x004e6601) || + (smu->adev->pm.fw_version >= 0x004e7300))) || + (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 10) && + smu->adev->pm.fw_version >= 0x00504500))) { + workload_type = smu_cmn_to_asic_specific_index(smu, + CMN2ASIC_MAPPING_WORKLOAD, + PP_SMC_POWER_PROFILE_POWERSAVING); + if (workload_type >= 0) + workload_mask |= 1 << workload_type; } return smu_cmn_send_smc_msg_with_param(smu, @@ -2747,7 +2755,13 @@ switch (mp1_state) { case PP_MP1_STATE_UNLOAD: - ret = smu_cmn_set_mp1_state(smu, mp1_state); + ret = smu_cmn_send_smc_msg_with_param(smu, + SMU_MSG_PrepareMp1ForUnload, + 0x55, NULL); + + if (!ret && smu->smu_baco.state == SMU_BACO_STATE_EXIT) + ret = smu_v13_0_disable_pmfw_state(smu); + break; default: /* Ignore others */ @@ -3083,6 +3097,7 @@ .is_asic_wbrf_supported = smu_v13_0_0_wbrf_support_check, .enable_uclk_shadow = smu_v13_0_enable_uclk_shadow, .set_wbrf_exclusion_ranges = smu_v13_0_set_wbrf_exclusion_ranges, + .interrupt_work = smu_v13_0_interrupt_work, }; void smu_v13_0_0_set_ppt_funcs(struct smu_context *smu) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c @@ -226,8 +226,20 @@ struct amdgpu_device *adev = smu->adev; int ret = 0; - if (!en && !adev->in_s0ix) + if (!en && !adev->in_s0ix) { + if (adev->in_s4) { + /* Adds a GFX reset as workaround just before sending the + * MP1_UNLOAD message to prevent GC/RLC/PMFW from entering + * an invalid state. + */ + ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_GfxDeviceDriverReset, + SMU_RESET_MODE_2, NULL); + if (ret) + return ret; + } + ret = smu_cmn_send_smc_msg(smu, SMU_MSG_PrepareMp1ForUnload, NULL); + } return ret; } @@ -740,31 +752,9 @@ int ret = 0; if (!smu_v13_0_4_clk_dpm_is_enabled(smu, clk_type)) { - switch (clk_type) { - case SMU_MCLK: - case SMU_UCLK: - clock_limit = smu->smu_table.boot_values.uclk; - break; - case SMU_FCLK: - clock_limit = smu->smu_table.boot_values.fclk; - break; - case SMU_GFXCLK: - case SMU_SCLK: - clock_limit = smu->smu_table.boot_values.gfxclk; - break; - case SMU_SOCCLK: - clock_limit = smu->smu_table.boot_values.socclk; - break; - case SMU_VCLK: - clock_limit = smu->smu_table.boot_values.vclk; - break; - case SMU_DCLK: - clock_limit = smu->smu_table.boot_values.dclk; - break; - default: - clock_limit = 0; - break; - } + ret = smu_v13_0_get_boot_freq_by_index(smu, clk_type, &clock_limit); + if (ret) + return ret; /* clock in Mhz unit */ if (min) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c @@ -727,31 +727,9 @@ int ret = 0; if (!smu_v13_0_5_clk_dpm_is_enabled(smu, clk_type)) { - switch (clk_type) { - case SMU_MCLK: - case SMU_UCLK: - clock_limit = smu->smu_table.boot_values.uclk; - break; - case SMU_FCLK: - clock_limit = smu->smu_table.boot_values.fclk; - break; - case SMU_GFXCLK: - case SMU_SCLK: - clock_limit = smu->smu_table.boot_values.gfxclk; - break; - case SMU_SOCCLK: - clock_limit = smu->smu_table.boot_values.socclk; - break; - case SMU_VCLK: - clock_limit = smu->smu_table.boot_values.vclk; - break; - case SMU_DCLK: - clock_limit = smu->smu_table.boot_values.dclk; - break; - default: - clock_limit = 0; - break; - } + ret = smu_v13_0_get_boot_freq_by_index(smu, clk_type, &clock_limit); + if (ret) + return ret; /* clock in Mhz unit */ if (min) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c @@ -2060,8 +2060,8 @@ /* TODO: confirm this on real target */ esm_ctrl = RREG32_PCIE(smnPCIE_ESM_CTRL); - if ((esm_ctrl >> 15) & 0x1FFFF) - return (((esm_ctrl >> 8) & 0x3F) + 128); + if ((esm_ctrl >> 15) & 0x1) + return (((esm_ctrl >> 8) & 0x7F) + 128); speed_level = (RREG32_PCIE(smnPCIE_LC_SPEED_CNTL) & PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE_MASK) @@ -2205,6 +2205,17 @@ return sizeof(*gpu_metrics); } +static void smu_v13_0_6_restore_pci_config(struct smu_context *smu) +{ + struct amdgpu_device *adev = smu->adev; + int i; + + for (i = 0; i < 16; i++) + pci_write_config_dword(adev->pdev, i * 4, + adev->pdev->saved_config_space[i]); + pci_restore_msi_state(adev->pdev); +} + static int smu_v13_0_6_mode2_reset(struct smu_context *smu) { int ret = 0, index; @@ -2213,6 +2224,8 @@ index = smu_cmn_to_asic_specific_index(smu, CMN2ASIC_MAPPING_MSG, SMU_MSG_GfxDeviceDriverReset); + if (index < 0) + return index; mutex_lock(&smu->message_lock); @@ -2226,6 +2239,20 @@ /* Restore the config space saved during init */ amdgpu_device_load_pci_state(adev->pdev); + /* Certain platforms have switches which assign virtual BAR values to + * devices. OS uses the virtual BAR values and device behind the switch + * is assgined another BAR value. When device's config space registers + * are queried, switch returns the virtual BAR values. When mode-2 reset + * is performed, switch is unaware of it, and will continue to return + * the same virtual values to the OS.This affects + * pci_restore_config_space() API as it doesn't write the value saved if + * the current value read from config space is the same as what is + * saved. As a workaround, make sure the config space is restored + * always. + */ + if (!(adev->flags & AMD_IS_APU)) + smu_v13_0_6_restore_pci_config(smu); + dev_dbg(smu->adev->dev, "wait for reset ack\n"); do { ret = smu_cmn_wait_for_response(smu); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c @@ -2061,6 +2061,8 @@ gpu_metrics->average_dclk1_frequency = metrics->AverageDclk1Frequency; gpu_metrics->current_gfxclk = metrics->CurrClock[PPCLK_GFXCLK]; + gpu_metrics->current_socclk = metrics->CurrClock[PPCLK_SOCCLK]; + gpu_metrics->current_uclk = metrics->CurrClock[PPCLK_UCLK]; gpu_metrics->current_vclk0 = metrics->CurrClock[PPCLK_VCLK_0]; gpu_metrics->current_dclk0 = metrics->CurrClock[PPCLK_DCLK_0]; gpu_metrics->current_vclk1 = metrics->CurrClock[PPCLK_VCLK_1]; @@ -2320,7 +2322,7 @@ (struct smu_13_0_7_powerplay_table *)table_context->power_play_table; PPTable_t *pptable = table_context->driver_pptable; SkuTable_t *skutable = &pptable->SkuTable; - uint32_t power_limit, od_percent_upper, od_percent_lower; + uint32_t power_limit, od_percent_upper = 0, od_percent_lower = 0; uint32_t msg_limit = skutable->MsgLimits.Power[PPT_THROTTLER_PPT0][POWER_SOURCE_AC]; if (smu_v13_0_get_current_power_limit(smu, &power_limit)) @@ -2333,12 +2335,16 @@ if (default_power_limit) *default_power_limit = power_limit; - if (smu->od_enabled) - od_percent_upper = le32_to_cpu(powerplay_table->overdrive_table.max[SMU_13_0_7_ODSETTING_POWERPERCENTAGE]); - else - od_percent_upper = 0; - - od_percent_lower = le32_to_cpu(powerplay_table->overdrive_table.min[SMU_13_0_7_ODSETTING_POWERPERCENTAGE]); + if (powerplay_table) { + if (smu->od_enabled && + (smu_v13_0_7_is_od_feature_supported(smu, PP_OD_FEATURE_PPT_BIT))) { + od_percent_upper = le32_to_cpu(powerplay_table->overdrive_table.max[SMU_13_0_7_ODSETTING_POWERPERCENTAGE]); + od_percent_lower = le32_to_cpu(powerplay_table->overdrive_table.min[SMU_13_0_7_ODSETTING_POWERPERCENTAGE]); + } else if (smu_v13_0_7_is_od_feature_supported(smu, PP_OD_FEATURE_PPT_BIT)) { + od_percent_upper = 0; + od_percent_lower = le32_to_cpu(powerplay_table->overdrive_table.min[SMU_13_0_7_ODSETTING_POWERPERCENTAGE]); + } + } dev_dbg(smu->adev->dev, "od percent upper:%d, od percent lower:%d (default power: %d)\n", od_percent_upper, od_percent_lower, power_limit); @@ -2446,6 +2452,8 @@ } if (smu->power_profile_mode == PP_SMC_POWER_PROFILE_CUSTOM) { + if (size != 8) + return -EINVAL; ret = smu_cmn_update_table(smu, SMU_TABLE_ACTIVITY_MONITOR_COEFF, WORKLOAD_PPLIB_CUSTOM_BIT, @@ -2474,6 +2482,8 @@ activity_monitor->Fclk_MinActiveFreq = input[6]; activity_monitor->Fclk_BoosterFreq = input[7]; break; + default: + return -EINVAL; } ret = smu_cmn_update_table(smu, @@ -2657,6 +2667,7 @@ .is_asic_wbrf_supported = smu_v13_0_7_wbrf_support_check, .enable_uclk_shadow = smu_v13_0_enable_uclk_shadow, .set_wbrf_exclusion_ranges = smu_v13_0_set_wbrf_exclusion_ranges, + .interrupt_work = smu_v13_0_interrupt_work, }; void smu_v13_0_7_set_ppt_funcs(struct smu_context *smu) @@ -2670,4 +2681,5 @@ smu->workload_map = smu_v13_0_7_workload_map; smu->smc_driver_if_version = SMU13_0_7_DRIVER_IF_VERSION; smu_v13_0_set_smu_mailbox_registers(smu); + smu->power_profile_mode = PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c @@ -861,31 +861,9 @@ int ret = 0; if (!yellow_carp_clk_dpm_is_enabled(smu, clk_type)) { - switch (clk_type) { - case SMU_MCLK: - case SMU_UCLK: - clock_limit = smu->smu_table.boot_values.uclk; - break; - case SMU_FCLK: - clock_limit = smu->smu_table.boot_values.fclk; - break; - case SMU_GFXCLK: - case SMU_SCLK: - clock_limit = smu->smu_table.boot_values.gfxclk; - break; - case SMU_SOCCLK: - clock_limit = smu->smu_table.boot_values.socclk; - break; - case SMU_VCLK: - clock_limit = smu->smu_table.boot_values.vclk; - break; - case SMU_DCLK: - clock_limit = smu->smu_table.boot_values.dclk; - break; - default: - clock_limit = 0; - break; - } + ret = smu_v13_0_get_boot_freq_by_index(smu, clk_type, &clock_limit); + if (ret) + return ret; /* clock in Mhz unit */ if (min) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c @@ -836,7 +836,7 @@ static int smu_v14_0_0_print_clk_levels(struct smu_context *smu, enum smu_clk_type clk_type, char *buf) { - int i, size = 0, ret = 0; + int i, idx, ret = 0, size = 0; uint32_t cur_value = 0, value = 0, count = 0; uint32_t min, max; @@ -870,7 +870,8 @@ break; for (i = 0; i < count; i++) { - ret = smu_v14_0_0_get_dpm_freq_by_index(smu, clk_type, i, &value); + idx = (clk_type == SMU_MCLK) ? (count - i - 1) : i; + ret = smu_v14_0_0_get_dpm_freq_by_index(smu, clk_type, idx, &value); if (ret) break; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c @@ -5,6 +5,7 @@ * */ #include +#include #include #include @@ -610,12 +611,34 @@ return NULL; } +static int komeda_attach_bridge(struct device *dev, + struct komeda_pipeline *pipe, + struct drm_encoder *encoder) +{ + struct drm_bridge *bridge; + int err; + + bridge = devm_drm_of_get_bridge(dev, pipe->of_node, + KOMEDA_OF_PORT_OUTPUT, 0); + if (IS_ERR(bridge)) + return dev_err_probe(dev, PTR_ERR(bridge), "remote bridge not found for pipe: %s\n", + of_node_full_name(pipe->of_node)); + + err = drm_bridge_attach(encoder, bridge, NULL, 0); + if (err) + dev_err(dev, "bridge_attach() failed for pipe: %s\n", + of_node_full_name(pipe->of_node)); + + return err; +} + static int komeda_crtc_add(struct komeda_kms_dev *kms, struct komeda_crtc *kcrtc) { struct drm_crtc *crtc = &kcrtc->base; struct drm_device *base = &kms->base; - struct drm_bridge *bridge; + struct komeda_pipeline *pipe = kcrtc->master; + struct drm_encoder *encoder = &kcrtc->encoder; int err; err = drm_crtc_init_with_planes(base, crtc, @@ -626,27 +649,25 @@ drm_crtc_helper_add(crtc, &komeda_crtc_helper_funcs); - crtc->port = kcrtc->master->of_output_port; + crtc->port = pipe->of_output_port; /* Construct an encoder for each pipeline and attach it to the remote * bridge */ kcrtc->encoder.possible_crtcs = drm_crtc_mask(crtc); - err = drm_simple_encoder_init(base, &kcrtc->encoder, - DRM_MODE_ENCODER_TMDS); + err = drm_simple_encoder_init(base, encoder, DRM_MODE_ENCODER_TMDS); if (err) return err; - bridge = devm_drm_of_get_bridge(base->dev, kcrtc->master->of_node, - KOMEDA_OF_PORT_OUTPUT, 0); - if (IS_ERR(bridge)) - return PTR_ERR(bridge); - - err = drm_bridge_attach(&kcrtc->encoder, bridge, NULL, 0); + if (pipe->of_output_links[0]) { + err = komeda_attach_bridge(base->dev, pipe, encoder); + if (err) + return err; + } drm_crtc_enable_color_mgmt(crtc, 0, true, KOMEDA_COLOR_LUT_SIZE); - return err; + return 0; } int komeda_kms_add_crtcs(struct komeda_kms_dev *kms, struct komeda_dev *mdev) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/arm/display/komeda/komeda_kms.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/arm/display/komeda/komeda_kms.c @@ -160,6 +160,7 @@ struct drm_plane *plane; struct list_head zorder_list; int order = 0, err; + u32 slave_zpos = 0; DRM_DEBUG_ATOMIC("[CRTC:%d:%s] calculating normalized zpos values\n", crtc->base.id, crtc->name); @@ -199,10 +200,13 @@ plane_st->zpos, plane_st->normalized_zpos); /* calculate max slave zorder */ - if (has_bit(drm_plane_index(plane), kcrtc->slave_planes)) + if (has_bit(drm_plane_index(plane), kcrtc->slave_planes)) { + slave_zpos = plane_st->normalized_zpos; + if (to_kplane_st(plane_st)->layer_split) + slave_zpos++; kcrtc_st->max_slave_zorder = - max(plane_st->normalized_zpos, - kcrtc_st->max_slave_zorder); + max(slave_zpos, kcrtc_st->max_slave_zorder); + } } crtc_st->zpos_changed = true; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c @@ -259,7 +259,7 @@ u32 avail_scalers; pipe_st = komeda_pipeline_get_state(c->pipeline, state); - if (!pipe_st) + if (IS_ERR_OR_NULL(pipe_st)) return NULL; avail_scalers = (pipe_st->active_comps & KOMEDA_PIPELINE_SCALERS) ^ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c @@ -160,6 +160,10 @@ formats = komeda_get_layer_fourcc_list(&mdev->fmt_tbl, kwb_conn->wb_layer->layer_type, &n_formats); + if (!formats) { + kfree(kwb_conn); + return -ENOMEM; + } err = drm_writeback_connector_init(&kms->base, wb_conn, &komeda_wb_connector_funcs, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/arm/malidp_mw.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/arm/malidp_mw.c @@ -72,7 +72,10 @@ __drm_atomic_helper_connector_destroy_state(connector->state); kfree(connector->state); - __drm_atomic_helper_connector_reset(connector, &mw_state->base); + connector->state = NULL; + + if (mw_state) + __drm_atomic_helper_connector_reset(connector, &mw_state->base); } static enum drm_connector_status --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/ast/ast_dp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/ast/ast_dp.c @@ -158,7 +158,14 @@ ASTDP_HOST_EDID_READ_DONE); } +bool ast_dp_power_is_on(struct ast_device *ast) +{ + u8 vgacre3; + + vgacre3 = ast_get_index_reg(ast, AST_IO_VGACRI, 0xe3); + return !(vgacre3 & AST_DP_PHY_SLEEP); +} void ast_dp_power_on_off(struct drm_device *dev, bool on) { @@ -180,6 +187,7 @@ { struct ast_device *ast = to_ast_device(dev); u8 video_on_off = on; + u32 i = 0; // Video On/Off ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xE3, (u8) ~AST_DP_VIDEO_ENABLE, on); @@ -192,6 +200,8 @@ ASTDP_MIRROR_VIDEO_ENABLE) != video_on_off) { // wait 1 ms mdelay(1); + if (++i > 200) + break; } } } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/ast/ast_drv.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/ast/ast_drv.c @@ -390,6 +390,11 @@ static int ast_drm_thaw(struct drm_device *dev) { + struct ast_device *ast = to_ast_device(dev); + + ast_enable_vga(ast->ioregs); + ast_open_key(ast->ioregs); + ast_enable_mmio(dev->dev, ast->ioregs); ast_post_gpu(dev); return drm_mode_config_helper_resume(dev); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/ast/ast_drv.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/ast/ast_drv.h @@ -505,6 +505,7 @@ bool ast_astdp_is_connected(struct ast_device *ast); int ast_astdp_read_edid(struct drm_device *dev, u8 *ediddata); void ast_dp_launch(struct drm_device *dev); +bool ast_dp_power_is_on(struct ast_device *ast); void ast_dp_power_on_off(struct drm_device *dev, bool no); void ast_dp_set_on_off(struct drm_device *dev, bool no); void ast_dp_set_mode(struct drm_crtc *crtc, struct ast_vbios_mode_info *vbios_mode); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/ast/ast_mode.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/ast/ast_mode.c @@ -28,6 +28,7 @@ * Authors: Dave Airlie */ +#include #include #include @@ -44,7 +45,6 @@ #include #include #include -#include #include "ast_drv.h" #include "ast_tables.h" @@ -302,7 +302,7 @@ /* Set SEQ; except Screen Disable field */ ast_set_index_reg(ast, AST_IO_VGASRI, 0x00, 0x03); - ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x01, 0xdf, stdtable->seq[0]); + ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x01, 0x20, stdtable->seq[0]); for (i = 1; i < 4; i++) { jreg = stdtable->seq[i]; ast_set_index_reg(ast, AST_IO_VGASRI, (i + 1), jreg); @@ -648,12 +648,12 @@ struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane); struct drm_framebuffer *old_fb = old_plane_state->fb; struct ast_plane *ast_plane = to_ast_plane(plane); + struct drm_crtc *crtc = plane_state->crtc; + struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); struct drm_rect damage; struct drm_atomic_helper_damage_iter iter; - if (!old_fb || (fb->format != old_fb->format)) { - struct drm_crtc *crtc = plane_state->crtc; - struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); + if (!old_fb || (fb->format != old_fb->format) || crtc_state->mode_changed) { struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); struct ast_vbios_mode_info *vbios_mode_info = &ast_crtc_state->vbios_mode_info; @@ -689,15 +689,15 @@ * Therefore only reprogram the address after enabling the plane. */ ast_set_start_address_crt1(ast, (u32)ast_plane->offset); - ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x1, 0xdf, 0x00); } static void ast_primary_plane_helper_atomic_disable(struct drm_plane *plane, struct drm_atomic_state *state) { - struct ast_device *ast = to_ast_device(plane->dev); - - ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x1, 0xdf, 0x20); + /* + * Keep this empty function to avoid calling + * atomic_update when disabling the plane. + */ } static const struct drm_plane_helper_funcs ast_primary_plane_helper_funcs = { @@ -1001,62 +1001,6 @@ * CRTC */ -static void ast_crtc_dpms(struct drm_crtc *crtc, int mode) -{ - struct ast_device *ast = to_ast_device(crtc->dev); - u8 ch = AST_DPMS_VSYNC_OFF | AST_DPMS_HSYNC_OFF; - struct ast_crtc_state *ast_state; - const struct drm_format_info *format; - struct ast_vbios_mode_info *vbios_mode_info; - - /* TODO: Maybe control display signal generation with - * Sync Enable (bit CR17.7). - */ - switch (mode) { - case DRM_MODE_DPMS_ON: - ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x01, 0xdf, 0); - ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xfc, 0); - if (ast->tx_chip_types & AST_TX_DP501_BIT) - ast_set_dp501_video_output(crtc->dev, 1); - - if (ast->tx_chip_types & AST_TX_ASTDP_BIT) { - ast_dp_power_on_off(crtc->dev, AST_DP_POWER_ON); - ast_wait_for_vretrace(ast); - ast_dp_set_on_off(crtc->dev, 1); - } - - ast_state = to_ast_crtc_state(crtc->state); - format = ast_state->format; - - if (format) { - vbios_mode_info = &ast_state->vbios_mode_info; - - ast_set_color_reg(ast, format); - ast_set_vbios_color_reg(ast, format, vbios_mode_info); - if (crtc->state->gamma_lut) - ast_crtc_set_gamma(ast, format, crtc->state->gamma_lut->data); - else - ast_crtc_set_gamma_linear(ast, format); - } - break; - case DRM_MODE_DPMS_STANDBY: - case DRM_MODE_DPMS_SUSPEND: - case DRM_MODE_DPMS_OFF: - ch = mode; - if (ast->tx_chip_types & AST_TX_DP501_BIT) - ast_set_dp501_video_output(crtc->dev, 0); - - if (ast->tx_chip_types & AST_TX_ASTDP_BIT) { - ast_dp_set_on_off(crtc->dev, 0); - ast_dp_power_on_off(crtc->dev, AST_DP_POWER_OFF); - } - - ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x01, 0xdf, 0x20); - ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xfc, ch); - break; - } -} - static enum drm_mode_status ast_crtc_helper_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode) { @@ -1129,6 +1073,33 @@ return status; } +static void ast_crtc_helper_mode_set_nofb(struct drm_crtc *crtc) +{ + struct drm_device *dev = crtc->dev; + struct ast_device *ast = to_ast_device(dev); + struct drm_crtc_state *crtc_state = crtc->state; + struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); + struct ast_vbios_mode_info *vbios_mode_info = + &ast_crtc_state->vbios_mode_info; + struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode; + + /* + * Ensure that no scanout takes place before reprogramming mode + * and format registers. + * + * TODO: Get vblank interrupts working and remove this line. + */ + ast_wait_for_vretrace(ast); + + ast_set_vbios_mode_reg(ast, adjusted_mode, vbios_mode_info); + ast_set_index_reg(ast, AST_IO_VGACRI, 0xa1, 0x06); + ast_set_std_reg(ast, adjusted_mode, vbios_mode_info); + ast_set_crtc_reg(ast, adjusted_mode, vbios_mode_info); + ast_set_dclk_reg(ast, adjusted_mode, vbios_mode_info); + ast_set_crtthd_reg(ast); + ast_set_sync_reg(ast, adjusted_mode, vbios_mode_info); +} + static int ast_crtc_helper_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state) { @@ -1188,7 +1159,6 @@ struct drm_device *dev = crtc->dev; struct ast_device *ast = to_ast_device(dev); struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); - struct ast_vbios_mode_info *vbios_mode_info = &ast_crtc_state->vbios_mode_info; /* * The gamma LUT has to be reloaded after changing the primary @@ -1202,40 +1172,27 @@ else ast_crtc_set_gamma_linear(ast, ast_crtc_state->format); } - - //Set Aspeed Display-Port - if (ast->tx_chip_types & AST_TX_ASTDP_BIT) - ast_dp_set_mode(crtc, vbios_mode_info); } static void ast_crtc_helper_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state) { - struct drm_device *dev = crtc->dev; - struct ast_device *ast = to_ast_device(dev); - struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); - struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); - struct ast_vbios_mode_info *vbios_mode_info = - &ast_crtc_state->vbios_mode_info; - struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode; - - ast_set_vbios_mode_reg(ast, adjusted_mode, vbios_mode_info); - ast_set_index_reg(ast, AST_IO_VGACRI, 0xa1, 0x06); - ast_set_std_reg(ast, adjusted_mode, vbios_mode_info); - ast_set_crtc_reg(ast, adjusted_mode, vbios_mode_info); - ast_set_dclk_reg(ast, adjusted_mode, vbios_mode_info); - ast_set_crtthd_reg(ast); - ast_set_sync_reg(ast, adjusted_mode, vbios_mode_info); + struct ast_device *ast = to_ast_device(crtc->dev); - ast_crtc_dpms(crtc, DRM_MODE_DPMS_ON); + ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xfc, 0x00); + ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x01, 0xdf, 0x00); } static void ast_crtc_helper_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *state) { struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc); - struct drm_device *dev = crtc->dev; - struct ast_device *ast = to_ast_device(dev); + struct ast_device *ast = to_ast_device(crtc->dev); + u8 vgacrb6; - ast_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); + ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x01, 0xdf, AST_IO_VGASR1_SD); + + vgacrb6 = AST_IO_VGACRB6_VSYNC_OFF | + AST_IO_VGACRB6_HSYNC_OFF; + ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xfc, vgacrb6); /* * HW cursors require the underlying primary plane and CRTC to @@ -1248,16 +1205,11 @@ * simple pageflips on the planes. */ drm_atomic_helper_disable_planes_on_crtc(old_crtc_state, false); - - /* - * Ensure that no scanout takes place before reprogramming mode - * and format registers. - */ - ast_wait_for_vretrace(ast); } static const struct drm_crtc_helper_funcs ast_crtc_helper_funcs = { .mode_valid = ast_crtc_helper_mode_valid, + .mode_set_nofb = ast_crtc_helper_mode_set_nofb, .atomic_check = ast_crtc_helper_atomic_check, .atomic_flush = ast_crtc_helper_atomic_flush, .atomic_enable = ast_crtc_helper_atomic_enable, @@ -1340,6 +1292,14 @@ } /* + * VGA Encoder + */ + +static const struct drm_encoder_funcs ast_vga_encoder_funcs = { + .destroy = drm_encoder_cleanup, +}; + +/* * VGA Connector */ @@ -1429,7 +1389,8 @@ struct drm_connector *connector = &ast_vga_connector->base; int ret; - ret = drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_DAC); + ret = drm_encoder_init(dev, encoder, &ast_vga_encoder_funcs, + DRM_MODE_ENCODER_DAC, NULL); if (ret) return ret; encoder->possible_crtcs = drm_crtc_mask(crtc); @@ -1446,6 +1407,14 @@ } /* + * SIL164 Encoder + */ + +static const struct drm_encoder_funcs ast_sil164_encoder_funcs = { + .destroy = drm_encoder_cleanup, +}; + +/* * SIL164 Connector */ @@ -1535,7 +1504,8 @@ struct drm_connector *connector = &ast_sil164_connector->base; int ret; - ret = drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_TMDS); + ret = drm_encoder_init(dev, encoder, &ast_sil164_encoder_funcs, + DRM_MODE_ENCODER_TMDS, NULL); if (ret) return ret; encoder->possible_crtcs = drm_crtc_mask(crtc); @@ -1552,6 +1522,35 @@ } /* + * DP501 Encoder + */ + +static const struct drm_encoder_funcs ast_dp501_encoder_funcs = { + .destroy = drm_encoder_cleanup, +}; + +static void ast_dp501_encoder_helper_atomic_enable(struct drm_encoder *encoder, + struct drm_atomic_state *state) +{ + struct drm_device *dev = encoder->dev; + + ast_set_dp501_video_output(dev, 1); +} + +static void ast_dp501_encoder_helper_atomic_disable(struct drm_encoder *encoder, + struct drm_atomic_state *state) +{ + struct drm_device *dev = encoder->dev; + + ast_set_dp501_video_output(dev, 0); +} + +static const struct drm_encoder_helper_funcs ast_dp501_encoder_helper_funcs = { + .atomic_enable = ast_dp501_encoder_helper_atomic_enable, + .atomic_disable = ast_dp501_encoder_helper_atomic_disable, +}; + +/* * DP501 Connector */ @@ -1633,9 +1632,12 @@ struct drm_connector *connector = &ast->output.dp501.connector; int ret; - ret = drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_TMDS); + ret = drm_encoder_init(dev, encoder, &ast_dp501_encoder_funcs, + DRM_MODE_ENCODER_TMDS, NULL); if (ret) return ret; + drm_encoder_helper_add(encoder, &ast_dp501_encoder_helper_funcs); + encoder->possible_crtcs = drm_crtc_mask(crtc); ret = ast_dp501_connector_init(dev, connector); @@ -1650,6 +1652,51 @@ } /* + * ASPEED Display-Port Encoder + */ + +static const struct drm_encoder_funcs ast_astdp_encoder_funcs = { + .destroy = drm_encoder_cleanup, +}; + +static void ast_astdp_encoder_helper_atomic_mode_set(struct drm_encoder *encoder, + struct drm_crtc_state *crtc_state, + struct drm_connector_state *conn_state) +{ + struct drm_crtc *crtc = crtc_state->crtc; + struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); + struct ast_vbios_mode_info *vbios_mode_info = &ast_crtc_state->vbios_mode_info; + + ast_dp_set_mode(crtc, vbios_mode_info); +} + +static void ast_astdp_encoder_helper_atomic_enable(struct drm_encoder *encoder, + struct drm_atomic_state *state) +{ + struct drm_device *dev = encoder->dev; + struct ast_device *ast = to_ast_device(dev); + + ast_dp_power_on_off(dev, AST_DP_POWER_ON); + ast_wait_for_vretrace(ast); + ast_dp_set_on_off(dev, 1); +} + +static void ast_astdp_encoder_helper_atomic_disable(struct drm_encoder *encoder, + struct drm_atomic_state *state) +{ + struct drm_device *dev = encoder->dev; + + ast_dp_set_on_off(dev, 0); + ast_dp_power_on_off(dev, AST_DP_POWER_OFF); +} + +static const struct drm_encoder_helper_funcs ast_astdp_encoder_helper_funcs = { + .atomic_mode_set = ast_astdp_encoder_helper_atomic_mode_set, + .atomic_enable = ast_astdp_encoder_helper_atomic_enable, + .atomic_disable = ast_astdp_encoder_helper_atomic_disable, +}; + +/* * ASPEED Display-Port Connector */ @@ -1696,11 +1743,35 @@ struct drm_modeset_acquire_ctx *ctx, bool force) { + struct drm_device *dev = connector->dev; struct ast_device *ast = to_ast_device(connector->dev); + enum drm_connector_status status = connector_status_disconnected; + struct drm_connector_state *connector_state = connector->state; + bool is_active = false; + + mutex_lock(&ast->modeset_lock); + + if (connector_state && connector_state->crtc) { + struct drm_crtc_state *crtc_state = connector_state->crtc->state; + + if (crtc_state && crtc_state->active) + is_active = true; + } + + if (!is_active && !ast_dp_power_is_on(ast)) { + ast_dp_power_on_off(dev, true); + msleep(50); + } if (ast_astdp_is_connected(ast)) - return connector_status_connected; - return connector_status_disconnected; + status = connector_status_connected; + + if (!is_active && status == connector_status_disconnected) + ast_dp_power_on_off(dev, false); + + mutex_unlock(&ast->modeset_lock); + + return status; } static const struct drm_connector_helper_funcs ast_astdp_connector_helper_funcs = { @@ -1743,9 +1814,12 @@ struct drm_connector *connector = &ast->output.astdp.connector; int ret; - ret = drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_TMDS); + ret = drm_encoder_init(dev, encoder, &ast_astdp_encoder_funcs, + DRM_MODE_ENCODER_TMDS, NULL); if (ret) return ret; + drm_encoder_helper_add(encoder, &ast_astdp_encoder_helper_funcs); + encoder->possible_crtcs = drm_crtc_mask(crtc); ret = ast_astdp_connector_init(dev, connector); @@ -1871,7 +1945,7 @@ * the I/O-register lock. Released in atomic_flush(). */ mutex_lock(&ast->modeset_lock); - drm_atomic_helper_commit_tail_rpm(state); + drm_atomic_helper_commit_tail(state); mutex_unlock(&ast->modeset_lock); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/ast/ast_reg.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/ast/ast_reg.h @@ -22,6 +22,7 @@ #define AST_IO_VGAER_VGA_ENABLE BIT(0) #define AST_IO_VGASRI (0x44) +#define AST_IO_VGASR1_SD BIT(5) #define AST_IO_VGADRR (0x47) #define AST_IO_VGADWR (0x48) #define AST_IO_VGAPDR (0x49) @@ -31,6 +32,8 @@ #define AST_IO_VGACR80_PASSWORD (0xa8) #define AST_IO_VGACRA1_VGAIO_DISABLED BIT(1) #define AST_IO_VGACRA1_MMIO_ENABLED BIT(2) +#define AST_IO_VGACRB6_HSYNC_OFF BIT(0) +#define AST_IO_VGACRB6_VSYNC_OFF BIT(1) #define AST_IO_VGACRCB_HWC_16BPP BIT(0) /* set: ARGB4444, cleared: 2bpp palette */ #define AST_IO_VGACRCB_HWC_ENABLED BIT(1) @@ -76,13 +79,6 @@ #define ASTDP_HOST_EDID_READ_DONE_MASK GENMASK(0, 0) /* - * CRB8[b1]: Enable VSYNC off - * CRB8[b0]: Enable HSYNC off - */ -#define AST_DPMS_VSYNC_OFF BIT(1) -#define AST_DPMS_HSYNC_OFF BIT(0) - -/* * CRDF[b4]: Mirror of AST_DP_VIDEO_ENABLE * Precondition: A. ~AST_DP_PHY_SLEEP && * B. DP_HPD && --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/bridge/adv7511/adv7511_audio.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/bridge/adv7511/adv7511_audio.c @@ -153,7 +153,16 @@ ADV7511_AUDIO_CFG3_LEN_MASK, len); regmap_update_bits(adv7511->regmap, ADV7511_REG_I2C_FREQ_ID_CFG, ADV7511_I2C_FREQ_ID_CFG_RATE_MASK, rate << 4); - regmap_write(adv7511->regmap, 0x73, 0x1); + + /* send current Audio infoframe values while updating */ + regmap_update_bits(adv7511->regmap, ADV7511_REG_INFOFRAME_UPDATE, + BIT(5), BIT(5)); + + regmap_write(adv7511->regmap, ADV7511_REG_AUDIO_INFOFRAME(0), 0x1); + + /* use Audio infoframe updated info */ + regmap_update_bits(adv7511->regmap, ADV7511_REG_INFOFRAME_UPDATE, + BIT(5), 0); return 0; } @@ -184,8 +193,9 @@ regmap_update_bits(adv7511->regmap, ADV7511_REG_GC(0), BIT(7) | BIT(6), BIT(7)); /* use Audio infoframe updated info */ - regmap_update_bits(adv7511->regmap, ADV7511_REG_GC(1), + regmap_update_bits(adv7511->regmap, ADV7511_REG_INFOFRAME_UPDATE, BIT(5), 0); + /* enable SPDIF receiver */ if (adv7511->audio_source == ADV7511_AUDIO_SOURCE_SPDIF) regmap_update_bits(adv7511->regmap, ADV7511_REG_AUDIO_CONFIG, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c @@ -1211,8 +1211,10 @@ return ret; ret = adv7511_init_regulators(adv7511); - if (ret) - return dev_err_probe(dev, ret, "failed to init regulators\n"); + if (ret) { + dev_err_probe(dev, ret, "failed to init regulators\n"); + goto err_of_node_put; + } /* * The power down GPIO is optional. If present, toggle it from active to @@ -1277,17 +1279,6 @@ INIT_WORK(&adv7511->hpd_work, adv7511_hpd_work); - if (i2c->irq) { - init_waitqueue_head(&adv7511->wq); - - ret = devm_request_threaded_irq(dev, i2c->irq, NULL, - adv7511_irq_handler, - IRQF_ONESHOT, dev_name(dev), - adv7511); - if (ret) - goto err_unregister_cec; - } - adv7511_power_off(adv7511); i2c_set_clientdata(i2c, adv7511); @@ -1311,6 +1302,17 @@ adv7511_audio_init(dev, adv7511); + if (i2c->irq) { + init_waitqueue_head(&adv7511->wq); + + ret = devm_request_threaded_irq(dev, i2c->irq, NULL, + adv7511_irq_handler, + IRQF_ONESHOT, dev_name(dev), + adv7511); + if (ret) + goto err_unregister_audio; + } + if (adv7511->info->has_dsi) { ret = adv7533_attach_dsi(adv7511); if (ret) @@ -1332,6 +1334,8 @@ i2c_unregister_device(adv7511->i2c_edid); uninit_regulators: adv7511_uninit_regulators(adv7511); +err_of_node_put: + of_node_put(adv7511->host_node); return ret; } @@ -1340,6 +1344,8 @@ { struct adv7511 *adv7511 = i2c_get_clientdata(i2c); + of_node_put(adv7511->host_node); + adv7511_uninit_regulators(adv7511); drm_bridge_remove(&adv7511->bridge); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/bridge/adv7511/adv7533.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/bridge/adv7511/adv7533.c @@ -172,7 +172,7 @@ of_property_read_u32(np, "adi,dsi-lanes", &num_lanes); - if (num_lanes < 1 || num_lanes > 4) + if (num_lanes < 2 || num_lanes > 4) return -EINVAL; adv->num_dsi_lanes = num_lanes; @@ -181,8 +181,6 @@ if (!adv->host_node) return -ENODEV; - of_node_put(adv->host_node); - adv->use_timing_gen = !of_property_read_bool(np, "adi,disable-timing-generator"); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c @@ -1027,7 +1027,6 @@ u32 status_reg; u8 *buffer = msg->buffer; unsigned int i; - int num_transferred = 0; int ret; /* Buffer size of AUX CH is 16 bytes */ @@ -1079,7 +1078,6 @@ reg = buffer[i]; writel(reg, dp->reg_base + ANALOGIX_DP_BUF_DATA_0 + 4 * i); - num_transferred++; } } @@ -1127,7 +1125,6 @@ reg = readl(dp->reg_base + ANALOGIX_DP_BUF_DATA_0 + 4 * i); buffer[i] = (unsigned char)reg; - num_transferred++; } } @@ -1144,7 +1141,7 @@ (msg->request & ~DP_AUX_I2C_MOT) == DP_AUX_NATIVE_READ) msg->reply = DP_AUX_NATIVE_REPLY_ACK; - return num_transferred > 0 ? num_transferred : -EBUSY; + return msg->size; aux_error: /* if aux err happen, reset aux */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/bridge/analogix/anx7625.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/bridge/analogix/anx7625.c @@ -2014,8 +2014,10 @@ memset(buf, 0, len); } else { dev_dbg(dev, "audio copy eld\n"); + mutex_lock(&ctx->connector->eld_mutex); memcpy(buf, ctx->connector->eld, min(sizeof(ctx->connector->eld), len)); + mutex_unlock(&ctx->connector->eld_mutex); } return 0; @@ -2076,10 +2078,8 @@ }; host = of_find_mipi_dsi_host_by_node(ctx->pdata.mipi_host_node); - if (!host) { - DRM_DEV_ERROR(dev, "fail to find dsi host.\n"); - return -EPROBE_DEFER; - } + if (!host) + return dev_err_probe(dev, -EPROBE_DEFER, "fail to find dsi host.\n"); dsi = devm_mipi_dsi_device_register_full(dev, host, &info); if (IS_ERR(dsi)) { @@ -2481,15 +2481,22 @@ mutex_unlock(&ctx->aux_lock); } +static void +anx7625_audio_update_connector_status(struct anx7625_data *ctx, + enum drm_connector_status status); + static enum drm_connector_status anx7625_bridge_detect(struct drm_bridge *bridge) { struct anx7625_data *ctx = bridge_to_anx7625(bridge); struct device *dev = ctx->dev; + enum drm_connector_status status; DRM_DEV_DEBUG_DRIVER(dev, "drm bridge detect\n"); - return anx7625_sink_detect(ctx); + status = anx7625_sink_detect(ctx); + anx7625_audio_update_connector_status(ctx, status); + return status; } static struct edid *anx7625_bridge_get_edid(struct drm_bridge *bridge, @@ -2568,6 +2575,8 @@ mutex_lock(&ctx->lock); anx7625_stop_dp_work(ctx); + if (!ctx->pdata.panel_bridge) + anx7625_remove_edid(ctx); anx7625_power_standby(ctx); mutex_unlock(&ctx->lock); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/bridge/aux-bridge.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/bridge/aux-bridge.c @@ -58,9 +58,10 @@ adev->id = ret; adev->name = "aux_bridge"; adev->dev.parent = parent; - adev->dev.of_node = of_node_get(parent->of_node); adev->dev.release = drm_aux_bridge_release; + device_set_of_node_from_dev(&adev->dev, parent); + ret = auxiliary_device_init(adev); if (ret) { ida_free(&drm_aux_bridge_ida, adev->id); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c @@ -2057,6 +2057,9 @@ mhdp_state = to_cdns_mhdp_bridge_state(new_state); mhdp_state->current_mode = drm_mode_duplicate(bridge->dev, mode); + if (!mhdp_state->current_mode) + return; + drm_mode_set_name(mhdp_state->current_mode); dev_dbg(mhdp->dev, "%s: Enabling mode %s\n", __func__, mode->name); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/bridge/chipone-icn6211.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/bridge/chipone-icn6211.c @@ -563,10 +563,8 @@ host = of_find_mipi_dsi_host_by_node(host_node); of_node_put(host_node); - if (!host) { - dev_err(dev, "failed to find dsi host\n"); - return -EPROBE_DEFER; - } + if (!host) + return dev_err_probe(dev, -EPROBE_DEFER, "failed to find dsi host\n"); dsi = mipi_dsi_device_register_full(host, &info); if (IS_ERR(dsi)) { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/bridge/ite-it6505.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/bridge/ite-it6505.c @@ -295,11 +295,11 @@ #define MAX_LANE_COUNT 4 #define MAX_LINK_RATE HBR #define AUTO_TRAIN_RETRY 3 -#define MAX_HDCP_DOWN_STREAM_COUNT 10 +#define MAX_HDCP_DOWN_STREAM_COUNT 127 #define MAX_CR_LEVEL 0x03 #define MAX_EQ_LEVEL 0x03 #define AUX_WAIT_TIMEOUT_MS 15 -#define AUX_FIFO_MAX_SIZE 32 +#define AUX_FIFO_MAX_SIZE 16 #define PIXEL_CLK_DELAY 1 #define PIXEL_CLK_INVERSE 0 #define ADJUST_PHASE_THRESHOLD 80000 @@ -1306,9 +1306,15 @@ it6505_link_reset_step_train(it6505); it6505_set_bits(it6505, REG_DATA_MUTE_CTRL, EN_VID_MUTE, EN_VID_MUTE); it6505_set_bits(it6505, REG_INFOFRAME_CTRL, EN_VID_CTRL_PKT, 0x00); - it6505_set_bits(it6505, REG_RESET_CTRL, VIDEO_RESET, VIDEO_RESET); + + it6505_set_bits(it6505, REG_VID_BUS_CTRL1, TX_FIFO_RESET, TX_FIFO_RESET); + it6505_set_bits(it6505, REG_VID_BUS_CTRL1, TX_FIFO_RESET, 0x00); + it6505_set_bits(it6505, REG_501_FIFO_CTRL, RST_501_FIFO, RST_501_FIFO); it6505_set_bits(it6505, REG_501_FIFO_CTRL, RST_501_FIFO, 0x00); + + it6505_set_bits(it6505, REG_RESET_CTRL, VIDEO_RESET, VIDEO_RESET); + usleep_range(1000, 2000); it6505_set_bits(it6505, REG_RESET_CTRL, VIDEO_RESET, 0x00); } @@ -2014,7 +2020,7 @@ { struct device *dev = it6505->dev; u8 av[5][4], bv[5][4]; - int i, err; + int i, err, retry; i = it6505_setup_sha1_input(it6505, it6505->sha1_input); if (i <= 0) { @@ -2023,22 +2029,29 @@ } it6505_sha1_digest(it6505, it6505->sha1_input, i, (u8 *)av); + /*1B-05 V' must retry 3 times */ + for (retry = 0; retry < 3; retry++) { + err = it6505_get_dpcd(it6505, DP_AUX_HDCP_V_PRIME(0), (u8 *)bv, + sizeof(bv)); - err = it6505_get_dpcd(it6505, DP_AUX_HDCP_V_PRIME(0), (u8 *)bv, - sizeof(bv)); + if (err < 0) { + dev_err(dev, "Read V' value Fail %d", retry); + continue; + } - if (err < 0) { - dev_err(dev, "Read V' value Fail"); - return false; - } + for (i = 0; i < 5; i++) + if (bv[i][3] != av[i][0] || bv[i][2] != av[i][1] || + bv[i][1] != av[i][2] || bv[i][0] != av[i][3]) + break; - for (i = 0; i < 5; i++) - if (bv[i][3] != av[i][0] || bv[i][2] != av[i][1] || - bv[i][1] != av[i][2] || bv[i][0] != av[i][3]) - return false; + if (i == 5) { + DRM_DEV_DEBUG_DRIVER(dev, "V' all match!! %d", retry); + return true; + } + } - DRM_DEV_DEBUG_DRIVER(dev, "V' all match!!"); - return true; + DRM_DEV_DEBUG_DRIVER(dev, "V' NOT match!! %d", retry); + return false; } static void it6505_hdcp_wait_ksv_list(struct work_struct *work) @@ -2046,12 +2059,13 @@ struct it6505 *it6505 = container_of(work, struct it6505, hdcp_wait_ksv_list); struct device *dev = it6505->dev; - unsigned int timeout = 5000; - u8 bstatus = 0; + u8 bstatus; bool ksv_list_check; + /* 1B-04 wait ksv list for 5s */ + unsigned long timeout = jiffies + + msecs_to_jiffies(5000) + 1; - timeout /= 20; - while (timeout > 0) { + for (;;) { if (!it6505_get_sink_hpd_status(it6505)) return; @@ -2060,27 +2074,23 @@ if (bstatus & DP_BSTATUS_READY) break; - msleep(20); - timeout--; - } + if (time_after(jiffies, timeout)) { + DRM_DEV_DEBUG_DRIVER(dev, "KSV list wait timeout"); + goto timeout; + } - if (timeout == 0) { - DRM_DEV_DEBUG_DRIVER(dev, "timeout and ksv list wait failed"); - goto timeout; + msleep(20); } ksv_list_check = it6505_hdcp_part2_ksvlist_check(it6505); DRM_DEV_DEBUG_DRIVER(dev, "ksv list ready, ksv list check %s", ksv_list_check ? "pass" : "fail"); - if (ksv_list_check) { - it6505_set_bits(it6505, REG_HDCP_TRIGGER, - HDCP_TRIGGER_KSV_DONE, HDCP_TRIGGER_KSV_DONE); + + if (ksv_list_check) return; - } + timeout: - it6505_set_bits(it6505, REG_HDCP_TRIGGER, - HDCP_TRIGGER_KSV_DONE | HDCP_TRIGGER_KSV_FAIL, - HDCP_TRIGGER_KSV_DONE | HDCP_TRIGGER_KSV_FAIL); + it6505_start_hdcp(it6505); } static void it6505_hdcp_work(struct work_struct *work) @@ -2240,14 +2250,15 @@ ret = it6505_link_start_auto_train(it6505); DRM_DEV_DEBUG_DRIVER(dev, "auto train %s, auto_train_retry: %d", ret ? "pass" : "failed", it6505->auto_train_retry); - it6505->auto_train_retry--; if (ret) { + it6505->auto_train_retry = AUTO_TRAIN_RETRY; it6505_link_train_ok(it6505); - return; + } else { + it6505->auto_train_retry--; + it6505_dump(it6505); } - it6505_dump(it6505); } static void it6505_plugged_status_to_codec(struct it6505 *it6505) @@ -2302,14 +2313,20 @@ DRM_DEV_DEBUG_DRIVER(dev, "dp_irq_vector = 0x%02x", dp_irq_vector); if (dp_irq_vector & DP_CP_IRQ) { - it6505_set_bits(it6505, REG_HDCP_TRIGGER, HDCP_TRIGGER_CPIRQ, - HDCP_TRIGGER_CPIRQ); - bstatus = it6505_dpcd_read(it6505, DP_AUX_HDCP_BSTATUS); if (bstatus < 0) return bstatus; DRM_DEV_DEBUG_DRIVER(dev, "Bstatus = 0x%02x", bstatus); + + /*Check BSTATUS when recive CP_IRQ */ + if (bstatus & DP_BSTATUS_R0_PRIME_READY && + it6505->hdcp_status == HDCP_AUTH_GOING) + it6505_set_bits(it6505, REG_HDCP_TRIGGER, HDCP_TRIGGER_CPIRQ, + HDCP_TRIGGER_CPIRQ); + else if (bstatus & (DP_BSTATUS_REAUTH_REQ | DP_BSTATUS_LINK_FAILURE) && + it6505->hdcp_status == HDCP_AUTH_DONE) + it6505_start_hdcp(it6505); } ret = drm_dp_dpcd_read_link_status(&it6505->aux, link_status); @@ -2446,7 +2463,11 @@ { struct device *dev = it6505->dev; - DRM_DEV_DEBUG_DRIVER(dev, "HDCP event Interrupt"); + DRM_DEV_DEBUG_DRIVER(dev, "HDCP repeater R0 event Interrupt"); + /* 1B01 HDCP encription should start when R0 is ready*/ + it6505_set_bits(it6505, REG_HDCP_TRIGGER, + HDCP_TRIGGER_KSV_DONE, HDCP_TRIGGER_KSV_DONE); + schedule_work(&it6505->hdcp_wait_ksv_list); } @@ -2468,31 +2489,53 @@ schedule_work(&it6505->link_works); } -static void it6505_irq_video_fifo_error(struct it6505 *it6505) +static bool it6505_test_bit(unsigned int bit, const unsigned int *addr) { - struct device *dev = it6505->dev; - - DRM_DEV_DEBUG_DRIVER(dev, "video fifo overflow interrupt"); - it6505->auto_train_retry = AUTO_TRAIN_RETRY; - flush_work(&it6505->link_works); - it6505_stop_hdcp(it6505); - it6505_video_reset(it6505); + return 1 & (addr[bit / BITS_PER_BYTE] >> (bit % BITS_PER_BYTE)); } -static void it6505_irq_io_latch_fifo_overflow(struct it6505 *it6505) +static void it6505_irq_video_handler(struct it6505 *it6505, const int *int_status) { struct device *dev = it6505->dev; + int reg_0d, reg_int03; - DRM_DEV_DEBUG_DRIVER(dev, "IO latch fifo overflow interrupt"); - it6505->auto_train_retry = AUTO_TRAIN_RETRY; - flush_work(&it6505->link_works); - it6505_stop_hdcp(it6505); - it6505_video_reset(it6505); -} + /* + * When video SCDT change with video not stable, + * Or video FIFO error, need video reset + */ -static bool it6505_test_bit(unsigned int bit, const unsigned int *addr) -{ - return 1 & (addr[bit / BITS_PER_BYTE] >> (bit % BITS_PER_BYTE)); + if ((!it6505_get_video_status(it6505) && + (it6505_test_bit(INT_SCDT_CHANGE, (unsigned int *)int_status))) || + (it6505_test_bit(BIT_INT_IO_FIFO_OVERFLOW, + (unsigned int *)int_status)) || + (it6505_test_bit(BIT_INT_VID_FIFO_ERROR, + (unsigned int *)int_status))) { + it6505->auto_train_retry = AUTO_TRAIN_RETRY; + flush_work(&it6505->link_works); + it6505_stop_hdcp(it6505); + it6505_video_reset(it6505); + + usleep_range(10000, 11000); + + /* + * Clear FIFO error IRQ to prevent fifo error -> reset loop + * HW will trigger SCDT change IRQ again when video stable + */ + + reg_int03 = it6505_read(it6505, INT_STATUS_03); + reg_0d = it6505_read(it6505, REG_SYSTEM_STS); + + reg_int03 &= (BIT(INT_VID_FIFO_ERROR) | BIT(INT_IO_LATCH_FIFO_OVERFLOW)); + it6505_write(it6505, INT_STATUS_03, reg_int03); + + DRM_DEV_DEBUG_DRIVER(dev, "reg08 = 0x%02x", reg_int03); + DRM_DEV_DEBUG_DRIVER(dev, "reg0D = 0x%02x", reg_0d); + + return; + } + + if (it6505_test_bit(INT_SCDT_CHANGE, (unsigned int *)int_status)) + it6505_irq_scdt(it6505); } static irqreturn_t it6505_int_threaded_handler(int unused, void *data) @@ -2505,15 +2548,12 @@ } irq_vec[] = { { BIT_INT_HPD, it6505_irq_hpd }, { BIT_INT_HPD_IRQ, it6505_irq_hpd_irq }, - { BIT_INT_SCDT, it6505_irq_scdt }, { BIT_INT_HDCP_FAIL, it6505_irq_hdcp_fail }, { BIT_INT_HDCP_DONE, it6505_irq_hdcp_done }, { BIT_INT_AUX_CMD_FAIL, it6505_irq_aux_cmd_fail }, { BIT_INT_HDCP_KSV_CHECK, it6505_irq_hdcp_ksv_check }, { BIT_INT_AUDIO_FIFO_ERROR, it6505_irq_audio_fifo_error }, { BIT_INT_LINK_TRAIN_FAIL, it6505_irq_link_train_fail }, - { BIT_INT_VID_FIFO_ERROR, it6505_irq_video_fifo_error }, - { BIT_INT_IO_FIFO_OVERFLOW, it6505_irq_io_latch_fifo_overflow }, }; int int_status[3], i; @@ -2543,6 +2583,7 @@ if (it6505_test_bit(irq_vec[i].bit, (unsigned int *)int_status)) irq_vec[i].handler(it6505); } + it6505_irq_video_handler(it6505, (unsigned int *)int_status); } pm_runtime_put_sync(dev); @@ -2584,10 +2625,10 @@ /* time interval between OVDD and SYSRSTN at least be 10ms */ if (pdata->gpiod_reset) { usleep_range(10000, 20000); - gpiod_set_value_cansleep(pdata->gpiod_reset, 0); - usleep_range(1000, 2000); gpiod_set_value_cansleep(pdata->gpiod_reset, 1); - usleep_range(10000, 20000); + usleep_range(1000, 2000); + gpiod_set_value_cansleep(pdata->gpiod_reset, 0); + usleep_range(25000, 35000); } it6505->powered = true; @@ -2613,7 +2654,7 @@ } if (pdata->gpiod_reset) - gpiod_set_value_cansleep(pdata->gpiod_reset, 0); + gpiod_set_value_cansleep(pdata->gpiod_reset, 1); if (pdata->pwr18) { err = regulator_disable(pdata->pwr18); @@ -3077,6 +3118,8 @@ { struct it6505 *it6505 = dev_get_drvdata(dev); + it6505_remove_edid(it6505); + return it6505_poweroff(it6505); } @@ -3103,7 +3146,7 @@ return PTR_ERR(pdata->ovdd); } - pdata->gpiod_reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW); + pdata->gpiod_reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); if (IS_ERR(pdata->gpiod_reset)) { dev_err(dev, "gpiod_reset gpio not found"); return PTR_ERR(pdata->gpiod_reset); @@ -3474,6 +3517,7 @@ { .compatible = "ite,it6505" }, { } }; +MODULE_DEVICE_TABLE(of, it6505_of_match); static struct i2c_driver it6505_i2c_driver = { .driver = { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/bridge/ite-it66121.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/bridge/ite-it66121.c @@ -1452,8 +1452,10 @@ dev_dbg(dev, "No connector present, passing empty EDID data"); memset(buf, 0, len); } else { + mutex_lock(&ctx->connector->eld_mutex); memcpy(buf, ctx->connector->eld, min(sizeof(ctx->connector->eld), len)); + mutex_unlock(&ctx->connector->eld_mutex); } mutex_unlock(&ctx->lock); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/bridge/lontium-lt8912b.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/bridge/lontium-lt8912b.c @@ -422,50 +422,31 @@ .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, }; -static enum drm_mode_status -lt8912_connector_mode_valid(struct drm_connector *connector, - struct drm_display_mode *mode) -{ - if (mode->clock > 150000) - return MODE_CLOCK_HIGH; - - if (mode->hdisplay > 1920) - return MODE_BAD_HVALUE; - - if (mode->vdisplay > 1080) - return MODE_BAD_VVALUE; - - return MODE_OK; -} - static int lt8912_connector_get_modes(struct drm_connector *connector) { - struct edid *edid; - int ret = -1; - int num = 0; + const struct drm_edid *drm_edid; struct lt8912 *lt = connector_to_lt8912(connector); u32 bus_format = MEDIA_BUS_FMT_RGB888_1X24; + int ret, num; - edid = drm_bridge_get_edid(lt->hdmi_port, connector); - if (edid) { - drm_connector_update_edid_property(connector, edid); - num = drm_add_edid_modes(connector, edid); - } else { - return ret; - } + drm_edid = drm_bridge_edid_read(lt->hdmi_port, connector); + drm_edid_connector_update(connector, drm_edid); + if (!drm_edid) + return 0; + + num = drm_edid_connector_add_modes(connector); ret = drm_display_info_set_bus_formats(&connector->display_info, &bus_format, 1); - if (ret) - num = ret; + if (ret < 0) + num = 0; - kfree(edid); + drm_edid_free(drm_edid); return num; } static const struct drm_connector_helper_funcs lt8912_connector_helper_funcs = { .get_modes = lt8912_connector_get_modes, - .mode_valid = lt8912_connector_mode_valid, }; static void lt8912_bridge_mode_set(struct drm_bridge *bridge, @@ -496,10 +477,8 @@ }; host = of_find_mipi_dsi_host_by_node(lt->host_node); - if (!host) { - dev_err(dev, "failed to find dsi host\n"); - return -EPROBE_DEFER; - } + if (!host) + return dev_err_probe(dev, -EPROBE_DEFER, "failed to find dsi host\n"); dsi = devm_mipi_dsi_device_register_full(dev, host, &info); if (IS_ERR(dsi)) { @@ -609,6 +588,23 @@ drm_bridge_hpd_disable(lt->hdmi_port); } +static enum drm_mode_status +lt8912_bridge_mode_valid(struct drm_bridge *bridge, + const struct drm_display_info *info, + const struct drm_display_mode *mode) +{ + if (mode->clock > 150000) + return MODE_CLOCK_HIGH; + + if (mode->hdisplay > 1920) + return MODE_BAD_HVALUE; + + if (mode->vdisplay > 1080) + return MODE_BAD_VVALUE; + + return MODE_OK; +} + static enum drm_connector_status lt8912_bridge_detect(struct drm_bridge *bridge) { @@ -639,6 +635,7 @@ static const struct drm_bridge_funcs lt8912_bridge_funcs = { .attach = lt8912_bridge_attach, .detach = lt8912_bridge_detach, + .mode_valid = lt8912_bridge_mode_valid, .mode_set = lt8912_bridge_mode_set, .enable = lt8912_bridge_enable, .detect = lt8912_bridge_detect, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/bridge/lontium-lt9611.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/bridge/lontium-lt9611.c @@ -760,10 +760,8 @@ int ret; host = of_find_mipi_dsi_host_by_node(dsi_node); - if (!host) { - dev_err(lt9611->dev, "failed to find dsi host\n"); - return ERR_PTR(-EPROBE_DEFER); - } + if (!host) + return ERR_PTR(dev_err_probe(lt9611->dev, -EPROBE_DEFER, "failed to find dsi host\n")); dsi = devm_mipi_dsi_device_register_full(dev, host, &info); if (IS_ERR(dsi)) { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/bridge/lontium-lt9611uxc.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/bridge/lontium-lt9611uxc.c @@ -265,10 +265,8 @@ int ret; host = of_find_mipi_dsi_host_by_node(dsi_node); - if (!host) { - dev_err(dev, "failed to find dsi host\n"); - return ERR_PTR(-EPROBE_DEFER); - } + if (!host) + return ERR_PTR(dev_err_probe(dev, -EPROBE_DEFER, "failed to find dsi host\n")); dsi = devm_mipi_dsi_device_register_full(dev, host, &info); if (IS_ERR(dsi)) { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/bridge/panel.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/bridge/panel.c @@ -358,9 +358,12 @@ static void devm_drm_panel_bridge_release(struct device *dev, void *res) { - struct drm_bridge **bridge = res; + struct drm_bridge *bridge = *(struct drm_bridge **)res; - drm_panel_bridge_remove(*bridge); + if (!bridge) + return; + + drm_bridge_remove(bridge); } /** --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/bridge/samsung-dsim.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/bridge/samsung-dsim.c @@ -573,8 +573,8 @@ u16 _m, best_m; u8 _s, best_s; - p_min = DIV_ROUND_UP(fin, (12 * MHZ)); - p_max = fin / (6 * MHZ); + p_min = DIV_ROUND_UP(fin, (driver_data->pll_fin_max * MHZ)); + p_max = fin / (driver_data->pll_fin_min * MHZ); for (_p = p_min; _p <= p_max; ++_p) { for (_s = 0; _s <= 5; ++_s) { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/bridge/tc358767.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/bridge/tc358767.c @@ -1579,6 +1579,13 @@ struct drm_connector *connector) { struct tc_data *tc = bridge_to_tc(bridge); + int ret; + + ret = tc_get_display_props(tc); + if (ret < 0) { + dev_err(tc->dev, "failed to read display props: %d\n", ret); + return 0; + } return drm_get_edid(connector, &tc->aux.ddc); } @@ -2034,7 +2041,7 @@ dev_err(tc->dev, "syserr %x\n", stat); } - if (tc->hpd_pin >= 0 && tc->bridge.dev) { + if (tc->hpd_pin >= 0 && tc->bridge.dev && tc->aux.drm_dev) { /* * H is triggered when the GPIO goes high. * --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/bridge/tc358768.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/bridge/tc358768.c @@ -125,6 +125,9 @@ #define TC358768_DSI_CONFW_MODE_CLR (6 << 29) #define TC358768_DSI_CONFW_ADDR_DSI_CONTROL (0x3 << 24) +/* TC358768_DSICMD_TX (0x0600) register */ +#define TC358768_DSI_CMDTX_DC_START BIT(0) + static const char * const tc358768_supplies[] = { "vddc", "vddmipi", "vddio" }; @@ -229,6 +232,21 @@ tc358768_write(priv, reg, tmp); } +static void tc358768_dsicmd_tx(struct tc358768_priv *priv) +{ + u32 val; + + /* start transfer */ + tc358768_write(priv, TC358768_DSICMD_TX, TC358768_DSI_CMDTX_DC_START); + if (priv->error) + return; + + /* wait transfer completion */ + priv->error = regmap_read_poll_timeout(priv->regmap, TC358768_DSICMD_TX, val, + (val & TC358768_DSI_CMDTX_DC_START) == 0, + 100, 100000); +} + static int tc358768_sw_reset(struct tc358768_priv *priv) { /* Assert Reset */ @@ -516,8 +534,7 @@ } } - /* start transfer */ - tc358768_write(priv, TC358768_DSICMD_TX, 1); + tc358768_dsicmd_tx(priv); ret = tc358768_clear_error(priv); if (ret) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/bridge/tc358775.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/bridge/tc358775.c @@ -454,10 +454,6 @@ dev_dbg(tc->dev, "bus_formats %04x bpc %d\n", connector->display_info.bus_formats[0], tc->bpc); - /* - * Default hardware register settings of tc358775 configured - * with MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA jeida-24 format - */ if (connector->display_info.bus_formats[0] == MEDIA_BUS_FMT_RGB888_1X7X4_SPWG) { /* VESA-24 */ @@ -468,14 +464,15 @@ d2l_write(tc->i2c, LV_MX1619, LV_MX(LVI_B6, LVI_B7, LVI_B1, LVI_B2)); d2l_write(tc->i2c, LV_MX2023, LV_MX(LVI_B3, LVI_B4, LVI_B5, LVI_L0)); d2l_write(tc->i2c, LV_MX2427, LV_MX(LVI_HS, LVI_VS, LVI_DE, LVI_R6)); - } else { /* MEDIA_BUS_FMT_RGB666_1X7X3_SPWG - JEIDA-18 */ - d2l_write(tc->i2c, LV_MX0003, LV_MX(LVI_R0, LVI_R1, LVI_R2, LVI_R3)); - d2l_write(tc->i2c, LV_MX0407, LV_MX(LVI_R4, LVI_L0, LVI_R5, LVI_G0)); - d2l_write(tc->i2c, LV_MX0811, LV_MX(LVI_G1, LVI_G2, LVI_L0, LVI_L0)); - d2l_write(tc->i2c, LV_MX1215, LV_MX(LVI_G3, LVI_G4, LVI_G5, LVI_B0)); - d2l_write(tc->i2c, LV_MX1619, LV_MX(LVI_L0, LVI_L0, LVI_B1, LVI_B2)); - d2l_write(tc->i2c, LV_MX2023, LV_MX(LVI_B3, LVI_B4, LVI_B5, LVI_L0)); - d2l_write(tc->i2c, LV_MX2427, LV_MX(LVI_HS, LVI_VS, LVI_DE, LVI_L0)); + } else { + /* JEIDA-18 and JEIDA-24 */ + d2l_write(tc->i2c, LV_MX0003, LV_MX(LVI_R2, LVI_R3, LVI_R4, LVI_R5)); + d2l_write(tc->i2c, LV_MX0407, LV_MX(LVI_R6, LVI_R1, LVI_R7, LVI_G2)); + d2l_write(tc->i2c, LV_MX0811, LV_MX(LVI_G3, LVI_G4, LVI_G0, LVI_G1)); + d2l_write(tc->i2c, LV_MX1215, LV_MX(LVI_G5, LVI_G6, LVI_G7, LVI_B2)); + d2l_write(tc->i2c, LV_MX1619, LV_MX(LVI_B0, LVI_B1, LVI_B3, LVI_B4)); + d2l_write(tc->i2c, LV_MX2023, LV_MX(LVI_B5, LVI_B6, LVI_B7, LVI_L0)); + d2l_write(tc->i2c, LV_MX2427, LV_MX(LVI_HS, LVI_VS, LVI_DE, LVI_R0)); } d2l_write(tc->i2c, VFUEN, VFUEN_EN); @@ -610,10 +607,8 @@ }; host = of_find_mipi_dsi_host_by_node(tc->host_node); - if (!host) { - dev_err(dev, "failed to find dsi host\n"); - return -EPROBE_DEFER; - } + if (!host) + return dev_err_probe(dev, -EPROBE_DEFER, "failed to find dsi host\n"); dsi = devm_mipi_dsi_device_register_full(dev, host, &info); if (IS_ERR(dsi)) { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/bridge/ti-dlpc3433.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/bridge/ti-dlpc3433.c @@ -319,12 +319,11 @@ .channel = 0, .node = NULL, }; + int ret; host = of_find_mipi_dsi_host_by_node(dlpc->host_node); - if (!host) { - DRM_DEV_ERROR(dev, "failed to find dsi host\n"); - return -EPROBE_DEFER; - } + if (!host) + return dev_err_probe(dev, -EPROBE_DEFER, "failed to find dsi host\n"); dlpc->dsi = mipi_dsi_device_register_full(host, &info); if (IS_ERR(dlpc->dsi)) { @@ -336,7 +335,11 @@ dlpc->dsi->format = MIPI_DSI_FMT_RGB565; dlpc->dsi->lanes = dlpc->dsi_lanes; - return devm_mipi_dsi_attach(dev, dlpc->dsi); + ret = devm_mipi_dsi_attach(dev, dlpc->dsi); + if (ret) + DRM_DEV_ERROR(dev, "failed to attach dsi host\n"); + + return ret; } static int dlpc3433_probe(struct i2c_client *client) @@ -367,10 +370,8 @@ drm_bridge_add(&dlpc->bridge); ret = dlpc_host_attach(dlpc); - if (ret) { - DRM_DEV_ERROR(dev, "failed to attach dsi host\n"); + if (ret) goto err_remove_bridge; - } return 0; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/bridge/ti-sn65dsi83.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/bridge/ti-sn65dsi83.c @@ -478,7 +478,6 @@ dev_err(ctx->dev, "failed to lock PLL, ret=%i\n", ret); /* On failure, disable PLL again and exit. */ regmap_write(ctx->regmap, REG_RC_PLL_EN, 0x00); - regulator_disable(ctx->vcc); return; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/bridge/ti-sn65dsi86.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/bridge/ti-sn65dsi86.c @@ -1591,7 +1591,6 @@ pdata->pchip.ops = &ti_sn_pwm_ops; pdata->pchip.npwm = 1; pdata->pchip.of_xlate = of_pwm_single_xlate; - pdata->pchip.of_pwm_n_cells = 1; devm_pm_runtime_enable(&adev->dev); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/ci/gitlab-ci.yml +++ linux-xilinx-6.8.0/drivers/gpu/drm/ci/gitlab-ci.yml @@ -1,6 +1,6 @@ variables: DRM_CI_PROJECT_PATH: &drm-ci-project-path mesa/mesa - DRM_CI_COMMIT_SHA: &drm-ci-commit-sha edfbf74df1d4d6ce54ffe24566108be0e1a98c3d + DRM_CI_COMMIT_SHA: &drm-ci-commit-sha 9d162de9a05155e1c4041857a5848842749164cf UPSTREAM_REPO: git://anongit.freedesktop.org/drm/drm TARGET_BRANCH: drm-next @@ -25,7 +25,9 @@ # per-job artifact storage on MinIO JOB_ARTIFACTS_BASE: ${PIPELINE_ARTIFACTS_BASE}/${CI_JOB_ID} # default kernel for rootfs before injecting the current kernel tree - KERNEL_IMAGE_BASE: https://${S3_HOST}/mesa-lava/gfx-ci/linux/v6.4.12-for-mesa-ci-f6b4ad45f48d + KERNEL_REPO: "gfx-ci/linux" + KERNEL_TAG: "v6.6.4-for-mesa-ci-e4f4c500f7fb" + KERNEL_IMAGE_BASE: https://${S3_HOST}/mesa-lava/${KERNEL_REPO}/${KERNEL_TAG} LAVA_TAGS: subset-1-gfx LAVA_JOB_PRIORITY: 30 @@ -133,6 +135,11 @@ - if: &is-pre-merge-for-marge '$GITLAB_USER_LOGIN == "marge-bot" && $CI_PIPELINE_SOURCE == "merge_request_event"' when: on_success +.never-post-merge-rules: + rules: + - if: *is-post-merge + when: never + # Rule to filter for only scheduled pipelines. .scheduled_pipeline-rules: rules: @@ -150,6 +157,7 @@ .build-rules: rules: - !reference [.no_scheduled_pipelines-rules, rules] + - !reference [.never-post-merge-rules, rules] # Run automatically once all dependency jobs have passed - when: on_success @@ -157,6 +165,7 @@ .container+build-rules: rules: - !reference [.no_scheduled_pipelines-rules, rules] + - !reference [.never-post-merge-rules, rules] - when: manual .ci-deqp-artifacts: @@ -175,6 +184,7 @@ .container-rules: rules: - !reference [.no_scheduled_pipelines-rules, rules] + - !reference [.never-post-merge-rules, rules] # Run pipeline by default in the main project if any CI pipeline # configuration files were changed, to ensure docker images are up to date - if: *is-post-merge --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/ci/test.yml +++ linux-xilinx-6.8.0/drivers/gpu/drm/ci/test.yml @@ -104,7 +104,10 @@ DRIVER_NAME: msm BM_DTB: https://${PIPELINE_ARTIFACTS_BASE}/arm64/apq8016-sbc-usb-host.dtb GPU_VERSION: apq8016 - BM_CMDLINE: "ip=dhcp console=ttyMSM0,115200n8 $BM_KERNEL_EXTRA_ARGS root=/dev/nfs rw nfsrootdebug nfsroot=,tcp,nfsvers=4.2 init=/init $BM_KERNELARGS" + # disabling unused clocks congests with the MDSS runtime PM trying to + # disable those clocks and causes boot to fail. + # Reproducer: DRM_MSM=y, DRM_I2C_ADV7511=m + BM_KERNEL_EXTRA_ARGS: clk_ignore_unused RUNNER_TAG: google-freedreno-db410c script: - ./install/bare-metal/fastboot.sh @@ -234,11 +237,11 @@ i915:tgl: extends: - .i915 - parallel: 8 + parallel: 5 variables: - DEVICE_TYPE: asus-cx9400-volteer + DEVICE_TYPE: acer-cp514-2h-1130g7-volteer GPU_VERSION: tgl - RUNNER_TAG: mesa-ci-x86-64-lava-asus-cx9400-volteer + RUNNER_TAG: mesa-ci-x86-64-lava-acer-cp514-2h-1130g7-volteer .amdgpu: extends: @@ -324,6 +327,7 @@ GPU_VERSION: none extends: - .test-gl + - .test-rules tags: - kvm script: --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/display/drm_dp_cec.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/display/drm_dp_cec.c @@ -311,16 +311,6 @@ if (!aux->transfer) return; -#ifndef CONFIG_MEDIA_CEC_RC - /* - * CEC_CAP_RC is part of CEC_CAP_DEFAULTS, but it is stripped by - * cec_allocate_adapter() if CONFIG_MEDIA_CEC_RC is undefined. - * - * Do this here as well to ensure the tests against cec_caps are - * correct. - */ - cec_caps &= ~CEC_CAP_RC; -#endif cancel_delayed_work_sync(&aux->cec.unregister_work); mutex_lock(&aux->cec.lock); @@ -337,7 +327,9 @@ num_las = CEC_MAX_LOG_ADDRS; if (aux->cec.adap) { - if (aux->cec.adap->capabilities == cec_caps && + /* Check if the adapter properties have changed */ + if ((aux->cec.adap->capabilities & CEC_CAP_MONITOR_ALL) == + (cec_caps & CEC_CAP_MONITOR_ALL) && aux->cec.adap->available_log_addrs == num_las) { /* Unchanged, so just set the phys addr */ cec_s_phys_addr(aux->cec.adap, source_physical_address, false); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/display/drm_dp_dual_mode_helper.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/display/drm_dp_dual_mode_helper.c @@ -160,11 +160,11 @@ static bool is_hdmi_adaptor(const char hdmi_id[DP_DUAL_MODE_HDMI_ID_LEN]) { - static const char dp_dual_mode_hdmi_id[DP_DUAL_MODE_HDMI_ID_LEN] = + static const char dp_dual_mode_hdmi_id[DP_DUAL_MODE_HDMI_ID_LEN + 1] = "DP-HDMI ADAPTOR\x04"; return memcmp(hdmi_id, dp_dual_mode_hdmi_id, - sizeof(dp_dual_mode_hdmi_id)) == 0; + DP_DUAL_MODE_HDMI_ID_LEN) == 0; } static bool is_type1_adaptor(uint8_t adaptor_id) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/display/drm_dp_helper.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/display/drm_dp_helper.c @@ -533,6 +533,15 @@ mutex_lock(&aux->hw_mutex); /* + * If the device attached to the aux bus is powered down then there's + * no reason to attempt a transfer. Error out immediately. + */ + if (aux->powered_down) { + ret = -EBUSY; + goto unlock; + } + + /* * The specification doesn't give any recommendation on how often to * retry native transactions. We used to retry 7 times like for * aux i2c transactions but real world devices this wasn't @@ -600,6 +609,29 @@ EXPORT_SYMBOL(drm_dp_dpcd_probe); /** + * drm_dp_dpcd_set_powered() - Set whether the DP device is powered + * @aux: DisplayPort AUX channel; for convenience it's OK to pass NULL here + * and the function will be a no-op. + * @powered: true if powered; false if not + * + * If the endpoint device on the DP AUX bus is known to be powered down + * then this function can be called to make future transfers fail immediately + * instead of needing to time out. + * + * If this function is never called then a device defaults to being powered. + */ +void drm_dp_dpcd_set_powered(struct drm_dp_aux *aux, bool powered) +{ + if (!aux) + return; + + mutex_lock(&aux->hw_mutex); + aux->powered_down = !powered; + mutex_unlock(&aux->hw_mutex); +} +EXPORT_SYMBOL(drm_dp_dpcd_set_powered); + +/** * drm_dp_dpcd_read() - read a series of bytes from the DPCD * @aux: DisplayPort AUX channel (SST or MST) * @offset: address of the (first) register to read @@ -1858,6 +1890,9 @@ struct drm_dp_aux_msg msg; int err = 0; + if (aux->powered_down) + return -EBUSY; + dp_aux_i2c_transfer_size = clamp(dp_aux_i2c_transfer_size, 1, DP_AUX_MAX_PAYLOAD_BYTES); memset(&msg, 0, sizeof(msg)); @@ -2097,8 +2132,6 @@ { int ret; - WARN_ON_ONCE(!aux->drm_dev); - if (!aux->ddc.algo) drm_dp_aux_init(aux); @@ -2337,7 +2370,7 @@ { u8 bpp_increment_dpcd = dsc_dpcd[DP_DSC_BITS_PER_PIXEL_INC - DP_DSC_SUPPORT]; - switch (bpp_increment_dpcd) { + switch (bpp_increment_dpcd & DP_DSC_BITS_PER_PIXEL_MASK) { case DP_DSC_BITS_PER_PIXEL_1_16: return 16; case DP_DSC_BITS_PER_PIXEL_1_8: @@ -3982,6 +4015,13 @@ u32 overhead = 1000000; int symbol_cycles; + if (lane_count == 0 || hactive == 0 || bpp_x16 == 0) { + DRM_DEBUG_KMS("Invalid BW overhead params: lane_count %d, hactive %d, bpp_x16 %d.%04d\n", + lane_count, hactive, + bpp_x16 >> 4, (bpp_x16 & 0xf) * 625); + return 0; + } + /* * DP Standard v2.1 2.6.4.1 * SSC downspread and ref clock variation margin: --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/display/drm_dp_mst_topology.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/display/drm_dp_mst_topology.c @@ -320,6 +320,9 @@ hdr->broadcast = (buf[idx] >> 7) & 0x1; hdr->path_msg = (buf[idx] >> 6) & 0x1; hdr->msg_len = buf[idx] & 0x3f; + if (hdr->msg_len < 1) /* min space for body CRC */ + return false; + idx++; hdr->somt = (buf[idx] >> 7) & 0x1; hdr->eomt = (buf[idx] >> 6) & 0x1; @@ -2924,7 +2927,7 @@ /* FIXME: Actually do some real error handling here */ ret = drm_dp_mst_wait_tx_reply(mstb, txmsg); - if (ret <= 0) { + if (ret < 0) { drm_err(mgr->dev, "Sending link address failed with %d\n", ret); goto out; } @@ -2976,7 +2979,7 @@ mutex_unlock(&mgr->lock); out: - if (ret <= 0) + if (ret < 0) mstb->link_address_sent = false; kfree(txmsg); return ret < 0 ? ret : changed; @@ -3416,7 +3419,6 @@ /** * drm_dp_add_payload_part2() - Execute payload update part 2 * @mgr: Manager to use. - * @state: The global atomic state * @payload: The payload to update * * If @payload was successfully assigned a starting time slot by drm_dp_add_payload_part1(), this @@ -3425,14 +3427,13 @@ * Returns: 0 on success, negative error code on failure. */ int drm_dp_add_payload_part2(struct drm_dp_mst_topology_mgr *mgr, - struct drm_atomic_state *state, struct drm_dp_mst_atomic_payload *payload) { int ret = 0; /* Skip failed payloads */ if (payload->payload_allocation_status != DRM_DP_MST_PAYLOAD_ALLOCATION_DFP) { - drm_dbg_kms(state->dev, "Part 1 of payload creation for %s failed, skipping part 2\n", + drm_dbg_kms(mgr->dev, "Part 1 of payload creation for %s failed, skipping part 2\n", payload->port->connector->name); return -EIO; } @@ -3688,8 +3689,7 @@ ret = 0; mgr->payload_id_table_cleared = false; - memset(&mgr->down_rep_recv, 0, sizeof(mgr->down_rep_recv)); - memset(&mgr->up_req_recv, 0, sizeof(mgr->up_req_recv)); + mgr->reset_rx_state = true; } out_unlock: @@ -3817,6 +3817,11 @@ } EXPORT_SYMBOL(drm_dp_mst_topology_mgr_resume); +static void reset_msg_rx_state(struct drm_dp_sideband_msg_rx *msg) +{ + memset(msg, 0, sizeof(*msg)); +} + static bool drm_dp_get_one_sb_msg(struct drm_dp_mst_topology_mgr *mgr, bool up, struct drm_dp_mst_branch **mstb) @@ -3895,6 +3900,34 @@ return true; } +static int get_msg_request_type(u8 data) +{ + return data & 0x7f; +} + +static bool verify_rx_request_type(struct drm_dp_mst_topology_mgr *mgr, + const struct drm_dp_sideband_msg_tx *txmsg, + const struct drm_dp_sideband_msg_rx *rxmsg) +{ + const struct drm_dp_sideband_msg_hdr *hdr = &rxmsg->initial_hdr; + const struct drm_dp_mst_branch *mstb = txmsg->dst; + int tx_req_type = get_msg_request_type(txmsg->msg[0]); + int rx_req_type = get_msg_request_type(rxmsg->msg[0]); + char rad_str[64]; + + if (tx_req_type == rx_req_type) + return true; + + drm_dp_mst_rad_to_str(mstb->rad, mstb->lct, rad_str, sizeof(rad_str)); + drm_dbg_kms(mgr->dev, + "Got unexpected MST reply, mstb: %p seqno: %d lct: %d rad: %s rx_req_type: %s (%02x) != tx_req_type: %s (%02x)\n", + mstb, hdr->seqno, mstb->lct, rad_str, + drm_dp_mst_req_type_str(rx_req_type), rx_req_type, + drm_dp_mst_req_type_str(tx_req_type), tx_req_type); + + return false; +} + static int drm_dp_mst_handle_down_rep(struct drm_dp_mst_topology_mgr *mgr) { struct drm_dp_sideband_msg_tx *txmsg; @@ -3924,6 +3957,9 @@ goto out_clear_reply; } + if (!verify_rx_request_type(mgr, txmsg, msg)) + goto out_clear_reply; + drm_dp_sideband_parse_reply(mgr, msg, &txmsg->reply); if (txmsg->reply.reply_type == DP_SIDEBAND_REPLY_NAK) { @@ -4031,9 +4067,10 @@ static int drm_dp_mst_handle_up_req(struct drm_dp_mst_topology_mgr *mgr) { struct drm_dp_pending_up_req *up_req; + struct drm_dp_mst_branch *mst_primary; if (!drm_dp_get_one_sb_msg(mgr, true, NULL)) - goto out; + goto out_clear_reply; if (!mgr->up_req_recv.have_eomt) return 0; @@ -4051,15 +4088,25 @@ drm_dbg_kms(mgr->dev, "Received unknown up req type, ignoring: %x\n", up_req->msg.req_type); kfree(up_req); - goto out; + goto out_clear_reply; } - drm_dp_send_up_ack_reply(mgr, mgr->mst_primary, up_req->msg.req_type, + mutex_lock(&mgr->lock); + mst_primary = mgr->mst_primary; + if (!mst_primary || !drm_dp_mst_topology_try_get_mstb(mst_primary)) { + mutex_unlock(&mgr->lock); + kfree(up_req); + goto out_clear_reply; + } + mutex_unlock(&mgr->lock); + + drm_dp_send_up_ack_reply(mgr, mst_primary, up_req->msg.req_type, false); if (up_req->msg.req_type == DP_CONNECTION_STATUS_NOTIFY) { const struct drm_dp_connection_status_notify *conn_stat = &up_req->msg.u.conn_stat; + bool handle_csn; drm_dbg_kms(mgr->dev, "Got CSN: pn: %d ldps:%d ddps: %d mcs: %d ip: %d pdt: %d\n", conn_stat->port_number, @@ -4068,6 +4115,16 @@ conn_stat->message_capability_status, conn_stat->input_port, conn_stat->peer_device_type); + + mutex_lock(&mgr->probe_lock); + handle_csn = mst_primary->link_address_sent; + mutex_unlock(&mgr->probe_lock); + + if (!handle_csn) { + drm_dbg_kms(mgr->dev, "Got CSN before finish topology probing. Skip it."); + kfree(up_req); + goto out_put_primary; + } } else if (up_req->msg.req_type == DP_RESOURCE_STATUS_NOTIFY) { const struct drm_dp_resource_status_notify *res_stat = &up_req->msg.u.resource_stat; @@ -4083,11 +4140,24 @@ mutex_unlock(&mgr->up_req_lock); queue_work(system_long_wq, &mgr->up_req_work); -out: +out_put_primary: + drm_dp_mst_topology_put_mstb(mst_primary); +out_clear_reply: memset(&mgr->up_req_recv, 0, sizeof(struct drm_dp_sideband_msg_rx)); return 0; } +static void update_msg_rx_state(struct drm_dp_mst_topology_mgr *mgr) +{ + mutex_lock(&mgr->lock); + if (mgr->reset_rx_state) { + mgr->reset_rx_state = false; + reset_msg_rx_state(&mgr->down_rep_recv); + reset_msg_rx_state(&mgr->up_req_recv); + } + mutex_unlock(&mgr->lock); +} + /** * drm_dp_mst_hpd_irq_handle_event() - MST hotplug IRQ handle MST event * @mgr: manager to notify irq for. @@ -4122,6 +4192,8 @@ *handled = true; } + update_msg_rx_state(mgr); + if (esi[1] & DP_DOWN_REP_MSG_RDY) { ret = drm_dp_mst_handle_down_rep(mgr); *handled = true; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/display/drm_hdmi_helper.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/display/drm_hdmi_helper.c @@ -78,6 +78,81 @@ } EXPORT_SYMBOL(drm_hdmi_infoframe_set_hdr_metadata); + +/** + * drm_hdmi_infoframe_set_gen_hdr_metadata() - fill an HDMI DRM infoframe with + * HDR metadata from userspace + * @frame: HDMI DRM infoframe + * @conn_state: Connector state containing HDR metadata + * + * Return: 0 on success or a negative error code on failure. + */ +int +drm_hdmi_infoframe_set_gen_hdr_metadata(struct hdmi_drm_infoframe *frame, + const struct drm_connector_state *conn_state) +{ + struct drm_connector *connector; + struct gen_hdr_output_metadata *gen_hdr_metadata; + struct hdr_metadata_infoframe *hdr_infoframe; + int err; + + if (!frame || !conn_state) + return -EINVAL; + + connector = conn_state->connector; + + if (!conn_state->gen_hdr_output_metadata) + return -EINVAL; + + gen_hdr_metadata = conn_state->gen_hdr_output_metadata->data; + + if (!gen_hdr_metadata || !connector) + return -EINVAL; + + if (gen_hdr_metadata->metadata_type == DRM_HDR_TYPE_HDR10) { + hdr_infoframe = (struct hdr_metadata_infoframe *) + gen_hdr_metadata->payload; + + /* Sink EOTF is Bit map while infoframe is absolute values */ + if (!is_eotf_supported(hdr_infoframe->eotf, + connector->hdr_sink_metadata.hdmi_type1.eotf)) { + DRM_DEBUG_KMS("EOTF Not Supported\n"); + return -EINVAL; + } + + err = hdmi_drm_infoframe_init(frame); + if (err < 0) + return err; + + frame->eotf = hdr_infoframe->eotf; + frame->metadata_type = hdr_infoframe->metadata_type; + + BUILD_BUG_ON(sizeof(frame->display_primaries) != + sizeof(hdr_infoframe->display_primaries)); + BUILD_BUG_ON(sizeof(frame->white_point) != + sizeof(hdr_infoframe->white_point)); + + memcpy(&frame->display_primaries, + &hdr_infoframe->display_primaries, + sizeof(frame->display_primaries)); + + memcpy(&frame->white_point, + &hdr_infoframe->white_point, + sizeof(frame->white_point)); + + frame->max_display_mastering_luminance = + hdr_infoframe->max_display_mastering_luminance; + frame->min_display_mastering_luminance = + hdr_infoframe->min_display_mastering_luminance; + frame->max_fall = hdr_infoframe->max_fall; + frame->max_cll = hdr_infoframe->max_cll; + } + + return 0; +} +EXPORT_SYMBOL(drm_hdmi_infoframe_set_gen_hdr_metadata); + + /* HDMI Colorspace Spec Definitions */ #define FULL_COLORIMETRY_MASK 0x1FF #define NORMAL_COLORIMETRY_MASK 0x3 --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/drm_atomic_state_helper.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/drm_atomic_state_helper.c @@ -640,6 +640,9 @@ if (state->hdr_output_metadata) drm_property_blob_get(state->hdr_output_metadata); + if (state->gen_hdr_output_metadata) + drm_property_blob_get(state->gen_hdr_output_metadata); + /* Don't copy over a writeback job, they are used only once */ state->writeback_job = NULL; } @@ -689,6 +692,7 @@ drm_writeback_cleanup_job(state->writeback_job); drm_property_blob_put(state->hdr_output_metadata); + drm_property_blob_put(state->gen_hdr_output_metadata); } EXPORT_SYMBOL(__drm_atomic_helper_connector_destroy_state); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/drm_atomic_uapi.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/drm_atomic_uapi.c @@ -543,7 +543,7 @@ &state->fb_damage_clips, val, -1, - sizeof(struct drm_rect), + sizeof(struct drm_mode_rect), &replaced); return ret; } else if (property == plane->scaling_filter_property) { @@ -742,6 +742,13 @@ sizeof(struct hdr_output_metadata), -1, &replaced); return ret; + } else if (property == config->gen_hdr_output_metadata_property) { + ret = drm_property_replace_blob_from_id(dev, + &state->gen_hdr_output_metadata, + val, + sizeof(struct gen_hdr_output_metadata), -1, + &replaced); + return ret; } else if (property == config->aspect_ratio_property) { state->picture_aspect_ratio = val; } else if (property == config->content_type_property) { @@ -846,6 +853,9 @@ } else if (property == config->hdr_output_metadata_property) { *val = state->hdr_output_metadata ? state->hdr_output_metadata->base.id : 0; + } else if (property == config->gen_hdr_output_metadata_property) { + *val = state->gen_hdr_output_metadata ? + state->gen_hdr_output_metadata->base.id : 0; } else if (property == config->content_protection_property) { *val = state->content_protection; } else if (property == config->hdcp_content_type_property) { @@ -1066,21 +1076,17 @@ break; } - if (async_flip && prop != config->prop_fb_id) { + if (async_flip && + (plane_state->plane->type != DRM_PLANE_TYPE_PRIMARY || + (prop != config->prop_fb_id && + prop != config->prop_in_fence_fd && + prop != config->prop_fb_damage_clips))) { ret = drm_atomic_plane_get_property(plane, plane_state, prop, &old_val); ret = drm_atomic_check_prop_changes(ret, old_val, prop_value, prop); break; } - if (async_flip && plane_state->plane->type != DRM_PLANE_TYPE_PRIMARY) { - drm_dbg_atomic(prop->dev, - "[OBJECT:%d] Only primary planes can be changed during async flip\n", - obj->id); - ret = -EINVAL; - break; - } - ret = drm_atomic_plane_set_property(plane, plane_state, file_priv, prop, prop_value); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/drm_bridge.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/drm_bridge.c @@ -27,8 +27,9 @@ #include #include -#include #include +#include +#include #include #include #include @@ -352,13 +353,8 @@ bridge->encoder = NULL; list_del(&bridge->chain_node); -#ifdef CONFIG_OF DRM_ERROR("failed to attach bridge %pOF to encoder %s: %d\n", bridge->of_node, encoder->name, ret); -#else - DRM_ERROR("failed to attach bridge to encoder %s: %d\n", - encoder->name, ret); -#endif return ret; } @@ -686,11 +682,17 @@ */ list_for_each_entry_from(next, &encoder->bridge_chain, chain_node) { - if (next->pre_enable_prev_first) { + if (!next->pre_enable_prev_first) { next = list_prev_entry(next, chain_node); limit = next; break; } + + if (list_is_last(&next->chain_node, + &encoder->bridge_chain)) { + limit = next; + break; + } } /* Call these bridges in reverse order */ @@ -773,7 +775,7 @@ /* Found first bridge that does NOT * request prev to be enabled first */ - limit = list_prev_entry(next, chain_node); + limit = next; break; } } @@ -1207,6 +1209,47 @@ EXPORT_SYMBOL_GPL(drm_bridge_get_modes); /** + * drm_bridge_edid_read - read the EDID data of the connected display + * @bridge: bridge control structure + * @connector: the connector to read EDID for + * + * If the bridge supports output EDID retrieval, as reported by the + * DRM_BRIDGE_OP_EDID bridge ops flag, call &drm_bridge_funcs.edid_read to get + * the EDID and return it. Otherwise return NULL. + * + * If &drm_bridge_funcs.edid_read is not set, fall back to using + * drm_bridge_get_edid() and wrapping it in struct drm_edid. + * + * RETURNS: + * The retrieved EDID on success, or NULL otherwise. + */ +const struct drm_edid *drm_bridge_edid_read(struct drm_bridge *bridge, + struct drm_connector *connector) +{ + if (!(bridge->ops & DRM_BRIDGE_OP_EDID)) + return NULL; + + /* Transitional: Fall back to ->get_edid. */ + if (!bridge->funcs->edid_read) { + const struct drm_edid *drm_edid; + struct edid *edid; + + edid = drm_bridge_get_edid(bridge, connector); + if (!edid) + return NULL; + + drm_edid = drm_edid_alloc(edid, (edid->extensions + 1) * EDID_LENGTH); + + kfree(edid); + + return drm_edid; + } + + return bridge->funcs->edid_read(bridge, connector); +} +EXPORT_SYMBOL_GPL(drm_bridge_edid_read); + +/** * drm_bridge_get_edid - get the EDID data of the connected display * @bridge: bridge control structure * @connector: the connector to read EDID for @@ -1215,6 +1258,8 @@ * DRM_BRIDGE_OP_EDID bridge ops flag, call &drm_bridge_funcs.get_edid to * get the EDID and return it. Otherwise return NULL. * + * Deprecated. Prefer using drm_bridge_edid_read(). + * * RETURNS: * The retrieved EDID on success, or NULL otherwise. */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/drm_client_modeset.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/drm_client_modeset.c @@ -730,6 +730,15 @@ if ((conn_configured & mask) != mask && conn_configured != conn_seq) goto retry; + for (i = 0; i < count; i++) { + struct drm_connector *connector = connectors[i]; + + if (connector->has_tile) + drm_client_get_tile_offsets(connectors, connector_count, + modes, offsets, i, + connector->tile_h_loc, connector->tile_v_loc); + } + /* * If the BIOS didn't enable everything it could, fall back to have the * same user experiencing of lighting up as much as possible like the @@ -777,6 +786,7 @@ unsigned int total_modes_count = 0; struct drm_client_offset *offsets; unsigned int connector_count = 0; + /* points to modes protected by mode_config.mutex */ struct drm_display_mode **modes; struct drm_crtc **crtcs; int i, ret = 0; @@ -845,7 +855,6 @@ drm_client_pick_crtcs(client, connectors, connector_count, crtcs, modes, 0, width, height); } - mutex_unlock(&dev->mode_config.mutex); drm_client_modeset_release(client); @@ -869,12 +878,18 @@ kfree(modeset->mode); modeset->mode = drm_mode_duplicate(dev, mode); + if (!modeset->mode) { + ret = -ENOMEM; + break; + } + drm_connector_get(connector); modeset->connectors[modeset->num_connectors++] = connector; modeset->x = offset->x; modeset->y = offset->y; } } + mutex_unlock(&dev->mode_config.mutex); mutex_unlock(&client->modeset_mutex); out: --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/drm_connector.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/drm_connector.c @@ -277,6 +277,7 @@ INIT_LIST_HEAD(&connector->probed_modes); INIT_LIST_HEAD(&connector->modes); mutex_init(&connector->mutex); + mutex_init(&connector->eld_mutex); mutex_init(&connector->edid_override_mutex); connector->edid_blob_ptr = NULL; connector->epoch_counter = 0; @@ -1389,6 +1390,14 @@ * hdmi_drm_infoframe_pack() to pack the infoframe as per spec, in case of * HDMI encoder. * + * GEN_HDR_OUTPUT_METADATA: + * This connector property is functionally the same as HDR_OUTPUT_METADATA. + * However, the existing structures for HDR_OUTPUT_METADATA are not flexible + * enough for dynamic HDR or other connectivity devices like SDI. So, this + * property was created to utilize more generic structures that would be + * scalable in the future. This is currently experimental and may possibly + * be merged with the original HDR_OUTPUT_METADATA property in the future. + * * max bpc: * This range property is used by userspace to limit the bit depth. When * used the driver would limit the bpc in accordance with the valid range @@ -1553,6 +1562,12 @@ return -ENOMEM; dev->mode_config.hdr_output_metadata_property = prop; + prop = drm_property_create(dev, DRM_MODE_PROP_BLOB, + "GEN_HDR_OUTPUT_METADATA", 0); + if (!prop) + return -ENOMEM; + dev->mode_config.gen_hdr_output_metadata_property = prop; + return 0; } @@ -2940,7 +2955,7 @@ dev->mode_config.max_width, dev->mode_config.max_height); else - drm_dbg_kms(dev, "User-space requested a forced probe on [CONNECTOR:%d:%s] but is not the DRM master, demoting to read-only probe", + drm_dbg_kms(dev, "User-space requested a forced probe on [CONNECTOR:%d:%s] but is not the DRM master, demoting to read-only probe\n", connector->base.id, connector->name); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/drm_drv.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/drm_drv.c @@ -34,6 +34,7 @@ #include #include #include +#include #include #include @@ -53,8 +54,7 @@ MODULE_DESCRIPTION("DRM shared core routines"); MODULE_LICENSE("GPL and additional rights"); -static DEFINE_SPINLOCK(drm_minor_lock); -static struct idr drm_minors_idr; +DEFINE_XARRAY_ALLOC(drm_minors_xa); /* * If the drm core fails to init for whatever reason, @@ -82,6 +82,18 @@ * registered and unregistered dynamically according to device-state. */ +static struct xarray *drm_minor_get_xa(enum drm_minor_type type) +{ + if (type == DRM_MINOR_PRIMARY || type == DRM_MINOR_RENDER) + return &drm_minors_xa; +#if IS_ENABLED(CONFIG_DRM_ACCEL) + else if (type == DRM_MINOR_ACCEL) + return &accel_minors_xa; +#endif + else + return ERR_PTR(-EOPNOTSUPP); +} + static struct drm_minor **drm_minor_get_slot(struct drm_device *dev, enum drm_minor_type type) { @@ -100,25 +112,31 @@ static void drm_minor_alloc_release(struct drm_device *dev, void *data) { struct drm_minor *minor = data; - unsigned long flags; WARN_ON(dev != minor->dev); put_device(minor->kdev); - if (minor->type == DRM_MINOR_ACCEL) { - accel_minor_remove(minor->index); - } else { - spin_lock_irqsave(&drm_minor_lock, flags); - idr_remove(&drm_minors_idr, minor->index); - spin_unlock_irqrestore(&drm_minor_lock, flags); - } + xa_erase(drm_minor_get_xa(minor->type), minor->index); } +/* + * DRM used to support 64 devices, for backwards compatibility we need to maintain the + * minor allocation scheme where minors 0-63 are primary nodes, 64-127 are control nodes, + * and 128-191 are render nodes. + * After reaching the limit, we're allocating minors dynamically - first-come, first-serve. + * Accel nodes are using a distinct major, so the minors are allocated in continuous 0-MAX + * range. + */ +#define DRM_MINOR_LIMIT(t) ({ \ + typeof(t) _t = (t); \ + _t == DRM_MINOR_ACCEL ? XA_LIMIT(0, ACCEL_MAX_MINORS) : XA_LIMIT(64 * _t, 64 * _t + 63); \ +}) +#define DRM_EXTENDED_MINOR_LIMIT XA_LIMIT(192, (1 << MINORBITS) - 1) + static int drm_minor_alloc(struct drm_device *dev, enum drm_minor_type type) { struct drm_minor *minor; - unsigned long flags; int r; minor = drmm_kzalloc(dev, sizeof(*minor), GFP_KERNEL); @@ -128,25 +146,14 @@ minor->type = type; minor->dev = dev; - idr_preload(GFP_KERNEL); - if (type == DRM_MINOR_ACCEL) { - r = accel_minor_alloc(); - } else { - spin_lock_irqsave(&drm_minor_lock, flags); - r = idr_alloc(&drm_minors_idr, - NULL, - 64 * type, - 64 * (type + 1), - GFP_NOWAIT); - spin_unlock_irqrestore(&drm_minor_lock, flags); - } - idr_preload_end(); - + r = xa_alloc(drm_minor_get_xa(type), &minor->index, + NULL, DRM_MINOR_LIMIT(type), GFP_KERNEL); + if (r == -EBUSY && (type == DRM_MINOR_PRIMARY || type == DRM_MINOR_RENDER)) + r = xa_alloc(&drm_minors_xa, &minor->index, + NULL, DRM_EXTENDED_MINOR_LIMIT, GFP_KERNEL); if (r < 0) return r; - minor->index = r; - r = drmm_add_action_or_reset(dev, drm_minor_alloc_release, minor); if (r) return r; @@ -162,7 +169,7 @@ static int drm_minor_register(struct drm_device *dev, enum drm_minor_type type) { struct drm_minor *minor; - unsigned long flags; + void *entry; int ret; DRM_DEBUG("\n"); @@ -185,13 +192,12 @@ goto err_debugfs; /* replace NULL with @minor so lookups will succeed from now on */ - if (minor->type == DRM_MINOR_ACCEL) { - accel_minor_replace(minor, minor->index); - } else { - spin_lock_irqsave(&drm_minor_lock, flags); - idr_replace(&drm_minors_idr, minor, minor->index); - spin_unlock_irqrestore(&drm_minor_lock, flags); + entry = xa_store(drm_minor_get_xa(type), minor->index, minor, GFP_KERNEL); + if (xa_is_err(entry)) { + ret = xa_err(entry); + goto err_debugfs; } + WARN_ON(entry); DRM_DEBUG("new minor registered %d\n", minor->index); return 0; @@ -204,20 +210,13 @@ static void drm_minor_unregister(struct drm_device *dev, enum drm_minor_type type) { struct drm_minor *minor; - unsigned long flags; minor = *drm_minor_get_slot(dev, type); if (!minor || !device_is_registered(minor->kdev)) return; /* replace @minor with NULL so lookups will fail from now on */ - if (minor->type == DRM_MINOR_ACCEL) { - accel_minor_replace(NULL, minor->index); - } else { - spin_lock_irqsave(&drm_minor_lock, flags); - idr_replace(&drm_minors_idr, NULL, minor->index); - spin_unlock_irqrestore(&drm_minor_lock, flags); - } + xa_store(drm_minor_get_xa(type), minor->index, NULL, GFP_KERNEL); device_del(minor->kdev); dev_set_drvdata(minor->kdev, NULL); /* safety belt */ @@ -233,16 +232,15 @@ * minor->dev pointer will stay valid! However, the device may get unplugged and * unregistered while you hold the minor. */ -struct drm_minor *drm_minor_acquire(unsigned int minor_id) +struct drm_minor *drm_minor_acquire(struct xarray *minor_xa, unsigned int minor_id) { struct drm_minor *minor; - unsigned long flags; - spin_lock_irqsave(&drm_minor_lock, flags); - minor = idr_find(&drm_minors_idr, minor_id); + xa_lock(minor_xa); + minor = xa_load(minor_xa, minor_id); if (minor) drm_dev_get(minor->dev); - spin_unlock_irqrestore(&drm_minor_lock, flags); + xa_unlock(minor_xa); if (!minor) { return ERR_PTR(-ENODEV); @@ -1031,7 +1029,7 @@ DRM_DEBUG("\n"); - minor = drm_minor_acquire(iminor(inode)); + minor = drm_minor_acquire(&drm_minors_xa, iminor(inode)); if (IS_ERR(minor)) return PTR_ERR(minor); @@ -1066,7 +1064,7 @@ unregister_chrdev(DRM_MAJOR, "drm"); debugfs_remove(drm_debugfs_root); drm_sysfs_destroy(); - idr_destroy(&drm_minors_idr); + WARN_ON(!xa_empty(&drm_minors_xa)); drm_connector_ida_destroy(); } @@ -1075,7 +1073,6 @@ int ret; drm_connector_ida_init(); - idr_init(&drm_minors_idr); drm_memcpy_init_early(); ret = drm_sysfs_init(); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/drm_edid.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/drm_edid.c @@ -2976,6 +2976,57 @@ (mode->vsync_start - mode->vdisplay == 3); } +/** + * drm_mode_find_cea - Create a copy of a mode if present in CEA + * @dev: Device to duplicate against + * @hsize: Mode width + * @vsize: Mode height + * @fresh: Mode refresh rate + * @interlaced: Mode interlace support + * + * Walk the CEA mode list looking for a match for the given parameters. + * + * Return: A newly allocated copy of the mode, or NULL if not found. + */ +struct drm_display_mode *drm_mode_find_cea(struct drm_device *dev, int hsize, + int vsize, int fresh, bool interlaced) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(edid_cea_modes_1); i++) { + const struct drm_display_mode *ptr = &edid_cea_modes_1[i]; + + if (hsize != ptr->hdisplay) + continue; + if (vsize != ptr->vdisplay) + continue; + if (fresh != drm_mode_vrefresh(ptr)) + continue; + if (interlaced != (ptr->flags & DRM_MODE_FLAG_INTERLACE)) + continue; + + return drm_mode_duplicate(dev, ptr); + } + + for (i = 0; i < ARRAY_SIZE(edid_cea_modes_193); i++) { + const struct drm_display_mode *ptr = &edid_cea_modes_193[i]; + + if (hsize != ptr->hdisplay) + continue; + if (vsize != ptr->vdisplay) + continue; + if (fresh != drm_mode_vrefresh(ptr)) + continue; + if (interlaced != (ptr->flags & DRM_MODE_FLAG_INTERLACE)) + continue; + + return drm_mode_duplicate(dev, ptr); + } + + return NULL; +} +EXPORT_SYMBOL(drm_mode_find_cea); + /* * drm_mode_find_dmt - Create a copy of a mode if present in DMT * @dev: Device to duplicate against @@ -5502,7 +5553,9 @@ static void clear_eld(struct drm_connector *connector) { + mutex_lock(&connector->eld_mutex); memset(connector->eld, 0, sizeof(connector->eld)); + mutex_unlock(&connector->eld_mutex); connector->latency_present[0] = false; connector->latency_present[1] = false; @@ -5554,6 +5607,8 @@ if (!drm_edid) return; + mutex_lock(&connector->eld_mutex); + mnl = get_monitor_name(drm_edid, &eld[DRM_ELD_MONITOR_NAME_STRING]); drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s] ELD monitor %s\n", connector->base.id, connector->name, @@ -5614,6 +5669,8 @@ drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s] ELD size %d, SAD count %d\n", connector->base.id, connector->name, drm_eld_size(eld), total_sad_count); + + mutex_unlock(&connector->eld_mutex); } static int _drm_edid_to_sad(const struct drm_edid *drm_edid, @@ -7345,7 +7402,7 @@ static bool displayid_is_tiled_block(const struct displayid_iter *iter, const struct displayid_block *block) { - return (displayid_version(iter) == DISPLAY_ID_STRUCTURE_VER_12 && + return (displayid_version(iter) < DISPLAY_ID_STRUCTURE_VER_20 && block->tag == DATA_BLOCK_TILED_DISPLAY) || (displayid_version(iter) == DISPLAY_ID_STRUCTURE_VER_20 && block->tag == DATA_BLOCK_2_TILED_DISPLAY_TOPOLOGY); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/drm_fb_dma_helper.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/drm_fb_dma_helper.c @@ -76,7 +76,6 @@ u8 h_div = 1, v_div = 1; u32 block_w = drm_format_info_block_width(fb->format, plane); u32 block_h = drm_format_info_block_height(fb->format, plane); - u32 block_size = fb->format->char_per_block[plane]; u32 sample_x; u32 sample_y; u32 block_start_y; @@ -99,7 +98,7 @@ num_hblocks = sample_x / block_w; dma_addr += fb->pitches[plane] * block_start_y; - dma_addr += block_size * num_hblocks; + dma_addr += drm_format_plane_width_bytes(fb->format, plane, num_hblocks); return dma_addr; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/drm_fb_helper.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/drm_fb_helper.c @@ -69,7 +69,7 @@ * This module_param *should* be removed as soon as possible and be * considered as a broken and legacy behaviour from a modern fbdev device. */ -static bool drm_leak_fbdev_smem; +static bool drm_leak_fbdev_smem = true; #if IS_ENABLED(CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM) module_param_unsafe(drm_leak_fbdev_smem, bool, 0600); MODULE_PARM_DESC(drm_leak_fbdev_smem, @@ -524,6 +524,9 @@ if (!info) return ERR_PTR(-ENOMEM); + if (!drm_leak_fbdev_smem) + info->flags |= FBINFO_HIDE_SMEM_START; + ret = fb_alloc_cmap(&info->cmap, 256, 0); if (ret) goto err_release; @@ -628,6 +631,17 @@ static void drm_fb_helper_damage(struct drm_fb_helper *helper, u32 x, u32 y, u32 width, u32 height) { + /* + * This function may be invoked by panic() to flush the frame + * buffer, where all CPUs except the panic CPU are stopped. + * During the following schedule_work(), the panic CPU needs + * the worker_pool lock, which might be held by a stopped CPU, + * causing schedule_work() and panic() to block. Return early on + * oops_in_progress to prevent this blocking. + */ + if (oops_in_progress) + return; + drm_fb_helper_add_damage_clip(helper, x, y, width, height); schedule_work(&helper->damage_work); @@ -1347,14 +1361,14 @@ } EXPORT_SYMBOL(drm_fb_helper_set_par); -static void pan_set(struct drm_fb_helper *fb_helper, int x, int y) +static void pan_set(struct drm_fb_helper *fb_helper, int dx, int dy) { struct drm_mode_set *mode_set; mutex_lock(&fb_helper->client.modeset_mutex); drm_client_for_each_modeset(mode_set, &fb_helper->client) { - mode_set->x = x; - mode_set->y = y; + mode_set->x += dx; + mode_set->y += dy; } mutex_unlock(&fb_helper->client.modeset_mutex); } @@ -1363,16 +1377,18 @@ struct fb_info *info) { struct drm_fb_helper *fb_helper = info->par; - int ret; + int ret, dx, dy; - pan_set(fb_helper, var->xoffset, var->yoffset); + dx = var->xoffset - info->var.xoffset; + dy = var->yoffset - info->var.yoffset; + pan_set(fb_helper, dx, dy); ret = drm_client_modeset_commit_locked(&fb_helper->client); if (!ret) { info->var.xoffset = var->xoffset; info->var.yoffset = var->yoffset; } else - pan_set(fb_helper, info->var.xoffset, info->var.yoffset); + pan_set(fb_helper, -dx, -dy); return ret; } @@ -1860,9 +1876,6 @@ info = fb_helper->info; info->var.pixclock = 0; - if (!drm_leak_fbdev_smem) - info->flags |= FBINFO_HIDE_SMEM_START; - /* Need to drop locks to avoid recursive deadlock in * register_framebuffer. This is ok because the only thing left to do is * register the fbdev emulation instance in kernel_fb_helper_list. */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/drm_fbdev_dma.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/drm_fbdev_dma.c @@ -90,7 +90,8 @@ sizes->surface_width, sizes->surface_height, sizes->surface_bpp); - format = drm_mode_legacy_fb_format(sizes->surface_bpp, sizes->surface_depth); + format = drm_driver_legacy_fb_format(dev, sizes->surface_bpp, + sizes->surface_depth); buffer = drm_client_framebuffer_create(client, sizes->surface_width, sizes->surface_height, format); if (IS_ERR(buffer)) @@ -130,7 +131,10 @@ info->flags |= FBINFO_READS_FAST; /* signal caching */ info->screen_size = sizes->surface_height * fb->pitches[0]; info->screen_buffer = map.vaddr; - info->fix.smem_start = page_to_phys(virt_to_page(info->screen_buffer)); + if (!(info->flags & FBINFO_HIDE_SMEM_START)) { + if (!drm_WARN_ON(dev, is_vmalloc_addr(info->screen_buffer))) + info->fix.smem_start = page_to_phys(virt_to_page(info->screen_buffer)); + } info->fix.smem_len = info->screen_size; return 0; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/drm_fbdev_generic.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/drm_fbdev_generic.c @@ -84,7 +84,8 @@ sizes->surface_width, sizes->surface_height, sizes->surface_bpp); - format = drm_mode_legacy_fb_format(sizes->surface_bpp, sizes->surface_depth); + format = drm_driver_legacy_fb_format(dev, sizes->surface_bpp, + sizes->surface_depth); buffer = drm_client_framebuffer_create(client, sizes->surface_width, sizes->surface_height, format); if (IS_ERR(buffer)) @@ -113,7 +114,6 @@ /* screen */ info->flags |= FBINFO_VIRTFB | FBINFO_READS_FAST; info->screen_buffer = screen_buffer; - info->fix.smem_start = page_to_phys(vmalloc_to_page(info->screen_buffer)); info->fix.smem_len = screen_size; /* deferred I/O */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/drm_file.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/drm_file.c @@ -138,7 +138,7 @@ */ struct drm_file *drm_file_alloc(struct drm_minor *minor) { - static atomic64_t ident = ATOMIC_INIT(0); + static atomic64_t ident = ATOMIC64_INIT(0); struct drm_device *dev = minor->dev; struct drm_file *file; int ret; @@ -364,7 +364,7 @@ struct drm_minor *minor; int retcode; - minor = drm_minor_acquire(iminor(inode)); + minor = drm_minor_acquire(&drm_minors_xa, iminor(inode)); if (IS_ERR(minor)) return PTR_ERR(minor); @@ -469,14 +469,12 @@ dev = filp->minor->dev; mutex_lock(&dev->filelist_mutex); + get_pid(pid); old = rcu_replace_pointer(filp->pid, pid, 1); mutex_unlock(&dev->filelist_mutex); - if (pid != old) { - get_pid(pid); - synchronize_rcu(); - put_pid(old); - } + synchronize_rcu(); + put_pid(old); } /** --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/drm_fourcc.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/drm_fourcc.c @@ -29,6 +29,7 @@ #include #include +#include /** * drm_mode_legacy_fb_format - compute drm fourcc code from legacy description @@ -245,6 +246,9 @@ { .format = DRM_FORMAT_NV61, .depth = 0, .num_planes = 2, .cpp = { 1, 2, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true }, { .format = DRM_FORMAT_NV24, .depth = 0, .num_planes = 2, .cpp = { 1, 2, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true }, { .format = DRM_FORMAT_NV42, .depth = 0, .num_planes = 2, .cpp = { 1, 2, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true }, + { .format = DRM_FORMAT_XV15, .depth = 0, .num_planes = 2, .pixels_per_macropixel = { 3, 3, 0 }, .bytes_per_macropixel = { 4, 8, 0 }, .hsub = 2, .vsub = 2, .is_yuv = true}, + { .format = DRM_FORMAT_XV20, .depth = 0, .num_planes = 2, .pixels_per_macropixel = { 3, 3, 0 }, .bytes_per_macropixel = { 4, 8, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true}, + { .format = DRM_FORMAT_X403, .depth = 0, .num_planes = 3, .pixels_per_macropixel = { 3, 3, 3 }, .bytes_per_macropixel = { 4, 4, 4 }, .hsub = 1, .vsub = 1, .is_yuv = true}, { .format = DRM_FORMAT_YUYV, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true }, { .format = DRM_FORMAT_YVYU, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true }, { .format = DRM_FORMAT_UYVY, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true }, @@ -318,6 +322,11 @@ { .format = DRM_FORMAT_P030, .depth = 0, .num_planes = 2, .char_per_block = { 4, 8, 0 }, .block_w = { 3, 3, 0 }, .block_h = { 1, 1, 0 }, .hsub = 2, .vsub = 2, .is_yuv = true}, + { .format = DRM_FORMAT_AVUY, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true }, + { .format = DRM_FORMAT_XVUY8888, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1 }, + { .format = DRM_FORMAT_XVUY2101010, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1 }, + { .format = DRM_FORMAT_Y8, .depth = 0, .num_planes = 1, .cpp = { 1, 0, 0 }, .hsub = 1, .vsub = 1 }, + { .format = DRM_FORMAT_Y10, .depth = 0, .num_planes = 1, .pixels_per_macropixel = { 3, 0, 0 }, .bytes_per_macropixel = { 4, 0, 0 }, .hsub = 1, .vsub = 1 }, }; unsigned int i; @@ -456,3 +465,36 @@ drm_format_info_block_height(info, plane)); } EXPORT_SYMBOL(drm_format_info_min_pitch); + +/** + * drm_format_plane_width_bytes - bytes of the given width of the plane + * @info: DRM format information + * @plane: plane index + * @width: width to get the number of bytes + * + * This returns the number of bytes for given @width and @plane. + * The @char_per_block or macro pixel information should be valid. + * + * Returns: + * The bytes of @width of @plane. 0 for invalid format info. + */ +uint64_t drm_format_plane_width_bytes(const struct drm_format_info *info, + int plane, unsigned int width) +{ + if (!info || plane >= info->num_planes) + return 0; + + if (info->char_per_block[plane]) + return drm_format_info_min_pitch(info, plane, width); + + if (WARN_ON(!info->bytes_per_macropixel[plane] || + !info->pixels_per_macropixel[plane])) { + DRM_WARN("Either cpp or macro-pixel info should be valid: %p4cc\n", + &info->format); + return 0; + } + + return DIV_ROUND_UP(width * info->bytes_per_macropixel[plane], + info->pixels_per_macropixel[plane]); +} +EXPORT_SYMBOL(drm_format_plane_width_bytes); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/drm_framebuffer.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/drm_framebuffer.c @@ -180,7 +180,8 @@ for (i = 0; i < info->num_planes; i++) { unsigned int width = drm_format_info_plane_width(info, r->width, i); unsigned int height = drm_format_info_plane_height(info, r->height, i); - unsigned int block_size = info->char_per_block[i]; + unsigned int block_size = info->char_per_block[i] || + info->bytes_per_macropixel[i]; u64 min_pitch = drm_format_info_min_pitch(info, i, width); if (!block_size && (r->modifier[i] == DRM_FORMAT_MOD_LINEAR)) { @@ -274,7 +275,8 @@ struct drm_framebuffer *fb; int ret; - if (r->flags & ~(DRM_MODE_FB_INTERLACED | DRM_MODE_FB_MODIFIERS)) { + if (r->flags & ~(DRM_MODE_FB_INTERLACED | DRM_MODE_FB_MODIFIERS | + DRM_MODE_FB_ALTERNATE_TOP | DRM_MODE_FB_ALTERNATE_BOTTOM)) { drm_dbg_kms(dev, "bad framebuffer flags 0x%08x\n", r->flags); return ERR_PTR(-EINVAL); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/drm_gem_atomic_helper.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/drm_gem_atomic_helper.c @@ -224,8 +224,8 @@ __drm_atomic_helper_plane_duplicate_state(plane, &new_shadow_plane_state->base); - drm_format_conv_state_copy(&shadow_plane_state->fmtcnv_state, - &new_shadow_plane_state->fmtcnv_state); + drm_format_conv_state_copy(&new_shadow_plane_state->fmtcnv_state, + &shadow_plane_state->fmtcnv_state); } EXPORT_SYMBOL(__drm_gem_duplicate_shadow_plane_state); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/drm_gem_shmem_helper.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/drm_gem_shmem_helper.c @@ -610,6 +610,9 @@ return ret; } + if (is_cow_mapping(vma->vm_flags)) + return -EINVAL; + dma_resv_lock(shmem->base.resv, NULL); ret = drm_gem_shmem_get_pages(shmem); dma_resv_unlock(shmem->base.resv); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/drm_internal.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/drm_internal.h @@ -79,10 +79,6 @@ void drm_prime_remove_buf_handle(struct drm_prime_file_private *prime_fpriv, uint32_t handle); -/* drm_drv.c */ -struct drm_minor *drm_minor_acquire(unsigned int minor_id); -void drm_minor_release(struct drm_minor *minor); - /* drm_managed.c */ void drm_managed_release(struct drm_device *dev); void drmm_add_final_kfree(struct drm_device *dev, void *container); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/drm_mipi_dsi.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/drm_mipi_dsi.c @@ -654,7 +654,7 @@ * * Return: 0 on success or a negative error code on failure. */ -ssize_t mipi_dsi_compression_mode(struct mipi_dsi_device *dsi, bool enable) +int mipi_dsi_compression_mode(struct mipi_dsi_device *dsi, bool enable) { /* Note: Needs updating for non-default PPS or algorithm */ u8 tx[2] = { enable << 0, 0 }; @@ -679,8 +679,8 @@ * * Return: 0 on success or a negative error code on failure. */ -ssize_t mipi_dsi_picture_parameter_set(struct mipi_dsi_device *dsi, - const struct drm_dsc_picture_parameter_set *pps) +int mipi_dsi_picture_parameter_set(struct mipi_dsi_device *dsi, + const struct drm_dsc_picture_parameter_set *pps) { struct mipi_dsi_msg msg = { .channel = dsi->channel, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/drm_mm.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/drm_mm.c @@ -151,7 +151,7 @@ INTERVAL_TREE_DEFINE(struct drm_mm_node, rb, u64, __subtree_last, - START, LAST, static inline, drm_mm_interval_tree) + START, LAST, static inline __maybe_unused, drm_mm_interval_tree) struct drm_mm_node * __drm_mm_interval_first(const struct drm_mm *mm, u64 start, u64 last) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/drm_modes.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/drm_modes.c @@ -1285,14 +1285,11 @@ */ int drm_mode_vrefresh(const struct drm_display_mode *mode) { - unsigned int num, den; + unsigned int num = 1, den = 1; if (mode->htotal == 0 || mode->vtotal == 0) return 0; - num = mode->clock; - den = mode->htotal * mode->vtotal; - if (mode->flags & DRM_MODE_FLAG_INTERLACE) num *= 2; if (mode->flags & DRM_MODE_FLAG_DBLSCAN) @@ -1300,6 +1297,12 @@ if (mode->vscan > 1) den *= mode->vscan; + if (check_mul_overflow(mode->clock, num, &num)) + return 0; + + if (check_mul_overflow(mode->htotal * mode->vtotal, den, &den)) + return 0; + return DIV_ROUND_CLOSEST_ULL(mul_u32_u32(num, 1000), den); } EXPORT_SYMBOL(drm_mode_vrefresh); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/drm_modeset_helper.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/drm_modeset_helper.c @@ -193,13 +193,22 @@ if (!dev) return 0; + /* + * Don't disable polling if it was never initialized + */ + if (dev->mode_config.poll_enabled) + drm_kms_helper_poll_disable(dev); - drm_kms_helper_poll_disable(dev); drm_fb_helper_set_suspend_unlocked(dev->fb_helper, 1); state = drm_atomic_helper_suspend(dev); if (IS_ERR(state)) { drm_fb_helper_set_suspend_unlocked(dev->fb_helper, 0); - drm_kms_helper_poll_enable(dev); + /* + * Don't enable polling if it was never initialized + */ + if (dev->mode_config.poll_enabled) + drm_kms_helper_poll_enable(dev); + return PTR_ERR(state); } @@ -239,7 +248,11 @@ dev->mode_config.suspend_state = NULL; drm_fb_helper_set_suspend_unlocked(dev->fb_helper, 0); - drm_kms_helper_poll_enable(dev); + /* + * Don't enable polling if it is not initialized + */ + if (dev->mode_config.poll_enabled) + drm_kms_helper_poll_enable(dev); return ret; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/drm_panel.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/drm_panel.c @@ -274,19 +274,24 @@ * The modes probed from the panel are automatically added to the connector * that the panel is attached to. * - * Return: The number of modes available from the panel on success or a - * negative error code on failure. + * Return: The number of modes available from the panel on success, or 0 on + * failure (no modes). */ int drm_panel_get_modes(struct drm_panel *panel, struct drm_connector *connector) { if (!panel) - return -EINVAL; + return 0; - if (panel->funcs && panel->funcs->get_modes) - return panel->funcs->get_modes(panel, connector); + if (panel->funcs && panel->funcs->get_modes) { + int num; - return -EOPNOTSUPP; + num = panel->funcs->get_modes(panel, connector); + if (num > 0) + return num; + } + + return 0; } EXPORT_SYMBOL(drm_panel_get_modes); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/drm_panel_backlight_quirks.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/drm_panel_backlight_quirks.c @@ -0,0 +1,94 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include +#include +#include +#include +#include +#include + +struct drm_panel_min_backlight_quirk { + struct { + enum dmi_field field; + const char * const value; + } dmi_match; + struct drm_edid_ident ident; + u8 min_brightness; +}; + +static const struct drm_panel_min_backlight_quirk drm_panel_min_backlight_quirks[] = { + /* 13 inch matte panel */ + { + .dmi_match.field = DMI_BOARD_VENDOR, + .dmi_match.value = "Framework", + .ident.panel_id = drm_edid_encode_panel_id('B', 'O', 'E', 0x0bca), + .ident.name = "NE135FBM-N41", + .min_brightness = 0, + }, + /* 13 inch glossy panel */ + { + .dmi_match.field = DMI_BOARD_VENDOR, + .dmi_match.value = "Framework", + .ident.panel_id = drm_edid_encode_panel_id('B', 'O', 'E', 0x095f), + .ident.name = "NE135FBM-N41", + .min_brightness = 0, + }, + /* 13 inch 2.8k panel */ + { + .dmi_match.field = DMI_BOARD_VENDOR, + .dmi_match.value = "Framework", + .ident.panel_id = drm_edid_encode_panel_id('B', 'O', 'E', 0x0cb4), + .ident.name = "NE135A1M-NY1", + .min_brightness = 0, + }, +}; + +static bool drm_panel_min_backlight_quirk_matches(const struct drm_panel_min_backlight_quirk *quirk, + const struct drm_edid *edid) +{ + if (!dmi_match(quirk->dmi_match.field, quirk->dmi_match.value)) + return false; + + if (!drm_edid_match(edid, &quirk->ident)) + return false; + + return true; +} + +/** + * drm_get_panel_min_brightness_quirk - Get minimum supported brightness level for a panel. + * @edid: EDID of the panel to check + * + * This function checks for platform specific (e.g. DMI based) quirks + * providing info on the minimum backlight brightness for systems where this + * cannot be probed correctly from the hard-/firm-ware. + * + * Returns: + * A negative error value or + * an override value in the range [0, 255] representing 0-100% to be scaled to + * the drivers target range. + */ +int drm_get_panel_min_brightness_quirk(const struct drm_edid *edid) +{ + const struct drm_panel_min_backlight_quirk *quirk; + size_t i; + + if (!IS_ENABLED(CONFIG_DMI)) + return -ENODATA; + + if (!edid) + return -EINVAL; + + for (i = 0; i < ARRAY_SIZE(drm_panel_min_backlight_quirks); i++) { + quirk = &drm_panel_min_backlight_quirks[i]; + + if (drm_panel_min_backlight_quirk_matches(quirk, edid)) + return quirk->min_brightness; + } + + return -ENODATA; +} +EXPORT_SYMBOL(drm_get_panel_min_brightness_quirk); + +MODULE_DESCRIPTION("Quirks for panel backlight overrides"); +MODULE_LICENSE("GPL"); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/drm_panel_orientation_quirks.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/drm_panel_orientation_quirks.c @@ -117,6 +117,12 @@ .orientation = DRM_MODE_PANEL_ORIENTATION_LEFT_UP, }; +static const struct drm_dmi_panel_orientation_data lcd1080x1920_rightside_up = { + .width = 1080, + .height = 1920, + .orientation = DRM_MODE_PANEL_ORIENTATION_RIGHT_UP, +}; + static const struct drm_dmi_panel_orientation_data lcd1200x1920_rightside_up = { .width = 1200, .height = 1920, @@ -178,6 +184,12 @@ DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "T103HAF"), }, .driver_data = (void *)&lcd800x1280_rightside_up, + }, { /* AYA NEO AYANEO 2 */ + .matches = { + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "AYANEO"), + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "AYANEO 2"), + }, + .driver_data = (void *)&lcd1200x1920_rightside_up, }, { /* AYA NEO 2021 */ .matches = { DMI_EXACT_MATCH(DMI_SYS_VENDOR, "AYADEVICE"), @@ -190,12 +202,42 @@ DMI_MATCH(DMI_PRODUCT_NAME, "AIR"), }, .driver_data = (void *)&lcd1080x1920_leftside_up, + }, { /* AYA NEO Founder */ + .matches = { + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "AYA NEO"), + DMI_MATCH(DMI_PRODUCT_NAME, "AYA NEO Founder"), + }, + .driver_data = (void *)&lcd800x1280_rightside_up, + }, { /* AYA NEO GEEK */ + .matches = { + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "AYANEO"), + DMI_MATCH(DMI_PRODUCT_NAME, "GEEK"), + }, + .driver_data = (void *)&lcd800x1280_rightside_up, }, { /* AYA NEO NEXT */ .matches = { DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "AYANEO"), DMI_MATCH(DMI_BOARD_NAME, "NEXT"), }, .driver_data = (void *)&lcd800x1280_rightside_up, + }, { /* AYA NEO KUN */ + .matches = { + DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "AYANEO"), + DMI_MATCH(DMI_BOARD_NAME, "KUN"), + }, + .driver_data = (void *)&lcd1600x2560_rightside_up, + }, { /* AYN Loki Max */ + .matches = { + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ayn"), + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Loki Max"), + }, + .driver_data = (void *)&lcd1080x1920_leftside_up, + }, { /* AYN Loki Zero */ + .matches = { + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ayn"), + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Loki Zero"), + }, + .driver_data = (void *)&lcd1080x1920_leftside_up, }, { /* Chuwi HiBook (CWI514) */ .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Hampoo"), @@ -279,6 +321,12 @@ DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "G1618-03") }, .driver_data = (void *)&lcd720x1280_rightside_up, + }, { /* GPD Win Mini */ + .matches = { + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "GPD"), + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "G1617-01") + }, + .driver_data = (void *)&lcd1080x1920_rightside_up, }, { /* I.T.Works TW891 */ .matches = { DMI_EXACT_MATCH(DMI_SYS_VENDOR, "To be filled by O.E.M."), @@ -373,7 +421,6 @@ }, { /* Lenovo Yoga Tab 3 X90F */ .matches = { DMI_MATCH(DMI_SYS_VENDOR, "Intel Corporation"), - DMI_MATCH(DMI_PRODUCT_NAME, "CHERRYVIEW D1 PLATFORM"), DMI_MATCH(DMI_PRODUCT_VERSION, "Blade3-10A-001"), }, .driver_data = (void *)&lcd1600x2560_rightside_up, @@ -396,6 +443,12 @@ DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "ONE XPLAYER"), }, .driver_data = (void *)&lcd1600x2560_leftside_up, + }, { /* OrangePi Neo */ + .matches = { + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "OrangePi"), + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "NEO-01"), + }, + .driver_data = (void *)&lcd1200x1920_rightside_up, }, { /* Samsung GalaxyBook 10.6 */ .matches = { DMI_EXACT_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD."), @@ -409,6 +462,13 @@ DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "1"), }, .driver_data = (void *)&lcd800x1280_rightside_up, + }, { /* Valve Steam Deck */ + .matches = { + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Valve"), + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Galileo"), + DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "1"), + }, + .driver_data = (void *)&lcd800x1280_rightside_up, }, { /* VIOS LTH17 */ .matches = { DMI_EXACT_MATCH(DMI_SYS_VENDOR, "VIOS"), --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/drm_prime.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/drm_prime.c @@ -582,7 +582,12 @@ { struct drm_gem_object *obj = dma_buf->priv; - if (!obj->funcs->get_sg_table) + /* + * drm_gem_map_dma_buf() requires obj->get_sg_table(), but drivers + * that implement their own ->map_dma_buf() do not. + */ + if (dma_buf->ops->map_dma_buf == drm_gem_map_dma_buf && + !obj->funcs->get_sg_table) return -ENOSYS; return drm_gem_pin(obj); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/drm_print.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/drm_print.c @@ -100,8 +100,9 @@ copy = iterator->remain; /* Copy out the bit of the string that we need */ - memcpy(iterator->data, - str + (iterator->start - iterator->offset), copy); + if (iterator->data) + memcpy(iterator->data, + str + (iterator->start - iterator->offset), copy); iterator->offset = iterator->start + copy; iterator->remain -= copy; @@ -110,7 +111,8 @@ len = min_t(ssize_t, strlen(str), iterator->remain); - memcpy(iterator->data + pos, str, len); + if (iterator->data) + memcpy(iterator->data + pos, str, len); iterator->offset += len; iterator->remain -= len; @@ -140,8 +142,9 @@ if ((iterator->offset >= iterator->start) && (len < iterator->remain)) { ssize_t pos = iterator->offset - iterator->start; - snprintf(((char *) iterator->data) + pos, - iterator->remain, "%pV", vaf); + if (iterator->data) + snprintf(((char *) iterator->data) + pos, + iterator->remain, "%pV", vaf); iterator->offset += len; iterator->remain -= len; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/drm_probe_helper.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/drm_probe_helper.c @@ -293,14 +293,17 @@ * Drivers can call this helper from their device resume implementation. It is * not an error to call this even when output polling isn't enabled. * + * If device polling was never initialized before, this call will trigger a + * warning and return. + * * Note that calls to enable and disable polling must be strictly ordered, which * is automatically the case when they're only call from suspend/resume * callbacks. */ void drm_kms_helper_poll_enable(struct drm_device *dev) { - if (!dev->mode_config.poll_enabled || !drm_kms_helper_poll || - dev->mode_config.poll_running) + if (drm_WARN_ON_ONCE(dev, !dev->mode_config.poll_enabled) || + !drm_kms_helper_poll || dev->mode_config.poll_running) return; if (drm_kms_helper_enable_hpd(dev) || @@ -419,6 +422,13 @@ count = connector_funcs->get_modes(connector); + /* The .get_modes() callback should not return negative values. */ + if (count < 0) { + drm_err(connector->dev, ".get_modes() returned %pe\n", + ERR_PTR(count)); + count = 0; + } + /* * Fallback for when DDC probe failed in drm_get_edid() and thus skipped * override/firmware EDID. @@ -619,8 +629,12 @@ 0); } - /* Re-enable polling in case the global poll config changed. */ - drm_kms_helper_poll_enable(dev); + /* + * Re-enable polling in case the global poll config changed but polling + * is still initialized. + */ + if (dev->mode_config.poll_enabled) + drm_kms_helper_poll_enable(dev); if (connector->status == connector_status_disconnected) { DRM_DEBUG_KMS("[CONNECTOR:%d:%s] disconnected\n", @@ -873,12 +887,18 @@ * not an error to call this even when output polling isn't enabled or already * disabled. Polling is re-enabled by calling drm_kms_helper_poll_enable(). * + * If however, the polling was never initialized, this call will trigger a + * warning and return + * * Note that calls to enable and disable polling must be strictly ordered, which * is automatically the case when they're only call from suspend/resume * callbacks. */ void drm_kms_helper_poll_disable(struct drm_device *dev) { + if (drm_WARN_ON(dev, !dev->mode_config.poll_enabled)) + return; + if (dev->mode_config.poll_running) drm_kms_helper_disable_hpd(dev); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/drm_syncobj.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/drm_syncobj.c @@ -1459,6 +1459,7 @@ struct drm_syncobj *syncobj; struct eventfd_ctx *ev_fd_ctx; struct syncobj_eventfd_entry *entry; + int ret; if (!drm_core_check_feature(dev, DRIVER_SYNCOBJ_TIMELINE)) return -EOPNOTSUPP; @@ -1474,13 +1475,15 @@ return -ENOENT; ev_fd_ctx = eventfd_ctx_fdget(args->fd); - if (IS_ERR(ev_fd_ctx)) - return PTR_ERR(ev_fd_ctx); + if (IS_ERR(ev_fd_ctx)) { + ret = PTR_ERR(ev_fd_ctx); + goto err_fdget; + } entry = kzalloc(sizeof(*entry), GFP_KERNEL); if (!entry) { - eventfd_ctx_put(ev_fd_ctx); - return -ENOMEM; + ret = -ENOMEM; + goto err_kzalloc; } entry->syncobj = syncobj; entry->ev_fd_ctx = ev_fd_ctx; @@ -1491,6 +1494,12 @@ drm_syncobj_put(syncobj); return 0; + +err_kzalloc: + eventfd_ctx_put(ev_fd_ctx); +err_fdget: + drm_syncobj_put(syncobj); + return ret; } int --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/etnaviv/etnaviv_buffer.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/etnaviv/etnaviv_buffer.c @@ -482,7 +482,8 @@ } else { CMD_LOAD_STATE(buffer, VIVS_GL_FLUSH_CACHE, VIVS_GL_FLUSH_CACHE_DEPTH | - VIVS_GL_FLUSH_CACHE_COLOR); + VIVS_GL_FLUSH_CACHE_COLOR | + VIVS_GL_FLUSH_CACHE_SHADER_L1); if (has_blt) { CMD_LOAD_STATE(buffer, VIVS_BLT_ENABLE, 0x1); CMD_LOAD_STATE(buffer, VIVS_BLT_SET_COMMAND, 0x1); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/etnaviv/etnaviv_drv.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/etnaviv/etnaviv_drv.c @@ -494,7 +494,7 @@ .desc = "etnaviv DRM", .date = "20151214", .major = 1, - .minor = 3, + .minor = 4, }; /* @@ -527,6 +527,16 @@ priv->num_gpus = 0; priv->shm_gfp_mask = GFP_HIGHUSER | __GFP_RETRY_MAYFAIL | __GFP_NOWARN; + /* + * If the GPU is part of a system with DMA addressing limitations, + * request pages for our SHM backend buffers from the DMA32 zone to + * hopefully avoid performance killing SWIOTLB bounce buffering. + */ + if (dma_addressing_limited(dev)) { + priv->shm_gfp_mask |= GFP_DMA32; + priv->shm_gfp_mask &= ~__GFP_HIGHMEM; + } + priv->cmdbuf_suballoc = etnaviv_cmdbuf_suballoc_new(drm->dev); if (IS_ERR(priv->cmdbuf_suballoc)) { dev_err(drm->dev, "Failed to create cmdbuf suballocator\n"); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/etnaviv/etnaviv_gem.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/etnaviv/etnaviv_gem.c @@ -343,6 +343,7 @@ static void *etnaviv_gem_vmap_impl(struct etnaviv_gem_object *obj) { struct page **pages; + pgprot_t prot; lockdep_assert_held(&obj->lock); @@ -350,15 +351,28 @@ if (IS_ERR(pages)) return NULL; - return vmap(pages, obj->base.size >> PAGE_SHIFT, - VM_MAP, pgprot_writecombine(PAGE_KERNEL)); + switch (obj->flags & ETNA_BO_CACHE_MASK) { + case ETNA_BO_CACHED: + prot = PAGE_KERNEL; + break; + case ETNA_BO_UNCACHED: + prot = pgprot_noncached(PAGE_KERNEL); + break; + case ETNA_BO_WC: + default: + prot = pgprot_writecombine(PAGE_KERNEL); + } + + return vmap(pages, obj->base.size >> PAGE_SHIFT, VM_MAP, prot); } static inline enum dma_data_direction etnaviv_op_to_dma_dir(u32 op) { - if (op & ETNA_PREP_READ) + op &= ETNA_PREP_READ | ETNA_PREP_WRITE; + + if (op == ETNA_PREP_READ) return DMA_FROM_DEVICE; - else if (op & ETNA_PREP_WRITE) + else if (op == ETNA_PREP_WRITE) return DMA_TO_DEVICE; else return DMA_BIDIRECTIONAL; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/etnaviv/etnaviv_gpu.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/etnaviv/etnaviv_gpu.c @@ -632,8 +632,8 @@ /* Disable TX clock gating on affected core revisions. */ if (etnaviv_is_model_rev(gpu, GC4000, 0x5222) || etnaviv_is_model_rev(gpu, GC2000, 0x5108) || - etnaviv_is_model_rev(gpu, GC2000, 0x6202) || - etnaviv_is_model_rev(gpu, GC2000, 0x6203)) + etnaviv_is_model_rev(gpu, GC7000, 0x6202) || + etnaviv_is_model_rev(gpu, GC7000, 0x6203)) pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_TX; /* Disable SE and RA clock gating on affected core revisions. */ @@ -820,14 +820,6 @@ if (ret) goto fail; - /* - * If the GPU is part of a system with DMA addressing limitations, - * request pages for our SHM backend buffers from the DMA32 zone to - * hopefully avoid performance killing SWIOTLB bounce buffering. - */ - if (dma_addressing_limited(gpu->dev)) - priv->shm_gfp_mask |= GFP_DMA32; - /* Create buffer: */ ret = etnaviv_cmdbuf_init(priv->cmdbuf_suballoc, &gpu->buffer, PAGE_SIZE); @@ -1308,6 +1300,8 @@ { u32 val; + mutex_lock(&gpu->lock); + /* disable clock gating */ val = gpu_read_power(gpu, VIVS_PM_POWER_CONTROLS); val &= ~VIVS_PM_POWER_CONTROLS_ENABLE_MODULE_CLOCK_GATING; @@ -1319,6 +1313,8 @@ gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, val); sync_point_perfmon_sample(gpu, event, ETNA_PM_PROCESS_PRE); + + mutex_unlock(&gpu->lock); } static void sync_point_perfmon_sample_post(struct etnaviv_gpu *gpu, @@ -1328,13 +1324,9 @@ unsigned int i; u32 val; - sync_point_perfmon_sample(gpu, event, ETNA_PM_PROCESS_POST); - - for (i = 0; i < submit->nr_pmrs; i++) { - const struct etnaviv_perfmon_request *pmr = submit->pmrs + i; + mutex_lock(&gpu->lock); - *pmr->bo_vma = pmr->sequence; - } + sync_point_perfmon_sample(gpu, event, ETNA_PM_PROCESS_POST); /* disable debug register */ val = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL); @@ -1345,6 +1337,14 @@ val = gpu_read_power(gpu, VIVS_PM_POWER_CONTROLS); val |= VIVS_PM_POWER_CONTROLS_ENABLE_MODULE_CLOCK_GATING; gpu_write_power(gpu, VIVS_PM_POWER_CONTROLS, val); + + mutex_unlock(&gpu->lock); + + for (i = 0; i < submit->nr_pmrs; i++) { + const struct etnaviv_perfmon_request *pmr = submit->pmrs + i; + + *pmr->bo_vma = pmr->sequence; + } } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c @@ -265,6 +265,9 @@ bool etnaviv_fill_identity_from_hwdb(struct etnaviv_gpu *gpu) { struct etnaviv_chip_identity *ident = &gpu->identity; + const u32 product_id = ident->product_id; + const u32 customer_id = ident->customer_id; + const u32 eco_id = ident->eco_id; int i; for (i = 0; i < ARRAY_SIZE(etnaviv_chip_identities); i++) { @@ -278,6 +281,12 @@ etnaviv_chip_identities[i].eco_id == ~0U)) { memcpy(ident, &etnaviv_chip_identities[i], sizeof(*ident)); + + /* Restore some id values as ~0U aka 'don't care' might been used. */ + ident->product_id = product_id; + ident->customer_id = customer_id; + ident->eco_id = eco_id; + return true; } } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/etnaviv/etnaviv_sched.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/etnaviv/etnaviv_sched.c @@ -38,9 +38,6 @@ u32 dma_addr; int change; - /* block scheduler */ - drm_sched_stop(&gpu->sched, sched_job); - /* * If the GPU managed to complete this jobs fence, the timout is * spurious. Bail out. @@ -63,6 +60,9 @@ goto out_no_timeout; } + /* block scheduler */ + drm_sched_stop(&gpu->sched, sched_job); + if(sched_job) drm_sched_increase_karma(sched_job); @@ -76,8 +76,7 @@ return DRM_GPU_SCHED_STAT_NOMINAL; out_no_timeout: - /* restart scheduler after GPU is usable again */ - drm_sched_start(&gpu->sched, true); + list_add(&sched_job->list, &sched_job->sched->pending_list); return DRM_GPU_SCHED_STAT_NOMINAL; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/exynos/exynos_dp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/exynos/exynos_dp.c @@ -286,7 +286,6 @@ .remove_new = exynos_dp_remove, .driver = { .name = "exynos-dp", - .owner = THIS_MODULE, .pm = pm_ptr(&exynos_dp_pm_ops), .of_match_table = exynos_dp_match, }, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/exynos/exynos_drm_gsc.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/exynos/exynos_drm_gsc.c @@ -1174,7 +1174,7 @@ struct exynos_drm_ipp *ipp = &ctx->ipp; ctx->drm_dev = drm_dev; - ctx->drm_dev = drm_dev; + ipp->drm_dev = drm_dev; exynos_drm_register_dma(drm_dev, dev, &ctx->dma_priv); exynos_drm_ipp_register(dev, ipp, &ipp_funcs, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/exynos/exynos_drm_vidi.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/exynos/exynos_drm_vidi.c @@ -309,6 +309,7 @@ struct vidi_context *ctx = ctx_from_connector(connector); struct edid *edid; int edid_len; + int count; /* * the edid data comes from user side and it would be set @@ -316,19 +317,23 @@ */ if (!ctx->raw_edid) { DRM_DEV_DEBUG_KMS(ctx->dev, "raw_edid is null.\n"); - return -EFAULT; + return 0; } edid_len = (1 + ctx->raw_edid->extensions) * EDID_LENGTH; edid = kmemdup(ctx->raw_edid, edid_len, GFP_KERNEL); if (!edid) { DRM_DEV_DEBUG_KMS(ctx->dev, "failed to allocate edid\n"); - return -ENOMEM; + return 0; } drm_connector_update_edid_property(connector, edid); - return drm_add_edid_modes(connector, edid); + count = drm_add_edid_modes(connector, edid); + + kfree(edid); + + return count; } static const struct drm_connector_helper_funcs vidi_connector_helper_funcs = { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/exynos/exynos_hdmi.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/exynos/exynos_hdmi.c @@ -887,11 +887,11 @@ int ret; if (!hdata->ddc_adpt) - return -ENODEV; + goto no_edid; edid = drm_get_edid(connector, hdata->ddc_adpt); if (!edid) - return -ENODEV; + goto no_edid; hdata->dvi_mode = !connector->display_info.is_hdmi; DRM_DEV_DEBUG_KMS(hdata->dev, "%s : width[%d] x height[%d]\n", @@ -906,6 +906,9 @@ kfree(edid); return ret; + +no_edid: + return drm_add_modes_noedid(connector, 640, 480); } static int hdmi_find_phy_conf(struct hdmi_context *hdata, u32 pixel_clock) @@ -1640,7 +1643,9 @@ struct hdmi_context *hdata = dev_get_drvdata(dev); struct drm_connector *connector = &hdata->connector; + mutex_lock(&connector->eld_mutex); memcpy(buf, connector->eld, min(sizeof(connector->eld), len)); + mutex_unlock(&connector->eld_mutex); return 0; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/fsl-dcu/Kconfig +++ linux-xilinx-6.8.0/drivers/gpu/drm/fsl-dcu/Kconfig @@ -8,6 +8,7 @@ select DRM_PANEL select REGMAP_MMIO select VIDEOMODE_HELPERS + select MFD_SYSCON if SOC_LS1021A help Choose this option if you have an Freescale DCU chipset. If M is selected the module will be called fsl-dcu-drm. --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c @@ -100,6 +100,7 @@ static int fsl_dcu_load(struct drm_device *dev, unsigned long flags) { struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; + struct regmap *scfg; int ret; ret = fsl_dcu_drm_modeset_init(fsl_dev); @@ -108,6 +109,20 @@ return ret; } + scfg = syscon_regmap_lookup_by_compatible("fsl,ls1021a-scfg"); + if (PTR_ERR(scfg) != -ENODEV) { + /* + * For simplicity, enable the PIXCLK unconditionally, + * resulting in increased power consumption. Disabling + * the clock in PM or on unload could be implemented as + * a future improvement. + */ + ret = regmap_update_bits(scfg, SCFG_PIXCLKCR, SCFG_PIXCLKCR_PXCEN, + SCFG_PIXCLKCR_PXCEN); + if (ret < 0) + return dev_err_probe(dev->dev, ret, "failed to enable pixclk\n"); + } + ret = drm_vblank_init(dev, dev->mode_config.num_crtc); if (ret < 0) { dev_err(dev->dev, "failed to initialize vblank\n"); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h @@ -160,6 +160,9 @@ #define FSL_DCU_ARGB4444 12 #define FSL_DCU_YUV422 14 +#define SCFG_PIXCLKCR 0x28 +#define SCFG_PIXCLKCR_PXCEN BIT(31) + #define VF610_LAYER_REG_NUM 9 #define LS1021A_LAYER_REG_NUM 10 --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/gma500/Makefile +++ linux-xilinx-6.8.0/drivers/gpu/drm/gma500/Makefile @@ -34,7 +34,6 @@ psb_intel_lvds.o \ psb_intel_modes.o \ psb_intel_sdvo.o \ - psb_lid.o \ psb_irq.o gma500_gfx-$(CONFIG_ACPI) += opregion.o --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/gma500/cdv_intel_lvds.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/gma500/cdv_intel_lvds.c @@ -311,6 +311,9 @@ if (mode_dev->panel_fixed_mode != NULL) { struct drm_display_mode *mode = drm_mode_duplicate(dev, mode_dev->panel_fixed_mode); + if (!mode) + return 0; + drm_mode_probed_add(connector, mode); return 1; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/gma500/psb_device.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/gma500/psb_device.c @@ -73,8 +73,7 @@ } psb_intel_lvds_set_brightness(dev, PSB_MAX_BRIGHTNESS); - /* This must occur after the backlight is properly initialised */ - psb_lid_timer_init(dev_priv); + return 0; } @@ -259,8 +258,6 @@ static void psb_chip_teardown(struct drm_device *dev) { - struct drm_psb_private *dev_priv = to_drm_psb_private(dev); - psb_lid_timer_takedown(dev_priv); gma_intel_teardown_gmbus(dev); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/gma500/psb_drv.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/gma500/psb_drv.h @@ -162,7 +162,6 @@ #define PSB_NUM_VBLANKS 2 #define PSB_WATCHDOG_DELAY (HZ * 2) -#define PSB_LID_DELAY (HZ / 10) #define PSB_MAX_BRIGHTNESS 100 @@ -491,11 +490,7 @@ /* Hotplug handling */ struct work_struct hotplug_work; - /* LID-Switch */ - spinlock_t lid_lock; - struct timer_list lid_timer; struct psb_intel_opregion opregion; - u32 lid_last_state; /* Watchdog */ uint32_t apm_reg; @@ -591,10 +586,6 @@ int i2c_bus; /* I2C bus identifier for Moorestown */ }; -/* psb_lid.c */ -extern void psb_lid_timer_init(struct drm_psb_private *dev_priv); -extern void psb_lid_timer_takedown(struct drm_psb_private *dev_priv); - /* modesetting */ extern void psb_modeset_init(struct drm_device *dev); extern void psb_modeset_cleanup(struct drm_device *dev); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/gma500/psb_intel_lvds.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/gma500/psb_intel_lvds.c @@ -504,6 +504,9 @@ if (mode_dev->panel_fixed_mode != NULL) { struct drm_display_mode *mode = drm_mode_duplicate(dev, mode_dev->panel_fixed_mode); + if (!mode) + return 0; + drm_mode_probed_add(connector, mode); return 1; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/Makefile +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/Makefile @@ -33,9 +33,9 @@ subdir-ccflags-$(CONFIG_DRM_I915_WERROR) += -Werror # Fine grained warnings disable -CFLAGS_i915_pci.o = $(call cc-disable-warning, override-init) -CFLAGS_display/intel_display_device.o = $(call cc-disable-warning, override-init) -CFLAGS_display/intel_fbdev.o = $(call cc-disable-warning, override-init) +CFLAGS_i915_pci.o = -Wno-override-init +CFLAGS_display/intel_display_device.o = -Wno-override-init +CFLAGS_display/intel_fbdev.o = -Wno-override-init # Support compiling the display code separately for both i915 and xe # drivers. Define I915 when building i915. @@ -118,6 +118,7 @@ gt/intel_ggtt_fencing.o \ gt/intel_gt.o \ gt/intel_gt_buffer_pool.o \ + gt/intel_gt_ccs_mode.o \ gt/intel_gt_clock_utils.o \ gt/intel_gt_debugfs.o \ gt/intel_gt_engines_debugfs.o \ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/g4x_dp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/g4x_dp.c @@ -717,7 +717,6 @@ { intel_enable_dp(state, encoder, pipe_config, conn_state); intel_edp_backlight_on(pipe_config, conn_state); - encoder->audio_enable(encoder, pipe_config, conn_state); } static void vlv_enable_dp(struct intel_atomic_state *state, @@ -726,7 +725,6 @@ const struct drm_connector_state *conn_state) { intel_edp_backlight_on(pipe_config, conn_state); - encoder->audio_enable(encoder, pipe_config, conn_state); } static void g4x_pre_enable_dp(struct intel_atomic_state *state, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/icl_dsi.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/icl_dsi.c @@ -1155,7 +1155,6 @@ } intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_INIT_OTP); - intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DISPLAY_ON); /* ensure all panel commands dispatched before enabling transcoder */ wait_for_cmds_dispatched_to_panel(encoder); @@ -1256,6 +1255,8 @@ /* step6d: enable dsi transcoder */ gen11_dsi_enable_transcoder(encoder); + intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DISPLAY_ON); + /* step7: enable backlight */ intel_backlight_enable(crtc_state, conn_state); intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_BACKLIGHT_ON); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_audio.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_audio.c @@ -76,19 +76,6 @@ struct intel_crtc_state *crtc_state); }; -/* DP N/M table */ -#define LC_810M 810000 -#define LC_540M 540000 -#define LC_270M 270000 -#define LC_162M 162000 - -struct dp_aud_n_m { - int sample_rate; - int clock; - u16 m; - u16 n; -}; - struct hdmi_aud_ncts { int sample_rate; int clock; @@ -96,60 +83,6 @@ int cts; }; -/* Values according to DP 1.4 Table 2-104 */ -static const struct dp_aud_n_m dp_aud_n_m[] = { - { 32000, LC_162M, 1024, 10125 }, - { 44100, LC_162M, 784, 5625 }, - { 48000, LC_162M, 512, 3375 }, - { 64000, LC_162M, 2048, 10125 }, - { 88200, LC_162M, 1568, 5625 }, - { 96000, LC_162M, 1024, 3375 }, - { 128000, LC_162M, 4096, 10125 }, - { 176400, LC_162M, 3136, 5625 }, - { 192000, LC_162M, 2048, 3375 }, - { 32000, LC_270M, 1024, 16875 }, - { 44100, LC_270M, 784, 9375 }, - { 48000, LC_270M, 512, 5625 }, - { 64000, LC_270M, 2048, 16875 }, - { 88200, LC_270M, 1568, 9375 }, - { 96000, LC_270M, 1024, 5625 }, - { 128000, LC_270M, 4096, 16875 }, - { 176400, LC_270M, 3136, 9375 }, - { 192000, LC_270M, 2048, 5625 }, - { 32000, LC_540M, 1024, 33750 }, - { 44100, LC_540M, 784, 18750 }, - { 48000, LC_540M, 512, 11250 }, - { 64000, LC_540M, 2048, 33750 }, - { 88200, LC_540M, 1568, 18750 }, - { 96000, LC_540M, 1024, 11250 }, - { 128000, LC_540M, 4096, 33750 }, - { 176400, LC_540M, 3136, 18750 }, - { 192000, LC_540M, 2048, 11250 }, - { 32000, LC_810M, 1024, 50625 }, - { 44100, LC_810M, 784, 28125 }, - { 48000, LC_810M, 512, 16875 }, - { 64000, LC_810M, 2048, 50625 }, - { 88200, LC_810M, 1568, 28125 }, - { 96000, LC_810M, 1024, 16875 }, - { 128000, LC_810M, 4096, 50625 }, - { 176400, LC_810M, 3136, 28125 }, - { 192000, LC_810M, 2048, 16875 }, -}; - -static const struct dp_aud_n_m * -audio_config_dp_get_n_m(const struct intel_crtc_state *crtc_state, int rate) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(dp_aud_n_m); i++) { - if (rate == dp_aud_n_m[i].sample_rate && - crtc_state->port_clock == dp_aud_n_m[i].clock) - return &dp_aud_n_m[i]; - } - - return NULL; -} - static const struct { int clock; u32 config; @@ -387,47 +320,17 @@ const struct intel_crtc_state *crtc_state) { struct drm_i915_private *i915 = to_i915(encoder->base.dev); - struct i915_audio_component *acomp = i915->display.audio.component; enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; - enum port port = encoder->port; - const struct dp_aud_n_m *nm; - int rate; - u32 tmp; - - rate = acomp ? acomp->aud_sample_rate[port] : 0; - nm = audio_config_dp_get_n_m(crtc_state, rate); - if (nm) - drm_dbg_kms(&i915->drm, "using Maud %u, Naud %u\n", nm->m, - nm->n); - else - drm_dbg_kms(&i915->drm, "using automatic Maud, Naud\n"); - - tmp = intel_de_read(i915, HSW_AUD_CFG(cpu_transcoder)); - tmp &= ~AUD_CONFIG_N_VALUE_INDEX; - tmp &= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK; - tmp &= ~AUD_CONFIG_N_PROG_ENABLE; - tmp |= AUD_CONFIG_N_VALUE_INDEX; - - if (nm) { - tmp &= ~AUD_CONFIG_N_MASK; - tmp |= AUD_CONFIG_N(nm->n); - tmp |= AUD_CONFIG_N_PROG_ENABLE; - } - - intel_de_write(i915, HSW_AUD_CFG(cpu_transcoder), tmp); - - tmp = intel_de_read(i915, HSW_AUD_M_CTS_ENABLE(cpu_transcoder)); - tmp &= ~AUD_CONFIG_M_MASK; - tmp &= ~AUD_M_CTS_M_VALUE_INDEX; - tmp &= ~AUD_M_CTS_M_PROG_ENABLE; - if (nm) { - tmp |= nm->m; - tmp |= AUD_M_CTS_M_VALUE_INDEX; - tmp |= AUD_M_CTS_M_PROG_ENABLE; - } + /* Enable time stamps. Let HW calculate Maud/Naud values */ + intel_de_rmw(i915, HSW_AUD_CFG(cpu_transcoder), + AUD_CONFIG_N_VALUE_INDEX | + AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK | + AUD_CONFIG_UPPER_N_MASK | + AUD_CONFIG_LOWER_N_MASK | + AUD_CONFIG_N_PROG_ENABLE, + AUD_CONFIG_N_VALUE_INDEX); - intel_de_write(i915, HSW_AUD_M_CTS_ENABLE(cpu_transcoder), tmp); } static void @@ -1349,17 +1252,6 @@ static void i915_audio_component_init(struct drm_i915_private *i915) { u32 aud_freq, aud_freq_init; - int ret; - - ret = component_add_typed(i915->drm.dev, - &i915_audio_component_bind_ops, - I915_COMPONENT_AUDIO); - if (ret < 0) { - drm_err(&i915->drm, - "failed to add audio component (%d)\n", ret); - /* continue with reduced functionality */ - return; - } if (DISPLAY_VER(i915) >= 9) { aud_freq_init = intel_de_read(i915, AUD_FREQ_CNTRL); @@ -1382,6 +1274,21 @@ /* init with current cdclk */ intel_audio_cdclk_change_post(i915); +} + +static void i915_audio_component_register(struct drm_i915_private *i915) +{ + int ret; + + ret = component_add_typed(i915->drm.dev, + &i915_audio_component_bind_ops, + I915_COMPONENT_AUDIO); + if (ret < 0) { + drm_err(&i915->drm, + "failed to add audio component (%d)\n", ret); + /* continue with reduced functionality */ + return; + } i915->display.audio.component_registered = true; } @@ -1414,6 +1321,12 @@ i915_audio_component_init(i915); } +void intel_audio_register(struct drm_i915_private *i915) +{ + if (!i915->display.audio.lpe.platdev) + i915_audio_component_register(i915); +} + /** * intel_audio_deinit() - deinitialize the audio driver * @i915: the i915 drm device private data --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_audio.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_audio.h @@ -28,6 +28,7 @@ void intel_audio_cdclk_change_pre(struct drm_i915_private *dev_priv); void intel_audio_cdclk_change_post(struct drm_i915_private *dev_priv); void intel_audio_init(struct drm_i915_private *dev_priv); +void intel_audio_register(struct drm_i915_private *i915); void intel_audio_deinit(struct drm_i915_private *dev_priv); void intel_audio_sdp_split_update(const struct intel_crtc_state *crtc_state); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_backlight.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_backlight.c @@ -1011,7 +1011,7 @@ { struct drm_i915_private *i915 = to_i915(connector->base.dev); - return DIV_ROUND_CLOSEST(KHz(RUNTIME_INFO(i915)->rawclk_freq), + return DIV_ROUND_CLOSEST(KHz(DISPLAY_RUNTIME_INFO(i915)->rawclk_freq), pwm_freq_hz); } @@ -1073,7 +1073,7 @@ { struct drm_i915_private *i915 = to_i915(connector->base.dev); - return DIV_ROUND_CLOSEST(KHz(RUNTIME_INFO(i915)->rawclk_freq), + return DIV_ROUND_CLOSEST(KHz(DISPLAY_RUNTIME_INFO(i915)->rawclk_freq), pwm_freq_hz * 128); } @@ -1091,7 +1091,7 @@ int clock; if (IS_PINEVIEW(i915)) - clock = KHz(RUNTIME_INFO(i915)->rawclk_freq); + clock = KHz(DISPLAY_RUNTIME_INFO(i915)->rawclk_freq); else clock = KHz(i915->display.cdclk.hw.cdclk); @@ -1109,7 +1109,7 @@ int clock; if (IS_G4X(i915)) - clock = KHz(RUNTIME_INFO(i915)->rawclk_freq); + clock = KHz(DISPLAY_RUNTIME_INFO(i915)->rawclk_freq); else clock = KHz(i915->display.cdclk.hw.cdclk); @@ -1133,7 +1133,7 @@ clock = MHz(25); mul = 16; } else { - clock = KHz(RUNTIME_INFO(i915)->rawclk_freq); + clock = KHz(DISPLAY_RUNTIME_INFO(i915)->rawclk_freq); mul = 128; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_bios.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_bios.c @@ -1042,22 +1042,11 @@ panel->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI; panel->vbt.backlight.controller = 0; if (i915->display.vbt.version >= 191) { - size_t exp_size; + const struct lfp_backlight_control_method *method; - if (i915->display.vbt.version >= 236) - exp_size = sizeof(struct bdb_lfp_backlight_data); - else if (i915->display.vbt.version >= 234) - exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_234; - else - exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_191; - - if (get_blocksize(backlight_data) >= exp_size) { - const struct lfp_backlight_control_method *method; - - method = &backlight_data->backlight_control[panel_type]; - panel->vbt.backlight.type = method->type; - panel->vbt.backlight.controller = method->controller; - } + method = &backlight_data->backlight_control[panel_type]; + panel->vbt.backlight.type = method->type; + panel->vbt.backlight.controller = method->controller; } panel->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz; @@ -1952,16 +1941,12 @@ * these devices we split the init OTP sequence into a deassert sequence and * the actual init OTP part. */ -static void fixup_mipi_sequences(struct drm_i915_private *i915, - struct intel_panel *panel) +static void vlv_fixup_mipi_sequences(struct drm_i915_private *i915, + struct intel_panel *panel) { u8 *init_otp; int len; - /* Limit this to VLV for now. */ - if (!IS_VALLEYVIEW(i915)) - return; - /* Limit this to v1 vid-mode sequences */ if (panel->vbt.dsi.config->is_cmd_mode || panel->vbt.dsi.seq_version != 1) @@ -1997,6 +1982,41 @@ panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1; } +/* + * Some machines (eg. Lenovo 82TQ) appear to have broken + * VBT sequences: + * - INIT_OTP is not present at all + * - what should be in INIT_OTP is in DISPLAY_ON + * - what should be in DISPLAY_ON is in BACKLIGHT_ON + * (along with the actual backlight stuff) + * + * To make those work we simply swap DISPLAY_ON and INIT_OTP. + * + * TODO: Do we need to limit this to specific machines, + * or examine the contents of the sequences to + * avoid false positives? + */ +static void icl_fixup_mipi_sequences(struct drm_i915_private *i915, + struct intel_panel *panel) +{ + if (!panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] && + panel->vbt.dsi.sequence[MIPI_SEQ_DISPLAY_ON]) { + drm_dbg_kms(&i915->drm, "Broken VBT: Swapping INIT_OTP and DISPLAY_ON sequences\n"); + + swap(panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP], + panel->vbt.dsi.sequence[MIPI_SEQ_DISPLAY_ON]); + } +} + +static void fixup_mipi_sequences(struct drm_i915_private *i915, + struct intel_panel *panel) +{ + if (DISPLAY_VER(i915) >= 11) + icl_fixup_mipi_sequences(i915, panel); + else if (IS_VALLEYVIEW(i915)) + vlv_fixup_mipi_sequences(i915, panel); +} + static void parse_mipi_sequence(struct drm_i915_private *i915, struct intel_panel *panel) @@ -3344,6 +3364,9 @@ { const struct child_device_config *child = &devdata->child; + if (!devdata) + return false; + if (!intel_bios_encoder_supports_dp(devdata) || !intel_bios_encoder_supports_hdmi(devdata)) return false; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_bw.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_bw.c @@ -162,7 +162,9 @@ 1); if (ret < 0) { - drm_err(&dev_priv->drm, "Failed to disable qgv points (%d) points: 0x%x\n", ret, points_mask); + drm_err(&dev_priv->drm, + "Failed to disable qgv points (0x%x) points: 0x%x\n", + ret, points_mask); return ret; } @@ -290,8 +292,10 @@ struct intel_qgv_point *sp = &qi->points[i]; ret = intel_read_qgv_point_info(dev_priv, sp, i); - if (ret) + if (ret) { + drm_dbg_kms(&dev_priv->drm, "Could not read QGV %d info\n", i); return ret; + } drm_dbg_kms(&dev_priv->drm, "QGV %d: DCLK=%d tRP=%d tRDPRE=%d tRAS=%d tRCD=%d tRC=%d\n", @@ -659,6 +663,22 @@ return bi->psf_bw[psf_gv_point]; } +static unsigned int icl_qgv_bw(struct drm_i915_private *i915, + int num_active_planes, int qgv_point) +{ + unsigned int idx; + + if (DISPLAY_VER(i915) >= 12) + idx = tgl_max_bw_index(i915, num_active_planes, qgv_point); + else + idx = icl_max_bw_index(i915, num_active_planes, qgv_point); + + if (idx >= ARRAY_SIZE(i915->display.bw.max)) + return 0; + + return i915->display.bw.max[idx].deratedbw[qgv_point]; +} + void intel_bw_init_hw(struct drm_i915_private *dev_priv) { if (!HAS_DISPLAY(dev_priv)) @@ -735,6 +755,7 @@ intel_bw_crtc_data_rate(crtc_state); bw_state->num_active_planes[crtc->pipe] = intel_bw_crtc_num_active_planes(crtc_state); + bw_state->force_check_qgv = true; drm_dbg_kms(&i915->drm, "pipe %c data rate %u num active planes %u\n", pipe_name(crtc->pipe), @@ -804,6 +825,80 @@ return to_intel_bw_state(bw_state); } +static unsigned int icl_max_bw_qgv_point_mask(struct drm_i915_private *i915, + int num_active_planes) +{ + unsigned int num_qgv_points = i915->display.bw.max[0].num_qgv_points; + unsigned int max_bw_point = 0; + unsigned int max_bw = 0; + int i; + + for (i = 0; i < num_qgv_points; i++) { + unsigned int max_data_rate = + icl_qgv_bw(i915, num_active_planes, i); + + /* + * We need to know which qgv point gives us + * maximum bandwidth in order to disable SAGV + * if we find that we exceed SAGV block time + * with watermarks. By that moment we already + * have those, as it is calculated earlier in + * intel_atomic_check, + */ + if (max_data_rate > max_bw) { + max_bw_point = BIT(i); + max_bw = max_data_rate; + } + } + + return max_bw_point; +} + +static u16 icl_prepare_qgv_points_mask(struct drm_i915_private *i915, + unsigned int qgv_points, + unsigned int psf_points) +{ + return ~(ICL_PCODE_REQ_QGV_PT(qgv_points) | + ADLS_PCODE_REQ_PSF_PT(psf_points)) & icl_qgv_points_mask(i915); +} + +static unsigned int icl_max_bw_psf_gv_point_mask(struct drm_i915_private *i915) +{ + unsigned int num_psf_gv_points = i915->display.bw.max[0].num_psf_gv_points; + unsigned int max_bw_point_mask = 0; + unsigned int max_bw = 0; + int i; + + for (i = 0; i < num_psf_gv_points; i++) { + unsigned int max_data_rate = adl_psf_bw(i915, i); + + if (max_data_rate > max_bw) { + max_bw_point_mask = BIT(i); + max_bw = max_data_rate; + } else if (max_data_rate == max_bw) { + max_bw_point_mask |= BIT(i); + } + } + + return max_bw_point_mask; +} + +static void icl_force_disable_sagv(struct drm_i915_private *i915, + struct intel_bw_state *bw_state) +{ + unsigned int qgv_points = icl_max_bw_qgv_point_mask(i915, 0); + unsigned int psf_points = icl_max_bw_psf_gv_point_mask(i915); + + bw_state->qgv_points_mask = icl_prepare_qgv_points_mask(i915, + qgv_points, + psf_points); + + drm_dbg_kms(&i915->drm, "Forcing SAGV disable: mask 0x%x\n", + bw_state->qgv_points_mask); + + icl_pcode_restrict_qgv_points(i915, bw_state->qgv_points_mask); +} + static int mtl_find_qgv_points(struct drm_i915_private *i915, unsigned int data_rate, unsigned int num_active_planes, @@ -881,8 +976,6 @@ const struct intel_bw_state *old_bw_state, struct intel_bw_state *new_bw_state) { - unsigned int max_bw_point = 0; - unsigned int max_bw = 0; unsigned int num_psf_gv_points = i915->display.bw.max[0].num_psf_gv_points; unsigned int num_qgv_points = i915->display.bw.max[0].num_qgv_points; u16 psf_points = 0; @@ -895,31 +988,8 @@ return ret; for (i = 0; i < num_qgv_points; i++) { - unsigned int idx; - unsigned int max_data_rate; - - if (DISPLAY_VER(i915) >= 12) - idx = tgl_max_bw_index(i915, num_active_planes, i); - else - idx = icl_max_bw_index(i915, num_active_planes, i); - - if (idx >= ARRAY_SIZE(i915->display.bw.max)) - continue; - - max_data_rate = i915->display.bw.max[idx].deratedbw[i]; - - /* - * We need to know which qgv point gives us - * maximum bandwidth in order to disable SAGV - * if we find that we exceed SAGV block time - * with watermarks. By that moment we already - * have those, as it is calculated earlier in - * intel_atomic_check, - */ - if (max_data_rate > max_bw) { - max_bw_point = i; - max_bw = max_data_rate; - } + unsigned int max_data_rate = icl_qgv_bw(i915, + num_active_planes, i); if (max_data_rate >= data_rate) qgv_points |= BIT(i); @@ -963,20 +1033,18 @@ * cause. */ if (!intel_can_enable_sagv(i915, new_bw_state)) { - qgv_points = BIT(max_bw_point); - drm_dbg_kms(&i915->drm, "No SAGV, using single QGV point %d\n", - max_bw_point); + qgv_points = icl_max_bw_qgv_point_mask(i915, num_active_planes); + drm_dbg_kms(&i915->drm, "No SAGV, using single QGV point mask 0x%x\n", + qgv_points); } /* * We store the ones which need to be masked as that is what PCode * actually accepts as a parameter. */ - new_bw_state->qgv_points_mask = - ~(ICL_PCODE_REQ_QGV_PT(qgv_points) | - ADLS_PCODE_REQ_PSF_PT(psf_points)) & - icl_qgv_points_mask(i915); - + new_bw_state->qgv_points_mask = icl_prepare_qgv_points_mask(i915, + qgv_points, + psf_points); /* * If the actual mask had changed we need to make sure that * the commits are serialized(in case this is a nomodeset, nonblocking) @@ -1272,8 +1340,9 @@ new_bw_state = intel_atomic_get_new_bw_state(state); if (new_bw_state && - intel_can_enable_sagv(i915, old_bw_state) != - intel_can_enable_sagv(i915, new_bw_state)) + (intel_can_enable_sagv(i915, old_bw_state) != + intel_can_enable_sagv(i915, new_bw_state) || + new_bw_state->force_check_qgv)) changed = true; /* @@ -1287,6 +1356,8 @@ if (ret) return ret; + new_bw_state->force_check_qgv = false; + return 0; } @@ -1313,7 +1384,7 @@ .atomic_destroy_state = intel_bw_destroy_state, }; -int intel_bw_init(struct drm_i915_private *dev_priv) +int intel_bw_init(struct drm_i915_private *i915) { struct intel_bw_state *state; @@ -1321,8 +1392,15 @@ if (!state) return -ENOMEM; - intel_atomic_global_obj_init(dev_priv, &dev_priv->display.bw.obj, + intel_atomic_global_obj_init(i915, &i915->display.bw.obj, &state->base, &intel_bw_funcs); + /* + * Limit this only if we have SAGV. And for Display version 14 onwards + * sagv is handled though pmdemand requests + */ + if (intel_has_sagv(i915) && IS_DISPLAY_VER(i915, 11, 13)) + icl_force_disable_sagv(i915, state); + return 0; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_bw.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_bw.h @@ -47,6 +47,12 @@ */ u16 qgv_points_mask; + /* + * Flag to force the QGV comparison in atomic check right after the + * hw state readout + */ + bool force_check_qgv; + int min_cdclk[I915_MAX_PIPES]; unsigned int data_rate[I915_MAX_PIPES]; u8 num_active_planes[I915_MAX_PIPES]; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_cdclk.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_cdclk.c @@ -2512,7 +2512,8 @@ intel_atomic_get_old_cdclk_state(state); const struct intel_cdclk_state *new_cdclk_state = intel_atomic_get_new_cdclk_state(state); - enum pipe pipe = new_cdclk_state->pipe; + struct intel_cdclk_config cdclk_config; + enum pipe pipe; if (!intel_cdclk_changed(&old_cdclk_state->actual, &new_cdclk_state->actual)) @@ -2521,12 +2522,25 @@ if (IS_DG2(i915)) intel_cdclk_pcode_pre_notify(state); - if (pipe == INVALID_PIPE || - old_cdclk_state->actual.cdclk <= new_cdclk_state->actual.cdclk) { - drm_WARN_ON(&i915->drm, !new_cdclk_state->base.changed); + if (new_cdclk_state->disable_pipes) { + cdclk_config = new_cdclk_state->actual; + pipe = INVALID_PIPE; + } else { + if (new_cdclk_state->actual.cdclk >= old_cdclk_state->actual.cdclk) { + cdclk_config = new_cdclk_state->actual; + pipe = new_cdclk_state->pipe; + } else { + cdclk_config = old_cdclk_state->actual; + pipe = INVALID_PIPE; + } - intel_set_cdclk(i915, &new_cdclk_state->actual, pipe); + cdclk_config.voltage_level = max(new_cdclk_state->actual.voltage_level, + old_cdclk_state->actual.voltage_level); } + + drm_WARN_ON(&i915->drm, !new_cdclk_state->base.changed); + + intel_set_cdclk(i915, &cdclk_config, pipe); } /** @@ -2544,7 +2558,7 @@ intel_atomic_get_old_cdclk_state(state); const struct intel_cdclk_state *new_cdclk_state = intel_atomic_get_new_cdclk_state(state); - enum pipe pipe = new_cdclk_state->pipe; + enum pipe pipe; if (!intel_cdclk_changed(&old_cdclk_state->actual, &new_cdclk_state->actual)) @@ -2553,12 +2567,15 @@ if (IS_DG2(i915)) intel_cdclk_pcode_post_notify(state); - if (pipe != INVALID_PIPE && - old_cdclk_state->actual.cdclk > new_cdclk_state->actual.cdclk) { - drm_WARN_ON(&i915->drm, !new_cdclk_state->base.changed); + if (!new_cdclk_state->disable_pipes && + new_cdclk_state->actual.cdclk < old_cdclk_state->actual.cdclk) + pipe = new_cdclk_state->pipe; + else + pipe = INVALID_PIPE; - intel_set_cdclk(i915, &new_cdclk_state->actual, pipe); - } + drm_WARN_ON(&i915->drm, !new_cdclk_state->base.changed); + + intel_set_cdclk(i915, &new_cdclk_state->actual, pipe); } static int intel_pixel_rate_to_cdclk(const struct intel_crtc_state *crtc_state) @@ -3036,6 +3053,7 @@ return NULL; cdclk_state->pipe = INVALID_PIPE; + cdclk_state->disable_pipes = false; return &cdclk_state->base; } @@ -3214,6 +3232,8 @@ if (ret) return ret; + new_cdclk_state->disable_pipes = true; + drm_dbg_kms(&dev_priv->drm, "Modeset required for cdclk change\n"); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_cdclk.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_cdclk.h @@ -51,6 +51,9 @@ /* bitmask of active pipes */ u8 active_pipes; + + /* update cdclk with pipes disabled */ + bool disable_pipes; }; int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_color.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_color.c @@ -1328,19 +1328,29 @@ lut = blob->data; /* - * DSB fails to correctly load the legacy LUT - * unless we either write each entry twice, - * or use non-posted writes + * DSB fails to correctly load the legacy LUT unless + * we either write each entry twice when using posted + * writes, or we use non-posted writes. + * + * If palette anti-collision is active during LUT + * register writes: + * - posted writes simply get dropped and thus the LUT + * contents may not be correctly updated + * - non-posted writes are blocked and thus the LUT + * contents are always correct, but simultaneous CPU + * MMIO access will start to fail + * + * Choose the lesser of two evils and use posted writes. + * Using posted writes is also faster, even when having + * to write each register twice. */ - if (crtc_state->dsb) - intel_dsb_nonpost_start(crtc_state->dsb); - - for (i = 0; i < 256; i++) + for (i = 0; i < 256; i++) { ilk_lut_write(crtc_state, LGC_PALETTE(pipe, i), i9xx_lut_8(&lut[i])); - - if (crtc_state->dsb) - intel_dsb_nonpost_end(crtc_state->dsb); + if (crtc_state->dsb) + ilk_lut_write(crtc_state, LGC_PALETTE(pipe, i), + i9xx_lut_8(&lut[i])); + } } static void ilk_load_lut_10(const struct intel_crtc_state *crtc_state, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_cursor.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_cursor.c @@ -35,12 +35,10 @@ { struct drm_i915_private *dev_priv = to_i915(plane_state->uapi.plane->dev); - const struct drm_framebuffer *fb = plane_state->hw.fb; - struct drm_i915_gem_object *obj = intel_fb_obj(fb); u32 base; if (DISPLAY_INFO(dev_priv)->cursor_needs_physical) - base = i915_gem_object_get_dma_address(obj, 0); + base = plane_state->phys_dma_addr; else base = intel_plane_ggtt_offset(plane_state); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_cx0_phy.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_cx0_phy.c @@ -1892,14 +1892,6 @@ 0, C10_VDR_CTRL_MSGBUS_ACCESS, MB_WRITE_COMMITTED); - /* Custom width needs to be programmed to 0 for both the phy lanes */ - intel_cx0_rmw(i915, encoder->port, INTEL_CX0_BOTH_LANES, PHY_C10_VDR_CUSTOM_WIDTH, - C10_VDR_CUSTOM_WIDTH_MASK, C10_VDR_CUSTOM_WIDTH_8_10, - MB_WRITE_COMMITTED); - intel_cx0_rmw(i915, encoder->port, INTEL_CX0_BOTH_LANES, PHY_C10_VDR_CONTROL(1), - 0, C10_VDR_CTRL_UPDATE_CFG, - MB_WRITE_COMMITTED); - /* Program the pll values only for the master lane */ for (i = 0; i < ARRAY_SIZE(pll_state->pll); i++) intel_cx0_write(i915, encoder->port, INTEL_CX0_LANE0, PHY_C10_VDR_PLL(i), @@ -1909,6 +1901,10 @@ intel_cx0_write(i915, encoder->port, INTEL_CX0_LANE0, PHY_C10_VDR_CMN(0), pll_state->cmn, MB_WRITE_COMMITTED); intel_cx0_write(i915, encoder->port, INTEL_CX0_LANE0, PHY_C10_VDR_TX(0), pll_state->tx, MB_WRITE_COMMITTED); + /* Custom width needs to be programmed to 0 for both the phy lanes */ + intel_cx0_rmw(i915, encoder->port, INTEL_CX0_BOTH_LANES, PHY_C10_VDR_CUSTOM_WIDTH, + C10_VDR_CUSTOM_WIDTH_MASK, C10_VDR_CUSTOM_WIDTH_8_10, + MB_WRITE_COMMITTED); intel_cx0_rmw(i915, encoder->port, INTEL_CX0_LANE0, PHY_C10_VDR_CONTROL(1), 0, C10_VDR_CTRL_MASTER_LANE | C10_VDR_CTRL_UPDATE_CFG, MB_WRITE_COMMITTED); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_ddi.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_ddi.c @@ -907,7 +907,7 @@ * instead of a specific AUX_IO_ reference without powering up any * extra wells. */ - if (intel_encoder_can_psr(&dig_port->base)) + if (intel_psr_needs_aux_io_power(&dig_port->base, crtc_state)) return intel_display_power_aux_io_domain(i915, dig_port->aux_ch); else if (DISPLAY_VER(i915) < 14 && (intel_crtc_has_dp_encoder(crtc_state) || @@ -4229,7 +4229,12 @@ static bool crtcs_port_sync_compatible(const struct intel_crtc_state *crtc_state1, const struct intel_crtc_state *crtc_state2) { + /* + * FIXME the modeset sequence is currently wrong and + * can't deal with bigjoiner + port sync at the same time. + */ return crtc_state1->hw.active && crtc_state2->hw.active && + !crtc_state1->bigjoiner_pipes && !crtc_state2->bigjoiner_pipes && crtc_state1->output_types == crtc_state2->output_types && crtc_state1->output_format == crtc_state2->output_format && crtc_state1->lane_count == crtc_state2->lane_count && --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_display.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_display.c @@ -6153,12 +6153,30 @@ static int intel_bigjoiner_add_affected_crtcs(struct intel_atomic_state *state) { struct drm_i915_private *i915 = to_i915(state->base.dev); + const struct intel_plane_state *plane_state; struct intel_crtc_state *crtc_state; + struct intel_plane *plane; struct intel_crtc *crtc; u8 affected_pipes = 0; u8 modeset_pipes = 0; int i; + /* + * Any plane which is in use by the joiner needs its crtc. + * Pull those in first as this will not have happened yet + * if the plane remains disabled according to uapi. + */ + for_each_new_intel_plane_in_state(state, plane, plane_state, i) { + crtc = to_intel_crtc(plane_state->hw.crtc); + if (!crtc) + continue; + + crtc_state = intel_atomic_get_crtc_state(&state->base, crtc); + if (IS_ERR(crtc_state)) + return PTR_ERR(crtc_state); + } + + /* Now pull in all joined crtcs */ for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { affected_pipes |= crtc_state->bigjoiner_pipes; if (intel_crtc_needs_modeset(crtc_state)) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_display_core.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_display_core.h @@ -271,6 +271,9 @@ }; struct intel_display { + /* drm device backpointer */ + struct drm_device *drm; + /* Display functions */ struct { /* Top level crtc-ish functions */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_display_device.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_display_device.c @@ -922,6 +922,9 @@ const struct intel_display_device_info *info; u16 ver, rel, step; + /* Add drm device backpointer as early as possible. */ + i915->display.drm = &i915->drm; + if (HAS_GMD_ID(i915)) info = probe_gmdid_display(i915, &ver, &rel, &step); else @@ -1095,6 +1098,9 @@ } } + display_runtime->rawclk_freq = intel_read_rawclk(i915); + drm_dbg_kms(&i915->drm, "rawclk rate: %d kHz\n", display_runtime->rawclk_freq); + return; display_fused_off: @@ -1137,6 +1143,8 @@ drm_printf(p, "has_hdcp: %s\n", str_yes_no(runtime->has_hdcp)); drm_printf(p, "has_dmc: %s\n", str_yes_no(runtime->has_dmc)); drm_printf(p, "has_dsc: %s\n", str_yes_no(runtime->has_dsc)); + + drm_printf(p, "rawclk rate: %u kHz\n", runtime->rawclk_freq); } /* --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_display_device.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_display_device.h @@ -47,6 +47,7 @@ #define HAS_DPT(i915) (DISPLAY_VER(i915) >= 13) #define HAS_DSB(i915) (DISPLAY_INFO(i915)->has_dsb) #define HAS_DSC(__i915) (DISPLAY_RUNTIME_INFO(__i915)->has_dsc) +#define HAS_DSC_MST(__i915) (DISPLAY_VER(__i915) >= 12 && HAS_DSC(__i915)) #define HAS_FBC(i915) (DISPLAY_RUNTIME_INFO(i915)->fbc_mask != 0) #define HAS_FPGA_DBG_UNCLAIMED(i915) (DISPLAY_INFO(i915)->has_fpga_dbg) #define HAS_FW_BLC(i915) (DISPLAY_VER(i915) >= 3) @@ -114,6 +115,8 @@ u16 step; } ip; + u32 rawclk_freq; + u8 pipe_mask; u8 cpu_transcoder_mask; u16 port_mask; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_display_driver.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_display_driver.c @@ -394,6 +394,8 @@ intel_audio_init(i915); + intel_audio_register(i915); + intel_display_debugfs_register(i915); /* --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_display_power.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_display_power.c @@ -1706,6 +1706,14 @@ /* Wa_14011503030:xelpd */ if (DISPLAY_VER(dev_priv) == 13) intel_de_write(dev_priv, XELPD_DISPLAY_ERR_FATAL_MASK, ~0); + + /* Wa_15013987218 */ + if (DISPLAY_VER(dev_priv) == 20) { + intel_de_rmw(dev_priv, SOUTH_DSPCLK_GATE_D, + 0, PCH_GMBUSUNIT_CLOCK_GATE_DISABLE); + intel_de_rmw(dev_priv, SOUTH_DSPCLK_GATE_D, + PCH_GMBUSUNIT_CLOCK_GATE_DISABLE, 0); + } } static void icl_display_core_uninit(struct drm_i915_private *dev_priv) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_display_power_well.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_display_power_well.c @@ -1174,9 +1174,9 @@ MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE); intel_de_write(dev_priv, CBR1_VLV, 0); - drm_WARN_ON(&dev_priv->drm, RUNTIME_INFO(dev_priv)->rawclk_freq == 0); + drm_WARN_ON(&dev_priv->drm, DISPLAY_RUNTIME_INFO(dev_priv)->rawclk_freq == 0); intel_de_write(dev_priv, RAWCLK_FREQ_VLV, - DIV_ROUND_CLOSEST(RUNTIME_INFO(dev_priv)->rawclk_freq, + DIV_ROUND_CLOSEST(DISPLAY_RUNTIME_INFO(dev_priv)->rawclk_freq, 1000)); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_display_trace.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_display_trace.h @@ -411,7 +411,7 @@ struct intel_crtc *crtc = intel_crtc_for_pipe(to_i915(plane->base.dev), plane->pipe); __assign_str(dev, __dev_name_kms(plane)); - __assign_str(name, plane->base.name) + __assign_str(name, plane->base.name); __entry->pipe = crtc->pipe; __entry->frame = intel_crtc_get_vblank_counter(crtc); __entry->scanline = intel_get_crtc_scanline(crtc); @@ -438,7 +438,7 @@ struct intel_crtc *crtc = intel_crtc_for_pipe(to_i915(plane->base.dev), plane->pipe); __assign_str(dev, __dev_name_kms(plane)); - __assign_str(name, plane->base.name) + __assign_str(name, plane->base.name); __entry->pipe = crtc->pipe; __entry->frame = intel_crtc_get_vblank_counter(crtc); __entry->scanline = intel_get_crtc_scanline(crtc); @@ -465,7 +465,7 @@ struct intel_crtc *crtc = intel_crtc_for_pipe(to_i915(plane->base.dev), plane->pipe); __assign_str(dev, __dev_name_kms(plane)); - __assign_str(name, plane->base.name) + __assign_str(name, plane->base.name); __entry->pipe = crtc->pipe; __entry->frame = intel_crtc_get_vblank_counter(crtc); __entry->scanline = intel_get_crtc_scanline(crtc); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_display_types.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_display_types.h @@ -719,6 +719,7 @@ #define PLANE_HAS_FENCE BIT(0) struct intel_fb_view view; + u32 phys_dma_addr; /* for cursor_needs_physical */ /* Plane pxp decryption state */ bool decrypt; @@ -1715,8 +1716,15 @@ bool psr2_sel_fetch_cff_enabled; bool req_psr2_sdp_prior_scanline; u8 sink_sync_latency; - u8 io_wake_lines; - u8 fast_wake_lines; + + struct { + u8 io_wake_lines; + u8 fast_wake_lines; + + /* LNL and beyond */ + u8 check_entry_lines; + } alpm_parameters; + ktime_t last_entry_attempt; ktime_t last_exit; bool sink_not_reliable; @@ -1840,6 +1848,10 @@ /* When we last wrote the OUI for eDP */ unsigned long last_oui_write; + + struct { + unsigned long mask; + } quirks; }; enum lspcon_vendor { @@ -2153,4 +2165,41 @@ return bpp << 4; } +/* + * Conversion functions/macros from various pointer types to struct + * intel_display pointer. + */ +#define __drm_device_to_intel_display(p) \ + (&to_i915(p)->display) +#define __intel_connector_to_intel_display(p) \ + __drm_device_to_intel_display((p)->base.dev) +#define __intel_crtc_to_intel_display(p) \ + __drm_device_to_intel_display((p)->base.dev) +#define __intel_crtc_state_to_intel_display(p) \ + __drm_device_to_intel_display((p)->uapi.crtc->dev) +#define __intel_digital_port_to_intel_display(p) \ + __drm_device_to_intel_display((p)->base.base.dev) +#define __intel_dp_to_intel_display(p) \ + __drm_device_to_intel_display(dp_to_dig_port(p)->base.base.dev) +#define __intel_encoder_to_intel_display(p) \ + __drm_device_to_intel_display((p)->base.dev) +#define __intel_hdmi_to_intel_display(p) \ + __drm_device_to_intel_display(hdmi_to_dig_port(p)->base.base.dev) + +/* Helper for generic association. Map types to conversion functions/macros. */ +#define __assoc(type, p) \ + struct type: __##type##_to_intel_display((struct type *)(p)) + +/* Convert various pointer types to struct intel_display pointer. */ +#define to_intel_display(p) \ + _Generic(*p, \ + __assoc(drm_device, p), \ + __assoc(intel_connector, p), \ + __assoc(intel_crtc, p), \ + __assoc(intel_crtc_state, p), \ + __assoc(intel_digital_port, p), \ + __assoc(intel_dp, p), \ + __assoc(intel_encoder, p), \ + __assoc(intel_hdmi, p)) + #endif /* __INTEL_DISPLAY_TYPES_H__ */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_dp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_dp.c @@ -75,6 +75,7 @@ #include "intel_pch_display.h" #include "intel_pps.h" #include "intel_psr.h" +#include "intel_quirks.h" #include "intel_tc.h" #include "intel_vdsc.h" #include "intel_vrr.h" @@ -434,6 +435,10 @@ struct intel_encoder *encoder = &intel_dig_port->base; struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); + /* eDP MSO is not compatible with joiner */ + if (intel_dp->mso_link_count) + return false; + return DISPLAY_VER(dev_priv) >= 12 || (DISPLAY_VER(dev_priv) == 11 && encoder->port != PORT_A); @@ -1422,7 +1427,8 @@ if (DISPLAY_VER(dev_priv) >= 12) return true; - if (DISPLAY_VER(dev_priv) == 11 && encoder->port != PORT_A) + if (DISPLAY_VER(dev_priv) == 11 && encoder->port != PORT_A && + !intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST)) return true; return false; @@ -1914,10 +1920,10 @@ /* Compressed BPP should be less than the Input DSC bpp */ dsc_max_bpp = min(dsc_max_bpp, pipe_bpp - 1); - for (i = 0; i < ARRAY_SIZE(valid_dsc_bpp); i++) { + for (i = ARRAY_SIZE(valid_dsc_bpp) - 1; i >= 0; i--) { if (valid_dsc_bpp[i] < dsc_min_bpp || valid_dsc_bpp[i] > dsc_max_bpp) - break; + continue; ret = dsc_compute_link_config(intel_dp, pipe_config, @@ -2754,7 +2760,11 @@ intel_panel_downclock_mode(connector, &pipe_config->hw.adjusted_mode); int pixel_clock; - if (has_seamless_m_n(connector)) + /* + * FIXME all joined pipes share the same transcoder. + * Need to account for that when updating M/N live. + */ + if (has_seamless_m_n(connector) && !pipe_config->bigjoiner_pipes) pipe_config->update_m_n = true; if (!can_enable_drrs(connector, pipe_config, downclock_mode)) { @@ -3896,6 +3906,7 @@ drm_dp_read_desc(&intel_dp->aux, &intel_dp->desc, drm_dp_is_branch(intel_dp->dpcd)); + intel_init_dpcd_quirks(intel_dp, &intel_dp->desc.ident); /* * Read the eDP display control registers. @@ -4001,6 +4012,8 @@ drm_dp_read_desc(&intel_dp->aux, &intel_dp->desc, drm_dp_is_branch(intel_dp->dpcd)); + intel_init_dpcd_quirks(intel_dp, &intel_dp->desc.ident); + intel_dp_set_sink_rates(intel_dp); intel_dp_set_max_sink_lane_count(intel_dp); intel_dp_set_common_rates(intel_dp); @@ -4325,8 +4338,11 @@ if (!enable && HAS_DSC(dev_priv)) val &= ~VDIP_ENABLE_PPS; - /* When PSR is enabled, this routine doesn't disable VSC DIP */ - if (!crtc_state->has_psr) + /* + * This routine disables VSC DIP if the function is called + * to disable SDP or if it does not have PSR + */ + if (!enable || !crtc_state->has_psr) val &= ~VIDEO_DIP_ENABLE_VSC_HSW; intel_de_write(dev_priv, reg, val); @@ -5145,6 +5161,8 @@ !intel_dp_mst_is_master_trans(crtc_state)) continue; + intel_dp->link_trained = false; + intel_dp_check_frl_training(intel_dp); intel_dp_pcon_dsc_configure(intel_dp, crtc_state); intel_dp_start_link_train(intel_dp, crtc_state); @@ -5498,6 +5516,17 @@ return drm_edid_read_ddc(&connector->base, &intel_dp->aux.ddc); } +const struct edid * +intel_dp_fetch_edid(struct intel_dp *intel_dp) +{ + const struct drm_edid * d_edid; + d_edid = intel_dp_get_edid(intel_dp); + if (d_edid) + return drm_edid_raw(d_edid); + + return NULL; +} + static void intel_dp_update_dfp(struct intel_dp *intel_dp, const struct drm_edid *drm_edid) @@ -5681,6 +5710,18 @@ else status = connector_status_disconnected; + if (status != connector_status_disconnected && + !intel_dp_mst_verify_dpcd_state(intel_dp)) + /* + * This requires retrying detection for instance to re-enable + * the MST mode that got reset via a long HPD pulse. The retry + * will happen either via the hotplug handler's retry logic, + * ensured by setting the connector here to SST/disconnected, + * or via a userspace connector probing in response to the + * hotplug uevent sent when removing the MST connectors. + */ + status = connector_status_disconnected; + if (status == connector_status_disconnected) { memset(&intel_dp->compliance, 0, sizeof(intel_dp->compliance)); memset(intel_connector->dp.dsc_dpcd, 0, sizeof(intel_connector->dp.dsc_dpcd)); @@ -6523,6 +6564,7 @@ intel_connector->get_hw_state = intel_ddi_connector_get_hw_state; else intel_connector->get_hw_state = intel_connector_get_hw_state; + intel_connector->sync_state = intel_dp_connector_sync_state; if (!intel_edp_init_connector(intel_dp, intel_connector)) { intel_dp_aux_fini(intel_dp); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_dp.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_dp.h @@ -187,4 +187,6 @@ void intel_dp_get_dsc_sink_cap(u8 dpcd_rev, struct intel_connector *connector); +const struct edid *intel_dp_fetch_edid(struct intel_dp *intel_dp); + #endif /* __INTEL_DP_H__ */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_dp_aux.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_dp_aux.c @@ -12,6 +12,7 @@ #include "intel_dp_aux.h" #include "intel_dp_aux_regs.h" #include "intel_pps.h" +#include "intel_quirks.h" #include "intel_tc.h" #define AUX_CH_NAME_BUFSIZE 6 @@ -83,7 +84,7 @@ * The clock divider is based off the hrawclk, and would like to run at * 2MHz. So, take the hrawclk value and divide by 2000 and use that */ - return DIV_ROUND_CLOSEST(RUNTIME_INFO(i915)->rawclk_freq, 2000); + return DIV_ROUND_CLOSEST(DISPLAY_RUNTIME_INFO(i915)->rawclk_freq, 2000); } static u32 ilk_get_aux_clock_divider(struct intel_dp *intel_dp, int index) @@ -103,7 +104,7 @@ if (dig_port->aux_ch == AUX_CH_A) freq = i915->display.cdclk.hw.cdclk; else - freq = RUNTIME_INFO(i915)->rawclk_freq; + freq = DISPLAY_RUNTIME_INFO(i915)->rawclk_freq; return DIV_ROUND_CLOSEST(freq, 2000); } @@ -142,11 +143,22 @@ return precharge + preamble; } -static int intel_dp_aux_fw_sync_len(void) +int intel_dp_aux_fw_sync_len(struct intel_dp *intel_dp) { int precharge = 10; /* 10-16 */ int preamble = 8; + /* + * We faced some glitches on Dell Precision 5490 MTL laptop with panel: + * "Manufacturer: AUO, Model: 63898" when using HW default 18. Using 20 + * is fixing these problems with the panel. It is still within range + * mentioned in eDP specification. Increasing Fast Wake sync length is + * causing problems with other panels: increase length as a quirk for + * this specific laptop. + */ + if (intel_has_dpcd_quirk(intel_dp, QUIRK_FW_SYNC_LEN)) + precharge += 2; + return precharge + preamble; } @@ -205,7 +217,7 @@ DP_AUX_CH_CTL_TIME_OUT_MAX | DP_AUX_CH_CTL_RECEIVE_ERROR | DP_AUX_CH_CTL_MESSAGE_SIZE(send_bytes) | - DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL(intel_dp_aux_fw_sync_len()) | + DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL(intel_dp_aux_fw_sync_len(intel_dp)) | DP_AUX_CH_CTL_SYNC_PULSE_SKL(intel_dp_aux_sync_len()); if (intel_tc_port_in_tbt_alt_mode(dig_port)) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_dp_aux.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_dp_aux.h @@ -20,5 +20,6 @@ void intel_dp_aux_irq_handler(struct drm_i915_private *i915); u32 intel_dp_aux_pack(const u8 *src, int src_bytes); +int intel_dp_aux_fw_sync_len(struct intel_dp *intel_dp); #endif /* __INTEL_DP_AUX_H__ */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_dp_hdcp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_dp_hdcp.c @@ -637,12 +637,18 @@ int intel_dp_hdcp2_capable(struct intel_connector *connector, bool *capable) { - struct intel_digital_port *dig_port = intel_attached_dig_port(connector); - struct drm_dp_aux *aux = &dig_port->dp.aux; + struct intel_digital_port *dig_port; + struct drm_dp_aux *aux; u8 rx_caps[3]; int ret; *capable = false; + if (!intel_attached_encoder(connector)) + return -EINVAL; + + dig_port = intel_attached_dig_port(connector); + aux = &dig_port->dp.aux; + ret = drm_dp_dpcd_read(aux, DP_HDCP_2_2_REG_RX_CAPS_OFFSET, rx_caps, HDCP_2_2_RXCAPS_LEN); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_dp_link_training.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_dp_link_training.c @@ -114,10 +114,24 @@ return drm_dp_dpcd_write(&intel_dp->aux, DP_PHY_REPEATER_MODE, &val, 1) == 1; } -static int intel_dp_init_lttpr(struct intel_dp *intel_dp, const u8 dpcd[DP_RECEIVER_CAP_SIZE]) +static bool intel_dp_lttpr_transparent_mode_enabled(struct intel_dp *intel_dp) +{ + return intel_dp->lttpr_common_caps[DP_PHY_REPEATER_MODE - + DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV] == + DP_PHY_REPEATER_MODE_TRANSPARENT; +} + +/* + * Read the LTTPR common capabilities and switch the LTTPR PHYs to + * non-transparent mode if this is supported. Preserve the + * transparent/non-transparent mode on an active link. + * + * Return the number of detected LTTPRs in non-transparent mode or 0 if the + * LTTPRs are in transparent mode or the detection failed. + */ +static int intel_dp_init_lttpr_phys(struct intel_dp *intel_dp, const u8 dpcd[DP_RECEIVER_CAP_SIZE]) { int lttpr_count; - int i; if (!intel_dp_read_lttpr_common_caps(intel_dp, dpcd)) return 0; @@ -132,6 +146,19 @@ return 0; /* + * Don't change the mode on an active link, to prevent a loss of link + * synchronization. See DP Standard v2.0 3.6.7. about the LTTPR + * resetting its internal state when the mode is changed from + * non-transparent to transparent. + */ + if (intel_dp->link_trained) { + if (lttpr_count < 0 || intel_dp_lttpr_transparent_mode_enabled(intel_dp)) + goto out_reset_lttpr_count; + + return lttpr_count; + } + + /* * See DP Standard v2.0 3.6.6.1. about the explicit disabling of * non-transparent mode and the disable->enable non-transparent mode * sequence. @@ -151,11 +178,25 @@ "Switching to LTTPR non-transparent LT mode failed, fall-back to transparent mode\n"); intel_dp_set_lttpr_transparent_mode(intel_dp, true); - intel_dp_reset_lttpr_count(intel_dp); - return 0; + goto out_reset_lttpr_count; } + return lttpr_count; + +out_reset_lttpr_count: + intel_dp_reset_lttpr_count(intel_dp); + + return 0; +} + +static int intel_dp_init_lttpr(struct intel_dp *intel_dp, const u8 dpcd[DP_RECEIVER_CAP_SIZE]) +{ + int lttpr_count; + int i; + + lttpr_count = intel_dp_init_lttpr_phys(intel_dp, dpcd); + for (i = 0; i < lttpr_count; i++) intel_dp_read_lttpr_phy_caps(intel_dp, dpcd, DP_PHY_LTTPR(i)); @@ -1323,7 +1364,7 @@ if (wait_for(intel_dp_128b132b_intra_hop(intel_dp, crtc_state) == 0, 500)) { lt_err(intel_dp, DP_PHY_DPRX, "128b/132b intra-hop not clear\n"); - return false; + goto out; } if (intel_dp_128b132b_lane_eq(intel_dp, crtc_state) && @@ -1335,6 +1376,19 @@ passed ? "passed" : "failed", crtc_state->port_clock, crtc_state->lane_count); +out: + /* + * Ensure that the training pattern does get set to TPS2 even in case + * of a failure, as is the case at the end of a passing link training + * and what is expected by the transcoder. Leaving TPS1 set (and + * disabling the link train mode in DP_TP_CTL later from TPS1 directly) + * would result in a stuck transcoder HW state and flip-done timeouts + * later in the modeset sequence. + */ + if (!passed) + intel_dp_program_link_training_pattern(intel_dp, crtc_state, + DP_PHY_DPRX, DP_TRAINING_PATTERN_2); + return passed; } @@ -1353,10 +1407,10 @@ { struct drm_i915_private *i915 = dp_to_i915(intel_dp); bool passed; - /* - * TODO: Reiniting LTTPRs here won't be needed once proper connector - * HW state readout is added. + * Reinit the LTTPRs here to ensure that they are switched to + * non-transparent mode. During an earlier LTTPR detection this + * could've been prevented by an active link. */ int lttpr_count = intel_dp_init_lttpr_and_dprx_caps(intel_dp); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -72,26 +72,19 @@ static int intel_dp_mst_bw_overhead(const struct intel_crtc_state *crtc_state, const struct intel_connector *connector, - bool ssc, bool dsc, int bpp_x16) + bool ssc, int dsc_slice_count, int bpp_x16) { const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; unsigned long flags = DRM_DP_BW_OVERHEAD_MST; - int dsc_slice_count = 0; int overhead; flags |= intel_dp_is_uhbr(crtc_state) ? DRM_DP_BW_OVERHEAD_UHBR : 0; flags |= ssc ? DRM_DP_BW_OVERHEAD_SSC_REF_CLK : 0; flags |= crtc_state->fec_enable ? DRM_DP_BW_OVERHEAD_FEC : 0; - if (dsc) { + if (dsc_slice_count) flags |= DRM_DP_BW_OVERHEAD_DSC; - /* TODO: add support for bigjoiner */ - dsc_slice_count = intel_dp_dsc_get_slice_count(connector, - adjusted_mode->clock, - adjusted_mode->hdisplay, - false); - } overhead = drm_dp_bw_overhead(crtc_state->lane_count, adjusted_mode->hdisplay, @@ -137,6 +130,19 @@ return DIV_ROUND_UP(effective_data_rate * 64, 54 * 1000); } +static int intel_dp_mst_dsc_get_slice_count(const struct intel_connector *connector, + const struct intel_crtc_state *crtc_state) +{ + const struct drm_display_mode *adjusted_mode = + &crtc_state->hw.adjusted_mode; + + /* TODO: add support for bigjoiner */ + return intel_dp_dsc_get_slice_count(connector, + adjusted_mode->clock, + adjusted_mode->hdisplay, + false); +} + static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder, struct intel_crtc_state *crtc_state, int max_bpp, @@ -156,6 +162,7 @@ const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; int bpp, slots = -EINVAL; + int dsc_slice_count = 0; int ret = 0; mst_state = drm_atomic_get_mst_topology_state(state, &intel_dp->mst_mgr); @@ -179,6 +186,15 @@ drm_dbg_kms(&i915->drm, "Looking for slots in range min bpp %d max bpp %d\n", min_bpp, max_bpp); + if (dsc) { + dsc_slice_count = intel_dp_mst_dsc_get_slice_count(connector, crtc_state); + if (!dsc_slice_count) { + drm_dbg_kms(&i915->drm, "Can't get valid DSC slice count\n"); + + return -ENOSPC; + } + } + for (bpp = max_bpp; bpp >= min_bpp; bpp -= step) { int local_bw_overhead; int remote_bw_overhead; @@ -195,9 +211,9 @@ intel_dp_output_bpp(crtc_state->output_format, bpp)); local_bw_overhead = intel_dp_mst_bw_overhead(crtc_state, connector, - false, dsc, link_bpp_x16); + false, dsc_slice_count, link_bpp_x16); remote_bw_overhead = intel_dp_mst_bw_overhead(crtc_state, connector, - true, dsc, link_bpp_x16); + true, dsc_slice_count, link_bpp_x16); intel_dp_mst_compute_m_n(crtc_state, connector, local_bw_overhead, @@ -413,6 +429,9 @@ if (mode_hblank_period_ns(adjusted_mode) > 300) return false; + if (!intel_dp_mst_dsc_get_slice_count(connector, crtc_state)) + return false; + return true; } @@ -1148,7 +1167,7 @@ if (first_mst_stream) intel_ddi_wait_for_fec_status(encoder, pipe_config, true); - drm_dp_add_payload_part2(&intel_dp->mst_mgr, &state->base, + drm_dp_add_payload_part2(&intel_dp->mst_mgr, drm_atomic_get_mst_payload_state(mst_state, connector->port)); if (DISPLAY_VER(dev_priv) >= 12) @@ -1338,7 +1357,7 @@ return 0; } - if (DISPLAY_VER(dev_priv) >= 10 && + if (HAS_DSC_MST(dev_priv) && drm_dp_sink_supports_dsc(intel_connector->dp.dsc_dpcd)) { /* * TBD pass the connector BPC, @@ -1872,3 +1891,43 @@ return false; } + +/* + * intel_dp_mst_verify_dpcd_state - verify the MST SW enabled state wrt. the DPCD + * @intel_dp: DP port object + * + * Verify if @intel_dp's MST enabled SW state matches the corresponding DPCD + * state. A long HPD pulse - not long enough to be detected as a disconnected + * state - could've reset the DPCD state, which requires tearing + * down/recreating the MST topology. + * + * Returns %true if the SW MST enabled and DPCD states match, %false + * otherwise. + */ +bool intel_dp_mst_verify_dpcd_state(struct intel_dp *intel_dp) +{ + struct intel_display *display = to_intel_display(intel_dp); + struct intel_connector *connector = intel_dp->attached_connector; + struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); + struct intel_encoder *encoder = &dig_port->base; + int ret; + u8 val; + + if (!intel_dp->is_mst) + return true; + + ret = drm_dp_dpcd_readb(intel_dp->mst_mgr.aux, DP_MSTM_CTRL, &val); + + /* Adjust the expected register value for SST + SideBand. */ + if (ret < 0 || val != (DP_MST_EN | DP_UP_REQ_EN | DP_UPSTREAM_IS_SRC)) { + drm_dbg_kms(display->drm, + "[CONNECTOR:%d:%s][ENCODER:%d:%s] MST mode got reset, removing topology (ret=%d, ctrl=0x%02x)\n", + connector->base.base.id, connector->base.name, + encoder->base.base.id, encoder->base.name, + ret, val); + + return false; + } + + return true; +} --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_dp_mst.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_dp_mst.h @@ -27,5 +27,6 @@ struct intel_link_bw_limits *limits); bool intel_dp_mst_crtc_needs_modeset(struct intel_atomic_state *state, struct intel_crtc *crtc); +bool intel_dp_mst_verify_dpcd_state(struct intel_dp *intel_dp); #endif /* __INTEL_DP_MST_H__ */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_dpll_mgr.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_dpll_mgr.c @@ -1602,7 +1602,7 @@ } static int -skl_ddi_calculate_wrpll(int clock /* in Hz */, +skl_ddi_calculate_wrpll(int clock, int ref_clock, struct skl_wrpll_params *wrpll_params) { @@ -1627,7 +1627,7 @@ }; unsigned int dco, d, i; unsigned int p0, p1, p2; - u64 afe_clock = clock * 5; /* AFE Clock is 5x Pixel clock */ + u64 afe_clock = (u64)clock * 1000 * 5; /* AFE Clock is 5x Pixel clock, in Hz */ for (d = 0; d < ARRAY_SIZE(dividers); d++) { for (dco = 0; dco < ARRAY_SIZE(dco_central_freq); dco++) { @@ -1759,7 +1759,7 @@ ctrl1 |= DPLL_CTRL1_HDMI_MODE(0); - ret = skl_ddi_calculate_wrpll(crtc_state->port_clock * 1000, + ret = skl_ddi_calculate_wrpll(crtc_state->port_clock, i915->display.dpll.ref_clks.nssc, &wrpll_params); if (ret) return ret; @@ -2509,7 +2509,7 @@ static bool ehl_combo_pll_div_frac_wa_needed(struct drm_i915_private *i915) { - return (((IS_ELKHARTLAKE(i915) || IS_JASPERLAKE(i915)) && + return ((IS_ELKHARTLAKE(i915) && IS_DISPLAY_STEP(i915, STEP_B0, STEP_FOREVER)) || IS_TIGERLAKE(i915) || IS_ALDERLAKE_S(i915) || IS_ALDERLAKE_P(i915)) && i915->display.dpll.ref_clks.nssc == 38400; @@ -3308,6 +3308,8 @@ struct drm_i915_private *i915 = to_i915(state->base.dev); struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc); + const struct intel_crtc_state *old_crtc_state = + intel_atomic_get_old_crtc_state(state, crtc); struct icl_port_dpll *port_dpll = &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT]; struct skl_wrpll_params pll_params = {}; @@ -3326,7 +3328,11 @@ return ret; /* this is mainly for the fastset check */ - icl_set_active_port_dpll(crtc_state, ICL_PORT_DPLL_MG_PHY); + if (old_crtc_state->shared_dpll && + old_crtc_state->shared_dpll->info->id == DPLL_ID_ICL_TBTPLL) + icl_set_active_port_dpll(crtc_state, ICL_PORT_DPLL_DEFAULT); + else + icl_set_active_port_dpll(crtc_state, ICL_PORT_DPLL_MG_PHY); crtc_state->port_clock = icl_ddi_mg_pll_get_freq(i915, NULL, &port_dpll->hw_state); @@ -4023,7 +4029,8 @@ static const struct dpll_info icl_plls[] = { { .name = "DPLL 0", .funcs = &combo_pll_funcs, .id = DPLL_ID_ICL_DPLL0, }, { .name = "DPLL 1", .funcs = &combo_pll_funcs, .id = DPLL_ID_ICL_DPLL1, }, - { .name = "TBT PLL", .funcs = &tbt_pll_funcs, .id = DPLL_ID_ICL_TBTPLL, }, + { .name = "TBT PLL", .funcs = &tbt_pll_funcs, .id = DPLL_ID_ICL_TBTPLL, + .flags = INTEL_DPLL_IS_ALT_PORT_DPLL, }, { .name = "MG PLL 1", .funcs = &mg_pll_funcs, .id = DPLL_ID_ICL_MGPLL1, }, { .name = "MG PLL 2", .funcs = &mg_pll_funcs, .id = DPLL_ID_ICL_MGPLL2, }, { .name = "MG PLL 3", .funcs = &mg_pll_funcs, .id = DPLL_ID_ICL_MGPLL3, }, @@ -4068,7 +4075,8 @@ static const struct dpll_info tgl_plls[] = { { .name = "DPLL 0", .funcs = &combo_pll_funcs, .id = DPLL_ID_ICL_DPLL0, }, { .name = "DPLL 1", .funcs = &combo_pll_funcs, .id = DPLL_ID_ICL_DPLL1, }, - { .name = "TBT PLL", .funcs = &tbt_pll_funcs, .id = DPLL_ID_ICL_TBTPLL, }, + { .name = "TBT PLL", .funcs = &tbt_pll_funcs, .id = DPLL_ID_ICL_TBTPLL, + .flags = INTEL_DPLL_IS_ALT_PORT_DPLL, }, { .name = "TC PLL 1", .funcs = &dkl_pll_funcs, .id = DPLL_ID_ICL_MGPLL1, }, { .name = "TC PLL 2", .funcs = &dkl_pll_funcs, .id = DPLL_ID_ICL_MGPLL2, }, { .name = "TC PLL 3", .funcs = &dkl_pll_funcs, .id = DPLL_ID_ICL_MGPLL3, }, @@ -4141,7 +4149,8 @@ static const struct dpll_info adlp_plls[] = { { .name = "DPLL 0", .funcs = &combo_pll_funcs, .id = DPLL_ID_ICL_DPLL0, }, { .name = "DPLL 1", .funcs = &combo_pll_funcs, .id = DPLL_ID_ICL_DPLL1, }, - { .name = "TBT PLL", .funcs = &tbt_pll_funcs, .id = DPLL_ID_ICL_TBTPLL, }, + { .name = "TBT PLL", .funcs = &tbt_pll_funcs, .id = DPLL_ID_ICL_TBTPLL, + .flags = INTEL_DPLL_IS_ALT_PORT_DPLL, }, { .name = "TC PLL 1", .funcs = &dkl_pll_funcs, .id = DPLL_ID_ICL_MGPLL1, }, { .name = "TC PLL 2", .funcs = &dkl_pll_funcs, .id = DPLL_ID_ICL_MGPLL2, }, { .name = "TC PLL 3", .funcs = &dkl_pll_funcs, .id = DPLL_ID_ICL_MGPLL3, }, @@ -4465,31 +4474,29 @@ struct intel_crtc *crtc, const struct intel_crtc_state *new_crtc_state) { - struct intel_dpll_hw_state dpll_hw_state; + struct intel_dpll_hw_state dpll_hw_state = {}; u8 pipe_mask; bool active; - memset(&dpll_hw_state, 0, sizeof(dpll_hw_state)); - - drm_dbg_kms(&i915->drm, "%s\n", pll->info->name); - active = intel_dpll_get_hw_state(i915, pll, &dpll_hw_state); if (!(pll->info->flags & INTEL_DPLL_ALWAYS_ON)) { I915_STATE_WARN(i915, !pll->on && pll->active_mask, - "pll in active use but not on in sw tracking\n"); + "%s: pll in active use but not on in sw tracking\n", + pll->info->name); I915_STATE_WARN(i915, pll->on && !pll->active_mask, - "pll is on but not used by any active pipe\n"); + "%s: pll is on but not used by any active pipe\n", + pll->info->name); I915_STATE_WARN(i915, pll->on != active, - "pll on state mismatch (expected %i, found %i)\n", - pll->on, active); + "%s: pll on state mismatch (expected %i, found %i)\n", + pll->info->name, pll->on, active); } if (!crtc) { I915_STATE_WARN(i915, pll->active_mask & ~pll->state.pipe_mask, - "more active pll users than references: 0x%x vs 0x%x\n", - pll->active_mask, pll->state.pipe_mask); + "%s: more active pll users than references: 0x%x vs 0x%x\n", + pll->info->name, pll->active_mask, pll->state.pipe_mask); return; } @@ -4498,21 +4505,30 @@ if (new_crtc_state->hw.active) I915_STATE_WARN(i915, !(pll->active_mask & pipe_mask), - "pll active mismatch (expected pipe %c in active mask 0x%x)\n", - pipe_name(crtc->pipe), pll->active_mask); + "%s: pll active mismatch (expected pipe %c in active mask 0x%x)\n", + pll->info->name, pipe_name(crtc->pipe), pll->active_mask); else I915_STATE_WARN(i915, pll->active_mask & pipe_mask, - "pll active mismatch (didn't expect pipe %c in active mask 0x%x)\n", - pipe_name(crtc->pipe), pll->active_mask); + "%s: pll active mismatch (didn't expect pipe %c in active mask 0x%x)\n", + pll->info->name, pipe_name(crtc->pipe), pll->active_mask); I915_STATE_WARN(i915, !(pll->state.pipe_mask & pipe_mask), - "pll enabled crtcs mismatch (expected 0x%x in 0x%x)\n", - pipe_mask, pll->state.pipe_mask); + "%s: pll enabled crtcs mismatch (expected 0x%x in 0x%x)\n", + pll->info->name, pipe_mask, pll->state.pipe_mask); I915_STATE_WARN(i915, pll->on && memcmp(&pll->state.hw_state, &dpll_hw_state, sizeof(dpll_hw_state)), - "pll hw state mismatch\n"); + "%s: pll hw state mismatch\n", + pll->info->name); +} + +static bool has_alt_port_dpll(const struct intel_shared_dpll *old_pll, + const struct intel_shared_dpll *new_pll) +{ + return old_pll && new_pll && old_pll != new_pll && + (old_pll->info->flags & INTEL_DPLL_IS_ALT_PORT_DPLL || + new_pll->info->flags & INTEL_DPLL_IS_ALT_PORT_DPLL); } void intel_shared_dpll_state_verify(struct intel_atomic_state *state, @@ -4534,11 +4550,15 @@ struct intel_shared_dpll *pll = old_crtc_state->shared_dpll; I915_STATE_WARN(i915, pll->active_mask & pipe_mask, - "pll active mismatch (didn't expect pipe %c in active mask (0x%x))\n", - pipe_name(crtc->pipe), pll->active_mask); - I915_STATE_WARN(i915, pll->state.pipe_mask & pipe_mask, - "pll enabled crtcs mismatch (found pipe %c in enabled mask (0x%x))\n", - pipe_name(crtc->pipe), pll->state.pipe_mask); + "%s: pll active mismatch (didn't expect pipe %c in active mask (0x%x))\n", + pll->info->name, pipe_name(crtc->pipe), pll->active_mask); + + /* TC ports have both MG/TC and TBT PLL referenced simultaneously */ + I915_STATE_WARN(i915, !has_alt_port_dpll(old_crtc_state->shared_dpll, + new_crtc_state->shared_dpll) && + pll->state.pipe_mask & pipe_mask, + "%s: pll enabled crtcs mismatch (found pipe %c in enabled mask (0x%x))\n", + pll->info->name, pipe_name(crtc->pipe), pll->state.pipe_mask); } } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_dpll_mgr.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_dpll_mgr.h @@ -277,12 +277,16 @@ enum intel_display_power_domain power_domain; #define INTEL_DPLL_ALWAYS_ON (1 << 0) +#define INTEL_DPLL_IS_ALT_PORT_DPLL (1 << 1) /** * @flags: * * INTEL_DPLL_ALWAYS_ON * Inform the state checker that the DPLL is kept enabled even if * not in use by any CRTC. + * INTEL_DPLL_IS_ALT_PORT_DPLL + * Inform the state checker that the DPLL can be used as a fallback + * (for TC->TBT fallback). */ u32 flags; }; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_dsb.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_dsb.c @@ -340,6 +340,17 @@ return max(0, vblank_start - intel_usecs_to_scanlines(adjusted_mode, latency)); } +static u32 dsb_chicken(struct intel_crtc *crtc) +{ + if (crtc->mode_flags & I915_MODE_FLAG_VRR) + return DSB_CTRL_WAIT_SAFE_WINDOW | + DSB_CTRL_NO_WAIT_VBLANK | + DSB_INST_WAIT_SAFE_WINDOW | + DSB_INST_NO_WAIT_VBLANK; + else + return 0; +} + static void _intel_dsb_commit(struct intel_dsb *dsb, u32 ctrl, int dewake_scanline) { @@ -361,6 +372,9 @@ intel_de_write_fw(dev_priv, DSB_CTRL(pipe, dsb->id), ctrl | DSB_ENABLE); + intel_de_write_fw(dev_priv, DSB_CHICKEN(pipe, dsb->id), + dsb_chicken(crtc)); + intel_de_write_fw(dev_priv, DSB_HEAD(pipe, dsb->id), intel_dsb_buffer_ggtt_offset(&dsb->dsb_buf)); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_fb.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_fb.c @@ -1636,7 +1636,7 @@ * arithmetic related to alignment and offset calculation. */ if (is_gen12_ccs_cc_plane(&fb->base, i)) { - if (IS_ALIGNED(fb->base.offsets[i], PAGE_SIZE)) + if (IS_ALIGNED(fb->base.offsets[i], 64)) continue; else return -EINVAL; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_fb_pin.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_fb_pin.c @@ -255,6 +255,16 @@ return PTR_ERR(vma); plane_state->ggtt_vma = vma; + + /* + * Pre-populate the dma address before we enter the vblank + * evade critical section as i915_gem_object_get_dma_address() + * will trigger might_sleep() even if it won't actually sleep, + * which is the case when the fb has already been pinned. + */ + if (phys_cursor) + plane_state->phys_dma_addr = + i915_gem_object_get_dma_address(intel_fb_obj(fb), 0); } else { struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_hdcp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_hdcp.c @@ -142,11 +142,16 @@ /* Is HDCP1.4 capable on Platform and Sink */ bool intel_hdcp_capable(struct intel_connector *connector) { - struct intel_digital_port *dig_port = intel_attached_dig_port(connector); + struct intel_digital_port *dig_port; const struct intel_hdcp_shim *shim = connector->hdcp.shim; bool capable = false; u8 bksv[5]; + if (!intel_attached_encoder(connector)) + return capable; + + dig_port = intel_attached_dig_port(connector); + if (!shim) return capable; @@ -998,7 +1003,8 @@ hdcp->value = value; if (update_property) { drm_connector_get(&connector->base); - queue_work(i915->unordered_wq, &hdcp->prop_work); + if (!queue_work(i915->unordered_wq, &hdcp->prop_work)) + drm_connector_put(&connector->base); } } @@ -2490,7 +2496,8 @@ mutex_lock(&hdcp->mutex); hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED; drm_connector_get(&connector->base); - queue_work(i915->unordered_wq, &hdcp->prop_work); + if (!queue_work(i915->unordered_wq, &hdcp->prop_work)) + drm_connector_put(&connector->base); mutex_unlock(&hdcp->mutex); } @@ -2507,7 +2514,9 @@ */ if (!desired_and_not_enabled && !content_protection_type_changed) { drm_connector_get(&connector->base); - queue_work(i915->unordered_wq, &hdcp->prop_work); + if (!queue_work(i915->unordered_wq, &hdcp->prop_work)) + drm_connector_put(&connector->base); + } } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_hdcp_regs.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_hdcp_regs.h @@ -249,7 +249,7 @@ #define HDCP2_STREAM_STATUS(dev_priv, trans, port) \ (GRAPHICS_VER(dev_priv) >= 12 ? \ TRANS_HDCP2_STREAM_STATUS(trans) : \ - PIPE_HDCP2_STREAM_STATUS(pipe)) + PIPE_HDCP2_STREAM_STATUS(port)) #define _PORTA_HDCP2_AUTH_STREAM 0x66F00 #define _PORTB_HDCP2_AUTH_STREAM 0x66F04 --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_lpe_audio.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_lpe_audio.c @@ -177,6 +177,14 @@ handle_simple_irq, "hdmi_lpe_audio_irq_handler"); + static const struct pci_device_id irq_quirk_ids[] = { + /* Dell Wyse 3040 */ + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, 0x22b0, 0x1028, 0x07c1)}, + {} + }; + + if (pci_dev_present(irq_quirk_ids)) + return 0; return irq_set_chip_data(irq, dev_priv); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_pps.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_pps.c @@ -949,6 +949,14 @@ intel_de_posting_read(dev_priv, pp_ctrl_reg); } + /* + * WA: 22019252566 + * Disable DPLS gating around power sequence. + */ + if (IS_DISPLAY_VER(dev_priv, 13, 14)) + intel_de_rmw(dev_priv, SOUTH_DSPCLK_GATE_D, + 0, PCH_DPLSUNIT_CLOCK_GATE_DISABLE); + pp |= PANEL_POWER_ON; if (!IS_IRONLAKE(dev_priv)) pp |= PANEL_POWER_RESET; @@ -959,6 +967,10 @@ wait_panel_on(intel_dp); intel_dp->pps.last_power_on = jiffies; + if (IS_DISPLAY_VER(dev_priv, 13, 14)) + intel_de_rmw(dev_priv, SOUTH_DSPCLK_GATE_D, + PCH_DPLSUNIT_CLOCK_GATE_DISABLE, 0); + if (IS_IRONLAKE(dev_priv)) { pp |= PANEL_POWER_RESET; /* restore panel reset bit */ intel_de_write(dev_priv, pp_ctrl_reg, pp); @@ -1469,7 +1481,7 @@ { struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); u32 pp_on, pp_off, port_sel = 0; - int div = RUNTIME_INFO(dev_priv)->rawclk_freq / 1000; + int div = DISPLAY_RUNTIME_INFO(dev_priv)->rawclk_freq / 1000; struct pps_registers regs; enum port port = dp_to_dig_port(intel_dp)->base.port; const struct edp_power_seq *seq = &intel_dp->pps.pps_delays; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_psr.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_psr.c @@ -24,6 +24,7 @@ #include #include #include +#include #include "i915_drv.h" #include "i915_reg.h" @@ -182,6 +183,25 @@ return false; } +bool intel_psr_needs_aux_io_power(struct intel_encoder *encoder, + const struct intel_crtc_state *crtc_state) +{ + /* + * For PSR/PR modes only eDP requires the AUX IO power to be enabled whenever + * the output is enabled. For non-eDP outputs the main link is always + * on, hence it doesn't require the HW initiated AUX wake-up signaling used + * for eDP. + * + * TODO: + * - Consider leaving AUX IO disabled for eDP / PR as well, in case + * the ALPM with main-link off mode is not enabled. + * - Leave AUX IO enabled for DP / PR, once support for ALPM with + * main-link off mode is added for it and this mode gets enabled. + */ + return intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) && + intel_encoder_can_psr(encoder); +} + static bool psr_global_enabled(struct intel_dp *intel_dp) { struct intel_connector *connector = intel_dp->attached_connector; @@ -762,8 +782,8 @@ static int psr2_block_count_lines(struct intel_dp *intel_dp) { - return intel_dp->psr.io_wake_lines < 9 && - intel_dp->psr.fast_wake_lines < 9 ? 8 : 12; + return intel_dp->psr.alpm_parameters.io_wake_lines < 9 && + intel_dp->psr.alpm_parameters.fast_wake_lines < 9 ? 8 : 12; } static int psr2_block_count(struct intel_dp *intel_dp) @@ -800,6 +820,7 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp) { struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); + struct intel_psr *psr = &intel_dp->psr; enum transcoder cpu_transcoder = intel_dp->psr.transcoder; u32 val = EDP_PSR2_ENABLE; u32 psr_val = 0; @@ -841,17 +862,18 @@ */ int tmp; - tmp = map[intel_dp->psr.io_wake_lines - TGL_EDP_PSR2_IO_BUFFER_WAKE_MIN_LINES]; + tmp = map[psr->alpm_parameters.io_wake_lines - + TGL_EDP_PSR2_IO_BUFFER_WAKE_MIN_LINES]; val |= TGL_EDP_PSR2_IO_BUFFER_WAKE(tmp + TGL_EDP_PSR2_IO_BUFFER_WAKE_MIN_LINES); - tmp = map[intel_dp->psr.fast_wake_lines - TGL_EDP_PSR2_FAST_WAKE_MIN_LINES]; + tmp = map[psr->alpm_parameters.fast_wake_lines - TGL_EDP_PSR2_FAST_WAKE_MIN_LINES]; val |= TGL_EDP_PSR2_FAST_WAKE(tmp + TGL_EDP_PSR2_FAST_WAKE_MIN_LINES); } else if (DISPLAY_VER(dev_priv) >= 12) { - val |= TGL_EDP_PSR2_IO_BUFFER_WAKE(intel_dp->psr.io_wake_lines); - val |= TGL_EDP_PSR2_FAST_WAKE(intel_dp->psr.fast_wake_lines); + val |= TGL_EDP_PSR2_IO_BUFFER_WAKE(psr->alpm_parameters.io_wake_lines); + val |= TGL_EDP_PSR2_FAST_WAKE(psr->alpm_parameters.fast_wake_lines); } else if (DISPLAY_VER(dev_priv) >= 9) { - val |= EDP_PSR2_IO_BUFFER_WAKE(intel_dp->psr.io_wake_lines); - val |= EDP_PSR2_FAST_WAKE(intel_dp->psr.fast_wake_lines); + val |= EDP_PSR2_IO_BUFFER_WAKE(psr->alpm_parameters.io_wake_lines); + val |= EDP_PSR2_FAST_WAKE(psr->alpm_parameters.fast_wake_lines); } if (intel_dp->psr.req_psr2_sdp_prior_scanline) @@ -1013,11 +1035,57 @@ crtc_state->dc3co_exitline = crtc_vdisplay - exit_scanlines; } +struct edid_mfgid_prodcode { + u8 mfg_id0; + u8 mfg_id1; + u8 prod_code0; + u8 prod_code1; +}; + +#define PSR2_DISABLE_QUIRK_ENTRY(id0, id1, code0, code1) \ + { .mfg_id0 = (id0), .mfg_id1 = (id1), .prod_code0 = (code0), .prod_code1 = (code1) } + +static struct edid_mfgid_prodcode psr2_disable_quirk_tbl[] = { + PSR2_DISABLE_QUIRK_ENTRY(0x4d, 0x10, 0x8f, 0x15), /* A sharp QHD panel */ + PSR2_DISABLE_QUIRK_ENTRY(0x4d, 0x10, 0x93, 0x15), /* A sharp FHD panel */ + PSR2_DISABLE_QUIRK_ENTRY(0x30, 0xe4, 0x8b, 0x07), /* A LG FHD panel */ + PSR2_DISABLE_QUIRK_ENTRY(0x30, 0xe4, 0x78, 0x07), /* A LG OLED panel */ + PSR2_DISABLE_QUIRK_ENTRY(0x30, 0xe4, 0x8c, 0x07), /* A LG QHD panel */ + PSR2_DISABLE_QUIRK_ENTRY(0x06, 0xaf, 0x9a, 0xf9), /* An AUO panel */ + PSR2_DISABLE_QUIRK_ENTRY(0x06, 0xaf, 0xa3, 0xc3), /* An AUO panel */ + { } +}; + +static bool is_edid_in_psr2_disable_quirk_tbl(struct intel_dp *intel_dp) +{ + const struct edid *p_edid; + int i; + + p_edid = intel_dp_fetch_edid(intel_dp); + if (p_edid) { + for (i = 0; i < ARRAY_SIZE(psr2_disable_quirk_tbl); i ++) { + if (p_edid->mfg_id[0] == psr2_disable_quirk_tbl[i].mfg_id0 && + p_edid->mfg_id[1] == psr2_disable_quirk_tbl[i].mfg_id1 && + p_edid->prod_code[0] == psr2_disable_quirk_tbl[i].prod_code0 && + p_edid->prod_code[1] == psr2_disable_quirk_tbl[i].prod_code1) + return true; + } + } + + return false; +} + static bool intel_psr2_sel_fetch_config_valid(struct intel_dp *intel_dp, struct intel_crtc_state *crtc_state) { struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); + if (is_edid_in_psr2_disable_quirk_tbl(intel_dp)) { + drm_info_once(&dev_priv->drm, + "PSR2 sel fetch disabled by the edid quirk table\n"); + return false; + } + if (!dev_priv->display.params.enable_psr2_sel_fetch && intel_dp->psr.debug != I915_PSR_DEBUG_ENABLE_SEL_FETCH) { drm_dbg_kms(&dev_priv->drm, @@ -1101,26 +1169,76 @@ return true; } -static bool _compute_psr2_wake_times(struct intel_dp *intel_dp, +static bool _lnl_compute_alpm_params(struct intel_dp *intel_dp, struct intel_crtc_state *crtc_state) { struct drm_i915_private *i915 = dp_to_i915(intel_dp); + int check_entry_lines; + + if (DISPLAY_VER(i915) < 20) + return true; + + /* ALPM Entry Check = 2 + CEILING( 5us /tline ) */ + check_entry_lines = 2 + + intel_usecs_to_scanlines(&crtc_state->hw.adjusted_mode, 5); + + if (check_entry_lines > 15) + return false; + + if (i915->display.params.psr_safest_params) + check_entry_lines = 15; + + intel_dp->psr.alpm_parameters.check_entry_lines = check_entry_lines; + + return true; +} + +/* + * IO wake time for DISPLAY_VER < 12 is not directly mentioned in Bspec. There + * are 50 us io wake time and 32 us fast wake time. Clearly preharge pulses are + * not (improperly) included in 32 us fast wake time. 50 us - 32 us = 18 us. + */ +static int skl_io_buffer_wake_time(void) +{ + return 18; +} + +static int tgl_io_buffer_wake_time(void) +{ + return 10; +} + +static int io_buffer_wake_time(const struct intel_crtc_state *crtc_state) +{ + struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); + + if (DISPLAY_VER(i915) >= 12) + return tgl_io_buffer_wake_time(); + else + return skl_io_buffer_wake_time(); +} + +static bool _compute_alpm_params(struct intel_dp *intel_dp, + struct intel_crtc_state *crtc_state) +{ + struct drm_i915_private *i915 = dp_to_i915(intel_dp); int io_wake_lines, io_wake_time, fast_wake_lines, fast_wake_time; + int tfw_exit_latency = 20; /* eDP spec */ + int phy_wake = 4; /* eDP spec */ + int preamble = 8; /* eDP spec */ + int precharge = intel_dp_aux_fw_sync_len(intel_dp) - preamble; u8 max_wake_lines; - if (DISPLAY_VER(i915) >= 12) { - io_wake_time = 42; - /* - * According to Bspec it's 42us, but based on testing - * it is not enough -> use 45 us. - */ - fast_wake_time = 45; + io_wake_time = max(precharge, io_buffer_wake_time(crtc_state)) + + preamble + phy_wake + tfw_exit_latency; + fast_wake_time = precharge + preamble + phy_wake + + tfw_exit_latency; + + if (DISPLAY_VER(i915) >= 12) + /* TODO: Check how we can use ALPM_CTL fast wake extended field */ max_wake_lines = 12; - } else { - io_wake_time = 50; - fast_wake_time = 32; + else max_wake_lines = 8; - } io_wake_lines = intel_usecs_to_scanlines( &crtc_state->hw.adjusted_mode, io_wake_time); @@ -1131,12 +1249,15 @@ fast_wake_lines > max_wake_lines) return false; + if (!_lnl_compute_alpm_params(intel_dp, crtc_state)) + return false; + if (i915->display.params.psr_safest_params) io_wake_lines = fast_wake_lines = max_wake_lines; /* According to Bspec lower limit should be set as 7 lines. */ - intel_dp->psr.io_wake_lines = max(io_wake_lines, 7); - intel_dp->psr.fast_wake_lines = max(fast_wake_lines, 7); + intel_dp->psr.alpm_parameters.io_wake_lines = max(io_wake_lines, 7); + intel_dp->psr.alpm_parameters.fast_wake_lines = max(fast_wake_lines, 7); return true; } @@ -1268,7 +1389,7 @@ return false; } - if (!_compute_psr2_wake_times(intel_dp, crtc_state)) { + if (!_compute_alpm_params(intel_dp, crtc_state)) { drm_dbg_kms(&dev_priv->drm, "PSR2 not enabled, Unable to use long enough wake times\n"); return false; @@ -1368,6 +1489,17 @@ return; } + /* + * FIXME figure out what is wrong with PSR+bigjoiner and + * fix it. Presumably something related to the fact that + * PSR is a transcoder level feature. + */ + if (crtc_state->bigjoiner_pipes) { + drm_dbg_kms(&dev_priv->drm, + "PSR disabled due to bigjoiner\n"); + return; + } + if (CAN_PANEL_REPLAY(intel_dp)) crtc_state->has_panel_replay = true; else @@ -1504,6 +1636,21 @@ wa_16013835468_bit_get(intel_dp), 0); } +static void lnl_alpm_configure(struct intel_dp *intel_dp) +{ + struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); + enum transcoder cpu_transcoder = intel_dp->psr.transcoder; + struct intel_psr *psr = &intel_dp->psr; + + if (DISPLAY_VER(dev_priv) < 20) + return; + + intel_de_write(dev_priv, ALPM_CTL(cpu_transcoder), + ALPM_CTL_EXTENDED_FAST_WAKE_ENABLE | + ALPM_CTL_ALPM_ENTRY_CHECK(psr->alpm_parameters.check_entry_lines) | + ALPM_CTL_EXTENDED_FAST_WAKE_TIME(psr->alpm_parameters.fast_wake_lines)); +} + static void intel_psr_enable_source(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state) { @@ -1569,6 +1716,8 @@ intel_dp->psr.psr2_sel_fetch_enabled ? IGNORE_PSR2_HW_TRACKING : 0); + lnl_alpm_configure(intel_dp); + /* * Wa_16013835468 * Wa_14015648006 @@ -3257,16 +3406,9 @@ "reserved", "sink internal error", }; - static const char * const panel_replay_status[] = { - "Sink device frame is locked to the Source device", - "Sink device is coasting, using the VTotal target", - "Sink device is governing the frame rate (frame rate unlock is granted)", - "Sink device in the process of re-locking with the Source device", - }; const char *str; int ret; u8 status, error_status; - u32 idx; if (!(CAN_PSR(intel_dp) || CAN_PANEL_REPLAY(intel_dp))) { seq_puts(m, "PSR/Panel-Replay Unsupported\n"); @@ -3280,16 +3422,11 @@ if (ret) return ret; - str = "unknown"; - if (intel_dp->psr.panel_replay_enabled) { - idx = (status & DP_SINK_FRAME_LOCKED_MASK) >> DP_SINK_FRAME_LOCKED_SHIFT; - if (idx < ARRAY_SIZE(panel_replay_status)) - str = panel_replay_status[idx]; - } else if (intel_dp->psr.enabled) { - idx = status & DP_PSR_SINK_STATE_MASK; - if (idx < ARRAY_SIZE(sink_status)) - str = sink_status[idx]; - } + status &= DP_PSR_SINK_STATE_MASK; + if (status < ARRAY_SIZE(sink_status)) + str = sink_status[status]; + else + str = "unknown"; seq_printf(m, "Sink %s status: 0x%x [%s]\n", psr_mode_str(intel_dp), status, str); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_psr.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_psr.h @@ -28,6 +28,8 @@ (intel_dp)->psr.source_panel_replay_support) bool intel_encoder_can_psr(struct intel_encoder *encoder); +bool intel_psr_needs_aux_io_power(struct intel_encoder *encoder, + const struct intel_crtc_state *crtc_state); void intel_psr_init_dpcd(struct intel_dp *intel_dp); void intel_psr_pre_plane_update(struct intel_atomic_state *state, struct intel_crtc *crtc); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_psr_regs.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_psr_regs.h @@ -290,4 +290,61 @@ _SEL_FETCH_PLANE_OFFSET_1_A - \ _SEL_FETCH_PLANE_BASE_1_A) +#define _ALPM_CTL_A 0x60950 +#define ALPM_CTL(tran) _MMIO_TRANS2(tran, _ALPM_CTL_A) +#define ALPM_CTL_ALPM_ENABLE REG_BIT(31) +#define ALPM_CTL_ALPM_AUX_LESS_ENABLE REG_BIT(30) +#define ALPM_CTL_LOBF_ENABLE REG_BIT(29) +#define ALPM_CTL_EXTENDED_FAST_WAKE_ENABLE REG_BIT(28) +#define ALPM_CTL_KEEP_FEC_ENABLE_FOR_AUX_WAKE_SLEEP REG_BIT(27) +#define ALPM_CTL_RESTORE_OCCURED REG_BIT(26) +#define ALPM_CTL_RESTORE_TO_SLEEP REG_BIT(25) +#define ALPM_CTL_RESTORE_TO_DEEP_SLEEP REG_BIT(24) +#define ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_MASK REG_GENMASK(23, 21) +#define ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_50_SYMBOLS REG_FIELD_PREP(ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_MASK, 0) +#define ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_128_SYMBOLS REG_FIELD_PREP(ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_MASK, 1) +#define ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_256_SYMBOLS REG_FIELD_PREP(ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_MASK, 2) +#define ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_512_SYMBOLS REG_FIELD_PREP(ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_MASK, 3) +#define ALPM_CTL_AUX_WAKE_SLEEP_HOLD_ENABLE REG_BIT(20) +#define ALPM_CTL_ALPM_ENTRY_CHECK_MASK REG_GENMASK(19, 16) +#define ALPM_CTL_ALPM_ENTRY_CHECK(val) REG_FIELD_PREP(ALPM_CTL_ALPM_ENTRY_CHECK_MASK, val) +#define ALPM_CTL_EXTENDED_FAST_WAKE_TIME_MASK REG_GENMASK(13, 8) +#define ALPM_CTL_EXTENDED_FAST_WAKE_MIN_LINES 5 +#define ALPM_CTL_EXTENDED_FAST_WAKE_TIME(lines) REG_FIELD_PREP(ALPM_CTL_EXTENDED_FAST_WAKE_TIME_MASK, (lines) - ALPM_CTL_EXTENDED_FAST_WAKE_MIN_LINES) +#define ALPM_CTL_AUX_LESS_WAKE_TIME_MASK REG_GENMASK(5, 0) +#define ALPM_CTL_AUX_LESS_WAKE_TIME(val) REG_FIELD_PREP(ALPM_CTL_AUX_LESS_WAKE_TIME_MASK, val) + +#define _ALPM_CTL2_A 0x60954 +#define ALPM_CTL2(tran) _MMIO_TRANS2(tran, _ALPM_CTL2_A) +#define ALPM_CTL2_SWITCH_TO_ACTIVE_LATENCY_MASK REG_GENMASK(28, 24) +#define ALPM_CTL2_SWITCH_TO_ACTIVE_LATENCY(val) REG_FIELD_PREP(ALPM_CTL2_SWITCH_TO_ACTIVE_LATENCY_MASK, val) +#define ALPM_CTL2_AUX_LESS_WAKE_TIME_EXTENSION_MASK REG_GENMASK(19, 16) +#define ALPM_CTL2_AUX_LESS_WAKE_TIME_EXTENSION(val) REG_FIELD_PREP(ALPM_CTL2_AUX_LESS_WAKE_TIME_EXTENSION_MASK, val) +#define ALPM_CTL2_NUMBER_OF_LTTPR_MASK REG_GENMASK(15, 12) +#define ALPM_CTL2_NUMBER_OF_LTTPR(val) REG_FIELD_PREP(ALPM_CTL2_NUMBER_OF_LTTPR_MASK, val) +#define ALPM_CTL2_LTTPR_AUX_LESS_SLEEP_HOLD_TIME_MASK REG_GENMASK(10, 8) +#define ALPM_CTL2_LTTPR_AUX_LESS_SLEEP_HOLD_TIME(val) REG_FIELD_PREP(ALPM_CTL2_LTTPR_AUX_LESS_SLEEP_HOLD_TIME_MASK, val) +#define ALPM_CTL2_FEC_DECODE_EN_POSITION_AFTER_WAKE_SR REG_BIT(4) +#define ALPM_CTL2_NUMBER_AUX_LESS_ML_PHY_SLEEP_SEQUENCES_MASK REG_GENMASK(2, 0) +#define ALPM_CTL2_NUMBER_AUX_LESS_ML_PHY_SLEEP_SEQUENCES(val) REG_FIELD_PREP(ALPM_CTL2_NUMBER_AUX_LESS_ML_PHY_SLEEP_SEQUENCES_MASK, val) + +#define _PORT_ALPM_CTL_A 0x16fa2c +#define PORT_ALPM_CTL(tran) _MMIO_TRANS2(tran, _PORT_ALPM_CTL_A) +#define PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE REG_BIT(31) +#define PORT_ALPM_CTL_MAX_PHY_SWING_SETUP_MASK REG_GENMASK(23, 20) +#define PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(val) REG_FIELD_PREP(PORT_ALPM_CTL_MAX_PHY_SWING_SETUP_MASK, val) +#define PORT_ALPM_CTL_MAX_PHY_SWING_HOLD_MASK REG_GENMASK(19, 16) +#define PORT_ALPM_CTL_MAX_PHY_SWING_HOLD(val) REG_FIELD_PREP(PORT_ALPM_CTL_MAX_PHY_SWING_HOLD_MASK, val) +#define PORT_ALPM_CTL_SILENCE_PERIOD_MASK REG_GENMASK(7, 0) +#define PORT_ALPM_CTL_SILENCE_PERIOD(val) REG_FIELD_PREP(PORT_ALPM_CTL_SILENCE_PERIOD_MASK, val) + +#define _PORT_ALPM_LFPS_CTL_A 0x16fa30 +#define PORT_ALPM_LFPS_CTL(tran) _MMIO_TRANS2(tran, _PORT_ALPM_LFPS_CTL_A) +#define PORT_ALPM_LFPS_CTL_LFPS_START_POLARITY REG_BIT(31) +#define PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT_MASK REG_GENMASK(27, 24) +#define ALPM_CTL_EXTENDED_FAST_WAKE_MIN_LINES 5 +#define ALPM_CTL_EXTENDED_FAST_WAKE_TIME(lines) REG_FIELD_PREP(ALPM_CTL_EXTENDED_FAST_WAKE_TIME_MASK, (lines) - ALPM_CTL_EXTENDED_FAST_WAKE_MIN_LINES) +#define ALPM_CTL_AUX_LESS_WAKE_TIME_MASK REG_GENMASK(5, 0) +#define ALPM_CTL_AUX_LESS_WAKE_TIME(val) REG_FIELD_PREP(ALPM_CTL_AUX_LESS_WAKE_TIME_MASK, val) + #endif /* __INTEL_PSR_REGS_H__ */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_quirks.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_quirks.c @@ -14,6 +14,11 @@ i915->display.quirks.mask |= BIT(quirk); } +static void intel_set_dpcd_quirk(struct intel_dp *intel_dp, enum intel_quirk_id quirk) +{ + intel_dp->quirks.mask |= BIT(quirk); +} + /* * Some machines (Lenovo U160) do not work with SSC on LVDS for some reason */ @@ -65,6 +70,14 @@ drm_info(&i915->drm, "Applying no pps backlight power quirk\n"); } +static void quirk_fw_sync_len(struct intel_dp *intel_dp) +{ + struct intel_display *display = to_intel_display(intel_dp); + + intel_set_dpcd_quirk(intel_dp, QUIRK_FW_SYNC_LEN); + drm_info(display->drm, "Applying Fast Wake sync pulse count quirk\n"); +} + struct intel_quirk { int device; int subsystem_vendor; @@ -72,6 +85,21 @@ void (*hook)(struct drm_i915_private *i915); }; +struct intel_dpcd_quirk { + int device; + int subsystem_vendor; + int subsystem_device; + u8 sink_oui[3]; + u8 sink_device_id[6]; + void (*hook)(struct intel_dp *intel_dp); +}; + +#define SINK_OUI(first, second, third) { (first), (second), (third) } +#define SINK_DEVICE_ID(first, second, third, fourth, fifth, sixth) \ + { (first), (second), (third), (fourth), (fifth), (sixth) } + +#define SINK_DEVICE_ID_ANY SINK_DEVICE_ID(0, 0, 0, 0, 0, 0) + /* For systems that don't have a meaningful PCI subdevice/subvendor ID */ struct intel_dmi_quirk { void (*hook)(struct drm_i915_private *i915); @@ -203,6 +231,18 @@ { 0x0f31, 0x103c, 0x220f, quirk_invert_brightness }, }; +static struct intel_dpcd_quirk intel_dpcd_quirks[] = { + /* Dell Precision 5490 */ + { + .device = 0x7d55, + .subsystem_vendor = 0x1028, + .subsystem_device = 0x0cc7, + .sink_oui = SINK_OUI(0x38, 0xec, 0x11), + .hook = quirk_fw_sync_len, + }, + +}; + void intel_init_quirks(struct drm_i915_private *i915) { struct pci_dev *d = to_pci_dev(i915->drm.dev); @@ -224,7 +264,35 @@ } } +void intel_init_dpcd_quirks(struct intel_dp *intel_dp, + const struct drm_dp_dpcd_ident *ident) +{ + struct intel_display *display = to_intel_display(intel_dp); + struct pci_dev *d = to_pci_dev(display->drm->dev); + int i; + + for (i = 0; i < ARRAY_SIZE(intel_dpcd_quirks); i++) { + struct intel_dpcd_quirk *q = &intel_dpcd_quirks[i]; + + if (d->device == q->device && + (d->subsystem_vendor == q->subsystem_vendor || + q->subsystem_vendor == PCI_ANY_ID) && + (d->subsystem_device == q->subsystem_device || + q->subsystem_device == PCI_ANY_ID) && + !memcmp(q->sink_oui, ident->oui, sizeof(ident->oui)) && + (!memcmp(q->sink_device_id, ident->device_id, + sizeof(ident->device_id)) || + !memchr_inv(q->sink_device_id, 0, sizeof(q->sink_device_id)))) + q->hook(intel_dp); + } +} + bool intel_has_quirk(struct drm_i915_private *i915, enum intel_quirk_id quirk) { return i915->display.quirks.mask & BIT(quirk); } + +bool intel_has_dpcd_quirk(struct intel_dp *intel_dp, enum intel_quirk_id quirk) +{ + return intel_dp->quirks.mask & BIT(quirk); +} --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_quirks.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_quirks.h @@ -9,6 +9,8 @@ #include struct drm_i915_private; +struct intel_dp; +struct drm_dp_dpcd_ident; enum intel_quirk_id { QUIRK_BACKLIGHT_PRESENT, @@ -17,9 +19,13 @@ QUIRK_INVERT_BRIGHTNESS, QUIRK_LVDS_SSC_DISABLE, QUIRK_NO_PPS_BACKLIGHT_POWER_HOOK, + QUIRK_FW_SYNC_LEN, }; void intel_init_quirks(struct drm_i915_private *i915); +void intel_init_dpcd_quirks(struct intel_dp *intel_dp, + const struct drm_dp_dpcd_ident *ident); bool intel_has_quirk(struct drm_i915_private *i915, enum intel_quirk_id quirk); +bool intel_has_dpcd_quirk(struct intel_dp *intel_dp, enum intel_quirk_id quirk); #endif /* __INTEL_QUIRKS_H__ */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_sdvo.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_sdvo.c @@ -1830,8 +1830,6 @@ struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); u32 temp; - encoder->audio_disable(encoder, old_crtc_state, conn_state); - intel_sdvo_set_active_outputs(intel_sdvo, 0); if (0) intel_sdvo_set_encoder_power_state(intel_sdvo, @@ -1923,8 +1921,6 @@ intel_sdvo_set_encoder_power_state(intel_sdvo, DRM_MODE_DPMS_ON); intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo_connector->output_flag); - - encoder->audio_enable(encoder, pipe_config, conn_state); } static enum drm_mode_status --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_tc.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_tc.c @@ -390,6 +390,9 @@ bool lane_reversal = dig_port->saved_port_bits & DDI_BUF_PORT_REVERSAL; u32 val; + if (DISPLAY_VER(i915) >= 14) + return; + drm_WARN_ON(&i915->drm, lane_reversal && tc->mode != TC_PORT_LEGACY); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_vbt_defs.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_vbt_defs.h @@ -897,11 +897,6 @@ u16 reserved; } __packed; -#define EXP_BDB_LFP_BL_DATA_SIZE_REV_191 \ - offsetof(struct bdb_lfp_backlight_data, brightness_level) -#define EXP_BDB_LFP_BL_DATA_SIZE_REV_234 \ - offsetof(struct bdb_lfp_backlight_data, brightness_precision_bits) - struct bdb_lfp_backlight_data { u8 entry_size; struct lfp_backlight_data_entry data[16]; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/intel_vrr.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/intel_vrr.c @@ -117,6 +117,13 @@ const struct drm_display_info *info = &connector->base.display_info; int vmin, vmax; + /* + * FIXME all joined pipes share the same transcoder. + * Need to account for that during VRR toggle/push/etc. + */ + if (crtc_state->bigjoiner_pipes) + return; + if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) return; @@ -187,10 +194,11 @@ enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; /* - * TRANS_SET_CONTEXT_LATENCY with VRR enabled - * requires this chicken bit on ADL/DG2. + * This bit seems to have two meanings depending on the platform: + * TGL: generate VRR "safe window" for DSB vblank waits + * ADL/DG2: make TRANS_SET_CONTEXT_LATENCY effective with VRR */ - if (DISPLAY_VER(dev_priv) == 13) + if (IS_DISPLAY_VER(dev_priv, 12, 13)) intel_de_rmw(dev_priv, CHICKEN_TRANS(cpu_transcoder), 0, PIPE_VBLANK_WITH_DELAY); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/skl_universal_plane.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/skl_universal_plane.c @@ -103,8 +103,6 @@ DRM_FORMAT_Y216, DRM_FORMAT_XYUV8888, DRM_FORMAT_XVYU2101010, - DRM_FORMAT_XVYU12_16161616, - DRM_FORMAT_XVYU16161616, }; static const u32 icl_sdr_uv_plane_formats[] = { @@ -131,8 +129,6 @@ DRM_FORMAT_Y216, DRM_FORMAT_XYUV8888, DRM_FORMAT_XVYU2101010, - DRM_FORMAT_XVYU12_16161616, - DRM_FORMAT_XVYU16161616, }; static const u32 icl_hdr_plane_formats[] = { @@ -2290,6 +2286,9 @@ if (HAS_4TILE(i915)) caps |= INTEL_PLANE_CAP_TILING_4; + if (!IS_ENABLED(I915) && !HAS_FLAT_CCS(i915)) + return caps; + if (skl_plane_has_rc_ccs(i915, pipe, plane_id)) { caps |= INTEL_PLANE_CAP_CCS_RC; if (DISPLAY_VER(i915) >= 12) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/skl_watermark.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/skl_watermark.c @@ -63,7 +63,7 @@ return DISPLAY_VER(i915) == 9; } -static bool +bool intel_has_sagv(struct drm_i915_private *i915) { return HAS_SAGV(i915) && --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/skl_watermark.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/skl_watermark.h @@ -25,6 +25,7 @@ void intel_sagv_post_plane_update(struct intel_atomic_state *state); bool intel_can_enable_sagv(struct drm_i915_private *i915, const struct intel_bw_state *bw_state); +bool intel_has_sagv(struct drm_i915_private *i915); u32 skl_ddb_dbuf_slice_mask(struct drm_i915_private *i915, const struct skl_ddb_entry *entry); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/display/vlv_dsi.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/display/vlv_dsi.c @@ -1868,7 +1868,6 @@ /* Lenovo Yoga Tab 3 Pro YT3-X90F */ .matches = { DMI_MATCH(DMI_SYS_VENDOR, "Intel Corporation"), - DMI_MATCH(DMI_PRODUCT_NAME, "CHERRYVIEW D1 PLATFORM"), DMI_MATCH(DMI_PRODUCT_VERSION, "Blade3-10A-001"), }, .driver_data = (void *)vlv_dsi_lenovo_yoga_tab3_backlight_fixup, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gem/i915_gem_mman.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gem/i915_gem_mman.c @@ -290,6 +290,41 @@ return i915_error_to_vmf_fault(err); } +static void set_address_limits(struct vm_area_struct *area, + struct i915_vma *vma, + unsigned long obj_offset, + unsigned long *start_vaddr, + unsigned long *end_vaddr) +{ + unsigned long vm_start, vm_end, vma_size; /* user's memory parameters */ + long start, end; /* memory boundaries */ + + /* + * Let's move into the ">> PAGE_SHIFT" + * domain to be sure not to lose bits + */ + vm_start = area->vm_start >> PAGE_SHIFT; + vm_end = area->vm_end >> PAGE_SHIFT; + vma_size = vma->size >> PAGE_SHIFT; + + /* + * Calculate the memory boundaries by considering the offset + * provided by the user during memory mapping and the offset + * provided for the partial mapping. + */ + start = vm_start; + start -= obj_offset; + start += vma->gtt_view.partial.offset; + end = start + vma_size; + + start = max_t(long, start, vm_start); + end = min_t(long, end, vm_end); + + /* Let's move back into the "<< PAGE_SHIFT" domain */ + *start_vaddr = (unsigned long)start << PAGE_SHIFT; + *end_vaddr = (unsigned long)end << PAGE_SHIFT; +} + static vm_fault_t vm_fault_gtt(struct vm_fault *vmf) { #define MIN_CHUNK_PAGES (SZ_1M >> PAGE_SHIFT) @@ -302,14 +337,18 @@ struct i915_ggtt *ggtt = to_gt(i915)->ggtt; bool write = area->vm_flags & VM_WRITE; struct i915_gem_ww_ctx ww; + unsigned long obj_offset; + unsigned long start, end; /* memory boundaries */ intel_wakeref_t wakeref; struct i915_vma *vma; pgoff_t page_offset; + unsigned long pfn; int srcu; int ret; - /* We don't use vmf->pgoff since that has the fake offset */ + obj_offset = area->vm_pgoff - drm_vma_node_start(&mmo->vma_node); page_offset = (vmf->address - area->vm_start) >> PAGE_SHIFT; + page_offset += obj_offset; trace_i915_gem_object_fault(obj, page_offset, true, write); @@ -402,12 +441,14 @@ if (ret) goto err_unpin; + set_address_limits(area, vma, obj_offset, &start, &end); + + pfn = (ggtt->gmadr.start + i915_ggtt_offset(vma)) >> PAGE_SHIFT; + pfn += (start - area->vm_start) >> PAGE_SHIFT; + pfn += obj_offset - vma->gtt_view.partial.offset; + /* Finally, remap it using the new GTT offset */ - ret = remap_io_mapping(area, - area->vm_start + (vma->gtt_view.partial.offset << PAGE_SHIFT), - (ggtt->gmadr.start + i915_ggtt_offset(vma)) >> PAGE_SHIFT, - min_t(u64, vma->size, area->vm_end - area->vm_start), - &ggtt->iomap); + ret = remap_io_mapping(area, start, pfn, end - start, &ggtt->iomap); if (ret) goto err_fence; @@ -1084,6 +1125,8 @@ mmo = mmap_offset_attach(obj, mmap_type, NULL); if (IS_ERR(mmo)) return PTR_ERR(mmo); + + vma->vm_pgoff += drm_vma_node_start(&mmo->vma_node); } /* --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gem/i915_gem_object.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gem/i915_gem_object.h @@ -284,7 +284,9 @@ static inline bool i915_gem_object_is_shrinkable(const struct drm_i915_gem_object *obj) { - return i915_gem_object_type_has(obj, I915_GEM_OBJECT_IS_SHRINKABLE); + /* TODO: make DPT shrinkable when it has no bound vmas */ + return i915_gem_object_type_has(obj, I915_GEM_OBJECT_IS_SHRINKABLE) && + !obj->is_dpt; } static inline bool --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gem/i915_gem_shmem.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gem/i915_gem_shmem.c @@ -209,8 +209,6 @@ struct address_space *mapping = obj->base.filp->f_mapping; unsigned int max_segment = i915_sg_segment_size(i915->drm.dev); struct sg_table *st; - struct sgt_iter sgt_iter; - struct page *page; int ret; /* @@ -239,9 +237,7 @@ * for PAGE_SIZE chunks instead may be helpful. */ if (max_segment > PAGE_SIZE) { - for_each_sgt_page(page, sgt_iter, st) - put_page(page); - sg_free_table(st); + shmem_sg_free_table(st, mapping, false, false); kfree(st); max_segment = PAGE_SIZE; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gem/i915_gem_stolen.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gem/i915_gem_stolen.c @@ -944,7 +944,11 @@ dsm_size = ALIGN_DOWN(lmem_size - dsm_base, SZ_1M); } - if (pci_resource_len(pdev, GEN12_LMEM_BAR) < lmem_size) { + if (i915_direct_stolen_access(i915)) { + drm_dbg(&i915->drm, "Using direct DSM access\n"); + io_start = intel_uncore_read64(uncore, GEN12_DSMBASE) & GEN12_BDSM_MASK; + io_size = dsm_size; + } else if (pci_resource_len(pdev, GEN12_LMEM_BAR) < lmem_size) { io_start = 0; io_size = 0; } else { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gem/i915_gem_ttm.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gem/i915_gem_ttm.c @@ -1136,7 +1136,7 @@ GEM_WARN_ON(!i915_ttm_cpu_maps_iomem(bo->resource)); } - if (wakeref & CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND) + if (wakeref && CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND != 0) intel_wakeref_auto(&to_i915(obj->base.dev)->runtime_pm.userfault_wakeref, msecs_to_jiffies_timeout(CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND)); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gt/gen8_engine_cs.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gt/gen8_engine_cs.c @@ -226,7 +226,7 @@ static int mtl_dummy_pipe_control(struct i915_request *rq) { /* Wa_14016712196 */ - if (IS_GFX_GT_IP_RANGE(rq->engine->gt, IP_VER(12, 70), IP_VER(12, 71)) || + if (IS_GFX_GT_IP_RANGE(rq->engine->gt, IP_VER(12, 70), IP_VER(12, 74)) || IS_DG2(rq->i915)) { u32 *cs; @@ -743,21 +743,25 @@ } /* Wa_14014475959:dg2 */ -#define CCS_SEMAPHORE_PPHWSP_OFFSET 0x540 -static u32 ccs_semaphore_offset(struct i915_request *rq) +/* Wa_16019325821 */ +/* Wa_14019159160 */ +#define HOLD_SWITCHOUT_SEMAPHORE_PPHWSP_OFFSET 0x540 +static u32 hold_switchout_semaphore_offset(struct i915_request *rq) { return i915_ggtt_offset(rq->context->state) + - (LRC_PPHWSP_PN * PAGE_SIZE) + CCS_SEMAPHORE_PPHWSP_OFFSET; + (LRC_PPHWSP_PN * PAGE_SIZE) + HOLD_SWITCHOUT_SEMAPHORE_PPHWSP_OFFSET; } /* Wa_14014475959:dg2 */ -static u32 *ccs_emit_wa_busywait(struct i915_request *rq, u32 *cs) +/* Wa_16019325821 */ +/* Wa_14019159160 */ +static u32 *hold_switchout_emit_wa_busywait(struct i915_request *rq, u32 *cs) { int i; *cs++ = MI_ATOMIC_INLINE | MI_ATOMIC_GLOBAL_GTT | MI_ATOMIC_CS_STALL | MI_ATOMIC_MOVE; - *cs++ = ccs_semaphore_offset(rq); + *cs++ = hold_switchout_semaphore_offset(rq); *cs++ = 0; *cs++ = 1; @@ -773,7 +777,7 @@ MI_SEMAPHORE_POLL | MI_SEMAPHORE_SAD_EQ_SDD; *cs++ = 0; - *cs++ = ccs_semaphore_offset(rq); + *cs++ = hold_switchout_semaphore_offset(rq); *cs++ = 0; return cs; @@ -790,8 +794,10 @@ cs = gen12_emit_preempt_busywait(rq, cs); /* Wa_14014475959:dg2 */ - if (intel_engine_uses_wa_hold_ccs_switchout(rq->engine)) - cs = ccs_emit_wa_busywait(rq, cs); + /* Wa_16019325821 */ + /* Wa_14019159160 */ + if (intel_engine_uses_wa_hold_switchout(rq->engine)) + cs = hold_switchout_emit_wa_busywait(rq, cs); rq->tail = intel_ring_offset(rq, cs); assert_ring_tail_valid(rq->ring, rq->tail); @@ -822,7 +828,7 @@ flags |= PIPE_CONTROL_FLUSH_L3; /* Wa_14016712196 */ - if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71)) || IS_DG2(i915)) + if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74)) || IS_DG2(i915)) /* dummy PIPE_CONTROL + depth flush */ cs = gen12_emit_pipe_control(cs, 0, PIPE_CONTROL_DEPTH_CACHE_FLUSH, 0); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gt/gen8_ppgtt.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gt/gen8_ppgtt.c @@ -961,6 +961,9 @@ struct i915_vma *vma; int ret; + if (!intel_gt_needs_wa_16018031267(vm->gt)) + return 0; + /* The memory will be used only by GPU. */ obj = i915_gem_object_create_lmem(i915, PAGE_SIZE, I915_BO_ALLOC_VOLATILE | --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c @@ -263,8 +263,13 @@ i915_request_put(rq); } + /* Lazy irq enabling after HW submission */ if (!READ_ONCE(b->irq_armed) && !list_empty(&b->signalers)) intel_breadcrumbs_arm_irq(b); + + /* And confirm that we still want irqs enabled before we yield */ + if (READ_ONCE(b->irq_armed) && !atomic_read(&b->active)) + intel_breadcrumbs_disarm_irq(b); } struct intel_breadcrumbs * @@ -315,13 +320,7 @@ return; /* Kick the work once more to drain the signalers, and disarm the irq */ - irq_work_sync(&b->irq_work); - while (READ_ONCE(b->irq_armed) && !atomic_read(&b->active)) { - local_irq_disable(); - signal_irq_work(&b->irq_work); - local_irq_enable(); - cond_resched(); - } + irq_work_queue(&b->irq_work); } void intel_breadcrumbs_free(struct kref *kref) @@ -404,7 +403,7 @@ * the request as it may have completed and raised the interrupt as * we were attaching it into the lists. */ - if (!b->irq_armed || __i915_request_is_complete(rq)) + if (!READ_ONCE(b->irq_armed) || __i915_request_is_complete(rq)) irq_work_queue(&b->irq_work); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gt/intel_engine_cs.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gt/intel_engine_cs.c @@ -908,6 +908,29 @@ info->engine_mask &= ~BIT(GSC0); } + /* + * Do not create the command streamer for CCS slices beyond the first. + * All the workload submitted to the first engine will be shared among + * all the slices. + * + * Once the user will be allowed to customize the CCS mode, then this + * check needs to be removed. + */ + if (IS_DG2(gt->i915)) { + u8 first_ccs = __ffs(CCS_MASK(gt)); + + /* + * Store the number of active cslices before + * changing the CCS engine configuration + */ + gt->ccs.cslices = CCS_MASK(gt); + + /* Mask off all the CCS engine */ + info->engine_mask &= ~GENMASK(CCS3, CCS0); + /* Put back in the first CCS engine */ + info->engine_mask |= BIT(_CCS(first_ccs)); + } + return info->engine_mask; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gt/intel_engine_pm.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gt/intel_engine_pm.c @@ -279,9 +279,6 @@ intel_engine_park_heartbeat(engine); intel_breadcrumbs_park(engine->breadcrumbs); - /* Must be reset upon idling, or we may miss the busy wakeup. */ - GEM_BUG_ON(engine->sched_engine->queue_priority_hint != INT_MIN); - if (engine->park) engine->park(engine); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gt/intel_engine_types.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gt/intel_engine_types.h @@ -343,6 +343,11 @@ * @start_gt_clk: GT clock time of last idle to active transition. */ u64 start_gt_clk; + + /** + * @total: The last value of total returned + */ + u64 total; }; union intel_engine_tlb_inv_reg { @@ -586,7 +591,7 @@ #define I915_ENGINE_HAS_RCS_REG_STATE BIT(9) #define I915_ENGINE_HAS_EU_PRIORITY BIT(10) #define I915_ENGINE_FIRST_RENDER_COMPUTE BIT(11) -#define I915_ENGINE_USES_WA_HOLD_CCS_SWITCHOUT BIT(12) +#define I915_ENGINE_USES_WA_HOLD_SWITCHOUT BIT(12) unsigned int flags; /* @@ -696,10 +701,12 @@ } /* Wa_14014475959:dg2 */ +/* Wa_16019325821 */ +/* Wa_14019159160 */ static inline bool -intel_engine_uses_wa_hold_ccs_switchout(struct intel_engine_cs *engine) +intel_engine_uses_wa_hold_switchout(struct intel_engine_cs *engine) { - return engine->flags & I915_ENGINE_USES_WA_HOLD_CCS_SWITCHOUT; + return engine->flags & I915_ENGINE_USES_WA_HOLD_SWITCHOUT; } #endif /* __INTEL_ENGINE_TYPES_H__ */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gt/intel_execlists_submission.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gt/intel_execlists_submission.c @@ -3272,6 +3272,9 @@ { cancel_timer(&engine->execlists.timer); cancel_timer(&engine->execlists.preempt); + + /* Reset upon idling, or we may delay the busy wakeup. */ + WRITE_ONCE(engine->sched_engine->queue_priority_hint, INT_MIN); } static void add_to_engine(struct i915_request *rq) @@ -3312,11 +3315,7 @@ static bool can_preempt(struct intel_engine_cs *engine) { - if (GRAPHICS_VER(engine->i915) > 8) - return true; - - /* GPGPU on bdw requires extra w/a; not implemented */ - return engine->class != RENDER_CLASS; + return GRAPHICS_VER(engine->i915) > 8; } static void kick_execlists(const struct i915_request *rq, int prio) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gt/intel_ggtt.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gt/intel_ggtt.c @@ -24,6 +24,7 @@ #include "intel_ring.h" #include "i915_drv.h" #include "i915_pci.h" +#include "i915_reg.h" #include "i915_request.h" #include "i915_scatterlist.h" #include "i915_utils.h" @@ -1152,13 +1153,20 @@ static int ggtt_probe_common(struct i915_ggtt *ggtt, u64 size) { struct drm_i915_private *i915 = ggtt->vm.i915; + struct intel_uncore *uncore = ggtt->vm.gt->uncore; struct pci_dev *pdev = to_pci_dev(i915->drm.dev); phys_addr_t phys_addr; u32 pte_flags; int ret; GEM_WARN_ON(pci_resource_len(pdev, GEN4_GTTMMADR_BAR) != gen6_gttmmadr_size(i915)); - phys_addr = pci_resource_start(pdev, GEN4_GTTMMADR_BAR) + gen6_gttadr_offset(i915); + + if (i915_direct_stolen_access(i915)) { + drm_dbg(&i915->drm, "Using direct GSM access\n"); + phys_addr = intel_uncore_read64(uncore, GEN12_GSMBASE) & GEN12_BDSM_MASK; + } else { + phys_addr = pci_resource_start(pdev, GEN4_GTTMMADR_BAR) + gen6_gttadr_offset(i915); + } if (needs_wc_ggtt_mapping(i915)) ggtt->gsm = ioremap_wc(phys_addr, size); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c @@ -298,6 +298,7 @@ return; GEM_BUG_ON(fence->vma != vma); + i915_active_wait(&fence->active); GEM_BUG_ON(!i915_active_is_idle(&fence->active)); GEM_BUG_ON(atomic_read(&fence->pin_count)); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gt/intel_gt.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gt/intel_gt.c @@ -1024,6 +1024,12 @@ return I915_MAP_WC; } +bool intel_gt_needs_wa_16018031267(struct intel_gt *gt) +{ + /* Wa_16018031267, Wa_16018063123 */ + return IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 55), IP_VER(12, 71)); +} + bool intel_gt_needs_wa_22016122933(struct intel_gt *gt) { return MEDIA_VER_FULL(gt->i915) == IP_VER(13, 0) && gt->type == GT_MEDIA; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gt/intel_gt.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gt/intel_gt.h @@ -82,17 +82,18 @@ ##__VA_ARGS__); \ } while (0) -#define NEEDS_FASTCOLOR_BLT_WABB(engine) ( \ - IS_GFX_GT_IP_RANGE(engine->gt, IP_VER(12, 55), IP_VER(12, 71)) && \ - engine->class == COPY_ENGINE_CLASS && engine->instance == 0) - static inline bool gt_is_root(struct intel_gt *gt) { return !gt->info.id; } +bool intel_gt_needs_wa_16018031267(struct intel_gt *gt); bool intel_gt_needs_wa_22016122933(struct intel_gt *gt); +#define NEEDS_FASTCOLOR_BLT_WABB(engine) ( \ + intel_gt_needs_wa_16018031267(engine->gt) && \ + engine->class == COPY_ENGINE_CLASS && engine->instance == 0) + static inline struct intel_gt *uc_to_gt(struct intel_uc *uc) { return container_of(uc, struct intel_gt, uc); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright © 2024 Intel Corporation + */ + +#include "i915_drv.h" +#include "intel_gt.h" +#include "intel_gt_ccs_mode.h" +#include "intel_gt_regs.h" + +unsigned int intel_gt_apply_ccs_mode(struct intel_gt *gt) +{ + int cslice; + u32 mode = 0; + int first_ccs = __ffs(CCS_MASK(gt)); + + if (!IS_DG2(gt->i915)) + return 0; + + /* Build the value for the fixed CCS load balancing */ + for (cslice = 0; cslice < I915_MAX_CCS; cslice++) { + if (gt->ccs.cslices & BIT(cslice)) + /* + * If available, assign the cslice + * to the first available engine... + */ + mode |= XEHP_CCS_MODE_CSLICE(cslice, first_ccs); + + else + /* + * ... otherwise, mark the cslice as + * unavailable if no CCS dispatches here + */ + mode |= XEHP_CCS_MODE_CSLICE(cslice, + XEHP_CCS_MODE_CSLICE_MASK); + } + + return mode; +} --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2024 Intel Corporation + */ + +#ifndef __INTEL_GT_CCS_MODE_H__ +#define __INTEL_GT_CCS_MODE_H__ + +struct intel_gt; + +unsigned int intel_gt_apply_ccs_mode(struct intel_gt *gt); + +#endif /* __INTEL_GT_CCS_MODE_H__ */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c @@ -151,7 +151,7 @@ * * Testing on actual hardware has shown there is no /16. */ - return RUNTIME_INFO(uncore->i915)->rawclk_freq * 1000; + return DISPLAY_RUNTIME_INFO(uncore->i915)->rawclk_freq * 1000; } static u32 read_clock_frequency(struct intel_uncore *uncore) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gt/intel_gt_regs.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gt/intel_gt_regs.h @@ -1477,8 +1477,14 @@ #define ECOBITS_PPGTT_CACHE4B (0 << 8) #define GEN12_RCU_MODE _MMIO(0x14800) +#define XEHP_RCU_MODE_FIXED_SLICE_CCS_MODE REG_BIT(1) #define GEN12_RCU_MODE_CCS_ENABLE REG_BIT(0) +#define XEHP_CCS_MODE _MMIO(0x14804) +#define XEHP_CCS_MODE_CSLICE_MASK REG_GENMASK(2, 0) /* CCS0-3 + rsvd */ +#define XEHP_CCS_MODE_CSLICE_WIDTH ilog2(XEHP_CCS_MODE_CSLICE_MASK + 1) +#define XEHP_CCS_MODE_CSLICE(cslice, ccs) (ccs << (cslice * XEHP_CCS_MODE_CSLICE_WIDTH)) + #define CHV_FUSE_GT _MMIO(VLV_GUNIT_BASE + 0x2168) #define CHV_FGT_DISABLE_SS0 (1 << 10) #define CHV_FGT_DISABLE_SS1 (1 << 11) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gt/intel_gt_types.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gt/intel_gt_types.h @@ -207,6 +207,14 @@ [MAX_ENGINE_INSTANCE + 1]; enum intel_submission_method submission_method; + struct { + /* + * Mask of the non fused CCS slices + * to be used for the load balancing + */ + intel_engine_mask_t cslices; + } ccs; + /* * Default address space (either GGTT or ppGTT depending on arch). * --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gt/intel_rc6.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gt/intel_rc6.c @@ -133,7 +133,7 @@ GEN9_MEDIA_PG_ENABLE | GEN11_MEDIA_SAMPLER_PG_ENABLE; - if (GRAPHICS_VER(gt->i915) >= 12) { + if (GRAPHICS_VER(gt->i915) >= 12 && !IS_DG1(gt->i915)) { for (i = 0; i < I915_MAX_VCS; i++) if (HAS_ENGINE(gt, _VCS(i))) pg_enable |= (VDN_HCP_POWERGATE_ENABLE(i) | --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -10,6 +10,7 @@ #include "intel_engine_regs.h" #include "intel_gpu_commands.h" #include "intel_gt.h" +#include "intel_gt_ccs_mode.h" #include "intel_gt_mcr.h" #include "intel_gt_print.h" #include "intel_gt_regs.h" @@ -51,7 +52,8 @@ * registers belonging to BCS, VCS or VECS should be implemented in * xcs_engine_wa_init(). Workarounds for registers not belonging to a specific * engine's MMIO range but that are part of of the common RCS/CCS reset domain - * should be implemented in general_render_compute_wa_init(). + * should be implemented in general_render_compute_wa_init(). The settings + * about the CCS load balancing should be added in ccs_engine_wa_mode(). * * - GT workarounds: the list of these WAs is applied whenever these registers * revert to their default values: on GPU reset, suspend/resume [1]_, etc. @@ -789,8 +791,13 @@ dg2_ctx_gt_tuning_init(engine, wal); - if (IS_GFX_GT_IP_STEP(gt, IP_VER(12, 70), STEP_B0, STEP_FOREVER) || - IS_GFX_GT_IP_STEP(gt, IP_VER(12, 71), STEP_B0, STEP_FOREVER)) + /* + * Due to Wa_16014892111, the DRAW_WATERMARK tuning must be done in + * gen12_emit_indirect_ctx_rcs() rather than here on some early + * steppings. + */ + if (!(IS_GFX_GT_IP_STEP(gt, IP_VER(12, 70), STEP_A0, STEP_B0) || + IS_GFX_GT_IP_STEP(gt, IP_VER(12, 71), STEP_A0, STEP_B0))) wa_add(wal, DRAW_WATERMARK, VERT_WM_VAL, 0x3FF, 0, false); } @@ -908,7 +915,7 @@ if (engine->class != RENDER_CLASS) goto done; - if (IS_GFX_GT_IP_RANGE(engine->gt, IP_VER(12, 70), IP_VER(12, 71))) + if (IS_GFX_GT_IP_RANGE(engine->gt, IP_VER(12, 70), IP_VER(12, 74))) xelpg_ctx_workarounds_init(engine, wal); else if (IS_PONTEVECCHIO(i915)) ; /* noop; none at this time */ @@ -1643,7 +1650,8 @@ static void xelpg_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal) { - /* Wa_14018778641 / Wa_18018781329 */ + /* Wa_14018575942 / Wa_18018781329 */ + wa_mcr_write_or(wal, RENDER_MOD_CTRL, FORCE_MISS_FTLB); wa_mcr_write_or(wal, COMP_MOD_CTRL, FORCE_MISS_FTLB); /* Wa_22016670082 */ @@ -1710,7 +1718,7 @@ */ static void gt_tuning_settings(struct intel_gt *gt, struct i915_wa_list *wal) { - if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71))) { + if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74))) { wa_mcr_write_or(wal, XEHP_L3SCQREG7, BLEND_FILL_CACHING_OPT_DIS); wa_mcr_write_or(wal, XEHP_SQCM, EN_32B_ACCESS); } @@ -1743,7 +1751,7 @@ return; } - if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71))) + if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74))) xelpg_gt_workarounds_init(gt, wal); else if (IS_PONTEVECCHIO(i915)) pvc_gt_workarounds_init(gt, wal); @@ -2216,7 +2224,7 @@ if (engine->gt->type == GT_MEDIA) ; /* none yet */ - else if (IS_GFX_GT_IP_RANGE(engine->gt, IP_VER(12, 70), IP_VER(12, 71))) + else if (IS_GFX_GT_IP_RANGE(engine->gt, IP_VER(12, 70), IP_VER(12, 74))) xelpg_whitelist_build(engine); else if (IS_PONTEVECCHIO(i915)) pvc_whitelist_build(engine); @@ -2828,7 +2836,7 @@ { struct drm_i915_private *i915 = gt->i915; - if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71)) || IS_DG2(i915)) + if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74)) || IS_DG2(i915)) wa_mcr_write_clr_set(wal, RT_CTRL, STACKID_CTRL, STACKID_CTRL_512); /* @@ -2844,6 +2852,30 @@ wa_write_clr(wal, GEN8_GARBCNTL, GEN12_BUS_HASH_CTL_BIT_EXC); } +static void ccs_engine_wa_mode(struct intel_engine_cs *engine, struct i915_wa_list *wal) +{ + struct intel_gt *gt = engine->gt; + u32 mode; + + if (!IS_DG2(gt->i915)) + return; + + /* + * Wa_14019159160: This workaround, along with others, leads to + * significant challenges in utilizing load balancing among the + * CCS slices. Consequently, an architectural decision has been + * made to completely disable automatic CCS load balancing. + */ + wa_masked_en(wal, GEN12_RCU_MODE, XEHP_RCU_MODE_FIXED_SLICE_CCS_MODE); + + /* + * After having disabled automatic load balancing we need to + * assign all slices to a single CCS. We will call it CCS mode 1 + */ + mode = intel_gt_apply_ccs_mode(gt); + wa_masked_en(wal, XEHP_CCS_MODE, mode); +} + /* * The workarounds in this function apply to shared registers in * the general render reset domain that aren't tied to a @@ -2881,7 +2913,8 @@ } if (IS_GFX_GT_IP_STEP(gt, IP_VER(12, 70), STEP_B0, STEP_FOREVER) || - IS_GFX_GT_IP_STEP(gt, IP_VER(12, 71), STEP_B0, STEP_FOREVER)) + IS_GFX_GT_IP_STEP(gt, IP_VER(12, 71), STEP_B0, STEP_FOREVER) || + IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 74), IP_VER(12, 74))) /* Wa_14017856879 */ wa_mcr_masked_en(wal, GEN9_ROW_CHICKEN3, MTL_DISABLE_FIX_FOR_EOT_FLUSH); @@ -2993,8 +3026,10 @@ * to a single RCS/CCS engine's workaround list since * they're reset as part of the general render domain reset. */ - if (engine->flags & I915_ENGINE_FIRST_RENDER_COMPUTE) + if (engine->flags & I915_ENGINE_FIRST_RENDER_COMPUTE) { general_render_compute_wa_init(engine, wal); + ccs_engine_wa_mode(engine, wal); + } if (engine->class == COMPUTE_CLASS) ccs_engine_wa_init(engine, wal); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h @@ -36,6 +36,7 @@ INTEL_GUC_LOAD_STATUS_INVALID_INIT_DATA_RANGE_START, INTEL_GUC_LOAD_STATUS_MPU_DATA_INVALID = 0x73, INTEL_GUC_LOAD_STATUS_INIT_MMIO_SAVE_RESTORE_INVALID = 0x74, + INTEL_GUC_LOAD_STATUS_KLV_WORKAROUND_INIT_ERROR = 0x75, INTEL_GUC_LOAD_STATUS_INVALID_INIT_DATA_RANGE_END, INTEL_GUC_LOAD_STATUS_READY = 0xF0, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h @@ -29,9 +29,9 @@ */ #define GUC_KLV_LEN_MIN 1u -#define GUC_KLV_0_KEY (0xffff << 16) -#define GUC_KLV_0_LEN (0xffff << 0) -#define GUC_KLV_n_VALUE (0xffffffff << 0) +#define GUC_KLV_0_KEY (0xffffu << 16) +#define GUC_KLV_0_LEN (0xffffu << 0) +#define GUC_KLV_n_VALUE (0xffffffffu << 0) /** * DOC: GuC Self Config KLVs @@ -101,4 +101,11 @@ GUC_CONTEXT_POLICIES_KLV_NUM_IDS = 5, }; +/* + * Workaround keys: + */ +enum { + GUC_WORKAROUND_KLV_SERIALIZED_RA_MODE = 0x9001, +}; + #endif /* _ABI_GUC_KLVS_ABI_H */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc.c @@ -302,7 +302,7 @@ { struct intel_gt *gt = gsc_uc_to_gt(gsc); - if (!intel_uc_fw_is_loadable(&gsc->fw)) + if (!intel_uc_fw_is_loadable(&gsc->fw) || intel_uc_fw_is_in_error(&gsc->fw)) return; if (intel_gsc_uc_fw_init_done(gsc)) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gt/uc/intel_guc.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gt/uc/intel_guc.c @@ -294,6 +294,11 @@ IS_DG2(gt->i915)) flags |= GUC_WA_HOLD_CCS_SWITCHOUT; + /* Wa_16019325821 */ + /* Wa_14019159160 */ + if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71))) + flags |= GUC_WA_RCS_CCS_SWITCHOUT; + /* * Wa_14012197797 * Wa_22011391025 --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gt/uc/intel_guc.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gt/uc/intel_guc.h @@ -204,6 +204,8 @@ struct guc_mmio_reg *ads_regset; /** @ads_golden_ctxt_size: size of the golden contexts in the ADS */ u32 ads_golden_ctxt_size; + /** @ads_waklv_size: size of workaround KLVs */ + u32 ads_waklv_size; /** @ads_capture_size: size of register lists in the ADS used for error capture */ u32 ads_capture_size; /** @ads_engine_usage_size: size of engine usage in the ADS */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c @@ -46,6 +46,10 @@ * +---------------------------------------+ * | padding | * +---------------------------------------+ <== 4K aligned + * | w/a KLVs | + * +---------------------------------------+ + * | padding | + * +---------------------------------------+ <== 4K aligned * | capture lists | * +---------------------------------------+ * | padding | @@ -88,6 +92,11 @@ return PAGE_ALIGN(guc->ads_golden_ctxt_size); } +static u32 guc_ads_waklv_size(struct intel_guc *guc) +{ + return PAGE_ALIGN(guc->ads_waklv_size); +} + static u32 guc_ads_capture_size(struct intel_guc *guc) { return PAGE_ALIGN(guc->ads_capture_size); @@ -113,7 +122,7 @@ return PAGE_ALIGN(offset); } -static u32 guc_ads_capture_offset(struct intel_guc *guc) +static u32 guc_ads_waklv_offset(struct intel_guc *guc) { u32 offset; @@ -123,6 +132,16 @@ return PAGE_ALIGN(offset); } +static u32 guc_ads_capture_offset(struct intel_guc *guc) +{ + u32 offset; + + offset = guc_ads_waklv_offset(guc) + + guc_ads_waklv_size(guc); + + return PAGE_ALIGN(offset); +} + static u32 guc_ads_private_data_offset(struct intel_guc *guc) { u32 offset; @@ -791,6 +810,65 @@ return PAGE_ALIGN(total_size); } +/* Wa_14019159160 */ +static u32 guc_waklv_ra_mode(struct intel_guc *guc, u32 offset, u32 remain) +{ + u32 size; + u32 klv_entry[] = { + /* 16:16 key/length */ + FIELD_PREP(GUC_KLV_0_KEY, GUC_WORKAROUND_KLV_SERIALIZED_RA_MODE) | + FIELD_PREP(GUC_KLV_0_LEN, 0), + /* 0 dwords data */ + }; + + size = sizeof(klv_entry); + GEM_BUG_ON(remain < size); + + iosys_map_memcpy_to(&guc->ads_map, offset, klv_entry, size); + + return size; +} + +static void guc_waklv_init(struct intel_guc *guc) +{ + struct intel_gt *gt = guc_to_gt(guc); + u32 offset, addr_ggtt, remain, size; + + if (!intel_uc_uses_guc_submission(>->uc)) + return; + + if (GUC_FIRMWARE_VER(guc) < MAKE_GUC_VER(70, 10, 0)) + return; + + GEM_BUG_ON(iosys_map_is_null(&guc->ads_map)); + offset = guc_ads_waklv_offset(guc); + remain = guc_ads_waklv_size(guc); + + /* Wa_14019159160 */ + if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71))) { + size = guc_waklv_ra_mode(guc, offset, remain); + offset += size; + remain -= size; + } + + size = guc_ads_waklv_size(guc) - remain; + if (!size) + return; + + offset = guc_ads_waklv_offset(guc); + addr_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma) + offset; + + ads_blob_write(guc, ads.wa_klv_addr_lo, addr_ggtt); + ads_blob_write(guc, ads.wa_klv_addr_hi, 0); + ads_blob_write(guc, ads.wa_klv_size, size); +} + +static int guc_prep_waklv(struct intel_guc *guc) +{ + /* Fudge something chunky for now: */ + return PAGE_SIZE; +} + static void __guc_ads_init(struct intel_guc *guc) { struct intel_gt *gt = guc_to_gt(guc); @@ -838,6 +916,9 @@ /* MMIO save/restore list */ guc_mmio_reg_state_init(guc); + /* Workaround KLV list */ + guc_waklv_init(guc); + /* Private Data */ ads_blob_write(guc, ads.private_data, base + guc_ads_private_data_offset(guc)); @@ -881,6 +962,12 @@ return ret; guc->ads_capture_size = ret; + /* And don't forget the workaround KLVs: */ + ret = guc_prep_waklv(guc); + if (ret < 0) + return ret; + guc->ads_waklv_size = ret; + /* Now the total size can be determined: */ size = guc_ads_blob_size(guc); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c @@ -115,6 +115,7 @@ case INTEL_GUC_LOAD_STATUS_INIT_DATA_INVALID: case INTEL_GUC_LOAD_STATUS_MPU_DATA_INVALID: case INTEL_GUC_LOAD_STATUS_INIT_MMIO_SAVE_RESTORE_INVALID: + case INTEL_GUC_LOAD_STATUS_KLV_WORKAROUND_INIT_ERROR: *success = false; return true; } @@ -184,7 +185,7 @@ * in the seconds range. However, there is a limit on how long an * individual wait_for() can wait. So wrap it in a loop. */ - before_freq = intel_rps_read_actual_frequency(&uncore->gt->rps); + before_freq = intel_rps_read_actual_frequency(>->rps); before = ktime_get(); for (count = 0; count < GUC_LOAD_RETRY_LIMIT; count++) { ret = wait_for(guc_load_done(uncore, &status, &success), 1000); @@ -192,7 +193,7 @@ break; guc_dbg(guc, "load still in progress, count = %d, freq = %dMHz, status = 0x%08X [0x%02X/%02X]\n", - count, intel_rps_read_actual_frequency(&uncore->gt->rps), status, + count, intel_rps_read_actual_frequency(>->rps), status, REG_FIELD_GET(GS_BOOTROM_MASK, status), REG_FIELD_GET(GS_UKERNEL_MASK, status)); } @@ -204,7 +205,7 @@ u32 bootrom = REG_FIELD_GET(GS_BOOTROM_MASK, status); guc_info(guc, "load failed: status = 0x%08X, time = %lldms, freq = %dMHz, ret = %d\n", - status, delta_ms, intel_rps_read_actual_frequency(&uncore->gt->rps), ret); + status, delta_ms, intel_rps_read_actual_frequency(>->rps), ret); guc_info(guc, "load failed: status: Reset = %d, BootROM = 0x%02X, UKernel = 0x%02X, MIA = 0x%02X, Auth = 0x%02X\n", REG_FIELD_GET(GS_MIA_IN_RESET, status), bootrom, ukernel, @@ -241,6 +242,11 @@ ret = -EPERM; break; + case INTEL_GUC_LOAD_STATUS_KLV_WORKAROUND_INIT_ERROR: + guc_info(guc, "invalid w/a KLV entry\n"); + ret = -EINVAL; + break; + case INTEL_GUC_LOAD_STATUS_HWCONFIG_START: guc_info(guc, "still extracting hwconfig table.\n"); ret = -ETIMEDOUT; @@ -254,11 +260,11 @@ guc_warn(guc, "excessive init time: %lldms! [status = 0x%08X, count = %d, ret = %d]\n", delta_ms, status, count, ret); guc_warn(guc, "excessive init time: [freq = %dMHz, before = %dMHz, perf_limit_reasons = 0x%08X]\n", - intel_rps_read_actual_frequency(&uncore->gt->rps), before_freq, + intel_rps_read_actual_frequency(>->rps), before_freq, intel_uncore_read(uncore, intel_gt_perf_limit_reasons_reg(gt))); } else { guc_dbg(guc, "init took %lldms, freq = %dMHz, before = %dMHz, status = 0x%08X, count = %d, ret = %d\n", - delta_ms, intel_rps_read_actual_frequency(&uncore->gt->rps), + delta_ms, intel_rps_read_actual_frequency(>->rps), before_freq, status, count, ret); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h @@ -96,8 +96,9 @@ #define GUC_WA_GAM_CREDITS BIT(10) #define GUC_WA_DUAL_QUEUE BIT(11) #define GUC_WA_RCS_RESET_BEFORE_RC6 BIT(13) -#define GUC_WA_CONTEXT_ISOLATION BIT(15) #define GUC_WA_PRE_PARSER BIT(14) +#define GUC_WA_CONTEXT_ISOLATION BIT(15) +#define GUC_WA_RCS_CCS_SWITCHOUT BIT(16) #define GUC_WA_HOLD_CCS_SWITCHOUT BIT(17) #define GUC_WA_POLLCS BIT(18) #define GUC_WA_RCS_REGS_IN_CCS_REGS_LIST BIT(21) @@ -430,7 +431,10 @@ u32 capture_instance[GUC_CAPTURE_LIST_INDEX_MAX][GUC_MAX_ENGINE_CLASSES]; u32 capture_class[GUC_CAPTURE_LIST_INDEX_MAX][GUC_MAX_ENGINE_CLASSES]; u32 capture_global[GUC_CAPTURE_LIST_INDEX_MAX]; - u32 reserved[14]; + u32 wa_klv_addr_lo; + u32 wa_klv_addr_hi; + u32 wa_klv_size; + u32 reserved[11]; } __packed; /* Engine usage stats */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c @@ -1230,6 +1230,21 @@ } while (++i < 6); } +static void __set_engine_usage_record(struct intel_engine_cs *engine, + u32 last_in, u32 id, u32 total) +{ + struct iosys_map rec_map = intel_guc_engine_usage_record_map(engine); + +#define record_write(map_, field_, val_) \ + iosys_map_wr_field(map_, 0, struct guc_engine_usage_record, field_, val_) + + record_write(&rec_map, last_switch_in_stamp, last_in); + record_write(&rec_map, current_context_index, id); + record_write(&rec_map, total_runtime, total); + +#undef record_write +} + static void guc_update_engine_gt_clks(struct intel_engine_cs *engine) { struct intel_engine_guc_stats *stats = &engine->stats.guc; @@ -1350,9 +1365,12 @@ total += intel_gt_clock_interval_to_ns(gt, clk); } + if (total > stats->total) + stats->total = total; + spin_unlock_irqrestore(&guc->timestamp.lock, flags); - return ns_to_ktime(total); + return ns_to_ktime(stats->total); } static void guc_enable_busyness_worker(struct intel_guc *guc) @@ -1379,8 +1397,21 @@ guc_update_pm_timestamp(guc, &unused); for_each_engine(engine, gt, id) { + struct intel_engine_guc_stats *stats = &engine->stats.guc; + guc_update_engine_gt_clks(engine); - engine->stats.guc.prev_total = 0; + + /* + * If resetting a running context, accumulate the active + * time as well since there will be no context switch. + */ + if (stats->running) { + u64 clk = guc->timestamp.gt_stamp - stats->start_gt_clk; + + stats->total_gt_clks += clk; + } + stats->prev_total = 0; + stats->running = 0; } spin_unlock_irqrestore(&guc->timestamp.lock, flags); @@ -1491,6 +1522,9 @@ static int guc_action_enable_usage_stats(struct intel_guc *guc) { + struct intel_gt *gt = guc_to_gt(guc); + struct intel_engine_cs *engine; + enum intel_engine_id id; u32 offset = intel_guc_engine_usage_offset(guc); u32 action[] = { INTEL_GUC_ACTION_SET_ENG_UTIL_BUFF, @@ -1498,6 +1532,9 @@ 0, }; + for_each_engine(engine, gt, id) + __set_engine_usage_record(engine, 0, 0xffffffff, 0); + return intel_guc_send(guc, action, ARRAY_SIZE(action)); } @@ -2778,9 +2815,9 @@ ce->parallel.guc.wqi_tail = 0; ce->parallel.guc.wqi_head = 0; - wq_desc_offset = i915_ggtt_offset(ce->state) + + wq_desc_offset = (u64)i915_ggtt_offset(ce->state) + __get_parent_scratch_offset(ce); - wq_base_offset = i915_ggtt_offset(ce->state) + + wq_base_offset = (u64)i915_ggtt_offset(ce->state) + __get_wq_offset(ce); info->wq_desc_lo = lower_32_bits(wq_desc_offset); info->wq_desc_hi = upper_32_bits(wq_desc_offset); @@ -4382,7 +4419,13 @@ if (engine->class == COMPUTE_CLASS) if (IS_GFX_GT_IP_STEP(engine->gt, IP_VER(12, 70), STEP_A0, STEP_B0) || IS_DG2(engine->i915)) - engine->flags |= I915_ENGINE_USES_WA_HOLD_CCS_SWITCHOUT; + engine->flags |= I915_ENGINE_USES_WA_HOLD_SWITCHOUT; + + /* Wa_16019325821 */ + /* Wa_14019159160 */ + if ((engine->class == COMPUTE_CLASS || engine->class == RENDER_CLASS) && + IS_GFX_GT_IP_RANGE(engine->gt, IP_VER(12, 70), IP_VER(12, 71))) + engine->flags |= I915_ENGINE_USES_WA_HOLD_SWITCHOUT; /* * TODO: GuC supports timeslicing and semaphores as well, but they're @@ -5348,12 +5391,20 @@ { drm_printf(p, "GuC lrc descriptor %u:\n", ce->guc_id.id); drm_printf(p, "\tHW Context Desc: 0x%08x\n", ce->lrc.lrca); - drm_printf(p, "\t\tLRC Head: Internal %u, Memory %u\n", - ce->ring->head, - ce->lrc_reg_state[CTX_RING_HEAD]); - drm_printf(p, "\t\tLRC Tail: Internal %u, Memory %u\n", - ce->ring->tail, - ce->lrc_reg_state[CTX_RING_TAIL]); + if (intel_context_pin_if_active(ce)) { + drm_printf(p, "\t\tLRC Head: Internal %u, Memory %u\n", + ce->ring->head, + ce->lrc_reg_state[CTX_RING_HEAD]); + drm_printf(p, "\t\tLRC Tail: Internal %u, Memory %u\n", + ce->ring->tail, + ce->lrc_reg_state[CTX_RING_TAIL]); + intel_context_unpin(ce); + } else { + drm_printf(p, "\t\tLRC Head: Internal %u, Memory not pinned\n", + ce->ring->head); + drm_printf(p, "\t\tLRC Tail: Internal %u, Memory not pinned\n", + ce->ring->tail); + } drm_printf(p, "\t\tContext Pin Count: %u\n", atomic_read(&ce->pin_count)); drm_printf(p, "\t\tGuC ID Ref Count: %u\n", --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gt/uc/intel_huc.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gt/uc/intel_huc.c @@ -6,6 +6,7 @@ #include #include "gt/intel_gt.h" +#include "gt/intel_rps.h" #include "intel_guc_reg.h" #include "intel_huc.h" #include "intel_huc_print.h" @@ -447,17 +448,68 @@ return partial ? "clear media" : "all workloads"; } +/* + * Use a longer timeout for debug builds so that problems can be detected + * and analysed. But a shorter timeout for releases so that user's don't + * wait forever to find out there is a problem. Note that the only reason + * an end user should hit the timeout is in case of extreme thermal throttling. + * And a system that is that hot during boot is probably dead anyway! + */ +#if defined(CONFIG_DRM_I915_DEBUG_GEM) +#define HUC_LOAD_RETRY_LIMIT 20 +#else +#define HUC_LOAD_RETRY_LIMIT 3 +#endif + int intel_huc_wait_for_auth_complete(struct intel_huc *huc, enum intel_huc_authentication_type type) { struct intel_gt *gt = huc_to_gt(huc); - int ret; - - ret = __intel_wait_for_register(gt->uncore, - huc->status[type].reg, - huc->status[type].mask, - huc->status[type].value, - 2, 50, NULL); + struct intel_uncore *uncore = gt->uncore; + ktime_t before, after, delta; + int ret, count; + u64 delta_ms; + u32 before_freq; + + /* + * The KMD requests maximum frequency during driver load, however thermal + * throttling can force the frequency down to minimum (although the board + * really should never get that hot in real life!). IFWI issues have been + * seen to cause sporadic failures to grant the higher frequency. And at + * minimum frequency, the authentication time can be in the seconds range. + * Note that there is a limit on how long an individual wait_for() can wait. + * So wrap it in a loop. + */ + before_freq = intel_rps_read_actual_frequency(>->rps); + before = ktime_get(); + for (count = 0; count < HUC_LOAD_RETRY_LIMIT; count++) { + ret = __intel_wait_for_register(gt->uncore, + huc->status[type].reg, + huc->status[type].mask, + huc->status[type].value, + 2, 1000, NULL); + if (!ret) + break; + + huc_dbg(huc, "auth still in progress, count = %d, freq = %dMHz, status = 0x%08X\n", + count, intel_rps_read_actual_frequency(>->rps), + huc->status[type].reg.reg); + } + after = ktime_get(); + delta = ktime_sub(after, before); + delta_ms = ktime_to_ms(delta); + + if (delta_ms > 50) { + huc_warn(huc, "excessive auth time: %lldms! [status = 0x%08X, count = %d, ret = %d]\n", + delta_ms, huc->status[type].reg.reg, count, ret); + huc_warn(huc, "excessive auth time: [freq = %dMHz, before = %dMHz, perf_limit_reasons = 0x%08X]\n", + intel_rps_read_actual_frequency(>->rps), before_freq, + intel_uncore_read(uncore, intel_gt_perf_limit_reasons_reg(gt))); + } else { + huc_dbg(huc, "auth took %lldms, freq = %dMHz, before = %dMHz, status = 0x%08X, count = %d, ret = %d\n", + delta_ms, intel_rps_read_actual_frequency(>->rps), + before_freq, huc->status[type].reg.reg, count, ret); + } /* mark the load process as complete even if the wait failed */ delayed_huc_load_complete(huc); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h @@ -258,6 +258,11 @@ return __intel_uc_fw_status(uc_fw) == INTEL_UC_FIRMWARE_RUNNING; } +static inline bool intel_uc_fw_is_in_error(struct intel_uc_fw *uc_fw) +{ + return intel_uc_fw_status_to_error(__intel_uc_fw_status(uc_fw)) != 0; +} + static inline bool intel_uc_fw_is_overridden(const struct intel_uc_fw *uc_fw) { return uc_fw->user_overridden; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/i915_driver.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/i915_driver.c @@ -799,7 +799,7 @@ goto out_cleanup_modeset2; ret = intel_pxp_init(i915); - if (ret != -ENODEV) + if (ret && ret != -ENODEV) drm_dbg(&i915->drm, "pxp init failed with %d\n", ret); ret = intel_display_driver_probe(i915); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/i915_gpu_error.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/i915_gpu_error.c @@ -1650,9 +1650,21 @@ return NULL; intel_engine_get_hung_entity(engine, &ce, &rq); - if (rq && !i915_request_started(rq)) - drm_info(&engine->gt->i915->drm, "Got hung context on %s with active request %lld:%lld [0x%04X] not yet started\n", - engine->name, rq->fence.context, rq->fence.seqno, ce->guc_id.id); + if (rq && !i915_request_started(rq)) { + /* + * We want to know also what is the guc_id of the context, + * but if we don't have the context reference, then skip + * printing it. + */ + if (ce) + drm_info(&engine->gt->i915->drm, + "Got hung context on %s with active request %lld:%lld [0x%04X] not yet started\n", + engine->name, rq->fence.context, rq->fence.seqno, ce->guc_id.id); + else + drm_info(&engine->gt->i915->drm, + "Got hung context on %s with active request %lld:%lld not yet started\n", + engine->name, rq->fence.context, rq->fence.seqno); + } if (rq) { capture = intel_engine_coredump_add_request(ee, rq, ATOMIC_MAYFAIL); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/i915_hwmon.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/i915_hwmon.c @@ -72,12 +72,13 @@ struct intel_uncore *uncore = ddat->uncore; intel_wakeref_t wakeref; - mutex_lock(&hwmon->hwmon_lock); + with_intel_runtime_pm(uncore->rpm, wakeref) { + mutex_lock(&hwmon->hwmon_lock); - with_intel_runtime_pm(uncore->rpm, wakeref) intel_uncore_rmw(uncore, reg, clear, set); - mutex_unlock(&hwmon->hwmon_lock); + mutex_unlock(&hwmon->hwmon_lock); + } } /* @@ -136,20 +137,21 @@ else rgaddr = hwmon->rg.energy_status_all; - mutex_lock(&hwmon->hwmon_lock); + with_intel_runtime_pm(uncore->rpm, wakeref) { + mutex_lock(&hwmon->hwmon_lock); - with_intel_runtime_pm(uncore->rpm, wakeref) reg_val = intel_uncore_read(uncore, rgaddr); - if (reg_val >= ei->reg_val_prev) - ei->accum_energy += reg_val - ei->reg_val_prev; - else - ei->accum_energy += UINT_MAX - ei->reg_val_prev + reg_val; - ei->reg_val_prev = reg_val; + if (reg_val >= ei->reg_val_prev) + ei->accum_energy += reg_val - ei->reg_val_prev; + else + ei->accum_energy += UINT_MAX - ei->reg_val_prev + reg_val; + ei->reg_val_prev = reg_val; - *energy = mul_u64_u32_shr(ei->accum_energy, SF_ENERGY, - hwmon->scl_shift_energy); - mutex_unlock(&hwmon->hwmon_lock); + *energy = mul_u64_u32_shr(ei->accum_energy, SF_ENERGY, + hwmon->scl_shift_energy); + mutex_unlock(&hwmon->hwmon_lock); + } } static ssize_t @@ -404,6 +406,7 @@ /* Block waiting for GuC reset to complete when needed */ for (;;) { + wakeref = intel_runtime_pm_get(ddat->uncore->rpm); mutex_lock(&hwmon->hwmon_lock); prepare_to_wait(&ddat->waitq, &wait, TASK_INTERRUPTIBLE); @@ -417,14 +420,13 @@ } mutex_unlock(&hwmon->hwmon_lock); + intel_runtime_pm_put(ddat->uncore->rpm, wakeref); schedule(); } finish_wait(&ddat->waitq, &wait); if (ret) - goto unlock; - - wakeref = intel_runtime_pm_get(ddat->uncore->rpm); + goto exit; /* Disable PL1 limit and verify, because the limit cannot be disabled on all platforms */ if (val == PL1_DISABLE) { @@ -444,9 +446,8 @@ intel_uncore_rmw(ddat->uncore, hwmon->rg.pkg_rapl_limit, PKG_PWR_LIM_1_EN | PKG_PWR_LIM_1, nval); exit: - intel_runtime_pm_put(ddat->uncore->rpm, wakeref); -unlock: mutex_unlock(&hwmon->hwmon_lock); + intel_runtime_pm_put(ddat->uncore->rpm, wakeref); return ret; } @@ -792,7 +793,7 @@ if (!IS_DGFX(i915)) return; - hwmon = devm_kzalloc(dev, sizeof(*hwmon), GFP_KERNEL); + hwmon = kzalloc(sizeof(*hwmon), GFP_KERNEL); if (!hwmon) return; @@ -818,14 +819,12 @@ hwm_get_preregistration_info(i915); /* hwmon_dev points to device hwmon */ - hwmon_dev = devm_hwmon_device_register_with_info(dev, ddat->name, - ddat, - &hwm_chip_info, - hwm_groups); - if (IS_ERR(hwmon_dev)) { - i915->hwmon = NULL; - return; - } + hwmon_dev = hwmon_device_register_with_info(dev, ddat->name, + ddat, + &hwm_chip_info, + hwm_groups); + if (IS_ERR(hwmon_dev)) + goto err; ddat->hwmon_dev = hwmon_dev; @@ -838,16 +837,36 @@ if (!hwm_gt_is_visible(ddat_gt, hwmon_energy, hwmon_energy_input, 0)) continue; - hwmon_dev = devm_hwmon_device_register_with_info(dev, ddat_gt->name, - ddat_gt, - &hwm_gt_chip_info, - NULL); + hwmon_dev = hwmon_device_register_with_info(dev, ddat_gt->name, + ddat_gt, + &hwm_gt_chip_info, + NULL); if (!IS_ERR(hwmon_dev)) ddat_gt->hwmon_dev = hwmon_dev; } + return; +err: + i915_hwmon_unregister(i915); } void i915_hwmon_unregister(struct drm_i915_private *i915) { - fetch_and_zero(&i915->hwmon); + struct i915_hwmon *hwmon = i915->hwmon; + struct intel_gt *gt; + int i; + + if (!hwmon) + return; + + for_each_gt(gt, i915, i) + if (hwmon->ddat_gt[i].hwmon_dev) + hwmon_device_unregister(hwmon->ddat_gt[i].hwmon_dev); + + if (hwmon->ddat.hwmon_dev) + hwmon_device_unregister(hwmon->ddat.hwmon_dev); + + mutex_destroy(&hwmon->hwmon_lock); + + kfree(i915->hwmon); + i915->hwmon = NULL; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/i915_perf.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/i915_perf.c @@ -2749,26 +2749,6 @@ } static int -gen12_configure_all_contexts(struct i915_perf_stream *stream, - const struct i915_oa_config *oa_config, - struct i915_active *active) -{ - struct flex regs[] = { - { - GEN8_R_PWR_CLK_STATE(RENDER_RING_BASE), - CTX_R_PWR_CLK_STATE, - }, - }; - - if (stream->engine->class != RENDER_CLASS) - return 0; - - return oa_configure_all_contexts(stream, - regs, ARRAY_SIZE(regs), - active); -} - -static int lrc_configure_all_contexts(struct i915_perf_stream *stream, const struct i915_oa_config *oa_config, struct i915_active *active) @@ -2874,7 +2854,6 @@ { struct drm_i915_private *i915 = stream->perf->i915; struct intel_uncore *uncore = stream->uncore; - struct i915_oa_config *oa_config = stream->oa_config; bool periodic = stream->periodic; u32 period_exponent = stream->period_exponent; u32 sqcnt1; @@ -2919,15 +2898,6 @@ intel_uncore_rmw(uncore, GEN12_SQCNT1, 0, sqcnt1); /* - * Update all contexts prior writing the mux configurations as we need - * to make sure all slices/subslices are ON before writing to NOA - * registers. - */ - ret = gen12_configure_all_contexts(stream, oa_config, active); - if (ret) - return ret; - - /* * For Gen12, performance counters are context * saved/restored. Only enable it for the context that * requested this. @@ -2981,9 +2951,6 @@ _MASKED_BIT_DISABLE(GEN12_DISABLE_DOP_GATING)); } - /* Reset all contexts' slices/subslices configurations. */ - gen12_configure_all_contexts(stream, NULL, NULL); - /* disable the context save/restore or OAR counters */ if (stream->ctx) gen12_configure_oar_context(stream, NULL); @@ -3225,7 +3192,7 @@ struct intel_gt *gt = to_gt(i915); /* Wa_18013179988 */ - if (IS_DG2(i915) || IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71))) { + if (IS_DG2(i915) || IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74))) { intel_wakeref_t wakeref; u32 reg, shift; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/i915_reg.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/i915_reg.h @@ -4597,7 +4597,7 @@ #define MTL_CHICKEN_TRANS(trans) _MMIO_TRANS((trans), \ _MTL_CHICKEN_TRANS_A, \ _MTL_CHICKEN_TRANS_B) -#define PIPE_VBLANK_WITH_DELAY REG_BIT(31) /* ADL/DG2 */ +#define PIPE_VBLANK_WITH_DELAY REG_BIT(31) /* tgl+ */ #define SKL_UNMASK_VBL_TO_PIPE_IN_SRD REG_BIT(30) /* skl+ */ #define HSW_FRAME_START_DELAY_MASK REG_GENMASK(28, 27) #define HSW_FRAME_START_DELAY(x) REG_FIELD_PREP(HSW_FRAME_START_DELAY_MASK, x) @@ -5412,6 +5412,9 @@ #define GEN6_PCODE_FREQ_RING_RATIO_SHIFT 16 #define GEN6_PCODE_DATA1 _MMIO(0x13812C) +#define MTL_PCODE_STOLEN_ACCESS _MMIO(0x138914) +#define STOLEN_ACCESS_ALLOWED 0x1 + /* IVYBRIDGE DPF */ #define GEN7_L3CDERRST1(slice) _MMIO(0xB008 + (slice) * 0x200) /* L3CD Error Status 1 */ #define GEN7_L3CDERRST1_ROW_MASK (0x7ff << 14) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/i915_scheduler.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/i915_scheduler.c @@ -506,6 +506,6 @@ return 0; err_priorities: - kmem_cache_destroy(slab_priorities); + kmem_cache_destroy(slab_dependencies); return -ENOMEM; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/i915_sw_fence.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/i915_sw_fence.c @@ -51,7 +51,7 @@ debug_object_init(fence, &i915_sw_fence_debug_descr); } -static inline void debug_fence_init_onstack(struct i915_sw_fence *fence) +static inline __maybe_unused void debug_fence_init_onstack(struct i915_sw_fence *fence) { debug_object_init_on_stack(fence, &i915_sw_fence_debug_descr); } @@ -77,7 +77,7 @@ debug_object_destroy(fence, &i915_sw_fence_debug_descr); } -static inline void debug_fence_free(struct i915_sw_fence *fence) +static inline __maybe_unused void debug_fence_free(struct i915_sw_fence *fence) { debug_object_free(fence, &i915_sw_fence_debug_descr); smp_wmb(); /* flush the change in state before reallocation */ @@ -94,7 +94,7 @@ { } -static inline void debug_fence_init_onstack(struct i915_sw_fence *fence) +static inline __maybe_unused void debug_fence_init_onstack(struct i915_sw_fence *fence) { } @@ -115,7 +115,7 @@ { } -static inline void debug_fence_free(struct i915_sw_fence *fence) +static inline __maybe_unused void debug_fence_free(struct i915_sw_fence *fence) { } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/i915_utils.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/i915_utils.c @@ -8,6 +8,7 @@ #include #include "i915_drv.h" +#include "i915_reg.h" #include "i915_utils.h" #define FDO_BUG_MSG "Please file a bug on drm/i915; see " FDO_BUG_URL " for details." @@ -125,3 +126,19 @@ /* Running as a guest, we assume the host is enforcing VT'd */ return i915_run_as_guest(); } + +bool i915_direct_stolen_access(struct drm_i915_private *i915) +{ + /* + * Wa_22018444074 + * + * Access via BAR can hang MTL, go directly to GSM/DSM, + * except for VM guests which won't have access to it. + * + * Normally this would not work but on MTL the system firmware + * should have relaxed the access permissions sufficiently. + * 0x138914==0x1 indicates that the firmware has done its job. + */ + return IS_METEORLAKE(i915) && !i915_run_as_guest() && + intel_uncore_read(&i915->uncore, MTL_PCODE_STOLEN_ACCESS) == STOLEN_ACCESS_ALLOWED; +} --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/i915_utils.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/i915_utils.h @@ -391,4 +391,6 @@ bool i915_vtd_active(struct drm_i915_private *i915); +bool i915_direct_stolen_access(struct drm_i915_private *i915); + #endif /* !__I915_UTILS_H */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/i915_vma.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/i915_vma.c @@ -34,6 +34,7 @@ #include "gt/intel_engine.h" #include "gt/intel_engine_heartbeat.h" #include "gt/intel_gt.h" +#include "gt/intel_gt_pm.h" #include "gt/intel_gt_requests.h" #include "gt/intel_tlb.h" @@ -103,12 +104,42 @@ static int __i915_vma_active(struct i915_active *ref) { - return i915_vma_tryget(active_to_vma(ref)) ? 0 : -ENOENT; + struct i915_vma *vma = active_to_vma(ref); + + if (!i915_vma_tryget(vma)) + return -ENOENT; + + /* + * Exclude global GTT VMA from holding a GT wakeref + * while active, otherwise GPU never goes idle. + */ + if (!i915_vma_is_ggtt(vma)) { + /* + * Since we and our _retire() counterpart can be + * called asynchronously, storing a wakeref tracking + * handle inside struct i915_vma is not safe, and + * there is no other good place for that. Hence, + * use untracked variants of intel_gt_pm_get/put(). + */ + intel_gt_pm_get_untracked(vma->vm->gt); + } + + return 0; } static void __i915_vma_retire(struct i915_active *ref) { - i915_vma_put(active_to_vma(ref)); + struct i915_vma *vma = active_to_vma(ref); + + if (!i915_vma_is_ggtt(vma)) { + /* + * Since we can be called from atomic contexts, + * use an async variant of intel_gt_pm_put(). + */ + intel_gt_pm_put_async_untracked(vma->vm->gt); + } + + i915_vma_put(vma); } static struct i915_vma * @@ -1404,7 +1435,7 @@ struct i915_vma_work *work = NULL; struct dma_fence *moving = NULL; struct i915_vma_resource *vma_res = NULL; - intel_wakeref_t wakeref = 0; + intel_wakeref_t wakeref; unsigned int bound; int err; @@ -1424,8 +1455,14 @@ if (err) return err; - if (flags & PIN_GLOBAL) - wakeref = intel_runtime_pm_get(&vma->vm->i915->runtime_pm); + /* + * In case of a global GTT, we must hold a runtime-pm wakeref + * while global PTEs are updated. In other cases, we hold + * the rpm reference while the VMA is active. Since runtime + * resume may require allocations, which are forbidden inside + * vm->mutex, get the first rpm wakeref outside of the mutex. + */ + wakeref = intel_runtime_pm_get(&vma->vm->i915->runtime_pm); if (flags & vma->vm->bind_async_flags) { /* lock VM */ @@ -1561,8 +1598,7 @@ if (work) dma_fence_work_commit_imm(&work->base); err_rpm: - if (wakeref) - intel_runtime_pm_put(&vma->vm->i915->runtime_pm, wakeref); + intel_runtime_pm_put(&vma->vm->i915->runtime_pm, wakeref); if (moving) dma_fence_put(moving); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/intel_device_info.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/intel_device_info.c @@ -126,7 +126,6 @@ #undef PRINT_FLAG drm_printf(p, "has_pooled_eu: %s\n", str_yes_no(runtime->has_pooled_eu)); - drm_printf(p, "rawclk rate: %u kHz\n", runtime->rawclk_freq); } #undef INTEL_VGA_DEVICE @@ -372,10 +371,6 @@ "Disabling ppGTT for VT-d support\n"); runtime->ppgtt_type = INTEL_PPGTT_NONE; } - - runtime->rawclk_freq = intel_read_rawclk(dev_priv); - drm_dbg(&dev_priv->drm, "rawclk rate: %d kHz\n", runtime->rawclk_freq); - } /* --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/intel_device_info.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/intel_device_info.h @@ -206,8 +206,6 @@ u16 device_id; - u32 rawclk_freq; - struct intel_step_info step; unsigned int page_sizes; /* page sizes supported by the HW */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/intel_runtime_pm.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -246,7 +246,10 @@ * function, since the power state is undefined. This applies * atm to the late/early system suspend/resume handlers. */ - if (pm_runtime_get_if_active(rpm->kdev, ignore_usecount) <= 0) + if ((ignore_usecount && + pm_runtime_get_if_active(rpm->kdev) <= 0) || + (!ignore_usecount && + pm_runtime_get_if_in_use(rpm->kdev) <= 0)) return 0; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c @@ -168,7 +168,7 @@ return PTR_ERR(ppgtt); if (!ppgtt->vm.allocate_va_range) - goto err_ppgtt_cleanup; + goto ppgtt_vm_put; /* * While we only allocate the page tables here and so we could @@ -236,7 +236,7 @@ goto retry; } i915_gem_ww_ctx_fini(&ww); - +ppgtt_vm_put: i915_vm_put(&ppgtt->vm); return err; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/i915/soc/intel_dram.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/i915/soc/intel_dram.c @@ -681,6 +681,8 @@ if (ret) return; + drm_dbg_kms(&i915->drm, "Num qgv points %u\n", dram_info->num_qgv_points); + drm_dbg_kms(&i915->drm, "DRAM channels: %u\n", dram_info->num_channels); drm_dbg_kms(&i915->drm, "Watermark level 0 adjustment needed: %s\n", --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/imagination/pvr_ccb.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/imagination/pvr_ccb.c @@ -321,7 +321,7 @@ bool reserved = false; u32 retries = 0; - while ((jiffies - start_timestamp) < (u32)RESERVE_SLOT_TIMEOUT || + while (time_before(jiffies, start_timestamp + RESERVE_SLOT_TIMEOUT) || retries < RESERVE_SLOT_MIN_RETRIES) { reserved = pvr_kccb_try_reserve_slot(pvr_dev); if (reserved) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/imagination/pvr_context.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/imagination/pvr_context.c @@ -17,10 +17,14 @@ #include #include + +#include #include #include +#include #include #include +#include #include #include #include @@ -354,6 +358,10 @@ return err; } + spin_lock(&pvr_dev->ctx_list_lock); + list_add_tail(&ctx->file_link, &pvr_file->contexts); + spin_unlock(&pvr_dev->ctx_list_lock); + return 0; err_destroy_fw_obj: @@ -380,6 +388,11 @@ container_of(ref_count, struct pvr_context, ref_count); struct pvr_device *pvr_dev = ctx->pvr_dev; + WARN_ON(in_interrupt()); + spin_lock(&pvr_dev->ctx_list_lock); + list_del(&ctx->file_link); + spin_unlock(&pvr_dev->ctx_list_lock); + xa_erase(&pvr_dev->ctx_ids, ctx->ctx_id); pvr_context_destroy_queues(ctx); pvr_fw_object_destroy(ctx->fw_obj); @@ -437,11 +450,30 @@ */ void pvr_destroy_contexts_for_file(struct pvr_file *pvr_file) { + struct pvr_device *pvr_dev = pvr_file->pvr_dev; struct pvr_context *ctx; unsigned long handle; xa_for_each(&pvr_file->ctx_handles, handle, ctx) pvr_context_destroy(pvr_file, handle); + + spin_lock(&pvr_dev->ctx_list_lock); + ctx = list_first_entry(&pvr_file->contexts, struct pvr_context, file_link); + + while (!list_entry_is_head(ctx, &pvr_file->contexts, file_link)) { + list_del_init(&ctx->file_link); + + if (pvr_context_get_if_referenced(ctx)) { + spin_unlock(&pvr_dev->ctx_list_lock); + + pvr_vm_unmap_all(ctx->vm_ctx); + + pvr_context_put(ctx); + spin_lock(&pvr_dev->ctx_list_lock); + } + ctx = list_first_entry(&pvr_file->contexts, struct pvr_context, file_link); + } + spin_unlock(&pvr_dev->ctx_list_lock); } /** @@ -451,6 +483,7 @@ void pvr_context_device_init(struct pvr_device *pvr_dev) { xa_init_flags(&pvr_dev->ctx_ids, XA_FLAGS_ALLOC1); + spin_lock_init(&pvr_dev->ctx_list_lock); } /** --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/imagination/pvr_context.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/imagination/pvr_context.h @@ -85,6 +85,9 @@ /** @compute: Transfer queue. */ struct pvr_queue *transfer; } queues; + + /** @file_link: pvr_file PVR context list link. */ + struct list_head file_link; }; static __always_inline struct pvr_queue * @@ -124,6 +127,24 @@ } /** + * pvr_context_get_if_referenced() - Take an additional reference on a still + * referenced context. + * @ctx: Context pointer. + * + * Call pvr_context_put() to release. + * + * Returns: + * * True on success, or + * * false if no context pointer passed, or the context wasn't still + * * referenced. + */ +static __always_inline bool +pvr_context_get_if_referenced(struct pvr_context *ctx) +{ + return ctx != NULL && kref_get_unless_zero(&ctx->ref_count) != 0; +} + +/** * pvr_context_lookup() - Lookup context pointer from handle and file. * @pvr_file: Pointer to pvr_file structure. * @handle: Context handle. --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/imagination/pvr_device.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/imagination/pvr_device.h @@ -23,6 +23,7 @@ #include #include #include +#include #include #include #include @@ -293,6 +294,12 @@ /** @sched_wq: Workqueue for schedulers. */ struct workqueue_struct *sched_wq; + + /** + * @ctx_list_lock: Lock to be held when accessing the context list in + * struct pvr_file. + */ + spinlock_t ctx_list_lock; }; /** @@ -344,6 +351,9 @@ * This array is used to allocate handles returned to userspace. */ struct xarray vm_ctx_handles; + + /** @contexts: PVR context list. */ + struct list_head contexts; }; /** --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/imagination/pvr_drv.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/imagination/pvr_drv.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include #include @@ -1326,6 +1327,8 @@ */ pvr_file->pvr_dev = pvr_dev; + INIT_LIST_HEAD(&pvr_file->contexts); + xa_init_flags(&pvr_file->ctx_handles, XA_FLAGS_ALLOC1); xa_init_flags(&pvr_file->free_list_handles, XA_FLAGS_ALLOC1); xa_init_flags(&pvr_file->hwrt_handles, XA_FLAGS_ALLOC1); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/imagination/pvr_fw_mips.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/imagination/pvr_fw_mips.h @@ -7,13 +7,14 @@ #include "pvr_rogue_mips.h" #include +#include #include /* Forward declaration from pvr_gem.h. */ struct pvr_gem_object; -#define PVR_MIPS_PT_PAGE_COUNT ((ROGUE_MIPSFW_MAX_NUM_PAGETABLE_PAGES * ROGUE_MIPSFW_PAGE_SIZE_4K) \ - >> PAGE_SHIFT) +#define PVR_MIPS_PT_PAGE_COUNT DIV_ROUND_UP(ROGUE_MIPSFW_MAX_NUM_PAGETABLE_PAGES * ROGUE_MIPSFW_PAGE_SIZE_4K, PAGE_SIZE) + /** * struct pvr_fw_mips_data - MIPS-specific data */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/imagination/pvr_vm.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/imagination/pvr_vm.c @@ -14,6 +14,7 @@ #include #include +#include #include #include #include @@ -114,6 +115,8 @@ struct drm_gpuva base; }; +#define to_pvr_vm_gpuva(va) container_of_const(va, struct pvr_vm_gpuva, base) + enum pvr_vm_bind_type { PVR_VM_BIND_TYPE_MAP, PVR_VM_BIND_TYPE_UNMAP, @@ -386,6 +389,7 @@ drm_gpuva_unmap(&op->unmap); drm_gpuva_unlink(op->unmap.va); + kfree(to_pvr_vm_gpuva(op->unmap.va)); return 0; } @@ -433,6 +437,7 @@ } drm_gpuva_unlink(op->remap.unmap->va); + kfree(to_pvr_vm_gpuva(op->remap.unmap->va)); return 0; } @@ -593,12 +598,26 @@ } /** - * pvr_vm_context_release() - Teardown a VM context. - * @ref_count: Pointer to reference counter of the VM context. + * pvr_vm_unmap_all() - Unmap all mappings associated with a VM context. + * @vm_ctx: Target VM context. * * This function ensures that no mappings are left dangling by unmapping them * all in order of ascending device-virtual address. */ +void +pvr_vm_unmap_all(struct pvr_vm_context *vm_ctx) +{ + WARN_ON(pvr_vm_unmap(vm_ctx, vm_ctx->gpuvm_mgr.mm_start, + vm_ctx->gpuvm_mgr.mm_range)); +} + +/** + * pvr_vm_context_release() - Teardown a VM context. + * @ref_count: Pointer to reference counter of the VM context. + * + * This function also ensures that no mappings are left dangling by calling + * pvr_vm_unmap_all. + */ static void pvr_vm_context_release(struct kref *ref_count) { @@ -608,8 +627,7 @@ if (vm_ctx->fw_mem_ctx_obj) pvr_fw_object_destroy(vm_ctx->fw_mem_ctx_obj); - WARN_ON(pvr_vm_unmap(vm_ctx, vm_ctx->gpuvm_mgr.mm_start, - vm_ctx->gpuvm_mgr.mm_range)); + pvr_vm_unmap_all(vm_ctx); pvr_mmu_context_destroy(vm_ctx->mmu_ctx); drm_gem_private_object_fini(&vm_ctx->dummy_gem); @@ -636,9 +654,7 @@ xa_lock(&pvr_file->vm_ctx_handles); vm_ctx = xa_load(&pvr_file->vm_ctx_handles, handle); - if (vm_ctx) - kref_get(&vm_ctx->ref_count); - + pvr_vm_context_get(vm_ctx); xa_unlock(&pvr_file->vm_ctx_handles); return vm_ctx; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/imagination/pvr_vm.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/imagination/pvr_vm.h @@ -39,6 +39,7 @@ struct pvr_gem_object *pvr_obj, u64 pvr_obj_offset, u64 device_addr, u64 size); int pvr_vm_unmap(struct pvr_vm_context *vm_ctx, u64 device_addr, u64 size); +void pvr_vm_unmap_all(struct pvr_vm_context *vm_ctx); dma_addr_t pvr_vm_get_page_table_root_addr(struct pvr_vm_context *vm_ctx); struct dma_resv *pvr_vm_get_dma_resv(struct pvr_vm_context *vm_ctx); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/imagination/pvr_vm_mips.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/imagination/pvr_vm_mips.c @@ -46,7 +46,7 @@ if (!mips_data) return -ENOMEM; - for (page_nr = 0; page_nr < ARRAY_SIZE(mips_data->pt_pages); page_nr++) { + for (page_nr = 0; page_nr < PVR_MIPS_PT_PAGE_COUNT; page_nr++) { mips_data->pt_pages[page_nr] = alloc_page(GFP_KERNEL | __GFP_ZERO); if (!mips_data->pt_pages[page_nr]) { err = -ENOMEM; @@ -102,7 +102,7 @@ int page_nr; vunmap(mips_data->pt); - for (page_nr = ARRAY_SIZE(mips_data->pt_pages) - 1; page_nr >= 0; page_nr--) { + for (page_nr = PVR_MIPS_PT_PAGE_COUNT - 1; page_nr >= 0; page_nr--) { dma_unmap_page(from_pvr_device(pvr_dev)->dev, mips_data->pt_dma_addr[page_nr], PAGE_SIZE, DMA_TO_DEVICE); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/imx/dcss/dcss-crtc.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/imx/dcss/dcss-crtc.c @@ -206,15 +206,13 @@ if (crtc->irq < 0) return crtc->irq; - ret = request_irq(crtc->irq, dcss_crtc_irq_handler, - 0, "dcss_drm", crtc); + ret = request_irq(crtc->irq, dcss_crtc_irq_handler, IRQF_NO_AUTOEN, + "dcss_drm", crtc); if (ret) { dev_err(dcss->dev, "irq request failed with %d.\n", ret); return ret; } - disable_irq(crtc->irq); - return 0; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c @@ -410,14 +410,12 @@ } ipu_crtc->irq = ipu_plane_irq(ipu_crtc->plane[0]); - ret = devm_request_irq(ipu_crtc->dev, ipu_crtc->irq, ipu_irq_handler, 0, - "imx_drm", ipu_crtc); + ret = devm_request_irq(ipu_crtc->dev, ipu_crtc->irq, ipu_irq_handler, + IRQF_NO_AUTOEN, "imx_drm", ipu_crtc); if (ret < 0) { dev_err(ipu_crtc->dev, "irq request failed with %d.\n", ret); return ret; } - /* Only enable IRQ when we actually need it to trigger work. */ - disable_irq(ipu_crtc->irq); return 0; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/imx/ipuv3/parallel-display.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/imx/ipuv3/parallel-display.c @@ -72,14 +72,14 @@ int ret; if (!mode) - return -EINVAL; + return 0; ret = of_get_drm_display_mode(np, &imxpd->mode, &imxpd->bus_flags, OF_USE_NATIVE_MODE); if (ret) { drm_mode_destroy(connector->dev, mode); - return ret; + return 0; } drm_mode_copy(mode, &imxpd->mode); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/lima/lima_bcast.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/lima/lima_bcast.c @@ -43,6 +43,18 @@ } +int lima_bcast_mask_irq(struct lima_ip *ip) +{ + bcast_write(LIMA_BCAST_BROADCAST_MASK, 0); + bcast_write(LIMA_BCAST_INTERRUPT_MASK, 0); + return 0; +} + +int lima_bcast_reset(struct lima_ip *ip) +{ + return lima_bcast_hw_init(ip); +} + int lima_bcast_init(struct lima_ip *ip) { int i; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/lima/lima_bcast.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/lima/lima_bcast.h @@ -13,4 +13,7 @@ void lima_bcast_enable(struct lima_device *dev, int num_pp); +int lima_bcast_mask_irq(struct lima_ip *ip); +int lima_bcast_reset(struct lima_ip *ip); + #endif --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/lima/lima_drv.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/lima/lima_drv.c @@ -486,3 +486,4 @@ MODULE_AUTHOR("Lima Project Developers"); MODULE_DESCRIPTION("Lima DRM Driver"); MODULE_LICENSE("GPL v2"); +MODULE_SOFTDEP("pre: governor_simpleondemand"); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/lima/lima_gem.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/lima/lima_gem.c @@ -75,29 +75,34 @@ } else { bo->base.sgt = kmalloc(sizeof(*bo->base.sgt), GFP_KERNEL); if (!bo->base.sgt) { - sg_free_table(&sgt); - return -ENOMEM; + ret = -ENOMEM; + goto err_out0; } } ret = dma_map_sgtable(dev, &sgt, DMA_BIDIRECTIONAL, 0); - if (ret) { - sg_free_table(&sgt); - kfree(bo->base.sgt); - bo->base.sgt = NULL; - return ret; - } + if (ret) + goto err_out1; *bo->base.sgt = sgt; if (vm) { ret = lima_vm_map_bo(vm, bo, old_size >> PAGE_SHIFT); if (ret) - return ret; + goto err_out2; } bo->heap_size = new_size; return 0; + +err_out2: + dma_unmap_sgtable(dev, &sgt, DMA_BIDIRECTIONAL, 0); +err_out1: + kfree(bo->base.sgt); + bo->base.sgt = NULL; +err_out0: + sg_free_table(&sgt); + return ret; } int lima_gem_create_handle(struct drm_device *dev, struct drm_file *file, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/lima/lima_gp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/lima/lima_gp.c @@ -166,6 +166,11 @@ gp_write(LIMA_GP_CMD, cmd); } +static int lima_gp_bus_stop_poll(struct lima_ip *ip) +{ + return !!(gp_read(LIMA_GP_STATUS) & LIMA_GP_STATUS_BUS_STOPPED); +} + static int lima_gp_hard_reset_poll(struct lima_ip *ip) { gp_write(LIMA_GP_PERF_CNT_0_LIMIT, 0xC01A0000); @@ -179,6 +184,13 @@ gp_write(LIMA_GP_PERF_CNT_0_LIMIT, 0xC0FFE000); gp_write(LIMA_GP_INT_MASK, 0); + + gp_write(LIMA_GP_CMD, LIMA_GP_CMD_STOP_BUS); + ret = lima_poll_timeout(ip, lima_gp_bus_stop_poll, 10, 100); + if (ret) { + dev_err(dev->dev, "%s bus stop timeout\n", lima_ip_name(ip)); + return ret; + } gp_write(LIMA_GP_CMD, LIMA_GP_CMD_RESET); ret = lima_poll_timeout(ip, lima_gp_hard_reset_poll, 10, 100); if (ret) { @@ -212,6 +224,13 @@ lima_sched_pipe_task_done(pipe); } +static void lima_gp_task_mask_irq(struct lima_sched_pipe *pipe) +{ + struct lima_ip *ip = pipe->processor[0]; + + gp_write(LIMA_GP_INT_MASK, 0); +} + static int lima_gp_task_recover(struct lima_sched_pipe *pipe) { struct lima_ip *ip = pipe->processor[0]; @@ -317,7 +336,9 @@ void lima_gp_fini(struct lima_ip *ip) { + struct lima_device *dev = ip->dev; + devm_free_irq(dev->dev, ip->irq, ip); } int lima_gp_pipe_init(struct lima_device *dev) @@ -344,6 +365,7 @@ pipe->task_error = lima_gp_task_error; pipe->task_mmu_error = lima_gp_task_mmu_error; pipe->task_recover = lima_gp_task_recover; + pipe->task_mask_irq = lima_gp_task_mask_irq; return 0; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/lima/lima_mmu.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/lima/lima_mmu.c @@ -118,7 +118,12 @@ void lima_mmu_fini(struct lima_ip *ip) { + struct lima_device *dev = ip->dev; + if (ip->id == lima_ip_ppmmu_bcast) + return; + + devm_free_irq(dev->dev, ip->irq, ip); } void lima_mmu_flush_tlb(struct lima_ip *ip) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/lima/lima_pp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/lima/lima_pp.c @@ -266,7 +266,9 @@ void lima_pp_fini(struct lima_ip *ip) { + struct lima_device *dev = ip->dev; + devm_free_irq(dev->dev, ip->irq, ip); } int lima_pp_bcast_resume(struct lima_ip *ip) @@ -299,7 +301,9 @@ void lima_pp_bcast_fini(struct lima_ip *ip) { + struct lima_device *dev = ip->dev; + devm_free_irq(dev->dev, ip->irq, ip); } static int lima_pp_task_validate(struct lima_sched_pipe *pipe, @@ -408,6 +412,9 @@ lima_pp_hard_reset(ip); } + + if (pipe->bcast_processor) + lima_bcast_reset(pipe->bcast_processor); } static void lima_pp_task_mmu_error(struct lima_sched_pipe *pipe) @@ -416,6 +423,20 @@ lima_sched_pipe_task_done(pipe); } +static void lima_pp_task_mask_irq(struct lima_sched_pipe *pipe) +{ + int i; + + for (i = 0; i < pipe->num_processor; i++) { + struct lima_ip *ip = pipe->processor[i]; + + pp_write(LIMA_PP_INT_MASK, 0); + } + + if (pipe->bcast_processor) + lima_bcast_mask_irq(pipe->bcast_processor); +} + static struct kmem_cache *lima_pp_task_slab; static int lima_pp_task_slab_refcnt; @@ -447,6 +468,7 @@ pipe->task_fini = lima_pp_task_fini; pipe->task_error = lima_pp_task_error; pipe->task_mmu_error = lima_pp_task_mmu_error; + pipe->task_mask_irq = lima_pp_task_mask_irq; return 0; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/lima/lima_sched.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/lima/lima_sched.c @@ -402,6 +402,13 @@ struct lima_sched_task *task = to_lima_task(job); struct lima_device *ldev = pipe->ldev; + /* + * The task might still finish while this timeout handler runs. + * To prevent a race condition on its completion, mask all irqs + * on the running core until the next hard reset completes. + */ + pipe->task_mask_irq(pipe); + if (!pipe->error) DRM_ERROR("lima job timeout\n"); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/lima/lima_sched.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/lima/lima_sched.h @@ -80,6 +80,7 @@ void (*task_error)(struct lima_sched_pipe *pipe); void (*task_mmu_error)(struct lima_sched_pipe *pipe); int (*task_recover)(struct lima_sched_pipe *pipe); + void (*task_mask_irq)(struct lima_sched_pipe *pipe); struct work_struct recover_work; }; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/mcde/mcde_drv.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/mcde/mcde_drv.c @@ -473,6 +473,7 @@ }, {}, }; +MODULE_DEVICE_TABLE(of, mcde_of_match); static struct platform_driver mcde_driver = { .driver = { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/mediatek/Kconfig +++ linux-xilinx-6.8.0/drivers/gpu/drm/mediatek/Kconfig @@ -10,9 +10,6 @@ select DRM_KMS_HELPER select DRM_MIPI_DSI select DRM_PANEL - select MEMORY - select MTK_SMI - select PHY_MTK_MIPI_DSI select VIDEOMODE_HELPERS help Choose this option if you have a Mediatek SoCs. @@ -23,7 +20,6 @@ config DRM_MEDIATEK_DP tristate "DRM DPTX Support for MediaTek SoCs" depends on DRM_MEDIATEK - select PHY_MTK_DP select DRM_DISPLAY_HELPER select DRM_DISPLAY_DP_HELPER select DRM_DP_AUX_BUS @@ -34,6 +30,5 @@ tristate "DRM HDMI Support for Mediatek SoCs" depends on DRM_MEDIATEK select SND_SOC_HDMI_CODEC if SND_SOC - select PHY_MTK_HDMI help DRM/KMS HDMI driver for Mediatek SoCs --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/mediatek/mtk_disp_ovl.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/mediatek/mtk_disp_ovl.c @@ -38,6 +38,7 @@ #define DISP_REG_OVL_PITCH_MSB(n) (0x0040 + 0x20 * (n)) #define OVL_PITCH_MSB_2ND_SUBBUF BIT(16) #define DISP_REG_OVL_PITCH(n) (0x0044 + 0x20 * (n)) +#define OVL_CONST_BLEND BIT(28) #define DISP_REG_OVL_RDMA_CTRL(n) (0x00c0 + 0x20 * (n)) #define DISP_REG_OVL_RDMA_GMC(n) (0x00c8 + 0x20 * (n)) #define DISP_REG_OVL_ADDR_MT2701 0x0040 @@ -71,6 +72,8 @@ #define OVL_CON_VIRT_FLIP BIT(9) #define OVL_CON_HORZ_FLIP BIT(10) +#define OVL_COLOR_ALPHA GENMASK(31, 24) + static const u32 mt8173_formats[] = { DRM_FORMAT_XRGB8888, DRM_FORMAT_ARGB8888, @@ -273,7 +276,13 @@ if (w != 0 && h != 0) mtk_ddp_write_relaxed(cmdq_pkt, h << 16 | w, &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_ROI_SIZE); - mtk_ddp_write_relaxed(cmdq_pkt, 0x0, &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_ROI_BGCLR); + + /* + * The background color must be opaque black (ARGB), + * otherwise the alpha blending will have no effect + */ + mtk_ddp_write_relaxed(cmdq_pkt, OVL_COLOR_ALPHA, &ovl->cmdq_reg, + ovl->regs, DISP_REG_OVL_ROI_BGCLR); mtk_ddp_write(cmdq_pkt, 0x1, &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_RST); mtk_ddp_write(cmdq_pkt, 0x0, &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_RST); @@ -358,11 +367,6 @@ static unsigned int ovl_fmt_convert(struct mtk_disp_ovl *ovl, unsigned int fmt) { - /* The return value in switch "MEM_MODE_INPUT_FORMAT_XXX" - * is defined in mediatek HW data sheet. - * The alphabet order in XXX is no relation to data - * arrangement in memory. - */ switch (fmt) { default: case DRM_FORMAT_RGB565: @@ -394,6 +398,29 @@ } } +static void mtk_ovl_afbc_layer_config(struct mtk_disp_ovl *ovl, + unsigned int idx, + struct mtk_plane_pending_state *pending, + struct cmdq_pkt *cmdq_pkt) +{ + unsigned int pitch_msb = pending->pitch >> 16; + unsigned int hdr_pitch = pending->hdr_pitch; + unsigned int hdr_addr = pending->hdr_addr; + + if (pending->modifier != DRM_FORMAT_MOD_LINEAR) { + mtk_ddp_write_relaxed(cmdq_pkt, hdr_addr, &ovl->cmdq_reg, ovl->regs, + DISP_REG_OVL_HDR_ADDR(ovl, idx)); + mtk_ddp_write_relaxed(cmdq_pkt, + OVL_PITCH_MSB_2ND_SUBBUF | pitch_msb, + &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_PITCH_MSB(idx)); + mtk_ddp_write_relaxed(cmdq_pkt, hdr_pitch, &ovl->cmdq_reg, ovl->regs, + DISP_REG_OVL_HDR_PITCH(ovl, idx)); + } else { + mtk_ddp_write_relaxed(cmdq_pkt, pitch_msb, + &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_PITCH_MSB(idx)); + } +} + void mtk_ovl_layer_config(struct device *dev, unsigned int idx, struct mtk_plane_state *state, struct cmdq_pkt *cmdq_pkt) @@ -401,23 +428,13 @@ struct mtk_disp_ovl *ovl = dev_get_drvdata(dev); struct mtk_plane_pending_state *pending = &state->pending; unsigned int addr = pending->addr; - unsigned int hdr_addr = pending->hdr_addr; - unsigned int pitch = pending->pitch; - unsigned int hdr_pitch = pending->hdr_pitch; + unsigned int pitch_lsb = pending->pitch & GENMASK(15, 0); unsigned int fmt = pending->format; + unsigned int rotation = pending->rotation; unsigned int offset = (pending->y << 16) | pending->x; unsigned int src_size = (pending->height << 16) | pending->width; + unsigned int ignore_pixel_alpha = 0; unsigned int con; - bool is_afbc = pending->modifier != DRM_FORMAT_MOD_LINEAR; - union overlay_pitch { - struct split_pitch { - u16 lsb; - u16 msb; - } split_pitch; - u32 pitch; - } overlay_pitch; - - overlay_pitch.pitch = pitch; if (!pending->enable) { mtk_ovl_layer_off(dev, idx, cmdq_pkt); @@ -428,23 +445,39 @@ if (state->base.fb && state->base.fb->format->has_alpha) con |= OVL_CON_AEN | OVL_CON_ALPHA; - if (pending->rotation & DRM_MODE_REFLECT_Y) { + /* CONST_BLD must be enabled for XRGB formats although the alpha channel + * can be ignored, or OVL will still read the value from memory. + * For RGB888 related formats, whether CONST_BLD is enabled or not won't + * affect the result. Therefore we use !has_alpha as the condition. + */ + if (state->base.fb && !state->base.fb->format->has_alpha) + ignore_pixel_alpha = OVL_CONST_BLEND; + + /* + * Treat rotate 180 as flip x + flip y, and XOR the original rotation value + * to flip x + flip y to support both in the same time. + */ + if (rotation & DRM_MODE_ROTATE_180) + rotation ^= DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y; + + if (rotation & DRM_MODE_REFLECT_Y) { con |= OVL_CON_VIRT_FLIP; addr += (pending->height - 1) * pending->pitch; } - if (pending->rotation & DRM_MODE_REFLECT_X) { + if (rotation & DRM_MODE_REFLECT_X) { con |= OVL_CON_HORZ_FLIP; addr += pending->pitch - 1; } if (ovl->data->supports_afbc) - mtk_ovl_set_afbc(ovl, cmdq_pkt, idx, is_afbc); + mtk_ovl_set_afbc(ovl, cmdq_pkt, idx, + pending->modifier != DRM_FORMAT_MOD_LINEAR); mtk_ddp_write_relaxed(cmdq_pkt, con, &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_CON(idx)); - mtk_ddp_write_relaxed(cmdq_pkt, overlay_pitch.split_pitch.lsb, &ovl->cmdq_reg, ovl->regs, - DISP_REG_OVL_PITCH(idx)); + mtk_ddp_write_relaxed(cmdq_pkt, pitch_lsb | ignore_pixel_alpha, + &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_PITCH(idx)); mtk_ddp_write_relaxed(cmdq_pkt, src_size, &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_SRC_SIZE(idx)); mtk_ddp_write_relaxed(cmdq_pkt, offset, &ovl->cmdq_reg, ovl->regs, @@ -452,19 +485,8 @@ mtk_ddp_write_relaxed(cmdq_pkt, addr, &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_ADDR(ovl, idx)); - if (is_afbc) { - mtk_ddp_write_relaxed(cmdq_pkt, hdr_addr, &ovl->cmdq_reg, ovl->regs, - DISP_REG_OVL_HDR_ADDR(ovl, idx)); - mtk_ddp_write_relaxed(cmdq_pkt, - OVL_PITCH_MSB_2ND_SUBBUF | overlay_pitch.split_pitch.msb, - &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_PITCH_MSB(idx)); - mtk_ddp_write_relaxed(cmdq_pkt, hdr_pitch, &ovl->cmdq_reg, ovl->regs, - DISP_REG_OVL_HDR_PITCH(ovl, idx)); - } else { - mtk_ddp_write_relaxed(cmdq_pkt, - overlay_pitch.split_pitch.msb, - &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_PITCH_MSB(idx)); - } + if (ovl->data->supports_afbc) + mtk_ovl_afbc_layer_config(ovl, idx, pending, cmdq_pkt); mtk_ovl_set_bit_depth(dev, idx, fmt, cmdq_pkt); mtk_ovl_layer_on(dev, idx, cmdq_pkt); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c @@ -132,7 +132,7 @@ merge = ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_MERGE0 + idx]; ethdr = ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_ETHDR0]; - if (!pending->enable) { + if (!pending->enable || !pending->width || !pending->height) { mtk_merge_stop_cmdq(merge, cmdq_pkt); mtk_mdp_rdma_stop(rdma_l, cmdq_pkt); mtk_mdp_rdma_stop(rdma_r, cmdq_pkt); @@ -480,8 +480,10 @@ } comp_pdev = of_find_device_by_node(node); - if (!comp_pdev) + if (!comp_pdev) { + of_node_put(node); return -EPROBE_DEFER; + } priv->ovl_adaptor_comp[id] = &comp_pdev->dev; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/mediatek/mtk_dp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/mediatek/mtk_dp.c @@ -145,6 +145,89 @@ u16 audio_m_div2_bit; }; +static const struct mtk_dp_efuse_fmt mt8188_dp_efuse_fmt[MTK_DP_CAL_MAX] = { + [MTK_DP_CAL_GLB_BIAS_TRIM] = { + .idx = 0, + .shift = 10, + .mask = 0x1f, + .min_val = 1, + .max_val = 0x1e, + .default_val = 0xf, + }, + [MTK_DP_CAL_CLKTX_IMPSE] = { + .idx = 0, + .shift = 15, + .mask = 0xf, + .min_val = 1, + .max_val = 0xe, + .default_val = 0x8, + }, + [MTK_DP_CAL_LN_TX_IMPSEL_PMOS_0] = { + .idx = 1, + .shift = 0, + .mask = 0xf, + .min_val = 1, + .max_val = 0xe, + .default_val = 0x8, + }, + [MTK_DP_CAL_LN_TX_IMPSEL_PMOS_1] = { + .idx = 1, + .shift = 8, + .mask = 0xf, + .min_val = 1, + .max_val = 0xe, + .default_val = 0x8, + }, + [MTK_DP_CAL_LN_TX_IMPSEL_PMOS_2] = { + .idx = 1, + .shift = 16, + .mask = 0xf, + .min_val = 1, + .max_val = 0xe, + .default_val = 0x8, + }, + [MTK_DP_CAL_LN_TX_IMPSEL_PMOS_3] = { + .idx = 1, + .shift = 24, + .mask = 0xf, + .min_val = 1, + .max_val = 0xe, + .default_val = 0x8, + }, + [MTK_DP_CAL_LN_TX_IMPSEL_NMOS_0] = { + .idx = 1, + .shift = 4, + .mask = 0xf, + .min_val = 1, + .max_val = 0xe, + .default_val = 0x8, + }, + [MTK_DP_CAL_LN_TX_IMPSEL_NMOS_1] = { + .idx = 1, + .shift = 12, + .mask = 0xf, + .min_val = 1, + .max_val = 0xe, + .default_val = 0x8, + }, + [MTK_DP_CAL_LN_TX_IMPSEL_NMOS_2] = { + .idx = 1, + .shift = 20, + .mask = 0xf, + .min_val = 1, + .max_val = 0xe, + .default_val = 0x8, + }, + [MTK_DP_CAL_LN_TX_IMPSEL_NMOS_3] = { + .idx = 1, + .shift = 28, + .mask = 0xf, + .min_val = 1, + .max_val = 0xe, + .default_val = 0x8, + }, +}; + static const struct mtk_dp_efuse_fmt mt8195_edp_efuse_fmt[MTK_DP_CAL_MAX] = { [MTK_DP_CAL_GLB_BIAS_TRIM] = { .idx = 3, @@ -460,18 +543,16 @@ enum dp_pixelformat color_format) { u32 val; - - /* update MISC0 */ - mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3034, - color_format << DP_TEST_COLOR_FORMAT_SHIFT, - DP_TEST_COLOR_FORMAT_MASK); + u32 misc0_color; switch (color_format) { case DP_PIXELFORMAT_YUV422: val = PIXEL_ENCODE_FORMAT_DP_ENC0_P0_YCBCR422; + misc0_color = DP_COLOR_FORMAT_YCbCr422; break; case DP_PIXELFORMAT_RGB: val = PIXEL_ENCODE_FORMAT_DP_ENC0_P0_RGB; + misc0_color = DP_COLOR_FORMAT_RGB; break; default: drm_warn(mtk_dp->drm_dev, "Unsupported color format: %d\n", @@ -479,6 +560,11 @@ return -EINVAL; } + /* update MISC0 */ + mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3034, + misc0_color, + DP_TEST_COLOR_FORMAT_MASK); + mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_303C, val, PIXEL_ENCODE_FORMAT_DP_ENC0_P0_MASK); return 0; @@ -2017,7 +2103,6 @@ struct mtk_dp *mtk_dp = mtk_dp_from_bridge(bridge); enum drm_connector_status ret = connector_status_disconnected; bool enabled = mtk_dp->enabled; - u8 sink_count = 0; if (!mtk_dp->train_info.cable_plugged_in) return ret; @@ -2032,8 +2117,8 @@ * function, we just need to check the HPD connection to check * whether we connect to a sink device. */ - drm_dp_dpcd_readb(&mtk_dp->aux, DP_SINK_COUNT, &sink_count); - if (DP_GET_SINK_COUNT(sink_count)) + + if (drm_dp_read_sink_count(&mtk_dp->aux) > 0) ret = connector_status_connected; if (!enabled) @@ -2042,12 +2127,12 @@ return ret; } -static struct edid *mtk_dp_get_edid(struct drm_bridge *bridge, - struct drm_connector *connector) +static const struct drm_edid *mtk_dp_edid_read(struct drm_bridge *bridge, + struct drm_connector *connector) { struct mtk_dp *mtk_dp = mtk_dp_from_bridge(bridge); bool enabled = mtk_dp->enabled; - struct edid *new_edid = NULL; + const struct drm_edid *drm_edid; struct mtk_dp_audio_cfg *audio_caps = &mtk_dp->info.audio_cur_cfg; if (!enabled) { @@ -2055,7 +2140,7 @@ mtk_dp_aux_panel_poweron(mtk_dp, true); } - new_edid = drm_get_edid(connector, &mtk_dp->aux.ddc); + drm_edid = drm_edid_read_ddc(connector, &mtk_dp->aux.ddc); /* * Parse capability here to let atomic_get_input_bus_fmts and @@ -2063,17 +2148,32 @@ */ if (mtk_dp_parse_capabilities(mtk_dp)) { drm_err(mtk_dp->drm_dev, "Can't parse capabilities\n"); - kfree(new_edid); - new_edid = NULL; + drm_edid_free(drm_edid); + drm_edid = NULL; } - if (new_edid) { + if (drm_edid) { + /* + * FIXME: get rid of drm_edid_raw() + */ + const struct edid *edid = drm_edid_raw(drm_edid); struct cea_sad *sads; + int ret; - audio_caps->sad_count = drm_edid_to_sad(new_edid, &sads); - kfree(sads); + ret = drm_edid_to_sad(edid, &sads); + /* Ignore any errors */ + if (ret < 0) + ret = 0; + if (ret) + kfree(sads); + audio_caps->sad_count = ret; - audio_caps->detect_monitor = drm_detect_monitor_audio(new_edid); + /* + * FIXME: This should use connector->display_info.has_audio from + * a path that has read the EDID and called + * drm_edid_connector_update(). + */ + audio_caps->detect_monitor = drm_detect_monitor_audio(edid); } if (!enabled) { @@ -2081,7 +2181,7 @@ drm_atomic_bridge_chain_post_disable(bridge, connector->state->state); } - return new_edid; + return drm_edid; } static ssize_t mtk_dp_aux_transfer(struct drm_dp_aux *mtk_aux, @@ -2095,7 +2195,7 @@ if (mtk_dp->bridge.type != DRM_MODE_CONNECTOR_eDP && !mtk_dp->train_info.cable_plugged_in) { - ret = -EAGAIN; + ret = -EIO; goto err; } @@ -2310,12 +2410,19 @@ { struct mtk_dp *mtk_dp = mtk_dp_from_bridge(bridge); u32 bpp = info->color_formats & DRM_COLOR_FORMAT_YCBCR422 ? 16 : 24; - u32 rate = min_t(u32, drm_dp_max_link_rate(mtk_dp->rx_cap) * - drm_dp_max_lane_count(mtk_dp->rx_cap), - drm_dp_bw_code_to_link_rate(mtk_dp->max_linkrate) * - mtk_dp->max_lanes); + u32 lane_count_min = mtk_dp->train_info.lane_count; + u32 rate = drm_dp_bw_code_to_link_rate(mtk_dp->train_info.link_rate) * + lane_count_min; - if (rate < mode->clock * bpp / 8) + /* + *FEC overhead is approximately 2.4% from DP 1.4a spec 2.2.1.4.2. + *The down-spread amplitude shall either be disabled (0.0%) or up + *to 0.5% from 1.4a 3.5.2.6. Add up to approximately 3% total overhead. + * + *Because rate is already divided by 10, + *mode->clock does not need to be multiplied by 10 + */ + if ((rate * 97 / 100) < (mode->clock * bpp / 8)) return MODE_CLOCK_HIGH; return MODE_OK; @@ -2356,10 +2463,9 @@ struct drm_display_mode *mode = &crtc_state->adjusted_mode; struct drm_display_info *display_info = &conn_state->connector->display_info; - u32 rate = min_t(u32, drm_dp_max_link_rate(mtk_dp->rx_cap) * - drm_dp_max_lane_count(mtk_dp->rx_cap), - drm_dp_bw_code_to_link_rate(mtk_dp->max_linkrate) * - mtk_dp->max_lanes); + u32 lane_count_min = mtk_dp->train_info.lane_count; + u32 rate = drm_dp_bw_code_to_link_rate(mtk_dp->train_info.link_rate) * + lane_count_min; *num_input_fmts = 0; @@ -2368,8 +2474,8 @@ * datarate of YUV422 and sink device supports YUV422, we output YUV422 * format. Use this condition, we can support more resolution. */ - if ((rate < (mode->clock * 24 / 8)) && - (rate > (mode->clock * 16 / 8)) && + if (((rate * 97 / 100) < (mode->clock * 24 / 8)) && + ((rate * 97 / 100) > (mode->clock * 16 / 8)) && (display_info->color_formats & DRM_COLOR_FORMAT_YCBCR422)) { input_fmts = kcalloc(1, sizeof(*input_fmts), GFP_KERNEL); if (!input_fmts) @@ -2433,7 +2539,7 @@ .atomic_enable = mtk_dp_bridge_atomic_enable, .atomic_disable = mtk_dp_bridge_atomic_disable, .mode_valid = mtk_dp_bridge_mode_valid, - .get_edid = mtk_dp_get_edid, + .edid_read = mtk_dp_edid_read, .detect = mtk_dp_bdg_detect, }; @@ -2758,7 +2864,7 @@ static const struct mtk_dp_data mt8188_dp_data = { .bridge_type = DRM_MODE_CONNECTOR_DisplayPort, .smc_cmd = MTK_DP_SIP_ATF_VIDEO_UNMUTE, - .efuse_fmt = mt8195_dp_efuse_fmt, + .efuse_fmt = mt8188_dp_efuse_fmt, .audio_supported = true, .audio_pkt_in_hblank_area = true, .audio_m_div2_bit = MT8188_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/mediatek/mtk_drm_crtc.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/mediatek/mtk_drm_crtc.c @@ -69,6 +69,8 @@ /* lock for display hardware access */ struct mutex hw_lock; bool config_updating; + /* lock for config_updating to cmd buffer */ + spinlock_t config_lock; }; struct mtk_crtc_state { @@ -95,20 +97,32 @@ struct drm_crtc *crtc = &mtk_crtc->base; unsigned long flags; - spin_lock_irqsave(&crtc->dev->event_lock, flags); - drm_crtc_send_vblank_event(crtc, mtk_crtc->event); - drm_crtc_vblank_put(crtc); - mtk_crtc->event = NULL; - spin_unlock_irqrestore(&crtc->dev->event_lock, flags); + if (mtk_crtc->event) { + spin_lock_irqsave(&crtc->dev->event_lock, flags); + drm_crtc_send_vblank_event(crtc, mtk_crtc->event); + drm_crtc_vblank_put(crtc); + mtk_crtc->event = NULL; + spin_unlock_irqrestore(&crtc->dev->event_lock, flags); + } } static void mtk_drm_finish_page_flip(struct mtk_drm_crtc *mtk_crtc) { + unsigned long flags; + drm_crtc_handle_vblank(&mtk_crtc->base); + +#if IS_REACHABLE(CONFIG_MTK_CMDQ) + if (mtk_crtc->cmdq_client.chan) + return; +#endif + + spin_lock_irqsave(&mtk_crtc->config_lock, flags); if (!mtk_crtc->config_updating && mtk_crtc->pending_needs_vblank) { mtk_drm_crtc_finish_page_flip(mtk_crtc); mtk_crtc->pending_needs_vblank = false; } + spin_unlock_irqrestore(&mtk_crtc->config_lock, flags); } #if IS_REACHABLE(CONFIG_MTK_CMDQ) @@ -291,12 +305,17 @@ struct mtk_drm_crtc *mtk_crtc = container_of(cmdq_cl, struct mtk_drm_crtc, cmdq_client); struct mtk_crtc_state *state; unsigned int i; + unsigned long flags; if (data->sta < 0) return; state = to_mtk_crtc_state(mtk_crtc->base.state); + spin_lock_irqsave(&mtk_crtc->config_lock, flags); + if (mtk_crtc->config_updating) + goto ddp_cmdq_cb_out; + state->pending_config = false; if (mtk_crtc->pending_planes) { @@ -323,6 +342,15 @@ mtk_crtc->pending_async_planes = false; } +ddp_cmdq_cb_out: + + if (mtk_crtc->pending_needs_vblank) { + mtk_drm_crtc_finish_page_flip(mtk_crtc); + mtk_crtc->pending_needs_vblank = false; + } + + spin_unlock_irqrestore(&mtk_crtc->config_lock, flags); + mtk_crtc->cmdq_vblank_cnt = 0; wake_up(&mtk_crtc->cb_blocking_queue); } @@ -432,6 +460,7 @@ { struct drm_device *drm = mtk_crtc->base.dev; struct drm_crtc *crtc = &mtk_crtc->base; + unsigned long flags; int i; for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) { @@ -463,10 +492,10 @@ pm_runtime_put(drm->dev); if (crtc->state->event && !crtc->state->active) { - spin_lock_irq(&crtc->dev->event_lock); + spin_lock_irqsave(&crtc->dev->event_lock, flags); drm_crtc_send_vblank_event(crtc, crtc->state->event); crtc->state->event = NULL; - spin_unlock_irq(&crtc->dev->event_lock); + spin_unlock_irqrestore(&crtc->dev->event_lock, flags); } } @@ -555,9 +584,14 @@ struct mtk_drm_private *priv = crtc->dev->dev_private; unsigned int pending_planes = 0, pending_async_planes = 0; int i; + unsigned long flags; mutex_lock(&mtk_crtc->hw_lock); + + spin_lock_irqsave(&mtk_crtc->config_lock, flags); mtk_crtc->config_updating = true; + spin_unlock_irqrestore(&mtk_crtc->config_lock, flags); + if (needs_vblank) mtk_crtc->pending_needs_vblank = true; @@ -607,11 +641,19 @@ */ mtk_crtc->cmdq_vblank_cnt = 3; + spin_lock_irqsave(&mtk_crtc->config_lock, flags); + mtk_crtc->config_updating = false; + spin_unlock_irqrestore(&mtk_crtc->config_lock, flags); + mbox_send_message(mtk_crtc->cmdq_client.chan, cmdq_handle); mbox_client_txdone(mtk_crtc->cmdq_client.chan, 0); } -#endif +#else + spin_lock_irqsave(&mtk_crtc->config_lock, flags); mtk_crtc->config_updating = false; + spin_unlock_irqrestore(&mtk_crtc->config_lock, flags); +#endif + mutex_unlock(&mtk_crtc->hw_lock); } @@ -990,10 +1032,10 @@ mtk_crtc->mmsys_dev = priv->mmsys_dev; mtk_crtc->ddp_comp_nr = path_len; - mtk_crtc->ddp_comp = devm_kmalloc_array(dev, - mtk_crtc->ddp_comp_nr + (conn_routes ? 1 : 0), - sizeof(*mtk_crtc->ddp_comp), - GFP_KERNEL); + mtk_crtc->ddp_comp = devm_kcalloc(dev, + mtk_crtc->ddp_comp_nr + (conn_routes ? 1 : 0), + sizeof(*mtk_crtc->ddp_comp), + GFP_KERNEL); if (!mtk_crtc->ddp_comp) return -ENOMEM; @@ -1057,6 +1099,7 @@ drm_mode_crtc_set_gamma_size(&mtk_crtc->base, gamma_lut_size); drm_crtc_enable_color_mgmt(&mtk_crtc->base, 0, has_ctm, gamma_lut_size); mutex_init(&mtk_crtc->hw_lock); + spin_lock_init(&mtk_crtc->config_lock); #if IS_REACHABLE(CONFIG_MTK_CMDQ) i = priv->mbox_index++; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c @@ -587,7 +587,7 @@ int ret; #endif - if (comp_id < 0 || comp_id >= DDP_COMPONENT_DRM_ID_MAX) + if (comp_id >= DDP_COMPONENT_DRM_ID_MAX) return -EINVAL; type = mtk_ddp_matches[comp_id].type; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/mediatek/mtk_drm_drv.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/mediatek/mtk_drm_drv.c @@ -294,6 +294,9 @@ .conn_routes = mt8188_mtk_ddp_main_routes, .num_conn_routes = ARRAY_SIZE(mt8188_mtk_ddp_main_routes), .mmsys_dev_num = 1, + .max_width = 8191, + .min_width = 1, + .min_height = 1, }; static const struct mtk_mmsys_driver_data mt8192_mmsys_driver_data = { @@ -308,6 +311,9 @@ .main_path = mt8195_mtk_ddp_main, .main_len = ARRAY_SIZE(mt8195_mtk_ddp_main), .mmsys_dev_num = 2, + .max_width = 8191, + .min_width = 1, + .min_height = 1, }; static const struct mtk_mmsys_driver_data mt8195_vdosys1_driver_data = { @@ -315,6 +321,9 @@ .ext_len = ARRAY_SIZE(mt8195_mtk_ddp_ext), .mmsys_id = 1, .mmsys_dev_num = 2, + .max_width = 8191, + .min_width = 2, /* 2-pixel align when ethdr is bypassed */ + .min_height = 1, }; static const struct of_device_id mtk_drm_of_ids[] = { @@ -394,8 +403,10 @@ if (temp_drm_priv->mtk_drm_bound) cnt++; - if (cnt == MAX_CRTC) + if (cnt == MAX_CRTC) { + of_node_put(node); break; + } } if (drm_priv->data->mmsys_dev_num == cnt) { @@ -491,6 +502,15 @@ for (j = 0; j < private->data->mmsys_dev_num; j++) { priv_n = private->all_drm_private[j]; + if (priv_n->data->max_width) + drm->mode_config.max_width = priv_n->data->max_width; + + if (priv_n->data->min_width) + drm->mode_config.min_width = priv_n->data->min_width; + + if (priv_n->data->min_height) + drm->mode_config.min_height = priv_n->data->min_height; + if (i == CRTC_MAIN && priv_n->data->main_len) { ret = mtk_drm_crtc_create(drm, priv_n->data->main_path, priv_n->data->main_len, j, @@ -518,6 +538,10 @@ } } + /* IGT will check if the cursor size is configured */ + drm->mode_config.cursor_width = 512; + drm->mode_config.cursor_height = 512; + /* Use OVL device for all DMA memory allocations */ crtc = drm_crtc_from_index(drm, 0); if (crtc) @@ -651,6 +675,8 @@ err_free: private->drm = NULL; drm_dev_put(drm); + for (i = 0; i < private->data->mmsys_dev_num; i++) + private->all_drm_private[i]->drm = NULL; return ret; } @@ -739,6 +765,8 @@ .data = (void *)MTK_DISP_OVL }, { .compatible = "mediatek,mt8192-disp-ovl", .data = (void *)MTK_DISP_OVL }, + { .compatible = "mediatek,mt8195-disp-ovl", + .data = (void *)MTK_DISP_OVL }, { .compatible = "mediatek,mt8183-disp-ovl-2l", .data = (void *)MTK_DISP_OVL_2L }, { .compatible = "mediatek,mt8192-disp-ovl-2l", @@ -948,6 +976,13 @@ of_node_put(private->comp_node[i]); } +static void mtk_drm_shutdown(struct platform_device *pdev) +{ + struct mtk_drm_private *private = platform_get_drvdata(pdev); + + drm_atomic_helper_shutdown(private->drm); +} + static int mtk_drm_sys_prepare(struct device *dev) { struct mtk_drm_private *private = dev_get_drvdata(dev); @@ -979,6 +1014,7 @@ static struct platform_driver mtk_drm_platform_driver = { .probe = mtk_drm_probe, .remove_new = mtk_drm_remove, + .shutdown = mtk_drm_shutdown, .driver = { .name = "mediatek-drm", .pm = &mtk_drm_pm_ops, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/mediatek/mtk_drm_drv.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/mediatek/mtk_drm_drv.h @@ -46,6 +46,10 @@ bool shadow_register; unsigned int mmsys_id; unsigned int mmsys_dev_num; + + u16 max_width; + u16 min_width; + u16 min_height; }; struct mtk_drm_private { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/mediatek/mtk_drm_gem.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/mediatek/mtk_drm_gem.c @@ -38,6 +38,9 @@ size = round_up(size, PAGE_SIZE); + if (size == 0) + return ERR_PTR(-EINVAL); + mtk_gem_obj = kzalloc(sizeof(*mtk_gem_obj), GFP_KERNEL); if (!mtk_gem_obj) return ERR_PTR(-ENOMEM); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/mediatek/mtk_drm_plane.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/mediatek/mtk_drm_plane.c @@ -227,6 +227,8 @@ plane->state->src_y = new_state->src_y; plane->state->src_h = new_state->src_h; plane->state->src_w = new_state->src_w; + plane->state->dst.x1 = new_state->dst.x1; + plane->state->dst.y1 = new_state->dst.y1; mtk_plane_update_new_state(new_state, new_plane_state); swap(plane->state->fb, new_state->fb); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/mediatek/mtk_dsi.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -71,8 +71,8 @@ #define DSI_PS_WC 0x3fff #define DSI_PS_SEL (3 << 16) #define PACKED_PS_16BIT_RGB565 (0 << 16) -#define LOOSELY_PS_18BIT_RGB666 (1 << 16) -#define PACKED_PS_18BIT_RGB666 (2 << 16) +#define PACKED_PS_18BIT_RGB666 (1 << 16) +#define LOOSELY_PS_24BIT_RGB666 (2 << 16) #define PACKED_PS_24BIT_RGB888 (3 << 16) #define DSI_VSA_NL 0x20 @@ -130,11 +130,11 @@ #define CLK_HS_POST (0xff << 8) #define CLK_HS_EXIT (0xff << 16) -#define DSI_VM_CMD_CON 0x130 +/* DSI_VM_CMD_CON */ #define VM_CMD_EN BIT(0) #define TS_VFP_EN BIT(5) -#define DSI_SHADOW_DEBUG 0x190U +/* DSI_SHADOW_DEBUG */ #define FORCE_COMMIT BIT(0) #define BYPASS_SHADOW BIT(1) @@ -177,6 +177,8 @@ struct mtk_dsi_driver_data { const u32 reg_cmdq_off; + const u32 reg_vm_cmd_off; + const u32 reg_shadow_dbg_off; bool has_shadow_ctl; bool has_size_ctl; bool cmdq_long_packet_ctl; @@ -346,8 +348,8 @@ static void mtk_dsi_set_vm_cmd(struct mtk_dsi *dsi) { - mtk_dsi_mask(dsi, DSI_VM_CMD_CON, VM_CMD_EN, VM_CMD_EN); - mtk_dsi_mask(dsi, DSI_VM_CMD_CON, TS_VFP_EN, TS_VFP_EN); + mtk_dsi_mask(dsi, dsi->driver_data->reg_vm_cmd_off, VM_CMD_EN, VM_CMD_EN); + mtk_dsi_mask(dsi, dsi->driver_data->reg_vm_cmd_off, TS_VFP_EN, TS_VFP_EN); } static void mtk_dsi_ps_control_vact(struct mtk_dsi *dsi) @@ -369,10 +371,10 @@ ps_bpp_mode |= PACKED_PS_24BIT_RGB888; break; case MIPI_DSI_FMT_RGB666: - ps_bpp_mode |= PACKED_PS_18BIT_RGB666; + ps_bpp_mode |= LOOSELY_PS_24BIT_RGB666; break; case MIPI_DSI_FMT_RGB666_PACKED: - ps_bpp_mode |= LOOSELY_PS_18BIT_RGB666; + ps_bpp_mode |= PACKED_PS_18BIT_RGB666; break; case MIPI_DSI_FMT_RGB565: ps_bpp_mode |= PACKED_PS_16BIT_RGB565; @@ -426,7 +428,7 @@ dsi_tmp_buf_bpp = 3; break; case MIPI_DSI_FMT_RGB666: - tmp_reg = LOOSELY_PS_18BIT_RGB666; + tmp_reg = LOOSELY_PS_24BIT_RGB666; dsi_tmp_buf_bpp = 3; break; case MIPI_DSI_FMT_RGB666_PACKED: @@ -660,7 +662,7 @@ if (dsi->driver_data->has_shadow_ctl) writel(FORCE_COMMIT | BYPASS_SHADOW, - dsi->regs + DSI_SHADOW_DEBUG); + dsi->regs + dsi->driver_data->reg_shadow_dbg_off); mtk_dsi_reset_engine(dsi); mtk_dsi_phy_timconfig(dsi); @@ -1223,26 +1225,36 @@ static const struct mtk_dsi_driver_data mt8173_dsi_driver_data = { .reg_cmdq_off = 0x200, + .reg_vm_cmd_off = 0x130, + .reg_shadow_dbg_off = 0x190 }; static const struct mtk_dsi_driver_data mt2701_dsi_driver_data = { .reg_cmdq_off = 0x180, + .reg_vm_cmd_off = 0x130, + .reg_shadow_dbg_off = 0x190 }; static const struct mtk_dsi_driver_data mt8183_dsi_driver_data = { .reg_cmdq_off = 0x200, + .reg_vm_cmd_off = 0x130, + .reg_shadow_dbg_off = 0x190, .has_shadow_ctl = true, .has_size_ctl = true, }; static const struct mtk_dsi_driver_data mt8186_dsi_driver_data = { .reg_cmdq_off = 0xd00, + .reg_vm_cmd_off = 0x200, + .reg_shadow_dbg_off = 0xc00, .has_shadow_ctl = true, .has_size_ctl = true, }; static const struct mtk_dsi_driver_data mt8188_dsi_driver_data = { .reg_cmdq_off = 0xd00, + .reg_vm_cmd_off = 0x200, + .reg_shadow_dbg_off = 0xc00, .has_shadow_ctl = true, .has_size_ctl = true, .cmdq_long_packet_ctl = true, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/mediatek/mtk_ethdr.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/mediatek/mtk_ethdr.c @@ -50,7 +50,6 @@ #define MIXER_INX_MODE_BYPASS 0 #define MIXER_INX_MODE_EVEN_EXTEND 1 -#define DEFAULT_9BIT_ALPHA 0x100 #define MIXER_ALPHA_AEN BIT(8) #define MIXER_ALPHA 0xff #define ETHDR_CLK_NUM 13 @@ -154,13 +153,19 @@ unsigned int offset = (pending->x & 1) << 31 | pending->y << 16 | pending->x; unsigned int align_width = ALIGN_DOWN(pending->width, 2); unsigned int alpha_con = 0; + bool replace_src_a = false; dev_dbg(dev, "%s+ idx:%d", __func__, idx); if (idx >= 4) return; - if (!pending->enable) { + if (!pending->enable || !pending->width || !pending->height) { + /* + * instead of disabling layer with MIX_SRC_CON directly + * set the size to 0 to avoid screen shift due to mixer + * mode switch (hardware behavior) + */ mtk_ddp_write(cmdq_pkt, 0, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_SIZE(idx)); return; } @@ -168,8 +173,16 @@ if (state->base.fb && state->base.fb->format->has_alpha) alpha_con = MIXER_ALPHA_AEN | MIXER_ALPHA; - mtk_mmsys_mixer_in_config(priv->mmsys_dev, idx + 1, alpha_con ? false : true, - DEFAULT_9BIT_ALPHA, + if (state->base.fb && !state->base.fb->format->has_alpha) { + /* + * Mixer doesn't support CONST_BLD mode, + * use a trick to make the output equivalent + */ + replace_src_a = true; + } + + mtk_mmsys_mixer_in_config(priv->mmsys_dev, idx + 1, replace_src_a, + MIXER_ALPHA, pending->x & 1 ? MIXER_INX_MODE_EVEN_EXTEND : MIXER_INX_MODE_BYPASS, align_width / 2 - 1, cmdq_pkt); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/meson/meson_drv.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/meson/meson_drv.c @@ -250,29 +250,20 @@ if (ret) goto free_drm; ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0); - if (ret) { - meson_canvas_free(priv->canvas, priv->canvas_id_osd1); - goto free_drm; - } + if (ret) + goto free_canvas_osd1; ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1); - if (ret) { - meson_canvas_free(priv->canvas, priv->canvas_id_osd1); - meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); - goto free_drm; - } + if (ret) + goto free_canvas_vd1_0; ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2); - if (ret) { - meson_canvas_free(priv->canvas, priv->canvas_id_osd1); - meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); - meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1); - goto free_drm; - } + if (ret) + goto free_canvas_vd1_1; priv->vsync_irq = platform_get_irq(pdev, 0); ret = drm_vblank_init(drm, 1); if (ret) - goto free_drm; + goto free_canvas_vd1_2; /* Assign limits per soc revision/package */ for (i = 0 ; i < ARRAY_SIZE(meson_drm_soc_attrs) ; ++i) { @@ -288,11 +279,11 @@ */ ret = drm_aperture_remove_framebuffers(&meson_driver); if (ret) - goto free_drm; + goto free_canvas_vd1_2; ret = drmm_mode_config_init(drm); if (ret) - goto free_drm; + goto free_canvas_vd1_2; drm->mode_config.max_width = 3840; drm->mode_config.max_height = 2160; drm->mode_config.funcs = &meson_mode_config_funcs; @@ -307,7 +298,7 @@ if (priv->afbcd.ops) { ret = priv->afbcd.ops->init(priv); if (ret) - goto free_drm; + goto free_canvas_vd1_2; } /* Encoder Initialization */ @@ -371,6 +362,14 @@ exit_afbcd: if (priv->afbcd.ops) priv->afbcd.ops->exit(priv); +free_canvas_vd1_2: + meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2); +free_canvas_vd1_1: + meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1); +free_canvas_vd1_0: + meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); +free_canvas_osd1: + meson_canvas_free(priv->canvas, priv->canvas_id_osd1); free_drm: drm_dev_put(drm); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/meson/meson_dw_hdmi.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/meson/meson_dw_hdmi.c @@ -106,6 +106,8 @@ #define HHI_HDMI_CLK_CNTL 0x1cc /* 0x73 */ #define HHI_HDMI_PHY_CNTL0 0x3a0 /* 0xe8 */ #define HHI_HDMI_PHY_CNTL1 0x3a4 /* 0xe9 */ +#define PHY_CNTL1_INIT 0x03900000 +#define PHY_INVERT BIT(17) #define HHI_HDMI_PHY_CNTL2 0x3a8 /* 0xea */ #define HHI_HDMI_PHY_CNTL3 0x3ac /* 0xeb */ #define HHI_HDMI_PHY_CNTL4 0x3b0 /* 0xec */ @@ -130,6 +132,8 @@ unsigned int addr); void (*dwc_write)(struct meson_dw_hdmi *dw_hdmi, unsigned int addr, unsigned int data); + u32 cntl0_init; + u32 cntl1_init; }; struct meson_dw_hdmi { @@ -384,26 +388,6 @@ dw_hdmi_bus_fmt_is_420(hdmi)) mode_is_420 = true; - /* Enable clocks */ - regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, 0xffff, 0x100); - - /* Bring HDMITX MEM output of power down */ - regmap_update_bits(priv->hhi, HHI_MEM_PD_REG0, 0xff << 8, 0); - - /* Bring out of reset */ - dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_SW_RESET, 0); - - /* Enable internal pixclk, tmds_clk, spdif_clk, i2s_clk, cecclk */ - dw_hdmi_top_write_bits(dw_hdmi, HDMITX_TOP_CLK_CNTL, - 0x3, 0x3); - - /* Enable cec_clk and hdcp22_tmdsclk_en */ - dw_hdmi_top_write_bits(dw_hdmi, HDMITX_TOP_CLK_CNTL, - 0x3 << 4, 0x3 << 4); - - /* Enable normal output to PHY */ - dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_BIST_CNTL, BIT(12)); - /* TMDS pattern setup */ if (mode->clock > 340000 && !mode_is_420) { dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_01, @@ -425,20 +409,6 @@ /* Setup PHY parameters */ meson_hdmi_phy_setup_mode(dw_hdmi, mode, mode_is_420); - /* Setup PHY */ - regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, - 0xffff << 16, 0x0390 << 16); - - /* BIT_INVERT */ - if (dw_hdmi_is_compatible(dw_hdmi, "amlogic,meson-gxl-dw-hdmi") || - dw_hdmi_is_compatible(dw_hdmi, "amlogic,meson-gxm-dw-hdmi") || - dw_hdmi_is_compatible(dw_hdmi, "amlogic,meson-g12a-dw-hdmi")) - regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, - BIT(17), 0); - else - regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, - BIT(17), BIT(17)); - /* Disable clock, fifo, fifo_wr */ regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, 0xf, 0); @@ -492,7 +462,9 @@ DRM_DEBUG_DRIVER("\n"); - regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0); + /* Fallback to init mode */ + regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL1, dw_hdmi->data->cntl1_init); + regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, dw_hdmi->data->cntl0_init); } static enum drm_connector_status dw_hdmi_read_hpd(struct dw_hdmi *hdmi, @@ -610,11 +582,22 @@ .fast_io = true, }; -static const struct meson_dw_hdmi_data meson_dw_hdmi_gx_data = { +static const struct meson_dw_hdmi_data meson_dw_hdmi_gxbb_data = { .top_read = dw_hdmi_top_read, .top_write = dw_hdmi_top_write, .dwc_read = dw_hdmi_dwc_read, .dwc_write = dw_hdmi_dwc_write, + .cntl0_init = 0x0, + .cntl1_init = PHY_CNTL1_INIT | PHY_INVERT, +}; + +static const struct meson_dw_hdmi_data meson_dw_hdmi_gxl_data = { + .top_read = dw_hdmi_top_read, + .top_write = dw_hdmi_top_write, + .dwc_read = dw_hdmi_dwc_read, + .dwc_write = dw_hdmi_dwc_write, + .cntl0_init = 0x0, + .cntl1_init = PHY_CNTL1_INIT, }; static const struct meson_dw_hdmi_data meson_dw_hdmi_g12a_data = { @@ -622,6 +605,8 @@ .top_write = dw_hdmi_g12a_top_write, .dwc_read = dw_hdmi_g12a_dwc_read, .dwc_write = dw_hdmi_g12a_dwc_write, + .cntl0_init = 0x000b4242, /* Bandgap */ + .cntl1_init = PHY_CNTL1_INIT, }; static void meson_dw_hdmi_init(struct meson_dw_hdmi *meson_dw_hdmi) @@ -656,6 +641,13 @@ meson_dw_hdmi->data->top_write(meson_dw_hdmi, HDMITX_TOP_CLK_CNTL, 0xff); + /* Enable normal output to PHY */ + meson_dw_hdmi->data->top_write(meson_dw_hdmi, HDMITX_TOP_BIST_CNTL, BIT(12)); + + /* Setup PHY */ + regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL1, meson_dw_hdmi->data->cntl1_init); + regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, meson_dw_hdmi->data->cntl0_init); + /* Enable HDMI-TX Interrupt */ meson_dw_hdmi->data->top_write(meson_dw_hdmi, HDMITX_TOP_INTR_STAT_CLR, HDMITX_TOP_INTR_CORE); @@ -865,11 +857,11 @@ static const struct of_device_id meson_dw_hdmi_of_table[] = { { .compatible = "amlogic,meson-gxbb-dw-hdmi", - .data = &meson_dw_hdmi_gx_data }, + .data = &meson_dw_hdmi_gxbb_data }, { .compatible = "amlogic,meson-gxl-dw-hdmi", - .data = &meson_dw_hdmi_gx_data }, + .data = &meson_dw_hdmi_gxl_data }, { .compatible = "amlogic,meson-gxm-dw-hdmi", - .data = &meson_dw_hdmi_gx_data }, + .data = &meson_dw_hdmi_gxl_data }, { .compatible = "amlogic,meson-g12a-dw-hdmi", .data = &meson_dw_hdmi_g12a_data }, { } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c @@ -95,6 +95,7 @@ return ret; } + clk_disable_unprepare(mipi_dsi->px_clk); ret = clk_set_rate(mipi_dsi->px_clk, mipi_dsi->mode->clock * 1000); if (ret) { @@ -103,6 +104,12 @@ return ret; } + ret = clk_prepare_enable(mipi_dsi->px_clk); + if (ret) { + dev_err(mipi_dsi->dev, "Failed to enable DSI Pixel clock (ret %d)\n", ret); + return ret; + } + switch (mipi_dsi->dsi_device->format) { case MIPI_DSI_FMT_RGB888: dpi_data_format = DPI_COLOR_24BIT; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/meson/meson_plane.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/meson/meson_plane.c @@ -534,6 +534,7 @@ struct meson_plane *meson_plane; struct drm_plane *plane; const uint64_t *format_modifiers = format_modifiers_default; + int ret; meson_plane = devm_kzalloc(priv->drm->dev, sizeof(*meson_plane), GFP_KERNEL); @@ -548,12 +549,16 @@ else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) format_modifiers = format_modifiers_afbc_g12a; - drm_universal_plane_init(priv->drm, plane, 0xFF, - &meson_plane_funcs, - supported_drm_formats, - ARRAY_SIZE(supported_drm_formats), - format_modifiers, - DRM_PLANE_TYPE_PRIMARY, "meson_primary_plane"); + ret = drm_universal_plane_init(priv->drm, plane, 0xFF, + &meson_plane_funcs, + supported_drm_formats, + ARRAY_SIZE(supported_drm_formats), + format_modifiers, + DRM_PLANE_TYPE_PRIMARY, "meson_primary_plane"); + if (ret) { + devm_kfree(priv->drm->dev, meson_plane); + return ret; + } drm_plane_helper_add(plane, &meson_plane_helper_funcs); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/meson/meson_vclk.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/meson/meson_vclk.c @@ -790,13 +790,13 @@ FREQ_1000_1001(params[i].pixel_freq)); DRM_DEBUG_DRIVER("i = %d phy_freq = %d alt = %d\n", i, params[i].phy_freq, - FREQ_1000_1001(params[i].phy_freq/10)*10); + FREQ_1000_1001(params[i].phy_freq/1000)*1000); /* Match strict frequency */ if (phy_freq == params[i].phy_freq && vclk_freq == params[i].vclk_freq) return MODE_OK; /* Match 1000/1001 variant */ - if (phy_freq == (FREQ_1000_1001(params[i].phy_freq/10)*10) && + if (phy_freq == (FREQ_1000_1001(params[i].phy_freq/1000)*1000) && vclk_freq == FREQ_1000_1001(params[i].vclk_freq)) return MODE_OK; } @@ -1070,7 +1070,7 @@ for (freq = 0 ; params[freq].pixel_freq ; ++freq) { if ((phy_freq == params[freq].phy_freq || - phy_freq == FREQ_1000_1001(params[freq].phy_freq/10)*10) && + phy_freq == FREQ_1000_1001(params[freq].phy_freq/1000)*1000) && (vclk_freq == params[freq].vclk_freq || vclk_freq == FREQ_1000_1001(params[freq].vclk_freq))) { if (vclk_freq != params[freq].vclk_freq) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/mgag200/mgag200_i2c.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/mgag200/mgag200_i2c.c @@ -31,6 +31,8 @@ #include #include +#include + #include "mgag200_drv.h" static int mga_i2c_read_gpio(struct mga_device *mdev) @@ -86,7 +88,7 @@ return (mga_i2c_read_gpio(mdev) & i2c->clock) ? 1 : 0; } -static void mgag200_i2c_release(void *res) +static void mgag200_i2c_release(struct drm_device *dev, void *res) { struct mga_i2c_chan *i2c = res; @@ -114,7 +116,7 @@ i2c->adapter.algo_data = &i2c->bit; i2c->bit.udelay = 10; - i2c->bit.timeout = 2; + i2c->bit.timeout = usecs_to_jiffies(2200); i2c->bit.data = i2c; i2c->bit.setsda = mga_gpio_setsda; i2c->bit.setscl = mga_gpio_setscl; @@ -125,5 +127,5 @@ if (ret) return ret; - return devm_add_action_or_reset(dev->dev, mgag200_i2c_release, i2c); + return drmm_add_action_or_reset(dev, mgag200_i2c_release, i2c); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/adreno/a5xx_gpu.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/adreno/a5xx_gpu.c @@ -65,6 +65,8 @@ static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit) { + struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); + struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu); struct msm_ringbuffer *ring = submit->ring; struct drm_gem_object *obj; uint32_t *ptr, dwords; @@ -109,6 +111,7 @@ } } + a5xx_gpu->last_seqno[ring->id] = submit->seqno; a5xx_flush(gpu, ring, true); a5xx_preempt_trigger(gpu); @@ -150,9 +153,13 @@ OUT_PKT7(ring, CP_SET_PROTECTED_MODE, 1); OUT_RING(ring, 1); - /* Enable local preemption for finegrain preemption */ + /* + * Disable local preemption by default because it requires + * user-space to be aware of it and provide additional handling + * to restore rendering state or do various flushes on switch. + */ OUT_PKT7(ring, CP_PREEMPT_ENABLE_LOCAL, 1); - OUT_RING(ring, 0x1); + OUT_RING(ring, 0x0); /* Allow CP_CONTEXT_SWITCH_YIELD packets in the IB2 */ OUT_PKT7(ring, CP_YIELD_ENABLE, 1); @@ -206,6 +213,7 @@ /* Write the fence to the scratch register */ OUT_PKT4(ring, REG_A5XX_CP_SCRATCH_REG(2), 1); OUT_RING(ring, submit->seqno); + a5xx_gpu->last_seqno[ring->id] = submit->seqno; /* * Execute a CACHE_FLUSH_TS event. This will ensure that the --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/adreno/a5xx_gpu.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/adreno/a5xx_gpu.h @@ -34,8 +34,10 @@ struct drm_gem_object *preempt_counters_bo[MSM_GPU_MAX_RINGS]; struct a5xx_preempt_record *preempt[MSM_GPU_MAX_RINGS]; uint64_t preempt_iova[MSM_GPU_MAX_RINGS]; + uint32_t last_seqno[MSM_GPU_MAX_RINGS]; atomic_t preempt_state; + spinlock_t preempt_start_lock; struct timer_list preempt_timer; struct drm_gem_object *shadow_bo; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/adreno/a5xx_preempt.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/adreno/a5xx_preempt.c @@ -55,6 +55,8 @@ /* Return the highest priority ringbuffer with something in it */ static struct msm_ringbuffer *get_next_ring(struct msm_gpu *gpu) { + struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); + struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu); unsigned long flags; int i; @@ -64,6 +66,8 @@ spin_lock_irqsave(&ring->preempt_lock, flags); empty = (get_wptr(ring) == gpu->funcs->get_rptr(gpu, ring)); + if (!empty && ring == a5xx_gpu->cur_ring) + empty = ring->memptrs->fence == a5xx_gpu->last_seqno[i]; spin_unlock_irqrestore(&ring->preempt_lock, flags); if (!empty) @@ -98,11 +102,18 @@ return; /* + * Serialize preemption start to ensure that we always make + * decision on latest state. Otherwise we can get stuck in + * lower priority or empty ring. + */ + spin_lock_irqsave(&a5xx_gpu->preempt_start_lock, flags); + + /* * Try to start preemption by moving from NONE to START. If * unsuccessful, a preemption is already in flight */ if (!try_preempt_state(a5xx_gpu, PREEMPT_NONE, PREEMPT_START)) - return; + goto out; /* Get the next ring to preempt to */ ring = get_next_ring(gpu); @@ -127,9 +138,11 @@ set_preempt_state(a5xx_gpu, PREEMPT_ABORT); update_wptr(gpu, a5xx_gpu->cur_ring); set_preempt_state(a5xx_gpu, PREEMPT_NONE); - return; + goto out; } + spin_unlock_irqrestore(&a5xx_gpu->preempt_start_lock, flags); + /* Make sure the wptr doesn't update while we're in motion */ spin_lock_irqsave(&ring->preempt_lock, flags); a5xx_gpu->preempt[ring->id]->wptr = get_wptr(ring); @@ -152,6 +165,10 @@ /* And actually start the preemption */ gpu_write(gpu, REG_A5XX_CP_CONTEXT_SWITCH_CNTL, 1); + return; + +out: + spin_unlock_irqrestore(&a5xx_gpu->preempt_start_lock, flags); } void a5xx_preempt_irq(struct msm_gpu *gpu) @@ -188,6 +205,12 @@ update_wptr(gpu, a5xx_gpu->cur_ring); set_preempt_state(a5xx_gpu, PREEMPT_NONE); + + /* + * Try to trigger preemption again in case there was a submit or + * retire during ring switch + */ + a5xx_preempt_trigger(gpu); } void a5xx_preempt_hw_init(struct msm_gpu *gpu) @@ -204,6 +227,8 @@ return; for (i = 0; i < gpu->nr_rings; i++) { + a5xx_gpu->preempt[i]->data = 0; + a5xx_gpu->preempt[i]->info = 0; a5xx_gpu->preempt[i]->wptr = 0; a5xx_gpu->preempt[i]->rptr = 0; a5xx_gpu->preempt[i]->rbase = gpu->rb[i]->iova; @@ -298,5 +323,6 @@ } } + spin_lock_init(&a5xx_gpu->preempt_start_lock); timer_setup(&a5xx_gpu->preempt_timer, a5xx_preempt_timer, 0); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/adreno/a6xx_gmu.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/adreno/a6xx_gmu.c @@ -1517,15 +1517,13 @@ irq = platform_get_irq_byname(pdev, name); - ret = request_irq(irq, handler, IRQF_TRIGGER_HIGH, name, gmu); + ret = request_irq(irq, handler, IRQF_TRIGGER_HIGH | IRQF_NO_AUTOEN, name, gmu); if (ret) { DRM_DEV_ERROR(&pdev->dev, "Unable to get interrupt %s %d\n", name, ret); return ret; } - disable_irq(irq); - return irq; } @@ -1600,7 +1598,9 @@ gmu->dev = &pdev->dev; - of_dma_configure(gmu->dev, node, true); + ret = of_dma_configure(gmu->dev, node, true); + if (ret) + return ret; pm_runtime_enable(gmu->dev); @@ -1665,7 +1665,9 @@ gmu->dev = &pdev->dev; - of_dma_configure(gmu->dev, node, true); + ret = of_dma_configure(gmu->dev, node, true); + if (ret) + return ret; /* Fow now, don't do anything fancy until we get our feet under us */ gmu->idle_level = GMU_IDLE_STATE_ACTIVE; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -100,9 +100,10 @@ } static void a6xx_set_pagetable(struct a6xx_gpu *a6xx_gpu, - struct msm_ringbuffer *ring, struct msm_file_private *ctx) + struct msm_ringbuffer *ring, struct msm_gem_submit *submit) { bool sysprof = refcount_read(&a6xx_gpu->base.base.sysprof_active) > 1; + struct msm_file_private *ctx = submit->queue->ctx; struct adreno_gpu *adreno_gpu = &a6xx_gpu->base; phys_addr_t ttbr; u32 asid; @@ -114,6 +115,15 @@ if (msm_iommu_pagetable_params(ctx->aspace->mmu, &ttbr, &asid)) return; + if (adreno_gpu->info->family >= ADRENO_7XX_GEN1) { + /* Wait for previous submit to complete before continuing: */ + OUT_PKT7(ring, CP_WAIT_TIMESTAMP, 4); + OUT_RING(ring, 0); + OUT_RING(ring, lower_32_bits(rbmemptr(ring, fence))); + OUT_RING(ring, upper_32_bits(rbmemptr(ring, fence))); + OUT_RING(ring, submit->seqno - 1); + } + if (!sysprof) { if (!adreno_is_a7xx(adreno_gpu)) { /* Turn off protected mode to write to special registers */ @@ -192,7 +202,7 @@ struct msm_ringbuffer *ring = submit->ring; unsigned int i, ibs = 0; - a6xx_set_pagetable(a6xx_gpu, ring, submit->queue->ctx); + a6xx_set_pagetable(a6xx_gpu, ring, submit); get_stats_counter(ring, REG_A6XX_RBBM_PERFCTR_CP(0), rbmemptr_stats(ring, index, cpcycles_start)); @@ -282,9 +292,9 @@ OUT_PKT7(ring, CP_THREAD_CONTROL, 1); OUT_RING(ring, CP_THREAD_CONTROL_0_SYNC_THREADS | CP_SET_THREAD_BR); - a6xx_set_pagetable(a6xx_gpu, ring, submit->queue->ctx); + a6xx_set_pagetable(a6xx_gpu, ring, submit); - get_stats_counter(ring, REG_A6XX_RBBM_PERFCTR_CP(0), + get_stats_counter(ring, REG_A7XX_RBBM_PERFCTR_CP(0), rbmemptr_stats(ring, index, cpcycles_start)); get_stats_counter(ring, REG_A6XX_CP_ALWAYS_ON_COUNTER, rbmemptr_stats(ring, index, alwayson_start)); @@ -330,7 +340,7 @@ OUT_PKT7(ring, CP_SET_MARKER, 1); OUT_RING(ring, 0x00e); /* IB1LIST end */ - get_stats_counter(ring, REG_A6XX_RBBM_PERFCTR_CP(0), + get_stats_counter(ring, REG_A7XX_RBBM_PERFCTR_CP(0), rbmemptr_stats(ring, index, cpcycles_end)); get_stats_counter(ring, REG_A6XX_CP_ALWAYS_ON_COUNTER, rbmemptr_stats(ring, index, alwayson_end)); @@ -1292,9 +1302,12 @@ gpu->ubwc_config.ubwc_mode = 1; } - /* a618 is using the hw default values */ if (adreno_is_a618(gpu)) - return; + gpu->ubwc_config.highest_bank_bit = 14; + + if (adreno_is_a619(gpu)) + /* TODO: Should be 14 but causes corruption at e.g. 1920x1200 on DP */ + gpu->ubwc_config.highest_bank_bit = 13; if (adreno_is_a619_holi(gpu)) gpu->ubwc_config.highest_bank_bit = 13; @@ -2427,7 +2440,7 @@ msm_devfreq_resume(gpu); - adreno_is_a7xx(adreno_gpu) ? a7xx_llc_activate : a6xx_llc_activate(a6xx_gpu); + adreno_is_a7xx(adreno_gpu) ? a7xx_llc_activate(a6xx_gpu) : a6xx_llc_activate(a6xx_gpu); return ret; } @@ -2886,7 +2899,8 @@ ret = a6xx_set_supported_hw(&pdev->dev, config->info); if (ret) { - a6xx_destroy(&(a6xx_gpu->base.base)); + a6xx_llc_slices_destroy(a6xx_gpu); + kfree(a6xx_gpu); return ERR_PTR(ret); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -99,7 +99,7 @@ * was a bad idea, and is only provided for backwards * compatibility for older targets. */ - return -ENODEV; + return -ENOENT; } if (IS_ERR(fw)) { @@ -475,7 +475,7 @@ ret = request_firmware_direct(&fw, fwname, drm->dev); if (!ret) { DRM_DEV_INFO(drm->dev, "loaded %s from legacy location\n", - newname); + fwname); adreno_gpu->fwloc = FW_LOCATION_LEGACY; goto out; } else if (adreno_gpu->fwloc != FW_LOCATION_UNKNOWN) { @@ -1079,6 +1079,7 @@ adreno_gpu->chip_id = config->chip_id; gpu->allow_relocs = config->info->family < ADRENO_6XX_GEN1; + gpu->pdev = pdev; /* Only handle the core clock when GMU is not in use (or is absent). */ if (adreno_has_gmu_wrapper(adreno_gpu) || --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h @@ -160,6 +160,7 @@ .sblk = &sdm845_lm_sblk, .lm_pair = LM_3, .pingpong = PINGPONG_2, + .dspp = DSPP_2, }, { .name = "lm_3", .id = LM_3, .base = 0x47000, .len = 0x400, @@ -167,6 +168,7 @@ .sblk = &sdm845_lm_sblk, .lm_pair = LM_2, .pingpong = PINGPONG_3, + .dspp = DSPP_3, }, { .name = "lm_4", .id = LM_4, .base = 0x48000, .len = 0x400, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h @@ -157,18 +157,6 @@ .lm_pair = LM_5, .pingpong = PINGPONG_2, }, { - .name = "lm_3", .id = LM_3, - .base = 0x47000, .len = 0x320, - .features = MIXER_MSM8998_MASK, - .sblk = &msm8998_lm_sblk, - .pingpong = PINGPONG_NONE, - }, { - .name = "lm_4", .id = LM_4, - .base = 0x48000, .len = 0x320, - .features = MIXER_MSM8998_MASK, - .sblk = &msm8998_lm_sblk, - .pingpong = PINGPONG_NONE, - }, { .name = "lm_5", .id = LM_5, .base = 0x49000, .len = 0x320, .features = MIXER_MSM8998_MASK, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h @@ -156,25 +156,13 @@ .pingpong = PINGPONG_2, .dspp = DSPP_2, }, { - .name = "lm_3", .id = LM_3, - .base = 0x0, .len = 0x320, - .features = MIXER_SDM845_MASK, - .sblk = &sdm845_lm_sblk, - .pingpong = PINGPONG_NONE, - .dspp = DSPP_3, - }, { - .name = "lm_4", .id = LM_4, - .base = 0x0, .len = 0x320, - .features = MIXER_SDM845_MASK, - .sblk = &sdm845_lm_sblk, - .pingpong = PINGPONG_NONE, - }, { .name = "lm_5", .id = LM_5, .base = 0x49000, .len = 0x320, .features = MIXER_SDM845_MASK, .sblk = &sdm845_lm_sblk, .lm_pair = LM_2, .pingpong = PINGPONG_3, + .dspp = DSPP_3, }, }; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_1_sdm670.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_1_sdm670.h @@ -65,6 +65,54 @@ }, }; +static const struct dpu_lm_cfg sdm670_lm[] = { + { + .name = "lm_0", .id = LM_0, + .base = 0x44000, .len = 0x320, + .features = MIXER_SDM845_MASK, + .sblk = &sdm845_lm_sblk, + .lm_pair = LM_1, + .pingpong = PINGPONG_0, + .dspp = DSPP_0, + }, { + .name = "lm_1", .id = LM_1, + .base = 0x45000, .len = 0x320, + .features = MIXER_SDM845_MASK, + .sblk = &sdm845_lm_sblk, + .lm_pair = LM_0, + .pingpong = PINGPONG_1, + .dspp = DSPP_1, + }, { + .name = "lm_2", .id = LM_2, + .base = 0x46000, .len = 0x320, + .features = MIXER_SDM845_MASK, + .sblk = &sdm845_lm_sblk, + .lm_pair = LM_5, + .pingpong = PINGPONG_2, + }, { + .name = "lm_5", .id = LM_5, + .base = 0x49000, .len = 0x320, + .features = MIXER_SDM845_MASK, + .sblk = &sdm845_lm_sblk, + .lm_pair = LM_2, + .pingpong = PINGPONG_3, + }, +}; + +static const struct dpu_dspp_cfg sdm670_dspp[] = { + { + .name = "dspp_0", .id = DSPP_0, + .base = 0x54000, .len = 0x1800, + .features = DSPP_SC7180_MASK, + .sblk = &sdm845_dspp_sblk, + }, { + .name = "dspp_1", .id = DSPP_1, + .base = 0x56000, .len = 0x1800, + .features = DSPP_SC7180_MASK, + .sblk = &sdm845_dspp_sblk, + }, +}; + static const struct dpu_dsc_cfg sdm670_dsc[] = { { .name = "dsc_0", .id = DSC_0, @@ -88,8 +136,10 @@ .ctl = sdm845_ctl, .sspp_count = ARRAY_SIZE(sdm670_sspp), .sspp = sdm670_sspp, - .mixer_count = ARRAY_SIZE(sdm845_lm), - .mixer = sdm845_lm, + .mixer_count = ARRAY_SIZE(sdm670_lm), + .mixer = sdm670_lm, + .dspp_count = ARRAY_SIZE(sdm670_dspp), + .dspp = sdm670_dspp, .pingpong_count = ARRAY_SIZE(sdm845_pp), .pingpong = sdm845_pp, .dsc_count = ARRAY_SIZE(sdm670_dsc), --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h @@ -163,6 +163,7 @@ .sblk = &sdm845_lm_sblk, .lm_pair = LM_3, .pingpong = PINGPONG_2, + .dspp = DSPP_2, }, { .name = "lm_3", .id = LM_3, .base = 0x47000, .len = 0x320, @@ -170,6 +171,7 @@ .sblk = &sdm845_lm_sblk, .lm_pair = LM_2, .pingpong = PINGPONG_3, + .dspp = DSPP_3, }, { .name = "lm_4", .id = LM_4, .base = 0x48000, .len = 0x320, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h @@ -162,6 +162,7 @@ .sblk = &sdm845_lm_sblk, .lm_pair = LM_3, .pingpong = PINGPONG_2, + .dspp = DSPP_2, }, { .name = "lm_3", .id = LM_3, .base = 0x47000, .len = 0x320, @@ -169,6 +170,7 @@ .sblk = &sdm845_lm_sblk, .lm_pair = LM_2, .pingpong = PINGPONG_3, + .dspp = DSPP_3, }, { .name = "lm_4", .id = LM_4, .base = 0x48000, .len = 0x320, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h @@ -162,6 +162,7 @@ .sblk = &sdm845_lm_sblk, .lm_pair = LM_3, .pingpong = PINGPONG_2, + .dspp = DSPP_2, }, { .name = "lm_3", .id = LM_3, .base = 0x47000, .len = 0x320, @@ -169,6 +170,7 @@ .sblk = &sdm845_lm_sblk, .lm_pair = LM_2, .pingpong = PINGPONG_3, + .dspp = DSPP_3, }, { .name = "lm_4", .id = LM_4, .base = 0x48000, .len = 0x320, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h @@ -162,6 +162,7 @@ .sblk = &sdm845_lm_sblk, .lm_pair = LM_3, .pingpong = PINGPONG_2, + .dspp = DSPP_2, }, { .name = "lm_3", .id = LM_3, .base = 0x47000, .len = 0x320, @@ -169,6 +170,7 @@ .sblk = &sdm845_lm_sblk, .lm_pair = LM_2, .pingpong = PINGPONG_3, + .dspp = DSPP_3, }, { .name = "lm_4", .id = LM_4, .base = 0x48000, .len = 0x320, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h @@ -160,6 +160,7 @@ .sblk = &sdm845_lm_sblk, .lm_pair = LM_3, .pingpong = PINGPONG_2, + .dspp = DSPP_2, }, { .name = "lm_3", .id = LM_3, .base = 0x47000, .len = 0x320, @@ -167,6 +168,7 @@ .sblk = &sdm845_lm_sblk, .lm_pair = LM_2, .pingpong = PINGPONG_3, + .dspp = DSPP_3, }, { .name = "lm_4", .id = LM_4, .base = 0x48000, .len = 0x320, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c @@ -80,7 +80,7 @@ mode = &state->adjusted_mode; - crtc_clk = mode->vtotal * mode->hdisplay * drm_mode_vrefresh(mode); + crtc_clk = (u64)mode->vtotal * mode->hdisplay * drm_mode_vrefresh(mode); drm_atomic_crtc_for_each_plane(plane, crtc) { pstate = to_dpu_plane_state(plane->state); @@ -459,15 +459,15 @@ &perf->core_clk_rate); debugfs_create_u32("enable_bw_release", 0600, entry, (u32 *)&perf->enable_bw_release); - debugfs_create_u32("threshold_low", 0600, entry, + debugfs_create_u32("threshold_low", 0400, entry, (u32 *)&perf->perf_cfg->max_bw_low); - debugfs_create_u32("threshold_high", 0600, entry, + debugfs_create_u32("threshold_high", 0400, entry, (u32 *)&perf->perf_cfg->max_bw_high); - debugfs_create_u32("min_core_ib", 0600, entry, + debugfs_create_u32("min_core_ib", 0400, entry, (u32 *)&perf->perf_cfg->min_core_ib); - debugfs_create_u32("min_llcc_ib", 0600, entry, + debugfs_create_u32("min_llcc_ib", 0400, entry, (u32 *)&perf->perf_cfg->min_llcc_ib); - debugfs_create_u32("min_dram_ib", 0600, entry, + debugfs_create_u32("min_dram_ib", 0400, entry, (u32 *)&perf->perf_cfg->min_dram_ib); debugfs_create_file("perf_mode", 0600, entry, (u32 *)perf, &dpu_core_perf_mode_fops); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c @@ -711,12 +711,13 @@ _dpu_crtc_complete_flip(crtc); } -static void _dpu_crtc_setup_lm_bounds(struct drm_crtc *crtc, +static int _dpu_crtc_check_and_setup_lm_bounds(struct drm_crtc *crtc, struct drm_crtc_state *state) { struct dpu_crtc_state *cstate = to_dpu_crtc_state(state); struct drm_display_mode *adj_mode = &state->adjusted_mode; u32 crtc_split_width = adj_mode->hdisplay / cstate->num_mixers; + struct dpu_kms *dpu_kms = _dpu_crtc_get_kms(crtc); int i; for (i = 0; i < cstate->num_mixers; i++) { @@ -727,7 +728,12 @@ r->y2 = adj_mode->vdisplay; trace_dpu_crtc_setup_lm_bounds(DRMID(crtc), i, r); + + if (drm_rect_width(r) > dpu_kms->catalog->caps->max_mixer_width) + return -E2BIG; } + + return 0; } static void _dpu_crtc_get_pcc_coeff(struct drm_crtc_state *state, @@ -803,7 +809,7 @@ DRM_DEBUG_ATOMIC("crtc%d\n", crtc->base.id); - _dpu_crtc_setup_lm_bounds(crtc, crtc->state); + _dpu_crtc_check_and_setup_lm_bounds(crtc, crtc->state); /* encoder will trigger pending mask now */ drm_for_each_encoder_mask(encoder, crtc->dev, crtc->state->encoder_mask) @@ -1094,9 +1100,6 @@ drm_for_each_encoder_mask(encoder, crtc->dev, crtc->state->encoder_mask) dpu_encoder_register_frame_event_callback(encoder, NULL, NULL); - memset(cstate->mixers, 0, sizeof(cstate->mixers)); - cstate->num_mixers = 0; - /* disable clk & bw control until clk & bw properties are set */ cstate->bw_control = false; cstate->bw_split_vote = false; @@ -1197,8 +1200,11 @@ if (crtc_state->active_changed) crtc_state->mode_changed = true; - if (cstate->num_mixers) - _dpu_crtc_setup_lm_bounds(crtc, crtc_state); + if (cstate->num_mixers) { + rc = _dpu_crtc_check_and_setup_lm_bounds(crtc, crtc_state); + if (rc) + return rc; + } /* FIXME: move this to dpu_plane_atomic_check? */ drm_atomic_crtc_state_for_each_plane_state(plane, pstate, crtc_state) { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -126,6 +126,8 @@ * @base: drm_encoder base class for registration with DRM * @enc_spinlock: Virtual-Encoder-Wide Spin Lock for IRQ purposes * @enabled: True if the encoder is active, protected by enc_lock + * @commit_done_timedout: True if there has been a timeout on commit after + * enabling the encoder. * @num_phys_encs: Actual number of physical encoders contained. * @phys_encs: Container of physical encoders managed. * @cur_master: Pointer to the current master in this mode. Optimization @@ -172,6 +174,7 @@ spinlock_t enc_spinlock; bool enabled; + bool commit_done_timedout; unsigned int num_phys_encs; struct dpu_encoder_phys *phys_encs[MAX_PHYS_ENCODERS_PER_VIRTUAL]; @@ -226,6 +229,13 @@ return dpu_enc->wide_bus_en; } +bool dpu_encoder_is_dsc_enabled(const struct drm_encoder *drm_enc) +{ + const struct dpu_encoder_virt *dpu_enc = to_dpu_encoder_virt(drm_enc); + + return dpu_enc->dsc ? true : false; +} + int dpu_encoder_get_crc_values_cnt(const struct drm_encoder *drm_enc) { struct dpu_encoder_virt *dpu_enc; @@ -371,7 +381,7 @@ return -EWOULDBLOCK; } - if (irq_idx < 0) { + if (irq_idx == 0) { DRM_DEBUG_KMS("skip irq wait id=%u, callback=%ps\n", DRMID(phys_enc->parent), func); return 0; @@ -571,6 +581,40 @@ return topology; } +static void dpu_encoder_assign_crtc_resources(struct dpu_kms *dpu_kms, + struct drm_encoder *drm_enc, + struct dpu_global_state *global_state, + struct drm_crtc_state *crtc_state) +{ + struct dpu_crtc_state *cstate; + struct dpu_hw_blk *hw_ctl[MAX_CHANNELS_PER_ENC]; + struct dpu_hw_blk *hw_lm[MAX_CHANNELS_PER_ENC]; + struct dpu_hw_blk *hw_dspp[MAX_CHANNELS_PER_ENC]; + int num_lm, num_ctl, num_dspp, i; + + cstate = to_dpu_crtc_state(crtc_state); + + memset(cstate->mixers, 0, sizeof(cstate->mixers)); + + num_ctl = dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state, + drm_enc->base.id, DPU_HW_BLK_CTL, hw_ctl, ARRAY_SIZE(hw_ctl)); + num_lm = dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state, + drm_enc->base.id, DPU_HW_BLK_LM, hw_lm, ARRAY_SIZE(hw_lm)); + num_dspp = dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state, + drm_enc->base.id, DPU_HW_BLK_DSPP, hw_dspp, + ARRAY_SIZE(hw_dspp)); + + for (i = 0; i < num_lm; i++) { + int ctl_idx = (i < num_ctl) ? i : (num_ctl-1); + + cstate->mixers[i].hw_lm = to_dpu_hw_mixer(hw_lm[i]); + cstate->mixers[i].lm_ctl = to_dpu_hw_ctl(hw_ctl[ctl_idx]); + cstate->mixers[i].hw_dspp = i < num_dspp ? to_dpu_hw_dspp(hw_dspp[i]) : NULL; + } + + cstate->num_mixers = num_lm; +} + static int dpu_encoder_virt_atomic_check( struct drm_encoder *drm_enc, struct drm_crtc_state *crtc_state, @@ -649,6 +693,9 @@ if (!crtc_state->active_changed || crtc_state->enable) ret = dpu_rm_reserve(&dpu_kms->rm, global_state, drm_enc, crtc_state, topology); + if (!ret) + dpu_encoder_assign_crtc_resources(dpu_kms, drm_enc, + global_state, crtc_state); } trace_dpu_enc_atomic_check_flags(DRMID(drm_enc), adj_mode->flags); @@ -1023,14 +1070,11 @@ struct dpu_encoder_virt *dpu_enc; struct msm_drm_private *priv; struct dpu_kms *dpu_kms; - struct dpu_crtc_state *cstate; struct dpu_global_state *global_state; struct dpu_hw_blk *hw_pp[MAX_CHANNELS_PER_ENC]; struct dpu_hw_blk *hw_ctl[MAX_CHANNELS_PER_ENC]; - struct dpu_hw_blk *hw_lm[MAX_CHANNELS_PER_ENC]; - struct dpu_hw_blk *hw_dspp[MAX_CHANNELS_PER_ENC] = { NULL }; struct dpu_hw_blk *hw_dsc[MAX_CHANNELS_PER_ENC]; - int num_lm, num_ctl, num_pp, num_dsc; + int num_ctl, num_pp, num_dsc; unsigned int dsc_mask = 0; int i; @@ -1059,11 +1103,6 @@ ARRAY_SIZE(hw_pp)); num_ctl = dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state, drm_enc->base.id, DPU_HW_BLK_CTL, hw_ctl, ARRAY_SIZE(hw_ctl)); - num_lm = dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state, - drm_enc->base.id, DPU_HW_BLK_LM, hw_lm, ARRAY_SIZE(hw_lm)); - dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state, - drm_enc->base.id, DPU_HW_BLK_DSPP, hw_dspp, - ARRAY_SIZE(hw_dspp)); for (i = 0; i < MAX_CHANNELS_PER_ENC; i++) dpu_enc->hw_pp[i] = i < num_pp ? to_dpu_hw_pingpong(hw_pp[i]) @@ -1088,38 +1127,23 @@ dpu_enc->cur_master->hw_cdm = hw_cdm ? to_dpu_hw_cdm(hw_cdm) : NULL; } - cstate = to_dpu_crtc_state(crtc_state); - - for (i = 0; i < num_lm; i++) { - int ctl_idx = (i < num_ctl) ? i : (num_ctl-1); - - cstate->mixers[i].hw_lm = to_dpu_hw_mixer(hw_lm[i]); - cstate->mixers[i].lm_ctl = to_dpu_hw_ctl(hw_ctl[ctl_idx]); - cstate->mixers[i].hw_dspp = to_dpu_hw_dspp(hw_dspp[i]); - } - - cstate->num_mixers = num_lm; - - dpu_enc->connector = conn_state->connector; - for (i = 0; i < dpu_enc->num_phys_encs; i++) { struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; - if (!dpu_enc->hw_pp[i]) { + phys->hw_pp = dpu_enc->hw_pp[i]; + if (!phys->hw_pp) { DPU_ERROR_ENC(dpu_enc, "no pp block assigned at idx: %d\n", i); return; } - if (!hw_ctl[i]) { + phys->hw_ctl = i < num_ctl ? to_dpu_hw_ctl(hw_ctl[i]) : NULL; + if (!phys->hw_ctl) { DPU_ERROR_ENC(dpu_enc, "no ctl block assigned at idx: %d\n", i); return; } - phys->hw_pp = dpu_enc->hw_pp[i]; - phys->hw_ctl = to_dpu_hw_ctl(hw_ctl[i]); - phys->cached_mode = crtc_state->adjusted_mode; if (phys->ops.atomic_mode_set) phys->ops.atomic_mode_set(phys, crtc_state, conn_state); @@ -1206,6 +1230,11 @@ dpu_enc->wide_bus_en = msm_dsi_wide_bus_enabled(priv->dsi[index]); mutex_lock(&dpu_enc->enc_lock); + + dpu_enc->commit_done_timedout = false; + + dpu_enc->connector = drm_atomic_get_new_connector_for_encoder(state, drm_enc); + cur_mode = &dpu_enc->base.crtc->state->adjusted_mode; trace_dpu_enc_enable(DRMID(drm_enc), cur_mode->hdisplay, @@ -1261,7 +1290,7 @@ trace_dpu_enc_disable(DRMID(drm_enc)); /* wait for idle */ - dpu_encoder_wait_for_event(drm_enc, MSM_ENC_TX_COMPLETE); + dpu_encoder_wait_for_tx_complete(drm_enc); dpu_encoder_resource_control(drm_enc, DPU_ENC_RC_EVENT_PRE_STOP); @@ -1670,8 +1699,7 @@ phys = dpu_enc->phys_encs[i]; ctl = phys->hw_ctl; - if (ctl->ops.clear_pending_flush) - ctl->ops.clear_pending_flush(ctl); + ctl->ops.clear_pending_flush(ctl); /* update only for command mode primary ctl */ if ((phys == dpu_enc->cur_master) && @@ -1853,7 +1881,9 @@ dsc_common_mode = 0; pic_width = dsc->pic_width; - dsc_common_mode = DSC_MODE_MULTIPLEX | DSC_MODE_SPLIT_PANEL; + dsc_common_mode = DSC_MODE_SPLIT_PANEL; + if (dpu_encoder_use_dsc_merge(enc_master->parent)) + dsc_common_mode |= DSC_MODE_MULTIPLEX; if (enc_master->intf_mode == INTF_MODE_VIDEO) dsc_common_mode |= DSC_MODE_VIDEO; @@ -2067,6 +2097,9 @@ } } + if (phys_enc->hw_pp && phys_enc->hw_pp->ops.setup_dither) + phys_enc->hw_pp->ops.setup_dither(phys_enc->hw_pp, NULL); + /* reset the merge 3D HW block */ if (phys_enc->hw_pp && phys_enc->hw_pp->merge_3d) { phys_enc->hw_pp->merge_3d->ops.setup_3d_mode(phys_enc->hw_pp->merge_3d, @@ -2379,10 +2412,18 @@ return &dpu_enc->base; } -int dpu_encoder_wait_for_event(struct drm_encoder *drm_enc, - enum msm_event_wait event) +/** + * dpu_encoder_wait_for_commit_done() - Wait for encoder to flush pending state + * @drm_enc: encoder pointer + * + * Wait for hardware to have flushed the current pending changes to hardware at + * a vblank or CTL_START. Physical encoders will map this differently depending + * on the type: vid mode -> vsync_irq, cmd mode -> CTL_START. + * + * Return: 0 on success, -EWOULDBLOCK if already signaled, error otherwise + */ +int dpu_encoder_wait_for_commit_done(struct drm_encoder *drm_enc) { - int (*fn_wait)(struct dpu_encoder_phys *phys_enc) = NULL; struct dpu_encoder_virt *dpu_enc = NULL; int i, ret = 0; @@ -2396,23 +2437,51 @@ for (i = 0; i < dpu_enc->num_phys_encs; i++) { struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; - switch (event) { - case MSM_ENC_COMMIT_DONE: - fn_wait = phys->ops.wait_for_commit_done; - break; - case MSM_ENC_TX_COMPLETE: - fn_wait = phys->ops.wait_for_tx_complete; - break; - default: - DPU_ERROR_ENC(dpu_enc, "unknown wait event %d\n", - event); - return -EINVAL; + if (phys->ops.wait_for_commit_done) { + DPU_ATRACE_BEGIN("wait_for_commit_done"); + ret = phys->ops.wait_for_commit_done(phys); + DPU_ATRACE_END("wait_for_commit_done"); + if (ret == -ETIMEDOUT && !dpu_enc->commit_done_timedout) { + dpu_enc->commit_done_timedout = true; + msm_disp_snapshot_state(drm_enc->dev); + } + if (ret) + return ret; } + } + + return ret; +} + +/** + * dpu_encoder_wait_for_tx_complete() - Wait for encoder to transfer pixels to panel + * @drm_enc: encoder pointer + * + * Wait for the hardware to transfer all the pixels to the panel. Physical + * encoders will map this differently depending on the type: vid mode -> vsync_irq, + * cmd mode -> pp_done. + * + * Return: 0 on success, -EWOULDBLOCK if already signaled, error otherwise + */ +int dpu_encoder_wait_for_tx_complete(struct drm_encoder *drm_enc) +{ + struct dpu_encoder_virt *dpu_enc = NULL; + int i, ret = 0; + + if (!drm_enc) { + DPU_ERROR("invalid encoder\n"); + return -EINVAL; + } + dpu_enc = to_dpu_encoder_virt(drm_enc); + DPU_DEBUG_ENC(dpu_enc, "\n"); + + for (i = 0; i < dpu_enc->num_phys_encs; i++) { + struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; - if (fn_wait) { - DPU_ATRACE_BEGIN("wait_for_completion_event"); - ret = fn_wait(phys); - DPU_ATRACE_END("wait_for_completion_event"); + if (phys->ops.wait_for_tx_complete) { + DPU_ATRACE_BEGIN("wait_for_tx_complete"); + ret = phys->ops.wait_for_tx_complete(phys); + DPU_ATRACE_END("wait_for_tx_complete"); if (ret) return ret; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h @@ -93,25 +93,9 @@ */ int dpu_encoder_vsync_time(struct drm_encoder *drm_enc, ktime_t *wakeup_time); -/** - * dpu_encoder_wait_for_event - Waits for encoder events - * @encoder: encoder pointer - * @event: event to wait for - * MSM_ENC_COMMIT_DONE - Wait for hardware to have flushed the current pending - * frames to hardware at a vblank or ctl_start - * Encoders will map this differently depending on the - * panel type. - * vid mode -> vsync_irq - * cmd mode -> ctl_start - * MSM_ENC_TX_COMPLETE - Wait for the hardware to transfer all the pixels to - * the panel. Encoders will map this differently - * depending on the panel type. - * vid mode -> vsync_irq - * cmd mode -> pp_done - * Returns: 0 on success, -EWOULDBLOCK if already signaled, error otherwise - */ -int dpu_encoder_wait_for_event(struct drm_encoder *drm_encoder, - enum msm_event_wait event); +int dpu_encoder_wait_for_commit_done(struct drm_encoder *drm_encoder); + +int dpu_encoder_wait_for_tx_complete(struct drm_encoder *drm_encoder); /* * dpu_encoder_get_intf_mode - get interface mode of the given encoder @@ -159,6 +143,13 @@ bool dpu_encoder_is_widebus_enabled(const struct drm_encoder *drm_enc); /** + * dpu_encoder_is_dsc_enabled - indicate whether dsc is enabled + * for the encoder. + * @drm_enc: Pointer to previously created drm encoder structure + */ +bool dpu_encoder_is_dsc_enabled(const struct drm_encoder *drm_enc); + +/** * dpu_encoder_get_crc_values_cnt - get number of physical encoders contained * in virtual encoder that can collect CRC values * @drm_enc: Pointer to previously created drm encoder structure --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c @@ -451,9 +451,6 @@ _dpu_encoder_phys_cmd_pingpong_config(phys_enc); - if (!dpu_encoder_phys_cmd_is_master(phys_enc)) - return; - ctl = phys_enc->hw_ctl; ctl->ops.update_pending_flush_intf(ctl, phys_enc->hw_intf->idx); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c @@ -102,6 +102,7 @@ } timing->wide_bus_en = dpu_encoder_is_widebus_enabled(phys_enc->parent); + timing->compression_en = dpu_encoder_is_dsc_enabled(phys_enc->parent); /* * for DP, divide the horizonal parameters by 2 when @@ -259,12 +260,14 @@ mode.htotal >>= 1; mode.hsync_start >>= 1; mode.hsync_end >>= 1; + mode.hskew >>= 1; DPU_DEBUG_VIDENC(phys_enc, - "split_role %d, halve horizontal %d %d %d %d\n", + "split_role %d, halve horizontal %d %d %d %d %d\n", phys_enc->split_role, mode.hdisplay, mode.htotal, - mode.hsync_start, mode.hsync_end); + mode.hsync_start, mode.hsync_end, + mode.hskew); } drm_mode_to_intf_timing_params(phys_enc, &mode, &timing_params); @@ -277,7 +280,7 @@ intf_cfg.stream_sel = 0; /* Don't care value for video mode */ intf_cfg.mode_3d = dpu_encoder_helper_get_3d_blend_mode(phys_enc); intf_cfg.dsc = dpu_encoder_helper_get_dsc(phys_enc); - if (phys_enc->hw_pp->merge_3d) + if (intf_cfg.mode_3d && phys_enc->hw_pp->merge_3d) intf_cfg.merge_3d = phys_enc->hw_pp->merge_3d->idx; spin_lock_irqsave(phys_enc->enc_spinlock, lock_flags); @@ -412,8 +415,10 @@ static void dpu_encoder_phys_vid_enable(struct dpu_encoder_phys *phys_enc) { struct dpu_hw_ctl *ctl; + u32 mode_3d; ctl = phys_enc->hw_ctl; + mode_3d = dpu_encoder_helper_get_3d_blend_mode(phys_enc); DPU_DEBUG_VIDENC(phys_enc, "\n"); @@ -434,7 +439,8 @@ goto skip_flush; ctl->ops.update_pending_flush_intf(ctl, phys_enc->hw_intf->idx); - if (ctl->ops.update_pending_flush_merge_3d && phys_enc->hw_pp->merge_3d) + if (mode_3d && ctl->ops.update_pending_flush_merge_3d && + phys_enc->hw_pp->merge_3d) ctl->ops.update_pending_flush_merge_3d(ctl, phys_enc->hw_pp->merge_3d->idx); skip_flush: --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c @@ -418,6 +418,7 @@ struct dpu_hw_pingpong *hw_pp; struct dpu_hw_cdm *hw_cdm; u32 pending_flush = 0; + u32 mode_3d; if (!phys_enc) return; @@ -426,6 +427,7 @@ hw_pp = phys_enc->hw_pp; hw_ctl = phys_enc->hw_ctl; hw_cdm = phys_enc->hw_cdm; + mode_3d = dpu_encoder_helper_get_3d_blend_mode(phys_enc); DPU_DEBUG("[wb:%d]\n", hw_wb->idx - WB_0); @@ -437,7 +439,8 @@ if (hw_ctl->ops.update_pending_flush_wb) hw_ctl->ops.update_pending_flush_wb(hw_ctl, hw_wb->idx); - if (hw_ctl->ops.update_pending_flush_merge_3d && hw_pp && hw_pp->merge_3d) + if (mode_3d && hw_ctl->ops.update_pending_flush_merge_3d && + hw_pp && hw_pp->merge_3d) hw_ctl->ops.update_pending_flush_merge_3d(hw_ctl, hw_pp->merge_3d->idx); @@ -663,8 +666,7 @@ } /* reset h/w before final flush */ - if (phys_enc->hw_ctl->ops.clear_pending_flush) - phys_enc->hw_ctl->ops.clear_pending_flush(phys_enc->hw_ctl); + phys_enc->hw_ctl->ops.clear_pending_flush(phys_enc->hw_ctl); /* * New CTL reset sequence from 5.0 MDP onwards. --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c @@ -220,12 +220,9 @@ DRM_FORMAT_RGBA4444, DRM_FORMAT_RGBX4444, DRM_FORMAT_XRGB4444, - DRM_FORMAT_BGR565, DRM_FORMAT_BGR888, - DRM_FORMAT_ABGR8888, DRM_FORMAT_BGRA8888, DRM_FORMAT_BGRX8888, - DRM_FORMAT_XBGR8888, DRM_FORMAT_ABGR1555, DRM_FORMAT_BGRA5551, DRM_FORMAT_XBGR1555, @@ -254,12 +251,9 @@ DRM_FORMAT_RGBA4444, DRM_FORMAT_RGBX4444, DRM_FORMAT_XRGB4444, - DRM_FORMAT_BGR565, DRM_FORMAT_BGR888, - DRM_FORMAT_ABGR8888, DRM_FORMAT_BGRA8888, DRM_FORMAT_BGRX8888, - DRM_FORMAT_XBGR8888, DRM_FORMAT_ABGR1555, DRM_FORMAT_BGRA5551, DRM_FORMAT_XBGR1555, @@ -314,8 +308,8 @@ { \ .maxdwnscale = SSPP_UNITY_SCALE, \ .maxupscale = SSPP_UNITY_SCALE, \ - .format_list = plane_formats_yuv, \ - .num_formats = ARRAY_SIZE(plane_formats_yuv), \ + .format_list = plane_formats, \ + .num_formats = ARRAY_SIZE(plane_formats), \ .virt_format_list = plane_formats, \ .virt_num_formats = ARRAY_SIZE(plane_formats), \ } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c @@ -186,7 +186,7 @@ dpu_hw_cdm_setup_cdwn(ctx, cdm); if (cdm->output_type == CDM_CDWN_OUTPUT_HDMI) { - if (fmt->chroma_sample != DPU_CHROMA_H1V2) + if (fmt->chroma_sample == DPU_CHROMA_H1V2) return -EINVAL; /*unsupported format */ opmode = CDM_HDMI_PACK_OP_MODE_EN; opmode |= (fmt->chroma_sample << 1); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c @@ -532,6 +532,7 @@ { struct dpu_hw_blk_reg_map *c = &ctx->hw; u32 intf_active = 0; + u32 dsc_active = 0; u32 wb_active = 0; u32 mode_sel = 0; @@ -547,6 +548,7 @@ intf_active = DPU_REG_READ(c, CTL_INTF_ACTIVE); wb_active = DPU_REG_READ(c, CTL_WB_ACTIVE); + dsc_active = DPU_REG_READ(c, CTL_DSC_ACTIVE); if (cfg->intf) intf_active |= BIT(cfg->intf - INTF_0); @@ -554,17 +556,18 @@ if (cfg->wb) wb_active |= BIT(cfg->wb - WB_0); + if (cfg->dsc) + dsc_active |= cfg->dsc; + DPU_REG_WRITE(c, CTL_TOP, mode_sel); DPU_REG_WRITE(c, CTL_INTF_ACTIVE, intf_active); DPU_REG_WRITE(c, CTL_WB_ACTIVE, wb_active); + DPU_REG_WRITE(c, CTL_DSC_ACTIVE, dsc_active); if (cfg->merge_3d) DPU_REG_WRITE(c, CTL_MERGE_3D_ACTIVE, BIT(cfg->merge_3d - MERGE_3D_0)); - if (cfg->dsc) - DPU_REG_WRITE(c, CTL_DSC_ACTIVE, cfg->dsc); - if (cfg->cdm) DPU_REG_WRITE(c, CTL_CDM_ACTIVE, cfg->cdm); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h @@ -83,7 +83,8 @@ /** * Clear the value of the cached pending_flush_mask - * No effect on hardware + * No effect on hardware. + * Required to be implemented. * @ctx : ctl path ctx pointer */ void (*clear_pending_flush)(struct dpu_hw_ctl *ctx); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c @@ -52,6 +52,7 @@ u32 slice_last_group_size; u32 det_thresh_flatness; bool is_cmd_mode = !(mode & DSC_MODE_VIDEO); + bool input_10_bits = dsc->bits_per_component == 10; DPU_REG_WRITE(c, DSC_COMMON_MODE, mode); @@ -68,7 +69,7 @@ data |= (dsc->line_buf_depth << 3); data |= (dsc->simple_422 << 2); data |= (dsc->convert_rgb << 1); - data |= dsc->bits_per_component; + data |= input_10_bits; DPU_REG_WRITE(c, DSC_ENC, data); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c @@ -223,9 +223,11 @@ VERB("IRQ=[%d, %d]\n", DPU_IRQ_REG(irq_idx), DPU_IRQ_BIT(irq_idx)); - if (!irq_entry->cb) + if (!irq_entry->cb) { DRM_ERROR("no registered cb, IRQ=[%d, %d]\n", DPU_IRQ_REG(irq_idx), DPU_IRQ_BIT(irq_idx)); + return; + } atomic_inc(&irq_entry->count); @@ -525,14 +527,14 @@ int ret; if (!irq_cb) { - DPU_ERROR("invalid IRQ=[%d, %d] irq_cb:%ps\n", - DPU_IRQ_REG(irq_idx), DPU_IRQ_BIT(irq_idx), irq_cb); + DPU_ERROR("IRQ=[%d, %d] NULL callback\n", + DPU_IRQ_REG(irq_idx), DPU_IRQ_BIT(irq_idx)); return -EINVAL; } if (!dpu_core_irq_is_valid(irq_idx)) { - DPU_ERROR("invalid IRQ=[%d, %d]\n", - DPU_IRQ_REG(irq_idx), DPU_IRQ_BIT(irq_idx)); + DPU_ERROR("invalid IRQ=[%d, %d] irq_cb:%ps\n", + DPU_IRQ_REG(irq_idx), DPU_IRQ_BIT(irq_idx), irq_cb); return -EINVAL; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c @@ -163,13 +163,8 @@ hsync_ctl = (hsync_period << 16) | p->hsync_pulse_width; display_hctl = (hsync_end_x << 16) | hsync_start_x; - /* - * DATA_HCTL_EN controls data timing which can be different from - * video timing. It is recommended to enable it for all cases, except - * if compression is enabled in 1 pixel per clock mode - */ if (p->wide_bus_en) - intf_cfg2 |= INTF_CFG2_DATABUS_WIDEN | INTF_CFG2_DATA_HCTL_EN; + intf_cfg2 |= INTF_CFG2_DATABUS_WIDEN; data_width = p->width; @@ -229,6 +224,14 @@ DPU_REG_WRITE(c, INTF_CONFIG, intf_cfg); DPU_REG_WRITE(c, INTF_PANEL_FORMAT, panel_format); if (ctx->cap->features & BIT(DPU_DATA_HCTL_EN)) { + /* + * DATA_HCTL_EN controls data timing which can be different from + * video timing. It is recommended to enable it for all cases, except + * if compression is enabled in 1 pixel per clock mode + */ + if (!(p->compression_en && !p->wide_bus_en)) + intf_cfg2 |= INTF_CFG2_DATA_HCTL_EN; + DPU_REG_WRITE(c, INTF_CONFIG2, intf_cfg2); DPU_REG_WRITE(c, INTF_DISPLAY_DATA_HCTL, display_data_hctl); DPU_REG_WRITE(c, INTF_ACTIVE_DATA_HCTL, active_data_hctl); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h @@ -33,6 +33,7 @@ u32 hsync_skew; bool wide_bus_en; + bool compression_en; }; struct dpu_hw_intf_prog_fetch { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c @@ -240,7 +240,7 @@ if (cap & BIT(DPU_MDP_VSYNC_SEL)) ops->setup_vsync_source = dpu_hw_setup_vsync_source_and_vsync_sel; - else + else if (!(cap & BIT(DPU_MDP_PERIPH_0_REMOVED))) ops->setup_vsync_source = dpu_hw_setup_vsync_source; ops->get_safe_status = dpu_hw_get_safe_status; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -374,6 +374,12 @@ return 0; } +static void dpu_kms_global_obj_fini(struct dpu_kms *dpu_kms) +{ + drm_atomic_private_obj_fini(&dpu_kms->global_state); + drm_modeset_lock_fini(&dpu_kms->global_state_lock); +} + static int dpu_kms_parse_data_bus_icc_path(struct dpu_kms *dpu_kms) { struct icc_path *path0; @@ -478,7 +484,7 @@ * mode panels. This may be a no-op for command mode panels. */ trace_dpu_kms_wait_for_commit_done(DRMID(crtc)); - ret = dpu_encoder_wait_for_event(encoder, MSM_ENC_COMMIT_DONE); + ret = dpu_encoder_wait_for_commit_done(encoder); if (ret && ret != -EWOULDBLOCK) { DPU_ERROR("wait for commit done returned %d\n", ret); break; @@ -801,6 +807,8 @@ dpu_kms->hw_vbif[i] = NULL; } + dpu_kms_global_obj_fini(dpu_kms); + dpu_kms->catalog = NULL; dpu_kms->hw_mdp = NULL; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h @@ -31,24 +31,14 @@ * @fmt: Pointer to format string */ #define DPU_DEBUG(fmt, ...) \ - do { \ - if (drm_debug_enabled(DRM_UT_KMS)) \ - DRM_DEBUG(fmt, ##__VA_ARGS__); \ - else \ - pr_debug(fmt, ##__VA_ARGS__); \ - } while (0) + DRM_DEBUG_DRIVER(fmt, ##__VA_ARGS__) /** * DPU_DEBUG_DRIVER - macro for hardware driver logging * @fmt: Pointer to format string */ #define DPU_DEBUG_DRIVER(fmt, ...) \ - do { \ - if (drm_debug_enabled(DRM_UT_DRIVER)) \ - DRM_ERROR(fmt, ##__VA_ARGS__); \ - else \ - pr_debug(fmt, ##__VA_ARGS__); \ - } while (0) + DRM_DEBUG_DRIVER(fmt, ##__VA_ARGS__) #define DPU_ERROR(fmt, ...) pr_err("[dpu error]" fmt, ##__VA_ARGS__) #define DPU_ERROR_RATELIMITED(fmt, ...) pr_err_ratelimited("[dpu error]" fmt, ##__VA_ARGS__) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -679,6 +679,9 @@ new_state->fb, &layout); if (ret) { DPU_ERROR_PLANE(pdpu, "failed to get format layout, %d\n", ret); + if (pstate->aspace) + msm_framebuffer_cleanup(new_state->fb, pstate->aspace, + pstate->needs_dirtyfb); return ret; } @@ -742,10 +745,9 @@ min_src_size = DPU_FORMAT_IS_YUV(fmt) ? 2 : 1; if (DPU_FORMAT_IS_YUV(fmt) && - (!pipe->sspp->cap->sblk->scaler_blk.len || - !pipe->sspp->cap->sblk->csc_blk.len)) { + !pipe->sspp->cap->sblk->csc_blk.len) { DPU_DEBUG_PLANE(pdpu, - "plane doesn't have scaler/csc for yuv\n"); + "plane doesn't have csc for yuv\n"); return -EINVAL; } @@ -862,6 +864,10 @@ max_linewidth = pdpu->catalog->caps->max_linewidth; + drm_rect_rotate(&pipe_cfg->src_rect, + new_plane_state->fb->width, new_plane_state->fb->height, + new_plane_state->rotation); + if ((drm_rect_width(&pipe_cfg->src_rect) > max_linewidth) || _dpu_plane_calc_clk(&crtc_state->adjusted_mode, pipe_cfg) > max_mdp_clk_rate) { /* @@ -911,6 +917,14 @@ r_pipe_cfg->dst_rect.x1 = pipe_cfg->dst_rect.x2; } + drm_rect_rotate_inv(&pipe_cfg->src_rect, + new_plane_state->fb->width, new_plane_state->fb->height, + new_plane_state->rotation); + if (r_pipe->sspp) + drm_rect_rotate_inv(&r_pipe_cfg->src_rect, + new_plane_state->fb->width, new_plane_state->fb->height, + new_plane_state->rotation); + ret = dpu_plane_atomic_check_pipe(pdpu, pipe, pipe_cfg, fmt, &crtc_state->adjusted_mode); if (ret) return ret; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c @@ -389,7 +389,7 @@ /* TODO: different regulators in other cases? */ mdp4_lcdc_encoder->regs[0].supply = "lvds-vccs-3p3v"; - mdp4_lcdc_encoder->regs[1].supply = "lvds-vccs-3p3v"; + mdp4_lcdc_encoder->regs[1].supply = "lvds-pll-vdda"; mdp4_lcdc_encoder->regs[2].supply = "lvds-vdda"; ret = devm_regulator_bulk_get(dev->dev, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c @@ -356,7 +356,7 @@ drm_printf(p, "%s:%d\t%d\t%s\n", pipe2name(pipe), j, inuse, - plane ? plane->name : NULL); + plane ? plane->name : "(null)"); total += inuse; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/disp/msm_disp_snapshot_util.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/disp/msm_disp_snapshot_util.c @@ -26,7 +26,7 @@ end_addr = base_addr + aligned_len; if (!(*reg)) - *reg = kzalloc(len_padded, GFP_KERNEL); + *reg = kvzalloc(len_padded, GFP_KERNEL); if (*reg) dump_addr = *reg; @@ -48,20 +48,21 @@ } } -static void msm_disp_state_print_regs(u32 **reg, u32 len, void __iomem *base_addr, - struct drm_printer *p) +static void msm_disp_state_print_regs(const u32 *dump_addr, u32 len, + void __iomem *base_addr, struct drm_printer *p) { int i; - u32 *dump_addr = NULL; void __iomem *addr; u32 num_rows; + if (!dump_addr) { + drm_printf(p, "Registers not stored\n"); + return; + } + addr = base_addr; num_rows = len / REG_DUMP_ALIGN; - if (*reg) - dump_addr = *reg; - for (i = 0; i < num_rows; i++) { drm_printf(p, "0x%lx : %08x %08x %08x %08x\n", (unsigned long)(addr - base_addr), @@ -89,7 +90,7 @@ list_for_each_entry_safe(block, tmp, &state->blocks, node) { drm_printf(p, "====================%s================\n", block->name); - msm_disp_state_print_regs(&block->state, block->size, block->base_addr, p); + msm_disp_state_print_regs(block->state, block->size, block->base_addr, p); } drm_printf(p, "===================dpu drm state================\n"); @@ -161,7 +162,7 @@ list_for_each_entry_safe(block, tmp, &disp_state->blocks, node) { list_del(&block->node); - kfree(block->state); + kvfree(block->state); kfree(block); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/dp/dp_audio.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/dp/dp_audio.c @@ -410,10 +410,10 @@ safe_to_exit_level = 5; break; default: + safe_to_exit_level = 14; drm_dbg_dp(audio->drm_dev, "setting the default safe_to_exit_level = %u\n", safe_to_exit_level); - safe_to_exit_level = 14; break; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/dp/dp_aux.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/dp/dp_aux.c @@ -35,6 +35,7 @@ bool no_send_stop; bool initted; bool is_edp; + bool enable_xfers; u32 offset; u32 segment; @@ -302,6 +303,17 @@ } /* + * If we're using DP and an external display isn't connected then the + * transfer won't succeed. Return right away. If we don't do this we + * can end up with long timeouts if someone tries to access the DP AUX + * character device when no DP device is connected. + */ + if (!aux->is_edp && !aux->enable_xfers) { + ret = -ENXIO; + goto exit; + } + + /* * For eDP it's important to give a reasonably long wait here for HPD * to be asserted. This is because the panel driver may have _just_ * turned on the panel and then tried to do an AUX transfer. The panel @@ -433,6 +445,14 @@ return IRQ_HANDLED; } +void dp_aux_enable_xfers(struct drm_dp_aux *dp_aux, bool enabled) +{ + struct dp_aux_private *aux; + + aux = container_of(dp_aux, struct dp_aux_private, dp_aux); + aux->enable_xfers = enabled; +} + void dp_aux_reconfig(struct drm_dp_aux *dp_aux) { struct dp_aux_private *aux; @@ -510,6 +530,10 @@ aux = container_of(dp_aux, struct dp_aux_private, dp_aux); pm_runtime_get_sync(aux->dev); + ret = pm_runtime_resume_and_get(aux->dev); + if (ret) + return ret; + ret = dp_catalog_aux_wait_for_hpd_connect_state(aux->catalog); pm_runtime_put_sync(aux->dev); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/dp/dp_aux.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/dp/dp_aux.h @@ -12,6 +12,7 @@ int dp_aux_register(struct drm_dp_aux *dp_aux); void dp_aux_unregister(struct drm_dp_aux *dp_aux); irqreturn_t dp_aux_isr(struct drm_dp_aux *dp_aux); +void dp_aux_enable_xfers(struct drm_dp_aux *dp_aux, bool enabled); void dp_aux_init(struct drm_dp_aux *dp_aux); void dp_aux_deinit(struct drm_dp_aux *dp_aux); void dp_aux_reconfig(struct drm_dp_aux *dp_aux); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/dp/dp_ctrl.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/dp/dp_ctrl.c @@ -1019,14 +1019,14 @@ if (ret) return ret; - if (voltage_swing_level >= DP_TRAIN_VOLTAGE_SWING_MAX) { + if (voltage_swing_level >= DP_TRAIN_LEVEL_MAX) { drm_dbg_dp(ctrl->drm_dev, "max. voltage swing level reached %d\n", voltage_swing_level); max_level_reached |= DP_TRAIN_MAX_SWING_REACHED; } - if (pre_emphasis_level >= DP_TRAIN_PRE_EMPHASIS_MAX) { + if (pre_emphasis_level >= DP_TRAIN_LEVEL_MAX) { drm_dbg_dp(ctrl->drm_dev, "max. pre-emphasis level reached %d\n", pre_emphasis_level); @@ -1117,7 +1117,7 @@ } if (ctrl->link->phy_params.v_level >= - DP_TRAIN_VOLTAGE_SWING_MAX) { + DP_TRAIN_LEVEL_MAX) { DRM_ERROR_RATELIMITED("max v_level reached\n"); return -EAGAIN; } @@ -1253,6 +1253,8 @@ link_info.rate = ctrl->link->link_params.rate; link_info.capabilities = DP_LINK_CAP_ENHANCED_FRAMING; + dp_link_reset_phy_params_vx_px(ctrl->link); + dp_aux_link_configure(ctrl->aux, &link_info); if (drm_dp_max_downspread(dpcd)) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/dp/dp_display.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/dp/dp_display.c @@ -113,7 +113,7 @@ struct dp_event event_list[DP_EVENT_Q_MAX]; spinlock_t event_lock; - bool wide_bus_en; + bool wide_bus_supported; struct dp_audio *audio; }; @@ -122,44 +122,44 @@ phys_addr_t io_start; unsigned int id; unsigned int connector_type; - bool wide_bus_en; + bool wide_bus_supported; }; static const struct msm_dp_desc sc7180_dp_descs[] = { - { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .connector_type = DRM_MODE_CONNECTOR_DisplayPort }, + { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_supported = true }, {} }; static const struct msm_dp_desc sc7280_dp_descs[] = { - { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_en = true }, - { .io_start = 0x0aea0000, .id = MSM_DP_CONTROLLER_1, .connector_type = DRM_MODE_CONNECTOR_eDP, .wide_bus_en = true }, + { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_supported = true }, + { .io_start = 0x0aea0000, .id = MSM_DP_CONTROLLER_1, .connector_type = DRM_MODE_CONNECTOR_eDP, .wide_bus_supported = true }, {} }; static const struct msm_dp_desc sc8180x_dp_descs[] = { - { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .connector_type = DRM_MODE_CONNECTOR_DisplayPort }, - { .io_start = 0x0ae98000, .id = MSM_DP_CONTROLLER_1, .connector_type = DRM_MODE_CONNECTOR_DisplayPort }, - { .io_start = 0x0ae9a000, .id = MSM_DP_CONTROLLER_2, .connector_type = DRM_MODE_CONNECTOR_eDP }, + { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_supported = true }, + { .io_start = 0x0ae98000, .id = MSM_DP_CONTROLLER_1, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_supported = true }, + { .io_start = 0x0ae9a000, .id = MSM_DP_CONTROLLER_2, .connector_type = DRM_MODE_CONNECTOR_eDP, .wide_bus_supported = true }, {} }; static const struct msm_dp_desc sc8280xp_dp_descs[] = { - { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_en = true }, - { .io_start = 0x0ae98000, .id = MSM_DP_CONTROLLER_1, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_en = true }, - { .io_start = 0x0ae9a000, .id = MSM_DP_CONTROLLER_2, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_en = true }, - { .io_start = 0x0aea0000, .id = MSM_DP_CONTROLLER_3, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_en = true }, - { .io_start = 0x22090000, .id = MSM_DP_CONTROLLER_0, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_en = true }, - { .io_start = 0x22098000, .id = MSM_DP_CONTROLLER_1, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_en = true }, - { .io_start = 0x2209a000, .id = MSM_DP_CONTROLLER_2, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_en = true }, - { .io_start = 0x220a0000, .id = MSM_DP_CONTROLLER_3, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_en = true }, + { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_supported = true }, + { .io_start = 0x0ae98000, .id = MSM_DP_CONTROLLER_1, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_supported = true }, + { .io_start = 0x0ae9a000, .id = MSM_DP_CONTROLLER_2, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_supported = true }, + { .io_start = 0x0aea0000, .id = MSM_DP_CONTROLLER_3, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_supported = true }, + { .io_start = 0x22090000, .id = MSM_DP_CONTROLLER_0, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_supported = true }, + { .io_start = 0x22098000, .id = MSM_DP_CONTROLLER_1, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_supported = true }, + { .io_start = 0x2209a000, .id = MSM_DP_CONTROLLER_2, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_supported = true }, + { .io_start = 0x220a0000, .id = MSM_DP_CONTROLLER_3, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_supported = true }, {} }; static const struct msm_dp_desc sc8280xp_edp_descs[] = { - { .io_start = 0x0ae9a000, .id = MSM_DP_CONTROLLER_2, .connector_type = DRM_MODE_CONNECTOR_eDP, .wide_bus_en = true }, - { .io_start = 0x0aea0000, .id = MSM_DP_CONTROLLER_3, .connector_type = DRM_MODE_CONNECTOR_eDP, .wide_bus_en = true }, - { .io_start = 0x2209a000, .id = MSM_DP_CONTROLLER_2, .connector_type = DRM_MODE_CONNECTOR_eDP, .wide_bus_en = true }, - { .io_start = 0x220a0000, .id = MSM_DP_CONTROLLER_3, .connector_type = DRM_MODE_CONNECTOR_eDP, .wide_bus_en = true }, + { .io_start = 0x0ae9a000, .id = MSM_DP_CONTROLLER_2, .connector_type = DRM_MODE_CONNECTOR_eDP, .wide_bus_supported = true }, + { .io_start = 0x0aea0000, .id = MSM_DP_CONTROLLER_3, .connector_type = DRM_MODE_CONNECTOR_eDP, .wide_bus_supported = true }, + { .io_start = 0x2209a000, .id = MSM_DP_CONTROLLER_2, .connector_type = DRM_MODE_CONNECTOR_eDP, .wide_bus_supported = true }, + { .io_start = 0x220a0000, .id = MSM_DP_CONTROLLER_3, .connector_type = DRM_MODE_CONNECTOR_eDP, .wide_bus_supported = true }, {} }; @@ -169,7 +169,7 @@ }; static const struct msm_dp_desc sm8650_dp_descs[] = { - { .io_start = 0x0af54000, .id = MSM_DP_CONTROLLER_0, .connector_type = DRM_MODE_CONNECTOR_DisplayPort }, + { .io_start = 0x0af54000, .id = MSM_DP_CONTROLLER_0, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_supported = true }, {} }; @@ -565,6 +565,8 @@ int ret; struct platform_device *pdev = dp->dp_display.pdev; + dp_aux_enable_xfers(dp->aux, true); + mutex_lock(&dp->event_mutex); state = dp->hpd_state; @@ -598,6 +600,7 @@ ret = dp_display_usbpd_configure_cb(&pdev->dev); if (ret) { /* link train failed */ dp->hpd_state = ST_DISCONNECTED; + pm_runtime_put_sync(&pdev->dev); } else { dp->hpd_state = ST_MAINLINK_READY; } @@ -629,6 +632,8 @@ u32 state; struct platform_device *pdev = dp->dp_display.pdev; + dp_aux_enable_xfers(dp->aux, false); + mutex_lock(&dp->event_mutex); state = dp->hpd_state; @@ -655,6 +660,7 @@ dp_display_host_phy_exit(dp); dp->hpd_state = ST_DISCONNECTED; dp_display_notify_disconnect(&dp->dp_display.pdev->dev); + pm_runtime_put_sync(&pdev->dev); mutex_unlock(&dp->event_mutex); return 0; } @@ -800,9 +806,9 @@ goto error_ctrl; } - /* populate wide_bus_en to differernt layers */ - dp->ctrl->wide_bus_en = dp->wide_bus_en; - dp->catalog->wide_bus_en = dp->wide_bus_en; + /* populate wide_bus_supported to different layers */ + dp->ctrl->wide_bus_en = dp->wide_bus_supported; + dp->catalog->wide_bus_en = dp->wide_bus_supported; return rc; @@ -1272,7 +1278,7 @@ dp->name = "drm_dp"; dp->id = desc->id; dp->dp_display.connector_type = desc->connector_type; - dp->wide_bus_en = desc->wide_bus_en; + dp->wide_bus_supported = desc->wide_bus_supported; dp->dp_display.is_edp = (dp->dp_display.connector_type == DRM_MODE_CONNECTOR_eDP); @@ -1418,7 +1424,7 @@ dp = container_of(dp_display, struct dp_display_private, dp_display); - return dp->wide_bus_en; + return dp->wide_bus_supported; } void dp_display_debugfs_init(struct msm_dp *dp_display, struct dentry *root, bool is_edp) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/dp/dp_link.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/dp/dp_link.c @@ -1109,6 +1109,7 @@ int dp_link_adjust_levels(struct dp_link *dp_link, u8 *link_status) { int i; + u8 max_p_level; int v_max = 0, p_max = 0; struct dp_link_private *link; @@ -1140,30 +1141,29 @@ * Adjust the voltage swing and pre-emphasis level combination to within * the allowable range. */ - if (dp_link->phy_params.v_level > DP_TRAIN_VOLTAGE_SWING_MAX) { + if (dp_link->phy_params.v_level > DP_TRAIN_LEVEL_MAX) { drm_dbg_dp(link->drm_dev, "Requested vSwingLevel=%d, change to %d\n", dp_link->phy_params.v_level, - DP_TRAIN_VOLTAGE_SWING_MAX); - dp_link->phy_params.v_level = DP_TRAIN_VOLTAGE_SWING_MAX; + DP_TRAIN_LEVEL_MAX); + dp_link->phy_params.v_level = DP_TRAIN_LEVEL_MAX; } - if (dp_link->phy_params.p_level > DP_TRAIN_PRE_EMPHASIS_MAX) { + if (dp_link->phy_params.p_level > DP_TRAIN_LEVEL_MAX) { drm_dbg_dp(link->drm_dev, "Requested preEmphasisLevel=%d, change to %d\n", dp_link->phy_params.p_level, - DP_TRAIN_PRE_EMPHASIS_MAX); - dp_link->phy_params.p_level = DP_TRAIN_PRE_EMPHASIS_MAX; + DP_TRAIN_LEVEL_MAX); + dp_link->phy_params.p_level = DP_TRAIN_LEVEL_MAX; } - if ((dp_link->phy_params.p_level > DP_TRAIN_PRE_EMPHASIS_LVL_1) - && (dp_link->phy_params.v_level == - DP_TRAIN_VOLTAGE_SWING_LVL_2)) { + max_p_level = DP_TRAIN_LEVEL_MAX - dp_link->phy_params.v_level; + if (dp_link->phy_params.p_level > max_p_level) { drm_dbg_dp(link->drm_dev, "Requested preEmphasisLevel=%d, change to %d\n", dp_link->phy_params.p_level, - DP_TRAIN_PRE_EMPHASIS_LVL_1); - dp_link->phy_params.p_level = DP_TRAIN_PRE_EMPHASIS_LVL_1; + max_p_level); + dp_link->phy_params.p_level = max_p_level; } drm_dbg_dp(link->drm_dev, "adjusted: v_level=%d, p_level=%d\n", --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/dp/dp_link.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/dp/dp_link.h @@ -19,19 +19,7 @@ unsigned long capabilities; }; -enum dp_link_voltage_level { - DP_TRAIN_VOLTAGE_SWING_LVL_0 = 0, - DP_TRAIN_VOLTAGE_SWING_LVL_1 = 1, - DP_TRAIN_VOLTAGE_SWING_LVL_2 = 2, - DP_TRAIN_VOLTAGE_SWING_MAX = DP_TRAIN_VOLTAGE_SWING_LVL_2, -}; - -enum dp_link_preemaphasis_level { - DP_TRAIN_PRE_EMPHASIS_LVL_0 = 0, - DP_TRAIN_PRE_EMPHASIS_LVL_1 = 1, - DP_TRAIN_PRE_EMPHASIS_LVL_2 = 2, - DP_TRAIN_PRE_EMPHASIS_MAX = DP_TRAIN_PRE_EMPHASIS_LVL_2, -}; +#define DP_TRAIN_LEVEL_MAX 3 struct dp_link_test_video { u32 test_video_pattern; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/dp/dp_panel.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/dp/dp_panel.c @@ -84,22 +84,22 @@ static u32 dp_panel_get_supported_bpp(struct dp_panel *dp_panel, u32 mode_edid_bpp, u32 mode_pclk_khz) { - struct dp_link_info *link_info; + const struct dp_link_info *link_info; const u32 max_supported_bpp = 30, min_supported_bpp = 18; - u32 bpp = 0, data_rate_khz = 0; + u32 bpp, data_rate_khz; - bpp = min_t(u32, mode_edid_bpp, max_supported_bpp); + bpp = min(mode_edid_bpp, max_supported_bpp); link_info = &dp_panel->link_info; data_rate_khz = link_info->num_lanes * link_info->rate * 8; - while (bpp > min_supported_bpp) { + do { if (mode_pclk_khz * bpp <= data_rate_khz) - break; + return bpp; bpp -= 6; - } + } while (bpp > min_supported_bpp); - return bpp; + return min_supported_bpp; } static int dp_panel_update_modes(struct drm_connector *connector, @@ -378,8 +378,9 @@ drm_mode->clock); drm_dbg_dp(panel->drm_dev, "bpp = %d\n", dp_panel->dp_mode.bpp); - dp_panel->dp_mode.bpp = max_t(u32, 18, - min_t(u32, dp_panel->dp_mode.bpp, 30)); + dp_panel->dp_mode.bpp = dp_panel_get_mode_bpp(dp_panel, dp_panel->dp_mode.bpp, + dp_panel->dp_mode.drm_mode.clock); + drm_dbg_dp(panel->drm_dev, "updated bpp = %d\n", dp_panel->dp_mode.bpp); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/dsi/dsi.xml.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/dsi/dsi.xml.h @@ -231,6 +231,7 @@ #define DSI_VID_CFG0_HSA_POWER_STOP 0x00010000 #define DSI_VID_CFG0_HBP_POWER_STOP 0x00100000 #define DSI_VID_CFG0_HFP_POWER_STOP 0x01000000 +#define DSI_VID_CFG0_DATABUS_WIDEN 0x02000000 #define DSI_VID_CFG0_PULSE_MODE_HSA_HE 0x10000000 #define REG_DSI_VID_CFG1 0x0000001c --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/dsi/dsi_host.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -366,8 +366,8 @@ { int ret; - DBG("Set clk rates: pclk=%d, byteclk=%lu", - msm_host->mode->clock, msm_host->byte_clk_rate); + DBG("Set clk rates: pclk=%lu, byteclk=%lu", + msm_host->pixel_clk_rate, msm_host->byte_clk_rate); ret = dev_pm_opp_set_rate(&msm_host->pdev->dev, msm_host->byte_clk_rate); @@ -440,9 +440,9 @@ { int ret; - DBG("Set clk rates: pclk=%d, byteclk=%lu, esc_clk=%lu, dsi_src_clk=%lu", - msm_host->mode->clock, msm_host->byte_clk_rate, - msm_host->esc_clk_rate, msm_host->src_clk_rate); + DBG("Set clk rates: pclk=%lu, byteclk=%lu, esc_clk=%lu, dsi_src_clk=%lu", + msm_host->pixel_clk_rate, msm_host->byte_clk_rate, + msm_host->esc_clk_rate, msm_host->src_clk_rate); ret = clk_set_rate(msm_host->byte_clk, msm_host->byte_clk_rate); if (ret) { @@ -537,7 +537,7 @@ int new_htotal = mode->htotal - mode->hdisplay + new_hdisplay; - return new_htotal * mode->vtotal * drm_mode_vrefresh(mode); + return mult_frac(mode->clock * 1000u, new_htotal, mode->htotal); } static unsigned long dsi_get_pclk_rate(const struct drm_display_mode *mode, @@ -545,7 +545,7 @@ { unsigned long pclk_rate; - pclk_rate = mode->clock * 1000; + pclk_rate = mode->clock * 1000u; if (dsc) pclk_rate = dsi_adjust_pclk_for_compression(mode, dsc); @@ -745,6 +745,8 @@ data |= DSI_VID_CFG0_TRAFFIC_MODE(dsi_get_traffic_mode(flags)); data |= DSI_VID_CFG0_DST_FORMAT(dsi_get_vid_fmt(mipi_fmt)); data |= DSI_VID_CFG0_VIRT_CHANNEL(msm_host->channel); + if (msm_dsi_host_is_wide_bus_enabled(&msm_host->base)) + data |= DSI_VID_CFG0_DATABUS_WIDEN; dsi_write(msm_host, REG_DSI_VID_CFG0, data); /* Do not swap RGB colors */ @@ -769,7 +771,6 @@ if (cfg_hnd->minor >= MSM_DSI_6G_VER_MINOR_V1_3) data |= DSI_CMD_MODE_MDP_CTRL2_BURST_MODE; - /* TODO: Allow for video-mode support once tested/fixed */ if (msm_dsi_host_is_wide_bus_enabled(&msm_host->base)) data |= DSI_CMD_MODE_MDP_CTRL2_DATABUS_WIDEN; @@ -847,6 +848,7 @@ u32 slice_per_intf, total_bytes_per_intf; u32 pkt_per_line; u32 eol_byte_num; + u32 bytes_per_pkt; /* first calculate dsc parameters and then program * compress mode registers @@ -854,6 +856,7 @@ slice_per_intf = msm_dsc_get_slices_per_intf(dsc, hdisplay); total_bytes_per_intf = dsc->slice_chunk_size * slice_per_intf; + bytes_per_pkt = dsc->slice_chunk_size; /* * slice_per_pkt; */ eol_byte_num = total_bytes_per_intf % 3; @@ -891,6 +894,7 @@ dsi_write(msm_host, REG_DSI_COMMAND_COMPRESSION_MODE_CTRL, reg_ctrl); dsi_write(msm_host, REG_DSI_COMMAND_COMPRESSION_MODE_CTRL2, reg_ctrl2); } else { + reg |= DSI_VIDEO_COMPRESSION_MODE_CTRL_WC(bytes_per_pkt); dsi_write(msm_host, REG_DSI_VIDEO_COMPRESSION_MODE_CTRL, reg); } } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c @@ -83,6 +83,9 @@ /* protects REG_DSI_7nm_PHY_CMN_CLK_CFG0 register */ spinlock_t postdiv_lock; + /* protects REG_DSI_7nm_PHY_CMN_CLK_CFG1 register */ + spinlock_t pclk_mux_lock; + struct pll_7nm_cached_state cached_state; struct dsi_pll_7nm *slave; @@ -135,7 +138,7 @@ config->pll_clock_inverters = 0x00; else config->pll_clock_inverters = 0x40; - } else { + } else if (pll->phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V4_1) { if (pll_freq <= 1000000000ULL) config->pll_clock_inverters = 0xa0; else if (pll_freq <= 2500000000ULL) @@ -144,6 +147,16 @@ config->pll_clock_inverters = 0x00; else config->pll_clock_inverters = 0x40; + } else { + /* 4.2, 4.3 */ + if (pll_freq <= 1000000000ULL) + config->pll_clock_inverters = 0xa0; + else if (pll_freq <= 2500000000ULL) + config->pll_clock_inverters = 0x20; + else if (pll_freq <= 3500000000ULL) + config->pll_clock_inverters = 0x00; + else + config->pll_clock_inverters = 0x40; } config->decimal_div_start = dec; @@ -363,23 +376,42 @@ ndelay(250); } -static void dsi_pll_disable_global_clk(struct dsi_pll_7nm *pll) +static void dsi_pll_cmn_clk_cfg0_write(struct dsi_pll_7nm *pll, u32 val) +{ + unsigned long flags; + + spin_lock_irqsave(&pll->postdiv_lock, flags); + dsi_phy_write(pll->phy->base + REG_DSI_7nm_PHY_CMN_CLK_CFG0, val); + spin_unlock_irqrestore(&pll->postdiv_lock, flags); +} + +static void dsi_pll_cmn_clk_cfg1_update(struct dsi_pll_7nm *pll, u32 mask, + u32 val) { + unsigned long flags; u32 data; + spin_lock_irqsave(&pll->pclk_mux_lock, flags); data = dsi_phy_read(pll->phy->base + REG_DSI_7nm_PHY_CMN_CLK_CFG1); - dsi_phy_write(pll->phy->base + REG_DSI_7nm_PHY_CMN_CLK_CFG1, data & ~BIT(5)); + data &= ~mask; + data |= val & mask; + + dsi_phy_write(pll->phy->base + REG_DSI_7nm_PHY_CMN_CLK_CFG1, data); + spin_unlock_irqrestore(&pll->pclk_mux_lock, flags); +} + +static void dsi_pll_disable_global_clk(struct dsi_pll_7nm *pll) +{ + dsi_pll_cmn_clk_cfg1_update(pll, BIT(5), 0); } static void dsi_pll_enable_global_clk(struct dsi_pll_7nm *pll) { - u32 data; + u32 cfg_1 = BIT(5) | BIT(4); dsi_phy_write(pll->phy->base + REG_DSI_7nm_PHY_CMN_CTRL_3, 0x04); - data = dsi_phy_read(pll->phy->base + REG_DSI_7nm_PHY_CMN_CLK_CFG1); - dsi_phy_write(pll->phy->base + REG_DSI_7nm_PHY_CMN_CLK_CFG1, - data | BIT(5) | BIT(4)); + dsi_pll_cmn_clk_cfg1_update(pll, cfg_1, cfg_1); } static void dsi_pll_phy_dig_reset(struct dsi_pll_7nm *pll) @@ -557,7 +589,6 @@ { struct dsi_pll_7nm *pll_7nm = to_pll_7nm(phy->vco_hw); struct pll_7nm_cached_state *cached = &pll_7nm->cached_state; - void __iomem *phy_base = pll_7nm->phy->base; u32 val; int ret; @@ -566,13 +597,10 @@ val |= cached->pll_out_div; dsi_phy_write(pll_7nm->phy->pll_base + REG_DSI_7nm_PHY_PLL_PLL_OUTDIV_RATE, val); - dsi_phy_write(phy_base + REG_DSI_7nm_PHY_CMN_CLK_CFG0, + dsi_pll_cmn_clk_cfg0_write(pll_7nm, cached->bit_clk_div | (cached->pix_clk_div << 4)); - val = dsi_phy_read(phy_base + REG_DSI_7nm_PHY_CMN_CLK_CFG1); - val &= ~0x3; - val |= cached->pll_mux; - dsi_phy_write(phy_base + REG_DSI_7nm_PHY_CMN_CLK_CFG1, val); + dsi_pll_cmn_clk_cfg1_update(pll_7nm, 0x3, cached->pll_mux); ret = dsi_pll_7nm_vco_set_rate(phy->vco_hw, pll_7nm->vco_current_rate, @@ -591,7 +619,6 @@ static int dsi_7nm_set_usecase(struct msm_dsi_phy *phy) { struct dsi_pll_7nm *pll_7nm = to_pll_7nm(phy->vco_hw); - void __iomem *base = phy->base; u32 data = 0x0; /* internal PLL */ DBG("DSI PLL%d", pll_7nm->phy->id); @@ -610,7 +637,7 @@ } /* set PLL src */ - dsi_phy_write(base + REG_DSI_7nm_PHY_CMN_CLK_CFG1, (data << 2)); + dsi_pll_cmn_clk_cfg1_update(pll_7nm, 0xc, (data << 2)); return 0; } @@ -725,7 +752,7 @@ pll_by_2_bit, }), 2, 0, pll_7nm->phy->base + REG_DSI_7nm_PHY_CMN_CLK_CFG1, - 0, 1, 0, NULL); + 0, 1, 0, &pll_7nm->pclk_mux_lock); if (IS_ERR(hw)) { ret = PTR_ERR(hw); goto fail; @@ -770,6 +797,7 @@ pll_7nm_list[phy->id] = pll_7nm; spin_lock_init(&pll_7nm->postdiv_lock); + spin_lock_init(&pll_7nm->pclk_mux_lock); pll_7nm->phy = phy; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/msm_drv.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/msm_drv.h @@ -75,16 +75,6 @@ #define MAX_H_TILES_PER_DISPLAY 2 /** - * enum msm_event_wait - type of HW events to wait for - * @MSM_ENC_COMMIT_DONE - wait for the driver to flush the registers to HW - * @MSM_ENC_TX_COMPLETE - wait for the HW to transfer the frame to panel - */ -enum msm_event_wait { - MSM_ENC_COMMIT_DONE = 0, - MSM_ENC_TX_COMPLETE, -}; - -/** * struct msm_display_topology - defines a display topology pipeline * @num_lm: number of layer mixers used * @num_intf: number of interfaces the panel is mounted on @@ -536,15 +526,12 @@ static inline unsigned long timeout_to_jiffies(const ktime_t *timeout) { ktime_t now = ktime_get(); - s64 remaining_jiffies; - if (ktime_compare(*timeout, now) < 0) { - remaining_jiffies = 0; - } else { - ktime_t rem = ktime_sub(*timeout, now); - remaining_jiffies = ktime_divns(rem, NSEC_PER_SEC / HZ); - } + if (ktime_compare(*timeout, now) <= 0) + return 0; + ktime_t rem = ktime_sub(*timeout, now); + s64 remaining_jiffies = ktime_divns(rem, NSEC_PER_SEC / HZ); return clamp(remaining_jiffies, 1LL, (s64)INT_MAX); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/msm_fb.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/msm_fb.c @@ -89,7 +89,7 @@ for (i = 0; i < n; i++) { ret = msm_gem_get_and_pin_iova(fb->obj[i], aspace, &msm_fb->iova[i]); - drm_dbg_state(fb->dev, "FB[%u]: iova[%d]: %08llx (%d)", + drm_dbg_state(fb->dev, "FB[%u]: iova[%d]: %08llx (%d)\n", fb->base.id, i, msm_fb->iova[i], ret); if (ret) return ret; @@ -176,7 +176,7 @@ const struct msm_format *format; int ret, i, n; - drm_dbg_state(dev, "create framebuffer: mode_cmd=%p (%dx%d@%4.4s)", + drm_dbg_state(dev, "create framebuffer: mode_cmd=%p (%dx%d@%4.4s)\n", mode_cmd, mode_cmd->width, mode_cmd->height, (char *)&mode_cmd->pixel_format); @@ -232,7 +232,7 @@ refcount_set(&msm_fb->dirtyfb, 1); - drm_dbg_state(dev, "create: FB ID: %d (%p)", fb->base.id, fb); + drm_dbg_state(dev, "create: FB ID: %d (%p)\n", fb->base.id, fb); return fb; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/msm_gem_submit.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/msm_gem_submit.c @@ -787,8 +787,7 @@ goto out; if (!submit->cmd[i].size || - ((submit->cmd[i].size + submit->cmd[i].offset) > - obj->size / 4)) { + (size_add(submit->cmd[i].size, submit->cmd[i].offset) > obj->size / 4)) { SUBMIT_ERROR(submit, "invalid cmdstream size: %u\n", submit->cmd[i].size * 4); ret = -EINVAL; goto out; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/msm_gpu.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/msm_gpu.c @@ -929,7 +929,6 @@ if (IS_ERR(gpu->gpu_cx)) gpu->gpu_cx = NULL; - gpu->pdev = pdev; platform_set_drvdata(pdev, &gpu->adreno_smmu); msm_devfreq_init(gpu); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/msm_gpu_devfreq.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/msm_gpu_devfreq.c @@ -140,6 +140,7 @@ { struct msm_gpu_devfreq *df = &gpu->devfreq; struct msm_drm_private *priv = gpu->dev->dev_private; + int ret; /* We need target support to do devfreq */ if (!gpu->funcs->gpu_busy) @@ -156,8 +157,12 @@ mutex_init(&df->lock); - dev_pm_qos_add_request(&gpu->pdev->dev, &df->boost_freq, - DEV_PM_QOS_MIN_FREQUENCY, 0); + ret = dev_pm_qos_add_request(&gpu->pdev->dev, &df->boost_freq, + DEV_PM_QOS_MIN_FREQUENCY, 0); + if (ret < 0) { + DRM_DEV_ERROR(&gpu->pdev->dev, "Couldn't initialize QoS\n"); + return; + } msm_devfreq_profile.initial_freq = gpu->fast_rate; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/msm_kms.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/msm_kms.c @@ -149,7 +149,7 @@ struct msm_kms *kms = priv->kms; if (!kms) return -ENXIO; - drm_dbg_vbl(dev, "crtc=%u", crtc->base.id); + drm_dbg_vbl(dev, "crtc=%u\n", crtc->base.id); return vblank_ctrl_queue_work(priv, crtc, true); } @@ -160,7 +160,7 @@ struct msm_kms *kms = priv->kms; if (!kms) return; - drm_dbg_vbl(dev, "crtc=%u", crtc->base.id); + drm_dbg_vbl(dev, "crtc=%u\n", crtc->base.id); vblank_ctrl_queue_work(priv, crtc, false); } @@ -244,7 +244,6 @@ ret = priv->kms_init(ddev); if (ret) { DRM_DEV_ERROR(dev, "failed to load kms\n"); - priv->kms = NULL; return ret; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/msm/msm_mdss.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/msm/msm_mdss.c @@ -526,7 +526,7 @@ .ubwc_enc_version = UBWC_2_0, .ubwc_dec_version = UBWC_2_0, .ubwc_static = 0x1e, - .highest_bank_bit = 0x3, + .highest_bank_bit = 0x1, .reg_bus_bw = 76800, }; @@ -602,6 +602,7 @@ .ubwc_dec_version = UBWC_3_0, .ubwc_swizzle = 1, .highest_bank_bit = 1, + .reg_bus_bw = 76800, }; static const struct msm_mdss_data sm8250_data = { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/mxsfb/lcdif_drv.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/mxsfb/lcdif_drv.c @@ -340,6 +340,9 @@ if (ret) return ret; + if (pm_runtime_suspended(dev)) + return 0; + return lcdif_rpm_suspend(dev); } @@ -347,7 +350,8 @@ { struct drm_device *drm = dev_get_drvdata(dev); - lcdif_rpm_resume(dev); + if (!pm_runtime_suspended(dev)) + lcdif_rpm_resume(dev); return drm_mode_config_helper_resume(drm); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/dispnv04/crtc.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/dispnv04/crtc.c @@ -1157,7 +1157,7 @@ chan = drm->channel; if (!chan) return -ENODEV; - cli = (void *)chan->user.client; + cli = chan->cli; push = chan->chan.push; s = kzalloc(sizeof(*s), GFP_KERNEL); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/dispnv04/disp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/dispnv04/disp.c @@ -68,7 +68,7 @@ if (nv_two_heads(dev)) NVWriteCRTC(dev, 1, NV_PCRTC_INTR_EN_0, 0); - if (!runtime) + if (!runtime && !drm->headless) cancel_work_sync(&drm->hpd_work); if (!suspend) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/dispnv04/tvnv17.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/dispnv04/tvnv17.c @@ -209,6 +209,8 @@ struct drm_display_mode *mode; mode = drm_mode_duplicate(encoder->dev, tv_mode); + if (!mode) + continue; mode->clock = tv_norm->tv_enc_mode.vrefresh * mode->htotal / 1000 * @@ -258,6 +260,8 @@ if (modes[i].hdisplay == output_mode->hdisplay && modes[i].vdisplay == output_mode->vdisplay) { mode = drm_mode_duplicate(encoder->dev, output_mode); + if (!mode) + continue; mode->type |= DRM_MODE_TYPE_PREFERRED; } else { @@ -265,6 +269,8 @@ modes[i].vdisplay, 60, false, (output_mode->flags & DRM_MODE_FLAG_INTERLACE), false); + if (!mode) + continue; } /* CVT modes are sometimes unsuitable... */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/dispnv50/disp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/dispnv50/disp.c @@ -914,7 +914,7 @@ msto->disabled = false; drm_dp_remove_payload_part2(mgr, new_mst_state, old_payload, new_payload); } else if (msto->enabled) { - drm_dp_add_payload_part2(mgr, state, new_payload); + drm_dp_add_payload_part2(mgr, new_payload); msto->enabled = false; } } @@ -2679,7 +2679,7 @@ nv50_mstm_fini(nouveau_encoder(encoder)); } - if (!runtime) + if (!runtime && !drm->headless) cancel_work_sync(&drm->hpd_work); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h @@ -15,7 +15,9 @@ }; struct nvkm_gsp_radix3 { - struct nvkm_gsp_mem mem[3]; + struct nvkm_gsp_mem lvl0; + struct nvkm_gsp_mem lvl1; + struct sg_table lvl2; }; int nvkm_gsp_sg(struct nvkm_device *, u64 size, struct sg_table *); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/nouveau_abi16.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/nouveau_abi16.c @@ -272,6 +272,9 @@ getparam->value = (u64)ttm_resource_manager_usage(vram_mgr); break; } + case NOUVEAU_GETPARAM_HAS_VMA_TILEMODE: + getparam->value = 1; + break; default: NV_PRINTK(dbg, cli, "unknown parameter %lld\n", getparam->param); return -EINVAL; @@ -343,7 +346,7 @@ list_add(&chan->head, &abi16->channels); /* create channel object and initialise dma and fence management */ - ret = nouveau_channel_new(drm, device, false, runm, init->fb_ctxdma_handle, + ret = nouveau_channel_new(cli, false, runm, init->fb_ctxdma_handle, init->tt_ctxdma_handle, &chan->chan); if (ret) goto done; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/nouveau_bios.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/nouveau_bios.c @@ -23,6 +23,7 @@ */ #include "nouveau_drv.h" +#include "nouveau_bios.h" #include "nouveau_reg.h" #include "dispnv04/hw.h" #include "nouveau_encoder.h" @@ -1677,7 +1678,7 @@ */ if (nv_match_device(dev, 0x0201, 0x1462, 0x8851)) { if (*conn == 0xf2005014 && *conf == 0xffffffff) { - fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 1, 1, 1); + fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 1, 1, DCB_OUTPUT_B); return false; } } @@ -1763,26 +1764,26 @@ #ifdef __powerpc__ /* Apple iMac G4 NV17 */ if (of_machine_is_compatible("PowerMac4,5")) { - fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 0, all_heads, 1); - fabricate_dcb_output(dcb, DCB_OUTPUT_ANALOG, 1, all_heads, 2); + fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 0, all_heads, DCB_OUTPUT_B); + fabricate_dcb_output(dcb, DCB_OUTPUT_ANALOG, 1, all_heads, DCB_OUTPUT_C); return; } #endif /* Make up some sane defaults */ fabricate_dcb_output(dcb, DCB_OUTPUT_ANALOG, - bios->legacy.i2c_indices.crt, 1, 1); + bios->legacy.i2c_indices.crt, 1, DCB_OUTPUT_B); if (nv04_tv_identify(dev, bios->legacy.i2c_indices.tv) >= 0) fabricate_dcb_output(dcb, DCB_OUTPUT_TV, bios->legacy.i2c_indices.tv, - all_heads, 0); + all_heads, DCB_OUTPUT_A); else if (bios->tmds.output0_script_ptr || bios->tmds.output1_script_ptr) fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, bios->legacy.i2c_indices.panel, - all_heads, 1); + all_heads, DCB_OUTPUT_B); } static int --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/nouveau_bo.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/nouveau_bo.c @@ -241,28 +241,28 @@ } nvbo->contig = !(tile_flags & NOUVEAU_GEM_TILE_NONCONTIG); - if (!nouveau_cli_uvmm(cli) || internal) { - /* for BO noVM allocs, don't assign kinds */ - if (cli->device.info.family >= NV_DEVICE_INFO_V0_FERMI) { - nvbo->kind = (tile_flags & 0x0000ff00) >> 8; - if (!nvif_mmu_kind_valid(mmu, nvbo->kind)) { - kfree(nvbo); - return ERR_PTR(-EINVAL); - } - nvbo->comp = mmu->kind[nvbo->kind] != nvbo->kind; - } else if (cli->device.info.family >= NV_DEVICE_INFO_V0_TESLA) { - nvbo->kind = (tile_flags & 0x00007f00) >> 8; - nvbo->comp = (tile_flags & 0x00030000) >> 16; - if (!nvif_mmu_kind_valid(mmu, nvbo->kind)) { - kfree(nvbo); - return ERR_PTR(-EINVAL); - } - } else { - nvbo->zeta = (tile_flags & 0x00000007); + if (cli->device.info.family >= NV_DEVICE_INFO_V0_FERMI) { + nvbo->kind = (tile_flags & 0x0000ff00) >> 8; + if (!nvif_mmu_kind_valid(mmu, nvbo->kind)) { + kfree(nvbo); + return ERR_PTR(-EINVAL); + } + + nvbo->comp = mmu->kind[nvbo->kind] != nvbo->kind; + } else if (cli->device.info.family >= NV_DEVICE_INFO_V0_TESLA) { + nvbo->kind = (tile_flags & 0x00007f00) >> 8; + nvbo->comp = (tile_flags & 0x00030000) >> 16; + if (!nvif_mmu_kind_valid(mmu, nvbo->kind)) { + kfree(nvbo); + return ERR_PTR(-EINVAL); } - nvbo->mode = tile_mode; + } else { + nvbo->zeta = (tile_flags & 0x00000007); + } + nvbo->mode = tile_mode; + if (!nouveau_cli_uvmm(cli) || internal) { /* Determine the desirable target GPU page size for the buffer. */ for (i = 0; i < vmm->page_nr; i++) { /* Because we cannot currently allow VMM maps to fail @@ -304,12 +304,6 @@ } nvbo->page = vmm->page[pi].shift; } else { - /* reject other tile flags when in VM mode. */ - if (tile_mode) - return ERR_PTR(-EINVAL); - if (tile_flags & ~NOUVEAU_GEM_TILE_NONCONTIG) - return ERR_PTR(-EINVAL); - /* Determine the desirable target GPU page size for the buffer. */ for (i = 0; i < vmm->page_nr; i++) { /* Because we cannot currently allow VMM maps to fail @@ -856,7 +850,7 @@ { struct nouveau_drm *drm = nouveau_bdev(bo->bdev); struct nouveau_channel *chan = drm->ttm.chan; - struct nouveau_cli *cli = (void *)chan->user.client; + struct nouveau_cli *cli = chan->cli; struct nouveau_fence *fence; int ret; @@ -1264,6 +1258,8 @@ drm_vma_node_unmap(&nvbo->bo.base.vma_node, bdev->dev_mapping); nouveau_ttm_io_mem_free_locked(drm, nvbo->bo.resource); + nvbo->bo.resource->bus.offset = 0; + nvbo->bo.resource->bus.addr = NULL; goto retry; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/nouveau_chan.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/nouveau_chan.c @@ -52,7 +52,7 @@ nouveau_channel_killed(struct nvif_event *event, void *repv, u32 repc) { struct nouveau_channel *chan = container_of(event, typeof(*chan), kill); - struct nouveau_cli *cli = (void *)chan->user.client; + struct nouveau_cli *cli = chan->cli; NV_PRINTK(warn, cli, "channel %d killed!\n", chan->chid); @@ -66,7 +66,7 @@ nouveau_channel_idle(struct nouveau_channel *chan) { if (likely(chan && chan->fence && !atomic_read(&chan->killed))) { - struct nouveau_cli *cli = (void *)chan->user.client; + struct nouveau_cli *cli = chan->cli; struct nouveau_fence *fence = NULL; int ret; @@ -142,10 +142,11 @@ } static int -nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device, +nouveau_channel_prep(struct nouveau_cli *cli, u32 size, struct nouveau_channel **pchan) { - struct nouveau_cli *cli = (void *)device->object.client; + struct nouveau_drm *drm = cli->drm; + struct nvif_device *device = &cli->device; struct nv_dma_v0 args = {}; struct nouveau_channel *chan; u32 target; @@ -155,6 +156,7 @@ if (!chan) return -ENOMEM; + chan->cli = cli; chan->device = device; chan->drm = drm; chan->vmm = nouveau_cli_vmm(cli); @@ -254,7 +256,7 @@ } static int -nouveau_channel_ctor(struct nouveau_drm *drm, struct nvif_device *device, bool priv, u64 runm, +nouveau_channel_ctor(struct nouveau_cli *cli, bool priv, u64 runm, struct nouveau_channel **pchan) { const struct nvif_mclass hosts[] = { @@ -279,7 +281,7 @@ struct nvif_chan_v0 chan; char name[TASK_COMM_LEN+16]; } args; - struct nouveau_cli *cli = (void *)device->object.client; + struct nvif_device *device = &cli->device; struct nouveau_channel *chan; const u64 plength = 0x10000; const u64 ioffset = plength; @@ -298,7 +300,7 @@ size = ioffset + ilength; /* allocate dma push buffer */ - ret = nouveau_channel_prep(drm, device, size, &chan); + ret = nouveau_channel_prep(cli, size, &chan); *pchan = chan; if (ret) return ret; @@ -493,13 +495,12 @@ } int -nouveau_channel_new(struct nouveau_drm *drm, struct nvif_device *device, +nouveau_channel_new(struct nouveau_cli *cli, bool priv, u64 runm, u32 vram, u32 gart, struct nouveau_channel **pchan) { - struct nouveau_cli *cli = (void *)device->object.client; int ret; - ret = nouveau_channel_ctor(drm, device, priv, runm, pchan); + ret = nouveau_channel_ctor(cli, priv, runm, pchan); if (ret) { NV_PRINTK(dbg, cli, "channel create, %d\n", ret); return ret; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/nouveau_chan.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/nouveau_chan.h @@ -12,6 +12,7 @@ struct nvif_push *push; } chan; + struct nouveau_cli *cli; struct nvif_device *device; struct nouveau_drm *drm; struct nouveau_vmm *vmm; @@ -62,7 +63,7 @@ int nouveau_channels_init(struct nouveau_drm *); void nouveau_channels_fini(struct nouveau_drm *); -int nouveau_channel_new(struct nouveau_drm *, struct nvif_device *, bool priv, u64 runm, +int nouveau_channel_new(struct nouveau_cli *, bool priv, u64 runm, u32 vram, u32 gart, struct nouveau_channel **); void nouveau_channel_del(struct nouveau_channel **); int nouveau_channel_idle(struct nouveau_channel *); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/nouveau_connector.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/nouveau_connector.c @@ -1001,6 +1001,9 @@ struct drm_display_mode *mode; mode = drm_mode_duplicate(dev, nv_connector->native_mode); + if (!mode) + return 0; + drm_mode_probed_add(connector, mode); ret = 1; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/nouveau_display.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/nouveau_display.c @@ -450,6 +450,9 @@ { struct nouveau_drm *drm = nouveau_drm(dev); + if (drm->headless) + return; + spin_lock_irq(&drm->hpd_lock); drm->hpd_pending = ~0; spin_unlock_irq(&drm->hpd_lock); @@ -635,7 +638,7 @@ } drm_connector_list_iter_end(&conn_iter); - if (!runtime) + if (!runtime && !drm->headless) cancel_work_sync(&drm->hpd_work); drm_kms_helper_poll_disable(dev); @@ -729,6 +732,7 @@ /* no display hw */ if (ret == -ENODEV) { ret = 0; + drm->headless = true; goto disp_create_err; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/nouveau_dmem.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/nouveau_dmem.c @@ -193,7 +193,7 @@ if (!spage || !(src & MIGRATE_PFN_MIGRATE)) goto done; - dpage = alloc_page_vma(GFP_HIGHUSER, vmf->vma, vmf->address); + dpage = alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO, vmf->vma, vmf->address); if (!dpage) goto done; @@ -378,9 +378,9 @@ dma_addr_t *dma_addrs; struct nouveau_fence *fence; - src_pfns = kcalloc(npages, sizeof(*src_pfns), GFP_KERNEL); - dst_pfns = kcalloc(npages, sizeof(*dst_pfns), GFP_KERNEL); - dma_addrs = kcalloc(npages, sizeof(*dma_addrs), GFP_KERNEL); + src_pfns = kvcalloc(npages, sizeof(*src_pfns), GFP_KERNEL | __GFP_NOFAIL); + dst_pfns = kvcalloc(npages, sizeof(*dst_pfns), GFP_KERNEL | __GFP_NOFAIL); + dma_addrs = kvcalloc(npages, sizeof(*dma_addrs), GFP_KERNEL | __GFP_NOFAIL); migrate_device_range(src_pfns, chunk->pagemap.range.start >> PAGE_SHIFT, npages); @@ -406,11 +406,11 @@ migrate_device_pages(src_pfns, dst_pfns, npages); nouveau_dmem_fence_done(&fence); migrate_device_finalize(src_pfns, dst_pfns, npages); - kfree(src_pfns); - kfree(dst_pfns); + kvfree(src_pfns); + kvfree(dst_pfns); for (i = 0; i < npages; i++) dma_unmap_page(chunk->drm->dev->dev, dma_addrs[i], PAGE_SIZE, DMA_BIDIRECTIONAL); - kfree(dma_addrs); + kvfree(dma_addrs); } void --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/nouveau_dp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/nouveau_dp.c @@ -225,12 +225,15 @@ u8 *dpcd = nv_encoder->dp.dpcd; int ret = NOUVEAU_DP_NONE, hpd; - /* If we've already read the DPCD on an eDP device, we don't need to - * reread it as it won't change + /* eDP ports don't support hotplugging - so there's no point in probing eDP ports unless we + * haven't probed them once before. */ - if (connector->connector_type == DRM_MODE_CONNECTOR_eDP && - dpcd[DP_DPCD_REV] != 0) - return NOUVEAU_DP_SST; + if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { + if (connector->status == connector_status_connected) + return NOUVEAU_DP_SST; + else if (connector->status == connector_status_disconnected) + return NOUVEAU_DP_NONE; + } mutex_lock(&nv_encoder->dp.hpd_irq_lock); if (mstm) { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/nouveau_drm.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/nouveau_drm.c @@ -356,7 +356,7 @@ return; } - ret = nouveau_channel_new(drm, device, false, runm, NvDmaFB, NvDmaTT, &drm->cechan); + ret = nouveau_channel_new(&drm->client, true, runm, NvDmaFB, NvDmaTT, &drm->cechan); if (ret) NV_ERROR(drm, "failed to create ce channel, %d\n", ret); } @@ -384,7 +384,7 @@ return; } - ret = nouveau_channel_new(drm, device, false, runm, NvDmaFB, NvDmaTT, &drm->channel); + ret = nouveau_channel_new(&drm->client, false, runm, NvDmaFB, NvDmaTT, &drm->channel); if (ret) { NV_ERROR(drm, "failed to create kernel channel, %d\n", ret); nouveau_accel_gr_fini(drm); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/nouveau_drv.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/nouveau_drv.h @@ -276,6 +276,7 @@ /* modesetting */ struct nvbios vbios; struct nouveau_display *display; + bool headless; struct work_struct hpd_work; spinlock_t hpd_lock; u32 hpd_pending; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/nouveau_fence.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/nouveau_fence.c @@ -386,11 +386,13 @@ if (f) { struct nouveau_channel *prev; bool must_wait = true; + bool local; rcu_read_lock(); prev = rcu_dereference(f->channel); - if (prev && (prev == chan || - fctx->sync(f, prev, chan) == 0)) + local = prev && prev->cli->drm == chan->cli->drm; + if (local && (prev == chan || + fctx->sync(f, prev, chan) == 0)) must_wait = false; rcu_read_unlock(); if (!must_wait) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/nouveau_prime.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/nouveau_prime.c @@ -64,7 +64,8 @@ * to the caller, instead of a normal nouveau_bo ttm reference. */ ret = drm_gem_object_init(dev, &nvbo->bo.base, size); if (ret) { - nouveau_bo_ref(NULL, &nvbo); + drm_gem_object_release(&nvbo->bo.base); + kfree(nvbo); obj = ERR_PTR(-ENOMEM); goto unlock; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/nouveau_svm.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/nouveau_svm.c @@ -593,6 +593,7 @@ unsigned long timeout = jiffies + msecs_to_jiffies(HMM_RANGE_DEFAULT_TIMEOUT); struct mm_struct *mm = svmm->notifier.mm; + struct folio *folio; struct page *page; unsigned long start = args->p.addr; unsigned long notifier_seq; @@ -619,12 +620,16 @@ ret = -EINVAL; goto out; } + folio = page_folio(page); mutex_lock(&svmm->mutex); if (!mmu_interval_read_retry(¬ifier->notifier, notifier_seq)) break; mutex_unlock(&svmm->mutex); + + folio_unlock(folio); + folio_put(folio); } /* Map the page on the GPU. */ @@ -640,8 +645,8 @@ ret = nvif_object_ioctl(&svmm->vmm->vmm.object, args, size, NULL); mutex_unlock(&svmm->mutex); - unlock_page(page); - put_page(page); + folio_unlock(folio); + folio_put(folio); out: mmu_interval_notifier_remove(¬ifier->notifier); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/nouveau_uvmm.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/nouveau_uvmm.c @@ -812,15 +812,15 @@ struct drm_gpuva_op_unmap *u = r->unmap; struct nouveau_uvma *uvma = uvma_from_va(u->va); u64 addr = uvma->va.va.addr; - u64 range = uvma->va.va.range; + u64 end = uvma->va.va.addr + uvma->va.va.range; if (r->prev) addr = r->prev->va.addr + r->prev->va.range; if (r->next) - range = r->next->va.addr - addr; + end = r->next->va.addr; - op_unmap_range(u, addr, range); + op_unmap_range(u, addr, end - addr); } static int @@ -1803,6 +1803,7 @@ { struct nouveau_bo *nvbo = nouveau_gem_object(vm_bo->obj); + nouveau_bo_placement_set(nvbo, nvbo->valid_domains, 0); return nouveau_bo_validate(nvbo, true, false); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/nvkm/core/firmware.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/nvkm/core/firmware.c @@ -205,7 +205,8 @@ break; case NVKM_FIRMWARE_IMG_DMA: nvkm_memory_unref(&memory); - dma_free_coherent(fw->device->dev, sg_dma_len(&fw->mem.sgl), fw->img, fw->phys); + dma_free_noncoherent(fw->device->dev, sg_dma_len(&fw->mem.sgl), + fw->img, fw->phys, DMA_TO_DEVICE); break; case NVKM_FIRMWARE_IMG_SGT: nvkm_memory_unref(&memory); @@ -236,10 +237,12 @@ break; case NVKM_FIRMWARE_IMG_DMA: { dma_addr_t addr; - len = ALIGN(fw->len, PAGE_SIZE); - fw->img = dma_alloc_coherent(fw->device->dev, len, &addr, GFP_KERNEL); + fw->img = dma_alloc_noncoherent(fw->device->dev, + len, &addr, + DMA_TO_DEVICE, + GFP_KERNEL); if (fw->img) { memcpy(fw->img, src, fw->len); fw->phys = addr; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp77.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp77.c @@ -31,6 +31,7 @@ .state = g94_sor_state, .power = nv50_sor_power, .clock = nv50_sor_clock, + .bl = &nv50_sor_bl, .hdmi = &g84_sor_hdmi, .dp = &g94_sor_dp, }; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/nvkm/engine/disp/r535.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/nvkm/engine/disp/r535.c @@ -992,7 +992,7 @@ ctrl->data = data; ret = nvkm_gsp_rm_ctrl_push(&disp->rm.objcom, &ctrl, sizeof(*ctrl)); - if (ret == -EAGAIN && ctrl->retryTimeMs) { + if ((ret == -EAGAIN || ret == -EBUSY) && ctrl->retryTimeMs) { /* * Device (likely an eDP panel) isn't ready yet, wait for the time specified * by GSP before retrying again @@ -1060,33 +1060,44 @@ NV0073_CTRL_DP_AUXCH_CTRL_PARAMS *ctrl; u8 size = *psize; int ret; + int retries; - ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, NV0073_CTRL_CMD_DP_AUXCH_CTRL, sizeof(*ctrl)); - if (IS_ERR(ctrl)) - return PTR_ERR(ctrl); + for (retries = 0; retries < 3; ++retries) { + ctrl = nvkm_gsp_rm_ctrl_get(&disp->rm.objcom, NV0073_CTRL_CMD_DP_AUXCH_CTRL, sizeof(*ctrl)); + if (IS_ERR(ctrl)) + return PTR_ERR(ctrl); + + ctrl->subDeviceInstance = 0; + ctrl->displayId = BIT(outp->index); + ctrl->bAddrOnly = !size; + ctrl->cmd = type; + if (ctrl->bAddrOnly) { + ctrl->cmd = NVDEF_SET(ctrl->cmd, NV0073_CTRL, DP_AUXCH_CMD, REQ_TYPE, WRITE); + ctrl->cmd = NVDEF_SET(ctrl->cmd, NV0073_CTRL, DP_AUXCH_CMD, I2C_MOT, FALSE); + } + ctrl->addr = addr; + ctrl->size = !ctrl->bAddrOnly ? (size - 1) : 0; + memcpy(ctrl->data, data, size); - ctrl->subDeviceInstance = 0; - ctrl->displayId = BIT(outp->index); - ctrl->bAddrOnly = !size; - ctrl->cmd = type; - if (ctrl->bAddrOnly) { - ctrl->cmd = NVDEF_SET(ctrl->cmd, NV0073_CTRL, DP_AUXCH_CMD, REQ_TYPE, WRITE); - ctrl->cmd = NVDEF_SET(ctrl->cmd, NV0073_CTRL, DP_AUXCH_CMD, I2C_MOT, FALSE); - } - ctrl->addr = addr; - ctrl->size = !ctrl->bAddrOnly ? (size - 1) : 0; - memcpy(ctrl->data, data, size); - - ret = nvkm_gsp_rm_ctrl_push(&disp->rm.objcom, &ctrl, sizeof(*ctrl)); - if (ret) { - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); - return PTR_ERR(ctrl); + ret = nvkm_gsp_rm_ctrl_push(&disp->rm.objcom, &ctrl, sizeof(*ctrl)); + if ((ret == -EAGAIN || ret == -EBUSY) && ctrl->retryTimeMs) { + /* + * Device (likely an eDP panel) isn't ready yet, wait for the time specified + * by GSP before retrying again + */ + nvkm_debug(&disp->engine.subdev, + "Waiting %dms for GSP LT panel delay before retrying in AUX\n", + ctrl->retryTimeMs); + msleep(ctrl->retryTimeMs); + nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); + } else { + memcpy(data, ctrl->data, size); + *psize = ctrl->size; + ret = ctrl->replyType; + nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); + break; + } } - - memcpy(data, ctrl->data, size); - *psize = ctrl->size; - ret = ctrl->replyType; - nvkm_gsp_rm_ctrl_done(&disp->rm.objcom, ctrl); return ret; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c @@ -443,6 +443,7 @@ ret = gf100_grctx_generate(gr, chan, fifoch->inst); if (ret) { nvkm_error(&base->engine.subdev, "failed to construct context\n"); + mutex_unlock(&gr->fecs.mutex); return ret; } } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/nvkm/falcon/fw.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/nvkm/falcon/fw.c @@ -89,6 +89,7 @@ nvkm_falcon_fw_dtor_sigs(fw); } + FLCNFW_DBG(fw, "resetting"); fw->func->reset(fw); @@ -99,6 +100,12 @@ goto done; } + /* after last write to the img, sync dma mappings */ + dma_sync_single_for_device(fw->fw.device->dev, + fw->fw.phys, + sg_dma_len(&fw->fw.mem.sgl), + DMA_TO_DEVICE); + ret = fw->func->load(fw); if (ret) goto done; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowof.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowof.c @@ -66,11 +66,16 @@ return ERR_PTR(-EINVAL); } +static void of_fini(void *p) +{ + kfree(p); +} + const struct nvbios_source nvbios_of = { .name = "OpenFirmware", .init = of_init, - .fini = (void(*)(void *))kfree, + .fini = of_fini, .read = of_read, .size = of_size, .rw = false, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm107.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm107.c @@ -25,6 +25,7 @@ #include #include +#include void gm107_devinit_disable(struct nvkm_devinit *init) @@ -33,10 +34,13 @@ u32 r021c00 = nvkm_rd32(device, 0x021c00); u32 r021c04 = nvkm_rd32(device, 0x021c04); - if (r021c00 & 0x00000001) - nvkm_subdev_disable(device, NVKM_ENGINE_CE, 0); - if (r021c00 & 0x00000004) - nvkm_subdev_disable(device, NVKM_ENGINE_CE, 2); + /* gsp only wants to enable/disable display */ + if (!nvkm_gsp_rm(device->gsp)) { + if (r021c00 & 0x00000001) + nvkm_subdev_disable(device, NVKM_ENGINE_CE, 0); + if (r021c00 & 0x00000004) + nvkm_subdev_disable(device, NVKM_ENGINE_CE, 2); + } if (r021c04 & 0x00000001) nvkm_subdev_disable(device, NVKM_ENGINE_DISP, 0); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ram.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ram.h @@ -46,6 +46,8 @@ u32 gm200_ram_probe_fbp_amount(const struct nvkm_ram_func *, u32, struct nvkm_device *, int, int *); +int gp100_ram_init(struct nvkm_ram *); + /* RAM type-specific MR calculation routines */ int nvkm_sddr2_calc(struct nvkm_ram *); int nvkm_sddr3_calc(struct nvkm_ram *); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgp100.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgp100.c @@ -27,7 +27,7 @@ #include #include -static int +int gp100_ram_init(struct nvkm_ram *ram) { struct nvkm_subdev *subdev = &ram->fb->subdev; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgp102.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgp102.c @@ -5,6 +5,7 @@ static const struct nvkm_ram_func gp102_ram = { + .init = gp100_ram_init, }; int --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/fwsec.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/fwsec.c @@ -324,7 +324,7 @@ return ret; /* Verify. */ - err = nvkm_rd32(device, 0x001400 + (0xf * 4)) & 0x0000ffff; + err = nvkm_rd32(device, 0x001400 + (0x15 * 4)) & 0x0000ffff; if (err) { nvkm_error(subdev, "fwsec-sb: 0x%04x\n", err); return -EIO; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/r535.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/r535.c @@ -76,7 +76,7 @@ switch (rpc_status) { case 0x55: /* NV_ERR_NOT_READY */ case 0x66: /* NV_ERR_TIMEOUT_RETRY */ - return -EAGAIN; + return -EBUSY; case 0x51: /* NV_ERR_NO_MEMORY */ return -ENOMEM; default: @@ -119,6 +119,8 @@ return mqe->data; } + size = ALIGN(repc + GSP_MSG_HDR_SIZE, GSP_PAGE_SIZE); + msg = kvmalloc(repc, GFP_KERNEL); if (!msg) return ERR_PTR(-ENOMEM); @@ -127,19 +129,15 @@ len = min_t(u32, repc, len); memcpy(msg, mqe->data, len); - rptr += DIV_ROUND_UP(len, GSP_PAGE_SIZE); - if (rptr == gsp->msgq.cnt) - rptr = 0; - repc -= len; if (repc) { mqe = (void *)((u8 *)gsp->shm.msgq.ptr + 0x1000 + 0 * 0x1000); memcpy(msg + len, mqe, repc); - - rptr += DIV_ROUND_UP(repc, GSP_PAGE_SIZE); } + rptr = (rptr + DIV_ROUND_UP(size, GSP_PAGE_SIZE)) % gsp->msgq.cnt; + mb(); (*gsp->msgq.rptr) = rptr; return msg; @@ -161,7 +159,7 @@ u64 *end; u64 csum = 0; int free, time = 1000000; - u32 wptr, size; + u32 wptr, size, step; u32 off = 0; argc = ALIGN(GSP_MSG_HDR_SIZE + argc, GSP_PAGE_SIZE); @@ -195,7 +193,9 @@ } cqe = (void *)((u8 *)gsp->shm.cmdq.ptr + 0x1000 + wptr * 0x1000); - size = min_t(u32, argc, (gsp->cmdq.cnt - wptr) * GSP_PAGE_SIZE); + step = min_t(u32, free, (gsp->cmdq.cnt - wptr)); + size = min_t(u32, argc, step * GSP_PAGE_SIZE); + memcpy(cqe, (u8 *)cmd + off, size); wptr += DIV_ROUND_UP(size, 0x1000); @@ -599,7 +599,7 @@ if (rpc->status) { ret = ERR_PTR(r535_rpc_status_to_errno(rpc->status)); - if (PTR_ERR(ret) != -EAGAIN) + if (PTR_ERR(ret) != -EAGAIN && PTR_ERR(ret) != -EBUSY) nvkm_error(&gsp->subdev, "RM_ALLOC: 0x%x\n", rpc->status); } else { ret = repc ? rpc->params : NULL; @@ -658,7 +658,7 @@ if (rpc->status) { ret = r535_rpc_status_to_errno(rpc->status); - if (ret != -EAGAIN) + if (ret != -EAGAIN && ret != -EBUSY) nvkm_error(&gsp->subdev, "cli:0x%08x obj:0x%08x ctrl cmd:0x%08x failed: 0x%08x\n", object->client->object.handle, object->handle, rpc->cmd, rpc->status); } @@ -1112,7 +1112,7 @@ rpc->numEntries = NV_GSP_REG_NUM_ENTRIES; str_offset = offsetof(typeof(*rpc), entries[NV_GSP_REG_NUM_ENTRIES]); - strings = (char *)&rpc->entries[NV_GSP_REG_NUM_ENTRIES]; + strings = (char *)rpc + str_offset; for (i = 0; i < NV_GSP_REG_NUM_ENTRIES; i++) { int name_len = strlen(r535_registry_entries[i].name) + 1; @@ -1620,7 +1620,7 @@ meta->magic = GSP_FW_WPR_META_MAGIC; meta->revision = GSP_FW_WPR_META_REVISION; - meta->sysmemAddrOfRadix3Elf = gsp->radix3.mem[0].addr; + meta->sysmemAddrOfRadix3Elf = gsp->radix3.lvl0.addr; meta->sizeOfRadix3Elf = gsp->fb.wpr2.elf.size; meta->sysmemAddrOfBootloader = gsp->boot.fw.addr; @@ -1914,8 +1914,9 @@ static void nvkm_gsp_radix3_dtor(struct nvkm_gsp *gsp, struct nvkm_gsp_radix3 *rx3) { - for (int i = ARRAY_SIZE(rx3->mem) - 1; i >= 0; i--) - nvkm_gsp_mem_dtor(gsp, &rx3->mem[i]); + nvkm_gsp_sg_free(gsp->subdev.device, &rx3->lvl2); + nvkm_gsp_mem_dtor(gsp, &rx3->lvl1); + nvkm_gsp_mem_dtor(gsp, &rx3->lvl0); } /** @@ -1951,36 +1952,60 @@ nvkm_gsp_radix3_sg(struct nvkm_gsp *gsp, struct sg_table *sgt, u64 size, struct nvkm_gsp_radix3 *rx3) { - u64 addr; + struct sg_dma_page_iter sg_dma_iter; + struct scatterlist *sg; + size_t bufsize; + u64 *pte; + int ret, i, page_idx = 0; - for (int i = ARRAY_SIZE(rx3->mem) - 1; i >= 0; i--) { - u64 *ptes; - size_t bufsize; - int ret, idx; + ret = nvkm_gsp_mem_ctor(gsp, GSP_PAGE_SIZE, &rx3->lvl0); + if (ret) + return ret; - bufsize = ALIGN((size / GSP_PAGE_SIZE) * sizeof(u64), GSP_PAGE_SIZE); - ret = nvkm_gsp_mem_ctor(gsp, bufsize, &rx3->mem[i]); - if (ret) - return ret; + ret = nvkm_gsp_mem_ctor(gsp, GSP_PAGE_SIZE, &rx3->lvl1); + if (ret) + goto lvl1_fail; - ptes = rx3->mem[i].data; - if (i == 2) { - struct scatterlist *sgl; - - for_each_sgtable_dma_sg(sgt, sgl, idx) { - for (int j = 0; j < sg_dma_len(sgl) / GSP_PAGE_SIZE; j++) - *ptes++ = sg_dma_address(sgl) + (GSP_PAGE_SIZE * j); - } - } else { - for (int j = 0; j < size / GSP_PAGE_SIZE; j++) - *ptes++ = addr + GSP_PAGE_SIZE * j; + // Allocate level 2 + bufsize = ALIGN((size / GSP_PAGE_SIZE) * sizeof(u64), GSP_PAGE_SIZE); + ret = nvkm_gsp_sg(gsp->subdev.device, bufsize, &rx3->lvl2); + if (ret) + goto lvl2_fail; + + // Write the bus address of level 1 to level 0 + pte = rx3->lvl0.data; + *pte = rx3->lvl1.addr; + + // Write the bus address of each page in level 2 to level 1 + pte = rx3->lvl1.data; + for_each_sgtable_dma_page(&rx3->lvl2, &sg_dma_iter, 0) + *pte++ = sg_page_iter_dma_address(&sg_dma_iter); + + // Finally, write the bus address of each page in sgt to level 2 + for_each_sgtable_sg(&rx3->lvl2, sg, i) { + void *sgl_end; + + pte = sg_virt(sg); + sgl_end = (void *)pte + sg->length; + + for_each_sgtable_dma_page(sgt, &sg_dma_iter, page_idx) { + *pte++ = sg_page_iter_dma_address(&sg_dma_iter); + page_idx++; + + // Go to the next scatterlist for level 2 if we've reached the end + if ((void *)pte >= sgl_end) + break; } + } - size = rx3->mem[i].size; - addr = rx3->mem[i].addr; + if (ret) { +lvl2_fail: + nvkm_gsp_mem_dtor(gsp, &rx3->lvl1); +lvl1_fail: + nvkm_gsp_mem_dtor(gsp, &rx3->lvl0); } - return 0; + return ret; } int @@ -2012,7 +2037,7 @@ sr = gsp->sr.meta.data; sr->magic = GSP_FW_SR_META_MAGIC; sr->revision = GSP_FW_SR_META_REVISION; - sr->sysmemAddrOfSuspendResumeData = gsp->sr.radix3.mem[0].addr; + sr->sysmemAddrOfSuspendResumeData = gsp->sr.radix3.lvl0.addr; sr->sizeOfSuspendResumeData = len; mbox0 = lower_32_bits(gsp->sr.meta.addr); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c @@ -222,8 +222,11 @@ void __iomem *map = NULL; /* Already mapped? */ - if (refcount_inc_not_zero(&iobj->maps)) + if (refcount_inc_not_zero(&iobj->maps)) { + /* read barrier match the wmb on refcount set */ + smp_rmb(); return iobj->map; + } /* Take the lock, and re-check that another thread hasn't * already mapped the object in the meantime. @@ -250,6 +253,8 @@ iobj->base.memory.ptrs = &nv50_instobj_fast; else iobj->base.memory.ptrs = &nv50_instobj_slow; + /* barrier to ensure the ptrs are written before refcount is set */ + smp_wmb(); refcount_set(&iobj->maps, 1); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp10b.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp10b.c @@ -75,7 +75,7 @@ .bootstrap_multiple_falcons = gp10b_pmu_acr_bootstrap_multiple_falcons, }; -#if IS_ENABLED(CONFIG_ARCH_TEGRA_210_SOC) +#if IS_ENABLED(CONFIG_ARCH_TEGRA_186_SOC) MODULE_FIRMWARE("nvidia/gp10b/pmu/desc.bin"); MODULE_FIRMWARE("nvidia/gp10b/pmu/image.bin"); MODULE_FIRMWARE("nvidia/gp10b/pmu/sig.bin"); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/omapdrm/Kconfig +++ linux-xilinx-6.8.0/drivers/gpu/drm/omapdrm/Kconfig @@ -4,7 +4,7 @@ depends on DRM && OF depends on ARCH_OMAP2PLUS select DRM_KMS_HELPER - select FB_DMAMEM_HELPERS if DRM_FBDEV_EMULATION + select FB_DMAMEM_HELPERS_DEFERRED if DRM_FBDEV_EMULATION select VIDEOMODE_HELPERS select HDMI default n --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/omapdrm/dss/base.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/omapdrm/dss/base.c @@ -139,21 +139,13 @@ } int omapdss_device_connect(struct dss_device *dss, - struct omap_dss_device *src, struct omap_dss_device *dst) { - dev_dbg(&dss->pdev->dev, "connect(%s, %s)\n", - src ? dev_name(src->dev) : "NULL", + dev_dbg(&dss->pdev->dev, "connect(%s)\n", dst ? dev_name(dst->dev) : "NULL"); - if (!dst) { - /* - * The destination is NULL when the source is connected to a - * bridge instead of a DSS device. Stop here, we will attach - * the bridge later when we will have a DRM encoder. - */ - return src && src->bridge ? 0 : -EINVAL; - } + if (!dst) + return -EINVAL; if (omapdss_device_is_connected(dst)) return -EBUSY; @@ -163,19 +155,14 @@ return 0; } -void omapdss_device_disconnect(struct omap_dss_device *src, +void omapdss_device_disconnect(struct dss_device *dss, struct omap_dss_device *dst) { - struct dss_device *dss = src ? src->dss : dst->dss; - - dev_dbg(&dss->pdev->dev, "disconnect(%s, %s)\n", - src ? dev_name(src->dev) : "NULL", + dev_dbg(&dss->pdev->dev, "disconnect(%s)\n", dst ? dev_name(dst->dev) : "NULL"); - if (!dst) { - WARN_ON(!src->bridge); + if (WARN_ON(!dst)) return; - } if (!dst->id && !omapdss_device_is_connected(dst)) { WARN_ON(1); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/omapdrm/dss/omapdss.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/omapdrm/dss/omapdss.h @@ -242,9 +242,8 @@ void omapdss_device_put(struct omap_dss_device *dssdev); struct omap_dss_device *omapdss_find_device_by_node(struct device_node *node); int omapdss_device_connect(struct dss_device *dss, - struct omap_dss_device *src, struct omap_dss_device *dst); -void omapdss_device_disconnect(struct omap_dss_device *src, +void omapdss_device_disconnect(struct dss_device *dss, struct omap_dss_device *dst); int omap_dss_get_num_overlay_managers(void); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/omapdrm/omap_drv.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/omapdrm/omap_drv.c @@ -307,7 +307,7 @@ for (i = 0; i < priv->num_pipes; i++) { struct omap_drm_pipeline *pipe = &priv->pipes[i]; - omapdss_device_disconnect(NULL, pipe->output); + omapdss_device_disconnect(priv->dss, pipe->output); omapdss_device_put(pipe->output); pipe->output = NULL; @@ -325,7 +325,7 @@ int r; for_each_dss_output(output) { - r = omapdss_device_connect(priv->dss, NULL, output); + r = omapdss_device_connect(priv->dss, output); if (r == -EPROBE_DEFER) { omapdss_device_put(output); return r; @@ -695,6 +695,10 @@ soc = soc_device_match(omapdrm_soc_devices); priv->omaprev = soc ? (uintptr_t)soc->data : 0; priv->wq = alloc_ordered_workqueue("omapdrm", 0); + if (!priv->wq) { + ret = -ENOMEM; + goto err_alloc_workqueue; + } mutex_init(&priv->list_lock); INIT_LIST_HEAD(&priv->obj_list); @@ -753,6 +757,7 @@ drm_mode_config_cleanup(ddev); omap_gem_deinit(ddev); destroy_workqueue(priv->wq); +err_alloc_workqueue: omap_disconnect_pipelines(ddev); drm_dev_put(ddev); return ret; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/omapdrm/omap_fbdev.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/omapdrm/omap_fbdev.c @@ -51,6 +51,10 @@ omap_gem_roll(bo, fbi->var.yoffset * npages); } +FB_GEN_DEFAULT_DEFERRED_DMAMEM_OPS(omap_fbdev, + drm_fb_helper_damage_range, + drm_fb_helper_damage_area) + static int omap_fbdev_pan_display(struct fb_var_screeninfo *var, struct fb_info *fbi) { @@ -78,11 +82,9 @@ static int omap_fbdev_fb_mmap(struct fb_info *info, struct vm_area_struct *vma) { - struct drm_fb_helper *helper = info->par; - struct drm_framebuffer *fb = helper->fb; - struct drm_gem_object *bo = drm_gem_fb_get_obj(fb, 0); + vma->vm_page_prot = pgprot_writecombine(vm_get_page_prot(vma->vm_flags)); - return drm_gem_mmap_obj(bo, omap_gem_mmap_size(bo), vma); + return fb_deferred_io_mmap(info, vma); } static void omap_fbdev_fb_destroy(struct fb_info *info) @@ -94,6 +96,7 @@ DBG(); + fb_deferred_io_cleanup(info); drm_fb_helper_fini(helper); omap_gem_unpin(bo); @@ -104,15 +107,19 @@ kfree(fbdev); } +/* + * For now, we cannot use FB_DEFAULT_DEFERRED_OPS and fb_deferred_io_mmap() + * because we use write-combine. + */ static const struct fb_ops omap_fb_ops = { .owner = THIS_MODULE, - __FB_DEFAULT_DMAMEM_OPS_RDWR, + __FB_DEFAULT_DEFERRED_OPS_RDWR(omap_fbdev), .fb_check_var = drm_fb_helper_check_var, .fb_set_par = drm_fb_helper_set_par, .fb_setcmap = drm_fb_helper_setcmap, .fb_blank = drm_fb_helper_blank, .fb_pan_display = omap_fbdev_pan_display, - __FB_DEFAULT_DMAMEM_OPS_DRAW, + __FB_DEFAULT_DEFERRED_OPS_DRAW(omap_fbdev), .fb_ioctl = drm_fb_helper_ioctl, .fb_mmap = omap_fbdev_fb_mmap, .fb_destroy = omap_fbdev_fb_destroy, @@ -213,6 +220,15 @@ fbi->fix.smem_start = dma_addr; fbi->fix.smem_len = bo->size; + /* deferred I/O */ + helper->fbdefio.delay = HZ / 20; + helper->fbdefio.deferred_io = drm_fb_helper_deferred_io; + + fbi->fbdefio = &helper->fbdefio; + ret = fb_deferred_io_init(fbi); + if (ret) + goto fail; + /* if we have DMM, then we can use it for scrolling by just * shuffling pages around in DMM rather than doing sw blit. */ @@ -238,8 +254,20 @@ return ret; } +static int omap_fbdev_dirty(struct drm_fb_helper *helper, struct drm_clip_rect *clip) +{ + if (!(clip->x1 < clip->x2 && clip->y1 < clip->y2)) + return 0; + + if (helper->fb->funcs->dirty) + return helper->fb->funcs->dirty(helper->fb, NULL, 0, 0, clip, 1); + + return 0; +} + static const struct drm_fb_helper_funcs omap_fb_helper_funcs = { .fb_probe = omap_fbdev_create, + .fb_dirty = omap_fbdev_dirty, }; static struct drm_fb_helper *get_fb(struct fb_info *fbi) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/omapdrm/omap_gem.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/omapdrm/omap_gem.c @@ -1401,8 +1401,6 @@ omap_obj = to_omap_bo(obj); - mutex_lock(&omap_obj->lock); - omap_obj->sgt = sgt; if (omap_gem_sgt_is_contiguous(sgt, size)) { @@ -1417,21 +1415,17 @@ pages = kcalloc(npages, sizeof(*pages), GFP_KERNEL); if (!pages) { omap_gem_free_object(obj); - obj = ERR_PTR(-ENOMEM); - goto done; + return ERR_PTR(-ENOMEM); } omap_obj->pages = pages; ret = drm_prime_sg_to_page_array(sgt, pages, npages); if (ret) { omap_gem_free_object(obj); - obj = ERR_PTR(-ENOMEM); - goto done; + return ERR_PTR(-ENOMEM); } } -done: - mutex_unlock(&omap_obj->lock); return obj; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/panel/Kconfig +++ linux-xilinx-6.8.0/drivers/gpu/drm/panel/Kconfig @@ -184,7 +184,7 @@ config DRM_PANEL_ILITEK_ILI9341 tristate "Ilitek ILI9341 240x320 QVGA panels" - depends on OF && SPI + depends on SPI select DRM_KMS_HELPER select DRM_GEM_DMA_HELPER depends on BACKLIGHT_CLASS_DEVICE --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c @@ -1507,7 +1507,11 @@ usleep_range(10000, 11000); if (boe->desc->lp11_before_reset) { - mipi_dsi_dcs_nop(boe->dsi); + ret = mipi_dsi_dcs_nop(boe->dsi); + if (ret < 0) { + dev_err(&boe->dsi->dev, "Failed to send NOP: %d\n", ret); + goto poweroff; + } usleep_range(1000, 2000); } gpiod_set_value(boe->enable_gpio, 1); @@ -1528,13 +1532,13 @@ return 0; poweroff: + gpiod_set_value(boe->enable_gpio, 0); regulator_disable(boe->avee); poweroffavdd: regulator_disable(boe->avdd); poweroff1v8: usleep_range(5000, 7000); regulator_disable(boe->pp1800); - gpiod_set_value(boe->enable_gpio, 0); return ret; } @@ -1871,6 +1875,8 @@ gpiod_set_value(boe->enable_gpio, 0); + boe->base.prepare_prev_first = true; + drm_panel_init(&boe->base, dev, &boe_panel_funcs, DRM_MODE_CONNECTOR_DSI); err = of_drm_get_panel_orientation(dev->of_node, &boe->orientation); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/panel/panel-edp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/panel/panel-edp.c @@ -397,6 +397,7 @@ { struct panel_edp *p = dev_get_drvdata(dev); + drm_dp_dpcd_set_powered(p->aux, false); gpiod_set_value_cansleep(p->enable_gpio, 0); regulator_disable(p->supply); p->unprepared_time = ktime_get_boottime(); @@ -413,8 +414,7 @@ if (!p->prepared) return 0; - pm_runtime_mark_last_busy(panel->dev); - ret = pm_runtime_put_autosuspend(panel->dev); + ret = pm_runtime_put_sync_suspend(panel->dev); if (ret < 0) return ret; p->prepared = false; @@ -454,6 +454,7 @@ } gpiod_set_value_cansleep(p->enable_gpio, 1); + drm_dp_dpcd_set_powered(p->aux, true); delay = p->desc->delay.hpd_reliable; if (p->no_hpd) @@ -490,6 +491,7 @@ return 0; error: + drm_dp_dpcd_set_powered(p->aux, false); gpiod_set_value_cansleep(p->enable_gpio, 0); regulator_disable(p->supply); p->unprepared_time = ktime_get_boottime(); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/panel/panel-himax-hx8394.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/panel/panel-himax-hx8394.c @@ -370,8 +370,7 @@ sleep_in: /* This will probably fail, but let's try orderly power off anyway. */ - ret = mipi_dsi_dcs_enter_sleep_mode(dsi); - if (!ret) + if (!mipi_dsi_dcs_enter_sleep_mode(dsi)) msleep(50); return ret; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/panel/panel-ilitek-ili9341.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/panel/panel-ilitek-ili9341.c @@ -22,8 +22,9 @@ #include #include #include +#include #include -#include +#include #include #include @@ -421,7 +422,7 @@ ili9341_dpi_init(ili); - return ret; + return 0; } static int ili9341_dpi_enable(struct drm_panel *panel) @@ -691,7 +692,7 @@ * Every new incarnation of this display must have a unique * data entry for the system in this driver. */ - ili->conf = of_device_get_match_data(dev); + ili->conf = device_get_match_data(dev); if (!ili->conf) { dev_err(dev, "missing device configuration\n"); return -ENODEV; @@ -714,18 +715,18 @@ reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); if (IS_ERR(reset)) - dev_err(dev, "Failed to get gpio 'reset'\n"); + return dev_err_probe(dev, PTR_ERR(reset), "Failed to get gpio 'reset'\n"); dc = devm_gpiod_get_optional(dev, "dc", GPIOD_OUT_LOW); if (IS_ERR(dc)) - dev_err(dev, "Failed to get gpio 'dc'\n"); + return dev_err_probe(dev, PTR_ERR(dc), "Failed to get gpio 'dc'\n"); if (!strcmp(id->name, "sf-tc240t-9370-t")) return ili9341_dpi_probe(spi, dc, reset); else if (!strcmp(id->name, "yx240qv29")) return ili9341_dbi_probe(spi, dc, reset); - return -1; + return -ENODEV; } static void ili9341_remove(struct spi_device *spi) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c @@ -1080,10 +1080,10 @@ msleep(5); /* And reset it */ - gpiod_set_value(ctx->reset, 1); + gpiod_set_value_cansleep(ctx->reset, 1); msleep(20); - gpiod_set_value(ctx->reset, 0); + gpiod_set_value_cansleep(ctx->reset, 0); msleep(20); for (i = 0; i < ctx->desc->init_length; i++) { @@ -1138,7 +1138,7 @@ mipi_dsi_dcs_enter_sleep_mode(ctx->dsi); regulator_disable(ctx->power); - gpiod_set_value(ctx->reset, 1); + gpiod_set_value_cansleep(ctx->reset, 1); return 0; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c @@ -560,7 +560,11 @@ usleep_range(10000, 11000); // MIPI needs to keep the LP11 state before the lcm_reset pin is pulled high - mipi_dsi_dcs_nop(ili->dsi); + ret = mipi_dsi_dcs_nop(ili->dsi); + if (ret < 0) { + dev_err(&ili->dsi->dev, "Failed to send NOP: %d\n", ret); + goto poweroff; + } usleep_range(1000, 2000); gpiod_set_value(ili->enable_gpio, 1); @@ -579,13 +583,13 @@ return 0; poweroff: + gpiod_set_value(ili->enable_gpio, 0); regulator_disable(ili->avee); poweroffavdd: regulator_disable(ili->avdd); poweroff1v8: usleep_range(5000, 7000); regulator_disable(ili->pp1800); - gpiod_set_value(ili->enable_gpio, 0); return ret; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c @@ -110,13 +110,13 @@ if (ret) return ret; - gpiod_set_value(jadard->reset, 1); + gpiod_set_value(jadard->reset, 0); msleep(5); - gpiod_set_value(jadard->reset, 0); + gpiod_set_value(jadard->reset, 1); msleep(10); - gpiod_set_value(jadard->reset, 1); + gpiod_set_value(jadard->reset, 0); msleep(120); return 0; @@ -601,7 +601,7 @@ dsi->format = desc->format; dsi->lanes = desc->lanes; - jadard->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW); + jadard->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); if (IS_ERR(jadard->reset)) { DRM_DEV_ERROR(&dsi->dev, "failed to get our reset GPIO\n"); return PTR_ERR(jadard->reset); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/panel/panel-leadtek-ltk050h3146w.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/panel/panel-leadtek-ltk050h3146w.c @@ -295,8 +295,6 @@ mipi_dsi_dcs_write_seq(dsi, 0xbd, 0x00); mipi_dsi_dcs_write_seq(dsi, 0xc6, 0xef); mipi_dsi_dcs_write_seq(dsi, 0xd4, 0x02); - mipi_dsi_dcs_write_seq(dsi, 0x11); - mipi_dsi_dcs_write_seq(dsi, 0x29); ret = mipi_dsi_dcs_set_tear_on(dsi, 1); if (ret < 0) { @@ -326,7 +324,8 @@ static const struct ltk050h3146w_desc ltk050h3148w_data = { .mode = <k050h3148w_mode, .init = ltk050h3148w_init_sequence, - .mode_flags = MIPI_DSI_MODE_VIDEO_SYNC_PULSE | MIPI_DSI_MODE_VIDEO_BURST, + .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | + MIPI_DSI_MODE_VIDEO_BURST, }; static int ltk050h3146w_init_sequence(struct ltk050h3146w *ctx) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/panel/panel-novatek-nt35950.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/panel/panel-novatek-nt35950.c @@ -556,15 +556,13 @@ } dsi_r_host = of_find_mipi_dsi_host_by_node(dsi_r); of_node_put(dsi_r); - if (!dsi_r_host) { - dev_err(dev, "Cannot get secondary DSI host\n"); - return -EPROBE_DEFER; - } + if (!dsi_r_host) + return dev_err_probe(dev, -EPROBE_DEFER, "Cannot get secondary DSI host\n"); nt->dsi[1] = mipi_dsi_device_register_full(dsi_r_host, info); - if (!nt->dsi[1]) { + if (IS_ERR(nt->dsi[1])) { dev_err(dev, "Cannot get secondary DSI node\n"); - return -ENODEV; + return PTR_ERR(nt->dsi[1]); } num_dsis++; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/panel/panel-novatek-nt36523.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/panel/panel-novatek-nt36523.c @@ -933,8 +933,7 @@ static const struct drm_display_mode elish_boe_modes[] = { { - /* There is only one 120 Hz timing, but it doesn't work perfectly, 104 Hz preferred */ - .clock = (1600 + 60 + 8 + 60) * (2560 + 26 + 4 + 168) * 104 / 1000, + .clock = (1600 + 60 + 8 + 60) * (2560 + 26 + 4 + 168) * 120 / 1000, .hdisplay = 1600, .hsync_start = 1600 + 60, .hsync_end = 1600 + 60 + 8, @@ -948,8 +947,7 @@ static const struct drm_display_mode elish_csot_modes[] = { { - /* There is only one 120 Hz timing, but it doesn't work perfectly, 104 Hz preferred */ - .clock = (1600 + 200 + 40 + 52) * (2560 + 26 + 4 + 168) * 104 / 1000, + .clock = (1600 + 200 + 40 + 52) * (2560 + 26 + 4 + 168) * 120 / 1000, .hdisplay = 1600, .hsync_start = 1600 + 200, .hsync_end = 1600 + 200 + 40, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/panel/panel-samsung-atna33xc20.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/panel/panel-samsung-atna33xc20.c @@ -72,6 +72,7 @@ if (p->el3_was_on) atana33xc20_wait(p->el_on3_off_time, 150); + drm_dp_dpcd_set_powered(p->aux, false); ret = regulator_disable(p->supply); if (ret) return ret; @@ -93,6 +94,7 @@ ret = regulator_enable(p->supply); if (ret) return ret; + drm_dp_dpcd_set_powered(p->aux, true); p->powered_on_time = ktime_get_boottime(); if (p->no_hpd) { @@ -107,19 +109,17 @@ if (hpd_asserted < 0) ret = hpd_asserted; - if (ret) + if (ret) { dev_warn(dev, "Error waiting for HPD GPIO: %d\n", ret); - - return ret; - } - - if (p->aux->wait_hpd_asserted) { + goto error; + } + } else if (p->aux->wait_hpd_asserted) { ret = p->aux->wait_hpd_asserted(p->aux, HPD_MAX_US); - if (ret) + if (ret) { dev_warn(dev, "Controller error waiting for HPD: %d\n", ret); - - return ret; + goto error; + } } /* @@ -131,6 +131,12 @@ * right times. */ return 0; + +error: + drm_dp_dpcd_set_powered(p->aux, false); + regulator_disable(p->supply); + + return ret; } static int atana33xc20_disable(struct drm_panel *panel) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/panel/panel-simple.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/panel/panel-simple.c @@ -1367,6 +1367,23 @@ .vtotal = 800 + 6 + 8 + 2, }; +static const struct panel_desc boe_bp082wx1_100 = { + .modes = &boe_bp101wx1_100_mode, + .num_modes = 1, + .bpc = 8, + .size = { + .width = 177, + .height = 110, + }, + .delay = { + .enable = 50, + .disable = 50, + }, + .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA, + .bus_flags = DRM_BUS_FLAG_DE_HIGH, + .connector_type = DRM_MODE_CONNECTOR_LVDS, +}; + static const struct panel_desc boe_bp101wx1_100 = { .modes = &boe_bp101wx1_100_mode, .num_modes = 1, @@ -2547,6 +2564,9 @@ .unprepare = 200, .disable = 400, }, + .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG, + .bus_flags = DRM_BUS_FLAG_DE_HIGH, + .connector_type = DRM_MODE_CONNECTOR_LVDS, }; static const struct display_timing innolux_g156hce_l01_timings = { @@ -2660,6 +2680,7 @@ .vfront_porch = { 3, 5, 10 }, .vback_porch = { 2, 5, 10 }, .vsync_len = { 5, 5, 5 }, + .flags = DISPLAY_FLAGS_DE_HIGH, }; static const struct panel_desc koe_tx26d202vm0bwa = { @@ -4249,6 +4270,31 @@ .connector_type = DRM_MODE_CONNECTOR_LVDS, }; +static const struct drm_display_mode mchp_ac69t88a_mode = { + .clock = 25000, + .hdisplay = 800, + .hsync_start = 800 + 88, + .hsync_end = 800 + 88 + 5, + .htotal = 800 + 88 + 5 + 40, + .vdisplay = 480, + .vsync_start = 480 + 23, + .vsync_end = 480 + 23 + 5, + .vtotal = 480 + 23 + 5 + 1, +}; + +static const struct panel_desc mchp_ac69t88a = { + .modes = &mchp_ac69t88a_mode, + .num_modes = 1, + .bpc = 8, + .size = { + .width = 108, + .height = 65, + }, + .bus_flags = DRM_BUS_FLAG_DE_HIGH, + .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA, + .connector_type = DRM_MODE_CONNECTOR_LVDS, +}; + static const struct drm_display_mode arm_rtsm_mode[] = { { .clock = 65000, @@ -4346,6 +4392,9 @@ .compatible = "bananapi,s070wv20-ct16", .data = &bananapi_s070wv20_ct16, }, { + .compatible = "boe,bp082wx1-100", + .data = &boe_bp082wx1_100, + }, { .compatible = "boe,bp101wx1-100", .data = &boe_bp101wx1_100, }, { @@ -4697,6 +4746,9 @@ .compatible = "yes-optoelectronics,ytc700tlag-05-201c", .data = &yes_optoelectronics_ytc700tlag_05_201c, }, { + .compatible = "microchip,ac69t88a", + .data = &mchp_ac69t88a, + }, { /* Must be the last entry */ .compatible = "panel-dpi", .data = &panel_dpi, @@ -4780,6 +4832,33 @@ .lanes = 4, }; +static const struct drm_display_mode auo_b101uan01_mode = { + .clock = 154500, + .hdisplay = 1920, + .hsync_start = 1920 + 185, + .hsync_end = 1920 + 185, + .htotal = 1920 + 185 + 925, + .vdisplay = 1200, + .vsync_start = 1200 + 3, + .vsync_end = 1200 + 3 + 5, + .vtotal = 1200 + 3 + 5 + 4, +}; + +static const struct panel_desc_dsi auo_b101uan01 = { + .desc = { + .modes = &auo_b101uan01_mode, + .num_modes = 1, + .bpc = 8, + .size = { + .width = 108, + .height = 272, + }, + }, + .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE, + .format = MIPI_DSI_FMT_RGB888, + .lanes = 4, +}; + static const struct drm_display_mode boe_tv080wum_nl0_mode = { .clock = 160000, .hdisplay = 1200, @@ -4959,6 +5038,9 @@ .compatible = "auo,b080uan01", .data = &auo_b080uan01 }, { + .compatible = "auo,b101uan01", + .data = &auo_b101uan01 + }, { .compatible = "boe,tv080wum-nl0", .data = &boe_tv080wum_nl0 }, { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/panel/panel-sitronix-st7701.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/panel/panel-sitronix-st7701.c @@ -1010,6 +1010,7 @@ drm_panel_init(&st7701->panel, &dsi->dev, &st7701_funcs, DRM_MODE_CONNECTOR_DSI); + st7701->panel.prepare_prev_first = true; /** * Once sleep out has been issued, ST7701 IC required to wait 120ms --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/panel/panel-sitronix-st7789v.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/panel/panel-sitronix-st7789v.c @@ -282,15 +282,15 @@ static const struct drm_display_mode jt240mhqs_hwt_ek_e3_mode = { .clock = 6000, .hdisplay = 240, - .hsync_start = 240 + 28, - .hsync_end = 240 + 28 + 10, - .htotal = 240 + 28 + 10 + 10, + .hsync_start = 240 + 38, + .hsync_end = 240 + 38 + 10, + .htotal = 240 + 38 + 10 + 10, .vdisplay = 280, - .vsync_start = 280 + 8, - .vsync_end = 280 + 8 + 4, - .vtotal = 280 + 8 + 4 + 4, - .width_mm = 43, - .height_mm = 37, + .vsync_start = 280 + 48, + .vsync_end = 280 + 48 + 4, + .vtotal = 280 + 48 + 4 + 4, + .width_mm = 37, + .height_mm = 43, .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, }; @@ -643,7 +643,9 @@ if (ret) return dev_err_probe(dev, ret, "Failed to get backlight\n"); - of_drm_get_panel_orientation(spi->dev.of_node, &ctx->orientation); + ret = of_drm_get_panel_orientation(spi->dev.of_node, &ctx->orientation); + if (ret) + return dev_err_probe(&spi->dev, ret, "Failed to get orientation\n"); drm_panel_add(&ctx->panel); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/panel/panel-synaptics-r63353.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/panel/panel-synaptics-r63353.c @@ -325,7 +325,7 @@ { struct r63353_panel *rpanel = mipi_dsi_get_drvdata(dsi); - r63353_panel_unprepare(&rpanel->base); + drm_panel_unprepare(&rpanel->base); } static const struct r63353_desc sharp_ls068b3sx02_data = { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/panel/panel-visionox-rm69299.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/panel/panel-visionox-rm69299.c @@ -253,8 +253,6 @@ struct visionox_rm69299 *ctx = mipi_dsi_get_drvdata(dsi); mipi_dsi_detach(ctx->dsi); - mipi_dsi_device_unregister(ctx->dsi); - drm_panel_remove(&ctx->panel); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/panfrost/panfrost_devfreq.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/panfrost/panfrost_devfreq.c @@ -38,7 +38,7 @@ return PTR_ERR(opp); dev_pm_opp_put(opp); - err = dev_pm_opp_set_rate(dev, *freq); + err = dev_pm_opp_set_rate(dev, *freq); if (!err) ptdev->pfdevfreq.current_frequency = *freq; @@ -182,6 +182,7 @@ * if any and will avoid a switch off by regulator_late_cleanup() */ ret = dev_pm_opp_set_opp(dev, opp); + dev_pm_opp_put(opp); if (ret) { DRM_DEV_ERROR(dev, "Couldn't set recommended OPP\n"); return ret; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/panfrost/panfrost_drv.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -796,3 +796,4 @@ MODULE_AUTHOR("Panfrost Project Developers"); MODULE_DESCRIPTION("Panfrost DRM Driver"); MODULE_LICENSE("GPL v2"); +MODULE_SOFTDEP("pre: governor_simpleondemand"); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/panfrost/panfrost_gpu.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/panfrost/panfrost_gpu.c @@ -177,7 +177,6 @@ struct panfrost_model { const char *name; u32 id; - u32 id_mask; u64 features; u64 issues; struct { @@ -441,19 +440,19 @@ gpu_write(pfdev, SHADER_PWROFF_LO, pfdev->features.shader_present); ret = readl_relaxed_poll_timeout(pfdev->iomem + SHADER_PWRTRANS_LO, - val, !val, 1, 1000); + val, !val, 1, 2000); if (ret) dev_err(pfdev->dev, "shader power transition timeout"); gpu_write(pfdev, TILER_PWROFF_LO, pfdev->features.tiler_present); ret = readl_relaxed_poll_timeout(pfdev->iomem + TILER_PWRTRANS_LO, - val, !val, 1, 1000); + val, !val, 1, 2000); if (ret) dev_err(pfdev->dev, "tiler power transition timeout"); gpu_write(pfdev, L2_PWROFF_LO, pfdev->features.l2_present); ret = readl_poll_timeout(pfdev->iomem + L2_PWRTRANS_LO, - val, !val, 0, 1000); + val, !val, 0, 2000); if (ret) dev_err(pfdev->dev, "l2 power transition timeout"); } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/panfrost/panfrost_mmu.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/panfrost/panfrost_mmu.c @@ -502,11 +502,18 @@ mapping_set_unevictable(mapping); for (i = page_offset; i < page_offset + NUM_FAULT_PAGES; i++) { + /* Can happen if the last fault only partially filled this + * section of the pages array before failing. In that case + * we skip already filled pages. + */ + if (pages[i]) + continue; + pages[i] = shmem_read_mapping_page(mapping, i); if (IS_ERR(pages[i])) { ret = PTR_ERR(pages[i]); pages[i] = NULL; - goto err_pages; + goto err_unlock; } } @@ -514,7 +521,7 @@ ret = sg_alloc_table_from_pages(sgt, pages + page_offset, NUM_FAULT_PAGES, 0, SZ_2M, GFP_KERNEL); if (ret) - goto err_pages; + goto err_unlock; ret = dma_map_sgtable(pfdev->dev, sgt, DMA_BIDIRECTIONAL, 0); if (ret) @@ -537,8 +544,6 @@ err_map: sg_free_table(sgt); -err_pages: - drm_gem_shmem_put_pages(&bo->base); err_unlock: dma_resv_unlock(obj->resv); err_bo: --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/qxl/qxl_display.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/qxl/qxl_display.c @@ -236,6 +236,9 @@ return 0; mode = drm_cvt_mode(dev, width, height, 60, false, false, false); + if (!mode) + return 0; + if (preferred) mode->type |= DRM_MODE_TYPE_PREFERRED; mode->hdisplay = width; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/atombios_encoders.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/atombios_encoders.c @@ -2179,7 +2179,7 @@ void radeon_atom_encoder_init(struct radeon_device *rdev) { - struct drm_device *dev = rdev->ddev; + struct drm_device *dev = rdev_to_drm(rdev); struct drm_encoder *encoder; list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/cik.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/cik.c @@ -7585,7 +7585,7 @@ DRM_DEBUG("IH: IH event w/o asserted irq bit?\n"); if (rdev->irq.crtc_vblank_int[0]) { - drm_handle_vblank(rdev->ddev, 0); + drm_handle_vblank(rdev_to_drm(rdev), 0); rdev->pm.vblank_sync = true; wake_up(&rdev->irq.vblank_queue); } @@ -7615,7 +7615,7 @@ DRM_DEBUG("IH: IH event w/o asserted irq bit?\n"); if (rdev->irq.crtc_vblank_int[1]) { - drm_handle_vblank(rdev->ddev, 1); + drm_handle_vblank(rdev_to_drm(rdev), 1); rdev->pm.vblank_sync = true; wake_up(&rdev->irq.vblank_queue); } @@ -7645,7 +7645,7 @@ DRM_DEBUG("IH: IH event w/o asserted irq bit?\n"); if (rdev->irq.crtc_vblank_int[2]) { - drm_handle_vblank(rdev->ddev, 2); + drm_handle_vblank(rdev_to_drm(rdev), 2); rdev->pm.vblank_sync = true; wake_up(&rdev->irq.vblank_queue); } @@ -7675,7 +7675,7 @@ DRM_DEBUG("IH: IH event w/o asserted irq bit?\n"); if (rdev->irq.crtc_vblank_int[3]) { - drm_handle_vblank(rdev->ddev, 3); + drm_handle_vblank(rdev_to_drm(rdev), 3); rdev->pm.vblank_sync = true; wake_up(&rdev->irq.vblank_queue); } @@ -7705,7 +7705,7 @@ DRM_DEBUG("IH: IH event w/o asserted irq bit?\n"); if (rdev->irq.crtc_vblank_int[4]) { - drm_handle_vblank(rdev->ddev, 4); + drm_handle_vblank(rdev_to_drm(rdev), 4); rdev->pm.vblank_sync = true; wake_up(&rdev->irq.vblank_queue); } @@ -7735,7 +7735,7 @@ DRM_DEBUG("IH: IH event w/o asserted irq bit?\n"); if (rdev->irq.crtc_vblank_int[5]) { - drm_handle_vblank(rdev->ddev, 5); + drm_handle_vblank(rdev_to_drm(rdev), 5); rdev->pm.vblank_sync = true; wake_up(&rdev->irq.vblank_queue); } @@ -8581,7 +8581,7 @@ /* Initialize surface registers */ radeon_surface_init(rdev); /* Initialize clocks */ - radeon_get_clock_info(rdev->ddev); + radeon_get_clock_info(rdev_to_drm(rdev)); /* Fence driver */ radeon_fence_driver_init(rdev); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/dce6_afmt.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/dce6_afmt.c @@ -91,7 +91,7 @@ pin = &rdev->audio.pin[i]; pin_count = 0; - list_for_each_entry(encoder, &rdev->ddev->mode_config.encoder_list, head) { + list_for_each_entry(encoder, &rdev_to_drm(rdev)->mode_config.encoder_list, head) { if (radeon_encoder_is_digital(encoder)) { radeon_encoder = to_radeon_encoder(encoder); dig = radeon_encoder->enc_priv; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/evergreen.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/evergreen.c @@ -1673,7 +1673,7 @@ */ void evergreen_pm_prepare(struct radeon_device *rdev) { - struct drm_device *ddev = rdev->ddev; + struct drm_device *ddev = rdev_to_drm(rdev); struct drm_crtc *crtc; struct radeon_crtc *radeon_crtc; u32 tmp; @@ -1698,7 +1698,7 @@ */ void evergreen_pm_finish(struct radeon_device *rdev) { - struct drm_device *ddev = rdev->ddev; + struct drm_device *ddev = rdev_to_drm(rdev); struct drm_crtc *crtc; struct radeon_crtc *radeon_crtc; u32 tmp; @@ -1763,7 +1763,7 @@ */ void evergreen_hpd_init(struct radeon_device *rdev) { - struct drm_device *dev = rdev->ddev; + struct drm_device *dev = rdev_to_drm(rdev); struct drm_connector *connector; unsigned enabled = 0; u32 tmp = DC_HPDx_CONNECTION_TIMER(0x9c4) | @@ -1804,7 +1804,7 @@ */ void evergreen_hpd_fini(struct radeon_device *rdev) { - struct drm_device *dev = rdev->ddev; + struct drm_device *dev = rdev_to_drm(rdev); struct drm_connector *connector; unsigned disabled = 0; @@ -4757,7 +4757,7 @@ event_name = "vblank"; if (rdev->irq.crtc_vblank_int[crtc_idx]) { - drm_handle_vblank(rdev->ddev, crtc_idx); + drm_handle_vblank(rdev_to_drm(rdev), crtc_idx); rdev->pm.vblank_sync = true; wake_up(&rdev->irq.vblank_queue); } @@ -5215,7 +5215,7 @@ /* Initialize surface registers */ radeon_surface_init(rdev); /* Initialize clocks */ - radeon_get_clock_info(rdev->ddev); + radeon_get_clock_info(rdev_to_drm(rdev)); /* Fence driver */ radeon_fence_driver_init(rdev); /* initialize AGP */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/evergreen_cs.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/evergreen_cs.c @@ -395,7 +395,7 @@ struct evergreen_cs_track *track = p->track; struct eg_surface surf; unsigned pitch, slice, mslice; - unsigned long offset; + u64 offset; int r; mslice = G_028C6C_SLICE_MAX(track->cb_color_view[id]) + 1; @@ -433,14 +433,14 @@ return r; } - offset = track->cb_color_bo_offset[id] << 8; + offset = (u64)track->cb_color_bo_offset[id] << 8; if (offset & (surf.base_align - 1)) { - dev_warn(p->dev, "%s:%d cb[%d] bo base %ld not aligned with %ld\n", + dev_warn(p->dev, "%s:%d cb[%d] bo base %llu not aligned with %ld\n", __func__, __LINE__, id, offset, surf.base_align); return -EINVAL; } - offset += surf.layer_size * mslice; + offset += (u64)surf.layer_size * mslice; if (offset > radeon_bo_size(track->cb_color_bo[id])) { /* old ddx are broken they allocate bo with w*h*bpp but * program slice with ALIGN(h, 8), catch this and patch @@ -448,14 +448,14 @@ */ if (!surf.mode) { uint32_t *ib = p->ib.ptr; - unsigned long tmp, nby, bsize, size, min = 0; + u64 tmp, nby, bsize, size, min = 0; /* find the height the ddx wants */ if (surf.nby > 8) { min = surf.nby - 8; } bsize = radeon_bo_size(track->cb_color_bo[id]); - tmp = track->cb_color_bo_offset[id] << 8; + tmp = (u64)track->cb_color_bo_offset[id] << 8; for (nby = surf.nby; nby > min; nby--) { size = nby * surf.nbx * surf.bpe * surf.nsamples; if ((tmp + size * mslice) <= bsize) { @@ -467,7 +467,7 @@ slice = ((nby * surf.nbx) / 64) - 1; if (!evergreen_surface_check(p, &surf, "cb")) { /* check if this one works */ - tmp += surf.layer_size * mslice; + tmp += (u64)surf.layer_size * mslice; if (tmp <= bsize) { ib[track->cb_color_slice_idx[id]] = slice; goto old_ddx_ok; @@ -476,9 +476,9 @@ } } dev_warn(p->dev, "%s:%d cb[%d] bo too small (layer size %d, " - "offset %d, max layer %d, bo size %ld, slice %d)\n", + "offset %llu, max layer %d, bo size %ld, slice %d)\n", __func__, __LINE__, id, surf.layer_size, - track->cb_color_bo_offset[id] << 8, mslice, + (u64)track->cb_color_bo_offset[id] << 8, mslice, radeon_bo_size(track->cb_color_bo[id]), slice); dev_warn(p->dev, "%s:%d problematic surf: (%d %d) (%d %d %d %d %d %d %d)\n", __func__, __LINE__, surf.nbx, surf.nby, @@ -562,7 +562,7 @@ struct evergreen_cs_track *track = p->track; struct eg_surface surf; unsigned pitch, slice, mslice; - unsigned long offset; + u64 offset; int r; mslice = G_028008_SLICE_MAX(track->db_depth_view) + 1; @@ -608,18 +608,18 @@ return r; } - offset = track->db_s_read_offset << 8; + offset = (u64)track->db_s_read_offset << 8; if (offset & (surf.base_align - 1)) { - dev_warn(p->dev, "%s:%d stencil read bo base %ld not aligned with %ld\n", + dev_warn(p->dev, "%s:%d stencil read bo base %llu not aligned with %ld\n", __func__, __LINE__, offset, surf.base_align); return -EINVAL; } - offset += surf.layer_size * mslice; + offset += (u64)surf.layer_size * mslice; if (offset > radeon_bo_size(track->db_s_read_bo)) { dev_warn(p->dev, "%s:%d stencil read bo too small (layer size %d, " - "offset %ld, max layer %d, bo size %ld)\n", + "offset %llu, max layer %d, bo size %ld)\n", __func__, __LINE__, surf.layer_size, - (unsigned long)track->db_s_read_offset << 8, mslice, + (u64)track->db_s_read_offset << 8, mslice, radeon_bo_size(track->db_s_read_bo)); dev_warn(p->dev, "%s:%d stencil invalid (0x%08x 0x%08x 0x%08x 0x%08x)\n", __func__, __LINE__, track->db_depth_size, @@ -627,18 +627,18 @@ return -EINVAL; } - offset = track->db_s_write_offset << 8; + offset = (u64)track->db_s_write_offset << 8; if (offset & (surf.base_align - 1)) { - dev_warn(p->dev, "%s:%d stencil write bo base %ld not aligned with %ld\n", + dev_warn(p->dev, "%s:%d stencil write bo base %llu not aligned with %ld\n", __func__, __LINE__, offset, surf.base_align); return -EINVAL; } - offset += surf.layer_size * mslice; + offset += (u64)surf.layer_size * mslice; if (offset > radeon_bo_size(track->db_s_write_bo)) { dev_warn(p->dev, "%s:%d stencil write bo too small (layer size %d, " - "offset %ld, max layer %d, bo size %ld)\n", + "offset %llu, max layer %d, bo size %ld)\n", __func__, __LINE__, surf.layer_size, - (unsigned long)track->db_s_write_offset << 8, mslice, + (u64)track->db_s_write_offset << 8, mslice, radeon_bo_size(track->db_s_write_bo)); return -EINVAL; } @@ -659,7 +659,7 @@ struct evergreen_cs_track *track = p->track; struct eg_surface surf; unsigned pitch, slice, mslice; - unsigned long offset; + u64 offset; int r; mslice = G_028008_SLICE_MAX(track->db_depth_view) + 1; @@ -706,34 +706,34 @@ return r; } - offset = track->db_z_read_offset << 8; + offset = (u64)track->db_z_read_offset << 8; if (offset & (surf.base_align - 1)) { - dev_warn(p->dev, "%s:%d stencil read bo base %ld not aligned with %ld\n", + dev_warn(p->dev, "%s:%d stencil read bo base %llu not aligned with %ld\n", __func__, __LINE__, offset, surf.base_align); return -EINVAL; } - offset += surf.layer_size * mslice; + offset += (u64)surf.layer_size * mslice; if (offset > radeon_bo_size(track->db_z_read_bo)) { dev_warn(p->dev, "%s:%d depth read bo too small (layer size %d, " - "offset %ld, max layer %d, bo size %ld)\n", + "offset %llu, max layer %d, bo size %ld)\n", __func__, __LINE__, surf.layer_size, - (unsigned long)track->db_z_read_offset << 8, mslice, + (u64)track->db_z_read_offset << 8, mslice, radeon_bo_size(track->db_z_read_bo)); return -EINVAL; } - offset = track->db_z_write_offset << 8; + offset = (u64)track->db_z_write_offset << 8; if (offset & (surf.base_align - 1)) { - dev_warn(p->dev, "%s:%d stencil write bo base %ld not aligned with %ld\n", + dev_warn(p->dev, "%s:%d stencil write bo base %llu not aligned with %ld\n", __func__, __LINE__, offset, surf.base_align); return -EINVAL; } - offset += surf.layer_size * mslice; + offset += (u64)surf.layer_size * mslice; if (offset > radeon_bo_size(track->db_z_write_bo)) { dev_warn(p->dev, "%s:%d depth write bo too small (layer size %d, " - "offset %ld, max layer %d, bo size %ld)\n", + "offset %llu, max layer %d, bo size %ld)\n", __func__, __LINE__, surf.layer_size, - (unsigned long)track->db_z_write_offset << 8, mslice, + (u64)track->db_z_write_offset << 8, mslice, radeon_bo_size(track->db_z_write_bo)); return -EINVAL; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/ni.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/ni.c @@ -813,7 +813,7 @@ err = 0; } else if (rdev->smc_fw->size != smc_req_size) { pr_err("ni_mc: Bogus length %zu in firmware \"%s\"\n", - rdev->mc_fw->size, fw_name); + rdev->smc_fw->size, fw_name); err = -EINVAL; } } @@ -2373,7 +2373,7 @@ /* Initialize surface registers */ radeon_surface_init(rdev); /* Initialize clocks */ - radeon_get_clock_info(rdev->ddev); + radeon_get_clock_info(rdev_to_drm(rdev)); /* Fence driver */ radeon_fence_driver_init(rdev); /* initialize memory controller */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/pptable.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/pptable.h @@ -424,7 +424,7 @@ typedef struct _ATOM_PPLIB_STATE_V2 { //number of valid dpm levels in this state; Driver uses it to calculate the whole - //size of the state: sizeof(ATOM_PPLIB_STATE_V2) + (ucNumDPMLevels - 1) * sizeof(UCHAR) + //size of the state: struct_size(ATOM_PPLIB_STATE_V2, clockInfoIndex, ucNumDPMLevels) UCHAR ucNumDPMLevels; //a index to the array of nonClockInfos @@ -432,14 +432,14 @@ /** * Driver will read the first ucNumDPMLevels in this array */ - UCHAR clockInfoIndex[1]; + UCHAR clockInfoIndex[] __counted_by(ucNumDPMLevels); } ATOM_PPLIB_STATE_V2; typedef struct _StateArray{ //how many states we have UCHAR ucNumEntries; - ATOM_PPLIB_STATE_V2 states[1]; + ATOM_PPLIB_STATE_V2 states[] /* __counted_by(ucNumEntries) */; }StateArray; @@ -450,7 +450,7 @@ //sizeof(ATOM_PPLIB_CLOCK_INFO) UCHAR ucEntrySize; - UCHAR clockInfo[1]; + UCHAR clockInfo[] __counted_by(ucNumEntries); }ClockInfoArray; typedef struct _NonClockInfoArray{ @@ -460,7 +460,7 @@ //sizeof(ATOM_PPLIB_NONCLOCK_INFO) UCHAR ucEntrySize; - ATOM_PPLIB_NONCLOCK_INFO nonClockInfo[1]; + ATOM_PPLIB_NONCLOCK_INFO nonClockInfo[] __counted_by(ucNumEntries); }NonClockInfoArray; typedef struct _ATOM_PPLIB_Clock_Voltage_Dependency_Record --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/r100.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/r100.c @@ -458,7 +458,7 @@ */ void r100_pm_prepare(struct radeon_device *rdev) { - struct drm_device *ddev = rdev->ddev; + struct drm_device *ddev = rdev_to_drm(rdev); struct drm_crtc *crtc; struct radeon_crtc *radeon_crtc; u32 tmp; @@ -489,7 +489,7 @@ */ void r100_pm_finish(struct radeon_device *rdev) { - struct drm_device *ddev = rdev->ddev; + struct drm_device *ddev = rdev_to_drm(rdev); struct drm_crtc *crtc; struct radeon_crtc *radeon_crtc; u32 tmp; @@ -602,7 +602,7 @@ */ void r100_hpd_init(struct radeon_device *rdev) { - struct drm_device *dev = rdev->ddev; + struct drm_device *dev = rdev_to_drm(rdev); struct drm_connector *connector; unsigned enable = 0; @@ -625,7 +625,7 @@ */ void r100_hpd_fini(struct radeon_device *rdev) { - struct drm_device *dev = rdev->ddev; + struct drm_device *dev = rdev_to_drm(rdev); struct drm_connector *connector; unsigned disable = 0; @@ -797,7 +797,7 @@ /* Vertical blank interrupts */ if (status & RADEON_CRTC_VBLANK_STAT) { if (rdev->irq.crtc_vblank_int[0]) { - drm_handle_vblank(rdev->ddev, 0); + drm_handle_vblank(rdev_to_drm(rdev), 0); rdev->pm.vblank_sync = true; wake_up(&rdev->irq.vblank_queue); } @@ -806,7 +806,7 @@ } if (status & RADEON_CRTC2_VBLANK_STAT) { if (rdev->irq.crtc_vblank_int[1]) { - drm_handle_vblank(rdev->ddev, 1); + drm_handle_vblank(rdev_to_drm(rdev), 1); rdev->pm.vblank_sync = true; wake_up(&rdev->irq.vblank_queue); } @@ -1015,45 +1015,65 @@ DRM_DEBUG_KMS("\n"); - if ((rdev->family == CHIP_R100) || (rdev->family == CHIP_RV100) || - (rdev->family == CHIP_RV200) || (rdev->family == CHIP_RS100) || - (rdev->family == CHIP_RS200)) { + switch (rdev->family) { + case CHIP_R100: + case CHIP_RV100: + case CHIP_RV200: + case CHIP_RS100: + case CHIP_RS200: DRM_INFO("Loading R100 Microcode\n"); fw_name = FIRMWARE_R100; - } else if ((rdev->family == CHIP_R200) || - (rdev->family == CHIP_RV250) || - (rdev->family == CHIP_RV280) || - (rdev->family == CHIP_RS300)) { + break; + + case CHIP_R200: + case CHIP_RV250: + case CHIP_RV280: + case CHIP_RS300: DRM_INFO("Loading R200 Microcode\n"); fw_name = FIRMWARE_R200; - } else if ((rdev->family == CHIP_R300) || - (rdev->family == CHIP_R350) || - (rdev->family == CHIP_RV350) || - (rdev->family == CHIP_RV380) || - (rdev->family == CHIP_RS400) || - (rdev->family == CHIP_RS480)) { + break; + + case CHIP_R300: + case CHIP_R350: + case CHIP_RV350: + case CHIP_RV380: + case CHIP_RS400: + case CHIP_RS480: DRM_INFO("Loading R300 Microcode\n"); fw_name = FIRMWARE_R300; - } else if ((rdev->family == CHIP_R420) || - (rdev->family == CHIP_R423) || - (rdev->family == CHIP_RV410)) { + break; + + case CHIP_R420: + case CHIP_R423: + case CHIP_RV410: DRM_INFO("Loading R400 Microcode\n"); fw_name = FIRMWARE_R420; - } else if ((rdev->family == CHIP_RS690) || - (rdev->family == CHIP_RS740)) { + break; + + case CHIP_RS690: + case CHIP_RS740: DRM_INFO("Loading RS690/RS740 Microcode\n"); fw_name = FIRMWARE_RS690; - } else if (rdev->family == CHIP_RS600) { + break; + + case CHIP_RS600: DRM_INFO("Loading RS600 Microcode\n"); fw_name = FIRMWARE_RS600; - } else if ((rdev->family == CHIP_RV515) || - (rdev->family == CHIP_R520) || - (rdev->family == CHIP_RV530) || - (rdev->family == CHIP_R580) || - (rdev->family == CHIP_RV560) || - (rdev->family == CHIP_RV570)) { + break; + + case CHIP_RV515: + case CHIP_R520: + case CHIP_RV530: + case CHIP_R580: + case CHIP_RV560: + case CHIP_RV570: DRM_INFO("Loading R500 Microcode\n"); fw_name = FIRMWARE_R520; + break; + + default: + DRM_ERROR("Unsupported Radeon family %u\n", rdev->family); + return -EINVAL; } err = request_firmware(&rdev->me_fw, fw_name, rdev->dev); @@ -1470,7 +1490,7 @@ header = radeon_get_ib_value(p, h_idx); crtc_id = radeon_get_ib_value(p, h_idx + 5); reg = R100_CP_PACKET0_GET_REG(header); - crtc = drm_crtc_find(p->rdev->ddev, p->filp, crtc_id); + crtc = drm_crtc_find(rdev_to_drm(p->rdev), p->filp, crtc_id); if (!crtc) { DRM_ERROR("cannot find crtc %d\n", crtc_id); return -ENOENT; @@ -3058,7 +3078,7 @@ void r100_debugfs_rbbm_init(struct radeon_device *rdev) { #if defined(CONFIG_DEBUG_FS) - struct dentry *root = rdev->ddev->primary->debugfs_root; + struct dentry *root = rdev_to_drm(rdev)->primary->debugfs_root; debugfs_create_file("r100_rbbm_info", 0444, root, rdev, &r100_debugfs_rbbm_info_fops); @@ -3068,7 +3088,7 @@ void r100_debugfs_cp_init(struct radeon_device *rdev) { #if defined(CONFIG_DEBUG_FS) - struct dentry *root = rdev->ddev->primary->debugfs_root; + struct dentry *root = rdev_to_drm(rdev)->primary->debugfs_root; debugfs_create_file("r100_cp_ring_info", 0444, root, rdev, &r100_debugfs_cp_ring_info_fops); @@ -3080,7 +3100,7 @@ void r100_debugfs_mc_info_init(struct radeon_device *rdev) { #if defined(CONFIG_DEBUG_FS) - struct dentry *root = rdev->ddev->primary->debugfs_root; + struct dentry *root = rdev_to_drm(rdev)->primary->debugfs_root; debugfs_create_file("r100_mc_info", 0444, root, rdev, &r100_debugfs_mc_info_fops); @@ -3946,7 +3966,7 @@ RREG32(R_0007C0_CP_STAT)); } /* post */ - radeon_combios_asic_init(rdev->ddev); + radeon_combios_asic_init(rdev_to_drm(rdev)); /* Resume clock after posting */ r100_clock_startup(rdev); /* Initialize surface registers */ @@ -4055,7 +4075,7 @@ /* Set asic errata */ r100_errata(rdev); /* Initialize clocks */ - radeon_get_clock_info(rdev->ddev); + radeon_get_clock_info(rdev_to_drm(rdev)); /* initialize AGP */ if (rdev->flags & RADEON_IS_AGP) { r = radeon_agp_init(rdev); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/r300.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/r300.c @@ -615,7 +615,7 @@ static void rv370_debugfs_pcie_gart_info_init(struct radeon_device *rdev) { #if defined(CONFIG_DEBUG_FS) - struct dentry *root = rdev->ddev->primary->debugfs_root; + struct dentry *root = rdev_to_drm(rdev)->primary->debugfs_root; debugfs_create_file("rv370_pcie_gart_info", 0444, root, rdev, &rv370_debugfs_pcie_gart_info_fops); @@ -1451,7 +1451,7 @@ RREG32(R_0007C0_CP_STAT)); } /* post */ - radeon_combios_asic_init(rdev->ddev); + radeon_combios_asic_init(rdev_to_drm(rdev)); /* Resume clock after posting */ r300_clock_startup(rdev); /* Initialize surface registers */ @@ -1537,7 +1537,7 @@ /* Set asic errata */ r300_errata(rdev); /* Initialize clocks */ - radeon_get_clock_info(rdev->ddev); + radeon_get_clock_info(rdev_to_drm(rdev)); /* initialize AGP */ if (rdev->flags & RADEON_IS_AGP) { r = radeon_agp_init(rdev); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/r420.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/r420.c @@ -321,7 +321,7 @@ if (rdev->is_atom_bios) { atom_asic_init(rdev->mode_info.atom_context); } else { - radeon_combios_asic_init(rdev->ddev); + radeon_combios_asic_init(rdev_to_drm(rdev)); } /* Resume clock after posting */ r420_clock_resume(rdev); @@ -413,7 +413,7 @@ return -EINVAL; /* Initialize clocks */ - radeon_get_clock_info(rdev->ddev); + radeon_get_clock_info(rdev_to_drm(rdev)); /* initialize AGP */ if (rdev->flags & RADEON_IS_AGP) { r = radeon_agp_init(rdev); @@ -492,7 +492,7 @@ void r420_debugfs_pipes_info_init(struct radeon_device *rdev) { #if defined(CONFIG_DEBUG_FS) - struct dentry *root = rdev->ddev->primary->debugfs_root; + struct dentry *root = rdev_to_drm(rdev)->primary->debugfs_root; debugfs_create_file("r420_pipes_info", 0444, root, rdev, &r420_debugfs_pipes_info_fops); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/r520.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/r520.c @@ -287,7 +287,7 @@ atom_asic_init(rdev->mode_info.atom_context); } /* Initialize clocks */ - radeon_get_clock_info(rdev->ddev); + radeon_get_clock_info(rdev_to_drm(rdev)); /* initialize AGP */ if (rdev->flags & RADEON_IS_AGP) { r = radeon_agp_init(rdev); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/r600.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/r600.c @@ -950,7 +950,7 @@ void r600_hpd_init(struct radeon_device *rdev) { - struct drm_device *dev = rdev->ddev; + struct drm_device *dev = rdev_to_drm(rdev); struct drm_connector *connector; unsigned enable = 0; @@ -1017,7 +1017,7 @@ void r600_hpd_fini(struct radeon_device *rdev) { - struct drm_device *dev = rdev->ddev; + struct drm_device *dev = rdev_to_drm(rdev); struct drm_connector *connector; unsigned disable = 0; @@ -3280,7 +3280,7 @@ /* Initialize surface registers */ radeon_surface_init(rdev); /* Initialize clocks */ - radeon_get_clock_info(rdev->ddev); + radeon_get_clock_info(rdev_to_drm(rdev)); /* Fence driver */ radeon_fence_driver_init(rdev); if (rdev->flags & RADEON_IS_AGP) { @@ -4136,7 +4136,7 @@ DRM_DEBUG("IH: D1 vblank - IH event w/o asserted irq bit?\n"); if (rdev->irq.crtc_vblank_int[0]) { - drm_handle_vblank(rdev->ddev, 0); + drm_handle_vblank(rdev_to_drm(rdev), 0); rdev->pm.vblank_sync = true; wake_up(&rdev->irq.vblank_queue); } @@ -4166,7 +4166,7 @@ DRM_DEBUG("IH: D2 vblank - IH event w/o asserted irq bit?\n"); if (rdev->irq.crtc_vblank_int[1]) { - drm_handle_vblank(rdev->ddev, 1); + drm_handle_vblank(rdev_to_drm(rdev), 1); rdev->pm.vblank_sync = true; wake_up(&rdev->irq.vblank_queue); } @@ -4358,7 +4358,7 @@ static void r600_debugfs_mc_info_init(struct radeon_device *rdev) { #if defined(CONFIG_DEBUG_FS) - struct dentry *root = rdev->ddev->primary->debugfs_root; + struct dentry *root = rdev_to_drm(rdev)->primary->debugfs_root; debugfs_create_file("r600_mc_info", 0444, root, rdev, &r600_debugfs_mc_info_fops); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/r600_cs.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/r600_cs.c @@ -884,7 +884,7 @@ crtc_id = radeon_get_ib_value(p, h_idx + 2 + 7 + 1); reg = R600_CP_PACKET0_GET_REG(header); - crtc = drm_crtc_find(p->rdev->ddev, p->filp, crtc_id); + crtc = drm_crtc_find(rdev_to_drm(p->rdev), p->filp, crtc_id); if (!crtc) { DRM_ERROR("cannot find crtc %d\n", crtc_id); return -ENOENT; @@ -2104,7 +2104,7 @@ return -EINVAL; } - offset = radeon_get_ib_value(p, idx+1) << 8; + offset = (u64)radeon_get_ib_value(p, idx+1) << 8; if (offset != track->vgt_strmout_bo_offset[idx_value]) { DRM_ERROR("bad STRMOUT_BASE_UPDATE, bo offset does not match: 0x%llx, 0x%x\n", offset, track->vgt_strmout_bo_offset[idx_value]); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/r600_dpm.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/r600_dpm.c @@ -155,7 +155,7 @@ u32 r600_dpm_get_vblank_time(struct radeon_device *rdev) { - struct drm_device *dev = rdev->ddev; + struct drm_device *dev = rdev_to_drm(rdev); struct drm_crtc *crtc; struct radeon_crtc *radeon_crtc; u32 vblank_in_pixels; @@ -182,7 +182,7 @@ u32 r600_dpm_get_vrefresh(struct radeon_device *rdev) { - struct drm_device *dev = rdev->ddev; + struct drm_device *dev = rdev_to_drm(rdev); struct drm_crtc *crtc; struct radeon_crtc *radeon_crtc; u32 vrefresh = 0; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/r600_hdmi.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/r600_hdmi.c @@ -116,7 +116,7 @@ { struct radeon_device *rdev = container_of(work, struct radeon_device, audio_work); - struct drm_device *dev = rdev->ddev; + struct drm_device *dev = rdev_to_drm(rdev); struct r600_audio_pin audio_status = r600_audio_status(rdev); struct drm_encoder *encoder; bool changed = false; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/radeon.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/radeon.h @@ -132,7 +132,6 @@ /* RADEON_IB_POOL_SIZE must be a power of 2 */ #define RADEON_IB_POOL_SIZE 16 #define RADEON_DEBUGFS_MAX_COMPONENTS 32 -#define RADEONFB_CONN_LIMIT 4 #define RADEON_BIOS_NUM_SCRATCH 8 /* internal ring indices */ @@ -2479,6 +2478,11 @@ u32 cik_mm_rdoorbell(struct radeon_device *rdev, u32 index); void cik_mm_wdoorbell(struct radeon_device *rdev, u32 index, u32 v); +static inline struct drm_device *rdev_to_drm(struct radeon_device *rdev) +{ + return rdev->ddev; +} + /* * Cast helper */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/radeon_acpi.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/radeon_acpi.c @@ -405,11 +405,11 @@ if (req.pending & ATIF_DGPU_DISPLAY_EVENT) { if ((rdev->flags & RADEON_IS_PX) && radeon_atpx_dgpu_req_power_for_displays()) { - pm_runtime_get_sync(rdev->ddev->dev); + pm_runtime_get_sync(rdev_to_drm(rdev)->dev); /* Just fire off a uevent and let userspace tell us what to do */ - drm_helper_hpd_irq_event(rdev->ddev); - pm_runtime_mark_last_busy(rdev->ddev->dev); - pm_runtime_put_autosuspend(rdev->ddev->dev); + drm_helper_hpd_irq_event(rdev_to_drm(rdev)); + pm_runtime_mark_last_busy(rdev_to_drm(rdev)->dev); + pm_runtime_put_autosuspend(rdev_to_drm(rdev)->dev); } } /* TODO: check other events */ @@ -736,7 +736,7 @@ struct radeon_encoder *target = NULL; /* Find the encoder controlling the brightness */ - list_for_each_entry(tmp, &rdev->ddev->mode_config.encoder_list, + list_for_each_entry(tmp, &rdev_to_drm(rdev)->mode_config.encoder_list, head) { struct radeon_encoder *enc = to_radeon_encoder(tmp); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/radeon_agp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/radeon_agp.c @@ -161,7 +161,7 @@ static int radeon_agp_head_acquire(struct radeon_device *rdev) { - struct drm_device *dev = rdev->ddev; + struct drm_device *dev = rdev_to_drm(rdev); struct pci_dev *pdev = to_pci_dev(dev->dev); if (!rdev->agp) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/radeon_atombios.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/radeon_atombios.c @@ -187,7 +187,7 @@ if (i2c.valid) { sprintf(stmp, "0x%x", i2c.i2c_id); - rdev->i2c_bus[i] = radeon_i2c_create(rdev->ddev, &i2c, stmp); + rdev->i2c_bus[i] = radeon_i2c_create(rdev_to_drm(rdev), &i2c, stmp); } gpio = (ATOM_GPIO_I2C_ASSIGMENT *) ((u8 *)gpio + sizeof(ATOM_GPIO_I2C_ASSIGMENT)); @@ -923,8 +923,12 @@ max_device = ATOM_MAX_SUPPORTED_DEVICE_INFO; for (i = 0; i < max_device; i++) { - ATOM_CONNECTOR_INFO_I2C ci = - supported_devices->info.asConnInfo[i]; + ATOM_CONNECTOR_INFO_I2C ci; + + if (frev > 1) + ci = supported_devices->info_2d1.asConnInfo[i]; + else + ci = supported_devices->info.asConnInfo[i]; bios_connectors[i].valid = false; @@ -1713,26 +1717,29 @@ fake_edid_record = (ATOM_FAKE_EDID_PATCH_RECORD *)record; if (fake_edid_record->ucFakeEDIDLength) { struct edid *edid; - int edid_size = - max((int)EDID_LENGTH, (int)fake_edid_record->ucFakeEDIDLength); - edid = kmalloc(edid_size, GFP_KERNEL); - if (edid) { - memcpy((u8 *)edid, (u8 *)&fake_edid_record->ucFakeEDIDString[0], - fake_edid_record->ucFakeEDIDLength); + int edid_size; + if (fake_edid_record->ucFakeEDIDLength == 128) + edid_size = fake_edid_record->ucFakeEDIDLength; + else + edid_size = fake_edid_record->ucFakeEDIDLength * 128; + edid = kmemdup(&fake_edid_record->ucFakeEDIDString[0], + edid_size, GFP_KERNEL); + if (edid) { if (drm_edid_is_valid(edid)) { rdev->mode_info.bios_hardcoded_edid = edid; rdev->mode_info.bios_hardcoded_edid_size = edid_size; - } else + } else { kfree(edid); + } } + record += struct_size(fake_edid_record, + ucFakeEDIDString, + edid_size); + } else { + /* empty fake edid record must be 3 bytes long */ + record += sizeof(ATOM_FAKE_EDID_PATCH_RECORD) + 1; } - record += fake_edid_record->ucFakeEDIDLength ? - struct_size(fake_edid_record, - ucFakeEDIDString, - fake_edid_record->ucFakeEDIDLength) : - /* empty fake edid record must be 3 bytes long */ - sizeof(ATOM_FAKE_EDID_PATCH_RECORD) + 1; break; case LCD_PANEL_RESOLUTION_RECORD_TYPE: panel_res_record = (ATOM_PANEL_RESOLUTION_PATCH_RECORD *)record; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/radeon_audio.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/radeon_audio.c @@ -197,7 +197,7 @@ return; if (rdev->mode_info.mode_config_initialized) { - list_for_each_entry(encoder, &rdev->ddev->mode_config.encoder_list, head) { + list_for_each_entry(encoder, &rdev_to_drm(rdev)->mode_config.encoder_list, head) { if (radeon_encoder_is_digital(encoder)) { radeon_encoder = to_radeon_encoder(encoder); dig = radeon_encoder->enc_priv; @@ -760,19 +760,25 @@ if (!rdev->audio.enabled || !rdev->mode_info.mode_config_initialized) return 0; - list_for_each_entry(encoder, &rdev->ddev->mode_config.encoder_list, head) { + list_for_each_entry(connector, &dev->mode_config.connector_list, head) { + const struct drm_connector_helper_funcs *connector_funcs = + connector->helper_private; + encoder = connector_funcs->best_encoder(connector); + + if (!encoder) + continue; + if (!radeon_encoder_is_digital(encoder)) continue; radeon_encoder = to_radeon_encoder(encoder); dig = radeon_encoder->enc_priv; if (!dig->pin || dig->pin->id != port) continue; - connector = radeon_get_connector_for_encoder(encoder); - if (!connector) - continue; *enabled = true; + mutex_lock(&connector->eld_mutex); ret = drm_eld_size(connector->eld); memcpy(buf, connector->eld, min(max_bytes, ret)); + mutex_unlock(&connector->eld_mutex); break; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/radeon_combios.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/radeon_combios.c @@ -372,7 +372,7 @@ int edid_info, size; struct edid *edid; unsigned char *raw; - edid_info = combios_get_table_offset(rdev->ddev, COMBIOS_HARDCODED_EDID_TABLE); + edid_info = combios_get_table_offset(rdev_to_drm(rdev), COMBIOS_HARDCODED_EDID_TABLE); if (!edid_info) return false; @@ -642,7 +642,7 @@ static struct radeon_i2c_bus_rec radeon_combios_get_i2c_info_from_table(struct radeon_device *rdev) { - struct drm_device *dev = rdev->ddev; + struct drm_device *dev = rdev_to_drm(rdev); struct radeon_i2c_bus_rec i2c; u16 offset; u8 id, blocks, clk, data; @@ -670,7 +670,7 @@ void radeon_combios_i2c_init(struct radeon_device *rdev) { - struct drm_device *dev = rdev->ddev; + struct drm_device *dev = rdev_to_drm(rdev); struct radeon_i2c_bus_rec i2c; /* actual hw pads @@ -812,7 +812,7 @@ bool radeon_combios_sideport_present(struct radeon_device *rdev) { - struct drm_device *dev = rdev->ddev; + struct drm_device *dev = rdev_to_drm(rdev); u16 igp_info; /* sideport is AMD only */ @@ -915,7 +915,7 @@ enum radeon_tv_std radeon_combios_get_tv_info(struct radeon_device *rdev) { - struct drm_device *dev = rdev->ddev; + struct drm_device *dev = rdev_to_drm(rdev); uint16_t tv_info; enum radeon_tv_std tv_std = TV_STD_NTSC; @@ -2637,7 +2637,7 @@ void radeon_combios_get_power_modes(struct radeon_device *rdev) { - struct drm_device *dev = rdev->ddev; + struct drm_device *dev = rdev_to_drm(rdev); u16 offset, misc, misc2 = 0; u8 rev, tmp; int state_index = 0; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/radeon_device.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/radeon_device.c @@ -760,7 +760,7 @@ if (rdev->is_atom_bios) atom_asic_init(rdev->mode_info.atom_context); else - radeon_combios_asic_init(rdev->ddev); + radeon_combios_asic_init(rdev_to_drm(rdev)); return true; } else { dev_err(rdev->dev, "Card not posted and no BIOS - ignoring\n"); @@ -980,7 +980,7 @@ return -ENOMEM; rdev->mode_info.atom_card_info = atom_card_info; - atom_card_info->dev = rdev->ddev; + atom_card_info->dev = rdev_to_drm(rdev); atom_card_info->reg_read = cail_reg_read; atom_card_info->reg_write = cail_reg_write; /* needed for iio ops */ @@ -1005,7 +1005,7 @@ mutex_init(&rdev->mode_info.atom_context->mutex); mutex_init(&rdev->mode_info.atom_context->scratch_mutex); - radeon_atom_initialize_bios_scratch_regs(rdev->ddev); + radeon_atom_initialize_bios_scratch_regs(rdev_to_drm(rdev)); atom_allocate_fb_scratch(rdev->mode_info.atom_context); return 0; } @@ -1049,7 +1049,7 @@ */ int radeon_combios_init(struct radeon_device *rdev) { - radeon_combios_initialize_bios_scratch_regs(rdev->ddev); + radeon_combios_initialize_bios_scratch_regs(rdev_to_drm(rdev)); return 0; } @@ -1847,7 +1847,7 @@ downgrade_write(&rdev->exclusive_lock); - drm_helper_resume_force_mode(rdev->ddev); + drm_helper_resume_force_mode(rdev_to_drm(rdev)); /* set the power state here in case we are a PX system or headless */ if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/radeon_display.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/radeon_display.c @@ -302,13 +302,13 @@ if ((radeon_use_pflipirq == 2) && ASIC_IS_DCE4(rdev)) return; - spin_lock_irqsave(&rdev->ddev->event_lock, flags); + spin_lock_irqsave(&rdev_to_drm(rdev)->event_lock, flags); if (radeon_crtc->flip_status != RADEON_FLIP_SUBMITTED) { DRM_DEBUG_DRIVER("radeon_crtc->flip_status = %d != " "RADEON_FLIP_SUBMITTED(%d)\n", radeon_crtc->flip_status, RADEON_FLIP_SUBMITTED); - spin_unlock_irqrestore(&rdev->ddev->event_lock, flags); + spin_unlock_irqrestore(&rdev_to_drm(rdev)->event_lock, flags); return; } @@ -334,7 +334,7 @@ */ if (update_pending && (DRM_SCANOUTPOS_VALID & - radeon_get_crtc_scanoutpos(rdev->ddev, crtc_id, + radeon_get_crtc_scanoutpos(rdev_to_drm(rdev), crtc_id, GET_DISTANCE_TO_VBLANKSTART, &vpos, &hpos, NULL, NULL, &rdev->mode_info.crtcs[crtc_id]->base.hwmode)) && @@ -347,7 +347,7 @@ */ update_pending = 0; } - spin_unlock_irqrestore(&rdev->ddev->event_lock, flags); + spin_unlock_irqrestore(&rdev_to_drm(rdev)->event_lock, flags); if (!update_pending) radeon_crtc_handle_flip(rdev, crtc_id); } @@ -370,14 +370,14 @@ if (radeon_crtc == NULL) return; - spin_lock_irqsave(&rdev->ddev->event_lock, flags); + spin_lock_irqsave(&rdev_to_drm(rdev)->event_lock, flags); work = radeon_crtc->flip_work; if (radeon_crtc->flip_status != RADEON_FLIP_SUBMITTED) { DRM_DEBUG_DRIVER("radeon_crtc->flip_status = %d != " "RADEON_FLIP_SUBMITTED(%d)\n", radeon_crtc->flip_status, RADEON_FLIP_SUBMITTED); - spin_unlock_irqrestore(&rdev->ddev->event_lock, flags); + spin_unlock_irqrestore(&rdev_to_drm(rdev)->event_lock, flags); return; } @@ -389,7 +389,7 @@ if (work->event) drm_crtc_send_vblank_event(&radeon_crtc->base, work->event); - spin_unlock_irqrestore(&rdev->ddev->event_lock, flags); + spin_unlock_irqrestore(&rdev_to_drm(rdev)->event_lock, flags); drm_crtc_vblank_put(&radeon_crtc->base); radeon_irq_kms_pflip_irq_put(rdev, work->crtc_id); @@ -408,7 +408,7 @@ struct radeon_flip_work *work = container_of(__work, struct radeon_flip_work, flip_work); struct radeon_device *rdev = work->rdev; - struct drm_device *dev = rdev->ddev; + struct drm_device *dev = rdev_to_drm(rdev); struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[work->crtc_id]; struct drm_crtc *crtc = &radeon_crtc->base; @@ -683,7 +683,7 @@ struct radeon_device *rdev = dev->dev_private; struct radeon_crtc *radeon_crtc; - radeon_crtc = kzalloc(sizeof(struct radeon_crtc) + (RADEONFB_CONN_LIMIT * sizeof(struct drm_connector *)), GFP_KERNEL); + radeon_crtc = kzalloc(sizeof(*radeon_crtc), GFP_KERNEL); if (radeon_crtc == NULL) return; @@ -709,12 +709,6 @@ dev->mode_config.cursor_width = radeon_crtc->max_cursor_width; dev->mode_config.cursor_height = radeon_crtc->max_cursor_height; -#if 0 - radeon_crtc->mode_set.crtc = &radeon_crtc->base; - radeon_crtc->mode_set.connectors = (struct drm_connector **)(radeon_crtc + 1); - radeon_crtc->mode_set.num_connectors = 0; -#endif - if (rdev->is_atom_bios && (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom)) radeon_atombios_init_crtc(dev, radeon_crtc); else @@ -1407,7 +1401,7 @@ if (rdev->is_atom_bios) { rdev->mode_info.coherent_mode_property = - drm_property_create_range(rdev->ddev, 0 , "coherent", 0, 1); + drm_property_create_range(rdev_to_drm(rdev), 0, "coherent", 0, 1); if (!rdev->mode_info.coherent_mode_property) return -ENOMEM; } @@ -1415,57 +1409,57 @@ if (!ASIC_IS_AVIVO(rdev)) { sz = ARRAY_SIZE(radeon_tmds_pll_enum_list); rdev->mode_info.tmds_pll_property = - drm_property_create_enum(rdev->ddev, 0, + drm_property_create_enum(rdev_to_drm(rdev), 0, "tmds_pll", radeon_tmds_pll_enum_list, sz); } rdev->mode_info.load_detect_property = - drm_property_create_range(rdev->ddev, 0, "load detection", 0, 1); + drm_property_create_range(rdev_to_drm(rdev), 0, "load detection", 0, 1); if (!rdev->mode_info.load_detect_property) return -ENOMEM; - drm_mode_create_scaling_mode_property(rdev->ddev); + drm_mode_create_scaling_mode_property(rdev_to_drm(rdev)); sz = ARRAY_SIZE(radeon_tv_std_enum_list); rdev->mode_info.tv_std_property = - drm_property_create_enum(rdev->ddev, 0, + drm_property_create_enum(rdev_to_drm(rdev), 0, "tv standard", radeon_tv_std_enum_list, sz); sz = ARRAY_SIZE(radeon_underscan_enum_list); rdev->mode_info.underscan_property = - drm_property_create_enum(rdev->ddev, 0, + drm_property_create_enum(rdev_to_drm(rdev), 0, "underscan", radeon_underscan_enum_list, sz); rdev->mode_info.underscan_hborder_property = - drm_property_create_range(rdev->ddev, 0, + drm_property_create_range(rdev_to_drm(rdev), 0, "underscan hborder", 0, 128); if (!rdev->mode_info.underscan_hborder_property) return -ENOMEM; rdev->mode_info.underscan_vborder_property = - drm_property_create_range(rdev->ddev, 0, + drm_property_create_range(rdev_to_drm(rdev), 0, "underscan vborder", 0, 128); if (!rdev->mode_info.underscan_vborder_property) return -ENOMEM; sz = ARRAY_SIZE(radeon_audio_enum_list); rdev->mode_info.audio_property = - drm_property_create_enum(rdev->ddev, 0, + drm_property_create_enum(rdev_to_drm(rdev), 0, "audio", radeon_audio_enum_list, sz); sz = ARRAY_SIZE(radeon_dither_enum_list); rdev->mode_info.dither_property = - drm_property_create_enum(rdev->ddev, 0, + drm_property_create_enum(rdev_to_drm(rdev), 0, "dither", radeon_dither_enum_list, sz); sz = ARRAY_SIZE(radeon_output_csc_enum_list); rdev->mode_info.output_csc_property = - drm_property_create_enum(rdev->ddev, 0, + drm_property_create_enum(rdev_to_drm(rdev), 0, "output_csc", radeon_output_csc_enum_list, sz); @@ -1584,29 +1578,29 @@ int i; int ret; - drm_mode_config_init(rdev->ddev); + drm_mode_config_init(rdev_to_drm(rdev)); rdev->mode_info.mode_config_initialized = true; - rdev->ddev->mode_config.funcs = &radeon_mode_funcs; + rdev_to_drm(rdev)->mode_config.funcs = &radeon_mode_funcs; if (radeon_use_pflipirq == 2 && rdev->family >= CHIP_R600) - rdev->ddev->mode_config.async_page_flip = true; + rdev_to_drm(rdev)->mode_config.async_page_flip = true; if (ASIC_IS_DCE5(rdev)) { - rdev->ddev->mode_config.max_width = 16384; - rdev->ddev->mode_config.max_height = 16384; + rdev_to_drm(rdev)->mode_config.max_width = 16384; + rdev_to_drm(rdev)->mode_config.max_height = 16384; } else if (ASIC_IS_AVIVO(rdev)) { - rdev->ddev->mode_config.max_width = 8192; - rdev->ddev->mode_config.max_height = 8192; + rdev_to_drm(rdev)->mode_config.max_width = 8192; + rdev_to_drm(rdev)->mode_config.max_height = 8192; } else { - rdev->ddev->mode_config.max_width = 4096; - rdev->ddev->mode_config.max_height = 4096; + rdev_to_drm(rdev)->mode_config.max_width = 4096; + rdev_to_drm(rdev)->mode_config.max_height = 4096; } - rdev->ddev->mode_config.preferred_depth = 24; - rdev->ddev->mode_config.prefer_shadow = 1; + rdev_to_drm(rdev)->mode_config.preferred_depth = 24; + rdev_to_drm(rdev)->mode_config.prefer_shadow = 1; - rdev->ddev->mode_config.fb_modifiers_not_supported = true; + rdev_to_drm(rdev)->mode_config.fb_modifiers_not_supported = true; ret = radeon_modeset_create_props(rdev); if (ret) { @@ -1624,11 +1618,11 @@ /* allocate crtcs */ for (i = 0; i < rdev->num_crtc; i++) { - radeon_crtc_init(rdev->ddev, i); + radeon_crtc_init(rdev_to_drm(rdev), i); } /* okay we should have all the bios connectors */ - ret = radeon_setup_enc_conn(rdev->ddev); + ret = radeon_setup_enc_conn(rdev_to_drm(rdev)); if (!ret) { return ret; } @@ -1645,7 +1639,7 @@ /* setup afmt */ radeon_afmt_init(rdev); - drm_kms_helper_poll_init(rdev->ddev); + drm_kms_helper_poll_init(rdev_to_drm(rdev)); /* do pm late init */ ret = radeon_pm_late_init(rdev); @@ -1656,11 +1650,11 @@ void radeon_modeset_fini(struct radeon_device *rdev) { if (rdev->mode_info.mode_config_initialized) { - drm_kms_helper_poll_fini(rdev->ddev); + drm_kms_helper_poll_fini(rdev_to_drm(rdev)); radeon_hpd_fini(rdev); - drm_helper_force_disable_all(rdev->ddev); + drm_helper_force_disable_all(rdev_to_drm(rdev)); radeon_afmt_fini(rdev); - drm_mode_config_cleanup(rdev->ddev); + drm_mode_config_cleanup(rdev_to_drm(rdev)); rdev->mode_info.mode_config_initialized = false; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/radeon_encoders.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/radeon_encoders.c @@ -43,7 +43,7 @@ struct radeon_device *rdev = dev->dev_private; struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); struct drm_encoder *clone_encoder; - uint32_t index_mask = 0; + uint32_t index_mask = drm_encoder_mask(encoder); int count; /* DIG routing gets problematic */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/radeon_fbdev.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/radeon_fbdev.c @@ -67,7 +67,7 @@ int height = mode_cmd->height; u32 cpp; - info = drm_get_format_info(rdev->ddev, mode_cmd); + info = drm_get_format_info(rdev_to_drm(rdev), mode_cmd); cpp = info->cpp[0]; /* need to align pitch with crtc limits */ @@ -148,15 +148,15 @@ struct radeon_device *rdev = fb_helper->dev->dev_private; int ret; - ret = pm_runtime_get_sync(rdev->ddev->dev); + ret = pm_runtime_get_sync(rdev_to_drm(rdev)->dev); if (ret < 0 && ret != -EACCES) goto err_pm_runtime_mark_last_busy; return 0; err_pm_runtime_mark_last_busy: - pm_runtime_mark_last_busy(rdev->ddev->dev); - pm_runtime_put_autosuspend(rdev->ddev->dev); + pm_runtime_mark_last_busy(rdev_to_drm(rdev)->dev); + pm_runtime_put_autosuspend(rdev_to_drm(rdev)->dev); return ret; } @@ -165,8 +165,8 @@ struct drm_fb_helper *fb_helper = info->par; struct radeon_device *rdev = fb_helper->dev->dev_private; - pm_runtime_mark_last_busy(rdev->ddev->dev); - pm_runtime_put_autosuspend(rdev->ddev->dev); + pm_runtime_mark_last_busy(rdev_to_drm(rdev)->dev); + pm_runtime_put_autosuspend(rdev_to_drm(rdev)->dev); return 0; } @@ -236,7 +236,7 @@ ret = -ENOMEM; goto err_radeon_fbdev_destroy_pinned_object; } - ret = radeon_framebuffer_init(rdev->ddev, fb, &mode_cmd, gobj); + ret = radeon_framebuffer_init(rdev_to_drm(rdev), fb, &mode_cmd, gobj); if (ret) { DRM_ERROR("failed to initialize framebuffer %d\n", ret); goto err_kfree; @@ -374,12 +374,12 @@ fb_helper = kzalloc(sizeof(*fb_helper), GFP_KERNEL); if (!fb_helper) return; - drm_fb_helper_prepare(rdev->ddev, fb_helper, bpp_sel, &radeon_fbdev_fb_helper_funcs); + drm_fb_helper_prepare(rdev_to_drm(rdev), fb_helper, bpp_sel, &radeon_fbdev_fb_helper_funcs); - ret = drm_client_init(rdev->ddev, &fb_helper->client, "radeon-fbdev", + ret = drm_client_init(rdev_to_drm(rdev), &fb_helper->client, "radeon-fbdev", &radeon_fbdev_client_funcs); if (ret) { - drm_err(rdev->ddev, "Failed to register client: %d\n", ret); + drm_err(rdev_to_drm(rdev), "Failed to register client: %d\n", ret); goto err_drm_client_init; } @@ -394,13 +394,13 @@ void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state) { - if (rdev->ddev->fb_helper) - drm_fb_helper_set_suspend(rdev->ddev->fb_helper, state); + if (rdev_to_drm(rdev)->fb_helper) + drm_fb_helper_set_suspend(rdev_to_drm(rdev)->fb_helper, state); } bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj) { - struct drm_fb_helper *fb_helper = rdev->ddev->fb_helper; + struct drm_fb_helper *fb_helper = rdev_to_drm(rdev)->fb_helper; struct drm_gem_object *gobj; if (!fb_helper) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/radeon_fence.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/radeon_fence.c @@ -149,7 +149,7 @@ rdev->fence_context + ring, seq); radeon_fence_ring_emit(rdev, ring, *fence); - trace_radeon_fence_emit(rdev->ddev, ring, (*fence)->seq); + trace_radeon_fence_emit(rdev_to_drm(rdev), ring, (*fence)->seq); radeon_fence_schedule_check(rdev, ring); return 0; } @@ -488,7 +488,7 @@ if (!target_seq[i]) continue; - trace_radeon_fence_wait_begin(rdev->ddev, i, target_seq[i]); + trace_radeon_fence_wait_begin(rdev_to_drm(rdev), i, target_seq[i]); radeon_irq_kms_sw_irq_get(rdev, i); } @@ -510,7 +510,7 @@ continue; radeon_irq_kms_sw_irq_put(rdev, i); - trace_radeon_fence_wait_end(rdev->ddev, i, target_seq[i]); + trace_radeon_fence_wait_end(rdev_to_drm(rdev), i, target_seq[i]); } return r; @@ -994,7 +994,7 @@ void radeon_debugfs_fence_init(struct radeon_device *rdev) { #if defined(CONFIG_DEBUG_FS) - struct dentry *root = rdev->ddev->primary->debugfs_root; + struct dentry *root = rdev_to_drm(rdev)->primary->debugfs_root; debugfs_create_file("radeon_gpu_reset", 0444, root, rdev, &radeon_debugfs_gpu_reset_fops); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/radeon_gem.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/radeon_gem.c @@ -641,7 +641,7 @@ if (r) goto error_unlock; - if (bo_va->it.start) + if (bo_va->it.start && bo_va->bo) r = radeon_vm_bo_update(rdev, bo_va, bo_va->bo->tbo.resource); error_unlock: @@ -898,7 +898,7 @@ void radeon_gem_debugfs_init(struct radeon_device *rdev) { #if defined(CONFIG_DEBUG_FS) - struct dentry *root = rdev->ddev->primary->debugfs_root; + struct dentry *root = rdev_to_drm(rdev)->primary->debugfs_root; debugfs_create_file("radeon_gem_info", 0444, root, rdev, &radeon_debugfs_gem_info_fops); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/radeon_i2c.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/radeon_i2c.c @@ -1011,7 +1011,7 @@ struct radeon_i2c_bus_rec *rec, const char *name) { - struct drm_device *dev = rdev->ddev; + struct drm_device *dev = rdev_to_drm(rdev); int i; for (i = 0; i < RADEON_MAX_I2C_BUS; i++) { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/radeon_ib.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/radeon_ib.c @@ -307,7 +307,7 @@ static void radeon_debugfs_sa_init(struct radeon_device *rdev) { #if defined(CONFIG_DEBUG_FS) - struct dentry *root = rdev->ddev->primary->debugfs_root; + struct dentry *root = rdev_to_drm(rdev)->primary->debugfs_root; debugfs_create_file("radeon_sa_info", 0444, root, rdev, &radeon_debugfs_sa_info_fops); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/radeon_irq_kms.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/radeon_irq_kms.c @@ -80,7 +80,7 @@ { struct radeon_device *rdev = container_of(work, struct radeon_device, hotplug_work.work); - struct drm_device *dev = rdev->ddev; + struct drm_device *dev = rdev_to_drm(rdev); struct drm_mode_config *mode_config = &dev->mode_config; struct drm_connector *connector; @@ -101,7 +101,7 @@ { struct radeon_device *rdev = container_of(work, struct radeon_device, dp_work); - struct drm_device *dev = rdev->ddev; + struct drm_device *dev = rdev_to_drm(rdev); struct drm_mode_config *mode_config = &dev->mode_config; struct drm_connector *connector; @@ -197,7 +197,7 @@ static int radeon_irq_install(struct radeon_device *rdev, int irq) { - struct drm_device *dev = rdev->ddev; + struct drm_device *dev = rdev_to_drm(rdev); int ret; if (irq == IRQ_NOTCONNECTED) @@ -218,7 +218,7 @@ static void radeon_irq_uninstall(struct radeon_device *rdev) { - struct drm_device *dev = rdev->ddev; + struct drm_device *dev = rdev_to_drm(rdev); struct pci_dev *pdev = to_pci_dev(dev->dev); radeon_driver_irq_uninstall_kms(dev); @@ -322,9 +322,9 @@ spin_lock_init(&rdev->irq.lock); /* Disable vblank irqs aggressively for power-saving */ - rdev->ddev->vblank_disable_immediate = true; + rdev_to_drm(rdev)->vblank_disable_immediate = true; - r = drm_vblank_init(rdev->ddev, rdev->num_crtc); + r = drm_vblank_init(rdev_to_drm(rdev), rdev->num_crtc); if (r) { return r; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/radeon_object.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/radeon_object.c @@ -152,7 +152,7 @@ bo = kzalloc(sizeof(struct radeon_bo), GFP_KERNEL); if (bo == NULL) return -ENOMEM; - drm_gem_private_object_init(rdev->ddev, &bo->tbo.base, size); + drm_gem_private_object_init(rdev_to_drm(rdev), &bo->tbo.base, size); bo->rdev = rdev; bo->surface_reg = -1; INIT_LIST_HEAD(&bo->list); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/radeon_pm.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/radeon_pm.c @@ -281,7 +281,7 @@ if (rdev->irq.installed) { i = 0; - drm_for_each_crtc(crtc, rdev->ddev) { + drm_for_each_crtc(crtc, rdev_to_drm(rdev)) { if (rdev->pm.active_crtcs & (1 << i)) { /* This can fail if a modeset is in progress */ if (drm_crtc_vblank_get(crtc) == 0) @@ -298,7 +298,7 @@ if (rdev->irq.installed) { i = 0; - drm_for_each_crtc(crtc, rdev->ddev) { + drm_for_each_crtc(crtc, rdev_to_drm(rdev)) { if (rdev->pm.req_vblank & (1 << i)) { rdev->pm.req_vblank &= ~(1 << i); drm_crtc_vblank_put(crtc); @@ -670,7 +670,7 @@ char *buf) { struct radeon_device *rdev = dev_get_drvdata(dev); - struct drm_device *ddev = rdev->ddev; + struct drm_device *ddev = rdev_to_drm(rdev); int temp; /* Can't get temperature when the card is off */ @@ -714,7 +714,7 @@ struct device_attribute *attr, char *buf) { struct radeon_device *rdev = dev_get_drvdata(dev); - struct drm_device *ddev = rdev->ddev; + struct drm_device *ddev = rdev_to_drm(rdev); u32 sclk = 0; /* Can't get clock frequency when the card is off */ @@ -739,7 +739,7 @@ struct device_attribute *attr, char *buf) { struct radeon_device *rdev = dev_get_drvdata(dev); - struct drm_device *ddev = rdev->ddev; + struct drm_device *ddev = rdev_to_drm(rdev); u16 vddc = 0; /* Can't get vddc when the card is off */ @@ -1691,7 +1691,7 @@ static void radeon_pm_compute_clocks_old(struct radeon_device *rdev) { - struct drm_device *ddev = rdev->ddev; + struct drm_device *ddev = rdev_to_drm(rdev); struct drm_crtc *crtc; struct radeon_crtc *radeon_crtc; @@ -1764,7 +1764,7 @@ static void radeon_pm_compute_clocks_dpm(struct radeon_device *rdev) { - struct drm_device *ddev = rdev->ddev; + struct drm_device *ddev = rdev_to_drm(rdev); struct drm_crtc *crtc; struct radeon_crtc *radeon_crtc; struct radeon_connector *radeon_connector; @@ -1825,7 +1825,7 @@ */ for (crtc = 0; (crtc < rdev->num_crtc) && in_vbl; crtc++) { if (rdev->pm.active_crtcs & (1 << crtc)) { - vbl_status = radeon_get_crtc_scanoutpos(rdev->ddev, + vbl_status = radeon_get_crtc_scanoutpos(rdev_to_drm(rdev), crtc, USE_REAL_VBLANKSTART, &vpos, &hpos, NULL, NULL, @@ -1917,7 +1917,7 @@ static int radeon_debugfs_pm_info_show(struct seq_file *m, void *unused) { struct radeon_device *rdev = m->private; - struct drm_device *ddev = rdev->ddev; + struct drm_device *ddev = rdev_to_drm(rdev); if ((rdev->flags & RADEON_IS_PX) && (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) { @@ -1954,7 +1954,7 @@ static void radeon_debugfs_pm_init(struct radeon_device *rdev) { #if defined(CONFIG_DEBUG_FS) - struct dentry *root = rdev->ddev->primary->debugfs_root; + struct dentry *root = rdev_to_drm(rdev)->primary->debugfs_root; debugfs_create_file("radeon_pm_info", 0444, root, rdev, &radeon_debugfs_pm_info_fops); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/radeon_ring.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/radeon_ring.c @@ -548,7 +548,7 @@ { #if defined(CONFIG_DEBUG_FS) const char *ring_name = radeon_debugfs_ring_idx_to_name(ring->idx); - struct dentry *root = rdev->ddev->primary->debugfs_root; + struct dentry *root = rdev_to_drm(rdev)->primary->debugfs_root; if (ring_name) debugfs_create_file(ring_name, 0444, root, ring, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/radeon_ttm.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/radeon_ttm.c @@ -687,8 +687,8 @@ /* No others user of address space so set it to 0 */ r = ttm_device_init(&rdev->mman.bdev, &radeon_bo_driver, rdev->dev, - rdev->ddev->anon_inode->i_mapping, - rdev->ddev->vma_offset_manager, + rdev_to_drm(rdev)->anon_inode->i_mapping, + rdev_to_drm(rdev)->vma_offset_manager, rdev->need_swiotlb, dma_addressing_limited(&rdev->pdev->dev)); if (r) { @@ -895,7 +895,7 @@ static void radeon_ttm_debugfs_init(struct radeon_device *rdev) { #if defined(CONFIG_DEBUG_FS) - struct drm_minor *minor = rdev->ddev->primary; + struct drm_minor *minor = rdev_to_drm(rdev)->primary; struct dentry *root = minor->debugfs_root; debugfs_create_file("radeon_vram", 0444, root, rdev, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/rs400.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/rs400.c @@ -378,7 +378,7 @@ static void rs400_debugfs_pcie_gart_info_init(struct radeon_device *rdev) { #if defined(CONFIG_DEBUG_FS) - struct dentry *root = rdev->ddev->primary->debugfs_root; + struct dentry *root = rdev_to_drm(rdev)->primary->debugfs_root; debugfs_create_file("rs400_gart_info", 0444, root, rdev, &rs400_debugfs_gart_info_fops); @@ -473,7 +473,7 @@ RREG32(R_0007C0_CP_STAT)); } /* post */ - radeon_combios_asic_init(rdev->ddev); + radeon_combios_asic_init(rdev_to_drm(rdev)); /* Resume clock after posting */ r300_clock_startup(rdev); /* Initialize surface registers */ @@ -551,7 +551,7 @@ return -EINVAL; /* Initialize clocks */ - radeon_get_clock_info(rdev->ddev); + radeon_get_clock_info(rdev_to_drm(rdev)); /* initialize memory controller */ rs400_mc_init(rdev); /* Fence driver */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/rs600.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/rs600.c @@ -322,7 +322,7 @@ void rs600_pm_prepare(struct radeon_device *rdev) { - struct drm_device *ddev = rdev->ddev; + struct drm_device *ddev = rdev_to_drm(rdev); struct drm_crtc *crtc; struct radeon_crtc *radeon_crtc; u32 tmp; @@ -340,7 +340,7 @@ void rs600_pm_finish(struct radeon_device *rdev) { - struct drm_device *ddev = rdev->ddev; + struct drm_device *ddev = rdev_to_drm(rdev); struct drm_crtc *crtc; struct radeon_crtc *radeon_crtc; u32 tmp; @@ -409,7 +409,7 @@ void rs600_hpd_init(struct radeon_device *rdev) { - struct drm_device *dev = rdev->ddev; + struct drm_device *dev = rdev_to_drm(rdev); struct drm_connector *connector; unsigned enable = 0; @@ -436,7 +436,7 @@ void rs600_hpd_fini(struct radeon_device *rdev) { - struct drm_device *dev = rdev->ddev; + struct drm_device *dev = rdev_to_drm(rdev); struct drm_connector *connector; unsigned disable = 0; @@ -798,7 +798,7 @@ /* Vertical blank interrupts */ if (G_007EDC_LB_D1_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { if (rdev->irq.crtc_vblank_int[0]) { - drm_handle_vblank(rdev->ddev, 0); + drm_handle_vblank(rdev_to_drm(rdev), 0); rdev->pm.vblank_sync = true; wake_up(&rdev->irq.vblank_queue); } @@ -807,7 +807,7 @@ } if (G_007EDC_LB_D2_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { if (rdev->irq.crtc_vblank_int[1]) { - drm_handle_vblank(rdev->ddev, 1); + drm_handle_vblank(rdev_to_drm(rdev), 1); rdev->pm.vblank_sync = true; wake_up(&rdev->irq.vblank_queue); } @@ -1134,7 +1134,7 @@ return -EINVAL; /* Initialize clocks */ - radeon_get_clock_info(rdev->ddev); + radeon_get_clock_info(rdev_to_drm(rdev)); /* initialize memory controller */ rs600_mc_init(rdev); r100_debugfs_rbbm_init(rdev); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/rs690.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/rs690.c @@ -845,7 +845,7 @@ return -EINVAL; /* Initialize clocks */ - radeon_get_clock_info(rdev->ddev); + radeon_get_clock_info(rdev_to_drm(rdev)); /* initialize memory controller */ rs690_mc_init(rdev); rv515_debugfs(rdev); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/rv515.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/rv515.c @@ -255,7 +255,7 @@ void rv515_debugfs(struct radeon_device *rdev) { #if defined(CONFIG_DEBUG_FS) - struct dentry *root = rdev->ddev->primary->debugfs_root; + struct dentry *root = rdev_to_drm(rdev)->primary->debugfs_root; debugfs_create_file("rv515_pipes_info", 0444, root, rdev, &rv515_debugfs_pipes_info_fops); @@ -636,7 +636,7 @@ if (radeon_boot_test_post_card(rdev) == false) return -EINVAL; /* Initialize clocks */ - radeon_get_clock_info(rdev->ddev); + radeon_get_clock_info(rdev_to_drm(rdev)); /* initialize AGP */ if (rdev->flags & RADEON_IS_AGP) { r = radeon_agp_init(rdev); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/rv770.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/rv770.c @@ -1935,7 +1935,7 @@ /* Initialize surface registers */ radeon_surface_init(rdev); /* Initialize clocks */ - radeon_get_clock_info(rdev->ddev); + radeon_get_clock_info(rdev_to_drm(rdev)); /* Fence driver */ radeon_fence_driver_init(rdev); /* initialize AGP */ --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/si.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/si.c @@ -6296,7 +6296,7 @@ event_name = "vblank"; if (rdev->irq.crtc_vblank_int[crtc_idx]) { - drm_handle_vblank(rdev->ddev, crtc_idx); + drm_handle_vblank(rdev_to_drm(rdev), crtc_idx); rdev->pm.vblank_sync = true; wake_up(&rdev->irq.vblank_queue); } @@ -6858,7 +6858,7 @@ /* Initialize surface registers */ radeon_surface_init(rdev); /* Initialize clocks */ - radeon_get_clock_info(rdev->ddev); + radeon_get_clock_info(rdev_to_drm(rdev)); /* Fence driver */ radeon_fence_driver_init(rdev); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/radeon/sumo_dpm.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/radeon/sumo_dpm.c @@ -1621,6 +1621,8 @@ for (i = 0; i < SUMO_MAX_HARDWARE_POWERLEVELS; i++) { if (table[i].ulSupportedSCLK != 0) { + if (table[i].usVoltageIndex >= SUMO_MAX_NUMBER_VOLTAGES) + continue; vid_mapping_table->entries[table[i].usVoltageIndex].vid_7bit = table[i].usVoltageID; vid_mapping_table->entries[table[i].usVoltageIndex].vid_2bit = --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c @@ -587,7 +587,7 @@ for (timeout = 10; timeout > 0; --timeout) { if ((rcar_mipi_dsi_read(dsi, PPICLSR) & PPICLSR_STPST) && (rcar_mipi_dsi_read(dsi, PPIDLSR) & PPIDLSR_STPST) && - (rcar_mipi_dsi_read(dsi, CLOCKSET1) & CLOCKSET1_LOCK)) + (rcar_mipi_dsi_read(dsi, CLOCKSET1) & CLOCKSET1_LOCK_PHY)) break; usleep_range(1000, 2000); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h @@ -142,7 +142,6 @@ #define CLOCKSET1 0x101c #define CLOCKSET1_LOCK_PHY (1 << 17) -#define CLOCKSET1_LOCK (1 << 16) #define CLOCKSET1_CLKSEL (1 << 8) #define CLOCKSET1_CLKINSEL_EXTAL (0 << 2) #define CLOCKSET1_CLKINSEL_DIG (1 << 2) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/renesas/shmobile/shmob_drm_drv.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/renesas/shmobile/shmob_drm_drv.c @@ -171,6 +171,13 @@ drm_kms_helper_poll_fini(ddev); } +static void shmob_drm_shutdown(struct platform_device *pdev) +{ + struct shmob_drm_device *sdev = platform_get_drvdata(pdev); + + drm_atomic_helper_shutdown(&sdev->ddev); +} + static int shmob_drm_probe(struct platform_device *pdev) { struct shmob_drm_platform_data *pdata = pdev->dev.platform_data; @@ -273,6 +280,7 @@ static struct platform_driver shmob_drm_platform_driver = { .probe = shmob_drm_probe, .remove_new = shmob_drm_remove, + .shutdown = shmob_drm_shutdown, .driver = { .name = "shmob-drm", .of_match_table = of_match_ptr(shmob_drm_of_table), --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/rockchip/cdn-dp-core.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/rockchip/cdn-dp-core.c @@ -946,9 +946,6 @@ { struct cdn_dp_device *dp = container_of(work, struct cdn_dp_device, event_work); - struct drm_connector *connector = &dp->connector; - enum drm_connector_status old_status; - int ret; mutex_lock(&dp->lock); @@ -1010,11 +1007,7 @@ out: mutex_unlock(&dp->lock); - - old_status = connector->status; - connector->status = connector->funcs->detect(connector, false); - if (old_status != connector->status) - drm_kms_helper_hotplug_event(dp->drm_dev); + drm_connector_helper_hpd_irq_event(&dp->connector); } static int cdn_dp_pd_event(struct notifier_block *nb, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c @@ -434,6 +434,8 @@ HIWORD_UPDATE(RK3328_HDMI_SDAIN_MSK | RK3328_HDMI_SCLIN_MSK, RK3328_HDMI_SDAIN_MSK | RK3328_HDMI_SCLIN_MSK | RK3328_HDMI_HPD_IOE)); + + dw_hdmi_rk3328_read_hpd(dw_hdmi, data); } static const struct dw_hdmi_phy_ops rk3228_hdmi_phy_ops = { --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/rockchip/inno_hdmi.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/rockchip/inno_hdmi.c @@ -411,7 +411,7 @@ hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HBLANK_L, value & 0xFF); hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HBLANK_H, (value >> 8) & 0xFF); - value = mode->hsync_start - mode->hdisplay; + value = mode->htotal - mode->hsync_start; hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HDELAY_L, value & 0xFF); hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HDELAY_H, (value >> 8) & 0xFF); @@ -426,7 +426,7 @@ value = mode->vtotal - mode->vdisplay; hdmi_writeb(hdmi, HDMI_VIDEO_EXT_VBLANK, value & 0xFF); - value = mode->vsync_start - mode->vdisplay; + value = mode->vtotal - mode->vsync_start; hdmi_writeb(hdmi, HDMI_VIDEO_EXT_VDELAY, value & 0xFF); value = mode->vsync_end - mode->vsync_start; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -396,8 +396,8 @@ if (info->is_yuv) is_yuv = true; - if (dst_w > 3840) { - DRM_DEV_ERROR(vop->dev, "Maximum dst width (3840) exceeded\n"); + if (dst_w > 4096) { + DRM_DEV_ERROR(vop->dev, "Maximum dst width (4096) exceeded\n"); return; } @@ -1093,10 +1093,10 @@ if (!plane->state->fb) return -EINVAL; - if (state) - crtc_state = drm_atomic_get_existing_crtc_state(state, - new_plane_state->crtc); - else /* Special case for asynchronous cursor updates. */ + crtc_state = drm_atomic_get_existing_crtc_state(state, new_plane_state->crtc); + + /* Special case for asynchronous cursor updates. */ + if (!crtc_state) crtc_state = plane->crtc->state; return drm_atomic_helper_check_plane_state(plane->state, crtc_state, @@ -1583,6 +1583,10 @@ VOP_AFBC_SET(vop, enable, s->enable_afbc); vop_cfg_done(vop); + /* Ack the DMA transfer of the previous frame (RK3066). */ + if (VOP_HAS_REG(vop, common, dma_stop)) + VOP_REG_SET(vop, common, dma_stop, 0); + spin_unlock(&vop->reg_lock); /* --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/rockchip/rockchip_drm_vop.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/rockchip/rockchip_drm_vop.h @@ -122,6 +122,7 @@ struct vop_reg lut_buffer_index; struct vop_reg gate_en; struct vop_reg mmu_en; + struct vop_reg dma_stop; struct vop_reg out_mode; struct vop_reg standby; }; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c @@ -33,7 +33,6 @@ #include #include -#include "rockchip_drm_drv.h" #include "rockchip_drm_gem.h" #include "rockchip_drm_vop2.h" #include "rockchip_rgb.h" @@ -550,6 +549,25 @@ if (modifier == DRM_FORMAT_MOD_INVALID) return false; + if (vop2->data->soc_id == 3568 || vop2->data->soc_id == 3566) { + if (vop2_cluster_window(win)) { + if (modifier == DRM_FORMAT_MOD_LINEAR) { + drm_dbg_kms(vop2->drm, + "Cluster window only supports format with afbc\n"); + return false; + } + } + } + + if (format == DRM_FORMAT_XRGB2101010 || format == DRM_FORMAT_XBGR2101010) { + if (vop2->data->soc_id == 3588) { + if (!rockchip_afbc(plane, modifier)) { + drm_dbg_kms(vop2->drm, "Only support 32 bpp format with afbc\n"); + return false; + } + } + } + if (modifier == DRM_FORMAT_MOD_LINEAR) return true; @@ -706,6 +724,8 @@ const struct drm_format_info *info; u16 hor_scl_mode, ver_scl_mode; u16 hscl_filter_mode, vscl_filter_mode; + uint16_t cbcr_src_w = src_w; + uint16_t cbcr_src_h = src_h; u8 gt2 = 0; u8 gt4 = 0; u32 val; @@ -763,27 +783,27 @@ vop2_win_write(win, VOP2_WIN_YRGB_VSCL_FILTER_MODE, vscl_filter_mode); if (info->is_yuv) { - src_w /= info->hsub; - src_h /= info->vsub; + cbcr_src_w /= info->hsub; + cbcr_src_h /= info->vsub; gt4 = 0; gt2 = 0; - if (src_h >= (4 * dst_h)) { + if (cbcr_src_h >= (4 * dst_h)) { gt4 = 1; - src_h >>= 2; - } else if (src_h >= (2 * dst_h)) { + cbcr_src_h >>= 2; + } else if (cbcr_src_h >= (2 * dst_h)) { gt2 = 1; - src_h >>= 1; + cbcr_src_h >>= 1; } - hor_scl_mode = scl_get_scl_mode(src_w, dst_w); - ver_scl_mode = scl_get_scl_mode(src_h, dst_h); + hor_scl_mode = scl_get_scl_mode(cbcr_src_w, dst_w); + ver_scl_mode = scl_get_scl_mode(cbcr_src_h, dst_h); - val = vop2_scale_factor(src_w, dst_w); + val = vop2_scale_factor(cbcr_src_w, dst_w); vop2_win_write(win, VOP2_WIN_SCALE_CBCR_X, val); - val = vop2_scale_factor(src_h, dst_h); + val = vop2_scale_factor(cbcr_src_h, dst_h); vop2_win_write(win, VOP2_WIN_SCALE_CBCR_Y, val); vop2_win_write(win, VOP2_WIN_VSD_CBCR_GT4, gt4); @@ -1318,6 +1338,12 @@ &fb->format->format, afbc_en ? "AFBC" : "", &yrgb_mst); + if (vop2->data->soc_id > 3568) { + vop2_win_write(win, VOP2_WIN_AXI_BUS_ID, win->data->axi_bus_id); + vop2_win_write(win, VOP2_WIN_AXI_YRGB_R_ID, win->data->axi_yrgb_r_id); + vop2_win_write(win, VOP2_WIN_AXI_UV_R_ID, win->data->axi_uv_r_id); + } + if (vop2_cluster_window(win)) vop2_win_write(win, VOP2_WIN_AFBC_HALF_BLOCK_EN, half_block_en); @@ -1719,9 +1745,9 @@ else dclk_out_rate = v_pixclk >> 2; - dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000); + dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000000); if (!dclk_rate) { - drm_err(vop2->drm, "DP dclk_out_rate out of range, dclk_out_rate: %ld KHZ\n", + drm_err(vop2->drm, "DP dclk_out_rate out of range, dclk_out_rate: %ld Hz\n", dclk_out_rate); return 0; } @@ -1736,9 +1762,9 @@ * dclk_rate = N * dclk_core_rate N = (1,2,4 ), * we get a little factor here */ - dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000); + dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000000); if (!dclk_rate) { - drm_err(vop2->drm, "MIPI dclk out of range, dclk_out_rate: %ld KHZ\n", + drm_err(vop2->drm, "MIPI dclk out of range, dclk_out_rate: %ld Hz\n", dclk_out_rate); return 0; } @@ -2157,7 +2183,6 @@ static void vop2_setup_cluster_alpha(struct vop2 *vop2, struct vop2_win *main_win) { - u32 offset = (main_win->data->phys_id * 0x10); struct vop2_alpha_config alpha_config; struct vop2_alpha alpha; struct drm_plane_state *bottom_win_pstate; @@ -2165,6 +2190,7 @@ u16 src_glb_alpha_val, dst_glb_alpha_val; bool premulti_en = false; bool swap = false; + u32 offset = 0; /* At one win mode, win0 is dst/bottom win, and win1 is a all zero src/top win */ bottom_win_pstate = main_win->base.state; @@ -2183,6 +2209,22 @@ vop2_parse_alpha(&alpha_config, &alpha); alpha.src_color_ctrl.bits.src_dst_swap = swap; + + switch (main_win->data->phys_id) { + case ROCKCHIP_VOP2_CLUSTER0: + offset = 0x0; + break; + case ROCKCHIP_VOP2_CLUSTER1: + offset = 0x10; + break; + case ROCKCHIP_VOP2_CLUSTER2: + offset = 0x20; + break; + case ROCKCHIP_VOP2_CLUSTER3: + offset = 0x30; + break; + } + vop2_writel(vop2, RK3568_CLUSTER0_MIX_SRC_COLOR_CTRL + offset, alpha.src_color_ctrl.val); vop2_writel(vop2, RK3568_CLUSTER0_MIX_DST_COLOR_CTRL + offset, @@ -2230,6 +2272,12 @@ struct vop2_win *win = to_vop2_win(plane); int zpos = plane->state->normalized_zpos; + /* + * Need to configure alpha from second layer. + */ + if (zpos == 0) + continue; + if (plane->state->pixel_blend_mode == DRM_MODE_BLEND_PREMULTI) premulti_en = 1; else @@ -2306,7 +2354,10 @@ struct drm_plane *plane; u32 layer_sel = 0; u32 port_sel; - unsigned int nlayer, ofs; + u8 layer_id; + u8 old_layer_id; + u8 layer_sel_id; + unsigned int ofs; u32 ovl_ctrl; int i; struct vop2_video_port *vp0 = &vop2->vps[0]; @@ -2342,7 +2393,7 @@ port_sel |= FIELD_PREP(RK3568_OVL_PORT_SET__PORT2_MUX, (vp2->nlayers + vp1->nlayers + vp0->nlayers - 1)); else - port_sel |= FIELD_PREP(RK3568_OVL_PORT_SET__PORT1_MUX, 8); + port_sel |= FIELD_PREP(RK3568_OVL_PORT_SET__PORT2_MUX, 8); layer_sel = vop2_readl(vop2, RK3568_OVL_LAYER_SEL); @@ -2350,9 +2401,30 @@ for (i = 0; i < vp->id; i++) ofs += vop2->vps[i].nlayers; - nlayer = 0; drm_atomic_crtc_for_each_plane(plane, &vp->crtc) { struct vop2_win *win = to_vop2_win(plane); + struct vop2_win *old_win; + + layer_id = (u8)(plane->state->normalized_zpos + ofs); + + /* + * Find the layer this win bind in old state. + */ + for (old_layer_id = 0; old_layer_id < vop2->data->win_size; old_layer_id++) { + layer_sel_id = (layer_sel >> (4 * old_layer_id)) & 0xf; + if (layer_sel_id == win->data->layer_sel_id) + break; + } + + /* + * Find the win bind to this layer in old state + */ + for (i = 0; i < vop2->data->win_size; i++) { + old_win = &vop2->win[i]; + layer_sel_id = (layer_sel >> (4 * layer_id)) & 0xf; + if (layer_sel_id == old_win->data->layer_sel_id) + break; + } switch (win->data->phys_id) { case ROCKCHIP_VOP2_CLUSTER0: @@ -2397,17 +2469,14 @@ break; } - layer_sel &= ~RK3568_OVL_LAYER_SEL__LAYER(plane->state->normalized_zpos + ofs, - 0x7); - layer_sel |= RK3568_OVL_LAYER_SEL__LAYER(plane->state->normalized_zpos + ofs, - win->data->layer_sel_id); - nlayer++; - } - - /* configure unused layers to 0x5 (reserved) */ - for (; nlayer < vp->nlayers; nlayer++) { - layer_sel &= ~RK3568_OVL_LAYER_SEL__LAYER(nlayer + ofs, 0x7); - layer_sel |= RK3568_OVL_LAYER_SEL__LAYER(nlayer + ofs, 5); + layer_sel &= ~RK3568_OVL_LAYER_SEL__LAYER(layer_id, 0x7); + layer_sel |= RK3568_OVL_LAYER_SEL__LAYER(layer_id, win->data->layer_sel_id); + /* + * When we bind a window from layerM to layerN, we also need to move the old + * window on layerN to layerM to avoid one window selected by two or more layers. + */ + layer_sel &= ~RK3568_OVL_LAYER_SEL__LAYER(old_layer_id, 0x7); + layer_sel |= RK3568_OVL_LAYER_SEL__LAYER(old_layer_id, old_win->data->layer_sel_id); } vop2_writel(vop2, RK3568_OVL_LAYER_SEL, layer_sel); @@ -2442,9 +2511,11 @@ sdly |= FIELD_PREP(RK3568_SMART_DLY_NUM__ESMART1, dly); break; case ROCKCHIP_VOP2_SMART0: + case ROCKCHIP_VOP2_ESMART2: sdly |= FIELD_PREP(RK3568_SMART_DLY_NUM__SMART0, dly); break; case ROCKCHIP_VOP2_SMART1: + case ROCKCHIP_VOP2_ESMART3: sdly |= FIELD_PREP(RK3568_SMART_DLY_NUM__SMART1, dly); break; } @@ -2863,6 +2934,10 @@ [VOP2_WIN_Y2R_EN] = REG_FIELD(RK3568_CLUSTER_WIN_CTRL0, 8, 8), [VOP2_WIN_R2Y_EN] = REG_FIELD(RK3568_CLUSTER_WIN_CTRL0, 9, 9), [VOP2_WIN_CSC_MODE] = REG_FIELD(RK3568_CLUSTER_WIN_CTRL0, 10, 11), + [VOP2_WIN_AXI_YRGB_R_ID] = REG_FIELD(RK3568_CLUSTER_WIN_CTRL2, 0, 3), + [VOP2_WIN_AXI_UV_R_ID] = REG_FIELD(RK3568_CLUSTER_WIN_CTRL2, 5, 8), + /* RK3588 only, reserved bit on rk3568*/ + [VOP2_WIN_AXI_BUS_ID] = REG_FIELD(RK3568_CLUSTER_CTRL, 13, 13), /* Scale */ [VOP2_WIN_SCALE_YRGB_X] = REG_FIELD(RK3568_CLUSTER_WIN_SCL_FACTOR_YRGB, 0, 15), @@ -2955,6 +3030,10 @@ [VOP2_WIN_YMIRROR] = REG_FIELD(RK3568_SMART_CTRL1, 31, 31), [VOP2_WIN_COLOR_KEY] = REG_FIELD(RK3568_SMART_COLOR_KEY_CTRL, 0, 29), [VOP2_WIN_COLOR_KEY_EN] = REG_FIELD(RK3568_SMART_COLOR_KEY_CTRL, 31, 31), + [VOP2_WIN_AXI_YRGB_R_ID] = REG_FIELD(RK3568_SMART_CTRL1, 4, 8), + [VOP2_WIN_AXI_UV_R_ID] = REG_FIELD(RK3568_SMART_CTRL1, 12, 16), + /* RK3588 only, reserved register on rk3568 */ + [VOP2_WIN_AXI_BUS_ID] = REG_FIELD(RK3588_SMART_AXI_CTRL, 1, 1), /* Scale */ [VOP2_WIN_SCALE_YRGB_X] = REG_FIELD(RK3568_SMART_REGION0_SCL_FACTOR_YRGB, 0, 15), --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/rockchip/rockchip_drm_vop2.h +++ linux-xilinx-6.8.0/drivers/gpu/drm/rockchip/rockchip_drm_vop2.h @@ -9,6 +9,7 @@ #include #include +#include "rockchip_drm_drv.h" #include "rockchip_drm_vop.h" #define VOP2_VP_FEATURE_OUTPUT_10BIT BIT(0) @@ -78,6 +79,9 @@ VOP2_WIN_COLOR_KEY, VOP2_WIN_COLOR_KEY_EN, VOP2_WIN_DITHER_UP, + VOP2_WIN_AXI_BUS_ID, + VOP2_WIN_AXI_YRGB_R_ID, + VOP2_WIN_AXI_UV_R_ID, /* scale regs */ VOP2_WIN_SCALE_YRGB_X, @@ -140,6 +144,10 @@ unsigned int layer_sel_id; uint64_t feature; + uint8_t axi_bus_id; + uint8_t axi_yrgb_r_id; + uint8_t axi_uv_r_id; + unsigned int max_upscale_factor; unsigned int max_downscale_factor; const u8 dly[VOP2_DLY_MODE_MAX]; @@ -308,6 +316,7 @@ #define RK3568_CLUSTER_WIN_CTRL0 0x00 #define RK3568_CLUSTER_WIN_CTRL1 0x04 +#define RK3568_CLUSTER_WIN_CTRL2 0x08 #define RK3568_CLUSTER_WIN_YRGB_MST 0x10 #define RK3568_CLUSTER_WIN_CBR_MST 0x14 #define RK3568_CLUSTER_WIN_VIR 0x18 @@ -330,6 +339,7 @@ /* (E)smart register definition, offset relative to window base */ #define RK3568_SMART_CTRL0 0x00 #define RK3568_SMART_CTRL1 0x04 +#define RK3588_SMART_AXI_CTRL 0x08 #define RK3568_SMART_REGION0_CTRL 0x10 #define RK3568_SMART_REGION0_YRGB_MST 0x14 #define RK3568_SMART_REGION0_CBR_MST 0x18 --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/rockchip/rockchip_lvds.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/rockchip/rockchip_lvds.c @@ -576,8 +576,7 @@ ret = -EINVAL; goto err_put_port; } else if (ret) { - DRM_DEV_ERROR(dev, "failed to find panel and bridge node\n"); - ret = -EPROBE_DEFER; + dev_err_probe(dev, ret, "failed to find panel and bridge node\n"); goto err_put_port; } if (lvds->panel) --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c @@ -17,9 +17,7 @@ static const uint32_t formats_cluster[] = { DRM_FORMAT_XRGB2101010, - DRM_FORMAT_ARGB2101010, DRM_FORMAT_XBGR2101010, - DRM_FORMAT_ABGR2101010, DRM_FORMAT_XRGB8888, DRM_FORMAT_ARGB8888, DRM_FORMAT_XBGR8888, @@ -315,7 +313,7 @@ * AXI1 is a read only bus. * * Every window on a AXI bus must assigned two unique - * read id(yrgb_id/uv_id, valid id are 0x1~0xe). + * read id(yrgb_r_id/uv_r_id, valid id are 0x1~0xe). * * AXI0: * Cluster0/1, Esmart0/1, WriteBack @@ -335,6 +333,9 @@ .layer_sel_id = 0, .supported_rotations = DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_270 | DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y, + .axi_bus_id = 0, + .axi_yrgb_r_id = 2, + .axi_uv_r_id = 3, .max_upscale_factor = 4, .max_downscale_factor = 4, .dly = { 4, 26, 29 }, @@ -351,6 +352,9 @@ .supported_rotations = DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_270 | DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y, .type = DRM_PLANE_TYPE_PRIMARY, + .axi_bus_id = 0, + .axi_yrgb_r_id = 6, + .axi_uv_r_id = 7, .max_upscale_factor = 4, .max_downscale_factor = 4, .dly = { 4, 26, 29 }, @@ -366,6 +370,9 @@ .supported_rotations = DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_270 | DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y, .type = DRM_PLANE_TYPE_PRIMARY, + .axi_bus_id = 1, + .axi_yrgb_r_id = 2, + .axi_uv_r_id = 3, .max_upscale_factor = 4, .max_downscale_factor = 4, .dly = { 4, 26, 29 }, @@ -381,6 +388,9 @@ .supported_rotations = DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_270 | DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y, .type = DRM_PLANE_TYPE_PRIMARY, + .axi_bus_id = 1, + .axi_yrgb_r_id = 6, + .axi_uv_r_id = 7, .max_upscale_factor = 4, .max_downscale_factor = 4, .dly = { 4, 26, 29 }, @@ -395,6 +405,9 @@ .layer_sel_id = 2, .supported_rotations = DRM_MODE_REFLECT_Y, .type = DRM_PLANE_TYPE_OVERLAY, + .axi_bus_id = 0, + .axi_yrgb_r_id = 0x0a, + .axi_uv_r_id = 0x0b, .max_upscale_factor = 8, .max_downscale_factor = 8, .dly = { 23, 45, 48 }, @@ -408,6 +421,9 @@ .layer_sel_id = 3, .supported_rotations = DRM_MODE_REFLECT_Y, .type = DRM_PLANE_TYPE_OVERLAY, + .axi_bus_id = 0, + .axi_yrgb_r_id = 0x0c, + .axi_uv_r_id = 0x01, .max_upscale_factor = 8, .max_downscale_factor = 8, .dly = { 23, 45, 48 }, @@ -421,6 +437,9 @@ .layer_sel_id = 6, .supported_rotations = DRM_MODE_REFLECT_Y, .type = DRM_PLANE_TYPE_OVERLAY, + .axi_bus_id = 1, + .axi_yrgb_r_id = 0x0a, + .axi_uv_r_id = 0x0b, .max_upscale_factor = 8, .max_downscale_factor = 8, .dly = { 23, 45, 48 }, @@ -434,6 +453,9 @@ .layer_sel_id = 7, .supported_rotations = DRM_MODE_REFLECT_Y, .type = DRM_PLANE_TYPE_OVERLAY, + .axi_bus_id = 1, + .axi_yrgb_r_id = 0x0c, + .axi_uv_r_id = 0x0d, .max_upscale_factor = 8, .max_downscale_factor = 8, .dly = { 23, 45, 48 }, --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -455,6 +455,7 @@ }; static const struct vop_common rk3066_common = { + .dma_stop = VOP_REG(RK3066_SYS_CTRL0, 0x1, 0), .standby = VOP_REG(RK3066_SYS_CTRL0, 0x1, 1), .out_mode = VOP_REG(RK3066_DSP_CTRL0, 0xf, 0), .cfg_done = VOP_REG(RK3066_REG_CFG_DONE, 0x1, 0), @@ -503,6 +504,7 @@ .output = &rk3066_output, .win = rk3066_vop_win_data, .win_size = ARRAY_SIZE(rk3066_vop_win_data), + .feature = VOP_FEATURE_INTERNAL_RGB, .max_output = { 1920, 1080 }, }; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/scheduler/sched_entity.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/scheduler/sched_entity.c @@ -71,13 +71,19 @@ entity->guilty = guilty; entity->num_sched_list = num_sched_list; entity->priority = priority; + /* + * It's perfectly valid to initialize an entity without having a valid + * scheduler attached. It's just not valid to use the scheduler before it + * is initialized itself. + */ entity->sched_list = num_sched_list > 1 ? sched_list : NULL; RCU_INIT_POINTER(entity->last_scheduled, NULL); RB_CLEAR_NODE(&entity->rb_tree_node); - if (!sched_list[0]->sched_rq) { - /* Warn drivers not to do this and to fix their DRM - * calling order. + if (num_sched_list && !sched_list[0]->sched_rq) { + /* Since every entry covered by num_sched_list + * should be non-NULL and therefore we warn drivers + * not to do this and to fix their DRM calling order. */ pr_warn("%s: called with uninitialized scheduler\n", __func__); } else if (num_sched_list) { @@ -127,8 +133,10 @@ { WARN_ON(!num_sched_list || !sched_list); + spin_lock(&entity->rq_lock); entity->sched_list = sched_list; entity->num_sched_list = num_sched_list; + spin_unlock(&entity->rq_lock); } EXPORT_SYMBOL(drm_sched_entity_modify_sched); @@ -374,7 +382,7 @@ container_of(cb, struct drm_sched_entity, cb); drm_sched_entity_clear_dep(f, cb); - drm_sched_wakeup(entity->rq->sched, entity); + drm_sched_wakeup(entity->rq->sched); } /** @@ -591,6 +599,9 @@ /* first job wakes up scheduler */ if (first) { + struct drm_gpu_scheduler *sched; + struct drm_sched_rq *rq; + /* Add the entity to the run queue */ spin_lock(&entity->rq_lock); if (entity->stopped) { @@ -600,13 +611,16 @@ return; } - drm_sched_rq_add_entity(entity->rq, entity); + rq = entity->rq; + sched = rq->sched; + + drm_sched_rq_add_entity(rq, entity); spin_unlock(&entity->rq_lock); if (drm_sched_policy == DRM_SCHED_POLICY_FIFO) drm_sched_rq_update_fifo(entity, submit_ts); - drm_sched_wakeup(entity->rq->sched, entity); + drm_sched_wakeup(sched); } } EXPORT_SYMBOL(drm_sched_entity_push_job); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/scheduler/sched_main.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/scheduler/sched_main.c @@ -806,6 +806,14 @@ return -EINVAL; } + /* + * We don't know for sure how the user has allocated. Thus, zero the + * struct so that unallowed (i.e., too early) usage of pointers that + * this function does not set is guaranteed to lead to a NULL pointer + * exception instead of UB. + */ + memset(job, 0, sizeof(*job)); + job->entity = entity; job->credits = credits; job->s_fence = drm_sched_fence_alloc(entity, owner); @@ -1022,15 +1030,12 @@ /** * drm_sched_wakeup - Wake up the scheduler if it is ready to queue * @sched: scheduler instance - * @entity: the scheduler entity * * Wake up the scheduler if we can queue jobs. */ -void drm_sched_wakeup(struct drm_gpu_scheduler *sched, - struct drm_sched_entity *entity) +void drm_sched_wakeup(struct drm_gpu_scheduler *sched) { - if (drm_sched_can_queue(sched, entity)) - drm_sched_run_job_queue(sched); + drm_sched_run_job_queue(sched); } /** --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/sti/sti_cursor.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/sti/sti_cursor.c @@ -200,6 +200,9 @@ return 0; crtc_state = drm_atomic_get_crtc_state(state, crtc); + if (IS_ERR(crtc_state)) + return PTR_ERR(crtc_state); + mode = &crtc_state->mode; dst_x = new_plane_state->crtc_x; dst_y = new_plane_state->crtc_y; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/sti/sti_gdp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/sti/sti_gdp.c @@ -638,6 +638,9 @@ mixer = to_sti_mixer(crtc); crtc_state = drm_atomic_get_crtc_state(state, crtc); + if (IS_ERR(crtc_state)) + return PTR_ERR(crtc_state); + mode = &crtc_state->mode; dst_x = new_plane_state->crtc_x; dst_y = new_plane_state->crtc_y; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/sti/sti_hdmi.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/sti/sti_hdmi.c @@ -1221,7 +1221,9 @@ struct drm_connector *connector = hdmi->drm_connector; DRM_DEBUG_DRIVER("\n"); + mutex_lock(&connector->eld_mutex); memcpy(buf, connector->eld, min(sizeof(connector->eld), len)); + mutex_unlock(&connector->eld_mutex); return 0; } --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/sti/sti_hqvdp.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/sti/sti_hqvdp.c @@ -1037,6 +1037,9 @@ return 0; crtc_state = drm_atomic_get_crtc_state(state, crtc); + if (IS_ERR(crtc_state)) + return PTR_ERR(crtc_state); + mode = &crtc_state->mode; dst_x = new_plane_state->crtc_x; dst_y = new_plane_state->crtc_y; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/sti/sti_mixer.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/sti/sti_mixer.c @@ -137,7 +137,7 @@ } } -static void mixer_dbg_mxn(struct seq_file *s, void *addr) +static void mixer_dbg_mxn(struct seq_file *s, void __iomem *addr) { int i; --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/stm/drv.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/stm/drv.c @@ -25,6 +25,7 @@ #include #include #include +#include #include "ltdc.h" @@ -75,7 +76,7 @@ DRM_DEBUG("%s\n", __func__); - ldev = devm_kzalloc(ddev->dev, sizeof(*ldev), GFP_KERNEL); + ldev = drmm_kzalloc(ddev, sizeof(*ldev), GFP_KERNEL); if (!ldev) return -ENOMEM; @@ -203,12 +204,14 @@ ret = drm_dev_register(ddev, 0); if (ret) - goto err_put; + goto err_unload; drm_fbdev_dma_setup(ddev, 16); return 0; +err_unload: + drv_unload(ddev); err_put: drm_dev_put(ddev); --- linux-xilinx-6.8.0.orig/drivers/gpu/drm/stm/ltdc.c +++ linux-xilinx-6.8.0/drivers/gpu/drm/stm/ltdc.c @@ -36,6 +36,7 @@ #include #include #include +#include #include